diff --git a/scripts/kconfiglib/kconfiglib.pyc b/scripts/kconfiglib/kconfiglib.pyc index 20659dd641b89df4d6f8fb50919cf7c5f7e4eda4..f068a2f111ba45a30786c95adb5c42f693b56e76 100644 Binary files a/scripts/kconfiglib/kconfiglib.pyc and b/scripts/kconfiglib/kconfiglib.pyc differ diff --git a/src/.gitignore b/src/.gitignore index 38b50fd119a57c387eee12f35d869d9976cd1ba7..bb9caa138e939a38767fd94b6b9cb65b42761ca7 100644 --- a/src/.gitignore +++ b/src/.gitignore @@ -4,61 +4,12 @@ # Object files *.o -*.ko *.obj -*.elf -*.disasm - -# Linker output -*.ilk -*.map -*.exp - -# Precompiled Headers -*.gch -*.pch - -# Libraries -*.lib -*.a -*.la -*.lo - -# Shared objects (inc. Windows DLLs) -*.dll -*.so -*.so.* -*.dylib - -# Executables -*.exe -*.out -*.app -*.i*86 -*.x86_64 -*.hex - -# Image -*.img -*.iso -*.vhd -*.bin - -# Debug files -*.dSYM/ -*.su -*.idb -*.pdb -*.dump # Kernel Module Compile Results *.cmd -.tmp_versions/ -modules.order -Module.symvers -Mkfile.old -dkms.conf +# kernel special fixdep init/rootfs.c build diff --git a/src/arch/riscv64/include/cache.h b/src/arch/riscv64/include/cache.h new file mode 100644 index 0000000000000000000000000000000000000000..3da58ba5c2af592b334d08603fcd8b821e2ef3d2 --- /dev/null +++ b/src/arch/riscv64/include/cache.h @@ -0,0 +1,47 @@ +/** + * Copyright (c) 2018-2022, NXOS Development Team + * SPDX-License-Identifier: Apache-2.0 + * + * Contains: Clock for system + * + * Change Logs: + * Date Author Notes + * 2023-2-4 planck Init + */ + +#ifndef __CACHE_H__ +#define __CACHE_H__ + +#include + +#define L1_CACHE_BYTES (64) +inline void cache_inv_range(unsigned long start, unsigned long stop) +{ + register unsigned long i asm("a0") = start & ~(L1_CACHE_BYTES - 1); + + for(; i < stop; i += L1_CACHE_BYTES) + __asm__ __volatile__(".long 0x02a5000b"); /* dcache.ipa a0 */ + __asm__ __volatile__(".long 0x01b0000b"); /* sync.is */ +} + +inline void dcache_inv_range(unsigned long start, unsigned long end) +{ + unsigned long i = start & ~(L1_CACHE_BYTES - 1); + + for (; i < end; i += L1_CACHE_BYTES) + { + /* asm volatile("dcache.iva %0\n"::"r"(i):"memory"); */ + asm volatile("mv a6, %0\n" ::"r"(i) + : "memory"); /* a6 = a5(i) */ + asm volatile(".long 0x0268000b"); /* dcache.iva a6 */ + } + asm volatile(".long 0x01b0000b"); +} + +inline void Cpu_Dcache_Invalidate(void *addr, int size) +{ + dcache_inv_range((unsigned long)addr, (unsigned long)((unsigned char *)addr + size)); +} + + +#endif /* __CACHE__ */ diff --git a/src/arch/riscv64/kernel/memory.c b/src/arch/riscv64/kernel/memory.c index 9c9bb93ac0ccd0bf78c87422c16e60a375901329..3a219e87d81fe494e6f11c4c52d118a8db5c8396 100644 --- a/src/arch/riscv64/kernel/memory.c +++ b/src/arch/riscv64/kernel/memory.c @@ -1,9 +1,9 @@ /** * Copyright (c) 2018-2022, NXOS Development Team * SPDX-License-Identifier: Apache-2.0 - * - * Contains: Page init - * + * + * Contains: Page init + * * Change Logs: * Date Author Notes * 2021-11-28 JasonHu Init @@ -27,6 +27,8 @@ #include #include +#include + NX_PRIVATE NX_U64 kernelTable[NX_PAGE_SIZE / sizeof(NX_U64)] NX_CALIGN(NX_PAGE_SIZE); NX_PRIVATE void NX_HalEarlyMap(NX_Mmu *mmu, NX_Addr virStart, NX_Size size) @@ -49,6 +51,9 @@ NX_PRIVATE void NX_HalEarlyMap(NX_Mmu *mmu, NX_Addr virStart, NX_Size size) NX_MmuMapPageWithPhy(mmu, RISCV_PLIC_PADDR + 0x200000, RISCV_PLIC_PADDR + 0x200000, PLIC_MEMSZ1, NX_PAGE_ATTR_KERNEL); + NX_MmuMapPageWithPhy(mmu, D1_GPIO_BASE, D1_GPIO_BASE, 0x50000, + NX_PAGE_ATTR_KERNEL); + NX_LOG_I("OS map early on [%p~%p]", virStart, virStart + size); } @@ -56,9 +61,9 @@ NX_PRIVATE void NX_HalEarlyMap(NX_Mmu *mmu, NX_Addr virStart, NX_Size size) * Init physic memory and map kernel on virtual memory. */ void NX_HalPageZoneInit(void) -{ +{ NX_Size memSize = DRAM_SIZE_DEFAULT; - + NX_LOG_I("Memory NX_Size: %x Bytes %d MB", memSize, memSize / NX_MB); if (memSize == 0) @@ -70,16 +75,16 @@ void NX_HalPageZoneInit(void) NX_LOG_E("Must has %d MB memory!", MEM_MIN_SIZE / NX_MB); NX_PANIC("Memory too small"); } - + /* calc normal base & size */ NX_Size avaliableSize = memSize - MEM_KERNEL_SZ - MEM_SBI_SZ; - + NX_Size normalSize = avaliableSize / 2; if (normalSize > MEM_KERNEL_SPACE_SZ) { normalSize = MEM_KERNEL_SPACE_SZ; } - + /* calc user base & size */ NX_Addr userBase = MEM_NORMAL_BASE + normalSize; NX_Size userSize = avaliableSize - normalSize; @@ -107,6 +112,6 @@ void NX_HalPageZoneInit(void) NX_MmuEnable(); NX_LOG_I("MMU enabled"); - + NX_LOG_I("Memroy init done."); } diff --git a/src/arch/riscv64/port/clock.c b/src/arch/riscv64/port/clock.c index c7b7c562bbe4c368da469245a3b450f3c4a4d1d7..9280a4e6d84cc3ca54dda4d7765844cd0383a6c5 100644 --- a/src/arch/riscv64/port/clock.c +++ b/src/arch/riscv64/port/clock.c @@ -37,6 +37,7 @@ #endif NX_PRIVATE NX_U64 tickDelta = NX_TIMER_CLK_FREQ / NX_TICKS_PER_SECOND; +NX_PRIVATE volatile NX_U64 tickNext = 0; NX_PRIVATE NX_U64 GetTimerCounter() { @@ -45,20 +46,57 @@ NX_PRIVATE NX_U64 GetTimerCounter() return ret; } +NX_U64 NX_ClockGetMicrosecond(void) +{ + NX_U64 us = 0; + + NX_U64 counter = GetTimerCounter() % tickDelta; + + /** + * us in per ms + */ + us = (NX_DIV_ROUND_UP(counter, (tickDelta / 1000))) % 1000; + + /** + * us in time + */ + us += NX_ClockGetMillisecond() * 1000; + return us; +} + void NX_HalClockHandler(void) { - NX_ClockTickGo(); + NX_U64 counter; + /* update timer */ - sbi_set_timer(GetTimerCounter() + tickDelta); + counter = GetTimerCounter(); + if (counter - tickNext >= tickDelta) + { + tickNext = counter + tickDelta; + } + else + { + tickNext += tickDelta; + } + sbi_set_timer(tickNext); + + NX_ClockTickGo(); } NX_INTERFACE NX_Error NX_HalInitClock(void) { + NX_U64 counter; /* Clear the Supervisor-Timer bit in SIE */ ClearCSR(sie, SIE_STIE); /* Set timer */ - sbi_set_timer(GetTimerCounter() + tickDelta); + tickNext = tickDelta; + counter = GetTimerCounter(); + if (counter > tickNext) + { + tickNext = NX_DIV_ROUND_UP(counter, tickDelta) * tickDelta; + } + sbi_set_timer(tickNext); /* Enable the Supervisor-Timer bit in SIE */ SetCSR(sie, SIE_STIE); diff --git a/src/arch/x86/port/clock.c b/src/arch/x86/port/clock.c index 0a996641812f5159cef0669bb1af1665a9782e1f..015af46776cf7d54b89bd6e796ba977e720fb79f 100644 --- a/src/arch/x86/port/clock.c +++ b/src/arch/x86/port/clock.c @@ -134,6 +134,14 @@ enum ctrl_mode_bits #define TIMER_FREQ 1193180 /* clock frequency */ #define COUNTER0_VALUE (TIMER_FREQ / NX_TICKS_PER_SECOND) +/** + * FIXME: support this + */ +NX_U64 NX_ClockGetMicrosecond(void) +{ + return 0; +} + NX_PRIVATE NX_Error ClockHandler(NX_U32 irq, void *arg) { NX_ClockTickGo(); diff --git a/src/include/base/clock.h b/src/include/base/clock.h index 396d7753cf8c9c0456142e06d39c36ba1e3667af..37aa1a5970fec90e71a3367a3a6e0381ae73163b 100644 --- a/src/include/base/clock.h +++ b/src/include/base/clock.h @@ -37,6 +37,9 @@ void NX_ClockTickGo(void); NX_Error NX_ClockTickDelay(NX_ClockTick ticks); +NX_U64 NX_ClockGetMicrosecond(void); +NX_Error NX_DelayMicrosecond(NX_TimeVal us); + NX_INLINE NX_TimeVal NX_ClockTickToMillisecond(NX_ClockTick tick) { return NX_TICKS_TO_MILLISECOND(tick); diff --git a/src/platform/d1/defconfig b/src/platform/d1/defconfig index 5883ee967411a4803dff71d8718f3f7332e63a1d..3c1b29af62375811d679ea58cde5522fd694d5c1 100644 --- a/src/platform/d1/defconfig +++ b/src/platform/d1/defconfig @@ -32,7 +32,7 @@ CONFIG_NX_THREAD_STACK_SIZE=8192 CONFIG_NX_ENABLE_SCHED=y CONFIG_NX_THREAD_MAX_PRIORITY_NR=16 CONFIG_NX_PORCESS_ENV_ARGS=1024 -CONFIG_NX_TICKS_PER_SECOND=100 +CONFIG_NX_TICKS_PER_SECOND=1000 # end of OS Kernel # @@ -47,7 +47,6 @@ CONFIG_NX_PLATFORM_D1=y CONFIG_NX_DRIVER_CONSOLE=y CONFIG_NX_PRINT_BUF_LEN=256 CONFIG_NX_DRIVER_ROMDISK=y -CONFIG_NX_DRIVER_ROMDISK_HOSTOS_PATH="../../romdisk.cpio" # CONFIG_NX_DRIVER_DUMMY is not set CONFIG_NX_DRIVER_NULL=y CONFIG_NX_DRIVER_ZERO=y diff --git a/src/platform/d1/include/nx_configure.h b/src/platform/d1/include/nx_configure.h index 7d30342e0ed8d64472f26ec246f07c7cc5d078a6..5df72d80abc5659a89e8930e0a750e4545d9c32b 100644 --- a/src/platform/d1/include/nx_configure.h +++ b/src/platform/d1/include/nx_configure.h @@ -17,12 +17,11 @@ #define CONFIG_NX_ENABLE_SCHED 1 #define CONFIG_NX_THREAD_MAX_PRIORITY_NR 16 #define CONFIG_NX_PORCESS_ENV_ARGS 1024 -#define CONFIG_NX_TICKS_PER_SECOND 100 +#define CONFIG_NX_TICKS_PER_SECOND 1000 #define CONFIG_NX_PLATFORM_D1 1 #define CONFIG_NX_DRIVER_CONSOLE 1 #define CONFIG_NX_PRINT_BUF_LEN 256 #define CONFIG_NX_DRIVER_ROMDISK 1 -#define CONFIG_NX_DRIVER_ROMDISK_HOSTOS_PATH "../../romdisk.cpio" #define CONFIG_NX_DRIVER_NULL 1 #define CONFIG_NX_DRIVER_ZERO 1 #define CONFIG_NX_DRIVER_MEMINFO 1 diff --git a/src/platform/f133/Kconfig b/src/platform/f133/Kconfig index d080e22cc6dea9529bf1dea1078525be9e512f40..31f2bdded486464b1a7e2350d7b7c56b52e2ea91 100644 --- a/src/platform/f133/Kconfig +++ b/src/platform/f133/Kconfig @@ -2,12 +2,3 @@ config NX_PLATFORM_F133 bool default y select NX_CPU_64BITS - -config SOC_SUN20IW1 - bool - default y - -# -# HAL libs -# -source "src/platform/f133/hal/Kconfig" diff --git a/src/platform/f133/Makefile b/src/platform/f133/Makefile index bc8b639f829563a70ef60f903f9d3b933191a2cc..e3267304dca18c58605423b3fe48649f44ae2a52 100644 --- a/src/platform/f133/Makefile +++ b/src/platform/f133/Makefile @@ -1,4 +1,2 @@ SRC += drivers/ -SRC += hal/ -SRC += osal/ -SRC += libos/ +SRC += hal/ \ No newline at end of file diff --git a/src/platform/f133/cmd.mk b/src/platform/f133/cmd.mk index 644cd0e4746485442d58c578ec6a1ea0e86deedb..062d91fc668bbbdee90cd70cbcc719e666a9b9a8 100644 --- a/src/platform/f133/cmd.mk +++ b/src/platform/f133/cmd.mk @@ -41,7 +41,7 @@ OC := $(CROSS_COMPILE)objcopy # run: $(OC) $(NXOS_NAME).elf --strip-all -O binary $(NXOS_NAME).bin - echo "allwinner-f133 run..." + echo "allwinner-d1 run..." $(XFEL) version $(XFEL) ddr f133 $(XFEL) write 0x40000000 $(SBI) @@ -72,4 +72,9 @@ gdb: dump: @echo dump kernel $(ARCH)/$(PLATFORM)/$(NXOS_NAME).elf $(DUMP) -D -S $(NXOS_NAME).elf > $(NXOS_NAME).dump.S - \ No newline at end of file + + +# ./xfel.exe ddr f133 +# .\xfel.exe write 0x40000000 ..\SBI\opensbi-f133.bin +# .\xfel.exe write 0x40200000 ..\..\NXOS.bin +# .\xfel.exe exec 0x40000000 diff --git a/src/platform/f133/defconfig b/src/platform/f133/defconfig index cbdd5300c3bab54dd7822c3b151695ab8ab68d0e..e244428d7a2428f86de18c807555b927b7f496f7 100644 --- a/src/platform/f133/defconfig +++ b/src/platform/f133/defconfig @@ -39,37 +39,6 @@ CONFIG_NX_TICKS_PER_SECOND=100 # Platform # CONFIG_NX_PLATFORM_F133=y -CONFIG_SOC_SUN20IW1=y - -# -# CCMU Devices -# -CONFIG_DRIVERS_CCMU=y -# CONFIG_DRIVERS_SUNXI_CLK is not set -CONFIG_DRIVERS_SUNXI_CCU=y -# CONFIG_HAL_TEST_CCU is not set -# CONFIG_NO_INFLUENCE_ON_CLOCK_SOURCE is not set -# end of CCMU Devices - -# -# GPIO Devices -# -CONFIG_DRIVERS_GPIO=y -# CONFIG_HAL_TEST_GPIO is not set -# end of GPIO Devices - -# -# UART Devices -# -CONFIG_DRIVERS_UART=y -# CONFIG_HAL_TEST_UART is not set -# CONFIG_SUNXI_UART_SUPPORT_POLL is not set -# CONFIG_SUNXI_UART_REGISTER_UART0 is not set -# CONFIG_SUNXI_UART_REGISTER_UART1 is not set -# CONFIG_SUNXI_UART_REGISTER_UART2 is not set -# CONFIG_SUNXI_UART_REGISTER_UART3 is not set -CONFIG_CLI_UART_PORT=0 -# end of UART Devices # end of Platform # diff --git a/src/platform/f133/drivers/direct_uart.c b/src/platform/f133/drivers/direct_uart.c index 40bd993d34ccc223d1ae22268701aff1038e65ac..ec7f94f205cdd238fb94a44d9458b6404f73797d 100644 --- a/src/platform/f133/drivers/direct_uart.c +++ b/src/platform/f133/drivers/direct_uart.c @@ -1,16 +1,18 @@ /** * Copyright (c) 2018-2022, NXOS Development Team * SPDX-License-Identifier: Apache-2.0 - * - * Contains: Direct uart driver - * + * + * Contains: Direct uart driver + * * Change Logs: * Date Author Notes * 2022-4-17 JasonHu Init + * 2023-2-26 planck Add interrupt trigger */ -#include +#include #include +#include #include #include #include @@ -26,7 +28,7 @@ void NX_HalDirectUartPutc(char ch) int NX_HalDirectUartGetc(void) { - if(!(Read32(UART0_LSR) & UART0_LSR_DR)) + if (!(Read32(UART0_LSR) & UART0_LSR_DR)) { return -1; } @@ -40,11 +42,50 @@ NX_INTERFACE void NX_ConsoleSendData(char ch) void NX_HalDirectUartInit(void) { + int addr; + NX_U32 val; + + d1_set_gpio_mode(GPIO_PORT_B, GPIO_PIN_8, UART0_MODE_TX); + d1_set_gpio_mode(GPIO_PORT_B, GPIO_PIN_9, UART0_MODE_RX); + + //设置串口时钟 + /* Open the clock gate for uart */ + val = Read32(D1_CCU_BASE + CCU_UART_BGR_REG); + val |= 1 << (0); + Write32(D1_CCU_BASE + CCU_UART_BGR_REG, val); + + /* Deassert uart reset */ + val = Read32(D1_CCU_BASE + CCU_UART_BGR_REG); + val |= 1 << (16); + Write32(D1_CCU_BASE + CCU_UART_BGR_REG, val); + + //配置串口功能 + /* Config uart0 to 115200-8-1-0 */ + addr = UART_BASE + 0 * 0x4000; + Write32(addr + UART_DLH, 0x0); // disable all interrupt + Write32(addr + UART_FCR, 0xf7); // reset fifo + Write32(addr + UART_MCR, 0x0); // uart mode + // set 115200 + val = Read32(addr + UART_LCR); + val |= (1 << 7); // select Divisor Latch LS Register + Write32(addr + UART_LCR, val); + Write32(addr + UART_DLL, 0xd & 0xff); // 0x0d=13 240000000/(13*16) = 115200 Divisor Latch Lows + Write32(addr + UART_DLH, (0xd >> 8) & 0xff); // Divisor Latch High + val = Read32(addr + UART_LCR); + val &= ~(1 << 7); + Write32(addr + UART_LCR, val); + + val = Read32(addr + UART_LCR); + val &= ~0x1f; + val |= (0x3 << 0) | (0 << 2) | (0x0 << 3); // 8 bit, 1 stop bit,parity disabled + Write32(addr + UART_LCR, val); + // enable uart rx irq + Write32(addr + UART_IER, 0x01); } /** * default handler -*/ + */ NX_WEAK_SYM void NX_HalDirectUartGetcHandler(char data) { NX_ConsoleReceveData(data); @@ -63,17 +104,9 @@ NX_PRIVATE NX_Error UartPollHandler(void) return data != -1 ? NX_EOK : NX_EIO; } -NX_PRIVATE void NX_UartRxPollThread(void *arg) -{ - while (1) - { - UartPollHandler(); - NX_ThreadSleep(10); - } -} void NX_HalDirectUartStage2(void) { - NX_Thread *thread = NX_ThreadCreate("uart_rx", NX_UartRxPollThread, NX_NULL, NX_THREAD_PRIORITY_MAX); - NX_ThreadStart(thread); + NX_ASSERT(NX_IRQ_Bind(UART0_IRQ, UartPollHandler, NX_NULL, "Uart0", 0) == NX_EOK); + NX_ASSERT(NX_IRQ_Unmask(UART0_IRQ) == NX_EOK); } diff --git a/src/platform/f133/drivers/font_8x16.c b/src/platform/f133/drivers/font_8x16.c new file mode 100644 index 0000000000000000000000000000000000000000..6c156158cc35c6f127837a08927c41afe703a216 --- /dev/null +++ b/src/platform/f133/drivers/font_8x16.c @@ -0,0 +1,4076 @@ +/**********************************************/ +/* */ +/* Font file generated by cpi2fnt */ +/* */ +/**********************************************/ + + + + +const unsigned char fontdata_8x16[4096] = { + + /* 0 0x00 '^@' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 1 0x01 '^A' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x7e, /* 01111110 */ + 0x81, /* 10000001 */ + 0xa5, /* 10100101 */ + 0x81, /* 10000001 */ + 0x81, /* 10000001 */ + 0xbd, /* 10111101 */ + 0x99, /* 10011001 */ + 0x81, /* 10000001 */ + 0x81, /* 10000001 */ + 0x7e, /* 01111110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 2 0x02 '^B' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x7e, /* 01111110 */ + 0xff, /* 11111111 */ + 0xdb, /* 11011011 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xc3, /* 11000011 */ + 0xe7, /* 11100111 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0x7e, /* 01111110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 3 0x03 '^C' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x6c, /* 01101100 */ + 0xfe, /* 11111110 */ + 0xfe, /* 11111110 */ + 0xfe, /* 11111110 */ + 0xfe, /* 11111110 */ + 0x7c, /* 01111100 */ + 0x38, /* 00111000 */ + 0x10, /* 00010000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 4 0x04 '^D' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x10, /* 00010000 */ + 0x38, /* 00111000 */ + 0x7c, /* 01111100 */ + 0xfe, /* 11111110 */ + 0x7c, /* 01111100 */ + 0x38, /* 00111000 */ + 0x10, /* 00010000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 5 0x05 '^E' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x18, /* 00011000 */ + 0x3c, /* 00111100 */ + 0x3c, /* 00111100 */ + 0xe7, /* 11100111 */ + 0xe7, /* 11100111 */ + 0xe7, /* 11100111 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x3c, /* 00111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 6 0x06 '^F' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x18, /* 00011000 */ + 0x3c, /* 00111100 */ + 0x7e, /* 01111110 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0x7e, /* 01111110 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x3c, /* 00111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 7 0x07 '^G' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x18, /* 00011000 */ + 0x3c, /* 00111100 */ + 0x3c, /* 00111100 */ + 0x18, /* 00011000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 8 0x08 '^H' */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xe7, /* 11100111 */ + 0xc3, /* 11000011 */ + 0xc3, /* 11000011 */ + 0xe7, /* 11100111 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + + /* 9 0x09 '^I' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x3c, /* 00111100 */ + 0x66, /* 01100110 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x66, /* 01100110 */ + 0x3c, /* 00111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 10 0x0a '^J' */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xc3, /* 11000011 */ + 0x99, /* 10011001 */ + 0xbd, /* 10111101 */ + 0xbd, /* 10111101 */ + 0x99, /* 10011001 */ + 0xc3, /* 11000011 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + 0xff, /* 11111111 */ + + /* 11 0x0b '^K' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x1e, /* 00011110 */ + 0x0e, /* 00001110 */ + 0x1a, /* 00011010 */ + 0x32, /* 00110010 */ + 0x78, /* 01111000 */ + 0xcc, /* 11001100 */ + 0xcc, /* 11001100 */ + 0xcc, /* 11001100 */ + 0xcc, /* 11001100 */ + 0x78, /* 01111000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 12 0x0c '^L' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x3c, /* 00111100 */ + 0x66, /* 01100110 */ + 0x66, /* 01100110 */ + 0x66, /* 01100110 */ + 0x66, /* 01100110 */ + 0x3c, /* 00111100 */ + 0x18, /* 00011000 */ + 0x7e, /* 01111110 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 13 0x0d '^M' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x3f, /* 00111111 */ + 0x33, /* 00110011 */ + 0x3f, /* 00111111 */ + 0x30, /* 00110000 */ + 0x30, /* 00110000 */ + 0x30, /* 00110000 */ + 0x30, /* 00110000 */ + 0x70, /* 01110000 */ + 0xf0, /* 11110000 */ + 0xe0, /* 11100000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 14 0x0e '^N' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x7f, /* 01111111 */ + 0x63, /* 01100011 */ + 0x7f, /* 01111111 */ + 0x63, /* 01100011 */ + 0x63, /* 01100011 */ + 0x63, /* 01100011 */ + 0x63, /* 01100011 */ + 0x67, /* 01100111 */ + 0xe7, /* 11100111 */ + 0xe6, /* 11100110 */ + 0xc0, /* 11000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 15 0x0f '^O' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0xdb, /* 11011011 */ + 0x3c, /* 00111100 */ + 0xe7, /* 11100111 */ + 0x3c, /* 00111100 */ + 0xdb, /* 11011011 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 16 0x10 '^P' */ + 0x00, /* 00000000 */ + 0x80, /* 10000000 */ + 0xc0, /* 11000000 */ + 0xe0, /* 11100000 */ + 0xf0, /* 11110000 */ + 0xf8, /* 11111000 */ + 0xfe, /* 11111110 */ + 0xf8, /* 11111000 */ + 0xf0, /* 11110000 */ + 0xe0, /* 11100000 */ + 0xc0, /* 11000000 */ + 0x80, /* 10000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 17 0x11 '^Q' */ + 0x00, /* 00000000 */ + 0x02, /* 00000010 */ + 0x06, /* 00000110 */ + 0x0e, /* 00001110 */ + 0x1e, /* 00011110 */ + 0x3e, /* 00111110 */ + 0xfe, /* 11111110 */ + 0x3e, /* 00111110 */ + 0x1e, /* 00011110 */ + 0x0e, /* 00001110 */ + 0x06, /* 00000110 */ + 0x02, /* 00000010 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 18 0x12 '^R' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x18, /* 00011000 */ + 0x3c, /* 00111100 */ + 0x7e, /* 01111110 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x7e, /* 01111110 */ + 0x3c, /* 00111100 */ + 0x18, /* 00011000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 19 0x13 '^S' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x66, /* 01100110 */ + 0x66, /* 01100110 */ + 0x66, /* 01100110 */ + 0x66, /* 01100110 */ + 0x66, /* 01100110 */ + 0x66, /* 01100110 */ + 0x66, /* 01100110 */ + 0x00, /* 00000000 */ + 0x66, /* 01100110 */ + 0x66, /* 01100110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 20 0x14 '^T' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x7f, /* 01111111 */ + 0xdb, /* 11011011 */ + 0xdb, /* 11011011 */ + 0xdb, /* 11011011 */ + 0x7b, /* 01111011 */ + 0x1b, /* 00011011 */ + 0x1b, /* 00011011 */ + 0x1b, /* 00011011 */ + 0x1b, /* 00011011 */ + 0x1b, /* 00011011 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 21 0x15 '^U' */ + 0x00, /* 00000000 */ + 0x7c, /* 01111100 */ + 0xc6, /* 11000110 */ + 0x60, /* 01100000 */ + 0x38, /* 00111000 */ + 0x6c, /* 01101100 */ + 0xc6, /* 11000110 */ + 0xc6, /* 11000110 */ + 0x6c, /* 01101100 */ + 0x38, /* 00111000 */ + 0x0c, /* 00001100 */ + 0xc6, /* 11000110 */ + 0x7c, /* 01111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 22 0x16 '^V' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xfe, /* 11111110 */ + 0xfe, /* 11111110 */ + 0xfe, /* 11111110 */ + 0xfe, /* 11111110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 23 0x17 '^W' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x18, /* 00011000 */ + 0x3c, /* 00111100 */ + 0x7e, /* 01111110 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x7e, /* 01111110 */ + 0x3c, /* 00111100 */ + 0x18, /* 00011000 */ + 0x7e, /* 01111110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 24 0x18 '^X' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x18, /* 00011000 */ + 0x3c, /* 00111100 */ + 0x7e, /* 01111110 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 25 0x19 '^Y' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x7e, /* 01111110 */ + 0x3c, /* 00111100 */ + 0x18, /* 00011000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 26 0x1a '^Z' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x18, /* 00011000 */ + 0x0c, /* 00001100 */ + 0xfe, /* 11111110 */ + 0x0c, /* 00001100 */ + 0x18, /* 00011000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 27 0x1b '^[' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x30, /* 00110000 */ + 0x60, /* 01100000 */ + 0xfe, /* 11111110 */ + 0x60, /* 01100000 */ + 0x30, /* 00110000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 28 0x1c '^\' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xc0, /* 11000000 */ + 0xc0, /* 11000000 */ + 0xc0, /* 11000000 */ + 0xfe, /* 11111110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 29 0x1d '^]' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x28, /* 00101000 */ + 0x6c, /* 01101100 */ + 0xfe, /* 11111110 */ + 0x6c, /* 01101100 */ + 0x28, /* 00101000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 30 0x1e '^^' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x10, /* 00010000 */ + 0x38, /* 00111000 */ + 0x38, /* 00111000 */ + 0x7c, /* 01111100 */ + 0x7c, /* 01111100 */ + 0xfe, /* 11111110 */ + 0xfe, /* 11111110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 31 0x1f '^_' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xfe, /* 11111110 */ + 0xfe, /* 11111110 */ + 0x7c, /* 01111100 */ + 0x7c, /* 01111100 */ + 0x38, /* 00111000 */ + 0x38, /* 00111000 */ + 0x10, /* 00010000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 32 0x20 ' ' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + // /* 33 0x21 '!' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x18, /* 00011000 */ + // 0x3c, /* 00111100 */ + // 0x3c, /* 00111100 */ + // 0x3c, /* 00111100 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x00, /* 00000000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 34 0x22 '"' */ + // 0x00, /* 00000000 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x24, /* 00100100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 35 0x23 '#' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x6c, /* 01101100 */ + // 0x6c, /* 01101100 */ + // 0xfe, /* 11111110 */ + // 0x6c, /* 01101100 */ + // 0x6c, /* 01101100 */ + // 0x6c, /* 01101100 */ + // 0xfe, /* 11111110 */ + // 0x6c, /* 01101100 */ + // 0x6c, /* 01101100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 36 0x24 '$' */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x7c, /* 01111100 */ + // 0xc6, /* 11000110 */ + // 0xc2, /* 11000010 */ + // 0xc0, /* 11000000 */ + // 0x7c, /* 01111100 */ + // 0x06, /* 00000110 */ + // 0x06, /* 00000110 */ + // 0x86, /* 10000110 */ + // 0xc6, /* 11000110 */ + // 0x7c, /* 01111100 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 37 0x25 '%' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xc2, /* 11000010 */ + // 0xc6, /* 11000110 */ + // 0x0c, /* 00001100 */ + // 0x18, /* 00011000 */ + // 0x30, /* 00110000 */ + // 0x60, /* 01100000 */ + // 0xc6, /* 11000110 */ + // 0x86, /* 10000110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 38 0x26 '&' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x38, /* 00111000 */ + // 0x6c, /* 01101100 */ + // 0x6c, /* 01101100 */ + // 0x38, /* 00111000 */ + // 0x76, /* 01110110 */ + // 0xdc, /* 11011100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0x76, /* 01110110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 39 0x27 ''' */ + // 0x00, /* 00000000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x60, /* 01100000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 40 0x28 '(' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x0c, /* 00001100 */ + // 0x18, /* 00011000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x18, /* 00011000 */ + // 0x0c, /* 00001100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 41 0x29 ')' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x30, /* 00110000 */ + // 0x18, /* 00011000 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x18, /* 00011000 */ + // 0x30, /* 00110000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 42 0x2a '*' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x66, /* 01100110 */ + // 0x3c, /* 00111100 */ + // 0xff, /* 11111111 */ + // 0x3c, /* 00111100 */ + // 0x66, /* 01100110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 43 0x2b '+' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x7e, /* 01111110 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 44 0x2c ',' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x30, /* 00110000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 45 0x2d '-' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xfe, /* 11111110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 46 0x2e '.' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 47 0x2f '/' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x02, /* 00000010 */ + // 0x06, /* 00000110 */ + // 0x0c, /* 00001100 */ + // 0x18, /* 00011000 */ + // 0x30, /* 00110000 */ + // 0x60, /* 01100000 */ + // 0xc0, /* 11000000 */ + // 0x80, /* 10000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 48 0x30 '0' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x38, /* 00111000 */ + // 0x6c, /* 01101100 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xd6, /* 11010110 */ + // 0xd6, /* 11010110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x6c, /* 01101100 */ + // 0x38, /* 00111000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 49 0x31 '1' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x18, /* 00011000 */ + // 0x38, /* 00111000 */ + // 0x78, /* 01111000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x7e, /* 01111110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 50 0x32 '2' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x7c, /* 01111100 */ + // 0xc6, /* 11000110 */ + // 0x06, /* 00000110 */ + // 0x0c, /* 00001100 */ + // 0x18, /* 00011000 */ + // 0x30, /* 00110000 */ + // 0x60, /* 01100000 */ + // 0xc0, /* 11000000 */ + // 0xc6, /* 11000110 */ + // 0xfe, /* 11111110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 51 0x33 '3' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x7c, /* 01111100 */ + // 0xc6, /* 11000110 */ + // 0x06, /* 00000110 */ + // 0x06, /* 00000110 */ + // 0x3c, /* 00111100 */ + // 0x06, /* 00000110 */ + // 0x06, /* 00000110 */ + // 0x06, /* 00000110 */ + // 0xc6, /* 11000110 */ + // 0x7c, /* 01111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 52 0x34 '4' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x0c, /* 00001100 */ + // 0x1c, /* 00011100 */ + // 0x3c, /* 00111100 */ + // 0x6c, /* 01101100 */ + // 0xcc, /* 11001100 */ + // 0xfe, /* 11111110 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x1e, /* 00011110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 53 0x35 '5' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xfe, /* 11111110 */ + // 0xc0, /* 11000000 */ + // 0xc0, /* 11000000 */ + // 0xc0, /* 11000000 */ + // 0xfc, /* 11111100 */ + // 0x06, /* 00000110 */ + // 0x06, /* 00000110 */ + // 0x06, /* 00000110 */ + // 0xc6, /* 11000110 */ + // 0x7c, /* 01111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 54 0x36 '6' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x38, /* 00111000 */ + // 0x60, /* 01100000 */ + // 0xc0, /* 11000000 */ + // 0xc0, /* 11000000 */ + // 0xfc, /* 11111100 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x7c, /* 01111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 55 0x37 '7' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xfe, /* 11111110 */ + // 0xc6, /* 11000110 */ + // 0x06, /* 00000110 */ + // 0x06, /* 00000110 */ + // 0x0c, /* 00001100 */ + // 0x18, /* 00011000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 56 0x38 '8' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x7c, /* 01111100 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x7c, /* 01111100 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x7c, /* 01111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 57 0x39 '9' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x7c, /* 01111100 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x7e, /* 01111110 */ + // 0x06, /* 00000110 */ + // 0x06, /* 00000110 */ + // 0x06, /* 00000110 */ + // 0x0c, /* 00001100 */ + // 0x78, /* 01111000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 58 0x3a ':' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 59 0x3b ';' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x30, /* 00110000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 60 0x3c '<' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x06, /* 00000110 */ + // 0x0c, /* 00001100 */ + // 0x18, /* 00011000 */ + // 0x30, /* 00110000 */ + // 0x60, /* 01100000 */ + // 0x30, /* 00110000 */ + // 0x18, /* 00011000 */ + // 0x0c, /* 00001100 */ + // 0x06, /* 00000110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 61 0x3d '=' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x7e, /* 01111110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x7e, /* 01111110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 62 0x3e '>' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x60, /* 01100000 */ + // 0x30, /* 00110000 */ + // 0x18, /* 00011000 */ + // 0x0c, /* 00001100 */ + // 0x06, /* 00000110 */ + // 0x0c, /* 00001100 */ + // 0x18, /* 00011000 */ + // 0x30, /* 00110000 */ + // 0x60, /* 01100000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 63 0x3f '?' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x7c, /* 01111100 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x0c, /* 00001100 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x00, /* 00000000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 64 0x40 '@' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x7c, /* 01111100 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xde, /* 11011110 */ + // 0xde, /* 11011110 */ + // 0xde, /* 11011110 */ + // 0xdc, /* 11011100 */ + // 0xc0, /* 11000000 */ + // 0x7c, /* 01111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 65 0x41 'A' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x10, /* 00010000 */ + // 0x38, /* 00111000 */ + // 0x6c, /* 01101100 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xfe, /* 11111110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 66 0x42 'B' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xfc, /* 11111100 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x7c, /* 01111100 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0xfc, /* 11111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 67 0x43 'C' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x3c, /* 00111100 */ + // 0x66, /* 01100110 */ + // 0xc2, /* 11000010 */ + // 0xc0, /* 11000000 */ + // 0xc0, /* 11000000 */ + // 0xc0, /* 11000000 */ + // 0xc0, /* 11000000 */ + // 0xc2, /* 11000010 */ + // 0x66, /* 01100110 */ + // 0x3c, /* 00111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 68 0x44 'D' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xf8, /* 11111000 */ + // 0x6c, /* 01101100 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x6c, /* 01101100 */ + // 0xf8, /* 11111000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 69 0x45 'E' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xfe, /* 11111110 */ + // 0x66, /* 01100110 */ + // 0x62, /* 01100010 */ + // 0x68, /* 01101000 */ + // 0x78, /* 01111000 */ + // 0x68, /* 01101000 */ + // 0x60, /* 01100000 */ + // 0x62, /* 01100010 */ + // 0x66, /* 01100110 */ + // 0xfe, /* 11111110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 70 0x46 'F' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xfe, /* 11111110 */ + // 0x66, /* 01100110 */ + // 0x62, /* 01100010 */ + // 0x68, /* 01101000 */ + // 0x78, /* 01111000 */ + // 0x68, /* 01101000 */ + // 0x60, /* 01100000 */ + // 0x60, /* 01100000 */ + // 0x60, /* 01100000 */ + // 0xf0, /* 11110000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 71 0x47 'G' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x3c, /* 00111100 */ + // 0x66, /* 01100110 */ + // 0xc2, /* 11000010 */ + // 0xc0, /* 11000000 */ + // 0xc0, /* 11000000 */ + // 0xde, /* 11011110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x66, /* 01100110 */ + // 0x3a, /* 00111010 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 72 0x48 'H' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xfe, /* 11111110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 73 0x49 'I' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x3c, /* 00111100 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x3c, /* 00111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 74 0x4a 'J' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x1e, /* 00011110 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0x78, /* 01111000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 75 0x4b 'K' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xe6, /* 11100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x6c, /* 01101100 */ + // 0x78, /* 01111000 */ + // 0x78, /* 01111000 */ + // 0x6c, /* 01101100 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0xe6, /* 11100110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 76 0x4c 'L' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xf0, /* 11110000 */ + // 0x60, /* 01100000 */ + // 0x60, /* 01100000 */ + // 0x60, /* 01100000 */ + // 0x60, /* 01100000 */ + // 0x60, /* 01100000 */ + // 0x60, /* 01100000 */ + // 0x62, /* 01100010 */ + // 0x66, /* 01100110 */ + // 0xfe, /* 11111110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 77 0x4d 'M' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xc6, /* 11000110 */ + // 0xee, /* 11101110 */ + // 0xfe, /* 11111110 */ + // 0xfe, /* 11111110 */ + // 0xd6, /* 11010110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 78 0x4e 'N' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xc6, /* 11000110 */ + // 0xe6, /* 11100110 */ + // 0xf6, /* 11110110 */ + // 0xfe, /* 11111110 */ + // 0xde, /* 11011110 */ + // 0xce, /* 11001110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 79 0x4f 'O' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x7c, /* 01111100 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x7c, /* 01111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 80 0x50 'P' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xfc, /* 11111100 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x7c, /* 01111100 */ + // 0x60, /* 01100000 */ + // 0x60, /* 01100000 */ + // 0x60, /* 01100000 */ + // 0x60, /* 01100000 */ + // 0xf0, /* 11110000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 81 0x51 'Q' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x7c, /* 01111100 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xd6, /* 11010110 */ + // 0xde, /* 11011110 */ + // 0x7c, /* 01111100 */ + // 0x0c, /* 00001100 */ + // 0x0e, /* 00001110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 82 0x52 'R' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xfc, /* 11111100 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x7c, /* 01111100 */ + // 0x6c, /* 01101100 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0xe6, /* 11100110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 83 0x53 'S' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x7c, /* 01111100 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x60, /* 01100000 */ + // 0x38, /* 00111000 */ + // 0x0c, /* 00001100 */ + // 0x06, /* 00000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x7c, /* 01111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 84 0x54 'T' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x7e, /* 01111110 */ + // 0x7e, /* 01111110 */ + // 0x5a, /* 01011010 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x3c, /* 00111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 85 0x55 'U' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x7c, /* 01111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 86 0x56 'V' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x6c, /* 01101100 */ + // 0x38, /* 00111000 */ + // 0x10, /* 00010000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 87 0x57 'W' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xd6, /* 11010110 */ + // 0xd6, /* 11010110 */ + // 0xd6, /* 11010110 */ + // 0xfe, /* 11111110 */ + // 0xee, /* 11101110 */ + // 0x6c, /* 01101100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 88 0x58 'X' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x6c, /* 01101100 */ + // 0x7c, /* 01111100 */ + // 0x38, /* 00111000 */ + // 0x38, /* 00111000 */ + // 0x7c, /* 01111100 */ + // 0x6c, /* 01101100 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 89 0x59 'Y' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x3c, /* 00111100 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x3c, /* 00111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 90 0x5a 'Z' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xfe, /* 11111110 */ + // 0xc6, /* 11000110 */ + // 0x86, /* 10000110 */ + // 0x0c, /* 00001100 */ + // 0x18, /* 00011000 */ + // 0x30, /* 00110000 */ + // 0x60, /* 01100000 */ + // 0xc2, /* 11000010 */ + // 0xc6, /* 11000110 */ + // 0xfe, /* 11111110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 91 0x5b '[' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x3c, /* 00111100 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x3c, /* 00111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 92 0x5c '\' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x80, /* 10000000 */ + // 0xc0, /* 11000000 */ + // 0xe0, /* 11100000 */ + // 0x70, /* 01110000 */ + // 0x38, /* 00111000 */ + // 0x1c, /* 00011100 */ + // 0x0e, /* 00001110 */ + // 0x06, /* 00000110 */ + // 0x02, /* 00000010 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 93 0x5d ']' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x3c, /* 00111100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x3c, /* 00111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 94 0x5e '^' */ + // 0x10, /* 00010000 */ + // 0x38, /* 00111000 */ + // 0x6c, /* 01101100 */ + // 0xc6, /* 11000110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 95 0x5f '_' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xff, /* 11111111 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 96 0x60 '`' */ + // 0x00, /* 00000000 */ + // 0x30, /* 00110000 */ + // 0x18, /* 00011000 */ + // 0x0c, /* 00001100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 97 0x61 'a' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x78, /* 01111000 */ + // 0x0c, /* 00001100 */ + // 0x7c, /* 01111100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0x76, /* 01110110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 98 0x62 'b' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xe0, /* 11100000 */ + // 0x60, /* 01100000 */ + // 0x60, /* 01100000 */ + // 0x78, /* 01111000 */ + // 0x6c, /* 01101100 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x7c, /* 01111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 99 0x63 'c' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x7c, /* 01111100 */ + // 0xc6, /* 11000110 */ + // 0xc0, /* 11000000 */ + // 0xc0, /* 11000000 */ + // 0xc0, /* 11000000 */ + // 0xc6, /* 11000110 */ + // 0x7c, /* 01111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 100 0x64 'd' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x1c, /* 00011100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x3c, /* 00111100 */ + // 0x6c, /* 01101100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0x76, /* 01110110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 101 0x65 'e' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x7c, /* 01111100 */ + // 0xc6, /* 11000110 */ + // 0xfe, /* 11111110 */ + // 0xc0, /* 11000000 */ + // 0xc0, /* 11000000 */ + // 0xc6, /* 11000110 */ + // 0x7c, /* 01111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 102 0x66 'f' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x1c, /* 00011100 */ + // 0x36, /* 00110110 */ + // 0x32, /* 00110010 */ + // 0x30, /* 00110000 */ + // 0x78, /* 01111000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x78, /* 01111000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 103 0x67 'g' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x76, /* 01110110 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0x7c, /* 01111100 */ + // 0x0c, /* 00001100 */ + // 0xcc, /* 11001100 */ + // 0x78, /* 01111000 */ + // 0x00, /* 00000000 */ + + // /* 104 0x68 'h' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xe0, /* 11100000 */ + // 0x60, /* 01100000 */ + // 0x60, /* 01100000 */ + // 0x6c, /* 01101100 */ + // 0x76, /* 01110110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0xe6, /* 11100110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 105 0x69 'i' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x00, /* 00000000 */ + // 0x38, /* 00111000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x3c, /* 00111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 106 0x6a 'j' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x06, /* 00000110 */ + // 0x06, /* 00000110 */ + // 0x00, /* 00000000 */ + // 0x0e, /* 00001110 */ + // 0x06, /* 00000110 */ + // 0x06, /* 00000110 */ + // 0x06, /* 00000110 */ + // 0x06, /* 00000110 */ + // 0x06, /* 00000110 */ + // 0x06, /* 00000110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x3c, /* 00111100 */ + // 0x00, /* 00000000 */ + + // /* 107 0x6b 'k' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xe0, /* 11100000 */ + // 0x60, /* 01100000 */ + // 0x60, /* 01100000 */ + // 0x66, /* 01100110 */ + // 0x6c, /* 01101100 */ + // 0x78, /* 01111000 */ + // 0x78, /* 01111000 */ + // 0x6c, /* 01101100 */ + // 0x66, /* 01100110 */ + // 0xe6, /* 11100110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 108 0x6c 'l' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x38, /* 00111000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x3c, /* 00111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 109 0x6d 'm' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xec, /* 11101100 */ + // 0xfe, /* 11111110 */ + // 0xd6, /* 11010110 */ + // 0xd6, /* 11010110 */ + // 0xd6, /* 11010110 */ + // 0xd6, /* 11010110 */ + // 0xc6, /* 11000110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 110 0x6e 'n' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xdc, /* 11011100 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 111 0x6f 'o' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x7c, /* 01111100 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x7c, /* 01111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 112 0x70 'p' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xdc, /* 11011100 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x66, /* 01100110 */ + // 0x7c, /* 01111100 */ + // 0x60, /* 01100000 */ + // 0x60, /* 01100000 */ + // 0xf0, /* 11110000 */ + // 0x00, /* 00000000 */ + + // /* 113 0x71 'q' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x76, /* 01110110 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0x7c, /* 01111100 */ + // 0x0c, /* 00001100 */ + // 0x0c, /* 00001100 */ + // 0x1e, /* 00011110 */ + // 0x00, /* 00000000 */ + + // /* 114 0x72 'r' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xdc, /* 11011100 */ + // 0x76, /* 01110110 */ + // 0x66, /* 01100110 */ + // 0x60, /* 01100000 */ + // 0x60, /* 01100000 */ + // 0x60, /* 01100000 */ + // 0xf0, /* 11110000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 115 0x73 's' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x7c, /* 01111100 */ + // 0xc6, /* 11000110 */ + // 0x60, /* 01100000 */ + // 0x38, /* 00111000 */ + // 0x0c, /* 00001100 */ + // 0xc6, /* 11000110 */ + // 0x7c, /* 01111100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 116 0x74 't' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x10, /* 00010000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0xfc, /* 11111100 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x30, /* 00110000 */ + // 0x36, /* 00110110 */ + // 0x1c, /* 00011100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 117 0x75 'u' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0xcc, /* 11001100 */ + // 0x76, /* 01110110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 118 0x76 'v' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x6c, /* 01101100 */ + // 0x38, /* 00111000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 119 0x77 'w' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xd6, /* 11010110 */ + // 0xd6, /* 11010110 */ + // 0xd6, /* 11010110 */ + // 0xfe, /* 11111110 */ + // 0x6c, /* 01101100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 120 0x78 'x' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xc6, /* 11000110 */ + // 0x6c, /* 01101100 */ + // 0x38, /* 00111000 */ + // 0x38, /* 00111000 */ + // 0x38, /* 00111000 */ + // 0x6c, /* 01101100 */ + // 0xc6, /* 11000110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 121 0x79 'y' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0xc6, /* 11000110 */ + // 0x7e, /* 01111110 */ + // 0x06, /* 00000110 */ + // 0x0c, /* 00001100 */ + // 0xf8, /* 11111000 */ + // 0x00, /* 00000000 */ + + // /* 122 0x7a 'z' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0xfe, /* 11111110 */ + // 0xcc, /* 11001100 */ + // 0x18, /* 00011000 */ + // 0x30, /* 00110000 */ + // 0x60, /* 01100000 */ + // 0xc6, /* 11000110 */ + // 0xfe, /* 11111110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 123 0x7b '{' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x0e, /* 00001110 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x70, /* 01110000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x0e, /* 00001110 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 124 0x7c '|' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 125 0x7d '}' */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x70, /* 01110000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x0e, /* 00001110 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x18, /* 00011000 */ + // 0x70, /* 01110000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + // /* 126 0x7e '~' */ + // 0x00, /* 00000000 */ + // 0x76, /* 01110110 */ + // 0xdc, /* 11011100 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + // 0x00, /* 00000000 */ + + /* 1 0x01 '!' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 2 0x02 '"' */ + 0x00, /* 00000000 */ + 0x12, /* 00010010 */ + 0x24, /* 00100100 */ + 0x24, /* 00100100 */ + 0x48, /* 01001000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 3 0x03 '#' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x12, /* 00010010 */ + 0x12, /* 00010010 */ + 0x12, /* 00010010 */ + 0x7E, /* 01111110 */ + 0x24, /* 00100100 */ + 0x24, /* 00100100 */ + 0x24, /* 00100100 */ + 0x7E, /* 01111110 */ + 0x24, /* 00100100 */ + 0x24, /* 00100100 */ + 0x24, /* 00100100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 4 0x04 '$' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x08, /* 00001000 */ + 0x3C, /* 00111100 */ + 0x4A, /* 01001010 */ + 0x4A, /* 01001010 */ + 0x48, /* 01001000 */ + 0x38, /* 00111000 */ + 0x0C, /* 00001100 */ + 0x0A, /* 00001010 */ + 0x0A, /* 00001010 */ + 0x4A, /* 01001010 */ + 0x4A, /* 01001010 */ + 0x3C, /* 00111100 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + + /* 5 0x05 '%' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x44, /* 01000100 */ + 0xA4, /* 10100100 */ + 0xA8, /* 10101000 */ + 0xA8, /* 10101000 */ + 0xB0, /* 10110000 */ + 0x54, /* 01010100 */ + 0x1A, /* 00011010 */ + 0x2A, /* 00101010 */ + 0x2A, /* 00101010 */ + 0x4A, /* 01001010 */ + 0x44, /* 01000100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 6 0x06 '&' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x30, /* 00110000 */ + 0x48, /* 01001000 */ + 0x48, /* 01001000 */ + 0x48, /* 01001000 */ + 0x50, /* 01010000 */ + 0x6E, /* 01101110 */ + 0xA4, /* 10100100 */ + 0x94, /* 10010100 */ + 0x98, /* 10011000 */ + 0x89, /* 10001001 */ + 0x76, /* 01110110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 7 0x07 ''' */ + 0x00, /* 00000000 */ + 0x60, /* 01100000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0x40, /* 01000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 8 0x08 '(' */ + 0x00, /* 00000000 */ + 0x02, /* 00000010 */ + 0x04, /* 00000100 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x04, /* 00000100 */ + 0x02, /* 00000010 */ + 0x00, /* 00000000 */ + + /* 9 0x09 ')' */ + 0x00, /* 00000000 */ + 0x40, /* 01000000 */ + 0x20, /* 00100000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x20, /* 00100000 */ + 0x40, /* 01000000 */ + 0x00, /* 00000000 */ + + /* 10 0x0A '*' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0xD6, /* 11010110 */ + 0x38, /* 00111000 */ + 0x38, /* 00111000 */ + 0xD6, /* 11010110 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 11 0x0B '+' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x7F, /* 01111111 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 12 0x0C ',' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x60, /* 01100000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0x40, /* 01000000 */ + + /* 13 0x0D '-' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x7E, /* 01111110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 14 0x0E '.' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x60, /* 01100000 */ + 0x60, /* 01100000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 15 0x0F '/' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x02, /* 00000010 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x00, /* 00000000 */ + + /* 16 0x10 '0' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x18, /* 00011000 */ + 0x24, /* 00100100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x24, /* 00100100 */ + 0x18, /* 00011000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 17 0x11 '1' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x08, /* 00001000 */ + 0x38, /* 00111000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x3E, /* 00111110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 18 0x12 '2' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x3C, /* 00111100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x02, /* 00000010 */ + 0x04, /* 00000100 */ + 0x08, /* 00001000 */ + 0x10, /* 00010000 */ + 0x20, /* 00100000 */ + 0x42, /* 01000010 */ + 0x7E, /* 01111110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 19 0x13 '3' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x3C, /* 00111100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x02, /* 00000010 */ + 0x04, /* 00000100 */ + 0x18, /* 00011000 */ + 0x04, /* 00000100 */ + 0x02, /* 00000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x3C, /* 00111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 20 0x14 '4' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x04, /* 00000100 */ + 0x0C, /* 00001100 */ + 0x0C, /* 00001100 */ + 0x14, /* 00010100 */ + 0x24, /* 00100100 */ + 0x24, /* 00100100 */ + 0x44, /* 01000100 */ + 0x7F, /* 01111111 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x1F, /* 00011111 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 21 0x15 '5' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x7E, /* 01111110 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x78, /* 01111000 */ + 0x44, /* 01000100 */ + 0x02, /* 00000010 */ + 0x02, /* 00000010 */ + 0x42, /* 01000010 */ + 0x44, /* 01000100 */ + 0x38, /* 00111000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 22 0x16 '6' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x18, /* 00011000 */ + 0x24, /* 00100100 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x5C, /* 01011100 */ + 0x62, /* 01100010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x22, /* 00100010 */ + 0x1C, /* 00011100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 23 0x17 '7' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x7E, /* 01111110 */ + 0x42, /* 01000010 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 24 0x18 '8' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x3C, /* 00111100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x24, /* 00100100 */ + 0x18, /* 00011000 */ + 0x24, /* 00100100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x3C, /* 00111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 25 0x19 '9' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x38, /* 00111000 */ + 0x44, /* 01000100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x46, /* 01000110 */ + 0x3A, /* 00111010 */ + 0x02, /* 00000010 */ + 0x02, /* 00000010 */ + 0x24, /* 00100100 */ + 0x18, /* 00011000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 26 0x1A ':' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 27 0x1B ';' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x10, /* 00010000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + + /* 28 0x1C '<' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x02, /* 00000010 */ + 0x04, /* 00000100 */ + 0x08, /* 00001000 */ + 0x10, /* 00010000 */ + 0x20, /* 00100000 */ + 0x40, /* 01000000 */ + 0x20, /* 00100000 */ + 0x10, /* 00010000 */ + 0x08, /* 00001000 */ + 0x04, /* 00000100 */ + 0x02, /* 00000010 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 29 0x1D '=' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x7E, /* 01111110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x7E, /* 01111110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 30 0x1E '>' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x40, /* 01000000 */ + 0x20, /* 00100000 */ + 0x10, /* 00010000 */ + 0x08, /* 00001000 */ + 0x04, /* 00000100 */ + 0x02, /* 00000010 */ + 0x04, /* 00000100 */ + 0x08, /* 00001000 */ + 0x10, /* 00010000 */ + 0x20, /* 00100000 */ + 0x40, /* 01000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 31 0x1F '?' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x3C, /* 00111100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x62, /* 01100010 */ + 0x04, /* 00000100 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x00, /* 00000000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 32 0x20 '@' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x38, /* 00111000 */ + 0x44, /* 01000100 */ + 0x5A, /* 01011010 */ + 0xAA, /* 10101010 */ + 0xAA, /* 10101010 */ + 0xAA, /* 10101010 */ + 0xAA, /* 10101010 */ + 0xAA, /* 10101010 */ + 0x5C, /* 01011100 */ + 0x42, /* 01000010 */ + 0x3C, /* 00111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 33 0x21 'A' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x18, /* 00011000 */ + 0x28, /* 00101000 */ + 0x28, /* 00101000 */ + 0x24, /* 00100100 */ + 0x3C, /* 00111100 */ + 0x44, /* 01000100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0xE7, /* 11100111 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 34 0x22 'B' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xF8, /* 11111000 */ + 0x44, /* 01000100 */ + 0x44, /* 01000100 */ + 0x44, /* 01000100 */ + 0x78, /* 01111000 */ + 0x44, /* 01000100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x44, /* 01000100 */ + 0xF8, /* 11111000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 35 0x23 'C' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x3E, /* 00111110 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x80, /* 10000000 */ + 0x80, /* 10000000 */ + 0x80, /* 10000000 */ + 0x80, /* 10000000 */ + 0x80, /* 10000000 */ + 0x42, /* 01000010 */ + 0x44, /* 01000100 */ + 0x38, /* 00111000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 36 0x24 'D' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xF8, /* 11111000 */ + 0x44, /* 01000100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x44, /* 01000100 */ + 0xF8, /* 11111000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 37 0x25 'E' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xFC, /* 11111100 */ + 0x42, /* 01000010 */ + 0x48, /* 01001000 */ + 0x48, /* 01001000 */ + 0x78, /* 01111000 */ + 0x48, /* 01001000 */ + 0x48, /* 01001000 */ + 0x40, /* 01000000 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0xFC, /* 11111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 38 0x26 'F' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xFC, /* 11111100 */ + 0x42, /* 01000010 */ + 0x48, /* 01001000 */ + 0x48, /* 01001000 */ + 0x78, /* 01111000 */ + 0x48, /* 01001000 */ + 0x48, /* 01001000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0xE0, /* 11100000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 39 0x27 'G' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x3C, /* 00111100 */ + 0x44, /* 01000100 */ + 0x44, /* 01000100 */ + 0x80, /* 10000000 */ + 0x80, /* 10000000 */ + 0x80, /* 10000000 */ + 0x8E, /* 10001110 */ + 0x84, /* 10000100 */ + 0x44, /* 01000100 */ + 0x44, /* 01000100 */ + 0x38, /* 00111000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 40 0x28 'H' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xE7, /* 11100111 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x7E, /* 01111110 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0xE7, /* 11100111 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 41 0x29 'I' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x7C, /* 01111100 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x7C, /* 01111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 42 0x2A 'J' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x3E, /* 00111110 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x88, /* 10001000 */ + 0xF0, /* 11110000 */ + + /* 43 0x2B 'K' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xEE, /* 11101110 */ + 0x44, /* 01000100 */ + 0x48, /* 01001000 */ + 0x50, /* 01010000 */ + 0x70, /* 01110000 */ + 0x50, /* 01010000 */ + 0x48, /* 01001000 */ + 0x48, /* 01001000 */ + 0x44, /* 01000100 */ + 0x44, /* 01000100 */ + 0xEE, /* 11101110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 44 0x2C 'L' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xE0, /* 11100000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x42, /* 01000010 */ + 0xFE, /* 11111110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 45 0x2D 'M' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xEE, /* 11101110 */ + 0x6C, /* 01101100 */ + 0x6C, /* 01101100 */ + 0x6C, /* 01101100 */ + 0x6C, /* 01101100 */ + 0x6C, /* 01101100 */ + 0x54, /* 01010100 */ + 0x54, /* 01010100 */ + 0x54, /* 01010100 */ + 0x54, /* 01010100 */ + 0xD6, /* 11010110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 46 0x2E 'N' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xC7, /* 11000111 */ + 0x62, /* 01100010 */ + 0x62, /* 01100010 */ + 0x52, /* 01010010 */ + 0x52, /* 01010010 */ + 0x4A, /* 01001010 */ + 0x4A, /* 01001010 */ + 0x4A, /* 01001010 */ + 0x46, /* 01000110 */ + 0x46, /* 01000110 */ + 0xE2, /* 11100010 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 47 0x2F 'O' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x38, /* 00111000 */ + 0x44, /* 01000100 */ + 0x82, /* 10000010 */ + 0x82, /* 10000010 */ + 0x82, /* 10000010 */ + 0x82, /* 10000010 */ + 0x82, /* 10000010 */ + 0x82, /* 10000010 */ + 0x82, /* 10000010 */ + 0x44, /* 01000100 */ + 0x38, /* 00111000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 48 0x30 'P' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xFC, /* 11111100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x7C, /* 01111100 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0xE0, /* 11100000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 49 0x31 'Q' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x38, /* 00111000 */ + 0x44, /* 01000100 */ + 0x82, /* 10000010 */ + 0x82, /* 10000010 */ + 0x82, /* 10000010 */ + 0x82, /* 10000010 */ + 0x82, /* 10000010 */ + 0x82, /* 10000010 */ + 0xB2, /* 10110010 */ + 0x4C, /* 01001100 */ + 0x38, /* 00111000 */ + 0x06, /* 00000110 */ + 0x00, /* 00000000 */ + + /* 50 0x32 'R' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xFC, /* 11111100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x7C, /* 01111100 */ + 0x48, /* 01001000 */ + 0x48, /* 01001000 */ + 0x44, /* 01000100 */ + 0x44, /* 01000100 */ + 0x42, /* 01000010 */ + 0xE3, /* 11100011 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 51 0x33 'S' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x3E, /* 00111110 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x40, /* 01000000 */ + 0x20, /* 00100000 */ + 0x18, /* 00011000 */ + 0x04, /* 00000100 */ + 0x02, /* 00000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x7C, /* 01111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 52 0x34 'T' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xFE, /* 11111110 */ + 0x92, /* 10010010 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x38, /* 00111000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 53 0x35 'U' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xE7, /* 11100111 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x3C, /* 00111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 54 0x36 'V' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xE7, /* 11100111 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x44, /* 01000100 */ + 0x24, /* 00100100 */ + 0x24, /* 00100100 */ + 0x28, /* 00101000 */ + 0x28, /* 00101000 */ + 0x18, /* 00011000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 55 0x37 'W' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xD6, /* 11010110 */ + 0x54, /* 01010100 */ + 0x54, /* 01010100 */ + 0x54, /* 01010100 */ + 0x54, /* 01010100 */ + 0x54, /* 01010100 */ + 0x6C, /* 01101100 */ + 0x28, /* 00101000 */ + 0x28, /* 00101000 */ + 0x28, /* 00101000 */ + 0x28, /* 00101000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 56 0x38 'X' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xE7, /* 11100111 */ + 0x42, /* 01000010 */ + 0x24, /* 00100100 */ + 0x24, /* 00100100 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x24, /* 00100100 */ + 0x24, /* 00100100 */ + 0x42, /* 01000010 */ + 0xE7, /* 11100111 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 57 0x39 'Y' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xEE, /* 11101110 */ + 0x44, /* 01000100 */ + 0x44, /* 01000100 */ + 0x28, /* 00101000 */ + 0x28, /* 00101000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x38, /* 00111000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 58 0x3A 'Z' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x7E, /* 01111110 */ + 0x84, /* 10000100 */ + 0x04, /* 00000100 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x10, /* 00010000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0xFC, /* 11111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 59 0x3B '[' */ + 0x00, /* 00000000 */ + 0x1E, /* 00011110 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x1E, /* 00011110 */ + 0x00, /* 00000000 */ + + /* 60 0x3C '\' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x40, /* 01000000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x02, /* 00000010 */ + 0x02, /* 00000010 */ + + /* 61 0x3D ']' */ + 0x00, /* 00000000 */ + 0x78, /* 01111000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x78, /* 01111000 */ + 0x00, /* 00000000 */ + + /* 62 0x3E '^' */ + 0x00, /* 00000000 */ + 0x18, /* 00011000 */ + 0x24, /* 00100100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 63 0x3F '_' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xFF, /* 11111111 */ + + /* 64 0x40 '`' */ + 0x00, /* 00000000 */ + 0x60, /* 01100000 */ + 0x10, /* 00010000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 65 0x41 'a' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x38, /* 00111000 */ + 0x44, /* 01000100 */ + 0x0C, /* 00001100 */ + 0x34, /* 00110100 */ + 0x44, /* 01000100 */ + 0x4C, /* 01001100 */ + 0x36, /* 00110110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 66 0x42 'b' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xC0, /* 11000000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x58, /* 01011000 */ + 0x64, /* 01100100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x64, /* 01100100 */ + 0x58, /* 01011000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 67 0x43 'c' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x1C, /* 00011100 */ + 0x22, /* 00100010 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x22, /* 00100010 */ + 0x1C, /* 00011100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 68 0x44 'd' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x06, /* 00000110 */ + 0x02, /* 00000010 */ + 0x02, /* 00000010 */ + 0x3E, /* 00111110 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x46, /* 01000110 */ + 0x3B, /* 00111011 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 69 0x45 'e' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x3C, /* 00111100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x7E, /* 01111110 */ + 0x40, /* 01000000 */ + 0x42, /* 01000010 */ + 0x3C, /* 00111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 70 0x46 'f' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x0C, /* 00001100 */ + 0x12, /* 00010010 */ + 0x10, /* 00010000 */ + 0x7C, /* 01111100 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x7C, /* 01111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 71 0x47 'g' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x3E, /* 00111110 */ + 0x44, /* 01000100 */ + 0x44, /* 01000100 */ + 0x38, /* 00111000 */ + 0x40, /* 01000000 */ + 0x3C, /* 00111100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x3C, /* 00111100 */ + + /* 72 0x48 'h' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xC0, /* 11000000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x5C, /* 01011100 */ + 0x62, /* 01100010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0xE7, /* 11100111 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 73 0x49 'i' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x30, /* 00110000 */ + 0x30, /* 00110000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x70, /* 01110000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x7C, /* 01111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 74 0x4A 'j' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x0C, /* 00001100 */ + 0x0C, /* 00001100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x1C, /* 00011100 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x44, /* 01000100 */ + 0x78, /* 01111000 */ + + /* 75 0x4B 'k' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xC0, /* 11000000 */ + 0x40, /* 01000000 */ + 0x40, /* 01000000 */ + 0x4E, /* 01001110 */ + 0x48, /* 01001000 */ + 0x50, /* 01010000 */ + 0x70, /* 01110000 */ + 0x48, /* 01001000 */ + 0x44, /* 01000100 */ + 0xEE, /* 11101110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 76 0x4C 'l' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x10, /* 00010000 */ + 0x70, /* 01110000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x7C, /* 01111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 77 0x4D 'm' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xFE, /* 11111110 */ + 0x49, /* 01001001 */ + 0x49, /* 01001001 */ + 0x49, /* 01001001 */ + 0x49, /* 01001001 */ + 0x49, /* 01001001 */ + 0xED, /* 11101101 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 78 0x4E 'n' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xDC, /* 11011100 */ + 0x62, /* 01100010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0xE7, /* 11100111 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 79 0x4F 'o' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x3C, /* 00111100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x3C, /* 00111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 80 0x50 'p' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xD8, /* 11011000 */ + 0x64, /* 01100100 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x64, /* 01100100 */ + 0x58, /* 01011000 */ + 0x40, /* 01000000 */ + 0xE0, /* 11100000 */ + + /* 81 0x51 'q' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x1A, /* 00011010 */ + 0x26, /* 00100110 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x26, /* 00100110 */ + 0x1A, /* 00011010 */ + 0x02, /* 00000010 */ + 0x07, /* 00000111 */ + + /* 82 0x52 'r' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xEE, /* 11101110 */ + 0x32, /* 00110010 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0xF8, /* 11111000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 83 0x53 's' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x3E, /* 00111110 */ + 0x42, /* 01000010 */ + 0x40, /* 01000000 */ + 0x3C, /* 00111100 */ + 0x02, /* 00000010 */ + 0x42, /* 01000010 */ + 0x7C, /* 01111100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 84 0x54 't' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x7C, /* 01111100 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x12, /* 00010010 */ + 0x0C, /* 00001100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 85 0x55 'u' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xC6, /* 11000110 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x42, /* 01000010 */ + 0x46, /* 01000110 */ + 0x3B, /* 00111011 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 86 0x56 'v' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xEE, /* 11101110 */ + 0x44, /* 01000100 */ + 0x44, /* 01000100 */ + 0x28, /* 00101000 */ + 0x28, /* 00101000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 87 0x57 'w' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xDB, /* 11011011 */ + 0x89, /* 10001001 */ + 0x4A, /* 01001010 */ + 0x5A, /* 01011010 */ + 0x54, /* 01010100 */ + 0x24, /* 00100100 */ + 0x24, /* 00100100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 88 0x58 'x' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x76, /* 01110110 */ + 0x24, /* 00100100 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x24, /* 00100100 */ + 0x6E, /* 01101110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 89 0x59 'y' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0xE7, /* 11100111 */ + 0x42, /* 01000010 */ + 0x24, /* 00100100 */ + 0x24, /* 00100100 */ + 0x18, /* 00011000 */ + 0x18, /* 00011000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x60, /* 01100000 */ + + /* 90 0x5A 'z' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x7E, /* 01111110 */ + 0x44, /* 01000100 */ + 0x08, /* 00001000 */ + 0x10, /* 00010000 */ + 0x10, /* 00010000 */ + 0x22, /* 00100010 */ + 0x7E, /* 01111110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 91 0x5B '{' */ + 0x00, /* 00000000 */ + 0x03, /* 00000011 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x08, /* 00001000 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x04, /* 00000100 */ + 0x03, /* 00000011 */ + 0x00, /* 00000000 */ + + /* 92 0x5C '|' */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + 0x08, /* 00001000 */ + + /* 93 0x5D '}' */ + 0x00, /* 00000000 */ + 0xC0, /* 11000000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0x10, /* 00010000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0x20, /* 00100000 */ + 0xC0, /* 11000000 */ + 0x00, /* 00000000 */ + + /* 94 0x5E '~' */ + 0x20, /* 00100000 */ + 0x5A, /* 01011010 */ + 0x04, /* 00000100 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + + /* 127 0x7f '' */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x10, /* 00010000 */ + 0x38, /* 00111000 */ + 0x6c, /* 01101100 */ + 0xc6, /* 11000110 */ + 0xc6, /* 11000110 */ + 0xc6, /* 11000110 */ + 0xfe, /* 11111110 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + 0x00, /* 00000000 */ + +}; + +const unsigned char image[] = { + 100,42,8,19, + 100,41,11,17, + 100,40,12,17, + 100,40,12,17, + 100,40,12,17, + 100,40,12,17, + 100,40,12,17, + 100,40,12,17, + 100,40,12,17, + 100,40,12,17, + 100,40,12,17, + 100,40,12,17, + 100,40,12,17, + 100,16,52,1, + 100,14,54,1, + 100,12,57, + 100,10,59, + 100,9,60, + 100,8,61, + 100,7,62, + 100,6,63, + 100,6,63, + 100,5,64, + 100,4,64,1, + 100,4,64,1, + 100,3,16,21,12,17, + 100,3,15,22,12,17, + 100,2,15,23,12,17, + 100,2,13,25,12,17, + 100,2,13,25,12,17, + 100,1,13,26,12,17, + 100,1,13,26,12,17, + 100,1,12,27,12,17, + 100,1,12,9,9,9,12,17, + 100,1,12,8,12,7,12,17, + 100,1,12,8,12,7,12,17, + 100,1,11,9,12,7,12,17, + 100,1,11,9,12,7,12,17, + 101,12,9,12,7,12,17, + 100,1,11,9,12,7,12,17, + 100,1,11,9,12,7,12,17, + 100,1,12,8,12,7,12,17, + 100,1,12,8,12,7,12,17, + 100,1,12,8,12,7,12,17, + 100,1,12,8,12,7,12,17, + 100,1,13,7,12,7,12,17, + 100,1,13,7,12,7,12,17, + 100,2,12,7,12,7,12,17, + 100,2,13,6,12,7,12,17, + 100,2,14,5,12,7,12,17, + 100,3,14,4,12,7,12,17, + 100,3,15,3,12,7,12,17, + 100,3,30,7,13,16, + 100,4,29,7,14,15, + 100,5,28,7,15,14, + 100,5,28,7,20,9, + 100,6,27,7,22,7, + 100,7,26,7,22,7, + 100,8,25,7,21,8, + 100,9,24,7,20,9, + 100,10,23,7,18,11, + 100,11,22,7,17,12, + 100,13,20,7,15,14, + 100,15,18,7,14,15, + 100,21,10,11,10,17 +}; \ No newline at end of file diff --git a/src/platform/f133/drivers/framebuffer.c b/src/platform/f133/drivers/framebuffer.c new file mode 100644 index 0000000000000000000000000000000000000000..094ac014508dc99cf1019843ebd381c8348032f2 --- /dev/null +++ b/src/platform/f133/drivers/framebuffer.c @@ -0,0 +1,143 @@ +/** + * Copyright (c) 2018-2022, NXOS Development Team + * SPDX-License-Identifier: Apache-2.0 + * + * Contains: framebuffer driver + * + * Change Logs: + * Date Author Notes + * 2023-2-4 planck Init + */ +#define NX_LOG_NAME "framebuffer" +#define DRV_NAME "lcd framebuffer driver" +#define DRV_VERSION "0.1" + +#define DEV_NAME "fb0" + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +extern NX_U8 lcd_fb[LCD_WIDTH * LCD_HEIGHT * 4]; +NX_PRIVATE NX_FramebufferInfo fb0Info; + + + +NX_PRIVATE NX_Error LCD_Control(struct NX_Device *device, NX_U32 cmd, void *arg) +{ + NX_FramebufferInfo *info; + NX_FramebufferInfo *fbInfo; + + fbInfo = device->extension; + NX_ASSERT(fbInfo); + switch (cmd) + { + case NX_FRAMEBUFFER_CMD_GETINFO: + info = (NX_FramebufferInfo *)arg; + if (info) + { + info->bitsPerPixel = fbInfo->bitsPerPixel; + info->bytesPerScanLine = fbInfo->bytesPerScanLine; + info->xResolution = fbInfo->xResolution; + info->yResolution = fbInfo->yResolution; + info->phyBasePtr = fbInfo->phyBasePtr; + NX_Printf("info -> phyBasePtr = %x\n", info->phyBasePtr); + NX_Printf("info -> xResolution = %d\n", info->xResolution); + NX_Printf("info -> yResolution = %d\n", info->yResolution); + NX_Printf("info -> bitsPerPixel = %d\n", info->bitsPerPixel); + } + + break; + default: + return NX_EINVAL; + } + + return NX_EOK; +} + +NX_PRIVATE NX_Error LCD_Mappable(struct NX_Device *device, NX_Size length, NX_U32 prot, NX_Addr *outPhyAddr) +{ + NX_FramebufferInfo *fbInfo; + + fbInfo = device->extension; + NX_ASSERT(fbInfo); + + if (!fbInfo->phyBasePtr) + { + return NX_ENORES; + } + + if (length > fbInfo->bytesPerScanLine * fbInfo->yResolution) + { + return NX_EPERM; + } + + *outPhyAddr = fbInfo->phyBasePtr; + + return NX_EOK; +} + +NX_PRIVATE NX_DriverOps FB_DriverOps = { + .control = LCD_Control, + .mappable = LCD_Mappable, +}; + + + +NX_PRIVATE void LCD_DriverInit(void) +{ + + NX_Device *device; + + fb0Info.bitsPerPixel = 32; + fb0Info.xResolution = 800; + fb0Info.yResolution = 480; + fb0Info.bytesPerScanLine = fb0Info.xResolution * fb0Info.bitsPerPixel / 8; + fb0Info.phyBasePtr = lcd_fb; + + NX_Driver *driver = NX_DriverCreate(DRV_NAME, NX_DEVICE_TYPE_SCREEN, 0, &FB_DriverOps); + if (driver == NX_NULL) + { + NX_LOG_E("create drive failed!"); + return; + } + + if (NX_DriverAttachDevice(driver, DEV_NAME, &device) != NX_EOK) + { + NX_LOG_E("attach device %s failed!", DEV_NAME); + NX_DriverDestroy(driver); + return; + } + + device->extension = &fb0Info; + + if (NX_DriverRegister(driver) != NX_EOK) + { + NX_LOG_E("register driver %s failed!", DRV_NAME); + NX_DriverDetachDevice(driver, DEV_NAME); + NX_DriverDestroy(driver); + return; + } + NX_LOG_E("register driver %s succeeded!", DRV_NAME); + // lcd_show_logo(); +} + +NX_PRIVATE void LCD_DriverExit(void) +{ + NX_DriverCleanup(DRV_NAME); +} + +NX_DRV_INIT(LCD_DriverInit); +NX_DRV_EXIT(LCD_DriverExit); + diff --git a/src/platform/f133/drivers/gpio.c b/src/platform/f133/drivers/gpio.c new file mode 100644 index 0000000000000000000000000000000000000000..3b82bc35a714325fa5cb5f833628dad9706906f5 --- /dev/null +++ b/src/platform/f133/drivers/gpio.c @@ -0,0 +1,423 @@ +/** + * Copyright (c) 2018-2022, NXOS Development Team + * SPDX-License-Identifier: Apache-2.0 + * + * Contains: GPIO driver + * + * Change Logs: + * Date Author Notes + * 2023-1-4 planck Init + */ + +#include + +#include +#include +#include +#include +#include +#include +#include + +// d1s have 6 group gpio +// 6 groups of ports (PB(6), PC(6), PD(23), PE(14), PF(7), PG(16)) +// PB2 - PB7 +// PC2 - PC7 +// PD0 - PD22 +// PE0 - PE13 +// PF0 - PF6 +// PG0 - PG15 + +#define DRV_NAME "gpio driver" +#define DEV_NAME "gpio" + +void d1_set_gpio_pull(NX_U32 gpio_port, NX_U32 gpio_pin, NX_U16 pull) +{ + NX_U32 pin_level = 0; + NX_U32 gpio_base_addr = 0; + NX_U32 val = 0; + pin_level = gpio_pin / 16; + gpio_base_addr = gpio_port + pin_level * 0x04 + 0xE4; + val = Read32(gpio_base_addr); + + val &= ~(0x3 << ((gpio_pin & 0xf) << 1)); + val |= ((pull & 0x3) << ((gpio_pin & 0x3) << 1)); + + Write32(gpio_base_addr, val); +} + +void d1_set_gpio_mode(NX_U32 gpio_port, NX_U32 gpio_pin, NX_U16 mode) +{ + NX_U32 pin_level = 0; + NX_U32 gpio_base_addr = 0; + NX_U32 val = 0; + pin_level = gpio_pin / 8; + gpio_base_addr = gpio_port + pin_level * 0x04; + + val = Read32(gpio_base_addr); + + val &= ~(0xf << ((gpio_pin & 0x7) << 2)); + val |= ((mode & 0xf) << ((gpio_pin & 0x7) << 2)); + + Write32(gpio_base_addr, val); +} + +void d1_set_gpio_val(NX_U32 gpio_port, NX_U32 gpio_pin, NX_U32 val) +{ + NX_U32 gpio_base_addr = 0; + NX_U32 cur_val = 0; + gpio_base_addr = gpio_port + 0x10; + cur_val = Read32(gpio_base_addr); + + if (val) + { + cur_val |= (1 << gpio_pin); + } + else + { + cur_val &= ~(1 << gpio_pin); + } + + Write32(gpio_base_addr, cur_val); +} + +NX_U8 d1_get_gpio_val(NX_U32 gpio_port, NX_U32 gpio_pin) +{ + NX_U32 gpio_base_addr = 0; + NX_U32 cur_val = 0; + gpio_base_addr = gpio_port + 0x10; + cur_val = Read32(gpio_base_addr); + NX_U8 ret = 0; + + if (cur_val & (1 << gpio_pin)) + { + ret = 1; + } + else + { + ret = 0; + } + + return ret; +} + +void d1_set_gpio_irq_enable(NX_U32 gpio_port, NX_U32 gpio_pin, NX_U32 cfg, NX_U8 enable) +{ + NX_U32 pin_level = 0; + NX_U32 gpio_base_addr = 0; + NX_U32 val = 0; + pin_level = gpio_pin / 8; + gpio_base_addr = D1_GPIO_BASE + D1_GPIO_PB_EINT_CFG0 + pin_level * 0x04; + val = Read32(gpio_base_addr); + + val &= ~(0xf << ((gpio_pin & 0x7) << 2)); + val |= ((cfg & 0x0f) << ((gpio_pin & 0x7) << 2)); + + Write32(gpio_base_addr, val); + + // set gpio irq enable + gpio_base_addr = D1_GPIO_BASE + D1_GPIO_PB_EINT_CTL; + val = Read32(gpio_base_addr); + if (enable) + { + val |= (1 << gpio_pin); + } + else + { + val &= ~(1 << gpio_pin); + } + Write32(gpio_base_addr, val); +} + +NX_U32 d1_get_pb_irq_status(void) +{ + NX_U32 val = 0; + NX_U32 gpio_base_addr = 0; + gpio_base_addr = D1_GPIO_BASE + D1_GPIO_PB_EINT_STATUS; + val = Read32(gpio_base_addr); + + Write32(gpio_base_addr, val); // write 1 clear + return val; +} + +void get_gpio_from_pin(NX_UArch pin, NX_U32 *cur_gpio_port, NX_U32 *cur_gpio_pin) +{ + if (pin < 6) // PB2 - PB7 + { + *cur_gpio_port = GPIO_PORT_B; + *cur_gpio_pin = pin + 2; + } + else if (pin < 12) // PC2 - PC7 + { + *cur_gpio_port = GPIO_PORT_C; + *cur_gpio_pin = pin - 6 + 2; + } + else if (pin < 35) // PD0 - PD22 + { + *cur_gpio_port = GPIO_PORT_D; + *cur_gpio_pin = pin - 12; + } + else if (pin < 49) // PE0 - PE13 + { + *cur_gpio_port = GPIO_PORT_E; + *cur_gpio_pin = pin - 35; + } + else if (pin < 56) // PF0 - PF6 + { + *cur_gpio_port = GPIO_PORT_F; + *cur_gpio_pin = pin - 49; + } + else if (pin < 72) // PG0 - PG15 + { + *cur_gpio_port = GPIO_PORT_G; + *cur_gpio_pin = pin - 56; + } +} + +void d1s_pin_mode(NX_UArch pin, NX_UArch mode) +{ + GPIO_FUNC d1s_mode = OUTPUT; + NX_U32 cur_gpio_port = 0; + NX_U32 cur_gpio_pin = 0; + + get_gpio_from_pin(pin, &cur_gpio_port, &cur_gpio_pin); + + switch (mode) + { + case PIN_MODE_OUTPUT: + d1s_mode = OUTPUT; + break; + case PIN_MODE_INPUT: + d1s_mode = INPUT; + break; + case PIN_MODE_INPUT_PULLUP: // to do + d1s_mode = INPUT; + break; + case PIN_MODE_INPUT_PULLDOWN: // to do + d1s_mode = INPUT; + break; + case PIN_MODE_OUTPUT_OD: + d1s_mode = OUTPUT; + break; + } + + d1_set_gpio_mode(cur_gpio_port, cur_gpio_pin, d1s_mode); +} + +void d1s_pin_write(NX_UArch pin, NX_UArch value) +{ + NX_U32 cur_gpio_port = 0; + NX_U32 cur_gpio_pin = 0; + + get_gpio_from_pin(pin, &cur_gpio_port, &cur_gpio_pin); + + d1_set_gpio_val(cur_gpio_port, cur_gpio_pin, value); +} + +int d1s_pin_read(NX_UArch pin) +{ + NX_U32 pin_level = 0; + + NX_U32 cur_gpio_port = 0; + NX_U32 cur_gpio_pin = 0; + + get_gpio_from_pin(pin, &cur_gpio_port, &cur_gpio_pin); + + pin_level = d1_get_gpio_val(cur_gpio_port, cur_gpio_pin); + return pin_level; +} + +NX_Error d1s_pin_attach_irq(NX_I32 pin, NX_U32 mode, void (*hdr)(void *args), void *args) +{ + return NX_EOK; +} + +NX_Error d1s_pin_detach_irq(NX_I32 pin) +{ + return NX_EOK; +} + +NX_Error d1s_pin_irq_enable(NX_UArch pin, NX_U32 enabled) +{ + return NX_EOK; +} + +NX_PRIVATE NX_Error Pin_Control(struct NX_Device *device, NX_U32 cmd, void *arg) +{ + + NX_UArch pin = 0; + int hw_port_num, hw_pin_num = 0; + int i, name_len; + + switch (cmd) + { + case NX_PIN_CMD_GETPIN: + name_len = NX_StrLen(device->name); + + if ((name_len < 4) || (name_len >= 6)) + { + return -NX_EINVAL; + } + if ((device->name[0] != 'P') || (device->name[2] != '.')) + { + return -NX_EINVAL; + } + + if (device->name[1] == 'B') + { + pin = 0; + } + else if (device->name[1] == 'C') + { + pin = 6; + } + else if (device->name[1] == 'D') + { + pin = 12; + } + else if (device->name[1] == 'E') + { + pin = 35; + } + else if (device->name[1] == 'F') + { + pin = 49; + } + else if (device->name[1] == 'G') + { + pin = 56; + } + + for (i = 3; i < name_len; i++) + { + hw_pin_num *= 10; + hw_pin_num += device->name[i] - '0'; + } + + if (hw_pin_num > 23) + { + return -NX_EINVAL; + } + arg = pin + hw_pin_num; + break; + default: + return NX_EINVAL; + } + return NX_EOK; +} + + +NX_IArch d1s_pin_get(const char *name) +{ + + NX_IArch pin = 0; + int hw_port_num, hw_pin_num = 0; + int i, name_len; + + name_len = NX_StrLen(name); + + if ((name_len < 4) || (name_len >= 6)) + { + return -NX_EINVAL; + } + if ((name[0] != 'P') || (name[2] != '.')) + { + return -NX_EINVAL; + } + + if(name[1] == 'B') + { + pin = 0; + } + else if(name[1] == 'C') + { + pin = 6; + } + else if(name[1] == 'D') + { + pin = 12; + } + else if(name[1] == 'E') + { + pin = 35; + } + else if(name[1] == 'F') + { + pin = 49; + } + else if(name[1] == 'G') + { + pin = 56; + } + + for (i = 3; i < name_len; i++) + { + hw_pin_num *= 10; + hw_pin_num += name[i] - '0'; + } + + if(hw_pin_num > 23) + { + return -NX_EINVAL; + } + + return pin + hw_pin_num; +} + +NX_PRIVATE NX_Error Pin_Write(struct NX_Device *device, void *buf, NX_Offset off, NX_Size len, NX_Size *outLen) +{ + d1s_pin_write(off, &buf); + return NX_EOK; +} + +NX_PRIVATE NX_Error Pin_Read(struct NX_Device *device, void *value, NX_Offset off, NX_Size len, NX_Size *outLen) +{ + value = (void *)d1s_pin_read(off); + if (value == NX_NULL) + { + return NX_ERROR; + } + return NX_EOK; +} + +NX_PRIVATE NX_DriverOps PIN_DriverOps = + { + .write = Pin_Write, + .read = Pin_Read, + .control = Pin_Control, +}; + +int GPIO_DriverInit(void) +{ + NX_Device *device; + NX_Driver *driver = NX_DriverCreate(DRV_NAME, NX_DEVICE_TYPE_CHAR, 0, &PIN_DriverOps); + + if (driver == NX_NULL) + { + NX_LOG_E("create driver failed!"); + return; + } + + if (NX_DriverAttachDevice(driver, DEV_NAME, &device) != NX_EOK) + { + NX_LOG_E("attach device %s failed!", DEV_NAME); + NX_DriverDestroy(driver); + return; + } + + if (NX_DriverRegister(driver) != NX_EOK) + { + NX_LOG_E("register driver %s failed!", DRV_NAME); + NX_DriverDetachDevice(driver, DEV_NAME); + NX_DriverDestroy(driver); + return; + } +} + +NX_PRIVATE void GPIO_DriverExit(void) +{ + NX_DriverCleanup(DRV_NAME); +} + +NX_DRV_INIT(GPIO_DriverInit); +NX_DRV_EXIT(GPIO_DriverExit); \ No newline at end of file diff --git a/src/platform/f133/drivers/iic.c b/src/platform/f133/drivers/iic.c new file mode 100644 index 0000000000000000000000000000000000000000..3ca25c79e43c1115fc0eecfeb882d5f10e2846cb --- /dev/null +++ b/src/platform/f133/drivers/iic.c @@ -0,0 +1,243 @@ +/** + * Copyright (c) 2018-2022, NXOS Development Team + * SPDX-License-Identifier: Apache-2.0 + * + * Contains: IIC driver + * + * Change Logs: + * Date Author Notes + * 2023-1-4 planck Init + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +enum { + I2C_STAT_BUS_ERROR = 0x00, + I2C_STAT_TX_START = 0x08, + I2C_STAT_TX_RSTART = 0x10, + I2C_STAT_TX_AW_ACK = 0x18, + I2C_STAT_TX_AW_NAK = 0x20, + I2C_STAT_TXD_ACK = 0x28, + I2C_STAT_TXD_NAK = 0x30, + I2C_STAT_LOST_ARB = 0x38, + I2C_STAT_TX_AR_ACK = 0x40, + I2C_STAT_TX_AR_NAK = 0x48, + I2C_STAT_RXD_ACK = 0x50, + I2C_STAT_RXD_NAK = 0x58, + I2C_STAT_IDLE = 0xf8, +}; + + + + +static int f133_i2c_wait_status(void) +{ + // NX_ClockTick cur_tick = NX_ClockTickGet(); + + int ret = 0; + while(1) + { + if((Read32(TWI2_ADDR_BASE + TWI_CNTR_OFFSET) & (1 << 3))) + { + ret = Read32(TWI2_ADDR_BASE + TWI_STAT_OFFSET); + break; + } + + // if(NX_ClockTickGet() - cur_tick > 1) + // { + // ret = I2C_STAT_BUS_ERROR; + // break; + // } + } + + return ret; +} + +static int f133_i2c_send_data(NX_U8 dat) +{ + Write32(TWI2_ADDR_BASE + TWI_DATA_OFFSET, dat); + Write32(TWI2_ADDR_BASE + TWI_CNTR_OFFSET, Read32(TWI2_ADDR_BASE + TWI_CNTR_OFFSET) | (1 << 3)); + return f133_i2c_wait_status(); +} + +static int f133_i2c_start(void) +{ + NX_U32 val; + // NX_ClockTick cur_tick = NX_ClockTickGet(); + + val = Read32(TWI2_ADDR_BASE + TWI_CNTR_OFFSET); + val |= (1 << 5) | (1 << 3); + Write32(TWI2_ADDR_BASE + TWI_CNTR_OFFSET, val); + + while(1) + { + + if(!(Read32(TWI2_ADDR_BASE + TWI_CNTR_OFFSET) & (1 << 5))) + { + break; + } + + + // if(NX_ClockTickGet() - cur_tick > 100) + // { + // break; + // } + } + return f133_i2c_wait_status(); +} + +static int f133_i2c_stop(void) +{ + NX_U32 val; + // NX_ClockTick cur_tick = NX_ClockTickGet(); + + val = Read32(TWI2_ADDR_BASE + TWI_CNTR_OFFSET); + val |= (1 << 4) | (1 << 3); + Write32(TWI2_ADDR_BASE + TWI_CNTR_OFFSET, val); + + while(1) + { + if(!(Read32(TWI2_ADDR_BASE + TWI_CNTR_OFFSET) & (1 << 4))) + break; + // if(NX_ClockTickGet() - cur_tick > 100) + // { + // break; + // } + } + + return f133_i2c_wait_status(); +} + + + +static int f133_i2c_read(struct i2c_msg * msg) +{ + NX_U8 * p = msg->buf; + int len = msg->len; + int ret = len; + NX_U8 ss; + + if(f133_i2c_send_data((NX_U8)(msg->addr << 1 | 1)) != I2C_STAT_TX_AR_ACK) + { + return -1; + } + + Write32(TWI2_ADDR_BASE + TWI_CNTR_OFFSET, Read32(TWI2_ADDR_BASE + TWI_CNTR_OFFSET) | (1 << 2)); + while(len > 0) + { + if(len == 1) + { + Write32(TWI2_ADDR_BASE + TWI_CNTR_OFFSET, (Read32(TWI2_ADDR_BASE + TWI_CNTR_OFFSET) & ~(1 << 2)) | (1 << 3)); + if(f133_i2c_wait_status() != I2C_STAT_RXD_NAK) + { + return -1; + } + } + else + { + Write32(TWI2_ADDR_BASE + TWI_CNTR_OFFSET, Read32(TWI2_ADDR_BASE + TWI_CNTR_OFFSET) | (1 << 3)); + if(f133_i2c_wait_status() != I2C_STAT_RXD_ACK) + { + return -1; + } + } + ss = Read32(TWI2_ADDR_BASE + TWI_DATA_OFFSET); + *p++ = ss; + len--; + } + return ret; +} + + + + + + + +static int f133_i2c_write(struct i2c_msg * msg) +{ + NX_U8 * p = msg->buf; + int len = msg->len; + + if(f133_i2c_send_data((NX_U8)(msg->addr << 1)) != I2C_STAT_TX_AW_ACK) + return -1; + while(len > 0) + { + if(f133_i2c_send_data(*p++) != I2C_STAT_TXD_ACK) + { + return -1; + } + + len--; + } + return 0; +} + +NX_IArch f133_i2c_mst_xfer(struct i2c_msg msgs[], NX_U32 num) +{ + + + NX_U32 res = 0; + NX_U32 i = 0; + + if (f133_i2c_start() != I2C_STAT_TX_START) + { + return 0; + } + + for (i = 0; i < num; i++) + { + + if (i != 0) + { + if (f133_i2c_start() != I2C_STAT_TX_RSTART) + break; + } + + if (msgs[i].flags & I2C_RD) + res = f133_i2c_read(&msgs[i]); + else + res = f133_i2c_write(&msgs[i]); + } + + // f133_i2c_stop(); + + return i; +} + +void i2c_gpio_init(void) +{ + // PE12 + // twi2-sck 2 + // PE13 + // twi2-sda 2 + d1_set_gpio_mode(GPIO_PORT_E, GPIO_PIN_12, 2); // SCK + d1_set_gpio_mode(GPIO_PORT_E, GPIO_PIN_13, 2); // SDA + + d1_set_gpio_pull(GPIO_PORT_E, GPIO_PIN_12, 1); + d1_set_gpio_pull(GPIO_PORT_E, GPIO_PIN_13, 1); +} + +void i2c_set_rate(void) +{ + Write32((void *)(TWI2_ADDR_BASE + TWI_CCR_OFFSET), 0x28); // 400k +} + +void NX_IicDriverInit(void) +{ + Write32((void *)0x0200191c, (0x1 << 18) | (0x1 << 2)); + i2c_gpio_init(); + i2c_set_rate(); + Write32(TWI2_ADDR_BASE + TWI_CNTR_OFFSET, 1 << 6); + Write32(TWI2_ADDR_BASE + TWI_SRST_OFFSET, 1 << 0); +} + diff --git a/src/platform/f133/drivers/key.c b/src/platform/f133/drivers/key.c new file mode 100644 index 0000000000000000000000000000000000000000..8e57c40add5e3088e4285561f7af93fdaef0db4d --- /dev/null +++ b/src/platform/f133/drivers/key.c @@ -0,0 +1,359 @@ +/** + * Copyright (c) 2018-2022, NXOS Development Team + * SPGX-License-Identifier: Apache-2.0 + * + * Contains: keybar driver + * + * Change Logs: + * Date Author Notes + * 2023-2-26 planck init + */ +#define NX_LOG_NAME "Key Control" +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define TAG "KeyBoard" + +#define key_loge(...) do {\ + NX_LOG_E("[%s] <%s %4d> ", TAG, __FUNCTION__, __LINE__, __VA_ARGS__); \ +} while (0) + +#define key_logd(...) do {\ + NX_LOG_D("[%s] <%s %4d> ", TAG, __FUNCTION__, __LINE__, __VA_ARGS__); \ +} while (0) + +#define set_bit(x, bit) (x |= (1 << bit)) +#define clear_bit(x, bit) (x &= ~(1 << bit)) +#define get_bit(x, bit) ((x & (1 << bit)) >> bit) + +#define write_reg(x, addr, bit) do {\ + if (x) \ + set_bit(*addr, bit); \ + else \ + clear_bit(*addr, bit); \ + } while(0) + +#define CLK_PIN "PG.13" +#define CS_PIN "PG.14" +#define MISO_PIN "PG.15" +#define KEY_NUM_MAX 16 + +#define NULL ((void*)0) + +typedef enum { + KEY_FUNCTION_UP = 0, + KEY_FUNCTION_DOWN, + KEY_FUNCTION_RIGT, + KEY_FUNCTION_LEFT, + KEY_FUNCTION_A, + KEY_FUNCTION_B, + KEY_FUNCTION_X, + KEY_FUNCTION_Y, + KEY_FUNCTION_HOME, + KEY_FUNCTION_ENT, + KEY_FUNCTION_RET, + KEY_FUNCTION_MAX, + KEY_VALUE_ERROR = -1 +}KEY_FUNCTION; + +typedef enum { + KEY_VALUE_PRESS = 0, + KEY_VALUE_RELEASE, + KEY_VALUE_NONE, + KEY_VALUE_MAX +}KEY_VALUE; + +typedef struct spi_handle { + NX_IArch clk; + NX_IArch cs; + NX_IArch miso; + NX_IArch mosi; + char *owner; +}spi_handle_t; + +typedef struct key_map { + NX_U16 value; + KEY_FUNCTION func; +} key_map_t; + +typedef struct key_handle { + char name[16]; + NX_U16 num; + + key_map_t *keys; + spi_handle_t spi; +}key_handle_t; + +static const char *key_name[KEY_FUNCTION_MAX] = { + "UP", + "DOWN", + "RIGHT", + "LEFT", + "A", + "B", + "X", + "Y", + "HOME", + "ENTER", + "RETURN" +}; + +static key_handle_t *key_control = NULL; + +static key_handle_t *get_key_board_handle(void) +{ + if (!key_control) { + NX_LOG_E("key_control is not initialize"); + return NULL; + } + return key_control; +} + +static NX_U16 spi_read_byte(spi_handle_t *spi_handle) +{ + NX_U16 keybit = 0; + + d1s_pin_write(spi_handle->cs, 1); + + for (NX_U16 i = 0; i < KEY_NUM_MAX; i++) { + d1s_pin_write(spi_handle->clk, 0); + d1s_pin_write(spi_handle->clk, 1); + NX_U16 dat_in = d1s_pin_read(spi_handle->miso); + write_reg(dat_in, &keybit, i); + } + + d1s_pin_write(spi_handle->cs, 0); + + return keybit; +} + +static KEY_VALUE get_key_val_index(spi_handle_t *handle, NX_U8 index) +{ + NX_U16 rd_val; + KEY_VALUE ret_val; + + /** + * 硬件设计上这几个按键默认拉低， + * 减轻后级框架负担，这里直接屏蔽掉 + */ + if ((index > 5 && index < 10) || index == 15) + return KEY_VALUE_NONE; + + rd_val = spi_read_byte(handle); + if (!get_bit(rd_val, index)) { + ret_val = KEY_VALUE_PRESS; + } else + ret_val = KEY_VALUE_RELEASE; + + return ret_val; +} + +static KEY_VALUE key_filter_index(NX_U8 index) +{ + key_handle_t *ptr = get_key_board_handle(); + static NX_U16 flag = 0xffff; + KEY_VALUE ret = KEY_VALUE_RELEASE; + + if (!ptr) + goto exit; + + if (index > ptr->num) + goto exit1; + + KEY_VALUE key_val = get_key_val_index(&ptr->spi, index); + if (key_val == KEY_VALUE_PRESS ) { + NX_ThreadSleep(10); + key_val = get_key_val_index(&ptr->spi, index); + if (key_val == KEY_VALUE_PRESS && get_bit(flag, index)) { + clear_bit(flag, index); + ret = KEY_VALUE_PRESS; + } + } else if (key_val == KEY_VALUE_RELEASE) { + set_bit(flag, index); + } + + return ret; +exit: + NX_LOG_E("The key has not been initialized"); + return KEY_VALUE_NONE; +exit1: + NX_LOG_E("Index<%d> is not in the list", index); + return KEY_VALUE_NONE; +} + +static NX_U16 calibrate_keyboard(key_handle_t *handle, NX_U8 initlize) +{ + NX_U16 index = 0; + KEY_VALUE cur_val = KEY_VALUE_RELEASE; + KEY_FUNCTION key_func = KEY_FUNCTION_UP; + + if (!handle) + goto exit; + + if (initlize) { + NX_ThreadSleep(2000); + } + +again: + NX_Printf("Please enter <%s> \n", key_name[index]); + while (1) { + for (NX_U16 i = 0; i < handle->num; i++) { + cur_val = key_filter_index(i); + if (cur_val == KEY_VALUE_PRESS) { + handle->keys[i].func = key_func; + handle->keys[i].value = i; + NX_Printf("key%d press val:%d\n", i, cur_val); + NX_Printf("value:%d index:%d func:%d\n", handle->keys[i].func, index, key_func); + + index++; + key_func++; + if (index == KEY_FUNCTION_MAX) + goto out; + + goto again; + } + } + NX_ThreadSleep(10); + } +out: + NX_Printf("\nfunc -> key\n"); + for (NX_U16 i = 0; i < handle->num; i++){ + NX_Printf("%s:%d\n", key_name[handle->keys[i].func], handle->keys[i].value); + } + + return NX_EOK; +exit: + NX_LOG_E("The key has not been initialized"); + return NX_ERROR; +} + +static KEY_FUNCTION key_to_func(NX_U16 index) +{ + key_handle_t *ptr = get_key_board_handle(); + KEY_FUNCTION retval = KEY_VALUE_ERROR; + + if (!ptr) + goto exit; + + for (NX_U16 i = 0; i < ptr->num; i++) { + if (index == ptr->keys[i].value) { + NX_Printf("key:%d func:%d\n", index, ptr->keys[i].func); + retval = ptr->keys[i].func; + } + } + + return retval; +exit: + NX_LOG_E("The key has not been initialized"); + return KEY_VALUE_ERROR; +} + +static void NX_KeyInputThread(void *arg) +{ + key_handle_t *internal = (key_handle_t*)arg; + KEY_VALUE val; + KEY_FUNCTION func; + + calibrate_keyboard(internal, 1); + + NX_Printf("name:%s\n", internal->name); + while (1) { + for (NX_U16 i = 0; i < KEY_FUNCTION_MAX; i++) { + // KEY_VALUE val = get_key_val_index(&internal->spi, i); + val = key_filter_index(i); + NX_Printf("key%d:%d ", i,val); + if (val) { + // func = key_to_func(i); + // NX_Printf("%s:%s\n", key_name[func], (val==KEY_VALUE_PRESS)?"Press":"Release"); + } + } + NX_Printf("\n"); + NX_ThreadSleep(100); + } +} + +static void key_board_init(void) +{ + spi_handle_t gpio; + + key_control = (key_handle_t*)NX_MemAlloc(sizeof(key_handle_t)); + if (!key_control) { + NX_LOG_E("no enought memory"); + return; + } + + gpio.clk = d1s_pin_get(CLK_PIN); + gpio.cs = d1s_pin_get(CS_PIN); + gpio.miso = d1s_pin_get(MISO_PIN); + gpio.mosi = -1; + gpio.owner = "key board"; + + if (gpio.clk == -NX_EINVAL ||\ + gpio.cs == -NX_EINVAL ||\ + gpio.miso== -NX_EINVAL) { + + goto exit; + } + + d1s_pin_mode(gpio.clk, PIN_MODE_OUTPUT); + d1s_pin_mode(gpio.cs, PIN_MODE_OUTPUT); + d1s_pin_mode(gpio.miso, PIN_MODE_INPUT_PULLUP); + + key_control->spi = gpio; + key_control->num = KEY_FUNCTION_MAX; + NX_StrCopyN(key_control->name, "key_board", sizeof("key_board")); + + key_control->keys = (key_map_t *)NX_MemAlloc(sizeof(key_map_t) * key_control->num); + if (!key_control->keys) + goto exit1; + + NX_LOG_I(" -> clk:%d miso:%d mosi:%d cs:%d", gpio.clk, gpio.miso, gpio.mosi, gpio.cs); + NX_LOG_I(" -> %d", key_control->num); + + NX_Thread *thread = NX_ThreadCreate("key_input", NX_KeyInputThread, (void*)key_control, NX_THREAD_PRIORITY_LOW); + NX_Error ret = NX_ThreadStart(thread); + + if (ret != NX_EOK) + goto exit2; + + NX_LOG_I("drv init successed"); + + return; +exit: + NX_MemFree(key_control); + NX_LOG_E("gpio request failed!"); + return; +exit1: + NX_MemFree(key_control); + NX_LOG_E("no enought memory"); + return; +exit2: + NX_MemFree(key_control->keys); + NX_MemFree(key_control); + NX_LOG_E("Thread create failed"); + return; +} + +static void key_board_exit(void) +{ + key_handle_t *key_handle; + + key_handle = get_key_board_handle(); + if (key_handle) + NX_MemFree(key_handle->keys); + + NX_LOG_I("exit"); +} + +NX_DRV_INIT(key_board_init); +NX_DRV_EXIT(key_board_exit); diff --git a/src/platform/f133/drivers/lcd.c b/src/platform/f133/drivers/lcd.c new file mode 100644 index 0000000000000000000000000000000000000000..e0956337147b0f8098f47d69cfb30930b7409ae4 --- /dev/null +++ b/src/platform/f133/drivers/lcd.c @@ -0,0 +1,385 @@ +/** + * Copyright (c) 2018-2022, NXOS Development Team + * SPDX-License-Identifier: Apache-2.0 + * + * Contains: framebuffer driver + * + * Change Logs: + * Date Author Notes + * 2023-2-4 planck Init + */ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +NX_U8 NX_ALIGN(0x1000) lcd_fb[LCD_WIDTH * LCD_HEIGHT * 4]; + +struct f133_tconlcd_reg_t *tcon; + +static void f133_tconlcd_disable(void) +{ + NX_U32 val; + + val = Read32((void *)&tcon->dclk); + val &= ~(0xf << 28); + Write32((void *)&tcon->dclk, val); + + Write32((void *)&tcon->gctrl, 0); + Write32((void *)&tcon->gint0, 0); +} + +static void f133_tconlcd_set_timing(void) +{ + int bp, total; + NX_U32 val; + val = (V_FRONT_PORCH + V_BACK_PORCH + V_SYNC_LEN) / 2; + Write32((void *)&tcon->ctrl, (1 << 31) | (0 << 24) | (0 << 23) | ((val & 0x1f) << 4) | (0 << 0)); + val = 12; + Write32((void *)&tcon->dclk, (0xf << 28) | ((val / 2) << 0)); + Write32((void *)&tcon->timing0, ((LCD_WIDTH - 1) << 16) | ((LCD_HEIGHT - 1) << 0)); + bp = H_SYNC_LEN + H_BACK_PORCH; + total = LCD_WIDTH + H_FRONT_PORCH + bp; + Write32((void *)&tcon->timing1, ((total - 1) << 16) | ((bp - 1) << 0)); + bp = V_SYNC_LEN + V_BACK_PORCH; + total = LCD_HEIGHT + V_FRONT_PORCH + bp; + Write32((void *)&tcon->timing2, ((total * 2) << 16) | ((bp - 1) << 0)); + Write32((void *)&tcon->timing3, ((H_SYNC_LEN - 1) << 16) | ((V_SYNC_LEN - 1) << 0)); + + val = (0 << 31) | (1 << 28); + if (!H_SYNC_ACTIVE) + val |= (1 << 25); + if (!V_SYNC_ACTIVE) + val |= (1 << 24); + if (!DEN_ACTIVE) + val |= (1 << 27); + if (!CLK_ACTIVE) + val |= (1 << 26); + Write32((void *)&tcon->io_polarity, val); + Write32((void *)&tcon->io_tristate, 0); +} + +static void f133_tconlcd_set_dither(void) +{ + if ((LCD_BITS_PER_PIXEL == 16) || (LCD_BITS_PER_PIXEL == 18)) + { + Write32((void *)&tcon->frm_seed[0], 0x11111111); + Write32((void *)&tcon->frm_seed[1], 0x11111111); + Write32((void *)&tcon->frm_seed[2], 0x11111111); + Write32((void *)&tcon->frm_seed[3], 0x11111111); + Write32((void *)&tcon->frm_seed[4], 0x11111111); + Write32((void *)&tcon->frm_seed[5], 0x11111111); + Write32((void *)&tcon->frm_table[0], 0x01010000); + Write32((void *)&tcon->frm_table[1], 0x15151111); + Write32((void *)&tcon->frm_table[2], 0x57575555); + Write32((void *)&tcon->frm_table[3], 0x7f7f7777); + + if (LCD_BITS_PER_PIXEL == 16) + Write32((void *)&tcon->frm_ctrl, (1 << 31) | (1 << 6) | (0 << 5) | (1 << 4)); + if (LCD_BITS_PER_PIXEL == 18) + Write32((void *)&tcon->frm_ctrl, (1 << 31) | (0 << 6) | (0 << 5) | (0 << 4)); + } +} + +static void f133_tconlcd_enable(void) +{ + NX_U32 val; + + val = Read32((void *)&tcon->gctrl); + val |= (1 << 31); + Write32((void *)&tcon->gctrl, val); +} + +static inline void f133_de_set_mode(void) +{ + struct de_clk_t *clk = (struct de_clk_t *)(LCD_DE_BASE_ADDR); + struct de_glb_t *glb = (struct de_glb_t *)(LCD_DE_BASE_ADDR + F133_DE_MUX_GLB); + struct de_bld_t *bld = (struct de_bld_t *)(LCD_DE_BASE_ADDR + F133_DE_MUX_BLD); + struct de_ui_t *ui = (struct de_ui_t *)(LCD_DE_BASE_ADDR + F133_DE_MUX_CHAN + 0x1000 * 1); + NX_U32 size = (((LCD_HEIGHT - 1) << 16) | (LCD_WIDTH - 1)); + NX_U32 val; + int i; + + val = Read32((void *)&clk->rst_cfg); + val |= 1 << 0; + Write32((void *)&clk->rst_cfg, val); + + val = Read32((void *)&clk->gate_cfg); + val |= 1 << 0; + Write32((void *)&clk->gate_cfg, val); + + val = Read32((void *)&clk->bus_cfg); + val |= 1 << 0; + Write32((void *)&clk->bus_cfg, val); + + val = Read32((void *)&clk->sel_cfg); + val &= ~(1 << 0); + Write32((void *)&clk->sel_cfg, val); + + Write32((void *)&glb->ctl, (1 << 0)); + Write32((void *)&glb->status, 0); + Write32((void *)&glb->dbuff, 1); + Write32((void *)&glb->size, size); + + for (i = 0; i < 4; i++) + { + void *chan = (void *)(LCD_DE_BASE_ADDR + F133_DE_MUX_CHAN + 0x1000 * i); + NX_MemSet(chan, 0, i == 0 ? sizeof(struct de_vi_t) : sizeof(struct de_ui_t)); + } + NX_MemSet(bld, 0, sizeof(struct de_bld_t)); + + Write32((void *)&bld->fcolor_ctl, 0x00000101); + Write32((void *)&bld->route, 1); + Write32((void *)&bld->premultiply, 0); + Write32((void *)&bld->bkcolor, 0xff000000); + Write32((void *)&bld->bld_mode[0], 0x03010301); + Write32((void *)&bld->bld_mode[1], 0x03010301); + Write32((void *)&bld->output_size, size); + Write32((void *)&bld->out_ctl, 0); + Write32((void *)&bld->ck_ctl, 0); + for (i = 0; i < 4; i++) + { + Write32((void *)&bld->attr[i].fcolor, 0xff000000); + Write32((void *)&bld->attr[i].insize, size); + } + + Write32(LCD_DE_BASE_ADDR + F133_DE_MUX_VSU, 0); + Write32(LCD_DE_BASE_ADDR + F133_DE_MUX_GSU1, 0); + Write32(LCD_DE_BASE_ADDR + F133_DE_MUX_GSU2, 0); + Write32(LCD_DE_BASE_ADDR + F133_DE_MUX_GSU3, 0); + Write32(LCD_DE_BASE_ADDR + F133_DE_MUX_FCE, 0); + Write32(LCD_DE_BASE_ADDR + F133_DE_MUX_BWS, 0); + Write32(LCD_DE_BASE_ADDR + F133_DE_MUX_LTI, 0); + Write32(LCD_DE_BASE_ADDR + F133_DE_MUX_PEAK, 0); + Write32(LCD_DE_BASE_ADDR + F133_DE_MUX_ASE, 0); + Write32(LCD_DE_BASE_ADDR + F133_DE_MUX_FCC, 0); + Write32(LCD_DE_BASE_ADDR + F133_DE_MUX_DCSC, 0); + + Write32((void *)&ui->cfg[0].attr, (1 << 0) | (4 << 8) | (1 << 1) | (0xff << 24)); + Write32((void *)&ui->cfg[0].size, size); + Write32((void *)&ui->cfg[0].coord, 0); + Write32((void *)&ui->cfg[0].pitch, 4 * LCD_WIDTH); + Write32((void *)&ui->cfg[0].top_laddr, (NX_U32)(unsigned long)lcd_fb); + Write32((void *)&ui->ovl_size, size); +} + +static void inline f133_de_enable(void) +{ + struct de_glb_t *glb = (struct de_glb_t *)(LCD_DE_BASE_ADDR + F133_DE_MUX_GLB); + Write32((void *)&glb->dbuff, 1); +} + +static inline void f133_de_set_address(void *fb) +{ + struct de_ui_t *ui = (struct de_ui_t *)(LCD_DE_BASE_ADDR + F133_DE_MUX_CHAN + 0x1000 * 1); + Write32((void *)&ui->cfg[0].top_laddr, (NX_U32)(unsigned long)fb); +} + +static void reset_f133_deassert(void *addr, int offset) +{ + NX_U32 val; + Write32(addr, 0x01); + val = Read32(addr); + val |= (1 << offset); + val = 0x00010001; + Write32(addr, val); +} + +void lcd_gpio_config(void) +{ + // d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_0, 2);//R0 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_1, 2); // R1 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_2, 2); // R2 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_3, 2); // R3 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_4, 2); // R4 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_5, 2); // R5 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_6, 2); // G0 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_7, 2); // G1 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_8, 2); // G2 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_9, 2); // G3 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_10, 2); // G4 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_11, 2); // G5 + // d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_12, 2);//B0 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_13, 2); // B1 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_14, 2); // B2 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_15, 2); // B3 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_16, 2); // B4 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_17, 2); // B5 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_18, 2); // LCD_CLK + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_19, 2); // LCD_DE + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_20, 2); // LCD_HSYNC + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_21, 2); // LCD_VSYNC + + if (LCD_BITS_PER_PIXEL == 18) + { + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_0, 2); // R0 + d1_set_gpio_mode(GPIO_PORT_D, GPIO_PIN_12, 2); // B0 + } + + Cpu_Dcache_Invalidate((void *)LCD_TCON_BASE_ADDR, 4096 * 1024); + Cpu_Dcache_Invalidate((void *)LCD_DE_BASE_ADDR, 4096 * 1024); + Cpu_Dcache_Invalidate((void *)lcd_fb, LCD_WIDTH * LCD_HEIGHT * 4); + + reset_f133_deassert((void *)F133_DE, 16); + reset_f133_deassert((void *)F133_TCON, 16); + + Write32((void *)0x02001600, 0x81000002); + Write32((void *)0x02001b60, 0x81000002); + Write32((void *)0x02001b9c, 1); + + tcon = (struct f133_tconlcd_reg_t *)((unsigned long long)LCD_TCON_BASE_ADDR); + f133_tconlcd_disable(); + f133_tconlcd_set_timing(); + f133_tconlcd_set_dither(); + f133_tconlcd_enable(); + f133_de_set_mode(); + f133_de_enable(); + f133_de_set_address((void *)lcd_fb); + f133_de_enable(); +} + +/* color : 32bit, 0x00RRGGBB + * + */ +void fb_put_pixel(int x, int y, unsigned int color) +{ + unsigned char *pc; /* 8bpp */ + unsigned short *pw; /* 16bpp */ + unsigned int *pdw; /* 32bpp */ + + unsigned int pixel_base = lcd_fb + (800 * 32 / 8) * y + x * 32 / 8; + + pdw = (unsigned int *)pixel_base; + *pdw = color; +} + +// #include + +// void fb_print_char(int x, int y, char c, unsigned int color) +// { +// int i, j; + +// /* 根据c的ascii码在fontdata_8x16中得到点阵数据 */ +// unsigned char *dots = &fontdata_8x16[c * 16]; + +// unsigned char data; +// int bit; + +// /* 根据点阵来设置对应象素的颜色 */ +// for (j = y; j < y + 16; j++) +// { +// data = *dots++; +// bit = 7; +// for (i = x; i < x + 8; i++) +// { +// /* 根据点阵的某位决定是否描颜色 */ +// if (data & (1 << bit)) +// fb_put_pixel(i, j, color); +// bit--; +// } +// } +// } + +// /* "abc\n\r123" */ +// void fb_print_string(int x, int y, char *str, unsigned int color) +// { +// int i = 0, j; + +// while (str[i]) +// { +// if (str[i] == '\n') +// y = y + 16; +// else if (str[i] == '\r') +// x = 0; + +// else +// { +// fb_print_char(x, y, str[i], color); +// x = x + 8; +// if (x >= 800) /* 换行 */ +// { +// x = 0; +// y = y + 16; +// } +// } +// i++; +// } +// } +// void show_logo(int x, int y, unsigned char *image_ptr) +// { +// int i, j; +// unsigned int color; + +// /* 根据点阵来设置对应象素的颜色 */ +// for (i = 0, x += 69, --y; i < 369; ++i, ++image_ptr) +// { +// if (*image_ptr >= 100) +// { +// color = (*image_ptr++ - 100) * 0xffffff; +// ++i; +// ++y; +// x -= 69; +// } +// for (j = 0; j < *image_ptr; ++j) +// { +// fb_put_pixel(x++, y, color); +// } +// color ^= 0xffffff; +// } +// } + +// int lcd_show_logo() +// { +// NX_Device *dev = NX_NULL; +// NX_FramebufferInfo *info = NX_MemAlloc(sizeof(NX_FramebufferInfo)); +// if (info == NX_NULL) +// { +// return NX_NULL; +// } + +// if (NX_DeviceOpen("fb0", 0, &dev) != NX_EOK) +// { +// NX_Printf("open fb0 failed!\n"); +// return NX_NULL; +// } +// NX_Printf("info = %x\n", info); + +// if (NX_DeviceControl(dev, NX_FRAMEBUFFER_CMD_GETINFO, info) != NX_EOK) +// { +// NX_Printf("get fb0 info failed!\n"); +// return NX_NULL; +// } + +// NX_Printf("info = %x\n", info); +// NX_Size sz = info->xResolution * info->yResolution * (info->bitsPerPixel / 8); + +// NX_Printf("lcd_fb = %x\n", lcd_fb); +// NX_Printf("info = %x\n", info); +// NX_Printf("sz = %x\n", sz); +// NX_Printf("info -> phyBasePtr = %x\n", info->phyBasePtr); +// NX_Printf("info -> xResolution = %d\n", info->xResolution); +// NX_Printf("info -> yResolution = %d\n", info->yResolution); +// NX_Printf("info -> bitsPerPixel = %d\n", info->bitsPerPixel); + +// NX_U32 *fbp32 = info->phyBasePtr; // NX_IoRemap(info->phyBasePtr, info->xResolution * info->yResolution * info->bitsPerPixel / 8); + +// show_logo((800 - 65) >> 1, (480 - 69) >> 1, &image); +// show_logo(0, 0, &image); +// show_logo(800 - 69, 0, &image); +// show_logo(0, 480 - 69, &image); +// show_logo(800 - 69, 480 - 69, &image); +// fb_print_string((info->xResolution - 88) >> 1, ((info->yResolution + 69) >> 1) + 16, "NXOS Development Team", 0xffffff); +// fb_print_string((info->xResolution - 88) >> 1, ((info->yResolution + 69) >> 1) + 32, "open source", 0xffffff); +// } diff --git a/src/platform/f133/drivers/touch.c b/src/platform/f133/drivers/touch.c new file mode 100644 index 0000000000000000000000000000000000000000..6c640be75eb1547b3239fa1fcb790a4cf6d4563b --- /dev/null +++ b/src/platform/f133/drivers/touch.c @@ -0,0 +1,497 @@ +/** + * Copyright (c) 2018-2022, NXOS Development Team + * SPDX-License-Identifier: Apache-2.0 + * + * Contains: TOUCH driver + * + * Change Logs: + * Date Author Notes + * 2023-1-4 planck Init + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* hardware section */ +static NX_U8 GT911_CFG_TBL[] = + { + 0x6b, + 0x00, + 0x04, + 0x58, + 0x02, + 0x05, + 0x0d, + 0x00, + 0x01, + 0x0f, + 0x28, + 0x0f, + 0x50, + 0x32, + 0x03, + 0x05, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x8a, + 0x2a, + 0x0c, + 0x45, + 0x47, + 0x0c, + 0x08, + 0x00, + 0x00, + 0x00, + 0x40, + 0x03, + 0x2c, + 0x00, + 0x01, + 0x00, + 0x00, + 0x00, + 0x03, + 0x64, + 0x32, + 0x00, + 0x00, + 0x00, + 0x28, + 0x64, + 0x94, + 0xd5, + 0x02, + 0x07, + 0x00, + 0x00, + 0x04, + 0x95, + 0x2c, + 0x00, + 0x8b, + 0x34, + 0x00, + 0x82, + 0x3f, + 0x00, + 0x7d, + 0x4c, + 0x00, + 0x7a, + 0x5b, + 0x00, + 0x7a, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x18, + 0x16, + 0x14, + 0x12, + 0x10, + 0x0e, + 0x0c, + 0x0a, + 0x08, + 0x06, + 0x04, + 0x02, + 0xff, + 0xff, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x16, + 0x18, + 0x1c, + 0x1d, + 0x1e, + 0x1f, + 0x20, + 0x21, + 0x22, + 0x24, + 0x13, + 0x12, + 0x10, + 0x0f, + 0x0a, + 0x08, + 0x06, + 0x04, + 0x02, + 0x00, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x79, + 0x01, +}; + +static NX_Error gt911_read_regs(NX_U32 addr, NX_U16 *reg, NX_U16 *data, NX_U16 len) +{ + struct i2c_msg msgs[2]; + + msgs[0].addr = addr; + msgs[0].flags = I2C_WR; + msgs[0].buf = reg; + msgs[0].len = GT911_REGITER_LEN; + + msgs[1].addr = addr; + msgs[1].flags = I2C_RD; + msgs[1].buf = data; + msgs[1].len = len; + + if (f133_i2c_mst_xfer(&msgs, 2) == 2) + { + return NX_EOK; + } + else + { + return -NX_ERROR; + } +} + +static NX_Error gt911_write_reg(NX_U32 addr, NX_U8 *data, NX_U8 len) +{ + struct i2c_msg msgs; + + msgs.addr = addr; + msgs.flags = I2C_WR; + msgs.buf = data; + msgs.len = len; + + if (f133_i2c_mst_xfer(&msgs, 1) == 1) + { + return NX_EOK; + } + else + { + return -NX_ERROR; + } +} + +static NX_Error gt911_soft_reset(NX_U32 addr) +{ + NX_U8 buf[3]; + + buf[0] = (NX_U8)(GT911_COMMAND_REG >> 8); + buf[1] = (NX_U8)(GT911_COMMAND_REG & 0xFF); + buf[2] = 0x02; + + if (gt911_write_reg(addr, buf, 3) != NX_EOK) + { + NX_LOG_E("soft reset failed"); + return -NX_ERROR; + } + return NX_EOK; +} + +static NX_I16 pre_x[GT911_MAX_TOUCH] = {-1, -1, -1, -1, -1}; +static NX_I16 pre_y[GT911_MAX_TOUCH] = {-1, -1, -1, -1, -1}; +static NX_I16 pre_w[GT911_MAX_TOUCH] = {-1, -1, -1, -1, -1}; +static NX_U16 s_tp_dowm[GT911_MAX_TOUCH]; +static struct touch_data *read_data; + +static void gt911_touch_up(void *buf, NX_I8 id) +{ + read_data = (struct touch_data *)buf; + + if (s_tp_dowm[id] == 1) + { + s_tp_dowm[id] = 0; + read_data[id].event = TOUCH_EVENT_UP; + } + else + { + read_data[id].event = TOUCH_EVENT_NONE; + } + + read_data[id].timestamp = NX_ClockTickGet(); + read_data[id].width = pre_w[id]; + read_data[id].x_coordinate = pre_x[id]; + read_data[id].y_coordinate = pre_y[id]; + read_data[id].track_id = id; + + pre_x[id] = -1; /* last point is none */ + pre_y[id] = -1; + pre_w[id] = -1; +} + +static void gt911_touch_down(void *buf, NX_I8 id, NX_I16 x, NX_I16 y, NX_I16 w) +{ + read_data = (struct touch_data *)buf; + + if (s_tp_dowm[id] == 1) + { + read_data[id].event = TOUCH_EVENT_MOVE; + } + else + { + read_data[id].event = TOUCH_EVENT_DOWN; + s_tp_dowm[id] = 1; + } + + read_data[id].timestamp = NX_ClockTickGet(); + read_data[id].width = w; + read_data[id].x_coordinate = x; + read_data[id].y_coordinate = y; + read_data[id].track_id = id; + + pre_x[id] = x; /* save last point */ + pre_y[id] = y; + pre_w[id] = w; +} + +static NX_IArch gt911_read_point(void *buf, NX_IArch read_num) +{ + NX_U8 point_status = 0; + NX_U8 touch_num = 0; + NX_U8 write_buf[3]; + NX_U8 cmd[2]; + NX_U8 read_buf[8 * GT911_MAX_TOUCH] = {0}; + NX_U8 read_index; + NX_I8 read_id = 0; + NX_I16 input_x = 0; + NX_I16 input_y = 0; + NX_I16 input_w = 0; + + static NX_U8 pre_touch = 0; + static NX_I8 pre_id[GT911_MAX_TOUCH] = {0}; + + /* point status register */ + cmd[0] = (NX_U8)((GT911_READ_STATUS >> 8) & 0xFF); + cmd[1] = (NX_U8)(GT911_READ_STATUS & 0xFF); + + if (gt911_read_regs(GT911_ADDRESS_HIGH, cmd, &point_status, 1) != NX_EOK) + { + read_num = 0; + goto exit_; + } + + if (point_status == 0) /* no data */ + { + read_num = 0; + goto exit_; + } + + if ((point_status & 0x80) == 0) /* data is not ready */ + { + read_num = 0; + goto exit_; + } + + touch_num = point_status & 0x0f; /* get point num */ + + if (touch_num > GT911_MAX_TOUCH) /* point num is not correct */ + { + read_num = 0; + goto exit_; + } + + cmd[0] = (NX_U8)((GT911_POINT1_REG >> 8) & 0xFF); + cmd[1] = (NX_U8)(GT911_POINT1_REG & 0xFF); + + /* read point num is touch_num */ + if (gt911_read_regs(GT911_ADDRESS_HIGH, cmd, read_buf, read_num * GT911_POINT_INFO_NUM) != NX_EOK) + { + NX_Printf("read point failed\n"); + read_num = 0; + goto exit_; + } + + if (pre_touch > touch_num) /* point up */ + { + for (read_index = 0; read_index < pre_touch; read_index++) + { + NX_U8 j; + + for (j = 0; j < touch_num; j++) /* this time touch num */ + { + read_id = read_buf[j * 8] & 0x0F; + + if (pre_id[read_index] == read_id) /* this id is not free */ + { + break; + } + + if (j >= touch_num - 1) + { + NX_U8 up_id; + up_id = pre_id[read_index]; + gt911_touch_up(buf, up_id); + } + } + } + } + + if (touch_num) /* point down */ + { + NX_U8 off_set; + + for (read_index = 0; read_index < touch_num; read_index++) + { + off_set = read_index * 8; + read_id = read_buf[off_set] & 0x0f; + pre_id[read_index] = read_id; + input_x = read_buf[off_set + 1] | (read_buf[off_set + 2] << 8); /* x */ + input_y = read_buf[off_set + 3] | (read_buf[off_set + 4] << 8); /* y */ + input_w = read_buf[off_set + 5] | (read_buf[off_set + 6] << 8); /* size */ + + gt911_touch_down(buf, read_id, input_x, input_y, input_w); + } + } + else if (pre_touch) + { + for (read_index = 0; read_index < pre_touch; read_index++) + { + gt911_touch_up(buf, pre_id[read_index]); + } + } + + pre_touch = touch_num; + +exit_: + write_buf[0] = (NX_U8)((GT911_READ_STATUS >> 8) & 0xFF); + write_buf[1] = (NX_U8)(GT911_READ_STATUS & 0xFF); + write_buf[2] = 0x00; + gt911_write_reg(GT911_ADDRESS_HIGH, write_buf, 3); + + return read_num; +} + +void NX_TouchDriverInit(void) +{ + d1_set_gpio_mode(GPIO_PORT_B, GPIO_PIN_2, OUTPUT); // rst + d1_set_gpio_mode(GPIO_PORT_B, GPIO_PIN_3, OUTPUT); // int + + d1_set_gpio_val(GPIO_PORT_B, GPIO_PIN_3, 0); + d1_set_gpio_val(GPIO_PORT_B, GPIO_PIN_2, 0); + // NX_ClockTickDelayMillisecond(100); + + d1_set_gpio_val(GPIO_PORT_B, GPIO_PIN_2, 1); + + gt911_soft_reset(GT911_ADDRESS_HIGH); + NX_U8 config[512]; + + config[0] = (NX_U8)((GT911_CONFIG_REG >> 8) & 0xFF); + config[1] = (NX_U8)(GT911_CONFIG_REG & 0xFF); + NX_MemCopy(&config[2], GT911_CFG_TBL, sizeof(GT911_CFG_TBL)); + + // NX_ClockTickDelayMillisecond(10); + + gt911_write_reg(GT911_ADDRESS_HIGH, config, sizeof(GT911_CFG_TBL) + GT911_ADDR_LEN); +} + +static struct touch_data *read_data_t; +NX_PRIVATE void NX_TouchDriverThread(void *arg) +{ + read_data_t = (struct read_data *)NX_MemAlloc(sizeof(struct touch_data) * 2); + + while (1) + { + + gt911_read_point(read_data_t, 2); + NX_Printf("touch bar test\n"); + for (int i = 0; i < 2; i++) + { + if (read_data_t[i].event == TOUCH_EVENT_DOWN || read_data_t[i].event == TOUCH_EVENT_MOVE) + { + NX_Printf("%d %d %d %d %d\n", read_data_t[i].track_id, + read_data_t[i].x_coordinate, + read_data_t[i].y_coordinate, + read_data_t[i].timestamp, + read_data_t[i].width); + } + } + NX_ThreadSleep(10); + } +} diff --git a/src/platform/f133/hal/Kconfig b/src/platform/f133/hal/Kconfig deleted file mode 100644 index ceed10c1027fd88083eaebf10562bc4e76a52eda..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/Kconfig +++ /dev/null @@ -1,7 +0,0 @@ - -# -# HAL libs -# -source "src/platform/f133/hal/ccmu/Kconfig" -source "src/platform/f133/hal/gpio/Kconfig" -source "src/platform/f133/hal/uart/Kconfig" diff --git a/src/platform/f133/hal/Makefile b/src/platform/f133/hal/Makefile deleted file mode 100644 index 039a78aa918ead40a9e3be7f592a18377866c512..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/Makefile +++ /dev/null @@ -1,4 +0,0 @@ -SRC += ccmu/ -SRC += gpio/ -SRC += uart/ -SRC += init.c \ No newline at end of file diff --git a/src/platform/f133/hal/ccmu/Kconfig b/src/platform/f133/hal/ccmu/Kconfig deleted file mode 100644 index be295cde73520cfc7a3ff524ae680edc0c75eb19..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/Kconfig +++ /dev/null @@ -1,32 +0,0 @@ -menu "CCMU Devices" - -config DRIVERS_CCMU - bool "enable ccmu driver" - default y - -config DRIVERS_SUNXI_CLK - bool "enable sunxi ccmu driver" - depends on DRIVERS_CCMU - default n - -config DRIVERS_SUNXI_CCU - bool "enable sunxi-ng ccmu driver" - depends on DRIVERS_CCMU - default y - -config HAL_TEST_CLK - bool "enable sunxi ccmu hal APIs test command" - depends on DRIVERS_SUNXI_CLK - default n - -config HAL_TEST_CCU - bool "enable sunxi-ng ccmu hal APIs test command" - depends on DRIVERS_SUNXI_CCU - default n - -config NO_INFLUENCE_ON_CLOCK_SOURCE - bool "donot disable parent when clk disable" - depends on DRIVERS_CCMU - default n - -endmenu diff --git a/src/platform/f133/hal/ccmu/Makefile b/src/platform/f133/hal/ccmu/Makefile deleted file mode 100644 index 37c3c9d56cff1aa9111db1d03e733201655da645..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -SRC += hal_clk.c hal_reset.c - -SRC += sunxi-ng/ diff --git a/src/platform/f133/hal/ccmu/common_ccmu.h b/src/platform/f133/hal/ccmu/common_ccmu.h deleted file mode 100644 index 59f79b5c2c52d4f07b3c2bcda1699a6d0dd87f60..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/common_ccmu.h +++ /dev/null @@ -1,113 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __COMMON_CCMU_H__ -#define __COMMON_CCMU_H__ - -#if defined(CCMU_DBG_LEAVE_TINY) || defined(CCMU_DBG_LEAVE_HIGH) -#define CCMU_DBG(fmt,args...) printf("[CCMU:dbg..] %-*s:%d "fmt ,30, __func__, __LINE__, ##args) -#define CCMU_ERR(fmt,args...) printf("[CCMU:err**] %-*s:%d "fmt ,30, __func__, __LINE__, ##args) -#else -#define CCMU_DBG(fmt,args...) do{} while(0) -#define CCMU_ERR(fmt,args...) do{} while(0) -#endif - -#if defined(CCMU_DBG_LEAVE_HIGH) -#define CCMU_TRACE() printf("[CCMU:trace] %-*s:%d \n",30, __func__, __LINE__) -#define CCMU_TRACE_CLK(tpye, clk) printf("CCMU:trace %s:%d CLK "#tpye" id %d\n",__func__, __LINE__, clk) -#else -#define CCMU_TRACE() do{} while(0) -#define CCMU_TRACE_CLK(clk, rate) do{} while(0) -#endif - -typedef unsigned int hal_clk_id_t; - -#if !defined(CONFIG_DRIVERS_SUNXI_CLK) && !defined(CONFIG_DRIVERS_SUNXI_CCU) -typedef hal_clk_id_t hal_clk_t; -#endif - -/************************************************************************************************ -* Enum hal_clk_status_t -* @Description: This enum defines the return status of Clock APIs. User should check the return value after calling the APIs -*************************************************************************************************/ -typedef enum -{ - - HAL_CLK_STATUS_DISABLED = -1, - HAL_CLK_STATUS_ENABLED = 0, - HAL_CLK_STATUS_ERROR_CLK_FACTOR_REFUSED = -11, - HAL_CLK_STATUS_ERROR_CLK_NEED_DISABLED = -10, - HAL_CLK_STATUS_ERROR_CLK_PARENT_DISABLED = -9, - HAL_CLK_STATUS_ERROR_CLK_ENABLED_FAILED = -8, - HAL_CLK_STATUS_ERROR_CLK_ROUND_FAILED = -7, - HAL_CLK_STATUS_ERROR_CLK_SET_RATE_REFUSED = -6, - HAL_CLK_STATUS_ERROR_CLK_NOT_FOUND = -5, - HAL_CLK_STATUS_ERROT_CLK_UNDEFINED = -4, - HAL_CLK_STATUS_UNINITIALIZED = -3, /**< Uninitialized clock driver. */ - HAL_CLK_STATUS_INVALID_PARAMETER = -2, /**< Invalid parameter. */ - HAL_CLK_STATUS_ERROR = -1, /**< Unknown error. */ - HAL_CLK_STATUS_OK = 0, /**< Successful. */ -} hal_clk_status_t; - -#if defined(CONFIG_DRIVERS_SUNXI_CLK) - -#define HAL_SUNXI_CCU (0) -#define HAL_SUNXI_FIXED_CCU (1) - -#include "sunxi/clk.h" -typedef hal_clk_id_t hal_clk_t; - -#endif - -#if defined(CONFIG_DRIVERS_SUNXI_CCU) -/************************************************************************************************ -* Enum hal_clk_type_t -* @Description: This enum defines the type of Clock -*************************************************************************************************/ -typedef enum -{ - HAL_SUNXI_FIXED_CCU = 0, - HAL_SUNXI_RTC_CCU, - HAL_SUNXI_CCU, - HAL_SUNXI_AON_CCU, - HAL_SUNXI_R_CCU, - HAL_SUNXI_DSP, - HAL_SUNXI_CCU_NUMBER, -} hal_clk_type_t; - -#include "sunxi-ng/clk.h" -typedef struct clk* hal_clk_t; - -#endif - -#endif /* __COMMON_CCMU_H__ */ - diff --git a/src/platform/f133/hal/ccmu/hal_clk.c b/src/platform/f133/hal/ccmu/hal_clk.c deleted file mode 100644 index ba79dec190fa234b41e9ad71d1feb850afeab914..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/hal_clk.c +++ /dev/null @@ -1,130 +0,0 @@ -/* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. - * - * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in - *the the People's Republic of China and other countries. - * All Allwinner Technology Co.,Ltd. trademarks are used with permission. - * - * DISCLAIMER - * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. - * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) - * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN - * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. - * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS - * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. - * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. - * - * - * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT - * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING - * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE - * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include - -void hal_clock_init(void) -{ - CCMU_TRACE(); - clk_init(); -} - -hal_clk_t hal_clock_get(hal_clk_type_t type, hal_clk_id_t id) -{ - CCMU_TRACE(); - return clk_get(type, id); -} - -hal_clk_status_t hal_clock_put(hal_clk_t clk) -{ - CCMU_TRACE(); - return clk_put(clk); -} - -hal_clk_status_t hal_clk_set_parent(hal_clk_t clk, hal_clk_t parent) -{ - CCMU_TRACE(); - return clk_set_parent(clk, parent); -} - -hal_clk_t hal_clk_get_parent(hal_clk_t clk) -{ - CCMU_TRACE(); - return clk_get_parent(clk); -} - -u32 hal_clk_recalc_rate(hal_clk_t clk) -{ - u32 rate = 0; - - CCMU_TRACE(); - clk_recalc_rate(clk, &rate); - - return rate; -} - -u32 hal_clk_round_rate(hal_clk_t clk, u32 rate) -{ - u32 round_rate = 0; - - CCMU_TRACE(); - clk_round_rate(clk, rate, &round_rate); - - return round_rate; -} - -u32 hal_clk_get_rate(hal_clk_t clk) -{ - u32 rate; - - CCMU_TRACE(); - clk_get_rate(clk, &rate); - - return rate; -} - -hal_clk_status_t hal_clk_set_rate(hal_clk_t clk, u32 rate) -{ - hal_clk_status_t ret; - - CCMU_TRACE(); - ret = clk_set_rate(clk, rate); - - return ret; -} - -hal_clk_status_t hal_clock_is_enabled(hal_clk_t clk) -{ - CCMU_TRACE(); - return clk_is_enabled(clk); -} - -hal_clk_status_t hal_clock_enable(hal_clk_t clk) -{ - hal_clk_status_t ret; - - CCMU_TRACE(); - ret = clk_prepare_enable(clk); - - return ret; -} - - -hal_clk_status_t hal_clock_disable(hal_clk_t clk) -{ - hal_clk_status_t ret; - - CCMU_TRACE(); - ret = clk_disable_unprepare(clk); - - return ret; -} diff --git a/src/platform/f133/hal/ccmu/hal_reset.c b/src/platform/f133/hal/ccmu/hal_reset.c deleted file mode 100644 index 0bac919e650a0bc3c4b484b8644958ede876331e..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/hal_reset.c +++ /dev/null @@ -1,191 +0,0 @@ -#include -#include -#include -#include - -static LIST_HEAD(reset_control_list); - -int reset_control_register(struct reset_control_dev *rcdev) //for reset system -{ - if (rcdev) - { - list_add_tail(&rcdev->node, &reset_control_list); - return 0; - } - return -1; -} - -int reset_control_unregister(struct reset_control *reset) //for reset system -{ - struct reset_control_dev *rcdev = NULL; - - if (!rcdev) - { - return 0; - } - - list_for_each_entry(rcdev, &reset_control_list, node) - { - if (rcdev->type != reset->rcdev->type) - { - continue; - } - list_del(&rcdev->node); - return 0; - } - - return 0; -} - -#ifdef CONFIG_DRIVERS_SUNXI_CCU - -struct reset_control *hal_reset_control_get(hal_reset_type_t type, hal_reset_id_t id) -{ - struct reset_control_dev *rcdev = NULL; - struct reset_control *rc = NULL; - - rc = (struct reset_control *)malloc(sizeof(*rc)); - if (!rc) - { - return NULL; - } - - list_for_each_entry(rcdev, &reset_control_list, node) - { - if (rcdev->type != type) - { - continue; - } - if (rcdev->nr_resets < id) - { - continue; - } - rc->rcdev = rcdev; - rc->id = id; - rc->enable_count = 0; - return rc; - } - return NULL; -} - -int hal_reset_control_put(struct reset_control *reset) -{ - if (!reset) - return 0; - - free(reset); - return 0; -} - - -int hal_reset_control_assert(struct reset_control *reset) -{ - struct reset_control_dev *rcdev; - - if (!reset || !reset->rcdev) - { - return 0; - } - - rcdev = reset->rcdev; - - if (rcdev->ops && rcdev->ops->assert) - { - return rcdev->ops->assert(rcdev, reset->id); - } - - return -1; -} - -int hal_reset_control_deassert(struct reset_control *reset) -{ - struct reset_control_dev *rcdev; - - if (!reset || !reset->rcdev) - { - return 0; - } - - rcdev = reset->rcdev; - - if (rcdev->ops && rcdev->ops->deassert) - { - return rcdev->ops->deassert(rcdev, reset->id); - } - - return -1; -} - -int hal_reset_control_reset(struct reset_control *reset) -{ - struct reset_control_dev *rcdev; - - if (!reset || !reset->rcdev) - { - return 0; - } - - rcdev = reset->rcdev; - - if (rcdev->ops && rcdev->ops->deassert) - { - return rcdev->ops->reset(rcdev, reset->id); - } - - return -1; -} - - -int hal_reset_control_status(struct reset_control *reset) -{ - - struct reset_control_dev *rcdev; - - if (!reset || !reset->rcdev) - { - return 0; - } - - rcdev = reset->rcdev; - - if (rcdev->ops && rcdev->ops->deassert) - { - return rcdev->ops->status(rcdev, reset->id); - } - - return 0; -} - -#else - -struct reset_control *hal_reset_control_get(hal_reset_type_t type_id, u32 reset_id) -{ - return NULL; -} - -int hal_reset_control_put(struct reset_control *reset) -{ - return 0; -} - - -int hal_reset_control_assert(struct reset_control *reset) -{ - return 0; -} - -int hal_reset_control_deassert(struct reset_control *reset) -{ - return 0; -} - -int hal_reset_control_reset(struct reset_control *reset) -{ - return 0; -} - -int hal_reset_control_status(struct reset_control *reset) -{ - return 0; -} -#endif diff --git a/src/platform/f133/hal/ccmu/platform_ccmu.h b/src/platform/f133/hal/ccmu/platform_ccmu.h deleted file mode 100644 index 99779872247f9b93d825760ee916c335a2958b94..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/platform_ccmu.h +++ /dev/null @@ -1,67 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __PLATFORM_CCMU_H__ -#define __PLATFORM_CCMU_H__ - -#if defined(CONFIG_DRIVERS_SUNXI_CLK) -#include "./sunxi/platform_clk.h" -#if defined(CONFIG_SOC_SUN20IW3) || defined(CONFIG_ARCH_SUN8IW21) -#include "./sunxi/sun8iw21p1/clk_sun8iw21.h" -#endif -#endif - -#if defined(CONFIG_DRIVERS_SUNXI_CCU) - -#if defined(CONFIG_SOC_SUN20IW1) || defined(CONFIG_ARCH_SUN8IW20) -#include "./sunxi-ng/clk-fixed-rate.h" -#include "./sunxi-ng/ccu-sun8iw20.h" -#include "./sunxi-ng/ccu-sun8iw20-r.h" -#include "./sunxi-ng/ccu-sun8iw20-rtc.h" -#endif - -#if defined(CONFIG_ARCH_SUN20IW2) -#include "./sunxi-ng/clk-fixed-rate.h" -#include "./sunxi-ng/ccu-sun20iw2.h" -#include "./sunxi-ng/ccu-sun20iw2-aon.h" -#include "./sunxi-ng/ccu-sun20iw2-r.h" -#endif - -#if defined(CONFIG_ARCH_SUN55IW3) -#include "./sunxi-ng/clk-fixed-rate.h" -#include "./sunxi-ng/ccu-sun55iw3.h" -#include "./sunxi-ng/ccu-sun55iw3-dsp.h" -#include "./sunxi-ng/ccu-sun55iw3-r.h" -#endif - -#endif -#endif /* __PLATFORM_CCMU_H__ */ diff --git a/src/platform/f133/hal/ccmu/platform_rst.h b/src/platform/f133/hal/ccmu/platform_rst.h deleted file mode 100644 index 9cee7c7fa13cfb61e00e01b0505a6918fa64d083..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/platform_rst.h +++ /dev/null @@ -1,57 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __PLATFORM_RST_H__ -#define __PLATFORM_RST_H__ - -#if defined(CONFIG_DRIVERS_SUNXI_CCU) - -#if defined(CONFIG_SOC_SUN20IW1) || defined(CONFIG_ARCH_SUN8IW20) -#include "sunxi-ng/rst-sun8iw20.h" -#include "sunxi-ng/rst-sun8iw20-r.h" -#endif - -#if defined(CONFIG_ARCH_SUN20IW2) -#include "sunxi-ng/rst-sun20iw2.h" -#include "sunxi-ng/rst-sun20iw2-r.h" -#include "sunxi-ng/rst-sun20iw2-aon.h" -#endif - -#if defined(CONFIG_ARCH_SUN55IW3) -#include "sunxi-ng/rst-sun55iw3.h" -#include "sunxi-ng/rst-sun55iw3-dsp.h" -#include "sunxi-ng/rst-sun55iw3-r.h" -#endif - -#endif - -#endif /* __PLATFORM_RST_H__ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/Makefile b/src/platform/f133/hal/ccmu/sunxi-ng/Makefile deleted file mode 100644 index 213e2d8ec690c0ea006b1914769687f9ad38d6b6..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/Makefile +++ /dev/null @@ -1,22 +0,0 @@ -SRC += clk.c -SRC += ccu.c -SRC += ccu_mux.c -SRC += ccu_nm.c -SRC += ccu_common.c -SRC += ccu_reset.c -SRC += ccu_div.c -SRC += ccu_frac.c -SRC += ccu_gate.c -SRC += ccu_mp.c -SRC += ccu_mult.c -SRC += ccu_nk.c -SRC += ccu_nkm.c -SRC += ccu_nkmp.c -SRC += ccu_sdm.c -SRC += clk-fixed-factor.c -SRC += clk-fixed-rate.c -SRC += clk-divider.c - -SRC += ccu-sun8iw20.c -SRC += ccu-sun8iw20-r.c -SRC += ccu-sun8iw20-rtc.c diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2-aon.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2-aon.c deleted file mode 100644 index 1be43199b0c937a71c6a7c2cb73ab41ea562caa3..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2-aon.c +++ /dev/null @@ -1,705 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2020 huangzhenwei@allwinnertech.com - */ -#include "ccu.h" -#include "ccu_common.h" -#include "ccu_reset.h" -#include "ccu_div.h" -#include "ccu_gate.h" -#include "ccu_mp.h" -#include "ccu_mult.h" -#include "ccu_nk.h" -#include "ccu_nkm.h" -#include "ccu_nkmp.h" -#include "ccu_nm.h" -#include "type.h" - -#include "ccu-sun20iw2-aon.h" -#include -#include - -/* ccu_des_start */ -/* - * The CPU PLL is actually NP clock, with P being /1, /2 or /4. However - * P should only be used for output frequencies lower than 288 MHz. - * - * For now we can just model it as a multiplier clock, and force P to /1. - * - * The M factor is present in the register's description, but not in the - * frequency formula, and it's documented as "M is only used for backdoor - * testing", so it's not modelled and then force to 0. - */ - -static struct ccu_reset_map sun20iw2_ccu_on_resets[] = -{ -/* Module Reset Control Register */ - [RST_BLE_RTC] = { 0x0c8, BIT(16) }, - [RST_MADCFG] = { 0x0c8, BIT(15) }, - [RST_WLAN_CONN] = { 0x0c8, BIT(13) }, - [RST_WLAN] = { 0x0c8, BIT(12) }, - [RST_CODEC_DAC] = { 0x0c8, BIT(10) }, - [RST_RFAS] = { 0x0c8, BIT(9) }, - [RST_RCCAL] = { 0x0c8, BIT(8) }, - [RST_LPSD] = { 0x0c8, BIT(7) }, - [RST_AON_TIMER] = { 0x0c8, BIT(6) }, - [RST_CODEC_ADC] = { 0x0c8, BIT(5) }, - [RST_MAD] = { 0x0c8, BIT(4) }, - [RST_DMIC] = { 0x0c8, BIT(3) }, - [RST_GPADC] = { 0x0c8, BIT(2) }, - [RST_LPUART1] = { 0x0c8, BIT(1) }, - [RST_LPUART0] = { 0x0c8, BIT(0) }, - [RST_BLE_32M] = { 0x0cc, BIT(17) }, - [RST_BLE_48M] = { 0x0cc, BIT(16) }, - -}; -/* rst_def_end */ - -/* HOSC TYPE */ -static const char *const hosc_parents[] = { "dcxo26M", "dcxo40M", "dcxo24M", "dcxo32M", "dcxo24_576M" }; -static SUNXI_CCU_MUX(hosc_clk, "hosc", hosc_parents, 0x084, 0, 3, 0); -/* HOSC Frequency Detect Register0 */ -static SUNXI_CCU_GATE(hosc_detect_clk, "hosc-detect", "hosc", 0x080, BIT(0), 0); - -/* DPLL1 Control Register */ -static struct ccu_nm dpll1_clk = -{ - .enable = BIT(31), - .n = _SUNXI_CCU_MULT_OFFSET(4, 8, 0), - .m = _SUNXI_CCU_DIV_OFFSET(0, 4, 0), /* input divider */ - .common = { - .reg = 0x08c, - .hw.init = CLK_HW_INIT("dpll1", "hosc", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE), - }, -}; - -/* DPLL2 Control Register */ -static struct ccu_nm dpll2_clk = -{ - .enable = BIT(31), - .n = _SUNXI_CCU_MULT_OFFSET(4, 8, 0), - .m = _SUNXI_CCU_DIV_OFFSET(0, 4, 0), /* input divider */ - .common = { - .reg = 0x090, - .hw.init = CLK_HW_INIT("dpll2", "hosc", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE), - }, -}; - -/* DPLL3 Control Register */ -static struct ccu_nm dpll3_clk = -{ - .enable = BIT(31), - .n = _SUNXI_CCU_MULT_OFFSET(4, 8, 0), - .m = _SUNXI_CCU_DIV_OFFSET(0, 4, 0), /* input divider */ - .common = { - .reg = 0x094, - .hw.init = CLK_HW_INIT("dpll3", "hosc", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE), - }, -}; - -CLK_FIXED_FACTOR_FW_NAME(rfip0_dpll, "rfip0-dpll", "dpll1", - 12, 1, 0); - -CLK_FIXED_FACTOR_FW_NAME(rfip1_dpll, "rfip1-dpll", "dpll3", - 12, 1, 0); - -/* Audio PLL Control Register */ - -#define SUN20IW2_PLL_AUDIO_REG 0x4004c498 -static struct ccu_sdm_setting pll_audio_sdm_table[] = -{ - { .rate = 45158400, .pattern = 0xc001bcd3, .m = 18, .n = 33 }, - { .rate = 49152000, .pattern = 0xc001eb85, .m = 20, .n = 40 }, - { .rate = 90370370, .pattern = 0xc001288d, .m = 27, .n = 61 }, - { .rate = 98333333, .pattern = 0xc001eb85, .m = 24, .n = 59 }, -}; - -static struct ccu_nm pll_audio_clk = -{ - .lock = BIT(28), - .n = _SUNXI_CCU_MULT(8, 7), - .m = _SUNXI_CCU_DIV(0, 5), - .sdm = _SUNXI_CCU_SDM(pll_audio_sdm_table, BIT(31), - 0x178, BIT(31)), - .common = { - .reg = 0x098, - .features = CCU_FEATURE_SIGMA_DELTA_MOD, - .hw.init = CLK_HW_INIT("pll-audio", "hosc", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE), - }, -}; - -static CLK_FIXED_FACTOR_HW(pll_audio2x_clk, "pll-audio2x", - &pll_audio_clk.common.hw, 2, 1, 0); -static CLK_FIXED_FACTOR_HW(pll_audio1x_clk, "pll-audio1x", - &pll_audio_clk.common.hw, 4, 1, 0); - -/* DPLL1 Output Configure Register */ -static SUNXI_CCU_GATE(ck1_usb_clk, "ck1-usb", "hosc", 0x0a4, BIT(31), 0); - -static struct clk_div_table aud_div_table[] = -{ - { .val = 0, .div = 85 }, - { .val = 1, .div = 39 }, - { /* Sentinel */ }, -}; - -static SUNXI_CCU_DIV_TABLE_WITH_GATE(ck1_aud_clk, "ck1-aud", "dpll1", - 0x0a4, 24, 1, aud_div_table, BIT(27), 0); - -static struct clk_div_table dev_div_table[] = -{ - { .val = 0, .div = 7 }, - { .val = 1, .div = 6 }, - { .val = 2, .div = 5 }, - { /* Sentinel */ }, -}; - -static SUNXI_CCU_DIV_TABLE_WITH_GATE(ck1_dev_clk, "ck1-dev", "dpll1", - 0x0a4, 20, 2, dev_div_table, BIT(23), 0); - -static struct clk_div_table ck1_lspsram_div_table[] = -{ - { .val = 0, .div = 8 }, - { .val = 1, .div = 7 }, - { .val = 2, .div = 6 }, - { .val = 3, .div = 5 }, - { .val = 4, .div = 4 }, - { /* Sentinel */ }, -}; -static SUNXI_CCU_DIV_TABLE_WITH_GATE(ck1_lspsram_clk, "ck1-lspsram", "dpll1", - 0x0a4, 16, 3, ck1_lspsram_div_table, BIT(19), 0); - -static struct clk_div_table hspsram_div_table[] = -{ - { .val = 0, .div = 6 }, - { .val = 1, .div = 5 }, - { .val = 2, .div = 4 }, - { .val = 3, .div = 2 }, - { /* Sentinel */ }, -}; - -static SUNXI_CCU_DIV_TABLE_WITH_GATE(ck1_hspsram_pre_clk, "ck1-hspsram-pre", "dpll1", - 0x0a4, 12, 2, hspsram_div_table, BIT(15), 0); -static CLK_FIXED_FACTOR_FW_NAME(ck1_hspsram_clk, "ck1-hspsram", "ck1-hspsram-pre", - 1, 2, CLK_SET_RATE_PARENT); - -static struct clk_div_table hifi5_div_table[] = -{ - { .val = 0, .div = 7 }, - { .val = 1, .div = 6 }, - { .val = 2, .div = 5 }, - { .val = 3, .div = 4 }, - { .val = 4, .div = 3 }, - { /* Sentinel */ }, -}; - -static SUNXI_CCU_DIV_TABLE_WITH_GATE(ck1_hifi5_clk, "ck1-hifi5", "dpll1", - 0x0a4, 8, 3, hifi5_div_table, BIT(11), 0); - -static struct clk_div_table c906_div_table[] = -{ - { .val = 0, .div = 14 }, - { .val = 1, .div = 8 }, - { .val = 2, .div = 6 }, - { .val = 3, .div = 5 }, - { .val = 4, .div = 4 }, - { /* Sentinel */ }, -}; - -static SUNXI_CCU_DIV_TABLE_WITH_GATE(ck1_c906_pre_clk, "ck1-c906-pre", "dpll1", - 0x0a4, 4, 3, c906_div_table, BIT(7), 0); -static CLK_FIXED_FACTOR_FW_NAME(ck1_c906_clk, "ck1-c906", "ck1-c906-pre", - 1, 2, CLK_SET_RATE_PARENT); - -static struct clk_div_table m33_div_table[] = -{ - { .val = 0, .div = 8 }, - { .val = 1, .div = 7 }, - { .val = 2, .div = 6 }, - { .val = 3, .div = 5 }, - { .val = 4, .div = 4 }, - { /* Sentinel */ }, -}; - -static SUNXI_CCU_DIV_TABLE_WITH_GATE(ck1_m33_clk, "ck1-m33", "dpll1", - 0x0a4, 0, 3, m33_div_table, BIT(3), 0); - -/* DPLL3 Output Configure Register */ -static struct clk_div_table ck3_dev_div_table[] = -{ - { .val = 1, .div = 6 }, - { .val = 2, .div = 5 }, - { .val = 3, .div = 4 }, - { /* Sentinel */ }, -}; - -static SUNXI_CCU_DIV_TABLE_WITH_GATE(ck3_dev_clk, "ck3-dev", "dpll3", - 0x0a8, 20, 2, ck3_dev_div_table, BIT(23), 0); - -static struct clk_div_table ck3_lspsram_div_table[] = -{ - { .val = 0, .div = 8 }, - { .val = 1, .div = 7 }, - { .val = 2, .div = 6 }, - { .val = 3, .div = 5 }, - { .val = 4, .div = 4 }, - { /* Sentinel */ }, -}; - -static SUNXI_CCU_DIV_TABLE_WITH_GATE(ck3_lspsram_clk, "ck3-lspsram", "dpll3", - 0x0a8, 16, 3, ck3_lspsram_div_table, BIT(19), 0); - -static struct clk_div_table ck3_hspsram_div_table[] = -{ - { .val = 0, .div = 6 }, - { .val = 1, .div = 5 }, - { .val = 2, .div = 4 }, - { .val = 3, .div = 2 }, - { /* Sentinel */ }, -}; - -static SUNXI_CCU_DIV_TABLE_WITH_GATE(ck3_hspsram_pre_clk, "ck3-hspsram-pre", "dpll3", - 0x0a8, 12, 2, ck3_hspsram_div_table, BIT(15), 0); -static CLK_FIXED_FACTOR_FW_NAME(ck3_hspsram_clk, "ck3-hspsram", "ck3-hspsram-pre", - 1, 2, CLK_SET_RATE_PARENT); - -static struct clk_div_table ck3_hifi5_div_table[] = -{ - { .val = 0, .div = 7 }, - { .val = 1, .div = 6 }, - { .val = 2, .div = 5 }, - { .val = 3, .div = 4 }, - { .val = 4, .div = 3 }, - { /* Sentinel */ }, -}; - -static SUNXI_CCU_DIV_TABLE_WITH_GATE(ck3_hifi5_clk, "ck3-hifi5", "dpll3", - 0x0a8, 8, 3, ck3_hifi5_div_table, BIT(11), 0); - -static struct clk_div_table ck3_c906_div_table[] = -{ - { .val = 0, .div = 14 }, - { .val = 1, .div = 8 }, - { .val = 2, .div = 6 }, - { .val = 3, .div = 5 }, - { .val = 4, .div = 4 }, - { /* Sentinel */ }, -}; - -static SUNXI_CCU_DIV_TABLE_WITH_GATE(ck3_c906_pre_clk, "ck3-c906-pre", "dpll3", - 0x0a8, 4, 3, ck3_c906_div_table, BIT(7), 0); -static CLK_FIXED_FACTOR_FW_NAME(ck3_c906_clk, "ck3-c906", "ck3-c906-pre", - 1, 2, CLK_SET_RATE_PARENT); -static struct clk_div_table ck3_m33_div_table[] = -{ - { .val = 0, .div = 8 }, - { .val = 1, .div = 7 }, - { .val = 2, .div = 6 }, - { .val = 3, .div = 5 }, - { .val = 4, .div = 4 }, - { /* Sentinel */ }, -}; - -static SUNXI_CCU_DIV_TABLE_WITH_GATE(ck3_m33_clk, "ck3-m33", "dpll3", - 0x0a8, 0, 3, ck3_m33_div_table, BIT(3), 0); - -/* AUDPLL and DPLL3 LDO Control Register */ -static SUNXI_CCU_GATE(ldo_bypass_clk, "ldo-bypass", "hosc", 0x0ac, BIT(1), 0); -static SUNXI_CCU_GATE(ldo2_en_clk, "ldo2-en", "hosc", 0x0ac, BIT(16), 0); -static SUNXI_CCU_GATE(ldo1_en_clk, "ldo1-en", "hosc", 0x0ac, BIT(0), 0); - -/* Wlan BT PFTP Contrcl Rigister */ -static SUNXI_CCU_GATE(wlan_bt_debug_sel0_clk, "wlan-bt-debug0-sel", "hosc", 0x0c4, BIT(4), 0); -static SUNXI_CCU_GATE(wlan_bt_debug_sel1_clk, "wlan-bt-debug1-sel", "hosc", 0x0c4, BIT(5), 0); -static SUNXI_CCU_GATE(wlan_bt_debug_sel2_clk, "wlan-bt-debug2-sel", "hosc", 0x0c4, BIT(6), 0); -static SUNXI_CCU_GATE(wlan_bt_debug_sel3_clk, "wlan-bt-debug3-sel", "hosc", 0x0c4, BIT(7), 0); -static SUNXI_CCU_GATE(wlan_bt_debug_sel4_clk, "wlan-bt-debug4-sel", "hosc", 0x0c4, BIT(8), 0); -static SUNXI_CCU_GATE(wlan_bt_debug_sel5_clk, "wlan-bt-debug5-sel", "hosc", 0x0c4, BIT(9), 0); -static SUNXI_CCU_GATE(wlan_bt_debug_sel6_clk, "wlan-bt-debug6-sel", "hosc", 0x0c4, BIT(10), 0); -static SUNXI_CCU_GATE(wlan_bt_debug_sel7_clk, "wlan-bt-debug7-sel", "hosc", 0x0c4, BIT(11), 0); -static const char *const wlan_bt_sel_parents[] = { "rfip0-dpll", "rfip1-dpll" }; -static SUNXI_CCU_MUX(wlan_sel_clk, "wlan_sel", wlan_bt_sel_parents, 0x0c4, 2, 1, 0); -static SUNXI_CCU_MUX(bt_sel_clk, "bt_sel", wlan_bt_sel_parents, 0x0c4, 1, 1, 0); -static SUNXI_CCU_GATE(pfip2_gate_clk, "pfip2-gate", "hosc", 0x0c4, BIT(0), 0); - -/* Module Clock Enable Register */ -static SUNXI_CCU_GATE(ble_32m_clk, "ble-32m", "hosc", 0x0cc, BIT(17), 0); -static SUNXI_CCU_GATE(ble_48m_clk, "ble-48m", "hosc", 0x0cc, BIT(16), 0); -static SUNXI_CCU_GATE(mad_ahb_gate_clk, "mad_ahb_gate", "sys", 0x0cc, BIT(15), 0); -static SUNXI_CCU_GATE(gpio_gate_clk, "gpio_gate", "hosc", 0x0cc, BIT(11), 0); -static SUNXI_CCU_GATE(bus_codec_dac_clk, "bus_codec_dac", "hosc", 0x0cc, BIT(10), 0); -static SUNXI_CCU_GATE(rccal_clk, "rccal", "hosc", 0x0cc, BIT(8), 0); -static SUNXI_CCU_GATE(bus_codec_adc_clk, "bus_codec_adc", "hosc", 0x0cc, BIT(5), 0); -static SUNXI_CCU_GATE(mad_apb_gate_clk, "mad_apb_gate", "apb", 0x0cc, BIT(4), 0); -static SUNXI_CCU_GATE(dmic_bus_clk, "dmic-bus", "hosc", 0x0cc, BIT(3), 0); -static SUNXI_CCU_GATE(gpadc_clk, "gpadc", "hosc", 0x0cc, BIT(2), 0); -static SUNXI_CCU_GATE(lpuart1_wkup_clk, "lpuart1-wkup", "hosc", 0x0cc, BIT(1), 0); -static SUNXI_CCU_GATE(lpuart0_wkup_clk, "lpuart0-wkup", "hosc", 0x0cc, BIT(0), 0); - -/* LPUART0 Control Register */ -static const char *const lpuart0_parents[] = { "fix-losc", "hosc" }; -static SUNXI_CCU_MUX_WITH_GATE(lpuart0_clk, "lpuart0", lpuart0_parents, 0x0d0, 0, 1, BIT(31), 0); - -/* LPUART1 Control Register */ -static const char *const lpuart1_parents[] = { "fix-losc", "hosc" }; -static SUNXI_CCU_MUX_WITH_GATE(lpuart1_clk, "lpuart1", lpuart1_parents, 0x0d4, 0, 1, BIT(31), 0); - -/* GPADC Clock Control Register */ -static const char *const gpadc_parents[] = { "hosc", "fix-losc" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(gpadc_ctrl_clk, "gpadc_ctrl", gpadc_parents, 0x0d8, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -/* Audio Clock Control Register */ -static const char *const spdif_tx_parents[] = { "audpll-hosc-sel", "ck1-aud-div" }; -static SUNXI_CCU_MUX_WITH_GATE(spdif_tx_clk, "spdif-tx", spdif_tx_parents, 0x0dc, 21, 1, BIT(27), 0); -static const char *const i2s_parents[] = { "audpll-hosc-sel", "ck1-aud-div" }; -static SUNXI_CCU_MUX_WITH_GATE(i2s_clk, "i2s", i2s_parents, 0x0dc, 20, 1, BIT(26), 0); -static const char *const codec_dac_parents[] = { "audpll-hosc-sel", "ck1-aud-div" }; -static SUNXI_CCU_MUX_WITH_GATE(codec_dac_clk, "codec-dac", codec_dac_parents, 0x0dc, 19, 1, BIT(25), 0); - -static const char *const codec_adc_sel1_parents[] = { "codec-adc-div", "aud-rco-div" }; -static SUNXI_CCU_MUX(codec_adc_sel1_clk, "codec-adc-sel1", codec_adc_sel1_parents, 0x0dc, 18, 1, 0); -static SUNXI_CCU_GATE(codec_adc_gate_clk, "codec-adc-gate", "hosc", 0x0dc, BIT(24), 0); - -static SUNXI_CCU_GATE(dmic_gate_clk, "dmic-gate", "hosc", 0x0dc, BIT(28), 0); - -static const char *const audpll_parents[] = { "pll-audio1x", "pll-audio2x", "hosc", "daudio-mclk-in" }; -static SUNXI_CCU_MUX(audpll_hosc_sel_clk, "audpll-hosc-sel", audpll_parents, 0x0dc, 15, 2, 0); - -static const char *const codec_adc_div_parents[] = { "audpll-hosc-sel", "ck1-aud-div" }; -static SUNXI_CCU_M_WITH_MUX(codec_adc_div_clk, "codec-adc-div", - codec_adc_div_parents, 0x0dc, 8, 4, - 17, 1, 0); - -static SUNXI_CCU_M(ck1_aud_div_clk, "ck1-aud-div", - "ck1-aud", 0x0dc, 4, 4, 0); - -static SUNXI_CCU_M(aud_rco_div_clk, "aud-rco-div", - "rc-hf", 0x0dc, 0, 3, 0); - -/* System Clock Control Register */ -static const char *const hspsram_clk_parents[] = { "ck1-hspsram", "ck3-hspsram" }; -static SUNXI_CCU_MUX(ckpll_hspsram_sel_clk, "ckpll-hspsram-sel", hspsram_clk_parents, 0x0e0, 21, 1, 0); - -static const char *const lspsram_clk_parents[] = { "ck1-lspsram", "ck3-lspsram" }; -static SUNXI_CCU_MUX(ckpll_lspsram_sel_clk, "ckpll-lspsram-sel", lspsram_clk_parents, 0x0e0, 20, 1, 0); - -static const char *const ck_m33_parents[] = { "ck1-m33", "ck3-m33" }; -static SUNXI_CCU_MUX(ck_m33_clk, "ck-m33", ck_m33_parents, 0x0e0, 19, 1, 0); - -static const char *const ck_hifi5_parents[] = { "ck1-hifi5", "ck3-hifi5" }; -static SUNXI_CCU_MUX(ckpll_hifi5_sel_clk, "ckpll-hifi5-sel", ck_hifi5_parents, 0x0e0, 18, 1, 0); - -static const char *const ck_c906_parents[] = { "ck1-c906", "ck3-c906" }; -static SUNXI_CCU_MUX(ckpll_c906_sel_clk, "ckpll-c906-sel", ck_c906_parents, 0x0e0, 17, 1, 0); - -static const char *const ck_dev_parents[] = { "ck1-dev", "ck3-dev" }; -static SUNXI_CCU_MUX(ck_dev_clk, "ck-dev", ck_dev_parents, 0x0e0, 16, 1, 0); - -static SUNXI_CCU_M(sys_clk, "sys", "ck-m33", 0x0e0, 8, 4, 0); - -static const char *const ar200a_parents[] = { "hosc", "fix-losc", "sys", "aud-rco-div" }; -static SUNXI_CCU_MUX(ar200a_f_clk, "ar200a-f", ar200a_parents, 0x0e0, 12, 2, 0); - - -static struct clk_div_table apb_div_table[] = -{ - { .val = 0, .div = 1 }, - { .val = 1, .div = 2 }, - { .val = 2, .div = 4 }, - { .val = 3, .div = 8 }, - { /* Sentinel */ }, -}; -static SUNXI_CCU_DIV_TABLE(hfclk_div_clk, "hfclk-div", "hosc", 0x0e0, - 4, 2, apb_div_table, 0); - -static SUNXI_CCU_DIV_TABLE(lfclk_div_clk, "lfclk-div", "fix-losc", 0x0e0, - 4, 2, apb_div_table, 0); - -static SUNXI_CCU_DIV_TABLE(ahb_div_clk, "ahb-div", "ar200a-f", 0x0e0, - 4, 2, apb_div_table, 0); - -static const char *apb_parents[] = { "hfclk-div", "lfclk-div", - "ahb-div", "aud-rco-div" }; -static SUNXI_CCU_MUX(apb_clk, "apb", apb_parents, - 0x0e0, - 6, 2, /* mux */ - CLK_IS_CRITICAL); - -static SUNXI_CCU_M(device_clk, "device-clk", - "ck-dev", 0x0e0, 0, 4, - CLK_IS_CRITICAL); - -/* MAD_lpsd_clk control register */ -/* there is no actual mux,just for use this macro */ -static const char *const mad_lpsd_clk_parents[] = { "codec-adc-sel1" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(mad_lpsd_clk, "mad-lpsd", mad_lpsd_clk_parents, 0x0e4, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -/* SPDIF_RX_clock control register */ -static const char *const spdif_rx_parents[] = { "ck1-m33", "ckpll-hifi5-sel", "ckpll-c906-sel", "ck3-m33" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(spdif_rx_clk, "spdif-rx", spdif_rx_parents, 0x0e8, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -/* I2S_ASRC_clk control register */ -static const char *const i2s_asrc_parents[] = { "ck-m33", "ckpll-hifi5-sel", "ckpll-c906-sel" ,"ck3-hifi5" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(i2s_asrc_clk, "i2s-asrc", i2s_asrc_parents, 0x0ec, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -static struct ccu_common *sun20iw2_ccu_on_clks[] = -{ - &hosc_clk.common, - &hosc_detect_clk.common, - &dpll1_clk.common, - &dpll2_clk.common, - &dpll3_clk.common, - &pll_audio_clk.common, - &ck1_usb_clk.common, - &ck1_aud_clk.common, - &ck1_dev_clk.common, - &ck1_lspsram_clk.common, - &ck1_hspsram_pre_clk.common, - &ck1_hifi5_clk.common, - &ck1_c906_pre_clk.common, - &ck1_m33_clk.common, - &ck3_dev_clk.common, - &ck3_lspsram_clk.common, - &ck3_hspsram_pre_clk.common, - &ck3_hifi5_clk.common, - &ck3_c906_pre_clk.common, - &ck3_m33_clk.common, - &ldo_bypass_clk.common, - &ldo2_en_clk.common, - &ldo1_en_clk.common, - &wlan_bt_debug_sel0_clk.common, - &wlan_bt_debug_sel1_clk.common, - &wlan_bt_debug_sel2_clk.common, - &wlan_bt_debug_sel3_clk.common, - &wlan_bt_debug_sel4_clk.common, - &wlan_bt_debug_sel5_clk.common, - &wlan_bt_debug_sel6_clk.common, - &wlan_bt_debug_sel7_clk.common, - &wlan_sel_clk.common, - &bt_sel_clk.common, - &pfip2_gate_clk.common, - &ble_32m_clk.common, - &ble_48m_clk.common, - &mad_ahb_gate_clk.common, - &gpio_gate_clk.common, - &bus_codec_dac_clk.common, - &rccal_clk.common, - &bus_codec_adc_clk.common, - &mad_apb_gate_clk.common, - &dmic_bus_clk.common, - &gpadc_clk.common, - &lpuart1_wkup_clk.common, - &lpuart0_wkup_clk.common, - &lpuart0_clk.common, - &lpuart1_clk.common, - &gpadc_ctrl_clk.common, - &dmic_gate_clk.common, - &spdif_tx_clk.common, - &i2s_clk.common, - &codec_dac_clk.common, - &codec_adc_sel1_clk.common, - &codec_adc_gate_clk.common, - &audpll_hosc_sel_clk.common, - &codec_adc_div_clk.common, - &ck1_aud_div_clk.common, - &aud_rco_div_clk.common, - &ckpll_hspsram_sel_clk.common, - &ckpll_lspsram_sel_clk.common, - &ck_m33_clk.common, - &ckpll_hifi5_sel_clk.common, - &ckpll_c906_sel_clk.common, - &ck_dev_clk.common, - &sys_clk.common, - &ar200a_f_clk.common, - &hfclk_div_clk.common, - &lfclk_div_clk.common, - &ahb_div_clk.common, - &apb_clk.common, - &device_clk.common, - &mad_lpsd_clk.common, - &spdif_rx_clk.common, - &i2s_asrc_clk.common, -}; -/* ccu_def_start */ -static struct clk_hw_onecell_data sun20iw2_ccu_on_hw_clks = -{ - .hws = { - [CLK_HOSC] = &hosc_clk.common.hw, - [CLK_HOSC_DETECT] = &hosc_detect_clk.common.hw, - [CLK_DPLL1] = &dpll1_clk.common.hw, - [CLK_DPLL2] = &dpll2_clk.common.hw, - [CLK_DPLL3] = &dpll3_clk.common.hw, - [RFIP0_DPLL] = &rfip0_dpll.hw, - [RFIP1_DPLL] = &rfip1_dpll.hw, - [CLK_PLL_AUDIO] = &pll_audio_clk.common.hw, - [CLK_PLL_AUDIO1X] = &pll_audio1x_clk.hw, - [CLK_PLL_AUDIO2X] = &pll_audio2x_clk.hw, - [CLK_CK1_USB] = &ck1_usb_clk.common.hw, - [CLK_CK1_AUD] = &ck1_aud_clk.common.hw, - [CLK_CK1_DEV] = &ck1_dev_clk.common.hw, - [CLK_CK1_LSPSRAM] = &ck1_lspsram_clk.common.hw, - [CLK_CK1_HSPSRAM_PRE] = &ck1_hspsram_pre_clk.common.hw, - [CLK_CK1_HSPSRAM] = &ck1_hspsram_clk.hw, - [CLK_CK1_HIFI5] = &ck1_hifi5_clk.common.hw, - [CLK_CK1_C906_PRE] = &ck1_c906_pre_clk.common.hw, - [CLK_CK1_C906] = &ck1_c906_clk.hw, - [CLK_CK1_M33] = &ck1_m33_clk.common.hw, - [CLK_CK3_DEV] = &ck3_dev_clk.common.hw, - [CLK_CK3_LSPSRAM] = &ck3_lspsram_clk.common.hw, - [CLK_CK3_HSPSRAM_PRE] = &ck3_hspsram_pre_clk.common.hw, - [CLK_CK3_HSPSRAM] = &ck3_hspsram_clk.hw, - [CLK_CK3_HIFI5] = &ck3_hifi5_clk.common.hw, - [CLK_CK3_C906_PRE] = &ck3_c906_pre_clk.common.hw, - [CLK_CK3_C906] = &ck3_c906_clk.hw, - [CLK_CK3_M33] = &ck3_m33_clk.common.hw, - [CLK_LDO_BYPASS] = &ldo_bypass_clk.common.hw, - [CLK_LDO2_EN] = &ldo2_en_clk.common.hw, - [CLK_LDO1_EN] = &ldo1_en_clk.common.hw, - [CLK_WLAN_BT_DEBUG_SEL0] = &wlan_bt_debug_sel0_clk.common.hw, - [CLK_WLAN_BT_DEBUG_SEL1] = &wlan_bt_debug_sel1_clk.common.hw, - [CLK_WLAN_BT_DEBUG_SEL2] = &wlan_bt_debug_sel2_clk.common.hw, - [CLK_WLAN_BT_DEBUG_SEL3] = &wlan_bt_debug_sel3_clk.common.hw, - [CLK_WLAN_BT_DEBUG_SEL4] = &wlan_bt_debug_sel4_clk.common.hw, - [CLK_WLAN_BT_DEBUG_SEL5] = &wlan_bt_debug_sel5_clk.common.hw, - [CLK_WLAN_BT_DEBUG_SEL6] = &wlan_bt_debug_sel6_clk.common.hw, - [CLK_WLAN_BT_DEBUG_SEL7] = &wlan_bt_debug_sel7_clk.common.hw, - [CLK_WLAN_SEL] = &wlan_sel_clk.common.hw, - [CLK_BT_SEL] = &bt_sel_clk.common.hw, - [CLK_PFIP2_GATE] = &pfip2_gate_clk.common.hw, - [CLK_BLE_32M] = &ble_32m_clk.common.hw, - [CLK_BLE_48M] = &ble_48m_clk.common.hw, - [CLK_MAD_AHB_GATE] = &mad_ahb_gate_clk.common.hw, - [CLK_GPIO_GATE] = &gpio_gate_clk.common.hw, - [CLK_BUS_CODEC_DAC] = &bus_codec_dac_clk.common.hw, - [CLK_RCCAL] = &rccal_clk.common.hw, - [CLK_BUS_CODEC_ADC] = &bus_codec_adc_clk.common.hw, - [CLK_MAD_APB_GATE] = &mad_apb_gate_clk.common.hw, - [CLK_BUS_DMIC] = &dmic_bus_clk.common.hw, - [CLK_GPADC] = &gpadc_clk.common.hw, - [CLK_LPUART1_WKUP] = &lpuart1_wkup_clk.common.hw, - [CLK_LPUART0_WKUP] = &lpuart0_wkup_clk.common.hw, - [CLK_LPUART0] = &lpuart0_clk.common.hw, - [CLK_LPUART1] = &lpuart1_clk.common.hw, - [CLK_GPADC_CTRL] = &gpadc_ctrl_clk.common.hw, - [CLK_DMIC_GATE] = &dmic_gate_clk.common.hw, - [CLK_SPDIF_TX] = &spdif_tx_clk.common.hw, - [CLK_I2S] = &i2s_clk.common.hw, - [CLK_CODEC_DAC] = &codec_dac_clk.common.hw, - [CLK_CODEC_ADC_SEL1] = &codec_adc_sel1_clk.common.hw, - [CLK_CODEC_ADC_GATE] = &codec_adc_gate_clk.common.hw, - [CLK_AUDPLL_HOSC_SEL] = &audpll_hosc_sel_clk.common.hw, - [CLK_CODEC_ADC_DIV] = &codec_adc_div_clk.common.hw, - [CLK_CK1_AUD_DIV] = &ck1_aud_div_clk.common.hw, - [CLK_AUD_RCO_DIV] = &aud_rco_div_clk.common.hw, - [CLK_CKPLL_HSPSRAM_SEL] = &ckpll_hspsram_sel_clk.common.hw, - [CLK_CKPLL_LSPSRAM_SEL] = &ckpll_lspsram_sel_clk.common.hw, - [CLK_CK_M33] = &ck_m33_clk.common.hw, - [CLK_CKPLL_HIFI5_SEL] = &ckpll_hifi5_sel_clk.common.hw, - [CLK_CKPLL_C906_SEL] = &ckpll_c906_sel_clk.common.hw, - [CLK_CK_DEV] = &ck_dev_clk.common.hw, - [CLK_SYS] = &sys_clk.common.hw, - [CLK_AR200A_F] = &ar200a_f_clk.common.hw, - [CLK_HFCLK_DIV] = &hfclk_div_clk.common.hw, - [CLK_LFCLK_DIV] = &lfclk_div_clk.common.hw, - [CLK_AHB_DIV] = &ahb_div_clk.common.hw, - [CLK_APB] = &apb_clk.common.hw, - [CLK_DEVICE] = &device_clk.common.hw, - [CLK_MAD_LPSD] = &mad_lpsd_clk.common.hw, - [CLK_SPDIF_RX] = &spdif_rx_clk.common.hw, - [CLK_I2S_ASRC] = &i2s_asrc_clk.common.hw, - }, - .num = CLK_AON_NUMBER, -}; -/* ccu_def_end */ -static const u32 pll_regs[] = -{ - SUN20IW2_PLL_AUDIO_REG, -}; - -static const struct sunxi_ccu_desc sun20iw2_ccu_on_desc = -{ - .ccu_clks = sun20iw2_ccu_on_clks, - .num_ccu_clks = ARRAY_SIZE(sun20iw2_ccu_on_clks), - - - .hw_clks = &sun20iw2_ccu_on_hw_clks, - .clk_type = HAL_SUNXI_AON_CCU, - - .resets = sun20iw2_ccu_on_resets, - .reset_type = HAL_SUNXI_AON_RESET, - .num_resets = ARRAY_SIZE(sun20iw2_ccu_on_resets), -}; - -#define HOSC_CLOCK_24M (24U * 1000U * 1000U) -#define HOSC_CLOCK_26M (26U * 1000U * 1000U) -#define HOSC_CLOCK_32M (32U * 1000U * 1000U) -#define HOSC_CLOCK_40M (40U * 1000U * 1000U) -#define HOSC_CLOCK_24_576M (24576U * 1000U) - -uint32_t HAL_GetHFClock(void) -{ - static const uint32_t PRCM_HOSCClock[] = { - HOSC_CLOCK_26M, - HOSC_CLOCK_40M, - HOSC_CLOCK_24M, - HOSC_CLOCK_32M, - HOSC_CLOCK_24_576M}; - uint32_t val = 0; - - val = *(volatile uint32_t *)(SUNXI20_CCU_AON_BASE + 0x84); - - return PRCM_HOSCClock[val]; -} - -int sunxi_ccu_aon_init(void) -{ - unsigned long reg; - int ret; - u32 val; - int i; - - /* HOSC Type Register, set it to 40M */ - u32 hosc_reg; - hosc_reg = (u32)readl(0x4004c484); - hosc_reg = 0x1; - writel(hosc_reg, 0x4004c484); - - for (i = 0; i < ARRAY_SIZE(pll_regs); i++) - { - val = readl(pll_regs[i]); - val |= BIT(29); - writel(val, pll_regs[i]); - } - - reg = (unsigned long)SUNXI20_CCU_AON_BASE; - ret = ccu_common_init(reg, &sun20iw2_ccu_on_desc); - return ret; -} diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2-aon.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2-aon.h deleted file mode 100644 index c963ff91979639ccf18667624a20d85b5b9835c6..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2-aon.h +++ /dev/null @@ -1,102 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2020 frank@allwinnertech.com - */ - -#ifndef _CCU_SUN20IW2_AON_H_ -#define _CCU_SUN20IW2_AON_H_ - -int sunxi_ccu_aon_init(); - -#define SUNXI20_CCU_AON_BASE 0X4004C400 - -enum { - CLK_HOSC = 0, - CLK_HOSC_DETECT, - CLK_DPLL1, - CLK_DPLL2, - CLK_DPLL3, - RFIP0_DPLL, - RFIP1_DPLL, - CLK_PLL_AUDIO, - CLK_PLL_AUDIO1X, - CLK_PLL_AUDIO2X, - CLK_CK1_USB, - CLK_CK1_AUD, - CLK_CK1_DEV, - CLK_CK1_LSPSRAM, - CLK_CK1_HSPSRAM_PRE, - CLK_CK1_HSPSRAM, - CLK_CK1_HIFI5, - CLK_CK1_C906_PRE, - CLK_CK1_C906, - CLK_CK1_M33, - CLK_CK3_DEV, - CLK_CK3_LSPSRAM, - CLK_CK3_HSPSRAM_PRE, - CLK_CK3_HSPSRAM, - CLK_CK3_HIFI5, - CLK_CK3_C906_PRE, - CLK_CK3_C906, - CLK_CK3_M33, - CLK_LDO_BYPASS, - CLK_LDO2_EN, - CLK_LDO1_EN, - CLK_WLAN_BT_DEBUG_SEL0, - CLK_WLAN_BT_DEBUG_SEL1, - CLK_WLAN_BT_DEBUG_SEL2, - CLK_WLAN_BT_DEBUG_SEL3, - CLK_WLAN_BT_DEBUG_SEL4, - CLK_WLAN_BT_DEBUG_SEL5, - CLK_WLAN_BT_DEBUG_SEL6, - CLK_WLAN_BT_DEBUG_SEL7, - CLK_WLAN_SEL, - CLK_BT_SEL, - CLK_PFIP2_GATE, - CLK_BLE_32M, - CLK_BLE_48M, - CLK_MAD_AHB_GATE, - CLK_GPIO_GATE, - CLK_BUS_CODEC_DAC, - CLK_RCCAL, - CLK_BUS_CODEC_ADC, - CLK_MAD_APB_GATE, - CLK_BUS_DMIC, - CLK_GPADC, - CLK_LPUART1_WKUP, - CLK_LPUART0_WKUP, - CLK_LPUART0, - CLK_LPUART1, - CLK_GPADC_CTRL, - CLK_DMIC_GATE, - CLK_SPDIF_TX, - CLK_I2S, - CLK_CODEC_DAC, - CLK_CODEC_ADC_SEL1, - CLK_CODEC_ADC_GATE, - CLK_AUDPLL_HOSC_SEL, - CLK_CODEC_ADC_DIV, - CLK_CK1_AUD_DIV, - CLK_AUD_RCO_DIV, - CLK_CKPLL_HSPSRAM_SEL, - CLK_CKPLL_LSPSRAM_SEL, - CLK_CK_M33, - CLK_CKPLL_HIFI5_SEL, - CLK_CKPLL_C906_SEL, - CLK_CK_DEV, - CLK_SYS, - CLK_AR200A_F, - CLK_HFCLK_DIV, - CLK_LFCLK_DIV, - CLK_AHB_DIV, - CLK_APB, - CLK_DEVICE, - CLK_MAD_LPSD, - CLK_SPDIF_RX, - CLK_I2S_ASRC, - - CLK_AON_NUMBER, -}; - -uint32_t HAL_GetHFClock(void); -#endif /* _CCU_SUN20IW2_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2-r.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2-r.c deleted file mode 100644 index b5fce7c7428ec5d428a4361f636d03e4dd25bfc8..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2-r.c +++ /dev/null @@ -1,127 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2020 huangzhenwei@allwinnertech.com - */ -#include "ccu.h" -#include "ccu_common.h" -#include "ccu_reset.h" - -#include "ccu_div.h" -#include "ccu_gate.h" -#include "ccu_mp.h" -#include "ccu_nm.h" - -#include "ccu-sun20iw2-r.h" - -static CLK_FIXED_FACTOR(hosc_div32k_clk, "hosc-div32k", "hosc", 1250, 1, 0); -static CLK_FIXED_FACTOR(rcosc_div32k_clk, "rcosc-div32k", "rc-16m", 500, 1, 0); -/* System LFCLK Control Register */ -static SUNXI_CCU_GATE(osc32k_en_clk, "osc32k-en", "osc12M", 0x080, BIT(31), 0); -static SUNXI_CCU_GATE(rc32k_en_clk, "rc32k-en", "osc12M", 0x080, BIT(30), 0); -static SUNXI_CCU_GATE(rc_hf_en_clk, "rc-hf-en", "osc12M", 0x080, BIT(29), 0); -static const char *const sys_32k_parents[] = { "fix-losc", "rccal-32k" }; -static SUNXI_CCU_MUX(sys_32k_sel_clk, "sys-32k-sel", sys_32k_parents, 0x080, 28, 1, 0); -static const char *const ble_sel_parents[] = { "fix-losc", "rccal-32k" }; -static SUNXI_CCU_MUX(ble_sel_clk, "ble-sel", ble_sel_parents, 0x080, 27, 1, 0); -static const char *const sysrtc_sel_parents[] = { "fix-losc", "rccal-32k","hosc-div32k" }; -static SUNXI_CCU_MUX(sysrtc32k_clk, "sysrtc32k", sysrtc_sel_parents, 0x080, 25, 2, 0); -static const char *const lf_sel_parents[] = { "rc32k-en", "fix-losc" }; -static SUNXI_CCU_MUX(lf_sel_clk, "lf-sel", lf_sel_parents, 0x080, 24, 1, 0); -static const char *const pad_parents[] = {"rcosc-div32k", "fix-losc", "rccal-32k", "hosc"}; -static SUNXI_CCU_MUX(pad_clk, "pad", pad_parents, 0x080, 1, 2 , 0); -static SUNXI_CCU_M_WITH_GATE(pad_out_clk, "pad-out", "pad", 0x080, - 3, 13, - BIT(0), 0); -/* BLE RCOSC Calibration Control Register0 */ -static SUNXI_CCU_GATE(rccal32k_clk, "rccal-32k", "rc-16m", 0x144, BIT(29), 0); -static SUNXI_CCU_GATE(rco_wup_en_clk, "rco-wup-en", "hosc", 0x144, BIT(16), 0); - -/* BLE RCOSC Calibrantion Control Register1 */ -static SUNXI_CCU_GATE(rco_wup_mode_sel_clk, "rco-wup-mode-sel", "hosc", 0x148, BIT(0), 0); - -/* BLE CLK32 AUTO Switch Register */ -static const char *const div_clk_parents[] = { "rc-hf-en", "ble-32m" }; -static SUNXI_CCU_MUX_WITH_GATE(div_clk, "div", div_clk_parents, 0x14c, 1, 1, BIT(4), 0); -static SUNXI_CCU_GATE(auto_switch_clk, "32k-auto-switch", "hosc", 0x14c, BIT(0), 0); - -static struct ccu_common *sun20iw2_r_ccu_clks[] = -{ - &osc32k_en_clk.common, - &rc32k_en_clk.common, - &rc_hf_en_clk.common, - &sys_32k_sel_clk.common, - &ble_sel_clk.common, - &sysrtc32k_clk.common, - &lf_sel_clk.common, - &pad_clk.common, - &pad_out_clk.common, - &rccal32k_clk.common, - &rco_wup_en_clk.common, - &rco_wup_mode_sel_clk.common, - &div_clk.common, - &auto_switch_clk.common, -}; - -static struct clk_hw_onecell_data sun20iw2_r_hw_clks = -{ - .hws = { - [CLK_HOSC_DIV_32K] = &hosc_div32k_clk.hw, - [CLK_RCOSE_DIV_32K] = &rcosc_div32k_clk.hw, - [CLK_OSC32K_EN] = &osc32k_en_clk.common.hw, - [CLK_RC32K_EN] = &rc32k_en_clk.common.hw, - [RC_HF_EN] = &rc_hf_en_clk.common.hw, - [CLK_SYS_32K_SEL] = &sys_32k_sel_clk.common.hw, - [CLK_BLE_SEL] = &ble_sel_clk.common.hw, - [CLK_SYSRTC32K] = &sysrtc32k_clk.common.hw, - [CLK_LF_SEL] = &lf_sel_clk.common.hw, - [CLK_PAD] = &pad_clk.common.hw, - [CLK_PAD_OUT] = &pad_out_clk.common.hw, - [CLK_RCCAL32K] = &rccal32k_clk.common.hw, - [CLK_RCO_WUP_EN] = &rco_wup_en_clk.common.hw, - [CLK_RCO_WUP_MODE_SEL] = &rco_wup_mode_sel_clk.common.hw, - [CLK_DIV] = &div_clk.common.hw, - [CLK_32K_AUTO_SWITCH] = &auto_switch_clk.common.hw, - }, - .num = CLK_R_NUMBER, -}; - -static struct ccu_reset_map sun20iw2_r_ccu_resets[] = -{ - [RST_IS_WATCHDOG_ALL] = { 0x0c4, BIT(8) }, - [RST_IS_PMU] = { 0x0c4, BIT(1) }, - [RST_IS_PWRON] = { 0x0c4, BIT(0) }, - [RST_RCO_CALIB] = { 0x144, BIT(28) }, -}; - -static const struct sunxi_ccu_desc sun20iw2_r_ccu_desc = -{ - .ccu_clks = sun20iw2_r_ccu_clks, - .num_ccu_clks = ARRAY_SIZE(sun20iw2_r_ccu_clks), - - .hw_clks = &sun20iw2_r_hw_clks, - .clk_type = HAL_SUNXI_R_CCU, - - .resets = sun20iw2_r_ccu_resets, - .reset_type = HAL_SUNXI_R_RESET, - .num_resets = ARRAY_SIZE(sun20iw2_r_ccu_resets), -}; - -int sunxi_r_ccu_init(void) -{ - unsigned long reg = (unsigned long)SUNXI20_R_CCU_BASE; - u32 reg_val; - int ret; - - /* set LFCLK_SRC_SEL 1 */ - reg_val = readl(SUNXI20_R_CCU_BASE + PRCM_SYS_LFCLK_CTRL); - reg_val |= BIT(24); - writel(reg_val, SUNXI20_R_CCU_BASE + PRCM_SYS_LFCLK_CTRL); - - ret = ccu_common_init(reg, &sun20iw2_r_ccu_desc); - sunxi_ccu_sleep_init((void *)reg, sun20iw2_r_ccu_clks, - ARRAY_SIZE(sun20iw2_r_ccu_clks), - NULL, 0); - return ret; - -} - diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2-r.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2-r.h deleted file mode 100644 index 2a1ca92922c8c529170c440a7b6a20429934cfe8..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2-r.h +++ /dev/null @@ -1,32 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2020 frank@allwinnertech.com - */ - -#ifndef _CCU_SUN20IW2_R_H -#define _CCU_SUN20IW2_R_H - -#define SUNXI20_R_CCU_BASE 0x40050000 /* PRCM_BASE */ -#define PRCM_SYS_LFCLK_CTRL 0x080 //TODO: use prcm define -#define PRCM_BLE_CLK32K_SWITCH 0x014c //TODO: use prcm define - -#define CLK_HOSC_DIV_32K 0 -#define CLK_RCOSE_DIV_32K 1 -#define CLK_OSC32K_EN 2 -#define CLK_RC32K_EN 3 -#define RC_HF_EN 4 -#define CLK_SYS_32K_SEL 5 -#define CLK_BLE_SEL 6 -#define CLK_SYSRTC32K 7 -#define CLK_LF_SEL 8 -#define CLK_PAD 9 -#define CLK_PAD_OUT 10 -#define CLK_RCCAL32K 11 -#define CLK_RCO_WUP_EN 12 -#define CLK_RCO_WUP_MODE_SEL 13 -#define CLK_DIV 14 -#define CLK_32K_AUTO_SWITCH 15 - -#define CLK_R_NUMBER (CLK_32K_AUTO_SWITCH + 1) - -#endif /* _CCU_SUN8IW20_R_H */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2.c deleted file mode 100644 index d09f03e8df26d35984724d230c4691ab18c64492..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2.c +++ /dev/null @@ -1,585 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2020 huangzhenwei@allwinnertech.com - */ -#include "ccu.h" -#include "ccu_common.h" -#include "ccu_reset.h" -#include "ccu_div.h" -#include "ccu_gate.h" -#include "ccu_mp.h" -#include "ccu_mult.h" -#include "ccu_nk.h" -#include "ccu_nkm.h" -#include "ccu_nkmp.h" -#include "ccu_nm.h" - -#include "ccu-sun20iw2.h" -#include "ccu-sun20iw2-aon.h" -#include -#include - -/* ccu_des_start */ - -/* BUS Clock Gating Control Register0 */ -static SUNXI_CCU_GATE(bus_ehci0_clk, "bus-ohci0", "osc12M", 0x004, BIT(31), 0); -static SUNXI_CCU_GATE(bus_ohci0_clk, "bus-ohci0", "osc12M", 0x004, BIT(30), 0); -static SUNXI_CCU_GATE(bus_csi_jpe_clk, "bus-csi-jpe", "osc12M", 0x004, BIT(29), 0); -static SUNXI_CCU_GATE(bus_ledc_clk, "bus-ledc", "hosc",0x004, BIT(28), 0); -static SUNXI_CCU_GATE(bus_otg_clk, "bus-otg", "hosc", 0x004, BIT(27), 0); -static SUNXI_CCU_GATE(bus_smcard_clk, "bus-smcard", "hosc", 0x004, BIT(26), 0); - -static SUNXI_CCU_GATE(bus_hspsram_ctrl_clk, "bus-hspsram-ctrl", "hosc", 0x004, BIT(21), 0); - -static SUNXI_CCU_GATE(ir_rx_clk, "ir_rx", "hosc", 0x004, BIT(16), 0); -static SUNXI_CCU_GATE(ir_tx_clk, "ir_tx", "hosc", 0x004, BIT(15), 0); -static SUNXI_CCU_GATE(bus_pwm_clk, "bus-pwm", "apb", 0x004, BIT(14), 0); -static SUNXI_CCU_GATE(bus_twi1_clk, "bus-twi1", "apb", 0x004, BIT(11), 0); -static SUNXI_CCU_GATE(bus_twi0_clk, "bus-twi0", "apb", 0x004, BIT(10), 0); - -static SUNXI_CCU_GATE(bus_uart2_clk, "bus-uart2", "apb", 0x004, BIT(8), 0); -static SUNXI_CCU_GATE(bus_uart1_clk, "bus-uart1", "apb", 0x004, BIT(7), 0); -static SUNXI_CCU_GATE(bus_uart0_clk, "bus-uart0", "apb", 0x004, BIT(6), 0); - -static SUNXI_CCU_GATE(bus_sdc0_clk, "bus-sdc0", "apb", 0x004, BIT(4), 0); - -static SUNXI_CCU_GATE(bus_spi1_clk, "bus-spi1", "osc12M", 0x004, BIT(1), 0); -static SUNXI_CCU_GATE(bus_spi0_clk, "bus-spi0", "osc12M", 0x004, BIT(0), 0); - -/* BUS Clock Gating Control Register1 */ -static SUNXI_CCU_GATE(bus_monitor_clk, "bus-monitor", "osc12M", 0x008, BIT(28), 0); -static SUNXI_CCU_GATE(bus_g2d_clk, "bus-g2d", "osc12M", 0x008, BIT(27), 0); -static SUNXI_CCU_GATE(bus_de_clk, "bus-de", "osc12M", 0x008, BIT(26), 0); -static SUNXI_CCU_GATE(bus_display_clk, "bus-display", "osc12M", 0x008, BIT(25), 0); -static SUNXI_CCU_GATE(bus_lcd_clk, "bus-lcd", "osc12M", 0x008, BIT(24), 0); - -static SUNXI_CCU_GATE(bus_bt_core_clk, "bus-bt-core", "osc12M", 0x008, BIT(21), 0); -static SUNXI_CCU_GATE(bus_wlan_ctrl_clk, "bus-wlan-ctrl", "osc12M", 0x008, BIT(20), 0); - -static SUNXI_CCU_GATE(bus_trng_clk, "bus-trng", "osc12M", 0x008, BIT(14), 0); -static SUNXI_CCU_GATE(bus_spc_clk, "bus-spc", "osc12M", 0x008, BIT(13), 0); -static SUNXI_CCU_GATE(bus_ss_clk, "bus-ss", "osc12M", 0x008, BIT(12), 0); -static SUNXI_CCU_GATE(bus_timer_clk, "bus-timer", "osc12M", 0x008, BIT(11), 0); -static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "hosc", 0x008, BIT(10), 0); - -static SUNXI_CCU_GATE(bus_dma1_clk, "bus-dma1", "hosc", 0x008, BIT(7), 0); -static SUNXI_CCU_GATE(bus_dma0_clk, "bus-dma0", "hosc", 0x008, BIT(6), 0); - -static SUNXI_CCU_GATE(bus_spdif_clk, "bus-spdif", "apb", 0x008, BIT(2), 0); -static SUNXI_CCU_GATE(bus_i2s_clk, "bus-i2s", "hosc", 0x008, BIT(1), 0); - -/* CPU_DSP_RV Systems Clock Gating Control Register */ -static SUNXI_CCU_GATE(riscv_cfg_clk, "riscv-cfg", "hosc", 0x014, BIT(19), 0); -static SUNXI_CCU_GATE(riscv_msgbox_clk, "riscv-msgbox", "hosc", 0x014, BIT(18), 0); - -static SUNXI_CCU_GATE(dsp_cfg_clk, "dsp-cfg", "hosc", 0x014, BIT(11), 0); -static SUNXI_CCU_GATE(dsp_msgbox_clk, "dsp-msgbox", "hosc", 0x014, BIT(10), 0); -static SUNXI_CCU_GATE(cpu_msgbox_clk, "cpu-msgbox", "hosc", 0x014, BIT(1), 0); - -/* rst_def_start */ -static struct ccu_reset_map sun20iw2_ccu_resets[] = -{ -/* Module Reset Control Register0 */ - [RST_USB_EHCI] = { 0x00c, BIT(31) }, - [RST_USB_OHCI] = { 0x00c, BIT(30) }, - [RST_CSI_JPE] = { 0x00c, BIT(29) }, - [RST_LEDC] = { 0x00c, BIT(28) }, - [RST_USB_OTG] = { 0x00c, BIT(27) }, - [RST_SMCARD] = { 0x00c, BIT(26) }, - [RST_USB_PHY] = { 0x00c, BIT(25) }, - [RST_FLASH_ENC] = { 0x00c, BIT(23) }, - [RST_FLASH_CTRL] = { 0x00c, BIT(22) }, - [RST_HSPSRAM_CTRL] = { 0x00c, BIT(21) }, - [RST_LSPSRAM_CTRL] = { 0x00c, BIT(20) }, - [RST_IRRX] = { 0x00c, BIT(16) }, - [RST_IRTX] = { 0x00c, BIT(15) }, - [RST_PWM] = { 0x00c, BIT(14) }, - [RST_TWI1] = { 0x00c, BIT(11) }, - [RST_TWI0] = { 0x00c, BIT(10) }, - [RST_UART2] = { 0x00c, BIT(8) }, - [RST_UART1] = { 0x00c, BIT(7) }, - [RST_UART0] = { 0x00c, BIT(6) }, - [RST_SDC0] = { 0x00c, BIT(4) }, - [RST_SPI1] = { 0x00c, BIT(1) }, - [RST_SPI0] = { 0x00c, BIT(0) }, - -/* Module Reset Control Register0 */ - [RST_G2D] = { 0x010, BIT(27) }, - [RST_DE] = { 0x010, BIT(26) }, - [RST_DISPLAY] = { 0x010, BIT(25) }, - [RST_LCD] = { 0x010, BIT(24) }, - [RST_BT_CORE] = { 0x010, BIT(21) }, - [RST_WLAN_CTRL] = { 0x010, BIT(20) }, - [RST_TRNG] = { 0x010, BIT(14) }, - [RST_SPC] = { 0x010, BIT(13) }, - [RST_SS] = { 0x010, BIT(12) }, - [RST_TIMER] = { 0x010, BIT(11) }, - [RST_SPINLOCK] = { 0x010, BIT(10) }, - [RST_DMA1] = { 0x010, BIT(7) }, - [RST_DMA0] = { 0x010, BIT(6) }, - [RST_SPDIF] = { 0x010, BIT(2) }, - [RST_I2S] = { 0x010, BIT(1) }, - -/* CPU_DSP_RV Systems Reset Control Register */ - [RST_RISCV_SYS_APB_SOFT] = { 0x018, BIT(21) }, - [RST_RISCV_TIMESTAMP] = { 0x018, BIT(20) }, - [RST_RISCV_CFG] = { 0x018, BIT(19) }, - [RST_RISCV_MSGBOX] = { 0x018, BIT(18) }, - [RST_RISCV_WDG] = { 0x018, BIT(17) }, - [RST_RISCV_CORE] = { 0x018, BIT(16) }, - - [RST_DSP_DEBUG] = { 0x018, BIT(14) }, - [RST_DSP_INTC] = { 0x018, BIT(13) }, - [RST_DSP_TZMA] = { 0x018, BIT(12) }, - [RST_DSP_CFG] = { 0x018, BIT(11) }, - [RST_DSP_MSGBOX] = { 0x018, BIT(10) }, - [RST_DSP_WDG] = { 0x018, BIT(9) }, - [RST_DSP_CORE] = { 0x018, BIT(8) }, - - [RST_CPU_CFG] = { 0x018, BIT(2) }, - [RST_CPU_MSGBOX] = { 0x018, BIT(1) }, - [RST_CPU_WDG] = { 0x018, BIT(0) }, -}; -/* rst_def_end */ - -/* MBUS Clock Gating Control Register */ -static SUNXI_CCU_GATE(mbus_de_clk, "mbus-de", "hosc", 0x01C, BIT(9), 0); -static SUNXI_CCU_GATE(mbus_g2d_clk, "mbus-g2d", "hosc", 0x01C, BIT(8), 0); -static SUNXI_CCU_GATE(mbus_csi_clk, "mbus-csi", "hosc", 0x01C, BIT(7), 0); -static SUNXI_CCU_GATE(mbus_dma1_clk, "mbus-dma1", "hosc", 0x01C, BIT(6), 0); -static SUNXI_CCU_GATE(mbus_dma0_clk, "mbus-dma0", "hosc", 0x01C, BIT(5), 0); -static SUNXI_CCU_GATE(mbus_usb_clk, "mbus-usb", "hosc", 0x01C, BIT(4), 0); -static SUNXI_CCU_GATE(mbus_ce_clk, "mbus-ce", "hosc", 0x01C, BIT(3), 0); -static SUNXI_CCU_GATE(mbus_dsp_clk, "mbus-dsp", "hosc", 0x01C, BIT(2), 0); -static SUNXI_CCU_GATE(mbus_riscv_clk, "mbus-riscv", "hosc", 0x01C, BIT(1), 0); -static SUNXI_CCU_GATE(mbus_cpu_clk, "mbus-cpu", "hosc", 0x01C, BIT(0), 0); - -/* SPI0 Clock Control Register */ -static const char *const spi_parents[] = { "hosc", "device-clk" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(spi0_clk, "spi0", spi_parents, 0x020, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -/* SPI1 Clock Control Register */ -static SUNXI_CCU_MP_WITH_MUX_GATE(spi1_clk, "spi1", spi_parents, 0x024, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -/* SDC Clock Control Register */ -static const char *const sdc_parents[] = { "hosc", "device-clk" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(sdc0_clk, "sdc0", sdc_parents, 0x028, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -/* SS Clock Control Register */ -static const char *const ss_parents[] = { "hosc", "device-clk" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(ss_clk, "ss", ss_parents, 0x02c, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -/* CSI_JPE Device CLK Control Register */ -static const char *const csi_jpe_parents[] = { "hosc", "device-clk" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(csi_jpe_clk, "csi-jpe", csi_jpe_parents, 0x030, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -/* LEDC Clocok Control Register */ -static const char *const ledc_parents[] = { "hosc", "device-clk" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(ledc_clk, "ledc", ledc_parents, 0x034, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -/* IRRX Clock Control Register */ -static const char *const ir_parents[] = { "hosc", "fix-losc" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(irrx_clk, "irrx", ir_parents, 0x038, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -/* IRTX Clock Control Register */ -static SUNXI_CCU_MP_WITH_MUX_GATE(irtx_clk, "irtx", ir_parents, 0x03c, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -/* System Tick Reference Clock Control Register */ -static const char *const systick_ref_parents[] = { "hosc", "fix-losc" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(systick_ref_clk, "systick-ref", systick_ref_parents, 0x040, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -/* System Tick Clock Calibration Register */ -static SUNXI_CCU_GATE(systick_noref_clk, "systick_noref", "hosc", 0x044,BIT(25), 0); -static SUNXI_CCU_GATE(systick_skew_clk, "systick-skew", "hosc", 0x044, BIT(24), 0); - -/* CSI Output MCLK Control Register */ -static const char *const csi_mclk_parents[] = { "hosc", "device-clk" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(csi_mclk_clk, "csi-mclk", csi_mclk_parents, 0x050, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -/* Flash Controller SPI Clock Register */ -static const char *const flash_spi_parents[] = { "hosc", "device-clk" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(flash_spi_clk, "flash-spi", flash_spi_parents, 0x054, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -/* APB_SPC Clock Control Register */ -static const char *const pclk_spc_parents[] = { "hosc", "device-clk", "fix-losc" }; -static SUNXI_CCU_MP_WITH_MUX(pclk_spc_clk, "pclk-spc", pclk_spc_parents, 0x05c, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - 0); - -/* USB Clock Control Register */ -static const char *const usb_pll_parents[] = { "hosc", "device-clk" }; -static SUNXI_CCU_MUX(usb_pll_clk, "usb-pll", usb_pll_parents, 0x060, 0, 1, 0); - -/* RISCV Clock Control Register */ -static const char *const riscv_parents[] = { "hosc", "fix-losc", "ckpll-c906-sel", "ckpll-c906-sel" }; - -static SUNXI_CCU_GATE(riscv_gate_clk, "riscv-gate", "hosc", 0x064, BIT(31), 0); -static SUNXI_CCU_MUX(riscv_sel_clk, "riscv-sel", - riscv_parents, 0x064, 4, 2, 0); -static struct clk_div_table riscv_div_table[] = -{ - { .val = 0, .div = 1 }, - { .val = 1, .div = 2 }, - { .val = 2, .div = 4 }, - { .val = 3, .div = 8 }, - { /* Sentinel */ }, -}; -static SUNXI_CCU_DIV_TABLE(riscv_div_clk, "riscv-div", - "riscv-sel", 0x064, 0, 2, - riscv_div_table, 0); - -static struct clk_div_table riscv_axi_table[] = -{ - { .val = 1, .div = 2 }, - { .val = 2, .div = 3 }, - { .val = 3, .div = 4 }, - { /* Sentinel */ }, -}; -static SUNXI_CCU_DIV_TABLE(riscv_axi_clk, "riscv-axi", - "riscv-div", 0x064, 8, 2, - riscv_axi_table, 0); - -/* DSP Clock Control Register */ -static const char *const dsp_parents[] = { "hosc", "fix-losc", "ckpll-hifi5-sel", "ckpll-hifi5-sel" }; -static SUNXI_CCU_GATE(dsp_gate_clk, "dsp-gate", "hosc", 0x068, BIT(31), 0); - -static SUNXI_CCU_MUX(dsp_sel_clk, "dsp-sel", - dsp_parents, 0x068, 4, 2, 0); - -static struct clk_div_table dsp_div_table[] = -{ - { .val = 0, .div = 1 }, - { .val = 1, .div = 2 }, - { .val = 2, .div = 4 }, - { .val = 3, .div = 8 }, - { /* Sentinel */ }, -}; -static SUNXI_CCU_DIV_TABLE(dsp_div_clk, "dsp-div", - "dsp-sel", 0x068, 0, 2, - dsp_div_table, 0); - -/* HSPSRAM Clock Control Register */ -static SUNXI_CCU_GATE(hspsram_gate_clk, "hspsram-gate", "hosc", 0x06c, BIT(31), 0); - -static CLK_FIXED_FACTOR_FW_NAME(hspsram_ctrl_clk, "hspsram-ctrl", "ckpll-hspsram-sel", 8, 1, CLK_SET_RATE_PARENT); - -/* LSPSRAM Clock Control Register */ -static SUNXI_CCU_GATE(lspsram_gate_clk, "lspsram-gate", "hosc", 0x070, BIT(31), 0); - -static const char *const lspsram_sel_parents[] = { "hosc", "ckpll-lspsram-sel" }; -static SUNXI_CCU_MUX(lspsram_sel_clk, "lspsram-sel", lspsram_sel_parents, 0x070, 4, 1, 0); - -static struct clk_div_table lspsram_div_table[] = -{ - { .val = 0, .div = 1 }, - { .val = 1, .div = 2 }, - { .val = 2, .div = 4 }, - { .val = 3, .div = 8 }, - { /* Sentinel */ }, -}; -static SUNXI_CCU_DIV_TABLE(lspsram_div_clk, "lspsram-div", - "lspsram-sel", 0x070, 0, 2, - lspsram_div_table, 0); -static CLK_FIXED_FACTOR_FW_NAME(lspsram_ctrl_clk, "lspsram-ctrl", "lspsram-div", 2, 1, 0); - -/* G2D Clock Control Register */ -static const char *const g2d_parents[] = { "hosc", "device-clk" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(g2d_clk, "g2d", g2d_parents, 0x074, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -/* DE Clock Control Register */ -static const char *const de_parents[] = { "hosc", "device-clk" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(de_clk, "de", de_parents, 0x078, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -/* LCD Clock Control Register */ -static const char *const lcd_parents[] = { "hosc", "device-clk" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(lcd_clk, "lcd", lcd_parents, 0x07c, - 0, 4, /* M */ - 16, 2, /* N */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -static CLK_FIXED_FACTOR_FW_NAME(osc12M_clk, "osc12M", "hosc", 2, 1, 0); - -static struct ccu_common *sun20iw2_ccu_clks[] = -{ - &bus_pwm_clk.common, - &bus_twi1_clk.common, - &bus_twi0_clk.common, - &bus_uart0_clk.common, - &bus_uart1_clk.common, - &bus_uart2_clk.common, - &bus_sdc0_clk.common, - &bus_spi0_clk.common, - &bus_spi1_clk.common, - &bus_monitor_clk.common, - &bus_g2d_clk.common, - &bus_de_clk.common, - &bus_display_clk.common, - &bus_lcd_clk.common, - &bus_bt_core_clk.common, - &bus_wlan_ctrl_clk.common, - &bus_trng_clk.common, - &bus_spc_clk.common, - &bus_ss_clk.common, - &bus_timer_clk.common, - &bus_spinlock_clk.common, - &bus_dma1_clk.common, - &bus_dma0_clk.common, - &bus_spdif_clk.common, - &bus_i2s_clk.common, - &riscv_cfg_clk.common, - &riscv_msgbox_clk.common, - &dsp_cfg_clk.common, - &dsp_msgbox_clk.common, - &cpu_msgbox_clk.common, - &mbus_de_clk.common, - &mbus_g2d_clk.common, - &mbus_csi_clk.common, - &mbus_dma1_clk.common, - &mbus_dma0_clk.common, - &mbus_usb_clk.common, - &mbus_ce_clk.common, - &mbus_dsp_clk.common, - &mbus_riscv_clk.common, - &mbus_cpu_clk.common, - &spi0_clk.common, - &spi1_clk.common, - &sdc0_clk.common, - &ss_clk.common, - &csi_jpe_clk.common, - &ledc_clk.common, - &irrx_clk.common, - &irtx_clk.common, - &systick_ref_clk.common, - &systick_noref_clk.common, - &systick_skew_clk.common, - &csi_mclk_clk.common, - &flash_spi_clk.common, - &pclk_spc_clk.common, - &usb_pll_clk.common, - &riscv_gate_clk.common, - &riscv_axi_clk.common, - &riscv_sel_clk.common, - &riscv_div_clk.common, - &dsp_gate_clk.common, - &dsp_sel_clk.common, - &dsp_div_clk.common, - &hspsram_gate_clk.common, - &lspsram_gate_clk.common, - &lspsram_sel_clk.common, - &lspsram_div_clk.common, - &ir_rx_clk.common, - &ir_tx_clk.common, - &bus_ohci0_clk.common, - &bus_csi_jpe_clk.common, - &bus_ehci0_clk.common, - &bus_otg_clk.common, - &bus_smcard_clk.common, - &bus_hspsram_ctrl_clk.common, - &bus_ledc_clk.common, - &g2d_clk.common, - &de_clk.common, - &lcd_clk.common, -}; -/* ccu_def_start */ - -static struct clk_hw_onecell_data sun20iw2_hw_clks = -{ - .hws = { - [CLK_OSC12M] = &osc12M_clk.hw, - [CLK_BUS_PWM] = &bus_pwm_clk.common.hw, - [CLK_BUS_TWI1] = &bus_twi1_clk.common.hw, - [CLK_BUS_TWI0] = &bus_twi0_clk.common.hw, - [CLK_BUS_UART0] = &bus_uart0_clk.common.hw, - [CLK_BUS_UART1] = &bus_uart1_clk.common.hw, - [CLK_BUS_UART2] = &bus_uart2_clk.common.hw, - [CLK_BUS_SDC0] = &bus_sdc0_clk.common.hw, - [CLK_BUS_SPI0] = &bus_spi0_clk.common.hw, - [CLK_BUS_SPI1] = &bus_spi1_clk.common.hw, - [CLK_BUS_MONITOR] = &bus_monitor_clk.common.hw, - [CLK_BUS_G2D] = &bus_g2d_clk.common.hw, - [CLK_BUS_DE] = &bus_de_clk.common.hw, - [CLK_BUS_DISPLAY] = &bus_display_clk.common.hw, - [CLK_BUS_LCD] = &bus_lcd_clk.common.hw, - [CLK_BUS_BT_CORE] = &bus_bt_core_clk.common.hw, - [CLK_BUS_WLAN_CTRL] = &bus_wlan_ctrl_clk.common.hw, - [CLK_BUS_TRNG] = &bus_trng_clk.common.hw, - [CLK_BUS_SPC] = &bus_spc_clk.common.hw, - [CLK_BUS_SS] = &bus_ss_clk.common.hw, - [CLK_BUS_TIMER] = &bus_timer_clk.common.hw, - [CLK_BUS_SPINLOCK] = &bus_spinlock_clk.common.hw, - [CLK_BUS_DMA1] = &bus_dma1_clk.common.hw, - [CLK_BUS_DMA0] = &bus_dma0_clk.common.hw, - [CLK_BUS_SPDIF] = &bus_spdif_clk.common.hw, - [CLK_BUS_I2S] = &bus_i2s_clk.common.hw, - [CLK_RISCV_CFG] = &riscv_cfg_clk.common.hw, - [CLK_RISCV_MSGBOX] = &riscv_msgbox_clk.common.hw, - [CLK_DSP_CFG] = &dsp_cfg_clk.common.hw, - [CLK_DSP_MSGBOX] = &dsp_msgbox_clk.common.hw, - [CLK_CPU_MSGBOX] = &cpu_msgbox_clk.common.hw, - [CLK_MBUS_DE] = &mbus_de_clk.common.hw, - [CLK_MBUS_G2D] = &mbus_g2d_clk.common.hw, - [CLK_MBUS_CSI] = &mbus_csi_clk.common.hw, - [CLK_MBUS_DMA1] = &mbus_dma1_clk.common.hw, - [CLK_MBUS_DMA0] = &mbus_dma0_clk.common.hw, - [CLK_MBUS_USB] = &mbus_usb_clk.common.hw, - [CLK_MBUS_CE] = &mbus_ce_clk.common.hw, - [CLK_MBUS_DSP] = &mbus_dsp_clk.common.hw, - [CLK_MBUS_RISCV] = &mbus_riscv_clk.common.hw, - [CLK_MBUS_CPU] = &mbus_cpu_clk.common.hw, - [CLK_SPI0] = &spi0_clk.common.hw, - [CLK_SPI1] = &spi1_clk.common.hw, - [CLK_SDC0] = &sdc0_clk.common.hw, - [CLK_SS] = &ss_clk.common.hw, - [CLK_CSI_JPE] = &csi_jpe_clk.common.hw, - [CLK_LEDC] = &ledc_clk.common.hw, - [CLK_IRRX] = &irrx_clk.common.hw, - [CLK_IRTX] = &irtx_clk.common.hw, - [CLK_SYSTICK_REF] = &systick_ref_clk.common.hw, - [CLK_SYSTICK_NOREF] = &systick_noref_clk.common.hw, - [CLK_SYSTICK_SKEW] = &systick_skew_clk.common.hw, - [CLK_CSI_MCLK] = &csi_mclk_clk.common.hw, - [CLK_FLASH_SPI] = &flash_spi_clk.common.hw, - [CLK_PCLK_SPC] = &pclk_spc_clk.common.hw, - [CLK_USB_PLL] = &usb_pll_clk.common.hw, - [CLK_RISCV_GATE] = &riscv_gate_clk.common.hw, - [CLK_RISCV_AXI] = &riscv_axi_clk.common.hw, - [CLK_RISCV_SEL] = &riscv_sel_clk.common.hw, - [CLK_RISCV_DIV] = &riscv_div_clk.common.hw, - [CLK_DSP_GATE] = &dsp_gate_clk.common.hw, - [CLK_DSP_SEL] = &dsp_sel_clk.common.hw, - [CLK_DSP_DIV] = &dsp_div_clk.common.hw, - [CLK_HSPSRAM_GATE] = &hspsram_gate_clk.common.hw, - [CLK_HSPSRAM_CTRL] = &hspsram_ctrl_clk.hw, - [CLK_LSPSRAM_GATE] = &lspsram_gate_clk.common.hw, - [CLK_LSPSRAM_SEL] = &lspsram_sel_clk.common.hw, - [CLK_LSPSRAM_DIV] = &lspsram_div_clk.common.hw, - [CLK_LSPSRAM_CTRL] = &lspsram_ctrl_clk.hw, - [CLK_IR_RX] = &ir_rx_clk.common.hw, - [CLK_IR_TX] = &ir_tx_clk.common.hw, - [CLK_BUS_OHCI0] = &bus_ohci0_clk.common.hw, - [CLK_BUS_CSI_JPE] = &bus_csi_jpe_clk.common.hw, - [CLK_BUS_EHCI0] = &bus_ehci0_clk.common.hw, - [CLK_BUS_OTG] = &bus_otg_clk.common.hw, - [CLK_BUS_SMCARD] = &bus_smcard_clk.common.hw, - [CLK_BUS_HSPSRAM_CTRL] = &bus_hspsram_ctrl_clk.common.hw, - [CLK_BUS_LEDC] = &bus_ledc_clk.common.hw, - [CLK_G2D] = &g2d_clk.common.hw, - [CLK_DE] = &de_clk.common.hw, - [CLK_LCD] = &lcd_clk.common.hw, - }, - .num = CLK_NUMBER, -}; -/* ccu_def_end */ - -static const struct sunxi_ccu_desc sun20iw2_ccu_desc = -{ - .ccu_clks = sun20iw2_ccu_clks, - .num_ccu_clks = ARRAY_SIZE(sun20iw2_ccu_clks), - - .hw_clks = &sun20iw2_hw_clks, - .clk_type = HAL_SUNXI_CCU, - - .resets = sun20iw2_ccu_resets, - .reset_type = HAL_SUNXI_RESET, - .num_resets = ARRAY_SIZE(sun20iw2_ccu_resets), -}; - -__attribute__((weak)) int sunxi_rtc_ccu_init(void) -{ - return 0; -} - -__attribute__((weak)) int sunxi_dsp_init(void) -{ - return 0; -} - -int sunxi_ccu_init(void) -{ - unsigned long reg = (unsigned long)SUNXI20_CCU_BASE; - int ret; - - ret = sunxi_ccu_aon_init(); - if (ret) { - return ret; - } - - ret = ccu_common_init(reg, &sun20iw2_ccu_desc); - if (ret) { - return ret; - } - sunxi_ccu_sleep_init((void *)reg, sun20iw2_ccu_clks, - ARRAY_SIZE(sun20iw2_ccu_clks), - NULL, 0); - - return ret; -} diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2.h deleted file mode 100644 index 309d035c8913293cff818770a70af52d7de78500..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun20iw2.h +++ /dev/null @@ -1,95 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2020 frank@allwinnertech.com - */ - -#ifndef _CCU_SUN20IW2_H_ -#define _CCU_SUN20IW2_H_ - -#define SUNXI20_CCU_BASE 0x4003C000 - -enum { - CLK_OSC12M = 0, - CLK_BUS_PWM, - CLK_BUS_TWI1, - CLK_BUS_TWI0, - CLK_BUS_UART0, - CLK_BUS_UART1, - CLK_BUS_UART2, - CLK_BUS_SDC0, - CLK_BUS_SPI0, - CLK_BUS_SPI1, - CLK_BUS_MONITOR, - CLK_BUS_G2D, - CLK_BUS_DE, - CLK_BUS_DISPLAY, - CLK_BUS_LCD, - CLK_BUS_BT_CORE, - CLK_BUS_WLAN_CTRL, - CLK_BUS_TRNG, - CLK_BUS_SPC, - CLK_BUS_SS, - CLK_BUS_TIMER, - CLK_BUS_SPINLOCK, - CLK_BUS_DMA1, - CLK_BUS_DMA0, - CLK_BUS_SPDIF, - CLK_BUS_I2S, - CLK_RISCV_CFG, - CLK_RISCV_MSGBOX, - CLK_DSP_CFG, - CLK_DSP_MSGBOX, - CLK_CPU_MSGBOX, - CLK_MBUS_DE, - CLK_MBUS_G2D, - CLK_MBUS_CSI, - CLK_MBUS_DMA1, - CLK_MBUS_DMA0, - CLK_MBUS_USB, - CLK_MBUS_CE, - CLK_MBUS_DSP, - CLK_MBUS_RISCV, - CLK_MBUS_CPU, - CLK_SPI0, - CLK_SPI1, - CLK_SDC0, - CLK_SS, - CLK_CSI_JPE, - CLK_LEDC, - CLK_IRRX, - CLK_IRTX, - CLK_SYSTICK_REF, - CLK_SYSTICK_NOREF, - CLK_SYSTICK_SKEW, - CLK_CSI_MCLK, - CLK_FLASH_SPI, - CLK_PCLK_SPC, - CLK_USB_PLL, - CLK_RISCV_GATE, - CLK_RISCV_AXI, - CLK_RISCV_SEL, - CLK_RISCV_DIV, - CLK_DSP_GATE, - CLK_DSP_SEL, - CLK_DSP_DIV, - CLK_HSPSRAM_GATE, - CLK_HSPSRAM_CTRL, - CLK_LSPSRAM_GATE, - CLK_LSPSRAM_SEL, - CLK_LSPSRAM_DIV, - CLK_LSPSRAM_CTRL, - CLK_IR_RX, - CLK_IR_TX, - CLK_BUS_OHCI0, - CLK_BUS_CSI_JPE, - CLK_BUS_EHCI0, - CLK_BUS_OTG, - CLK_BUS_SMCARD, - CLK_BUS_HSPSRAM_CTRL, - CLK_BUS_LEDC, - CLK_G2D, - CLK_DE, - CLK_LCD, - CLK_NUMBER, -}; -#endif /* _CCU_SUN20IW2_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3-dsp.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3-dsp.c deleted file mode 100644 index a1725df15c65d705478842af19247c07be214f65..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3-dsp.c +++ /dev/null @@ -1,465 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2022 Allwinnertech - */ -#include "ccu.h" -#include "ccu_common.h" -#include "ccu_reset.h" -#include "ccu_div.h" -#include "ccu_gate.h" -#include "ccu_mp.h" -#include "ccu_mult.h" -#include "ccu_nk.h" -#include "ccu_nkm.h" -#include "ccu_nkmp.h" -#include "ccu_nm.h" - -#include "ccu-sun55iw3-dsp.h" -#include -#include -/* ccu_des_start */ - -static struct ccu_nm pll_audio1_clk = { - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(1, 1), /* output divider */ - .common = { - .reg = 0x000C, - .hw.init = CLK_HW_INIT("pll-audio1", "dcxo24M", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE | - CLK_IS_CRITICAL), - }, -}; - -static SUNXI_CCU_M(pll_audio1_clk_div2, "pll-audio1-div2", - "pll-audio1", 0x000C, 16, 3, 0); - -static SUNXI_CCU_M(pll_audio1_clk_div5, "pll-audio1-div5", - "pll-audio1", 0x000C, 20, 3, 0); - -static SUNXI_CCU_M_WITH_GATE(pll_audio_out_clk, "pll-audio-out", - "pll-audio1-div2", 0x001C, - 0, 5, BIT(31), 0); - -static const char * const dsp_parents[] = { "dcxo24M", "osc32k", "rc-16m", "pll-audio1-div5", "pll-audio1-div2" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(dsp_dsp_clk, "dsp_dsp", dsp_parents, 0x0020, - 0, 5, - 24, 3, - BIT(31), 0); - -static const char * const i2s_parents[] = { "pll-audio0-4x", "pll-audio1-div2", "pll-audio1-div5" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(i2s0_clk, "i2s0", - i2s_parents, 0x002C, - 0, 5, /* M */ - 5, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(i2s1_clk, "i2s1", - i2s_parents, 0x0030, - 0, 5, /* M */ - 5, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(i2s2_clk, "i2s2", - i2s_parents, 0x0034, - 0, 5, /* M */ - 5, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(i2s3_clk, "i2s3", - i2s_parents, 0x0038, - 0, 5, /* M */ - 5, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static const char * const i2s3_asrc_parents[] = { "pll-peri1-600m", "pll-audio1-div2", "pll-audio1-div5" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(i2s3_asrc_clk, "i2s3-asrc", - i2s3_asrc_parents, 0x003C, - 0, 5, /* M */ - 5, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static SUNXI_CCU_GATE(i2s0_bgr_clk, "i2s0-bgr", - "dcxo24M", - 0x0040, BIT(0), 0); - -static SUNXI_CCU_GATE(i2s1_bgr_clk, "i2s1-bgr", - "dcxo24M", - 0x0040, BIT(1), 0); - -static SUNXI_CCU_GATE(i2s2_bgr_clk, "i2s2-bgr", - "dcxo24M", - 0x0040, BIT(2), 0); - -static SUNXI_CCU_GATE(i2s3_bgr_clk, "i2s3-bgr", - "dcxo24M", - 0x0040, BIT(3), 0); - -static const char * const spdif_tx_parents[] = { "pll-audio0-4x", "pll-audio1-div2", "pll-audio1-div5" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(spdif_tx_clk, "spdif-tx", - spdif_tx_parents, 0x0044, - 0, 5, /* M */ - 5, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static const char * const spdif_rx_parents[] = { "pll-peri1-600m", "pll-audio1-div2", "pll-audio1-div5" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(spdif_rx_clk, "spdif-rx", - spdif_rx_parents, 0x0048, - 0, 5, /* M */ - 5, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static SUNXI_CCU_GATE(bus_spdif_clk, "bus-spdif", - "dcxo24M", - 0x004C, BIT(0), 0); - -static const char * const dmic_parents[] = { "pll-audio0-4x", "pll-audio1-div2", "pll-audio1-div5" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(dmic_clk, "dmic", - dmic_parents, 0x0050, - 0, 5, /* M */ - 5, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static SUNXI_CCU_GATE(dmic_bus_clk, "dmic-bus", - "dcxo24M", - 0x0054, BIT(0), 0); - -static const char * const audio_codec_dac_parents[] = { "pll-audio0-4x", "pll-audio1-div2", "pll-audio1-div5" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(audio_codec_dac_clk, "audio-codec-dac", - audio_codec_dac_parents, 0x0058, - 0, 5, /* M */ - 5, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static const char * const audio_codec_adc_parents[] = { "pll-audio0-4x", "pll-audio1-div2", "pll-audio1-div5" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(audio_codec_adc_clk, "audio-codec-adc", - audio_codec_adc_parents, 0x005C, - 0, 5, /* M */ - 5, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static SUNXI_CCU_GATE(audio_codec_clk, "audio-codec", - "dcxo24M", - 0x0060, BIT(0), 0); - -static SUNXI_CCU_GATE(dsp_msg_clk, "dsp-msg", - "dcxo24M", - 0x0068, BIT(0), 0); - -static SUNXI_CCU_GATE(dsp_cfg_clk, "dsp-cfg", - "dcxo24M", - 0x006C, BIT(0), 0); - -static SUNXI_CCU_GATE(npu_aclk, "npu-aclk", - "dcxo24M", - 0x0070, BIT(2), 0); - -static SUNXI_CCU_GATE(npu_hclk, "npu-hclk", - "dcxo24M", - 0x0070, BIT(1), 0); - -static SUNXI_CCU_GATE(dsp_npu_clk, "dsp-npu", - "dcxo24M", - 0x0070, BIT(0), 0); - -static const char * const dsp_timer_parents[] = { "dcxo24M", "rtc32k", "rc-16m", "r-ahb" }; - -static struct ccu_div dsp_timer0_clk = { - .enable = BIT(0), - .div = _SUNXI_CCU_DIV_FLAGS(1, 3, CLK_DIVIDER_POWER_OF_TWO), - .mux = _SUNXI_CCU_MUX(4, 2), - .common = { - .reg = 0x0074, - .hw.init = CLK_HW_INIT_PARENTS("dsp-timer0", dsp_timer_parents, &ccu_div_ops, 0), - }, -}; - -static struct ccu_div dsp_timer1_clk = { - .enable = BIT(0), - .div = _SUNXI_CCU_DIV_FLAGS(1, 3, CLK_DIVIDER_POWER_OF_TWO), - .mux = _SUNXI_CCU_MUX(4, 2), - .common = { - .reg = 0x0078, - .hw.init = CLK_HW_INIT_PARENTS("dsp-timer1", dsp_timer_parents, &ccu_div_ops, 0), - }, -}; - -static struct ccu_div dsp_timer2_clk = { - .enable = BIT(0), - .div = _SUNXI_CCU_DIV_FLAGS(1, 3, CLK_DIVIDER_POWER_OF_TWO), - .mux = _SUNXI_CCU_MUX(4, 2), - .common = { - .reg = 0x007C, - .hw.init = CLK_HW_INIT_PARENTS("dsp-timer2", dsp_timer_parents, &ccu_div_ops, 0), - }, -}; - -static struct ccu_div dsp_timer3_clk = { - .enable = BIT(0), - .div = _SUNXI_CCU_DIV_FLAGS(1, 3, CLK_DIVIDER_POWER_OF_TWO), - .mux = _SUNXI_CCU_MUX(4, 2), - .common = { - .reg = 0x0080, - .hw.init = CLK_HW_INIT_PARENTS("dsp-timer3", dsp_timer_parents, &ccu_div_ops, 0), - }, -}; - -static struct ccu_div dsp_timer4_clk = { - .enable = BIT(0), - .div = _SUNXI_CCU_DIV_FLAGS(1, 3, CLK_DIVIDER_POWER_OF_TWO), - .mux = _SUNXI_CCU_MUX(4, 2), - .common = { - .reg = 0x0084, - .hw.init = CLK_HW_INIT_PARENTS("dsp-timer4", dsp_timer_parents, &ccu_div_ops, 0), - }, -}; - -static struct ccu_div dsp_timer5_clk = { - .enable = BIT(0), - .div = _SUNXI_CCU_DIV_FLAGS(1, 3, CLK_DIVIDER_POWER_OF_TWO), - .mux = _SUNXI_CCU_MUX(4, 2), - .common = { - .reg = 0x0088, - .hw.init = CLK_HW_INIT_PARENTS("dsp-timer5", dsp_timer_parents, &ccu_div_ops, 0), - }, -}; - -static SUNXI_CCU_GATE(bus_dsp_timer_clk, "bus-dsp-timer", - "dcxo24M", - 0x008C, BIT(0), 0); - -static SUNXI_CCU_GATE(dsp_dma_clk, "dsp-dma", - "dcxo24M", - 0x0104, BIT(0), 0); - -static SUNXI_CCU_GATE(tzma0_clk, "tzma0", - "dcxo24M", - 0x0108, BIT(0), 0); - -static SUNXI_CCU_GATE(tzma1_clk, "tzma1", - "dcxo24M", - 0x010C, BIT(0), 0); - -static SUNXI_CCU_GATE(pubsram_clk, "pubsram", - "dcxo24M", - 0x0114, BIT(0), 0); - -static SUNXI_CCU_GATE(dsp_mclk, "dsp-mclk", - "dcxo24M", - 0x011C, BIT(1), 0); - -static SUNXI_CCU_GATE(dma_mclk, "dma-mclk", - "dcxo24M", - 0x011C, BIT(0), 0); - -static const char * const rv_parents[] = { "dcxo24m", "rtc-32k", "rc-16m" }; - -static SUNXI_CCU_MUX_WITH_GATE(rv_clk, "rv", - rv_parents, 0x0120, - 27, 3, /* mux */ - BIT(31), 0); - -static SUNXI_CCU_GATE(rv_cfg_clk, "rv-cfg", - "dcxo24M", - 0x0124, BIT(0), 0); - -static SUNXI_CCU_GATE(riscv_msg_clk, "riscv-msg", - "dcxo24M", - 0x0128, BIT(0), 0); - -static const char * const pwm_parents[] = { "dcxo24m", "rtc-32k", "rc-16m" }; - -static SUNXI_CCU_MUX_WITH_GATE(dsp_pwm_clk, "dsp-pwm", - pwm_parents, 0x0130, - 24, 3, /* mux */ - BIT(31), 0); - -static SUNXI_CCU_GATE(pwm_bgr_clk, "pwm-bgr", - "dcxo24M", - 0x0134, BIT(0), 0); - -static SUNXI_CCU_GATE(ahb_auto_clk, "ahb-auto", - "dcxo24M", - 0x013C, BIT(24), 0); -/* ccu_des_end */ - - -/* rst_def_start */ -static struct ccu_reset_map sun55iw3_dsp_resets[] = -{ - [RST_BUS_DSP_I2S3] = { 0x0040, BIT(19) }, - [RST_BUS_DSP_I2S2] = { 0x0040, BIT(18) }, - [RST_BUS_DSP_I2S1] = { 0x0040, BIT(17) }, - [RST_BUS_DSP_I2S0] = { 0x0040, BIT(16) }, - [RST_BUS_DSP_SPDIF] = { 0x004c, BIT(16) }, - [RST_BUS_DSP_DMIC] = { 0x0054, BIT(16) }, - [RST_BUS_DSP_AUDIO_CODEC] = { 0x0060, BIT(16) }, - [RST_BUS_DSP_MSG] = { 0x0068, BIT(16) }, - [RST_BUS_DSP_CFG] = { 0x006c, BIT(16) }, - [RST_BUS_DSP_NPU] = { 0x0070, BIT(16) }, - [RST_BUS_DSP_TIME] = { 0x008c, BIT(16) }, - [RST_BUS_DSP] = { 0x0100, BIT(17) }, - [RST_BUS_DSP_DBG] = { 0x0100, BIT(16) }, - [RST_BUS_DSP_DMA] = { 0x0104, BIT(16) }, - [RST_BUS_DSP_PUBSRAM] = { 0x0114, BIT(16) }, - [RST_BUS_DSP_RV_CORE] = { 0x0124, BIT(18) }, - [RST_BUS_DSP_RV_APB_DB] = { 0x0124, BIT(17) }, - [RST_BUS_DSP_RV_CFG] = { 0x0124, BIT(16) }, - [RST_BUS_DSP_RV_MSG] = { 0x0128, BIT(16) }, - [RST_BUS_DSP_PWM] = { 0x0134, BIT(16) }, -}; -/* rst_def_end */ - -static struct ccu_common *sun55iw3_dsp_clks[] = -{ - &pll_audio1_clk.common, - &pll_audio1_clk_div2.common, - &pll_audio1_clk_div5.common, - &pll_audio_out_clk.common, - &dsp_dsp_clk.common, - &i2s0_clk.common, - &i2s1_clk.common, - &i2s2_clk.common, - &i2s3_clk.common, - &i2s3_asrc_clk.common, - &i2s0_bgr_clk.common, - &i2s1_bgr_clk.common, - &i2s2_bgr_clk.common, - &i2s3_bgr_clk.common, - &spdif_tx_clk.common, - &spdif_rx_clk.common, - &bus_spdif_clk.common, - &dmic_clk.common, - &dmic_bus_clk.common, - &audio_codec_dac_clk.common, - &audio_codec_adc_clk.common, - &audio_codec_clk.common, - &dsp_msg_clk.common, - &dsp_cfg_clk.common, - &npu_aclk.common, - &npu_hclk.common, - &dsp_npu_clk.common, - &dsp_timer0_clk.common, - &dsp_timer1_clk.common, - &dsp_timer2_clk.common, - &dsp_timer3_clk.common, - &dsp_timer4_clk.common, - &dsp_timer5_clk.common, - &bus_dsp_timer_clk.common, - &dsp_dma_clk.common, - &tzma0_clk.common, - &tzma1_clk.common, - &pubsram_clk.common, - &dsp_mclk.common, - &dma_mclk.common, - &rv_clk.common, - &rv_cfg_clk.common, - &riscv_msg_clk.common, - &dsp_pwm_clk.common, - &pwm_bgr_clk.common, - &ahb_auto_clk.common, -}; -/* ccu_def_start */ - -static struct clk_hw_onecell_data sun55iw3_hw_clks = -{ - .hws = { - [CLK_PLL_DSP_AUDIO1] = &pll_audio1_clk.common.hw, - [CLK_PLL_DSP_AUDIO1_DIV2] = &pll_audio1_clk_div2.common.hw, - [CLK_PLL_DSP_AUDIO1_DIV5] = &pll_audio1_clk_div5.common.hw, - [CLK_PLL_DSP_AUDIO_OUT] = &pll_audio_out_clk.common.hw, - [CLK_DSP_DSP] = &dsp_dsp_clk.common.hw, - [CLK_DSP_I2S0] = &i2s0_clk.common.hw, - [CLK_DSP_I2S1] = &i2s1_clk.common.hw, - [CLK_DSP_I2S2] = &i2s2_clk.common.hw, - [CLK_DSP_I2S3] = &i2s3_clk.common.hw, - [CLK_DSP_I2S3_ASRC] = &i2s3_asrc_clk.common.hw, - [CLK_BUS_DSP_I2S0] = &i2s0_bgr_clk.common.hw, - [CLK_BUS_DSP_I2S1] = &i2s1_bgr_clk.common.hw, - [CLK_BUS_DSP_I2S2] = &i2s2_bgr_clk.common.hw, - [CLK_BUS_DSP_I2S3] = &i2s3_bgr_clk.common.hw, - [CLK_DSP_SPDIF_TX] = &spdif_tx_clk.common.hw, - [CLK_DSP_SPDIF_RX] = &spdif_rx_clk.common.hw, - [CLK_BUS_DSP_SPDIF] = &bus_spdif_clk.common.hw, - [CLK_DSP_DMIC] = &dmic_clk.common.hw, - [CLK_BUS_DSP_DMIC] = &dmic_bus_clk.common.hw, - [CLK_DSP_AUDIO_CODEC_DAC] = &audio_codec_dac_clk.common.hw, - [CLK_DSP_AUDIO_CODEC_ADC] = &audio_codec_adc_clk.common.hw, - [CLK_BUS_DSP_AUDIO_CODEC] = &audio_codec_clk.common.hw, - [CLK_BUS_DSP_MSG] = &dsp_msg_clk.common.hw, - [CLK_BUS_DSP_CFG] = &dsp_cfg_clk.common.hw, - [CLK_BUS_DSP_NPU_ACLK] = &npu_aclk.common.hw, - [CLK_BUS_DSP_NPU_HCLK] = &npu_hclk.common.hw, - [CLK_BUS_DSP_NPU] = &dsp_npu_clk.common.hw, - [CLK_DSP_TIMER0] = &dsp_timer0_clk.common.hw, - [CLK_DSP_TIMER1] = &dsp_timer1_clk.common.hw, - [CLK_DSP_TIMER2] = &dsp_timer2_clk.common.hw, - [CLK_DSP_TIMER3] = &dsp_timer3_clk.common.hw, - [CLK_DSP_TIMER4] = &dsp_timer4_clk.common.hw, - [CLK_DSP_TIMER5] = &dsp_timer5_clk.common.hw, - [CLK_BUS_DSP_TIMER] = &bus_dsp_timer_clk.common.hw, - [CLK_BUS_DSP_DMA] = &dsp_dma_clk.common.hw, - [CLK_BUS_DSP_TZMA0] = &tzma0_clk.common.hw, - [CLK_BUS_DSP_TZMA1] = &tzma1_clk.common.hw, - [CLK_BUS_DSP_PUBSRAM] = &pubsram_clk.common.hw, - [CLK_BUS_DSP_MBUS] = &dsp_mclk.common.hw, - [CLK_BUS_DSP_DMA_MBUS] = &dma_mclk.common.hw, - [CLK_DSP_RV] = &rv_clk.common.hw, - [CLK_BUS_DSP_RV_CFG] = &rv_cfg_clk.common.hw, - [CLK_BUS_DSP_RISCV_MSG] = &riscv_msg_clk.common.hw, - [CLK_DSP_PWM] = &dsp_pwm_clk.common.hw, - [CLK_BUS_DSP_PWM] = &pwm_bgr_clk.common.hw, - [CLK_BUS_DSP_AHB_AUTO] = &ahb_auto_clk.common.hw, - }, - .num = CLK_DSP_NUMBER, -}; -/* ccu_def_end */ - -static const struct sunxi_ccu_desc sun55iw3_dsp_desc = -{ - .ccu_clks = sun55iw3_dsp_clks, - .num_ccu_clks = ARRAY_SIZE(sun55iw3_dsp_clks), - - .hw_clks = &sun55iw3_hw_clks, - .clk_type = HAL_SUNXI_DSP, - - .resets = sun55iw3_dsp_resets, - .reset_type = HAL_SUNXI_DSP_RESET, - .num_resets = ARRAY_SIZE(sun55iw3_dsp_resets), -}; - -__attribute__((weak)) int sunxi_rtc_ccu_init(void) -{ - return 0; -} - -int sunxi_dsp_init(void) -{ - unsigned long reg = (unsigned long)SUNXI_DSP_CCU_BASE; - int ret; - - ret = ccu_common_init(reg, &sun55iw3_dsp_desc); - - return ret; -} - diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3-dsp.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3-dsp.h deleted file mode 100644 index c10cd185af713eb07ec6736fa81ed24f6ec08b8b..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3-dsp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2020 frank@allwinnertech.com - */ - -#ifndef _CCU_SUN55IW3_DSP_H_ -#define _CCU_SUN55IW3_DSP_H_ - -#define SUNXI_DSP_CCU_BASE 0x7102000 - -enum { - CLK_PLL_DSP_AUDIO1 = 0, - CLK_PLL_DSP_AUDIO1_DIV2, - CLK_PLL_DSP_AUDIO1_DIV5, - CLK_PLL_DSP_AUDIO_OUT, - CLK_DSP_DSP, - CLK_DSP_I2S0, - CLK_DSP_I2S1, - CLK_DSP_I2S2, - CLK_DSP_I2S3, - CLK_DSP_I2S3_ASRC, - CLK_BUS_DSP_I2S0, - CLK_BUS_DSP_I2S1, - CLK_BUS_DSP_I2S2, - CLK_BUS_DSP_I2S3, - CLK_DSP_SPDIF_TX, - CLK_DSP_SPDIF_RX, - CLK_BUS_DSP_SPDIF, - CLK_DSP_DMIC, - CLK_BUS_DSP_DMIC, - CLK_DSP_AUDIO_CODEC_DAC, - CLK_DSP_AUDIO_CODEC_ADC, - CLK_BUS_DSP_AUDIO_CODEC, - CLK_BUS_DSP_MSG, - CLK_BUS_DSP_CFG, - CLK_BUS_DSP_NPU_ACLK, - CLK_BUS_DSP_NPU_HCLK, - CLK_BUS_DSP_NPU, - CLK_DSP_TIMER0, - CLK_DSP_TIMER1, - CLK_DSP_TIMER2, - CLK_DSP_TIMER3, - CLK_DSP_TIMER4, - CLK_DSP_TIMER5, - CLK_BUS_DSP_TIMER, - CLK_BUS_DSP_DMA, - CLK_BUS_DSP_TZMA0, - CLK_BUS_DSP_TZMA1, - CLK_BUS_DSP_PUBSRAM, - CLK_BUS_DSP_MBUS, - CLK_BUS_DSP_DMA_MBUS, - CLK_DSP_RV, - CLK_BUS_DSP_RV_CFG, - CLK_BUS_DSP_RISCV_MSG, - CLK_DSP_PWM, - CLK_BUS_DSP_PWM, - CLK_BUS_DSP_AHB_AUTO, - - CLK_DSP_NUMBER, - }; -#endif /* _CCU_SUN55IW3_DSP_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3-r.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3-r.c deleted file mode 100644 index d0c1aa3c55ae4d56eb9178d1a9e6a557a3b7d33d..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3-r.c +++ /dev/null @@ -1,292 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2020 huangzhenwei@allwinnertech.com - */ -#include "ccu.h" -#include "ccu_common.h" -#include "ccu_reset.h" - -#include "ccu_div.h" -#include "ccu_gate.h" -#include "ccu_mp.h" -#include "ccu_nm.h" - -#include "ccu-sun55iw3-r.h" - -/* ccu_des_start */ -static const char * const ahbs_parents[] = { "dcxo24M", "ext-32k", - "rc-16m", "pll-peri0-div3", - "pll-audio1-4x" }; - -static SUNXI_CCU_M_WITH_MUX(r_ahb_clk, "r-ahb", - ahbs_parents, 0x000, - 0, 5, - 24, 3, - 0); - -static SUNXI_CCU_M_WITH_MUX(r_apbs0_clk, "r-apbs0", - ahbs_parents, 0x00c, - 0, 5, - 24, 3, - 0); - -static SUNXI_CCU_M_WITH_MUX(r_apbs1_clk, "r-apbs1", - ahbs_parents, 0x010, - 0, 5, - 24, 3, - 0); - -static const char * const r_timer_parents[] = { "dcxo24M", "ext-32k", - "rc-16m", "pll-peri-200m" }; - -static struct ccu_div r_timer0_clk = { - .enable = BIT(0), - .div = _SUNXI_CCU_DIV_FLAGS(1, 4, CLK_DIVIDER_POWER_OF_TWO), - .mux = _SUNXI_CCU_MUX(4, 2), - .common = { - .reg = 0x0100, - .hw.init = CLK_HW_INIT("r-timer0", - "r_timer_parents", - &ccu_div_ops, 0), - }, -}; - -static struct ccu_div r_timer1_clk = { - .enable = BIT(0), - .div = _SUNXI_CCU_DIV_FLAGS(1, 4, CLK_DIVIDER_POWER_OF_TWO), - .mux = _SUNXI_CCU_MUX(4, 2), - .common = { - .reg = 0x0104, - .hw.init = CLK_HW_INIT("r-timer1", - "r_timer_parents", - &ccu_div_ops, 0), - }, -}; - -static struct ccu_div r_timer2_clk = { - .enable = BIT(0), - .div = _SUNXI_CCU_DIV_FLAGS(1, 4, CLK_DIVIDER_POWER_OF_TWO), - .mux = _SUNXI_CCU_MUX(4, 2), - .common = { - .reg = 0x0108, - .hw.init = CLK_HW_INIT("r-timer2", - "r_timer_parents", - &ccu_div_ops, 0), - }, -}; - -static SUNXI_CCU_GATE(r_bus_timer_clk, "r-timer-gating", - "dcxo24M", - 0x011c, BIT(0), 0); - -static SUNXI_CCU_GATE(r_bus_twd_clk, "r-twd-gating", - "dcxo24M", - 0x012c, BIT(0), 0); - -static const char * const r_pwm_parents[] = { "dcxo24M", "ext-32k", "rc-16m" }; - -static SUNXI_CCU_MUX_WITH_GATE(r_pwm_clk, "r-pwm", - r_pwm_parents, 0x0130, - 24, 2, - BIT(31), 0 ); - -static SUNXI_CCU_GATE(r_bus_pwm_clk, "r-pwm-gating", - "dcxo24M", - 0x013c, BIT(0), 0); - -static const char * const r_spi_parents[] = { "dcxo24M", "pll-peri0-div3", - "pll-peri0-300m", "pll-peri1-300m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(r_spi_clk, "r-spi", - r_spi_parents, 0x0150, - 0, 5, /* M */ - 24, 2, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(r_bus_spi_clk, "r-spi-gating", - "dcxo24M", - 0x015c, BIT(0), 0); - -static SUNXI_CCU_GATE(r_bus_splock_clk, "r-splock-gating", - "dcxo24M", - 0x016c, BIT(0), 0); - -static SUNXI_CCU_GATE(r_bus_mbox_clk, "r-mbox-gating", - "dcxo24M", - 0x017c, BIT(0), 0); - -static SUNXI_CCU_GATE(r_bus_uart1_clk, "r-uart1-gating", - "dcxo24M", - 0x018c, BIT(1), 0); - -static SUNXI_CCU_GATE(r_bus_uart0_clk, "r-uart0-gating", - "dcxo24M", - 0x018c, BIT(0), 0); - -static SUNXI_CCU_GATE(r_bus_twi2_clk, "r-twi2-gating", - "dcxo24M", - 0x019c, BIT(2), 0); - -static SUNXI_CCU_GATE(r_bus_twi1_clk, "r-twi1-gating", - "dcxo24M", - 0x019c, BIT(1), 0); - -static SUNXI_CCU_GATE(r_bus_twi0_clk, "r-twi0-gating", - "dcxo24M", - 0x019c, BIT(0), 0); - -static SUNXI_CCU_GATE(r_bus_ppu1_clk, "r-ppu1-gating", - "dcxo24M", - 0x01ac, BIT(1), 0); - -static SUNXI_CCU_GATE(r_bus_ppu_clk, "r-ppu-gating", - "dcxo24M", - 0x01ac, BIT(0), 0); - -static SUNXI_CCU_GATE(r_bus_tzma_clk, "r-tzma-gating", - "dcxo24M", - 0x01b0, BIT(0), 0); - -static SUNXI_CCU_GATE(r_cpus_bus_bist_clk, "r-cpus-bist-gating", - "dcxo24M", - 0x01bc, BIT(0), 0); - -static const char * const r_irrx_parents[] = { "ext-32k", "dcxo24M" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(r_irrx_clk, "r-irrx", - r_spi_parents, 0x01c0, - 0, 5, /* M */ - 24, 2, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(r_bus_irrx_clk, "r-irrx-gating", - "dcxo24M", - 0x01cc, BIT(0), 0); - -static SUNXI_CCU_GATE(dma_clken_sw_clk, "dma-clken-sw", - "dcxo24M", - 0x01dc, BIT(0), 0); - -static SUNXI_CCU_GATE(r_bus_rtc_clk, "r-rtc-gating", - "dcxo24M", - 0x020c, BIT(0), 0); - -static SUNXI_CCU_GATE(r_bus_cpucfg_clk, "r-cpucfg-gating", - "dcxo24M", - 0x022c, BIT(0), 0); -/* ccu_des_end */ - -static struct ccu_common *sun55iw3_r_ccu_clks[] = -{ - &r_ahb_clk.common, - &r_apbs0_clk.common, - &r_apbs1_clk.common, - &r_timer0_clk.common, - &r_timer1_clk.common, - &r_timer2_clk.common, - &r_bus_timer_clk.common, - &r_bus_twd_clk.common, - &r_pwm_clk.common, - &r_bus_pwm_clk.common, - &r_spi_clk.common, - &r_bus_spi_clk.common, - &r_bus_splock_clk.common, - &r_bus_mbox_clk.common, - &r_bus_uart1_clk.common, - &r_bus_uart0_clk.common, - &r_bus_twi2_clk.common, - &r_bus_twi1_clk.common, - &r_bus_twi0_clk.common, - &r_bus_ppu1_clk.common, - &r_bus_ppu_clk.common, - &r_bus_tzma_clk.common, - &r_cpus_bus_bist_clk.common, - &r_irrx_clk.common, - &r_bus_irrx_clk.common, - &dma_clken_sw_clk.common, - &r_bus_rtc_clk.common, - &r_bus_cpucfg_clk.common, -}; - -static struct clk_hw_onecell_data sun55iw3_r_hw_clks = -{ - .hws = { - [CLK_R_AHB] = &r_ahb_clk.common.hw, - [CLK_R_APBS0] = &r_apbs0_clk.common.hw, - [CLK_R_APBS1] = &r_apbs1_clk.common.hw, - [CLK_R_TIMER0] = &r_timer0_clk.common.hw, - [CLK_R_TIMER1] = &r_timer1_clk.common.hw, - [CLK_R_TIMER2] = &r_timer2_clk.common.hw, - [CLK_BUS_R_TIMER] = &r_bus_timer_clk.common.hw, - [CLK_BUS_R_TWD] = &r_bus_twd_clk.common.hw, - [CLK_R_PWM] = &r_pwm_clk.common.hw, - [CLK_BUS_R_PWM] = &r_bus_pwm_clk.common.hw, - [CLK_R_SPI] = &r_spi_clk.common.hw, - [CLK_BUS_R_SPI] = &r_bus_spi_clk.common.hw, - [CLK_BUS_R_SPLOCK] = &r_bus_splock_clk.common.hw, - [CLK_BUS_R_MBOX] = &r_bus_mbox_clk.common.hw, - [CLK_BUS_R_UART1] = &r_bus_uart1_clk.common.hw, - [CLK_BUS_R_UART0] = &r_bus_uart0_clk.common.hw, - [CLK_BUS_R_TWI2] = &r_bus_twi2_clk.common.hw, - [CLK_BUS_R_TWI1] = &r_bus_twi1_clk.common.hw, - [CLK_BUS_R_TWI0] = &r_bus_twi0_clk.common.hw, - [CLK_R_PPU1] = &r_bus_ppu1_clk.common.hw, - [CLK_R_PPU] = &r_bus_ppu_clk.common.hw, - [CLK_BUS_R_TZMA] = &r_bus_tzma_clk.common.hw, - [CLK_BUS_R_BIST] = &r_cpus_bus_bist_clk.common.hw, - [CLK_R_IRRX] = &r_irrx_clk.common.hw, - [CLK_BUS_R_IRRX] = &r_bus_irrx_clk.common.hw, - [CLK_DMA_CLKEN_SW] = &dma_clken_sw_clk.common.hw, - [CLK_BUS_R_RTC] = &r_bus_rtc_clk.common.hw, - [CLK_BUS_R_CPUCFG] = &r_bus_cpucfg_clk.common.hw, - - }, - .num = CLK_R_NUMBER, -}; - -static struct ccu_reset_map sun55iw3_r_ccu_resets[] = -{ - [RST_R_TIMER] = { 0x11c, BIT(16) }, - [RST_R_PWM] = { 0x13c, BIT(16) }, - [RST_R_CAN] = { 0x14c, BIT(16) }, - [RST_R_SPI] = { 0x15c, BIT(16) }, - [RST_R_SPLOCK] = { 0x16c, BIT(16) }, - [RST_R_MBOX] = { 0x17c, BIT(16) }, - [RST_R_UART1] = { 0x18c, BIT(17) }, - [RST_R_UART0] = { 0x18c, BIT(16) }, - [RST_R_TWI2] = { 0x19c, BIT(18) }, - [RST_R_TWI1] = { 0x19c, BIT(17) }, - [RST_R_TWI0] = { 0x19c, BIT(16) }, - [RST_R_PPU1] = { 0x1ac, BIT(17) }, - [RST_R_PPU] = { 0x1ac, BIT(16) }, - [RST_R_IRRX] = { 0x1cc, BIT(16) }, - [RST_R_RTC] = { 0x20c, BIT(16) }, - [RST_R_CPUCFG] = { 0x22c, BIT(16) }, -}; - -static const struct sunxi_ccu_desc sun55iw3_r_ccu_desc = -{ - .ccu_clks = sun55iw3_r_ccu_clks, - .num_ccu_clks = ARRAY_SIZE(sun55iw3_r_ccu_clks), - - .hw_clks = &sun55iw3_r_hw_clks, - .clk_type = HAL_SUNXI_R_CCU, - - .resets = sun55iw3_r_ccu_resets, - .reset_type = HAL_SUNXI_R_RESET, - .num_resets = ARRAY_SIZE(sun55iw3_r_ccu_resets), -}; - -int sunxi_r_ccu_init(void) -{ - unsigned long reg = (unsigned long)SUNXI55_R_CCU_BASE; - int ret; - - ret = ccu_common_init(reg, &sun55iw3_r_ccu_desc); - if (ret) { - return ret; - } - return 0; -} diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3-r.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3-r.h deleted file mode 100644 index a45581c183d10f150e154a0d99720a1da946e0a6..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3-r.h +++ /dev/null @@ -1,41 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2020 frank@allwinnertech.com - */ - -#ifndef _CCU_SUN55IW3_R_H -#define _CCU_SUN55IW3_R_H - -#define SUNXI55_R_CCU_BASE 0x7010000 /* PRCM_BASE */ - -#define CLK_R_AHB 0 -#define CLK_R_APBS0 1 -#define CLK_R_APBS1 2 -#define CLK_R_TIMER0 3 -#define CLK_R_TIMER1 4 -#define CLK_R_TIMER2 5 -#define CLK_BUS_R_TIMER 6 -#define CLK_BUS_R_TWD 7 -#define CLK_R_PWM 8 -#define CLK_BUS_R_PWM 9 -#define CLK_R_SPI 11 -#define CLK_BUS_R_SPI 12 -#define CLK_BUS_R_SPLOCK 13 -#define CLK_BUS_R_MBOX 14 -#define CLK_BUS_R_UART1 15 -#define CLK_BUS_R_UART0 16 -#define CLK_BUS_R_TWI2 17 -#define CLK_BUS_R_TWI1 18 -#define CLK_BUS_R_TWI0 19 -#define CLK_R_PPU1 20 -#define CLK_R_PPU 21 -#define CLK_BUS_R_TZMA 22 -#define CLK_BUS_R_BIST 23 -#define CLK_R_IRRX 24 -#define CLK_BUS_R_IRRX 25 -#define CLK_DMA_CLKEN_SW 26 -#define CLK_BUS_R_RTC 27 -#define CLK_BUS_R_CPUCFG 28 -#define CLK_R_NUMBER (CLK_BUS_R_CPUCFG + 1) - -#endif diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3.c deleted file mode 100644 index bde12ccfcb6eb196602f6e0acf7c9fdd4d0ad433..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3.c +++ /dev/null @@ -1,1858 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2022 Allwinnertech - */ -#include "ccu.h" -#include "ccu_common.h" -#include "ccu_reset.h" -#include "ccu_div.h" -#include "ccu_gate.h" -#include "ccu_mp.h" -#include "ccu_mult.h" -#include "ccu_nk.h" -#include "ccu_nkm.h" -#include "ccu_nkmp.h" -#include "ccu_nm.h" - -#include "ccu-sun55iw3.h" -#include -#include - -/* ccu_des_start */ -#define SUN55IW3_PLL_CPU0_CTRL_REG 0x0000 -static struct ccu_mult pll_cpu0_clk = { - .enable = BIT(27), - .lock = BIT(28), - .mult = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .common = { - .reg = 0x0000, - .hw.init = CLK_HW_INIT("pll-cpu0", "dcxo24M", - &ccu_mult_ops, - CLK_SET_RATE_UNGATE), - }, -}; - -/* @TODO */ -#define SUN55IW3_PLL_CPU1_CTRL_REG 0x0008 -#define SUN55IW3_PLL_CPU2_CTRL_REG 0x000C - -#define SUN55IW3_PLL_DDR_CTRL_REG 0x0010 -static struct ccu_nkmp pll_ddr_clk = { - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(0, 1), /* input divider */ - .p = _SUNXI_CCU_DIV(1, 1), /* output divider */ - .common = { - .reg = 0x0010, - .hw.init = CLK_HW_INIT("pll-ddr", "dcxo24M", - &ccu_nkmp_ops, - CLK_SET_RATE_UNGATE | - CLK_IS_CRITICAL), - }, -}; - -#define SUN55IW3_PLL_PERI0_CTRL_REG 0x0020 -static struct ccu_nm pll_peri0_parent_clk = { - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(1, 1), /* input divider */ - .common = { - .reg = 0x0020, - .hw.init = CLK_HW_INIT("pll-peri0-parent", "dcxo24M", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE | - CLK_IS_CRITICAL), - }, -}; - -static SUNXI_CCU_M(pll_peri0_2x_clk, "pll-peri0-2x", - "pll-peri0-parent", 0x0020, 16, 3, 0); - -static CLK_FIXED_FACTOR_HW(pll_peri0_div3_clk, "pll-peri0-div3", - &pll_peri0_2x_clk.common.hw, - 6, 1, 0); - -static SUNXI_CCU_M(pll_peri0_800m_clk, "pll-peri0-800m", - "pll-peri0-parent", 0x0020, 20, 3, 0); - -static SUNXI_CCU_M(pll_peri0_480m_clk, "pll-peri0-480m", - "pll-peri0-parent", 0x0020, 2, 3, 0); - -static CLK_FIXED_FACTOR_HW(pll_peri0_600m_clk, "pll-peri0-600m", - &pll_peri0_2x_clk.common.hw, - 2, 1, 0); - -static CLK_FIXED_FACTOR_HW(pll_peri0_400m_clk, "pll-peri0-400m", - &pll_peri0_2x_clk.common.hw, - 3, 1, 0); - -static CLK_FIXED_FACTOR(pll_peri0_300m_clk, "pll-peri0-300m", - "pll-peri0-600m", - 2, 1, 0); - -static CLK_FIXED_FACTOR(pll_peri0_200m_clk, "pll-peri0-200m", - "pll-peri0-400m", - 2, 1, 0); - -static CLK_FIXED_FACTOR(pll_peri0_160m_clk, "pll-peri0-160m", - "pll-peri0-480m", - 3, 1, 0); - -static CLK_FIXED_FACTOR(pll_peri0_16m_clk, "pll-peri0-16m", - "pll-peri0-160m", - 10, 1, 0); - -static CLK_FIXED_FACTOR(pll_peri0_150m_clk, "pll-peri0-150m", - "pll-peri0-300m", - 2, 1, 0); - -static CLK_FIXED_FACTOR(pll_peri0_25m_clk, "pll-peri0-25m", - "pll-peri0-150m", - 6, 1, 0); - -#define SUN55IW3_PLL_PERI1_CTRL_REG 0x0028 -static struct ccu_nm pll_peri1_parent_clk = { - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(1, 1), /* input divider */ - .common = { - .reg = 0x0028, - .hw.init = CLK_HW_INIT("pll-peri1-parent", "dcxo24M", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE | - CLK_IS_CRITICAL), - }, -}; - -static SUNXI_CCU_M(pll_peri1_2x_clk, "pll-peri1-2x", - "pll-peri1-parent", 0x0028, 16, 3, 0); - -static SUNXI_CCU_M(pll_peri1_800m_clk, "pll-peri1-800m", - "pll-peri1-parent", 0x0028, 20, 3, 0); - -static SUNXI_CCU_M(pll_peri1_480m_clk, "pll-peri1-480m", - "pll-peri1-parent", 0x0028, 2, 3, 0); - -static CLK_FIXED_FACTOR_HW(pll_peri1_600m_clk, "pll-peri1-600m", - &pll_peri1_2x_clk.common.hw, - 2, 1, 0); - -static CLK_FIXED_FACTOR_HW(pll_peri1_400m_clk, "pll-peri1-400m", - &pll_peri1_2x_clk.common.hw, - 3, 1, 0); - -static CLK_FIXED_FACTOR(pll_peri1_300m_clk, "pll-peri1-300m", - "pll-peri1-600m", - 2, 1, 0); - -static CLK_FIXED_FACTOR(pll_peri1_200m_clk, "pll-peri1-200m", - "pll-peri1-400m", - 2, 1, 0); - -static CLK_FIXED_FACTOR(pll_peri1_160m_clk, "pll-peri1-160m", - "pll-peri1-480m", - 3, 1, 0); - -static CLK_FIXED_FACTOR(pll_peri1_150m_clk, "pll-peri1-150m", - "pll-peri1-300m", - 2, 1, 0); - -#define SUN55IW3_PLL_GPU_CTRL_REG 0x0030 -static struct ccu_nkmp pll_gpu_clk = { - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(1, 1), /* input divider */ - .p = _SUNXI_CCU_DIV(0, 1), /* output divider */ - .common = { - .reg = 0x0030, - .hw.init = CLK_HW_INIT("pll-gpu", "dcxo24M", - &ccu_nkmp_ops, - CLK_SET_RATE_UNGATE | - CLK_IS_CRITICAL), - }, -}; - -#define SUN55IW3_PLL_VIDEO0_CTRL_REG 0x0040 -static struct ccu_nm pll_video0_4x_clk = { - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(1, 1), /* input divider */ - .common = { - .reg = 0x0040, - .hw.init = CLK_HW_INIT("pll-video0-4x", "dcxo24M", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE | - CLK_IS_CRITICAL), - }, -}; - -static CLK_FIXED_FACTOR_HW(pll_video0_2x_clk, "pll-video0-2x", - &pll_video0_4x_clk.common.hw, - 2, 1, 0); - -static CLK_FIXED_FACTOR_HW(pll_video0_1x_clk, "pll-video0-1x", - &pll_video0_4x_clk.common.hw, - 4, 1, 0); - -#define SUN55IW3_PLL_VIDEO1_CTRL_REG 0x0048 -static struct ccu_nm pll_video1_4x_clk = { - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(0, 1), /* input divider */ - .common = { - .reg = 0x0048, - .hw.init = CLK_HW_INIT("pll-video1-4x", "dcxo24M", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE | - CLK_IS_CRITICAL), - }, -}; - -static CLK_FIXED_FACTOR_HW(pll_video1_2x_clk, "pll-video1-2x", - &pll_video1_4x_clk.common.hw, - 2, 1, 0); - -static CLK_FIXED_FACTOR_HW(pll_video1_1x_clk, "pll-video1-1x", - &pll_video1_4x_clk.common.hw, - 4, 1, 0); - -#define SUN55IW3_PLL_VIDEO2_CTRL_REG 0x0050 -static struct ccu_nm pll_video2_4x_clk = { - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(1, 1), /* input divider */ - .common = { - .reg = 0x0050, - .hw.init = CLK_HW_INIT("pll-video2-4x", "dcxo24M", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE | - CLK_IS_CRITICAL), - }, -}; - -static CLK_FIXED_FACTOR_HW(pll_video2_2x_clk, "pll-video2-2x", - &pll_video2_4x_clk.common.hw, - 2, 1, 0); - -static CLK_FIXED_FACTOR_HW(pll_video2_1x_clk, "pll-video2-1x", - &pll_video2_4x_clk.common.hw, - 4, 1, 0); - -#define SUN55IW3_PLL_VE_CTRL_REG 0x0058 -static struct ccu_nkmp pll_ve_clk = { - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(0, 1), /* input divider */ - .p = _SUNXI_CCU_DIV(1, 1), /* output divider */ - .common = { - .reg = 0x0058, - .hw.init = CLK_HW_INIT("pll-ve", "dcxo24M", - &ccu_nkmp_ops, - CLK_SET_RATE_UNGATE | - CLK_IS_CRITICAL), - }, -}; - -#define SUN55IW3_PLL_VIDEO3_CTRL_REG 0x0068 -static struct ccu_nm pll_video3_4x_clk = { - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(1, 1), /* input divider */ - .common = { - .reg = 0x0068, - .hw.init = CLK_HW_INIT("pll-video3-4x", "dcxo24M", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE | - CLK_IS_CRITICAL), - }, -}; - -static CLK_FIXED_FACTOR_HW(pll_video3_2x_clk, "pll-video3-2x", - &pll_video3_4x_clk.common.hw, - 2, 1, 0); - -static CLK_FIXED_FACTOR_HW(pll_video3_1x_clk, "pll-video3-1x", - &pll_video3_4x_clk.common.hw, - 4, 1, 0); - -#define SUN55IW3_PLL_AUDIO0_REG 0x078 -static struct ccu_sdm_setting pll_audio0_sdm_table[] = { - { .rate = 45158400, .pattern = 0xc001bcd3, .m = 18, .n = 33 }, - { .rate = 49152000, .pattern = 0xc001eb85, .m = 20, .n = 40 }, - { .rate = 180633600, .pattern = 0xc001288d, .m = 3, .n = 22 }, - { .rate = 196608000, .pattern = 0xc001eb85, .m = 5, .n = 40 }, -}; - -static struct ccu_nm pll_audio0_4x_clk = { - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(16, 6), - .fixed_post_div = 2, - .sdm = _SUNXI_CCU_SDM(pll_audio0_sdm_table, BIT(24), - 0x178, BIT(31)), - .common = { - .reg = 0x078, - .features = CCU_FEATURE_FIXED_POSTDIV | - CCU_FEATURE_SIGMA_DELTA_MOD, - .hw.init = CLK_HW_INIT("pll-audio0-4x", "dcxo24M", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE), - }, -}; - -static CLK_FIXED_FACTOR_HW(pll_audio0_2x_clk, "pll-audio0-2x", - &pll_audio0_4x_clk.common.hw, - 2, 1, 0); - -static CLK_FIXED_FACTOR_HW(pll_audio0_1x_clk, "pll-audio0-1x", - &pll_audio0_4x_clk.common.hw, - 4, 1, 0); - -static CLK_FIXED_FACTOR(pll_audio0_div_48m_clk, "pll-audio0-div-48m", - "pll-audio0-2x", 4, 1, 0); - -#define SUN55IW3_PLL_NPU_CTRL_REG 0x0080 -static struct ccu_nm pll_npu_4x_clk = { - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(1, 1), /* input divider */ - .common = { - .reg = 0x0080, - .hw.init = CLK_HW_INIT("pll-npu-4x", "dcxo24M", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE | - CLK_IS_CRITICAL), - }, -}; - -static CLK_FIXED_FACTOR_HW(pll_npu_2x_clk, "pll-npu-2x", - &pll_npu_4x_clk.common.hw, - 2, 1, 0); - -static CLK_FIXED_FACTOR_HW(pll_npu_1x_clk, "pll-npu-1x", - &pll_npu_4x_clk.common.hw, - 4, 1, 0); - -static struct clk_div_table cpu0_div_table[] = { - { .val = 0, .div = 1 }, - { .val = 1, .div = 2 }, - { .val = 2, .div = 4 }, -}; - -static SUNXI_CCU_DIV_TABLE(cpu0_div_clk, "cpu0-div", "pll-cpu0", - 0x0500, 16, 2, cpu0_div_table, CLK_SET_RATE_PARENT); - -static const char * const cpu_parents[] = { "dcxo24M", "osc32k", "iosc", "cpu0-div", "pll-peri0-600m", "pll-cpu2" }; - -static SUNXI_CCU_MUX(cpu_clk, "cpu", cpu_parents, - 0x0500, 24, 3, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL); - -static SUNXI_CCU_M(cpu_axi_clk, "cpu-axi", - "dsu", 0x0500, 1, 2, 0); - -static SUNXI_CCU_M(cpu_apb_clk, "cpu-apb", - "dsu", 0x0500, 8, 2, 0); - -static SUNXI_CCU_M(cpu_peri_clk, "cpu-peri", - "dsu", 0x0500, 2, 2, 0); - -/* wrong clk name:0504 -static SUNXI_CCU_GATE(cpu_gatin_clk, "cpu-gatin", - "cpu-gatin-clk-parents", - 0x0504, BIT(16), 0); -*/ -static SUNXI_CCU_GATE(dsu_clk, "dsu", "hosc", - 0x0504, BIT(1), 0); -/* -static SUNXI_CCU_GATE(cpu0_clk_clk, "cpu0-clk", - "cpu0-clk-clk-parents", - 0x0504, BIT(0), 0); -*/ - -static const char * const trace_parents[] = { "dcxo24M", "osc32k", "iosc", "pll-peri0-300m", "pll-peri0-400m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(trace_clk, "trace", - trace_parents, 0x0508, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static struct clk_div_table cpu1_div_table[] = { - { .val = 0, .div = 1 }, - { .val = 1, .div = 2 }, - { .val = 2, .div = 4 }, -}; - -static SUNXI_CCU_DIV_TABLE(cpu1_div_clk, "cpu1-div", "pll-cpu1", - 0x050c, 16, 2, cpu1_div_table, CLK_SET_RATE_PARENT); - -static const char * const dsu_parents[] = { "dcxo24M", "osc32k", "iosc", "cpu1-div", "pll-peri0-2x", "pll-peri0-600m" }; - -static SUNXI_CCU_MUX(dsu_parents_clk, "dsu-parents", dsu_parents, - 0x050c, 24, 3, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL); - -static const char * const ahb_parents[] = { "dcxo24M", "osc32k", "iosc", "pll-peri0-600m" }; - -SUNXI_CCU_M_WITH_MUX(ahb_clk, "ahb", ahb_parents, - 0x0510, 0, 5, 24, 2, CLK_SET_RATE_PARENT); - -static const char * const apb0_parents[] = { "dcxo24M", "osc32k", "iosc", "pll-peri0-600m" }; - -SUNXI_CCU_M_WITH_MUX(apb0_clk, "apb0", apb0_parents, - 0x0520, 0, 5, 24, 2, CLK_SET_RATE_PARENT); - -static const char * const apb1_parents[] = { "dcxo24M", "osc32k", "iosc", "pll-peri0-600m" }; - -SUNXI_CCU_M_WITH_MUX(apb1_clk, "apb1", apb1_parents, - 0x0524, 0, 5, 24, 2, CLK_SET_RATE_PARENT); - -static const char * const mbus_parents[] = { "pll-ddr", "pll-peri1-600m", "pll-peri1-480m", "pll-peri1-400m", "pll-peri1-150m", "hosc" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(mbus_clk, "mbus", - mbus_parents, 0x0540, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(nsi_clk, "nsi", - "dcxo24M", - 0x054C, BIT(0), 0); - -static const char * const gic_parents[] = { "dcxo24M", "osc32k", "pll-peri0-600m", "pll-peri0-480m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(gic_clk, "gic", - gic_parents, 0x0550, - 0, 5, /* M */ - 24, 2, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static const char * const de_parents[] = { "pll-peri0-300m", "pll-peri0-400m", "pll-video0-4x", "pll-video1-4x", "pll-video2-4x", "pll-video3-4x" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(de_clk, "de", - de_parents, 0x0600, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(de0_clk, "de0", - "dcxo24M", - 0x060C, BIT(0), 0); - -static const char * const di_parents[] = { "pll-peri0-400m", "pll-video0-4x" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(di_clk, "di", - di_parents, 0x0620, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(bus_di_clk, "bus-di", - "dcxo24M", - 0x062C, BIT(0), 0); - -static const char * const g2d_parents[] = { "pll-peri0-400m", "pll-peri0-300m", "pll-video0-4x", "pll-video1-4x" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(g2d_clk, "g2d", - g2d_parents, 0x0630, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(bus_g2d_clk, "bus-g2d", - "dcxo24M", - 0x063C, BIT(0), 0); - -static const char * const gpu_parents[] = { "pll-peri0-800m", "pll-peri0-600m", "pll-peri0-400m", "pll-peri0-300m", "pll-peri0-200m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(gpu_clk, "gpu", - gpu_parents, 0x0670, - 0, 4, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", - "dcxo24M", - 0x067C, BIT(0), 0); - -static const char * const ce_parents[] = { "dcxo24M", "pll-peri0-480m", "pll-peri0-400m", "pll-peri0-300m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(ce_clk, "ce", - ce_parents, 0x0680, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(ce_sys_clk, "ce-sys", - "dcxo24M", - 0x068C, BIT(1), 0); - -static SUNXI_CCU_GATE(bus_ce_clk, "bus-ce", - "dcxo24M", - 0x068C, BIT(0), 0); - -static const char * const ve_parents[] = { "pll-ve", "pll-peri0-480m", "pll-peri0-400m", "pll-peri0-300m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(ve_clk, "ve", - ve_parents, 0x0690, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(bus_ve_clk, "bus-ve", - "dcxo24M", - 0x069C, BIT(0), 0); - -static const char * const npu_parents[] = { "pll-peri0-480m", "pll-peri0-600m", "pll-peri0-800m", "npupll4x" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(npu_clk, "npu", - npu_parents, 0x06E0, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(dma_clk, "dma", - "dcxo24M", - 0x070C, BIT(0), 0); - -static SUNXI_CCU_GATE(msgbox1_clk, "msgbox1", - "dcxo24M", - 0x071C, BIT(1), 0); - -static SUNXI_CCU_GATE(msgbox0_clk, "msgbox0", - "dcxo24M", - 0x071C, BIT(0), 0); - -static SUNXI_CCU_GATE(spinlock_clk, "spinlock", - "dcxo24M", - 0x072C, BIT(0), 0); - -static SUNXI_CCU_GATE(timer_clk, "timer", - "dcxo24M", - 0x074C, BIT(0), 0); - -static SUNXI_CCU_GATE(dbgsys_clk, "dbgsys", - "dcxo24M", - 0x078C, BIT(0), 0); - -static SUNXI_CCU_GATE(pwm1_clk, "pwm1", - "dcxo24M", - 0x07AC, BIT(1), 0); - -static SUNXI_CCU_GATE(pwm_clk, "pwm", - "dcxo24M", - 0x07AC, BIT(0), 0); - -static SUNXI_CCU_GATE(iommu_clk, "iommu", - "dcxo24M", - 0x07BC, BIT(0), 0); - -static const char * const timer_parents[] = { "dcxo24M", "iosc", "clk-32k", "clk-peri0-200m" }; - -static struct ccu_div timer0_clk = { - .enable = BIT(31), - .div = _SUNXI_CCU_DIV_FLAGS(0, 3, CLK_DIVIDER_POWER_OF_TWO), - .mux = _SUNXI_CCU_MUX(24, 3), - .common = { - .reg = 0x0730, - .hw.init = CLK_HW_INIT_PARENTS("timer0", timer_parents, &ccu_div_ops, 0), - }, -}; - -static struct ccu_div timer1_clk = { - .enable = BIT(31), - .div = _SUNXI_CCU_DIV_FLAGS(0, 3, CLK_DIVIDER_POWER_OF_TWO), - .mux = _SUNXI_CCU_MUX(24, 3), - .common = { - .reg = 0x0730, - .hw.init = CLK_HW_INIT_PARENTS("timer1", timer_parents, &ccu_div_ops, 0), - }, -}; - -static struct ccu_div timer2_clk = { - .enable = BIT(31), - .div = _SUNXI_CCU_DIV_FLAGS(0, 3, CLK_DIVIDER_POWER_OF_TWO), - .mux = _SUNXI_CCU_MUX(24, 3), - .common = { - .reg = 0x0730, - .hw.init = CLK_HW_INIT_PARENTS("timer2", timer_parents, &ccu_div_ops, 0), - }, -}; - -static struct ccu_div timer3_clk = { - .enable = BIT(31), - .div = _SUNXI_CCU_DIV_FLAGS(0, 3, CLK_DIVIDER_POWER_OF_TWO), - .mux = _SUNXI_CCU_MUX(24, 3), - .common = { - .reg = 0x0730, - .hw.init = CLK_HW_INIT_PARENTS("timer3", timer_parents, &ccu_div_ops, 0), - }, -}; - -static struct ccu_div timer4_clk = { - .enable = BIT(31), - .div = _SUNXI_CCU_DIV_FLAGS(0, 3, CLK_DIVIDER_POWER_OF_TWO), - .mux = _SUNXI_CCU_MUX(24, 3), - .common = { - .reg = 0x0730, - .hw.init = CLK_HW_INIT_PARENTS("timer4", timer_parents, &ccu_div_ops, 0), - }, -}; - -static struct ccu_div timer5_clk = { - .enable = BIT(31), - .div = _SUNXI_CCU_DIV_FLAGS(0, 3, CLK_DIVIDER_POWER_OF_TWO), - .mux = _SUNXI_CCU_MUX(24, 3), - .common = { - .reg = 0x0730, - .hw.init = CLK_HW_INIT_PARENTS("timer5", timer_parents, &ccu_div_ops, 0), - }, -}; - -static const char * const dram_parents[] = { "pll-ddr", "pll-peri1-600m", "peri1-480m", "pll-peri1-400m", "peri1-150m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(dram_clk, "dram", - dram_parents, 0x0800, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(usb_mbus_gate_clk, "usb-mbus-gate", - "dcxo24M", - 0x0804, BIT(25), 0); - -static SUNXI_CCU_GATE(gpu_mbus_gate_clk, "gpu-mbus-gate", - "dcxo24M", - 0x0804, BIT(24), 0); - -static SUNXI_CCU_GATE(de_mbus_gate_clk, "de-mbus-gate", - "dcxo24M", - 0x0804, BIT(23), 0); - -static SUNXI_CCU_GATE(nand_mbus_gate_clk, "nand-mbus-gate", - "dcxo24M", - 0x0804, BIT(22), 0); - -static SUNXI_CCU_GATE(npu_mbus_gate_clk, "npu-mbus-gate", - "dcxo24M", - 0x0804, BIT(21), 0); - -static SUNXI_CCU_GATE(vid_in_mbus_gate_clk, "vid-in-mbus-gate", - "dcxo24M", - 0x0804, BIT(20), 0); - -static SUNXI_CCU_GATE(vid_out_mbus_gate_clk, "vid-out-mbus-gate", - "dcxo24M", - 0x0804, BIT(19), 0); - -static SUNXI_CCU_GATE(ce_mbus_gate_clk, "ce-mbus-gate", - "dcxo24M", - 0x0804, BIT(18), 0); - -static SUNXI_CCU_GATE(ve_mbus_gate_clk, "ve-mbus-gate", - "dcxo24M", - 0x0804, BIT(17), 0); - -static SUNXI_CCU_GATE(dma_mbus_gate_clk, "dma-mbus-gate", - "dcxo24M", - 0x0804, BIT(16), 0); - -static SUNXI_CCU_GATE(bus_dram_clk, "bus-dram", - "dcxo24M", - 0x080C, BIT(0), 0); - -static const char * const nand0_clk0_parents[] = { "dcxo24M", "pll-peri0-400m", "pll-peri0-300m", "pll-peri1-400m", "pll-peri1-300m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(nand0_clk0_clk, "nand0-clk0", - nand0_clk0_parents, 0x0810, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static const char * const nand0_clk1_parents[] = { "dcxo24M", "pll-peri0-400m", "pll-peri0-300m", "pll-peri1-400m", "pll-peri1-300m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(nand0_clk1_clk, "nand0-clk1", - nand0_clk1_parents, 0x0814, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(nand0_clk, "nand0", - "dcxo24M", - 0x082C, BIT(0), 0); - -static const char * const smhc0_parents[] = { "dcxo24M", "pll-peri0-400m", "pll-peri0-300m", "pll-peri1-400m", "pll-peri1-300m" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(smhc0_clk, "smhc0", - smhc0_parents, 0x0830, - 0, 5, /* M */ - 8, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static const char * const smhc1_parents[] = { "dcxo24M", "pll-peri0-400m", "pll-peri0-300m", "pll-peri1-400m", "pll-peri1-300m" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(smhc1_clk, "smhc1", - smhc1_parents, 0x0834, - 0, 5, /* M */ - 8, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static const char * const smhc2_parents[] = { "dcxo24M", "pll-peri0-800m", "pll-peri0-600m", "pll-peri1-800m", "pll-peri1-600m" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(smhc2_clk, "smhc2", - smhc2_parents, 0x0838, - 0, 5, /* M */ - 8, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static SUNXI_CCU_GATE(bus_smhc2_clk, "bus-smhc2", - "dcxo24M", - 0x084C, BIT(2), 0); - -static SUNXI_CCU_GATE(bus_smhc1_clk, "bus-smhc1", - "dcxo24M", - 0x084C, BIT(1), 0); - -static SUNXI_CCU_GATE(bus_smhc0_clk, "bus-smhc0", - "dcxo24M", - 0x084C, BIT(0), 0); - -static SUNXI_CCU_GATE(sysdap_clk, "sysdap", - "dcxo24M", - 0x088C, BIT(0), 0); - -static SUNXI_CCU_GATE(uart7_clk, "uart7", - "dcxo24M", - 0x090C, BIT(7), 0); - -static SUNXI_CCU_GATE(uart6_clk, "uart6", - "dcxo24M", - 0x090C, BIT(6), 0); - -static SUNXI_CCU_GATE(uart5_clk, "uart5", - "dcxo24M", - 0x090C, BIT(5), 0); - -static SUNXI_CCU_GATE(uart4_clk, "uart4", - "dcxo24M", - 0x090C, BIT(4), 0); - -static SUNXI_CCU_GATE(uart3_clk, "uart3", - "dcxo24M", - 0x090C, BIT(3), 0); - -static SUNXI_CCU_GATE(uart2_clk, "uart2", - "dcxo24M", - 0x090C, BIT(2), 0); - -static SUNXI_CCU_GATE(bus_uart1_clk, "bus-uart1", - "dcxo24M", - 0x090C, BIT(1), 0); - -static SUNXI_CCU_GATE(bus_uart0_clk, "bus-uart0", - "dcxo24M", - 0x090C, BIT(0), 0); - -static SUNXI_CCU_GATE(twi5_clk, "twi5", - "dcxo24M", - 0x091C, BIT(5), 0); - -static SUNXI_CCU_GATE(twi4_clk, "twi4", - "dcxo24M", - 0x091C, BIT(4), 0); - -static SUNXI_CCU_GATE(twi3_clk, "twi3", - "dcxo24M", - 0x091C, BIT(3), 0); - -static SUNXI_CCU_GATE(twi2_clk, "twi2", - "dcxo24M", - 0x091C, BIT(2), 0); - -static SUNXI_CCU_GATE(twi1_clk, "twi1", - "dcxo24M", - 0x091C, BIT(1), 0); - -static SUNXI_CCU_GATE(twi0_clk, "twi0", - "dcxo24M", - 0x091C, BIT(0), 0); - -static const char * const spi0_parents[] = { "dcxo24M", "pll-peri0-300m", "pll-peri0-200m", "pll-peri1-300m", "pll-peri1-200m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(spi0_clk, "spi0", - spi0_parents, 0x0940, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), 0); - -static const char * const spi1_parents[] = { "dcxo24M", "pll-peri0-300m", "pll-peri0-200m", "pll-peri1-300m", "pll-peri1-200m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(spi1_clk, "spi1", - spi1_parents, 0x0944, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), 0); - -static const char * const spi2_parents[] = { "dcxo24M", "pll-peri0-300m", "pll-peri0-200m", "pll-peri1-300m", "pll-peri1-200m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(spi2_clk, "spi2", - spi2_parents, 0x0948, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), 0); - -static const char * const spif_parents[] = { "dcxo24M", "pll-peri0-200m", "pll-peri0-300m", "pll-peri1-200m", "pll-peri1-300m" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(spif_clk, "spif", - spif_parents, 0x0950, - 0, 5, /* M */ - 8, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static SUNXI_CCU_GATE(bus_spif_clk, "bus-spif", - "dcxo24M", - 0x096C, BIT(3), 0); - -static SUNXI_CCU_GATE(bus_spi2_clk, "bus-spi2", - "dcxo24M", - 0x096C, BIT(2), 0); - -static SUNXI_CCU_GATE(bus_spi1_clk, "bus-spi1", - "dcxo24M", - 0x096C, BIT(1), 0); - -static SUNXI_CCU_GATE(bus_spi0_clk, "bus-spi0", - "dcxo24M", - 0x096C, BIT(0), 0); - -static SUNXI_CCU_GATE(gmac0_25m_clk, "gmac0-25m", - "dcxo24M", - 0x0970, BIT(31), 0); - -static SUNXI_CCU_GATE(gmac0_25m_clk_src_clk, "gmac0-25m-clk-src", - "dcxo24M", - 0x0970, BIT(30), 0); - -static SUNXI_CCU_GATE(gmac1_25m_clk, "gmac1-25m", - "dcxo24M", - 0x0974, BIT(31), 0); - -static SUNXI_CCU_GATE(gmac1_25m_clk_src_clk, "gmac1-25m-clk-src", - "dcxo24M", - 0x0974, BIT(30), 0); - -static SUNXI_CCU_GATE(gmac1_clk, "gmac1", - "dcxo24M", - 0x097C, BIT(1), 0); - -static SUNXI_CCU_GATE(gmac0_clk, "gmac0", - "dcxo24M", - 0x097C, BIT(0), 0); - -static const char * const irrx_parents[] = { "osc32k", "dcxo24M" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(irrx_clk, "irrx", - irrx_parents, 0x0990, - 0, 5, /* M */ - 24, 1, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(bus_irrx_clk, "bus-irrx", - "dcxo24M", - 0x099C, BIT(0), 0); - -static const char * const irtx_parents[] = { "dcxo24M", "pll-peri1-600m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(irtx_clk, "irtx", - irtx_parents, 0x09C0, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(bus_irtx_clk, "bus-irtx", - "dcxo24M", - 0x09CC, BIT(0), 0); - -static SUNXI_CCU_GATE(bus_gpadc0_clk, "bus-gpadc0", - "dcxo24M", - 0x09E0, BIT(31), 0); - -static SUNXI_CCU_GATE(bus_gpadc1_clk, "bus-gpadc1", - "dcxo24M", - 0x09EC, BIT(0), 0); - -static SUNXI_CCU_GATE(ths_clk, "ths", - "dcxo24M", - 0x09FC, BIT(0), 0); - -static SUNXI_CCU_GATE(usb_clk, "usb", - "dcxo24M", - 0x0A70, BIT(31), 0); - -static CLK_FIXED_FACTOR(dcxo12M_clk, "dcxo12M", "dcxo24M", 2, 1, 0); - -#define SUN55IW3_USB0_CTRL_REG 0x0A70 -static const char * const usb_parents[] = { "pll-audio0-div-48m", "dcxo12M", "osc32k", "iosc" }; - -static SUNXI_CCU_MUX_WITH_GATE(usb0_clk, "usb0", usb_parents, 0x0A70, - 24, 2, BIT(31), 0); - -#define SUN55IW3_USB1_CTRL_REG 0x0A74 -static SUNXI_CCU_MUX_WITH_GATE(usb1_clk, "usb1", usb_parents, 0x0A74, - 24, 2, BIT(31), 0); - -static SUNXI_CCU_GATE(usbotg0_clk, "usbotg0", - "dcxo24M", - 0x0A8C, BIT(8), 0); - -static SUNXI_CCU_GATE(usbehci1_clk, "usbehci1", - "dcxo24M", - 0x0A8C, BIT(5), 0); - -static SUNXI_CCU_GATE(usbehci0_clk, "usbehci0", - "dcxo24M", - 0x0A8C, BIT(4), 0); - -static SUNXI_CCU_GATE(usbohci1_clk, "usbohci1", - "dcxo24M", - 0x0A8C, BIT(1), 0); - -static SUNXI_CCU_GATE(usbohci0_clk, "usbohci0", - "dcxo24M", - 0x0A8C, BIT(0), 0); - -static SUNXI_CCU_GATE(lradc_clk, "lradc", - "dcxo24M", - 0x0A9C, BIT(0), 0); - -static const char * const pcie_ref_alt_parents[] = { "dcxo24M", "osc32k" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(pcie_ref_alt_clk, "pcie-ref-alt", - pcie_ref_alt_parents, 0x0AA0, - 0, 5, /* M */ - 24, 1, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(pcie_ref_clk, "pcie-ref", - "dcxo24M", - 0x0AA4, BIT(31), 0); - -static SUNXI_CCU_GATE(pcie_clk, "pcie", - "dcxo24M", - 0x0AAC, BIT(0), 0); - -static SUNXI_CCU_GATE(dpss_top0_clk, "dpss-top0", - "dcxo24M", - 0x0ABC, BIT(0), 0); - -static SUNXI_CCU_GATE(dpss_top1_clk, "dpss-top1", - "dcxo24M", - 0x0ACC, BIT(0), 0); - -static SUNXI_CCU_GATE(hdmi_24m_clk, "hdmi-24m", - "dcxo24M", - 0x0B04, BIT(31), 0); - -static const char * const hdmi_cec_parents[] = { "osc32k", "hdmi-cec-osc32k" }; - -static SUNXI_CCU_MUX_WITH_GATE(hdmi_cec_clk, "hdmi-cec", - hdmi_cec_parents, 0x0B10, - 24, 1, /* mux */ - BIT(31), 0); - -static SUNXI_CCU_GATE(hdmi_clk, "hdmi", - "dcxo24M", - 0x0B1C, BIT(0), 0); - -static const char * const dsi0_parents[] = { "dcxo24M", "pll-peri0-200m", "pll-peri0-150m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(dsi0_clk, "dsi0", - dsi0_parents, 0x0B24, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static const char * const dsi1_parents[] = { "dcxo24M", "pll-peri0-200m", "pll-peri0-150m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(dsi1_clk, "dsi1", - dsi1_parents, 0x0B28, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(bus_dsi1_clk, "bus-dsi1", - "dcxo24M", - 0x0B4C, BIT(1), 0); - -static SUNXI_CCU_GATE(bus_dsi0_clk, "bus-dsi0", - "dcxo24M", - 0x0B4C, BIT(0), 0); - -static const char * const vo0_tconlcd0_parents[] = { "pll-video0-4x", "pll-video1-4x", "pll-video2-4x", "pll-video3-4x", "pll-peri0-2x" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(vo0_tconlcd0_clk, "vo0-tconlcd0", - vo0_tconlcd0_parents, 0x0B60, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static const char * const vo0_tconlcd1_parents[] = { "pll-video0-4x", "pll-video1-4x", "pll-video2-4x", "pll-video3-4x", "pll-peri0-2x" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(vo0_tconlcd1_clk, "vo0-tconlcd1", - vo0_tconlcd1_parents, 0x0B64, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static const char * const vo1_tconlcd0_parents[] = { "pll-video0-4x", "pll-video1-4x", "pll-video2-4x", "pll-video3-4x", "pll-peri0-2x" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(vo1_tconlcd0_clk, "vo1-tconlcd0", - vo1_tconlcd0_parents, 0x0B68, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static const char * const combphy0_parents[] = { "pll-video0-4x", "pll-video1-4x", "pll-video2-4x", "pll-video3-4x", "pll-peri0-2x" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(combphy0_clk, "combphy0", - combphy0_parents, 0x0B6C, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static const char * const combphy1_parents[] = { "pll-video0-4x", "pll-video1-4x", "pll-video2-4x", "pll-video3-4x", "pll-peri0-2x" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(combphy1_clk, "combphy1", - combphy1_parents, 0x0B70, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(bus_vo1_tconlcd0_clk, "bus-vo1-tconlcd0", - "dcxo24M", - 0x0B7C, BIT(2), 0); - -static SUNXI_CCU_GATE(bus_vo0_tconlcd1_clk, "bus-vo0-tconlcd1", - "dcxo24M", - 0x0B7C, BIT(1), 0); - -static SUNXI_CCU_GATE(bus_vo0_tconlcd0_clk, "bus-vo0-tconlcd0", - "dcxo24M", - 0x0B7C, BIT(0), 0); - -static const char * const tcontv_parents[] = { "pll-video0-4x", "pll-video1-4x", "pll-video2-4x", "pll-video3-4x", "pll-peri0-2x" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(tcontv_clk, "tcontv", - tcontv_parents, 0x0B80, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static const char * const tcontv1_parents[] = { "pll-video0-4x", "pll-video1-4x", "pll-video2-4x", "pll-video3-4x", "pll-peri0-2x" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(tcontv1_clk, "tcontv1", - tcontv1_parents, 0x0B84, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(bus_tcontv1_clk, "bus-tcontv1", - "dcxo24M", - 0x0B9C, BIT(1), 0); - -static SUNXI_CCU_GATE(bus_tcontv_clk, "bus-tcontv", - "dcxo24M", - 0x0B9C, BIT(0), 0); - -static const char * const ledc_parents[] = { "dcxo24M", "pll-peri0-600m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(ledc_clk, "ledc", - ledc_parents, 0x0BF0, - 0, 5, /* M */ - 24, 1, /* mux */ - BIT(31), 0); - -static const char * const edp_parents[] = { "pll-video0-4x", "pll-vidio1-4x", "pll-vidio2-4x", "pll-vidio3-4x", "pll-peri0-2x" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(edp_clk, "edp", - edp_parents, 0x0BB0, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(bus_ledc_clk, "bus-ledc", - "dcxo24M", - 0x0BFC, BIT(0), 0); - -static const char * const csi_parents[] = { "pll-peri0-300m", "pll-peri0-400m", "pll-peri0-480m", "pll-video0-4x", "pll-video3-4x" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(csi_clk, "csi", - csi_parents, 0x0C04, - 0, 5, /* m */ - 24, 3, /* mux */ - BIT(31), 0); - -static const char * const csi_master0_parents[] = { "dcxo24M", "pll-video3-4x", "pll-video0-4x", "pll-video1-4x", "pll-video2-4x" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(csi_master0_clk, "csi-master0", - csi_master0_parents, 0x0C08, - 0, 5, /* M */ - 8, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static const char * const csi_master1_parents[] = { "dcxo24M", "pll-video3-4x", "pll-video0-4x", "pll-video1-4x", "pll-video2-4x" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(csi_master1_clk, "csi-master1", - csi_master1_parents, 0x0C0C, - 0, 5, /* M */ - 8, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static const char * const csi_master2_parents[] = { "dcxo24M", "pll-video3-4x", "pll-video0-4x", "pll-video1-4x", "pll-video2-4x" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(csi_master2_clk, "csi-master2", - csi_master2_parents, 0x0C10, - 0, 5, /* M */ - 8, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static const char * const csi_master3_parents[] = { "dcxo24M", "pll-video3-4x", "pll-video0-4x", "pll-video1-4x", "pll-video2-4x" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(csi_master3_clk, "csi-master3", - csi_master3_parents, 0x0C14, - 0, 5, /* M */ - 8, 5, /* N */ - 24, 3, /* mux */ - BIT(31), 0); - -static SUNXI_CCU_GATE(bus_csi_clk, "bus-csi", - "dcxo24M", - 0x0C1C, BIT(0), 0); - -static const char * const isp_parents[] = { "pll-peri0-300m", "pll-peri0-400m", "pll-video0-4x", "pll-video3-4x" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(isp_clk, "isp", - isp_parents, 0x0C20, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static const char * const dsp_parents[] = { "dcxo24M", "osc32k", "iosc", "pll-peri0-2x", "pll-peri0-480m" }; - -static SUNXI_CCU_M_WITH_MUX_GATE(dsp_clk, "dsp", - dsp_parents, 0x0C70, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(cpus_hclk_gate_clk, "cpus-hclk-gate", - "dcxo24M", - 0x0E04, BIT(28), 0); - -static SUNXI_CCU_GATE(spif_mbus_ahb_gate_clk, "spif-mbus-ahb-gate", - "dcxo24M", - 0x0E04, BIT(22), 0); - -static SUNXI_CCU_GATE(gmac1_mbus_ahb_gate_clk, "gmac1-mbus-ahb-gate", - "dcxo24M", - 0x0E04, BIT(21), 0); - -static SUNXI_CCU_GATE(gmac0_mbus_ahb_gate_clk, "gmac0-mbus-ahb-gate", - "dcxo24M", - 0x0E04, BIT(20), 0); - -static SUNXI_CCU_GATE(smhc2_mbus_ahb_gate_clk, "smhc2-mbus-ahb-gate", - "dcxo24M", - 0x0E04, BIT(19), 0); - -static SUNXI_CCU_GATE(smhc1_mbus_ahb_gate_clk, "smhc1-mbus-ahb-gate", - "dcxo24M", - 0x0E04, BIT(18), 0); - -static SUNXI_CCU_GATE(smhc0_mbus_ahb_gate_clk, "smhc0-mbus-ahb-gate", - "dcxo24M", - 0x0E04, BIT(17), 0); - -static SUNXI_CCU_GATE(usb_mbus_ahb_gate_clk, "usb-mbus-ahb-gate", - "dcxo24M", - 0x0E04, BIT(16), 0); - -static SUNXI_CCU_GATE(gmac1_ahb_gate_clk, "gmac1-ahb-gate", - "dcxo24M", - 0x0E04, BIT(9), 0); - -static SUNXI_CCU_GATE(gmac0_ahb_gate_clk, "gmac0-ahb-gate", - "dcxo24M", - 0x0E04, BIT(8), 0); - -static SUNXI_CCU_GATE(smhc2_ahb_gate_clk, "smhc2-ahb-gate", - "dcxo24M", - 0x0E04, BIT(7), 0); - -static SUNXI_CCU_GATE(smhc1_ahb_gate_clk, "smhc1-ahb-gate", - "dcxo24M", - 0x0E04, BIT(6), 0); - -static SUNXI_CCU_GATE(smhc0_ahb_gate_clk, "smhc0-ahb-gate", - "dcxo24M", - 0x0E04, BIT(5), 0); - -static SUNXI_CCU_GATE(usb_ahb_gate_clk, "usb-ahb-gate", - "dcxo24M", - 0x0E04, BIT(4), 0); - -static SUNXI_CCU_GATE(vid_out_ahb_gate_clk, "vid-out-ahb-gate", - "dcxo24M", - 0x0E04, BIT(3), 0); - -static SUNXI_CCU_GATE(vid_in_ahb_gate_clk, "vid-in-ahb-gate", - "dcxo24M", - 0x0E04, BIT(2), 0); - -static SUNXI_CCU_GATE(ve_ahb_gate_clk, "ve-ahb-gate", - "dcxo24M", - 0x0E04, BIT(1), 0); - -static SUNXI_CCU_GATE(npu_ahb_gate_clk, "npu-ahb-gate", - "dcxo24M", - 0x0E04, BIT(0), 0); - -static SUNXI_CCU_GATE(res_dcap_24m_clk, "res-dcap-24m", - "dcxo24M", - 0x0E0C, BIT(3), 0); - -static SUNXI_CCU_GATE(usb_24m_clk, "usb-24m", - "dcxo24M", - 0x0E0C, BIT(0), 0); - -static SUNXI_CCU_GATE(fanout_25m_clk, "fanout-25m", - "dcxo24M", - 0x0F30, BIT(3), 0); - -static SUNXI_CCU_GATE(fanout_16m_clk, "fanout-16m", - "dcxo24M", - 0x0F30, BIT(2), 0); - -static SUNXI_CCU_GATE(fanout_12m_clk, "fanout-12m", - "dcxo24M", - 0x0F30, BIT(1), 0); - -static SUNXI_CCU_GATE(fanout_24m_clk, "fanout-24m", - "dcxo24M", - 0x0F30, BIT(0), 0); - -static const char * const clk27m_fanout_parents[] = { "pll-video0-1x", "pll-video1-1x", "pll-video2-1x","pll-video3-1x" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(clk27m_fanout_clk, "clk27m_fanout", - clk27m_fanout_parents, 0x0F34, - 0, 5, /* M */ - 8, 5, /* N */ - 24, 2, /* mux */ - BIT(31), 0); - -static const char * const clk_fanout_parents[] = { "apb0" }; - -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(clk_fanout_clk, "clk-fanout", - clk_fanout_parents, 0x0F38, - 0, 5, /* M */ - 5, 5, /* N */ - 24, 2, /* mux */ - BIT(31), 0); - -static const char * const fanout_clk_parents[] = { "rtc-32k-fanout", "osc32k", "dcxo-div-12m", "pll-peri0-16m", "dcxo24M", "pll-peri0-25m", "clk27m-fanout", "clk-fanout" }; - -static SUNXI_CCU_MUX(fanout2_clk, "fanout2", fanout_clk_parents, - 0x0F3C, 6, 3, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL); - -static SUNXI_CCU_MUX(fanout1_clk, "fanout1", fanout_clk_parents, - 0x0F3C, 3, 3, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL); - -static SUNXI_CCU_MUX(fanout0_clk, "fanout0", fanout_clk_parents, - 0x0F3C, 0, 3, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL); - - -/* rst_def_start */ -static struct ccu_reset_map sun55iw3_ccu_resets[] = -{ - [RST_MBUS] = { 0x0540, BIT(30) }, - [RST_BUS_NSI] = { 0x054c, BIT(16) }, - [RST_BUS_DE0] = { 0x060c, BIT(16) }, - [RST_BUS_DI] = { 0x062c, BIT(16) }, - [RST_BUS_G2D] = { 0x063c, BIT(16) }, - [RST_BUS_GPU] = { 0x067c, BIT(16) }, - [RST_BUS_CE_SY] = { 0x068c, BIT(17) }, - [RST_BUS_CE] = { 0x068c, BIT(16) }, - [RST_BUS_VE] = { 0x069c, BIT(16) }, - [RST_BUS_DMA] = { 0x070c, BIT(16) }, - [RST_BUS_MSGBOX1] = { 0x071c, BIT(17) }, - [RST_BUS_MSGBOX0] = { 0x071c, BIT(16) }, - [RST_BUS_SPINLOCK] = { 0x072c, BIT(16) }, - [RST_BUS_TIME] = { 0x074c, BIT(16) }, - [RST_BUS_DBGSY] = { 0x078c, BIT(16) }, - [RST_BUS_PWM1] = { 0x07ac, BIT(17) }, - [RST_BUS_PWM] = { 0x07ac, BIT(16) }, - [RST_BUS_DRAM] = { 0x080c, BIT(16) }, - [RST_BUS_NAND0] = { 0x082c, BIT(16) }, - [RST_BUS_SMHC2] = { 0x084c, BIT(18) }, - [RST_BUS_SMHC1] = { 0x084c, BIT(17) }, - [RST_BUS_SMHC0] = { 0x084c, BIT(16) }, - [RST_BUS_SYSDAP] = { 0x088c, BIT(16) }, - [RST_BUS_UART7] = { 0x090c, BIT(23) }, - [RST_BUS_UART6] = { 0x090c, BIT(22) }, - [RST_BUS_UART5] = { 0x090c, BIT(21) }, - [RST_BUS_UART4] = { 0x090c, BIT(20) }, - [RST_BUS_UART3] = { 0x090c, BIT(19) }, - [RST_BUS_UART2] = { 0x090c, BIT(18) }, - [RST_BUS_UART1] = { 0x090c, BIT(17) }, - [RST_BUS_UART0] = { 0x090c, BIT(16) }, - [RST_BUS_TWI5] = { 0x091c, BIT(21) }, - [RST_BUS_TWI4] = { 0x091c, BIT(20) }, - [RST_BUS_TWI3] = { 0x091c, BIT(19) }, - [RST_BUS_TWI2] = { 0x091c, BIT(18) }, - [RST_BUS_TWI1] = { 0x091c, BIT(17) }, - [RST_BUS_TWI0] = { 0x091c, BIT(16) }, - [RST_BUS_SPIF] = { 0x096c, BIT(19) }, - [RST_BUS_SPI2] = { 0x096c, BIT(18) }, - [RST_BUS_SPI1] = { 0x096c, BIT(17) }, - [RST_BUS_SPI0] = { 0x096c, BIT(16) }, - [RST_BUS_GMAC1] = { 0x097c, BIT(17) }, - [RST_BUS_GMAC0] = { 0x097c, BIT(16) }, - [RST_BUS_IRRX] = { 0x099c, BIT(16) }, - [RST_BUS_IRTX] = { 0x09cc, BIT(16) }, - [RST_BUS_GPADC1] = { 0x09ec, BIT(17) }, - [RST_BUS_GPADC0] = { 0x09ec, BIT(16) }, - [RST_BUS_TH] = { 0x09fc, BIT(16) }, - [RST_USB_PHY0_RSTN] = { 0x0a70, BIT(30) }, - [RST_USB_PHY1_RSTN] = { 0x0a74, BIT(30) }, - [RST_USB_2_PHY] = { 0x0a8c, BIT(26) }, - [RST_USB_2] = { 0x0a8c, BIT(25) }, - [RST_USB_OTG0] = { 0x0a8c, BIT(24) }, - [RST_USB_EHCI1] = { 0x0a8c, BIT(21) }, - [RST_USB_EHCI0] = { 0x0a8c, BIT(20) }, - [RST_USB_OHCI1] = { 0x0a8c, BIT(17) }, - [RST_USB_OHCI0] = { 0x0a8c, BIT(16) }, - [RST_BUS_LRADC] = { 0x0a9c, BIT(16) }, - [RST_BUS_PCIE_PE] = { 0x0aac, BIT(18) }, - [RST_BUS_PCIE_POWER_UP] = { 0x0aac, BIT(17) }, - [RST_BUS_PCIE] = { 0x0aac, BIT(16) }, - [RST_BUS_DPSS_TOP0] = { 0x0abc, BIT(16) }, - [RST_BUS_DPSS_TOP1] = { 0x0acc, BIT(16) }, - [RST_BUS_HDMI_SUB] = { 0x0b1c, BIT(17) }, - [RST_BUS_HDMI_MAIN] = { 0x0b1c, BIT(16) }, - [RST_BUS_DSI1] = { 0x0b4c, BIT(17) }, - [RST_BUS_DSI0] = { 0x0b4c, BIT(16) }, - [RST_BUS_VO1_TCONLCD0] = { 0x0b7c, BIT(18) }, - [RST_BUS_VO0_TCONLCD1] = { 0x0b7c, BIT(17) }, - [RST_BUS_VO0_TCONLCD0] = { 0x0b7c, BIT(16) }, - [RST_BUS_TCONTV1] = { 0x0b9c, BIT(17) }, - [RST_BUS_TCONTV] = { 0x0b9c, BIT(16) }, - [RST_BUS_LVDS1] = { 0x0bac, BIT(17) }, - [RST_BUS_LVDS0] = { 0x0bac, BIT(16) }, - [RST_BUS_LEDC] = { 0x0bfc, BIT(16) }, - [RST_BUS_CSI] = { 0x0c1c, BIT(16) }, - [RST_BUS_ISP] = { 0x0c2c, BIT(16) }, - }; - /* rst_def_end */ - -static struct ccu_common *sun55iw3_ccu_clks[] = -{ - &pll_cpu0_clk.common, - &pll_ddr_clk.common, - &pll_peri0_parent_clk.common, - &pll_peri0_2x_clk.common, - &pll_peri0_800m_clk.common, - &pll_peri0_480m_clk.common, - &pll_peri1_parent_clk.common, - &pll_peri1_2x_clk.common, - &pll_peri1_800m_clk.common, - &pll_peri1_480m_clk.common, - &pll_gpu_clk.common, - &pll_video0_4x_clk.common, - &pll_video1_4x_clk.common, - &pll_video2_4x_clk.common, - &pll_ve_clk.common, - &pll_audio0_4x_clk.common, - &cpu0_div_clk.common, - &cpu_clk.common, - &cpu_axi_clk.common, - &cpu_apb_clk.common, - &cpu_peri_clk.common, - &dsu_clk.common, - &trace_clk.common, - &cpu1_div_clk.common, - &dsu_parents_clk.common, - &ahb_clk.common, - &apb0_clk.common, - &apb1_clk.common, - &mbus_clk.common, - &nsi_clk.common, - &gic_clk.common, - &de_clk.common, - &de0_clk.common, - &di_clk.common, - &bus_di_clk.common, - &g2d_clk.common, - &bus_g2d_clk.common, - &gpu_clk.common, - &bus_gpu_clk.common, - &ce_clk.common, - &ce_sys_clk.common, - &bus_ce_clk.common, - &ve_clk.common, - &bus_ve_clk.common, - &npu_clk.common, - &dma_clk.common, - &msgbox1_clk.common, - &msgbox0_clk.common, - &spinlock_clk.common, - &timer_clk.common, - &dbgsys_clk.common, - &pwm1_clk.common, - &pwm_clk.common, - &iommu_clk.common, - &timer0_clk.common, - &timer1_clk.common, - &timer2_clk.common, - &timer3_clk.common, - &timer4_clk.common, - &timer5_clk.common, - &dram_clk.common, - &usb_mbus_gate_clk.common, - &gpu_mbus_gate_clk.common, - &de_mbus_gate_clk.common, - &nand_mbus_gate_clk.common, - &npu_mbus_gate_clk.common, - &vid_in_mbus_gate_clk.common, - &vid_out_mbus_gate_clk.common, - &ce_mbus_gate_clk.common, - &ve_mbus_gate_clk.common, - &dma_mbus_gate_clk.common, - &bus_dram_clk.common, - &nand0_clk.common, - &nand0_clk0_clk.common, - &nand0_clk.common, - &nand0_clk.common, - &nand0_clk1_clk.common, - &nand0_clk.common, - &nand0_clk.common, - &smhc0_clk.common, - &smhc1_clk.common, - &smhc2_clk.common, - &bus_smhc2_clk.common, - &bus_smhc1_clk.common, - &bus_smhc0_clk.common, - &sysdap_clk.common, - &uart7_clk.common, - &uart6_clk.common, - &uart5_clk.common, - &uart4_clk.common, - &uart3_clk.common, - &uart2_clk.common, - &bus_uart1_clk.common, - &bus_uart0_clk.common, - &twi5_clk.common, - &twi4_clk.common, - &twi3_clk.common, - &twi2_clk.common, - &twi1_clk.common, - &twi0_clk.common, - &spi0_clk.common, - &spi1_clk.common, - &spi2_clk.common, - &spif_clk.common, - &bus_spif_clk.common, - &bus_spi2_clk.common, - &bus_spi1_clk.common, - &bus_spi0_clk.common, - &gmac0_25m_clk.common, - &gmac0_25m_clk_src_clk.common, - &gmac1_25m_clk.common, - &gmac1_25m_clk_src_clk.common, - &gmac1_clk.common, - &gmac0_clk.common, - &irrx_clk.common, - &bus_irrx_clk.common, - &irtx_clk.common, - &bus_irtx_clk.common, - &bus_gpadc0_clk.common, - &bus_gpadc1_clk.common, - &ths_clk.common, - &usb_clk.common, - &usb0_clk.common, - &usb1_clk.common, - &usbotg0_clk.common, - &usbehci1_clk.common, - &usbehci0_clk.common, - &usbohci1_clk.common, - &usbohci0_clk.common, - &lradc_clk.common, - &pcie_ref_alt_clk.common, - &pcie_ref_clk.common, - &pcie_clk.common, - &dpss_top0_clk.common, - &dpss_top1_clk.common, - &hdmi_24m_clk.common, - &hdmi_cec_clk.common, - &hdmi_clk.common, - &dsi0_clk.common, - &dsi1_clk.common, - &bus_dsi1_clk.common, - &bus_dsi0_clk.common, - &vo0_tconlcd0_clk.common, - &vo0_tconlcd1_clk.common, - &vo1_tconlcd0_clk.common, - &combphy0_clk.common, - &combphy1_clk.common, - &bus_vo1_tconlcd0_clk.common, - &bus_vo0_tconlcd1_clk.common, - &bus_vo0_tconlcd0_clk.common, - &tcontv_clk.common, - &tcontv1_clk.common, - &bus_tcontv1_clk.common, - &bus_tcontv_clk.common, - &ledc_clk.common, - &edp_clk.common, - &bus_ledc_clk.common, - &csi_clk.common, - &csi_master0_clk.common, - &csi_master1_clk.common, - &csi_master2_clk.common, - &csi_master3_clk.common, - &bus_csi_clk.common, - &isp_clk.common, - &dsp_clk.common, - &cpus_hclk_gate_clk.common, - &spif_mbus_ahb_gate_clk.common, - &gmac1_mbus_ahb_gate_clk.common, - &gmac0_mbus_ahb_gate_clk.common, - &smhc2_mbus_ahb_gate_clk.common, - &smhc1_mbus_ahb_gate_clk.common, - &smhc0_mbus_ahb_gate_clk.common, - &usb_mbus_ahb_gate_clk.common, - &gmac1_ahb_gate_clk.common, - &gmac0_ahb_gate_clk.common, - &smhc2_ahb_gate_clk.common, - &smhc1_ahb_gate_clk.common, - &smhc0_ahb_gate_clk.common, - &usb_ahb_gate_clk.common, - &vid_out_ahb_gate_clk.common, - &vid_in_ahb_gate_clk.common, - &ve_ahb_gate_clk.common, - &npu_ahb_gate_clk.common, - &res_dcap_24m_clk.common, - &usb_24m_clk.common, - &fanout_25m_clk.common, - &fanout_16m_clk.common, - &fanout_12m_clk.common, - &fanout_24m_clk.common, - &clk27m_fanout_clk.common, - &clk_fanout_clk.common, - &fanout2_clk.common, - &fanout2_clk.common, - &fanout1_clk.common, - &fanout1_clk.common, - &fanout0_clk.common, - &fanout0_clk.common, -}; -/* ccu_def_start */ - -static struct clk_hw_onecell_data sun55iw3_hw_clks = -{ - .hws = { - [CLK_PLL_CPU0] = &pll_cpu0_clk.common.hw, - [CLK_PLL_DDR] = &pll_ddr_clk.common.hw, - [CLK_PLL_PERI0_PARENT] = &pll_peri0_parent_clk.common.hw, - [CLK_PLL_PERI0_2X] = &pll_peri0_2x_clk.common.hw, - [CLK_PERI0_DIV3] = &pll_peri0_div3_clk.hw, - [CLK_PLL_PERI0_800M] = &pll_peri0_800m_clk.common.hw, - [CLK_PLL_PERI0_480M] = &pll_peri0_480m_clk.common.hw, - [CLK_PLL_PERI0_600M] = &pll_peri0_600m_clk.hw, - [CLK_PLL_PERI0_400M] = &pll_peri0_400m_clk.hw, - [CLK_PLL_PERI0_300M] = &pll_peri0_300m_clk.hw, - [CLK_PLL_PERI0_200M] = &pll_peri0_200m_clk.hw, - [CLK_PLL_PERI0_160M] = &pll_peri0_160m_clk.hw, - [CLK_PLL_PERI0_16M] = &pll_peri0_16m_clk.hw, - [CLK_PLL_PERI0_150M] = &pll_peri0_150m_clk.hw, - [CLK_PLL_PERI0_25M] = &pll_peri0_25m_clk.hw, - [CLK_PLL_PERI1_PARENT] = &pll_peri1_parent_clk.common.hw, - [CLK_PLL_PERI1_2X] = &pll_peri1_2x_clk.common.hw, - [CLK_PLL_PERI1_800M] = &pll_peri1_800m_clk.common.hw, - [CLK_PLL_PERI1_480M] = &pll_peri1_480m_clk.common.hw, - [CLK_PLL_PERI1_600M] = &pll_peri1_600m_clk.hw, - [CLK_PLL_PERI1_400M] = &pll_peri1_400m_clk.hw, - [CLK_PLL_PERI1_300M] = &pll_peri1_300m_clk.hw, - [CLK_PLL_PERI1_200M] = &pll_peri1_200m_clk.hw, - [CLK_PLL_PERI1_160M] = &pll_peri1_160m_clk.hw, - [CLK_PLL_PERI1_150M] = &pll_peri1_150m_clk.hw, - [CLK_PLL_GPU] = &pll_gpu_clk.common.hw, - [CLK_PLL_VIDEO0_4X] = &pll_video0_4x_clk.common.hw, - [CLK_PLL_VIDEO0_2X] = &pll_video0_2x_clk.hw, - [CLK_PLL_VIDEO0_1X] = &pll_video0_1x_clk.hw, - [CLK_PLL_VIDEO1_4X] = &pll_video1_4x_clk.common.hw, - [CLK_PLL_VIDEO1_2X] = &pll_video1_2x_clk.hw, - [CLK_PLL_VIDEO1_1X] = &pll_video1_1x_clk.hw, - [CLK_PLL_VIDEO2_4X] = &pll_video2_4x_clk.common.hw, - [CLK_PLL_VIDEO2_2X] = &pll_video2_2x_clk.hw, - [CLK_PLL_VIDEO2_1X] = &pll_video2_1x_clk.hw, - [CLK_PLL_VE] = &pll_ve_clk.common.hw, - [CLK_PLL_VIDEO3_2X] = &pll_video3_2x_clk.hw, - [CLK_PLL_VIDEO3_1X] = &pll_video3_1x_clk.hw, - [CLK_PLL_AUDIO0_4X] = &pll_audio0_4x_clk.common.hw, - [CLK_PLL_AUDIO0_2X] = &pll_audio0_2x_clk.hw, - [CLK_PLL_AUDIO0_1X] = &pll_audio0_1x_clk.hw, - [CLK_PLL_AUDIO0_DIV_48M] = &pll_audio0_div_48m_clk.hw, - [CLK_PLL_NPU_2X] = &pll_npu_2x_clk.hw, - [CLK_PLL_NPU_1X] = &pll_npu_1x_clk.hw, - [CLK_CPU0_DIV] = &cpu0_div_clk.common.hw, - [CLK_CPU] = &cpu_clk.common.hw, - [CLK_CPU_AXI] = &cpu_axi_clk.common.hw, - [CLK_CPU_APB] = &cpu_apb_clk.common.hw, - [CLK_CPU_PERI] = &cpu_peri_clk.common.hw, - [CLK_DSU] = &dsu_clk.common.hw, - [CLK_TRACE] = &trace_clk.common.hw, - [CLK_CPU1_DIV] = &cpu1_div_clk.common.hw, - [CLK_DSU_PARENTS] = &dsu_parents_clk.common.hw, - [CLK_AHB] = &ahb_clk.common.hw, - [CLK_APB0] = &apb0_clk.common.hw, - [CLK_APB1] = &apb1_clk.common.hw, - [CLK_MBUS] = &mbus_clk.common.hw, - [CLK_NSI] = &nsi_clk.common.hw, - [CLK_GIC] = &gic_clk.common.hw, - [CLK_DE] = &de_clk.common.hw, - [CLK_DE0] = &de0_clk.common.hw, - [CLK_DI] = &di_clk.common.hw, - [CLK_BUS_DI] = &bus_di_clk.common.hw, - [CLK_G2D] = &g2d_clk.common.hw, - [CLK_BUS_G2D] = &bus_g2d_clk.common.hw, - [CLK_GPU] = &gpu_clk.common.hw, - [CLK_BUS_GPU] = &bus_gpu_clk.common.hw, - [CLK_CE] = &ce_clk.common.hw, - [CLK_CE_SYS] = &ce_sys_clk.common.hw, - [CLK_BUS_CE] = &bus_ce_clk.common.hw, - [CLK_VE] = &ve_clk.common.hw, - [CLK_BUS_VE] = &bus_ve_clk.common.hw, - [CLK_NPU] = &npu_clk.common.hw, - [CLK_DMA] = &dma_clk.common.hw, - [CLK_MSGBOX1] = &msgbox1_clk.common.hw, - [CLK_MSGBOX0] = &msgbox0_clk.common.hw, - [CLK_SPINLOCK] = &spinlock_clk.common.hw, - [CLK_TIMER] = &timer_clk.common.hw, - [CLK_DBGSYS] = &dbgsys_clk.common.hw, - [CLK_PWM1] = &pwm1_clk.common.hw, - [CLK_PWM] = &pwm_clk.common.hw, - [CLK_IOMMU] = &iommu_clk.common.hw, - [CLK_TIMER0] = &timer0_clk.common.hw, - [CLK_TIMER1] = &timer1_clk.common.hw, - [CLK_TIMER2] = &timer2_clk.common.hw, - [CLK_TIMER3] = &timer3_clk.common.hw, - [CLK_TIMER4] = &timer4_clk.common.hw, - [CLK_TIMER5] = &timer5_clk.common.hw, - [CLK_DRAM] = &dram_clk.common.hw, - [CLK_USB_MBUS_GATE] = &usb_mbus_gate_clk.common.hw, - [CLK_GPU_MBUS_GATE] = &gpu_mbus_gate_clk.common.hw, - [CLK_DE_MBUS_GATE] = &de_mbus_gate_clk.common.hw, - [CLK_NAND_MBUS_GATE] = &nand_mbus_gate_clk.common.hw, - [CLK_NPU_MBUS_GATE] = &npu_mbus_gate_clk.common.hw, - [CLK_VID_IN_MBUS_GATE] = &vid_in_mbus_gate_clk.common.hw, - [CLK_VID_OUT_MBUS_GATE] = &vid_out_mbus_gate_clk.common.hw, - [CLK_CE_MBUS_GATE] = &ce_mbus_gate_clk.common.hw, - [CLK_VE_MBUS_GATE] = &ve_mbus_gate_clk.common.hw, - [CLK_DMA_MBUS_GATE] = &dma_mbus_gate_clk.common.hw, - [CLK_BUS_DRAM] = &bus_dram_clk.common.hw, - [CLK_NAND0] = &nand0_clk.common.hw, - [CLK_NAND0_CLK0] = &nand0_clk0_clk.common.hw, - [CLK_NAND0_CLK1] = &nand0_clk1_clk.common.hw, - [CLK_SMHC0] = &smhc0_clk.common.hw, - [CLK_SMHC1] = &smhc1_clk.common.hw, - [CLK_SMHC2] = &smhc2_clk.common.hw, - [CLK_BUS_SMHC2] = &bus_smhc2_clk.common.hw, - [CLK_BUS_SMHC1] = &bus_smhc1_clk.common.hw, - [CLK_BUS_SMHC0] = &bus_smhc0_clk.common.hw, - [CLK_SYSDAP] = &sysdap_clk.common.hw, - [CLK_UART7] = &uart7_clk.common.hw, - [CLK_UART6] = &uart6_clk.common.hw, - [CLK_UART5] = &uart5_clk.common.hw, - [CLK_UART4] = &uart4_clk.common.hw, - [CLK_UART3] = &uart3_clk.common.hw, - [CLK_UART2] = &uart2_clk.common.hw, - [CLK_BUS_UART1] = &bus_uart1_clk.common.hw, - [CLK_BUS_UART0] = &bus_uart0_clk.common.hw, - [CLK_TWI5] = &twi5_clk.common.hw, - [CLK_TWI4] = &twi4_clk.common.hw, - [CLK_TWI3] = &twi3_clk.common.hw, - [CLK_TWI2] = &twi2_clk.common.hw, - [CLK_TWI1] = &twi1_clk.common.hw, - [CLK_TWI0] = &twi0_clk.common.hw, - [CLK_SPI0] = &spi0_clk.common.hw, - [CLK_SPI1] = &spi1_clk.common.hw, - [CLK_SPI2] = &spi2_clk.common.hw, - [CLK_SPIF] = &spif_clk.common.hw, - [CLK_BUS_SPIF] = &bus_spif_clk.common.hw, - [CLK_BUS_SPI2] = &bus_spi2_clk.common.hw, - [CLK_BUS_SPI1] = &bus_spi1_clk.common.hw, - [CLK_BUS_SPI0] = &bus_spi0_clk.common.hw, - [CLK_GMAC0_25M] = &gmac0_25m_clk.common.hw, - [CLK_GMAC0_25M_CLK_SRC] = &gmac0_25m_clk_src_clk.common.hw, - [CLK_GMAC1_25M] = &gmac1_25m_clk.common.hw, - [CLK_GMAC1_25M_CLK_SRC] = &gmac1_25m_clk_src_clk.common.hw, - [CLK_GMAC1] = &gmac1_clk.common.hw, - [CLK_GMAC0] = &gmac0_clk.common.hw, - [CLK_IRRX] = &irrx_clk.common.hw, - [CLK_BUS_IRRX] = &bus_irrx_clk.common.hw, - [CLK_IRTX] = &irtx_clk.common.hw, - [CLK_BUS_IRTX] = &bus_irtx_clk.common.hw, - [CLK_BUS_GPADC0] = &bus_gpadc0_clk.common.hw, - [CLK_BUS_GPADC1] = &bus_gpadc1_clk.common.hw, - [CLK_THS] = &ths_clk.common.hw, - [CLK_USB] = &usb_clk.common.hw, - [CLK_DCXO12M] = &dcxo12M_clk.hw, - [CLK_USB0] = &usb0_clk.common.hw, - [CLK_USB1] = &usb1_clk.common.hw, - [CLK_USBOTG0] = &usbotg0_clk.common.hw, - [CLK_USBEHCI1] = &usbehci1_clk.common.hw, - [CLK_USBEHCI0] = &usbehci0_clk.common.hw, - [CLK_USBOHCI1] = &usbohci1_clk.common.hw, - [CLK_USBOHCI0] = &usbohci0_clk.common.hw, - [CLK_LRADC] = &lradc_clk.common.hw, - [CLK_PCIE_REF_ALT] = &pcie_ref_alt_clk.common.hw, - [CLK_PCIE_REF] = &pcie_ref_clk.common.hw, - [CLK_PCIE] = &pcie_clk.common.hw, - [CLK_DPSS_TOP0] = &dpss_top0_clk.common.hw, - [CLK_DPSS_TOP1] = &dpss_top1_clk.common.hw, - [CLK_HDMI_24M] = &hdmi_24m_clk.common.hw, - [CLK_HDMI_CEC] = &hdmi_cec_clk.common.hw, - [CLK_HDMI] = &hdmi_clk.common.hw, - [CLK_DSI0] = &dsi0_clk.common.hw, - [CLK_DSI1] = &dsi1_clk.common.hw, - [CLK_BUS_DSI1] = &bus_dsi1_clk.common.hw, - [CLK_BUS_DSI0] = &bus_dsi0_clk.common.hw, - [CLK_VO0_TCONLCD0] = &vo0_tconlcd0_clk.common.hw, - [CLK_VO0_TCONLCD1] = &vo0_tconlcd1_clk.common.hw, - [CLK_VO1_TCONLCD0] = &vo1_tconlcd0_clk.common.hw, - [CLK_COMBPHY0] = &combphy0_clk.common.hw, - [CLK_COMBPHY1] = &combphy1_clk.common.hw, - [CLK_BUS_VO1_TCONLCD0] = &bus_vo1_tconlcd0_clk.common.hw, - [CLK_BUS_VO0_TCONLCD1] = &bus_vo0_tconlcd1_clk.common.hw, - [CLK_BUS_VO0_TCONLCD0] = &bus_vo0_tconlcd0_clk.common.hw, - [CLK_TCONTV] = &tcontv_clk.common.hw, - [CLK_TCONTV1] = &tcontv1_clk.common.hw, - [CLK_BUS_TCONTV1] = &bus_tcontv1_clk.common.hw, - [CLK_BUS_TCONTV] = &bus_tcontv_clk.common.hw, - [CLK_LEDC] = &ledc_clk.common.hw, - [CLK_EDP] = &edp_clk.common.hw, - [CLK_BUS_LEDC] = &bus_ledc_clk.common.hw, - [CLK_CSI] = &csi_clk.common.hw, - [CLK_CSI_MASTER0] = &csi_master0_clk.common.hw, - [CLK_CSI_MASTER1] = &csi_master1_clk.common.hw, - [CLK_CSI_MASTER2] = &csi_master2_clk.common.hw, - [CLK_CSI_MASTER3] = &csi_master3_clk.common.hw, - [CLK_BUS_CSI] = &bus_csi_clk.common.hw, - [CLK_ISP] = &isp_clk.common.hw, - [CLK_DSP] = &dsp_clk.common.hw, - [CLK_CPUS_HCLK_GATE] = &cpus_hclk_gate_clk.common.hw, - [CLK_SPIF_MBUS_AHB_GATE] = &spif_mbus_ahb_gate_clk.common.hw, - [CLK_GMAC1_MBUS_AHB_GATE] = &gmac1_mbus_ahb_gate_clk.common.hw, - [CLK_GMAC0_MBUS_AHB_GATE] = &gmac0_mbus_ahb_gate_clk.common.hw, - [CLK_SMHC2_MBUS_AHB_GATE] = &smhc2_mbus_ahb_gate_clk.common.hw, - [CLK_SMHC1_MBUS_AHB_GATE] = &smhc1_mbus_ahb_gate_clk.common.hw, - [CLK_SMHC0_MBUS_AHB_GATE] = &smhc0_mbus_ahb_gate_clk.common.hw, - [CLK_USB_MBUS_AHB_GATE] = &usb_mbus_ahb_gate_clk.common.hw, - [CLK_GMAC1_AHB_GATE] = &gmac1_ahb_gate_clk.common.hw, - [CLK_GMAC0_AHB_GATE] = &gmac0_ahb_gate_clk.common.hw, - [CLK_SMHC2_AHB_GATE] = &smhc2_ahb_gate_clk.common.hw, - [CLK_SMHC1_AHB_GATE] = &smhc1_ahb_gate_clk.common.hw, - [CLK_SMHC0_AHB_GATE] = &smhc0_ahb_gate_clk.common.hw, - [CLK_USB_AHB_GATE] = &usb_ahb_gate_clk.common.hw, - [CLK_VID_OUT_AHB_GATE] = &vid_out_ahb_gate_clk.common.hw, - [CLK_VID_IN_AHB_GATE] = &vid_in_ahb_gate_clk.common.hw, - [CLK_VE_AHB_GATE] = &ve_ahb_gate_clk.common.hw, - [CLK_NPU_AHB_GATE] = &npu_ahb_gate_clk.common.hw, - [CLK_RES_DCAP_24M] = &res_dcap_24m_clk.common.hw, - [CLK_USB_24M] = &usb_24m_clk.common.hw, - [CLK_FANOUT_25M] = &fanout_25m_clk.common.hw, - [CLK_FANOUT_16M] = &fanout_16m_clk.common.hw, - [CLK_FANOUT_12M] = &fanout_12m_clk.common.hw, - [CLK_FANOUT_24M] = &fanout_24m_clk.common.hw, - [CLK_CLK27M_FANOUT] = &clk27m_fanout_clk.common.hw, - [CLK_CLK_FANOUT] = &clk_fanout_clk.common.hw, - [CLK_FANOUT2] = &fanout2_clk.common.hw, - [CLK_FANOUT1] = &fanout1_clk.common.hw, - [CLK_FANOUT0] = &fanout0_clk.common.hw, - }, - .num = CLK_NUMBER, -}; -/* ccu_def_end */ - -static const struct sunxi_ccu_desc sun55iw3_ccu_desc = -{ - .ccu_clks = sun55iw3_ccu_clks, - .num_ccu_clks = ARRAY_SIZE(sun55iw3_ccu_clks), - - .hw_clks = &sun55iw3_hw_clks, - .clk_type = HAL_SUNXI_CCU, - - .resets = sun55iw3_ccu_resets, - .reset_type = HAL_SUNXI_RESET, - .num_resets = ARRAY_SIZE(sun55iw3_ccu_resets), -}; - -__attribute__((weak)) int sunxi_rtc_ccu_init(void) -{ - return 0; -} - -int sunxi_ccu_init(void) -{ - unsigned long reg = (unsigned long)SUNXI_CCU_BASE; - int ret; - - ret = ccu_common_init(reg, &sun55iw3_ccu_desc); - - return ret; -} - diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3.h deleted file mode 100644 index c3641d370a9a41049a0a66850933af50a25c8a7c..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun55iw3.h +++ /dev/null @@ -1,232 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ - -#ifndef _CCU_SUN55IW3_H_ -#define _CCU_SUN55IW3_H_ - -#define SUNXI_CCU_BASE 0x02001000 - -enum { - CLK_PLL_AUDIO1 = 0, - CLK_PLL_CPU0, - CLK_PLL_DDR, - CLK_PLL_PERI0_PARENT, - CLK_PLL_PERI0_2X, - CLK_PERI0_DIV3, - CLK_PLL_PERI0_800M, - CLK_PLL_PERI0_480M, - CLK_PLL_PERI0_600M, - CLK_PLL_PERI0_400M, - CLK_PLL_PERI0_300M, - CLK_PLL_PERI0_200M, - CLK_PLL_PERI0_160M, - CLK_PLL_PERI0_16M, - CLK_PLL_PERI0_150M, - CLK_PLL_PERI0_25M, - CLK_PLL_PERI1_PARENT, - CLK_PLL_PERI1_2X, - CLK_PLL_PERI1_800M, - CLK_PLL_PERI1_480M, - CLK_PLL_PERI1_600M, - CLK_PLL_PERI1_400M, - CLK_PLL_PERI1_300M, - CLK_PLL_PERI1_200M, - CLK_PLL_PERI1_160M, - CLK_PLL_PERI1_150M, - CLK_PLL_GPU, - CLK_PLL_VIDEO0_4X, - CLK_PLL_VIDEO0_2X, - CLK_PLL_VIDEO0_1X, - CLK_PLL_VIDEO1_4X, - CLK_PLL_VIDEO1_2X, - CLK_PLL_VIDEO1_1X, - CLK_PLL_VIDEO2_4X, - CLK_PLL_VIDEO2_2X, - CLK_PLL_VIDEO2_1X, - CLK_PLL_VE, - CLK_PLL_VIDEO3_2X, - CLK_PLL_VIDEO3_1X, - CLK_PLL_AUDIO0_4X, - CLK_PLL_AUDIO0_2X, - CLK_PLL_AUDIO0_1X, - CLK_PLL_AUDIO0_DIV_48M, - CLK_PLL_NPU_2X, - CLK_PLL_NPU_1X, - CLK_CPU0_DIV, - CLK_CPU, - CLK_CPU_AXI, - CLK_CPU_APB, - CLK_CPU_PERI, - CLK_DSU, - CLK_TRACE, - CLK_CPU1_DIV, - CLK_DSU_PARENTS, - CLK_AHB, - CLK_APB0, - CLK_APB1, - CLK_MBUS, - CLK_NSI, - CLK_GIC, - CLK_DE, - CLK_DE0, - CLK_DI, - CLK_BUS_DI, - CLK_G2D, - CLK_BUS_G2D, - CLK_GPU, - CLK_BUS_GPU, - CLK_CE, - CLK_CE_SYS, - CLK_BUS_CE, - CLK_VE, - CLK_BUS_VE, - CLK_NPU, - CLK_DMA, - CLK_MSGBOX1, - CLK_MSGBOX0, - CLK_SPINLOCK, - CLK_TIMER, - CLK_DBGSYS, - CLK_PWM1, - CLK_PWM, - CLK_IOMMU, - CLK_TIMER0, - CLK_TIMER1, - CLK_TIMER2, - CLK_TIMER3, - CLK_TIMER4, - CLK_TIMER5, - CLK_DRAM, - CLK_USB_MBUS_GATE, - CLK_GPU_MBUS_GATE, - CLK_DE_MBUS_GATE, - CLK_NAND_MBUS_GATE, - CLK_NPU_MBUS_GATE, - CLK_VID_IN_MBUS_GATE, - CLK_VID_OUT_MBUS_GATE, - CLK_CE_MBUS_GATE, - CLK_VE_MBUS_GATE, - CLK_DMA_MBUS_GATE, - CLK_BUS_DRAM, - CLK_NAND0, - CLK_NAND0_CLK0, - CLK_NAND0_CLK1, - CLK_SMHC0, - CLK_SMHC1, - CLK_SMHC2, - CLK_BUS_SMHC2, - CLK_BUS_SMHC1, - CLK_BUS_SMHC0, - CLK_SYSDAP, - CLK_UART7, - CLK_UART6, - CLK_UART5, - CLK_UART4, - CLK_UART3, - CLK_UART2, - CLK_BUS_UART1, - CLK_BUS_UART0, - CLK_TWI5, - CLK_TWI4, - CLK_TWI3, - CLK_TWI2, - CLK_TWI1, - CLK_TWI0, - CLK_SPI0, - CLK_SPI1, - CLK_SPI2, - CLK_SPIF, - CLK_BUS_SPIF, - CLK_BUS_SPI2, - CLK_BUS_SPI1, - CLK_BUS_SPI0, - CLK_GMAC0_25M, - CLK_GMAC0_25M_CLK_SRC, - CLK_GMAC1_25M, - CLK_GMAC1_25M_CLK_SRC, - CLK_GMAC1, - CLK_GMAC0, - CLK_IRRX, - CLK_BUS_IRRX, - CLK_IRTX, - CLK_BUS_IRTX, - CLK_BUS_GPADC0, - CLK_BUS_GPADC1, - CLK_THS, - CLK_USB, - CLK_DCXO12M, - CLK_USB0, - CLK_USB1, - CLK_USBOTG0, - CLK_USBEHCI1, - CLK_USBEHCI0, - CLK_USBOHCI1, - CLK_USBOHCI0, - CLK_LRADC, - CLK_PCIE_REF_ALT, - CLK_PCIE_REF, - CLK_PCIE, - CLK_DPSS_TOP0, - CLK_DPSS_TOP1, - CLK_HDMI_24M, - CLK_HDMI_CEC, - CLK_HDMI, - CLK_DSI0, - CLK_DSI1, - CLK_BUS_DSI1, - CLK_BUS_DSI0, - CLK_VO0_TCONLCD0, - CLK_VO0_TCONLCD1, - CLK_VO1_TCONLCD0, - CLK_COMBPHY0, - CLK_COMBPHY1, - CLK_BUS_VO1_TCONLCD0, - CLK_BUS_VO0_TCONLCD1, - CLK_BUS_VO0_TCONLCD0, - CLK_TCONTV, - CLK_TCONTV1, - CLK_BUS_TCONTV1, - CLK_BUS_TCONTV, - CLK_LEDC, - CLK_EDP, - CLK_BUS_LEDC, - CLK_CSI, - CLK_CSI_MASTER0, - CLK_CSI_MASTER1, - CLK_CSI_MASTER2, - CLK_CSI_MASTER3, - CLK_BUS_CSI, - CLK_ISP, - CLK_DSP, - CLK_CPUS_HCLK_GATE, - CLK_SPIF_MBUS_AHB_GATE, - CLK_GMAC1_MBUS_AHB_GATE, - CLK_GMAC0_MBUS_AHB_GATE, - CLK_SMHC2_MBUS_AHB_GATE, - CLK_SMHC1_MBUS_AHB_GATE, - CLK_SMHC0_MBUS_AHB_GATE, - CLK_USB_MBUS_AHB_GATE, - CLK_GMAC1_AHB_GATE, - CLK_GMAC0_AHB_GATE, - CLK_SMHC2_AHB_GATE, - CLK_SMHC1_AHB_GATE, - CLK_SMHC0_AHB_GATE, - CLK_USB_AHB_GATE, - CLK_VID_OUT_AHB_GATE, - CLK_VID_IN_AHB_GATE, - CLK_VE_AHB_GATE, - CLK_NPU_AHB_GATE, - CLK_RES_DCAP_24M, - CLK_USB_24M, - CLK_FANOUT_25M, - CLK_FANOUT_16M, - CLK_FANOUT_12M, - CLK_FANOUT_24M, - CLK_CLK27M_FANOUT, - CLK_CLK_FANOUT, - CLK_FANOUT2, - CLK_FANOUT1, - CLK_FANOUT0, - - CLK_NUMBER, - }; -#endif /* _CCU_SUN55IW3_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20-r.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20-r.c deleted file mode 100644 index ca539f703983ec0d38465771d4dffa4041d906f0..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20-r.c +++ /dev/null @@ -1,119 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2020 huangzhenwei@allwinnertech.com - */ -#include "ccu.h" -#include "ccu_common.h" -#include "ccu_reset.h" - -#include "ccu_div.h" -#include "ccu_gate.h" -#include "ccu_mp.h" -#include "ccu_nm.h" - -#include "ccu-sun8iw20-r.h" - -static const char *const ahbs_apbs0_parents[] = { "dcxo24M", "osc32k", - "iosc", "pll-periph0-div3" - }; - -static SUNXI_CCU_MP_WITH_MUX(r_ahb_clk, "r-ahb", - ahbs_apbs0_parents, 0x000, - 0, 5, - 8, 2, - 24, 3, - 0); - -static SUNXI_CCU_MP_WITH_MUX(r_apb0_clk, "r-apb0", - ahbs_apbs0_parents, 0x00c, - 0, 5, - 8, 2, - 24, 3, - 0); - -static SUNXI_CCU_GATE(r_apb0_timer_clk, "r-apb0-timer", "r-apb0", - 0x11c, BIT(0), 0); - -static SUNXI_CCU_GATE(r_apb0_twd_clk, "r-apb0-twd", "r-apb0", - 0x12c, BIT(0), 0); - -static SUNXI_CCU_GATE(r_ppu_clk, "r-ppu", "r-apb0", - 0x1ac, BIT(0), 0); - -static const char *const r_apb0_ir_rx_parents[] = { "osc32k", "dcxo24M" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(r_apb0_ir_rx_clk, "r-apb0-ir-rx", - r_apb0_ir_rx_parents, 0x1c0, - 0, 5, /* M */ - 8, 2, /* P */ - 24, 2, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_GATE(r_apb0_bus_ir_rx_clk, "r-apb0-bus-ir-rx", "r-apb0", - 0x1cc, BIT(0), 0); - -static SUNXI_CCU_GATE(r_ahb_bus_rtc_clk, "r-ahb-rtc", "r-ahb", - 0x20c, BIT(0), 0); - -static SUNXI_CCU_GATE(r_apb0_cpucfg_clk, "r-apb0-cpucfg", "r-apb0", - 0x22c, BIT(0), 0); - -static struct ccu_common *sun8iw20_r_ccu_clks[] = -{ - &r_ahb_clk.common, - &r_apb0_clk.common, - &r_apb0_timer_clk.common, - &r_apb0_twd_clk.common, - &r_ppu_clk.common, - &r_apb0_ir_rx_clk.common, - &r_apb0_bus_ir_rx_clk.common, - &r_ahb_bus_rtc_clk.common, - &r_apb0_cpucfg_clk.common, -}; - -static struct clk_hw_onecell_data sun8iw20_r_hw_clks = -{ - .hws = { - [CLK_R_AHB] = &r_ahb_clk.common.hw, - [CLK_R_APB0] = &r_apb0_clk.common.hw, - [CLK_R_APB0_TIMER] = &r_apb0_timer_clk.common.hw, - [CLK_R_APB0_TWD] = &r_apb0_twd_clk.common.hw, - [CLK_R_PPU] = &r_ppu_clk.common.hw, - [CLK_R_APB0_IRRX] = &r_apb0_ir_rx_clk.common.hw, - [CLK_R_APB0_BUS_IRRX] = &r_apb0_bus_ir_rx_clk.common.hw, - [CLK_R_AHB_BUS_RTC] = &r_ahb_bus_rtc_clk.common.hw, - [CLK_R_APB0_CPUCFG] = &r_apb0_cpucfg_clk.common.hw, - }, - .num = CLK_R_NUMBER, -}; - -static struct ccu_reset_map sun8iw20_r_ccu_resets[] = -{ - [RST_R_APB0_TIMER] = { 0x11c, BIT(16) }, - [RST_R_APB0_TWD] = { 0x12c, BIT(16) }, - [RST_R_PPU] = { 0x1ac, BIT(16) }, - [RST_R_APB0_BUS_IRRX] = { 0x1cc, BIT(16) }, - [RST_R_AHB_BUS_RTC] = { 0x20c, BIT(16) }, - [RST_R_APB0_CPUCFG] = { 0x22c, BIT(16) }, -}; - -static const struct sunxi_ccu_desc sun8iw20_r_ccu_desc = -{ - .ccu_clks = sun8iw20_r_ccu_clks, - .num_ccu_clks = ARRAY_SIZE(sun8iw20_r_ccu_clks), - - .hw_clks = &sun8iw20_r_hw_clks, - .clk_type = HAL_SUNXI_R_CCU, - - .resets = sun8iw20_r_ccu_resets, - .reset_type = HAL_SUNXI_R_RESET, - .num_resets = ARRAY_SIZE(sun8iw20_r_ccu_resets), -}; - -int sunxi_r_ccu_init(void) -{ - unsigned long reg = (unsigned long)SUNXI_R_CCU_BASE; - - return ccu_common_init(reg, &sun8iw20_r_ccu_desc); -} - diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20-r.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20-r.h deleted file mode 100644 index b6fd03a562cf3fd756a709f1121e6f5f8c7c405a..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20-r.h +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2020 frank@allwinnertech.com - */ - -#ifndef _CCU_SUN8IW20_R_H -#define _CCU_SUN8IW20_R_H - -#define SUNXI_R_CCU_BASE 0x07010000 -#define CLK_R_AHB 0 -#define CLK_R_APB0 1 -#define CLK_R_APB0_TIMER 2 -#define CLK_R_APB0_TWD 3 -#define CLK_R_PPU 4 -#define CLK_R_APB0_IRRX 5 -#define CLK_R_APB0_BUS_IRRX 6 -#define CLK_R_AHB_BUS_RTC 7 -#define CLK_R_APB0_CPUCFG 8 - -#define CLK_R_MAX_NO CLK_R_APB0_CPUCFG -#define CLK_R_NUMBER (CLK_R_MAX_NO + 1) - -#endif /* _CCU_SUN8IW20_R_H */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20-rtc.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20-rtc.c deleted file mode 100644 index 01c8c726829d5e796e3742a4890f27feb5ad05b2..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20-rtc.c +++ /dev/null @@ -1,139 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * sunxi RTC ccu driver - * - * Copyright (c) 2020, DaLv - */ - -#include "ccu.h" -#include "ccu_common.h" -#include "ccu_reset.h" -#include "ccu_div.h" -#include "ccu_gate.h" -#include "ccu_mp.h" -#include "ccu_mult.h" -#include "ccu_nk.h" -#include "ccu_nkm.h" -#include "ccu_nkmp.h" -#include "ccu_nm.h" -#include "ccu_phase.h" - -#include "ccu-sun8iw20-rtc.h" - -/* - * iosc clk: - */ -static SUNXI_CCU_GATE(iosc_clk, "iosc", "rc-16m", 0x160, BIT(0), 0); - -static SUNXI_CCU_GATE_WITH_KEY(ext32k_gate_clk, "ext32k-gate", - "ext-32k", 0x0, - KEY_FIELD_MAGIC_NUM_RTC, - BIT(4), 0); - -static CLK_FIXED_FACTOR(iosc_div32k_clk, "iosc-div32k", "iosc", 500, 1, 0); - -/* - * osc32k clk(losc) - */ -static const char *const osc32k_parents[] = { "iosc-div32k", "ext32k-gate" }; -static SUNXI_CCU_MUX_WITH_GATE_KEY(osc32k_clk, "osc32k", osc32k_parents, - 0x0, 0, 1, - KEY_FIELD_MAGIC_NUM_RTC, 0, 0); - -static SUNXI_CCU_GATE_WITH_FIXED_RATE(dcxo24M_div32k_clk, "dcxo24M-div32k", - "dcxo24M", 0x60, - 32768, BIT(16)); -/* - * rtc-1k clock - */ -static const char *const rtc32k_clk_parents[] = { "osc32k", "dcxo24M-div32k"}; -static SUNXI_CCU_MUX_WITH_GATE_KEY(rtc32k_clk, "rtc32k", rtc32k_clk_parents, - 0x0, 1, 1, - KEY_FIELD_MAGIC_NUM_RTC, 0, 0); -static CLK_FIXED_FACTOR(rtc_1k_clk, "rtc-1k", "rtc32k", 32, 1, 0); - -/* rtc-32k-fanout: only for debug */ -static const char *const rtc_32k_fanout_clk_parents[] = { "osc32k", "ext32k-gate", - "dcxo24M-div32k" - }; -static SUNXI_CCU_MUX_WITH_GATE(rtc_32k_fanout_clk, "rtc-32k-fanout", - rtc_32k_fanout_clk_parents, 0x60, 1, - 2, BIT(0), 0); - -/* TODO: should add the div func */ -static SUNXI_CCU_GATE(rtc_spi_clk, "rtc-spi", "r-ahb", 0x310, BIT(31), 0); - -static struct ccu_common *sun8iw20_rtc_ccu_clks[] = -{ - &iosc_clk.common, - &ext32k_gate_clk.common, - &osc32k_clk.common, - &dcxo24M_div32k_clk.common, - &rtc32k_clk.common, - &rtc_32k_fanout_clk.common, - &rtc_spi_clk.common, -}; - -static struct clk_hw_onecell_data sun8iw20_rtc_ccu_hw_clks = -{ - .hws = { - [CLK_IOSC] = &iosc_clk.common.hw, - [CLK_EXT32K_GATE] = &ext32k_gate_clk.common.hw, - [CLK_IOSC_DIV32K] = &iosc_div32k_clk.hw, - [CLK_OSC32K] = &osc32k_clk.common.hw, - [CLK_DCXO24M_DIV32K] = &dcxo24M_div32k_clk.common.hw, - [CLK_RTC32K] = &rtc32k_clk.common.hw, - [CLK_RTC_1K] = &rtc_1k_clk.hw, - [CLK_RTC_32K_FANOUT] = &rtc_32k_fanout_clk.common.hw, - [CLK_RTC_SPI] = &rtc_spi_clk.common.hw, - }, - .num = CLK_RTC_NUMBER, -}; - -static const struct sunxi_ccu_desc sun8iw20_rtc_ccu_desc = -{ - .ccu_clks = sun8iw20_rtc_ccu_clks, - .num_ccu_clks = ARRAY_SIZE(sun8iw20_rtc_ccu_clks), - - .hw_clks = &sun8iw20_rtc_ccu_hw_clks, - .clk_type = HAL_SUNXI_RTC_CCU, -}; - -static void clock_source_init(unsigned long base) -{ - /* (1) enable DCXO */ - /* by default, DCXO_EN = 1. We don't have to do this... */ - set_reg(base + XO_CTRL_REG, 0x1, 1, 1); - - /* (2) enable auto switch function */ - /* - * In some cases, we boot with auto switch function disabled, and try to - * enable the auto switch function by rebooting. - * But the rtc default value does not change unless vcc-rtc is loss. - * So we should not rely on the default value of reg. - * BIT(14): LOSC auto switch 32k clk source sel enable. 1: enable - * BIT(15): LOSC auto switch function disable. 1: disable - */ - set_reg_key(base + LOSC_CTRL_REG, - KEY_FIELD_MAGIC_NUM_RTC >> 16, 16, 16, - 0x1, 2, 14); - - /* (3) set the parent of osc32k-sys to ext-osc32k */ - set_reg_key(base + LOSC_CTRL_REG, - KEY_FIELD_MAGIC_NUM_RTC >> 16, 16, 16, - 0x1, 1, 0); - - /* (4) set the parent of osc32k-out to osc32k-sys */ - /* by default, LOSC_OUT_SRC_SEL = 0x0. We don't have to do this... */ - set_reg(base + LOSC_OUT_GATING_REG, - 0x0, 2, 1); -} - -int sunxi_rtc_ccu_init(void) -{ - unsigned long reg = (unsigned long)SUNXI_RTC_CCU_REG; - - clock_source_init(reg); - - return ccu_common_init(reg, &sun8iw20_rtc_ccu_desc); -} diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20-rtc.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20-rtc.h deleted file mode 100644 index ee65b510e9cfffe69aee0481f30ad954347d7d85..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20-rtc.h +++ /dev/null @@ -1,28 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2020 lvda@allwinnertech.com - */ - -#ifndef _CCU_SUN8IW20_RTC_H_ -#define _CCU_SUN8IW20_RTC_H_ - -#define SUNXI_RTC_CCU_REG 0x07090000 -#define LOSC_CTRL_REG 0x00 -#define KEY_FIELD_MAGIC_NUM_RTC 0x16AA0000 -#define LOSC_OUT_GATING_REG 0x60 /* Or: 32K_FOUT_CTRL_GATING_REG */ -#define XO_CTRL_REG 0x160 - -#define CLK_IOSC 0 -#define CLK_EXT32K_GATE 1 -#define CLK_IOSC_DIV32K 2 -#define CLK_OSC32K 3 -#define CLK_DCXO24M_DIV32K 4 -#define CLK_RTC32K 5 -#define CLK_RTC_1K 6 -#define CLK_RTC_32K_FANOUT 7 -#define CLK_RTC_SPI 8 - -#define CLK_RTC_MAX_NO CLK_RTC_SPI -#define CLK_RTC_NUMBER (CLK_RTC_MAX_NO + 1) - -#endif /* _CCU_SUN50IW9_RTC_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20.c deleted file mode 100644 index 0fb32ae3edbf6a74efeb6b119b29c58d3cd391f8..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20.c +++ /dev/null @@ -1,1280 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2020 huangzhenwei@allwinnertech.com - */ -#include "ccu.h" -#include "ccu_common.h" -#include "ccu_reset.h" -#include "ccu_div.h" -#include "ccu_gate.h" -#include "ccu_mp.h" -#include "ccu_mult.h" -#include "ccu_nk.h" -#include "ccu_nkm.h" -#include "ccu_nkmp.h" -#include "ccu_nm.h" - -#include "ccu-sun8iw20.h" -#include -#include - -/* ccu_des_start */ -/* - * The CPU PLL is actually NP clock, with P being /1, /2 or /4. However - * P should only be used for output frequencies lower than 288 MHz. - * - * For now we can just model it as a multiplier clock, and force P to /1. - * - * The M factor is present in the register's description, but not in the - * frequency formula, and it's documented as "M is only used for backdoor - * testing", so it's not modelled and then force to 0. - */ -#define SUN8IW20_PLL_CPUX_REG 0x000 -static struct ccu_mult pll_cpux_clk = -{ - .enable = BIT(27), - .lock = BIT(28), - .mult = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .common = { - .reg = 0x000, - .hw.init = CLK_HW_INIT("pll-cpux", "dcxo24M", - &ccu_mult_ops, - CLK_SET_RATE_UNGATE), - }, -}; - -/* Some PLLs are input * N / div1 / P. Model them as NKMP with no K */ -#define SUN8IW20_PLL_DDR0_REG 0x010 -static struct ccu_nkmp pll_ddr0_clk = -{ - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(1, 1), /* input divider */ - .p = _SUNXI_CCU_DIV(0, 1), /* output divider */ - .common = { - .reg = 0x010, - .hw.init = CLK_HW_INIT("pll-ddr0", "dcxo24M", - &ccu_nkmp_ops, - CLK_SET_RATE_UNGATE | - CLK_IS_CRITICAL), - }, -}; - -#define SUN8IW20_PLL_PERIPH0_REG 0x020 -static struct ccu_nm pll_periph0_parent_clk = -{ - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(1, 1), /* input divider */ - .common = { - .reg = 0x020, - .hw.init = CLK_HW_INIT("pll-periph0-parent", "dcxo24M", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE), - }, -}; - -static SUNXI_CCU_M(pll_periph0_2x_clk, "pll-periph0-2x", - "pll-periph0-parent", 0x020, 16, 3, 0); - -static SUNXI_CCU_M(pll_periph0_800m_clk, "pll-periph0-800m", - "pll-periph0-parent", 0x020, 20, 3, 0); - -/* - * For Video PLLs, the output divider is described as "used for testing" - * in the user manual. So it's not modelled and forced to 0. - */ -#define SUN8IW20_PLL_VIDEO0_REG 0x040 -static struct ccu_nm pll_video0_clk = -{ - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(1, 1), /* input divider */ - .fixed_post_div = 4, - .min_rate = 288000000, - .max_rate = 2400000000UL, - .common = { - .reg = 0x040, - .features = CCU_FEATURE_FIXED_POSTDIV, - .hw.init = CLK_HW_INIT("pll-video0", "dcxo24M", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE), - }, -}; - -#define SUN8IW20_PLL_VIDEO1_REG 0x048 -static struct ccu_nm pll_video1_clk = -{ - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(1, 1), /* input divider */ - .fixed_post_div = 4, - .min_rate = 288000000, - .max_rate = 2400000000UL, - .common = { - .reg = 0x048, - .features = CCU_FEATURE_FIXED_POSTDIV, - .hw.init = CLK_HW_INIT("pll-video1", "dcxo24M", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE), - }, -}; - -#define SUN8IW20_PLL_VE_REG 0x058 -static struct ccu_nkmp pll_ve_clk = -{ - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(1, 1), /* input divider */ - .p = _SUNXI_CCU_DIV(0, 1), /* output divider */ - .common = { - .reg = 0x058, - .hw.init = CLK_HW_INIT("pll-ve", "dcxo24M", - &ccu_nkmp_ops, - CLK_SET_RATE_UNGATE), - }, -}; - -/* - * The Audio PLL has m0, m1 dividers in addition to the usual N, M - * factors. Since we only need 4 frequencies from this PLL: 22.5792 MHz, - * 24.576 MHz, 90.3168MHz and 98.304MHz ignore them for now. - * Enforce the default for them, which is d1 = 0, d2 = 1. - */ -#define SUN8IW20_PLL_AUDIO0_REG 0x078 -static struct ccu_sdm_setting pll_audio0_sdm_table[] = -{ - { .rate = 45158400, .pattern = 0xc001bcd3, .m = 18, .n = 33 }, - { .rate = 49152000, .pattern = 0xc001eb85, .m = 20, .n = 40 }, - { .rate = 180633600, .pattern = 0xc001288d, .m = 3, .n = 22 }, - { .rate = 196608000, .pattern = 0xc001eb85, .m = 5, .n = 40 }, -}; - -static struct ccu_nm pll_audio0_4x_clk = -{ - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(16, 6), - .fixed_post_div = 2, - .sdm = _SUNXI_CCU_SDM(pll_audio0_sdm_table, BIT(24), - 0x178, BIT(31)), - .common = { - .reg = 0x078, - .features = CCU_FEATURE_FIXED_POSTDIV | - CCU_FEATURE_SIGMA_DELTA_MOD, - .hw.init = CLK_HW_INIT("pll-audio0-4x", "dcxo24M", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE), - }, -}; - -/* - * * PLL_AUDIO1 don't need Fractional-N. The output is usually 614.4M for audio - * * The codec-adc or dac should be divided by themself to output the 24.576M - * - */ -#define SUN8IW20_PLL_AUDIO1_REG 0x080 -static struct ccu_nm pll_audio1_clk = -{ - .enable = BIT(27), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT_MIN(8, 8, 12), - .m = _SUNXI_CCU_DIV(1, 1), - /*.sdm = _SUNXI_CCU_SDM(pll_audio1_sdm_table, BIT(24), - 0x178, BIT(31)),*/ - .common = { - .reg = 0x080, - .features = CCU_FEATURE_SIGMA_DELTA_MOD, - .hw.init = CLK_HW_INIT("pll-audio1", "dcxo24M", - &ccu_nm_ops, - CLK_SET_RATE_UNGATE), - }, -}; -static SUNXI_CCU_M(pll_audio1_div2_clk, "pll-audio1-div2", "pll-audio1", 0x080, 16, 3, 0); -static SUNXI_CCU_M(pll_audio1_div5_clk, "pll-audio1-div5", "pll-audio1", 0x080, 20, 3, 0); - -static struct clk_div_table pll_cpux_div_table[] = -{ - { .val = 0, .div = 1 }, - { .val = 1, .div = 2 }, - { .val = 2, .div = 4 }, - { /* Sentinel */ }, -}; - -static SUNXI_CCU_DIV_TABLE(pll_cpux_div, "pll-cpux-div", - "pll-cpux", 0x500, 16, 2, - pll_cpux_div_table, 0); - -static const char *const cpux_parents[] = { "dcxo24M", "osc32k", - "iosc", "pll-cpux-div", - "pll-periph0", "pll-periph0-2x", - "pll-periph0-800M" - }; - -static SUNXI_CCU_MUX(cpux_clk, "cpux", cpux_parents, - 0x500, 24, 3, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL); - -static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x500, 0, 2, 0); - -static SUNXI_CCU_M(apb_clk, "apb", "cpux", 0x500, 8, 2, 0); - -static const char *const psi_ahb_parents[] = { "dcxo24M", "osc32k", - "iosc", "pll-periph0" - }; -static SUNXI_CCU_MP_WITH_MUX(psi_ahb_clk, "psi-ahb", - psi_ahb_parents, - 0x510, - 0, 2, /* M */ - 8, 2, /* P */ - 24, 2, /* mux */ - 0); - -static const char *const apb0_apb1_parents[] = { "dcxo24M", "osc32k", - "psi-ahb", "pll-periph0" - }; -static SUNXI_CCU_MP_WITH_MUX(apb0_clk, "apb0", apb0_apb1_parents, 0x520, - 0, 5, /* M */ - 8, 2, /* P */ - 24, 2, /* mux */ - 0); - -static SUNXI_CCU_MP_WITH_MUX(apb1_clk, "apb1", apb0_apb1_parents, 0x524, - 0, 5, /* M */ - 8, 2, /* P */ - 24, 2, /* mux */ - 0); - -static const char *const de_di_g2d_parents[] = { "pll-periph0-2x", "pll-video0-4x", - "pll-video1-4x", "pll-audio1-div2" - }; -static SUNXI_CCU_M_WITH_MUX_GATE(de0_clk, "de0", de_di_g2d_parents, 0x600, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(bus_de0_clk, "bus-de0", "psi-ahb", - 0x60c, BIT(0), 0); - -static SUNXI_CCU_M_WITH_MUX_GATE(di_clk, "di", de_di_g2d_parents, 0x620, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(bus_di_clk, "bus-di", "psi-ahb", - 0x62c, BIT(0), 0); - -static SUNXI_CCU_M_WITH_MUX_GATE(g2d_clk, "g2d", - de_di_g2d_parents, - 0x630, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_GATE(bus_g2d_clk, "bus-g2d", "psi-ahb", - 0x63c, BIT(0), 0); - -static const char *const ce_parents[] = { "dcxo24M", "pll-periph0-2x", - "pll-periph0" - }; -static SUNXI_CCU_MP_WITH_MUX_GATE(ce_clk, "ce", ce_parents, 0x680, - 0, 4, /* M */ - 8, 2, /* P */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_GATE(bus_ce_clk, "bus-ce", "psi-ahb", - 0x68c, BIT(0), 0); - -static const char *const ve_parents[] = { "pll-ve", "pll-periph0-2x" }; -static SUNXI_CCU_M_WITH_MUX_GATE(ve_clk, "ve", ve_parents, 0x690, - 0, 5, /* M */ - 24, 1, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_PARENT); - -static SUNXI_CCU_GATE(bus_ve_clk, "bus-ve", "psi-ahb", - 0x69c, BIT(0), 0); - -static SUNXI_CCU_GATE(bus_dma_clk, "bus-dma", "psi-ahb", - 0x70c, BIT(0), 0); - -static SUNXI_CCU_GATE(bus_msgbox0_clk, "bus-msgbox0", "psi-ahb", - 0x71c, BIT(0), 0); - -static SUNXI_CCU_GATE(bus_msgbox1_clk, "bus-msgbox1", "psi-ahb", - 0x71c, BIT(1), 0); - -static SUNXI_CCU_GATE(bus_msgbox2_clk, "bus-msgbox2", "psi-ahb", - 0x71c, BIT(2), 0); - -static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "psi-ahb", - 0x72c, BIT(0), 0); - -static SUNXI_CCU_GATE(bus_hstimer_clk, "bus-hstimer", "psi-ahb", - 0x73c, BIT(0), 0); - -static SUNXI_CCU_GATE(avs_clk, "avs", "dcxo24M", 0x740, BIT(31), 0); - -static SUNXI_CCU_GATE(bus_dbg_clk, "bus-dbg", "psi-ahb", - 0x78c, BIT(0), 0); - -static SUNXI_CCU_GATE(bus_pwm_clk, "bus-pwm", "apb0", 0x7ac, BIT(0), 0); - -static SUNXI_CCU_GATE(bus_iommu_clk, "bus-iommu", "apb0", 0x7bc, BIT(0), 0); - -static const char *const dram_parents[] = { "pll-ddr0", "pll-audio1-div2", - "pll-periph0-2x", "pll-periph0-800m" - }; -static SUNXI_CCU_MP_WITH_MUX_GATE(dram_clk, "dram-clk", - dram_parents, 0x800, - 0, 2, /* M */ - 8, 2, /* P */ - 24, 2, /* MUX */ - BIT(31), 0); - -static SUNXI_CCU_GATE(mbus_dma_clk, "mbus-dma", "mbus", - 0x804, BIT(0), 0); -static SUNXI_CCU_GATE(mbus_ve_clk, "mbus-ve", "mbus", - 0x804, BIT(1), 0); -static SUNXI_CCU_GATE(mbus_ce_clk, "mbus-ce", "mbus", - 0x804, BIT(2), 0); -static SUNXI_CCU_GATE(mbus_tvin_clk, "mbus-tvin", "mbus", - 0x804, BIT(7), 0); -static SUNXI_CCU_GATE(mbus_csi_clk, "mbus-csi", "mbus", - 0x804, BIT(8), 0); -static SUNXI_CCU_GATE(mbus_g2d_clk, "mbus-g2d", "mbus", - 0x804, BIT(10), 0); - -static SUNXI_CCU_GATE(bus_dram_clk, "bus-dram", "psi-ahb", - 0x80c, BIT(0), CLK_IS_CRITICAL); - -/* don't use postdiv for bsp kernel */ -static const char *const mmc0_mmc1_parents[] = { "dcxo24M", "pll-periph0", - "pll-periph0-2x", "pll-audio1-div2" - }; -static SUNXI_CCU_MP_WITH_MUX_GATE(mmc0_clk, "mmc0", mmc0_mmc1_parents, 0x830, - 0, 4, /* M */ - 8, 2, /* N->P */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_NO_REPARENT); - -static SUNXI_CCU_MP_WITH_MUX_GATE(mmc1_clk, "mmc1", mmc0_mmc1_parents, 0x834, - 0, 4, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_NO_REPARENT); - -static const char *const mmc2_parents[] = { "dcxo24M", "pll-periph0", - "pll-periph0-2x", "pll-periph0-800m", - "pll-audio1-div2" - }; -static SUNXI_CCU_MP_WITH_MUX_GATE(mmc2_clk, "mmc2", mmc2_parents, 0x838, - 0, 4, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - CLK_SET_RATE_NO_REPARENT); - -static SUNXI_CCU_GATE(bus_mmc0_clk, "bus-mmc0", "psi-ahb", 0x84c, BIT(0), 0); -static SUNXI_CCU_GATE(bus_mmc1_clk, "bus-mmc1", "psi-ahb", 0x84c, BIT(1), 0); -static SUNXI_CCU_GATE(bus_mmc2_clk, "bus-mmc2", "psi-ahb", 0x84c, BIT(2), 0); - -static SUNXI_CCU_GATE(bus_uart0_clk, "bus-uart0", "apb1", 0x90c, BIT(0), 0); -static SUNXI_CCU_GATE(bus_uart1_clk, "bus-uart1", "apb1", 0x90c, BIT(1), 0); -static SUNXI_CCU_GATE(bus_uart2_clk, "bus-uart2", "apb1", 0x90c, BIT(2), 0); -static SUNXI_CCU_GATE(bus_uart3_clk, "bus-uart3", "apb1", 0x90c, BIT(3), 0); -static SUNXI_CCU_GATE(bus_uart4_clk, "bus-uart4", "apb1", 0x90c, BIT(4), 0); -static SUNXI_CCU_GATE(bus_uart5_clk, "bus-uart5", "apb1", 0x90c, BIT(5), 0); - -static SUNXI_CCU_GATE(bus_i2c0_clk, "bus-i2c0", "apb1", 0x91c, BIT(0), 0); -static SUNXI_CCU_GATE(bus_i2c1_clk, "bus-i2c1", "apb1", 0x91c, BIT(1), 0); -static SUNXI_CCU_GATE(bus_i2c2_clk, "bus-i2c2", "apb1", 0x91c, BIT(2), 0); -static SUNXI_CCU_GATE(bus_i2c3_clk, "bus-i2c3", "apb1", 0x91c, BIT(3), 0); - -static const char *const spi_parents[] = { "dcxo24M", "pll-periph0", - "pll-periph0-2x", "pll-audio1-div2", - "pll-audio1-div5" - }; -static SUNXI_CCU_MP_WITH_MUX_GATE(spi0_clk, "spi0", spi_parents, 0x940, - 0, 4, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_MP_WITH_MUX_GATE(spi1_clk, "spi1", spi_parents, 0x944, - 0, 4, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_GATE(bus_spi0_clk, "bus-spi0", "psi-ahb", 0x96c, BIT(0), 0); -static SUNXI_CCU_GATE(bus_spi1_clk, "bus-spi1", "psi-ahb", 0x96c, BIT(1), 0); - -static SUNXI_CCU_GATE(emac0_25m_clk, "emac0-25m", "pll-periph0", 0x970, - BIT(31) | BIT(30), 0); - -static SUNXI_CCU_GATE(bus_emac0_clk, "bus-emac0", "psi-ahb", 0x97c, BIT(0), 0); - -static const char *const ir_parents[] = { "dcxo24M", "pll-periph0" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(ir_tx_clk, "ir-tx", ir_parents, 0x9c0, - 0, 4, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_GATE(bus_ir_tx_clk, "bus-ir-tx", "apb0", 0x9cc, BIT(0), 0); - -static SUNXI_CCU_GATE(bus_gpadc_clk, "bus-gpadc", "apb0", 0x9ec, BIT(0), 0); - -static SUNXI_CCU_GATE(bus_ths_clk, "bus-ths", "apb0", 0x9fc, BIT(0), 0); - -static const char *const i2s_spdif_tx_parents[] = { "pll-audio0", "pll-audio0-4x", - "pll-audio1-div2", "pll-audio1-div5" - }; -static SUNXI_CCU_MP_WITH_MUX_GATE(i2s0_clk, "i2s0", i2s_spdif_tx_parents, 0xa10, - 0, 5, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_MP_WITH_MUX_GATE(i2s1_clk, "i2s1", i2s_spdif_tx_parents, 0xa14, - 0, 5, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_MP_WITH_MUX_GATE(i2s2_clk, "i2s2", i2s_spdif_tx_parents, 0xa18, - 0, 5, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static const char *const i2s2_asrc_parents[] = { "pll-audio0-4x", "pll-periph0", - "pll-audio1-div2", "pll-audio1-div5" - }; - -static SUNXI_CCU_MP_WITH_MUX_GATE(i2s2_asrc_clk, "i2s2-asrc", i2s2_asrc_parents, 0xa1c, - 0, 5, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_GATE(bus_i2s0_clk, "bus-i2s0", "apb1", 0xa20, BIT(0), 0); -static SUNXI_CCU_GATE(bus_i2s1_clk, "bus-i2s1", "apb1", 0xa20, BIT(1), 0); -static SUNXI_CCU_GATE(bus_i2s2_clk, "bus-i2s2", "apb1", 0xa20, BIT(2), 0); - -static SUNXI_CCU_MP_WITH_MUX_GATE(spdif_tx_clk, "spdif-tx", i2s_spdif_tx_parents, 0xa24, - 0, 5, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static const char *const spdif_rx_parents[] = { "pll-periph0", "pll-audio1-div2", - "pll-audio1-div5" - }; - -static SUNXI_CCU_MP_WITH_MUX_GATE(spdif_rx_clk, "spdif-rx", spdif_rx_parents, 0xa28, - 0, 5, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_GATE(bus_spdif_clk, "bus-spdif", "apb0", 0xa2c, BIT(0), 0); - -static const char *const dmic_codec_parents[] = { "pll-audio0", "pll-audio1-div2", - "pll-audio1-div5" - }; - -static SUNXI_CCU_MP_WITH_MUX_GATE(dmic_clk, "dmic", dmic_codec_parents, 0xa40, - 0, 5, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_GATE(bus_dmic_clk, "bus-dmic", "apb0", 0xa4c, BIT(0), 0); - -static SUNXI_CCU_MP_WITH_MUX_GATE(audio_codec_dac_clk, "audio-codec-dac", dmic_codec_parents, 0xa50, - 0, 5, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_MP_WITH_MUX_GATE(audio_codec_adc_clk, "audio-codec-adc", dmic_codec_parents, 0xa54, - 0, 5, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_GATE(bus_audio_codec_clk, "bus-audio-codec", "apb0", 0xa5c, BIT(0), 0); - -/* - * There are OHCI 12M clock source selection bits for 2 USB 2.0 ports. - * We will force them to 0 (12M divided from 48M). - */ -#define SUN8IW20_USB0_CLK_REG 0xa70 -#define SUN8IW20_USB1_CLK_REG 0xa74 - -static SUNXI_CCU_GATE(usb_ohci0_clk, "usb-ohci0", "osc12M", 0xa70, BIT(31), 0); - -static SUNXI_CCU_GATE(usb_ohci1_clk, "usb-ohci1", "osc12M", 0xa74, BIT(31), 0); - -static SUNXI_CCU_GATE(bus_ohci0_clk, "bus-ohci0", "psi-ahb", 0xa8c, BIT(0), 0); -static SUNXI_CCU_GATE(bus_ohci1_clk, "bus-ohci1", "psi-ahb", 0xa8c, BIT(1), 0); -static SUNXI_CCU_GATE(bus_ehci0_clk, "bus-ehci0", "psi-ahb", 0xa8c, BIT(4), 0); -static SUNXI_CCU_GATE(bus_ehci1_clk, "bus-ehci1", "psi-ahb", 0xa8c, BIT(5), 0); -static SUNXI_CCU_GATE(bus_otg_clk, "bus-otg", "psi-ahb", 0xa8c, BIT(8), 0); - -static SUNXI_CCU_GATE(bus_lradc_clk, "bus-lradc", "psi-ahb", 0xa9c, BIT(0), 0); - -static SUNXI_CCU_GATE(bus_dpss_top0_clk, "bus-dpss-top0", "psi-ahb", - 0xabc, BIT(0), 0); - -static SUNXI_CCU_GATE(hdmi_24m_clk, "hdmi-24m", "dcxo24M", 0xb04, BIT(31), 0); - -static const char *const hdmi_cec_parents[] = { "osc32k", "hdmi-cec-32k" }; -static SUNXI_CCU_MUX_WITH_GATE(hdmi_cec_clk, "hdmi-cec", - hdmi_cec_parents, - 0xb10, - 24, 1, /* mux */ - BIT(31) | BIT(30), /* TODO:gate peri*/ - 0); - -static SUNXI_CCU_GATE(bus_hdmi_clk, "bus-hdmi", "psi-ahb", 0xb1c, BIT(0), 0); - -static const char *const mipi_dsi_parents[] = { "dcxo24M", "pll-periph0", - "pll-video0-2x", "pll-video1-2x", - "pll-audio1-div2" - }; -static SUNXI_CCU_M_WITH_MUX_GATE(mipi_dsi_clk, "mipi-dsi", - mipi_dsi_parents, - 0xb24, - 0, 4, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_GATE(bus_mipi_dsi_clk, "bus-mipi-dsi", "psi-ahb", - 0xb4c, BIT(0), 0); - -static const char *const hdmi_tcon_tve_parents[] = { "pll-video0", "pll-video0-4x", - "pll-video1", "pll-video1-4x", - "pll-periph0-2x", "pll-audio1-div2" - }; -static SUNXI_CCU_MP_WITH_MUX_GATE(tcon_lcd0_clk, "tcon-lcd0", - hdmi_tcon_tve_parents, 0xb60, - 0, 4, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_GATE(bus_tcon_lcd0_clk, "bus-tcon-lcd0", "psi-ahb", - 0xb7c, BIT(0), 0); - -static SUNXI_CCU_MP_WITH_MUX_GATE(tcon_tv_clk, "tcon-tv", - hdmi_tcon_tve_parents, 0xb80, - 0, 4, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_GATE(bus_tcon_tv_clk, "bus-tcon-tv", "psi-ahb", - 0xb9c, BIT(0), 0); - -static SUNXI_CCU_MP_WITH_MUX_GATE(tve_clk, "tve", - hdmi_tcon_tve_parents, 0xbb0, - 0, 4, /* M */ - 8, 2, /* N */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_GATE(bus_tve_top_clk, "bus-tve-top", "psi-ahb", - 0xbbc, BIT(0), 0); -static SUNXI_CCU_GATE(bus_tve_clk, "bus-tve", "psi-ahb", - 0xbbc, BIT(1), 0); - -static const char *const tvd_parents[] = { "dcxo24M", "pll-video0", - "pll-video1", "pll-periph0" - }; -static SUNXI_CCU_M_WITH_MUX_GATE(tvd_clk, "tvd", - tvd_parents, - 0xbc0, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_GATE(bus_tvd_top_clk, "bus-tvd-top", "psi-ahb", - 0xbdc, BIT(0), 0); -static SUNXI_CCU_GATE(bus_tvd_clk, "bus-tvd", "psi-ahb", - 0xbdc, BIT(1), 0); - -static const char *const ledc_parents[] = { "dcxo24M", "pll-periph0" }; -static SUNXI_CCU_MP_WITH_MUX_GATE(ledc_clk, "ledc", - ledc_parents, 0xbf0, - 0, 4, - 8, 2, - 24, 1, - BIT(31), - 0); - -static SUNXI_CCU_GATE(bus_ledc_clk, "bus-ledc", "psi-ahb", - 0xbfc, BIT(0), 0); - -static const char *const csi_top_parents[] = { "pll-periph0-2x", "pll-video0-2x", - "pll-video1-2x" - }; -static SUNXI_CCU_M_WITH_MUX_GATE(csi_top_clk, "csi-top", - csi_top_parents, 0xc04, - 0, 4, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static const char *const csi0_mclk_parents[] = { "dcxo24M", "pll-periph0", - "pll-video0", "pll-video1", - "pll-audio-div2", "pll-audio-div5" - }; -static SUNXI_CCU_M_WITH_MUX_GATE(csi0_mclk_clk, "csi0-mclk", - csi0_mclk_parents, 0xc08, - 0, 5, /* M */ - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_GATE(bus_csi_clk, "bus-csi", "psi-ahb", 0xc1c, BIT(0), 0); - -static const char *const tpadc_parents[] = { "dcxo24M", "pll-audio0" }; -static SUNXI_CCU_MUX_WITH_GATE(tpadc_clk, "tpadc", - tpadc_parents, 0xc50, - 24, 3, /* mux */ - BIT(31), /* gate */ - 0); - -static SUNXI_CCU_GATE(bus_tpadc_clk, "bus-tpadc", "apb0", 0xc5c, BIT(0), 0); - -static SUNXI_CCU_GATE(bus_tzma_clk, "bus-tzma", "apb0", 0xc6c, BIT(0), 0); - -static const char *const dsp_parents[] = { "dcxo24M", "osc32k", - "iosc", "pll-periph0-2x" - }; -static SUNXI_CCU_M_WITH_MUX_GATE(dsp_clk, "dsp", dsp_parents, 0xc70, - 0, 4, - 24, 3, - BIT(31), 0); - -static SUNXI_CCU_GATE(bus_dsp_cfg_clk, "bus-dsp-cfg", "psi-ahb", 0xc7c, BIT(1), 0); - -static const char *const riscv_parents[] = { "dcxo24M", "osc32k", - "iosc", "pll-periph0-800m", - "pll-periph0", "pll-cpux", - "pll-audio1-div2" - }; -static SUNXI_CCU_MUX(riscv_clk, "riscv", - riscv_parents, 0xd00, 24, 3, 0); - -/* The riscv-axi clk needs to be divided by at least 2 */ -static struct clk_div_table riscv_axi_table[] = -{ - { .val = 1, .div = 2 }, - { .val = 2, .div = 3 }, - { .val = 3, .div = 4 }, - { /* Sentinel */ }, -}; -static SUNXI_CCU_DIV_TABLE(riscv_axi_clk, "riscv-axi", - "riscv", 0xd00, 8, 2, - riscv_axi_table, 0); - -static SUNXI_CCU_GATE(bus_riscv_cfg_clk, "bus-riscv-cfg", "psi-ahb", - 0xd0c, BIT(0), 0); - -/* Add the cpu fanout clk */ -static SUNXI_CCU_GATE(fanout_24m_clk, "fanout-24m", - "dcxo24M", 0xf30, BIT(0), 0); -static SUNXI_CCU_GATE(fanout_12m_clk, "fanout-12m", - "osc12M", 0xf30, BIT(1), 0); -static SUNXI_CCU_GATE_WITH_PREDIV(fanout_16m_clk, "fanout-16m", - "pll-periph0-2x", 0xf30, - 75, /* prediv */ - BIT(2), 0); -static SUNXI_CCU_GATE_WITH_PREDIV(fanout_25m_clk, "fanout-25m", - "pll-periph0", 0xf30, - 24, /* prediv */ - BIT(3), 0); -static SUNXI_CCU_GATE_WITH_PREDIV(fanout_32k_clk, "fanout-32k", - "pll-periph0-2x", 0xf30, - 36621, /* prediv */ - BIT(4), 0); - -static const char *const fanout_27m_parents[] = { "pll-video0", "pll-video1" }; -static SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(fanout_27m_clk, "fanout-27m", - fanout_27m_parents, 0xf34, - 8, 2, - 0, 5, - 24, 2, - BIT(31), 0); - -static SUNXI_CCU_M_WITH_GATE(fanout_pclk, "fanout-pclk", - "apb0", 0xf38, 0, 5, BIT(31), 0); - -static const char *const fanout_parents[] = { "fanout-32k", "fanout-12m", - "fanout-16m", "fanout-24m", - "fanout-25m", "fanout-27m", - "fanout-pclk" - }; -static SUNXI_CCU_MUX_WITH_GATE(fanout0_out_clk, "fanout0-out-clk", - fanout_parents, 0xf3c, - 0, 3, - BIT(21), 0); -static SUNXI_CCU_MUX_WITH_GATE(fanout1_out_clk, "fanout1-out-clk", - fanout_parents, 0xf3c, - 3, 3, - BIT(22), 0); -static SUNXI_CCU_MUX_WITH_GATE(fanout2_out_clk, "fanout2-out-clk", - fanout_parents, 0xf3c, - 6, 3, - BIT(23), 0); - -/* Fixed factor clocks */ -static CLK_FIXED_FACTOR_FW_NAME(osc12M_clk, "osc12M", "dcxo24M", 2, 1, 0); - -static CLK_FIXED_FACTOR_HW(pll_periph0_clk, "pll-periph0", - &pll_periph0_2x_clk.common.hw, - 2, 1, 0); - -/* For AHBS */ -static CLK_FIXED_FACTOR_HW(pll_periph0_div3_clk, "pll-periph0-div3", - &pll_periph0_2x_clk.common.hw, - 6, 1, 0); - -static CLK_FIXED_FACTOR_HW(hdmi_cec_32k_clk, "hdmi-cec-32k", - &pll_periph0_2x_clk.common.hw, - 36621, 1, 0); - -static CLK_FIXED_FACTOR_HW(mbus_clk, "mbus", - &pll_ddr0_clk.common.hw, - 4, 1, 0); - -static const struct clk_hw *pll_video0_parents[] = -{ - &pll_video0_clk.common.hw -}; -static CLK_FIXED_FACTOR_HWS(pll_video0_4x_clk, "pll-video0-4x", - pll_video0_parents, - 1, 4, CLK_SET_RATE_PARENT); -static CLK_FIXED_FACTOR_HWS(pll_video0_2x_clk, "pll-video0-2x", - pll_video0_parents, - 1, 2, CLK_SET_RATE_PARENT); - -static const struct clk_hw *pll_video1_parents[] = -{ - &pll_video1_clk.common.hw -}; -static CLK_FIXED_FACTOR_HWS(pll_video1_4x_clk, "pll-video1-4x", - pll_video1_parents, - 1, 4, CLK_SET_RATE_PARENT); -static CLK_FIXED_FACTOR_HWS(pll_video1_2x_clk, "pll-video1-2x", - pll_video1_parents, - 1, 2, CLK_SET_RATE_PARENT); - -static const struct clk_hw *pll_audio0_parents[] = -{ - &pll_audio0_4x_clk.common.hw -}; -static CLK_FIXED_FACTOR_HWS(pll_audio0_clk, "pll-audio0", - pll_audio0_parents, - 4, 1, CLK_SET_RATE_PARENT); -static CLK_FIXED_FACTOR_HWS(pll_audio0_2x_clk, "pll-audio0-2x", - pll_audio0_parents, - 2, 1, CLK_SET_RATE_PARENT); -/* ccu_des_end */ - -static struct ccu_common *sun8iw20_ccu_clks[] = -{ - &pll_cpux_clk.common, - &pll_ddr0_clk.common, - &pll_periph0_parent_clk.common, - &pll_periph0_2x_clk.common, - &pll_periph0_800m_clk.common, - &pll_video0_clk.common, - &pll_video1_clk.common, - &pll_ve_clk.common, - &pll_audio0_4x_clk.common, - &pll_audio1_clk.common, - &pll_audio1_div2_clk.common, - &pll_audio1_div5_clk.common, - &pll_cpux_div.common, - &cpux_clk.common, - &axi_clk.common, - &apb_clk.common, - &psi_ahb_clk.common, - &apb0_clk.common, - &apb1_clk.common, - &de0_clk.common, - &bus_de0_clk.common, - &di_clk.common, - &bus_di_clk.common, - &g2d_clk.common, - &bus_g2d_clk.common, - &ce_clk.common, - &bus_ce_clk.common, - &ve_clk.common, - &bus_ve_clk.common, - &bus_dma_clk.common, - &bus_msgbox0_clk.common, - &bus_msgbox1_clk.common, - &bus_msgbox2_clk.common, - &bus_spinlock_clk.common, - &bus_hstimer_clk.common, - &avs_clk.common, - &bus_dbg_clk.common, - &bus_pwm_clk.common, - &bus_iommu_clk.common, - &dram_clk.common, - &mbus_dma_clk.common, - &mbus_ve_clk.common, - &mbus_ce_clk.common, - &mbus_tvin_clk.common, - &mbus_csi_clk.common, - &mbus_g2d_clk.common, - &bus_dram_clk.common, - &mmc0_clk.common, - &mmc1_clk.common, - &mmc2_clk.common, - &bus_mmc0_clk.common, - &bus_mmc1_clk.common, - &bus_mmc2_clk.common, - &bus_uart0_clk.common, - &bus_uart1_clk.common, - &bus_uart2_clk.common, - &bus_uart3_clk.common, - &bus_uart4_clk.common, - &bus_uart5_clk.common, - &bus_i2c0_clk.common, - &bus_i2c1_clk.common, - &bus_i2c2_clk.common, - &bus_i2c3_clk.common, - &spi0_clk.common, - &spi1_clk.common, - &bus_spi0_clk.common, - &bus_spi1_clk.common, - &emac0_25m_clk.common, - &bus_emac0_clk.common, - &ir_tx_clk.common, - &bus_ir_tx_clk.common, - &bus_gpadc_clk.common, - &bus_ths_clk.common, - &i2s0_clk.common, - &i2s1_clk.common, - &i2s2_clk.common, - &i2s2_asrc_clk.common, - &bus_i2s0_clk.common, - &bus_i2s1_clk.common, - &bus_i2s2_clk.common, - &spdif_tx_clk.common, - &spdif_rx_clk.common, - &bus_spdif_clk.common, - &dmic_clk.common, - &bus_dmic_clk.common, - &audio_codec_dac_clk.common, - &audio_codec_adc_clk.common, - &bus_audio_codec_clk.common, - &usb_ohci0_clk.common, - &usb_ohci1_clk.common, - &bus_ohci0_clk.common, - &bus_ohci1_clk.common, - &bus_ehci0_clk.common, - &bus_ehci1_clk.common, - &bus_otg_clk.common, - &bus_lradc_clk.common, - &bus_dpss_top0_clk.common, - &hdmi_24m_clk.common, - &hdmi_cec_clk.common, - &bus_hdmi_clk.common, - &mipi_dsi_clk.common, - &bus_mipi_dsi_clk.common, - &tcon_lcd0_clk.common, - &bus_tcon_lcd0_clk.common, - &tcon_tv_clk.common, - &bus_tcon_tv_clk.common, - &tve_clk.common, - &bus_tve_clk.common, - &bus_tve_top_clk.common, - &tvd_clk.common, - &bus_tvd_clk.common, - &ledc_clk.common, - &bus_ledc_clk.common, - &bus_tvd_top_clk.common, - &csi_top_clk.common, - &csi0_mclk_clk.common, - &bus_csi_clk.common, - &tpadc_clk.common, - &bus_tpadc_clk.common, - &bus_tzma_clk.common, - &dsp_clk.common, - &bus_dsp_cfg_clk.common, - &riscv_clk.common, - &riscv_axi_clk.common, - &bus_riscv_cfg_clk.common, - &fanout_24m_clk.common, - &fanout_12m_clk.common, - &fanout_16m_clk.common, - &fanout_25m_clk.common, - &fanout_32k_clk.common, - &fanout_27m_clk.common, - &fanout_pclk.common, - &fanout0_out_clk.common, - &fanout1_out_clk.common, - &fanout2_out_clk.common, -}; - -/* ccu_def_start */ -static struct clk_hw_onecell_data sun8iw20_hw_clks = -{ - .hws = { - [CLK_OSC12M] = &osc12M_clk.hw, - [CLK_PLL_CPUX] = &pll_cpux_clk.common.hw, - [CLK_PLL_DDR0] = &pll_ddr0_clk.common.hw, - [CLK_PLL_PERIPH0_PARENT] = &pll_periph0_parent_clk.common.hw, - [CLK_PLL_PERIPH0_2X] = &pll_periph0_2x_clk.common.hw, - [CLK_PLL_PERIPH0] = &pll_periph0_clk.hw, - [CLK_PLL_PERIPH0_800M] = &pll_periph0_800m_clk.common.hw, - [CLK_PLL_PERIPH0_DIV3] = &pll_periph0_div3_clk.hw, - [CLK_PLL_VIDEO0] = &pll_video0_clk.common.hw, - [CLK_PLL_VIDEO0_2X] = &pll_video0_2x_clk.hw, - [CLK_PLL_VIDEO0_4X] = &pll_video0_4x_clk.hw, - [CLK_PLL_VIDEO1] = &pll_video1_clk.common.hw, - [CLK_PLL_VIDEO1_2X] = &pll_video1_2x_clk.hw, - [CLK_PLL_VIDEO1_4X] = &pll_video1_4x_clk.hw, - [CLK_PLL_VE] = &pll_ve_clk.common.hw, - [CLK_PLL_AUDIO0] = &pll_audio0_clk.hw, - [CLK_PLL_AUDIO0_2X] = &pll_audio0_2x_clk.hw, - [CLK_PLL_AUDIO0_4X] = &pll_audio0_4x_clk.common.hw, - [CLK_PLL_AUDIO1] = &pll_audio1_clk.common.hw, - [CLK_PLL_AUDIO1_DIV2] = &pll_audio1_div2_clk.common.hw, - [CLK_PLL_AUDIO1_DIV5] = &pll_audio1_div5_clk.common.hw, - [CLK_PLL_CPUX_DIV] = &pll_cpux_div.common.hw, - [CLK_CPUX] = &cpux_clk.common.hw, - [CLK_AXI] = &axi_clk.common.hw, - [CLK_APB] = &apb_clk.common.hw, - [CLK_PSI_AHB] = &psi_ahb_clk.common.hw, - [CLK_APB0] = &apb0_clk.common.hw, - [CLK_APB1] = &apb1_clk.common.hw, - [CLK_MBUS] = &mbus_clk.hw, - [CLK_DE0] = &de0_clk.common.hw, - [CLK_BUS_DE0] = &bus_de0_clk.common.hw, - [CLK_DI] = &di_clk.common.hw, - [CLK_BUS_DI] = &bus_di_clk.common.hw, - [CLK_G2D] = &g2d_clk.common.hw, - [CLK_BUS_G2D] = &bus_g2d_clk.common.hw, - [CLK_CE] = &ce_clk.common.hw, - [CLK_BUS_CE] = &bus_ce_clk.common.hw, - [CLK_VE] = &ve_clk.common.hw, - [CLK_BUS_VE] = &bus_ve_clk.common.hw, - [CLK_BUS_DMA] = &bus_dma_clk.common.hw, - [CLK_BUS_MSGBOX0] = &bus_msgbox0_clk.common.hw, - [CLK_BUS_MSGBOX1] = &bus_msgbox1_clk.common.hw, - [CLK_BUS_MSGBOX2] = &bus_msgbox2_clk.common.hw, - [CLK_BUS_SPINLOCK] = &bus_spinlock_clk.common.hw, - [CLK_BUS_HSTIMER] = &bus_hstimer_clk.common.hw, - [CLK_AVS] = &avs_clk.common.hw, - [CLK_BUS_DBG] = &bus_dbg_clk.common.hw, - [CLK_BUS_PWM] = &bus_pwm_clk.common.hw, - [CLK_BUS_IOMMU] = &bus_iommu_clk.common.hw, - [CLK_DRAM] = &dram_clk.common.hw, - [CLK_MBUS_DMA] = &mbus_dma_clk.common.hw, - [CLK_MBUS_VE] = &mbus_ve_clk.common.hw, - [CLK_MBUS_CE] = &mbus_ce_clk.common.hw, - [CLK_MBUS_TVIN] = &mbus_tvin_clk.common.hw, - [CLK_MBUS_CSI] = &mbus_csi_clk.common.hw, - [CLK_MBUS_G2D] = &mbus_g2d_clk.common.hw, - [CLK_BUS_DRAM] = &bus_dram_clk.common.hw, - [CLK_MMC0] = &mmc0_clk.common.hw, - [CLK_MMC1] = &mmc1_clk.common.hw, - [CLK_MMC2] = &mmc2_clk.common.hw, - [CLK_BUS_MMC0] = &bus_mmc0_clk.common.hw, - [CLK_BUS_MMC1] = &bus_mmc1_clk.common.hw, - [CLK_BUS_MMC2] = &bus_mmc2_clk.common.hw, - [CLK_BUS_UART0] = &bus_uart0_clk.common.hw, - [CLK_BUS_UART1] = &bus_uart1_clk.common.hw, - [CLK_BUS_UART2] = &bus_uart2_clk.common.hw, - [CLK_BUS_UART3] = &bus_uart3_clk.common.hw, - [CLK_BUS_UART4] = &bus_uart4_clk.common.hw, - [CLK_BUS_UART5] = &bus_uart5_clk.common.hw, - [CLK_BUS_I2C0] = &bus_i2c0_clk.common.hw, - [CLK_BUS_I2C1] = &bus_i2c1_clk.common.hw, - [CLK_BUS_I2C2] = &bus_i2c2_clk.common.hw, - [CLK_BUS_I2C3] = &bus_i2c3_clk.common.hw, - [CLK_SPI0] = &spi0_clk.common.hw, - [CLK_SPI1] = &spi1_clk.common.hw, - [CLK_BUS_SPI0] = &bus_spi0_clk.common.hw, - [CLK_BUS_SPI1] = &bus_spi1_clk.common.hw, - [CLK_EMAC0_25M] = &emac0_25m_clk.common.hw, - [CLK_BUS_EMAC0] = &bus_emac0_clk.common.hw, - [CLK_IR_TX] = &ir_tx_clk.common.hw, - [CLK_BUS_IR_TX] = &bus_ir_tx_clk.common.hw, - [CLK_BUS_GPADC] = &bus_gpadc_clk.common.hw, - [CLK_BUS_THS] = &bus_ths_clk.common.hw, - [CLK_I2S0] = &i2s0_clk.common.hw, - [CLK_I2S1] = &i2s1_clk.common.hw, - [CLK_I2S2] = &i2s2_clk.common.hw, - [CLK_I2S2_ASRC] = &i2s2_asrc_clk.common.hw, - [CLK_BUS_I2S0] = &bus_i2s0_clk.common.hw, - [CLK_BUS_I2S1] = &bus_i2s1_clk.common.hw, - [CLK_BUS_I2S2] = &bus_i2s2_clk.common.hw, - [CLK_SPDIF_TX] = &spdif_tx_clk.common.hw, - [CLK_SPDIF_RX] = &spdif_rx_clk.common.hw, - [CLK_BUS_SPDIF] = &bus_spdif_clk.common.hw, - [CLK_DMIC] = &dmic_clk.common.hw, - [CLK_BUS_DMIC] = &bus_dmic_clk.common.hw, - [CLK_AUDIO_DAC] = &audio_codec_dac_clk.common.hw, - [CLK_AUDIO_ADC] = &audio_codec_adc_clk.common.hw, - [CLK_BUS_AUDIO_CODEC] = &bus_audio_codec_clk.common.hw, - [CLK_USB_OHCI0] = &usb_ohci0_clk.common.hw, - [CLK_USB_OHCI1] = &usb_ohci1_clk.common.hw, - [CLK_BUS_OHCI0] = &bus_ohci0_clk.common.hw, - [CLK_BUS_OHCI1] = &bus_ohci1_clk.common.hw, - [CLK_BUS_EHCI0] = &bus_ehci0_clk.common.hw, - [CLK_BUS_EHCI1] = &bus_ehci1_clk.common.hw, - [CLK_BUS_OTG] = &bus_otg_clk.common.hw, - [CLK_BUS_LRADC] = &bus_lradc_clk.common.hw, - [CLK_BUS_DPSS_TOP0] = &bus_dpss_top0_clk.common.hw, - [CLK_HDMI_24M] = &hdmi_24m_clk.common.hw, - [CLK_HDMI_CEC] = &hdmi_cec_clk.common.hw, - [CLK_HDMI_CEC_32K] = &hdmi_cec_32k_clk.hw, - [CLK_BUS_HDMI] = &bus_hdmi_clk.common.hw, - [CLK_MIPI_DSI] = &mipi_dsi_clk.common.hw, - [CLK_BUS_MIPI_DSI] = &bus_mipi_dsi_clk.common.hw, - [CLK_TCON_LCD0] = &tcon_lcd0_clk.common.hw, - [CLK_BUS_TCON_LCD0] = &bus_tcon_lcd0_clk.common.hw, - [CLK_TCON_TV] = &tcon_tv_clk.common.hw, - [CLK_BUS_TCON_TV] = &bus_tcon_tv_clk.common.hw, - [CLK_TVE] = &tve_clk.common.hw, - [CLK_BUS_TVE] = &bus_tve_clk.common.hw, - [CLK_BUS_TVE_TOP] = &bus_tve_top_clk.common.hw, - [CLK_TVD] = &tvd_clk.common.hw, - [CLK_BUS_TVD] = &bus_tvd_clk.common.hw, - [CLK_BUS_TVD_TOP] = &bus_tvd_top_clk.common.hw, - [CLK_LEDC] = &ledc_clk.common.hw, - [CLK_BUS_LEDC] = &bus_ledc_clk.common.hw, - [CLK_CSI_TOP] = &csi_top_clk.common.hw, - [CLK_CSI0_MCLK] = &csi0_mclk_clk.common.hw, - [CLK_BUS_CSI] = &bus_csi_clk.common.hw, - [CLK_TPADC] = &tpadc_clk.common.hw, - [CLK_BUS_TPADC] = &bus_tpadc_clk.common.hw, - [CLK_BUS_TZMA] = &bus_tzma_clk.common.hw, - [CLK_DSP] = &dsp_clk.common.hw, - [CLK_BUS_DSP_CFG] = &bus_dsp_cfg_clk.common.hw, - [CLK_RISCV] = &riscv_clk.common.hw, - [CLK_RISCV_AXI] = &riscv_axi_clk.common.hw, - [CLK_BUS_RISCV_CFG] = &bus_riscv_cfg_clk.common.hw, - [CLK_FANOUT_24M] = &fanout_24m_clk.common.hw, - [CLK_FANOUT_12M] = &fanout_12m_clk.common.hw, - [CLK_FANOUT_16M] = &fanout_16m_clk.common.hw, - [CLK_FANOUT_25M] = &fanout_25m_clk.common.hw, - [CLK_FANOUT_32K] = &fanout_32k_clk.common.hw, - [CLK_FANOUT_27M] = &fanout_27m_clk.common.hw, - [CLK_FANOUT_PCLK] = &fanout_pclk.common.hw, - [CLK_FANOUT0_OUT] = &fanout0_out_clk.common.hw, - [CLK_FANOUT1_OUT] = &fanout1_out_clk.common.hw, - [CLK_FANOUT2_OUT] = &fanout2_out_clk.common.hw, - }, - .num = CLK_NUMBER, -}; -/* ccu_def_end */ - -/* rst_def_start */ -static struct ccu_reset_map sun8iw20_ccu_resets[] = -{ - [RST_MBUS] = { 0x540, BIT(30) }, - - [RST_BUS_DE0] = { 0x60c, BIT(16) }, - [RST_BUS_DI] = { 0x62c, BIT(16) }, - [RST_BUS_G2D] = { 0x63c, BIT(16) }, - [RST_BUS_CE] = { 0x68c, BIT(16) }, - [RST_BUS_VE] = { 0x69c, BIT(16) }, - [RST_BUS_DMA] = { 0x70c, BIT(16) }, - [RST_BUS_MSGBOX0] = { 0x71c, BIT(16) }, - [RST_BUS_MSGBOX1] = { 0x71c, BIT(17) }, - [RST_BUS_MSGBOX2] = { 0x71c, BIT(18) }, - [RST_BUS_SPINLOCK] = { 0x72c, BIT(16) }, - [RST_BUS_HSTIMER] = { 0x73c, BIT(16) }, - [RST_BUS_DBG] = { 0x78c, BIT(16) }, - [RST_BUS_PWM] = { 0x7ac, BIT(16) }, - [RST_BUS_DRAM] = { 0x80c, BIT(16) }, - [RST_BUS_MMC0] = { 0x84c, BIT(16) }, - [RST_BUS_MMC1] = { 0x84c, BIT(17) }, - [RST_BUS_MMC2] = { 0x84c, BIT(18) }, - [RST_BUS_UART0] = { 0x90c, BIT(16) }, - [RST_BUS_UART1] = { 0x90c, BIT(17) }, - [RST_BUS_UART2] = { 0x90c, BIT(18) }, - [RST_BUS_UART3] = { 0x90c, BIT(19) }, - [RST_BUS_UART4] = { 0x90c, BIT(20) }, - [RST_BUS_UART5] = { 0x90c, BIT(21) }, - [RST_BUS_I2C0] = { 0x91c, BIT(16) }, - [RST_BUS_I2C1] = { 0x91c, BIT(17) }, - [RST_BUS_I2C2] = { 0x91c, BIT(18) }, - [RST_BUS_I2C3] = { 0x91c, BIT(19) }, - [RST_BUS_SPI0] = { 0x96c, BIT(16) }, - [RST_BUS_SPI1] = { 0x96c, BIT(17) }, - [RST_BUS_EMAC0] = { 0x97c, BIT(16) }, - [RST_BUS_IR_TX] = { 0x9cc, BIT(16) }, - [RST_BUS_GPADC] = { 0x9ec, BIT(16) }, - [RST_BUS_THS] = { 0x9fc, BIT(16) }, - [RST_BUS_I2S0] = { 0xa20, BIT(16) }, - [RST_BUS_I2S1] = { 0xa20, BIT(17) }, - [RST_BUS_I2S2] = { 0xa20, BIT(18) }, - [RST_BUS_SPDIF] = { 0xa2c, BIT(16) }, - [RST_BUS_DMIC] = { 0xa4c, BIT(16) }, - [RST_BUS_AUDIO_CODEC] = { 0xa5c, BIT(16) }, - - [RST_USB_PHY0] = { 0xa70, BIT(30) }, - [RST_USB_PHY1] = { 0xa74, BIT(30) }, - - [RST_BUS_OHCI0] = { 0xa8c, BIT(16) }, - [RST_BUS_OHCI1] = { 0xa8c, BIT(17) }, - [RST_BUS_EHCI0] = { 0xa8c, BIT(20) }, - [RST_BUS_EHCI1] = { 0xa8c, BIT(21) }, - [RST_BUS_OTG] = { 0xa8c, BIT(24) }, - - [RST_BUS_LRADC] = { 0xa9c, BIT(16) }, - [RST_BUS_DPSS_TOP0] = { 0xabc, BIT(16) }, - [RST_BUS_HDMI_SUB] = { 0xb1c, BIT(17) }, - [RST_BUS_HDMI_MAIN] = { 0xb1c, BIT(16) }, - [RST_BUS_MIPI_DSI] = { 0xb4c, BIT(16) }, - [RST_BUS_TCON_LCD0] = { 0xb7c, BIT(16) }, - [RST_BUS_TCON_TV] = { 0xb9c, BIT(16) }, - [RST_BUS_LVDS0] = { 0xbac, BIT(16) }, - [RST_BUS_TVE] = { 0xbbc, BIT(17) }, - [RST_BUS_TVE_TOP] = { 0xbbc, BIT(16) }, - [RST_BUS_TVD] = { 0xbdc, BIT(17) }, - [RST_BUS_TVD_TOP] = { 0xbdc, BIT(16) }, - [RST_BUS_LEDC] = { 0xbfc, BIT(16) }, - [RST_BUS_CSI] = { 0xc1c, BIT(16) }, - [RST_BUS_TPADC] = { 0xc5c, BIT(16) }, - [RST_BUS_DSP] = { 0xc7c, BIT(16) }, - [RST_BUS_DSP_CFG] = { 0xc7c, BIT(17) }, - [RST_BUS_DSP_DBG] = { 0xc7c, BIT(18) }, - [RST_BUS_RISCV_CFG] = { 0xd0c, BIT(16) }, - /* TODO: RST_RISCV_SOFT */ -}; -/* rst_def_end */ - -static const struct sunxi_ccu_desc sun8iw20_ccu_desc = -{ - .ccu_clks = sun8iw20_ccu_clks, - .num_ccu_clks = ARRAY_SIZE(sun8iw20_ccu_clks), - - .hw_clks = &sun8iw20_hw_clks, - .clk_type = HAL_SUNXI_CCU, - - .resets = sun8iw20_ccu_resets, - .reset_type = HAL_SUNXI_RESET, - .num_resets = ARRAY_SIZE(sun8iw20_ccu_resets), -}; - -static const u32 pll_regs[] = -{ - SUN8IW20_PLL_CPUX_REG, - SUN8IW20_PLL_DDR0_REG, - SUN8IW20_PLL_PERIPH0_REG, - SUN8IW20_PLL_VIDEO0_REG, - SUN8IW20_PLL_VIDEO1_REG, - SUN8IW20_PLL_VE_REG, - SUN8IW20_PLL_AUDIO0_REG, - SUN8IW20_PLL_AUDIO1_REG, -}; - -static const u32 pll_video_regs[] = -{ - SUN8IW20_PLL_VIDEO0_REG, - SUN8IW20_PLL_VIDEO1_REG, -}; - -static const u32 usb2_clk_regs[] = -{ - SUN8IW20_USB0_CLK_REG, - SUN8IW20_USB1_CLK_REG, -}; - -__attribute__((weak)) int sunxi_dsp_init(void) -{ - return 0; -} - -int sunxi_ccu_init(void) -{ - unsigned long reg = (unsigned long)SUNXI_CCU_BASE; - u32 val; - int i; - - /* Enable the lock bits on all Plls */ - for (i = 0; i < ARRAY_SIZE(pll_regs); i++) - { - val = readl(reg + pll_regs[i]); - val |= BIT(29); - writel(val, reg + pll_regs[i]); - } - - /* - * Force the output divider of video PLLs to 0. - * - * See the comment before pll-video0 definition for the reason. - */ - for (i = 0; i < ARRAY_SIZE(pll_video_regs); i++) - { - val = readl(reg + pll_video_regs[i]); - val &= ~BIT(0); - writel(val, reg + pll_video_regs[i]); - } - - /* Enforce m1 = 0, m0 = 1 for Audio0 PLL */ - val = readl(reg + SUN8IW20_PLL_AUDIO0_REG); - val &= ~BIT(1); - val |= BIT(0); - - writel(val, reg + SUN8IW20_PLL_AUDIO0_REG); - - /* TODO: config PLL_AUDIO1 here */ - - /* - * Force OHCI 12M clock sources to 00 (12MHz divided from 48MHz) - * - * This clock mux is still mysterious, and the code just enforces - * it to have a valid clock parent. - */ - for (i = 0; i < ARRAY_SIZE(usb2_clk_regs); i++) - { - val = readl(reg + usb2_clk_regs[i]); - val &= ~GENMASK(25, 24); - writel(val, reg + usb2_clk_regs[i]); - } - - return ccu_common_init(reg, &sun8iw20_ccu_desc); -} diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20.h deleted file mode 100644 index 73651f50e545da757bad983d5a65a18c5b9ac51a..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu-sun8iw20.h +++ /dev/null @@ -1,161 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2020 frank@allwinnertech.com - */ - -#ifndef _CCU_SUN8IW20_H_ -#define _CCU_SUN8IW20_H_ - -#define SUNXI_CCU_BASE 0x02001000 - -#define CLK_OSC12M 0 -#define CLK_PLL_CPUX 1 -#define CLK_PLL_DDR0 2 -#define CLK_PLL_PERIPH0_PARENT 3 -#define CLK_PLL_PERIPH0_2X 4 -#define CLK_PLL_PERIPH0 5 -#define CLK_PLL_PERIPH0_800M 6 -#define CLK_PLL_PERIPH0_DIV3 7 -#define CLK_PLL_VIDEO0 8 -#define CLK_PLL_VIDEO0_2X 9 -#define CLK_PLL_VIDEO0_4X 10 -#define CLK_PLL_VIDEO1 11 -#define CLK_PLL_VIDEO1_2X 12 -#define CLK_PLL_VIDEO1_4X 13 -#define CLK_PLL_VE 14 -#define CLK_PLL_AUDIO0 15 -#define CLK_PLL_AUDIO0_2X 16 -#define CLK_PLL_AUDIO0_4X 17 -#define CLK_PLL_AUDIO1 18 -#define CLK_PLL_AUDIO1_DIV2 19 -#define CLK_PLL_AUDIO1_DIV5 20 -#define CLK_PLL_CPUX_DIV 21 -#define CLK_CPUX 22 -#define CLK_AXI 23 -#define CLK_APB 24 -#define CLK_PSI_AHB 25 -#define CLK_APB0 26 -#define CLK_APB1 27 -#define CLK_MBUS 28 -#define CLK_DE0 29 -#define CLK_BUS_DE0 30 -#define CLK_DI 31 -#define CLK_BUS_DI 32 -#define CLK_G2D 33 -#define CLK_BUS_G2D 34 -#define CLK_CE 35 -#define CLK_BUS_CE 36 -#define CLK_VE 37 -#define CLK_BUS_VE 38 -#define CLK_BUS_DMA 39 -#define CLK_BUS_MSGBOX0 40 -#define CLK_BUS_MSGBOX1 41 -#define CLK_BUS_MSGBOX2 42 -#define CLK_BUS_SPINLOCK 43 -#define CLK_BUS_HSTIMER 44 -#define CLK_AVS 45 -#define CLK_BUS_DBG 46 -#define CLK_BUS_PWM 47 -#define CLK_BUS_IOMMU 48 -#define CLK_DRAM 49 -#define CLK_MBUS_DMA 50 -#define CLK_MBUS_VE 51 -#define CLK_MBUS_CE 52 -#define CLK_MBUS_TVIN 53 -#define CLK_MBUS_CSI 54 -#define CLK_MBUS_G2D 55 -#define CLK_BUS_DRAM 56 -#define CLK_MMC0 57 -#define CLK_MMC1 58 -#define CLK_MMC2 59 -#define CLK_BUS_MMC0 60 -#define CLK_BUS_MMC1 61 -#define CLK_BUS_MMC2 62 -#define CLK_BUS_UART0 63 -#define CLK_BUS_UART1 64 -#define CLK_BUS_UART2 65 -#define CLK_BUS_UART3 66 -#define CLK_BUS_UART4 67 -#define CLK_BUS_UART5 68 -#define CLK_BUS_I2C0 69 -#define CLK_BUS_I2C1 70 -#define CLK_BUS_I2C2 71 -#define CLK_BUS_I2C3 72 -#define CLK_SPI0 75 -#define CLK_SPI1 76 -#define CLK_BUS_SPI0 77 -#define CLK_BUS_SPI1 78 -#define CLK_EMAC0_25M 79 -#define CLK_BUS_EMAC0 80 -#define CLK_IR_TX 81 -#define CLK_BUS_IR_TX 82 -#define CLK_BUS_GPADC 83 -#define CLK_BUS_THS 84 -#define CLK_I2S0 85 -#define CLK_I2S1 86 -#define CLK_I2S2 87 -#define CLK_I2S2_ASRC 88 -#define CLK_BUS_I2S0 89 -#define CLK_BUS_I2S1 90 -#define CLK_BUS_I2S2 91 -#define CLK_SPDIF_TX 92 -#define CLK_SPDIF_RX 93 -#define CLK_BUS_SPDIF 94 -#define CLK_DMIC 95 -#define CLK_BUS_DMIC 96 -#define CLK_AUDIO_DAC 97 -#define CLK_AUDIO_ADC 98 -#define CLK_BUS_AUDIO_CODEC 99 -#define CLK_USB_OHCI0 100 -#define CLK_USB_OHCI1 101 -#define CLK_BUS_OHCI0 102 -#define CLK_BUS_OHCI1 103 -#define CLK_BUS_EHCI0 104 -#define CLK_BUS_EHCI1 105 -#define CLK_BUS_OTG 106 -#define CLK_BUS_LRADC 107 -#define CLK_BUS_DPSS_TOP0 108 -#define CLK_HDMI_24M 109 -#define CLK_HDMI_CEC 110 -#define CLK_HDMI_CEC_32K 111 -#define CLK_BUS_HDMI 112 -#define CLK_MIPI_DSI 113 -#define CLK_BUS_MIPI_DSI 114 -#define CLK_TCON_LCD0 115 -#define CLK_BUS_TCON_LCD0 116 -#define CLK_TCON_TV 117 -#define CLK_BUS_TCON_TV 118 -#define CLK_TVE 119 -#define CLK_BUS_TVE 120 -#define CLK_BUS_TVE_TOP 121 -#define CLK_TVD 122 -#define CLK_BUS_TVD 123 -#define CLK_BUS_TVD_TOP 124 -#define CLK_LEDC 125 -#define CLK_BUS_LEDC 126 -#define CLK_CSI_TOP 127 -#define CLK_CSI0_MCLK 128 -#define CLK_BUS_CSI 129 -#define CLK_TPADC 130 -#define CLK_BUS_TPADC 131 -#define CLK_BUS_TZMA 132 -#define CLK_DSP 133 -#define CLK_BUS_DSP_CFG 134 -#define CLK_RISCV 135 -#define CLK_RISCV_AXI 136 -#define CLK_BUS_RISCV_CFG 137 -#define CLK_FANOUT_24M 138 -#define CLK_FANOUT_12M 139 -#define CLK_FANOUT_16M 140 -#define CLK_FANOUT_25M 141 -#define CLK_FANOUT_32K 142 -#define CLK_FANOUT_27M 143 -#define CLK_FANOUT_PCLK 144 -#define CLK_FANOUT0_OUT 145 -#define CLK_FANOUT1_OUT 146 -#define CLK_FANOUT2_OUT 147 - -#define CLK_MAX_NO CLK_FANOUT2_OUT -#define CLK_NUMBER (CLK_MAX_NO + 1) - -#endif /* _CCU_SUN8IW20_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu.c deleted file mode 100644 index bec68d86d4992fcc5c7134a9ce702970fc00c28c..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu.c +++ /dev/null @@ -1,1041 +0,0 @@ -/* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. - * - * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in - *the the People's Republic of China and other countries. - * All Allwinner Technology Co.,Ltd. trademarks are used with permission. - * - * DISCLAIMER - * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. - * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) - * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN - * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. - * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS - * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. - * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. - * - * - * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT - * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING - * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE - * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#include "ccu.h" -#include -#include -#include - -static LIST_HEAD(clk_root_list); - -const char *clk_hw_get_name(const struct clk_hw *hw) -{ - if (!hw || !hw->core) - return NULL; - - return hw->core->name; -} - -unsigned long clk_hw_get_flags(const struct clk_hw *hw) -{ - if (!hw || !hw->core) - return 0; - - return hw->core->flags; -} - -struct clk_core *clk_hw_get_core(const struct clk_hw *hw) -{ - if (!hw || !hw->core) - return NULL; - - return hw->core; -} - -struct clk_core *clk_core_get_by_name(const char *name) -{ - struct clk_core *core = NULL; - - list_for_each_entry(core, &clk_root_list, node) - { - if (strcmp(name, core->name)) - { - continue; - } - return core; - } - - return NULL; -} - -static struct clk_core *clk_core_get_by_pindex(struct clk_core *core, u8 p_index) -{ - if (p_index > core->num_parents) - { - return NULL; - } - - return clk_core_get_by_name(core->parents[p_index].name); -} - -static void clk_core_fill_parent_index(struct clk_core *core, u8 index) -{ - struct clk_parent_map *entry = &core->parents[index]; - struct clk_core *parent = NULL; - - if (entry->hw) - { - parent = entry->hw->core; - /* - * We have a direct reference but it isn't registered yet? - * Orphan it and let clk_reparent() update the orphan status - * when the parent is registered. - */ - } - else - { - parent = clk_core_get_by_pindex(core, index); - } - - /* Only cache it if it's not an error */ - if (parent) - { - entry->core = parent; - } -} - -static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core, - u8 index) -{ - if (!core || index >= core->num_parents || !core->parents) - { - return NULL; - } - - if (!core->parents[index].core) - { - clk_core_fill_parent_index(core, index); - } - return core->parents[index].core; -} - -struct clk_hw * -clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index) -{ - struct clk_core *parent; - - parent = clk_core_get_parent_by_index(hw->core, index); - - return !parent ? NULL : parent->hw; -} - -unsigned int clk_hw_get_num_parents(const struct clk_hw *hw) -{ - return hw->core->num_parents; -} - -struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw) -{ - return hw->core->parent ? hw->core->parent->hw : NULL; -} - -static u32 __clk_get_accuracy(struct clk_core *core) -{ - if (!core) - { - return 0; - } - return core->accuracy; -} - -static unsigned long clk_core_get_rate_nolock(struct clk_core *core) -{ - if (!core) - { - return 0; - } - - if (!core->num_parents || core->parent) - { - return core->rate; - } - - /* - * Clk must have a parent because num_parents > 0 but the parent isn't - * known yet. Best to return 0 as the rate of this clk until we can - * properly recalc the rate based on the parent's rate. - */ - return 0; -} - -static int clk_core_determine_round_nolock(struct clk_core *core, - struct clk_rate_request *req) -{ - long rate; - - if (!core) - { - return 0; - } - - /* - * At this point, core protection will be disabled if - * - if the provider is not protected at all - * - if the calling consumer is the only one which has exclusivity - * over the provider - */ - if (core->ops->determine_rate) - { - return core->ops->determine_rate(core->hw, req); - } - else if (core->ops->round_rate) - { - rate = core->ops->round_rate(core->hw, req->rate, - &req->best_parent_rate); - if (rate < 0) - { - return rate; - } - - req->rate = rate; - } - else - { - return -1; - } - - return 0; -} - -static void clk_core_init_rate_req(struct clk_core *const core, - struct clk_rate_request *req) -{ - struct clk_core *parent; - - if (!core || !req) - { - return; - } - - parent = core->parent; - if (parent) - { - req->best_parent_hw = parent->hw; - req->best_parent_rate = parent->rate; - } - else - { - req->best_parent_hw = NULL; - req->best_parent_rate = 0; - } -} - -static u8 clk_core_can_round(struct clk_core *const core) -{ - return core->ops->determine_rate || core->ops->round_rate; -} - -static int clk_core_round_rate_nolock(struct clk_core *core, - struct clk_rate_request *req) -{ - if (!core) - { - req->rate = 0; - return 0; - } - - clk_core_init_rate_req(core, req); - - if (clk_core_can_round(core)) - { - return clk_core_determine_round_nolock(core, req); - } - else if (core->flags & CLK_SET_RATE_PARENT) - { - return clk_core_round_rate_nolock(core->parent, req); - } - - req->rate = core->rate; - return 0; -} - -/** - * __clk_determine_rate - get the closest rate actually supported by a clock - * @hw: determine the rate of this clock - * @req: target rate request - * - * Useful for clk_ops such as .set_rate and .determine_rate. - */ -int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) -{ - if (!hw) - { - req->rate = 0; - return 0; - } - - return clk_core_round_rate_nolock(hw->core, req); -} - -static u8 mux_is_better_rate(unsigned long rate, unsigned long now, - unsigned long best, unsigned long flags) -{ - if (flags & CLK_MUX_ROUND_CLOSEST) - { - return abs(now - rate) < abs(best - rate); - } - - return now <= rate && now > best; -} - -int clk_mux_determine_rate_flags(struct clk_hw *hw, - struct clk_rate_request *req, - unsigned long flags) -{ - struct clk_core *core = hw->core, *parent, *best_parent = NULL; - int i, num_parents, ret; - unsigned long best = 0; - struct clk_rate_request parent_req = *req; - - /* if NO_REPARENT flag set, pass through to current parent */ - if (core->flags & CLK_SET_RATE_NO_REPARENT) - { - parent = core->parent; - if (core->flags & CLK_SET_RATE_PARENT) - { - ret = __clk_determine_rate(parent ? parent->hw : NULL, - &parent_req); - if (ret) - { - return ret; - } - - best = parent_req.rate; - } - else if (parent) - { - best = clk_core_get_rate_nolock(parent); - } - else - { - best = clk_core_get_rate_nolock(core); - } - - goto out; - } - - /* find the parent that can provide the fastest rate <= rate */ - num_parents = core->num_parents; - for (i = 0; i < num_parents; i++) - { - parent = clk_core_get_parent_by_index(core, i); - if (!parent) - { - continue; - } - - if (core->flags & CLK_SET_RATE_PARENT) - { - parent_req = *req; - ret = __clk_determine_rate(parent->hw, &parent_req); - if (ret) - { - continue; - } - } - else - { - parent_req.rate = clk_core_get_rate_nolock(parent); - } - - if (mux_is_better_rate(req->rate, parent_req.rate, - best, flags)) - { - best_parent = parent; - best = parent_req.rate; - } - } - - if (!best_parent) - { - return -1; - } - -out: - if (best_parent) - { - req->best_parent_hw = best_parent->hw; - } - req->best_parent_rate = best; - req->rate = best; - - return 0; -} - -/* - * __clk_mux_determine_rate - clk_ops::determine_rate implementation for a mux type clk - * @hw: mux type clk to determine rate on - * @req: rate request, also used to return preferred parent and frequencies - * - * Helper for finding best parent to provide a given frequency. This can be used - * directly as a determine_rate callback (e.g. for a mux), or from a more - * complex clock that may combine a mux with other operations. - * - * Returns: 0 on success, -EERROR value on error - */ -int __clk_mux_determine_rate(struct clk_hw *hw, - struct clk_rate_request *req) -{ - return clk_mux_determine_rate_flags(hw, req, 0); -} - -static void clk_core_get_boundaries(struct clk_core *core, - unsigned long *min_rate, - unsigned long *max_rate) -{ - *min_rate = core->min_rate; - *max_rate = core->max_rate; -} - -unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate) -{ - int ret; - struct clk_rate_request req; - - if (!hw) - { - return 0; - } - - clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate); - req.rate = rate; - - ret = clk_core_round_rate_nolock(hw->core, &req); - if (ret) - { - return 0; - } - - return req.rate; -} - -static struct clk_core *__clk_init_parent(struct clk_core *core) -{ - u8 index = 0; - - if (!core->num_parents) - { - return NULL; - } - - if (core->num_parents > 1 && core->ops->get_parent) - { - index = core->ops->get_parent(core->hw); - } - - return clk_core_get_parent_by_index(core, index); -} - -static int __clk_core_init(struct clk_core *core) -{ - u32 rate; - int ret = -1; - - if (!core) - { - return ret; - } - - if (core->ops->init) - { - core->ops->init(core->hw); - } - - core->parent = __clk_init_parent(core); - - if (core->ops->recalc_accuracy) - { - core->accuracy = core->ops->recalc_accuracy(core->hw, - __clk_get_accuracy(core->parent)); - } - else if (core->parent) - { - core->accuracy = core->parent->accuracy; - } - else - { - core->accuracy = 0; - } - - if (core->ops->recalc_rate) - { - rate = core->ops->recalc_rate(core->hw, clk_core_get_rate(core->parent)); - } - else if (core->parent) - { - rate = core->parent->rate; - } - else - { - rate = 0; - } - - if (core->parent) - { - core->p_rate = core->parent->rate; - } - else - { - core->p_rate = 0; - } - - core->rate = rate; - - if (core->flags & CLK_IS_CRITICAL) - { - ret = clk_core_enable(core); - if (ret) - { - return ret; - } - } - - return 0; -} - -static int clk_core_populate_parent_map(struct clk_core *core, - const struct clk_init_data *init) -{ - u8 num_parents = init->num_parents; - const char *const *parent_names = init->parent_names; - const struct clk_hw **parent_hws = init->parent_hws; - const struct clk_parent_data *parent_data = init->parent_data; - int i, ret = 0; - struct clk_parent_map *parents, *parent; - - if (!num_parents) - { - return 0; - } - - /* - * Avoid unnecessary string look-ups of clk_core's possible parents by - * having a cache of names/clk_hw pointers to clk_core pointers. - */ - parents = (struct clk_parent_map *)malloc(num_parents * sizeof(*parents)); - core->parents = parents; - if (!parents) - { - return -1; - } - - memset(parents, 0, num_parents * sizeof(*parents)); - /* Copy everything over because it might be __initdata */ - for (i = 0, parent = parents; i < num_parents; i++, parent++) - { - parent->index = -1; - parent->core = NULL; - parent->hw = NULL; - parent->name = NULL; - parent->fw_name = NULL; - if (parent_names) - { - if (!parent_names[i]) - { - hal_log_err("invalid NULL in %s's .parent_names\n", core->name); - } - else - { - parent->name = parent_names[i]; - } - } - else if (parent_data) - { - parent->hw = parent_data[i].hw; - parent->index = parent_data[i].index; - if (parent_data[i].name) - { - parent->name = parent_data[i].name; - } - else - { - parent->name = parent_data[i].fw_name; - } - - } - else if (parent_hws) - { - parent->hw = parent_hws[i]; - } - else - { - ret = -1; - hal_log_err("Must specify parents if num_parents > 0\n"); - } - - if (ret) - { - core->parents = NULL; - free(parents); - return ret; - } - } - - return 0; -} - -#if 0 -static void clk_core_free_parent_map(struct clk_core *core) -{ - if (!core->num_parents) - { - return; - } - - free(core->parents); -} -#endif - -int clk_hw_register(struct clk_hw *hw) -{ - int ret = -1; - struct clk_core *core; - struct clk_init_data *init; - - if (!hw) - { - return 0; - } - - init = hw->init; - - core = (struct clk_core *)malloc(sizeof(*core)); - if (!core) - { - hal_log_err("out of memory\n"); - return -1; - } - - memset(core, 0, sizeof(*core)); - core->name = init->name; - core->num_parents = init->num_parents; - core->flags = init->flags; - core->hw = hw; - core->ops = hw->init->ops; - core->min_rate = 0; - core->max_rate = ULONG_MAX; - core->enable_count = 0; - - core->clk = (struct clk *)malloc(sizeof(struct clk)); - if (!core->clk) - { - hal_log_err("out of memory\n"); - goto fail_clk; - } - - memset(core->clk, 0, sizeof(struct clk)); - core->clk->core = core; - core->clk->name = core->name; - core->clk->count = 0; - - ret = clk_core_populate_parent_map(core, init); - if (ret) - { - goto fail_parents; - } - - ret = __clk_core_init(core); - - if (ret) - { - free(core); - return -1; - } - hw->core = core; - - list_add_tail(&core->node, &clk_root_list); - - return ret; - -fail_parents: - free(core->clk); - core->clk = NULL; - -fail_clk: - free(core); - core = NULL; - - return ret; -} - -int clk_hw_unregister(struct clk_hw *hw) -{ - struct clk_core *core; - - if (!hw || !hw->core) - { - return 0; - } - - list_for_each_entry(core, &clk_root_list, node) - { - if (core->hw->type != hw->type) - { - continue; - } - if (core->hw->id != hw->id) - { - continue; - } - list_del(&core->node); - free(core->clk); - free(core); - return 0; - } - - return 0; -} - -struct clk_core *clk_core_get(hal_clk_type_t type, hal_clk_id_t id) -{ - struct clk_core *core = NULL; - - list_for_each_entry(core, &clk_root_list, node) - { - if (core->hw->type != type) - { - continue; - } - if (core->hw->id != id) - { - continue; - } - - return core; - } - - return NULL; -} - -hal_clk_status_t clk_core_is_enabled(struct clk_core *core) -{ - /* - * .is_enabled is only mandatory for clocks that gate - * fall back to software usage counter if .is_enabled is missing - */ - if (!core->ops->is_enabled) - { - return !!core->enable_count; - } - - return core->ops->is_enabled(core->hw); -} - -hal_clk_status_t clk_core_enable(struct clk_core *core) -{ - int ret = 0; - - if (!core) - { - return 0; - } - - if (core->enable_count == 0) - { - ret = clk_core_enable(core->parent); - - if (ret) - { - return ret; - } - - if (core->ops->enable) - { - ret = core->ops->enable(core->hw); - } - - if (ret) - { - clk_core_disable(core->parent); - return ret; - } - } - - core->enable_count++; - return 0; -} - -hal_clk_status_t clk_core_disable(struct clk_core *core) -{ - if (!core) - { - return 0; - } - - if (core->enable_count == 0) - { - return 0; - } - - if (--core->enable_count > 0) - { - return 0; - } - - if (core->ops->disable) - { - core->ops->disable(core->hw); - } - -#ifndef NO_INFLUENCE_ON_CLOCK_SOURCE - clk_core_disable(core->parent); -#endif - - return 0; -} - -u32 clk_core_round_rate(struct clk_core *core, u32 rate) -{ - struct clk_rate_request req; - int ret; - - if (!core) - { - return 0; - } - - clk_core_get_boundaries(core, &req.min_rate, &req.max_rate); - req.rate = rate; - - ret = clk_core_round_rate_nolock(core, &req); - - if (ret) - { - return ret; - } - - return req.rate; -} - -u32 clk_core_recalc_rate(struct clk_core *core, struct clk_core *p_core) -{ - u32 p_rate = 0; - - if (!core) - { - return 0; - } - - if (!p_core) - { - return core->rate; - } - - clk_core_recalc_rate(p_core, p_core->parent); - - p_rate = p_core->rate; - if (core->ops->recalc_rate) - { - core->rate = core->ops->recalc_rate(core->hw, p_rate); - } - - return core->rate; -} - -u32 clk_core_get_rate(struct clk_core *core) -{ - if (!core) - { - return 0; - } - - core->parent = __clk_init_parent(core); - - return clk_core_recalc_rate(core, core->parent); -} - -u32 clk_hw_get_rate(const struct clk_hw *hw) -{ - return clk_core_get_rate(hw->core); -} - -hal_clk_status_t clk_core_set_rate(struct clk_core *core, struct clk_core *p_core, unsigned long rate) -{ - u8 ret = -1; - - if (!core || !p_core) - { - hal_log_err("core or p_core is NULL\n"); - return ret; - } - - if (core->ops->set_rate) - { - if (core->enable_count >= 2) - printf("Warning: clk %s should not be changed, please recheck whether the operation is correct\n", core->name); - ret = core->ops->set_rate(core->hw, rate, p_core->rate); - } - - if (ret) - { - return ret; - } - - core->rate = rate; - return ret; -} - -hal_clk_status_t clk_hw_set_rate(struct clk_hw *hw, unsigned long rate) -{ - struct clk_core *core, *p_core; - core = clk_hw_get_core(hw); - p_core = clk_core_get_parent(core); - - return clk_core_set_rate(core, p_core, rate); -} - - -static int __clk_set_parent(struct clk_core *core, struct clk_core *parent, - u8 p_index) -{ - int ret = 0; - - /* change clock input source */ - if (parent && core->ops->set_parent) - { - ret = core->ops->set_parent(core->hw, p_index); - } - - return ret; -} - -static int clk_fetch_parent_index(struct clk_core *core, - struct clk_core *parent) -{ - int i; - - if (!parent) - { - return -1; - } - - for (i = 0; i < core->num_parents; i++) - { - /* Found it first try! */ - if (core->parents[i].core) - { - if (core->parents[i].core == parent) - { - return i; - } - } - - /* Something else is here, so keep looking */ - if (core->parents[i].core) - { - continue; - } - - /* Maybe core hasn't been cached but the hw is all we know? */ - if (core->parents[i].hw) - { - if (core->parents[i].hw == parent->hw) - { - break; - } - - /* Didn't match, but we're expecting a clk_hw */ - continue; - } - - /* Fallback to comparing globally unique names */ - if (core->parents[i].name && - !strcmp(parent->name, core->parents[i].name)) - { - break; - } - } - - if (i == core->num_parents) - { - return -1; - } - - core->parents[i].core = parent; - return i; -} - -struct clk_core *clk_core_get_parent(struct clk_core *core) -{ - if (!core) - { - return NULL; - } - - /* Ensure synchronization in case of multiple cores */ - core->parent = __clk_init_parent(core); - - return core->parent; -} - -hal_clk_status_t clk_core_set_parent(struct clk_core *core, struct clk_core *parent) -{ - int ret = 0; - int p_index = 0; - uint32_t p_rate = 0; - - if (!core) - { - return 0; - } - -#if 0 - if (core->parent == parent) - { - return 0; - } -#endif - - /* verify ops for for multi-parent clks */ - if ((core->num_parents > 1) && (!core->ops->set_parent)) - { - ret = -1; - goto out; - } - - /* try finding the new parent index */ - if (parent) - { - p_index = clk_fetch_parent_index(core, parent); - if (p_index < 0) - { - printf("%s: clk %s can not be parent of clk %s\n", - __func__, parent->name, core->name); - ret = p_index; - goto out; - } - p_rate = parent->rate; - } - - /* do the re-parent */ - ret = __clk_set_parent(core, parent, p_index); - - /* propagate rate an accuracy recalculation accordingly */ - if (!ret) - { - core->parent = parent; - core->p_rate = p_rate; - core->rate = clk_core_recalc_rate(core, parent); - } - -out: - return ret; -} - diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu.h deleted file mode 100644 index 018302e156a6f9dd5018154413b9764b8d40af11..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu.h +++ /dev/null @@ -1,836 +0,0 @@ -/* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. - * - * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in - *the the People's Republic of China and other countries. - * All Allwinner Technology Co.,Ltd. trademarks are used with permission. - * - * DISCLAIMER - * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. - * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) - * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN - * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. - * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS - * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. - * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. - * - * - * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT - * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING - * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE - * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __CCU_H__ -#define __CCU_H__ - -#include -#include -#include -#include -#include -#include - -struct clk; -struct clk_hw; -struct clk_core; -struct clk_ops; - -#undef BIT -#define BIT(x) (1 << (x)) - -#define BITS_PER_LONGS 32 - -#ifndef GENMASK -#define GENMASK(h, l) \ - (((~(0)) - ((1) << (l)) + 1) & \ - (0x00ffffffff >> (BITS_PER_LONGS - 1 - (h)))) -#endif - -#define DIV_ROUND_UP_ULL(n, d) (((n) + (d) - 1) / (d)) -/* - * flags used across common struct clk. these flags should only affect the - * top-level framework. custom flags for dealing with hardware specifics - * belong in struct clk_foo - * - * Please update clk_flags[] in drivers/clk/clk.c when making changes here! - */ -#define CLK_SET_RATE_GATE BIT(0) /* must be gated across rate change */ -#define CLK_SET_PARENT_GATE BIT(1) /* must be gated across re-parent */ -#define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */ -#define CLK_IGNORE_UNUSED BIT(3) /* do not gate even if unused */ -/* unused */ -/* unused */ -#define CLK_GET_RATE_NOCACHE BIT(6) /* do not use the cached clk rate */ -#define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */ -#define CLK_GET_ACCURACY_NOCACHE BIT(8) /* do not use the cached clk accuracy */ -#define CLK_RECALC_NEW_RATES BIT(9) /* recalc rates after notifications */ -#define CLK_SET_RATE_UNGATE BIT(10) /* clock needs to run to set rate */ -#define CLK_IS_CRITICAL BIT(11) /* do not gate, ever */ -/* parents need enable during gate/ungate, set rate and re-parent */ -#define CLK_OPS_PARENT_ENABLE BIT(12) -/* duty cycle call may be forwarded to the parent clock */ -#define CLK_DUTY_CYCLE_PARENT BIT(13) -#define CLK_DONT_HOLD_STATE BIT(14) /* Don't hold state */ - -/** - * struct clk_duty - Struture encoding the duty cycle ratio of a clock - * - * @num: Numerator of the duty cycle ratio - * @den: Denominator of the duty cycle ratio - */ -struct clk_duty -{ - unsigned int num; - unsigned int den; -}; - - -struct clk_parent_map -{ - const struct clk_hw *hw; - struct clk_core *core; - const char *fw_name; - const char *name; - int index; -}; - -struct clk_core -{ - const char *name; - const struct clk_ops *ops; - struct clk_hw *hw; - struct clk *clk; - struct clk_core *parent; - struct clk_parent_map *parents; - u8 num_parents; - u32 p_rate; - unsigned long rate; - unsigned long flags; - unsigned int enable_count; - unsigned long min_rate; - unsigned long max_rate; - unsigned long accuracy; - struct list_head node; -}; - -struct clk -{ - struct clk_core *core; - const char *name; - u8 count; //the number that clk_get -}; - -/** - * struct clk_rate_request - Structure encoding the clk constraints that - * a clock user might require. - * - * @rate: Requested clock rate. This field will be adjusted by - * clock drivers according to hardware capabilities. - * @min_rate: Minimum rate imposed by clk users. - * @max_rate: Maximum rate imposed by clk users. - * @best_parent_rate: The best parent rate a parent can provide to fulfill the - * requested constraints. - * @best_parent_hw: The most appropriate parent clock that fulfills the - * requested constraints. - * - */ -struct clk_rate_request -{ - unsigned long rate; - unsigned long min_rate; - unsigned long max_rate; - unsigned long best_parent_rate; - struct clk_hw *best_parent_hw; -}; - -/** - * struct clk_ops - Callback operations for hardware clocks; these are to - * be provided by the clock implementation, and will be called by drivers - * through the clk_* api. - * - * @prepare: Prepare the clock for enabling. This must not return until - * the clock is fully prepared, and it's safe to call clk_enable. - * This callback is intended to allow clock implementations to - * do any initialisation that may sleep. Called with - * prepare_lock held. - * - * @unprepare: Release the clock from its prepared state. This will typically - * undo any work done in the @prepare callback. Called with - * prepare_lock held. - * - * @is_prepared: Queries the hardware to determine if the clock is prepared. - * This function is allowed to sleep. Optional, if this op is not - * set then the prepare count will be used. - * - * @unprepare_unused: Unprepare the clock atomically. Only called from - * clk_disable_unused for prepare clocks with special needs. - * Called with prepare mutex held. This function may sleep. - * - * @enable: Enable the clock atomically. This must not return until the - * clock is generating a valid clock signal, usable by consumer - * devices. Called with enable_lock held. This function must not - * sleep. - * - * @disable: Disable the clock atomically. Called with enable_lock held. - * This function must not sleep. - * - * @is_enabled: Queries the hardware to determine if the clock is enabled. - * This function must not sleep. Optional, if this op is not - * set then the enable count will be used. - * - * @disable_unused: Disable the clock atomically. Only called from - * clk_disable_unused for gate clocks with special needs. - * Called with enable_lock held. This function must not - * sleep. - * - * @save_context: Save the context of the clock in prepration for poweroff. - * - * @restore_context: Restore the context of the clock after a restoration - * of power. - * - * @recalc_rate Recalculate the rate of this clock, by querying hardware. The - * parent rate is an input parameter. It is up to the caller to - * ensure that the prepare_mutex is held across this call. - * Returns the calculated rate. Optional, but recommended - if - * this op is not set then clock rate will be initialized to 0. - * - * @round_rate: Given a target rate as input, returns the closest rate actually - * supported by the clock. The parent rate is an input/output - * parameter. - * - * @determine_rate: Given a target rate as input, returns the closest rate - * actually supported by the clock, and optionally the parent clock - * that should be used to provide the clock rate. - * - * @set_parent: Change the input source of this clock; for clocks with multiple - * possible parents specify a new parent by passing in the index - * as a u8 corresponding to the parent in either the .parent_names - * or .parents arrays. This function in affect translates an - * array index into the value programmed into the hardware. - * Returns 0 on success, -EERROR otherwise. - * - * @get_parent: Queries the hardware to determine the parent of a clock. The - * return value is a u8 which specifies the index corresponding to - * the parent clock. This index can be applied to either the - * .parent_names or .parents arrays. In short, this function - * translates the parent value read from hardware into an array - * index. Currently only called when the clock is initialized by - * __clk_init. This callback is mandatory for clocks with - * multiple parents. It is optional (and unnecessary) for clocks - * with 0 or 1 parents. - * - * @set_rate: Change the rate of this clock. The requested rate is specified - * by the second argument, which should typically be the return - * of .round_rate call. The third argument gives the parent rate - * which is likely helpful for most .set_rate implementation. - * Returns 0 on success, -EERROR otherwise. - * - * @set_rate_and_parent: Change the rate and the parent of this clock. The - * requested rate is specified by the second argument, which - * should typically be the return of .round_rate call. The - * third argument gives the parent rate which is likely helpful - * for most .set_rate_and_parent implementation. The fourth - * argument gives the parent index. This callback is optional (and - * unnecessary) for clocks with 0 or 1 parents as well as - * for clocks that can tolerate switching the rate and the parent - * separately via calls to .set_parent and .set_rate. - * Returns 0 on success, -EERROR otherwise. - * - * @recalc_accuracy: Recalculate the accuracy of this clock. The clock accuracy - * is expressed in ppb (parts per billion). The parent accuracy is - * an input parameter. - * Returns the calculated accuracy. Optional - if this op is not - * set then clock accuracy will be initialized to parent accuracy - * or 0 (perfect clock) if clock has no parent. - * - * @get_phase: Queries the hardware to get the current phase of a clock. - * Returned values are 0-359 degrees on success, negative - * error codes on failure. - * - * @set_phase: Shift the phase this clock signal in degrees specified - * by the second argument. Valid values for degrees are - * 0-359. Return 0 on success, otherwise -EERROR. - * - * @get_duty_cycle: Queries the hardware to get the current duty cycle ratio - * of a clock. Returned values denominator cannot be 0 and must be - * superior or equal to the numerator. - * - * @set_duty_cycle: Apply the duty cycle ratio to this clock signal specified by - * the numerator (2nd argurment) and denominator (3rd argument). - * Argument must be a valid ratio (denominator > 0 - * and >= numerator) Return 0 on success, otherwise -EERROR. - * - * @init: Perform platform-specific initialization magic. - * This is not not used by any of the basic clock types. - * Please consider other ways of solving initialization problems - * before using this callback, as its use is discouraged. - * - * @debug_init: Set up type-specific debugfs entries for this clock. This - * is called once, after the debugfs directory entry for this - * clock has been created. The dentry pointer representing that - * directory is provided as an argument. Called with - * prepare_lock held. Returns 0 on success, -EERROR otherwise. - * - * @pre_rate_change: Optional callback for a clock to fulfill its rate - * change requirements before any rate change has occurred in - * its clock tree. Returns 0 on success, -EERROR otherwise. - * - * @post_rate_change: Optional callback for a clock to clean up any - * requirements that were needed while the clock and its tree - * was changing states. Returns 0 on success, -EERROR otherwise. - * - * The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow - * implementations to split any work between atomic (enable) and sleepable - * (prepare) contexts. If enabling a clock requires code that might sleep, - * this must be done in clk_prepare. Clock enable code that will never be - * called in a sleepable context may be implemented in clk_enable. - * - * Typically, drivers will call clk_prepare when a clock may be needed later - * (eg. when a device is opened), and clk_enable when the clock is actually - * required (eg. from an interrupt). Note that clk_prepare MUST have been - * called before clk_enable. - */ -struct clk_ops -{ - int (*prepare)(struct clk_hw *hw); - void (*unprepare)(struct clk_hw *hw); - int (*is_prepared)(struct clk_hw *hw); - void (*unprepare_unused)(struct clk_hw *hw); - int (*enable)(struct clk_hw *hw); - void (*disable)(struct clk_hw *hw); - int (*is_enabled)(struct clk_hw *hw); - void (*disable_unused)(struct clk_hw *hw); - unsigned long (*recalc_rate)(struct clk_hw *hw, - unsigned long parent_rate); - long (*round_rate)(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate); - int (*determine_rate)(struct clk_hw *hw, - struct clk_rate_request *req); - int (*set_parent)(struct clk_hw *hw, u8 index); - u8(*get_parent)(struct clk_hw *hw); - int (*set_rate)(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate); - int (*set_rate_and_parent)(struct clk_hw *hw, - unsigned long rate, - unsigned long parent_rate, u8 index); - unsigned long (*recalc_accuracy)(struct clk_hw *hw, - unsigned long parent_accuracy); - void (*init)(struct clk_hw *hw); -}; - -/** - * struct clk_init_data - holds init data that's common to all clocks and is - * shared between the clock provider and the common clock framework. - * - * @name: clock name - * @ops: operations this clock supports - * @parent_names: array of string names for all possible parents - * @parent_data: array of parent data for all possible parents (when some - * parents are external to the clk controller) - * @parent_hws: array of pointers to all possible parents (when all parents - * are internal to the clk controller) - * @num_parents: number of possible parents - * @flags: framework-level hints and quirks - */ -struct clk_init_data -{ - const char *name; - const struct clk_ops *ops; - /* Only one of the following three should be assigned */ - const char *const *parent_names; - const struct clk_parent_data *parent_data; - const struct clk_hw **parent_hws; - u8 num_parents; - unsigned long flags; -}; - -/** - * struct clk_hw - handle for traversing from a struct clk to its corresponding - * hardware-specific structure. struct clk_hw should be declared within struct - * clk_foo and then referenced by the struct clk instance that uses struct - * clk_foo's clk_ops - * - * @core: pointer to the struct clk_core instance that points back to this - * struct clk_hw instance - * - * @clk: pointer to the per-user struct clk instance that can be used to call - * into the clk API - * - * @init: pointer to struct clk_init_data that contains the init data shared - * with the common clock framework. This pointer will be set to NULL once - * a clk_register() variant is called on this clk_hw pointer. - */ -struct clk_hw -{ - struct clk_core *core; - hal_clk_id_t id; - hal_clk_type_t type; - struct clk_init_data *init; -}; - -/** - * struct clk_parent_data - clk parent information - * @hw: parent clk_hw pointer (used for clk providers with internal clks) - * @fw_name: parent name local to provider registering clk - * @name: globally unique parent name (used as a fallback) - * @index: parent index local to provider registering clk (if @fw_name absent) - */ -struct clk_parent_data -{ - const struct clk_hw *hw; - const char *fw_name; - const char *name; - int index; -}; - -/** - * struct clk_fixed_rate - fixed-rate clock - * @hw: handle between common and hardware-specific interfaces - * @fixed_rate: constant frequency of clock - */ -struct clk_fixed_rate -{ - struct clk_hw hw; - unsigned long fixed_rate; - unsigned long fixed_accuracy; -}; - -#define to_clk_fixed_rate(_hw) container_of(_hw, struct clk_fixed_rate, hw) -/** - * struct clk_gate - gating clock - * - * @hw: handle between common and hardware-specific interfaces - * @reg: register controlling gate - * @bit_idx: single bit controlling gate - * @flags: hardware-specific flags - * @lock: register lock - * - * Clock which can gate its output. Implements .enable & .disable - * - * Flags: - * CLK_GATE_SET_TO_DISABLE - by default this clock sets the bit at bit_idx to - * enable the clock. Setting this flag does the opposite: setting the bit - * disable the clock and clearing it enables the clock - * CLK_GATE_HIWORD_MASK - The gate settings are only in lower 16-bit - * of this register, and mask of gate bits are in higher 16-bit of this - * register. While setting the gate bits, higher 16-bit should also be - * updated to indicate changing gate bits. - * CLK_GATE_BIG_ENDIAN - by default little endian register accesses are used for - * the gate register. Setting this flag makes the register accesses big - * endian. - */ -struct clk_gate -{ - struct clk_hw hw; - u32 reg; - u8 bit_idx; - u8 flags; -}; - -#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw) - -struct clk_div_table -{ - unsigned int val; - unsigned int div; -}; - -/** - * struct clk_divider - adjustable divider clock - * - * @hw: handle between common and hardware-specific interfaces - * @reg: register containing the divider - * @shift: shift to the divider bit field - * @width: width of the divider bit field - * @table: array of value/divider pairs, last entry should have div = 0 - * @lock: register lock - * - * Clock with an adjustable divider affecting its output frequency. Implements - * .recalc_rate, .set_rate and .round_rate - * - * Flags: - * CLK_DIVIDER_ONE_BASED - by default the divisor is the value read from the - * register plus one. If CLK_DIVIDER_ONE_BASED is set then the divider is - * the raw value read from the register, with the value of zero considered - * invalid, unless CLK_DIVIDER_ALLOW_ZERO is set. - * CLK_DIVIDER_POWER_OF_TWO - clock divisor is 2 raised to the value read from - * the hardware register - * CLK_DIVIDER_ALLOW_ZERO - Allow zero divisors. For dividers which have - * CLK_DIVIDER_ONE_BASED set, it is possible to end up with a zero divisor. - * Some hardware implementations gracefully handle this case and allow a - * zero divisor by not modifying their input clock - * (divide by one / bypass). - * CLK_DIVIDER_HIWORD_MASK - The divider settings are only in lower 16-bit - * of this register, and mask of divider bits are in higher 16-bit of this - * register. While setting the divider bits, higher 16-bit should also be - * updated to indicate changing divider bits. - * CLK_DIVIDER_ROUND_CLOSEST - Makes the best calculated divider to be rounded - * to the closest integer instead of the up one. - * CLK_DIVIDER_READ_ONLY - The divider settings are preconfigured and should - * not be changed by the clock framework. - * CLK_DIVIDER_MAX_AT_ZERO - For dividers which are like CLK_DIVIDER_ONE_BASED - * except when the value read from the register is zero, the divisor is - * 2^width of the field. - * CLK_DIVIDER_BIG_ENDIAN - By default little endian register accesses are used - * for the divider register. Setting this flag makes the register accesses - * big endian. - */ -struct clk_divider -{ - struct clk_hw hw; - unsigned long reg; - u8 shift; - u8 width; - u8 flags; - hal_spinlock_t lock; - const struct clk_div_table *table; -}; - -extern const struct clk_ops clk_divider_ops; -extern const struct clk_ops clk_divider_ro_ops; - -#define CLK_DIVIDER_ONE_BASED BIT(0) -#define CLK_DIVIDER_POWER_OF_TWO BIT(1) -#define CLK_DIVIDER_ALLOW_ZERO BIT(2) -#define CLK_DIVIDER_HIWORD_MASK BIT(3) -#define CLK_DIVIDER_ROUND_CLOSEST BIT(4) -#define CLK_DIVIDER_READ_ONLY BIT(5) -#define CLK_DIVIDER_MAX_AT_ZERO BIT(6) -#define CLK_DIVIDER_BIG_ENDIAN BIT(7) - -unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate, - unsigned int val, const struct clk_div_table *table, - unsigned long flags, unsigned long width); -long divider_ro_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent, - unsigned long rate, unsigned long *prate, - const struct clk_div_table *table, u8 width, - unsigned long flags, unsigned int val); -long divider_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent, - unsigned long rate, unsigned long *prate, - const struct clk_div_table *table, - u8 width, unsigned long flags); - -int divider_get_val(unsigned long rate, unsigned long parent_rate, - const struct clk_div_table *table, u8 width, - unsigned long flags); - -#define clk_div_mask(width) ((1 << (width)) - 1) -#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw) - -struct clk_hw *clk_hw_register_divider(const char *name, - const char *parent_name, unsigned long flags, - u32 reg, u8 shift, u8 width, - u8 clk_divider_flags, hal_spinlock_t lock); -struct clk_hw *clk_hw_register_divider_table(const char *name, - const char *parent_name, unsigned long flags, - u32 reg, u8 shift, u8 width, - u8 clk_divider_flags, const struct clk_div_table *table, - hal_spinlock_t lock); -void clk_unregister_divider(struct clk *clk); -void clk_hw_unregister_divider(struct clk_hw *hw); - -/** - * struct clk_mux - multiplexer clock - * - * @hw: handle between common and hardware-specific interfaces - * @reg: register controlling multiplexer - * @table: array of register values corresponding to the parent index - * @shift: shift to multiplexer bit field - * @mask: mask of mutliplexer bit field - * @flags: hardware-specific flags - * @lock: register lock - * - * Clock with multiple selectable parents. Implements .get_parent, .set_parent - * and .recalc_rate - * - * Flags: - * CLK_MUX_INDEX_ONE - register index starts at 1, not 0 - * CLK_MUX_INDEX_BIT - register index is a single bit (power of two) - * CLK_MUX_HIWORD_MASK - The mux settings are only in lower 16-bit of this - * register, and mask of mux bits are in higher 16-bit of this register. - * While setting the mux bits, higher 16-bit should also be updated to - * indicate changing mux bits. - * CLK_MUX_READ_ONLY - The mux registers can't be written, only read in the - * .get_parent clk_op. - * CLK_MUX_ROUND_CLOSEST - Use the parent rate that is closest to the desired - * frequency. - * CLK_MUX_BIG_ENDIAN - By default little endian register accesses are used for - * the mux register. Setting this flag makes the register accesses big - * endian. - */ -struct clk_mux -{ - struct clk_hw hw; - u32 reg; - u32 *table; - u32 mask; - u8 shift; - u8 flags; -}; - -#define to_clk_mux(_hw) container_of(_hw, struct clk_mux, hw) - -#define CLK_MUX_INDEX_ONE BIT(0) -#define CLK_MUX_INDEX_BIT BIT(1) -#define CLK_MUX_HIWORD_MASK BIT(2) -#define CLK_MUX_READ_ONLY BIT(3) /* mux can't be changed */ -#define CLK_MUX_ROUND_CLOSEST BIT(4) -#define CLK_MUX_BIG_ENDIAN BIT(5) - -extern const struct clk_ops clk_mux_ops; -extern const struct clk_ops clk_mux_ro_ops; - -/** - * struct clk_fixed_factor - fixed multiplier and divider clock - * - * @hw: handle between common and hardware-specific interfaces - * @mult: multiplier - * @div: divider - * - * Clock with a fixed multiplier and divider. The output frequency is the - * parent clock rate divided by div and multiplied by mult. - * Implements .recalc_rate, .set_rate and .round_rate - */ - -struct clk_fixed_factor -{ - struct clk_hw hw; - unsigned int mult; - unsigned int div; -}; - -#define to_clk_fixed_factor(_hw) container_of(_hw, struct clk_fixed_factor, hw) - -extern const struct clk_ops clk_fixed_factor_ops; - -#define CLK_OF_DECLARE(name, compat, fn) OF_DECLARE_1(clk, name, compat, fn) - -/* - * Use this macro when you have a driver that requires two initialization - * routines, one at of_clk_init(), and one at platform device probe - */ -#define CLK_OF_DECLARE_DRIVER(name, compat, fn) \ - static void __init name##_of_clk_init_driver(struct device_node *np) \ - { \ - of_node_clear_flag(np, OF_POPULATED); \ - fn(np); \ - } \ - OF_DECLARE_1(clk, name, compat, name##_of_clk_init_driver) - -#define CLK_HW_INIT(_name, _parent, _ops, _flags) \ - (&(struct clk_init_data) { \ - .flags = _flags, \ - .name = _name, \ - .parent_names = (const char *[]) { _parent }, \ - .num_parents = 1, \ - .ops = _ops, \ - }) - -#define CLK_HW_INIT_HW(_name, _parent, _ops, _flags) \ - (&(struct clk_init_data) { \ - .flags = _flags, \ - .name = _name, \ - .parent_hws = (const struct clk_hw*[]) { _parent }, \ - .num_parents = 1, \ - .ops = _ops, \ - }) - -/* - * This macro is intended for drivers to be able to share the otherwise - * individual struct clk_hw[] compound literals created by the compiler - * when using CLK_HW_INIT_HW. It does NOT support multiple parents. - */ -#define CLK_HW_INIT_HWS(_name, _parent, _ops, _flags) \ - (&(struct clk_init_data) { \ - .flags = _flags, \ - .name = _name, \ - .parent_hws = _parent, \ - .num_parents = 1, \ - .ops = _ops, \ - }) - -#define CLK_HW_INIT_FW_NAME(_name, _parent, _ops, _flags) \ - (&(struct clk_init_data) { \ - .flags = _flags, \ - .name = _name, \ - .parent_data = (const struct clk_parent_data[]) { \ - { .fw_name = _parent }, \ - }, \ - .num_parents = 1, \ - .ops = _ops, \ - }) - -#define CLK_HW_INIT_PARENTS(_name, _parents, _ops, _flags) \ - (&(struct clk_init_data) { \ - .flags = _flags, \ - .name = _name, \ - .parent_names = _parents, \ - .num_parents = ARRAY_SIZE(_parents), \ - .ops = _ops, \ - }) - -#define CLK_HW_INIT_PARENTS_HW(_name, _parents, _ops, _flags) \ - (&(struct clk_init_data) { \ - .flags = _flags, \ - .name = _name, \ - .parent_hws = _parents, \ - .num_parents = ARRAY_SIZE(_parents), \ - .ops = _ops, \ - }) - -#define CLK_HW_INIT_PARENTS_DATA(_name, _parents, _ops, _flags) \ - (&(struct clk_init_data) { \ - .flags = _flags, \ - .name = _name, \ - .parent_data = _parents, \ - .num_parents = ARRAY_SIZE(_parents), \ - .ops = _ops, \ - }) - -#define CLK_HW_INIT_NO_PARENT(_name, _ops, _flags) \ - (&(struct clk_init_data) { \ - .flags = _flags, \ - .name = _name, \ - .parent_names = NULL, \ - .num_parents = 0, \ - .ops = _ops, \ - }) - -#define CLK_FIXED_FACTOR(_struct, _name, _parent, \ - _div, _mult, _flags) \ -struct clk_fixed_factor _struct = { \ - .div = _div, \ - .mult = _mult, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &clk_fixed_factor_ops, \ - _flags), \ -} - -#define CLK_FIXED_FACTOR_HW(_struct, _name, _parent, \ - _div, _mult, _flags) \ -struct clk_fixed_factor _struct = { \ - .div = _div, \ - .mult = _mult, \ - .hw.init = CLK_HW_INIT_HW(_name, \ - _parent, \ - &clk_fixed_factor_ops, \ - _flags), \ -} - -/* - * This macro allows the driver to reuse the _parent array for multiple - * fixed factor clk declarations. - */ -#define CLK_FIXED_FACTOR_HWS(_struct, _name, _parent, \ - _div, _mult, _flags) \ -struct clk_fixed_factor _struct = { \ - .div = _div, \ - .mult = _mult, \ - .hw.init = CLK_HW_INIT_HWS(_name, \ - _parent, \ - &clk_fixed_factor_ops, \ - _flags), \ -} - -#define CLK_FIXED_FACTOR_FW_NAME(_struct, _name, _parent, \ - _div, _mult, _flags) \ -struct clk_fixed_factor _struct = { \ - .div = _div, \ - .mult = _mult, \ - .hw.init = CLK_HW_INIT_FW_NAME(_name, \ - _parent, \ - &clk_fixed_factor_ops, \ - _flags), \ -} - -const char *clk_hw_get_name(const struct clk_hw *hw); -u32 clk_hw_get_rate(const struct clk_hw *hw); -unsigned long clk_hw_get_flags(const struct clk_hw *hw); -struct clk_core *clk_hw_get_core(const struct clk_hw *hw); -#define clk_hw_can_set_rate_parent(hw) \ - (clk_hw_get_flags((hw)) & CLK_SET_RATE_PARENT) - -/* -* FIXME clock api without lock protection -*/ -unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate); - -struct clk_hw_onecell_data -{ - unsigned int num; - struct clk_hw *hws[]; -}; - -#define CLK_OF_DECLARE(name, compat, fn) OF_DECLARE_1(clk, name, compat, fn) - -unsigned int clk_hw_get_num_parents(const struct clk_hw *hw); -struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw); -struct clk_hw *clk_hw_get_parent_by_index(const struct clk_hw *hw, - unsigned int index); - -static inline long divider_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate, - const struct clk_div_table *table, - u8 width, unsigned long flags) -{ - return divider_round_rate_parent(hw, clk_hw_get_parent(hw), - rate, prate, table, width, flags); -} - -static inline long divider_ro_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate, - const struct clk_div_table *table, - u8 width, unsigned long flags, - unsigned int val) -{ - return divider_ro_round_rate_parent(hw, clk_hw_get_parent(hw), - rate, prate, table, width, flags, - val); -} - -int __clk_determine_rate(struct clk_hw *core, struct clk_rate_request *req); -int __clk_mux_determine_rate(struct clk_hw *hw, - struct clk_rate_request *req); - -int hw_clks_register(struct clk_hw_onecell_data *hw_clock_clks); - -int hw_clks_init(struct clk_hw *hw); - -int clk_hw_register(struct clk_hw *hw); - -int clk_hw_unregister(struct clk_hw *hw); - -hal_clk_status_t clk_hw_set_rate(struct clk_hw *hw, unsigned long rate); - -struct clk_core *clk_core_get(hal_clk_type_t type, hal_clk_id_t id); - -hal_clk_status_t clk_core_is_enabled(struct clk_core *core); - -hal_clk_status_t clk_core_enable(struct clk_core *core); - -hal_clk_status_t clk_core_disable(struct clk_core *core); - -struct clk_core *clk_core_get_parent(struct clk_core *core); - -hal_clk_status_t clk_core_set_parent(struct clk_core *core, struct clk_core *parent); - -u32 clk_core_get_rate(struct clk_core *core); - -hal_clk_status_t clk_core_set_rate(struct clk_core *core, struct clk_core *p_core, unsigned long rate); - -u32 clk_core_recalc_rate(struct clk_core *core, struct clk_core *p_core); - -u32 clk_core_round_rate(struct clk_core *core, u32 rate); - -#endif /* __HAL_CLOCK_H__ */ - diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_common.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_common.c deleted file mode 100644 index 96b16dcc66bd87a3badfdf40f3bcbaef4f8a669d..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_common.c +++ /dev/null @@ -1,290 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright 2016 Maxime Ripard - * - * Maxime Ripard - */ -#include "ccu.h" -#include "ccu_common.h" -#include "ccu_gate.h" -#include "ccu_reset.h" -#include -#include -#include -#ifdef CONFIG_COMPONENTS_PM -#include -#endif - - -/* FIXME: use udelay provided by OS */ -static void __clk_udelay(u32 ns) -{ - u32 i; - ns *= 100; - for (i = 0; i < ns; i ++) - { - ; - } -} - -void ccu_helper_wait_for_lock(struct ccu_common *common, u32 lock) -{ - unsigned long addr; - u32 reg, loop = 5000; - - if (!lock) - { - return; - } - - if (common->features & CCU_FEATURE_LOCK_REG) - { - addr = common->base + common->lock_reg; - } - else - { - addr = common->base + common->reg; - } - - while (--loop) - { - reg = readl(addr); - if (reg & lock) - { - __clk_udelay(20); - break; - } - __clk_udelay(1); - } - if (!loop) - { - hal_log_warn("ccu wait for lock failed\n"); - } -} - -int ccu_common_init(unsigned long reg, const struct sunxi_ccu_desc *desc) -{ - struct ccu_reset *reset; - int i; - int ret; - - if (!desc) - { - return 0; - } - - for (i = 0; i < desc->num_ccu_clks; i++) - { - struct ccu_common *cclk = desc->ccu_clks[i]; - - if (!cclk) - { - continue; - } - - cclk->base = reg; - } - - for (i = 0; i < desc->hw_clks->num; i++) - { - struct clk_hw *hw = desc->hw_clks->hws[i]; - const char *name; - - if (!hw) - { - continue; - } - - name = hw->init->name; - hw->type = desc->clk_type; - hw->id = i; - ret = clk_hw_register(hw); - if (ret) - { - printf("Couldn't register clock %d - %s\n", i, name); - goto err_clk_unreg; - } - - } - - reset = (struct ccu_reset *)malloc(sizeof(*reset)); - if (!reset) - { - hal_log_err("can't malloc reset struct!\n"); - ret = -1; - goto err_clk_unreg; - } - - memset(reset, 0, sizeof(*reset)); - reset->base = reg; - reset->reset_map = desc->resets; - reset->rcdev.ops = &ccu_reset_ops; - reset->rcdev.type = desc->reset_type; - reset->rcdev.nr_resets = desc->num_resets; - - ret = reset_control_register(&reset->rcdev); - if (ret) - { - goto err_rst_unreg; - } - - return ret; - -err_rst_unreg: - - free(reset); - -err_clk_unreg: - while (i-- >= 0) - { - struct clk_hw *hw = desc->hw_clks->hws[i]; - - clk_hw_unregister(hw); - } - - return ret; -} - -void set_reg(unsigned long addr, u32 val, u8 bw, u8 bs) -{ - u32 mask = (1UL << bw) - 1UL; - u32 tmp = 0; - - tmp = readl(addr); - tmp &= ~(mask << bs); - - writel(tmp | ((val & mask) << bs), addr); -} - -void set_reg_key(unsigned long addr, - u32 key, u8 kbw, u8 kbs, - u32 val, u8 bw, u8 bs) -{ - u32 mask = (1UL << bw) - 1UL; - u32 kmask = (1UL << kbw) - 1UL; - u32 tmp = 0; - - tmp = readl(addr); - tmp &= ~(mask << bs); - - writel(tmp | ((val & mask) << bs) | ((key & kmask) << kbs), addr); -} - -#ifdef CONFIG_COMPONENTS_PM - -static LIST_HEAD(ccu_reg_cache_list); - -struct sunxi_clock_reg_cache { - struct list_head node; - void *reg_base; - struct ccu_reg_dump *rdump; - unsigned int rd_num; - const struct ccu_reg_dump *rsuspend; - unsigned int rsuspend_num; -}; - -static void ccu_save(void *base, struct ccu_reg_dump *rd, - unsigned int num_regs) -{ - for (; num_regs > 0; --num_regs, ++rd) - rd->value = readl(base + rd->offset); -} - -static void ccu_restore(void *base, - const struct ccu_reg_dump *rd, - unsigned int num_regs) -{ - for (; num_regs > 0; --num_regs, ++rd) - writel(rd->value, base + rd->offset); -} - -static struct ccu_reg_dump *ccu_alloc_reg_dump(struct ccu_common **rdump, - unsigned long nr_rdump) -{ - struct ccu_reg_dump *rd; - unsigned int i; - - rd = malloc(nr_rdump * sizeof(*rd)); - if (!rd) - return NULL; - memset(rd, 0, sizeof(*rd)); - for (i = 0; i < nr_rdump; ++i) { - struct ccu_common *ccu_clks = rdump[i]; - - rd[i].offset = ccu_clks->reg; - } - - return rd; -} - -int ccu_suspend(void *data, suspend_mode_t mode) -{ - struct sunxi_clock_reg_cache *reg_cache; - - list_for_each_entry(reg_cache, &ccu_reg_cache_list, node) { - ccu_save(reg_cache->reg_base, reg_cache->rdump, - reg_cache->rd_num); - ccu_restore(reg_cache->reg_base, reg_cache->rsuspend, - reg_cache->rsuspend_num); - } - printf("ccmu suspend end\n"); - return 0; -} - -void ccu_resume(void *data, suspend_mode_t mode) -{ - struct sunxi_clock_reg_cache *reg_cache; - - list_for_each_entry(reg_cache, &ccu_reg_cache_list, node) - ccu_restore(reg_cache->reg_base, reg_cache->rdump, - reg_cache->rd_num); - printf("ccmu resume end\n"); -} - -static struct syscore_ops ccmu_syscore_ops = { - .name = "ccmu_syscore", - .suspend = ccu_suspend, - .resume = ccu_resume, - .common_syscore = COMMON_SYSCORE, -}; - -void sunxi_ccu_sleep_init(void *reg_base, - struct ccu_common **rdump, - unsigned long nr_rdump, - const struct ccu_reg_dump *rsuspend, - unsigned long nr_rsuspend) -{ - struct sunxi_clock_reg_cache *reg_cache; - - reg_cache = malloc(sizeof(*reg_cache)); - if (!reg_cache) { - hal_log_warn("could not allocate register reg_cache.\n"); - return; - } - memset(reg_cache, 0, sizeof(*reg_cache)); - reg_cache->rdump = ccu_alloc_reg_dump(rdump, nr_rdump); - - if (!reg_cache->rdump) { - hal_log_warn("could not allocate register dump storage.\n"); - free(reg_cache); - return; - } - - if (list_empty(&ccu_reg_cache_list)) - pm_syscore_register(&ccmu_syscore_ops); - - reg_cache->reg_base = reg_base; - reg_cache->rd_num = nr_rdump; - reg_cache->rsuspend = rsuspend; - reg_cache->rsuspend_num = nr_rsuspend; - list_add_tail(®_cache->node, &ccu_reg_cache_list); -} -#else -void sunxi_ccu_sleep_init(void *reg_base, - struct ccu_common **rdump, - unsigned long nr_rdump, - const struct ccu_reg_dump *rsuspend, - unsigned long nr_rsuspend) -{} -#endif - diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_common.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_common.h deleted file mode 100644 index 1170583184d9776d5424f32f4c559d9cf4a0beb7..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_common.h +++ /dev/null @@ -1,87 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2016 Maxime Ripard. All rights reserved. - */ - -#ifndef _CCU_COMMON_H_ -#define _CCU_COMMON_H_ - -#include "ccu.h" -#include -#include - -#define CCU_FEATURE_FRACTIONAL BIT(0) -#define CCU_FEATURE_VARIABLE_PREDIV BIT(1) -#define CCU_FEATURE_FIXED_PREDIV BIT(2) -#define CCU_FEATURE_FIXED_POSTDIV BIT(3) -#define CCU_FEATURE_ALL_PREDIV BIT(4) -#define CCU_FEATURE_LOCK_REG BIT(5) -#define CCU_FEATURE_MMC_TIMING_SWITCH BIT(6) -#define CCU_FEATURE_SIGMA_DELTA_MOD BIT(7) - -/* Support key-field reg setting */ -#define CCU_FEATURE_KEY_FIELD_MOD BIT(8) - -/* New formula support in MP: clk = parent / M / P */ -#define CCU_FEATURE_MP_NO_INDEX_MODE BIT(9) - -/* Support fixed rate in gate-clk */ -#define CCU_FEATURE_FIXED_RATE_GATE BIT(10) -/* MMC timing mode switch bit */ -#define CCU_MMC_NEW_TIMING_MODE BIT(30) - -/** - * struct ccu_reg_dump: register dump of clock controller registers. - * @offset: clock register offset from the controller base address. - * @value: the value to be register at offset. - */ -struct ccu_reg_dump -{ - u32 offset; - u32 value; -}; - -struct ccu_common -{ - unsigned long base; - u32 reg; - u32 lock_reg; - u32 prediv; - u32 key_value; - - hal_spinlock_t lock; - unsigned long features; - struct clk_hw hw; -}; - -static inline struct ccu_common *hw_to_ccu_common(struct clk_hw *hw) -{ - return container_of(hw, struct ccu_common, hw); -} - -struct sunxi_ccu_desc -{ - struct ccu_common **ccu_clks; - u32 num_ccu_clks; - - struct clk_hw_onecell_data *hw_clks; - hal_clk_type_t clk_type; - - struct ccu_reset_map *resets; - hal_reset_type_t reset_type; - u32 num_resets; -}; - -void ccu_helper_wait_for_lock(struct ccu_common *common, u32 lock); -int ccu_common_init(unsigned long reg, const struct sunxi_ccu_desc *desc); -void set_reg(unsigned long addr, u32 val, u8 bw, u8 bs); -void set_reg_key(unsigned long addr, - u32 key, u8 kbw, u8 kbs, - u32 val, u8 bw, u8 bs); -void sunxi_ccu_sleep_init(void *reg_base, - struct ccu_common **rdump, - unsigned long nr_rdump, - const struct ccu_reg_dump *rsuspend, - unsigned long nr_rsuspend); - -#endif /* _COMMON_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_div.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_div.c deleted file mode 100644 index 1f93be15d72beaeace3bb4c485c677edd27e8368..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_div.c +++ /dev/null @@ -1,149 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2016 Maxime Ripard - * Maxime Ripard - */ -#include "ccu.h" -#include "ccu_gate.h" -#include "ccu_div.h" - -static unsigned long ccu_div_round_rate(struct ccu_mux_internal *mux, - struct clk_hw *parent, - unsigned long *parent_rate, - unsigned long rate, - void *data) -{ - struct ccu_div *cd = data; - - if (cd->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate *= cd->fixed_post_div; - } - - rate = divider_round_rate_parent(&cd->common.hw, parent, - rate, parent_rate, - cd->div.table, cd->div.width, - cd->div.flags); - - if (cd->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate /= cd->fixed_post_div; - } - - return rate; -} - -static void ccu_div_disable(struct clk_hw *hw) -{ - struct ccu_div *cd = hw_to_ccu_div(hw); - - return ccu_gate_helper_disable(&cd->common, cd->enable); -} - -static int ccu_div_enable(struct clk_hw *hw) -{ - struct ccu_div *cd = hw_to_ccu_div(hw); - - return ccu_gate_helper_enable(&cd->common, cd->enable); -} - -static int ccu_div_is_enabled(struct clk_hw *hw) -{ - struct ccu_div *cd = hw_to_ccu_div(hw); - - return ccu_gate_helper_is_enabled(&cd->common, cd->enable); -} - -static unsigned long ccu_div_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - struct ccu_div *cd = hw_to_ccu_div(hw); - unsigned long val; - u32 reg; - - reg = readl(cd->common.base + cd->common.reg); - val = reg >> cd->div.shift; - val &= (1 << cd->div.width) - 1; - - parent_rate = ccu_mux_helper_apply_prediv(&cd->common, &cd->mux, -1, - parent_rate); - - val = divider_recalc_rate(hw, parent_rate, val, cd->div.table, - cd->div.flags, cd->div.width); - - if (cd->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - val /= cd->fixed_post_div; - } - - return val; -} - -static int ccu_div_determine_rate(struct clk_hw *hw, - struct clk_rate_request *req) -{ - struct ccu_div *cd = hw_to_ccu_div(hw); - - return ccu_mux_helper_determine_rate(&cd->common, &cd->mux, - req, ccu_div_round_rate, cd); -} - -static int ccu_div_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) -{ - struct ccu_div *cd = hw_to_ccu_div(hw); - unsigned long val = 0; - u32 reg; - u32 __cspr; - - parent_rate = ccu_mux_helper_apply_prediv(&cd->common, &cd->mux, -1, - parent_rate); - - if (cd->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate *= cd->fixed_post_div; - } - - val = divider_get_val(rate, parent_rate, cd->div.table, cd->div.width, - cd->div.flags); - - __cspr = hal_spin_lock_irqsave(&cd->common.lock); - - reg = readl(cd->common.base + cd->common.reg); - reg &= ~GENMASK(cd->div.width + cd->div.shift - 1, cd->div.shift); - - writel(reg | (val << cd->div.shift), - cd->common.base + cd->common.reg); - - hal_spin_unlock_irqrestore(&cd->common.lock, __cspr); - - return 0; -} - -static u8 ccu_div_get_parent(struct clk_hw *hw) -{ - struct ccu_div *cd = hw_to_ccu_div(hw); - - return ccu_mux_helper_get_parent(&cd->common, &cd->mux); -} - -static int ccu_div_set_parent(struct clk_hw *hw, u8 index) -{ - struct ccu_div *cd = hw_to_ccu_div(hw); - - return ccu_mux_helper_set_parent(&cd->common, &cd->mux, index); -} - -const struct clk_ops ccu_div_ops = -{ - .disable = ccu_div_disable, - .enable = ccu_div_enable, - .is_enabled = ccu_div_is_enabled, - - .get_parent = ccu_div_get_parent, - .set_parent = ccu_div_set_parent, - - .determine_rate = ccu_div_determine_rate, - .recalc_rate = ccu_div_recalc_rate, - .set_rate = ccu_div_set_rate, -}; diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_div.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_div.h deleted file mode 100644 index d14f1a4763b0adc59cf32ad35a60039b33328512..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_div.h +++ /dev/null @@ -1,179 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2016 Maxime Ripard. All rights reserved. - */ - -#ifndef _CCU_DIV_H_ -#define _CCU_DIV_H_ - -#include "ccu.h" -#include "ccu_common.h" -#include "ccu_mux.h" - -/** - * struct ccu_div_internal - Internal divider description - * @shift: Bit offset of the divider in its register - * @width: Width of the divider field in its register - * @max: Maximum value allowed for that divider. This is the - * arithmetic value, not the maximum value to be set in the - * register. - * @flags: clk_divider flags to apply on this divider - * @table: Divider table pointer (if applicable) - * - * That structure represents a single divider, and is meant to be - * embedded in other structures representing the various clock - * classes. - * - * It is basically a wrapper around the clk_divider functions - * arguments. - */ -struct ccu_div_internal -{ - u8 shift; - u8 width; - - u32 max; - u32 offset; - - u32 flags; - - struct clk_div_table *table; -}; - -#define _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, _table, _flags) \ - { \ - .shift = _shift, \ - .width = _width, \ - .flags = _flags, \ - .table = _table, \ - } - -#define _SUNXI_CCU_DIV_TABLE(_shift, _width, _table) \ - _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, _table, 0) - -#define _SUNXI_CCU_DIV_OFFSET_MAX_FLAGS(_shift, _width, _off, _max, _flags) \ - { \ - .shift = _shift, \ - .width = _width, \ - .flags = _flags, \ - .max = _max, \ - .offset = _off, \ - } - -#define _SUNXI_CCU_DIV_MAX_FLAGS(_shift, _width, _max, _flags) \ - _SUNXI_CCU_DIV_OFFSET_MAX_FLAGS(_shift, _width, 1, _max, _flags) - -#define _SUNXI_CCU_DIV_FLAGS(_shift, _width, _flags) \ - _SUNXI_CCU_DIV_MAX_FLAGS(_shift, _width, 0, _flags) - -#define _SUNXI_CCU_DIV_MAX(_shift, _width, _max) \ - _SUNXI_CCU_DIV_MAX_FLAGS(_shift, _width, _max, 0) - -#define _SUNXI_CCU_DIV_OFFSET(_shift, _width, _offset) \ - _SUNXI_CCU_DIV_OFFSET_MAX_FLAGS(_shift, _width, _offset, 0, 0) - -#define _SUNXI_CCU_DIV(_shift, _width) \ - _SUNXI_CCU_DIV_FLAGS(_shift, _width, 0) - -struct ccu_div -{ - u32 enable; - - struct ccu_div_internal div; - struct ccu_mux_internal mux; - struct ccu_common common; - unsigned int fixed_post_div; -}; - -#define SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \ - _shift, _width, \ - _table, _gate, _flags) \ -struct ccu_div _struct = { \ - .div = _SUNXI_CCU_DIV_TABLE(_shift, _width, \ - _table), \ - .enable = _gate, \ - .common = { \ - .reg = _reg, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &ccu_div_ops, \ - _flags), \ - } \ -} - - -#define SUNXI_CCU_DIV_TABLE(_struct, _name, _parent, _reg, \ - _shift, _width, \ - _table, _flags) \ -SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \ - _shift, _width, _table, 0, \ - _flags) - -#define SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \ - _parents, _table, \ - _reg, \ - _mshift, _mwidth, \ - _muxshift, _muxwidth, \ - _gate, _flags) \ -struct ccu_div _struct = { \ - .enable = _gate, \ - .div = _SUNXI_CCU_DIV(_mshift, _mwidth), \ - .mux = _SUNXI_CCU_MUX_TABLE(_muxshift, _muxwidth, _table), \ - .common = { \ - .reg = _reg, \ - .hw.init = CLK_HW_INIT_PARENTS(_name, \ - _parents, \ - &ccu_div_ops, \ - _flags), \ - }, \ -} - -#define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ - _mshift, _mwidth, _muxshift, _muxwidth, \ - _gate, _flags) \ -SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \ - _parents, NULL, \ - _reg, _mshift, _mwidth, \ - _muxshift, _muxwidth, \ - _gate, _flags) - -#define SUNXI_CCU_M_WITH_MUX(_struct, _name, _parents, _reg, \ - _mshift, _mwidth, _muxshift, _muxwidth, \ - _flags) \ -SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \ - _parents, NULL, \ - _reg, _mshift, _mwidth, \ - _muxshift, _muxwidth, \ - 0, _flags) - - -#define SUNXI_CCU_M_WITH_GATE(_struct, _name, _parent, _reg, \ - _mshift, _mwidth, _gate, \ - _flags) \ -struct ccu_div _struct = { \ - .enable = _gate, \ - .div = _SUNXI_CCU_DIV(_mshift, _mwidth), \ - .common = { \ - .reg = _reg, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &ccu_div_ops, \ - _flags), \ - }, \ -} - -#define SUNXI_CCU_M(_struct, _name, _parent, _reg, _mshift, _mwidth, \ - _flags) \ -SUNXI_CCU_M_WITH_GATE(_struct, _name, _parent, _reg, \ - _mshift, _mwidth, 0, _flags) - -static inline struct ccu_div *hw_to_ccu_div(struct clk_hw *hw) -{ - struct ccu_common *common = hw_to_ccu_common(hw); - - return container_of(common, struct ccu_div, common); -} - -extern const struct clk_ops ccu_div_ops; - -#endif /* _CCU_DIV_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_frac.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_frac.c deleted file mode 100644 index 7c3b42827bed67bc2735103fcba813154ea6bdef..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_frac.c +++ /dev/null @@ -1,123 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2016 Maxime Ripard - * Maxime Ripard - */ -#include "ccu.h" -#include "ccu_frac.h" -#include - -bool ccu_frac_helper_is_enabled(struct ccu_common *common, - struct ccu_frac_internal *cf) -{ - if (!(common->features & CCU_FEATURE_FRACTIONAL)) - { - return false; - } - - return !(readl(common->base + common->reg) & cf->enable); -} - -void ccu_frac_helper_enable(struct ccu_common *common, - struct ccu_frac_internal *cf) -{ - u32 reg; - u32 __cspr; - - if (!(common->features & CCU_FEATURE_FRACTIONAL)) - { - return; - } - - __cspr = hal_spin_lock_irqsave(&common->lock); - reg = readl(common->base + common->reg); - writel(reg & ~cf->enable, common->base + common->reg); - hal_spin_unlock_irqrestore(&common->lock, __cspr); -} - -void ccu_frac_helper_disable(struct ccu_common *common, - struct ccu_frac_internal *cf) -{ - u32 reg; - u32 __cspr; - - if (!(common->features & CCU_FEATURE_FRACTIONAL)) - { - return; - } - - __cspr = hal_spin_lock_irqsave(&common->lock); - reg = readl(common->base + common->reg); - writel(reg | cf->enable, common->base + common->reg); - hal_spin_unlock_irqrestore(&common->lock, __cspr); -} - -bool ccu_frac_helper_has_rate(struct ccu_common *common, - struct ccu_frac_internal *cf, - unsigned long rate) -{ - if (!(common->features & CCU_FEATURE_FRACTIONAL)) - { - return false; - } - - return (cf->rates[0] == rate) || (cf->rates[1] == rate); -} - -unsigned long ccu_frac_helper_read_rate(struct ccu_common *common, - struct ccu_frac_internal *cf) -{ - u32 reg; - - hal_log_debug("%s: Read fractional\n", clk_hw_get_name(&common->hw)); - - if (!(common->features & CCU_FEATURE_FRACTIONAL)) - { - return 0; - } - - hal_log_debug("%s: clock is fractional (rates %lu and %lu)\n", - clk_hw_get_name(&common->hw), cf->rates[0], cf->rates[1]); - - reg = readl(common->base + common->reg); - - hal_log_debug("%s: clock reg is 0x%x (select is 0x%x)\n", - clk_hw_get_name(&common->hw), reg, cf->select); - - return (reg & cf->select) ? cf->rates[1] : cf->rates[0]; -} - -int ccu_frac_helper_set_rate(struct ccu_common *common, - struct ccu_frac_internal *cf, - unsigned long rate, u32 lock) -{ - u32 reg, sel; - u32 __cspr; - - if (!(common->features & CCU_FEATURE_FRACTIONAL)) - { - return -1; - } - - if (cf->rates[0] == rate) - { - sel = 0; - } - else if (cf->rates[1] == rate) - { - sel = cf->select; - } - else - { - return -1; - } - - __cspr = hal_spin_lock_irqsave(&common->lock); - reg = readl(common->base + common->reg); - reg &= ~cf->select; - writel(reg | sel, common->base + common->reg); - hal_spin_unlock_irqrestore(&common->lock, __cspr); - - ccu_helper_wait_for_lock(common, lock); - return 0; -} diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_frac.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_frac.h deleted file mode 100644 index cd84ef748d01d8910a0dd8de4784998b84ed51bb..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_frac.h +++ /dev/null @@ -1,45 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2016 Maxime Ripard. All rights reserved. - */ - -#ifndef _CCU_FRAC_H_ -#define _CCU_FRAC_H_ - -#include "ccu.h" -#include "ccu_common.h" - -struct ccu_frac_internal -{ - u32 enable; - u32 select; - - unsigned long rates[2]; -}; - -#define _SUNXI_CCU_FRAC(_enable, _select, _rate1, _rate2) \ - { \ - .enable = _enable, \ - .select = _select, \ - .rates = { _rate1, _rate2 }, \ - } - -bool ccu_frac_helper_is_enabled(struct ccu_common *common, - struct ccu_frac_internal *cf); -void ccu_frac_helper_enable(struct ccu_common *common, - struct ccu_frac_internal *cf); -void ccu_frac_helper_disable(struct ccu_common *common, - struct ccu_frac_internal *cf); - -bool ccu_frac_helper_has_rate(struct ccu_common *common, - struct ccu_frac_internal *cf, - unsigned long rate); - -unsigned long ccu_frac_helper_read_rate(struct ccu_common *common, - struct ccu_frac_internal *cf); - -int ccu_frac_helper_set_rate(struct ccu_common *common, - struct ccu_frac_internal *cf, - unsigned long rate, u32 lock); - -#endif /* _CCU_FRAC_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_gate.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_gate.c deleted file mode 100644 index 5435895b850666aa37dd3a3bb44c670eac0d3ad0..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_gate.c +++ /dev/null @@ -1,140 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2016 Maxime Ripard - * Maxime Ripard - */ -#include "ccu.h" -#include "ccu_gate.h" - -void ccu_gate_helper_disable(struct ccu_common *common, u32 gate) -{ - u32 reg; - u32 __cspr; - - if (!gate) - { - return; - } - - __cspr = hal_spin_lock_irqsave(&common->lock); - - reg = readl(common->base + common->reg); - writel(reg & ~gate, common->base + common->reg); - - hal_spin_unlock_irqrestore(&common->lock, __cspr); -} - -static void ccu_gate_disable(struct clk_hw *hw) -{ - struct ccu_gate *cg = hw_to_ccu_gate(hw); - - return ccu_gate_helper_disable(&cg->common, cg->enable); -} - -int ccu_gate_helper_enable(struct ccu_common *common, u32 gate) -{ - u32 reg; - u32 __cspr; - - if (!gate) - { - return 0; - } - - __cspr = hal_spin_lock_irqsave(&common->lock); - - reg = readl(common->base + common->reg); - writel(reg | gate, common->base + common->reg); - - hal_spin_unlock_irqrestore(&common->lock, __cspr); - - return 0; -} - -static int ccu_gate_enable(struct clk_hw *hw) -{ - struct ccu_gate *cg = hw_to_ccu_gate(hw); - - return ccu_gate_helper_enable(&cg->common, cg->enable); -} - -int ccu_gate_helper_is_enabled(struct ccu_common *common, u32 gate) -{ - u32 value; - - if (!gate) - { - return 1; - } - - value = readl(common->base + common->reg); - return !!(value & gate); -} - -static int ccu_gate_is_enabled(struct clk_hw *hw) -{ - struct ccu_gate *cg = hw_to_ccu_gate(hw); - - return ccu_gate_helper_is_enabled(&cg->common, cg->enable); -} - -static unsigned long ccu_gate_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - struct ccu_gate *cg = hw_to_ccu_gate(hw); - unsigned long rate = parent_rate; - - if (cg->common.features & CCU_FEATURE_ALL_PREDIV) - { - rate /= cg->common.prediv; - } - - return rate; -} - -static long ccu_gate_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) -{ - struct ccu_gate *cg = hw_to_ccu_gate(hw); - int div = 1; - - if (cg->common.features & CCU_FEATURE_ALL_PREDIV) - { - div = cg->common.prediv; - } - - if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) - { - unsigned long best_parent = rate; - - if (cg->common.features & CCU_FEATURE_ALL_PREDIV) - { - best_parent *= div; - } - *prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent); - } - - return *prate / div; -} - -static int ccu_gate_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) -{ - /* - * We must report success but we can do so unconditionally because - * clk_factor_round_rate returns values that ensure this call is a - * nop. - */ - - return 0; -} - -const struct clk_ops ccu_gate_ops = -{ - .disable = ccu_gate_disable, - .enable = ccu_gate_enable, - .is_enabled = ccu_gate_is_enabled, - .round_rate = ccu_gate_round_rate, - .set_rate = ccu_gate_set_rate, - .recalc_rate = ccu_gate_recalc_rate, -}; diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_gate.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_gate.h deleted file mode 100644 index 65e52b320dd16da66b8eabc066780ff496f04490..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_gate.h +++ /dev/null @@ -1,143 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2016 Maxime Ripard. All rights reserved. - */ - -#ifndef _CCU_GATE_H_ -#define _CCU_GATE_H_ - -#include "ccu.h" -#include "ccu_common.h" - -struct ccu_gate -{ - u32 enable; - u32 fixed_rate; - - struct ccu_common common; -}; - -#define SUNXI_CCU_GATE_WITH_FIXED_RATE(_struct, _name, _parent, _reg, \ - _fixed_rate, _gate) \ -struct ccu_gate _struct = { \ - .enable = _gate, \ - .fixed_rate = _fixed_rate, \ - .common = { \ - .reg = _reg, \ - .features = CCU_FEATURE_FIXED_RATE_GATE, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &ccu_gate_ops, \ - 0), \ - } \ -} - -#define SUNXI_CCU_GATE_WITH_PREDIV(_struct, _name, _parent, _reg, \ - _prediv, _gate, _flags) \ -struct ccu_gate _struct = { \ - .enable = _gate, \ - .common = { \ - .reg = _reg, \ - .prediv = _prediv, \ - .features = CCU_FEATURE_ALL_PREDIV, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &ccu_gate_ops, \ - _flags), \ - } \ -} - -#define SUNXI_CCU_GATE_WITH_KEY(_struct, _name, _parent, _reg, \ - _key_value, _gate, _flags) \ -struct ccu_gate _struct = { \ - .enable = _gate, \ - .common = { \ - .reg = _reg, \ - .key_value = _key_value, \ - .features = CCU_FEATURE_KEY_FIELD_MOD, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &ccu_gate_ops, \ - _flags), \ - } \ -} - -#define SUNXI_CCU_GATE(_struct, _name, _parent, _reg, _gate, _flags) \ - struct ccu_gate _struct = { \ - .enable = _gate, \ - .common = { \ - .reg = _reg, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &ccu_gate_ops, \ - _flags), \ - } \ - } - -#define SUNXI_CCU_GATE_HW(_struct, _name, _parent, _reg, _gate, _flags) \ - struct ccu_gate _struct = { \ - .enable = _gate, \ - .common = { \ - .reg = _reg, \ - .hw.init = CLK_HW_INIT_HW(_name, \ - _parent, \ - &ccu_gate_ops, \ - _flags), \ - } \ - } - -#define SUNXI_CCU_GATE_FW(_struct, _name, _parent, _reg, _gate, _flags) \ - struct ccu_gate _struct = { \ - .enable = _gate, \ - .common = { \ - .reg = _reg, \ - .hw.init = CLK_HW_INIT_FW_NAME(_name, \ - _parent, \ - &ccu_gate_ops, \ - _flags), \ - } \ - } - -/* - * The following two macros allow the re-use of the data structure - * holding the parent info. - */ -#define SUNXI_CCU_GATE_HWS(_struct, _name, _parent, _reg, _gate, _flags) \ - struct ccu_gate _struct = { \ - .enable = _gate, \ - .common = { \ - .reg = _reg, \ - .hw.init = CLK_HW_INIT_HWS(_name, \ - _parent, \ - &ccu_gate_ops, \ - _flags), \ - } \ - } - -#define SUNXI_CCU_GATE_DATA(_struct, _name, _data, _reg, _gate, _flags) \ - struct ccu_gate _struct = { \ - .enable = _gate, \ - .common = { \ - .reg = _reg, \ - .hw.init = \ - CLK_HW_INIT_PARENTS_DATA(_name, \ - _data, \ - &ccu_gate_ops, \ - _flags), \ - } \ - } - -static inline struct ccu_gate *hw_to_ccu_gate(struct clk_hw *hw) -{ - struct ccu_common *common = hw_to_ccu_common(hw); - - return container_of(common, struct ccu_gate, common); -} - -void ccu_gate_helper_disable(struct ccu_common *common, u32 gate); -int ccu_gate_helper_enable(struct ccu_common *common, u32 gate); -int ccu_gate_helper_is_enabled(struct ccu_common *common, u32 gate); - -extern const struct clk_ops ccu_gate_ops; - -#endif /* _CCU_GATE_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mp.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mp.c deleted file mode 100644 index 922b82270c520fadb1c795d398c804d3b2a7b878..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mp.c +++ /dev/null @@ -1,378 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2016 Maxime Ripard - * Maxime Ripard - */ -#include "ccu.h" -#include "ccu_gate.h" -#include "ccu_mp.h" -#include - -static inline unsigned int ilog2(unsigned int v) -{ - unsigned int r; - unsigned int shift; - r = (v > 0xffff) << 4; - v >>= r; - shift = (v > 0xff) << 3; - v >>= shift; - r |= shift; - shift = (v > 0xf) << 2; - v >>= shift; - r |= shift; - shift = (v > 0x3) << 1; - v >>= shift; - r |= shift; - r |= (v >> 1); - return r; -} - -static void ccu_mp_find_best(unsigned long parent, unsigned long rate, - unsigned int max_m, unsigned int max_p, - unsigned int *m, unsigned int *p) -{ - unsigned long best_rate = 0; - unsigned int best_m = 0, best_p = 0; - unsigned int _m, _p; - - for (_p = 1; _p <= max_p; _p <<= 1) - { - for (_m = 1; _m <= max_m; _m++) - { - unsigned long tmp_rate = parent / _p / _m; - - if (tmp_rate > rate) - { - continue; - } - - if ((rate - tmp_rate) < (rate - best_rate)) - { - best_rate = tmp_rate; - best_m = _m; - best_p = _p; - } - } - } - - *m = best_m; - *p = best_p; -} - -static unsigned long ccu_mp_find_best_with_parent_adj(struct clk_hw *hw, - unsigned long *parent, - unsigned long rate, - unsigned int max_m, - unsigned int max_p) -{ - unsigned long parent_rate_saved; - unsigned long parent_rate, now; - unsigned long best_rate = 0; - unsigned int _m, _p, div; - unsigned long maxdiv; - - parent_rate_saved = *parent; - - /* - * The maximum divider we can use without overflowing - * unsigned long in rate * m * p below - */ - maxdiv = max_m * max_p; - maxdiv = min(ULONG_MAX / rate, maxdiv); - - for (_p = 1; _p <= max_p; _p <<= 1) - { - for (_m = 1; _m <= max_m; _m++) - { - div = _m * _p; - - if (div > maxdiv) - { - break; - } - - if (rate * div == parent_rate_saved) - { - /* - * It's the most ideal case if the requested - * rate can be divided from parent clock without - * needing to change parent rate, so return the - * divider immediately. - */ - *parent = parent_rate_saved; - return rate; - } - - parent_rate = clk_hw_round_rate(hw, rate * div); - now = parent_rate / div; - - if (now <= rate && now > best_rate) - { - best_rate = now; - *parent = parent_rate; - - if (now == rate) - { - return rate; - } - } - } - } - - return best_rate; -} - -static unsigned long ccu_mp_round_rate(struct ccu_mux_internal *mux, - struct clk_hw *hw, - unsigned long *parent_rate, - unsigned long rate, - void *data) -{ - struct ccu_mp *cmp = data; - unsigned int max_m, max_p; - unsigned int m, p; - - if (cmp->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate *= cmp->fixed_post_div; - } - - max_m = cmp->m.max ? : 1 << cmp->m.width; - max_p = cmp->p.max ? : 1 << ((1 << cmp->p.width) - 1); - - if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)) - { - ccu_mp_find_best(*parent_rate, rate, max_m, max_p, &m, &p); - rate = *parent_rate / p / m; - } - else - { - rate = ccu_mp_find_best_with_parent_adj(hw, parent_rate, rate, - max_m, max_p); - } - - if (cmp->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate /= cmp->fixed_post_div; - } - - return rate; -} - -static void ccu_mp_disable(struct clk_hw *hw) -{ - struct ccu_mp *cmp = hw_to_ccu_mp(hw); - - return ccu_gate_helper_disable(&cmp->common, cmp->enable); -} - -static int ccu_mp_enable(struct clk_hw *hw) -{ - struct ccu_mp *cmp = hw_to_ccu_mp(hw); - - return ccu_gate_helper_enable(&cmp->common, cmp->enable); -} - -static int ccu_mp_is_enabled(struct clk_hw *hw) -{ - struct ccu_mp *cmp = hw_to_ccu_mp(hw); - - return ccu_gate_helper_is_enabled(&cmp->common, cmp->enable); -} - -static unsigned long ccu_mp_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - struct ccu_mp *cmp = hw_to_ccu_mp(hw); - unsigned long rate; - unsigned int m, p; - u32 reg; - - /* Adjust parent_rate according to pre-dividers */ - parent_rate = ccu_mux_helper_apply_prediv(&cmp->common, &cmp->mux, -1, - parent_rate); - - reg = readl(cmp->common.base + cmp->common.reg); - - m = reg >> cmp->m.shift; - m &= (1 << cmp->m.width) - 1; - m += cmp->m.offset; - if (!m) - { - m++; - } - - p = reg >> cmp->p.shift; - p &= (1 << cmp->p.width) - 1; - - rate = (parent_rate >> p) / m; - if (cmp->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate /= cmp->fixed_post_div; - } - - return rate; -} - -static int ccu_mp_determine_rate(struct clk_hw *hw, - struct clk_rate_request *req) -{ - struct ccu_mp *cmp = hw_to_ccu_mp(hw); - - return ccu_mux_helper_determine_rate(&cmp->common, &cmp->mux, - req, ccu_mp_round_rate, cmp); -} - -static int ccu_mp_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) -{ - struct ccu_mp *cmp = hw_to_ccu_mp(hw); - unsigned int max_m, max_p; - unsigned int m, p; - u32 reg; - u32 __cspr; - - /* Adjust parent_rate according to pre-dividers */ - parent_rate = ccu_mux_helper_apply_prediv(&cmp->common, &cmp->mux, -1, - parent_rate); - - max_m = cmp->m.max ? : 1 << cmp->m.width; - max_p = cmp->p.max ? : 1 << ((1 << cmp->p.width) - 1); - - /* Adjust target rate according to post-dividers */ - if (cmp->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate = rate * cmp->fixed_post_div; - } - - ccu_mp_find_best(parent_rate, rate, max_m, max_p, &m, &p); - - __cspr = hal_spin_lock_irqsave(&cmp->common.lock); - - reg = readl(cmp->common.base + cmp->common.reg); - reg &= ~GENMASK(cmp->m.width + cmp->m.shift - 1, cmp->m.shift); - reg &= ~GENMASK(cmp->p.width + cmp->p.shift - 1, cmp->p.shift); - reg |= (m - cmp->m.offset) << cmp->m.shift; - reg |= ilog2(p) << cmp->p.shift; - - writel(reg, cmp->common.base + cmp->common.reg); - - hal_spin_unlock_irqrestore(&cmp->common.lock, __cspr); - - return 0; -} - -static u8 ccu_mp_get_parent(struct clk_hw *hw) -{ - struct ccu_mp *cmp = hw_to_ccu_mp(hw); - - return ccu_mux_helper_get_parent(&cmp->common, &cmp->mux); -} - -static int ccu_mp_set_parent(struct clk_hw *hw, u8 index) -{ - struct ccu_mp *cmp = hw_to_ccu_mp(hw); - - return ccu_mux_helper_set_parent(&cmp->common, &cmp->mux, index); -} - -const struct clk_ops ccu_mp_ops = -{ - .disable = ccu_mp_disable, - .enable = ccu_mp_enable, - .is_enabled = ccu_mp_is_enabled, - - .get_parent = ccu_mp_get_parent, - .set_parent = ccu_mp_set_parent, - - .determine_rate = ccu_mp_determine_rate, - .recalc_rate = ccu_mp_recalc_rate, - .set_rate = ccu_mp_set_rate, -}; - -/* - * Support for MMC timing mode switching - * - * The MMC clocks on some SoCs support switching between old and - * new timing modes. A platform specific API is provided to query - * and set the timing mode on supported SoCs. - * - * In addition, a special class of ccu_mp_ops is provided, which - * takes in to account the timing mode switch. When the new timing - * mode is active, the clock output rate is halved. This new class - * is a wrapper around the generic ccu_mp_ops. When clock rates - * are passed through to ccu_mp_ops callbacks, they are doubled - * if the new timing mode bit is set, to account for the post - * divider. Conversely, when clock rates are passed back, they - * are halved if the mode bit is set. - */ - -static unsigned long ccu_mp_mmc_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - unsigned long rate = ccu_mp_recalc_rate(hw, parent_rate); - struct ccu_common *cm = hw_to_ccu_common(hw); - u32 val = readl(cm->base + cm->reg); - - if (val & CCU_MMC_NEW_TIMING_MODE) - { - return rate / 2; - } - return rate; -} - -static int ccu_mp_mmc_determine_rate(struct clk_hw *hw, - struct clk_rate_request *req) -{ - struct ccu_common *cm = hw_to_ccu_common(hw); - u32 val = readl(cm->base + cm->reg); - int ret; - - /* adjust the requested clock rate */ - if (val & CCU_MMC_NEW_TIMING_MODE) - { - req->rate *= 2; - req->min_rate *= 2; - req->max_rate *= 2; - } - - ret = ccu_mp_determine_rate(hw, req); - - /* re-adjust the requested clock rate back */ - if (val & CCU_MMC_NEW_TIMING_MODE) - { - req->rate /= 2; - req->min_rate /= 2; - req->max_rate /= 2; - } - - return ret; -} - -static int ccu_mp_mmc_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) -{ - struct ccu_common *cm = hw_to_ccu_common(hw); - u32 val = readl(cm->base + cm->reg); - - if (val & CCU_MMC_NEW_TIMING_MODE) - { - rate *= 2; - } - - return ccu_mp_set_rate(hw, rate, parent_rate); -} - -const struct clk_ops ccu_mp_mmc_ops = -{ - .disable = ccu_mp_disable, - .enable = ccu_mp_enable, - .is_enabled = ccu_mp_is_enabled, - - .get_parent = ccu_mp_get_parent, - .set_parent = ccu_mp_set_parent, - - .determine_rate = ccu_mp_mmc_determine_rate, - .recalc_rate = ccu_mp_mmc_recalc_rate, - .set_rate = ccu_mp_mmc_set_rate, -}; diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mp.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mp.h deleted file mode 100644 index c21fbe0d072637432ea0fc5a5054a97e1c8fa0ff..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mp.h +++ /dev/null @@ -1,142 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2016 Maxime Ripard. All rights reserved. - */ - -#ifndef _CCU_MP_H_ -#define _CCU_MP_H_ - -#include "ccu.h" -#include "ccu_common.h" -#include "ccu_div.h" -#include "ccu_mult.h" -#include "ccu_mux.h" - -/* - * struct ccu_mp - Definition of an M-P clock - * - * Clocks based on the formula parent >> P / M - */ -struct ccu_mp -{ - u32 enable; - - struct ccu_div_internal m; - struct ccu_div_internal p; - struct ccu_mux_internal mux; - - unsigned int fixed_post_div; - - struct ccu_common common; -}; - -#define SUNXI_CCU_MP_WITH_MUX_GATE_NO_INDEX(_struct, _name, _parents, _reg, \ - _mshift, _mwidth, \ - _pshift, _pwidth, \ - _muxshift, _muxwidth, \ - _gate, _flags) \ -struct ccu_mp _struct = { \ - .enable = _gate, \ - .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ - .p = _SUNXI_CCU_DIV(_pshift, _pwidth), \ - .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \ - .common = { \ - .reg = _reg, \ - .features = CCU_FEATURE_MP_NO_INDEX_MODE, \ - .hw.init = CLK_HW_INIT_PARENTS(_name, \ - _parents, \ - &ccu_mp_ops, \ - _flags), \ - } \ -} - -#define SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(_struct, _name, _parents, _reg, \ - _mshift, _mwidth, \ - _pshift, _pwidth, \ - _muxshift, _muxwidth, \ - _gate, _postdiv, _flags) \ -struct ccu_mp _struct = { \ - .enable = _gate, \ - .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ - .p = _SUNXI_CCU_DIV(_pshift, _pwidth), \ - .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \ - .fixed_post_div = _postdiv, \ - .common = { \ - .reg = _reg, \ - .features = CCU_FEATURE_FIXED_POSTDIV, \ - .hw.init = CLK_HW_INIT_PARENTS(_name, \ - _parents, \ - &ccu_mp_ops, \ - _flags), \ - } \ -} - -#define SUNXI_CCU_MP_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ - _mshift, _mwidth, \ - _pshift, _pwidth, \ - _muxshift, _muxwidth, \ - _gate, _flags) \ -struct ccu_mp _struct = { \ - .enable = _gate, \ - .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ - .p = _SUNXI_CCU_DIV(_pshift, _pwidth), \ - .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \ - .common = { \ - .reg = _reg, \ - .hw.init = CLK_HW_INIT_PARENTS(_name, \ - _parents, \ - &ccu_mp_ops, \ - _flags), \ - } \ -} - -#define SUNXI_CCU_MP_WITH_MUX(_struct, _name, _parents, _reg, \ - _mshift, _mwidth, \ - _pshift, _pwidth, \ - _muxshift, _muxwidth, \ - _flags) \ -SUNXI_CCU_MP_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ - _mshift, _mwidth, \ - _pshift, _pwidth, \ - _muxshift, _muxwidth, \ - 0, _flags) - -static inline struct ccu_mp *hw_to_ccu_mp(struct clk_hw *hw) -{ - struct ccu_common *common = hw_to_ccu_common(hw); - - return container_of(common, struct ccu_mp, common); -} - -extern const struct clk_ops ccu_mp_ops; - -/* - * Special class of M-P clock that supports MMC timing modes - * - * Since the MMC clock registers all follow the same layout, we can - * simplify the macro for this particular case. In addition, as - * switching modes also affects the output clock rate, we need to - * have CLK_GET_RATE_NOCACHE for all these types of clocks. - */ - -#define SUNXI_CCU_MP_MMC_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ - _flags) \ -struct ccu_mp _struct = { \ - .enable = BIT(31), \ - .m = _SUNXI_CCU_DIV(0, 4), \ - .p = _SUNXI_CCU_DIV(16, 2), \ - .mux = _SUNXI_CCU_MUX(24, 2), \ - .common = { \ - .reg = _reg, \ - .features = CCU_FEATURE_MMC_TIMING_SWITCH, \ - .hw.init = CLK_HW_INIT_PARENTS(_name, \ - _parents, \ - &ccu_mp_mmc_ops, \ - CLK_GET_RATE_NOCACHE | \ - _flags), \ - } \ -} - -extern const struct clk_ops ccu_mp_mmc_ops; - -#endif /* _CCU_MP_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mult.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mult.c deleted file mode 100644 index 9cabc02e525c87e0640b1490e84c90375bb34dce..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mult.c +++ /dev/null @@ -1,188 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2016 Maxime Ripard - * Maxime Ripard - */ -#include "ccu.h" -#include "ccu_gate.h" -#include "ccu_mult.h" - -struct _ccu_mult -{ - unsigned long mult, min, max; -}; - -static void ccu_mult_find_best(unsigned long parent, unsigned long rate, - struct _ccu_mult *mult) -{ - int _mult; - - _mult = rate / parent; - if (_mult < mult->min) - { - _mult = mult->min; - } - - if (_mult > mult->max) - { - _mult = mult->max; - } - - mult->mult = _mult; -} - -static unsigned long ccu_mult_round_rate(struct ccu_mux_internal *mux, - struct clk_hw *parent, - unsigned long *parent_rate, - unsigned long rate, - void *data) -{ - struct ccu_mult *cm = data; - struct _ccu_mult _cm; - - _cm.min = cm->mult.min; - - if (cm->mult.max) - { - _cm.max = cm->mult.max; - } - else - { - _cm.max = (1 << cm->mult.width) + cm->mult.offset - 1; - } - - ccu_mult_find_best(*parent_rate, rate, &_cm); - - return *parent_rate * _cm.mult; -} - -static void ccu_mult_disable(struct clk_hw *hw) -{ - struct ccu_mult *cm = hw_to_ccu_mult(hw); - - return ccu_gate_helper_disable(&cm->common, cm->enable); -} - -static int ccu_mult_enable(struct clk_hw *hw) -{ - struct ccu_mult *cm = hw_to_ccu_mult(hw); - - return ccu_gate_helper_enable(&cm->common, cm->enable); -} - -static int ccu_mult_is_enabled(struct clk_hw *hw) -{ - struct ccu_mult *cm = hw_to_ccu_mult(hw); - - return ccu_gate_helper_is_enabled(&cm->common, cm->enable); -} - -static unsigned long ccu_mult_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - struct ccu_mult *cm = hw_to_ccu_mult(hw); - unsigned long val; - u32 reg; - - if (ccu_frac_helper_is_enabled(&cm->common, &cm->frac)) - { - return ccu_frac_helper_read_rate(&cm->common, &cm->frac); - } - - reg = readl(cm->common.base + cm->common.reg); - val = reg >> cm->mult.shift; - val &= (1 << cm->mult.width) - 1; - - parent_rate = ccu_mux_helper_apply_prediv(&cm->common, &cm->mux, -1, - parent_rate); - - return parent_rate * (val + cm->mult.offset); -} - -static int ccu_mult_determine_rate(struct clk_hw *hw, - struct clk_rate_request *req) -{ - struct ccu_mult *cm = hw_to_ccu_mult(hw); - - return ccu_mux_helper_determine_rate(&cm->common, &cm->mux, - req, ccu_mult_round_rate, cm); -} - -static int ccu_mult_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) -{ - struct ccu_mult *cm = hw_to_ccu_mult(hw); - struct _ccu_mult _cm; - u32 reg; - u32 __cspr; - - if (ccu_frac_helper_has_rate(&cm->common, &cm->frac, rate)) - { - ccu_frac_helper_enable(&cm->common, &cm->frac); - - return ccu_frac_helper_set_rate(&cm->common, &cm->frac, - rate, cm->lock); - } - else - { - ccu_frac_helper_disable(&cm->common, &cm->frac); - } - - parent_rate = ccu_mux_helper_apply_prediv(&cm->common, &cm->mux, -1, - parent_rate); - - _cm.min = cm->mult.min; - - if (cm->mult.max) - { - _cm.max = cm->mult.max; - } - else - { - _cm.max = (1 << cm->mult.width) + cm->mult.offset - 1; - } - - ccu_mult_find_best(parent_rate, rate, &_cm); - - __cspr = hal_spin_lock_irqsave(&cm->common.lock); - - reg = readl(cm->common.base + cm->common.reg); - reg &= ~GENMASK(cm->mult.width + cm->mult.shift - 1, cm->mult.shift); - reg |= ((_cm.mult - cm->mult.offset) << cm->mult.shift); - - writel(reg, cm->common.base + cm->common.reg); - - hal_spin_unlock_irqrestore(&cm->common.lock, __cspr); - - ccu_helper_wait_for_lock(&cm->common, cm->lock); - - return 0; -} - -static u8 ccu_mult_get_parent(struct clk_hw *hw) -{ - struct ccu_mult *cm = hw_to_ccu_mult(hw); - - return ccu_mux_helper_get_parent(&cm->common, &cm->mux); -} - -static int ccu_mult_set_parent(struct clk_hw *hw, u8 index) -{ - struct ccu_mult *cm = hw_to_ccu_mult(hw); - - return ccu_mux_helper_set_parent(&cm->common, &cm->mux, index); -} - -const struct clk_ops ccu_mult_ops = -{ - .disable = ccu_mult_disable, - .enable = ccu_mult_enable, - .is_enabled = ccu_mult_is_enabled, - - .get_parent = ccu_mult_get_parent, - .set_parent = ccu_mult_set_parent, - - .determine_rate = ccu_mult_determine_rate, - .recalc_rate = ccu_mult_recalc_rate, - .set_rate = ccu_mult_set_rate, -}; diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mult.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mult.h deleted file mode 100644 index 978d56496ca35b16ffb86903ac47fd8d5ad58712..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mult.h +++ /dev/null @@ -1,72 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _CCU_MULT_H_ -#define _CCU_MULT_H_ - -#include "ccu_common.h" -#include "ccu_frac.h" -#include "ccu_mux.h" - -struct ccu_mult_internal -{ - u8 offset; - u8 shift; - u8 width; - u8 min; - u8 max; -}; - -#define _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, _min, _max) \ - { \ - .min = _min, \ - .max = _max, \ - .offset = _offset, \ - .shift = _shift, \ - .width = _width, \ - } - -#define _SUNXI_CCU_MULT_MIN(_shift, _width, _min) \ - _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, 1, _min, 0) - -#define _SUNXI_CCU_MULT_OFFSET(_shift, _width, _offset) \ - _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, 1, 0) - -#define _SUNXI_CCU_MULT(_shift, _width) \ - _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, 1, 1, 0) - -struct ccu_mult -{ - u32 enable; - u32 lock; - - struct ccu_frac_internal frac; - struct ccu_mult_internal mult; - struct ccu_mux_internal mux; - struct ccu_common common; -}; - -#define SUNXI_CCU_N_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \ - _mshift, _mwidth, _gate, _lock, \ - _flags) \ -struct ccu_mult _struct = { \ - .enable = _gate, \ - .lock = _lock, \ - .mult = _SUNXI_CCU_MULT(_mshift, _mwidth), \ - .common = { \ - .reg = _reg, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &ccu_mult_ops, \ - _flags), \ - }, \ -} - -static inline struct ccu_mult *hw_to_ccu_mult(struct clk_hw *hw) -{ - struct ccu_common *common = hw_to_ccu_common(hw); - - return container_of(common, struct ccu_mult, common); -} - -extern const struct clk_ops ccu_mult_ops; - -#endif /* _CCU_MULT_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mux.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mux.c deleted file mode 100644 index 742ae65525520492b9d08ac61faad1624fb28cd7..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mux.c +++ /dev/null @@ -1,273 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2016 Maxime Ripard - * Maxime Ripard - */ -#include "ccu.h" -#include "ccu_gate.h" -#include "ccu_mux.h" - -static u16 ccu_mux_get_prediv(struct ccu_common *common, - struct ccu_mux_internal *cm, - int parent_index) -{ - u16 prediv = 1; - u32 reg; - - if (!((common->features & CCU_FEATURE_FIXED_PREDIV) || - (common->features & CCU_FEATURE_VARIABLE_PREDIV) || - (common->features & CCU_FEATURE_ALL_PREDIV))) - { - return 1; - } - - if (common->features & CCU_FEATURE_ALL_PREDIV) - { - return common->prediv; - } - - reg = readl(common->base + common->reg); - if (parent_index < 0) - { - parent_index = reg >> cm->shift; - parent_index &= (1 << cm->width) - 1; - } - - if (common->features & CCU_FEATURE_FIXED_PREDIV) - { - int i; - - for (i = 0; i < cm->n_predivs; i++) - if (parent_index == cm->fixed_predivs[i].index) - { - prediv = cm->fixed_predivs[i].div; - } - } - - if (common->features & CCU_FEATURE_VARIABLE_PREDIV) - { - int i; - - for (i = 0; i < cm->n_var_predivs; i++) - if (parent_index == cm->var_predivs[i].index) - { - u8 div; - - div = reg >> cm->var_predivs[i].shift; - div &= (1 << cm->var_predivs[i].width) - 1; - prediv = div + 1; - } - } - - return prediv; -} - -unsigned long ccu_mux_helper_apply_prediv(struct ccu_common *common, - struct ccu_mux_internal *cm, - int parent_index, - unsigned long parent_rate) -{ - return parent_rate / ccu_mux_get_prediv(common, cm, parent_index); -} - -static unsigned long ccu_mux_helper_unapply_prediv(struct ccu_common *common, - struct ccu_mux_internal *cm, - int parent_index, - unsigned long parent_rate) -{ - return parent_rate * ccu_mux_get_prediv(common, cm, parent_index); -} - -int ccu_mux_helper_determine_rate(struct ccu_common *common, - struct ccu_mux_internal *cm, - struct clk_rate_request *req, - unsigned long (*round)(struct ccu_mux_internal *, - struct clk_hw *, - unsigned long *, - unsigned long, - void *), - void *data) -{ - unsigned long best_parent_rate = 0, best_rate = 0; - struct clk_hw *best_parent, *hw = &common->hw; - unsigned int i; - - if (clk_hw_get_flags(hw) & CLK_SET_RATE_NO_REPARENT) - { - unsigned long adj_parent_rate; - - best_parent = clk_hw_get_parent(hw); - best_parent_rate = clk_hw_get_rate(best_parent); - adj_parent_rate = ccu_mux_helper_apply_prediv(common, cm, -1, - best_parent_rate); - - best_rate = round(cm, best_parent, &adj_parent_rate, - req->rate, data); - - /* - * adj_parent_rate might have been modified by our clock. - * Unapply the pre-divider if there's one, and give - * the actual frequency the parent needs to run at. - */ - best_parent_rate = ccu_mux_helper_unapply_prediv(common, cm, -1, - adj_parent_rate); - - goto out; - } - - for (i = 0; i < clk_hw_get_num_parents(hw); i++) - { - unsigned long tmp_rate, parent_rate; - struct clk_hw *parent; - - parent = clk_hw_get_parent_by_index(hw, i); - if (!parent) - { - continue; - } - - parent_rate = ccu_mux_helper_apply_prediv(common, cm, i, - clk_hw_get_rate(parent)); - - tmp_rate = round(cm, parent, &parent_rate, req->rate, data); - - /* - * parent_rate might have been modified by our clock. - * Unapply the pre-divider if there's one, and give - * the actual frequency the parent needs to run at. - */ - parent_rate = ccu_mux_helper_unapply_prediv(common, cm, i, - parent_rate); - if (tmp_rate == req->rate) - { - best_parent = parent; - best_parent_rate = parent_rate; - best_rate = tmp_rate; - goto out; - } - - if ((req->rate - tmp_rate) < (req->rate - best_rate)) - { - best_rate = tmp_rate; - best_parent_rate = parent_rate; - best_parent = parent; - } - } - - if (best_rate == 0) - { - return -1; - } - -out: - req->best_parent_hw = best_parent; - req->best_parent_rate = best_parent_rate; - req->rate = best_rate; - return 0; -} - -u8 ccu_mux_helper_get_parent(struct ccu_common *common, - struct ccu_mux_internal *cm) -{ - u32 reg; - u8 parent; - - reg = readl(common->base + common->reg); - parent = reg >> cm->shift; - parent &= (1 << cm->width) - 1; - - if (cm->table) - { - int num_parents = clk_hw_get_num_parents(&common->hw); - int i; - - for (i = 0; i < num_parents; i++) - if (cm->table[i] == parent) - { - return i; - } - } - - return parent; -} - -int ccu_mux_helper_set_parent(struct ccu_common *common, - struct ccu_mux_internal *cm, - u8 index) -{ - u32 reg; - u32 __cspr; - - if (cm->table) - { - index = cm->table[index]; - } - - __cspr = hal_spin_lock_irqsave(&common->lock); - - reg = readl(common->base + common->reg); - reg &= ~GENMASK(cm->width + cm->shift - 1, cm->shift); - writel(reg | (index << cm->shift), common->base + common->reg); - - hal_spin_unlock_irqrestore(&common->lock, __cspr); - - return 0; -} - -static void ccu_mux_disable(struct clk_hw *hw) -{ - struct ccu_mux *cm = hw_to_ccu_mux(hw); - - return ccu_gate_helper_disable(&cm->common, cm->enable); -} - -static int ccu_mux_enable(struct clk_hw *hw) -{ - struct ccu_mux *cm = hw_to_ccu_mux(hw); - - return ccu_gate_helper_enable(&cm->common, cm->enable); -} - -static int ccu_mux_is_enabled(struct clk_hw *hw) -{ - struct ccu_mux *cm = hw_to_ccu_mux(hw); - - return ccu_gate_helper_is_enabled(&cm->common, cm->enable); -} - -static u8 ccu_mux_get_parent(struct clk_hw *hw) -{ - struct ccu_mux *cm = hw_to_ccu_mux(hw); - - return ccu_mux_helper_get_parent(&cm->common, &cm->mux); -} - -static int ccu_mux_set_parent(struct clk_hw *hw, u8 index) -{ - struct ccu_mux *cm = hw_to_ccu_mux(hw); - - return ccu_mux_helper_set_parent(&cm->common, &cm->mux, index); -} - -static unsigned long ccu_mux_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - struct ccu_mux *cm = hw_to_ccu_mux(hw); - - return ccu_mux_helper_apply_prediv(&cm->common, &cm->mux, -1, - parent_rate); -} - -const struct clk_ops ccu_mux_ops = -{ - .disable = ccu_mux_disable, - .enable = ccu_mux_enable, - .is_enabled = ccu_mux_is_enabled, - - .get_parent = ccu_mux_get_parent, - .set_parent = ccu_mux_set_parent, - - .determine_rate = __clk_mux_determine_rate, - .recalc_rate = ccu_mux_recalc_rate, -}; - diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mux.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mux.h deleted file mode 100644 index 33f0fe7b4589e6b77b5488c531bc280c20a09f4f..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_mux.h +++ /dev/null @@ -1,130 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _CCU_MUX_H_ -#define _CCU_MUX_H_ - -#include "ccu.h" -#include "ccu_common.h" - -/* - * Create a contiguous bitmask starting at bit position @l and ending at - * position @h. For example - * GENMASK_ULL(39, 21) gives us the 64bit vector 0x000000ffffe00000. - */ - -struct ccu_mux_fixed_prediv -{ - u8 index; - u16 div; -}; - -struct ccu_mux_var_prediv -{ - u8 index; - u8 shift; - u8 width; -}; - -struct ccu_mux_internal -{ - u8 shift; - u8 width; - const u8 *table; - - const struct ccu_mux_fixed_prediv *fixed_predivs; - u8 n_predivs; - - const struct ccu_mux_var_prediv *var_predivs; - u8 n_var_predivs; -}; - -#define _SUNXI_CCU_MUX_TABLE(_shift, _width, _table) \ - { \ - .shift = _shift, \ - .width = _width, \ - .table = _table, \ - } - -#define _SUNXI_CCU_MUX(_shift, _width) \ - _SUNXI_CCU_MUX_TABLE(_shift, _width, NULL) - -struct ccu_mux -{ - u32 reg; - u32 enable; - - struct ccu_mux_internal mux; - struct ccu_common common; -}; - -#define SUNXI_CCU_MUX_WITH_GATE_KEY(_struct, _name, _parents, \ - _reg, _shift, _width, \ - _key_value, _gate, _flags) \ -struct ccu_mux _struct = { \ - .enable = _gate, \ - .mux = _SUNXI_CCU_MUX(_shift, _width), \ - .common = { \ - .reg = _reg, \ - .features = CCU_FEATURE_KEY_FIELD_MOD, \ - .key_value = _key_value, \ - .hw.init = CLK_HW_INIT_PARENTS(_name, \ - _parents, \ - &ccu_mux_ops, \ - _flags), \ - } \ -} - -#define SUNXI_CCU_MUX_TABLE_WITH_GATE(_struct, _name, _parents, _table, \ - _reg, _shift, _width, _gate, \ - _flags) \ -struct ccu_mux _struct = { \ - .enable = _gate, \ - .mux = _SUNXI_CCU_MUX_TABLE(_shift, _width, _table), \ - .common = { \ - .reg = _reg, \ - .hw.init = CLK_HW_INIT_PARENTS(_name, \ - _parents, \ - &ccu_mux_ops, \ - _flags), \ - } \ -} - -#define SUNXI_CCU_MUX_WITH_GATE(_struct, _name, _parents, _reg, \ - _shift, _width, _gate, _flags) \ -SUNXI_CCU_MUX_TABLE_WITH_GATE(_struct, _name, _parents, NULL, \ - _reg, _shift, _width, _gate, \ - _flags) - -#define SUNXI_CCU_MUX(_struct, _name, _parents, _reg, _shift, _width, \ - _flags) \ -SUNXI_CCU_MUX_TABLE_WITH_GATE(_struct, _name, _parents, NULL, \ - _reg, _shift, _width, 0, _flags) - -static inline struct ccu_mux *hw_to_ccu_mux(struct clk_hw *hw) -{ - struct ccu_common *common = hw_to_ccu_common(hw); - - return container_of(common, struct ccu_mux, common); -} - -extern const struct clk_ops ccu_mux_ops; - -unsigned long ccu_mux_helper_apply_prediv(struct ccu_common *common, - struct ccu_mux_internal *cm, - int parent_index, - unsigned long parent_rate); -int ccu_mux_helper_determine_rate(struct ccu_common *common, - struct ccu_mux_internal *cm, - struct clk_rate_request *req, - unsigned long (*round)(struct ccu_mux_internal *, - struct clk_hw *, - unsigned long *, - unsigned long, - void *), - void *data); -u8 ccu_mux_helper_get_parent(struct ccu_common *common, - struct ccu_mux_internal *cm); -int ccu_mux_helper_set_parent(struct ccu_common *common, - struct ccu_mux_internal *cm, - u8 index); - -#endif /* _CCU_MUX_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nk.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nk.c deleted file mode 100644 index ba64e9e4aa93049af0af1519e05d0cfa18efa956..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nk.c +++ /dev/null @@ -1,176 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2016 Maxime Ripard - * Maxime Ripard - */ - -#include "ccu.h" -#include "ccu_gate.h" -#include "ccu_nk.h" - -struct _ccu_nk -{ - unsigned long n, min_n, max_n; - unsigned long k, min_k, max_k; -}; - -static void ccu_nk_find_best(unsigned long parent, unsigned long rate, - struct _ccu_nk *nk) -{ - unsigned long best_rate = 0; - unsigned int best_k = 0, best_n = 0; - unsigned int _k, _n; - - for (_k = nk->min_k; _k <= nk->max_k; _k++) - { - for (_n = nk->min_n; _n <= nk->max_n; _n++) - { - unsigned long tmp_rate = parent * _n * _k; - - if (tmp_rate > rate) - { - continue; - } - - if ((rate - tmp_rate) < (rate - best_rate)) - { - best_rate = tmp_rate; - best_k = _k; - best_n = _n; - } - } - } - - nk->k = best_k; - nk->n = best_n; -} - -static void ccu_nk_disable(struct clk_hw *hw) -{ - struct ccu_nk *nk = hw_to_ccu_nk(hw); - - return ccu_gate_helper_disable(&nk->common, nk->enable); -} - -static int ccu_nk_enable(struct clk_hw *hw) -{ - struct ccu_nk *nk = hw_to_ccu_nk(hw); - - return ccu_gate_helper_enable(&nk->common, nk->enable); -} - -static int ccu_nk_is_enabled(struct clk_hw *hw) -{ - struct ccu_nk *nk = hw_to_ccu_nk(hw); - - return ccu_gate_helper_is_enabled(&nk->common, nk->enable); -} - -static unsigned long ccu_nk_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - struct ccu_nk *nk = hw_to_ccu_nk(hw); - unsigned long rate, n, k; - u32 reg; - - reg = readl(nk->common.base + nk->common.reg); - - n = reg >> nk->n.shift; - n &= (1 << nk->n.width) - 1; - n += nk->n.offset; - if (!n) - { - n++; - } - - k = reg >> nk->k.shift; - k &= (1 << nk->k.width) - 1; - k += nk->k.offset; - if (!k) - { - k++; - } - - rate = parent_rate * n * k; - if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate /= nk->fixed_post_div; - } - - return rate; -} - -static long ccu_nk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) -{ - struct ccu_nk *nk = hw_to_ccu_nk(hw); - struct _ccu_nk _nk; - - if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate *= nk->fixed_post_div; - } - - _nk.min_n = nk->n.min ? : 1; - _nk.max_n = nk->n.max ? : 1 << nk->n.width; - _nk.min_k = nk->k.min ? : 1; - _nk.max_k = nk->k.max ? : 1 << nk->k.width; - - ccu_nk_find_best(*parent_rate, rate, &_nk); - rate = *parent_rate * _nk.n * _nk.k; - - if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate = rate / nk->fixed_post_div; - } - - return rate; -} - -static int ccu_nk_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) -{ - struct ccu_nk *nk = hw_to_ccu_nk(hw); - struct _ccu_nk _nk; - u32 reg; - u32 __cspr; - - if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate = rate * nk->fixed_post_div; - } - - _nk.min_n = nk->n.min ? : 1; - _nk.max_n = nk->n.max ? : 1 << nk->n.width; - _nk.min_k = nk->k.min ? : 1; - _nk.max_k = nk->k.max ? : 1 << nk->k.width; - - ccu_nk_find_best(parent_rate, rate, &_nk); - - __cspr = hal_spin_lock_irqsave(&nk->common.lock); - - reg = readl(nk->common.base + nk->common.reg); - reg &= ~GENMASK(nk->n.width + nk->n.shift - 1, nk->n.shift); - reg &= ~GENMASK(nk->k.width + nk->k.shift - 1, nk->k.shift); - - reg |= (_nk.k - nk->k.offset) << nk->k.shift; - reg |= (_nk.n - nk->n.offset) << nk->n.shift; - writel(reg, nk->common.base + nk->common.reg); - - hal_spin_unlock_irqrestore(&nk->common.lock, __cspr); - - ccu_helper_wait_for_lock(&nk->common, nk->lock); - - return 0; -} - -const struct clk_ops ccu_nk_ops = -{ - .disable = ccu_nk_disable, - .enable = ccu_nk_enable, - .is_enabled = ccu_nk_is_enabled, - - .recalc_rate = ccu_nk_recalc_rate, - .round_rate = ccu_nk_round_rate, - .set_rate = ccu_nk_set_rate, -}; diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nk.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nk.h deleted file mode 100644 index 68b0ecbce38ef8857e53e04f2ba105aae254b7df..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nk.h +++ /dev/null @@ -1,63 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2016 Maxime Ripard. All rights reserved. - */ - -#ifndef _CCU_NK_H_ -#define _CCU_NK_H_ - -#include "ccu.h" -#include "ccu_common.h" -#include "ccu_div.h" -#include "ccu_mult.h" - -/* - * struct ccu_nk - Definition of an N-K clock - * - * Clocks based on the formula parent * N * K - */ -struct ccu_nk -{ - u16 reg; - u32 enable; - u32 lock; - - struct ccu_mult_internal n; - struct ccu_mult_internal k; - - unsigned int fixed_post_div; - - struct ccu_common common; -}; - -#define SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(_struct, _name, _parent, _reg, \ - _nshift, _nwidth, \ - _kshift, _kwidth, \ - _gate, _lock, _postdiv, \ - _flags) \ -struct ccu_nk _struct = { \ - .enable = _gate, \ - .lock = _lock, \ - .k = _SUNXI_CCU_MULT(_kshift, _kwidth), \ - .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \ - .fixed_post_div = _postdiv, \ - .common = { \ - .reg = _reg, \ - .features = CCU_FEATURE_FIXED_POSTDIV, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &ccu_nk_ops, \ - _flags), \ - }, \ -} - -static inline struct ccu_nk *hw_to_ccu_nk(struct clk_hw *hw) -{ - struct ccu_common *common = hw_to_ccu_common(hw); - - return container_of(common, struct ccu_nk, common); -} - -extern const struct clk_ops ccu_nk_ops; - -#endif /* _CCU_NK_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nkm.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nkm.c deleted file mode 100644 index c1a20bb996e665875baaeee169a83b4feb139f9d..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nkm.c +++ /dev/null @@ -1,227 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2016 Maxime Ripard - * Maxime Ripard - */ -#include "ccu.h" -#include "ccu_gate.h" -#include "ccu_nkm.h" - -struct _ccu_nkm -{ - unsigned long n, min_n, max_n; - unsigned long k, min_k, max_k; - unsigned long m, min_m, max_m; -}; - -static void ccu_nkm_find_best(unsigned long parent, unsigned long rate, - struct _ccu_nkm *nkm) -{ - unsigned long best_rate = 0; - unsigned long best_n = 0, best_k = 0, best_m = 0; - unsigned long _n, _k, _m; - - for (_k = nkm->min_k; _k <= nkm->max_k; _k++) - { - for (_n = nkm->min_n; _n <= nkm->max_n; _n++) - { - for (_m = nkm->min_m; _m <= nkm->max_m; _m++) - { - unsigned long tmp_rate; - - tmp_rate = parent * _n * _k / _m; - - if (tmp_rate > rate) - { - continue; - } - if ((rate - tmp_rate) < (rate - best_rate)) - { - best_rate = tmp_rate; - best_n = _n; - best_k = _k; - best_m = _m; - } - } - } - } - - nkm->n = best_n; - nkm->k = best_k; - nkm->m = best_m; -} - -static void ccu_nkm_disable(struct clk_hw *hw) -{ - struct ccu_nkm *nkm = hw_to_ccu_nkm(hw); - - return ccu_gate_helper_disable(&nkm->common, nkm->enable); -} - -static int ccu_nkm_enable(struct clk_hw *hw) -{ - struct ccu_nkm *nkm = hw_to_ccu_nkm(hw); - - return ccu_gate_helper_enable(&nkm->common, nkm->enable); -} - -static int ccu_nkm_is_enabled(struct clk_hw *hw) -{ - struct ccu_nkm *nkm = hw_to_ccu_nkm(hw); - - return ccu_gate_helper_is_enabled(&nkm->common, nkm->enable); -} - -static unsigned long ccu_nkm_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - struct ccu_nkm *nkm = hw_to_ccu_nkm(hw); - unsigned long n, m, k, rate; - u32 reg; - - reg = readl(nkm->common.base + nkm->common.reg); - - n = reg >> nkm->n.shift; - n &= (1 << nkm->n.width) - 1; - n += nkm->n.offset; - if (!n) - { - n++; - } - - k = reg >> nkm->k.shift; - k &= (1 << nkm->k.width) - 1; - k += nkm->k.offset; - if (!k) - { - k++; - } - - m = reg >> nkm->m.shift; - m &= (1 << nkm->m.width) - 1; - m += nkm->m.offset; - if (!m) - { - m++; - } - - rate = parent_rate * n * k / m; - - if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate /= nkm->fixed_post_div; - } - - return rate; -} - -static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux, - struct clk_hw *hw, - unsigned long *parent_rate, - unsigned long rate, - void *data) -{ - struct ccu_nkm *nkm = data; - struct _ccu_nkm _nkm; - - _nkm.min_n = nkm->n.min ? : 1; - _nkm.max_n = nkm->n.max ? : 1 << nkm->n.width; - _nkm.min_k = nkm->k.min ? : 1; - _nkm.max_k = nkm->k.max ? : 1 << nkm->k.width; - _nkm.min_m = 1; - _nkm.max_m = nkm->m.max ? : 1 << nkm->m.width; - - if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate *= nkm->fixed_post_div; - } - - ccu_nkm_find_best(*parent_rate, rate, &_nkm); - - rate = *parent_rate * _nkm.n * _nkm.k / _nkm.m; - - if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate /= nkm->fixed_post_div; - } - - return rate; -} - -static int ccu_nkm_determine_rate(struct clk_hw *hw, - struct clk_rate_request *req) -{ - struct ccu_nkm *nkm = hw_to_ccu_nkm(hw); - - return ccu_mux_helper_determine_rate(&nkm->common, &nkm->mux, - req, ccu_nkm_round_rate, nkm); -} - -static int ccu_nkm_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) -{ - struct ccu_nkm *nkm = hw_to_ccu_nkm(hw); - struct _ccu_nkm _nkm; - u32 reg; - u32 __cspr; - - if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate *= nkm->fixed_post_div; - } - - _nkm.min_n = nkm->n.min ? : 1; - _nkm.max_n = nkm->n.max ? : 1 << nkm->n.width; - _nkm.min_k = nkm->k.min ? : 1; - _nkm.max_k = nkm->k.max ? : 1 << nkm->k.width; - _nkm.min_m = 1; - _nkm.max_m = nkm->m.max ? : 1 << nkm->m.width; - - ccu_nkm_find_best(parent_rate, rate, &_nkm); - - __cspr = hal_spin_lock_irqsave(&nkm->common.lock); - - reg = readl(nkm->common.base + nkm->common.reg); - reg &= ~GENMASK(nkm->n.width + nkm->n.shift - 1, nkm->n.shift); - reg &= ~GENMASK(nkm->k.width + nkm->k.shift - 1, nkm->k.shift); - reg &= ~GENMASK(nkm->m.width + nkm->m.shift - 1, nkm->m.shift); - - reg |= (_nkm.n - nkm->n.offset) << nkm->n.shift; - reg |= (_nkm.k - nkm->k.offset) << nkm->k.shift; - reg |= (_nkm.m - nkm->m.offset) << nkm->m.shift; - writel(reg, nkm->common.base + nkm->common.reg); - - hal_spin_unlock_irqrestore(&nkm->common.lock, __cspr); - - ccu_helper_wait_for_lock(&nkm->common, nkm->lock); - - return 0; -} - -static u8 ccu_nkm_get_parent(struct clk_hw *hw) -{ - struct ccu_nkm *nkm = hw_to_ccu_nkm(hw); - - return ccu_mux_helper_get_parent(&nkm->common, &nkm->mux); -} - -static int ccu_nkm_set_parent(struct clk_hw *hw, u8 index) -{ - struct ccu_nkm *nkm = hw_to_ccu_nkm(hw); - - return ccu_mux_helper_set_parent(&nkm->common, &nkm->mux, index); -} - -const struct clk_ops ccu_nkm_ops = -{ - .disable = ccu_nkm_disable, - .enable = ccu_nkm_enable, - .is_enabled = ccu_nkm_is_enabled, - - .get_parent = ccu_nkm_get_parent, - .set_parent = ccu_nkm_set_parent, - - .determine_rate = ccu_nkm_determine_rate, - .recalc_rate = ccu_nkm_recalc_rate, - .set_rate = ccu_nkm_set_rate, -}; diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nkm.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nkm.h deleted file mode 100644 index 996b43c5d98e042474ef22edb69fb18ee8af8d16..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nkm.h +++ /dev/null @@ -1,85 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2016 Maxime Ripard. All rights reserved. - */ - -#ifndef _CCU_NKM_H_ -#define _CCU_NKM_H_ - -#include "ccu.h" -#include "ccu_common.h" -#include "ccu_div.h" -#include "ccu_mult.h" - -/* - * struct ccu_nkm - Definition of an N-K-M clock - * - * Clocks based on the formula parent * N * K / M - */ -struct ccu_nkm -{ - u32 enable; - u32 lock; - - struct ccu_mult_internal n; - struct ccu_mult_internal k; - struct ccu_div_internal m; - struct ccu_mux_internal mux; - - unsigned int fixed_post_div; - - struct ccu_common common; -}; - -#define SUNXI_CCU_NKM_WITH_MUX_GATE_LOCK(_struct, _name, _parents, _reg, \ - _nshift, _nwidth, \ - _kshift, _kwidth, \ - _mshift, _mwidth, \ - _muxshift, _muxwidth, \ - _gate, _lock, _flags) \ -struct ccu_nkm _struct = { \ - .enable = _gate, \ - .lock = _lock, \ - .k = _SUNXI_CCU_MULT(_kshift, _kwidth), \ - .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \ - .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ - .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \ - .common = { \ - .reg = _reg, \ - .hw.init = CLK_HW_INIT_PARENTS(_name, \ - _parents, \ - &ccu_nkm_ops, \ - _flags), \ - }, \ -} - -#define SUNXI_CCU_NKM_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \ - _nshift, _nwidth, \ - _kshift, _kwidth, \ - _mshift, _mwidth, \ - _gate, _lock, _flags) \ -struct ccu_nkm _struct = { \ - .enable = _gate, \ - .lock = _lock, \ - .k = _SUNXI_CCU_MULT(_kshift, _kwidth), \ - .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \ - .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ - .common = { \ - .reg = _reg, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &ccu_nkm_ops, \ - _flags), \ - }, \ -} - -static inline struct ccu_nkm *hw_to_ccu_nkm(struct clk_hw *hw) -{ - struct ccu_common *common = hw_to_ccu_common(hw); - - return container_of(common, struct ccu_nkm, common); -} - -extern const struct clk_ops ccu_nkm_ops; - -#endif /* _CCU_NKM_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nkmp.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nkmp.c deleted file mode 100644 index 75cbb40fe4487f6ca782a520c9f7d44ea1146aac..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nkmp.c +++ /dev/null @@ -1,274 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2016 Maxime Ripard - * Maxime Ripard - */ -#include "ccu.h" -#include "ccu_gate.h" -#include "ccu_nkmp.h" - -struct _ccu_nkmp -{ - unsigned long n, min_n, max_n; - unsigned long k, min_k, max_k; - unsigned long m, min_m, max_m; - unsigned long p, min_p, max_p; -}; - -static inline unsigned int ilog2(unsigned int v) -{ - unsigned int r; - unsigned int shift; - r = (v > 0xffff) << 4; - v >>= r; - shift = (v > 0xff) << 3; - v >>= shift; - r |= shift; - shift = (v > 0xf) << 2; - v >>= shift; - r |= shift; - shift = (v > 0x3) << 1; - v >>= shift; - r |= shift; - r |= (v >> 1); - return r; -} - -static unsigned long ccu_nkmp_calc_rate(unsigned long parent, - unsigned long n, unsigned long k, - unsigned long m, unsigned long p) -{ - u64 rate = parent; - - rate *= n * k; - rate /= (m * p); - - return rate; -} - -static void ccu_nkmp_find_best(unsigned long parent, unsigned long rate, - struct _ccu_nkmp *nkmp) -{ - unsigned long best_rate = 0; - unsigned long best_n = 0, best_k = 0, best_m = 0, best_p = 0; - unsigned long _n, _k, _m, _p; - - for (_k = nkmp->min_k; _k <= nkmp->max_k; _k++) - { - for (_n = nkmp->min_n; _n <= nkmp->max_n; _n++) - { - for (_m = nkmp->min_m; _m <= nkmp->max_m; _m++) - { - for (_p = nkmp->min_p; _p <= nkmp->max_p; _p <<= 1) - { - unsigned long tmp_rate; - - tmp_rate = ccu_nkmp_calc_rate(parent, - _n, _k, - _m, _p); - - if (tmp_rate > rate) - { - continue; - } - - if ((rate - tmp_rate) < (rate - best_rate)) - { - best_rate = tmp_rate; - best_n = _n; - best_k = _k; - best_m = _m; - best_p = _p; - } - } - } - } - } - - nkmp->n = best_n; - nkmp->k = best_k; - nkmp->m = best_m; - nkmp->p = best_p; -} - -static void ccu_nkmp_disable(struct clk_hw *hw) -{ - struct ccu_nkmp *nkmp = hw_to_ccu_nkmp(hw); - - return ccu_gate_helper_disable(&nkmp->common, nkmp->enable); -} - -static int ccu_nkmp_enable(struct clk_hw *hw) -{ - struct ccu_nkmp *nkmp = hw_to_ccu_nkmp(hw); - - return ccu_gate_helper_enable(&nkmp->common, nkmp->enable); -} - -static int ccu_nkmp_is_enabled(struct clk_hw *hw) -{ - struct ccu_nkmp *nkmp = hw_to_ccu_nkmp(hw); - - return ccu_gate_helper_is_enabled(&nkmp->common, nkmp->enable); -} - -static unsigned long ccu_nkmp_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - struct ccu_nkmp *nkmp = hw_to_ccu_nkmp(hw); - unsigned long n, m, k, p, rate; - u32 reg; - - reg = readl(nkmp->common.base + nkmp->common.reg); - - n = reg >> nkmp->n.shift; - n &= (1 << nkmp->n.width) - 1; - n += nkmp->n.offset; - if (!n) - { - n++; - } - - k = reg >> nkmp->k.shift; - k &= (1 << nkmp->k.width) - 1; - k += nkmp->k.offset; - if (!k) - { - k++; - } - - m = reg >> nkmp->m.shift; - m &= (1 << nkmp->m.width) - 1; - m += nkmp->m.offset; - if (!m) - { - m++; - } - - p = reg >> nkmp->p.shift; - p &= (1 << nkmp->p.width) - 1; - - rate = ccu_nkmp_calc_rate(parent_rate, n, k, m, 1 << p); - if (nkmp->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate /= nkmp->fixed_post_div; - } - - return rate; -} - -static long ccu_nkmp_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) -{ - struct ccu_nkmp *nkmp = hw_to_ccu_nkmp(hw); - struct _ccu_nkmp _nkmp; - - if (nkmp->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate *= nkmp->fixed_post_div; - } - - if (nkmp->max_rate && rate > nkmp->max_rate) - { - rate = nkmp->max_rate; - if (nkmp->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate /= nkmp->fixed_post_div; - } - return rate; - } - - _nkmp.min_n = nkmp->n.min ? : 1; - _nkmp.max_n = nkmp->n.max ? : 1 << nkmp->n.width; - _nkmp.min_k = nkmp->k.min ? : 1; - _nkmp.max_k = nkmp->k.max ? : 1 << nkmp->k.width; - _nkmp.min_m = 1; - _nkmp.max_m = nkmp->m.max ? : 1 << nkmp->m.width; - _nkmp.min_p = 1; - _nkmp.max_p = nkmp->p.max ? : 1 << ((1 << nkmp->p.width) - 1); - - ccu_nkmp_find_best(*parent_rate, rate, &_nkmp); - - rate = ccu_nkmp_calc_rate(*parent_rate, _nkmp.n, _nkmp.k, - _nkmp.m, _nkmp.p); - if (nkmp->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate = rate / nkmp->fixed_post_div; - } - - return rate; -} - -static int ccu_nkmp_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) -{ - struct ccu_nkmp *nkmp = hw_to_ccu_nkmp(hw); - u32 n_mask = 0, k_mask = 0, m_mask = 0, p_mask = 0; - struct _ccu_nkmp _nkmp; - u32 reg; - u32 __cspr; - - if (nkmp->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate = rate * nkmp->fixed_post_div; - } - - _nkmp.min_n = nkmp->n.min ? : 1; - _nkmp.max_n = nkmp->n.max ? : 1 << nkmp->n.width; - _nkmp.min_k = nkmp->k.min ? : 1; - _nkmp.max_k = nkmp->k.max ? : 1 << nkmp->k.width; - _nkmp.min_m = 1; - _nkmp.max_m = nkmp->m.max ? : 1 << nkmp->m.width; - _nkmp.min_p = 1; - _nkmp.max_p = nkmp->p.max ? : 1 << ((1 << nkmp->p.width) - 1); - - ccu_nkmp_find_best(parent_rate, rate, &_nkmp); - - /* - * If width is 0, GENMASK() macro may not generate expected mask (0) - * as it falls under undefined behaviour by C standard due to shifts - * which are equal or greater than width of left operand. This can - * be easily avoided by explicitly checking if width is 0. - */ - if (nkmp->n.width) - n_mask = GENMASK(nkmp->n.width + nkmp->n.shift - 1, - nkmp->n.shift); - if (nkmp->k.width) - k_mask = GENMASK(nkmp->k.width + nkmp->k.shift - 1, - nkmp->k.shift); - if (nkmp->m.width) - m_mask = GENMASK(nkmp->m.width + nkmp->m.shift - 1, - nkmp->m.shift); - if (nkmp->p.width) - p_mask = GENMASK(nkmp->p.width + nkmp->p.shift - 1, - nkmp->p.shift); - - __cspr = hal_spin_lock_irqsave(&nkmp->common.lock); - - reg = readl(nkmp->common.base + nkmp->common.reg); - reg &= ~(n_mask | k_mask | m_mask | p_mask); - - reg |= ((_nkmp.n - nkmp->n.offset) << nkmp->n.shift) & n_mask; - reg |= ((_nkmp.k - nkmp->k.offset) << nkmp->k.shift) & k_mask; - reg |= ((_nkmp.m - nkmp->m.offset) << nkmp->m.shift) & m_mask; - reg |= (ilog2(_nkmp.p) << nkmp->p.shift) & p_mask; - - writel(reg, nkmp->common.base + nkmp->common.reg); - - hal_spin_unlock_irqrestore(&nkmp->common.lock, __cspr); - - ccu_helper_wait_for_lock(&nkmp->common, nkmp->lock); - - return 0; -} - -const struct clk_ops ccu_nkmp_ops = -{ - .disable = ccu_nkmp_disable, - .enable = ccu_nkmp_enable, - .is_enabled = ccu_nkmp_is_enabled, - - .recalc_rate = ccu_nkmp_recalc_rate, - .round_rate = ccu_nkmp_round_rate, - .set_rate = ccu_nkmp_set_rate, -}; diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nkmp.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nkmp.h deleted file mode 100644 index 72ee08d3b5ab6ad4a77a712770596d632fe79e4e..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nkmp.h +++ /dev/null @@ -1,66 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2016 Maxime Ripard. All rights reserved. - */ - -#ifndef _CCU_NKMP_H_ -#define _CCU_NKMP_H_ - -#include "ccu.h" -#include "ccu_common.h" -#include "ccu_div.h" -#include "ccu_mult.h" - -/* - * struct ccu_nkmp - Definition of an N-K-M-P clock - * - * Clocks based on the formula parent * N * K >> P / M - */ -struct ccu_nkmp -{ - u32 enable; - u32 lock; - - struct ccu_mult_internal n; - struct ccu_mult_internal k; - struct ccu_div_internal m; - struct ccu_div_internal p; - - unsigned int fixed_post_div; - unsigned int max_rate; - - struct ccu_common common; -}; - -#define SUNXI_CCU_NKMP_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \ - _nshift, _nwidth, \ - _kshift, _kwidth, \ - _mshift, _mwidth, \ - _pshift, _pwidth, \ - _gate, _lock, _flags) \ -struct ccu_nkmp _struct = { \ - .enable = _gate, \ - .lock = _lock, \ - .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \ - .k = _SUNXI_CCU_MULT(_kshift, _kwidth), \ - .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ - .p = _SUNXI_CCU_DIV(_pshift, _pwidth), \ - .common = { \ - .reg = _reg, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &ccu_nkmp_ops, \ - _flags), \ - }, \ -} - -static inline struct ccu_nkmp *hw_to_ccu_nkmp(struct clk_hw *hw) -{ - struct ccu_common *common = hw_to_ccu_common(hw); - - return container_of(common, struct ccu_nkmp, common); -} - -extern const struct clk_ops ccu_nkmp_ops; - -#endif /* _CCU_NKMP_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nm.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nm.c deleted file mode 100644 index 841330a4658626cd7eb27785c91d03eb7c223c70..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nm.c +++ /dev/null @@ -1,281 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2016 Maxime Ripard - * Maxime Ripard - */ -#include "ccu.h" -#include "ccu_frac.h" -#include "ccu_gate.h" -#include "ccu_nm.h" - -struct _ccu_nm -{ - unsigned long n, min_n, max_n; - unsigned long m, min_m, max_m; -}; - -static unsigned long ccu_nm_calc_rate(unsigned long parent, - unsigned long n, unsigned long m) -{ - u64 rate = parent; - - rate *= n; - rate /= m; - - return rate; -} - -static void ccu_nm_find_best(unsigned long parent, unsigned long rate, - struct _ccu_nm *nm) -{ - unsigned long best_rate = 0; - unsigned long best_n = 0, best_m = 0; - unsigned long _n, _m; - - for (_n = nm->min_n; _n <= nm->max_n; _n++) - { - for (_m = nm->min_m; _m <= nm->max_m; _m++) - { - unsigned long tmp_rate = ccu_nm_calc_rate(parent, - _n, _m); - - if (tmp_rate > rate) - { - continue; - } - - if ((rate - tmp_rate) < (rate - best_rate)) - { - best_rate = tmp_rate; - best_n = _n; - best_m = _m; - } - } - } - - nm->n = best_n; - nm->m = best_m; -} - -static void ccu_nm_disable(struct clk_hw *hw) -{ - struct ccu_nm *nm = hw_to_ccu_nm(hw); - - return ccu_gate_helper_disable(&nm->common, nm->enable); -} - -static int ccu_nm_enable(struct clk_hw *hw) -{ - struct ccu_nm *nm = hw_to_ccu_nm(hw); - - return ccu_gate_helper_enable(&nm->common, nm->enable); -} - -static int ccu_nm_is_enabled(struct clk_hw *hw) -{ - struct ccu_nm *nm = hw_to_ccu_nm(hw); - - return ccu_gate_helper_is_enabled(&nm->common, nm->enable); -} - -static unsigned long ccu_nm_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - struct ccu_nm *nm = hw_to_ccu_nm(hw); - unsigned long rate; - unsigned long n, m; - u32 reg; - - if (ccu_frac_helper_is_enabled(&nm->common, &nm->frac)) - { - rate = ccu_frac_helper_read_rate(&nm->common, &nm->frac); - - if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate /= nm->fixed_post_div; - } - - return rate; - } - - reg = readl(nm->common.base + nm->common.reg); - - n = reg >> nm->n.shift; - n &= (1 << nm->n.width) - 1; - n += nm->n.offset; - if (!n) - { - n++; - } - - m = reg >> nm->m.shift; - m &= (1 << nm->m.width) - 1; - m += nm->m.offset; - if (!m) - { - m++; - } - - if (ccu_sdm_helper_is_enabled(&nm->common, &nm->sdm)) - { - rate = ccu_sdm_helper_read_rate(&nm->common, &nm->sdm, m, n); - } - else - { - rate = ccu_nm_calc_rate(parent_rate, n, m); - } - - if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate /= nm->fixed_post_div; - } - - return rate; -} - -static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) -{ - struct ccu_nm *nm = hw_to_ccu_nm(hw); - struct _ccu_nm _nm; - - if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate *= nm->fixed_post_div; - } - - if (rate < nm->min_rate) - { - rate = nm->min_rate; - if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate /= nm->fixed_post_div; - } - return rate; - } - - if (nm->max_rate && rate > nm->max_rate) - { - rate = nm->max_rate; - if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate /= nm->fixed_post_div; - } - return rate; - } - - if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) - { - if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate /= nm->fixed_post_div; - } - return rate; - } - - if (ccu_sdm_helper_has_rate(&nm->common, &nm->sdm, rate)) - { - if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate /= nm->fixed_post_div; - } - return rate; - } - - _nm.min_n = nm->n.min ? : 1; - _nm.max_n = nm->n.max ? : 1 << nm->n.width; - _nm.min_m = 1; - _nm.max_m = nm->m.max ? : 1 << nm->m.width; - - ccu_nm_find_best(*parent_rate, rate, &_nm); - rate = ccu_nm_calc_rate(*parent_rate, _nm.n, _nm.m); - - if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate /= nm->fixed_post_div; - } - - return rate; -} - -static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) -{ - struct ccu_nm *nm = hw_to_ccu_nm(hw); - struct _ccu_nm _nm; - u32 reg; - u32 __cspr; - - /* Adjust target rate according to post-dividers */ - if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV) - { - rate = rate * nm->fixed_post_div; - } - - if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) - { - __cspr = hal_spin_lock_irqsave(&nm->common.lock); - - /* most SoCs require M to be 0 if fractional mode is used */ - reg = readl(nm->common.base + nm->common.reg); - reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift); - writel(reg, nm->common.base + nm->common.reg); - - hal_spin_unlock_irqrestore(&nm->common.lock, __cspr); - - ccu_frac_helper_enable(&nm->common, &nm->frac); - - return ccu_frac_helper_set_rate(&nm->common, &nm->frac, - rate, nm->lock); - } - else - { - ccu_frac_helper_disable(&nm->common, &nm->frac); - } - - _nm.min_n = nm->n.min ? : 1; - _nm.max_n = nm->n.max ? : 1 << nm->n.width; - _nm.min_m = 1; - _nm.max_m = nm->m.max ? : 1 << nm->m.width; - - if (ccu_sdm_helper_has_rate(&nm->common, &nm->sdm, rate)) - { - ccu_sdm_helper_enable(&nm->common, &nm->sdm, rate); - - /* Sigma delta modulation requires specific N and M factors */ - ccu_sdm_helper_get_factors(&nm->common, &nm->sdm, rate, - &_nm.m, &_nm.n); - } - else - { - ccu_sdm_helper_disable(&nm->common, &nm->sdm); - ccu_nm_find_best(parent_rate, rate, &_nm); - } - - __cspr = hal_spin_lock_irqsave(&nm->common.lock); - - reg = readl(nm->common.base + nm->common.reg); - reg &= ~GENMASK(nm->n.width + nm->n.shift - 1, nm->n.shift); - reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift); - - reg |= (_nm.n - nm->n.offset) << nm->n.shift; - reg |= (_nm.m - nm->m.offset) << nm->m.shift; - writel(reg, nm->common.base + nm->common.reg); - - hal_spin_unlock_irqrestore(&nm->common.lock, __cspr); - - ccu_helper_wait_for_lock(&nm->common, nm->lock); - - return 0; -} - -const struct clk_ops ccu_nm_ops = -{ - .disable = ccu_nm_disable, - .enable = ccu_nm_enable, - .is_enabled = ccu_nm_is_enabled, - - .recalc_rate = ccu_nm_recalc_rate, - .round_rate = ccu_nm_round_rate, - .set_rate = ccu_nm_set_rate, -}; diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nm.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nm.h deleted file mode 100644 index bf64dbeca0f8236a9a4539b4deeff943aff9e796..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_nm.h +++ /dev/null @@ -1,167 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2016 Maxime Ripard. All rights reserved. - */ - -#ifndef _CCU_NM_H_ -#define _CCU_NM_H_ - -#include "ccu.h" -#include "ccu_common.h" -#include "ccu_div.h" -#include "ccu_frac.h" -#include "ccu_mult.h" -#include "ccu_sdm.h" - -/* - * struct ccu_nm - Definition of an N-M clock - * - * Clocks based on the formula parent * N / M - */ -struct ccu_nm -{ - u32 enable; - u32 lock; - - struct ccu_mult_internal n; - struct ccu_div_internal m; - struct ccu_frac_internal frac; - struct ccu_sdm_internal sdm; - - unsigned int fixed_post_div; - unsigned int min_rate; - unsigned int max_rate; - - struct ccu_common common; -}; - -#define SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(_struct, _name, _parent, _reg, \ - _nshift, _nwidth, \ - _mshift, _mwidth, \ - _sdm_table, _sdm_en, \ - _sdm_reg, _sdm_reg_en, \ - _gate, _lock, _flags) \ -struct ccu_nm _struct = { \ - .enable = _gate, \ - .lock = _lock, \ - .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \ - .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ - .sdm = _SUNXI_CCU_SDM(_sdm_table, _sdm_en, \ - _sdm_reg, _sdm_reg_en),\ - .common = { \ - .reg = _reg, \ - .features = CCU_FEATURE_SIGMA_DELTA_MOD, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &ccu_nm_ops, \ - _flags), \ - }, \ -} - -#define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(_struct, _name, _parent, _reg, \ - _nshift, _nwidth, \ - _mshift, _mwidth, \ - _frac_en, _frac_sel, \ - _frac_rate_0, _frac_rate_1, \ - _gate, _lock, _flags) \ -struct ccu_nm _struct = { \ - .enable = _gate, \ - .lock = _lock, \ - .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \ - .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ - .frac = _SUNXI_CCU_FRAC(_frac_en, _frac_sel, \ - _frac_rate_0, \ - _frac_rate_1), \ - .common = { \ - .reg = _reg, \ - .features = CCU_FEATURE_FRACTIONAL, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &ccu_nm_ops, \ - _flags), \ - }, \ -} - -#define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN(_struct, _name, _parent, \ - _reg, _min_rate, \ - _nshift, _nwidth, \ - _mshift, _mwidth, \ - _frac_en, _frac_sel, \ - _frac_rate_0, _frac_rate_1,\ - _gate, _lock, _flags) \ -struct ccu_nm _struct = { \ - .enable = _gate, \ - .lock = _lock, \ - .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \ - .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ - .frac = _SUNXI_CCU_FRAC(_frac_en, _frac_sel, \ - _frac_rate_0, \ - _frac_rate_1), \ - .min_rate = _min_rate, \ - .common = { \ - .reg = _reg, \ - .features = CCU_FEATURE_FRACTIONAL, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &ccu_nm_ops, \ - _flags), \ - }, \ -} - -#define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX(_struct, _name, \ - _parent, _reg, \ - _min_rate, _max_rate, \ - _nshift, _nwidth, \ - _mshift, _mwidth, \ - _frac_en, _frac_sel, \ - _frac_rate_0, \ - _frac_rate_1, \ - _gate, _lock, _flags) \ -struct ccu_nm _struct = { \ - .enable = _gate, \ - .lock = _lock, \ - .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \ - .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ - .frac = _SUNXI_CCU_FRAC(_frac_en, _frac_sel, \ - _frac_rate_0, \ - _frac_rate_1), \ - .min_rate = _min_rate, \ - .max_rate = _max_rate, \ - .common = { \ - .reg = _reg, \ - .features = CCU_FEATURE_FRACTIONAL, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &ccu_nm_ops, \ - _flags), \ - }, \ -} - -#define SUNXI_CCU_NM_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \ - _nshift, _nwidth, \ - _mshift, _mwidth, \ - _gate, _lock, _flags) \ -struct ccu_nm _struct = { \ - .enable = _gate, \ - .lock = _lock, \ - .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \ - .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ - .common = { \ - .reg = _reg, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &ccu_nm_ops, \ - _flags), \ - }, \ -} - -static inline struct ccu_nm *hw_to_ccu_nm(struct clk_hw *hw) -{ - struct ccu_common *common = hw_to_ccu_common(hw); - - return container_of(common, struct ccu_nm, common); -} - -extern const struct clk_ops ccu_nm_ops; - -#endif /* _CCU_NM_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_phase.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_phase.c deleted file mode 100644 index 2ea30f16e8dc83a2e834983199d3e99813bd73d1..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_phase.c +++ /dev/null @@ -1,143 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2016 Maxime Ripard - * Maxime Ripard - */ - -#include "ccu.h" -#include "ccu_phase.h" - -static int ccu_phase_get_phase(struct clk_hw *hw) -{ - struct ccu_phase *phase = hw_to_ccu_phase(hw); - struct clk_hw *parent, *grandparent; - unsigned int parent_rate, grandparent_rate; - u16 step, parent_div; - u32 reg; - u8 delay; - - reg = readl(phase->common.base + phase->common.reg); - delay = (reg >> phase->shift); - delay &= (1 << phase->width) - 1; - - if (!delay) - { - return 180; - } - - /* Get our parent clock, it's the one that can adjust its rate */ - parent = clk_hw_get_parent(hw); - if (!parent) - { - return -EINVAL; - } - - /* And its rate */ - parent_rate = clk_hw_get_rate(parent); - if (!parent_rate) - { - return -EINVAL; - } - - /* Now, get our parent's parent (most likely some PLL) */ - grandparent = clk_hw_get_parent(parent); - if (!grandparent) - { - return -EINVAL; - } - - /* And its rate */ - grandparent_rate = clk_hw_get_rate(grandparent); - if (!grandparent_rate) - { - return -EINVAL; - } - - /* Get our parent clock divider */ - parent_div = grandparent_rate / parent_rate; - - step = DIV_ROUND_CLOSEST(360, parent_div); - return delay * step; -} - -static int ccu_phase_set_phase(struct clk_hw *hw, int degrees) -{ - struct ccu_phase *phase = hw_to_ccu_phase(hw); - struct clk_hw *parent, *grandparent; - unsigned int parent_rate, grandparent_rate; - unsigned long flags; - u32 reg; - u8 delay; - u32 __cspr; - - /* Get our parent clock, it's the one that can adjust its rate */ - parent = clk_hw_get_parent(hw); - if (!parent) - { - return -EINVAL; - } - - /* And its rate */ - parent_rate = clk_hw_get_rate(parent); - if (!parent_rate) - { - return -EINVAL; - } - - /* Now, get our parent's parent (most likely some PLL) */ - grandparent = clk_hw_get_parent(parent); - if (!grandparent) - { - return -EINVAL; - } - - /* And its rate */ - grandparent_rate = clk_hw_get_rate(grandparent); - if (!grandparent_rate) - { - return -EINVAL; - } - - if (degrees != 180) - { - u16 step, parent_div; - - /* Get our parent divider */ - parent_div = grandparent_rate / parent_rate; - - /* - * We can only outphase the clocks by multiple of the - * PLL's period. - * - * Since our parent clock is only a divider, and the - * formula to get the outphasing in degrees is deg = - * 360 * delta / period - * - * If we simplify this formula, we can see that the - * only thing that we're concerned about is the number - * of period we want to outphase our clock from, and - * the divider set by our parent clock. - */ - step = DIV_ROUND_CLOSEST(360, parent_div); - delay = DIV_ROUND_CLOSEST(degrees, step); - } - else - { - delay = 0; - } - - __cspr = hal_spin_lock_irqsave(&phase->common.lock); - reg = readl(phase->common.base + phase->common.reg); - reg &= ~GENMASK(phase->width + phase->shift - 1, phase->shift); - writel(reg | (delay << phase->shift), - phase->common.base + phase->common.reg); - hal_spin_unlock_irqrestore(&phase->common.lock, __cspr); - - return 0; -} - -const struct clk_ops ccu_phase_ops = -{ - .get_phase = ccu_phase_get_phase, - .set_phase = ccu_phase_set_phase, -}; diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_phase.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_phase.h deleted file mode 100644 index 9e1214b71470921e0bec03140a1629b43bbebb5f..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_phase.h +++ /dev/null @@ -1,42 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2016 Maxime Ripard. All rights reserved. - */ - -#ifndef _CCU_PHASE_H_ -#define _CCU_PHASE_H_ - -#include "ccu.h" -#include "ccu_common.h" - -struct ccu_phase -{ - u8 shift; - u8 width; - - struct ccu_common common; -}; - -#define SUNXI_CCU_PHASE(_struct, _name, _parent, _reg, _shift, _width, _flags) \ - struct ccu_phase _struct = { \ - .shift = _shift, \ - .width = _width, \ - .common = { \ - .reg = _reg, \ - .hw.init = CLK_HW_INIT(_name, \ - _parent, \ - &ccu_phase_ops, \ - _flags), \ - } \ - } - -static inline struct ccu_phase *hw_to_ccu_phase(struct clk_hw *hw) -{ - struct ccu_common *common = hw_to_ccu_common(hw); - - return container_of(common, struct ccu_phase, common); -} - -extern const struct clk_ops ccu_phase_ops; - -#endif /* _CCU_PHASE_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_reset.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_reset.c deleted file mode 100644 index 212accab9a14529a54802a288789e0883e9dc74f..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_reset.c +++ /dev/null @@ -1,89 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2016 Maxime Ripard - * Maxime Ripard - */ -#include "ccu.h" -#include "ccu_reset.h" -#include -#include -#include - -/* FIXME: use udelay provided by OS */ -static void __clk_udelay(u32 ns) -{ - u32 i; - ns *= 100; - for (i = 0; i < ns; i ++) - { - ; - } -} - -static int ccu_reset_assert(struct reset_control_dev *rcdev, - hal_reset_id_t id) -{ - struct ccu_reset *ccu = rc_to_ccu_reset(rcdev); - const struct ccu_reset_map *map = &ccu->reset_map[id]; - u32 reg; - u32 __cspr; - - __cspr = hal_spin_lock_irqsave(&ccu->lock); - - reg = readl(ccu->base + map->reg); - writel(reg & ~map->bit, ccu->base + map->reg); - - hal_spin_unlock_irqrestore(&ccu->lock, __cspr); - - return 0; -} - -static int ccu_reset_deassert(struct reset_control_dev *rcdev, - hal_reset_id_t id) -{ - struct ccu_reset *ccu = rc_to_ccu_reset(rcdev); - - const struct ccu_reset_map *map = &ccu->reset_map[id]; - u32 reg; - u32 __cspr; - - __cspr = hal_spin_lock_irqsave(&ccu->lock); - - reg = readl(ccu->base + map->reg); - writel(reg | map->bit, ccu->base + map->reg); - - hal_spin_unlock_irqrestore(&ccu->lock, __cspr); - - return 0; -} - -static int ccu_reset_reset(struct reset_control_dev *rcdev, - hal_reset_id_t id) -{ - ccu_reset_assert(rcdev, id); - __clk_udelay(10); - ccu_reset_deassert(rcdev, id); - - return 0; -} - -static int ccu_reset_status(struct reset_control_dev *rcdev, - hal_reset_id_t id) -{ - struct ccu_reset *ccu = rc_to_ccu_reset(rcdev); - const struct ccu_reset_map *map = &ccu->reset_map[id]; - - /* - * The reset control API expects 0 if reset is not asserted, - * which is the opposite of what our hardware uses. - */ - return !(map->bit & readl(ccu->base + map->reg)); -} - -const struct reset_control_ops ccu_reset_ops = -{ - .assert = ccu_reset_assert, - .deassert = ccu_reset_deassert, - .reset = ccu_reset_reset, - .status = ccu_reset_status, -}; diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_reset.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_reset.h deleted file mode 100644 index 63386cbe7514a72cbd57a770cf27d9e91ec1382e..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_reset.h +++ /dev/null @@ -1,35 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2016 Maxime Ripard. All rights reserved. - */ - -#ifndef _CCU_RESET_H_ -#define _CCU_RESET_H_ - -#include -#include - -struct ccu_reset_map -{ - u32 reg; - u32 bit; -}; - -struct ccu_reset -{ - unsigned long base; - - struct ccu_reset_map *reset_map; - hal_spinlock_t lock; - - struct reset_control_dev rcdev; -}; - -static inline struct ccu_reset *rc_to_ccu_reset(struct reset_control_dev *rcdev) -{ - return container_of(rcdev, struct ccu_reset, rcdev); -} - -extern const struct reset_control_ops ccu_reset_ops; - -#endif /* _CCU_RESET_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_sdm.c b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_sdm.c deleted file mode 100644 index 71f29de69f088961284a25e547da42d3529647ef..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_sdm.c +++ /dev/null @@ -1,172 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2017 Chen-Yu Tsai - */ -#include "ccu.h" -#include "ccu_sdm.h" -#include -#include - -bool ccu_sdm_helper_is_enabled(struct ccu_common *common, - struct ccu_sdm_internal *sdm) -{ - if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD)) - { - return false; - } - - if (sdm->enable && !(readl(common->base + common->reg) & sdm->enable)) - { - return false; - } - - return !!(readl(common->base + sdm->tuning_reg) & sdm->tuning_enable); -} - -void ccu_sdm_helper_enable(struct ccu_common *common, - struct ccu_sdm_internal *sdm, - unsigned long rate) -{ - unsigned int i; - u32 reg; - u32 __cspr; - - if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD)) - { - return; - } - - /* Set the pattern */ - for (i = 0; i < sdm->table_size; i++) - if (sdm->table[i].rate == rate) - writel(sdm->table[i].pattern, - common->base + sdm->tuning_reg); - - /* Make sure SDM is enabled */ - __cspr = hal_spin_lock_irqsave(&common->lock); - reg = readl(common->base + sdm->tuning_reg); - writel(reg | sdm->tuning_enable, common->base + sdm->tuning_reg); - hal_spin_unlock_irqrestore(&common->lock, __cspr); - - __cspr = hal_spin_lock_irqsave(&common->lock); - reg = readl(common->base + common->reg); - writel(reg | sdm->enable, common->base + common->reg); - hal_spin_unlock_irqrestore(&common->lock, __cspr); -} - -void ccu_sdm_helper_disable(struct ccu_common *common, - struct ccu_sdm_internal *sdm) -{ - u32 reg; - u32 __cspr; - - if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD)) - { - return; - } - - __cspr = hal_spin_lock_irqsave(&common->lock); - reg = readl(common->base + common->reg); - writel(reg & ~sdm->enable, common->base + common->reg); - hal_spin_unlock_irqrestore(&common->lock, __cspr); - - __cspr = hal_spin_lock_irqsave(&common->lock); - reg = readl(common->base + sdm->tuning_reg); - writel(reg & ~sdm->tuning_enable, common->base + sdm->tuning_reg); - hal_spin_unlock_irqrestore(&common->lock, __cspr); -} - -/* - * Sigma delta modulation provides a way to do fractional-N frequency - * synthesis, in essence allowing the PLL to output any frequency - * within its operational range. On earlier SoCs such as the A10/A20, - * some PLLs support this. On later SoCs, all PLLs support this. - * - * The datasheets do not explain what the "wave top" and "wave bottom" - * parameters mean or do, nor how to calculate the effective output - * frequency. The only examples (and real world usage) are for the audio - * PLL to generate 24.576 and 22.5792 MHz clock rates used by the audio - * peripherals. The author lacks the underlying domain knowledge to - * pursue this. - * - * The goal and function of the following code is to support the two - * clock rates used by the audio subsystem, allowing for proper audio - * playback and capture without any pitch or speed changes. - */ -bool ccu_sdm_helper_has_rate(struct ccu_common *common, - struct ccu_sdm_internal *sdm, - unsigned long rate) -{ - unsigned int i; - - if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD)) - { - return false; - } - - for (i = 0; i < sdm->table_size; i++) - if (sdm->table[i].rate == rate) - { - return true; - } - - return false; -} - -unsigned long ccu_sdm_helper_read_rate(struct ccu_common *common, - struct ccu_sdm_internal *sdm, - u32 m, u32 n) -{ - unsigned int i; - u32 reg; - - hal_log_debug("%s: Read sigma-delta modulation setting\n", - clk_hw_get_name(&common->hw)); - - if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD)) - { - return 0; - } - - hal_log_debug("%s: clock is sigma-delta modulated\n", - clk_hw_get_name(&common->hw)); - - reg = readl(common->base + sdm->tuning_reg); - - hal_log_debug("%s: pattern reg is 0x%x", - clk_hw_get_name(&common->hw), reg); - - for (i = 0; i < sdm->table_size; i++) - if (sdm->table[i].pattern == reg && - sdm->table[i].m == m && sdm->table[i].n == n) - { - return sdm->table[i].rate; - } - - /* We can't calculate the effective clock rate, so just fail. */ - return 0; -} - -int ccu_sdm_helper_get_factors(struct ccu_common *common, - struct ccu_sdm_internal *sdm, - unsigned long rate, - unsigned long *m, unsigned long *n) -{ - unsigned int i; - - if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD)) - { - return -1; - } - - for (i = 0; i < sdm->table_size; i++) - if (sdm->table[i].rate == rate) - { - *m = sdm->table[i].m; - *n = sdm->table[i].n; - return 0; - } - - /* nothing found */ - return -1; -} diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_sdm.h b/src/platform/f133/hal/ccmu/sunxi-ng/ccu_sdm.h deleted file mode 100644 index 1f0e6178820da9bc942d4ed5194cb9e728b95540..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/ccu_sdm.h +++ /dev/null @@ -1,73 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2017 Chen-Yu Tsai. All rights reserved. - */ - -#ifndef _CCU_SDM_H -#define _CCU_SDM_H - -#include "ccu.h" -#include "ccu_common.h" - -struct ccu_sdm_setting -{ - unsigned long rate; - - /* - * XXX We don't know what the step and bottom register fields - * mean. Just copy the whole register value from the vendor - * kernel for now. - */ - u32 pattern; - - /* - * M and N factors here should be the values used in - * calculation, not the raw values written to registers - */ - u32 m; - u32 n; -}; - -struct ccu_sdm_internal -{ - struct ccu_sdm_setting *table; - u32 table_size; - /* early SoCs don't have the SDM enable bit in the PLL register */ - u32 enable; - /* second enable bit in tuning register */ - u32 tuning_enable; - u32 tuning_reg; -}; - -#define _SUNXI_CCU_SDM(_table, _enable, \ - _reg, _reg_enable) \ -{ \ - .table = _table, \ - .table_size = ARRAY_SIZE(_table), \ - .enable = _enable, \ - .tuning_enable = _reg_enable, \ - .tuning_reg = _reg, \ -} - -bool ccu_sdm_helper_is_enabled(struct ccu_common *common, - struct ccu_sdm_internal *sdm); -void ccu_sdm_helper_enable(struct ccu_common *common, - struct ccu_sdm_internal *sdm, - unsigned long rate); -void ccu_sdm_helper_disable(struct ccu_common *common, - struct ccu_sdm_internal *sdm); - -bool ccu_sdm_helper_has_rate(struct ccu_common *common, - struct ccu_sdm_internal *sdm, - unsigned long rate); - -unsigned long ccu_sdm_helper_read_rate(struct ccu_common *common, - struct ccu_sdm_internal *sdm, - u32 m, u32 n); - -int ccu_sdm_helper_get_factors(struct ccu_common *common, - struct ccu_sdm_internal *sdm, - unsigned long rate, - unsigned long *m, unsigned long *n); - -#endif diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/clk-divider.c b/src/platform/f133/hal/ccmu/sunxi-ng/clk-divider.c deleted file mode 100644 index e032bc6d038c3cb631f343b75fed1e833ad5cd6a..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/clk-divider.c +++ /dev/null @@ -1,666 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (C) 2011 Sascha Hauer, Pengutronix - * Copyright (C) 2011 Richard Zhao, Linaro - * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd - * - * Adjustable divider clock implementation - */ -#include "ccu.h" -#include -/* - * DOC: basic adjustable divider clock that cannot gate - * - * Traits of this clock: - * prepare - clk_prepare only ensures that parents are prepared - * enable - clk_enable only ensures that parents are enabled - * rate - rate is adjustable. clk->rate = ceiling(parent->rate / divisor) - * parent - fixed parent. No clk_set_parent support - */ - -static inline u32 clk_div_readl(struct clk_divider *divider) -{ - return readl(divider->reg); -} - -static inline void clk_div_writel(struct clk_divider *divider, u32 val) -{ - writel(val, divider->reg); -} - -static unsigned int _get_table_maxdiv(const struct clk_div_table *table, - u8 width) -{ - unsigned int maxdiv = 0, mask = clk_div_mask(width); - const struct clk_div_table *clkt; - - for (clkt = table; clkt->div; clkt++) - if (clkt->div > maxdiv && clkt->val <= mask) - { - maxdiv = clkt->div; - } - return maxdiv; -} - -static unsigned int _get_table_mindiv(const struct clk_div_table *table) -{ - unsigned int mindiv = UINT_MAX; - const struct clk_div_table *clkt; - - for (clkt = table; clkt->div; clkt++) - if (clkt->div < mindiv) - { - mindiv = clkt->div; - } - return mindiv; -} - -static unsigned int _get_maxdiv(const struct clk_div_table *table, u8 width, - unsigned long flags) -{ - if (flags & CLK_DIVIDER_ONE_BASED) - { - return clk_div_mask(width); - } - if (flags & CLK_DIVIDER_POWER_OF_TWO) - { - return 1 << clk_div_mask(width); - } - if (table) - { - return _get_table_maxdiv(table, width); - } - return clk_div_mask(width) + 1; -} - -static unsigned int _get_table_div(const struct clk_div_table *table, - unsigned int val) -{ - const struct clk_div_table *clkt; - - for (clkt = table; clkt->div; clkt++) - if (clkt->val == val) - { - return clkt->div; - } - return 0; -} - -static unsigned int _get_div(const struct clk_div_table *table, - unsigned int val, unsigned long flags, u8 width) -{ - if (flags & CLK_DIVIDER_ONE_BASED) - { - return val; - } - if (flags & CLK_DIVIDER_POWER_OF_TWO) - { - return 1 << val; - } - if (flags & CLK_DIVIDER_MAX_AT_ZERO) - { - return val ? val : clk_div_mask(width) + 1; - } - if (table) - { - return _get_table_div(table, val); - } - return val + 1; -} - -static unsigned int _get_table_val(const struct clk_div_table *table, - unsigned int div) -{ - const struct clk_div_table *clkt; - - for (clkt = table; clkt->div; clkt++) - if (clkt->div == div) - { - return clkt->val; - } - return 0; -} - -static inline int __ffs(uint32_t value) -{ - uint32_t offset; - - for (offset = 0; offset < sizeof(value) * 8; offset++) - { - if (value & (1 << offset)) - { - return offset; - } - } - return -1; -} - -static unsigned int _get_val(const struct clk_div_table *table, - unsigned int div, unsigned long flags, u8 width) -{ - if (flags & CLK_DIVIDER_ONE_BASED) - { - return div; - } - if (flags & CLK_DIVIDER_POWER_OF_TWO) - { - return __ffs(div); - } - if (flags & CLK_DIVIDER_MAX_AT_ZERO) - { - return (div == clk_div_mask(width) + 1) ? 0 : div; - } - if (table) - { - return _get_table_val(table, div); - } - return div - 1; -} - -unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate, - unsigned int val, - const struct clk_div_table *table, - unsigned long flags, unsigned long width) -{ - unsigned int div; - - div = _get_div(table, val, flags, width); - if (!div) - { - return parent_rate; - } - - return DIV_ROUND_UP_ULL((u64)parent_rate, div); -} - -static unsigned long clk_divider_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - struct clk_divider *divider = to_clk_divider(hw); - unsigned int val; - - val = clk_div_readl(divider) >> divider->shift; - val &= clk_div_mask(divider->width); - - return divider_recalc_rate(hw, parent_rate, val, divider->table, - divider->flags, divider->width); -} - -static bool _is_valid_table_div(const struct clk_div_table *table, - unsigned int div) -{ - const struct clk_div_table *clkt; - - for (clkt = table; clkt->div; clkt++) - if (clkt->div == div) - { - return true; - } - return false; -} - -static int is_power_of_2(unsigned long n) -{ - return (n != 0 && ((n & (n - 1)) == 0)); -} - -static bool _is_valid_div(const struct clk_div_table *table, unsigned int div, - unsigned long flags) -{ - if (flags & CLK_DIVIDER_POWER_OF_TWO) - { - return is_power_of_2(div); - } - if (table) - { - return _is_valid_table_div(table, div); - } - return true; -} - -static int _round_up_table(const struct clk_div_table *table, int div) -{ - const struct clk_div_table *clkt; - int up = INT_MAX; - - for (clkt = table; clkt->div; clkt++) - { - if (clkt->div == div) - { - return clkt->div; - } - else if (clkt->div < div) - { - continue; - } - - if ((clkt->div - div) < (up - div)) - { - up = clkt->div; - } - } - - return up; -} - -static int _round_down_table(const struct clk_div_table *table, int div) -{ - const struct clk_div_table *clkt; - int down = _get_table_mindiv(table); - - for (clkt = table; clkt->div; clkt++) - { - if (clkt->div == div) - { - return clkt->div; - } - else if (clkt->div > div) - { - continue; - } - - if ((div - clkt->div) < (div - down)) - { - down = clkt->div; - } - } - - return down; -} - -static int __roundup_pow_of_two(unsigned int x) -{ - return 1UL << fls(x - 1); -} - -static int __rounddown_pow_of_two(unsigned int x) -{ - return (1UL << fls(x - 1)) / 2; -} - -static int _div_round_up(const struct clk_div_table *table, - unsigned long parent_rate, unsigned long rate, - unsigned long flags) -{ - int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); - - if (flags & CLK_DIVIDER_POWER_OF_TWO) - { - div = __roundup_pow_of_two(div); - } - if (table) - { - div = _round_up_table(table, div); - } - - return div; -} - -static int _div_round_closest(const struct clk_div_table *table, - unsigned long parent_rate, unsigned long rate, - unsigned long flags) -{ - int up, down; - unsigned long up_rate, down_rate; - - up = DIV_ROUND_UP_ULL((u64)parent_rate, rate); - down = parent_rate / rate; - - if (flags & CLK_DIVIDER_POWER_OF_TWO) - { - up = __roundup_pow_of_two(up); - down = __rounddown_pow_of_two(down); - } - else if (table) - { - up = _round_up_table(table, up); - down = _round_down_table(table, down); - } - - up_rate = DIV_ROUND_UP_ULL((u64)parent_rate, up); - down_rate = DIV_ROUND_UP_ULL((u64)parent_rate, down); - - return (rate - up_rate) <= (down_rate - rate) ? up : down; -} - -static int _div_round(const struct clk_div_table *table, - unsigned long parent_rate, unsigned long rate, - unsigned long flags) -{ - if (flags & CLK_DIVIDER_ROUND_CLOSEST) - { - return _div_round_closest(table, parent_rate, rate, flags); - } - - return _div_round_up(table, parent_rate, rate, flags); -} - -static bool _is_best_div(unsigned long rate, unsigned long now, - unsigned long best, unsigned long flags) -{ - if (flags & CLK_DIVIDER_ROUND_CLOSEST) - { - return abs(rate - now) < abs(rate - best); - } - - return now <= rate && now > best; -} - -static int _next_div(const struct clk_div_table *table, int div, - unsigned long flags) -{ - div++; - - if (flags & CLK_DIVIDER_POWER_OF_TWO) - { - return __roundup_pow_of_two(div); - } - if (table) - { - return _round_up_table(table, div); - } - - return div; -} - -static int clk_divider_bestdiv(struct clk_hw *hw, struct clk_hw *parent, - unsigned long rate, - unsigned long *best_parent_rate, - const struct clk_div_table *table, u8 width, - unsigned long flags) -{ - int i, bestdiv = 0; - unsigned long parent_rate, best = 0, now, maxdiv; - unsigned long parent_rate_saved = *best_parent_rate; - - if (!rate) - { - rate = 1; - } - - maxdiv = _get_maxdiv(table, width, flags); - - if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)) - { - parent_rate = *best_parent_rate; - bestdiv = _div_round(table, parent_rate, rate, flags); - bestdiv = bestdiv == 0 ? 1 : bestdiv; - bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv; - return bestdiv; - } - - /* - * The maximum divider we can use without overflowing - * unsigned long in rate * i below - */ - maxdiv = min(ULONG_MAX / rate, maxdiv); - - for (i = _next_div(table, 0, flags); i <= maxdiv; - i = _next_div(table, i, flags)) - { - if (rate * i == parent_rate_saved) - { - /* - * It's the most ideal case if the requested rate can be - * divided from parent clock without needing to change - * parent rate, so return the divider immediately. - */ - *best_parent_rate = parent_rate_saved; - return i; - } - parent_rate = clk_hw_round_rate(parent, rate * i); - now = DIV_ROUND_UP_ULL((u64)parent_rate, i); - if (_is_best_div(rate, now, best, flags)) - { - bestdiv = i; - best = now; - *best_parent_rate = parent_rate; - } - } - - if (!bestdiv) - { - bestdiv = _get_maxdiv(table, width, flags); - *best_parent_rate = clk_hw_round_rate(parent, 1); - } - - return bestdiv; -} - -long divider_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent, - unsigned long rate, unsigned long *prate, - const struct clk_div_table *table, - u8 width, unsigned long flags) -{ - int div; - - div = clk_divider_bestdiv(hw, parent, rate, prate, table, width, flags); - - return DIV_ROUND_UP_ULL((u64) * prate, div); -} - -long divider_ro_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent, - unsigned long rate, unsigned long *prate, - const struct clk_div_table *table, u8 width, - unsigned long flags, unsigned int val) -{ - int div; - - div = _get_div(table, val, flags, width); - - /* Even a read-only clock can propagate a rate change */ - if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) - { - if (!parent) - { - return -1; - } - - *prate = clk_hw_round_rate(parent, rate * div); - } - - return DIV_ROUND_UP_ULL((u64) * prate, div); -} - -static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) -{ - struct clk_divider *divider = to_clk_divider(hw); - - /* if read only, just return current value */ - if (divider->flags & CLK_DIVIDER_READ_ONLY) - { - u32 val; - - val = clk_div_readl(divider) >> divider->shift; - val &= clk_div_mask(divider->width); - - return divider_ro_round_rate(hw, rate, prate, divider->table, - divider->width, divider->flags, - val); - } - - return divider_round_rate(hw, rate, prate, divider->table, - divider->width, divider->flags); -} - -int divider_get_val(unsigned long rate, unsigned long parent_rate, - const struct clk_div_table *table, u8 width, - unsigned long flags) -{ - unsigned int div, value; - - div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); - - if (!_is_valid_div(table, div, flags)) - { - return -1; - } - - value = _get_val(table, div, flags, width); - - return min(value, clk_div_mask(width)); -} - -static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) -{ - struct clk_divider *divider = to_clk_divider(hw); - int value; - u32 val; - u32 __cspr; - - value = divider_get_val(rate, parent_rate, divider->table, - divider->width, divider->flags); - if (value < 0) - { - return value; - } - - __cspr = hal_spin_lock_irqsave(÷r->lock); - - if (divider->flags & CLK_DIVIDER_HIWORD_MASK) - { - val = clk_div_mask(divider->width) << (divider->shift + 16); - } - else - { - val = clk_div_readl(divider); - val &= ~(clk_div_mask(divider->width) << divider->shift); - } - val |= (u32)value << divider->shift; - clk_div_writel(divider, val); - - hal_spin_unlock_irqrestore(÷r->lock, __cspr); - - return 0; -} - -const struct clk_ops clk_divider_ops = -{ - .recalc_rate = clk_divider_recalc_rate, - .round_rate = clk_divider_round_rate, - .set_rate = clk_divider_set_rate, -}; - -const struct clk_ops clk_divider_ro_ops = -{ - .recalc_rate = clk_divider_recalc_rate, - .round_rate = clk_divider_round_rate, -}; - -static struct clk_hw *_register_divider(const char *name, - const char *parent_name, unsigned long flags, - u32 reg, u8 shift, u8 width, - u8 clk_divider_flags, const struct clk_div_table *table, - hal_spinlock_t lock) -{ - struct clk_divider *div; - struct clk_hw *hw; - struct clk_init_data init; - int ret; - - if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) - { - if (width + shift > 16) - { - return NULL; - } - } - - div = malloc(sizeof(*div)); - if (!div) - { - return NULL; - } - - init.name = name; - if (clk_divider_flags & CLK_DIVIDER_READ_ONLY) - { - init.ops = &clk_divider_ro_ops; - } - else - { - init.ops = &clk_divider_ops; - } - init.flags = flags; - init.parent_names = (parent_name ? &parent_name : NULL); - init.num_parents = (parent_name ? 1 : 0); - - /* struct clk_divider assignments */ - div->reg = reg; - div->shift = shift; - div->width = width; - div->flags = clk_divider_flags; - div->lock = lock; - div->hw.init = &init; - div->table = table; - - /* register the clock */ - hw = &(div->hw); - ret = clk_hw_register(hw); - if (ret) - { - free(div); - hw = NULL; - } - - return hw; -} - -/** - * clk_hw_register_divider - register a divider clock with the clock framework - * @name: name of this clock - * @parent_name: name of clock's parent - * @flags: framework-specific flags - * @reg: register address to adjust divider - * @shift: number of bits to shift the bitfield - * @width: width of the bitfield - * @clk_divider_flags: divider-specific flags for this clock - * @lock: shared register lock for this clock - */ -struct clk_hw *clk_hw_register_divider(const char *name, - const char *parent_name, unsigned long flags, - u32 reg, u8 shift, u8 width, - u8 clk_divider_flags, hal_spinlock_t lock) -{ - return _register_divider(name, parent_name, flags, reg, shift, - width, clk_divider_flags, NULL, lock); -} - -/** - * clk_hw_register_divider_table - register a table based divider clock with - * the clock framework - * @name: name of this clock - * @parent_name: name of clock's parent - * @flags: framework-specific flags - * @reg: register address to adjust divider - * @shift: number of bits to shift the bitfield - * @width: width of the bitfield - * @clk_divider_flags: divider-specific flags for this clock - * @table: array of divider/value pairs ending with a div set to 0 - * @lock: shared register lock for this clock - */ -struct clk_hw *clk_hw_register_divider_table(const char *name, - const char *parent_name, unsigned long flags, - u32 reg, u8 shift, u8 width, - u8 clk_divider_flags, const struct clk_div_table *table, - hal_spinlock_t lock) -{ - return _register_divider(name, parent_name, flags, reg, shift, - width, clk_divider_flags, table, lock); -} - -/** - * clk_hw_unregister_divider - unregister a clk divider - * @hw: hardware-specific clock data to unregister - */ -void clk_hw_unregister_divider(struct clk_hw *hw) -{ - struct clk_divider *div; - - div = to_clk_divider(hw); - - clk_hw_unregister(hw); - free(div); -} diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/clk-fixed-factor.c b/src/platform/f133/hal/ccmu/sunxi-ng/clk-fixed-factor.c deleted file mode 100644 index e031034afebf3718e181d0a3cd32cc9668108585..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/clk-fixed-factor.c +++ /dev/null @@ -1,70 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (C) 2011 Sascha Hauer, Pengutronix - */ -#include "ccu.h" - -/* - * DOC: basic fixed multiplier and divider clock that cannot gate - * - * Traits of this clock: - * prepare - clk_prepare only ensures that parents are prepared - * enable - clk_enable only ensures that parents are enabled - * rate - rate is fixed. clk->rate = parent->rate / div * mult - * parent - fixed parent. No clk_set_parent support - */ - -static unsigned long clk_factor_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - struct clk_fixed_factor *fix = to_clk_fixed_factor(hw); - unsigned long long int rate; - - rate = (unsigned long long int)parent_rate * fix->mult; - rate /= fix->div; - return (unsigned long)rate; -} - -static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) -{ - struct clk_fixed_factor *fix = to_clk_fixed_factor(hw); - - if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) - { - unsigned long best_parent; - - best_parent = (rate / fix->mult) * fix->div; - *prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent); - } - - return (*prate / fix->div) * fix->mult; -} - -static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) -{ - struct clk_fixed_factor *fix = to_clk_fixed_factor(hw); - /* - * We must report success but we can do so unconditionally because - * clk_factor_round_rate returns values that ensure this call is a - * nop. - */ - if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) - { - unsigned long p_rate; - - p_rate = (rate / fix->mult) * fix->div; - return clk_hw_set_rate(clk_hw_get_parent(hw), p_rate); - - } - - return 0; -} - -const struct clk_ops clk_fixed_factor_ops = -{ - .round_rate = clk_factor_round_rate, - .set_rate = clk_factor_set_rate, - .recalc_rate = clk_factor_recalc_rate, -}; diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/clk-fixed-rate.c b/src/platform/f133/hal/ccmu/sunxi-ng/clk-fixed-rate.c deleted file mode 100644 index 993dedb372127c481312ca6b4438f3ac7b45a135..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/clk-fixed-rate.c +++ /dev/null @@ -1,158 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (C) 2010-2011 Canonical Ltd - * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd - * - * Fixed rate clock implementation - */ -#include "ccu.h" -#include "clk-fixed-rate.h" -#include -/* - * DOC: basic fixed-rate clock that cannot gate - * - * Traits of this clock: - * prepare - clk_(un)prepare only ensures parents are prepared - * enable - clk_enable only ensures parents are enabled - * rate - rate is always a fixed value. No clk_set_rate support - * parent - fixed parent. No clk_set_parent support - */ - -static unsigned long clk_fixed_rate_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - return to_clk_fixed_rate(hw)->fixed_rate; -} - -static unsigned long clk_fixed_rate_recalc_accuracy(struct clk_hw *hw, - unsigned long parent_accuracy) -{ - return to_clk_fixed_rate(hw)->fixed_accuracy; -} - -const struct clk_ops clk_fixed_rate_ops = -{ - .recalc_rate = clk_fixed_rate_recalc_rate, - .recalc_accuracy = clk_fixed_rate_recalc_accuracy, -}; - -/** - * clk_hw_register_fixed_rate_with_accuracy - register fixed-rate clock with - * the clock framework - * @dev: device that is registering this clock - * @name: name of this clock - * @parent_name: name of clock's parent - * @flags: framework-specific flags - * @fixed_rate: non-adjustable clock rate - * @fixed_accuracy: non-adjustable clock rate - */ -int clk_hw_register_fixed_rate_with_accuracy( - const char *name, u32 id, const char *parent_name, unsigned long flags, - unsigned long fixed_rate, unsigned long fixed_accuracy) -{ - struct clk_fixed_rate *fixed; - struct clk_hw *hw; - struct clk_init_data init; - int ret; - - /* allocate fixed-rate clock */ - fixed = (struct clk_fixed_rate *)malloc(sizeof(*fixed)); - if (!fixed) - { - return -1; - } - - memset(fixed, 0, sizeof(*fixed)); - init.name = name; - init.ops = &clk_fixed_rate_ops; - init.flags = flags; - init.parent_names = (parent_name ? &parent_name : NULL); - init.num_parents = (parent_name ? 1 : 0); - - /* struct clk_fixed_rate assignments */ - fixed->fixed_rate = fixed_rate; - fixed->fixed_accuracy = fixed_accuracy; - fixed->hw.init = &init; - - /* register the clock */ - hw = &fixed->hw; - hw->type = HAL_SUNXI_FIXED_CCU; - hw->id = id; - ret = clk_hw_register(hw); - if (ret) - { - free(fixed); - hw = NULL; - return -1; - } - - return 0; -} - -int clk_register_fixed_rate_with_accuracy(const char *name, u32 id, - const char *parent_name, unsigned long flags, - unsigned long fixed_rate, unsigned long fixed_accuracy) -{ - return clk_hw_register_fixed_rate_with_accuracy(name, id, parent_name, - flags, fixed_rate, fixed_accuracy); -} - -int sunxi_fixed_clk_init(void) -{ - int ret = -1; - - ret = clk_register_fixed_rate_with_accuracy("dcxo24M", CLK_SRC_HOSC24M, NULL, 0, 24000000, 0); - if (ret) - { - printf("register clock dcxo24M error\n"); - } - - ret = clk_register_fixed_rate_with_accuracy("dcxo24_576M", CLK_SRC_HOSC24576M, NULL, 0, 24576000, 0); - if (ret) - { - printf("register clock dcxo24_576M error\n"); - } - - ret = clk_register_fixed_rate_with_accuracy("dcxo26M", CLK_SRC_HOSC26M, NULL, 0, 26000000, 0); - if (ret) - { - printf("register clock dcxo26M error\n"); - } - - ret = clk_register_fixed_rate_with_accuracy("dcxo32M", CLK_SRC_HOSC32M, NULL, 0, 32000000, 0); - if (ret) - { - printf("register clock dcxo32M error\n"); - } - - ret = clk_register_fixed_rate_with_accuracy("dcxo40M", CLK_SRC_HOSC40M, NULL, 0, 40000000, 0); - if (ret) - { - printf("register dcxo40M error\n"); - } - - ret = clk_register_fixed_rate_with_accuracy("fix-losc", CLK_SRC_LOSC, NULL, 0, 32768, 0); - if (ret) - { - printf("register clock losc error\n"); - } - - ret = clk_register_fixed_rate_with_accuracy("rc-16m", CLK_SRC_RC_16M, NULL, 0, 16000000, 300000000); - if (ret) - { - printf("register clock rc-16m error\n"); - } - - ret = clk_register_fixed_rate_with_accuracy("ext-32k", CLK_SRC_EXT_32K, NULL, 0, 32768, 0); - if (ret) - { - printf("register clock ext-32k error\n"); - } - - ret = clk_register_fixed_rate_with_accuracy("rc-hf", CLK_SRC_RC_HF, NULL, 0, 8192000, 0); - if (ret) - { - printf("register clock ext-32k error\n"); - } - return ret; -} diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/clk-fixed-rate.h b/src/platform/f133/hal/ccmu/sunxi-ng/clk-fixed-rate.h deleted file mode 100644 index 0b25a2e7238f0f4dd11874c6804167f25705f5f2..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/clk-fixed-rate.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2020 shengduiliang@allwinnertech.com - */ - -#ifndef _CLK_FIXED_RATE_H -#define _CLK_FIXED_RATE_H - -#define CLK_SRC_HOSC24M 0 -#define CLK_SRC_HOSC24576M 1 -#define CLK_SRC_HOSC26M 2 -#define CLK_SRC_HOSC32M 3 -#define CLK_SRC_HOSC40M 4 -#define CLK_SRC_LOSC 5 -#define CLK_SRC_RC_16M 6 -#define CLK_SRC_EXT_32K 7 -#define CLK_SRC_RC_HF 8 - -#define CLK_SRC_NUMBER (CLK_SRC_RC_HF + 1) - -#endif diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/clk.c b/src/platform/f133/hal/ccmu/sunxi-ng/clk.c deleted file mode 100644 index 6101c88cb6bab18c1963c06aff4e4e6b7b74fab7..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/clk.c +++ /dev/null @@ -1,183 +0,0 @@ - -#include "ccu.h" -#include -#include - -extern int sunxi_fixed_clk_init(void); -extern int sunxi_ccu_init(void); -extern int sunxi_r_ccu_init(void); -extern int sunxi_rtc_ccu_init(void); -extern int sunxi_dsp_init(void); - -hal_clk_status_t clk_init(void) -{ - sunxi_fixed_clk_init(); - sunxi_rtc_ccu_init(); - sunxi_r_ccu_init(); - sunxi_ccu_init(); - sunxi_dsp_init(); - return 0; -} - -struct clk *clk_get(hal_clk_type_t type, hal_clk_id_t id) -{ - struct clk_core *core = NULL; - struct clk *clk = NULL; - - core = clk_core_get(type, id); - - if (!core) - { - return NULL; - } - - clk = core->clk; - clk->count++; - - return clk; -} - -hal_clk_status_t clk_put(struct clk *clk) -{ - if (!clk) - { - return 0; - } - - if (clk->count) - clk->count--; - - return 0; -} - -hal_clk_status_t clk_is_enabled(struct clk *clk) -{ - int ret = 0; - - if (clk) - { - ret = clk_core_is_enabled(clk->core); - } - return ret ? 0 : -1; -} - -hal_clk_status_t clk_prepare_enable(struct clk *clk) -{ - if (!clk) - { - return 0; - } - - return clk_core_enable(clk->core); -} - -hal_clk_status_t clk_disable_unprepare(struct clk *clk) -{ - if (clk) - { - return clk_core_disable(clk->core); - } - return 0; -} - -struct clk *clk_get_parent(struct clk *clk) -{ - struct clk_core *parent; - struct clk *p_clk; - if (!clk) - { - return NULL; - } - - parent = clk_core_get_parent(clk->core); - - if (!parent) - return NULL; - - if (parent->clk) - { - p_clk = parent->clk; - p_clk->count++; - } - else - { - p_clk = (struct clk *)malloc(sizeof(*clk)); - p_clk->core = parent; - p_clk->name = parent->name; - p_clk->count = 1; - parent->clk = p_clk; - } - - return p_clk; -} - -hal_clk_status_t clk_set_parent(struct clk *clk, struct clk *p_clk) -{ - int ret; - - if (!clk || !p_clk) - { - return -1; - } - - ret = clk_core_set_parent(clk->core, p_clk->core); - - return ret; -} - -hal_clk_status_t clk_get_rate(struct clk *clk, u32 *rate) -{ - if (!clk) - { - *rate = 0; - } - else - { - *rate = clk_core_get_rate(clk->core); - } - - return 0; -} - -hal_clk_status_t clk_set_rate(struct clk *clk, u32 rate) -{ - struct clk *p_clk; - - if (!clk) - { - return 0; - } - - p_clk = clk_get_parent(clk); - - return clk_core_set_rate(clk->core, p_clk->core, rate); -} - -hal_clk_status_t clk_recalc_rate(struct clk *clk, u32 *rate) -{ - struct clk *p_clk; - - if (!clk) - { - return 0; - } - - p_clk = clk_get_parent(clk); - - *rate = clk_core_recalc_rate(clk->core, p_clk->core); - - return 0; -} - -hal_clk_status_t clk_round_rate(struct clk *clk, u32 rate, u32 *round_rate) -{ - if (!clk) - { - round_rate = 0; - return 0; - } - - *round_rate = clk_core_round_rate(clk->core, rate); - - return 0; -} diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/clk.h b/src/platform/f133/hal/ccmu/sunxi-ng/clk.h deleted file mode 100644 index 88046808f76e3a606abc58d11711bf5aac874161..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/clk.h +++ /dev/null @@ -1,189 +0,0 @@ -/* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. - * - * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in - *the the People's Republic of China and other countries. - * All Allwinner Technology Co.,Ltd. trademarks are used with permission. - * - * DISCLAIMER - * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. - * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) - * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN - * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. - * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS - * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. - * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. - * - * - * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT - * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING - * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE - * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __CLK_H__ -#define __CLK_H__ - -#include "ccu.h" -#include "../common_ccmu.h" - -/************************************************************************************************ -* @Function: clk_init -* @Description: implement for initialize soc clocks during the system power-on startup phase -* @Parameters: -* # void: No parameters required -* @Return values: -* # HAL_CLK_STATUS_OK: soc clocks initialize successed -* # others : soc clocks initialization may have some abnormal problems -* @Attention: clock initialize timing depands on specific soc platform clock design -*************************************************************************************************/ - -hal_clk_status_t clk_init(void); - -struct clk *clk_get(hal_clk_type_t type, hal_clk_id_t id); - -hal_clk_status_t clk_put(struct clk *clk); - -/************************************************************************************************ -* @Function: clk_get_rate -* @Description: implement for factor-clk, bus-clk and periph-clk get current rate cached witch may not current Runtime rate -* @Parameters: -* # clk: clock-id of soc specific clock -* @Return values: -* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid -* # HAL_CLK_RATE_UNINITIALIZED : input parameter of clock-id defined in hal but not defined by soc clock driver or clock disbaled -* # others: return rate cached successed -* @Attention: .etc -*************************************************************************************************/ -hal_clk_status_t clk_get_rate(struct clk *clk, u32 *rate); - -/************************************************************************************************ -* @Function: clk_set_rate -* @Description: implement for bus-clk and periph-clk to set new rate -* @Parameters: -* # clk: clock-id of soc specific clock -* # rate: the new rate value -* @Return values: -* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid -* # HAL_CLK_STATUS_ERROR_CLK_SET_RATE_REFUSED: fixed-clk and factor clk not allowed User to change rate because of stability -* # HAL_CLK_STATUS_ERROT_CLK_UNDEFINED: input parameter of clock-id defined in hal but not defined by soc clock driver -* # HAL_CLK_STATUS_ERROR_CLK_NOT_FOUND: input parameter of clock-id defined in hal but not defined by soc clock driver -* # HAL_CLK_STATUS_OK: set new rate successed -* @Attention: .etc -*************************************************************************************************/ -hal_clk_status_t clk_set_rate(struct clk *clk, u32 rate); - - -/************************************************************************************************ -* @Function: clk_recalc_rate -* @Description: implement for factor-clk, bus-clk and periph-clk to recalculate current Runtime rate -* @Parameters: -* # clk: clock-id of soc specific clock -* @Return values: -* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal -* # HAL_CLK_RATE_UNINITIALIZED : input parameter of clock-id defined in hal but not defined by soc clock driver or clock disbaled -* # others: return current clock rate successed -* @Attention: .etc -*************************************************************************************************/ -hal_clk_status_t clk_recalc_rate(struct clk *clk, u32 *prate); - - -/************************************************************************************************ -* @Function: clk_round_rate -* @Description: implement for for factor-clk, bus-clk and periph-clk round target rate to the most suitable rate -* @Parameters: -* # clk: clock-id of soc specific clock -* # rate: the target rate form API-User -* @Return values: -* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid -* # HAL_CLK_RATE_UNINITIALIZED : input parameter of clock-id defined in hal but not defined by soc clock driver or clock disbaled -* # others: return round rate successed -* @Attention: .etc -*************************************************************************************************/ -hal_clk_status_t clk_round_rate(struct clk *clk, u32 rate, u32 *prate); - -/************************************************************************************************ -* @Function: clk_is_enabled -* @Description: implement for bus-clk and periph-clk to get clock enabled statue -* @Parameters: -* # clk: clock-id of soc specific clock -* @Return values: -* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid -* # HAL_CLK_STATUS_ERROR_CLK_SET_RATE_REFUSED: fixed-clk and factor clk not allowed User to change rate because of stability -* # HAL_CLK_STATUS_ERROT_CLK_UNDEFINED: input parameter of clock-id defined in hal but not defined by soc clock driver -* # HAL_CLK_STATUS_ERROR_CLK_NOT_FOUND: input parameter of clock-id defined in hal but not defined by soc clock driver -* # HAL_CLK_STATUS_ENABLED: clock current status is enabled -* # HAL_CLK_STATUS_DISABLED: clock current status is disabled -* @Attention: .etc -*************************************************************************************************/ -hal_clk_status_t clk_is_enabled(struct clk *clk); - - -/************************************************************************************************ -* @Function: clk_prepare_enable -* @Description: implement for bus-clk and periph-clk to enable clock -* @Parameters: -* # clk: clock-id of soc specific clock -* @Return values: -* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid -* # HAL_CLK_STATUS_ERROR_CLK_SET_RATE_REFUSED: fixed-clk and factor clk not allowed User to change rate because of stability -* # HAL_CLK_STATUS_ERROT_CLK_UNDEFINED: input parameter of clock-id defined in hal but not defined by soc clock driver -* # HAL_CLK_STATUS_ERROR_CLK_NOT_FOUND: input parameter of clock-id defined in hal but not defined by soc clock driver -* # HAL_CLK_STATUS_ENABLED: clock current status is enabled -* # HAL_CLK_STATUS_DISABLED: clock current status is disabled -* @Attention: .etc -*************************************************************************************************/ -hal_clk_status_t clk_prepare_enable(struct clk *clk); - -/************************************************************************************************ -* @Function: clk_disable_unprepare -* @Description: implement for bus-clk and periph-clk to disable clock -* @Parameters: -* # clk: clock-id of soc specific clock -* @Return values: -* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid -* # HAL_CLK_STATUS_ERROR_CLK_SET_RATE_REFUSED: fixed-clk and factor clk not allowed User to change rate because of stability -* # HAL_CLK_STATUS_ERROT_CLK_UNDEFINED: input parameter of clock-id defined in hal but not defined by soc clock driver -* # HAL_CLK_STATUS_ERROR_CLK_NOT_FOUND: input parameter of clock-id defined in hal but not defined by soc clock driver -* # HAL_CLK_STATUS_OK: clock current status disabled successed -* @Attention: .etc -*************************************************************************************************/ -hal_clk_status_t clk_disable_unprepare(struct clk *clk); - -/************************************************************************************************ -* @Function: clk_get_parent -* @Description: implement for factor-clk, bus-clk and periph-clk to select parent clock -* @Parameters: -* # clk: clock-id of soc specific clock witch nedds to adjust parent clock -* # parent: clock-id of soc specific clock's parent clock -* @Return values: -* # HAL_CLK_STATUS_OK: soc specific clock select and siwtch parent clock successed -* # others : soc specific clock select and siwtch parent clock may have some abnormal problems -* @Attention: soc specific clock and parent clock must be according to the SOC_User_Manual definition -*************************************************************************************************/ -struct clk *clk_get_parent(struct clk *clk); - -/************************************************************************************************ -* @Function: clk_set_parent -* @Description: implement for factor-clk, bus-clk and periph-clk to select parent clock -* @Parameters: -* # clk: clock-id of soc specific clock witch nedds to adjust parent clock -* # parent: clock-id of soc specific clock's parent clock -* @Return values: -* # HAL_CLK_STATUS_OK: soc specific clock select and siwtch parent clock successed -* # others : soc specific clock select and siwtch parent clock may have some abnormal problems -* @Attention: soc specific clock and parent clock must be according to the SOC_User_Manual definition -*************************************************************************************************/ - -hal_clk_status_t clk_set_parent(struct clk *clk, struct clk *p_clk); - -#endif /* __HAL_CLOCK_H__ */ - diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun20iw2-aon.h b/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun20iw2-aon.h deleted file mode 100644 index eb30e0730d2b0aecf3bb2a32f4d7936ae299b343..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun20iw2-aon.h +++ /dev/null @@ -1,29 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) -/* - * Copyright (c) 2020 huangzhenwei@allwinnertech.com - */ - -#ifndef _DT_BINDINGS_RESET_SUN20IW2_AON_H_ -#define _DT_BINDINGS_RESET_SUN20IW2_AON_H_ - -#define RST_BLE_RTC 0 -#define RST_MADCFG 1 -#define RST_WLAN_CONN 2 -#define RST_WLAN 3 -#define RST_CODEC_DAC 4 -#define RST_RFAS 5 -#define RST_RCCAL 6 -#define RST_LPSD 7 -#define RST_AON_TIMER 8 -#define RST_CODEC_ADC 9 -#define RST_MAD 10 -#define RST_DMIC 11 -#define RST_GPADC 12 -#define RST_LPUART1 13 -#define RST_LPUART0 14 -#define RST_BLE_32M 15 -#define RST_BLE_48M 16 - -#define RST_AON_BUS_NUMBER (RST_LPUART0 + 1) - -#endif /* _DT_BINDINGS_RESET_SUN20IW2_AON_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun20iw2-r.h b/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun20iw2-r.h deleted file mode 100644 index 45eaad2c0e6d8d1454c16a567602ca8f85766ccc..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun20iw2-r.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ -/* - * Copyright (C) 2020 huangzhenwei@allwinnertech.com - */ - -#ifndef _DT_BINDINGS_RST_SUN20IW2_R_CCU_H_ -#define _DT_BINDINGS_RST_SUN20IW2_R_CCU_H_ - -#define RST_IS_WATCHDOG_ALL 0 -#define RST_IS_PMU 1 -#define RST_IS_PWRON 2 -#define RST_RCO_CALIB 3 - -#define RST_R_BUS_NUMBER (RST_RCO_CALIB + 1) - -#endif /* _DT_BINDINGS_RST_SUN20IW2_R_CCU_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun20iw2.h b/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun20iw2.h deleted file mode 100644 index ffd5fe493e600331f5ac7811fb04e22838b5e986..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun20iw2.h +++ /dev/null @@ -1,65 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) -/* - * Copyright (c) 2020 huangzhenwei@allwinnertech.com - */ - -#ifndef _DT_BINDINGS_RESET_SUN20IW2_H_ -#define _DT_BINDINGS_RESET_SUN20IW2_H_ - -#define RST_USB_EHCI 0 -#define RST_USB_OHCI 1 -#define RST_CSI_JPE 2 -#define RST_LEDC 3 -#define RST_USB_OTG 4 -#define RST_SMCARD 5 -#define RST_USB_PHY 6 -#define RST_FLASH_ENC 7 -#define RST_FLASH_CTRL 8 -#define RST_HSPSRAM_CTRL 9 -#define RST_LSPSRAM_CTRL 10 -#define RST_IRRX 11 -#define RST_IRTX 12 -#define RST_PWM 13 -#define RST_TWI1 14 -#define RST_TWI0 15 -#define RST_UART2 16 -#define RST_UART1 17 -#define RST_UART0 18 -#define RST_SDC0 19 -#define RST_SPI1 20 -#define RST_SPI0 21 -#define RST_G2D 22 -#define RST_DE 23 -#define RST_DISPLAY 24 -#define RST_LCD 25 -#define RST_BT_CORE 26 -#define RST_WLAN_CTRL 27 -#define RST_TRNG 28 -#define RST_SPC 29 -#define RST_SS 30 -#define RST_TIMER 31 -#define RST_SPINLOCK 32 -#define RST_DMA1 33 -#define RST_DMA0 34 -#define RST_SPDIF 35 -#define RST_I2S 36 -#define RST_RISCV_TIMESTAMP 37 -#define RST_RISCV_SYS_APB_SOFT 38 -#define RST_RISCV_CFG 39 -#define RST_RISCV_MSGBOX 40 -#define RST_RISCV_WDG 41 -#define RST_RISCV_CORE 42 -#define RST_DSP_DEBUG 43 -#define RST_DSP_INTC 44 -#define RST_DSP_TZMA 45 -#define RST_DSP_CFG 46 -#define RST_DSP_MSGBOX 47 -#define RST_DSP_WDG 48 -#define RST_DSP_CORE 49 -#define RST_CPU_CFG 50 -#define RST_CPU_MSGBOX 51 -#define RST_CPU_WDG 52 - -#define RST_BUS_NUMBER (RST_CPU_WDG + 1) - -#endif /* _DT_BINDINGS_RESET_SUN20IW2_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun55iw3-dsp.h b/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun55iw3-dsp.h deleted file mode 100644 index 70b559c591000dc9982d61bf608f71a0aca1bccd..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun55iw3-dsp.h +++ /dev/null @@ -1,32 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) -/* - * Copyright (c) 2022 Allwinnertech - */ - -#ifndef _RESET_SUN55IW3_DSP_H_ -#define _RESET_SUN55IW3_DSP_H_ - -#define RST_BUS_DSP_I2S3 0 -#define RST_BUS_DSP_I2S2 1 -#define RST_BUS_DSP_I2S1 2 -#define RST_BUS_DSP_I2S0 3 -#define RST_BUS_DSP_SPDIF 4 -#define RST_BUS_DSP_DMIC 5 -#define RST_BUS_DSP_AUDIO_CODEC 6 -#define RST_BUS_DSP_MSG 7 -#define RST_BUS_DSP_CFG 8 -#define RST_BUS_DSP_NPU 9 -#define RST_BUS_DSP_TIME 10 -#define RST_BUS_DSP 11 -#define RST_BUS_DSP_DBG 12 -#define RST_BUS_DSP_DMA 13 -#define RST_BUS_DSP_PUBSRAM 14 -#define RST_BUS_DSP_RV_CORE 15 -#define RST_BUS_DSP_RV_APB_DB 16 -#define RST_BUS_DSP_RV_CFG 17 -#define RST_BUS_DSP_RV_MSG 18 -#define RST_BUS_DSP_PWM 19 - -#define RST_DSP_BUS_NUMBER (RST_BUS_DSP_PWM + 1) - -#endif /* _RESET_SUN55IW3_DSP_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun55iw3-r.h b/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun55iw3-r.h deleted file mode 100644 index fae7751d763af5d1a4cd922ec8658dc7dff83bf0..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun55iw3-r.h +++ /dev/null @@ -1,29 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ -/* - * Copyright (C) 2020 huangzhenwei@allwinnertech.com - */ - -#ifndef _RST_SUN55IW3_R_CCU_H_ -#define _RST_SUN55IW3_R_CCU_H_ - - -#define RST_R_TIMER 0 -#define RST_R_PWM 1 -#define RST_R_CAN 2 -#define RST_R_SPI 3 -#define RST_R_SPLOCK 4 -#define RST_R_MBOX 5 -#define RST_R_UART1 6 -#define RST_R_UART0 7 -#define RST_R_TWI2 8 -#define RST_R_TWI1 9 -#define RST_R_TWI0 10 -#define RST_R_PPU1 11 -#define RST_R_PPU 12 -#define RST_R_IRRX 13 -#define RST_R_RTC 14 -#define RST_R_CPUCFG 15 - -#define RST_R_BUS_NUMBER (RST_R_CPUCFG + 1) - -#endif /* _DT_BINDINGS_RST_SUN20IW2_R_CCU_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun55iw3.h b/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun55iw3.h deleted file mode 100644 index 6a31ecf74c9f37bd2e5983337750b4a60c5d2f8a..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun55iw3.h +++ /dev/null @@ -1,89 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) -/* - * Copyright (c) 2022 Allwinnertech - */ - -#ifndef _RESET_SUN55IW3_H_ -#define _RESET_SUN55IW3_H_ - -#define RST_MBUS 0 -#define RST_BUS_NSI 1 -#define RST_BUS_DE0 2 -#define RST_BUS_DI 3 -#define RST_BUS_G2D 4 -#define RST_BUS_GPU 5 -#define RST_BUS_CE_SY 6 -#define RST_BUS_CE 7 -#define RST_BUS_VE 8 -#define RST_BUS_DMA 9 -#define RST_BUS_MSGBOX1 10 -#define RST_BUS_MSGBOX0 11 -#define RST_BUS_SPINLOCK 12 -#define RST_BUS_TIME 13 -#define RST_BUS_DBGSY 14 -#define RST_BUS_PWM1 15 -#define RST_BUS_PWM 16 -#define RST_BUS_DRAM 17 -#define RST_BUS_NAND0 18 -#define RST_BUS_SMHC2 19 -#define RST_BUS_SMHC1 20 -#define RST_BUS_SMHC0 21 -#define RST_BUS_SYSDAP 22 -#define RST_BUS_UART7 23 -#define RST_BUS_UART6 24 -#define RST_BUS_UART5 25 -#define RST_BUS_UART4 26 -#define RST_BUS_UART3 27 -#define RST_BUS_UART2 28 -#define RST_BUS_UART1 29 -#define RST_BUS_UART0 30 -#define RST_BUS_TWI5 31 -#define RST_BUS_TWI4 32 -#define RST_BUS_TWI3 33 -#define RST_BUS_TWI2 34 -#define RST_BUS_TWI1 35 -#define RST_BUS_TWI0 36 -#define RST_BUS_SPIF 38 -#define RST_BUS_SPI2 39 -#define RST_BUS_SPI1 40 -#define RST_BUS_SPI0 41 -#define RST_BUS_GMAC1 42 -#define RST_BUS_GMAC0 43 -#define RST_BUS_IRRX 44 -#define RST_BUS_IRTX 45 -#define RST_BUS_GPADC1 46 -#define RST_BUS_GPADC0 47 -#define RST_BUS_TH 48 -#define RST_USB_PHY0_RSTN 49 -#define RST_USB_PHY1_RSTN 50 -#define RST_USB_2_PHY 51 -#define RST_USB_2 52 -#define RST_USB_OTG0 53 -#define RST_USB_EHCI1 54 -#define RST_USB_EHCI0 55 -#define RST_USB_OHCI1 56 -#define RST_USB_OHCI0 57 -#define RST_BUS_LRADC 58 -#define RST_BUS_PCIE_PE 59 -#define RST_BUS_PCIE_POWER_UP 60 -#define RST_BUS_PCIE 61 -#define RST_BUS_DPSS_TOP0 62 -#define RST_BUS_DPSS_TOP1 63 -#define RST_BUS_HDMI_SUB 64 -#define RST_BUS_HDMI_MAIN 65 -#define RST_BUS_DSI1 66 -#define RST_BUS_DSI0 67 -#define RST_BUS_VO1_TCONLCD0 68 -#define RST_BUS_VO0_TCONLCD1 69 -#define RST_BUS_VO0_TCONLCD0 70 -#define RST_BUS_TCONTV1 71 -#define RST_BUS_TCONTV 72 -#define RST_BUS_LVDS1 73 -#define RST_BUS_LVDS0 74 -#define RST_BUS_LEDC 75 -#define RST_BUS_CSI 76 -#define RST_BUS_ISP 77 - -#define RST_BUS_NUMBER (RST_BUS_ISP + 1) - -#endif /* _DT_BINDINGS_RESET_SUN55IW3_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun8iw20-r.h b/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun8iw20-r.h deleted file mode 100644 index c1bc83aa9fcaa9b84dc705e7dfe8de3fe688068e..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun8iw20-r.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ -/* - * Copyright (C) 2020 huangzhenwei@allwinnertech.com - */ - -#ifndef _DT_BINDINGS_RST_SUN8IW20_R_CCU_H_ -#define _DT_BINDINGS_RST_SUN8IW20_R_CCU_H_ - -#define RST_R_APB0_TIMER 0 -#define RST_R_APB0_TWD 1 -#define RST_R_PPU 2 -#define RST_R_APB0_BUS_IRRX 3 -#define RST_R_AHB_BUS_RTC 4 -#define RST_R_APB0_CPUCFG 5 - -#define RST_R_BUS_NUMBER (RST_R_APB0_CPUCFG + 1) - -#endif /* _DT_BINDINGS_RST_SUN8IW20_R_CCU_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun8iw20.h b/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun8iw20.h deleted file mode 100644 index 327055708677ea92ff928d8da52ba36d89109517..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/rst-sun8iw20.h +++ /dev/null @@ -1,81 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) -/* - * Copyright (c) 2020 huangzhenwei@allwinnertech.com - */ - -#ifndef _DT_BINDINGS_RESET_SUN8IW20_H_ -#define _DT_BINDINGS_RESET_SUN8IW20_H_ - -#define RST_MBUS 0 -#define RST_BUS_DE0 1 -#define RST_BUS_DI 2 -#define RST_BUS_G2D 3 -#define RST_BUS_CE 4 -#define RST_BUS_VE 5 -#define RST_BUS_DMA 6 -#define RST_BUS_MSGBOX0 7 -#define RST_BUS_MSGBOX1 8 -#define RST_BUS_MSGBOX2 9 -#define RST_BUS_SPINLOCK 10 -#define RST_BUS_HSTIMER 11 -#define RST_BUS_DBG 12 -#define RST_BUS_PWM 13 -#define RST_BUS_DRAM 14 -#define RST_BUS_MMC0 15 -#define RST_BUS_MMC1 16 -#define RST_BUS_MMC2 17 -#define RST_BUS_UART0 18 -#define RST_BUS_UART1 19 -#define RST_BUS_UART2 20 -#define RST_BUS_UART3 21 -#define RST_BUS_UART4 22 -#define RST_BUS_UART5 23 -#define RST_BUS_I2C0 24 -#define RST_BUS_I2C1 25 -#define RST_BUS_I2C2 26 -#define RST_BUS_I2C3 27 -#define RST_BUS_SPI0 30 -#define RST_BUS_SPI1 31 -#define RST_BUS_EMAC0 32 -#define RST_BUS_IR_TX 33 -#define RST_BUS_GPADC 34 -#define RST_BUS_THS 35 -#define RST_BUS_I2S0 36 -#define RST_BUS_I2S1 37 -#define RST_BUS_I2S2 38 -#define RST_BUS_SPDIF 39 -#define RST_BUS_DMIC 40 -#define RST_BUS_AUDIO_CODEC 41 -#define RST_USB_PHY0 42 -#define RST_USB_PHY1 43 -#define RST_BUS_OHCI0 44 -#define RST_BUS_OHCI1 45 -#define RST_BUS_EHCI0 46 -#define RST_BUS_EHCI1 47 -#define RST_BUS_OTG 48 -#define RST_BUS_LRADC 49 -#define RST_BUS_DPSS_TOP0 50 -#define RST_BUS_HDMI_SUB 51 -#define RST_BUS_HDMI_MAIN 52 -#define RST_BUS_MIPI_DSI 53 -#define RST_BUS_TCON_LCD0 54 -#define RST_BUS_TCON_TV 55 -#define RST_BUS_LVDS0 56 -#define RST_BUS_TVE 57 -#define RST_BUS_TVE_TOP 58 -#define RST_BUS_TVD 59 -#define RST_BUS_TVD_TOP 60 -#define RST_BUS_LEDC 61 -#define RST_BUS_CSI 62 -#define RST_BUS_TPADC 63 -#define RST_BUS_DSP 64 -#define RST_BUS_DSP_CFG 65 -#define RST_BUS_DSP_DBG 66 -#define RST_BUS_RISCV_CFG 67 -#define RST_BUS_RISCV_SOFT 69 -#define RST_BUS_RISCV_CPU_SOFT 70 - -#define RST_BUS_NUMBER (RST_BUS_RISCV_CFG + 1) - - -#endif /* _DT_BINDINGS_RESET_SUN8IW20_H_ */ diff --git a/src/platform/f133/hal/ccmu/sunxi-ng/type.h b/src/platform/f133/hal/ccmu/sunxi-ng/type.h deleted file mode 100644 index 42d651d4753d0ccd458a455ced2660a114d8539a..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/ccmu/sunxi-ng/type.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * drivers/standby/type.h - * - * Copyright (c) 2018 Allwinner. - * 2018-09-14 Written by fanqinghua (fanqinghua@allwinnertech.com). - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ -#ifndef __TYPE_H__ -#define __TYPE_H__ - -#define true 1 -#define false 0 - -#endif /*__TYPE_H__*/ diff --git a/src/platform/f133/hal/gpio/Kconfig b/src/platform/f133/hal/gpio/Kconfig deleted file mode 100644 index 652f78f830228e7463e7aba047c832779cf9a5e9..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -menu "GPIO Devices" - -config DRIVERS_GPIO - bool "enable gpio driver" - default y - -config HAL_TEST_GPIO - bool "enable gpio hal APIs test command" - depends on DRIVERS_GPIO - default n - -endmenu diff --git a/src/platform/f133/hal/gpio/Makefile b/src/platform/f133/hal/gpio/Makefile deleted file mode 100644 index 09a1f454cb1e1f516d159d8ba8a126762a472b82..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -SRC += hal_gpio.c - -SRC += sun8iw20/ diff --git a/src/platform/f133/hal/gpio/gpio.h b/src/platform/f133/hal/gpio/gpio.h deleted file mode 100644 index 4f178cbb7eca36f6ad88304cb3c13e4f4543cf99..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/gpio.h +++ /dev/null @@ -1,259 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __GPIO_I_H__ -#define __GPIO_I_H__ - -#include "hal_interrupt.h" -#ifdef CONFIG_COMPONENTS_PM -#include -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -#define PA_BASE 0 -#define PB_BASE 32 -#define PC_BASE 64 -#define PD_BASE 96 -#define PE_BASE 128 -#define PF_BASE 160 -#define PG_BASE 192 -#define PH_BASE 224 -#define PI_BASE 256 -#define PJ_BASE 288 -#define PK_BASE 320 -#define PL_BASE 352 -#define PM_BASE 384 -#define PN_BASE 416 -#define PO_BASE 448 - -/* sunxi gpio name space */ -#define GPIOA(n) (PA_BASE + (n)) -#define GPIOB(n) (PB_BASE + (n)) -#define GPIOC(n) (PC_BASE + (n)) -#define GPIOD(n) (PD_BASE + (n)) -#define GPIOE(n) (PE_BASE + (n)) -#define GPIOF(n) (PF_BASE + (n)) -#define GPIOG(n) (PG_BASE + (n)) -#define GPIOH(n) (PH_BASE + (n)) -#define GPIOI(n) (PI_BASE + (n)) -#define GPIOJ(n) (PJ_BASE + (n)) -#define GPIOK(n) (PK_BASE + (n)) -#define GPIOL(n) (PL_BASE + (n)) -#define GPIOM(n) (PM_BASE + (n)) -#define GPION(n) (PN_BASE + (n)) -#define GPIOO(n) (PO_BASE + (n)) - - -#define IRQ_MEM_SIZE 0x20 -#define GIC_IRQ_NUM 140 -#define GPIO_IRQ_START (GIC_IRQ_NUM + 1) - -#if defined(CONFIG_ARCH_SUN8IW20) || defined(CONFIG_SOC_SUN20IW1) || defined(CONFIG_SOC_SUN20IW3) -#define BANK_MEM_SIZE 0x30 -#define PULL_REGS_OFFSET 0x24 -#define DLEVEL_PINS_PER_REG 8 -#define DLEVEL_PINS_BITS 4 -#define DLEVEL_PINS_MASK 0x0f -#else -#define BANK_MEM_SIZE 0x24 -#define PULL_REGS_OFFSET 0x1c -#define DLEVEL_PINS_PER_REG 16 -#define DLEVEL_PINS_BITS 2 -#define DLEVEL_PINS_MASK 0x03 -#endif - -#define MUX_REGS_OFFSET 0x0 -#define DATA_REGS_OFFSET 0x10 -#define DLEVEL_REGS_OFFSET 0x14 - -#define PINS_PER_BANK 32 -#define MUX_PINS_PER_REG 8 -#define MUX_PINS_BITS 4 -#define MUX_PINS_MASK 0x0f -#define DATA_PINS_PER_REG 32 -#define DATA_PINS_BITS 1 -#define DATA_PINS_MASK 0x01 -#define PULL_PINS_PER_REG 16 -#define PULL_PINS_BITS 2 -#define PULL_PINS_MASK 0x03 - -#define IRQ_PER_BANK 32 - -#define IRQ_CFG_REG 0x200 -#define IRQ_CFG_IRQ_PER_REG 8 -#define IRQ_CFG_IRQ_BITS 4 -#define IRQ_CFG_IRQ_MASK ((1 << IRQ_CFG_IRQ_BITS) - 1) -#define IRQ_CTRL_REG 0x210 -#define IRQ_CTRL_IRQ_PER_REG 32 -#define IRQ_CTRL_IRQ_BITS 1 -#define IRQ_CTRL_IRQ_MASK ((1 << IRQ_CTRL_IRQ_BITS) - 1) -#define IRQ_STATUS_REG 0x214 -#define IRQ_STATUS_IRQ_PER_REG 32 -#define IRQ_STATUS_IRQ_BITS 1 -#define IRQ_STATUS_IRQ_MASK ((1 << IRQ_STATUS_IRQ_BITS) - 1) -#define IRQ_DEBOUNCE_REG 0x218 -#define POWER_MODE_SEL 0x0340 -#define POWER_MODE_VAL 0x0348 -#define POWER_VOL_SEL 0x0350 - -#define IRQ_MEM_SIZE 0x20 -#define GIC_IRQ_NUM 140 -#define GPIO_IRQ_START (GIC_IRQ_NUM + 1) - -#define IRQ_EDGE_RISING 0x00 -#define IRQ_EDGE_FALLING 0x01 -#define IRQ_LEVEL_HIGH 0x02 -#define IRQ_LEVEL_LOW 0x03 -#define IRQ_EDGE_BOTH 0x04 - -#define SUNXI_PIO_BANK_BASE(pin, irq_bank) \ - ((pin-PA_BASE)/PINS_PER_BANK - irq_bank) - -#define SUNXI_R_PIO_BANK_BASE(pin, irq_bank) \ - ((pin-PL_BASE)/PINS_PER_BANK - irq_bank) - -/* - * This looks more complex than it should be. But we need to - * get the type for the ~ right in round_down (it needs to be - * as wide as the result!), and we want to evaluate the macro - * arguments just once each. - */ -#define __round_mask(x, y) ((__typeof__(x))((y)-1)) -#define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1) -#define round_down(x, y) ((x) & ~__round_mask(x, y)) - -#ifndef ARRAY_SIZE -#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) -#endif - -/* - * gpio configuration (pull up/down and drive strength) type and its value are - * packed together into a 32-bits. The lower 8-bits represent the configuration - * type and the upper 24-bits hold the value of the configuration type. - */ -#define GPIO_CFG_PACK(type, value) (((value) << 8) | ((unsigned long) type & 0xFFUL)) -#define GPIO_CFG_UNPACK_TYPE(cfg) ((cfg) & 0xFFUL) -#define GPIO_CFG_UNPACK_VALUE(cfg) (((cfg) & 0xFFFFFF00UL) >> 8) - -typedef enum -{ - GPIO_TYPE_FUNC, - GPIO_TYPE_DAT, - GPIO_TYPE_PUD, - GPIO_TYPE_DRV, - GPIO_TYPE_VOL, - GPIO_CONFIG_END = 0x7F, - GPIO_CONFIG_MAX = 0xFF, -} pin_config_param_t; - -typedef enum -{ - IRQ_TYPE_NONE = 0x00000000, - IRQ_TYPE_EDGE_RISING = 0x00000001, - IRQ_TYPE_EDGE_FALLING = 0x00000002, - IRQ_TYPE_EDGE_BOTH = (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING), - IRQ_TYPE_LEVEL_HIGH = 0x00000004, - IRQ_TYPE_LEVEL_LOW = 0x00000008, -} gpio_interrupt_mode_t; - -struct gpio_irq_desc -{ - uint32_t virq; - uint32_t pin; - unsigned long flags; - hal_irq_handler_t handle_irq; - void *data; -}; - -struct gpio_desc -{ - const unsigned long membase; - const uint32_t resource_size; /* reg resource size */ - const uint32_t irq_arry_size; - const uint32_t *irq; - const uint32_t pin_base; - const uint32_t banks; - const uint32_t *bank_base; - const uint32_t irq_banks; - const uint32_t *irq_bank_base; - const uint32_t virq_offset; - uint32_t irq_desc_size; - struct gpio_irq_desc *irq_desc; -}; - -struct gpio_pm_reg_cache -{ - void *reg_dump[2]; - int reg_dump_size[2]; -}; - -/* - * include the platform gpio header file, - * should be after the name space macro. - */ -#if defined(CONFIG_ARCH_SUN8IW19) -#include "sun8iw19/platform-gpio.h" -#endif -#if defined(CONFIG_ARCH_SUN8IW18P1) -#include "sun8iw18/platform-gpio.h" -#endif -#if defined(CONFIG_ARCH_SUN8IW20) || defined(CONFIG_SOC_SUN20IW1) -#include "sun8iw20/platform-gpio.h" -#endif -#if defined(CONFIG_ARCH_SUN8IW21) || defined(CONFIG_SOC_SUN20IW3) -#include "sun8iw21/platform-gpio.h" -#endif -#if defined(CONFIG_ARCH_SUN50IW11) -#include "sun50iw11/platform-gpio.h" -#endif -#if defined(CONFIG_ARCH_SUN20IW2) -#include "sun20iw2/platform-gpio.h" -#endif -#if defined(CONFIG_ARCH_SUN55IW3) -#include "sun55iw3/platform-gpio.h" -#endif - -const struct gpio_desc **gpio_get_platform_desc(void); -#ifdef CONFIG_STANDBY -int hal_gpio_suspend(void); -int hal_gpio_resume(void); -#endif -int hal_gpio_r_irq_disable(uint32_t irq); -int hal_gpio_r_irq_enable(uint32_t irq); -int hal_gpio_r_all_irq_disable(void); -#ifdef __cplusplus -} -#endif -#endif /* __GPIO_I_H__ */ diff --git a/src/platform/f133/hal/gpio/hal_gpio.c b/src/platform/f133/hal/gpio/hal_gpio.c deleted file mode 100644 index 8503d8f69f0a2d328a82549026d84e889cbdf287..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/hal_gpio.c +++ /dev/null @@ -1,1263 +0,0 @@ -/* - * Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. - * - * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in - * the the People's Republic of China and other countries. - * All Allwinner Technology Co.,Ltd. trademarks are used with permission. - * - * DISCLAIMER - * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. - * IF YOU NEED TO INTEGRATE THIRD PARTY'S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) - * IN ALLWINNERS'SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN - * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. - * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS - * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. - * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY��S TECHNOLOGY. - * - * - * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT - * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING - * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE - * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#include -#include -/* #include */ - -#include -#include -#include -#include -#include "gpio.h" -#include -#include -#ifdef CONFIG_COMPONENTS_PM -#include -#include -#endif -#ifdef CONFIG_AMP_SHARE_IRQ -#include -#endif - -static const struct gpio_desc **g_gpio_desc = NULL; - -/* - * The following inlines stuffs a configuration parameter and data value - * into and out of an unsigned long argument, as used by the generic pin config - * system. We put the parameter in the lower 8 bits and the argument in the - * upper 24 bits. - */ - -static inline pin_config_param_t pinconf_to_config_param(unsigned long config) -{ - return (pin_config_param_t)(config & 0xffUL); -} - -static inline gpio_pin_t pinconf_to_config_argument(unsigned long config) -{ - return (uint32_t)((config >> 8) & 0xffffffUL); -} - -static inline uint64_t pinconf_to_config_packed(pin_config_param_t param, - unsigned long argument) -{ - return GPIO_CFG_PACK(param, argument); -} - -/* - * The sunXi PIO registers are organized as is: - * 0x00 - 0x0c Muxing values. - * 8 pins per register, each pin having a 4bits value - * 0x10 Pin values - * 32 bits per register, each pin corresponding to one bit - * 0x14 - 0x18 Drive level - * 16 pins per register, each pin having a 2bits value - * 0x1c - 0x20 Pull-Up values - * 16 pins per register, each pin having a 2bits value - * - * This is for the first bank. Each bank will have the same layout, - * with an offset being a multiple of 0x24. - * - * The following functions calculate from the pin number the register - * and the bit offset that we should access. - */ -static inline uint32_t gpio_mux_reg(gpio_pin_t pin) -{ - pin %= BANK_BOUNDARY; - uint32_t bank = pin / PINS_PER_BANK; - uint32_t offset = bank * BANK_MEM_SIZE; - offset += MUX_REGS_OFFSET; - offset += pin % PINS_PER_BANK / MUX_PINS_PER_REG * 0x04; - return round_down(offset, 4); -} - -static inline uint32_t gpio_mux_offset(gpio_pin_t pin) -{ - gpio_pin_t pin_num = pin % MUX_PINS_PER_REG; - return pin_num * MUX_PINS_BITS; -} - -static inline uint32_t gpio_data_reg(gpio_pin_t pin) -{ - pin %= BANK_BOUNDARY; - uint32_t bank = pin / PINS_PER_BANK; - uint32_t offset = bank * BANK_MEM_SIZE; - offset += DATA_REGS_OFFSET; - offset += pin % PINS_PER_BANK / DATA_PINS_PER_REG * 0x04; - return round_down(offset, 4); -} - -static inline uint32_t gpio_data_offset(gpio_pin_t pin) -{ - gpio_pin_t pin_num = pin % DATA_PINS_PER_REG; - return pin_num * DATA_PINS_BITS; -} - -static inline uint32_t gpio_dlevel_reg(gpio_pin_t pin) -{ - pin %= BANK_BOUNDARY; - uint32_t bank = pin / PINS_PER_BANK; - uint32_t offset = bank * BANK_MEM_SIZE; - offset += DLEVEL_REGS_OFFSET; - offset += pin % PINS_PER_BANK / DLEVEL_PINS_PER_REG * 0x04; - return round_down(offset, 4); -} - -static inline uint32_t gpio_dlevel_offset(gpio_pin_t pin) -{ - gpio_pin_t pin_num = pin % DLEVEL_PINS_PER_REG; - return pin_num * DLEVEL_PINS_BITS; -} - -static inline uint32_t gpio_pull_reg(gpio_pin_t pin) -{ - pin %= BANK_BOUNDARY; - uint32_t bank = pin / PINS_PER_BANK; - uint32_t offset = bank * BANK_MEM_SIZE; - offset += PULL_REGS_OFFSET; - offset += pin % PINS_PER_BANK / PULL_PINS_PER_REG * 0x04; - return round_down(offset, 4); -} - -static inline uint32_t gpio_pull_offset(gpio_pin_t pin) -{ - gpio_pin_t pin_num = pin % PULL_PINS_PER_REG; - return pin_num * PULL_PINS_BITS; -} - -static inline uint32_t gpio_irq_ctrl_reg_from_bank(u8 bank, unsigned bank_base) -{ - return IRQ_CTRL_REG + (bank_base + bank) * IRQ_MEM_SIZE; -} - -static inline uint32_t gpio_irq_ctrl_reg(uint32_t irq, unsigned bank_base) -{ - uint32_t bank = irq / IRQ_PER_BANK; - return gpio_irq_ctrl_reg_from_bank(bank, bank_base); -} - -static inline uint32_t gpio_irq_ctrl_offset(uint32_t irq) -{ - uint32_t offset = irq % IRQ_CTRL_IRQ_PER_REG; - return offset * IRQ_CTRL_IRQ_BITS; -} - -static inline uint32_t gpio_get_pin_base_from_bank(u8 bank, unsigned bank_base) -{ - return (bank_base + bank) * IRQ_MEM_SIZE; -} - -static inline uint32_t gpio_irq_status_reg_from_bank(u8 bank, unsigned bank_base) -{ - return IRQ_STATUS_REG + (bank_base + bank) * IRQ_MEM_SIZE; -} - -static inline uint32_t gpio_irq_status_reg(uint32_t irq, unsigned bank_base) -{ - uint32_t bank = irq / IRQ_PER_BANK; - return gpio_irq_status_reg_from_bank(bank, bank_base); -} - -static inline uint32_t gpio_irq_debounce_from_bank(u8 bank, unsigned bank_base) -{ - return IRQ_DEBOUNCE_REG + (bank_base + bank) * IRQ_MEM_SIZE; -} - -static inline uint32_t gpio_irq_debounce_reg(uint32_t irq, unsigned bank_base) -{ - uint32_t bank = irq / IRQ_PER_BANK; - return gpio_irq_debounce_from_bank(bank, bank_base); -} - -static inline uint32_t gpio_irq_status_offset(uint32_t irq) -{ - uint32_t index = irq % IRQ_STATUS_IRQ_PER_REG; - return index * IRQ_STATUS_IRQ_BITS; -} - -static inline uint32_t gpio_irq_cfg_reg(uint32_t irq, unsigned bank_base) -{ - uint32_t bank = irq / IRQ_PER_BANK; - uint32_t reg = (irq % IRQ_PER_BANK) / IRQ_CFG_IRQ_PER_REG * 0x04; - - return IRQ_CFG_REG + (bank_base + bank) * IRQ_MEM_SIZE + reg; -} - -static inline uint32_t gpio_irq_cfg_offset(uint32_t irq) -{ - uint32_t index = irq % IRQ_CFG_IRQ_PER_REG; - return index * IRQ_CFG_IRQ_BITS; -} - -static int gpio_pconf_reg(gpio_pin_t pin, pin_config_param_t param, - uint32_t *offset, uint32_t *shift, uint32_t *mask) -{ - switch (param) - { - case GPIO_TYPE_DRV: - *offset = gpio_dlevel_reg(pin); - *shift = gpio_dlevel_offset(pin); - *mask = DLEVEL_PINS_MASK; - break; - - case GPIO_TYPE_PUD: - *offset = gpio_pull_reg(pin); - *shift = gpio_pull_offset(pin); - *mask = PULL_PINS_MASK; - break; - - case GPIO_TYPE_DAT: - *offset = gpio_data_reg(pin); - *shift = gpio_data_offset(pin); - *mask = DATA_PINS_MASK; - break; - - case GPIO_TYPE_FUNC: - *offset = gpio_mux_reg(pin); - *shift = gpio_mux_offset(pin); - *mask = MUX_PINS_MASK; - break; - - default: - GPIO_ERR("Invalid mux type"); - return -1; - } - return 0; -} - - -static uint32_t count_gpio_bank_mask(void) -{ - uint32_t max_bank = (uint32_t)GPIO_MAX_BANK; - uint32_t mask = 0; - do - { - mask |= 1 << (max_bank / PINS_PER_BANK); - max_bank -= PINS_PER_BANK; - if (max_bank == 0) - { - mask |= 1; - } - } while (max_bank); - return mask; -} - -static struct gpio_desc *pin_to_gpio_desc(gpio_pin_t pin) -{ - if (pin < BANK_BOUNDARY) /* CPUX domain */ - { - return (struct gpio_desc *)g_gpio_desc[0]; - } - else /* CPUS domain */ - { - return (struct gpio_desc *)g_gpio_desc[1]; - } - return NULL; -} - -static struct gpio_desc *irq_to_gpio_desc(uint32_t irq) -{ - int i, j; - struct gpio_desc *gpio_desc; - for (i = 0; g_gpio_desc[i] != NULL; i++) - { - gpio_desc = (struct gpio_desc *)g_gpio_desc[i]; - for (j = 0; j < gpio_desc->irq_arry_size; j++) - { - if (gpio_desc->irq[j] == irq) - { - return gpio_desc; - } - } - } - GPIO_ERR("gpio to irq error!"); - return NULL; -} - -static struct gpio_desc *virq_to_gpio_desc(uint32_t irq) -{ - int i, j; - struct gpio_desc *gpio_desc; - for (i = 0; g_gpio_desc[i] != NULL; i++) - { - gpio_desc = (struct gpio_desc *)g_gpio_desc[i]; - for (j = 0; j < gpio_desc->irq_banks * IRQ_PER_BANK; j++) - { - if (gpio_desc->irq_desc[j].virq == irq) - { - return gpio_desc; - } - } - } - GPIO_ERR("gpio to virq error!"); - return NULL; -} - -static void gpio_irq_ack(struct gpio_desc *gpio_desc, int i) -{ - struct gpio_irq_desc *dirq = &gpio_desc->irq_desc[i]; - uint32_t hw_irq = dirq->virq - gpio_desc->virq_offset - GPIO_IRQ_START; - unsigned bank_base = gpio_desc->irq_bank_base[hw_irq / IRQ_PER_BANK]; - uint32_t reg = gpio_irq_status_reg(hw_irq, bank_base); - uint32_t status_idx = gpio_irq_status_offset(hw_irq); - - /* clear the pending */ - hal_writel(1 << status_idx, gpio_desc->membase + reg); -} - -static hal_irqreturn_t bad_gpio_irq_handle(void *data) -{ - GPIO_INFO("No irq registered handler for this calling !!"); - return 0; -} - -static void gpio_irq_set_type(struct gpio_desc *gpio_desc, int irq_num, unsigned long type) -{ - struct gpio_irq_desc *dirq = &gpio_desc->irq_desc[irq_num]; - uint32_t hw_irq = dirq->virq - gpio_desc->virq_offset - GPIO_IRQ_START; - unsigned bank_base = gpio_desc->irq_bank_base[hw_irq / IRQ_PER_BANK]; - uint32_t reg = gpio_irq_cfg_reg(hw_irq, bank_base); - uint32_t index = gpio_irq_cfg_offset(hw_irq); - uint32_t mode, regval; - - switch (type) - { - case IRQ_TYPE_EDGE_RISING: - mode = IRQ_EDGE_RISING; - break; - case IRQ_TYPE_EDGE_FALLING: - mode = IRQ_EDGE_FALLING; - break; - case IRQ_TYPE_EDGE_BOTH: - mode = IRQ_EDGE_BOTH; - break; - case IRQ_TYPE_LEVEL_HIGH: - mode = IRQ_LEVEL_HIGH; - break; - case IRQ_TYPE_LEVEL_LOW: - mode = IRQ_LEVEL_LOW; - break; - default: - mode = IRQ_EDGE_RISING; - } - /*should use spin lock protect here*/ - regval = hal_readl(gpio_desc->membase + reg); - regval &= ~(IRQ_CFG_IRQ_MASK << index); - hal_writel(regval | (mode << index), gpio_desc->membase + reg); - - //regval = hal_readl(gpio_desc->membase + reg); - //GPIO_ERR("gpio_desc->membase + reg: 0x%x\n", regval); - -} - -static hal_irqreturn_t gpio_irq_handle(void *data) -{ - uint32_t hwirq = *((uint32_t *)data); - uint32_t bank, reg, val, base_bank; - struct gpio_desc *gpio_desc = irq_to_gpio_desc(hwirq); - - if (gpio_desc == NULL) - { - return 0; - } - - for (bank = 0; bank < gpio_desc->irq_banks; bank ++) - { - if (hwirq == gpio_desc->irq[bank]) - { - break; - } - } - - if (bank == gpio_desc->irq_banks) - { - return 0; - } - - base_bank = gpio_desc->irq_bank_base[bank]; - reg = gpio_irq_status_reg_from_bank(bank, base_bank); -#ifdef CONFIG_AMP_SHARE_IRQ - uint32_t banks_mask = sunxi_get_banks_mask(gpio_desc->irq[bank]); - val = hal_readl(gpio_desc->membase + reg) & banks_mask; -#else - val = hal_readl(gpio_desc->membase + reg); -#endif - GPIO_INFO("hwirq = %ld, gpio_desc address is 0x%lx.", hwirq, gpio_desc->membase); - GPIO_INFO("base_bank is %ld, hwirq is %ld, val is %ld.", base_bank, hwirq, val); - if (val) - { - uint32_t irqoffset; - uint32_t irq_pin; - int i; - for (irqoffset = 0; irqoffset < IRQ_PER_BANK; irqoffset++) - { - if ((1 << irqoffset) & val) - { - break; - } - } - - if (irqoffset >= IRQ_PER_BANK) - { - GPIO_INFO("return"); - return 0; - } - irq_pin = ((base_bank + bank) * IRQ_PER_BANK) + irqoffset + gpio_desc->virq_offset; - - for (i = 0; i < gpio_desc->irq_desc_size; i++) - { - if (irq_pin == gpio_desc->irq_desc[i].pin) - { - break; - } - } - if (i >= gpio_desc->irq_desc_size) - { - return 0; - } - gpio_desc->irq_desc[i].handle_irq(gpio_desc->irq_desc[i].data); - gpio_irq_ack(gpio_desc, i); - } - return 0; -} - -bool hal_gpio_check_valid(gpio_pin_t pin) -{ - uint32_t bank = pin / PINS_PER_BANK; - uint32_t mask = count_gpio_bank_mask(); - if (!((1 << bank) & mask)) - { - return false; - } - return true; -} - -static int gpio_conf_set(gpio_pin_t pin, unsigned long *gpio_config) -{ - struct gpio_desc *gpio_desc = pin_to_gpio_desc(pin); - if (gpio_desc == NULL) - { - GPIO_ERR("gpio_desc is not inited"); - return -1; - } - unsigned long config = (unsigned long)gpio_config; - uint32_t offset, shift, mask, reg; - uint32_t arg; - pin_config_param_t param; - int ret; - - param = pinconf_to_config_param(config); - arg = pinconf_to_config_argument(config); - - ret = gpio_pconf_reg(pin, param, &offset, &shift, &mask); - if (ret < 0) - { - GPIO_ERR("can't get reg for pin %u", pin); - return -1; - } - /* fix me: shuold we keep spin_lock to protect here?*/ - reg = hal_readl(gpio_desc->membase + offset); - reg &= ~(mask << shift); - hal_writel(reg | arg << shift, gpio_desc->membase + offset); - return 0; -} - -static int gpio_conf_get(gpio_pin_t pin, unsigned long *gpio_config) -{ - struct gpio_desc *gpio_desc = pin_to_gpio_desc(pin); - if (gpio_desc == NULL) - { - GPIO_ERR("gpio_desc is not inited"); - return -1; - } - uint32_t offset, shift, mask; - uint32_t arg, val; - pin_config_param_t param = pinconf_to_config_param(*gpio_config); - int ret = 0; - - ret = gpio_pconf_reg(pin, param, &offset, &shift, &mask); - if (ret < 0) - { - GPIO_ERR("can't get reg for pin %u", pin); - return -1; - } - - val = (hal_readl(gpio_desc->membase + offset) >> shift) & mask; - switch (param) - { - case GPIO_TYPE_DRV: - case GPIO_TYPE_DAT: - case GPIO_TYPE_PUD: - case GPIO_TYPE_FUNC: - arg = val; - break; - default: - ret = -1; - GPIO_ERR("Invalid mux type"); - return -1; - } - if (!ret) - { - *gpio_config = pinconf_to_config_packed(param, arg); - } - return ret; -} - -int hal_gpio_get_data(gpio_pin_t pin, gpio_data_t *data) -{ - unsigned long config; - int ret = 0; - - if (NULL == data) - { - ret = -1; - GPIO_ERR("Invalid parameter!"); - return ret; - } - - config = GPIO_CFG_PACK(GPIO_TYPE_DAT, 0xffffff); - ret = gpio_conf_get(pin, &config); - if (ret < 0) - { - GPIO_ERR("get conf error!"); - return ret; - } - - *data = GPIO_CFG_UNPACK_VALUE(config); - - return ret; -} - -int hal_gpio_set_data(gpio_pin_t pin, gpio_data_t data) -{ - unsigned long config; - int ret = 0; - - config = GPIO_CFG_PACK(GPIO_TYPE_DAT, data); - ret = gpio_conf_set(pin, (unsigned long *)config); - if (ret < 0) - { - GPIO_ERR("set conf error!"); - return ret; - } - return ret; -} - -int hal_gpio_set_direction(gpio_pin_t pin, gpio_direction_t direction) -{ - unsigned long config; - int ret = 0; - - config = GPIO_CFG_PACK(GPIO_TYPE_FUNC, direction); - ret = gpio_conf_set(pin, (unsigned long *)config); - if (ret < 0) - { - GPIO_ERR("set conf error!"); - return ret; - } - return ret; -} - -int hal_gpio_get_direction(gpio_pin_t pin, gpio_direction_t *direction) -{ - unsigned long config; - int ret = 0; - - if (NULL == direction) - { - ret = -1; - GPIO_ERR("Invalid parameter!"); - return ret; - } - config = GPIO_CFG_PACK(GPIO_TYPE_FUNC, 0xffffff); - ret = gpio_conf_get(pin, &config); - if (ret < 0) - { - GPIO_ERR("get conf error!"); - return ret; - } - - *direction = GPIO_CFG_UNPACK_VALUE(config); - - return ret; -} - -int hal_gpio_set_pull(gpio_pin_t pin, gpio_pull_status_t pull) -{ - unsigned long config; - int ret = 0; - - config = GPIO_CFG_PACK(GPIO_TYPE_PUD, pull); - ret = gpio_conf_set(pin, (unsigned long *)config); - if (ret < 0) - { - GPIO_ERR("set conf error!"); - return ret; - } - return ret; -} - -int hal_gpio_get_pull(gpio_pin_t pin, gpio_pull_status_t *pull) -{ - unsigned long config; - int ret = 0; - - if (NULL == pull) - { - ret = -1; - GPIO_ERR("Invalid parameter!"); - return ret; - } - config = GPIO_CFG_PACK(GPIO_TYPE_PUD, 0xffffff); - ret = gpio_conf_get(pin, &config); - if (ret < 0) - { - GPIO_ERR("get conf error!"); - return ret; - } - - *pull = GPIO_CFG_UNPACK_VALUE(config); - - return ret; - -} - -int hal_gpio_set_driving_level(gpio_pin_t pin, gpio_driving_level_t level) -{ - unsigned long config; - int ret = 0; - - config = GPIO_CFG_PACK(GPIO_TYPE_DRV, level); - ret = gpio_conf_set(pin, (unsigned long *)config); - if (ret < 0) - { - GPIO_ERR("set conf error!"); - return ret; - } - return ret; -} - -int hal_gpio_get_driving_level(gpio_pin_t pin, gpio_driving_level_t *level) -{ - unsigned long config; - int ret = 0; - - if (NULL == level) - { - ret = -1; - GPIO_ERR("Invalid parameter!"); - return ret; - } - config = GPIO_CFG_PACK(GPIO_TYPE_DRV, 0xffffff); - ret = gpio_conf_get(pin, &config); - if (ret < 0) - { - GPIO_ERR("get conf error!"); - return ret; - } - - *level = GPIO_CFG_UNPACK_VALUE(config); - - return ret; -} - -int hal_gpio_pinmux_set_function(gpio_pin_t pin, gpio_muxsel_t function_index) -{ - unsigned long config; - int ret = 0; - - config = GPIO_CFG_PACK(GPIO_TYPE_FUNC, function_index); - ret = gpio_conf_set(pin, (unsigned long *)config); - if (ret < 0) - { - GPIO_ERR("set pin mux error!"); - return ret; - } - return ret; -} - -int hal_gpio_pinmux_get_function(gpio_pin_t pin, gpio_muxsel_t *function_index) -{ - unsigned long config; - int ret = 0; - - if (NULL == function_index) - { - ret = -1; - GPIO_ERR("Invalid parameter!"); - return ret; - } - config = GPIO_CFG_PACK(GPIO_TYPE_FUNC, 0xffffff); - ret = gpio_conf_get(pin, &config); - if (ret < 0) - { - GPIO_ERR("get conf error!"); - return ret; - } - - *function_index = GPIO_CFG_UNPACK_VALUE(config); - - return ret; -} - -int hal_gpio_sel_vol_mode(gpio_pin_t pin, gpio_power_mode_t pm_sel) -{ - uint32_t bank, temp; - struct gpio_desc *gpio_desc; - - gpio_desc = pin_to_gpio_desc(pin); - - if (gpio_desc == NULL) - { - return -1; - } - - bank = (pin - gpio_desc->pin_base) / PINS_PER_BANK; - temp = hal_readl(gpio_desc->membase + POWER_MODE_SEL); - temp |= (pm_sel << bank); - hal_writel(temp, gpio_desc->membase + POWER_MODE_SEL); - - if (bank == 5) - { - temp = hal_readl(gpio_desc->membase + POWER_VOL_SEL); - temp &= ~(1 >> 0); - temp |= (!pm_sel); - hal_writel(temp, gpio_desc->membase + POWER_VOL_SEL); - } - - return 0; -} - -int hal_gpio_set_debounce(gpio_pin_t pin, unsigned value) -{ - uint32_t irq, hw_irq, reg, reg_val; - struct gpio_desc *gpio_desc; - unsigned bank_base; - unsigned int val_clk_select, val_clk_per_scale; - int ret = 0; - - gpio_desc = pin_to_gpio_desc(pin); - - if (gpio_desc == NULL) - { - return -1; - } - - ret = hal_gpio_to_irq(pin, &irq); - - if (ret < 0) - { - GPIO_ERR("gpio to irq error"); - return -1; - } - - hw_irq = irq - gpio_desc->virq_offset - GPIO_IRQ_START; - bank_base = gpio_desc->irq_bank_base[hw_irq / IRQ_PER_BANK]; - reg = gpio_irq_debounce_reg(hw_irq, bank_base); - - reg_val = hal_readl(gpio_desc->membase + reg); - val_clk_select = value & 1; - val_clk_per_scale = (value >> 4) & 0x07; - - /*set debounce pio interrupt clock select */ - reg_val &= ~(1 << 0); - reg_val |= val_clk_select; - - /* set debounce clock pre scale */ - reg_val &= ~(7 << 4); - reg_val |= val_clk_per_scale << 4; - hal_writel(reg_val, gpio_desc->membase + reg); - - return 0; -} - - -int hal_gpio_to_irq(gpio_pin_t pin, uint32_t *irq) -{ - int i = 0; - struct gpio_desc *gpio_desc = pin_to_gpio_desc(pin); - - for (i = 0; i < gpio_desc->irq_banks * IRQ_PER_BANK; i++) - { - if (pin != gpio_desc->irq_desc[i].pin) - { - continue; - } - GPIO_INFO("gpio %lu to irq %lu succeed!", pin, gpio_desc->irq_desc[i].virq); - *irq = gpio_desc->irq_desc[i].virq; - return 0; - } - - return -1; -} - - -int hal_gpio_irq_request(uint32_t irq, hal_irq_handler_t hdle, unsigned long flags, void *data) -{ - struct gpio_desc *gpio_desc = virq_to_gpio_desc(irq); - GPIO_INFO("[%s]gpio_desc address is 0x%lx.", __func__, gpio_desc->membase); - int irq_max_num = gpio_desc->irq_desc_size + GPIO_IRQ_START; - int ret = 0; -#ifdef CONFIG_AMP_SHARE_IRQ - uint32_t hw_irq = irq - gpio_desc->virq_offset - GPIO_IRQ_START; - uint32_t bank_mask; -#endif - irq -= gpio_desc->virq_offset; - -#ifdef CONFIG_AMP_SHARE_IRQ - bank_mask = sunxi_get_banks_mask(gpio_desc->irq[hw_irq / IRQ_PER_BANK]); - bank_mask &= (1 << hw_irq); - if (!bank_mask) { - GPIO_ERR("irq%d not belong to this chip,hwirq %d, mask=0x%lx\n", irq, - gpio_desc->irq[hw_irq / IRQ_PER_BANK], - sunxi_get_banks_mask(gpio_desc->irq[hw_irq / IRQ_PER_BANK])); - return -1; - } -#endif - if (irq >= GPIO_IRQ_START && irq < irq_max_num) - { - if (hdle && gpio_desc->irq_desc[irq - GPIO_IRQ_START].handle_irq == bad_gpio_irq_handle) - { - gpio_desc->irq_desc[irq - GPIO_IRQ_START].handle_irq = hdle; - gpio_desc->irq_desc[irq - GPIO_IRQ_START].flags = flags; - gpio_desc->irq_desc[irq - GPIO_IRQ_START].data = data; - } - /*set irq tpye*/ - gpio_irq_set_type(gpio_desc, irq - GPIO_IRQ_START, flags); - - /*set pin mux*/ - ret = hal_gpio_pinmux_set_function(gpio_desc->irq_desc[irq - GPIO_IRQ_START].pin, GPIO_MUXSEL_EINT); - - if (ret < 0) - { - GPIO_ERR("set pin mux error!"); - return -1; - } - GPIO_INFO("request irq %lu succeed!", irq); - return irq; - } - - GPIO_ERR("Wrong irq NO.(%u) to request !!", (unsigned int)irq); - return -1; -} - -int hal_gpio_irq_free(uint32_t irq) -{ - struct gpio_desc *gpio_desc = virq_to_gpio_desc(irq); - int irq_max_num = gpio_desc->irq_desc_size + GPIO_IRQ_START; - irq -= gpio_desc->virq_offset; - if (irq >= GPIO_IRQ_START && irq < irq_max_num) - { - gpio_desc->irq_desc[irq - GPIO_IRQ_START].handle_irq = bad_gpio_irq_handle; - gpio_desc->irq_desc[irq - GPIO_IRQ_START].flags = 0; - gpio_desc->irq_desc[irq - GPIO_IRQ_START].data = NULL; - GPIO_INFO("free irq %lu succeed!", irq); - return irq; - } - - GPIO_ERR("Wrong irq NO.(%u) to free !!", (unsigned int)irq); - return -1; -} - -int hal_gpio_irq_enable(uint32_t irq) -{ - struct gpio_desc *gpio_desc = virq_to_gpio_desc(irq); - GPIO_INFO("[%s]gpio_desc address is 0x%lx.", __func__, gpio_desc->membase); - int irq_max_num = gpio_desc->irq_desc_size + GPIO_IRQ_START; - uint32_t hw_irq = irq - gpio_desc->virq_offset - GPIO_IRQ_START; - unsigned bank_base = gpio_desc->irq_bank_base[hw_irq / IRQ_PER_BANK]; - uint32_t reg = gpio_irq_ctrl_reg(hw_irq, bank_base); - uint32_t index = gpio_irq_ctrl_offset(hw_irq); - uint32_t val = 0; - - irq -= gpio_desc->virq_offset; - - if (irq < GPIO_IRQ_START || irq >= irq_max_num) - { - GPIO_ERR("Wrong irq NO.(%u) to enable !!", (unsigned int)irq); - return -1; - } - - /*clear pending*/ - gpio_irq_ack(gpio_desc, hw_irq); - - /*unmask the irq,should keep spin lock to protect*/ - val = hal_readl(gpio_desc->membase + reg); - hal_writel(val | (1 << index), gpio_desc->membase + reg); - return 0; -} -#ifdef CONFIG_STANDBY -struct gpio_pm_reg_cache gpio_pm_reg; - -static int gpio_pm_alloc_mem(uint32_t desc_index, uint32_t mem_size) -{ - if (desc_index > 1) - { - GPIO_ERR("index[%d] exceed desc_index range!", desc_index); - return -1; - } - - gpio_pm_reg.reg_dump[desc_index] = hal_malloc(mem_size); - if (gpio_pm_reg.reg_dump[desc_index] == NULL) - { - GPIO_ERR("malloc reg_mem[%d] error!", desc_index); - return -1; - } - - gpio_pm_reg.reg_dump_size[desc_index] = mem_size; - - return 0; -} - -int hal_gpio_suspend() -{ - int i; - void *mem = NULL; - uint32_t mem_size; - uint32_t flags; - struct gpio_desc *gpio_desc = NULL; - - GPIO_INFO("gpio suspend\n"); - - flags = hal_interrupt_save(); - for (i = 0; g_gpio_desc[i] != NULL; i++) { - gpio_desc = (struct gpio_desc *)g_gpio_desc[i]; - mem = gpio_pm_reg.reg_dump[i]; - mem_size = gpio_pm_reg.reg_dump_size[i]; - if (mem != NULL) - memcpy(mem, (uint32_t *)gpio_desc->membase, mem_size); - } - hal_interrupt_restore(flags); - - return 0; -} - -int hal_gpio_resume() -{ - int i; - void *mem = NULL; - uint32_t mem_size; - uint32_t flags; - struct gpio_desc *gpio_desc = NULL; - - flags = hal_interrupt_save(); - for (i = 0; g_gpio_desc[i] != NULL; i++) { - gpio_desc = (struct gpio_desc *)g_gpio_desc[i]; - mem = gpio_pm_reg.reg_dump[i]; - mem_size = gpio_pm_reg.reg_dump_size[i]; - if (gpio_pm_reg.reg_dump[i] != NULL) - memcpy((uint32_t *)gpio_desc->membase, mem, mem_size); - } - hal_interrupt_restore(flags); - - GPIO_INFO("gpio resume"); - - return 0; -} -#endif -#ifdef CONFIG_COMPONENTS_PM -struct gpio_pm_reg_cache gpio_pm_reg; - -static int gpio_pm_alloc_mem(uint32_t desc_index, uint32_t mem_size) -{ - if (desc_index > 1) - { - GPIO_ERR("index[%d] exceed desc_index range!", desc_index); - return -1; - } - - gpio_pm_reg.reg_dump[desc_index] = hal_malloc(mem_size); - if (gpio_pm_reg.reg_dump[desc_index] == NULL) - { - GPIO_ERR("malloc reg_mem[%d] error!", desc_index); - return -1; - } - - gpio_pm_reg.reg_dump_size[desc_index] = mem_size; - - return 0; -} - -static int hal_gpio_suspend(void *data, suspend_mode_t mode) -{ - int i; - int j; - uint32_t *mem = NULL; - uint32_t mem_size; - uint32_t flags; - struct gpio_desc *gpio_desc = NULL; - - flags = hal_interrupt_save(); - for (i = 0; g_gpio_desc[i] != NULL; i++) { - gpio_desc = (struct gpio_desc *)g_gpio_desc[i]; - mem = gpio_pm_reg.reg_dump[i]; - mem_size = gpio_pm_reg.reg_dump_size[i]; - if (mem != NULL) { - for(j = 0; j < (mem_size >> 2); j++) { - mem[j] = *(volatile unsigned int *)((unsigned long)gpio_desc->membase + j * 4); - } - } - } - hal_interrupt_restore(flags); - - printf("gpio suspend end\n"); - return 0; -} - -static void hal_gpio_resume(void *data, suspend_mode_t mode) -{ - int i; - int j; - uint32_t *mem = NULL; - uint32_t mem_size; - uint32_t flags; - struct gpio_desc *gpio_desc = NULL; - - flags = hal_interrupt_save(); - for (i = 0; g_gpio_desc[i] != NULL; i++) { - gpio_desc = (struct gpio_desc *)g_gpio_desc[i]; - mem = gpio_pm_reg.reg_dump[i]; - mem_size = gpio_pm_reg.reg_dump_size[i]; - if (gpio_pm_reg.reg_dump[i] != NULL) { - for(j = 0; j < (mem_size >> 2); j++) { - *(volatile unsigned int *)((unsigned long)gpio_desc->membase + j * 4) = mem[j]; - } - } - } - hal_interrupt_restore(flags); - - printf("gpio resume end\n"); -} - -static struct syscore_ops gpio_syscore_ops = { - .name = "gpio_syscore_ops", - .suspend = hal_gpio_suspend, - .resume = hal_gpio_resume, - .common_syscore = COMMON_SYSCORE, -}; -#endif - -int hal_gpio_irq_disable(uint32_t irq) -{ - struct gpio_desc *gpio_desc = virq_to_gpio_desc(irq); - GPIO_INFO("[%s]gpio_desc address is 0x%lx.", __func__, gpio_desc->membase); - int irq_max_num = gpio_desc->irq_desc_size + GPIO_IRQ_START; - uint32_t hw_irq = irq - gpio_desc->virq_offset - GPIO_IRQ_START; - unsigned bank_base = gpio_desc->irq_bank_base[hw_irq / IRQ_PER_BANK]; - uint32_t reg = gpio_irq_ctrl_reg(hw_irq, bank_base); - uint32_t index = gpio_irq_ctrl_offset(hw_irq); - uint32_t val = 0; - irq -= gpio_desc->virq_offset; - if (irq < GPIO_IRQ_START || irq >= irq_max_num) - { - GPIO_ERR("Wrong irq NO.(%u) to enable !!", (unsigned int)irq); - return -1; - } - - /*mask the irq,should keep spin lock to protect*/ - val = hal_readl(gpio_desc->membase + reg); - hal_writel(val & ~(1 << index), gpio_desc->membase + reg); - return 0; -} - -int hal_gpio_init(void) -{ - int i, j, ret; - struct gpio_desc *gpio_desc = NULL; - struct gpio_irq_desc *irq_desc = NULL; - int irq_desc_array_size = 0; - char irqname[32] = {0}; - - /* initialize g_gpio_desc */ - g_gpio_desc = gpio_get_platform_desc(); - if (g_gpio_desc == NULL) - { - GPIO_ERR("initialize global platform desc failed!"); - return -1; - } - - for (j = 0; g_gpio_desc[j] != NULL; j++) - { - gpio_desc = (struct gpio_desc *)g_gpio_desc[j]; - irq_desc_array_size = gpio_desc->irq_banks * IRQ_PER_BANK; - gpio_desc->irq_desc_size = irq_desc_array_size; - -#ifdef CONFIG_STANDBY - ret = gpio_pm_alloc_mem(j, gpio_desc->resource_size); - if (ret) - { - GPIO_ERR("gpio[%d] pm alloc mem err!", j); - return ret; - } -#endif -#ifdef CONFIG_COMPONENTS_PM - ret = gpio_pm_alloc_mem(j, gpio_desc->resource_size); - if (ret) - { - GPIO_ERR("gpio[%d] pm alloc mem err!", j); - return ret; - } - pm_syscore_register(&gpio_syscore_ops); -#endif - - irq_desc = (struct gpio_irq_desc *)hal_malloc(irq_desc_array_size * sizeof(struct gpio_irq_desc)); - if (irq_desc == NULL) - { - GPIO_ERR("alloc memory failed!"); - return -1; - } - - memset(irq_desc, 0, irq_desc_array_size * sizeof(struct gpio_irq_desc)); - for (i = 0; i < irq_desc_array_size; i++) - { - unsigned int j = i / IRQ_PER_BANK; - unsigned int k = i % IRQ_PER_BANK; - unsigned bank_base = gpio_desc->irq_bank_base[j]; - irq_desc[i].pin = gpio_get_pin_base_from_bank(j, bank_base) + gpio_desc->virq_offset + k; - irq_desc[i].virq = GPIO_IRQ_START + gpio_desc->virq_offset + i; - irq_desc[i].handle_irq = bad_gpio_irq_handle; - } - - gpio_desc->irq_desc = irq_desc; - - for (i = 0; i < gpio_desc->irq_banks; i++) - { - /* mask all irq */ - unsigned bank_base = gpio_desc->irq_bank_base[i]; -#ifdef CONFIG_AMP_SHARE_IRQ - uint32_t bank_mask, ctrl_val, sta_val, hw_irq; - unsigned long ctrl_reg, sta_reg; - - ctrl_reg = gpio_desc->membase + gpio_irq_ctrl_reg_from_bank(i, bank_base); - sta_reg = gpio_desc->membase + gpio_irq_status_reg_from_bank(i, bank_base); - - /* get gpio bank mask from share interrupt table */ - bank_mask = sunxi_get_banks_mask(gpio_desc->irq[i]); - ctrl_val = hal_readl(ctrl_reg) & (~bank_mask); - sta_val = 0xffffffff & bank_mask; - - hal_writel(ctrl_val, ctrl_reg); - hal_writel(sta_val, sta_reg); -#else - hal_writel(0, gpio_desc->membase + - gpio_irq_ctrl_reg_from_bank(i, bank_base)); - /* clear pending flags */ - hal_writel(0xffffffff, gpio_desc->membase + - gpio_irq_status_reg_from_bank(i, bank_base)); -#endif - } - - /* request irq */ - for (i = 0; i < gpio_desc->irq_arry_size; i++) - { -#ifdef CONFIG_AMP_SHARE_IRQ - uint32_t bank_mask = sunxi_get_banks_mask(gpio_desc->irq[i]); - if (!bank_mask) - continue; -#endif - snprintf(irqname, 32, "gpio-ctl%d%d", j, i); - ret = hal_request_irq(gpio_desc->irq[i], gpio_irq_handle, irqname, (void *)&gpio_desc->irq[i]); - if (ret < 0) - { - GPIO_ERR("gpio request irq %d failed!", i); - } - } - - /* enable irq */ - for (i = 0; i < gpio_desc->irq_arry_size; i++) - { -#ifdef CONFIG_AMP_SHARE_IRQ - uint32_t bank_mask = sunxi_get_banks_mask(gpio_desc->irq[i]); - if (!bank_mask) - continue; -#endif - hal_enable_irq(gpio_desc->irq[i]); - } - } - GPIO_INFO("gpio init success!"); - return 0; -} - -int hal_gpio_r_irq_disable(uint32_t irq) -{ - int i = 0; - struct gpio_desc *gpio_desc = irq_to_gpio_desc(irq); - if (gpio_desc == NULL) - { - GPIO_ERR("initialize global platform desc failed!"); - return -1; - } - - for (i = 0; i < gpio_desc->irq_arry_size; i++) - { - if (gpio_desc->irq[i] == irq) - { - hal_disable_irq(gpio_desc->irq[i]); - } - } - return 0; -} - -int hal_gpio_r_irq_enable(uint32_t irq) -{ - int i = 0; - struct gpio_desc *gpio_desc = irq_to_gpio_desc(irq); - if (gpio_desc == NULL) - { - GPIO_ERR("initialize global platform desc failed!"); - return -1; - } - - for (i = 0; i < gpio_desc->irq_arry_size; i++) - { - if (gpio_desc->irq[i] == irq) - { - hal_enable_irq(gpio_desc->irq[i]); - } - } - return 0; -} - -int hal_gpio_r_all_irq_disable(void) -{ - int i = 0, j = 0; - struct gpio_desc *gpio_desc = NULL; - for (j = 0; g_gpio_desc[j] != NULL; j++) - { - gpio_desc = (struct gpio_desc *)g_gpio_desc[j]; - for (i = 0; i < gpio_desc->irq_arry_size; i++) - { - hal_disable_irq(gpio_desc->irq[i]); - } - } - return 0; -} diff --git a/src/platform/f133/hal/gpio/sun20iw2/Makefile b/src/platform/f133/hal/gpio/sun20iw2/Makefile deleted file mode 100644 index fb13803e3a575264826834704514d0f9719c8813..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun20iw2/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-y += gpio-sun20iw2.o diff --git a/src/platform/f133/hal/gpio/sun20iw2/gpio-sun20iw2.c b/src/platform/f133/hal/gpio/sun20iw2/gpio-sun20iw2.c deleted file mode 100644 index 7e0e4164808cb1df3b81ffb24b845bdcd71af120..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun20iw2/gpio-sun20iw2.c +++ /dev/null @@ -1,89 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#include -#include -/* #include */ - -#include -#include "../gpio.h" - -#define SUNXI_BNAK_REG_SIZE 0x218 - -static const unsigned int sun20iw2p1_irq_bank_base[] = -{ - SUNXI_PIO_BANK_BASE(PA_BASE, 0), - SUNXI_PIO_BANK_BASE(PB_BASE, 1), - SUNXI_PIO_BANK_BASE(PC_BASE, 2), -}; - -static const unsigned int sun20iw2p1_bank_base[] = -{ - SUNXI_PIO_BANK_BASE(PA_BASE, 0), - SUNXI_PIO_BANK_BASE(PB_BASE, 1), - SUNXI_PIO_BANK_BASE(PC_BASE, 2), -}; - -static const int sun20iw2p1_bank_irq_num[] = -{ - SUNXI_IRQ_GPIOA, - SUNXI_IRQ_GPIOB, - SUNXI_IRQ_GPIOC, -}; - -static struct gpio_desc sun20iw2p1_gpio_desc = -{ - .membase = SUNXI_GPIO_PBASE, - .resource_size = SUNXI_BNAK_REG_SIZE, - .virq_offset = 0, - .irq_arry_size = ARRAY_SIZE(sun20iw2p1_bank_irq_num), - .irq = (const uint32_t *)sun20iw2p1_bank_irq_num, - .pin_base = PA_BASE, - .banks = ARRAY_SIZE(sun20iw2p1_bank_base), - .bank_base = (const uint32_t *)sun20iw2p1_bank_base, - .irq_banks = ARRAY_SIZE(sun20iw2p1_irq_bank_base), - .irq_bank_base = (const uint32_t *)sun20iw2p1_irq_bank_base, -}; - -static const struct gpio_desc *platform_gpio_desc[] = -{ - &sun20iw2p1_gpio_desc, - NULL, -}; - -/* - * Called by hal_gpio_init(). - */ -const struct gpio_desc **gpio_get_platform_desc(void) -{ - return platform_gpio_desc; -} diff --git a/src/platform/f133/hal/gpio/sun20iw2/platform-gpio.h b/src/platform/f133/hal/gpio/sun20iw2/platform-gpio.h deleted file mode 100644 index a0cdd81183d7e9f6c6c22baa3be8d91a5a72fbdf..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun20iw2/platform-gpio.h +++ /dev/null @@ -1,131 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __PLATFORM_GPIO_H__ -#define __PLATFORM_GPIO_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define GPIO_MAX_BANK PL_BASE -#define BANK_BOUNDARY PL_BASE -#define SUNXI_GPIO_PBASE 0x4004A400 - -/* sunxi gpio irq*/ -#if defined(CONFIG_ARCH_RISCV_C906) -#define SUNXI_IRQ_GPIOA (131) -#define SUNXI_IRQ_GPIOB (132) -#define SUNXI_IRQ_GPIOC (133) -#elif defined(CONFIG_ARCH_DSP) - -#include - -#define SUNXI_IRQ_GPIOA (RINTC_IRQ_MASK | 116) -#define SUNXI_IRQ_GPIOB (RINTC_IRQ_MASK | 117) -#define SUNXI_IRQ_GPIOC (RINTC_IRQ_MASK | 118) -#else -#define SUNXI_IRQ_GPIOA (115) -#define SUNXI_IRQ_GPIOB (116) -#define SUNXI_IRQ_GPIOC (117) -#endif - -typedef enum -{ - GPIO_PA0 = GPIOA(0), - GPIO_PA1 = GPIOA(1), - GPIO_PA2 = GPIOA(2), - GPIO_PA3 = GPIOA(3), - GPIO_PA4 = GPIOA(4), - GPIO_PA5 = GPIOA(5), - GPIO_PA6 = GPIOA(6), - GPIO_PA7 = GPIOA(7), - GPIO_PA8 = GPIOA(8), - GPIO_PA9 = GPIOA(9), - GPIO_PA10 = GPIOA(10), - GPIO_PA11 = GPIOA(11), - GPIO_PA12 = GPIOA(12), - GPIO_PA13 = GPIOA(13), - GPIO_PA14 = GPIOA(14), - GPIO_PA15 = GPIOA(15), - GPIO_PA16 = GPIOA(16), - GPIO_PA17 = GPIOA(17), - GPIO_PA18 = GPIOA(18), - GPIO_PA19 = GPIOA(19), - GPIO_PA20 = GPIOA(20), - GPIO_PA21 = GPIOA(21), - GPIO_PA22 = GPIOA(22), - GPIO_PA23 = GPIOA(23), - GPIO_PA24 = GPIOA(24), - GPIO_PA25 = GPIOA(25), - GPIO_PA26 = GPIOA(26), - GPIO_PA27 = GPIOA(27), - GPIO_PA28 = GPIOA(28), - GPIO_PA29 = GPIOA(29), - - GPIO_PB0 = GPIOB(0), - GPIO_PB1 = GPIOB(1), - GPIO_PB2 = GPIOB(2), - GPIO_PB3 = GPIOB(3), - GPIO_PB4 = GPIOB(4), - GPIO_PB5 = GPIOB(5), - GPIO_PB6 = GPIOB(6), - GPIO_PB7 = GPIOB(7), - GPIO_PB8 = GPIOB(8), - GPIO_PB9 = GPIOB(9), - GPIO_PB10 = GPIOB(10), - GPIO_PB11 = GPIOB(11), - GPIO_PB12 = GPIOB(12), - GPIO_PB13 = GPIOB(13), - GPIO_PB14 = GPIOB(14), - GPIO_PB15 = GPIOB(15), - - GPIO_PC0 = GPIOC(0), - GPIO_PC1 = GPIOC(1), - GPIO_PC2 = GPIOC(2), - GPIO_PC3 = GPIOC(3), - GPIO_PC4 = GPIOC(4), - GPIO_PC5 = GPIOC(5), - GPIO_PC6 = GPIOC(6), - GPIO_PC7 = GPIOC(7), - GPIO_PC8 = GPIOC(8), - GPIO_PC9 = GPIOC(9), - GPIO_PC10 = GPIOC(10), - GPIO_PC11 = GPIOC(11), - GPIO_PC12 = GPIOC(12), - -} gpio_pin_t; - -#ifdef __cplusplus -} -#endif -#endif /* __PLATFORM_GPIO_H__ */ diff --git a/src/platform/f133/hal/gpio/sun50iw11/Makefile b/src/platform/f133/hal/gpio/sun50iw11/Makefile deleted file mode 100644 index 56baf89c47c2c0131fe19f29195beb028a446888..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun50iw11/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-y += gpio-sun50iw11.o diff --git a/src/platform/f133/hal/gpio/sun50iw11/gpio-sun50iw11.c b/src/platform/f133/hal/gpio/sun50iw11/gpio-sun50iw11.c deleted file mode 100644 index 619aa759d8bcb20389e600b55f24bd3ea0105fa5..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun50iw11/gpio-sun50iw11.c +++ /dev/null @@ -1,87 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#include -#include - -#include -#include "../gpio.h" - -static const unsigned int sun50iw11p1_r_irq_bank_base[] = -{ - SUNXI_R_PIO_BANK_BASE(PL_BASE, 0), - SUNXI_R_PIO_BANK_BASE(PM_BASE, 1), - SUNXI_R_PIO_BANK_BASE(PN_BASE, 2), -}; - -static const unsigned int sun50iw11p1_r_bank_base[] = -{ - SUNXI_R_PIO_BANK_BASE(PL_BASE, 0), - SUNXI_R_PIO_BANK_BASE(PM_BASE, 1), - SUNXI_R_PIO_BANK_BASE(PN_BASE, 2), -}; - -static const int sun50iw11p1_r_bank_irq_num[] = -{ - SUNXI_IRQ_R_GPIOL, - SUNXI_IRQ_R_GPIOM, - SUNXI_IRQ_R_GPION, -}; - -static struct gpio_desc sun50iw11p1_r_gpio_desc = -{ - .membase = SUNXI_GPIO_R_PBASE, - .virq_offset = BANK_BOUNDARY, - .irq_arry_size = ARRAY_SIZE(sun50iw11p1_r_bank_irq_num), - .irq = (const uint32_t *)sun50iw11p1_r_bank_irq_num, - .pin_base = PL_BASE, - .banks = ARRAY_SIZE(sun50iw11p1_r_bank_base), - .bank_base = (const uint32_t *)sun50iw11p1_r_bank_base, - .irq_banks = ARRAY_SIZE(sun50iw11p1_r_irq_bank_base), - .irq_bank_base = (const uint32_t *)sun50iw11p1_r_irq_bank_base, -}; - -static const struct gpio_desc *platform_gpio_desc[] = -{ - /* FIXME: fake gpio desc for CPUX */ - &sun50iw11p1_r_gpio_desc, - &sun50iw11p1_r_gpio_desc, - NULL, -}; - -/* - * Called by hal_gpio_init(). - */ -const struct gpio_desc **gpio_get_platform_desc(void) -{ - return platform_gpio_desc; -} diff --git a/src/platform/f133/hal/gpio/sun50iw11/platform-gpio.h b/src/platform/f133/hal/gpio/sun50iw11/platform-gpio.h deleted file mode 100644 index 7babe36e2c40452d4888c9bb6e0ec1426bd2b73d..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun50iw11/platform-gpio.h +++ /dev/null @@ -1,104 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __PLATFORM_GPIO_H__ -#define __PLATFORM_GPIO_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define GPIO_MAX_BANK PN_BASE -#define BANK_BOUNDARY PL_BASE -#define SUNXI_GPIO_R_PBASE 0x07022000 - -#if defined(CONFIG_DRIVERS_INTC) -#define SUNXI_IRQ_R_GPIOL (RINTC_IRQ_MASK | 6) -#define SUNXI_IRQ_R_GPIOM (RINTC_IRQ_MASK | 7) -#define SUNXI_IRQ_R_GPION (RINTC_IRQ_MASK | 8) -#endif - -typedef enum -{ - GPIO_PL0 = GPIOL(0), - GPIO_PL1 = GPIOL(1), - GPIO_PL2 = GPIOL(2), - GPIO_PL3 = GPIOL(3), - GPIO_PL4 = GPIOL(4), - GPIO_PL5 = GPIOL(5), - GPIO_PL6 = GPIOL(6), - GPIO_PL7 = GPIOL(7), - GPIO_PL8 = GPIOL(8), - GPIO_PL9 = GPIOL(9), - GPIO_PL10 = GPIOL(10), - - GPIO_PM0 = GPIOM(0), - GPIO_PM1 = GPIOM(1), - GPIO_PM2 = GPIOM(2), - GPIO_PM3 = GPIOM(3), - GPIO_PM4 = GPIOM(4), - GPIO_PM5 = GPIOM(5), - GPIO_PM6 = GPIOM(6), - GPIO_PM7 = GPIOM(7), - GPIO_PM8 = GPIOM(8), - - GPIO_PN0 = GPION(0), - GPIO_PN1 = GPION(1), - GPIO_PN2 = GPION(2), - GPIO_PN3 = GPION(3), - GPIO_PN4 = GPION(4), - GPIO_PN5 = GPION(5), - GPIO_PN6 = GPION(6), - GPIO_PN7 = GPION(7), - GPIO_PN8 = GPION(8), - GPIO_PN9 = GPION(9), - GPIO_PN10 = GPION(10), - GPIO_PN11 = GPION(11), - GPIO_PN12 = GPION(12), - GPIO_PN13 = GPION(13), - GPIO_PN14 = GPION(14), - GPIO_PN15 = GPION(15), - GPIO_PN16 = GPION(16), - GPIO_PN17 = GPION(17), - GPIO_PN18 = GPION(18), - GPIO_PN19 = GPION(19), - GPIO_PN20 = GPION(20), - GPIO_PN21 = GPION(21), - GPIO_PN22 = GPION(22), - GPIO_PN23 = GPION(23), - -} gpio_pin_t; - -#ifdef __cplusplus -} -#endif -#endif /* __PLATFORM_GPIO_H__ */ diff --git a/src/platform/f133/hal/gpio/sun55iw3/Makefile b/src/platform/f133/hal/gpio/sun55iw3/Makefile deleted file mode 100644 index 0e591f6e4f144b1df0cea60a27d06d4a771676fc..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun55iw3/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-y += gpio-sun55iw3.o diff --git a/src/platform/f133/hal/gpio/sun55iw3/gpio-sun55iw3.c b/src/platform/f133/hal/gpio/sun55iw3/gpio-sun55iw3.c deleted file mode 100644 index 883088502af17320dfd35e9ae48858ca0bc83030..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun55iw3/gpio-sun55iw3.c +++ /dev/null @@ -1,95 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#include -#include - -#include -#include "../gpio.h" - -static const unsigned int sun55iw3p1_irq_bank_base[] = -{ - SUNXI_PIO_BANK_BASE(PB_BASE, 0), - SUNXI_PIO_BANK_BASE(PC_BASE, 1), - SUNXI_PIO_BANK_BASE(PD_BASE, 2), - SUNXI_PIO_BANK_BASE(PE_BASE, 3), - SUNXI_PIO_BANK_BASE(PF_BASE, 4), - SUNXI_PIO_BANK_BASE(PG_BASE, 5), -}; - -static const unsigned int sun55iw3p1_bank_base[] = -{ - SUNXI_PIO_BANK_BASE(PB_BASE, 0), - SUNXI_PIO_BANK_BASE(PC_BASE, 1), - SUNXI_PIO_BANK_BASE(PD_BASE, 2), - SUNXI_PIO_BANK_BASE(PE_BASE, 3), - SUNXI_PIO_BANK_BASE(PF_BASE, 4), - SUNXI_PIO_BANK_BASE(PG_BASE, 5), -}; - -static const int sun55iw3p1_bank_irq_num[] = -{ - SUNXI_IRQ_GPIOB, - SUNXI_IRQ_GPIOC, - SUNXI_IRQ_GPIOD, - SUNXI_IRQ_GPIOE, - SUNXI_IRQ_GPIOF, - SUNXI_IRQ_GPIOG, -}; - -static struct gpio_desc sun55iw3p1_gpio_desc = -{ - .membase = SUNXI_GPIO_PBASE, - .resource_size = SUNXI_GPIO_RES_SIZE, - .virq_offset = 0, - .irq_arry_size = ARRAY_SIZE(sun55iw3p1_bank_irq_num), - .irq = (const uint32_t *)sun55iw3p1_bank_irq_num, - .pin_base = PA_BASE, - .banks = ARRAY_SIZE(sun55iw3p1_bank_base), - .bank_base = (const uint32_t *)sun55iw3p1_bank_base, - .irq_banks = ARRAY_SIZE(sun55iw3p1_irq_bank_base), - .irq_bank_base = (const uint32_t *)sun55iw3p1_irq_bank_base, -}; - -static const struct gpio_desc *platform_gpio_desc[] = -{ - &sun55iw3p1_gpio_desc, - NULL, -}; - -/* - * Called by hal_gpio_init(). - */ -const struct gpio_desc **gpio_get_platform_desc(void) -{ - return platform_gpio_desc; -} diff --git a/src/platform/f133/hal/gpio/sun55iw3/platform-gpio.h b/src/platform/f133/hal/gpio/sun55iw3/platform-gpio.h deleted file mode 100644 index a23e64bf5228c981993e9a9c7dfb03b30a47aac8..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun55iw3/platform-gpio.h +++ /dev/null @@ -1,178 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __PLATFORM_GPIO_H__ -#define __PLATFORM_GPIO_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define GPIO_MAX_BANK PG_BASE -#define BANK_BOUNDARY PL_BASE -#define SUNXI_GPIO_PBASE 0x02000000 -#define SUNXI_GPIO_RES_SIZE 0x07FF - -/* sunxi gpio irq*/ -#if defined(CONFIG_CORE_DSP0) /* DSP */ -#include -#define SUNXI_IRQ_GPIOB (RINTC_IRQ_MASK | 40) -#define SUNXI_IRQ_GPIOC (RINTC_IRQ_MASK | 42) -#define SUNXI_IRQ_GPIOD (RINTC_IRQ_MASK | 44) -#define SUNXI_IRQ_GPIOE (RINTC_IRQ_MASK | 46) -#define SUNXI_IRQ_GPIOF (RINTC_IRQ_MASK | 48) -#define SUNXI_IRQ_GPIOG (RINTC_IRQ_MASK | 50) -#elif defined(CONFIG_ARCH_SUN8IW20) /* ARM */ -#define SUNXI_GIC_START 32 -#define SUNXI_IRQ_GPIOB (SUNXI_GIC_START + 69) -#define SUNXI_IRQ_GPIOC (SUNXI_GIC_START + 71) -#define SUNXI_IRQ_GPIOD (SUNXI_GIC_START + 73) -#define SUNXI_IRQ_GPIOE (SUNXI_GIC_START + 75) -#define SUNXI_IRQ_GPIOF (SUNXI_GIC_START + 77) -#define SUNXI_IRQ_GPIOG (SUNXI_GIC_START + 79) -#elif defined(CONFIG_SOC_SUN20IW1) /* RISC-V */ -#define SUNXI_IRQ_GPIOB (85) -#define SUNXI_IRQ_GPIOC (87) -#define SUNXI_IRQ_GPIOD (89) -#define SUNXI_IRQ_GPIOE (91) -#define SUNXI_IRQ_GPIOF (93) -#define SUNXI_IRQ_GPIOG (95) -#endif /* CONFIG_CORE_DSP0 */ - -#if defined(CONFIG_ARCH_RISCV) /* E906 */ -#include -#define SUNXI_IRQ_GPIOB (40) -#define SUNXI_IRQ_GPIOC (42) -#define SUNXI_IRQ_GPIOD (44) -#define SUNXI_IRQ_GPIOE (46) -#define SUNXI_IRQ_GPIOF (48) -#define SUNXI_IRQ_GPIOG (50) -#endif - -typedef enum -{ - GPIO_PB0 = GPIOB(0), - GPIO_PB1 = GPIOB(1), - GPIO_PB2 = GPIOB(2), - GPIO_PB3 = GPIOB(3), - GPIO_PB4 = GPIOB(4), - GPIO_PB5 = GPIOB(5), - GPIO_PB6 = GPIOB(6), - GPIO_PB7 = GPIOB(7), - GPIO_PB8 = GPIOB(8), - - GPIO_PC0 = GPIOC(0), - GPIO_PC1 = GPIOC(1), - GPIO_PC2 = GPIOC(2), - GPIO_PC3 = GPIOC(3), - GPIO_PC4 = GPIOC(4), - GPIO_PC5 = GPIOC(5), - GPIO_PC6 = GPIOC(6), - GPIO_PC7 = GPIOC(7), - - GPIO_PD0 = GPIOD(0), - GPIO_PD1 = GPIOD(1), - GPIO_PD2 = GPIOD(2), - GPIO_PD3 = GPIOD(3), - GPIO_PD4 = GPIOD(4), - GPIO_PD5 = GPIOD(5), - GPIO_PD6 = GPIOD(6), - GPIO_PD7 = GPIOD(7), - GPIO_PD8 = GPIOD(8), - GPIO_PD9 = GPIOD(9), - GPIO_PD10 = GPIOD(10), - GPIO_PD11 = GPIOD(11), - GPIO_PD12 = GPIOD(12), - GPIO_PD13 = GPIOD(13), - GPIO_PD14 = GPIOD(14), - GPIO_PD15 = GPIOD(15), - GPIO_PD16 = GPIOD(16), - GPIO_PD17 = GPIOD(17), - GPIO_PD18 = GPIOD(18), - GPIO_PD19 = GPIOD(19), - GPIO_PD20 = GPIOD(20), - GPIO_PD21 = GPIOD(21), - GPIO_PD22 = GPIOD(22), - - GPIO_PE0 = GPIOE(0), - GPIO_PE1 = GPIOE(1), - GPIO_PE2 = GPIOE(2), - GPIO_PE3 = GPIOE(3), - GPIO_PE4 = GPIOE(4), - GPIO_PE5 = GPIOE(5), - GPIO_PE6 = GPIOE(6), - GPIO_PE7 = GPIOE(7), - GPIO_PE8 = GPIOE(8), - GPIO_PE9 = GPIOE(9), - GPIO_PE10 = GPIOE(10), - GPIO_PE11 = GPIOE(11), - GPIO_PE12 = GPIOE(12), - GPIO_PE13 = GPIOE(13), - GPIO_PE14 = GPIOE(14), - GPIO_PE15 = GPIOE(15), - GPIO_PE16 = GPIOE(16), - GPIO_PE17 = GPIOE(17), - - GPIO_PF0 = GPIOF(0), - GPIO_PF1 = GPIOF(1), - GPIO_PF2 = GPIOF(2), - GPIO_PF3 = GPIOF(3), - GPIO_PF4 = GPIOF(4), - GPIO_PF5 = GPIOF(5), - GPIO_PF6 = GPIOF(6), - - GPIO_PG0 = GPIOG(0), - GPIO_PG1 = GPIOG(1), - GPIO_PG2 = GPIOG(2), - GPIO_PG3 = GPIOG(3), - GPIO_PG4 = GPIOG(4), - GPIO_PG5 = GPIOG(5), - GPIO_PG6 = GPIOG(6), - GPIO_PG7 = GPIOG(7), - GPIO_PG8 = GPIOG(8), - GPIO_PG9 = GPIOG(9), - GPIO_PG10 = GPIOG(10), - GPIO_PG11 = GPIOG(11), - GPIO_PG12 = GPIOG(12), - GPIO_PG13 = GPIOG(13), - GPIO_PG14 = GPIOG(14), - GPIO_PG15 = GPIOG(15), - - /* To aviod compile warnings. */ - GPIO_MAX = GPIOO(31), - -} gpio_pin_t; - -#ifdef __cplusplus -} -#endif -#endif /* __PLATFORM_GPIO_H__ */ diff --git a/src/platform/f133/hal/gpio/sun8iw18/Makefile b/src/platform/f133/hal/gpio/sun8iw18/Makefile deleted file mode 100644 index f247380832b3eac954fb1c9f589b9aefcfd85769..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun8iw18/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-y += gpio-sun8iw18.o diff --git a/src/platform/f133/hal/gpio/sun8iw18/gpio-sun8iw18.c b/src/platform/f133/hal/gpio/sun8iw18/gpio-sun8iw18.c deleted file mode 100644 index d5a8080541220ebb15ede1bd82d8b2be5a662bae..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun8iw18/gpio-sun8iw18.c +++ /dev/null @@ -1,90 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#include -#include -/* #include */ - -#include -#include "../gpio.h" - -static const unsigned int sun8iw18p1_irq_bank_base[] = -{ - SUNXI_PIO_BANK_BASE(PB_BASE, 0), - SUNXI_PIO_BANK_BASE(PE_BASE, 1), - SUNXI_PIO_BANK_BASE(PG_BASE, 2), - SUNXI_PIO_BANK_BASE(PH_BASE, 3), -}; - -static const unsigned int sun8iw18p1_bank_base[] = -{ - SUNXI_PIO_BANK_BASE(PB_BASE, 0), - SUNXI_PIO_BANK_BASE(PC_BASE, 1), - SUNXI_PIO_BANK_BASE(PE_BASE, 2), - SUNXI_PIO_BANK_BASE(PG_BASE, 3), - SUNXI_PIO_BANK_BASE(PH_BASE, 4), -}; - -static const int sun8iw18p1_bank_irq_num[] = -{ - SUNXI_IRQ_GPIOB, - SUNXI_IRQ_GPIOE, - SUNXI_IRQ_GPIOG, - SUNXI_IRQ_GPIOH, -}; - -static struct gpio_desc sun8iw18p1_gpio_desc = -{ - .membase = SUNXI_GPIO_PBASE, - .virq_offset = 0, - .irq_arry_size = ARRAY_SIZE(sun8iw18p1_bank_irq_num), - .irq = (const uint32_t *)sun8iw18p1_bank_irq_num, - .pin_base = PA_BASE, - .banks = ARRAY_SIZE(sun8iw18p1_bank_base), - .bank_base = (const uint32_t *)sun8iw18p1_bank_base, - .irq_banks = ARRAY_SIZE(sun8iw18p1_irq_bank_base), - .irq_bank_base = (const uint32_t *)sun8iw18p1_irq_bank_base, -}; - -static const struct gpio_desc *platform_gpio_desc[] = -{ - &sun8iw18p1_gpio_desc, - NULL, -}; - -/* - * Called by hal_gpio_init(). - */ -const struct gpio_desc **gpio_get_platform_desc(void) -{ - return platform_gpio_desc; -} diff --git a/src/platform/f133/hal/gpio/sun8iw18/platform-gpio.h b/src/platform/f133/hal/gpio/sun8iw18/platform-gpio.h deleted file mode 100644 index a56a348f5be3994c2add91e53cf056fce0c54450..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun8iw18/platform-gpio.h +++ /dev/null @@ -1,185 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __PLATFORM_GPIO_H__ -#define __PLATFORM_GPIO_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define GPIO_MAX_BANK PL_BASE -#define BANK_BOUNDARY PL_BASE -#define SUNXI_GPIO_PBASE 0x0300B000 - -/* sunxi gpio irq*/ -#define SUNXI_GIC_START 32 -#define SUNXI_IRQ_GPIOB (SUNXI_GIC_START + 43) /* 75 gpiob interrupt */ -#define SUNXI_IRQ_GPIOE (SUNXI_GIC_START + 44) /* 76 gpioe interrupt */ -#define SUNXI_IRQ_GPIOG (SUNXI_GIC_START + 46) /* 78 gpiog interrupt */ -#define SUNXI_IRQ_GPIOH (SUNXI_GIC_START + 47) /* 79 gpioh interrupt */ - -typedef enum -{ - GPIO_PB0 = GPIOB(0), - GPIO_PB1 = GPIOB(1), - GPIO_PB2 = GPIOB(2), - GPIO_PB3 = GPIOB(3), - GPIO_PB4 = GPIOB(4), - GPIO_PB5 = GPIOB(5), - GPIO_PB6 = GPIOB(6), - GPIO_PB7 = GPIOB(7), - GPIO_PB8 = GPIOB(8), - GPIO_PB9 = GPIOB(9), - GPIO_PB10 = GPIOB(10), - GPIO_PB11 = GPIOB(11), - GPIO_PB12 = GPIOB(12), - GPIO_PB13 = GPIOB(13), - - GPIO_PC0 = GPIOC(0), - GPIO_PC1 = GPIOC(1), - GPIO_PC2 = GPIOC(2), - GPIO_PC3 = GPIOC(3), - GPIO_PC4 = GPIOC(4), - GPIO_PC5 = GPIOC(5), - GPIO_PC6 = GPIOC(6), - GPIO_PC7 = GPIOC(7), - GPIO_PC8 = GPIOC(8), - GPIO_PC9 = GPIOC(9), - GPIO_PC10 = GPIOC(10), - GPIO_PC11 = GPIOC(11), - GPIO_PC12 = GPIOC(12), - GPIO_PC13 = GPIOC(13), - GPIO_PC14 = GPIOC(14), - GPIO_PC15 = GPIOC(15), - GPIO_PC16 = GPIOC(16), - - GPIO_PD0 = GPIOD(0), - GPIO_PD1 = GPIOD(1), - GPIO_PD2 = GPIOD(2), - GPIO_PD3 = GPIOD(3), - GPIO_PD4 = GPIOD(4), - GPIO_PD5 = GPIOD(5), - GPIO_PD6 = GPIOD(6), - GPIO_PD7 = GPIOD(7), - GPIO_PD8 = GPIOD(8), - GPIO_PD9 = GPIOD(9), - GPIO_PD10 = GPIOD(10), - GPIO_PD11 = GPIOD(11), - GPIO_PD12 = GPIOD(12), - GPIO_PD13 = GPIOD(13), - GPIO_PD14 = GPIOD(14), - GPIO_PD15 = GPIOD(15), - GPIO_PD16 = GPIOD(16), - GPIO_PD17 = GPIOD(17), - GPIO_PD18 = GPIOD(18), - GPIO_PD19 = GPIOD(19), - GPIO_PD20 = GPIOD(20), - GPIO_PD21 = GPIOD(21), - GPIO_PD22 = GPIOD(22), - - GPIO_PE0 = GPIOE(0), - GPIO_PE1 = GPIOE(1), - GPIO_PE2 = GPIOE(2), - GPIO_PE3 = GPIOE(3), - GPIO_PE4 = GPIOE(4), - GPIO_PE5 = GPIOE(5), - GPIO_PE6 = GPIOE(6), - GPIO_PE7 = GPIOE(7), - GPIO_PE8 = GPIOE(8), - GPIO_PE9 = GPIOE(9), - GPIO_PE10 = GPIOE(10), - GPIO_PE11 = GPIOE(11), - GPIO_PE12 = GPIOE(12), - GPIO_PE13 = GPIOE(13), - GPIO_PE14 = GPIOE(14), - GPIO_PE15 = GPIOE(15), - GPIO_PE16 = GPIOE(16), - GPIO_PE17 = GPIOE(17), - GPIO_PE18 = GPIOE(18), - GPIO_PE19 = GPIOE(19), - GPIO_PE20 = GPIOE(20), - GPIO_PE21 = GPIOE(21), - - GPIO_PF0 = GPIOF(0), - GPIO_PF1 = GPIOF(1), - GPIO_PF2 = GPIOF(2), - GPIO_PF3 = GPIOF(3), - GPIO_PF4 = GPIOF(4), - GPIO_PF5 = GPIOF(5), - GPIO_PF6 = GPIOF(6), - - GPIO_PG0 = GPIOG(0), - GPIO_PG1 = GPIOG(1), - GPIO_PG2 = GPIOG(2), - GPIO_PG3 = GPIOG(3), - GPIO_PG4 = GPIOG(4), - GPIO_PG5 = GPIOG(5), - GPIO_PG6 = GPIOG(6), - GPIO_PG7 = GPIOG(7), - - GPIO_PH0 = GPIOH(0), - GPIO_PH1 = GPIOH(1), - GPIO_PH2 = GPIOH(2), - GPIO_PH3 = GPIOH(3), - GPIO_PH4 = GPIOH(4), - GPIO_PH5 = GPIOH(5), - GPIO_PH6 = GPIOH(6), - GPIO_PH7 = GPIOH(7), - GPIO_PH8 = GPIOH(8), - GPIO_PH9 = GPIOH(9), - GPIO_PH10 = GPIOH(10), - GPIO_PH11 = GPIOH(11), - GPIO_PH12 = GPIOH(12), - GPIO_PH13 = GPIOH(13), - GPIO_PH14 = GPIOH(14), - GPIO_PH15 = GPIOH(15), - - GPIO_PI0 = GPIOI(0), - GPIO_PI1 = GPIOI(1), - GPIO_PI2 = GPIOI(2), - GPIO_PI3 = GPIOI(3), - GPIO_PI4 = GPIOI(4), - GPIO_PI5 = GPIOI(5), - - GPIO_PL0 = GPIOL(0), - GPIO_PL1 = GPIOL(1), - GPIO_PL2 = GPIOL(2), - GPIO_PL3 = GPIOL(3), - GPIO_PL4 = GPIOL(4), - GPIO_PL5 = GPIOL(5), -} gpio_pin_t; - -#ifdef __cplusplus -} -#endif -#endif /* __PLATFORM_GPIO_H__ */ diff --git a/src/platform/f133/hal/gpio/sun8iw19/Makefile b/src/platform/f133/hal/gpio/sun8iw19/Makefile deleted file mode 100644 index 82a53080ee3a7d9e7816cd4c455883bc788f9ef5..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun8iw19/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-y += gpio-sun8iw19.o diff --git a/src/platform/f133/hal/gpio/sun8iw19/gpio-sun8iw19.c b/src/platform/f133/hal/gpio/sun8iw19/gpio-sun8iw19.c deleted file mode 100644 index 9666cad1611e578199d069add38e9ccb472ac350..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun8iw19/gpio-sun8iw19.c +++ /dev/null @@ -1,127 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#include -#include -#include - -#include -#include "../gpio.h" - -static const unsigned int sun8iw19p1_irq_bank_base[] = -{ - SUNXI_PIO_BANK_BASE(PC_BASE, 0), - SUNXI_PIO_BANK_BASE(PD_BASE, 1), - SUNXI_PIO_BANK_BASE(PE_BASE, 2), - SUNXI_PIO_BANK_BASE(PF_BASE, 3), - SUNXI_PIO_BANK_BASE(PG_BASE, 4), - SUNXI_PIO_BANK_BASE(PH_BASE, 5), - SUNXI_PIO_BANK_BASE(PI_BASE, 6), -}; - -static const unsigned int sun8iw19p1_bank_base[] = -{ - SUNXI_PIO_BANK_BASE(PC_BASE, 0), - SUNXI_PIO_BANK_BASE(PD_BASE, 1), - SUNXI_PIO_BANK_BASE(PE_BASE, 2), - SUNXI_PIO_BANK_BASE(PF_BASE, 3), - SUNXI_PIO_BANK_BASE(PG_BASE, 4), - SUNXI_PIO_BANK_BASE(PH_BASE, 5), - SUNXI_PIO_BANK_BASE(PI_BASE, 6), -}; - -static const int sun8iw19p1_bank_irq_num[] = -{ - SUNXI_IRQ_GPIOC, - SUNXI_IRQ_GPIOD, - SUNXI_IRQ_GPIOE, - SUNXI_IRQ_GPIOF, - SUNXI_IRQ_GPIOG, - SUNXI_IRQ_GPIOH, - SUNXI_IRQ_GPIOI, -}; - -static struct gpio_desc sun8iw19p1_gpio_desc = -{ - .membase = SUNXI_GPIO_PBASE, - .virq_offset = 0, - .irq_arry_size = ARRAY_SIZE(sun8iw19p1_bank_irq_num), - .irq = (const uint32_t *)sun8iw19p1_bank_irq_num, - .pin_base = PA_BASE, - .banks = ARRAY_SIZE(sun8iw19p1_bank_base), - .bank_base = (const uint32_t *)sun8iw19p1_bank_base, - .irq_banks = ARRAY_SIZE(sun8iw19p1_irq_bank_base), - .irq_bank_base = (const uint32_t *)sun8iw19p1_irq_bank_base, -}; - -static const unsigned sun8iw19p1_r_irq_bank_base[] = -{ - SUNXI_R_PIO_BANK_BASE(PL_BASE, 0), -}; - -static const unsigned sun8iw19p1_r_bank_base[] = -{ - SUNXI_PIO_BANK_BASE(PL_BASE, 0), -}; - -static const int sun8iw19p1_r_bank_irq_num[] = -{ - SUNXI_IRQ_R_GPIOL, -}; - -static const struct gpio_desc sun8iw19p1_r_gpio_desc = -{ - .membase = SUXNI_GPIO_R_PBASE, - .virq_offset = BANK_BOUNDARY, - .irq_arry_size = ARRAY_SIZE(sun8iw19p1_r_bank_irq_num), - .irq = (const uint32_t *)sun8iw19p1_r_bank_irq_num, - .pin_base = PL_BASE, - .banks = ARRAY_SIZE(sun8iw19p1_r_bank_base), - .bank_base = (const uint32_t *)sun8iw19p1_r_bank_base, - .irq_banks = ARRAY_SIZE(sun8iw19p1_r_irq_bank_base), - .irq_bank_base = (const uint32_t *)sun8iw19p1_r_irq_bank_base, -}; - -static const struct gpio_desc *platform_gpio_desc[] = -{ - &sun8iw19p1_gpio_desc, - &sun8iw19p1_r_gpio_desc, - NULL, -}; - -/* - * Called by hal_gpio_init(). - */ -const struct gpio_desc **gpio_get_platform_desc(void) -{ - return platform_gpio_desc; -} diff --git a/src/platform/f133/hal/gpio/sun8iw19/platform-gpio.h b/src/platform/f133/hal/gpio/sun8iw19/platform-gpio.h deleted file mode 100644 index 719fdcdc45db3d1e4c0b51b9cfe84bf717252ea8..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun8iw19/platform-gpio.h +++ /dev/null @@ -1,170 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __PLATFORM_GPIO_H__ -#define __PLATFORM_GPIO_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define GPIO_MAX_BANK PL_BASE -#define BANK_BOUNDARY PL_BASE -#define SUNXI_GPIO_PBASE 0x0300B000 -#define SUXNI_GPIO_R_PBASE 0x07022000 - -/* sunxi gpio irq*/ -#define SUNXI_GIC_START 32 -#define SUNXI_IRQ_GPIOC (SUNXI_GIC_START + 67) -#define SUNXI_IRQ_GPIOD (SUNXI_GIC_START + 68) -#define SUNXI_IRQ_GPIOE (SUNXI_GIC_START + 69) -#define SUNXI_IRQ_GPIOF (SUNXI_GIC_START + 70) -#define SUNXI_IRQ_GPIOG (SUNXI_GIC_START + 71) -#define SUNXI_IRQ_GPIOH (SUNXI_GIC_START + 72) -#define SUNXI_IRQ_GPIOI (SUNXI_GIC_START + 73) -#define SUNXI_IRQ_R_GPIOL (SUNXI_GIC_START + 106) - -typedef enum -{ - GPIO_PC0 = GPIOC(0), - GPIO_PC1 = GPIOC(1), - GPIO_PC2 = GPIOC(2), - GPIO_PC3 = GPIOC(3), - GPIO_PC4 = GPIOC(4), - GPIO_PC5 = GPIOC(5), - GPIO_PC6 = GPIOC(6), - GPIO_PC7 = GPIOC(7), - GPIO_PC8 = GPIOC(8), - GPIO_PC9 = GPIOC(9), - GPIO_PC10 = GPIOC(10), - GPIO_PC11 = GPIOC(11), - - GPIO_PD0 = GPIOD(0), - GPIO_PD1 = GPIOD(1), - GPIO_PD2 = GPIOD(2), - GPIO_PD3 = GPIOD(3), - GPIO_PD4 = GPIOD(4), - GPIO_PD5 = GPIOD(5), - GPIO_PD6 = GPIOD(6), - GPIO_PD7 = GPIOD(7), - GPIO_PD8 = GPIOD(8), - GPIO_PD9 = GPIOD(9), - GPIO_PD10 = GPIOD(10), - GPIO_PD11 = GPIOD(11), - GPIO_PD12 = GPIOD(12), - GPIO_PD13 = GPIOD(13), - GPIO_PD14 = GPIOD(14), - GPIO_PD15 = GPIOD(15), - GPIO_PD16 = GPIOD(16), - GPIO_PD17 = GPIOD(17), - GPIO_PD18 = GPIOD(18), - GPIO_PD19 = GPIOD(19), - GPIO_PD20 = GPIOD(20), - GPIO_PD21 = GPIOD(21), - GPIO_PD22 = GPIOD(22), - - GPIO_PE0 = GPIOE(0), - GPIO_PE1 = GPIOE(1), - GPIO_PE2 = GPIOE(2), - GPIO_PE3 = GPIOE(3), - GPIO_PE4 = GPIOE(4), - GPIO_PE5 = GPIOE(5), - GPIO_PE6 = GPIOE(6), - GPIO_PE7 = GPIOE(7), - GPIO_PE8 = GPIOE(8), - GPIO_PE9 = GPIOE(9), - GPIO_PE10 = GPIOE(10), - GPIO_PE11 = GPIOE(11), - GPIO_PE12 = GPIOE(12), - GPIO_PE13 = GPIOE(13), - GPIO_PE14 = GPIOE(14), - GPIO_PE15 = GPIOE(15), - GPIO_PE16 = GPIOE(16), - GPIO_PE17 = GPIOE(17), - GPIO_PE18 = GPIOE(18), - GPIO_PE19 = GPIOE(19), - GPIO_PE20 = GPIOE(20), - GPIO_PE21 = GPIOE(21), - - GPIO_PF0 = GPIOF(0), - GPIO_PF1 = GPIOF(1), - GPIO_PF2 = GPIOF(2), - GPIO_PF3 = GPIOF(3), - GPIO_PF4 = GPIOF(4), - GPIO_PF5 = GPIOF(5), - GPIO_PF6 = GPIOF(6), - - GPIO_PG0 = GPIOG(0), - GPIO_PG1 = GPIOG(1), - GPIO_PG2 = GPIOG(2), - GPIO_PG3 = GPIOG(3), - GPIO_PG4 = GPIOG(4), - GPIO_PG5 = GPIOG(5), - GPIO_PG6 = GPIOG(6), - GPIO_PG7 = GPIOG(7), - - GPIO_PH0 = GPIOH(0), - GPIO_PH1 = GPIOH(1), - GPIO_PH2 = GPIOH(2), - GPIO_PH3 = GPIOH(3), - GPIO_PH4 = GPIOH(4), - GPIO_PH5 = GPIOH(5), - GPIO_PH6 = GPIOH(6), - GPIO_PH7 = GPIOH(7), - GPIO_PH8 = GPIOH(8), - GPIO_PH9 = GPIOH(9), - GPIO_PH10 = GPIOH(10), - GPIO_PH11 = GPIOH(11), - GPIO_PH12 = GPIOH(12), - GPIO_PH13 = GPIOH(13), - GPIO_PH14 = GPIOH(14), - GPIO_PH15 = GPIOH(15), - - GPIO_PI0 = GPIOI(0), - GPIO_PI1 = GPIOI(1), - GPIO_PI2 = GPIOI(2), - GPIO_PI3 = GPIOI(3), - GPIO_PI4 = GPIOI(4), - GPIO_PI5 = GPIOI(5), - - GPIO_PL0 = GPIOL(0), - GPIO_PL1 = GPIOL(1), - GPIO_PL2 = GPIOL(2), - GPIO_PL3 = GPIOL(3), - GPIO_PL4 = GPIOL(4), - GPIO_PL5 = GPIOL(5), -} gpio_pin_t; - -#ifdef __cplusplus -} -#endif -#endif /* __PLATFORM_GPIO_H__ */ diff --git a/src/platform/f133/hal/gpio/sun8iw20/Makefile b/src/platform/f133/hal/gpio/sun8iw20/Makefile deleted file mode 100644 index 80d51bf7f6bb24fbdbc11d6b10396d953e9a83e6..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun8iw20/Makefile +++ /dev/null @@ -1 +0,0 @@ -SRC += gpio-sun8iw20.c diff --git a/src/platform/f133/hal/gpio/sun8iw20/gpio-sun8iw20.c b/src/platform/f133/hal/gpio/sun8iw20/gpio-sun8iw20.c deleted file mode 100644 index 73e2eb3e51f23c2d34e13af32e435a16a4189e4f..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun8iw20/gpio-sun8iw20.c +++ /dev/null @@ -1,95 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#include -#include - -#include -#include "../gpio.h" - -static const unsigned int sun8iw20p1_irq_bank_base[] = -{ - SUNXI_PIO_BANK_BASE(PB_BASE, 0), - SUNXI_PIO_BANK_BASE(PC_BASE, 1), - SUNXI_PIO_BANK_BASE(PD_BASE, 2), - SUNXI_PIO_BANK_BASE(PE_BASE, 3), - SUNXI_PIO_BANK_BASE(PF_BASE, 4), - SUNXI_PIO_BANK_BASE(PG_BASE, 5), -}; - -static const unsigned int sun8iw20p1_bank_base[] = -{ - SUNXI_PIO_BANK_BASE(PB_BASE, 0), - SUNXI_PIO_BANK_BASE(PC_BASE, 1), - SUNXI_PIO_BANK_BASE(PD_BASE, 2), - SUNXI_PIO_BANK_BASE(PE_BASE, 3), - SUNXI_PIO_BANK_BASE(PF_BASE, 4), - SUNXI_PIO_BANK_BASE(PG_BASE, 5), -}; - -static const int sun8iw20p1_bank_irq_num[] = -{ - SUNXI_IRQ_GPIOB, - SUNXI_IRQ_GPIOC, - SUNXI_IRQ_GPIOD, - SUNXI_IRQ_GPIOE, - SUNXI_IRQ_GPIOF, - SUNXI_IRQ_GPIOG, -}; - -static struct gpio_desc sun8iw20p1_gpio_desc = -{ - .membase = SUNXI_GPIO_PBASE, - .resource_size = SUNXI_GPIO_RES_SIZE, - .virq_offset = 0, - .irq_arry_size = ARRAY_SIZE(sun8iw20p1_bank_irq_num), - .irq = (const uint32_t *)sun8iw20p1_bank_irq_num, - .pin_base = PA_BASE, - .banks = ARRAY_SIZE(sun8iw20p1_bank_base), - .bank_base = (const uint32_t *)sun8iw20p1_bank_base, - .irq_banks = ARRAY_SIZE(sun8iw20p1_irq_bank_base), - .irq_bank_base = (const uint32_t *)sun8iw20p1_irq_bank_base, -}; - -static const struct gpio_desc *platform_gpio_desc[] = -{ - &sun8iw20p1_gpio_desc, - NULL, -}; - -/* - * Called by hal_gpio_init(). - */ -const struct gpio_desc **gpio_get_platform_desc(void) -{ - return platform_gpio_desc; -} diff --git a/src/platform/f133/hal/gpio/sun8iw20/platform-gpio.h b/src/platform/f133/hal/gpio/sun8iw20/platform-gpio.h deleted file mode 100644 index 74ad1ded3a08f7cd097c6b0426f2793b1fbe044d..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun8iw20/platform-gpio.h +++ /dev/null @@ -1,168 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __PLATFORM_GPIO_H__ -#define __PLATFORM_GPIO_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define GPIO_MAX_BANK PG_BASE -#define BANK_BOUNDARY PL_BASE -#define SUNXI_GPIO_PBASE 0x02000000 -#define SUNXI_GPIO_RES_SIZE 0x07FF - -/* sunxi gpio irq*/ -#if defined(CONFIG_CORE_DSP0) /* DSP */ -#include -#define SUNXI_IRQ_GPIOB (RINTC_IRQ_MASK | 40) -#define SUNXI_IRQ_GPIOC (RINTC_IRQ_MASK | 42) -#define SUNXI_IRQ_GPIOD (RINTC_IRQ_MASK | 44) -#define SUNXI_IRQ_GPIOE (RINTC_IRQ_MASK | 46) -#define SUNXI_IRQ_GPIOF (RINTC_IRQ_MASK | 48) -#define SUNXI_IRQ_GPIOG (RINTC_IRQ_MASK | 50) -#elif defined(CONFIG_ARCH_SUN8IW20) /* ARM */ -#define SUNXI_GIC_START 32 -#define SUNXI_IRQ_GPIOB (SUNXI_GIC_START + 69) -#define SUNXI_IRQ_GPIOC (SUNXI_GIC_START + 71) -#define SUNXI_IRQ_GPIOD (SUNXI_GIC_START + 73) -#define SUNXI_IRQ_GPIOE (SUNXI_GIC_START + 75) -#define SUNXI_IRQ_GPIOF (SUNXI_GIC_START + 77) -#define SUNXI_IRQ_GPIOG (SUNXI_GIC_START + 79) -#elif defined(CONFIG_SOC_SUN20IW1) /* RISC-V */ -#define SUNXI_IRQ_GPIOB (85) -#define SUNXI_IRQ_GPIOC (87) -#define SUNXI_IRQ_GPIOD (89) -#define SUNXI_IRQ_GPIOE (91) -#define SUNXI_IRQ_GPIOF (93) -#define SUNXI_IRQ_GPIOG (95) -#endif /* CONFIG_CORE_DSP0 */ - -typedef enum -{ - GPIO_PB0 = GPIOB(0), - GPIO_PB1 = GPIOB(1), - GPIO_PB2 = GPIOB(2), - GPIO_PB3 = GPIOB(3), - GPIO_PB4 = GPIOB(4), - GPIO_PB5 = GPIOB(5), - GPIO_PB6 = GPIOB(6), - GPIO_PB7 = GPIOB(7), - GPIO_PB8 = GPIOB(8), - - GPIO_PC0 = GPIOC(0), - GPIO_PC1 = GPIOC(1), - GPIO_PC2 = GPIOC(2), - GPIO_PC3 = GPIOC(3), - GPIO_PC4 = GPIOC(4), - GPIO_PC5 = GPIOC(5), - GPIO_PC6 = GPIOC(6), - GPIO_PC7 = GPIOC(7), - - GPIO_PD0 = GPIOD(0), - GPIO_PD1 = GPIOD(1), - GPIO_PD2 = GPIOD(2), - GPIO_PD3 = GPIOD(3), - GPIO_PD4 = GPIOD(4), - GPIO_PD5 = GPIOD(5), - GPIO_PD6 = GPIOD(6), - GPIO_PD7 = GPIOD(7), - GPIO_PD8 = GPIOD(8), - GPIO_PD9 = GPIOD(9), - GPIO_PD10 = GPIOD(10), - GPIO_PD11 = GPIOD(11), - GPIO_PD12 = GPIOD(12), - GPIO_PD13 = GPIOD(13), - GPIO_PD14 = GPIOD(14), - GPIO_PD15 = GPIOD(15), - GPIO_PD16 = GPIOD(16), - GPIO_PD17 = GPIOD(17), - GPIO_PD18 = GPIOD(18), - GPIO_PD19 = GPIOD(19), - GPIO_PD20 = GPIOD(20), - GPIO_PD21 = GPIOD(21), - GPIO_PD22 = GPIOD(22), - - GPIO_PE0 = GPIOE(0), - GPIO_PE1 = GPIOE(1), - GPIO_PE2 = GPIOE(2), - GPIO_PE3 = GPIOE(3), - GPIO_PE4 = GPIOE(4), - GPIO_PE5 = GPIOE(5), - GPIO_PE6 = GPIOE(6), - GPIO_PE7 = GPIOE(7), - GPIO_PE8 = GPIOE(8), - GPIO_PE9 = GPIOE(9), - GPIO_PE10 = GPIOE(10), - GPIO_PE11 = GPIOE(11), - GPIO_PE12 = GPIOE(12), - GPIO_PE13 = GPIOE(13), - GPIO_PE14 = GPIOE(14), - GPIO_PE15 = GPIOE(15), - GPIO_PE16 = GPIOE(16), - GPIO_PE17 = GPIOE(17), - - GPIO_PF0 = GPIOF(0), - GPIO_PF1 = GPIOF(1), - GPIO_PF2 = GPIOF(2), - GPIO_PF3 = GPIOF(3), - GPIO_PF4 = GPIOF(4), - GPIO_PF5 = GPIOF(5), - GPIO_PF6 = GPIOF(6), - - GPIO_PG0 = GPIOG(0), - GPIO_PG1 = GPIOG(1), - GPIO_PG2 = GPIOG(2), - GPIO_PG3 = GPIOG(3), - GPIO_PG4 = GPIOG(4), - GPIO_PG5 = GPIOG(5), - GPIO_PG6 = GPIOG(6), - GPIO_PG7 = GPIOG(7), - GPIO_PG8 = GPIOG(8), - GPIO_PG9 = GPIOG(9), - GPIO_PG10 = GPIOG(10), - GPIO_PG11 = GPIOG(11), - GPIO_PG12 = GPIOG(12), - GPIO_PG13 = GPIOG(13), - GPIO_PG14 = GPIOG(14), - GPIO_PG15 = GPIOG(15), - - /* To aviod compile warnings. */ - GPIO_MAX = GPIOO(31), - -} gpio_pin_t; - -#ifdef __cplusplus -} -#endif -#endif /* __PLATFORM_GPIO_H__ */ diff --git a/src/platform/f133/hal/gpio/sun8iw21/Makefile b/src/platform/f133/hal/gpio/sun8iw21/Makefile deleted file mode 100644 index df68752595e3f545269f80e9515bd79bd43c048c..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun8iw21/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-y += gpio-sun8iw21.o diff --git a/src/platform/f133/hal/gpio/sun8iw21/gpio-sun8iw21.c b/src/platform/f133/hal/gpio/sun8iw21/gpio-sun8iw21.c deleted file mode 100644 index bed15de52aee3169d15dc1c6cd382919b916012c..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun8iw21/gpio-sun8iw21.c +++ /dev/null @@ -1,101 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#include -#include - -#include -#include "../gpio.h" - -static const unsigned int sun8iw21p1_irq_bank_base[] = -{ - SUNXI_PIO_BANK_BASE(PA_BASE, 0), - SUNXI_PIO_BANK_BASE(PC_BASE, 1), - SUNXI_PIO_BANK_BASE(PD_BASE, 2), - SUNXI_PIO_BANK_BASE(PE_BASE, 3), - SUNXI_PIO_BANK_BASE(PF_BASE, 4), - SUNXI_PIO_BANK_BASE(PG_BASE, 5), - SUNXI_PIO_BANK_BASE(PH_BASE, 6), - SUNXI_PIO_BANK_BASE(PI_BASE, 7), -}; - -static const unsigned int sun8iw21p1_bank_base[] = -{ - SUNXI_PIO_BANK_BASE(PA_BASE, 0), - SUNXI_PIO_BANK_BASE(PC_BASE, 1), - SUNXI_PIO_BANK_BASE(PD_BASE, 2), - SUNXI_PIO_BANK_BASE(PE_BASE, 3), - SUNXI_PIO_BANK_BASE(PF_BASE, 4), - SUNXI_PIO_BANK_BASE(PG_BASE, 5), - SUNXI_PIO_BANK_BASE(PH_BASE, 6), - SUNXI_PIO_BANK_BASE(PI_BASE, 7), -}; - -static const int sun8iw21p1_bank_irq_num[] = -{ - SUNXI_IRQ_GPIOA, - SUNXI_IRQ_GPIOC, - SUNXI_IRQ_GPIOD, - SUNXI_IRQ_GPIOE, - SUNXI_IRQ_GPIOF, - SUNXI_IRQ_GPIOG, - SUNXI_IRQ_GPIOH, - SUNXI_IRQ_GPIOI, -}; - -static struct gpio_desc sun8iw21p1_gpio_desc = -{ - .membase = SUNXI_GPIO_PBASE, - .resource_size = SUNXI_GPIO_RES_SIZE, - .virq_offset = 0, - .irq_arry_size = ARRAY_SIZE(sun8iw21p1_bank_irq_num), - .irq = (const uint32_t *)sun8iw21p1_bank_irq_num, - .pin_base = PA_BASE, - .banks = ARRAY_SIZE(sun8iw21p1_bank_base), - .bank_base = (const uint32_t *)sun8iw21p1_bank_base, - .irq_banks = ARRAY_SIZE(sun8iw21p1_irq_bank_base), - .irq_bank_base = (const uint32_t *)sun8iw21p1_irq_bank_base, -}; - -static const struct gpio_desc *platform_gpio_desc[] = -{ - &sun8iw21p1_gpio_desc, - NULL, -}; - -/* - * Called by hal_gpio_init(). - */ -const struct gpio_desc **gpio_get_platform_desc(void) -{ - return platform_gpio_desc; -} diff --git a/src/platform/f133/hal/gpio/sun8iw21/platform-gpio.h b/src/platform/f133/hal/gpio/sun8iw21/platform-gpio.h deleted file mode 100644 index 2ff8cb0eabe9e433602e064b462f206909e1d47b..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/gpio/sun8iw21/platform-gpio.h +++ /dev/null @@ -1,196 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __PLATFORM_GPIO_H__ -#define __PLATFORM_GPIO_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define GPIO_MAX_BANK PG_BASE -#define BANK_BOUNDARY PL_BASE -#define SUNXI_GPIO_PBASE 0x02000000 -#define SUNXI_GPIO_RES_SIZE 0x07FF - -/* sunxi gpio irq*/ -#if defined(CONFIG_ARCH_SUN8IW21) /* ARM */ -#define SUNXI_GIC_START 32 -#define SUNXI_IRQ_GPIOA (SUNXI_GIC_START + 99) -#define SUNXI_IRQ_GPIOC (SUNXI_GIC_START + 103) -#define SUNXI_IRQ_GPIOD (SUNXI_GIC_START + 105) -#define SUNXI_IRQ_GPIOE (SUNXI_GIC_START + 107) -#define SUNXI_IRQ_GPIOF (SUNXI_GIC_START + 109) -#define SUNXI_IRQ_GPIOG (SUNXI_GIC_START + 111) -#define SUNXI_IRQ_GPIOH (SUNXI_GIC_START + 113) -#define SUNXI_IRQ_GPIOI (SUNXI_GIC_START + 115) -#elif defined(CONFIG_SOC_SUN20IW3) /* RISC-V */ -#define SUNXI_IRQ_GPIOA (83) -#define SUNXI_IRQ_GPIOC (87) -#define SUNXI_IRQ_GPIOD (89) -#define SUNXI_IRQ_GPIOE (91) -#define SUNXI_IRQ_GPIOF (93) -#define SUNXI_IRQ_GPIOG (95) -#define SUNXI_IRQ_GPIOH (97) -#define SUNXI_IRQ_GPIOI (99) -#endif /* CONFIG_CORE_DSP0 */ - -typedef enum -{ - GPIO_PA0 = GPIOA(0), - GPIO_PA1 = GPIOA(1), - GPIO_PA2 = GPIOA(2), - GPIO_PA3 = GPIOA(3), - GPIO_PA4 = GPIOA(4), - GPIO_PA5 = GPIOA(5), - GPIO_PA6 = GPIOA(6), - GPIO_PA7 = GPIOA(7), - GPIO_PA8 = GPIOA(8), - GPIO_PA9 = GPIOA(9), - GPIO_PA10 = GPIOA(10), - GPIO_PA11 = GPIOA(11), - GPIO_PA12 = GPIOA(12), - GPIO_PA13 = GPIOA(13), - GPIO_PA14 = GPIOA(14), - GPIO_PA15 = GPIOA(15), - GPIO_PA16 = GPIOA(16), - GPIO_PA17 = GPIOA(17), - GPIO_PA18 = GPIOA(18), - GPIO_PA19 = GPIOA(19), - GPIO_PA20 = GPIOA(20), - GPIO_PA21 = GPIOA(21), - - GPIO_PC0 = GPIOC(0), - GPIO_PC1 = GPIOC(1), - GPIO_PC2 = GPIOC(2), - GPIO_PC3 = GPIOC(3), - GPIO_PC4 = GPIOC(4), - GPIO_PC5 = GPIOC(5), - GPIO_PC6 = GPIOC(6), - GPIO_PC7 = GPIOC(7), - GPIO_PC8 = GPIOC(8), - GPIO_PC9 = GPIOC(9), - GPIO_PC10 = GPIOC(10), - GPIO_PC11 = GPIOC(11), - - GPIO_PD0 = GPIOD(0), - GPIO_PD1 = GPIOD(1), - GPIO_PD2 = GPIOD(2), - GPIO_PD3 = GPIOD(3), - GPIO_PD4 = GPIOD(4), - GPIO_PD5 = GPIOD(5), - GPIO_PD6 = GPIOD(6), - GPIO_PD7 = GPIOD(7), - GPIO_PD8 = GPIOD(8), - GPIO_PD9 = GPIOD(9), - GPIO_PD10 = GPIOD(10), - GPIO_PD11 = GPIOD(11), - GPIO_PD12 = GPIOD(12), - GPIO_PD13 = GPIOD(13), - GPIO_PD14 = GPIOD(14), - GPIO_PD15 = GPIOD(15), - GPIO_PD16 = GPIOD(16), - GPIO_PD17 = GPIOD(17), - GPIO_PD18 = GPIOD(18), - GPIO_PD19 = GPIOD(19), - GPIO_PD20 = GPIOD(20), - GPIO_PD21 = GPIOD(21), - GPIO_PD22 = GPIOD(22), - - GPIO_PE0 = GPIOE(0), - GPIO_PE1 = GPIOE(1), - GPIO_PE2 = GPIOE(2), - GPIO_PE3 = GPIOE(3), - GPIO_PE4 = GPIOE(4), - GPIO_PE5 = GPIOE(5), - GPIO_PE6 = GPIOE(6), - GPIO_PE7 = GPIOE(7), - GPIO_PE8 = GPIOE(8), - GPIO_PE9 = GPIOE(9), - GPIO_PE10 = GPIOE(10), - GPIO_PE11 = GPIOE(11), - GPIO_PE12 = GPIOE(12), - GPIO_PE13 = GPIOE(13), - GPIO_PE14 = GPIOE(14), - GPIO_PE15 = GPIOE(15), - GPIO_PE16 = GPIOE(16), - GPIO_PE17 = GPIOE(17), - - GPIO_PF0 = GPIOF(0), - GPIO_PF1 = GPIOF(1), - GPIO_PF2 = GPIOF(2), - GPIO_PF3 = GPIOF(3), - GPIO_PF4 = GPIOF(4), - GPIO_PF5 = GPIOF(5), - GPIO_PF6 = GPIOF(6), - - GPIO_PG0 = GPIOG(0), - GPIO_PG1 = GPIOG(1), - GPIO_PG2 = GPIOG(2), - GPIO_PG3 = GPIOG(3), - GPIO_PG4 = GPIOG(4), - GPIO_PG5 = GPIOG(5), - GPIO_PG6 = GPIOG(6), - GPIO_PG7 = GPIOG(7), - - GPIO_PH0 = GPIOH(0), - GPIO_PH1 = GPIOH(1), - GPIO_PH2 = GPIOH(2), - GPIO_PH3 = GPIOH(3), - GPIO_PH4 = GPIOH(4), - GPIO_PH5 = GPIOH(5), - GPIO_PH6 = GPIOH(6), - GPIO_PH7 = GPIOH(7), - GPIO_PH8 = GPIOH(8), - GPIO_PH9 = GPIOH(9), - GPIO_PH10 = GPIOH(10), - GPIO_PH11 = GPIOH(11), - GPIO_PH12 = GPIOH(12), - GPIO_PH13 = GPIOH(13), - GPIO_PH14 = GPIOH(14), - GPIO_PH15 = GPIOH(15), - - GPIO_PI0 = GPIOI(0), - GPIO_PI1 = GPIOI(1), - GPIO_PI2 = GPIOI(2), - GPIO_PI3 = GPIOI(3), - GPIO_PI4 = GPIOI(4), - - /* To aviod compile warnings. */ - GPIO_MAX = GPIOO(31), - -} gpio_pin_t; - -#ifdef __cplusplus -} -#endif -#endif /* __PLATFORM_GPIO_H__ */ diff --git a/src/platform/f133/hal/init.c b/src/platform/f133/hal/init.c index 3cc81b903790b609bd9b99f2e5879e902c2e08ac..29d2746d719cad60acf759b3e8c9ed30dc361386 100644 --- a/src/platform/f133/hal/init.c +++ b/src/platform/f133/hal/init.c @@ -1,15 +1,15 @@ /** * Copyright (c) 2018-2022, NXOS Development Team * SPDX-License-Identifier: Apache-2.0 - * - * Contains: Init allwinner-f133 platfrom - * + * + * Contains: Init allwinner-f133 platfrom + * * Change Logs: * Date Author Notes * 2023-01-30 JasonHu Init */ -#include +#include #include #include #include @@ -18,6 +18,7 @@ #include #include #include +#include #include #include @@ -25,10 +26,6 @@ #define NX_LOG_NAME "INIT" #include -#include "hal_clk.h" -#include "hal_gpio.h" -#include "hal_uart.h" - NX_INTERFACE NX_Error NX_HalPlatformInit(NX_UArch coreId) { /* NOTE: init trap first before do anything */ @@ -36,33 +33,16 @@ NX_INTERFACE NX_Error NX_HalPlatformInit(NX_UArch coreId) NX_HalDirectUartInit(); + lcd_gpio_config(); + sbi_init(); sbi_print_version(); - NX_LOG_I("Hello, Allwinner-f133!"); - - PLIC_Init(NX_True); - - NX_HalPageZoneInit(); - - /* init hal hardware */ - NX_LOG_I("init clock\n"); - hal_clock_init(); - NX_LOG_I("init gpio\n"); - if (hal_gpio_init()) - { - NX_LOG_E("init gpio failed!\n"); - } + NX_LOG_I("Hello, Allwinner-D1!"); - NX_LOG_I("init uart-0\n"); - if (hal_uart_init(0)) - { - NX_LOG_E("init uart failed!\n"); - } + PLIC_Init(NX_True); -#define STR "abc,\nasdasd\n" - char *str = STR; - hal_uart_send(0, str, sizeof(STR)); + NX_HalPageZoneInit(); return NX_EOK; } diff --git a/src/platform/f133/hal/uart/Kconfig b/src/platform/f133/hal/uart/Kconfig deleted file mode 100644 index 0bcb669f34eed7dd647a41bdb1ca61f3dc54e45e..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/uart/Kconfig +++ /dev/null @@ -1,42 +0,0 @@ -menu "UART Devices" - -config DRIVERS_UART - bool "enable uart driver" - default y - -config HAL_TEST_UART - bool "enable uart hal APIs test command" - depends on DRIVERS_UART - default n - -config SUNXI_UART_SUPPORT_POLL - bool "support poll APIs" - depends on DRIVERS_UART - default n - -config SUNXI_UART_REGISTER_UART0 - bool "support uart0 device" - depends on DRIVERS_UART - default n - -config SUNXI_UART_REGISTER_UART1 - bool "support uart1 device" - depends on DRIVERS_UART - default n - -config SUNXI_UART_REGISTER_UART2 - bool "support uart2 device" - depends on DRIVERS_UART - default n - -config SUNXI_UART_REGISTER_UART3 - bool "support uart3 device" - depends on DRIVERS_UART - default n - -config CLI_UART_PORT - int "cli uart port number" - depends on DRIVERS_UART - default 0 - -endmenu diff --git a/src/platform/f133/hal/uart/Makefile b/src/platform/f133/hal/uart/Makefile deleted file mode 100644 index 8cbfff5f694cf1dabcb113d21a771ad8ff0902a9..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/uart/Makefile +++ /dev/null @@ -1 +0,0 @@ -SRC += hal_uart.c diff --git a/src/platform/f133/hal/uart/hal_uart.c b/src/platform/f133/hal/uart/hal_uart.c deleted file mode 100644 index 0fb0d353d650d135efe7276192d3bd066f7d6d15..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/uart/hal_uart.c +++ /dev/null @@ -1,1293 +0,0 @@ -/* - * =========================================================================================== - * - * Filename: hal_uart.c - * - * Description: hal impl. of uart. - * - * Version: Melis3.0 - * Create: 2019-11-14 14:20:56 - * Revision: none - * Compiler: GCC:version 9.2.1 20170904 (release),ARM/embedded-7-branch revision 255204 - * - * Author: bantao@allwinnertech.com - * Organization: SWC-BPD - * Last Modified: 2020-04-29 15:17:36 - * - * =========================================================================================== - */ - -#include -#include -#include -#include -#include -#include -#include -#ifdef CONFIG_DRIVER_SYSCONFIG -#include -#include -#endif -#include "uart.h" -#ifdef CONFIG_STANDBY -#include -#endif - -#ifdef UART_PCLK -#include -#endif -#ifdef CONFIG_COMPONENTS_PM -#include -#include -#endif -#if (0) -#define UART_LOG_DEBUG -#endif -#define UART_INIT(fmt, ...) printf("uart: "fmt, ##__VA_ARGS__) -#define UART_ERR(fmt, ...) printf("uart: "fmt, ##__VA_ARGS__) - -#ifdef UART_LOG_DEBUG -#define UART_INFO(fmt, ...) printf("[%s %d]"fmt, __func__, __LINE__, ##__VA_ARGS__) -#define UART_INFO_IRQ(fmt, ...) printf("[%s %d]"fmt, __func__, __LINE__, ##__VA_ARGS__) -#else -#define UART_INFO(fmt, ...) -#define UART_INFO_IRQ(fmt, ...) -#endif - -static unsigned long sunxi_uart_port[] = -{ - SUNXI_UART0_BASE, - SUNXI_UART1_BASE, - SUNXI_UART2_BASE, - SUNXI_UART3_BASE, - SUNXI_UART4_BASE, - SUNXI_UART5_BASE -}; -static const uint32_t g_uart_irqn[] = -{ - SUNXI_IRQ_UART0, - SUNXI_IRQ_UART1, - SUNXI_IRQ_UART2, - SUNXI_IRQ_UART3, - SUNXI_IRQ_UART4, - SUNXI_IRQ_UART5, -}; -static sunxi_hal_version_t hal_uart_driver = -{ - SUNXI_HAL_UART_API_VERSION, - SUNXI_HAL_UART_DRV_VERSION -}; -static uart_priv_t g_uart_priv[UART_MAX]; - -static hal_mailbox_t uart_mailbox[UART_MAX]; - -static const uint32_t g_uart_baudrate_map[] = -{ - 300, - 600, - 1200, - 2400, - 4800, - 9600, - 19200, - 38400, - 57600, - 115200, - 230400, - 576000, - 921600, - 1000000, - 1500000, - 3000000, - 4000000, -}; - -//driver capabilities, support uart function only. -static const sunxi_hal_uart_capabilities_t driver_capabilities = -{ - 1, /* supports UART (Asynchronous) mode */ - 0, /* supports Synchronous Master mode */ - 0, /* supports Synchronous Slave mode */ - 0, /* supports UART Single-wire mode */ - 0, /* supports UART IrDA mode */ - 0, /* supports UART Smart Card mode */ - 0, /* Smart Card Clock generator available */ - 0, /* RTS Flow Control available */ - 0, /* CTS Flow Control available */ - 0, /* Transmit completed event: \ref ARM_UARTx_EVENT_TX_COMPLETE */ - 0, /* Signal receive character timeout event: \ref ARM_UARTx_EVENT_RX_TIMEOUT */ - 0, /* RTS Line: 0=not available, 1=available */ - 0, /* CTS Line: 0=not available, 1=available */ - 0, /* DTR Line: 0=not available, 1=available */ - 0, /* DSR Line: 0=not available, 1=available */ - 0, /* DCD Line: 0=not available, 1=available */ - 0, /* RI Line: 0=not available, 1=available */ - 0, /* Signal CTS change event: \ref ARM_UARTx_EVENT_CTS */ - 0, /* Signal DSR change event: \ref ARM_UARTx_EVENT_DSR */ - 0, /* Signal DCD change event: \ref ARM_UARTx_EVENT_DCD */ - 0, /* Signal RI change event: \ref ARM_UARTx_EVENT_RI */ - 0 /* Reserved */ -}; - -#ifdef CONFIG_SUNXI_UART_SUPPORT_POLL - -static poll_wakeup_func uart_drv_poll_wakeup = NULL; - -int32_t hal_uart_check_poll_state(int32_t dev_id, short key) -{ - int ret = -1; - int32_t mask = 0; - - if (key & POLLIN) - { - ret = hal_is_mailbox_empty((hal_mailbox_t)uart_mailbox[dev_id]); - if (ret == 1) - { - mask = 0; - } - else - { - mask |= POLLIN; - } - } - - if (key & POLLOUT) - { - mask |= POLLOUT; - } - return mask; -} - -int32_t hal_uart_poll_wakeup(int32_t dev_id, short key) -{ - int ret = -1; - - if (uart_drv_poll_wakeup) - { - ret = uart_drv_poll_wakeup(dev_id, key); - } - - return ret; -} - -int32_t hal_uart_register_poll_wakeup(poll_wakeup_func poll_wakeup) -{ - uart_drv_poll_wakeup = poll_wakeup; - - return 0; -} - -#endif - -static bool uart_port_is_valid(uart_port_t uart_port) -{ - return (uart_port < UART_MAX); -} - -static bool uart_config_is_valid(const _uart_config_t *config) -{ - return ((config->baudrate < UART_BAUDRATE_MAX) && - (config->word_length <= UART_WORD_LENGTH_8) && - (config->stop_bit <= UART_STOP_BIT_2) && - (config->parity <= UART_PARITY_EVEN)); -} - -sunxi_hal_version_t hal_uart_get_version(int32_t dev) -{ - HAL_ARG_UNUSED(dev); - return hal_uart_driver; -} - -sunxi_hal_uart_capabilities_t hal_uart_get_capabilities(int32_t dev) -{ - HAL_ARG_UNUSED(dev); - return driver_capabilities; -} - -static void uart_set_format(uart_port_t uart_port, uart_word_length_t word_length, - uart_stop_bit_t stop_bit, uart_parity_t parity) -{ - const unsigned long uart_base = sunxi_uart_port[uart_port]; - uart_priv_t *uart_priv = &g_uart_priv[uart_port]; - uint32_t value; - - value = hal_readb(uart_base + UART_LCR); - - /* set word length */ - value &= ~(UART_LCR_DLEN_MASK); - switch (word_length) - { - case UART_WORD_LENGTH_5: - value |= UART_LCR_WLEN5; - break; - case UART_WORD_LENGTH_6: - value |= UART_LCR_WLEN6; - break; - case UART_WORD_LENGTH_7: - value |= UART_LCR_WLEN7; - break; - case UART_WORD_LENGTH_8: - default: - value |= UART_LCR_WLEN8; - break; - } - - /* set stop bit */ - switch (stop_bit) - { - case UART_STOP_BIT_1: - default: - value &= ~(UART_LCR_STOP); - break; - case UART_STOP_BIT_2: - value |= UART_LCR_STOP; - break; - } - - /* set parity bit */ - value &= ~(UART_LCR_PARITY_MASK); - switch (parity) - { - case UART_PARITY_NONE: - value &= ~(UART_LCR_PARITY); - break; - case UART_PARITY_ODD: - value |= UART_LCR_PARITY; - break; - case UART_PARITY_EVEN: - value |= UART_LCR_PARITY; - value |= UART_LCR_EPAR; - break; - } - - uart_priv->lcr = value; - hal_writeb(uart_priv->lcr, uart_base + UART_LCR); -} - -#if defined(CONFIG_ARCH_SUN8IW18P1) || defined(CONFIG_STANDBY) - -#define CCM_UART_RST_OFFSET (16) -#define CCM_UART_GATING_OFFSET (0) -static void uart_reset(uart_port_t uart_port) -{ - hal_reset_type_t reset_type = HAL_SUNXI_RESET; -#ifdef R_UART_NUM - reset_type = HAL_SUNXI_R_RESET; -#endif - - u32 reset_id; - struct reset_control *reset; - switch (uart_port) - { - case UART_0: - reset_id = SUNXI_RST_UART0; - break; - case UART_1: - reset_id = SUNXI_RST_UART1; - break; - case UART_2: - reset_id = SUNXI_RST_UART2; - break; - case UART_3: - reset_id = SUNXI_RST_UART3; - break; - default: - UART_ERR("uart%d is invalid\n", uart_port); - return; - } - reset = hal_reset_control_get(reset_type, reset_id); - hal_reset_control_reset(reset); -} -#endif - -static void uart_set_baudrate(uart_port_t uart_port, uart_baudrate_t baudrate) -{ - const unsigned long uart_base = sunxi_uart_port[uart_port]; - uart_priv_t *uart_priv = &g_uart_priv[uart_port]; - uint32_t actual_baudrate = g_uart_baudrate_map[baudrate]; - uint32_t quot, uart_clk; - - uart_clk = 24000000; /* FIXME: fixed to 24MHz */ - -#ifdef UART_SCLK - hal_clk_t clk; - clk = hal_clock_get(HAL_SUNXI_CCU, UART_SCLK); - if (!clk) - UART_ERR("uart%d fail to get SCLK\n", uart_port); - uart_clk = hal_clk_get_rate(clk); - if (!uart_clk) { - UART_ERR("uart%d fail to get SCLK rate, use 24M\n", uart_port); - uart_clk = 24000000; /* FIXME: fixed to 24MHz */ - } -#endif - - quot = (uart_clk + 8 * actual_baudrate) / (16 * actual_baudrate); - - UART_INFO("baudrate: %d, quot = %d\r\n", actual_baudrate, quot); - - uart_priv->dlh = quot >> 8; - uart_priv->dll = quot & 0xff; - - /* hold tx so that uart will update lcr and baud in the gap of tx */ - hal_writeb(UART_HALT_HTX | UART_HALT_FORCECFG, uart_base + UART_HALT); - hal_writeb(uart_priv->lcr | UART_LCR_DLAB, uart_base + UART_LCR); - hal_writeb(uart_priv->dlh, uart_base + UART_DLH); - hal_writeb(uart_priv->dll, uart_base + UART_DLL); - hal_writeb(UART_HALT_HTX | UART_HALT_FORCECFG | UART_HALT_LCRUP, uart_base + UART_HALT); - /* FIXME: implement timeout */ - while (hal_readb(uart_base + UART_HALT) & UART_HALT_LCRUP) - ; - - /* In fact there are two DLABs(DLAB and DLAB_BAK) in the hardware implementation. - * The DLAB_BAK is sellected only when SW_UART_HALT_FORCECFG is set to 1, - * and this bit can be access no matter uart is busy or not. - * So we select the DLAB_BAK always by leaving SW_UART_HALT_FORCECFG to be 1. */ - hal_writeb(uart_priv->lcr, uart_base + UART_LCR); - hal_writeb(UART_HALT_FORCECFG, uart_base + UART_HALT); -} - -static void uart_set_fifo(uart_port_t uart_port, uint32_t value) -{ - const unsigned long uart_base = sunxi_uart_port[uart_port]; - uart_priv_t *uart_priv = &g_uart_priv[uart_port]; - - uart_priv->fcr = value; - hal_writeb(uart_priv->fcr, uart_base + UART_FCR); -} - -void hal_uart_set_hardware_flowcontrol(uart_port_t uart_port) -{ - const unsigned long uart_base = sunxi_uart_port[uart_port]; - uart_priv_t *uart_priv = &g_uart_priv[uart_port]; - uint32_t value; - - value = hal_readb(uart_base + UART_MCR); - value |= UART_MCR_DTR | UART_MCR_RTS | UART_MCR_AFE; - uart_priv->mcr = value; - hal_writeb(uart_priv->mcr, uart_base + UART_MCR); - - /* enable with modem status interrupts */ - value = hal_readb(uart_base + UART_IER); - value |= UART_IER_MSI; - uart_priv->ier = value; - hal_writeb(uart_priv->ier, uart_base + UART_IER); -} - -void hal_uart_disable_flowcontrol(uart_port_t uart_port) -{ - const unsigned long uart_base = sunxi_uart_port[uart_port]; - uart_priv_t *uart_priv = &g_uart_priv[uart_port]; - uint32_t value; - - value = hal_readb(uart_base + UART_MCR); - value &= ~(UART_MCR_DTR | UART_MCR_RTS | UART_MCR_AFE); - uart_priv->mcr = value; - hal_writeb(uart_priv->mcr, uart_base + UART_MCR); - - /* disable with modem status interrupts */ - value = hal_readb(uart_base + UART_IER); - value &= ~(UART_IER_MSI); - uart_priv->ier = value; - hal_writeb(uart_priv->ier, uart_base + UART_IER); -} - -static void uart_force_idle(uart_port_t uart_port) -{ - const unsigned long uart_base = sunxi_uart_port[uart_port]; - uart_priv_t *uart_priv = &g_uart_priv[uart_port]; - - if (uart_priv->fcr & UART_FCR_FIFO_EN) - { - hal_writeb(UART_FCR_FIFO_EN, uart_base + UART_FCR); - hal_writeb(UART_FCR_TXFIFO_RST - | UART_FCR_RXFIFO_RST - | UART_FCR_FIFO_EN, uart_base + UART_FCR); - hal_writeb(0, uart_base + UART_FCR); - } - - hal_writeb(uart_priv->fcr, uart_base + UART_FCR); - (void)hal_readb(uart_base + UART_FCR); -} - -static void uart_handle_busy(uart_port_t uart_port) -{ - const unsigned long uart_base = sunxi_uart_port[uart_port]; - uart_priv_t *uart_priv = &g_uart_priv[uart_port]; - - (void)hal_readb(uart_base + UART_USR); - - /* - * Before reseting lcr, we should ensure than uart is not in busy - * state. Otherwise, a new busy interrupt will be introduced. - * It is wise to set uart into loopback mode, since it can cut down the - * serial in, then we should reset fifo(in my test, busy state - * (UART_USR_BUSY) can't be cleard until the fifo is empty). - */ - hal_writeb(uart_priv->mcr | UART_MCR_LOOP, uart_base + UART_MCR); - uart_force_idle(uart_port); - hal_writeb(uart_priv->lcr, uart_base + UART_LCR); - hal_writeb(uart_priv->mcr, uart_base + UART_MCR); -} - -static uint32_t uart_handle_rx(uart_port_t uart_port, uint32_t lsr) -{ - const unsigned long uart_base = sunxi_uart_port[uart_port]; - uint8_t ch = 0; - - UART_INFO("IRQ uart%d handle rx \n", uart_port); - do - { - if (lsr & UART_LSR_DR) - { - ch = hal_readb(uart_base + UART_RBR); - if (uart_mailbox[uart_port] != NULL) - hal_mailbox_send((hal_mailbox_t)uart_mailbox[uart_port], ch); - else - UART_ERR("uart %d mailbox is null\n", uart_port); -#ifdef CONFIG_SUNXI_UART_SUPPORT_POLL - hal_uart_poll_wakeup(uart_port, POLLIN); -#endif - } - lsr = hal_readb(uart_base + UART_LSR); - } while ((lsr & (UART_LSR_DR | UART_LSR_BI))); - - return lsr; -} - - -static hal_irqreturn_t uart_irq_handler(void *dev_id) -{ - uart_priv_t *uart_priv = dev_id; - uart_port_t uart_port = uart_priv->uart_port; - const unsigned long uart_base = sunxi_uart_port[uart_port]; - uint32_t iir, lsr; - - iir = hal_readb(uart_base + UART_IIR) & UART_IIR_IID_MASK; - lsr = hal_readb(uart_base + UART_LSR); - - UART_INFO_IRQ("IRQ uart%d lsr is %08x \n", uart_port, lsr); - if (iir == UART_IIR_IID_BUSBSY) - { - uart_handle_busy(uart_port); - } - else - { - if (lsr & (UART_LSR_DR | UART_LSR_BI)) - { - lsr = uart_handle_rx(uart_port, lsr); - } - else if (iir & UART_IIR_IID_CHARTO) - /* has charto irq but no dr lsr? just read and ignore */ - { - hal_readb(uart_base + UART_RBR); - } - - /* if (lsr & UART_LSR_THRE) - { - uart_handle_tx(uart_port); - }*/ - } - return 0; -} - -static void uart_enable_irq(uart_port_t uart_port, uint32_t irq_type) -{ - const unsigned long uart_base = sunxi_uart_port[uart_port]; - uint32_t value; - - value = hal_readb(uart_base + UART_IER); - value |= irq_type; - hal_writeb(value, uart_base + UART_IER); - -} - -static void uart_enable_busy_cfg(uart_port_t uart_port) -{ - const unsigned long uart_base = sunxi_uart_port[uart_port]; - uint32_t value; - - value = hal_readb(uart_base + UART_HALT); - value |= UART_HALT_FORCECFG; - hal_writeb(value, uart_base + UART_HALT); -} - -static inline int is_uart_tx_fifo_empty(uart_port_t uart_port) -{ - volatile uint32_t *status = (uint32_t *)(sunxi_uart_port[uart_port] + UART_USR); - return !!(*status & UART_USR_TFE); -} - -static int uart_clk_init(int bus, bool enable) -{ - hal_clk_status_t ret; - hal_reset_type_t reset_type = HAL_SUNXI_RESET; - u32 reset_id; - hal_clk_type_t clk_type = HAL_SUNXI_CCU; - hal_clk_id_t clk_id; - hal_clk_t clk; - struct reset_control *reset; - -#ifdef R_UART_NUM - reset_type = HAL_SUNXI_R_RESET; - clk_type = HAL_SUNXI_R_CCU; -#endif - - switch (bus) - { - case 0: - clk_id = SUNXI_CLK_UART0; - reset_id = SUNXI_RST_UART0; - break; - case 1: - clk_id = SUNXI_CLK_UART1; - reset_id = SUNXI_RST_UART1; - break; - case 2: - clk_id = SUNXI_CLK_UART2; - reset_id = SUNXI_RST_UART2; - break; - case 3: - clk_id = SUNXI_CLK_UART3; - reset_id = SUNXI_RST_UART3; - break; - case 4: - clk_id = SUNXI_CLK_UART4; - reset_id = SUNXI_RST_UART4; - break; - case 5: - clk_id = SUNXI_CLK_UART5; - reset_id = SUNXI_RST_UART5; - break; - default: - UART_ERR("uart%d is invalid\n", bus); - return -1; - } - if (enable) - { - reset = hal_reset_control_get(reset_type, reset_id); - hal_reset_control_deassert(reset); - hal_reset_control_put(reset); - - clk = hal_clock_get(clk_type, clk_id); - if (!clk) { - UART_ERR("uart%d fail to get bus clk\n", bus); - return -1; - } - ret = hal_clock_enable(clk); - if (ret) - { - UART_ERR("[uart%d] couldn't enable clk!\n", bus); - return -1; - } - } - else - { - clk = hal_clock_get(clk_type, clk_id); - if (!clk) { - UART_ERR("uart%d fail to get bus clk\n", bus); - return -1; - } - ret = hal_clock_disable(clk); - if (ret) - { - UART_ERR("[uart%d] couldn't disable clk!\n", bus); - return -1; - } - } - -#ifdef UART_PCLK -/* We need wait TX FIFO empty before change UART clock frequency. For 9600 baudrate, - * 64Byte TX FIFO will be empty after 0.053s(64 * 8 / 9600), so we wait 100ms at most. */ -#define MAX_FIFO_EMPTY_CHECK_TIMES 100 - uint32_t check_times = 0; - while (!is_uart_tx_fifo_empty(bus)) - { - check_times++; - hal_udelay(1000); - if (check_times >= MAX_FIFO_EMPTY_CHECK_TIMES) - break; - } - - hal_clk_t pclk; - clk = hal_clock_get(HAL_SUNXI_CCU, UART_SCLK); - if (!clk) { - UART_ERR("uart%d fail to get SCLK\n", bus); - return -1; - } - pclk = hal_clock_get(HAL_SUNXI_AON_CCU, UART_PCLK); - if (!pclk) { - UART_ERR("uart%d fail to get PCLK\n", bus); - return -1; - } - ret = hal_clk_set_parent(clk, pclk); - if (ret != HAL_CLK_STATUS_OK) { - UART_ERR("uart%d fail to setparent\n", bus); - return -1; - } -#endif - - return 0; -} - -static void uart_pinctrl_init(uart_port_t uart_port) -{ -#ifdef CONFIG_DRIVER_SYSCONFIG - user_gpio_set_t gpio_cfg[4]; - int count, i; - char uart_name[16]; - gpio_pin_t uart_pin[4]; - gpio_muxsel_t uart_muxsel[4]; - - memset(gpio_cfg, 0, sizeof(gpio_cfg)); - sprintf(uart_name, "uart%d", uart_port); - count = Hal_Cfg_GetGPIOSecKeyCount(uart_name); - if (!count) - { - UART_ERR("[uart%d] not support in sys_config\n", uart_port); - return ; - } - Hal_Cfg_GetGPIOSecData(uart_name, gpio_cfg, count); - - for (i = 0; i < count; i++) - { - uart_pin[i] = (gpio_cfg[i].port - 1) * 32 + gpio_cfg[i].port_num; - uart_muxsel[i] = gpio_cfg[i].mul_sel; - - hal_gpio_pinmux_set_function(uart_pin[i], uart_muxsel[i]); - } -#else - /* TODO:use sys_config instead it, but DSP does not support sys_config */ - switch (uart_port) - { - case UART_0: - hal_gpio_pinmux_set_function(UART0_TX, UART0_GPIO_FUNCTION);//TX - hal_gpio_pinmux_set_function(UART0_RX, UART0_GPIO_FUNCTION);//RX - break; - case UART_1: - hal_gpio_pinmux_set_function(UART1_TX, UART1_GPIO_FUNCTION);//TX - hal_gpio_pinmux_set_function(UART1_RX, UART1_GPIO_FUNCTION);//RX -#ifdef CONFIG_ARCH_SUN8IW18P1 - hal_gpio_pinmux_set_function(UART1_RTX, GPIO_MUXSEL_FUNCTION2); - hal_gpio_pinmux_set_function(UART1_CTX, GPIO_MUXSEL_FUNCTION2); -#endif - break; - case UART_2: -#ifdef UART2_RTS - hal_gpio_pinmux_set_function(UART2_RTS, UART2_GPIO_FUNCTION); -#endif -#ifdef UART2_CTS - hal_gpio_pinmux_set_function(UART2_CTS, UART2_GPIO_FUNCTION); -#endif - hal_gpio_pinmux_set_function(UART2_TX, UART2_GPIO_FUNCTION);//TX - hal_gpio_pinmux_set_function(UART2_RX, UART2_GPIO_FUNCTION);//RX - break; - case UART_3: - hal_gpio_pinmux_set_function(UART3_TX, UART3_GPIO_FUNCTION);//TX - hal_gpio_pinmux_set_function(UART3_RX, UART3_GPIO_FUNCTION);//RX - break; - case UART_4: - hal_gpio_pinmux_set_function(UART4_TX, UART4_GPIO_FUNCTION);//TX - hal_gpio_pinmux_set_function(UART4_RX, UART4_GPIO_FUNCTION);//RX - break; - case UART_5: - hal_gpio_pinmux_set_function(UART5_TX, UART5_GPIO_FUNCTION);//TX - hal_gpio_pinmux_set_function(UART5_RX, UART5_GPIO_FUNCTION);//RX - break; - default: - UART_ERR("[uart%d] not support \n", uart_port); - break; - } -#endif -} - -static void uart_pinctrl_uninit(uart_port_t uart_port) -{ -#ifdef CONFIG_DRIVER_SYSCONFIG - user_gpio_set_t gpio_cfg[4]; - int count, i; - char uart_name[16]; - gpio_pin_t uart_pin[4]; - - memset(gpio_cfg, 0, sizeof(gpio_cfg)); - sprintf(uart_name, "uart%d", uart_port); - count = Hal_Cfg_GetGPIOSecKeyCount(uart_name); - if (!count) - { - UART_ERR("[uart%d] not support in sys_config\n", uart_port); - return ; - } - Hal_Cfg_GetGPIOSecData(uart_name, gpio_cfg, count); - - - for (i = 0; i < count; i++) - { - uart_pin[i] = (gpio_cfg[i].port - 1) * 32 + gpio_cfg[i].port_num; - hal_gpio_pinmux_set_function(uart_pin[i], GPIO_MUXSEL_DISABLED); - } -#else - /* TODO:use sys_config instead it, but DSP does not support sys_config */ - switch (uart_port) - { - case UART_0: - hal_gpio_pinmux_set_function(UART0_TX, GPIO_MUXSEL_DISABLED);//TX - hal_gpio_pinmux_set_function(UART0_RX, GPIO_MUXSEL_DISABLED);//RX - break; - case UART_1: - hal_gpio_pinmux_set_function(UART1_TX, GPIO_MUXSEL_DISABLED);//TX - hal_gpio_pinmux_set_function(UART1_RX, GPIO_MUXSEL_DISABLED);//RX -#ifdef CONFIG_ARCH_SUN8IW18P1 //support xr829 - hal_gpio_pinmux_set_function(UART1_RTX, GPIO_MUXSEL_DISABLED); - hal_gpio_pinmux_set_function(UART1_CTX, GPIO_MUXSEL_DISABLED); -#endif - break; - case UART_2: - hal_gpio_pinmux_set_function(UART2_TX, GPIO_MUXSEL_DISABLED);//TX - hal_gpio_pinmux_set_function(UART2_RX, GPIO_MUXSEL_DISABLED);//RX - break; - case UART_3: - hal_gpio_pinmux_set_function(UART3_TX, GPIO_MUXSEL_DISABLED);//TX - hal_gpio_pinmux_set_function(UART3_RX, GPIO_MUXSEL_DISABLED);//RX - break; - case UART_4: - hal_gpio_pinmux_set_function(UART4_TX, GPIO_MUXSEL_DISABLED);//TX - hal_gpio_pinmux_set_function(UART4_RX, GPIO_MUXSEL_DISABLED);//RX - break; - case UART_5: - hal_gpio_pinmux_set_function(UART5_TX, GPIO_MUXSEL_DISABLED);//TX - hal_gpio_pinmux_set_function(UART5_RX, GPIO_MUXSEL_DISABLED);//RX - break; - default: - UART_ERR("[uart%d] not support \n", uart_port); - break; - } -#endif -} -/* default uart config */ -_uart_config_t uart_defconfig = -{ - .baudrate = UART_BAUDRATE_115200, - .word_length = UART_WORD_LENGTH_8, - .stop_bit = UART_STOP_BIT_1, - .parity = UART_PARITY_NONE, -}; - -#ifdef CONFIG_STANDBY -static int uart_suspend(void *data) -{ - int32_t uart_port = (int32_t)data; - - hal_log_debug("uart%d suspend\r\n", uart_port); - return 0; -} - -static int uart_resume(void *data) -{ - int32_t uart_port = (int32_t)data; - - uart_priv_t *uart_priv = &g_uart_priv[uart_port]; - uint32_t irqn = g_uart_irqn[uart_port]; - uint32_t value = 0; - _uart_config_t *uart_config = &uart_defconfig; - char uart_name[12] = {0}; - - if ((!uart_port_is_valid(uart_port)) || - (!uart_config_is_valid(uart_config))) - { - hal_log_err("error parameter\r\n"); - return -1; - } - - /* enable clk */ - uart_clk_init(uart_port, true); - - /* request gpio */ - uart_pinctrl_init(uart_port); - - /* config uart attributes */ - uart_set_format(uart_port, uart_config->word_length, - uart_config->stop_bit, uart_config->parity); - - /* force reset controller to disable transfer */ - uart_reset(uart_port); - - uart_set_baudrate(uart_port, uart_config->baudrate); - - value |= UART_FCR_RXTRG_1_2 | UART_FCR_TXTRG_1_2 | UART_FCR_FIFO_EN; - uart_set_fifo(uart_port, value); - - /* set uart IER */ - uart_enable_irq(uart_port, UART_IER_RDI | UART_IER_RLSI); - - /* force config */ - uart_enable_busy_cfg(uart_port); - - hal_log_debug("uart%d resume\r\n", uart_port); - - return 0; -} -#endif - -#ifdef CONFIG_COMPONENTS_PM -static int hal_uart_suspend(void *data, suspend_mode_t mode) -{ - uart_port_t uart_port = (uart_port_t)data; - uint32_t irqn = g_uart_irqn[uart_port]; - - UART_INFO("uart %d suspend\n", uart_port); - - hal_disable_irq(irqn); - uart_enable_irq(uart_port, 0); - uart_pinctrl_uninit(uart_port); - uart_clk_init(uart_port, false); - - return 0; -} - -static void hal_uart_resume(void *data, suspend_mode_t mode) -{ - - uart_port_t uart_port = (uart_port_t)data; - uart_priv_t *uart_priv = &g_uart_priv[uart_port]; - uint32_t irqn = g_uart_irqn[uart_port]; - uint32_t value = 0; - _uart_config_t *uart_config = uart_priv->uart_config; - - if ((!uart_port_is_valid(uart_port)) || - (!uart_config_is_valid(uart_config))) - { - hal_log_err("error parameter\r\n"); - return; - } - - /* enable clk */ - uart_clk_init(uart_port, true); - - /* request gpio */ - uart_pinctrl_init(uart_port); - - /* config uart attributes */ - uart_set_format(uart_port, uart_config->word_length, - uart_config->stop_bit, uart_config->parity); - -#ifdef CONFIG_ARCH_SUN8IW18P1 - /* force reset controller to disable transfer */ - uart_reset(uart_port); -#endif - - uart_set_baudrate(uart_port, uart_config->baudrate); - - value |= UART_FCR_RXTRG_1_2 | UART_FCR_TXTRG_1_2 | UART_FCR_FIFO_EN; - uart_set_fifo(uart_port, value); - - /* set uart IER */ - uart_enable_irq(uart_port, UART_IER_RDI | UART_IER_RLSI); - - /* force config */ - uart_enable_busy_cfg(uart_port); - - hal_disable_irq(irqn); - UART_INFO("uart%d resume\n", uart_port); -} - -struct syscore_ops pm_uart_ops = { - .name = "sunxi_uart", - .suspend = hal_uart_suspend, - .resume = hal_uart_resume, -}; -#endif - -int32_t hal_uart_init(int32_t uart_port) -{ - uart_priv_t *uart_priv = &g_uart_priv[uart_port]; - uint32_t irqn = g_uart_irqn[uart_port]; - uint32_t value = 0; - - _uart_config_t *uart_config = &uart_defconfig; -#ifdef CONFIG_COMPONENTS_PM - uart_priv->uart_config = &uart_defconfig; -#endif - char uart_name[12] = {0}; - - if ((!uart_port_is_valid(uart_port)) || - (!uart_config_is_valid(uart_config))) - { - return HAL_UART_STATUS_ERROR_PARAMETER; - } - - /* enable clk */ - uart_clk_init(uart_port, true); - - /* request gpio */ - uart_pinctrl_init(uart_port); - - /* config uart attributes */ - uart_set_format(uart_port, uart_config->word_length, - uart_config->stop_bit, uart_config->parity); - -#ifdef CONFIG_ARCH_SUN8IW18P1 - /* force reset controller to disable transfer */ - uart_reset(uart_port); -#endif - - uart_set_baudrate(uart_port, uart_config->baudrate); - - value |= UART_FCR_RXTRG_1_2 | UART_FCR_TXTRG_1_2 | UART_FCR_FIFO_EN; - uart_set_fifo(uart_port, value); - - if (uart_mailbox[uart_port] == NULL) - uart_mailbox[uart_port] = hal_mailbox_create(uart_name, UART_FIFO_SIZE); - if (uart_mailbox[uart_port] == NULL) - { - UART_ERR("create mailbox fail\n"); - return HAL_UART_STATUS_ERROR; - } - - sprintf(uart_name, "uart%d", (int)uart_port); - if (uart_priv->uart_port == uart_port && uart_priv->irqn == irqn) - { - UART_ERR("irq for uart%ld already enabled\n", (long int)uart_port); - } - else - { - uart_priv->uart_port = uart_port; - uart_priv->irqn = irqn; - - if (hal_request_irq(irqn, uart_irq_handler, uart_name, uart_priv) < 0) - { - UART_ERR("request irq error\n"); - return -1; - } - - hal_enable_irq(irqn); - - } - - /* set uart IER */ - uart_enable_irq(uart_port, UART_IER_RDI | UART_IER_RLSI); - - /* force config */ - uart_enable_busy_cfg(uart_port); - -#ifdef CONFIG_STANDBY - uart_priv->pm = register_pm_dev_notify(uart_suspend, uart_resume, (void *)uart_port); -#endif - -#ifdef CONFIG_COMPONENTS_PM - pm_uart_ops.data = (void *)((uintptr_t)uart_port); - pm_syscore_register(&pm_uart_ops); -#endif - return SUNXI_HAL_OK; -} - -int32_t hal_uart_init_for_amp_cli(int32_t uart_port) -{ - uart_priv_t *uart_priv = &g_uart_priv[uart_port]; - uint32_t irqn = g_uart_irqn[uart_port]; - char uart_name[12] = {0}; - - if (!uart_port_is_valid(uart_port)) - { - return HAL_UART_STATUS_ERROR_PARAMETER; - } - - if (uart_mailbox[uart_port] == NULL) - uart_mailbox[uart_port] = hal_mailbox_create(uart_name, UART_FIFO_SIZE); - if (uart_mailbox[uart_port] == NULL) - { - UART_ERR("create mailbox fail\n"); - return HAL_UART_STATUS_ERROR; - } - - sprintf(uart_name, "uart%d", (int)uart_port); - if (uart_priv->uart_port == uart_port && uart_priv->irqn == irqn) - { - UART_ERR("irq for uart%ld already enabled\n", (long int)uart_port); - } - else - { - uart_priv->uart_port = uart_port; - uart_priv->irqn = irqn; - - if (hal_request_irq(irqn, uart_irq_handler, uart_name, uart_priv) < 0) - { - UART_ERR("request irq error\n"); - return -1; - } - - hal_enable_irq(irqn); - - } - - return SUNXI_HAL_OK; -} - -int32_t hal_uart_deinit(int32_t uart_port) -{ - uart_priv_t *uart_priv = &g_uart_priv[uart_port]; - uint32_t irqn = g_uart_irqn[uart_port]; - -#ifdef CONFIG_STANDBY - unregister_pm_dev_notify(uart_priv->pm); - uart_priv->pm = NULL; -#endif - -#ifdef CONFIG_COMPONENTS_PM - pm_syscore_unregister(&pm_uart_ops); -#endif - /* disable clk */ - uart_clk_init(uart_port, false); - - uart_pinctrl_uninit(uart_port); - uart_enable_irq(uart_port, 0); - hal_disable_irq(irqn); - hal_free_irq(irqn); - hal_mailbox_delete(uart_mailbox[uart_port]); - uart_mailbox[uart_port] = NULL; - - uart_priv->uart_port = UART_MAX; - uart_priv->irqn = 0; - - return SUNXI_HAL_OK; -} - -int32_t hal_uart_disable_rx(int32_t uart_port) -{ - uint32_t irqn = g_uart_irqn[uart_port]; - hal_disable_irq(irqn); - return 0; -} - -int32_t hal_uart_enable_rx(int32_t uart_port) -{ - uint32_t irqn = g_uart_irqn[uart_port]; - hal_enable_irq(irqn); - return 0; -} - -int32_t hal_uart_power_control(int32_t dev, sunxi_hal_power_state_e state) -{ - return SUNXI_HAL_OK; -} - -static int __attribute__((no_instrument_function)) _uart_putc(int devid, char c) -{ - volatile uint32_t *sed_buf; - volatile uint32_t *sta; - - sed_buf = (uint32_t *)(sunxi_uart_port[devid] + UART_THR); - sta = (uint32_t *)(sunxi_uart_port[devid] + UART_USR); - - /* FIFO status, contain valid data */ - while (!(*sta & 0x02)); - *sed_buf = c; - - return 1; -} - -int32_t __attribute__((no_instrument_function)) hal_uart_put_char(int32_t dev, char c) -{ - return _uart_putc(dev, c); -} - -int32_t hal_uart_send(int32_t dev, const uint8_t *data, uint32_t num) -{ - int size; - - hal_assert(data != NULL); - - size = num; - while (num) - { - _uart_putc(dev, *data); - - ++ data; - -- num; - } - - return size - num; -} - -static int _uart_getc(int devid) -{ - int ch = -1; - volatile uint32_t *rec_buf; - volatile uint32_t *sta; - volatile uint32_t *fifo; - - rec_buf = (uint32_t *)(sunxi_uart_port[devid] + UART_RHB); - sta = (uint32_t *)(sunxi_uart_port[devid] + UART_USR); - fifo = (uint32_t *)(sunxi_uart_port[devid] + UART_RFL); - - while (!(*fifo & 0x1ff)); - - /* Receive Data Available */ - if (*sta & 0x08) - { - ch = *rec_buf & 0xff; - } - - return ch; -} - -uint8_t hal_uart_get_char(int32_t dev) -{ - return _uart_getc(dev); -} - -int32_t hal_uart_receive_polling(int32_t dev, uint8_t *data, uint32_t num) -{ - int ch; - int size; - - hal_assert(data != NULL); - size = num; - - while (num) - { - ch = _uart_getc(dev); - if (ch == -1) - { - break; - } - - *data = ch; - data ++; - num --; - - /* FIXME: maybe only used for console? move it away! */ - if (ch == '\n') - { - break; - } - } - - return size - num; -} - -int32_t hal_uart_receive(int32_t dev, uint8_t *data, uint32_t num) -{ - unsigned int data_rev; - int i = 0; - int32_t ret = -1, rev_count = 0; - - hal_assert(data != NULL); - - for (i = 0; i < num; i++) - { - ret = hal_mailbox_recv((hal_mailbox_t)uart_mailbox[dev], &data_rev, -1); - if (ret == 0) - { - rev_count++; - *(data + i) = (uint8_t)data_rev; - } - else - { - UART_ERR("receive error"); - break; - } - } - - return rev_count; -} - -int32_t hal_uart_receive_no_block(int32_t dev, uint8_t *data, uint32_t num, int32_t timeout) -{ - unsigned int data_rev; - int i = 0; - int32_t ret = -1, rev_count = 0; - - hal_assert(data != NULL); - - for (i = 0; i < num; i++) - { - ret = hal_mailbox_recv((hal_mailbox_t)uart_mailbox[dev], &data_rev, timeout); - if (ret == 0) - { - rev_count++; - *(data + i) = (uint8_t)data_rev; - } - else - { - break; - } - } - - return rev_count; -} - - -int32_t hal_uart_transfer(int32_t dev, const void *data_out, - void *data_in, uint32_t num) -{ - return SUNXI_HAL_OK; -} - -uint32_t hal_uart_get_tx_count(int32_t dev) -{ - /* TODO: need verify */ - return 0; -} - -uint32_t hal_uart_get_rx_count(int32_t dev) -{ - /* TODO: need verify */ - return 0; -} - -int32_t hal_uart_control(int32_t uart_port, int cmd, void *args) -{ - _uart_config_t *uart_config; - uart_config = (_uart_config_t *)args; - -#ifdef CONFIG_COMPONENTS_PM - uart_priv_t *uart_priv = &g_uart_priv[uart_port]; - uart_priv->uart_config = (_uart_config_t *)args; -#endif - /* config uart attributes */ - uart_set_format(uart_port, uart_config->word_length, - uart_config->stop_bit, uart_config->parity); - uart_set_baudrate(uart_port, uart_config->baudrate); - - return SUNXI_HAL_OK; -} - -sunxi_hal_uart_status_t hal_uart_get_status(int32_t dev) -{ - sunxi_hal_uart_status_t status = {1, 1, 0, 0, 0, 0, 0, 0}; - - return status; -} - -int32_t hal_uart_set_modem_control(int32_t dev, - sunxi_hal_uart_modem_control_e control) -{ - return SUNXI_HAL_OK; -} - -sunxi_hal_uart_modem_status_t hal_uart_get_modem_status(int32_t dev) -{ - sunxi_hal_uart_modem_status_t status = {0, 0, 0, 0, 0}; - - return status; -} - -void hal_uart_set_loopback(uart_port_t uart_port, bool enable) -{ - const unsigned long uart_base = sunxi_uart_port[uart_port]; - uint32_t value; - - value = hal_readb(uart_base + UART_MCR); - if (enable) - value |= UART_MCR_LOOP; - else - value &= ~(UART_MCR_LOOP); - hal_writeb(value, uart_base + UART_MCR); - -} - -int serial_driver_init(void) -{ - UART_INFO("serial hal driver init"); - return 0; -} - diff --git a/src/platform/f133/hal/uart/platform-uart.h b/src/platform/f133/hal/uart/platform-uart.h deleted file mode 100644 index 4a1bccb0e2e3da7ffdb425d423150ae06e852534..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/uart/platform-uart.h +++ /dev/null @@ -1,60 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __UART_PLATFORM_H__ -#define __UART_PLATFORM_H__ - -#if defined(CONFIG_ARCH_SUN8IW19) -#include "platform/uart-sun8iw19.h" -#endif -#if defined(CONFIG_ARCH_SUN8IW18P1) -#include "platform/uart-sun8iw18.h" -#endif -#if defined(CONFIG_ARCH_SUN8IW20) || defined (CONFIG_SOC_SUN20IW1) -#include "platform/uart-sun8iw20.h" -#endif -#if defined(CONFIG_ARCH_SUN8IW21) || defined (CONFIG_SOC_SUN20IW3) -#include "platform/uart-sun8iw21.h" -#endif -#if defined(CONFIG_ARCH_SUN50IW11) -#include "platform/uart-sun50iw11.h" -#endif -#if defined(CONFIG_ARCH_SUN20IW2) -#include "../ccmu/sunxi-ng/ccu-sun20iw2.h" -#include "platform/uart-sun20iw2p1.h" -#endif -#if defined(CONFIG_ARCH_SUN55IW3) -#include "../ccmu/sunxi-ng/ccu-sun55iw3.h" -#include "platform/uart-sun55iw3.h" -#endif - -#endif /* __DMA_PLATFORM_H__ */ diff --git a/src/platform/f133/hal/uart/platform/uart-sun20iw2p1.h b/src/platform/f133/hal/uart/platform/uart-sun20iw2p1.h deleted file mode 100644 index d6e733fb04e4bbc033c89984e98adac0fac18980..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/uart/platform/uart-sun20iw2p1.h +++ /dev/null @@ -1,125 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY¡¯S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS¡¯SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY¡¯S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __UART_SUN20IW2_H__ -#define __UART_SUN20IW2_H__ - -#include - -#define UART_SCLK CLK_PCLK_SPC -#define UART_PCLK CLK_DEVICE - -#define SUNXI_CLK_UART0 CLK_BUS_UART0 -#define SUNXI_RST_UART0 RST_UART0 - -#define SUNXI_CLK_UART1 CLK_BUS_UART1 -#define SUNXI_RST_UART1 RST_UART1 - -#define SUNXI_CLK_UART2 CLK_BUS_UART2 -#define SUNXI_RST_UART2 RST_UART2 - -#define SUNXI_CLK_UART3 0 -#define SUNXI_RST_UART3 0 - -#define SUNXI_CLK_UART4 0 /* no support */ -#define SUNXI_RST_UART4 0 - -#define SUNXI_CLK_UART5 0 /* no support */ -#define SUNXI_RST_UART5 0 - - -#if defined(CONFIG_ARCH_RISCV_C906) -#define SUNXI_IRQ_UART0 (49) /* 49 uart0 interrupt */ -#define SUNXI_IRQ_UART1 (50) /* 50 uart1 interrupt */ -#define SUNXI_IRQ_UART2 (51) /* 51 uart2 interrupt */ -/* not used */ -#define SUNXI_IRQ_UART3 (0) -#define SUNXI_IRQ_UART4 (0) -#define SUNXI_IRQ_UART5 (0) -#elif defined(CONFIG_ARCH_DSP) -#define SUNXI_IRQ_UART0 (RINTC_IRQ_MASK | 34) /* 34 uart0 interrupt */ -#define SUNXI_IRQ_UART1 (RINTC_IRQ_MASK | 35) /* 35 uart1 interrupt */ -#define SUNXI_IRQ_UART2 (RINTC_IRQ_MASK | 36) /* 36 uart2 interrupt */ -/* not used */ -#define SUNXI_IRQ_UART3 (0) -#define SUNXI_IRQ_UART4 (0) -#define SUNXI_IRQ_UART5 (0) -#else -#define SUNXI_IRQ_UART0 (33) /* 33 uart0 interrupt */ -#define SUNXI_IRQ_UART1 (34) /* 34 uart1 interrupt */ -#define SUNXI_IRQ_UART2 (35) /* 35 uart2 interrupt */ -/* not used */ -#define SUNXI_IRQ_UART3 (0) -#define SUNXI_IRQ_UART4 (0) -#define SUNXI_IRQ_UART5 (0) -#endif - -/* base register infomation */ -#define SUNXI_UART0_BASE (0x40047000) -#define SUNXI_UART1_BASE (0x40047400) -#define SUNXI_UART2_BASE (0x40047800) -/* not used */ -#define SUNXI_UART3_BASE (0xffffffff) -#define SUNXI_UART4_BASE (0xffffffff) /* no support */ -#define SUNXI_UART5_BASE (0xffffffff) /* no support */ - -#define UART_FIFO_SIZE (64) -#define UART0_GPIO_FUNCTION (5) -#define UART1_GPIO_FUNCTION (2) -#define UART2_GPIO_FUNCTION (2) -#define UART3_GPIO_FUNCTION (2) -#define UART4_GPIO_FUNCTION (2) /* no support */ -#define UART5_GPIO_FUNCTION (2) /* no support */ - -#define UART0_TX GPIOA(16) -#define UART0_RX GPIOA(17) - -#define UART1_TX GPIOB(14) -#define UART1_RX GPIOB(15) - -#define UART2_RTS GPIOA(10) -#define UART2_CTS GPIOA(11) -#define UART2_TX GPIOA(12) -#define UART2_RX GPIOA(13) - -/* not used */ -#define UART3_TX GPIOA(12) -#define UART3_RX GPIOA(13) - -#define UART4_TX GPIOA(12) /* no support */ -#define UART4_RX GPIOA(13) /* no support */ - -#define UART5_TX GPIOA(12) /* no support */ -#define UART5_RX GPIOA(13) /* no support */ - - -#endif /*__UART_SUN20IW2_P1__ */ diff --git a/src/platform/f133/hal/uart/platform/uart-sun50iw11.h b/src/platform/f133/hal/uart/platform/uart-sun50iw11.h deleted file mode 100644 index bc9bda840ab4a24f6d86c2a54b980dd51092f0fe..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/uart/platform/uart-sun50iw11.h +++ /dev/null @@ -1,90 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY'S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS'SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY'S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __UART_SUN50IW11_H__ -#define __UART_SUN50IW11_H__ - -/* config for DSP */ -#if defined(CONFIG_CORE_DSP0) -#include -#include - -#define SUNXI_IRQ_UART0 (RINTC_IRQ_MASK | 10) -/* not used */ -#define SUNXI_IRQ_UART1 (0) -#define SUNXI_IRQ_UART2 (0) -#define SUNXI_IRQ_UART3 (0) -#define SUNXI_IRQ_UART4 (0) -#define SUNXI_IRQ_UART5 (0) - -#define SUNXI_UART0_BASE (0x07080000) -/* not used */ -#define SUNXI_UART1_BASE (0xffffffff) -#define SUNXI_UART2_BASE (0xffffffff) -#define SUNXI_UART3_BASE (0xffffffff) -#define SUNXI_UART4_BASE (0xffffffff) /* no support */ -#define SUNXI_UART5_BASE (0xffffffff) /* no support */ - -#define UART_FIFO_SIZE (64) - -#define UART0_GPIO_FUNCTION (2) -#define UART1_GPIO_FUNCTION (2) -#define UART2_GPIO_FUNCTION (2) -#define UART3_GPIO_FUNCTION (2) -#define UART4_GPIO_FUNCTION (2) /* no support */ -#define UART5_GPIO_FUNCTION (2) /* no support */ - -#define UART0_TX GPIOL(8) -#define UART0_RX GPIOL(9) -/* not used */ -#define UART1_TX GPIOL(8) -#define UART1_RX GPIOL(9) -#define UART2_TX GPIOL(8) -#define UART2_RX GPIOL(9) -#define UART3_TX GPIOL(8) -#define UART3_RX GPIOL(9) -#define UART4_TX GPIOL(8) /* no support */ -#define UART4_RX GPIOL(9) /* no support */ -#define UART5_TX GPIOL(8) /* no support */ -#define UART5_RX GPIOL(9) /* no support */ - -/* for prcm and ccmu compatibility */ -#define HAL_CLK_PERIPH_UART0 CCU_MOD_CLK_R_UART -/* not used */ -#define HAL_CLK_PERIPH_UART1 CCU_MOD_CLK_NONE -#define HAL_CLK_PERIPH_UART2 CCU_MOD_CLK_NONE -#define HAL_CLK_PERIPH_UART3 CCU_MOD_CLK_NONE -#define HAL_CLK_PERIPH_UART4 CCU_MOD_CLK_NONE -#define HAL_CLK_PERIPH_UART5 CCU_MOD_CLK_NONE -#endif /* CONFIG_CORE_DSP0 */ - -#endif /*__UART_SUN50IW11_H__ */ diff --git a/src/platform/f133/hal/uart/platform/uart-sun55iw3.h b/src/platform/f133/hal/uart/platform/uart-sun55iw3.h deleted file mode 100644 index e1054d679c3f12b14ad92cf8ec68628ada0a0ba7..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/uart/platform/uart-sun55iw3.h +++ /dev/null @@ -1,114 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY'S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS'SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY'S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __UART_SUN55IW3_H__ -#define __UART_SUN55IW3_H__ - -/* config for DSP */ -#if defined(CONFIG_ARCH_DSP) || defined(CONFIG_ARCH_RISCV) -#include - -#define R_UART_NUM - -/* For now, just support r_uart */ -#define SUNXI_CLK_UART0 CLK_BUS_R_UART0 -#define SUNXI_RST_UART0 RST_R_UART0 - -#define SUNXI_CLK_UART1 CLK_BUS_R_UART1 -#define SUNXI_RST_UART1 RST_R_UART1 - -/* not support */ -#define SUNXI_CLK_UART2 0 -#define SUNXI_RST_UART2 0 - -#define SUNXI_CLK_UART3 0 -#define SUNXI_RST_UART3 0 - -#define SUNXI_CLK_UART4 0 -#define SUNXI_RST_UART4 0 - -#define SUNXI_CLK_UART5 0 -#define SUNXI_RST_UART5 0 - -#ifdef CONFIG_ARCH_RISCV -#include -#define SUNXI_IRQ_UART0 MAKE_IRQn(66, 0) -#define SUNXI_IRQ_UART1 MAKE_IRQn(67, 0) -/* not support */ -#define SUNXI_IRQ_UART2 (0) -#define SUNXI_IRQ_UART3 (0) -#define SUNXI_IRQ_UART4 (0) -#define SUNXI_IRQ_UART5 (0) -#else -#define SUNXI_IRQ_UART0 (RINTC_IRQ_MASK | 67) -#define SUNXI_IRQ_UART1 (RINTC_IRQ_MASK | 68) -/* not support */ -#define SUNXI_IRQ_UART2 (RINTC_IRQ_MASK | 0) -#define SUNXI_IRQ_UART3 (RINTC_IRQ_MASK | 0) -#define SUNXI_IRQ_UART4 (RINTC_IRQ_MASK | 0) -#define SUNXI_IRQ_UART5 (RINTC_IRQ_MASK | 0) -#endif - -#define SUNXI_UART0_BASE (0x07080000) -#define SUNXI_UART1_BASE (0x07080400) -/* not support */ -#define SUNXI_UART2_BASE (0xffffffff) -#define SUNXI_UART3_BASE (0xffffffff) -#define SUNXI_UART4_BASE (0xffffffff) -#define SUNXI_UART5_BASE (0xffffffff) - -#define UART_FIFO_SIZE (64) - -#define UART0_GPIO_FUNCTION (2) -#define UART1_GPIO_FUNCTION (2) -/* not support */ -#define UART2_GPIO_FUNCTION (2) -#define UART3_GPIO_FUNCTION (2) -#define UART4_GPIO_FUNCTION (2) -#define UART5_GPIO_FUNCTION (2) - -#define UART0_TX GPIOB(10) -#define UART0_RX GPIOB(11) -/* not support */ -#define UART1_TX GPIOB(1) -#define UART1_RX GPIOB(1) -#define UART2_TX GPIOB(1) -#define UART2_RX GPIOB(1) -#define UART3_TX GPIOH(1) -#define UART3_RX GPIOH(1) -#define UART4_TX GPIOD(1) -#define UART4_RX GPIOD(1) -#define UART5_TX GPIOD(1) -#define UART5_RX GPIOD(1) -#endif - -#endif /*__UART_SUN55IW3_H__ */ diff --git a/src/platform/f133/hal/uart/platform/uart-sun8iw18.h b/src/platform/f133/hal/uart/platform/uart-sun8iw18.h deleted file mode 100644 index 04376226abd0c135b9dd91e79cbf68c069f6f204..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/uart/platform/uart-sun8iw18.h +++ /dev/null @@ -1,98 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY¡¯S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS¡¯SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY¡¯S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __UART_SUN8IW18_H__ -#define __UART_SUN8IW18_H__ - -#define SUNXI_CLK_UART0 HAL_CLK_PERIPH_UART0 -#define SUNXI_RST_UART0 0 - -#define SUNXI_CLK_UART1 HAL_CLK_PERIPH_UART1 -#define SUNXI_RST_UART1 0 - -#define SUNXI_CLK_UART2 HAL_CLK_PERIPH_UART2 -#define SUNXI_RST_UART2 0 - -#define SUNXI_CLK_UART3 HAL_CLK_PERIPH_UART3 -#define SUNXI_RST_UART3 0 - -#define SUNXI_CLK_UART4 0 /* no support */ -#define SUNXI_RST_UART4 0 - -#define SUNXI_CLK_UART5 0 /* no support */ -#define SUNXI_RST_UART5 0 - - -#define SUNXI_IRQ_UART0 (108) /* 108 uart0 interrupt */ -#define SUNXI_IRQ_UART1 (109) /* 109 uart1 interrupt */ -#define SUNXI_IRQ_UART2 (110) /* 110 uart2 interrupt */ -#define SUNXI_IRQ_UART3 (111) /* 111 uart3 interrupt */ -#define SUNXI_IRQ_UART4 (0) /* no support */ -#define SUNXI_IRQ_UART5 (0) /* no support */ -/* base register infomation */ -#define SUNXI_UART0_BASE (0x05000000) -#define SUNXI_UART1_BASE (0x05000400) -#define SUNXI_UART2_BASE (0x05000800) -#define SUNXI_UART3_BASE (0x05000c00) -#define SUNXI_UART4_BASE (0xffffffff) /* no support */ -#define SUNXI_UART5_BASE (0xffffffff) /* no support */ - -#define UART_FIFO_SIZE (256) -#define UART0_GPIO_FUNCTION (3) -#define UART1_GPIO_FUNCTION (2) -#define UART2_GPIO_FUNCTION (2) -#define UART3_GPIO_FUNCTION (2) -#define UART4_GPIO_FUNCTION (2) /* no support */ -#define UART5_GPIO_FUNCTION (2) /* no support */ - -#define UART0_TX GPIOH(0) -#define UART0_RX GPIOH(1) - -#define UART1_TX GPIOG(6) -#define UART1_RX GPIOG(7) - -#define UART1_RTX GPIOG(8) -#define UART1_CTX GPIOG(9) - -#define UART2_TX GPIOB(0) -#define UART2_RX GPIOB(1) - -#define UART3_TX GPIOH(4) -#define UART3_RX GPIOH(5) - -#define UART4_TX GPIOH(4) /* no support */ -#define UART4_RX GPIOH(5) /* no support */ - -#define UART5_TX GPIOH(4) /* no support */ -#define UART5_RX GPIOH(5) /* no support */ - -#endif /*__UART_SUN8IW19_H__ */ diff --git a/src/platform/f133/hal/uart/platform/uart-sun8iw19.h b/src/platform/f133/hal/uart/platform/uart-sun8iw19.h deleted file mode 100644 index 3bf1449a6ce2c79fbceafd42fbcf7280f680605d..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/uart/platform/uart-sun8iw19.h +++ /dev/null @@ -1,95 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY¡¯S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS¡¯SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY¡¯S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __UART_SUN8IW19_H__ -#define __UART_SUN8IW19_H__ - -#define SUNXI_CLK_UART0 HAL_CLK_PERIPH_UART0 -#define SUNXI_RST_UART0 0 - -#define SUNXI_CLK_UART1 HAL_CLK_PERIPH_UART1 -#define SUNXI_RST_UART1 0 - -#define SUNXI_CLK_UART2 HAL_CLK_PERIPH_UART2 -#define SUNXI_RST_UART2 0 - -#define SUNXI_CLK_UART3 HAL_CLK_PERIPH_UART3 -#define SUNXI_RST_UART3 0 - -#define SUNXI_CLK_UART4 0 /* no support */ -#define SUNXI_RST_UART4 0 - -#define SUNXI_CLK_UART5 0 /* no support */ -#define SUNXI_RST_UART5 0 - - -#define SUNXI_IRQ_UART0 (81) /* 108 uart0 interrupt */ -#define SUNXI_IRQ_UART1 (82) /* 109 uart1 interrupt */ -#define SUNXI_IRQ_UART2 (83) /* 110 uart2 interrupt */ -#define SUNXI_IRQ_UART3 (84) /* 111 uart3 interrupt */ -#define SUNXI_IRQ_UART4 (0) /* no support */ -#define SUNXI_IRQ_UART5 (0) /* no support */ -/* base register infomation */ -#define SUNXI_UART0_BASE (0x05000000) -#define SUNXI_UART1_BASE (0x05000400) -#define SUNXI_UART2_BASE (0x05000800) -#define SUNXI_UART3_BASE (0x05000c00) -#define SUNXI_UART4_BASE (0xffffffff) /* no support */ -#define SUNXI_UART5_BASE (0xffffffff) /* no support */ - -#define UART_FIFO_SIZE (256) -#define UART0_GPIO_FUNCTION (5) -#define UART1_GPIO_FUNCTION (5) -#define UART2_GPIO_FUNCTION (5) -#define UART3_GPIO_FUNCTION (5) -#define UART4_GPIO_FUNCTION (5) /* no support */ -#define UART5_GPIO_FUNCTION (5) /* no support */ - -#define UART0_TX GPIOH(9) -#define UART0_RX GPIOH(10) - -#define UART1_TX GPIOG(6) -#define UART1_RX GPIOG(7) - -#define UART2_TX GPIOH(5) -#define UART2_RX GPIOH(6) - -#define UART3_TX GPIOH(0) -#define UART3_RX GPIOH(1) - -#define UART4_TX GPIOH(0) /* no support */ -#define UART4_RX GPIOH(1) /* no support */ - -#define UART5_TX GPIOH(0) /* no support */ -#define UART5_RX GPIOH(1) /* no support */ - -#endif /*__UART_SUN8IW19_H__ */ diff --git a/src/platform/f133/hal/uart/platform/uart-sun8iw20.h b/src/platform/f133/hal/uart/platform/uart-sun8iw20.h deleted file mode 100644 index 2addc56f961e5b39baa145e76d9ce2be9fde1754..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/uart/platform/uart-sun8iw20.h +++ /dev/null @@ -1,169 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY'S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS'SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY'S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __UART_SUN8IW20_H__ -#define __UART_SUN8IW20_H__ - -/* config for DSP */ -#if defined(CONFIG_CORE_DSP0) -#include - -#define SUNXI_CLK_UART0 CLK_BUS_UART0 -#define SUNXI_RST_UART0 RST_BUS_UART0 - -#define SUNXI_CLK_UART1 CLK_BUS_UART1 -#define SUNXI_RST_UART1 RST_BUS_UART1 - -#define SUNXI_CLK_UART2 CLK_BUS_UART2 -#define SUNXI_RST_UART2 RST_BUS_UART2 - -#define SUNXI_CLK_UART3 CLK_BUS_UART3 -#define SUNXI_RST_UART3 RST_BUS_UART3 - -/*no support*/ -#define SUNXI_CLK_UART4 0 -#define SUNXI_RST_UART4 0 - -#define SUNXI_CLK_UART5 0 -#define SUNXI_RST_UART5 0 - -#define SUNXI_IRQ_UART0 (RINTC_IRQ_MASK | 1) -#define SUNXI_IRQ_UART1 (RINTC_IRQ_MASK | 2) -#define SUNXI_IRQ_UART2 (RINTC_IRQ_MASK | 3) -#define SUNXI_IRQ_UART3 (RINTC_IRQ_MASK | 4) -/*no support*/ -#define SUNXI_IRQ_UART4 (RINTC_IRQ_MASK | 0) -#define SUNXI_IRQ_UART5 (RINTC_IRQ_MASK | 0) - -#define SUNXI_UART0_BASE (0x02500000) -#define SUNXI_UART1_BASE (0x02500400) -#define SUNXI_UART2_BASE (0x02500800) -#define SUNXI_UART3_BASE (0x02500C00) -#define SUNXI_UART4_BASE (0xffffffff) -#define SUNXI_UART5_BASE (0xffffffff) - -#define UART_FIFO_SIZE (64) - -#define UART0_GPIO_FUNCTION (3) -#define UART1_GPIO_FUNCTION (2) -#define UART2_GPIO_FUNCTION (2) -#define UART3_GPIO_FUNCTION (5) -/*no support*/ -#define UART4_GPIO_FUNCTION (5) -#define UART5_GPIO_FUNCTION (5) - -#define UART0_TX GPIOF(2) -#define UART0_RX GPIOF(4) -#define UART1_TX GPIOB(8) -#define UART1_RX GPIOB(9) -#define UART2_TX GPIOC(0) -#define UART2_RX GPIOC(1) -#define UART3_TX GPIOD(10) -#define UART3_RX GPIOD(11) - -/*no support*/ -#define UART4_TX GPIOD(10) -#define UART4_RX GPIOD(11) -#define UART5_TX GPIOD(10) -#define UART5_RX GPIOD(11) - -#else - -#define SUNXI_CLK_UART0 CLK_BUS_UART0 -#define SUNXI_RST_UART0 RST_BUS_UART0 - -#define SUNXI_CLK_UART1 CLK_BUS_UART1 -#define SUNXI_RST_UART1 RST_BUS_UART1 - -#define SUNXI_CLK_UART2 CLK_BUS_UART2 -#define SUNXI_RST_UART2 RST_BUS_UART2 - -#define SUNXI_CLK_UART3 CLK_BUS_UART3 -#define SUNXI_RST_UART3 RST_BUS_UART3 - -#define SUNXI_CLK_UART4 CLK_BUS_UART4 -#define SUNXI_RST_UART4 RST_BUS_UART4 - -#define SUNXI_CLK_UART5 CLK_BUS_UART5 -#define SUNXI_RST_UART5 RST_BUS_UART5 - -#ifdef CONFIG_SOC_SUN20IW1 -#define SUNXI_IRQ_UART0 (18) -#define SUNXI_IRQ_UART1 (19) -#define SUNXI_IRQ_UART2 (20) -#define SUNXI_IRQ_UART3 (21) -#define SUNXI_IRQ_UART4 (22) -#define SUNXI_IRQ_UART5 (23) -#else -#define SUNXI_IRQ_UART0 (34) -#define SUNXI_IRQ_UART1 (35) -#define SUNXI_IRQ_UART2 (36) -#define SUNXI_IRQ_UART3 (37) -#define SUNXI_IRQ_UART4 (38) -#define SUNXI_IRQ_UART5 (39) -#endif - -#define SUNXI_UART0_BASE (0x02500000) -#define SUNXI_UART1_BASE (0x02500400) -#define SUNXI_UART2_BASE (0x02500800) -#define SUNXI_UART3_BASE (0x02500c00) -#define SUNXI_UART4_BASE (0x02501000) -#define SUNXI_UART5_BASE (0x02501400) - -//TODO:UART1~5 FIFO:256 -#define UART_FIFO_SIZE (64) - -#define UART0_GPIO_FUNCTION (6) -#define UART1_GPIO_FUNCTION (6) -#define UART2_GPIO_FUNCTION (6) -#define UART3_GPIO_FUNCTION (6) -/*no support*/ -#define UART4_GPIO_FUNCTION (6) -#define UART5_GPIO_FUNCTION (6) - -#define UART0_TX GPIOB(8) -#define UART0_RX GPIOB(9) -#define UART1_TX GPIOB(10) -#define UART1_RX GPIOB(11) -#define UART2_TX GPIOL(8) -#define UART2_RX GPIOL(9) -#define UART3_TX GPIOL(8) -#define UART3_RX GPIOL(9) -/*no support*/ -#define UART4_TX GPIOL(8) -#define UART4_RX GPIOL(9) -#define UART5_TX GPIOL(8) -#define UART5_RX GPIOL(9) - -#endif /* CONFIG_CORE_DSP0 */ - -#endif /*__UART_SUN8IW20_H__ */ diff --git a/src/platform/f133/hal/uart/platform/uart-sun8iw21.h b/src/platform/f133/hal/uart/platform/uart-sun8iw21.h deleted file mode 100644 index 0319f98959420c38f41b3cb5a448259d18fda8e9..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/uart/platform/uart-sun8iw21.h +++ /dev/null @@ -1,95 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY¡¯S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS¡¯SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY¡¯S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __UART_SUN8IW21_H__ -#define __UART_SUN8IW21_H__ - -#define SUNXI_CLK_UART0 HAL_CLK_PERIPH_UART0 -#define SUNXI_RST_UART0 0 - -#define SUNXI_CLK_UART1 HAL_CLK_PERIPH_UART1 -#define SUNXI_RST_UART1 0 - -#define SUNXI_CLK_UART2 HAL_CLK_PERIPH_UART2 -#define SUNXI_RST_UART2 0 - -#define SUNXI_CLK_UART3 HAL_CLK_PERIPH_UART3 -#define SUNXI_RST_UART3 0 - -#define SUNXI_CLK_UART4 0 /* no support */ -#define SUNXI_RST_UART4 0 - -#define SUNXI_CLK_UART5 0 /* no support */ -#define SUNXI_RST_UART5 0 - - -#define SUNXI_IRQ_UART0 (18) /* uart0 interrupt */ -#define SUNXI_IRQ_UART1 (19) /* uart1 interrupt */ -#define SUNXI_IRQ_UART2 (20) /* uart2 interrupt */ -#define SUNXI_IRQ_UART3 (21) /* uart3 interrupt */ -#define SUNXI_IRQ_UART4 (0) /* no support */ -#define SUNXI_IRQ_UART5 (0) /* no support */ -/* base register infomation */ -#define SUNXI_UART0_BASE (0x02500000) -#define SUNXI_UART1_BASE (0x02500400) -#define SUNXI_UART2_BASE (0x02500800) -#define SUNXI_UART3_BASE (0x02500c00) -#define SUNXI_UART4_BASE (0xffffffff) /* no support */ -#define SUNXI_UART5_BASE (0xffffffff) /* no support */ - -#define UART_FIFO_SIZE (128) -#define UART0_GPIO_FUNCTION (5) -#define UART1_GPIO_FUNCTION (5) -#define UART2_GPIO_FUNCTION (5) -#define UART3_GPIO_FUNCTION (7) -#define UART4_GPIO_FUNCTION (5) /* no support */ -#define UART5_GPIO_FUNCTION (5) /* no support */ - -#define UART0_TX GPIOB(8) -#define UART0_RX GPIOB(9) - -#define UART1_TX GPIOB(10) -#define UART1_RX GPIOB(11) - -#define UART2_TX GPIOH(5) -#define UART2_RX GPIOH(6) - -#define UART3_TX GPIOE(0) -#define UART3_RX GPIOE(1) - -#define UART4_TX GPIOH(0) /* no support */ -#define UART4_RX GPIOH(1) /* no support */ - -#define UART5_TX GPIOH(0) /* no support */ -#define UART5_RX GPIOH(1) /* no support */ - -#endif /*__UART_SUN8IW21_H__ */ diff --git a/src/platform/f133/hal/uart/uart.h b/src/platform/f133/hal/uart/uart.h deleted file mode 100644 index 6f129dd776f3716612d302ab5ff398eff33c0b14..0000000000000000000000000000000000000000 --- a/src/platform/f133/hal/uart/uart.h +++ /dev/null @@ -1,166 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __UART_I_H__ -#define __UART_I_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * Register definitions for UART - */ -#define UART_RHB (0x00) -#define UART_RBR (0x00) /* receive buffer register */ -#define UART_THR (0x00) /* transmit holding register */ -#define UART_DLL (0x00) /* divisor latch low register */ -#define UART_DLH (0x04) /* diviso latch high register */ -#define UART_IER (0x04) /* interrupt enable register */ -#define UART_IIR (0x08) /* interrupt identity register */ -#define UART_FCR (0x08) /* FIFO control register */ -#define UART_LCR (0x0c) /* line control register */ -#define UART_MCR (0x10) /* modem control register */ -#define UART_LSR (0x14) /* line status register */ -#define UART_MSR (0x18) /* modem status register */ -#define UART_SCH (0x1c) /* scratch register */ -#define UART_USR (0x7c) /* status register */ -#define UART_TFL (0x80) /* transmit FIFO level */ -#define UART_RFL (0x84) /* RFL */ -#define UART_HALT (0xA4) /* halt tx register */ -#define UART_DBG_DLL (0xB0) /* */ -#define UART_DBG_DLH (0xB4) /* */ -#define UART_RS485 (0xC0) /* RS485 control and status register */ -#define RS485_ADDR_MATCH (0xC4) /* */ -#define BUS_IDLE_CHK (0xC8) /* */ -#define TX_DLY (0xCC) /* */ -#define UART_BDCR (0xD4) /* */ -#define UART_BDCLR (0xD8) /* */ -#define UART_BDCHR (0xDC) /* */ - -/* - * register bit field define - */ - -/* Interrupt Enable Register */ -#define UART_IER_MASK (0xff) -#define UART_IER_PTIME (BIT(7)) -#define UART_IER_RS485 (BIT(4)) -#define UART_IER_MSI (BIT(3)) -#define UART_IER_RLSI (BIT(2)) -#define UART_IER_THRI (BIT(1)) -#define UART_IER_RDI (BIT(0)) -/* Interrupt ID Register */ -#define UART_IIR_FEFLAG_MASK (BIT(6)|BIT(7)) -#define UART_IIR_IID_MASK (BIT(0)|BIT(1)|BIT(2)|BIT(3)) -#define UART_IIR_IID_MSTA (0) -#define UART_IIR_IID_NOIRQ (1) -#define UART_IIR_IID_THREMP (2) -#define UART_IIR_IID_RXDVAL (4) -#define UART_IIR_IID_LINESTA (6) -#define UART_IIR_IID_BUSBSY (7) -#define UART_IIR_IID_CHARTO (12) -/* FIFO Control Register */ -#define UART_FCR_RXTRG_MASK (BIT(6)|BIT(7)) -#define UART_FCR_RXTRG_1CH (0 << 6) -#define UART_FCR_RXTRG_1_4 (1 << 6) -#define UART_FCR_RXTRG_1_2 (2 << 6) -#define UART_FCR_RXTRG_FULL (3 << 6) -#define UART_FCR_TXTRG_MASK (BIT(4)|BIT(5)) -#define UART_FCR_TXTRG_EMP (0 << 4) -#define UART_FCR_TXTRG_2CH (1 << 4) -#define UART_FCR_TXTRG_1_4 (2 << 4) -#define UART_FCR_TXTRG_1_2 (3 << 4) -#define UART_FCR_TXFIFO_RST (BIT(2)) -#define UART_FCR_RXFIFO_RST (BIT(1)) -#define UART_FCR_FIFO_EN (BIT(0)) -/* Line Control Register */ -#define UART_LCR_DLAB (BIT(7)) -#define UART_LCR_SBC (BIT(6)) -#define UART_LCR_PARITY_MASK (BIT(5)|BIT(4)) -#define UART_LCR_EPAR (1 << 4) -#define UART_LCR_OPAR (0 << 4) -#define UART_LCR_PARITY (BIT(3)) -#define UART_LCR_STOP (BIT(2)) -#define UART_LCR_DLEN_MASK (BIT(1)|BIT(0)) -#define UART_LCR_WLEN5 (0) -#define UART_LCR_WLEN6 (1) -#define UART_LCR_WLEN7 (2) -#define UART_LCR_WLEN8 (3) -/* Modem Control Register */ -#define UART_MCR_MODE_MASK (BIT(7)|BIT(6)) -#define UART_MCR_MODE_RS485 (2 << 6) -#define UART_MCR_MODE_SIRE (1 << 6) -#define UART_MCR_MODE_UART (0 << 6) -#define UART_MCR_AFE (BIT(5)) -#define UART_MCR_LOOP (BIT(4)) -#define UART_MCR_RTS (BIT(1)) -#define UART_MCR_DTR (BIT(0)) -/* Line Status Rigster */ -#define UART_LSR_RXFIFOE (BIT(7)) -#define UART_LSR_TEMT (BIT(6)) -#define UART_LSR_THRE (BIT(5)) -#define UART_LSR_BI (BIT(4)) -#define UART_LSR_FE (BIT(3)) -#define UART_LSR_PE (BIT(2)) -#define UART_LSR_OE (BIT(1)) -#define UART_LSR_DR (BIT(0)) -#define UART_LSR_BRK_ERROR_BITS (0x1E) /* BI, FE, PE, OE bits */ -/* Modem Status Register */ -#define UART_MSR_DCD (BIT(7)) -#define UART_MSR_RI (BIT(6)) -#define UART_MSR_DSR (BIT(5)) -#define UART_MSR_CTS (BIT(4)) -#define UART_MSR_DDCD (BIT(3)) -#define UART_MSR_TERI (BIT(2)) -#define UART_MSR_DDSR (BIT(1)) -#define UART_MSR_DCTS (BIT(0)) -#define UART_MSR_ANY_DELTA (0x0F) -#define MSR_SAVE_FLAGS (UART_MSR_ANY_DELTA) -/* Status Register */ -#define UART_USR_RFF (BIT(4)) -#define UART_USR_RFNE (BIT(3)) -#define UART_USR_TFE (BIT(2)) -#define UART_USR_TFNF (BIT(1)) -#define UART_USR_BUSY (BIT(0)) -/* Halt Register */ -#define UART_HALT_LCRUP (BIT(2)) -#define UART_HALT_FORCECFG (BIT(1)) -#define UART_HALT_HTX (BIT(0)) -/* RS485 Control and Status Register */ -#define UART_RS485_RXBFA (BIT(3)) -#define UART_RS485_RXAFA (BIT(2)) - -#ifdef __cplusplus -} -#endif -#endif /* __UART_I_H__ */ diff --git a/src/platform/f133/include/drivers/direct_uart.h b/src/platform/f133/include/drivers/direct_uart.h index 1289139180dcd043234eeb0d71a2eee2540aa0cd..e966a1d33192bcb7f8b6d5a51f884a393df1854e 100644 --- a/src/platform/f133/include/drivers/direct_uart.h +++ b/src/platform/f133/include/drivers/direct_uart.h @@ -12,7 +12,7 @@ #ifndef __DIRECT_UART_HEADER__ #define __DIRECT_UART_HEADER__ -#include +#include #define UART0_PHY_ADDR 0x02500000UL @@ -20,6 +20,76 @@ #define UART0_LSR (UART0_PHY_ADDR + 0x14) /* line status register */ #define UART0_LSR_DR 0x01 /* LSR data ready */ + +#define PLIC_UART0_NUM (18) +#define PLIC_UART1_NUM (19) +#define PLIC_UART2_NUM (20) +#define PLIC_UART3_NUM (21) +#define PLIC_UART4_NUM (22) +#define PLIC_UART5_NUM (23) +//D1 debug uart use GPIOB8(TX0) and GPIOB9(RX0) +#define UART_BASE (0X02500000) +#define UART1_BASE (0X02500400) +#define UART2_BASE (0X02500800) +#define UART3_BASE (0X02500C00) +#define UART4_BASE (0X02501000) +#define UART5_BASE (0X02501400) + +#define UART_RBR (0x0000) +#define UART_THR (0x0000) +#define UART_DLL (0x0000) +#define UART_DLH (0x0004) +#define UART_IER (0x0004) +#define UART_IIR (0x0008) +#define UART_FCR (0x0008) +#define UART_LCR (0x000C) +#define UART_MCR (0x0010) +#define UART_LSR (0x0014) +#define UART_MSR (0x0018) +#define UART_SCH (0x001C) +#define UART_USR (0x007C) +#define UART_TFL (0x0080) +#define UART_RFL (0x0084) +#define UART_HSK (0x0088) +#define UART_DMA_REQ_EN (0x008C) +#define UART_HALT (0x00A4) +#define UART_DBG_DLL (0x00B0) +#define UART_DBG_DLH (0x00B4) +#define UART_A_FCC (0x00F0) +#define UART_A_RXDMA_CTRL (0x0100) +#define UART_A_RXDMA_STR (0x0104) +#define UART_A_RXDMA_STA (0x0108) +#define UART_A_RXDMA_LMT (0x010C) +#define UART_A_RXDMA_SADDRL (0x0110) +#define UART_A_RXDMA_SADDRH (0x0114) +#define UART_A_RXDMA_BL (0x0118) +#define UART_A_RXDMA_IE (0x0120) +#define UART_A_RXDMA_IS (0x0124) +#define UART_A_RXDMA_WADDRL (0x0128) +#define UART_A_RXDMA_WADDRH (0x012C) +#define UART_A_RXDMA_RADDRL (0x0130) +#define UART_A_RXDMA_RADDRH (0x0134) +#define UART_A_RXDMA_DCNT (0x0138) + +#define UART_LSR_FIFOE 0x80 /* Fifo error */ +#define UART_LSR_TEMT 0x40 /* Transmitter empty */ +#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */ +#define UART_LSR_BI 0x10 /* Break interrupt indicator */ +#define UART_LSR_FE 0x08 /* Frame error indicator */ +#define UART_LSR_PE 0x04 /* Parity error indicator */ +#define UART_LSR_OE 0x02 /* Overrun error indicator */ +#define UART_LSR_DR 0x01 /* Receiver data ready */ +#define UART_LSR_BRK_ERROR_BITS 0x1E /* BI, FE, PE, OE bits */ + + +#define UART0_MODE_TX (6) +#define UART0_MODE_RX (6) + +#define UART0_IRQ 18 + +#define D1_CCU_BASE (0x02001000) // D1 CCU +#define CCU_UART_BGR_REG (0x90C) + /* direct means not use driver framework */ void NX_HalDirectUartInit(void); diff --git a/src/platform/f133/include/drivers/font_8x16.h b/src/platform/f133/include/drivers/font_8x16.h new file mode 100644 index 0000000000000000000000000000000000000000..f7c26f1e6a40ff8be908fe0780f5c81d5d375406 --- /dev/null +++ b/src/platform/f133/include/drivers/font_8x16.h @@ -0,0 +1,13 @@ +/**********************************************/ +/* */ +/* Font file generated by cpi2fnt */ +/* */ +/**********************************************/ + +#ifndef _LFONT_8X16_H +#define _LFONT_8X16_H + +const unsigned char image[]; +const unsigned char fontdata_8x16[4096]; + +#endif \ No newline at end of file diff --git a/src/platform/f133/include/drivers/framebuffer.h b/src/platform/f133/include/drivers/framebuffer.h new file mode 100644 index 0000000000000000000000000000000000000000..27ded8abab645223fa4aa736afc8788ebb0a55c4 --- /dev/null +++ b/src/platform/f133/include/drivers/framebuffer.h @@ -0,0 +1,16 @@ +/** + * Copyright (c) 2018-2022, NXOS Development Team + * SPDX-License-Identifier: Apache-2.0 + * + * Contains: framebuffer driver + * + * Change Logs: + * Date Author Notes + * 2023-2-4 planck Init + */ + +#ifndef __FRAMEBUFFER_H__ +#define __FRAMEBUFFER_H__ + + +#endif \ No newline at end of file diff --git a/src/platform/f133/include/drivers/gpio.h b/src/platform/f133/include/drivers/gpio.h new file mode 100644 index 0000000000000000000000000000000000000000..fb0f3e75ea4a3e5a93a5cb500e38c2b2939ab16e --- /dev/null +++ b/src/platform/f133/include/drivers/gpio.h @@ -0,0 +1,171 @@ +#ifndef __GPIO_H__ +#define __GPIO_H__ + +#include + +#define D1_GPIO_BASE (0x02000000) + +//PB 13 (0~12) +#define D1_GPIO_PB_CFG0 (0x0030) +#define D1_GPIO_PB_CFG1 (0x0034) +#define D1_GPIO_PB_DAT (0x0040) +#define D1_GPIO_PB_DRV0 (0x0044) +#define D1_GPIO_PB_DRV1 (0x0048) +#define D1_GPIO_PB_PULL0 (0x0054) + +//PC 8 (0~7) +#define D1_GPIO_PC_CFG0 (0x0060) +#define D1_GPIO_PC_DAT (0x0070) +#define D1_GPIO_PC_DRV0 (0x0074) +#define D1_GPIO_PC_PULL0 (0x0084) + +//PD 23 (0~22) +#define D1_GPIO_PD_CFG0 (0x0090) +#define D1_GPIO_PD_CFG1 (0x0094) +#define D1_GPIO_PD_CFG2 (0x0098) +#define D1_GPIO_PD_DAT (0x00A0) +#define D1_GPIO_PD_DRV0 (0x00A4) +#define D1_GPIO_PD_DRV1 (0x00A8) +#define D1_GPIO_PD_DRV2 (0x00AC) +#define D1_GPIO_PD_PULL0 (0x00B4) +#define D1_GPIO_PD_PULL1 (0x00B8) + +//PE 18 (0~17) +#define D1_GPIO_PE_CFG0 (0x00C0) +#define D1_GPIO_PE_CFG1 (0x00C4) +#define D1_GPIO_PE_DAT (0x00D0) +#define D1_GPIO_PE_DRV0 (0x00D4) +#define D1_GPIO_PE_DRV1 (0x00D8) +#define D1_GPIO_PE_PULL0 (0x00E4) + +//PF 7 (0~7) +#define D1_GPIO_PF_CFG0 (0x00F0) +#define D1_GPIO_PF_DAT (0x0100) +#define D1_GPIO_PF_DRV0 (0x0104) +#define D1_GPIO_PF_PULL0 (0x0114) + +//PG 19 (0~18) +#define D1_GPIO_PG_CFG0 (0x0120) +#define D1_GPIO_PG_CFG1 (0x0124) +#define D1_GPIO_PG_DAT (0x0130) +#define D1_GPIO_PG_DRV0 (0x0134) +#define D1_GPIO_PG_DRV1 (0x0138) +#define D1_GPIO_PG_DRV3 (0x0140) +#define D1_GPIO_PG_PULL0 (0x0124) + +//EINT +//PB +#define D1_GPIO_PB_EINT_CFG0 (0x0220) +#define D1_GPIO_PB_EINT_CTL (0x0230) +#define D1_GPIO_PB_EINT_STATUS (0x0234) +#define D1_GPIO_PB_EINT_DEB (0x0238) + +//PC +#define D1_GPIO_PC_EINT_CFG0 (0x0240) +#define D1_GPIO_PC_EINT_CTL (0x0250) +#define D1_GPIO_PC_EINT_STATUS (0x0254) +#define D1_GPIO_PC_EINT_DEB (0x0258) + +//PD +#define D1_GPIO_PD_EINT_CFG0 (0x0260) +#define D1_GPIO_PD_EINT_CFG1 (0x0264) +#define D1_GPIO_PD_EINT_CFG2 (0x0268) +#define D1_GPIO_PD_EINT_CTL (0x0270) +#define D1_GPIO_PD_EINT_STATUS (0x0274) +#define D1_GPIO_PD_EINT_DEB (0x0278) + +//PE +#define D1_GPIO_PE_EINT_CFG0 (0x0280) +#define D1_GPIO_PE_EINT_CFG1 (0x0284) +#define D1_GPIO_PE_EINT_CTL (0x0290) +#define D1_GPIO_PE_EINT_STATUS (0x0294) +#define D1_GPIO_PE_EINT_DEB (0x0298) + +//PF +#define D1_GPIO_PF_EINT_CFG0 (0x02A0) +#define D1_GPIO_PF_EINT_CTL (0x02B0) +#define D1_GPIO_PF_EINT_STATUS (0x02B4) +#define D1_GPIO_PF_EINT_DEB (0x02B8) + +//PG +#define D1_GPIO_PG_EINT_CFG0 (0x02C0) +#define D1_GPIO_PG_EINT_CFG1 (0x02C4) +#define D1_GPIO_PG_EINT_CTL (0x02D0) +#define D1_GPIO_PG_EINT_STATUS (0x02D4) +#define D1_GPIO_PG_EINT_DEB (0x02D8) + +#define PIO_POW_MOD_SEL (0x0340) +#define PIO_POW_MS_CTL (0x0344) +#define PIO_POW_VAL (0x0348) +#define PIO_POW_VOL_SET_CTL (0x0350) + +#define GPIO_PORT_B (D1_GPIO_BASE + D1_GPIO_PB_CFG0) +#define GPIO_PORT_C (D1_GPIO_BASE + D1_GPIO_PC_CFG0) +#define GPIO_PORT_D (D1_GPIO_BASE + D1_GPIO_PD_CFG0) +#define GPIO_PORT_E (D1_GPIO_BASE + D1_GPIO_PE_CFG0) +#define GPIO_PORT_F (D1_GPIO_BASE + D1_GPIO_PF_CFG0) +#define GPIO_PORT_G (D1_GPIO_BASE + D1_GPIO_PG_CFG0) + +#define GPIO_PIN_0 (0) +#define GPIO_PIN_1 (1) +#define GPIO_PIN_2 (2) +#define GPIO_PIN_3 (3) +#define GPIO_PIN_4 (4) +#define GPIO_PIN_5 (5) +#define GPIO_PIN_6 (6) +#define GPIO_PIN_7 (7) +#define GPIO_PIN_8 (8) +#define GPIO_PIN_9 (9) +#define GPIO_PIN_10 (10) +#define GPIO_PIN_11 (11) +#define GPIO_PIN_12 (12) +#define GPIO_PIN_13 (13) +#define GPIO_PIN_14 (14) +#define GPIO_PIN_15 (15) +#define GPIO_PIN_16 (16) +#define GPIO_PIN_17 (17) +#define GPIO_PIN_18 (18) +#define GPIO_PIN_19 (19) +#define GPIO_PIN_20 (20) +#define GPIO_PIN_21 (21) +#define GPIO_PIN_22 (22) +#define GPIO_PIN_23 (23) +#define GPIO_PIN_24 (24) +#define GPIO_PIN_25 (25) + +#define GPIO_B_EXT_INTERRUPT_CONFIG (D1_GPIO_BASE + D1_GPIO_PB_EINT_CFG0) +#define GPIO_B_EXT_INTERRUPT_CONFIG1 (D1_GPIO_BASE + D1_GPIO_PB_EINT_CFG0 + 0x04) +#define GPIO_B_EXT_INTERRUPT_CTRL (D1_GPIO_BASE + D1_GPIO_PB_EINT_CTL) +#define GPIO_B_EXT_INTERRUPT_STATUS (D1_GPIO_BASE + D1_GPIO_PB_EINT_STATUS) +#define GPIO_B_EXT_INTERRUPT_DEB (D1_GPIO_BASE + D1_GPIO_PC_EINT_DEB) + +#define POSITIVE_EDGE (0x00) +#define NEGATIVE_EDGE (0x01) +#define HIGH_LEVEL (0x02) +#define LOW_LEVEL (0x03) +#define DOUBLE_LEVEL (0x04) + + +#define GPIO_INPUT (0x00) +#define GPIO_OUTPUT (0x01) + +typedef enum { + INPUT = 0b0000, + OUTPUT = 0b0001, +} GPIO_FUNC; + + +#define NX_PIN_CMD_GETPIN 1 +#define NX_PIN_CMD_WRITE 2 +#define NX_PIN_CMD_READ 3 + +void d1_set_gpio_mode(NX_U32 gpio_port, NX_U32 gpio_pin, NX_U16 mode); +void d1_set_gpio_val(NX_U32 gpio_port, NX_U32 gpio_pin, NX_U32 val); +NX_U8 d1_get_gpio_val(NX_U32 gpio_port, NX_U32 gpio_pin); +void d1_set_gpio_pull(NX_U32 gpio_port, NX_U32 gpio_pin, NX_U16 pull); +NX_IArch d1s_pin_get(const char *name); +void d1_set_gpio_irq_enable(NX_U32 gpio_port, NX_U32 gpio_pin, NX_U32 cfg, NX_U8 enable); +void d1s_pin_mode(NX_UArch pin, NX_UArch mode); +void d1s_pin_write(NX_UArch pin, NX_UArch value); +int d1s_pin_read(NX_UArch pin); +#endif diff --git a/src/platform/f133/include/drivers/iic.h b/src/platform/f133/include/drivers/iic.h new file mode 100644 index 0000000000000000000000000000000000000000..dd10f52ff010c8e0da5e8e0c3132f147ad106e34 --- /dev/null +++ b/src/platform/f133/include/drivers/iic.h @@ -0,0 +1,52 @@ +#ifndef __IIC_H__ +#define __IIC_H__ + +#include + +#define TWI0_ADDR_BASE (0x02502000) +#define TWI1_ADDR_BASE (0x02502400) +#define TWI2_ADDR_BASE (0x02502800) +#define TWI3_ADDR_BASE (0x02502C00) + +#define TWI_ADDR_OFFSET (0x0000) +#define TWI_XADDR_OFFSET (0x0004) +#define TWI_DATA_OFFSET (0x0008) +#define TWI_CNTR_OFFSET (0x000c) +#define TWI_STAT_OFFSET (0x0010) +#define TWI_CCR_OFFSET (0x0014) +#define TWI_SRST_OFFSET (0x0018) +#define TWI_EFR_OFFSET (0x001c) +#define TWI_LCR_OFFSET (0x0020) + +#define TWI_DRV_CTRL_OFFSET (0x0200) +#define TWI_DRV_CFG_OFFSET (0x0204) +#define TWI_DRV_SLV_OFFSET (0x0208) +#define TWI_DRV_FMT_OFFSET (0x020C) +#define TWI_DRV_BUS_CTRL (0x0210) +#define TWI_DRV_INT_CTRL (0x0214) +#define TWI_DRV_DMA_CFG (0x0218) +#define TWI_DRV_FIFO_CON (0x021C) +#define TWI_DRV_SEND_FIFO_ACC (0x0300) +#define TWI_DRV_RECV_FIFO_ACC (0x0304) + +#define I2C_WR 0x0000 +#define I2C_RD (1u << 0) +#define I2C_ADDR_10BIT (1u << 2) /* this is a ten bit chip address */ +#define I2C_NO_START (1u << 4) +#define I2C_IGNORE_NACK (1u << 5) +#define I2C_NO_READ_ACK (1u << 6) /* when I2C reading, we do not ACK */ +#define I2C_NO_STOP (1u << 7) + + +struct i2c_msg +{ + NX_U16 addr; + NX_U16 flags; + NX_U16 len; + NX_U8 *buf; +}; + +NX_IArch f133_i2c_mst_xfer(struct i2c_msg msgs[], NX_U32 num); +void NX_IicDriverInit(void); + +#endif \ No newline at end of file diff --git a/src/platform/f133/include/drivers/lcd.h b/src/platform/f133/include/drivers/lcd.h new file mode 100644 index 0000000000000000000000000000000000000000..2903d60bcf6ac925fd0b7f829718bca1abd03700 --- /dev/null +++ b/src/platform/f133/include/drivers/lcd.h @@ -0,0 +1,195 @@ +/** + * Copyright (c) 2018-2022, NXOS Development Team + * SPDX-License-Identifier: Apache-2.0 + * + * Contains: LCD driver + * + * Change Logs: + * Date Author Notes + * 2023-2-4 planck Init + */ + +#ifndef __LCD_H__ +#define __LCD_H__ + +#include + + + +#define LCD_DE_BASE_ADDR (0x0000000005000000L) +#define LCD_TCON_BASE_ADDR (0x0000000005461000L) + +#define LCD_WIDTH (800) +#define LCD_HEIGHT (480) + +#define LCD_PHYSICAL_WIDTH (216) +#define LCD_PHYSICAL_HEIGHT (135) + +#define LCD_BITS_PER_PIXEL (18) +#define LCD_BYTES_PER_PIXEL (4) + +#define PIXEL_CLOCK_HZ (33000000) +#define H_FRONT_PORCH (40) +#define H_BACK_PORCH (87) +#define V_FRONT_PORCH (13) +#define V_BACK_PORCH (31) +#define V_SYNC_LEN (1) +#define H_SYNC_LEN (1) +#define H_SYNC_ACTIVE (0) +#define V_SYNC_ACTIVE (0) +#define DEN_ACTIVE (1) +#define CLK_ACTIVE (1) + +struct f133_tconlcd_reg_t { + NX_U32 gctrl; /* 0x00 */ + NX_U32 gint0; /* 0x04 */ + NX_U32 gint1; /* 0x08 */ + NX_U32 res_0c; + NX_U32 frm_ctrl; /* 0x10 */ + NX_U32 frm_seed[6]; /* 0x14 */ + NX_U32 frm_table[4]; /* 0x2c */ + NX_U32 fifo_3d; /* 0x3c */ + NX_U32 ctrl; /* 0x40 */ + NX_U32 dclk; /* 0x44 */ + NX_U32 timing0; /* 0x48 */ + NX_U32 timing1; /* 0x4c */ + NX_U32 timing2; /* 0x50 */ + NX_U32 timing3; /* 0x54 */ + NX_U32 hv_intf; /* 0x58 */ + NX_U32 res_5c; + NX_U32 cpu_intf; /* 0x60 */ + NX_U32 cpu_wr; /* 0x64 */ + NX_U32 cpu_rd0; /* 0x68 */ + NX_U32 cpu_rd1; /* 0x6c */ + NX_U32 res_70_80[5]; /* 0x70 */ + NX_U32 lvds_intf; /* 0x84 */ + NX_U32 io_polarity; /* 0x88 */ + NX_U32 io_tristate; /* 0x8c */ + NX_U32 res_90_f8[27]; + NX_U32 debug; /* 0xfc */ + NX_U32 ceu_ctl; /* 0x100 */ + NX_U32 res_104_10c[3]; + NX_U32 ceu_coef[20]; /* 0x110 */ + NX_U32 cpu_tri0; /* 0x160 */ + NX_U32 cpu_tri1; /* 0x164 */ + NX_U32 cpu_tri2; /* 0x168 */ + NX_U32 cpu_tri3; /* 0x16c */ + NX_U32 cpu_tri4; /* 0x170 */ + NX_U32 cpu_tri5; /* 0x174 */ + NX_U32 res_178_17c[2]; + NX_U32 cmap_ctl; /* 0x180 */ + NX_U32 res_184_18c[3]; + NX_U32 cmap_odd0; /* 0x190 */ + NX_U32 cmap_odd1; /* 0x194 */ + NX_U32 cmap_even0; /* 0x198 */ + NX_U32 cmap_even1; /* 0x19c */ + NX_U32 res_1a0_1ec[20]; + NX_U32 safe_period; /* 0x1f0 */ + NX_U32 res_1f4_21c[11]; + NX_U32 lvds_ana0; /* 0x220 */ + NX_U32 lvds_ana1; /* 0x224 */ + NX_U32 res_228_22c[2]; + NX_U32 sync_ctl; /* 0x230 */ + NX_U32 sync_pos; /* 0x234 */ + NX_U32 slave_stop_pos; /* 0x238 */ + NX_U32 res_23c_3fc[113]; + NX_U32 gamma_table[256]; /* 0x400 */ +}; + + +#define F133_DE_MUX_GLB (0x00100000 + 0x00000) +#define F133_DE_MUX_BLD (0x00100000 + 0x01000) +#define F133_DE_MUX_CHAN (0x00100000 + 0x02000) +#define F133_DE_MUX_VSU (0x00100000 + 0x20000) +#define F133_DE_MUX_GSU1 (0x00100000 + 0x30000) +#define F133_DE_MUX_GSU2 (0x00100000 + 0x40000) +#define F133_DE_MUX_GSU3 (0x00100000 + 0x50000) +#define F133_DE_MUX_FCE (0x00100000 + 0xa0000) +#define F133_DE_MUX_BWS (0x00100000 + 0xa2000) +#define F133_DE_MUX_LTI (0x00100000 + 0xa4000) +#define F133_DE_MUX_PEAK (0x00100000 + 0xa6000) +#define F133_DE_MUX_ASE (0x00100000 + 0xa8000) +#define F133_DE_MUX_FCC (0x00100000 + 0xaa000) +#define F133_DE_MUX_DCSC (0x00100000 + 0xb0000) + +struct de_clk_t { + NX_U32 gate_cfg; + NX_U32 bus_cfg; + NX_U32 rst_cfg; + NX_U32 div_cfg; + NX_U32 sel_cfg; +}; + +struct de_glb_t { + NX_U32 ctl; + NX_U32 status; + NX_U32 dbuff; + NX_U32 size; +}; + +struct de_bld_t { + NX_U32 fcolor_ctl; + struct { + NX_U32 fcolor; + NX_U32 insize; + NX_U32 offset; + NX_U32 dum; + } attr[4]; + NX_U32 dum0[15]; + NX_U32 route; + NX_U32 premultiply; + NX_U32 bkcolor; + NX_U32 output_size; + NX_U32 bld_mode[4]; + NX_U32 dum1[4]; + NX_U32 ck_ctl; + NX_U32 ck_cfg; + NX_U32 dum2[2]; + NX_U32 ck_max[4]; + NX_U32 dum3[4]; + NX_U32 ck_min[4]; + NX_U32 dum4[3]; + NX_U32 out_ctl; +}; + +struct de_vi_t { + struct { + NX_U32 attr; + NX_U32 size; + NX_U32 coord; + NX_U32 pitch[3]; + NX_U32 top_laddr[3]; + NX_U32 bot_laddr[3]; + } cfg[4]; + NX_U32 fcolor[4]; + NX_U32 top_haddr[3]; + NX_U32 bot_haddr[3]; + NX_U32 ovl_size[2]; + NX_U32 hori[2]; + NX_U32 vert[2]; +}; + +struct de_ui_t { + struct { + NX_U32 attr; + NX_U32 size; + NX_U32 coord; + NX_U32 pitch; + NX_U32 top_laddr; + NX_U32 bot_laddr; + NX_U32 fcolor; + NX_U32 dum; + } cfg[4]; + NX_U32 top_haddr; + NX_U32 bot_haddr; + NX_U32 ovl_size; +}; + + +#define F133_DE (0x0200160cL) +#define F133_TCON (0x02001b7cL) +#define test_add3 (0x02001600L) +void lcd_gpio_config(); +void lcd_show(); +int lcd_show_logo(); +#endif \ No newline at end of file diff --git a/src/platform/f133/include/drivers/pin.h b/src/platform/f133/include/drivers/pin.h new file mode 100644 index 0000000000000000000000000000000000000000..e7eccea6f58c185f2976b9ed934ec5a23d680c4f --- /dev/null +++ b/src/platform/f133/include/drivers/pin.h @@ -0,0 +1,22 @@ +/** + * Copyright (c) 2018-2022, NXOS Development Team + * SPDX-License-Identifier: Apache-2.0 + * + * Contains: Buddy system + * + * Change Logs: + * Date Author Notes + * 2023-2-4 planck Init + */ +#ifndef PIN_H__ +#define PIN_H__ + + +#define PIN_MODE_OUTPUT 0x00 +#define PIN_MODE_INPUT 0x01 +#define PIN_MODE_INPUT_PULLUP 0x02 +#define PIN_MODE_INPUT_PULLDOWN 0x03 +#define PIN_MODE_OUTPUT_OD 0x04 + + +#endif diff --git a/src/platform/f133/include/drivers/touch.h b/src/platform/f133/include/drivers/touch.h new file mode 100644 index 0000000000000000000000000000000000000000..8b021b3bd5e7e3663f6fc1caf36a9f7cbd1ea710 --- /dev/null +++ b/src/platform/f133/include/drivers/touch.h @@ -0,0 +1,49 @@ +#ifndef __TOUCH_H__ +#define __TOUCH_H__ + +#include +#include + +#define GT911_ADDR_LEN 2 +#define GT911_REGITER_LEN 2 +#define GT911_MAX_TOUCH 5 +#define GT911_POINT_INFO_NUM 5 + +#define GT911_ADDRESS_HIGH 0x5D +#define GT911_ADDRESS_LOW 0x14 + +#define GT911_COMMAND_REG 0x8040 +#define GT911_CONFIG_REG 0x8047 + +#define GT911_PRODUCT_ID 0x8140 +#define GT911_VENDOR_ID 0x814A +#define GT911_READ_STATUS 0x814E + +#define GT911_POINT1_REG 0x814F +#define GT911_POINT2_REG 0x8157 +#define GT911_POINT3_REG 0x815F +#define GT911_POINT4_REG 0x8167 +#define GT911_POINT5_REG 0x816F + +#define GT911_CHECK_SUM 0x80FF + +struct touch_data +{ + NX_U8 event; /* The touch event of the data */ + NX_U8 track_id; /* Track id of point */ + NX_U8 width; /* Point of width */ + NX_U16 x_coordinate; /* Point of x coordinate */ + NX_U16 y_coordinate; /* Point of y coordinate */ + NX_ClockTick timestamp; /* The timestamp when the data was received */ +}; + +/* Touch event */ +#define TOUCH_EVENT_NONE (0) /* Touch none */ +#define TOUCH_EVENT_UP (1) /* Touch up event */ +#define TOUCH_EVENT_DOWN (2) /* Touch down event */ +#define TOUCH_EVENT_MOVE (3) /* Touch move event */ + + +void NX_TouchDriverInit(void); + +#endif diff --git a/src/platform/f133/include/hal/aw-alsa-lib/common.h b/src/platform/f133/include/hal/aw-alsa-lib/common.h deleted file mode 100644 index fd71cdae9c88846d0aa9209fbff5fb4a389710bd..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/common.h +++ /dev/null @@ -1,89 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#ifndef __AW_ALSA_COMMON_H -#define __AW_ALSA_COMMON_H -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include - -/* Other */ -static inline int snd_card_index(const char *name) -{ - return ksnd_card_index(name); -} - -static inline const char *snd_card_name(int index) -{ - return ksnd_card_name(index); -} - -static inline int snd_card_num(void) -{ - return ksnd_card_num(); -} - -static inline int snd_card_info(int card_num) -{ - return ksnd_card_info(card_num); -} - -static inline int snd_card_pcm_info(int card_num, int device_num, int stream) -{ - return ksnd_pcm_stream_info(card_num, device_num, stream); -} - -static inline void asound_list(void) -{ - int i, ret = 0; - - ret = snd_card_num(); - if (ret < 0) { - printf("no registered card...\n"); - return; - } - printf("============= Sound Card list =============\n"); - printf("%8s%20s\n", "card_num", "card_name"); - for (i = 0; i < ret; i++) { - if (i != snd_card_index(snd_card_name(i))) { - printf("card_num%d not equal index convert" - "from name:%s\n", i, snd_card_name(i)); - return; - } - printf("%8d%20s\n", i, snd_card_name(i)); - } - printf("\n"); -} - -#endif diff --git a/src/platform/f133/include/hal/aw-alsa-lib/control.h b/src/platform/f133/include/hal/aw-alsa-lib/control.h deleted file mode 100644 index b5cfc57df9378f5685ac0977fbebe85cc26ed289..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/control.h +++ /dev/null @@ -1,73 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#ifndef __AW_ALSA_CONTROL_H -#define __AW_ALSA_CONTROL_H -#ifdef __cplusplus -extern "C" { -#endif - -#include - -typedef int snd_ctl_elem_type_t; -#define SND_CTL_ELEM_TYPE_INTEGER ((snd_ctl_elem_type_t)0) -#define SND_CTL_ELEM_TYPE_ENUMERATED ((snd_ctl_elem_type_t)1) -#define SND_CTL_ELEM_TYPE_LAST SND_CTL_ELEM_TYPE_ENUMERATED - -/* can't modify this struct */ -typedef struct { - unsigned int id; - snd_ctl_elem_type_t type; - const unsigned char *name; - unsigned long value; - int min,max; - int count; - /* for enum */ - unsigned int items; - const char * const *texts; - - const unsigned long *private_data; -} snd_ctl_info_t; - -int snd_ctl_num(const char *name); -int snd_ctl_get(const char *name, const char *elem, snd_ctl_info_t *info); -int snd_ctl_get_bynum(const char *name, const unsigned int elem_num, snd_ctl_info_t *info); -int snd_ctl_set(const char *name, const char *elem, unsigned int val); -int snd_ctl_set_bynum(const char *name, const unsigned int elem_num, unsigned int val); -int snd_ctl_add(const char *name, snd_ctl_info_t *info); -int snd_ctl_remove(const char *name, const unsigned int elem_num); -#define snd_ctl_set_multi_args ksnd_ctl_set_multi_args - -#ifdef __cplusplus -} -#endif - -#endif /* __AW_ALSA_CONTROL_H */ diff --git a/src/platform/f133/include/hal/aw-alsa-lib/pcm.h b/src/platform/f133/include/hal/aw-alsa-lib/pcm.h deleted file mode 100644 index 6d5c36044649956a4c84428ace13f710744c8178..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/pcm.h +++ /dev/null @@ -1,386 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#ifndef __AW_ALSA_PCM_H -#define __AW_ALSA_PCM_H -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include -#include -#include -#include -#include -#include - -#ifndef snd_malloc -#define snd_malloc(size) calloc(size, 1) -#endif - -#ifndef snd_free -#define snd_free(ptr) free(ptr) -#endif - - -/* debug option */ -#define AW_ALSA_LOG_COLOR_NONE "\e[0m" -#define AW_ALSA_LOG_COLOR_RED "\e[31m" -#define AW_ALSA_LOG_COLOR_GREEN "\e[32m" -#define AW_ALSA_LOG_COLOR_YELLOW "\e[33m" -#define AW_ALSA_LOG_COLOR_BLUE "\e[34m" - -//#define AW_ALSA_DEBUG -#ifdef AW_ALSA_DEBUG -#define awalsa_debug(fmt, args...) \ - printf(AW_ALSA_LOG_COLOR_GREEN "[AWALSA_DEBUG][%s:%u]" fmt \ - AW_ALSA_LOG_COLOR_NONE, __FUNCTION__, __LINE__, ##args) -#else -#define awalsa_debug(fmt, args...) -#endif - -//#define AW_ALSA_PRINT -#ifdef AW_ALSA_PRINT -#define awalsa_print(fmt, args...) \ - printf("[AWALSA_PRINT][%s:%u]" fmt, \ - __FUNCTION__, __LINE__, ##args) -#else -#define awalsa_print(fmt, args...) -#endif - -#define awalsa_info(fmt, args...) \ - printf(AW_ALSA_LOG_COLOR_BLUE "[AWALSA_INFO][%s:%u]" fmt \ - AW_ALSA_LOG_COLOR_NONE, __FUNCTION__, __LINE__, ##args) - -#define awalsa_err(fmt, args...) \ - printf(AW_ALSA_LOG_COLOR_RED "[AWALSA_ERR][%s:%u]" fmt \ - AW_ALSA_LOG_COLOR_NONE, __FUNCTION__, __LINE__, ##args) -/* end debug option */ - -/** Non blocking mode (flag for open mode) \hideinitializer */ -//#define SND_PCM_NONBLOCK 0x00000001 -/** Async notification (flag for open mode) \hideinitializer */ -//#define SND_PCM_ASYNC 0x00000002 -/** In an abort state (internal, not allowed for open) */ -//#define SND_PCM_ABORT 0x00008000 -/** Disable automatic (but not forced!) rate resamplinig */ -#define SND_PCM_NO_AUTO_RESAMPLE 0x00010000 -/** Disable automatic (but not forced!) channel conversion */ -#define SND_PCM_NO_AUTO_CHANNELS 0x00020000 -/** Disable automatic (but not forced!) format conversion */ -#define SND_PCM_NO_AUTO_FORMAT 0x00040000 -/** Disable soft volume control */ -//#define SND_PCM_NO_SOFTVOL 0x00080000 - -typedef struct _snd_pcm snd_pcm_t; - -enum _snd_pcm_type { - /** Kernel level PCM */ - SND_PCM_TYPE_HW = 0, - /** One or more linked PCM with exclusive access to selected - channels */ - SND_PCM_TYPE_MULTI, - /** File writing plugin */ - SND_PCM_TYPE_FILE, - /** Linear format conversion PCM */ - SND_PCM_TYPE_LINEAR, - /** Rate conversion PCM */ - SND_PCM_TYPE_RATE, - /** Attenuated static route PCM */ - SND_PCM_TYPE_ROUTE, - /** Format adjusted PCM */ - SND_PCM_TYPE_PLUG, - /** Direct Mixing plugin */ - SND_PCM_TYPE_DMIX, - /** Direct Snooping plugin */ - SND_PCM_TYPE_DSNOOP, - /** Soft volume plugin */ - SND_PCM_TYPE_SOFTVOL, - /** External filter plugin */ - SND_PCM_TYPE_EXTPLUG, - SND_PCM_TYPE_LAST = SND_PCM_TYPE_EXTPLUG -}; - -/** PCM type */ -typedef enum _snd_pcm_type snd_pcm_type_t; - -/** PCM state */ -typedef enum _snd_pcm_state { - /** Open */ - SND_PCM_STATE_OPEN = 0, - /** Setup installed */ - SND_PCM_STATE_SETUP, - /** Ready to start */ - SND_PCM_STATE_PREPARED, - /** Running */ - SND_PCM_STATE_RUNNING, - /** Stopped: underrun (playback) or overrun (capture) detected */ - SND_PCM_STATE_XRUN, - /** Draining: running (playback) or stopped (capture) */ - SND_PCM_STATE_DRAINING, - /** Paused */ - SND_PCM_STATE_PAUSED, - /** Hardware is suspended */ - SND_PCM_STATE_SUSPENDED, - /** Hardware is disconnected */ - SND_PCM_STATE_DISCONNECTED, - SND_PCM_STATE_LAST = 1024, -} snd_pcm_state_t; - -/** PCM stream (direction) */ -typedef enum _snd_pcm_stream { - /** Playback stream */ - SND_PCM_STREAM_PLAYBACK = 0, - /** Capture stream */ - SND_PCM_STREAM_CAPTURE, - SND_PCM_STREAM_LAST = SND_PCM_STREAM_CAPTURE -} snd_pcm_stream_t; - - -/** PCM area specification */ -typedef struct _snd_pcm_channel_area { - /** base address of channel samples */ - void *addr; - /** offset to first sample in bits */ - unsigned int first; - /** samples distance in bits */ - unsigned int step; -} snd_pcm_channel_area_t; - - -int snd_pcm_open(snd_pcm_t **pcm, const char *name, - snd_pcm_stream_t stream, int mode); -int snd_pcm_close(snd_pcm_t *pcm); - -int snd_pcm_hw_params_malloc(snd_pcm_hw_params_t **ptr); -void snd_pcm_hw_params_free(snd_pcm_hw_params_t *obj); -int snd_pcm_hw_refine(snd_pcm_t *pcm, snd_pcm_hw_params_t *params); -int snd_pcm_hw_params(snd_pcm_t *pcm, snd_pcm_hw_params_t *params); -int snd_pcm_hw_free(snd_pcm_t *pcm); -int snd_pcm_reset(snd_pcm_t *pcm); -int snd_pcm_start(snd_pcm_t *pcm); -int snd_pcm_prepare(snd_pcm_t *pcm); -int snd_pcm_drop(snd_pcm_t *pcm); -int snd_pcm_drain(snd_pcm_t *pcm); -int snd_pcm_pause(snd_pcm_t *pcm, int enable); -int snd_pcm_recover(snd_pcm_t *pcm, int err, int silent); -int snd_pcm_resume(snd_pcm_t *pcm); -snd_pcm_state_t snd_pcm_state(snd_pcm_t *pcm); -snd_pcm_stream_t snd_pcm_stream(snd_pcm_t *pcm); -int snd_pcm_hwsync(snd_pcm_t *pcm); -int snd_pcm_delay(snd_pcm_t *pcm, snd_pcm_sframes_t *delayp); -snd_pcm_sframes_t snd_pcm_avail_update(snd_pcm_t *pcm); -int snd_pcm_hw_params_can_pause(const snd_pcm_hw_params_t *params); -snd_pcm_sframes_t snd_pcm_rewind(snd_pcm_t *pcm, snd_pcm_uframes_t frames); -int snd_pcm_link(snd_pcm_t *pcm1, snd_pcm_t *pcm2); -int snd_pcm_unlink(snd_pcm_t *pcm); - -snd_pcm_sframes_t snd_pcm_writei(snd_pcm_t *pcm, const void *buffer, snd_pcm_uframes_t size); -snd_pcm_sframes_t snd_pcm_readi(snd_pcm_t *pcm, void *buffer, snd_pcm_uframes_t size); - -int snd_pcm_wait(snd_pcm_t *pcm, int timeout); - -int snd_pcm_dump(snd_pcm_t *pcm); -int snd_pcm_dump_setup(snd_pcm_t *pcm); -int snd_pcm_dump_hw_setup(snd_pcm_t *pcm); -int snd_pcm_dump_sw_setup(snd_pcm_t *pcm); -int snd_pcm_hw_params_dump(snd_pcm_hw_params_t *params); - -/** channel positions */ -enum snd_pcm_chmap_position { - SND_CHMAP_UNKNOWN = 0, /**< unspecified */ - SND_CHMAP_NA, /**< N/A, silent */ - SND_CHMAP_MONO, /**< mono stream */ - SND_CHMAP_FL, /**< front left */ - SND_CHMAP_FR, /**< front right */ - SND_CHMAP_RL, /**< rear left */ - SND_CHMAP_RR, /**< rear right */ - SND_CHMAP_FC, /**< front center */ - SND_CHMAP_LFE, /**< LFE */ - SND_CHMAP_SL, /**< side left */ - SND_CHMAP_SR, /**< side right */ - SND_CHMAP_RC, /**< rear center */ - SND_CHMAP_FLC, /**< front left center */ - SND_CHMAP_FRC, /**< front right center */ - SND_CHMAP_RLC, /**< rear left center */ - SND_CHMAP_RRC, /**< rear right center */ - SND_CHMAP_FLW, /**< front left wide */ - SND_CHMAP_FRW, /**< front right wide */ - SND_CHMAP_FLH, /**< front left high */ - SND_CHMAP_FCH, /**< front center high */ - SND_CHMAP_FRH, /**< front right high */ - SND_CHMAP_TC, /**< top center */ - SND_CHMAP_TFL, /**< top front left */ - SND_CHMAP_TFR, /**< top front right */ - SND_CHMAP_TFC, /**< top front center */ - SND_CHMAP_TRL, /**< top rear left */ - SND_CHMAP_TRR, /**< top rear right */ - SND_CHMAP_TRC, /**< top rear center */ - SND_CHMAP_TFLC, /**< top front left center */ - SND_CHMAP_TFRC, /**< top front right center */ - SND_CHMAP_TSL, /**< top side left */ - SND_CHMAP_TSR, /**< top side right */ - SND_CHMAP_LLFE, /**< left LFE */ - SND_CHMAP_RLFE, /**< right LFE */ - SND_CHMAP_BC, /**< bottom center */ - SND_CHMAP_BLC, /**< bottom left center */ - SND_CHMAP_BRC, /**< bottom right center */ - SND_CHMAP_LAST = SND_CHMAP_BRC, -}; - -/** channel map list type */ -enum snd_pcm_chmap_type { - SND_CHMAP_TYPE_NONE = 0,/**< unspecified channel position */ - SND_CHMAP_TYPE_FIXED, /**< fixed channel position */ - SND_CHMAP_TYPE_VAR, /**< freely swappable channel position */ - SND_CHMAP_TYPE_PAIRED, /**< pair-wise swappable channel position */ - SND_CHMAP_TYPE_LAST = SND_CHMAP_TYPE_PAIRED, /**< last entry */ -}; - -/** the channel map header */ -typedef struct snd_pcm_chmap { - unsigned int channels; /**< number of channels */ - unsigned int pos[0]; /**< channel position array */ -} snd_pcm_chmap_t; - -/** the header of array items returned from snd_pcm_query_chmaps() */ -typedef struct snd_pcm_chmap_query { - enum snd_pcm_chmap_type type; /**< channel map type */ - snd_pcm_chmap_t map; /**< available channel map */ -} snd_pcm_chmap_query_t; - -snd_pcm_chmap_query_t **snd_pcm_query_chmaps(snd_pcm_t *pcm); -void snd_pcm_free_chmaps(snd_pcm_chmap_query_t **maps); -snd_pcm_chmap_t *snd_pcm_get_chmap(snd_pcm_t *pcm); -int snd_pcm_set_chmap(snd_pcm_t *pcm, const snd_pcm_chmap_t *map); - -/* for pthread mutex lock */ -typedef hal_mutex_t snd_pcm_mutex_t; -snd_pcm_mutex_t snd_thread_mutex_init(void); -int snd_thread_mutex_lock_timeout(snd_pcm_mutex_t mutex, long ms); -int snd_thread_mutex_lock(snd_pcm_mutex_t mutex); -int snd_thread_mutex_unlock(snd_pcm_mutex_t mutex); -void snd_thread_mutex_destroy(snd_pcm_mutex_t mutex); - -size_t snd_pcm_hw_params_sizeof(void); -size_t snd_pcm_sw_params_sizeof(void); - -#define __snd_alloca(ptr,type) do { *ptr = (type##_t *) alloca(type##_sizeof()); memset(*ptr, 0, type##_sizeof()); } while (0) -#define snd_pcm_hw_params_alloca(ptr) __snd_alloca(ptr, snd_pcm_hw_params) - -int snd_pcm_hw_params_any(snd_pcm_t *pcm, snd_pcm_hw_params_t *params); - -int snd_pcm_hw_params_set_format(snd_pcm_t *pcm, snd_pcm_hw_params_t *params, snd_pcm_format_t val); -int snd_pcm_hw_params_get_format(const snd_pcm_hw_params_t *params, snd_pcm_format_t *format); - -int snd_pcm_hw_params_set_channels(snd_pcm_t *pcm, snd_pcm_hw_params_t *params, unsigned int val); -int snd_pcm_hw_params_get_channels(const snd_pcm_hw_params_t *params, unsigned int *val); - -int snd_pcm_hw_params_set_rate(snd_pcm_t *pcm, snd_pcm_hw_params_t *params, unsigned int val, int dir); -int snd_pcm_hw_params_get_rate(const snd_pcm_hw_params_t *params, unsigned int *val, int *dir); - -int snd_pcm_hw_params_set_period_time(snd_pcm_t *pcm, snd_pcm_hw_params_t *params, unsigned int us, int dir); -int snd_pcm_hw_params_set_period_time_near(snd_pcm_t *pcm, snd_pcm_hw_params_t *params, unsigned int *val, int *dir); -int snd_pcm_hw_params_get_period_time(const snd_pcm_hw_params_t *params, unsigned int *val, int *dir); - -int snd_pcm_hw_params_set_period_size(snd_pcm_t *pcm, snd_pcm_hw_params_t *params, snd_pcm_uframes_t val, int dir); -int snd_pcm_hw_params_set_period_size_near(snd_pcm_t *pcm, snd_pcm_hw_params_t *params, snd_pcm_uframes_t *val, int *dir); -int snd_pcm_hw_params_get_period_size(const snd_pcm_hw_params_t *params, snd_pcm_uframes_t *val, int *dir); - -int snd_pcm_hw_params_set_periods(snd_pcm_t *pcm, snd_pcm_hw_params_t *params, unsigned int val, int dir); -int snd_pcm_hw_params_set_periods_near(snd_pcm_t *pcm, snd_pcm_hw_params_t *params, unsigned int *val, int *dir); -int snd_pcm_hw_params_get_periods(const snd_pcm_hw_params_t *params, unsigned int *val, int *dir); - -int snd_pcm_hw_params_set_buffer_size(snd_pcm_t *pcm, snd_pcm_hw_params_t *params, snd_pcm_uframes_t val); -int snd_pcm_hw_params_set_buffer_size_near(snd_pcm_t *pcm, snd_pcm_hw_params_t *params, snd_pcm_uframes_t *val); -int snd_pcm_hw_params_get_buffer_size(const snd_pcm_hw_params_t *params, snd_pcm_uframes_t *val); - -int snd_pcm_hw_params_set_buffer_time(snd_pcm_t *pcm, snd_pcm_hw_params_t *params, unsigned int us); -int snd_pcm_hw_params_set_buffer_time_near(snd_pcm_t *pcm, snd_pcm_hw_params_t *params, unsigned int *val, int *dir); - -int snd_pcm_hw_params_set_access(snd_pcm_t *pcm, snd_pcm_hw_params_t *params, snd_pcm_access_t access); -int snd_pcm_hw_params_get_access(const snd_pcm_hw_params_t *params, snd_pcm_access_t *access); - -#define snd_pcm_sw_params_alloca(ptr) __snd_alloca(ptr, snd_pcm_sw_params) - -int snd_pcm_sw_params_current(snd_pcm_t *pcm, snd_pcm_sw_params_t *params); -int snd_pcm_sw_params_set_start_threshold(snd_pcm_t *pcm, snd_pcm_sw_params_t *params, snd_pcm_uframes_t val); -int snd_pcm_sw_params_get_start_threshold(snd_pcm_sw_params_t *params, snd_pcm_uframes_t *val); -int snd_pcm_sw_params_set_stop_threshold(snd_pcm_t *pcm, snd_pcm_sw_params_t *params, snd_pcm_uframes_t val); -int snd_pcm_sw_params_get_stop_threshold(snd_pcm_sw_params_t *params, snd_pcm_uframes_t *val); -int snd_pcm_sw_params_set_silence_size(snd_pcm_t *pcm, snd_pcm_sw_params_t *params, snd_pcm_uframes_t val); -int snd_pcm_sw_params_get_silence_size(snd_pcm_sw_params_t *params, snd_pcm_uframes_t *val); -int snd_pcm_sw_params_set_avail_min(snd_pcm_t *pcm, snd_pcm_sw_params_t *params, snd_pcm_uframes_t val); -int snd_pcm_sw_params_get_avail_min(const snd_pcm_sw_params_t *params, snd_pcm_uframes_t *val); -int snd_pcm_sw_params_get_boundary(const snd_pcm_sw_params_t *params, snd_pcm_uframes_t *val); -int snd_pcm_sw_params(snd_pcm_t *pcm, snd_pcm_sw_params_t *params); - - -ssize_t snd_pcm_format_size(snd_pcm_format_t format, size_t samples); -snd_pcm_sframes_t snd_pcm_bytes_to_frames(snd_pcm_t *pcm, ssize_t bytes); -ssize_t snd_pcm_frames_to_bytes(snd_pcm_t *pcm, snd_pcm_sframes_t frames); - -snd_pcm_type_t snd_pcm_type(snd_pcm_t *pcm); - -const char *snd_pcm_type_name(snd_pcm_type_t type); -const char *snd_pcm_stream_name(snd_pcm_stream_t stream); -const char *snd_pcm_access_name(const snd_pcm_access_t _access); -const char *snd_pcm_format_name(const snd_pcm_format_t format); -const char *snd_pcm_state_name(const snd_pcm_state_t state); - -/* Direct Access (MMAP) functions */ -int snd_pcm_mmap_begin(snd_pcm_t *pcm, - const snd_pcm_channel_area_t **areas, - snd_pcm_uframes_t *offset, - snd_pcm_uframes_t *frames); -snd_pcm_sframes_t snd_pcm_mmap_commit(snd_pcm_t *pcm, - snd_pcm_uframes_t offset, - snd_pcm_uframes_t frames); -snd_pcm_sframes_t snd_pcm_mmap_writei(snd_pcm_t *pcm, const void *buffer, snd_pcm_uframes_t size); -snd_pcm_sframes_t snd_pcm_mmap_readi(snd_pcm_t *pcm, void *buffer, snd_pcm_uframes_t size); - -int snd_pcm_area_silence(const snd_pcm_channel_area_t *dst_channel, snd_pcm_uframes_t dst_offset, - unsigned int samples, snd_pcm_format_t format); -int snd_pcm_areas_silence(const snd_pcm_channel_area_t *dst_channels, snd_pcm_uframes_t dst_offset, - unsigned int channels, snd_pcm_uframes_t frames, snd_pcm_format_t format); -int snd_pcm_area_copy(const snd_pcm_channel_area_t *dst_channel, snd_pcm_uframes_t dst_offset, - const snd_pcm_channel_area_t *src_channel, snd_pcm_uframes_t src_offset, - unsigned int samples, snd_pcm_format_t format); -int snd_pcm_areas_copy(const snd_pcm_channel_area_t *dst_channels, snd_pcm_uframes_t dst_offset, - const snd_pcm_channel_area_t *src_channels, snd_pcm_uframes_t src_offset, - unsigned int channels, snd_pcm_uframes_t frames, snd_pcm_format_t format); - -#ifdef __cplusplus -} -#endif - -#endif /* __AW_ALSA_PCM_H */ diff --git a/src/platform/f133/include/hal/aw-alsa-lib/pcm_config.h b/src/platform/f133/include/hal/aw-alsa-lib/pcm_config.h deleted file mode 100644 index e34ad54ad15561a23a7cc1a6a8ab407a1c6be64b..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/pcm_config.h +++ /dev/null @@ -1,72 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __AW_ALSA_PCM_CONFIG_H -#define __AW_ALSA_PCM_CONFIG_H - -#include -#include - -typedef struct _snd_pcm_config { - const char *name; - const char *type; - void *config; -} snd_pcm_config_t; - -extern const snd_pcm_config_t *_snd_pcm_global_configs; -extern const size_t _snd_pcm_global_configs_size; - -#define SND_PCM_CONFIG(xname, xtype, xconfig) \ -{ \ - .name = xname, \ - .type = xtype, \ - .config = (void *)xconfig, \ -} - -#define REGISTER_SND_PCM_GLOBAL_CONFIGS(configs_array) \ - const size_t _snd_pcm_global_configs_size = \ - sizeof(configs_array) / sizeof(configs_array[0]); \ - const snd_pcm_config_t *_snd_pcm_global_configs = configs_array; - -const snd_pcm_config_t *snd_pcm_config_get_config(const char *name); - -typedef int (*snd_pcm_open_func_t)(snd_pcm_t **pcmp, const snd_pcm_config_t *pcm_config, - snd_pcm_stream_t stream, int mode); - -typedef struct { - const char *type; - snd_pcm_open_func_t func; -} _snd_pcm_open_func_t; - -snd_pcm_open_func_t snd_pcm_config_get_open_func(const char *type); - -#endif /* __AW_ALSA_PCM_CONFIG_H */ diff --git a/src/platform/f133/include/hal/aw-alsa-lib/pcm_extplug.h b/src/platform/f133/include/hal/aw-alsa-lib/pcm_extplug.h deleted file mode 100644 index 7e0718db893a5d0de88c62e43716daa7bbe06106..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/pcm_extplug.h +++ /dev/null @@ -1,171 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __AW_ALSA_PCM_EXTPLUG_H -#define __AW_ALSA_PCM_EXTPLUG_H - -#include - -/** hw constraints for extplug */ -enum { - SND_PCM_EXTPLUG_HW_FORMAT, /**< format */ - SND_PCM_EXTPLUG_HW_CHANNELS, /**< channels */ - SND_PCM_EXTPLUG_HW_PARAMS /**< max number of hw constraints */ -}; - -/** Handle of external filter plugin */ -typedef struct snd_pcm_extplug snd_pcm_extplug_t; -/** Callback table of extplug */ -typedef struct snd_pcm_extplug_callback snd_pcm_extplug_callback_t; - -/** Handle of extplug */ -struct snd_pcm_extplug { - /** - * name of this plugin; must be filled before calling #snd_pcm_extplug_create() - */ - const char *name; - /** - * callbacks of this plugin; must be filled before calling #snd_pcm_extplug_create() - */ - const snd_pcm_extplug_callback_t *callback; - /** - * private data, which can be used freely in the driver callbacks - */ - void *private_data; - /** - * PCM handle filled by #snd_pcm_extplug_create() - */ - snd_pcm_t *pcm; - /** - * stream direction; read-only status - */ - snd_pcm_stream_t stream; - /** - * format hw parameter; filled after hw_params is caled - */ - snd_pcm_format_t format; - /** - * subformat hw parameter; filled after hw_params is caled - */ - //snd_pcm_subformat_t subformat; - /** - * channels hw parameter; filled after hw_params is caled - */ - unsigned int channels; - /** - * rate hw parameter; filled after hw_params is caled - */ - unsigned int rate; - /** - * slave_format hw parameter; filled after hw_params is caled - */ - snd_pcm_format_t slave_format; - /** - * slave_channels hw parameter; filled after hw_params is caled - */ - unsigned int slave_channels; -}; - -/** Callback table of extplug */ -struct snd_pcm_extplug_callback { - /** - * transfer between source and destination; this is a required callback - */ - snd_pcm_sframes_t (*transfer)(snd_pcm_extplug_t *ext, - const snd_pcm_channel_area_t *dst_areas, - snd_pcm_uframes_t dst_offset, - const snd_pcm_channel_area_t *src_areas, - snd_pcm_uframes_t src_offset, - snd_pcm_uframes_t size); - /** - * close the PCM; optional - */ - int (*close)(snd_pcm_extplug_t *ext); - /** - * hw_params; optional - */ - int (*hw_params)(snd_pcm_extplug_t *ext, snd_pcm_hw_params_t *params); - /** - * hw_free; optional - */ - int (*hw_free)(snd_pcm_extplug_t *ext); - /** - * dump; optional - */ - void (*dump)(snd_pcm_extplug_t *ext); - /** - * init; optional initialization called at prepare or reset - */ - int (*init)(snd_pcm_extplug_t *ext); - /** - * query the channel maps; optional; since v1.0.2 - */ - //snd_pcm_chmap_query_t **(*query_chmaps)(snd_pcm_extplug_t *ext); - /** - * get the channel map; optional; since v1.0.2 - */ - //snd_pcm_chmap_t *(*get_chmap)(snd_pcm_extplug_t *ext); - /** - * set the channel map; optional; since v1.0.2 - */ - //int (*set_chmap)(snd_pcm_extplug_t *ext, const snd_pcm_chmap_t *map); -}; - -int snd_pcm_extplug_create(snd_pcm_extplug_t *extplug, const char *name, - const char *spcm_name, snd_pcm_stream_t stream, int mode); - -/* clear hw_parameter setting */ -void snd_pcm_extplug_params_reset(snd_pcm_extplug_t *ext); - -/* hw_parameter setting */ -int snd_pcm_extplug_set_param_list(snd_pcm_extplug_t *extplug, int type, unsigned int num_list, const unsigned int *list); -int snd_pcm_extplug_set_param_minmax(snd_pcm_extplug_t *extplug, int type, unsigned int min, unsigned int max); -int snd_pcm_extplug_set_slave_param_list(snd_pcm_extplug_t *extplug, int type, unsigned int num_list, const unsigned int *list); -int snd_pcm_extplug_set_slave_param_minmax(snd_pcm_extplug_t *extplug, int type, unsigned int min, unsigned int max); - -/** - * set the parameter constraint with a single value - */ -static __inline__ int snd_pcm_extplug_set_param(snd_pcm_extplug_t *extplug, int type, unsigned int val) -{ - return snd_pcm_extplug_set_param_list(extplug, type, 1, &val); -} - -/** - * set the parameter constraint for slave PCM with a single value - */ -static __inline__ int snd_pcm_extplug_set_slave_param(snd_pcm_extplug_t *extplug, int type, unsigned int val) -{ - return snd_pcm_extplug_set_slave_param_list(extplug, type, 1, &val); -} - -#endif /* __AW_ALSA_PCM_EXTPLUG_H */ diff --git a/src/platform/f133/include/hal/aw-alsa-lib/pcm_plugin.h b/src/platform/f133/include/hal/aw-alsa-lib/pcm_plugin.h deleted file mode 100644 index 239eddc12d9717b62c37bb113e78007ffb29663d..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/pcm_plugin.h +++ /dev/null @@ -1,51 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __AW_ALSA_PCM_PLUGIN_H -#define __AW_ALSA_PCM_PLUGIN_H - -#include "plugin/pcm_hw.h" -#include "plugin/pcm_dsnoop.h" -#include "plugin/pcm_dmix.h" -#include "plugin/pcm_asym.h" -#include "plugin/pcm_softvol.h" -#include "plugin/pcm_route.h" -#include "plugin/pcm_rate.h" -#include "plugin/pcm_plug.h" -#include "plugin/pcm_file.h" -#include "plugin/pcm_multi.h" - -#ifdef CONFIG_AW_ALSA_PLUGINS_SONA_AUDIOAEF -#include "plugin/pcm_sona_audioaef.h" -#endif - -#endif /* __AW_ALSA_PCM_PLUGIN_H */ diff --git a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_asym.h b/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_asym.h deleted file mode 100644 index 2faf50c92235dbd720e43b025f479ccf91ac5758..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_asym.h +++ /dev/null @@ -1,46 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __AW_ALSA_PCM_ASYM_H -#define __AW_ALSA_PCM_ASYM_H - -#include "../pcm.h" -#include "pcm_direct_config.h" -#include - -typedef struct { - const char *type; - const char *playback_pcm; - const char *capture_pcm; -} snd_pcm_asym_config_t; - -#endif /* __AW_ALSA_PCM_ASYM_H */ diff --git a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_direct_config.h b/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_direct_config.h deleted file mode 100644 index d5f88b90d6ca4bcbbaa1c64eaeaa60168ad5eb41..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_direct_config.h +++ /dev/null @@ -1,48 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __AW_ALSA_PCM_DIRECT_CONFIG_H -#define __AW_ALSA_PCM_DIRECT_CONFIG_H - -#include - -typedef struct { - const char *pcm; - snd_pcm_format_t format; - int rate; - int channels; - snd_pcm_sframes_t period_size; - snd_pcm_sframes_t buffer_size; - unsigned int periods; -} snd_pcm_direct_slave_config_t; - -#endif /* __AW_ALSA_PCM_DIRECT_CONFIG_H */ diff --git a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_dmix.h b/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_dmix.h deleted file mode 100644 index a279087685d53abd4dce36430ac8405639b91db8..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_dmix.h +++ /dev/null @@ -1,46 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __AW_ALSA_PCM_DMIX_H -#define __AW_ALSA_PCM_DMIX_H - -#include -#include -#include - -typedef struct { - const char *type; - key_t ipc_key; - snd_pcm_direct_slave_config_t slave; -} snd_pcm_dmix_config_t; - -#endif /* __AW_ALSA_PCM_DMIX_H */ diff --git a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_dsnoop.h b/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_dsnoop.h deleted file mode 100644 index edf73674ab98d8c93cf7f5de3f2b5393b479e4cc..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_dsnoop.h +++ /dev/null @@ -1,46 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __AW_ALSA_PCM_DSNOOP_H -#define __AW_ALSA_PCM_DSNOOP_H - -#include -#include -#include - -typedef struct { - const char *type; - key_t ipc_key; - snd_pcm_direct_slave_config_t slave; -} snd_pcm_dsnoop_config_t; - -#endif /* __AW_ALSA_PCM_DSNOOP_H */ diff --git a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_file.h b/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_file.h deleted file mode 100644 index c09ebf0590cd7b8a7a802aa3074fbbd7fda46ea0..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_file.h +++ /dev/null @@ -1,53 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __AW_ALSA_PCM_FILE_H -#define __AW_ALSA_PCM_FILE_H - -#include -#include - -typedef struct { - const char *pcm; -} snd_pcm_file_slave_config_t; - -typedef struct { - const char *type; - snd_pcm_file_slave_config_t slave; - const char *format; - const char *mode; - int port; - const char *server; - int debug; -} snd_pcm_file_config_t; - -#endif /* __AW_ALSA_PCM_FILE_H */ diff --git a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_hw.h b/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_hw.h deleted file mode 100644 index caaa0034332e7bc1dbd5fa4318f44e9ebf5285ba..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_hw.h +++ /dev/null @@ -1,43 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __AW_ALSA_PCM_HW_H -#define __AW_ALSA_PCM_HW_H - -#include - -typedef struct { - const char *card_name; - int device_num; -} snd_pcm_hw_config_t; - -#endif /* __AW_ALSA_LIB_PCM_HW_H */ diff --git a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_multi.h b/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_multi.h deleted file mode 100644 index 986f60fc21f1478bb5f5754d4bf14b369103a35a..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_multi.h +++ /dev/null @@ -1,58 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __AW_ALSA_PCM_MULTI_H -#define __AW_ALSA_PCM_MULTI_H - -#include -#include - -typedef struct { - const char *pcm_alias; - const char *pcm; - int channels; -} snd_pcm_multi_slave_config_t; - -typedef struct { - int cchannel; - const char *pcm_alias; - int schannel; -} snd_pcm_multi_binding_config_t; - -#define ALSA_PCM_MULTI_SLAVES_MAX (5) -typedef struct { - const char *type; - snd_pcm_multi_slave_config_t slaves[ALSA_PCM_MULTI_SLAVES_MAX]; - snd_pcm_multi_binding_config_t bindings[]; -} snd_pcm_multi_config_t; - -#endif /* __AW_ALSA_PCM_MULTI_H */ diff --git a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_plug.h b/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_plug.h deleted file mode 100644 index 26f5a1fb6c1e9c6dbb2a2d71ca24574c54290ee8..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_plug.h +++ /dev/null @@ -1,57 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __AW_ALSA_LIB_PCM_PLUG_H -#define __AW_ALSA_LIB_PCM_PLUG_H - -#include -#include -#include "pcm_route.h" - -typedef struct { - const char *pcm; -#if 1 - snd_pcm_format_t format; - int channels; - int rate; -#endif -} snd_pcm_plug_slave_config_t; - -typedef struct { - const char *type; - snd_pcm_plug_slave_config_t slave; - const char *rate_converter; - const char *route_policy; - snd_pcm_route_ttable_config_t ttable[]; -} snd_pcm_plug_config_t; - -#endif /* __AW_ALSA_LIB_PCM_PLUG_H */ diff --git a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_rate.h b/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_rate.h deleted file mode 100644 index 0711ae1c7fbcfe4b4ff63564c3beafad0973fca6..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_rate.h +++ /dev/null @@ -1,143 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __AW_ALSA_LIB_PCM_RATE_H -#define __AW_ALSA_LIB_PCM_RATE_H - -#include -#include -#define SND_PCM_RATE_PLUGIN_VERSION 0x010002 - -#define SND_PCM_RATE_PLUGIN_ENTRY(name) _snd_pcm_rate_##name##_open -#define SND_PCM_RATE_PLUGIN_CONF_ENTRY(name) _snd_pcm_rate_##name##_open_conf - -#define SND_PCM_PLUGIN_RATE_MIN 4000 -#define SND_PCM_PLUGIN_RATE_MAX 192000 - -typedef struct _snd_pcm_rate snd_pcm_rate_t; - -/** hw_params information for a single side */ -typedef struct snd_pcm_rate_side_info { - snd_pcm_format_t format; - unsigned int rate; - snd_pcm_uframes_t buffer_size; - snd_pcm_uframes_t period_size; -} snd_pcm_rate_side_info_t; - -/** hw_params information */ -typedef struct snd_pcm_rate_info { - struct snd_pcm_rate_side_info in; - struct snd_pcm_rate_side_info out; - unsigned int channels; -} snd_pcm_rate_info_t; - -/** Callback table of rate-converter */ -typedef struct snd_pcm_rate_ops { - /** - * close the converter; optional - */ - void (*close)(void *obj); - /** - * initialize the converter, called at hw_params - */ - int (*init)(void *obj, snd_pcm_rate_info_t *info); - /** - * free the converter; optional - */ - void (*free)(void *obj); - /** - * reset the converter, called at prepare; optional - */ - void (*reset)(void *obj); - /** - * adjust the pitch, called at sw_params; optional - */ - int (*adjust_pitch)(void *obj, snd_pcm_rate_info_t *info); - /** - * convert the data - */ - void (*convert)(void *obj, - const snd_pcm_channel_area_t *dst_areas, - snd_pcm_uframes_t dst_offset, unsigned int dst_frames, - const snd_pcm_channel_area_t *src_areas, - snd_pcm_uframes_t src_offset, unsigned int src_frames); - /** - * convert an s16 interleaved-data array; exclusive with convert - */ - void (*convert_s16)(void *obj, int16_t *dst, unsigned int dst_frames, - const int16_t *src, unsigned int src_frames); - - void (*convert_s16_fix)(void *obj, int16_t *dst, unsigned int *dst_frames, - const int16_t *src, unsigned int *src_frames); - /** - * compute the frame size for input - */ - snd_pcm_uframes_t (*input_frames)(void *obj, snd_pcm_uframes_t frames); - /** - * compute the frame size for output - */ - snd_pcm_uframes_t (*output_frames)(void *obj, snd_pcm_uframes_t frames); - /** - * the protocol version the plugin supports; - * new field since version 0x010002 - */ - unsigned int version; - /** - * return the supported min / max sample rates; - * new ops since version 0x010002 - */ - int (*get_supported_rates)(void *obj, unsigned int *rate_min, - unsigned int *rate_max); - /** - * show some status messages for verbose mode; - * new ops since version 0x010002 - */ - void (*dump)(void *obj); -} snd_pcm_rate_ops_t; - -/** open function type */ -typedef int (*snd_pcm_rate_open_func_t)(unsigned int version, void **objp, - snd_pcm_rate_ops_t *opsp); - -typedef struct { - const char *pcm; - snd_pcm_format_t format; - unsigned int rate; -} snd_pcm_rate_slave_config_t; - -typedef struct { - const char *type; - snd_pcm_rate_slave_config_t slave; - const char *converter; -} snd_pcm_rate_config_t; - -#endif /* __AW_ALSA_LIB_PCM_RATE_H */ diff --git a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_route.h b/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_route.h deleted file mode 100644 index b42c1a406d6a04e91d6e1f0c1f5cdbf3485dbfdb..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_route.h +++ /dev/null @@ -1,83 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __AW_ALSA_PCM_ROUTE_H -#define __AW_ALSA_PCM_ROUTE_H - -/* ROUTE_FLOAT should be set to 0 for machines without FP unit - like iPAQ */ -#define SND_PCM_PLUGIN_ROUTE_FLOAT 1 - -#define SND_PCM_PLUGIN_ROUTE_RESOLUTION 16 /**< integer resolution for route plugin */ - -#if SND_PCM_PLUGIN_ROUTE_FLOAT -/** route ttable entry type */ -typedef float snd_pcm_route_ttable_entry_t; -#define SND_PCM_PLUGIN_ROUTE_HALF 0.5 /**< half value */ -#define SND_PCM_PLUGIN_ROUTE_FULL 1.0 /**< full value */ -#else -/** route ttable entry type */ -typedef int snd_pcm_route_ttable_entry_t; -#define SND_PCM_PLUGIN_ROUTE_HALF (SND_PCM_PLUGIN_ROUTE_RESOLUTION / 2) /**< half value */ -#define SND_PCM_PLUGIN_ROUTE_FULL SND_PCM_PLUGIN_ROUTE_RESOLUTION /**< full value */ -#endif - -typedef struct { - const char *pcm; - int channels; -} snd_pcm_route_slave_config_t; - -typedef struct { - int cchannel; - int schannel; -#if SND_PCM_PLUGIN_ROUTE_FLOAT - float route_value; -#else - int route_value; -#endif -} snd_pcm_route_ttable_config_t; - -typedef struct { - const char *type; - snd_pcm_route_slave_config_t slave; - snd_pcm_route_ttable_config_t ttable[]; -} snd_pcm_route_config_t; - -#define TTABLE_CONFIG_END {-1, -1, 0} - -static inline int snd_pcm_route_is_ttable_config_end(const snd_pcm_route_ttable_config_t *entry) -{ - if (entry->cchannel == -1 && entry->schannel == -1) - return 1; - return 0; -} - -#endif /* __AW_ALSA_PCM_ROUTE_H */ diff --git a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_softvol.h b/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_softvol.h deleted file mode 100644 index 6671fabe72547e90620dedfb234ae2f4ffaa3a62..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_softvol.h +++ /dev/null @@ -1,57 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __AW_ALSA_PCM_SOFTVOL_H -#define __AW_ALSA_PCM_SOFTVOL_H - -#include -#include - -typedef struct { - const char *control_name; - const char *card_name; - int count; -} snd_pcm_softvol_control_t; - -typedef struct { - const char *pcm; -} snd_pcm_softvol_slave_config_t; - -typedef struct { - const char *type; - snd_pcm_softvol_control_t control; - int resolution; - double min_dB, max_dB; - snd_pcm_softvol_slave_config_t slave; -} snd_pcm_softvol_config_t; - -#endif /* __AW_ALSA_PCM_SOFTVOL_H */ diff --git a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_sona_audioaef.h b/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_sona_audioaef.h deleted file mode 100644 index 8e92f503ae10e3e7b1f5540988a7d6df23207f2a..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw-alsa-lib/plugin/pcm_sona_audioaef.h +++ /dev/null @@ -1,51 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __AW_ALSA_PCM_SONA_AUDIOAEF_H -#define __AW_ALSA_PCM_SONA_AUDIOAEF_H - -typedef struct { - const char *pcm; -} snd_pcm_sona_audioaef_slave_config_t; - -typedef struct { - const char *type; - snd_pcm_sona_audioaef_slave_config_t slave; - const char *config_name; - const char *config_file; - int max_frames; - int runtime_config; - int save_runtime_config; - int debug_log; -} snd_pcm_sona_audioaef_config_t; - -#endif /* __AW_ALSA_PCM_SONA_AUDIOAEF_H */ diff --git a/src/platform/f133/include/hal/aw_common.h b/src/platform/f133/include/hal/aw_common.h deleted file mode 100644 index baa4fbc44a1c8f75ffa0d14212f0770d3bc93240..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw_common.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef _AW_COMMON_H -#define _AW_COMMON_H - -#include - -#ifndef offsetof -#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER) -#endif - -/** - * container_of - cast a member of a structure out to the containing structure - * @ptr: the pointer to the member. - * @type: the type of the container struct this is embedded in. - * @member: the name of the member within the struct. - * - */ -#ifndef container_of -#define container_of(ptr, type, member) ({ \ - const typeof(((type *)0)->member) * __mptr = (ptr); \ - (type *)((char *)__mptr - offsetof(type, member)); }) -#endif - - -#define UNUSED(x) (void)x - -#endif /*_AW_COMMON_H*/ diff --git a/src/platform/f133/include/hal/aw_list.h b/src/platform/f133/include/hal/aw_list.h deleted file mode 100644 index 022166b6bb48eaa24d3450ea2c098f93c02481b6..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/aw_list.h +++ /dev/null @@ -1,576 +0,0 @@ -#ifndef _AW_FREERTOS_LIST_H -#define _AW_FREERTOS_LIST_H - -#include - -/* - * Simple doubly linked list implementation. - * - * Some of the internal functions ("__xxx") are useful when - * manipulating whole lists rather than single entries, as - * sometimes we already know the next/prev entries and we can - * generate better code by using them directly rather than - * using the generic single-entry routines. - */ - -struct list_head { - struct list_head *next, *prev; -}; - -struct hlist_head -{ - struct hlist_node *first; -}; - -struct hlist_node -{ - struct hlist_node *next, * *pprev; -}; - -#define LIST_POISON1 ((void *) 0x00100100) -#define LIST_POISON2 ((void *) 0x00200) - -#define LIST_HEAD_INIT(name) { &(name), &(name) } - -#define LIST_HEAD(name) \ - struct list_head name = LIST_HEAD_INIT(name) - -static inline void INIT_LIST_HEAD(struct list_head *list) -{ - list->next = list; - list->prev = list; -} - -/* - * Insert a new entry between two known consecutive entries. - * - * This is only for internal list manipulation where we know - * the prev/next entries already! - */ -#ifndef CONFIG_DEBUG_LIST -static inline void __list_add(struct list_head *new, - struct list_head *prev, - struct list_head *next) -{ - next->prev = new; - new->next = next; - new->prev = prev; - prev->next = new; -} -#else -extern void __list_add(struct list_head *new, - struct list_head *prev, - struct list_head *next); -#endif - -/** - * list_add - add a new entry - * @new: new entry to be added - * @head: list head to add it after - * - * Insert a new entry after the specified head. - * This is good for implementing stacks. - */ -static inline void list_add(struct list_head *new, struct list_head *head) -{ - __list_add(new, head, head->next); -} - - -/** - * list_add_tail - add a new entry - * @new: new entry to be added - * @head: list head to add it before - * - * Insert a new entry before the specified head. - * This is useful for implementing queues. - */ -static inline void list_add_tail(struct list_head *new, struct list_head *head) -{ - __list_add(new, head->prev, head); -} - -/* - * Delete a list entry by making the prev/next entries - * point to each other. - * - * This is only for internal list manipulation where we know - * the prev/next entries already! - */ -static inline void __list_del(struct list_head * prev, struct list_head * next) -{ - next->prev = prev; - prev->next = next; -} - -/** - * list_del - deletes entry from list. - * @entry: the element to delete from the list. - * Note: list_empty() on entry does not return true after this, the entry is - * in an undefined state. - */ -#ifndef CONFIG_DEBUG_LIST -static inline void __list_del_entry(struct list_head *entry) -{ - __list_del(entry->prev, entry->next); -} - -static inline void list_del(struct list_head *entry) -{ - __list_del(entry->prev, entry->next); - entry->next = LIST_POISON1; - entry->prev = LIST_POISON2; -} -#else -extern void __list_del_entry(struct list_head *entry); -extern void list_del(struct list_head *entry); -#endif - -/** - * list_replace - replace old entry by new one - * @old : the element to be replaced - * @new : the new element to insert - * - * If @old was empty, it will be overwritten. - */ -static inline void list_replace(struct list_head *old, - struct list_head *new) -{ - new->next = old->next; - new->next->prev = new; - new->prev = old->prev; - new->prev->next = new; -} - -static inline void list_replace_init(struct list_head *old, - struct list_head *new) -{ - list_replace(old, new); - INIT_LIST_HEAD(old); -} - -/** - * list_del_init - deletes entry from list and reinitialize it. - * @entry: the element to delete from the list. - */ -static inline void list_del_init(struct list_head *entry) -{ - __list_del_entry(entry); - INIT_LIST_HEAD(entry); -} - -/** - * list_move - delete from one list and add as another's head - * @list: the entry to move - * @head: the head that will precede our entry - */ -static inline void list_move(struct list_head *list, struct list_head *head) -{ - __list_del_entry(list); - list_add(list, head); -} - -/** - * list_move_tail - delete from one list and add as another's tail - * @list: the entry to move - * @head: the head that will follow our entry - */ -static inline void list_move_tail(struct list_head *list, - struct list_head *head) -{ - __list_del_entry(list); - list_add_tail(list, head); -} - -/** - * list_is_last - tests whether @list is the last entry in list @head - * @list: the entry to test - * @head: the head of the list - */ -static inline int list_is_last(const struct list_head *list, - const struct list_head *head) -{ - return list->next == head; -} - -/** - * list_empty - tests whether a list is empty - * @head: the list to test. - */ -static inline int list_empty(const struct list_head *head) -{ - return head->next == head; -} - -/** - * list_empty_careful - tests whether a list is empty and not being modified - * @head: the list to test - * - * Description: - * tests whether a list is empty _and_ checks that no other CPU might be - * in the process of modifying either member (next or prev) - * - * NOTE: using list_empty_careful() without synchronization - * can only be safe if the only activity that can happen - * to the list entry is list_del_init(). Eg. it cannot be used - * if another CPU could re-list_add() it. - */ -static inline int list_empty_careful(const struct list_head *head) -{ - struct list_head *next = head->next; - return (next == head) && (next == head->prev); -} - -/** - * list_rotate_left - rotate the list to the left - * @head: the head of the list - */ -static inline void list_rotate_left(struct list_head *head) -{ - struct list_head *first; - - if (!list_empty(head)) { - first = head->next; - list_move_tail(first, head); - } -} - -/** - * list_is_singular - tests whether a list has just one entry. - * @head: the list to test. - */ -static inline int list_is_singular(const struct list_head *head) -{ - return !list_empty(head) && (head->next == head->prev); -} - -static inline void __list_cut_position(struct list_head *list, - struct list_head *head, struct list_head *entry) -{ - struct list_head *new_first = entry->next; - list->next = head->next; - list->next->prev = list; - list->prev = entry; - entry->next = list; - head->next = new_first; - new_first->prev = head; -} - -/** - * list_cut_position - cut a list into two - * @list: a new list to add all removed entries - * @head: a list with entries - * @entry: an entry within head, could be the head itself - * and if so we won't cut the list - * - * This helper moves the initial part of @head, up to and - * including @entry, from @head to @list. You should - * pass on @entry an element you know is on @head. @list - * should be an empty list or a list you do not care about - * losing its data. - * - */ -static inline void list_cut_position(struct list_head *list, - struct list_head *head, struct list_head *entry) -{ - if (list_empty(head)) - return; - if (list_is_singular(head) && - (head->next != entry && head != entry)) - return; - if (entry == head) - INIT_LIST_HEAD(list); - else - __list_cut_position(list, head, entry); -} - -static inline void __list_splice(const struct list_head *list, - struct list_head *prev, - struct list_head *next) -{ - struct list_head *first = list->next; - struct list_head *last = list->prev; - - first->prev = prev; - prev->next = first; - - last->next = next; - next->prev = last; -} - -/** - * list_splice - join two lists, this is designed for stacks - * @list: the new list to add. - * @head: the place to add it in the first list. - */ -static inline void list_splice(const struct list_head *list, - struct list_head *head) -{ - if (!list_empty(list)) - __list_splice(list, head, head->next); -} - -/** - * list_splice_tail - join two lists, each list being a queue - * @list: the new list to add. - * @head: the place to add it in the first list. - */ -static inline void list_splice_tail(struct list_head *list, - struct list_head *head) -{ - if (!list_empty(list)) - __list_splice(list, head->prev, head); -} - -/** - * list_splice_init - join two lists and reinitialise the emptied list. - * @list: the new list to add. - * @head: the place to add it in the first list. - * - * The list at @list is reinitialised - */ -static inline void list_splice_init(struct list_head *list, - struct list_head *head) -{ - if (!list_empty(list)) { - __list_splice(list, head, head->next); - INIT_LIST_HEAD(list); - } -} - -/** - * list_splice_tail_init - join two lists and reinitialise the emptied list - * @list: the new list to add. - * @head: the place to add it in the first list. - * - * Each of the lists is a queue. - * The list at @list is reinitialised - */ -static inline void list_splice_tail_init(struct list_head *list, - struct list_head *head) -{ - if (!list_empty(list)) { - __list_splice(list, head->prev, head); - INIT_LIST_HEAD(list); - } -} - -/** - * list_entry - get the struct for this entry - * @ptr: the &struct list_head pointer. - * @type: the type of the struct this is embedded in. - * @member: the name of the list_struct within the struct. - */ -#define list_entry(ptr, type, member) \ - container_of(ptr, type, member) - -/** - * list_first_entry - get the first element from a list - * @ptr: the list head to take the element from. - * @type: the type of the struct this is embedded in. - * @member: the name of the list_struct within the struct. - * - * Note, that list is expected to be not empty. - */ -#define list_first_entry(ptr, type, member) \ - list_entry((ptr)->next, type, member) - -/** - * list_for_each - iterate over a list - * @pos: the &struct list_head to use as a loop cursor. - * @head: the head for your list. - */ -#define list_for_each(pos, head) \ - for (pos = (head)->next; pos != (head); pos = pos->next) - -/** - * __list_for_each - iterate over a list - * @pos: the &struct list_head to use as a loop cursor. - * @head: the head for your list. - * - * This variant doesn't differ from list_for_each() any more. - * We don't do prefetching in either case. - */ -#define __list_for_each(pos, head) \ - for (pos = (head)->next; pos != (head); pos = pos->next) - -/** - * list_for_each_prev - iterate over a list backwards - * @pos: the &struct list_head to use as a loop cursor. - * @head: the head for your list. - */ -#define list_for_each_prev(pos, head) \ - for (pos = (head)->prev; pos != (head); pos = pos->prev) - -/** - * list_for_each_safe - iterate over a list safe against removal of list entry - * @pos: the &struct list_head to use as a loop cursor. - * @n: another &struct list_head to use as temporary storage - * @head: the head for your list. - */ -#define list_for_each_safe(pos, n, head) \ - for (pos = (head)->next, n = pos->next; pos != (head); \ - pos = n, n = pos->next) - -/** - * list_for_each_prev_safe - iterate over a list backwards safe against removal of list entry - * @pos: the &struct list_head to use as a loop cursor. - * @n: another &struct list_head to use as temporary storage - * @head: the head for your list. - */ -#define list_for_each_prev_safe(pos, n, head) \ - for (pos = (head)->prev, n = pos->prev; \ - pos != (head); \ - pos = n, n = pos->prev) - -/** - * list_for_each_entry - iterate over list of given type - * @pos: the type * to use as a loop cursor. - * @head: the head for your list. - * @member: the name of the list_struct within the struct. - */ -#define list_for_each_entry(pos, head, member) \ - for (pos = list_entry((head)->next, typeof(*pos), member); \ - &pos->member != (head); \ - pos = list_entry(pos->member.next, typeof(*pos), member)) - -/** - * list_for_each_entry_reverse - iterate backwards over list of given type. - * @pos: the type * to use as a loop cursor. - * @head: the head for your list. - * @member: the name of the list_struct within the struct. - */ -#define list_for_each_entry_reverse(pos, head, member) \ - for (pos = list_entry((head)->prev, typeof(*pos), member); \ - &pos->member != (head); \ - pos = list_entry(pos->member.prev, typeof(*pos), member)) - -/** - * list_prepare_entry - prepare a pos entry for use in list_for_each_entry_continue() - * @pos: the type * to use as a start point - * @head: the head of the list - * @member: the name of the list_struct within the struct. - * - * Prepares a pos entry for use as a start point in list_for_each_entry_continue(). - */ -#define list_prepare_entry(pos, head, member) \ - ((pos) ? : list_entry(head, typeof(*pos), member)) - -/** - * list_for_each_entry_continue - continue iteration over list of given type - * @pos: the type * to use as a loop cursor. - * @head: the head for your list. - * @member: the name of the list_struct within the struct. - * - * Continue to iterate over list of given type, continuing after - * the current position. - */ -#define list_for_each_entry_continue(pos, head, member) \ - for (pos = list_entry(pos->member.next, typeof(*pos), member); \ - &pos->member != (head); \ - pos = list_entry(pos->member.next, typeof(*pos), member)) - -/** - * list_for_each_entry_continue_reverse - iterate backwards from the given point - * @pos: the type * to use as a loop cursor. - * @head: the head for your list. - * @member: the name of the list_struct within the struct. - * - * Start to iterate over list of given type backwards, continuing after - * the current position. - */ -#define list_for_each_entry_continue_reverse(pos, head, member) \ - for (pos = list_entry(pos->member.prev, typeof(*pos), member); \ - &pos->member != (head); \ - pos = list_entry(pos->member.prev, typeof(*pos), member)) - -/** - * list_for_each_entry_from - iterate over list of given type from the current point - * @pos: the type * to use as a loop cursor. - * @head: the head for your list. - * @member: the name of the list_struct within the struct. - * - * Iterate over list of given type, continuing from current position. - */ -#define list_for_each_entry_from(pos, head, member) \ - for (; &pos->member != (head); \ - pos = list_entry(pos->member.next, typeof(*pos), member)) - -/** - * list_for_each_entry_safe - iterate over list of given type safe against removal of list entry - * @pos: the type * to use as a loop cursor. - * @n: another type * to use as temporary storage - * @head: the head for your list. - * @member: the name of the list_struct within the struct. - */ -#define list_for_each_entry_safe(pos, n, head, member) \ - for (pos = list_entry((head)->next, typeof(*pos), member), \ - n = list_entry(pos->member.next, typeof(*pos), member); \ - &pos->member != (head); \ - pos = n, n = list_entry(n->member.next, typeof(*n), member)) - -/** - * list_for_each_entry_safe_continue - continue list iteration safe against removal - * @pos: the type * to use as a loop cursor. - * @n: another type * to use as temporary storage - * @head: the head for your list. - * @member: the name of the list_struct within the struct. - * - * Iterate over list of given type, continuing after current point, - * safe against removal of list entry. - */ -#define list_for_each_entry_safe_continue(pos, n, head, member) \ - for (pos = list_entry(pos->member.next, typeof(*pos), member), \ - n = list_entry(pos->member.next, typeof(*pos), member); \ - &pos->member != (head); \ - pos = n, n = list_entry(n->member.next, typeof(*n), member)) - -/** - * list_for_each_entry_safe_from - iterate over list from current point safe against removal - * @pos: the type * to use as a loop cursor. - * @n: another type * to use as temporary storage - * @head: the head for your list. - * @member: the name of the list_struct within the struct. - * - * Iterate over list of given type from current point, safe against - * removal of list entry. - */ -#define list_for_each_entry_safe_from(pos, n, head, member) \ - for (n = list_entry(pos->member.next, typeof(*pos), member); \ - &pos->member != (head); \ - pos = n, n = list_entry(n->member.next, typeof(*n), member)) - -/** - * list_for_each_entry_safe_reverse - iterate backwards over list safe against removal - * @pos: the type * to use as a loop cursor. - * @n: another type * to use as temporary storage - * @head: the head for your list. - * @member: the name of the list_struct within the struct. - * - * Iterate backwards over list of given type, safe against removal - * of list entry. - */ -#define list_for_each_entry_safe_reverse(pos, n, head, member) \ - for (pos = list_entry((head)->prev, typeof(*pos), member), \ - n = list_entry(pos->member.prev, typeof(*pos), member); \ - &pos->member != (head); \ - pos = n, n = list_entry(n->member.prev, typeof(*n), member)) - -/** - * list_safe_reset_next - reset a stale list_for_each_entry_safe loop - * @pos: the loop cursor used in the list_for_each_entry_safe loop - * @n: temporary storage used in list_for_each_entry_safe - * @member: the name of the list_struct within the struct. - * - * list_safe_reset_next is not safe to use in general if the list may be - * modified concurrently (eg. the lock is dropped in the loop body). An - * exception to this is if the cursor element (pos) is pinned in the list, - * and list_safe_reset_next is called after re-taking the lock and before - * completing the current iteration of the loop body. - */ -#define list_safe_reset_next(pos, n, member) \ - n = list_entry(pos->member.next, typeof(*pos), member) - - - -#endif diff --git a/src/platform/f133/include/hal/csi/hal_csi_jpeg.h b/src/platform/f133/include/hal/csi/hal_csi_jpeg.h deleted file mode 100644 index 86bc3f0574806e5463304b3813920f492261ed42..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/csi/hal_csi_jpeg.h +++ /dev/null @@ -1,60 +0,0 @@ - -#ifndef __HAL_CSI_JPEG_H_ -#define __HAL_CSI_JPEG_H_ - -#include -#include -enum pix_output_fmt_mode_t { - PIX_FMT_OUT_NV12 = 0x1, - PIX_FMT_OUT_JPEG = 0x2, - PIX_FMT_OUT_MAX = 0x3, -}; - -enum line_mode_t { - OFFLINE_MODE = 0, - ONLINE_MODE, -}; - -typedef void (*CapStatusCb)(struct csi_ipeg_mem *jpeg_mem); - -struct csi_jpeg_fmt { - unsigned int width; - unsigned int height; - enum line_mode_t line_mode; - enum pix_output_fmt_mode_t output_mode; - CapStatusCb cb; - unsigned char fps; //reserve -}; - -struct csi_ipeg_buf { - unsigned int size; - void *addr; -}; - -typedef struct { - uint8_t buff_index; /* Indicate which buffer the currently encoded part jpeg is stored in */ - uint32_t buff_offset; /* Indicate the offset of the current part of jpeg in the buffer */ - uint8_t tail; /* Indicates whether it is the last part of a jpeg image */ - uint32_t size; /* Indicate the size of the current part of jpeg encoding */ -} jpeg_mpartbuffinfo; - -struct csi_ipeg_mem { - unsigned char index; - struct csi_ipeg_buf buf; - jpeg_mpartbuffinfo mpart_info; - struct list_head list; -}; - - -void hal_csi_jpeg_set_fmt(struct csi_jpeg_fmt *intput_fmt); -int hal_csi_jpeg_reqbuf(unsigned int count); -int hal_csi_jpeg_freebuf(void); -unsigned int hal_csi_dqbuf(struct csi_ipeg_mem *csi_mem, unsigned int timeout_msec); -unsigned int hal_jpeg_dqbuf(struct csi_ipeg_mem *jpeg_mem, unsigned int timeout_msec); -void hal_csi_qbuf(void); -void hal_jpeg_qbuf(void); -void hal_csi_jpeg_s_stream(unsigned int on); -HAL_Status hal_csi_jpeg_probe(void); -HAL_Status hal_csi_jpeg_remove(void); - -#endif diff --git a/src/platform/f133/include/hal/hal_clk.h b/src/platform/f133/include/hal/hal_clk.h deleted file mode 100644 index 959259cda300f43ca7f6b1b4fe0e13bab543b6dc..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/hal_clk.h +++ /dev/null @@ -1,241 +0,0 @@ -/* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. - * - * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in - *the the People's Republic of China and other countries. - * All Allwinner Technology Co.,Ltd. trademarks are used with permission. - * - * DISCLAIMER - * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. - * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) - * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN - * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. - * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS - * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. - * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. - * - * - * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT - * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING - * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE - * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __SUNXI_HAL_CLK_H__ -#define __SUNXI_HAL_CLK_H__ - -#include -#include -#include -#include -#include - -#define hal_clk_api_version "hal_clk_api_version_1_1_0" - -/************************************************************************************************ -* Macro definition readl 、writel hal_read_xxx and hal_write_xxx -* @Description: These definitions used to CCMU Drivers to read and write Physical I/O register -*************************************************************************************************/ -#define hal_write_reg8(addr ,data) ((*(volatile u8 *)(addr)) = (u8)(data)) -#define hal_write_reg16(addr ,data) ((*(volatile u16 *)(addr)) = (u16)(data)) -#define hal_write_reg32(addr ,data) ((*(volatile u32 *)(addr)) = (u32)(data)) -#define hal_read_reg8(x) (*(volatile u8 *)(x)) -#define hal_read_reg16(x) (*(volatile u16 *)(x)) -#define hal_read_reg32(x) (*(volatile u32 *)(x)) - -/************************************************************************************************ -* Macro definition CCMU_XXX -* @Description: These definitions used to CCMU HAL-API and Drivers source code debug -*************************************************************************************************/ -//#define CCMU_DBG_EN 1 - -#if defined(CCMU_DBG_LEAVE_TINY) || defined(CCMU_DBG_LEAVE_HIGH) -#define CCMU_DBG(fmt,args...) printf("[CCMU:dbg..] %-*s:%d "fmt ,30, __func__, __LINE__, ##args) -#define CCMU_ERR(fmt,args...) printf("[CCMU:err**] %-*s:%d "fmt ,30, __func__, __LINE__, ##args) -#else -#define CCMU_DBG(fmt,args...) do{} while(0) -#define CCMU_ERR(fmt,args...) do{} while(0) -#endif -#if defined(CCMU_DBG_LEAVE_HIGH) -#define CCMU_TRACE() printf("[CCMU:trace] %-*s:%d \n",30, __func__, __LINE__) -#define CCMU_TRACE_CLK(tpye, clk) printf("CCMU:trace %s:%d CLK "#tpye" id %d\n",__func__, __LINE__, clk) -#else -#define CCMU_TRACE() do{} while(0) -#define CCMU_TRACE_CLK(clk, rate) do{} while(0) -#endif - -/************************************************************************************************ -* @Function: hal_clock_init -* @Description: provide HAL API for initialize soc clocks during the system power-on startup phase -* @Parameters: -* # void: No parameters required -* @Return values: -* # HAL_CLK_STATUS_OK: soc clocks initialize successed -* # others : soc clocks initialization may have some abnormal problems -* @Attention: clock initialize timing depands on specific soc platform clock design -*************************************************************************************************/ -void hal_clock_init(void); - -/************************************************************************************************ -* @Function: hal_clock_init -* @Description: provide HAL API for initialize soc clocks during the system power-on startup phase -* @Parameters: -* # void: No parameters required -* @Return values: -* # HAL_CLK_STATUS_OK: soc clocks initialize successed -* # others : soc clocks initialization may have some abnormal problems -* @Attention: clock initialize timing depands on specific soc platform clock design -*************************************************************************************************/ -#if defined(CONFIG_DRIVERS_SUNXI_CCU) || defined(CONFIG_DRIVERS_SUNXI_CLK) -hal_clk_t hal_clock_get(hal_clk_type_t type, hal_clk_id_t id); -#endif - -hal_clk_status_t hal_clock_put(hal_clk_t clk); - -/************************************************************************************************ -* @Function: hal_clock_is_enabled -* @Description: provide HAL API for bus-clk and periph-clk to get clock enabled statue -* @Parameters: -* # clk: clock-id of soc specific clock -* @Return values: -* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid -* # HAL_CLK_STATUS_ERROR_CLK_SET_RATE_REFUSED: fixed-clk and factor clk not allowed User to change rate because of stability -* # HAL_CLK_STATUS_ERROT_CLK_UNDEFINED: input parameter of clock-id defined in hal but not defined by soc clock driver -* # HAL_CLK_STATUS_ERROR_CLK_NOT_FOUND: input parameter of clock-id defined in hal but not defined by soc clock driver -* # HAL_CLK_STATUS_ENABLED: clock current status is enabled -* # HAL_CLK_STATUS_DISABLED: clock current status is disabled -* @Attention: .etc -*************************************************************************************************/ -hal_clk_status_t hal_clock_is_enabled(hal_clk_t clk); - -/************************************************************************************************ -* @Function: hal_clock_enable -* @Description: provide HAL API for bus-clk and periph-clk to enable clock -* @Parameters: -* # clk: clock-id of soc specific clock -* @Return values: -* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid -* # HAL_CLK_STATUS_ERROR_CLK_SET_RATE_REFUSED: fixed-clk and factor clk not allowed User to change rate because of stability -* # HAL_CLK_STATUS_ERROT_CLK_UNDEFINED: input parameter of clock-id defined in hal but not defined by soc clock driver -* # HAL_CLK_STATUS_ERROR_CLK_NOT_FOUND: input parameter of clock-id defined in hal but not defined by soc clock driver -* # HAL_CLK_STATUS_ENABLED: clock current status is enabled -* # HAL_CLK_STATUS_DISABLED: clock current status is disabled -* @Attention: .etc -*************************************************************************************************/ -hal_clk_status_t hal_clock_enable(hal_clk_t clk); - - -/************************************************************************************************ -* @Function: hal_clock_disable -* @Description: provide HAL API for bus-clk and periph-clk to disable clock -* @Parameters: -* # clk: clock-id of soc specific clock -* @Return values: -* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid -* # HAL_CLK_STATUS_ERROR_CLK_SET_RATE_REFUSED: fixed-clk and factor clk not allowed User to change rate because of stability -* # HAL_CLK_STATUS_ERROT_CLK_UNDEFINED: input parameter of clock-id defined in hal but not defined by soc clock driver -* # HAL_CLK_STATUS_ERROR_CLK_NOT_FOUND: input parameter of clock-id defined in hal but not defined by soc clock driver -* # HAL_CLK_STATUS_OK: clock current status disabled successed -* @Attention: .etc -*************************************************************************************************/ -hal_clk_status_t hal_clock_disable(hal_clk_t clk); - - -/************************************************************************************************ -* @Function: hal_clk_recalc_rate -* @Description: provide HAL API for factor-clk, bus-clk and periph-clk to recalculate current Runtime rate -* @Parameters: -* # clk: clock-id of soc specific clock -* @Return values: -* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal -* # HAL_CLK_RATE_UNINITIALIZED : input parameter of clock-id defined in hal but not defined by soc clock driver or clock disbaled -* # others: return current clock rate successed -* @Attention: .etc -*************************************************************************************************/ -u32 hal_clk_recalc_rate(hal_clk_t clk); - - -/************************************************************************************************ -* @Function: hal_clk_round_rate -* @Description: provide HAL API for factor-clk, bus-clk and periph-clk round target rate to the most suitable rate -* @Parameters: -* # clk: clock-id of soc specific clock -* # rate: the target rate form API-User -* @Return values: -* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid -* # HAL_CLK_RATE_UNINITIALIZED : input parameter of clock-id defined in hal but not defined by soc clock driver or clock disbaled -* # others: return round rate successed -* @Attention: .etc -*************************************************************************************************/ -u32 hal_clk_round_rate(hal_clk_t clk, u32 rate); - - -/************************************************************************************************ -* @Function: hal_clk_get_rate -* @Description: provide HAL API for factor-clk, bus-clk and periph-clk get current rate cached witch may not current Runtime rate -* @Parameters: -* # clk: clock-id of soc specific clock -* @Return values: -* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid -* # HAL_CLK_RATE_UNINITIALIZED : input parameter of clock-id defined in hal but not defined by soc clock driver or clock disbaled -* # others: return rate cached successed -* @Attention: .etc -*************************************************************************************************/ -u32 hal_clk_get_rate(hal_clk_t clk); - - -/************************************************************************************************ -* @Function: hal_clk_set_rate -* @Description: provide HAL API for bus-clk and periph-clk to set new rate -* @Parameters: -* # clk: clock-id of soc specific clock -* # rate: the new rate value -* @Return values: -* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal ot rate value is invalid -* # HAL_CLK_STATUS_ERROR_CLK_SET_RATE_REFUSED: fixed-clk and factor clk not allowed User to change rate because of stability -* # HAL_CLK_STATUS_ERROT_CLK_UNDEFINED: input parameter of clock-id defined in hal but not defined by soc clock driver -* # HAL_CLK_STATUS_ERROR_CLK_NOT_FOUND: input parameter of clock-id defined in hal but not defined by soc clock driver -* # HAL_CLK_STATUS_OK: set new rate successed -* @Attention: .etc -*************************************************************************************************/ -hal_clk_status_t hal_clk_set_rate(hal_clk_t clk, u32 rate); - - -/************************************************************************************************ -* @Function: hal_clk_set_parent -* @Description: provide HAL API for factor-clk, bus-clk and periph-clk to select parent clock -* @Parameters: -* # clk: clock-id of soc specific clock witch nedds to adjust parent clock -* # parent: clock-id of soc specific clock's parent clock -* @Return values: -* # HAL_CLK_STATUS_OK: soc specific clock select and siwtch parent clock successed -* # others : soc specific clock select and siwtch parent clock may have some abnormal problems -* @Attention: soc specific clock and parent clock must be according to the SOC_User_Manual definition -*************************************************************************************************/ -hal_clk_status_t hal_clk_set_parent(hal_clk_t clk, hal_clk_t parent); - - -/************************************************************************************************ -* @Function: hal_clk_get_parent -* @Description: provide HAL API for factor-clk, bus-clk and periph-clk to get current parent clock -* @Parameters: -* # clk: clock-id of soc specific clock -* @Return values: -* # HAL_CLK_STATUS_INVALID_PARAMETER: input parameter of clock-id undefined in hal -* # HAL_CLK_UNINITIALIZED : input parameter of clock-id defined in hal but not defined by soc clock driver -* # others: return current parent clock-id successed -* @Attention: soc specific clock and parent clock must be according to the SOC_User_Manual definition -*************************************************************************************************/ -hal_clk_t hal_clk_get_parent(hal_clk_t clk); - - -#endif /* __HAL_CLOCK_H__ */ - diff --git a/src/platform/f133/include/hal/hal_dev.h b/src/platform/f133/include/hal/hal_dev.h deleted file mode 100644 index dff9205b7c19178d3c4931fc1e546b670bee8353..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/hal_dev.h +++ /dev/null @@ -1,105 +0,0 @@ -/** - * @file hal_dev.h - * @author XRADIO IOT WLAN Team - */ - -/* - * Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_HAL_DEV_H_ -#define _DRIVER_HAL_DEV_H_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief HAL device number - * - * HAL device number is made up of major number and minor number. - * - Major number is defined as HAL_DEV_MAJOR_XXX - * - minor number is defined by the specific driver - */ -typedef uint32_t HAL_Dev_t; - -#define HAL_DEV_MINOR_BITS 16 -#define HAL_DEV_MINOR_MASK ((1U << HAL_DEV_MINOR_BITS) - 1) - -/** @brief Get major number from device number */ -#define HAL_DEV_MAJOR(dev) ((uint32_t)((dev) >> HAL_DEV_MINOR_BITS)) - -/** @brief Get minor number from device number */ -#define HAL_DEV_MINOR(dev) ((uint32_t)((dev) & HAL_DEV_MINOR_MASK)) - -/** @brief Make device number from major number and minor number */ -#define HAL_MKDEV(major, minor) \ - (((HAL_Dev_t)(major) << HAL_DEV_MINOR_BITS) | \ - ((HAL_Dev_t)(minor) & HAL_DEV_MINOR_MASK)) - -/** - * @brief Major number of device - */ -enum { - /* peripheral interface of chip */ - HAL_DEV_MAJOR_UART = 0, - HAL_DEV_MAJOR_I2C, - HAL_DEV_MAJOR_SPI, - HAL_DEV_MAJOR_IRRX, - HAL_DEV_MAJOR_IRTX, - HAL_DEV_MAJOR_I2S, - HAL_DEV_MAJOR_DMIC, - HAL_DEV_MAJOR_ADC, - HAL_DEV_MAJOR_PWM, - HAL_DEV_MAJOR_FLASHC, /* FLASH controller interface */ - HAL_DEV_MAJOR_PSRAM, - HAL_DEV_MAJOR_SDC, - HAL_DEV_MAJOR_CSI, - HAL_DEV_MAJOR_SWD, - HAL_DEV_MAJOR_SCR, - HAL_DEV_MAJOR_KEYBOARD, - HAL_DEV_MAJOR_WKPIN, - - /* external component */ - HAL_DEV_MAJOR_FLASH = 64, - HAL_DEV_MAJOR_AUDIO_CODEC, - HAL_DEV_MAJOR_AD_BUTTON, - HAL_DEV_MAJOR_GPIO_BUTTON, - HAL_DEV_MAJOR_MATRIX_BUTTON, - - /* device major number defined by user starts from HAL_DEV_MAJOR_USER */ - HAL_DEV_MAJOR_USER = 128, -}; - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_HAL_DEV_H_ */ diff --git a/src/platform/f133/include/hal/hal_dma.h b/src/platform/f133/include/hal/hal_dma.h deleted file mode 100644 index 3e4cbd19a4c21749cb4acbe0005bb6213e6740f9..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/hal_dma.h +++ /dev/null @@ -1,298 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTYS TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERSSDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTYS TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#ifndef __SUNXI_HAL_DMA_H__ -#define __SUNXI_HAL_DMA_H__ - -#include -#include -#include - -/* - * include the platform dma header file. - */ -#include - -#ifdef __cplusplus -extern "C" { -#endif - - -/* #define DMA_DEBUG */ - -#define HEXADECIMAL (0x10) -#define REG_INTERVAL (0x04) -#define REG_CL (0x0c) - -//TODO:move reg list to sunxiwxx.h -#define HIGH_CHAN 8 - -#define DMA_IRQ_EN(x) (SUNXI_DMAC_PBASE + (0x00 + ((x) << 2))) /* Interrupt enable register */ -#define DMA_IRQ_STAT(x) (SUNXI_DMAC_PBASE + (0x10 + ((x) << 2))) /* Interrupt status register */ -#define DMA_SECURE (SUNXI_DMAC_PBASE + 0x20) /* DMA security register */ -#define DMA_GATE (SUNXI_DMAC_PBASE + 0x28) /* DMA gating register */ -#define DMA_MCLK_GATE 0x04 -#define DMA_COMMON_GATE 0x02 -#define DMA_CHAN_GATE 0x01 -#define DMA_STAT (SUNXI_DMAC_PBASE + 0x30) /* DMA Status Register RO */ -#define DMA_ENABLE(x) (SUNXI_DMAC_PBASE + (0x100 + ((x + START_CHAN_OFFSET) << 6))) /* Channels enable register */ -#define DMA_PAUSE(x) (SUNXI_DMAC_PBASE + (0x104 + ((x + START_CHAN_OFFSET) << 6))) /* DMA Channels pause register */ -#define DMA_LLI_ADDR(x) (SUNXI_DMAC_PBASE + (0x108 + ((x + START_CHAN_OFFSET) << 6))) /* Descriptor address register */ -#define DMA_CFG(x) (SUNXI_DMAC_PBASE + (0x10C + ((x + START_CHAN_OFFSET) << 6))) /* Configuration register RO */ -#define DMA_CUR_SRC(x) (SUNXI_DMAC_PBASE + (0x110 + ((x + START_CHAN_OFFSET) << 6))) /* Current source address RO */ -#define DMA_CUR_DST(x) (SUNXI_DMAC_PBASE + (0x114 + ((x + START_CHAN_OFFSET) << 6))) /* Current destination address RO */ -#define DMA_CNT(x) (SUNXI_DMAC_PBASE + (0x118 + ((x + START_CHAN_OFFSET) << 6))) /* Byte counter left register RO */ -#define DMA_PARA(x) (SUNXI_DMAC_PBASE + (0x11C + ((x + START_CHAN_OFFSET) << 6))) /* Parameter register RO */ -#define LINK_END 0xFFFFF800 /* lastest link must be 0xfffff800 */ - -/* DMA mode register */ -#define DMA_OP_MODE(x) (SUNXI_DMAC_PBASE + (0x128 + ((x + START_CHAN_OFFSET) << 6))) /* DMA mode register */ -#define SRC_HS_MASK (0x1 << 2) /* bit 2: Source handshake mode */ -#define DST_HS_MASK (0x1 << 3) /* bit 3: Destination handshake mode */ - -#define SET_OP_MODE(x, val) ({ \ - writel(val,DMA_OP_MODE(x)); \ - }) - - -#define SHIFT_IRQ_MASK(val, ch) ({ \ - (ch + START_CHAN_OFFSET) >= HIGH_CHAN \ - ? (val) << ((ch + START_CHAN_OFFSET - HIGH_CHAN) << 2) \ - : (val) << ((ch + START_CHAN_OFFSET) << 2); \ - }) - -#define SHIFT_PENDING_MASK(val, ch) ({ \ - (ch + START_CHAN_OFFSET) >= HIGH_CHAN \ - ? (val) << ((ch + START_CHAN_OFFSET - HIGH_CHAN) << 2) \ - : (val) << ((ch + START_CHAN_OFFSET) << 2); \ - }) - -#define IRQ_HALF 0x01 /* Half package transfer interrupt pending */ -#define IRQ_PKG 0x02 /* One package complete interrupt pending */ -#define IRQ_QUEUE 0x04 /* All list complete transfer interrupt pending */ - -/* DMA channel configuration register */ -/* The detail information of DMA configuration */ -#define SRC_WIDTH(x) ((x) << 9) -#define SRC_BURST(x) ((x) << 6) -#define SRC_IO_MODE (0x01 << 8) -#define SRC_LINEAR_MODE (0x00 << 8) -#define SRC_DRQ(x) ((x) << 0) -#define DST_WIDTH(x) ((x) << 25) -#define DST_BURST(x) ((x) << 22) -#define DST_IO_MODE (0x01 << 24) -#define DST_LINEAR_MODE (0x00 << 24) -#define DST_DRQ(x) ((x) << 16) -#define CHAN_START 1 -#define CHAN_STOP 0 -#define CHAN_PAUSE 1 -#define CHAN_RESUME 0 -#define NORMAL_WAIT (8 << 0) - -#define GET_SRC_DRQ(x) ((x) & 0x000000ff) -#define GET_DST_DRQ(x) ((x) & 0x00ff0000) - -struct sunxi_dma_lli { - uint32_t cfg; - uint32_t src; - uint32_t dst; - uint32_t len; - uint32_t para; - uint32_t p_lln; - struct sunxi_dma_lli *vlln; -}; - - -#define sunxi_slave_id(d, s) (((d)<<16) | (s)) - -typedef void (*dma_callback)(void *param); - -/** - * enum dma_slave_buswidth - defines bus width of the DMA slave - * device, source or target buses - */ -enum dma_slave_buswidth { - DMA_SLAVE_BUSWIDTH_UNDEFINED = 0, - DMA_SLAVE_BUSWIDTH_1_BYTE = 1, - DMA_SLAVE_BUSWIDTH_2_BYTES = 2, - DMA_SLAVE_BUSWIDTH_3_BYTES = 3, - DMA_SLAVE_BUSWIDTH_4_BYTES = 4, - DMA_SLAVE_BUSWIDTH_8_BYTES = 8, - DMA_SLAVE_BUSWIDTH_16_BYTES = 16, - DMA_SLAVE_BUSWIDTH_32_BYTES = 32, - DMA_SLAVE_BUSWIDTH_64_BYTES = 64, -}; - -enum dma_slave_burst { - DMA_SLAVE_BURST_1 = 1, - DMA_SLAVE_BURST_4 = 4, - DMA_SLAVE_BURST_8 = 8, - DMA_SLAVE_BURST_16 = 16, -}; - -/** - * enum dma_transfer_direction - dma transfer mode and direction indicator - * @DMA_MEM_TO_MEM: Async/Memcpy mode - * @DMA_MEM_TO_DEV: Slave mode & From Memory to Device - * @DMA_DEV_TO_MEM: Slave mode & From Device to Memory - * @DMA_DEV_TO_DEV: Slave mode & From Device to Device - */ -enum dma_transfer_direction { - DMA_MEM_TO_MEM = 0, - DMA_MEM_TO_DEV = 1, - DMA_DEV_TO_MEM = 2, - DMA_DEV_TO_DEV = 3, - DMA_TRANS_NONE, -}; - -/** - * enum dma_status - DMA transaction status - * @DMA_COMPLETE: transaction completed - * @DMA_IN_PROGRESS: transaction not yet processed - * @DMA_PAUSED: transaction is paused - * @DMA_ERROR: transaction failed - */ -enum dma_status { - DMA_INVALID_PARAMETER = -2, - DMA_ERROR = -1, - DMA_COMPLETE, - DMA_IN_PROGRESS, - DMA_PAUSED, -}; - -/** - * struct dma_slave_config - dma slave channel runtime config - * @direction: whether the data shall go in or out on this slave - * channel, right now. DMA_MEM_TO_DEV and DMA_DEV_TO_MEM are - * legal values. DEPRECATED, drivers should use the direction argument - * to the device_prep_slave_sg and device_prep_dma_cyclic functions or - * the dir field in the dma_interleaved_template structure. - * @src_addr: this is the physical address where DMA slave data - * should be read (RX), if the source is memory this argument is - * ignored. - * @dst_addr: this is the physical address where DMA slave data - * should be written (TX), if the source is memory this argument - * is ignored. - * @src_addr_width: this is the width in bytes of the source (RX) - * register where DMA data shall be read. If the source - * is memory this may be ignored depending on architecture. - * Legal values: 1, 2, 4, 8. - * @dst_addr_width: same as src_addr_width but for destination - * target (TX) mutatis mutandis. - * @src_maxburst: the maximum number of words (note: words, as in - * units of the src_addr_width member, not bytes) that can be sent - * in one burst to the device. Typically something like half the - * FIFO depth on I/O peripherals so you don't overflow it. This - * may or may not be applicable on memory sources. - * @dst_maxburst: same as src_maxburst but for destination target - * mutatis mutandis. - * @slave_id: Slave requester id. Only valid for slave channels. The dma - * slave peripheral will have unique id as dma requester which need to be - * pass as slave config. - * - * This struct is passed in as configuration data to a DMA engine - * in order to set up a certain channel for DMA transport at runtime. - * The DMA device/engine has to provide support for an additional - * callback in the dma_device structure, device_config and this struct - * will then be passed in as an argument to the function. - * - * The rationale for adding configuration information to this struct is as - * follows: if it is likely that more than one DMA slave controllers in - * the world will support the configuration option, then make it generic. - * If not: if it is fixed so that it be sent in static from the platform - * data, then prefer to do that. - */ -struct dma_slave_config { - enum dma_transfer_direction direction; - unsigned long src_addr; - unsigned long dst_addr; - enum dma_slave_buswidth src_addr_width; - enum dma_slave_buswidth dst_addr_width; - uint32_t src_maxburst; - uint32_t dst_maxburst; - uint32_t slave_id; -}; - -struct sunxi_dma_chan { - uint8_t used:1; - uint8_t chan_count:4; - bool cyclic:1; - struct dma_slave_config cfg; - uint32_t periods_pos; - uint32_t buf_len; - struct sunxi_dma_lli *desc; - uint32_t irq_type; - dma_callback callback; - void *callback_param; - /* volatile kspinlock_t lock; */ - volatile int lock; -}; - -/** This enum defines the DMA CHANNEL status. */ -typedef enum { - HAL_DMA_CHAN_STATUS_BUSY = 0, /* DMA channel status busy */ - HAL_DMA_CHAN_STATUS_FREE = 1 /* DMA channel status free */ -} hal_dma_chan_status_t; - -/** This enum defines the return type of GPIO API. */ -typedef enum { - HAL_DMA_STATUS_INVALID_PARAMETER = -22, /* Invalid input parameter. */ - HAL_DMA_STATUS_NO_MEM = -12, /* No memory. */ - HAL_DMA_STATUS_ERR_PERM = -1, /* Operation not permitted. */ - HAL_DMA_STATUS_OK = 0 /* The DMA status ok. */ -} hal_dma_status_t; - - -hal_dma_chan_status_t hal_dma_chan_request(struct sunxi_dma_chan **dma_chan); -hal_dma_status_t hal_dma_prep_memcpy(struct sunxi_dma_chan *chan, - uint32_t dest, uint32_t src, uint32_t len); -hal_dma_status_t hal_dma_prep_device(struct sunxi_dma_chan *chan, - uint32_t dest, uint32_t src, - uint32_t len, enum dma_transfer_direction dir); -hal_dma_status_t hal_dma_prep_cyclic(struct sunxi_dma_chan *chan, - uint32_t buf_addr, uint32_t buf_len, - uint32_t period_len, enum dma_transfer_direction dir); -hal_dma_status_t hal_dma_callback_install(struct sunxi_dma_chan *chan, - dma_callback callback, - void *callback_param); -hal_dma_status_t hal_dma_slave_config(struct sunxi_dma_chan *chan, struct dma_slave_config *config); -enum dma_status hal_dma_tx_status(struct sunxi_dma_chan *chan, uint32_t *left_size); -hal_dma_status_t hal_dma_start(struct sunxi_dma_chan *chan); -hal_dma_status_t hal_dma_stop(struct sunxi_dma_chan *chan); -hal_dma_status_t hal_dma_chan_free(struct sunxi_dma_chan *chan); -hal_dma_status_t hal_dma_chan_desc_free(struct sunxi_dma_chan *chan); -void hal_dma_init(void); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/hal/hal_flashc_enc.h b/src/platform/f133/include/hal/hal_flashc_enc.h deleted file mode 100644 index 90caa20aa9672edfdffad31540431f09843e5fa9..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/hal_flashc_enc.h +++ /dev/null @@ -1,75 +0,0 @@ -/* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. - - * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in - * the the People's Republic of China and other countries. - * All Allwinner Technology Co.,Ltd. trademarks are used with permission. - - * DISCLAIMER - * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. - * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) - * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN - * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. - * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS - * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. - * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. - - - * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT - * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING - * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE - * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __HAL_FLASHC_ENC_H__ -#define __HAL_FLASHC_ENC_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -typedef struct Flashc_Enc_Cfg { - uint8_t ch; - uint8_t used; - uint8_t enable; - uint32_t start_addr; - uint32_t end_addr; - uint32_t key_0; - uint32_t key_1; - uint32_t key_2; - uint32_t key_3; -} Flashc_Enc_Cfg; - -/* for debug */ -void printf_enc_config(const Flashc_Enc_Cfg *enc_cfg); - -/* for flashc module */ -int hal_flashc_enc_init(uint32_t max_addr, uint8_t start_ch); - -/* user api */ -int hal_flashc_set_enc(const Flashc_Enc_Cfg *enc_set); -int hal_flashc_enc_enable(const Flashc_Enc_Cfg *enc_set); -int hal_flashc_enc_disable(const Flashc_Enc_Cfg *enc_set); -int hal_flashc_enc_alloc_ch(void); -int hal_flashc_enc_free_ch(const Flashc_Enc_Cfg *enc_set); - -/* other api */ -int hal_flashc_enc_enable_ch(uint8_t ch); -int hal_flashc_enc_disable_ch(uint8_t ch); -int hal_flashc_enc_set_key(const uint32_t *aes_key, uint8_t ch); -int hal_flashc_enc_set_addr(uint32_t start_addr, uint32_t end_addr, uint8_t ch); - -Flashc_Enc_Cfg *get_flashc_enc_cfg(void); -#ifdef __cplusplus -} -#endif - -#endif /* __HAL_FLASHC_ENC_H__*/ diff --git a/src/platform/f133/include/hal/hal_gpio.h b/src/platform/f133/include/hal/hal_gpio.h deleted file mode 100644 index d35c33826e999a95b3e67c9b024e7dd9475e417d..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/hal_gpio.h +++ /dev/null @@ -1,149 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTYS TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERSSDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTYS TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __HAL_GPIO_H__ -#define __HAL_GPIO_H__ - -#include -#include -#include - -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -//#define CONFIG_DRIVERS_GPIO_DEBUG -#ifdef CONFIG_DRIVERS_GPIO_DEBUG -#define GPIO_INFO(fmt, arg...) hal_log_info(fmt, ##arg) -#else -#define GPIO_INFO(fmt, arg...) do {}while(0) -#endif - -#define GPIO_ERR(fmt, arg...) hal_log_err(fmt, ##arg) - -/**This enum defines the GPIO MUX function*/ -#if defined(CONFIG_SOC_SUN20IW1) || defined(CONFIG_ARCH_SUN8IW20) || defined(CONFIG_ARCH_SUN20IW2) || defined(CONFIG_ARCH_SUN20IW3) -typedef enum -{ - GPIO_MUXSEL_IN = 0, - GPIO_MUXSEL_OUT = 1, - GPIO_MUXSEL_FUNCTION2 = 2, - GPIO_MUXSEL_FUNCTION3 = 3, - GPIO_MUXSEL_FUNCTION4 = 4, - GPIO_MUXSEL_FUNCTION5 = 5, - GPIO_MUXSEL_FUNCTION6 = 6, - GPIO_MUXSEL_FUNCTION7 = 7, - GPIO_MUXSEL_FUNCTION8 = 8, - GPIO_MUXSEL_FUNCTION9 = 9, - GPIO_MUXSEL_FUNCTION10 = 10, - GPIO_MUXSEL_FUNCTION11 = 11, - GPIO_MUXSEL_FUNCTION12 = 12, - GPIO_MUXSEL_FUNCTION13 = 13, - GPIO_MUXSEL_EINT = 14, - GPIO_MUXSEL_DISABLED = 15, -} gpio_muxsel_t; -#else -typedef enum -{ - GPIO_MUXSEL_IN = 0, - GPIO_MUXSEL_OUT = 1, - GPIO_MUXSEL_FUNCTION2 = 2, - GPIO_MUXSEL_FUNCTION3 = 3, - GPIO_MUXSEL_FUNCTION4 = 4, - GPIO_MUXSEL_FUNCTION5 = 5, - GPIO_MUXSEL_EINT = 6, - GPIO_MUXSEL_DISABLED = 7, -} gpio_muxsel_t; -#endif - -typedef enum -{ - GPIO_DRIVING_LEVEL0 = 0, /**< Defines GPIO driving current as level0. */ - GPIO_DRIVING_LEVEL1 = 1, /**< Defines GPIO driving current as level1. */ - GPIO_DRIVING_LEVEL2 = 2, /**< Defines GPIO driving current as level2. */ - GPIO_DRIVING_LEVEL3 = 3 /**< Defines GPIO driving current as level3. */ -} gpio_driving_level_t; - -typedef enum -{ - GPIO_PULL_DOWN_DISABLED = 0, /**< Defines GPIO pull up and pull down disable. */ - GPIO_PULL_UP = 1, /**< Defines GPIO is pull up state. */ - GPIO_PULL_DOWN = 2, /**< Defines GPIO is pull down state. */ -} gpio_pull_status_t; - -/** This enum defines the GPIO direction. */ -typedef enum -{ - GPIO_DIRECTION_INPUT = 0, /**< GPIO input direction. */ - GPIO_DIRECTION_OUTPUT = 1 /**< GPIO output direction. */ -} gpio_direction_t; - -/** This enum defines the data type of GPIO. */ -typedef enum -{ - GPIO_DATA_LOW = 0, /**< GPIO data low. */ - GPIO_DATA_HIGH = 1 /**< GPIO data high. */ -} gpio_data_t; - -typedef enum -{ - POWER_MODE_330 = 0, - POWER_MODE_180 = 1 -} gpio_power_mode_t; - -bool hal_gpio_check_valid(gpio_pin_t pin); -int hal_gpio_get_data(gpio_pin_t pin, gpio_data_t *data); -int hal_gpio_set_data(gpio_pin_t pin, gpio_data_t data); -int hal_gpio_set_direction(gpio_pin_t pin, gpio_direction_t direction); -int hal_gpio_get_direction(gpio_pin_t pin, gpio_direction_t *direction); -int hal_gpio_set_pull(gpio_pin_t pin, gpio_pull_status_t pull); -int hal_gpio_get_pull(gpio_pin_t pin, gpio_pull_status_t *pull); -int hal_gpio_set_driving_level(gpio_pin_t pin, gpio_driving_level_t level); -int hal_gpio_get_driving_level(gpio_pin_t pin, gpio_driving_level_t *level); -int hal_gpio_pinmux_set_function(gpio_pin_t pin, gpio_muxsel_t function_index); -int hal_gpio_pinmux_get_function(gpio_pin_t pin, gpio_muxsel_t *function_index); -int hal_gpio_sel_vol_mode(gpio_pin_t pins, gpio_power_mode_t pm_sel); -int hal_gpio_set_debounce(gpio_pin_t pin, unsigned value); -int hal_gpio_to_irq(gpio_pin_t pin, uint32_t *irq); -int hal_gpio_irq_request(uint32_t irq, hal_irq_handler_t hdle, unsigned long flags, void *data); -int hal_gpio_irq_free(uint32_t irq); -int hal_gpio_irq_enable(uint32_t irq); -int hal_gpio_irq_disable(uint32_t irq); -int hal_gpio_init(void); - -#ifdef __cplusplus -} -#endif -#endif diff --git a/src/platform/f133/include/hal/hal_hwspinlock.h b/src/platform/f133/include/hal/hal_hwspinlock.h deleted file mode 100644 index 8e12f484134ead185e10a1f3e7d0aa03029280e6..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/hal_hwspinlock.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef __HW_SPIN_LOCK__ -#define __HW_SPIN_LOCK__ - -#define SPINLOCK_CLI_UART_LOCK_BIT (0) - -void hal_hwspinlock_init(void); -int hal_hwspinlock_put(int num); -int hal_hwspinlock_get(int num); -int hal_hwspinlock_check_taken(int num); - -extern void hal_hwspin_lock(int num); -extern void hal_hwspin_unlock(int num); - -#endif diff --git a/src/platform/f133/include/hal/hal_intc.h b/src/platform/f133/include/hal/hal_intc.h deleted file mode 100644 index 9ace6cc3c8b787aa43f7ad5e481ce2edf5c807c9..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/hal_intc.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef __HAL_INTC_H -#define __HAL_INTC_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include -#include - -/* INTC HAL API return status */ -typedef enum { - HAL_INTC_STATUS_OK = 0, - HAL_INTC_STATUS_FAIL = -1, -} hal_intc_status_t; - - -hal_intc_status_t hal_intc_init(uint32_t irq_no); - - -#ifdef __cplusplus -} -#endif - -#endif /* __HAL_INTC_H */ diff --git a/src/platform/f133/include/hal/hal_lcd_fb.h b/src/platform/f133/include/hal/hal_lcd_fb.h deleted file mode 100644 index 76249c55b106ecb7e21c6b56245fee577bd8632a..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/hal_lcd_fb.h +++ /dev/null @@ -1,125 +0,0 @@ -/* - * vendor/allwinner/r328/drivers/lichee/rtos/include/drivers/hal_lcd_fb/hal_lcd_fb.h - * - * Copyright (c) 2007-2019 Allwinnertech Co., Ltd. - * Author: zhengxiaobin - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ -#ifndef _HAL_LCD_FB_H -#define _HAL_LCD_FB_H - -#ifdef CONFIG_KERNEL_FREERTOS -#include -#else -#include -#endif -#include - -#ifdef __cplusplus -extern "C" { -#endif - -enum lcdfb_pixel_format { - LCDFB_FORMAT_ARGB_8888 = 0x00, /* MSB A-R-G-B LSB */ - LCDFB_FORMAT_ABGR_8888 = 0x01, - LCDFB_FORMAT_RGBA_8888 = 0x02, - LCDFB_FORMAT_BGRA_8888 = 0x03, - LCDFB_FORMAT_XRGB_8888 = 0x04, - LCDFB_FORMAT_XBGR_8888 = 0x05, - LCDFB_FORMAT_RGBX_8888 = 0x06, - LCDFB_FORMAT_BGRX_8888 = 0x07, - LCDFB_FORMAT_RGB_888 = 0x08, - LCDFB_FORMAT_BGR_888 = 0x09, - LCDFB_FORMAT_RGB_565 = 0x0a, - LCDFB_FORMAT_BGR_565 = 0x0b, - LCDFB_FORMAT_ARGB_4444 = 0x0c, - LCDFB_FORMAT_ABGR_4444 = 0x0d, - LCDFB_FORMAT_RGBA_4444 = 0x0e, - LCDFB_FORMAT_BGRA_4444 = 0x0f, - LCDFB_FORMAT_ARGB_1555 = 0x10, - LCDFB_FORMAT_ABGR_1555 = 0x11, - LCDFB_FORMAT_RGBA_5551 = 0x12, - LCDFB_FORMAT_BGRA_5551 = 0x13, -}; - -struct fb_var_info { - unsigned int xres; /* horizontal resolution */ - unsigned int yres; /* vertical resolution */ - unsigned int xres_virtual; - unsigned int yres_virtual; - unsigned int xoffset; /* horizontal resolution */ - unsigned int yoffset; /* vertical resolution */ - enum lcdfb_pixel_format lcd_pixel_fmt; - unsigned int bits_per_pixel; -}; - -struct fb_fix_info { - unsigned int line_length; /* line length*/ - unsigned int smem_len; /* line length*/ - unsigned int smem_start; /* line length*/ -}; - -struct fb_info { - struct fb_var_info var; - struct fb_fix_info fix; - void *screen_base; - -}; - -/** - * @name :bsp_disp_lcd_blank - * @brief :blank display - * @param[IN] :disp: id of lcd(return of disp_init_lcd) - * @param[IN] :en: 1 to blank, 0 to unblank - * @return :0 if success - */ -int bsp_disp_lcd_blank(unsigned int disp, unsigned int en); - -/** - * @name :bsp_disp_get_screen_width - * @brief :get the lcd width of lcd panel - * @param[IN] :disp: id of lcd(return of disp_init_lcd) - * @return :lcd width of lcd panel - */ -int bsp_disp_get_screen_width(unsigned int disp); - -/** - * @name :bsp_disp_get_screen_height - * @brief :get the lcd height of lcd panel - * @param[IN] :disp: id of lcd(return of disp_init_lcd) - * @return :lcd height of lcd panel - */ -int bsp_disp_get_screen_height(unsigned int disp); - -int bsp_disp_lcd_backlight_enable(unsigned int disp); - -int bsp_disp_lcd_backlight_disable(unsigned int disp); - -int bsp_disp_lcd_pwm_enable(unsigned int disp); - -int bsp_disp_lcd_pwm_disable(unsigned int disp); - -int bsp_disp_lcd_set_bright(unsigned int disp, unsigned int bright); - -int bsp_disp_lcd_get_bright(unsigned int disp); - -int bsp_disp_lcd_set_var(unsigned int disp, struct fb_info *p_info); - -int bsp_disp_lcd_set_layer(unsigned int disp, struct fb_info *p_info); - -s32 bsp_disp_lcd_wait_for_vsync(unsigned int disp); - -#ifdef __cplusplus -} -#endif - -#endif /*End of file*/ diff --git a/src/platform/f133/include/hal/hal_lpuart.h b/src/platform/f133/include/hal/hal_lpuart.h deleted file mode 100644 index 78301b509977da8e0e93ae1f3b30aad2fd049540..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/hal_lpuart.h +++ /dev/null @@ -1,236 +0,0 @@ -/** - * @file hal_lpuart.h - * @author XRADIO IOT WLAN Team - */ - -/* - * Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef SUNXI_HAL_LPUART_H -#define SUNXI_HAL_LPUART_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include -#include "sunxi_hal_common.h" -#include "hal_interrupt.h" -#ifdef CONFIG_COMPONENTS_PM -#include -#endif -/* - * include the platform uart header file. - */ -#include -#include "sdmmc/hal/rom_debug.h" - -#define OS_WAIT_FOREVER 0xffffffffU /* Wait forever timeout value */ -#define LPUART_RX_DATA_FLAG_BIT (1U << 9) -#define LPUART_RX_DATA_CMP_FLAG_BIT (1U << 7) - -/* This enum defines baud rate of the UART frame. */ -typedef enum -{ - LPUART_BAUDRATE_9600 = 0, - LPUART_BAUDRATE_MAX -} lpuart_baudrate_t; - -/* This enum defines word length of the UART frame. */ -typedef enum -{ - LPUART_WORD_LENGTH_4 = 0, - LPUART_WORD_LENGTH_5, - LPUART_WORD_LENGTH_6, - LPUART_WORD_LENGTH_7, - LPUART_WORD_LENGTH_8, - LPUART_WORD_LENGTH_9, -} lpuart_word_length_t; - -/* This enum defines smp bit of the UART frame. */ -typedef enum -{ - LPUART_MSB_BIT_0 = 0, - LPUART_MSB_BIT_1, -} lpuart_msb_bit_t; - -/* This enum defines parity of the LPUART frame. */ -typedef enum -{ - LPUART_PARITY_NONE = 0, - LPUART_PARITY_ODD, - LPUART_PARITY_EVEN, - LPUART_PARITY_SPACE, - LPUART_PARITY_MARK -} lpuart_parity_t; - -/* This struct defines UART configure parameters. */ -typedef struct -{ - lpuart_baudrate_t baudrate; - lpuart_word_length_t word_length; - lpuart_msb_bit_t msb_bit; - lpuart_parity_t parity; -} _lpuart_config_t; - -typedef enum -{ - LPUART_0 = 0, - LPUART_1 = 1, - LPUART_MAX, -} lpuart_port_t; - -typedef void (*lpuart_callback_t)(void *arg); - -typedef struct -{ - void *arg; - uint32_t irqn; - uint8_t bind_uart; - uint32_t rx_len; - uint32_t timeout; - hal_queue_t queue; - lpuart_port_t lpuart_port; - lpuart_callback_t func; -#ifdef CONFIG_COMPONENTS_PM - struct pm_device pm; -#endif -} lpuart_priv_t; - -typedef enum -{ - HAL_LPUART_STATUS_ERROR_PARAMETER = -4, /**< Invalid user input parameter. */ - HAL_LPUART_STATUS_ERROR_BUSY = -3, /**< LPUART port is currently in use. */ - HAL_LPUART_STATUS_ERROR_UNINITIALIZED = -2, /**< LPUART port has not been initialized. */ - HAL_LPUART_STATUS_ERROR = -1, /**< LPUART driver detected a common error. */ - HAL_LPUART_STATUS_OK = 0 /**< LPUART function executed successfully. */ -} hal_lpuart_status_t; - -/* LPUART->RX_CMP1,LPUART->RX_CMP2 R/W */ -#define LPUART_RX_CMP_DATA0_POS 3 -#define LPUART_RX_CMP_DATA1_POS 12 -#define LPUART_RX_CMP_DATA2_POS 21 -#define LPUART_RX_CMP_DATA3_POS 3 -#define LPUART_RX_CMP_DATA4_POS 12 - -typedef enum { - LPUART_RX_CMP_DATA_NUM_1 = 1, - LPUART_RX_CMP_DATA_NUM_2, - LPUART_RX_CMP_DATA_NUM_3, - LPUART_RX_CMP_DATA_NUM_4, - LPUART_RX_CMP_DATA_NUM_5, - LPUART_RX_CMP_DATA_NUM_MAX = 5, -} LPUART_RX_CMP_DATA_NUM; - -#define LPUART_RX_CMP_LEN_SHIFT 0 - -/* Exported functions --------------------------------------------------------*/ - - -/** - * @brief Initialize the LPUART - * @retval int32_t, HAL_OK on success - */ -int32_t hal_lpuart_init(lpuart_port_t lpuart_port); - -/** - * @brief DeInitialize the specified LPUART - * @param[in] lpuartID ID of the specified LPUART - * @retval int32_t, HAL_OK on success - */ -int32_t hal_lpuart_deinit(lpuart_port_t lpuart_port); - -int32_t hal_lpuart_control(lpuart_port_t lpuart_port, int cmd, void *args); -/** - * @brief Receive an amount of data in interrupt mode - * @param[in] lpuartID ID of the specified LPUART - * @param[out] buf Pointer to the data buffer - * @param[in] size The maximum number of bytes to be received. - * The actual received bytes can be less than this. - * @param[in] msec Timeout value in millisecond to receive data. - * HAL_WAIT_FOREVER for no timeout. - * @return Number of bytes received, -1 on error - * - * @note This function is not thread safe. If using the LPUART receive series - * functions in multi-thread, make sure they are executed exclusively. - */ -int32_t hal_lpuart_receive(int32_t dev, uint8_t *data, uint32_t num); - -/** - * @brief setup rx data compare function - * @param[in] lpuartID ID of the specified LPUART - * @param[in] cmp_len the length of compare data - * @param[in] cmp_data buffer point to compare data - * @retval int32_t, HAL_OK on success - * - * @note - */ -int32_t hal_lpuart_rx_cmp(lpuart_port_t lpuart_port, uint8_t cmp_len, uint8_t *cmp_data); -int32_t hal_lpuart_rx_cmp(lpuart_port_t lpuart_port, uint8_t cmp_len, uint8_t *cmp_data); -int32_t hal_lpuart_enable_rx_data(lpuart_port_t lpuart_port, lpuart_callback_t cb, void *arg); -int32_t hal_lpuart_disable_rx_data(lpuart_port_t lpuart_port); - -/** - * @brief Enable receive compare callback function for the specified LPUART - * @param[in] cb The LPUART receive ready callback function - * @param[in] arg Argument of the LPUART receive ready callback function - * @retval int32_t, HAL_OK on success - * - * @note To handle receive data externally, use this function to enable the - * receive ready callback function, then receive and process the data in - * the callback function. - * @note If the receive ready callback function is enabled, all other receive - * series functions cannot be used to receive data. - * @note This function is not thread safe. If using the LPUART receive series - * functions in multi-thread, make sure they are executed exclusively. - */ -int32_t hal_lpuart_enable_rx_cmp(lpuart_port_t lpuart_port, lpuart_callback_t cb, void *arg); - -/** - * @brief Disable receive compare callback function for the specified LPUART - * @param[in] lpuartID ID of the specified LPUART - * @retval int32_t, HAL_OK on success - */ -int32_t hal_lpuart_disable_rx_cmp(lpuart_port_t lpuart_port); - -/** - * @brief Set PM mode to be bypassed - * @param[in] lpuartID ID of the specified LPUART - * @param[in] mode Bit mask of PM mode to be bypassed - * @retval int32_t, HAL_OK on success - */ -int32_t HAL_LPUART_SetBypassPmMode(lpuart_port_t lpuart_port, uint8_t mode); -static hal_irqreturn_t lpuart_irq_handler(void *dev_id); - - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/hal/hal_msgbox.h b/src/platform/f133/include/hal/hal_msgbox.h deleted file mode 100644 index 6f0eb34001a4c9fa07f53e9a3e8058d29fa6fe68..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/hal_msgbox.h +++ /dev/null @@ -1,39 +0,0 @@ -#ifndef __MESSAGEBOX__H__ -#define __MESSAGEBOX__H__ - -#include - -enum cpu_type { - ARM_MSG_CORE, - RISC_V_MSG_CORE, - MIPS_MSG_CORE, - OPENRISC_MSG_CORE, - DSP0_MSG_CORE, - DSP1_MSG_CORE, -}; - -struct msg_endpoint { - int32_t local_amp; - int32_t remote_amp; - int32_t write_ch; - int32_t read_ch; - struct msg_endpoint *next; - void *data; - void (*rec)(uint32_t l, void *d); - void (*tx_done)(void *d); - /* use in driver */ - void *private; -}; - -uint32_t hal_msgbox_init(void); - -uint32_t hal_msgbox_alloc_channel(struct msg_endpoint *edp, int32_t remote, - int32_t read, int32_t write); - -uint32_t hal_msgbox_channel_send(struct msg_endpoint *edp, uint8_t *bf, - uint32_t len); - -void hal_msgbox_free_channel(struct msg_endpoint *edp); - -#endif /* __MESSAGEBOX__H__ */ - diff --git a/src/platform/f133/include/hal/hal_prcm.h b/src/platform/f133/include/hal/hal_prcm.h deleted file mode 100644 index d05bda84c00ee785d4bd895601b5ae76aa8ce97b..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/hal_prcm.h +++ /dev/null @@ -1,431 +0,0 @@ -/* -********************************************************************************************************* -* AR100 SYSTEM -* AR100 Software System Develop Kits -* clock control unit module -* -* (c) Copyright 2012-2016, Sunny China -* All Rights Reserved -* -* File : prcm.h -* By : Sunny -* Version : v1.0 -* Date : 2012-4-28 -* Descript: clock control unit public header. -* Update : date auther ver notes -* 2012-4-28 14:48:38 Sunny 1.0 Create this file. -********************************************************************************************************* -*/ - -#ifndef __PRCM_H__ -#define __PRCM_H__ - -#include -#include -#include - -/* the clock status of on-off */ -typedef enum ccu_clk_onoff { - CCU_CLK_OFF = 0x0, /* clock off status */ - CCU_CLK_ON = 0x1, /* clock on status */ -} ccu_clk_onff_e; - -/* the clock status of reset */ -typedef enum ccu_clk_reset { - CCU_CLK_RESET = 0x0, /* reset valid status */ - CCU_CLK_NRESET = 0x1, /* reset invalid status */ -} ccu_clk_reset_e; - -/* command for call-back function of clock change */ -typedef enum ccu_clk_cmd { - CCU_CLK_CLKCHG_REQ = 0x0, /* command for notify that clock will change */ - CCU_CLK_CLKCHG_DONE, /* command for notify that clock change finish */ -} ccu_clk_cmd_e; - -/* command for call-back function of 24M hosc on-off */ -typedef enum ccu_hosc_cmd { - CCU_HOSC_ON_READY_NOTIFY = 0x0, /* command for notify that 24mhosc power-on already */ - CCU_HOSC_WILL_OFF_NOTIFY, /* command for notify that 24mhosc will off */ -} ccu_hosc_cmd_e; - -/* the state of power-off gating */ -typedef enum poweroff_gating_state { - CCU_POWEROFF_GATING_INVALID = 0x0, - CCU_POWEROFF_GATING_VALID = 0x1, -} poweroff_gating_state_e; - -/* source clocks ID */ -typedef enum ccu_src_clk { - CCU_SYS_CLK_NONE = 0x0, /* invalid source clock id */ - - CCU_SYS_CLK_LOSC, /* LOSC, 33/50/67:32768Hz, 73:16MHz/512=31250 */ - CCU_SYS_CLK_IOSC, /* InternalOSC, 33/50/67:700KHZ, 73:16MHz */ - CCU_SYS_CLK_HOSC, /* HOSC, 24MHZ clock */ - CCU_SYS_CLK_AXI, /* AXI clock */ - CCU_SYS_CLK_16M, /* 16M for the backdoor */ - - CCU_SYS_CLK_PLL1, /* PLL1 clock */ - CCU_SYS_CLK_PLL2, /* PLL2 clock */ - CCU_SYS_CLK_PLL3, /* PLL3 clock */ - CCU_SYS_CLK_PLL4, /* PLL4 clock */ - CCU_SYS_CLK_PLL5, /* PLL5 clock */ - CCU_SYS_CLK_PLL6, /* PLL6 clock */ - CCU_SYS_CLK_PLL7, /* PLL7 clock */ - CCU_SYS_CLK_PLL8, /* PLL8 clock */ - CCU_SYS_CLK_PLL9, /* PLL9 clock */ - CCU_SYS_CLK_PLL10, /* PLL10 clock */ - CCU_SYS_CLK_PLL11, /* PLL10 clock */ - - CCU_SYS_CLK_AUDIO0, /* AUDIO0 clock */ - CCU_SYS_CLK_AUDIO1, /* AUDIO1 clock */ - - CCU_SYS_CLK_CPUS, /* cpus clock */ - CCU_SYS_CLK_C0, /* cluster0 clock */ - CCU_SYS_CLK_C1, /* cluster1 clock */ - CCU_SYS_CLK_DDR0, /* ddr0 clock */ - CCU_SYS_CLK_DDR1, /* ddr1 clock */ - CCU_SYS_CLK_PERI0, /* peri0 clock */ - CCU_SYS_CLK_PERI1, /* peri1 clock */ - CCU_SYS_CLK_AXI0, /* AXI0 clock */ - CCU_SYS_CLK_AXI1, /* AXI0 clock */ - CCU_SYS_CLK_AHB0, /* AHB0 clock */ - CCU_SYS_CLK_AHB1, /* AHB1 clock */ - CCU_SYS_CLK_AHB2, /* AHB2 clock */ - CCU_SYS_CLK_APB0, /* APB0 clock */ - CCU_SYS_CLK_APB1, /* APB1 clock */ - CCU_SYS_CLK_APB2, /* APB2 clock */ - CCU_SYS_CLK_AHB3, /* AHB3 clock */ - CCU_SYS_CLK_PSI, /* PSI clock */ - CCU_SYS_CLK_AHBS, /* AHBS clock */ - CCU_SYS_CLK_APBS1, /* APBS1 clock */ - CCU_SYS_CLK_APBS2, /* APBS2 clock */ -} ccu_sys_clk_e; - -/* module clocks ID */ -typedef enum ccu_mod_clk { - CCU_MOD_CLK_NONE, - - CCU_MOD_CLK_CPUS, - CCU_MOD_CLK_AHB0, - CCU_MOD_CLK_APB0, - - CCU_MOD_CLK_C0, - CCU_MOD_CLK_C1, - CCU_MOD_CLK_CPU0, - CCU_MOD_CLK_CPU1, - CCU_MOD_CLK_CPU2, - CCU_MOD_CLK_CPU3, - CCU_MOD_CLK_AHB1, - CCU_MOD_CLK_AHB2, - CCU_MOD_CLK_APB1, - CCU_MOD_CLK_APB2, - CCU_MOD_CLK_DMA, - CCU_MOD_CLK_SDRAM, - CCU_MOD_CLK_SPINLOCK, - CCU_MOD_CLK_MSGBOX, - CCU_MOD_CLK_MSGBOX0, - CCU_MOD_CLK_MSGBOX1, - CCU_MOD_CLK_MSGBOXR, - CCU_MOD_CLK_AHB1_SS, - CCU_MOD_CLK_AXI, - CCU_MOD_CLK_AXI0, - CCU_MOD_CLK_AXI1, - CCU_MOD_CLK_R_DMA, - CCU_MOD_CLK_R_DMA_MCLK, - CCU_MOD_CLK_R_ONEWIRE_SP, - CCU_MOD_CLK_R_CIR_SP, - CCU_MOD_CLK_R_TH, - CCU_MOD_CLK_R_ONEWIRE, - CCU_MOD_CLK_R_UART, - CCU_MOD_CLK_R_UART1, - CCU_MOD_CLK_R_UART2, - CCU_MOD_CLK_R_UART3, - CCU_MOD_CLK_R_UART4, - CCU_MOD_CLK_R_TIMER0_1, - CCU_MOD_CLK_R_P2WI, - CCU_MOD_CLK_R_RSB, - CCU_MOD_CLK_R_TWI, - CCU_MOD_CLK_R_TWI0, - CCU_MOD_CLK_R_TWI1, - CCU_MOD_CLK_R_TWI2, - CCU_MOD_CLK_R_CIR, - CCU_MOD_CLK_R_PIO, - CCU_MOD_CLK_R_VM, - CCU_MOD_CLK_R_THS, - CCU_MOD_CLK_R_LRADC, - - CCU_MOD_CLK_R_LPSD, - CCU_MOD_CLK_R_MAD, - CCU_MOD_CLK_R_MAD_SRAM, - CCU_MOD_CLK_R_MAD_CFG, - - CCU_MOD_CLK_R_AC_ADC, - CCU_MOD_CLK_R_AC_DAC, - CCU_MOD_CLK_R_AUDIO_CODEC, - CCU_MOD_CLK_R_DMIC, - CCU_MOD_CLK_R_I2S0, - CCU_MOD_CLK_R_I2S0_ASRC, - CCU_MOD_CLK_R_I2S1, - - CCU_MOD_CLK_VDD_SYS, - CCU_MOD_CLK_CCI400, - CCU_MOD_CLK_PSI, - CCU_MOD_CLK_AHB3, - CCU_MOD_CLK_AHBS, - CCU_MOD_CLK_APBS1, - CCU_MOD_CLK_APBS2, - CCU_MOD_CLK_R_RTC, - CCU_MOD_CLK_R_CPUSCFG, - CCU_MOD_CLK_R_PRCM, - CCU_MOD_CLK_R_WDG, - CCU_MOD_CLK_R_TWD, - CCU_MOD_CLK_R_PWM, - CCU_MOD_CLK_R_SPI, - CCU_MOD_CLK_R_INTC, - CCU_MOD_CLK_CPU_APB, -} ccu_mod_clk_e; - -/* the power control modules */ -typedef enum power_control_module { - /* cpux power controls */ - PWRCTL_C0CPUX, - PWRCTL_C0CPU0, - PWRCTL_C0CPU1, - PWRCTL_C0CPU2, - PWRCTL_C0CPU3, - - PWRCTL_C1CPUX, - PWRCTL_C1CPU0, - PWRCTL_C1CPU1, - PWRCTL_C1CPU2, - PWRCTL_C1CPU3, - - /* vdd-sys power controls */ - PWRCTL_VDD_CPUX_GPIO_PAD_HOLD, - PWRCTL_VDD_CPUS, - PWRCTL_VDD_AVCC_A, - PWRCTL_VCC_PLL, - PWRCTL_VCC_PLL_LOW_VOLT, - - /* gpu power control */ - PWRCTL_GPU, - PWRCTL_SYS2VDD_USB3, - PWRCTL_SYS2VDD_USB0, -} power_control_module_e; - -/* -********************************************************************************************************* -* INITIALIZE CCU -* -* Description: initialize clock control unit. -* -* Arguments : none. -* -* Returns : OK if initialize ccu succeeded, others if failed. -********************************************************************************************************* -*/ -s32 ccu_init(void); - -/* -********************************************************************************************************* -* EXIT CCU -* -* Description: exit clock control unit. -* -* Arguments : none. -* -* Returns : OK if exit ccu succeeded, others if failed. -********************************************************************************************************* -*/ -s32 ccu_exit(void); - - -void ccu_iosc_freq_update(void); -/* -********************************************************************************************************* -* SET SOURCE FREQUENCY -* -* Description: set the frequency of a specific source clock. -* -* Arguments : sclk : the source clock ID which we want to set frequency. -* freq : the frequency which we want to set. -* -* Returns : OK if set source frequency succeeded, others if failed. -********************************************************************************************************* -*/ -s32 ccu_set_sclk_freq(u32 sclk, u32 freq); - -/* -********************************************************************************************************* -* GET SOURCE FREQUENCY -* -* Description: get the frequency of a specific source clock. -* -* Arguments : sclk : the source clock ID which we want to get frequency. -* -* Returns : frequency of the specific source clock. -********************************************************************************************************* -*/ -u32 ccu_get_sclk_freq(u32 sclk); - -s32 ccu_set_sclk_onoff(u32 sclk, s32 onoff); - -/* -********************************************************************************************************* -* REGISTER MODULE CB -* -* Description: register call-back for module clock, when the source frequency -* of the module clock changed, it will use this call-back to notify -* module driver. -* -* Arguments : mclk : the module clock ID which we want to register call-back. -* pcb : the call-back which we want to register. -* -* Returns : OK if register call-back succeeded, others if failed. -********************************************************************************************************* -*/ -s32 ccu_reg_mclk_cb(u32 mclk, __pNotifier_t pcb); - -/* -********************************************************************************************************* -* UNREGISTER MODULE CB -* -* Description: unregister call-back for module clock. -* -* Arguments : mclk : the module clock ID which we want to unregister call-back. -* pcb : the call-back which we want to unregister. -* -* Returns : OK if unregister call-back succeeded, others if failed. -********************************************************************************************************* -*/ -s32 ccu_unreg_mclk_cb(u32 mclk, __pNotifier_t pcb); - -/* -********************************************************************************************************* -* SET SOURCE OF MODULE CLOCK -* -* Description: set the source of a specific module clock. -* -* Arguments : mclk : the module clock ID which we want to set source. -* sclk : the source clock ID whick we want to set as source. -* -* Returns : OK if set source succeeded, others if failed. -********************************************************************************************************* -*/ -s32 ccu_set_mclk_src(u32 mclk, u32 sclk); - -/* -********************************************************************************************************* -* GET SOURCE OF MODULE CLOCK -* -* Description: get the source of a specific module clock. -* -* Arguments : mclk : the module clock ID which we want to get source. -* -* Returns : the source clock ID of source clock. -********************************************************************************************************* -*/ -s32 ccu_get_mclk_src(u32 mclk); - -/* -********************************************************************************************************* -* SET DIVIDER OF MODULE CLOCK -* -* Description: set the divider of a specific module clock. -* -* Arguments : mclk : the module clock ID which we want to set divider. -* div : the divider whick we want to set as source. -* -* Returns : OK if set divider succeeded, others if failed. -********************************************************************************************************* -*/ -s32 ccu_set_mclk_div(u32 mclk, u32 div); - -/* -********************************************************************************************************* -* GET DIVIDER OF MODULE CLOCK -* -* Description: get the divider of a specific module clock. -* -* Arguments : mclk : the module clock ID which we want to get divider. -* -* Returns : the divider of the specific module clock. -********************************************************************************************************* -*/ -s32 ccu_get_mclk_div(u32 mclk); - -/* -********************************************************************************************************* -* SET ON-OFF STATUS OF MODULE CLOCK -* -* Description: set the on-off status of a specific module clock. -* -* Arguments : mclk : the module clock ID which we want to set on-off status. -* onoff : the on-off status which we want to set, the detail please -* refer to the clock status of on-off. -* -* Returns : OK if set module clock on-off status succeeded, others if failed. -********************************************************************************************************* -*/ -s32 ccu_set_mclk_onoff(u32 mclk, s32 onoff); - -/* -********************************************************************************************************* -* SET RESET STATUS OF MODULE CLOCK -* -* Description: set the reset status of a specific module clock. -* -* Arguments : mclk : the module clock ID which we want to set reset status. -* reset : the reset status which we want to set, the detail please -* refer to the clock status of reset. -* -* Returns : OK if set module clock reset status succeeded, others if failed. -********************************************************************************************************* -*/ -s32 ccu_set_mclk_reset(u32 mclk, s32 reset); - -/* -********************************************************************************************************* -* SET POWER OFF STATUS OF HWMODULE -* -* Description: set the power off gating status of a specific module. -* -* Arguments : module : the module ID which we want to set power off gating status. -* status : the power off status which we want to set, the detail please -* refer to the status of power-off gating. -* -* Returns : OK if set module power off gating status succeeded, others if failed. -********************************************************************************************************* -*/ -s32 ccu_set_poweroff_gating_state(s32 module, s32 state); - -/* -********************************************************************************************************* -* RESET MODULE -* -* Description: reset a specific module. -* -* Arguments : module : the module clock ID which we want to reset. -* -* Returns : OK if reset module succeeded, others if failed. -********************************************************************************************************* -*/ -s32 ccu_reset_module(u32 mclk); - -s32 ccu_24mhosc_disable(void); -s32 ccu_24mhosc_enable(void); -s32 ccu_24mhosc_reg_cb(__pNotifier_t pcb); -s32 is_hosc_lock(void); - -static inline void save_state_flag(u32 value) -{ -// hal_writel(value, RTC_RECORD_REG); -} - -extern u32 iosc_freq; -extern u32 losc_freq; -void osc_freq_init(void); -void osc_freq_filter(void); - -#endif /* __PRCM_H__ */ - diff --git a/src/platform/f133/include/hal/hal_reset.h b/src/platform/f133/include/hal/hal_reset.h deleted file mode 100644 index e123ed7495042743a37ddf0650c33324fb88c30b..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/hal_reset.h +++ /dev/null @@ -1,85 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2016 Maxime Ripard. All rights reserved. - */ - -#ifndef _HAL_RESET_H_ -#define _HAL_RESET_H_ - -#include -#include -#include - -typedef enum { - HAL_SUNXI_RESET = 0, - HAL_SUNXI_R_RESET, - HAL_SUNXI_DSP_RESET, - HAL_SUNXI_AON_RESET, - HAL_SUNXI_RESET_NUMBER, -} hal_reset_type_t; - -typedef u32 hal_reset_id_t; - -struct reset_control_dev; - -/** - * struct reset_control_ops - reset controller driver callbacks - * - * @reset: for self-deasserting resets, does all necessary - * things to reset the device - * @assert: manually assert the reset line, if supported - * @deassert: manually deassert the reset line, if supported - * @status: return the status of the reset line, if supported - */ -struct reset_control_ops { - int (*reset)(struct reset_control_dev *rcdev, hal_reset_id_t id); - int (*assert)(struct reset_control_dev *rcdev, hal_reset_id_t id); - int (*deassert)(struct reset_control_dev *rcdev, hal_reset_id_t id); - int (*status)(struct reset_control_dev *rcdev, hal_reset_id_t id); -}; -/** - * struct reset_control - reset controller entity that might - * provide multiple reset controls - * @ops: a pointer to device specific struct reset_control_ops - * @owner: kernel module of the reset controller driver - * @list: internal list of reset controller devices - * @reset_control_head: head of internal list of requested reset controls - * @dev: corresponding driver model device struct - * @of_node: corresponding device tree node as phandle target - * @of_reset_n_cells: number of cells in reset line specifiers - * @of_xlate: translation function to translate from specifier as found in the - * device tree to id as given to the reset control ops - * @nr_resets: number of reset controls in this reset controller device - */ -struct reset_control_dev { - const struct reset_control_ops *ops; - hal_reset_type_t type; - u32 nr_resets; - struct list_head node; -}; - -struct reset_control { - struct reset_control_dev *rcdev; - u32 enable_count; - hal_reset_id_t id; -}; - -int reset_control_register(struct reset_control_dev *rcdev); //for reset system - -int reset_control_unregister(struct reset_control *reset); //for reset system - -struct reset_control *hal_reset_control_get(hal_reset_type_t type, hal_reset_id_t id); - -int hal_reset_control_put(struct reset_control *reset); - -int hal_reset_control_set(struct reset_control *reset); //for other module - -int hal_reset_control_deassert(struct reset_control *reset); //for other module - -int hal_reset_control_assert(struct reset_control *reset); //for other_module - -int hal_reset_control_reset(struct reset_control *reset); //for other_module - -int hal_reset_control_status(struct reset_control *reset); //for other_module - -#endif diff --git a/src/platform/f133/include/hal/hal_uart.h b/src/platform/f133/include/hal/hal_uart.h deleted file mode 100644 index 39d4597cc379c9107bf69b8b8cc7de39c7bb0da6..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/hal_uart.h +++ /dev/null @@ -1,452 +0,0 @@ -/* - * =========================================================================================== - * - * Filename: hal_uart.h - * - * Description: UART HAL definition. - * - * Version: Melis3.0 - * Create: 2019-11-14 11:11:56 - * Revision: none - * Compiler: GCC:version 9.2.1 20170904 (release),SUNXI_HAL/embedded-7-branch revision 255204 - * - * Author: bantao@allwinnertech.com - * Organization: SWC-BPD - * Last Modified: 2020-04-02 19:39:41 - * - * =========================================================================================== - */ - -#ifndef SUNXI_HAL_UART_H -#define SUNXI_HAL_UART_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -#ifdef CONFIG_STANDBY -#include -#endif -#include "sunxi_hal_common.h" -/* - * include the platform uart header file. - */ -#include - -/* - * This enum defines return status of the UART HAL public API. - * User should check return value after calling these APIs. - */ -typedef enum -{ - HAL_UART_STATUS_ERROR_PARAMETER = -4, /**< Invalid user input parameter. */ - HAL_UART_STATUS_ERROR_BUSY = -3, /**< UART port is currently in use. */ - HAL_UART_STATUS_ERROR_UNINITIALIZED = -2, /**< UART port has not been initialized. */ - HAL_UART_STATUS_ERROR = -1, /**< UART driver detected a common error. */ - HAL_UART_STATUS_OK = 0 /**< UART function executed successfully. */ -} hal_uart_status_t; - -typedef enum -{ - UART_0 = 0, - UART_1, - UART_2, - UART_3, - UART_4, - UART_5, - UART_MAX, -} uart_port_t; - -/* This enum defines baud rate of the UART frame. */ -typedef enum -{ - UART_BAUDRATE_300 = 0, - UART_BAUDRATE_600, - UART_BAUDRATE_1200, - UART_BAUDRATE_2400, - UART_BAUDRATE_4800, - UART_BAUDRATE_9600, - UART_BAUDRATE_19200, - UART_BAUDRATE_38400, - UART_BAUDRATE_57600, - UART_BAUDRATE_115200, - UART_BAUDRATE_230400, - UART_BAUDRATE_576000, - UART_BAUDRATE_921600, - UART_BAUDRATE_1000000, - UART_BAUDRATE_1500000, - UART_BAUDRATE_3000000, - UART_BAUDRATE_4000000, - UART_BAUDRATE_MAX, -} uart_baudrate_t; - -/* This enum defines word length of the UART frame. */ -typedef enum -{ - UART_WORD_LENGTH_5 = 0, - UART_WORD_LENGTH_6, - UART_WORD_LENGTH_7, - UART_WORD_LENGTH_8, -} uart_word_length_t; - -/* This enum defines stop bit of the UART frame. */ -typedef enum -{ - UART_STOP_BIT_1 = 0, - UART_STOP_BIT_2, -} uart_stop_bit_t; - -/* This enum defines parity of the UART frame. */ -typedef enum -{ - UART_PARITY_NONE = 0, - UART_PARITY_ODD, - UART_PARITY_EVEN -} uart_parity_t; - -/* This struct defines UART configure parameters. */ -typedef struct -{ - uart_baudrate_t baudrate; - uart_word_length_t word_length; - uart_stop_bit_t stop_bit; - uart_parity_t parity; -} _uart_config_t; - - -/* UART HAL Layer API Version */ -#define SUNXI_HAL_UART_API_VERSION SUNXI_HAL_VERSION_MAJOR_MINOR(1, 0) - -/* Driver version */ -#define SUNXI_HAL_UART_DRV_VERSION SUNXI_HAL_VERSION_MAJOR_MINOR(1, 0) - -//======================================reg==========================================================// -#define UART_INVAL_DATA_IND (0xffffffff) - -#ifndef BIT -#define BIT(nr) (1UL << (nr)) -#endif - -//=================================reg===================================================// -/* - * brief UART Status - */ -typedef struct sunxi_hal_uart_status -{ - uint32_t tx_busy : 1; ///< Transmitter busy flag - uint32_t rx_busy : 1; ///< Receiver busy flag - uint32_t tx_underflow : 1; ///< Transmit data underflow detected (cleared on start of next send operation) - uint32_t rx_overflow : 1; ///< Receive data overflow detected (cleared on start of next receive operation) - uint32_t rx_break : 1; ///< Break detected on receive (cleared on start of next receive operation) - uint32_t rx_framing_error : 1; ///< Framing error detected on receive (cleared on start of next receive operation) - uint32_t rx_parity_error : 1; ///< Parity error detected on receive (cleared on start of next receive operation) - uint32_t reserved : 25; -} sunxi_hal_uart_status_t; - -/* - *brief UART Modem Control - */ -typedef enum sunxi_hal_uart_modem_control -{ - SUNXI_HAL_UART_RTS_CLEAR, ///< Deactivate RTS - SUNXI_HAL_UART_RTS_SET, ///< Activate RTS - SUNXI_HAL_UART_DTR_CLEAR, ///< Deactivate DTR - SUNXI_HAL_UART_DTR_SET ///< Activate DTR -} sunxi_hal_uart_modem_control_e; - -/* - *brief UART Modem Status - */ -typedef struct sunxi_hal_uart_modem_status -{ - uint32_t cts : 1; ///< CTS state: 1=Active, 0=Inactive - uint32_t dsr : 1; ///< DSR state: 1=Active, 0=Inactive - uint32_t dcd : 1; ///< DCD state: 1=Active, 0=Inactive - uint32_t ri : 1; ///< RI state: 1=Active, 0=Inactive - uint32_t reserved : 28; -} sunxi_hal_uart_modem_status_t; - -/****** UART Event *****/ -#define SUNXI_HAL_UART_EVENT_SEND_COMPLETE (1UL << 0) ///< Send completed; however UART may still transmit data -#define SUNXI_HAL_UART_EVENT_RECEIVE_COMPLETE (1UL << 1) ///< Receive completed -#define SUNXI_HAL_UART_EVENT_TRANSFER_COMPLETE (1UL << 2) ///< Transfer completed -#define SUNXI_HAL_UART_EVENT_TX_COMPLETE (1UL << 3) ///< Transmit completed (optional) -#define SUNXI_HAL_UART_EVENT_TX_UNDERFLOW (1UL << 4) ///< Transmit data not available (Synchronous Slave) -#define SUNXI_HAL_UART_EVENT_RX_OVERFLOW (1UL << 5) ///< Receive data overflow -#define SUNXI_HAL_UART_EVENT_RX_TIMEOUT (1UL << 6) ///< Receive character timeout (optional) -#define SUNXI_HAL_UART_EVENT_RX_BREAK (1UL << 7) ///< Break detected on receive -#define SUNXI_HAL_UART_EVENT_RX_FRAMING_ERROR (1UL << 8) ///< Framing error detected on receive -#define SUNXI_HAL_UART_EVENT_RX_PARITY_ERROR (1UL << 9) ///< Parity error detected on receive -#define SUNXI_HAL_UART_EVENT_CTS (1UL << 10) ///< CTS state changed (optional) -#define SUNXI_HAL_UART_EVENT_DSR (1UL << 11) ///< DSR state changed (optional) -#define SUNXI_HAL_UART_EVENT_DCD (1UL << 12) ///< DCD state changed (optional) -#define SUNXI_HAL_UART_EVENT_RI (1UL << 13) ///< RI state changed (optional) - - - - -/* This enum defines the UART event when an interrupt occurs. */ -typedef enum -{ - UART_EVENT_TRANSACTION_ERROR = -1, - UART_EVENT_RX_BUFFER_ERROR = -2, - UART_EVENT_TX_COMPLETE = 1, - UART_EVENT_RX_COMPLETE = 2, -} uart_callback_event_t; - -/** @brief This typedef defines user's callback function prototype. - * This callback function will be called in UART interrupt handler when UART interrupt is raised. - * User should call uart_register_callback() to register callbacks to UART driver explicitly. - * Note, that the callback function is not appropriate for time-consuming operations. \n - * parameter "event" : for more information, please refer to description of #uart_callback_event_t. - * parameter "user_data" : a user defined data used in the callback function. - */ -typedef void (*uart_callback_t)(uart_callback_event_t event, void *user_data); - -typedef struct -{ - uint8_t *buf; - uint32_t len; - uint32_t head; - uint32_t tail; - int32_t cnt; -} uart_ring_buf_t; - -/* This struct defines UART private data */ -typedef struct -{ - /* basic info */ - uart_port_t uart_port; - uint32_t irqn; - - /* uart register value */ - unsigned char ier; - unsigned char lcr; - unsigned char mcr; - unsigned char fcr; - unsigned char dll; - unsigned char dlh; - - /* tx & rx buf */ - const char *tx_buf; - uint32_t tx_buf_size; - /* rx ring buf */ - uart_ring_buf_t ring_buf; - - /* user callback */ - uart_callback_t func; - void *arg; -#ifdef CONFIG_STANDBY - struct dev_pm *pm; -#endif -#ifdef CONFIG_COMPONENTS_PM - _uart_config_t *uart_config; -#endif -} uart_priv_t; - -/** - \fn sunxi_hal_version_t SUNXI_HAL_UART_GetVersion (void) - \brief Get driver version. - \return \ref sunxi_hal_version_t - - \fn SUNXI_HAL_UART_CAPABILITIES SUNXI_HAL_UART_GetCapabilities (void) - \brief Get driver capabilities - \return \ref SUNXI_HAL_UART_CAPABILITIES - - \fn int32_t SUNXI_HAL_UART_Initialize (SUNXI_HAL_UART_SignalEvent_t cb_event) - \brief Initialize UART Interface. - \param[in] cb_event Pointer to \ref SUNXI_HAL_UART_SignalEvent - \return \ref execution_status - - \fn int32_t SUNXI_HAL_UART_Uninitialize (void) - \brief De-initialize UART Interface. - \return \ref execution_status - - \fn int32_t SUNXI_HAL_UART_PowerControl (SUNXI_HAL_POWER_STATE state) - \brief Control UART Interface Power. - \param[in] state Power state - \return \ref execution_status - - \fn int32_t SUNXI_HAL_UART_Send (const void *data, uint32_t num) - \brief Start sending data to UART transmitter. - \param[in] data Pointer to buffer with data to send to UART transmitter - \param[in] num Number of data items to send - \return \ref execution_status - - \fn int32_t SUNXI_HAL_UART_Receive (void *data, uint32_t num) - \brief Start receiving data from UART receiver. - \param[out] data Pointer to buffer for data to receive from UART receiver - \param[in] num Number of data items to receive - \return \ref execution_status - - \fn int32_t SUNXI_HAL_UART_Transfer (const void *data_out, - void *data_in, - uint32_t num) - \brief Start sending/receiving data to/from UART transmitter/receiver. - \param[in] data_out Pointer to buffer with data to send to UART transmitter - \param[out] data_in Pointer to buffer for data to receive from UART receiver - \param[in] num Number of data items to transfer - \return \ref execution_status - - \fn uint32_t SUNXI_HAL_UART_GetTxCount (void) - \brief Get transmitted data count. - \return number of data items transmitted - - \fn uint32_t SUNXI_HAL_UART_GetRxCount (void) - \brief Get received data count. - \return number of data items received - - \fn int32_t SUNXI_HAL_UART_Control (uint32_t control, uint32_t arg) - \brief Control UART Interface. - \param[in] control Operation - \param[in] arg Argument of operation (optional) - \return common \ref execution_status and driver specific \ref uart_execution_status - - \fn SUNXI_HAL_UART_STATUS SUNXI_HAL_UART_GetStatus (void) - \brief Get UART status. - \return UART status \ref SUNXI_HAL_UART_STATUS - - \fn int32_t SUNXI_HAL_UART_SetModemControl (SUNXI_HAL_UART_MODEM_CONTROL control) - \brief Set UART Modem Control line state. - \param[in] control \ref SUNXI_HAL_UART_MODEM_CONTROL - \return \ref execution_status - - \fn SUNXI_HAL_UART_MODEM_STATUS SUNXI_HAL_UART_GetModemStatus (void) - \brief Get UART Modem Status lines state. - \return modem status \ref SUNXI_HAL_UART_MODEM_STATUS - - \fn void SUNXI_HAL_UART_SignalEvent (uint32_t event) - \brief Signal UART Events. - \param[in] event \ref UART_events notification mask - \return none -*/ - -typedef void (*sunxi_hal_uart_signal_event_t)(uint32_t event); ///< Pointer to \ref SUNXI_HAL_UART_SignalEvent : Signal UART Event. - -/** -\brief UART Device Driver Capabilities. -*/ -typedef struct sunxi_hal_uart_capabilities -{ - uint32_t asynchronous : 1; ///< supports UART (Asynchronous) mode - uint32_t synchronous_master : 1; ///< supports Synchronous Master mode - uint32_t synchronous_slave : 1; ///< supports Synchronous Slave mode - uint32_t single_wire : 1; ///< supports UART Single-wire mode - uint32_t irda : 1; ///< supports UART IrDA mode - uint32_t smart_card : 1; ///< supports UART Smart Card mode - uint32_t smart_card_clock : 1; ///< Smart Card Clock generator available - uint32_t flow_control_rts : 1; ///< RTS Flow Control available - uint32_t flow_control_cts : 1; ///< CTS Flow Control available - uint32_t event_tx_complete : 1; ///< Transmit completed event: \ref SUNXI_HAL_UART_EVENT_TX_COMPLETE - uint32_t event_rx_timeout : 1; ///< Signal receive character timeout event: \ref SUNXI_HAL_UART_EVENT_RX_TIMEOUT - uint32_t rts : 1; ///< RTS Line: 0=not available, 1=available - uint32_t cts : 1; ///< CTS Line: 0=not available, 1=available - uint32_t dtr : 1; ///< DTR Line: 0=not available, 1=available - uint32_t dsr : 1; ///< DSR Line: 0=not available, 1=available - uint32_t dcd : 1; ///< DCD Line: 0=not available, 1=available - uint32_t ri : 1; ///< RI Line: 0=not available, 1=available - uint32_t event_cts : 1; ///< Signal CTS change event: \ref SUNXI_HAL_UART_EVENT_CTS - uint32_t event_dsr : 1; ///< Signal DSR change event: \ref SUNXI_HAL_UART_EVENT_DSR - uint32_t event_dcd : 1; ///< Signal DCD change event: \ref SUNXI_HAL_UART_EVENT_DCD - uint32_t event_ri : 1; ///< Signal RI change event: \ref SUNXI_HAL_UART_EVENT_RI - uint32_t reserved : 11; ///< Reserved (must be zero) -} sunxi_hal_uart_capabilities_t; - -typedef struct sunxi_hal_driver_usart -{ - - ///< Pointer to \ref SUNXI_HAL_USART_GetVersion : Get driver version. - sunxi_hal_version_t (*get_version)(int32_t dev); - - ///< Pointer to \ref SUNXI_HAL_USART_GetCapabilities : Get driver capabilities. - sunxi_hal_uart_capabilities_t (*get_capabilities)(int32_t dev); - - ///< Pointer to \ref SUNXI_HAL_USART_Initialize : Initialize USART Interface. - int32_t (*initialize)(int32_t uart_port); - - ///< Pointer to \ref SUNXI_HAL_USART_Uninitialize : De-initialize USART Interface. - int32_t (*uninitialize)(int32_t uart_port); - - ///< Pointer to \ref SUNXI_HAL_USART_PowerControl : Control USART Interface Power. - int32_t (*power_control)(int32_t dev, sunxi_hal_power_state_e state); - - ///< Pointer to \ref SUNXI_HAL_USART_Send : Start sending data to USART transmitter. - int32_t (*send)(int32_t dev, const uint8_t *data, uint32_t num); - - ///< Pointer to \ref SUNXI_HAL_USART_Receive : Start receiving data from USART receiver. - int32_t (*receive)(int32_t dev, int *data, uint32_t num); - - ///< Pointer to \ref SUNXI_HAL_USART_Transfer : Start sending/receiving data to/from USART. - int32_t (*transfer)(int32_t dev, const void *data_out, void *data_in, uint32_t num); - - ///< Pointer to \ref SUNXI_HAL_USART_GetTxCount : Get transmitted data count. - uint32_t (*get_tx_count)(int32_t dev); - - ///< Pointer to \ref SUNXI_HAL_USART_GetRxCount : Get received data count. - uint32_t (*get_rx_count)(int32_t dev); - - ///< Pointer to \ref SUNXI_HAL_USART_Control : Control USART Interface. - int32_t (*control)(int32_t uart_port, int cmd, void *args); - - ///< Pointer to \ref SUNXI_HAL_USART_GetStatus : Get USART status. - sunxi_hal_uart_status_t (*get_status)(int32_t dev); - ///< Pointer to \ref SUNXI_HAL_USART_SetModemControl : Set USART Modem Control line state. - int32_t (*set_modem_control)(int32_t dev, sunxi_hal_uart_modem_control_e control); - - ///< Pointer to \ref SUNXI_HAL_USART_GetModemStatus : Get USART Modem Status lines state. - sunxi_hal_uart_modem_status_t (*get_modem_status)(int32_t dev); - - int32_t (*receive_polling)(int32_t dev, uint8_t *data, uint32_t num); - sunxi_hal_poll_ops *poll_ops; -} const sunxi_hal_driver_usart_t; - -#define POLLIN (0x01) -#define POLLRDNORM (0x01) -#define POLLRDBAND (0x01) -#define POLLPRI (0x01) - -#define POLLOUT (0x02) -#define POLLWRNORM (0x02) -#define POLLWRBAND (0x02) - -#define POLLERR (0x04) -#define POLLHUP (0x08) -#define POLLNVAL (0x10) - -sunxi_hal_version_t hal_uart_get_version(int32_t dev); -sunxi_hal_uart_capabilities_t hal_uart_get_capabilities(int32_t dev); -int32_t hal_uart_init(int32_t uart_port); -int32_t hal_uart_init_for_amp_cli(int32_t uart_port); -int32_t hal_uart_deinit(int32_t uart_port); -int32_t hal_uart_power_control(int32_t dev, sunxi_hal_power_state_e state); -int32_t hal_uart_send(int32_t dev, const uint8_t *data, uint32_t num); -int32_t hal_uart_put_char(int32_t dev, char c); -int32_t hal_uart_receive(int32_t dev, uint8_t *data, uint32_t num); -int32_t hal_uart_receive_no_block(int32_t dev, uint8_t *data, uint32_t num, int32_t timeout); -uint8_t hal_uart_get_char(int32_t dev); -uint32_t hal_uart_get_tx_count(int32_t dev); -uint32_t hal_uart_get_rx_count(int32_t dev); -int32_t hal_uart_control(int32_t uart_port, int cmd, void *args); -sunxi_hal_uart_status_t hal_uart_get_status(int32_t dev); -int32_t hal_uart_transfer(int32_t dev, const void *data_out, - void *data_in, uint32_t num); -int32_t hal_uart_set_modem_control(int32_t dev, - sunxi_hal_uart_modem_control_e control); -sunxi_hal_uart_modem_status_t hal_uart_get_modem_status(int32_t dev); -int32_t hal_uart_receive_polling(int32_t dev, uint8_t *data, uint32_t num); -int32_t hal_uart_check_poll_state(int32_t dev_id, short key); -int32_t hal_uart_poll_wakeup(int32_t dev_id, short key); -int32_t hal_uart_register_poll_wakeup(poll_wakeup_func poll_wakeup); -void hal_uart_set_hardware_flowcontrol(uart_port_t uart_port); -void hal_uart_disable_flowcontrol(uart_port_t uart_port); -void hal_uart_set_loopback(uart_port_t uart_port, bool enable); -void sunxi_driver_uart_init(void); -int32_t hal_uart_enable_rx(int32_t uart_port); -int32_t hal_uart_disable_rx(int32_t uart_port); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/hal/image_header.h b/src/platform/f133/include/hal/image_header.h deleted file mode 100644 index d482a45b000b8716559b3c66d09706770e0f96ce..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/image_header.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * (C) Copyright 2007-2021 - * Allwinner Technology Co., Ltd. - */ - -#ifndef __IMAGE_HEADER__H__ -#define __IMAGE_HEADER__H__ - -#define IH_MAGIC (0x48495741) -#define TH_MAGIC (0x4854) - -/* Image Header(128B) */ -typedef struct image_header { - uint32_t ih_magic; /* Image Header Magic Number */ - uint16_t ih_hversion; /* Image Header Version: */ - uint16_t ih_pversion; /* Image Payload Version: */ - uint16_t ih_hchksum; /* Image Header Checksum */ - uint16_t ih_dchksum; /* Image Data Checksum */ - uint32_t ih_hsize; /* Image Header Size */ - uint32_t ih_psize; /* Image Payload Size */ - uint32_t ih_tsize; /* Image TLV Size */ - uint32_t ih_load; /* Image Load Address */ - uint32_t ih_ep; /* Image Entry Point */ - uint32_t ih_imgattr; /* Image Attribute */ - uint32_t ih_nxtsecaddr; /* Next Section Address */ - uint8_t ih_name[16]; /* Image Name */ - uint32_t ih_priv[18]; /* Image Private Data */ -} image_header_t; - -/* TLV Header(32B) */ -typedef struct tlv_header { - uint16_t th_magic; - uint16_t th_size; - uint16_t th_pkey_type; - uint16_t th_pkey_size; - uint16_t th_sign_type; - uint16_t th_sign_size; - uint32_t th_priv[5]; -} tlv_header_t; - -int sunxi_image_header_check(image_header_t *ih, void *pbuffer); -int sunxi_tlv_header_check(tlv_header_t *th); -int sunxi_image_header_magic_check(image_header_t *ih); -int sunxi_image_header_dump(image_header_t *ih); - -#endif //__IMAGE_HEADER__H__ diff --git a/src/platform/f133/include/hal/phy/sunxi_hal_mdio.h b/src/platform/f133/include/hal/phy/sunxi_hal_mdio.h deleted file mode 100644 index 3837ad888c3bbb5b34f0409af40add9c15fd93e5..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/phy/sunxi_hal_mdio.h +++ /dev/null @@ -1,307 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __SUNXI_HAL_MDIO_H__ -#define __SUNXI_HAL_MDIO_H__ - -#include - -/* MDIO Manageable Devices (MMDs). */ -#define MDIO_MMD_PMAPMD 1 /* Physical Medium Attachment/ - * Physical Medium Dependent */ -#define MDIO_MMD_WIS 2 /* WAN Interface Sublayer */ -#define MDIO_MMD_PCS 3 /* Physical Coding Sublayer */ -#define MDIO_MMD_PHYXS 4 /* PHY Extender Sublayer */ -#define MDIO_MMD_DTEXS 5 /* DTE Extender Sublayer */ -#define MDIO_MMD_TC 6 /* Transmission Convergence */ -#define MDIO_MMD_AN 7 /* Auto-Negotiation */ -#define MDIO_MMD_C22EXT 29 /* Clause 22 extension */ -#define MDIO_MMD_VEND1 30 /* Vendor specific 1 */ -#define MDIO_MMD_VEND2 31 /* Vendor specific 2 */ - -/* Generic MDIO registers. */ -#define MDIO_CTRL1 MII_BMCR -#define MDIO_STAT1 MII_BMSR -#define MDIO_DEVID1 MII_PHYSID1 -#define MDIO_DEVID2 MII_PHYSID2 -#define MDIO_SPEED 4 /* Speed ability */ -#define MDIO_DEVS1 5 /* Devices in package */ -#define MDIO_DEVS2 6 -#define MDIO_CTRL2 7 /* 10G control 2 */ -#define MDIO_STAT2 8 /* 10G status 2 */ -#define MDIO_PMA_TXDIS 9 /* 10G PMA/PMD transmit disable */ -#define MDIO_PMA_RXDET 10 /* 10G PMA/PMD receive signal detect */ -#define MDIO_PMA_EXTABLE 11 /* 10G PMA/PMD extended ability */ -#define MDIO_PKGID1 14 /* Package identifier */ -#define MDIO_PKGID2 15 -#define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */ -#define MDIO_AN_LPA 19 /* AN LP abilities (base page) */ -#define MDIO_PHYXS_LNSTAT 24 /* PHY XGXS lane state */ - -/* Media-dependent registers. */ -#define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */ -#define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */ -#define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A. - * Lanes B-D are numbered 134-136. */ -#define MDIO_PMA_10GBR_FECABLE 170 /* 10GBASE-R FEC ability */ -#define MDIO_PCS_10GBX_STAT1 24 /* 10GBASE-X PCS status 1 */ -#define MDIO_PCS_10GBRT_STAT1 32 /* 10GBASE-R/-T PCS status 1 */ -#define MDIO_PCS_10GBRT_STAT2 33 /* 10GBASE-R/-T PCS status 2 */ -#define MDIO_AN_10GBT_CTRL 32 /* 10GBASE-T auto-negotiation control */ -#define MDIO_AN_10GBT_STAT 33 /* 10GBASE-T auto-negotiation status */ -#define MDIO_AN_EEE_ADV 60 /* EEE advertisement */ - -/* LASI (Link Alarm Status Interrupt) registers, defined by XENPAK MSA. */ -#define MDIO_PMA_LASI_RXCTRL 0x9000 /* RX_ALARM control */ -#define MDIO_PMA_LASI_TXCTRL 0x9001 /* TX_ALARM control */ -#define MDIO_PMA_LASI_CTRL 0x9002 /* LASI control */ -#define MDIO_PMA_LASI_RXSTAT 0x9003 /* RX_ALARM status */ -#define MDIO_PMA_LASI_TXSTAT 0x9004 /* TX_ALARM status */ -#define MDIO_PMA_LASI_STAT 0x9005 /* LASI status */ - -/* Control register 1. */ -/* Enable extended speed selection */ -#define MDIO_CTRL1_SPEEDSELEXT (BMCR_SPEED1000 | BMCR_SPEED100) -/* All speed selection bits */ -#define MDIO_CTRL1_SPEEDSEL (MDIO_CTRL1_SPEEDSELEXT | 0x003c) -#define MDIO_CTRL1_FULLDPLX BMCR_FULLDPLX -#define MDIO_CTRL1_LPOWER BMCR_PDOWN -#define MDIO_CTRL1_RESET BMCR_RESET -#define MDIO_PMA_CTRL1_LOOPBACK 0x0001 -#define MDIO_PMA_CTRL1_SPEED1000 BMCR_SPEED1000 -#define MDIO_PMA_CTRL1_SPEED100 BMCR_SPEED100 -#define MDIO_PCS_CTRL1_LOOPBACK BMCR_LOOPBACK -#define MDIO_PHYXS_CTRL1_LOOPBACK BMCR_LOOPBACK -#define MDIO_AN_CTRL1_RESTART BMCR_ANRESTART -#define MDIO_AN_CTRL1_ENABLE BMCR_ANENABLE -#define MDIO_AN_CTRL1_XNP 0x2000 /* Enable extended next page */ - -/* 10 Gb/s */ -#define MDIO_CTRL1_SPEED10G (MDIO_CTRL1_SPEEDSELEXT | 0x00) -/* 10PASS-TS/2BASE-TL */ -#define MDIO_CTRL1_SPEED10P2B (MDIO_CTRL1_SPEEDSELEXT | 0x04) - -/* Status register 1. */ -#define MDIO_STAT1_LPOWERABLE 0x0002 /* Low-power ability */ -#define MDIO_STAT1_LSTATUS BMSR_LSTATUS -#define MDIO_STAT1_FAULT 0x0080 /* Fault */ -#define MDIO_AN_STAT1_LPABLE 0x0001 /* Link partner AN ability */ -#define MDIO_AN_STAT1_ABLE BMSR_ANEGCAPABLE -#define MDIO_AN_STAT1_RFAULT BMSR_RFAULT -#define MDIO_AN_STAT1_COMPLETE BMSR_ANEGCOMPLETE -#define MDIO_AN_STAT1_PAGE 0x0040 /* Page received */ -#define MDIO_AN_STAT1_XNP 0x0080 /* Extended next page status */ - -/* Speed register. */ -#define MDIO_SPEED_10G 0x0001 /* 10G capable */ -#define MDIO_PMA_SPEED_2B 0x0002 /* 2BASE-TL capable */ -#define MDIO_PMA_SPEED_10P 0x0004 /* 10PASS-TS capable */ -#define MDIO_PMA_SPEED_1000 0x0010 /* 1000M capable */ -#define MDIO_PMA_SPEED_100 0x0020 /* 100M capable */ -#define MDIO_PMA_SPEED_10 0x0040 /* 10M capable */ -#define MDIO_PCS_SPEED_10P2B 0x0002 /* 10PASS-TS/2BASE-TL capable */ - -/* Device present registers. */ -#define MDIO_DEVS_PRESENT(devad) (1 << (devad)) -#define MDIO_DEVS_PMAPMD MDIO_DEVS_PRESENT(MDIO_MMD_PMAPMD) -#define MDIO_DEVS_WIS MDIO_DEVS_PRESENT(MDIO_MMD_WIS) -#define MDIO_DEVS_PCS MDIO_DEVS_PRESENT(MDIO_MMD_PCS) -#define MDIO_DEVS_PHYXS MDIO_DEVS_PRESENT(MDIO_MMD_PHYXS) -#define MDIO_DEVS_DTEXS MDIO_DEVS_PRESENT(MDIO_MMD_DTEXS) -#define MDIO_DEVS_TC MDIO_DEVS_PRESENT(MDIO_MMD_TC) -#define MDIO_DEVS_AN MDIO_DEVS_PRESENT(MDIO_MMD_AN) -#define MDIO_DEVS_C22EXT MDIO_DEVS_PRESENT(MDIO_MMD_C22EXT) -#define MDIO_DEVS_VEND1 MDIO_DEVS_PRESENT(MDIO_MMD_VEND1) -#define MDIO_DEVS_VEND2 MDIO_DEVS_PRESENT(MDIO_MMD_VEND2) - -#define MDIO_DEVS_LINK (MDIO_DEVS_PMAPMD | \ - MDIO_DEVS_WIS | \ - MDIO_DEVS_PCS | \ - MDIO_DEVS_PHYXS | \ - MDIO_DEVS_DTEXS | \ - MDIO_DEVS_AN) - -/* Control register 2. */ -#define MDIO_PMA_CTRL2_TYPE 0x000f /* PMA/PMD type selection */ -#define MDIO_PMA_CTRL2_10GBCX4 0x0000 /* 10GBASE-CX4 type */ -#define MDIO_PMA_CTRL2_10GBEW 0x0001 /* 10GBASE-EW type */ -#define MDIO_PMA_CTRL2_10GBLW 0x0002 /* 10GBASE-LW type */ -#define MDIO_PMA_CTRL2_10GBSW 0x0003 /* 10GBASE-SW type */ -#define MDIO_PMA_CTRL2_10GBLX4 0x0004 /* 10GBASE-LX4 type */ -#define MDIO_PMA_CTRL2_10GBER 0x0005 /* 10GBASE-ER type */ -#define MDIO_PMA_CTRL2_10GBLR 0x0006 /* 10GBASE-LR type */ -#define MDIO_PMA_CTRL2_10GBSR 0x0007 /* 10GBASE-SR type */ -#define MDIO_PMA_CTRL2_10GBLRM 0x0008 /* 10GBASE-LRM type */ -#define MDIO_PMA_CTRL2_10GBT 0x0009 /* 10GBASE-T type */ -#define MDIO_PMA_CTRL2_10GBKX4 0x000a /* 10GBASE-KX4 type */ -#define MDIO_PMA_CTRL2_10GBKR 0x000b /* 10GBASE-KR type */ -#define MDIO_PMA_CTRL2_1000BT 0x000c /* 1000BASE-T type */ -#define MDIO_PMA_CTRL2_1000BKX 0x000d /* 1000BASE-KX type */ -#define MDIO_PMA_CTRL2_100BTX 0x000e /* 100BASE-TX type */ -#define MDIO_PMA_CTRL2_10BT 0x000f /* 10BASE-T type */ -#define MDIO_PCS_CTRL2_TYPE 0x0003 /* PCS type selection */ -#define MDIO_PCS_CTRL2_10GBR 0x0000 /* 10GBASE-R type */ -#define MDIO_PCS_CTRL2_10GBX 0x0001 /* 10GBASE-X type */ -#define MDIO_PCS_CTRL2_10GBW 0x0002 /* 10GBASE-W type */ -#define MDIO_PCS_CTRL2_10GBT 0x0003 /* 10GBASE-T type */ - -/* Status register 2. */ -#define MDIO_STAT2_RXFAULT 0x0400 /* Receive fault */ -#define MDIO_STAT2_TXFAULT 0x0800 /* Transmit fault */ -#define MDIO_STAT2_DEVPRST 0xc000 /* Device present */ -#define MDIO_STAT2_DEVPRST_VAL 0x8000 /* Device present value */ -#define MDIO_PMA_STAT2_LBABLE 0x0001 /* PMA loopback ability */ -#define MDIO_PMA_STAT2_10GBEW 0x0002 /* 10GBASE-EW ability */ -#define MDIO_PMA_STAT2_10GBLW 0x0004 /* 10GBASE-LW ability */ -#define MDIO_PMA_STAT2_10GBSW 0x0008 /* 10GBASE-SW ability */ -#define MDIO_PMA_STAT2_10GBLX4 0x0010 /* 10GBASE-LX4 ability */ -#define MDIO_PMA_STAT2_10GBER 0x0020 /* 10GBASE-ER ability */ -#define MDIO_PMA_STAT2_10GBLR 0x0040 /* 10GBASE-LR ability */ -#define MDIO_PMA_STAT2_10GBSR 0x0080 /* 10GBASE-SR ability */ -#define MDIO_PMD_STAT2_TXDISAB 0x0100 /* PMD TX disable ability */ -#define MDIO_PMA_STAT2_EXTABLE 0x0200 /* Extended abilities */ -#define MDIO_PMA_STAT2_RXFLTABLE 0x1000 /* Receive fault ability */ -#define MDIO_PMA_STAT2_TXFLTABLE 0x2000 /* Transmit fault ability */ -#define MDIO_PCS_STAT2_10GBR 0x0001 /* 10GBASE-R capable */ -#define MDIO_PCS_STAT2_10GBX 0x0002 /* 10GBASE-X capable */ -#define MDIO_PCS_STAT2_10GBW 0x0004 /* 10GBASE-W capable */ -#define MDIO_PCS_STAT2_RXFLTABLE 0x1000 /* Receive fault ability */ -#define MDIO_PCS_STAT2_TXFLTABLE 0x2000 /* Transmit fault ability */ - -/* Transmit disable register. */ -#define MDIO_PMD_TXDIS_GLOBAL 0x0001 /* Global PMD TX disable */ -#define MDIO_PMD_TXDIS_0 0x0002 /* PMD TX disable 0 */ -#define MDIO_PMD_TXDIS_1 0x0004 /* PMD TX disable 1 */ -#define MDIO_PMD_TXDIS_2 0x0008 /* PMD TX disable 2 */ -#define MDIO_PMD_TXDIS_3 0x0010 /* PMD TX disable 3 */ - -/* Receive signal detect register. */ -#define MDIO_PMD_RXDET_GLOBAL 0x0001 /* Global PMD RX signal detect */ -#define MDIO_PMD_RXDET_0 0x0002 /* PMD RX signal detect 0 */ -#define MDIO_PMD_RXDET_1 0x0004 /* PMD RX signal detect 1 */ -#define MDIO_PMD_RXDET_2 0x0008 /* PMD RX signal detect 2 */ -#define MDIO_PMD_RXDET_3 0x0010 /* PMD RX signal detect 3 */ - -/* Extended abilities register. */ -#define MDIO_PMA_EXTABLE_10GCX4 0x0001 /* 10GBASE-CX4 ability */ -#define MDIO_PMA_EXTABLE_10GBLRM 0x0002 /* 10GBASE-LRM ability */ -#define MDIO_PMA_EXTABLE_10GBT 0x0004 /* 10GBASE-T ability */ -#define MDIO_PMA_EXTABLE_10GBKX4 0x0008 /* 10GBASE-KX4 ability */ -#define MDIO_PMA_EXTABLE_10GBKR 0x0010 /* 10GBASE-KR ability */ -#define MDIO_PMA_EXTABLE_1000BT 0x0020 /* 1000BASE-T ability */ -#define MDIO_PMA_EXTABLE_1000BKX 0x0040 /* 1000BASE-KX ability */ -#define MDIO_PMA_EXTABLE_100BTX 0x0080 /* 100BASE-TX ability */ -#define MDIO_PMA_EXTABLE_10BT 0x0100 /* 10BASE-T ability */ - -/* PHY XGXS lane state register. */ -#define MDIO_PHYXS_LNSTAT_SYNC0 0x0001 -#define MDIO_PHYXS_LNSTAT_SYNC1 0x0002 -#define MDIO_PHYXS_LNSTAT_SYNC2 0x0004 -#define MDIO_PHYXS_LNSTAT_SYNC3 0x0008 -#define MDIO_PHYXS_LNSTAT_ALIGN 0x1000 - -/* PMA 10GBASE-T pair swap & polarity */ -#define MDIO_PMA_10GBT_SWAPPOL_ABNX 0x0001 /* Pair A/B uncrossed */ -#define MDIO_PMA_10GBT_SWAPPOL_CDNX 0x0002 /* Pair C/D uncrossed */ -#define MDIO_PMA_10GBT_SWAPPOL_AREV 0x0100 /* Pair A polarity reversed */ -#define MDIO_PMA_10GBT_SWAPPOL_BREV 0x0200 /* Pair B polarity reversed */ -#define MDIO_PMA_10GBT_SWAPPOL_CREV 0x0400 /* Pair C polarity reversed */ -#define MDIO_PMA_10GBT_SWAPPOL_DREV 0x0800 /* Pair D polarity reversed */ - -/* PMA 10GBASE-T TX power register. */ -#define MDIO_PMA_10GBT_TXPWR_SHORT 0x0001 /* Short-reach mode */ - -/* PMA 10GBASE-T SNR registers. */ -/* Value is SNR margin in dB, clamped to range [-127, 127], plus 0x8000. */ -#define MDIO_PMA_10GBT_SNR_BIAS 0x8000 -#define MDIO_PMA_10GBT_SNR_MAX 127 - -/* PMA 10GBASE-R FEC ability register. */ -#define MDIO_PMA_10GBR_FECABLE_ABLE 0x0001 /* FEC ability */ -#define MDIO_PMA_10GBR_FECABLE_ERRABLE 0x0002 /* FEC error indic. ability */ - -/* PCS 10GBASE-R/-T status register 1. */ -#define MDIO_PCS_10GBRT_STAT1_BLKLK 0x0001 /* Block lock attained */ - -/* PCS 10GBASE-R/-T status register 2. */ -#define MDIO_PCS_10GBRT_STAT2_ERR 0x00ff -#define MDIO_PCS_10GBRT_STAT2_BER 0x3f00 - -/* AN 10GBASE-T control register. */ -#define MDIO_AN_10GBT_CTRL_ADV10G 0x1000 /* Advertise 10GBASE-T */ - -/* AN 10GBASE-T status register. */ -#define MDIO_AN_10GBT_STAT_LPTRR 0x0200 /* LP training reset req. */ -#define MDIO_AN_10GBT_STAT_LPLTABLE 0x0400 /* LP loop timing ability */ -#define MDIO_AN_10GBT_STAT_LP10G 0x0800 /* LP is 10GBT capable */ -#define MDIO_AN_10GBT_STAT_REMOK 0x1000 /* Remote OK */ -#define MDIO_AN_10GBT_STAT_LOCOK 0x2000 /* Local OK */ -#define MDIO_AN_10GBT_STAT_MS 0x4000 /* Master/slave config */ -#define MDIO_AN_10GBT_STAT_MSFLT 0x8000 /* Master/slave config fault */ - -/* AN EEE Advertisement register. */ -#define MDIO_AN_EEE_ADV_100TX 0x0002 /* Advertise 100TX EEE cap */ -#define MDIO_AN_EEE_ADV_1000T 0x0004 /* Advertise 1000T EEE cap */ - -/* LASI RX_ALARM control/status registers. */ -#define MDIO_PMA_LASI_RX_PHYXSLFLT 0x0001 /* PHY XS RX local fault */ -#define MDIO_PMA_LASI_RX_PCSLFLT 0x0008 /* PCS RX local fault */ -#define MDIO_PMA_LASI_RX_PMALFLT 0x0010 /* PMA/PMD RX local fault */ -#define MDIO_PMA_LASI_RX_OPTICPOWERFLT 0x0020 /* RX optical power fault */ -#define MDIO_PMA_LASI_RX_WISLFLT 0x0200 /* WIS local fault */ - -/* LASI TX_ALARM control/status registers. */ -#define MDIO_PMA_LASI_TX_PHYXSLFLT 0x0001 /* PHY XS TX local fault */ -#define MDIO_PMA_LASI_TX_PCSLFLT 0x0008 /* PCS TX local fault */ -#define MDIO_PMA_LASI_TX_PMALFLT 0x0010 /* PMA/PMD TX local fault */ -#define MDIO_PMA_LASI_TX_LASERPOWERFLT 0x0080 /* Laser output power fault */ -#define MDIO_PMA_LASI_TX_LASERTEMPFLT 0x0100 /* Laser temperature fault */ -#define MDIO_PMA_LASI_TX_LASERBICURRFLT 0x0200 /* Laser bias current fault */ - -/* LASI control/status registers. */ -#define MDIO_PMA_LASI_LSALARM 0x0001 /* LS_ALARM enable/status */ -#define MDIO_PMA_LASI_TXALARM 0x0002 /* TX_ALARM enable/status */ -#define MDIO_PMA_LASI_RXALARM 0x0004 /* RX_ALARM enable/status */ - -/* Mapping between MDIO PRTAD/DEVAD and mii_ioctl_data::phy_id */ - -#define MDIO_PHY_ID_C45 0x8000 -#define MDIO_PHY_ID_PRTAD 0x03e0 -#define MDIO_PHY_ID_DEVAD 0x001f -#define MDIO_PHY_ID_C45_MASK \ - (MDIO_PHY_ID_C45 | MDIO_PHY_ID_PRTAD | MDIO_PHY_ID_DEVAD) - -#define MDIO_PRTAD_NONE (-1) -#define MDIO_DEVAD_NONE (-1) -#define MDIO_EMULATE_C22 4 - -#endif /* __SUNXI_HAL_MDIO_H__ */ diff --git a/src/platform/f133/include/hal/phy/sunxi_hal_mii.h b/src/platform/f133/include/hal/phy/sunxi_hal_mii.h deleted file mode 100644 index 944938cf1d89c44285aae69731c6a37c7d0a9427..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/phy/sunxi_hal_mii.h +++ /dev/null @@ -1,218 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __SUNXI_HAL_MII_H__ -#define __SUNXI_HAL_MII_H__ - -/* Generic MII registers. */ - -#define MII_BMCR 0x00 /* Basic mode control register */ -#define MII_BMSR 0x01 /* Basic mode status register */ -#define MII_PHYSID1 0x02 /* PHYS ID 1 */ -#define MII_PHYSID2 0x03 /* PHYS ID 2 */ -#define MII_ADVERTISE 0x04 /* Advertisement control reg */ -#define MII_LPA 0x05 /* Link partner ability reg */ -#define MII_EXPANSION 0x06 /* Expansion register */ -#define MII_CTRL1000 0x09 /* 1000BASE-T control */ -#define MII_STAT1000 0x0a /* 1000BASE-T status */ -#define MII_ESTATUS 0x0f /* Extended Status */ -#define MII_DCOUNTER 0x12 /* Disconnect counter */ -#define MII_FCSCOUNTER 0x13 /* False carrier counter */ -#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ -#define MII_RERRCOUNTER 0x15 /* Receive error counter */ -#define MII_SREVISION 0x16 /* Silicon revision */ -#define MII_RESV1 0x17 /* Reserved... */ -#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ -#define MII_PHYADDR 0x19 /* PHY address */ -#define MII_RESV2 0x1a /* Reserved... */ -#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ -#define MII_NCONFIG 0x1c /* Network interface config */ - -/* Basic mode control register. */ -#define BMCR_RESV 0x003f /* Unused... */ -#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ -#define BMCR_CTST 0x0080 /* Collision test */ -#define BMCR_FULLDPLX 0x0100 /* Full duplex */ -#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ -#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ -#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ -#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ -#define BMCR_SPEED100 0x2000 /* Select 100Mbps */ -#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ -#define BMCR_RESET 0x8000 /* Reset the DP83840 */ - -/* Basic mode status register. */ -#define BMSR_ERCAP 0x0001 /* Ext-reg capability */ -#define BMSR_JCD 0x0002 /* Jabber detected */ -#define BMSR_LSTATUS 0x0004 /* Link status */ -#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ -#define BMSR_RFAULT 0x0010 /* Remote fault detected */ -#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ -#define BMSR_RESV 0x00c0 /* Unused... */ -#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ -#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */ -#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */ -#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ -#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ -#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ -#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ -#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ - -/* Advertisement control register. */ -#define ADVERTISE_SLCT 0x001f /* Selector bits */ -#define ADVERTISE_CSMA 0x0001 /* Only selector supported */ -#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ -#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */ -#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ -#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */ -#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ -#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */ -#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ -#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ -#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ -#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ -#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */ -#define ADVERTISE_RESV 0x1000 /* Unused... */ -#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ -#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ -#define ADVERTISE_NPAGE 0x8000 /* Next page bit */ - -#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \ - ADVERTISE_CSMA) -#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ - ADVERTISE_100HALF | ADVERTISE_100FULL) - -/* Link partner ability register. */ -#define LPA_SLCT 0x001f /* Same as advertise selector */ -#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ -#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */ -#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */ -#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */ -#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ -#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */ -#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ -#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/ -#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ -#define LPA_PAUSE_CAP 0x0400 /* Can pause */ -#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */ -#define LPA_RESV 0x1000 /* Unused... */ -#define LPA_RFAULT 0x2000 /* Link partner faulted */ -#define LPA_LPACK 0x4000 /* Link partner acked us */ -#define LPA_NPAGE 0x8000 /* Next page bit */ - -#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL) -#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) - -/* Expansion register for auto-negotiation. */ -#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */ -#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */ -#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ -#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */ -#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */ -#define EXPANSION_RESV 0xffe0 /* Unused... */ - -#define ESTATUS_1000_XFULL 0x8000 /* Can do 1000BX Full */ -#define ESTATUS_1000_XHALF 0x4000 /* Can do 1000BX Half */ -#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */ -#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ - -/* N-way test register. */ -#define NWAYTEST_RESV1 0x00ff /* Unused... */ -#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */ -#define NWAYTEST_RESV2 0xfe00 /* Unused... */ - -/* 1000BASE-T Control register */ -#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ -#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ - -/* 1000BASE-T Status register */ -#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */ -#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */ -#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */ -#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */ - -/* Flow control flags */ -#define FLOW_CTRL_TX 0x01 -#define FLOW_CTRL_RX 0x02 - -/** - * mii_nway_result - * @negotiated: value of MII ANAR and'd with ANLPAR - * - * Given a set of MII abilities, check each bit and returns the - * currently supported media, in the priority order defined by - * IEEE 802.3u. We use LPA_xxx constants but note this is not the - * value of LPA solely, as described above. - * - * The one exception to IEEE 802.3u is that 100baseT4 is placed - * between 100T-full and 100T-half. If your phy does not support - * 100T4 this is fine. If your phy places 100T4 elsewhere in the - * priority order, you will need to roll your own function. - */ -static inline unsigned int mii_nway_result (unsigned int negotiated) -{ - unsigned int ret; - - if (negotiated & LPA_100FULL) - ret = LPA_100FULL; - else if (negotiated & LPA_100BASE4) - ret = LPA_100BASE4; - else if (negotiated & LPA_100HALF) - ret = LPA_100HALF; - else if (negotiated & LPA_10FULL) - ret = LPA_10FULL; - else - ret = LPA_10HALF; - - return ret; -} - -/** - * mii_duplex - * @duplex_lock: Non-zero if duplex is locked at full - * @negotiated: value of MII ANAR and'd with ANLPAR - * - * A small helper function for a common case. Returns one - * if the media is operating or locked at full duplex, and - * returns zero otherwise. - */ -static inline unsigned int mii_duplex (unsigned int duplex_lock, - unsigned int negotiated) -{ - if (duplex_lock) - return 1; - if (mii_nway_result(negotiated) & LPA_DUPLEX) - return 1; - return 0; -} - -#endif /* __SUNXI_HAL_MII_H__ */ diff --git a/src/platform/f133/include/hal/phy/sunxi_hal_miiphy.h b/src/platform/f133/include/hal/phy/sunxi_hal_miiphy.h deleted file mode 100644 index dbe47ffd5b318f8cdb216445dd1c0fcd8cab04b2..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/phy/sunxi_hal_miiphy.h +++ /dev/null @@ -1,142 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __SUNXI_HAL_MIIPHY_H__ -#define __SUNXI_HAL_MIIPHY_H__ - -//#include -#include -#include -//#include -#include - -struct legacy_mii_dev { - int (*read)(const char *devname, unsigned char addr, - unsigned char reg, unsigned short *value); - int (*write)(const char *devname, unsigned char addr, - unsigned char reg, unsigned short value); -}; - -int miiphy_read(const char *devname, unsigned char addr, unsigned char reg, - unsigned short *value); -int miiphy_write(const char *devname, unsigned char addr, unsigned char reg, - unsigned short value); -int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, - unsigned char *model, unsigned char *rev); -int miiphy_reset(const char *devname, unsigned char addr); -int miiphy_speed(const char *devname, unsigned char addr); -int miiphy_duplex(const char *devname, unsigned char addr); -int miiphy_is_1000base_x(const char *devname, unsigned char addr); -#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN -int miiphy_link(const char *devname, unsigned char addr); -#endif - -void miiphy_init(void); - -void miiphy_register(const char *devname, - int (*read)(const char *devname, unsigned char addr, - unsigned char reg, unsigned short *value), - int (*write)(const char *devname, unsigned char addr, - unsigned char reg, unsigned short value)); - -int miiphy_set_current_dev(const char *devname); -const char *miiphy_get_current_dev(void); -struct mii_dev *mdio_get_current_dev(void); -struct mii_dev *miiphy_get_dev_by_name(const char *devname); -struct phy_device *mdio_phydev_for_ethname(const char *devname); - -void miiphy_listdev(void); - -struct mii_dev *mdio_alloc(void); -int mdio_register(struct mii_dev *bus); -void mdio_list_devices(void); - -#ifdef CONFIG_BITBANGMII - -#define BB_MII_DEVNAME "bb_miiphy" - -struct bb_miiphy_bus { - char name[16]; - int (*init)(struct bb_miiphy_bus *bus); - int (*mdio_active)(struct bb_miiphy_bus *bus); - int (*mdio_tristate)(struct bb_miiphy_bus *bus); - int (*set_mdio)(struct bb_miiphy_bus *bus, int v); - int (*get_mdio)(struct bb_miiphy_bus *bus, int *v); - int (*set_mdc)(struct bb_miiphy_bus *bus, int v); - int (*delay)(struct bb_miiphy_bus *bus); -#ifdef CONFIG_BITBANGMII_MULTI - void *priv; -#endif -}; - -extern struct bb_miiphy_bus bb_miiphy_buses[]; -extern int bb_miiphy_buses_num; - -void bb_miiphy_init(void); -int bb_miiphy_read(const char *devname, unsigned char addr, - unsigned char reg, unsigned short *value); -int bb_miiphy_write(const char *devname, unsigned char addr, - unsigned char reg, unsigned short value); -#endif - -/* phy seed setup */ -#define AUTO 99 -#define _1000BASET 1000 -#define _100BASET 100 -#define _10BASET 10 -#define HALF 22 -#define FULL 44 - -/* phy register offsets */ -#define MII_MIPSCR 0x11 - -/* MII_LPA */ -#define PHY_ANLPAR_PSB_802_3 0x0001 -#define PHY_ANLPAR_PSB_802_9 0x0002 - -/* MII_CTRL1000 masks */ -#define PHY_1000BTCR_1000FD 0x0200 -#define PHY_1000BTCR_1000HD 0x0100 - -/* MII_STAT1000 masks */ -#define PHY_1000BTSR_MSCF 0x8000 -#define PHY_1000BTSR_MSCR 0x4000 -#define PHY_1000BTSR_LRS 0x2000 -#define PHY_1000BTSR_RRS 0x1000 -#define PHY_1000BTSR_1000FD 0x0800 -#define PHY_1000BTSR_1000HD 0x0400 - -/* phy EXSR */ -#define ESTATUS_1000XF 0x8000 -#define ESTATUS_1000XH 0x4000 - -#endif /* __SUNXI_HAL_MIIPHY_H__ */ diff --git a/src/platform/f133/include/hal/phy/sunxi_hal_phy.h b/src/platform/f133/include/hal/phy/sunxi_hal_phy.h deleted file mode 100644 index 06ac839407edf6fdd5f16da341e0d1df2003bdb7..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/phy/sunxi_hal_phy.h +++ /dev/null @@ -1,356 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __SUNXI_HAL_PHY_H__ -#define __SUNXI_HAL_PHY_H__ - -#include -#include -#include -//#include -#include - -#define PHY_MAX_ADDR 32 - -/* Indicates what features are supported by the interface. */ -#define SUPPORTED_10baseT_Half (1 << 0) -#define SUPPORTED_10baseT_Full (1 << 1) -#define SUPPORTED_100baseT_Half (1 << 2) -#define SUPPORTED_100baseT_Full (1 << 3) -#define SUPPORTED_1000baseT_Half (1 << 4) -#define SUPPORTED_1000baseT_Full (1 << 5) -#define SUPPORTED_Autoneg (1 << 6) -#define SUPPORTED_TP (1 << 7) -#define SUPPORTED_AUI (1 << 8) -#define SUPPORTED_MII (1 << 9) -#define SUPPORTED_FIBRE (1 << 10) -#define SUPPORTED_BNC (1 << 11) -#define SUPPORTED_10000baseT_Full (1 << 12) -#define SUPPORTED_Pause (1 << 13) -#define SUPPORTED_Asym_Pause (1 << 14) -#define SUPPORTED_2500baseX_Full (1 << 15) -#define SUPPORTED_Backplane (1 << 16) -#define SUPPORTED_1000baseKX_Full (1 << 17) -#define SUPPORTED_10000baseKX4_Full (1 << 18) -#define SUPPORTED_10000baseKR_Full (1 << 19) -#define SUPPORTED_10000baseR_FEC (1 << 20) -#define SUPPORTED_1000baseX_Half (1 << 21) -#define SUPPORTED_1000baseX_Full (1 << 22) - -/* Indicates what features are advertised by the interface. */ -#define ADVERTISED_10baseT_Half (1 << 0) -#define ADVERTISED_10baseT_Full (1 << 1) -#define ADVERTISED_100baseT_Half (1 << 2) -#define ADVERTISED_100baseT_Full (1 << 3) -#define ADVERTISED_1000baseT_Half (1 << 4) -#define ADVERTISED_1000baseT_Full (1 << 5) -#define ADVERTISED_Autoneg (1 << 6) -#define ADVERTISED_TP (1 << 7) -#define ADVERTISED_AUI (1 << 8) -#define ADVERTISED_MII (1 << 9) -#define ADVERTISED_FIBRE (1 << 10) -#define ADVERTISED_BNC (1 << 11) -#define ADVERTISED_10000baseT_Full (1 << 12) -#define ADVERTISED_Pause (1 << 13) -#define ADVERTISED_Asym_Pause (1 << 14) -#define ADVERTISED_2500baseX_Full (1 << 15) -#define ADVERTISED_Backplane (1 << 16) -#define ADVERTISED_1000baseKX_Full (1 << 17) -#define ADVERTISED_10000baseKX4_Full (1 << 18) -#define ADVERTISED_10000baseKR_Full (1 << 19) -#define ADVERTISED_10000baseR_FEC (1 << 20) -#define ADVERTISED_1000baseX_Half (1 << 21) -#define ADVERTISED_1000baseX_Full (1 << 22) - -/* The following are all involved in forcing a particular link - * mode for the device for setting things. When getting the - * devices settings, these indicate the current mode and whether - * it was foced up into this mode or autonegotiated. - */ - -/* The forced speed, 10Mb, 100Mb, gigabit, 2.5Gb, 10GbE. */ -#define SPEED_10 10 -#define SPEED_100 100 -#define SPEED_1000 1000 -#define SPEED_2500 2500 -#define SPEED_10000 10000 - -/* Duplex, half or full. */ -#define DUPLEX_HALF 0x00 -#define DUPLEX_FULL 0x01 - -/* Which connector port. */ -#define PORT_TP 0x00 -#define PORT_AUI 0x01 -#define PORT_MII 0x02 -#define PORT_FIBRE 0x03 -#define PORT_BNC 0x04 -#define PORT_DA 0x05 -#define PORT_NONE 0xef -#define PORT_OTHER 0xff - -/* Which transceiver to use. */ -#define XCVR_INTERNAL 0x00 -#define XCVR_EXTERNAL 0x01 -#define XCVR_DUMMY1 0x02 -#define XCVR_DUMMY2 0x03 -#define XCVR_DUMMY3 0x04 - -/* Enable or disable autonegotiation. If this is set to enable, - * the forced link modes above are completely ignored. - */ -#define AUTONEG_DISABLE 0x00 -#define AUTONEG_ENABLE 0x01 - -#define PHY_BASIC_FEATURES (SUPPORTED_10baseT_Half | \ - SUPPORTED_10baseT_Full | \ - SUPPORTED_100baseT_Half | \ - SUPPORTED_100baseT_Full | \ - SUPPORTED_Autoneg | \ - SUPPORTED_TP | \ - SUPPORTED_MII) - -#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \ - SUPPORTED_1000baseT_Half | \ - SUPPORTED_1000baseT_Full) - -#define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \ - SUPPORTED_10000baseT_Full) - -#define PHY_ANEG_TIMEOUT 4000 - - -typedef enum { - PHY_INTERFACE_MODE_MII, - PHY_INTERFACE_MODE_GMII, - PHY_INTERFACE_MODE_SGMII, - PHY_INTERFACE_MODE_QSGMII, - PHY_INTERFACE_MODE_TBI, - PHY_INTERFACE_MODE_RMII, - PHY_INTERFACE_MODE_RGMII, - PHY_INTERFACE_MODE_RGMII_ID, - PHY_INTERFACE_MODE_RGMII_RXID, - PHY_INTERFACE_MODE_RGMII_TXID, - PHY_INTERFACE_MODE_RTBI, - PHY_INTERFACE_MODE_XGMII, - PHY_INTERFACE_MODE_NONE /* Must be last */ -} phy_interface_t; - -static const char *phy_interface_strings[] = { - [PHY_INTERFACE_MODE_MII] = "mii", - [PHY_INTERFACE_MODE_GMII] = "gmii", - [PHY_INTERFACE_MODE_SGMII] = "sgmii", - [PHY_INTERFACE_MODE_QSGMII] = "qsgmii", - [PHY_INTERFACE_MODE_TBI] = "tbi", - [PHY_INTERFACE_MODE_RMII] = "rmii", - [PHY_INTERFACE_MODE_RGMII] = "rgmii", - [PHY_INTERFACE_MODE_RGMII_ID] = "rgmii-id", - [PHY_INTERFACE_MODE_RGMII_RXID] = "rgmii-rxid", - [PHY_INTERFACE_MODE_RGMII_TXID] = "rgmii-txid", - [PHY_INTERFACE_MODE_RTBI] = "rtbi", - [PHY_INTERFACE_MODE_XGMII] = "xgmii", - [PHY_INTERFACE_MODE_NONE] = "", -}; - -static inline const char *phy_string_for_interface(phy_interface_t i) -{ - /* Default to unknown */ - if (i > PHY_INTERFACE_MODE_NONE) - i = PHY_INTERFACE_MODE_NONE; - - return phy_interface_strings[i]; -} - - -struct phy_device; - -#define MDIO_NAME_LEN 32 - -struct mii_dev { - struct list_head link; - char name[MDIO_NAME_LEN]; - void *priv; - int (*read)(struct mii_dev *bus, int addr, int devad, int reg); - int (*write)(struct mii_dev *bus, int addr, int devad, int reg, - uint16_t val); - int (*reset)(struct mii_dev *bus); - struct phy_device *phymap[PHY_MAX_ADDR]; - uint32_t phy_mask; -}; - -/* struct phy_driver: a structure which defines PHY behavior - * - * uid will contain a number which represents the PHY. During - * startup, the driver will poll the PHY to find out what its - * UID--as defined by registers 2 and 3--is. The 32-bit result - * gotten from the PHY will be masked to - * discard any bits which may change based on revision numbers - * unimportant to functionality - * - */ -struct phy_driver { - char *name; - unsigned int uid; - unsigned int mask; - unsigned int mmds; - - uint32_t features; - - /* Called to do any driver startup necessities */ - /* Will be called during phy_connect */ - int (*probe)(struct phy_device *phydev); - - /* Called to configure the PHY, and modify the controller - * based on the results. Should be called after phy_connect */ - int (*config)(struct phy_device *phydev); - - /* Called when starting up the controller */ - int (*startup)(struct phy_device *phydev); - - /* Called when bringing down the controller */ - int (*shutdown)(struct phy_device *phydev); - - int (*readext)(struct phy_device *phydev, int addr, int devad, int reg); - int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg, - uint16_t val); - struct list_head list; -}; - -struct phy_device { - /* Information about the PHY type */ - /* And management functions */ - struct mii_dev *bus; - struct phy_driver *drv; - void *priv; - - struct eth_device *dev; - - /* forced speed & duplex (no autoneg) - * partner speed & duplex & pause (autoneg) - */ - int speed; - int duplex; - - /* The most recently read link state */ - int link; - int port; - phy_interface_t interface; - - uint32_t advertising; - uint32_t supported; - uint32_t mmds; - - int autoneg; - int addr; - int pause; - int asym_pause; - uint32_t phy_id; - uint32_t flags; -}; - -struct fixed_link { - int phy_id; - int duplex; - int link_speed; - int pause; - int asym_pause; -}; - -static inline int phy_read(struct phy_device *phydev, int devad, int regnum) -{ - struct mii_dev *bus = phydev->bus; - - return bus->read(bus, phydev->addr, devad, regnum); -} - -static inline int phy_write(struct phy_device *phydev, int devad, int regnum, - uint32_t val) -{ - struct mii_dev *bus = phydev->bus; - - return bus->write(bus, phydev->addr, devad, regnum, val); -} - -#ifdef CONFIG_PHYLIB_10G -extern struct phy_driver gen10g_driver; - -/* For now, XGMII is the only 10G interface */ -static inline int is_10g_interface(phy_interface_t interface) -{ - return interface == PHY_INTERFACE_MODE_XGMII; -} - -#endif - -int phy_init(void); -int phy_reset(struct phy_device *phydev); -struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask, - phy_interface_t interface); -void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev); -struct phy_device *phy_connect(struct mii_dev *bus, int addr, - struct eth_device *dev, - phy_interface_t interface); -int phy_startup(struct phy_device *phydev); -int phy_config(struct phy_device *phydev); -int phy_shutdown(struct phy_device *phydev); -int phy_register(struct phy_driver *drv); -int genphy_config_aneg(struct phy_device *phydev); -int genphy_restart_aneg(struct phy_device *phydev); -int genphy_update_link(struct phy_device *phydev); -int genphy_parse_link(struct phy_device *phydev); -int genphy_config(struct phy_device *phydev); -int genphy_startup(struct phy_device *phydev); -int genphy_shutdown(struct phy_device *phydev); -int gen10g_config(struct phy_device *phydev); -int gen10g_startup(struct phy_device *phydev); -int gen10g_shutdown(struct phy_device *phydev); -int gen10g_discover_mmds(struct phy_device *phydev); - -int phy_atheros_init(void); -int phy_broadcom_init(void); -int phy_davicom_init(void); -int phy_et1011c_init(void); -int phy_lxt_init(void); -int phy_marvell_init(void); -int phy_micrel_init(void); -int phy_natsemi_init(void); -int phy_realtek_init(void); -int phy_smsc_init(void); -int phy_teranetics_init(void); -int phy_vitesse_init(void); - -int board_phy_config(struct phy_device *phydev); - -/* PHY UIDs for various PHYs that are referenced in external code */ -#define PHY_UID_TN2020 0x00a19410 - -#endif /* __SUNXI_HAL_PHY_H__ */ diff --git a/src/platform/f133/include/hal/rtc/rtc.h b/src/platform/f133/include/hal/rtc/rtc.h deleted file mode 100644 index e1e587efd059b0e2a947f6b5737c5a7121771841..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/rtc/rtc.h +++ /dev/null @@ -1,82 +0,0 @@ -#ifndef _RTC_H_ -#define _RTC_H_ - -#include -#include -/* - * The struct used to pass data via the following ioctl. Similar to the - * struct tm in , but it needs to be here so that the kernel - * source is self contained, allowing cross-compiles, etc. etc. - */ - -struct rtc_time -{ - int tm_sec; - int tm_min; - int tm_hour; - int tm_mday; - int tm_mon; - int tm_year; - int tm_wday; - int tm_yday; - int tm_isdst; -}; - -typedef s64 time64_t; -/* - * This data structure is inspired by the EFI (v0.92) wakeup - * alarm API. - */ -struct rtc_wkalrm -{ - unsigned char enabled; /* 0 = alarm disabled, 1 = alarm enabled */ - unsigned char pending; /* 0 = alarm not pending, 1 = alarm pending */ - struct rtc_time time; /* time the alarm is set to */ -}; - -typedef enum -{ - RTC_IRQ_ERROR = -3, - RTC_CLK_ERROR = -2, - RTC_ERROR = -1, - RTC_OK = 0, -}hal_rtc_status_t; - -int rtc_month_days(unsigned int month, unsigned int year); -int rtc_year_days(unsigned int day, unsigned int month, unsigned int year); -int rtc_valid_tm(struct rtc_time *tm); -time64_t rtc_tm_to_time64(struct rtc_time *tm); -void rtc_time64_to_tm(time64_t time, struct rtc_time *tm); - -/* - * rtc_tm_sub - Return the difference in seconds. - */ -static inline time64_t rtc_tm_sub(struct rtc_time *lhs, struct rtc_time *rhs) -{ - return rtc_tm_to_time64(lhs) - rtc_tm_to_time64(rhs); -} - -static inline int is_leap_year(unsigned int year) -{ - return (!(year % 4) && (year % 100)) || !(year % 400); -} - - -/** - * Deprecated. Use rtc_time64_to_tm(). - */ -static inline void rtc_time_to_tm(unsigned long time, struct rtc_time *tm) -{ - rtc_time64_to_tm(time, tm); -} - -/** - * Deprecated. Use rtc_tm_to_time64(). - */ -static inline int rtc_tm_to_time(struct rtc_time *tm, unsigned long *time) -{ - *time = rtc_tm_to_time64(tm); - - return 0; -} -#endif /* _UAPI_LINUX_RTC_H_ */ diff --git a/src/platform/f133/include/hal/scr_config.h b/src/platform/f133/include/hal/scr_config.h deleted file mode 100644 index fa0468f1b4b4af17e6ae6f810e1e4037618e2f67..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/scr_config.h +++ /dev/null @@ -1,202 +0,0 @@ - -#ifndef _SCR_CONFIG_H_ -#define _SCR_CONFIG_H_ - -#include -//#ifdef CONFIG_SCR_TEST - -#define SCR0_TEST -//#define SCR1_TEST -//#define SCR2_TEST -//#define SCR3_TEST - -#define SMART_CARD_NUM 9 - -#define APB2CLK APB2_BUS_CLK -#define SCR_CLK_FRQ 4000000 //Hz - -#define CSR_CONFIG_DETPOL (0x0<<24) -#define CSR_CONFIG_T (0x0<<22) -#define CSR_CONFIG_ATRSTFLUSH (0x1<<21) -#define CSR_CONFIG_TSRXEN (0x1<<20) -#define CSR_CONFIG_CLKSTPPOL (0x0<<19) -#define CSR_CONFIG_PECRXE (0x0<<18) -#define CSR_CONFIG_MSBF (0x0<<17) -#define CSR_CONFIG_DPOL (0x0<<16) - -#ifdef SCR0_TEST - #define SCR_BASE SCR0_BASE - #define GIC_SRC_SCR GIC_SRC_SCR0 - #define SCR_NO 0 - - //IO define - #define DET_PIN GPIO_B(7) - #define DET_PIN_FUNC_NO 5 - #define CLK_PIN GPIO_B(4) - #define CLK_PIN_FUNC_NO 5 - #define RST_PIN GPIO_B(6) - #define RST_PIN_FUNC_NO 5 - #define DATA_PIN GPIO_B(5) - #define DATA_PIN_FUNC_NO 5 - - #define VCCEN_PIN GPIO_D(18) - #define VCCEN_PIN_FUNC_NO 1 - #define VPPEN_PIN GPIO_D(19) - #define VPPEN_PIN_FUNC_NO 1 - -#endif - -#ifdef SCR1_TEST - #define SCR_BASE SCR1_BASE - #define GIC_SRC_SCR GIC_SRC_SCR1 - #define SCR_NO 1 - - //IO define - #define DET_PIN GPIO_D(10) - #define DET_PIN_FUNC_NO 4 - #define CLK_PIN GPIO_D(11) - #define CLK_PIN_FUNC_NO 4 - #define RST_PIN GPIO_D(12) - #define RST_PIN_FUNC_NO 4 - #define DATA_PIN GPIO_D(13) - #define DATA_PIN_FUNC_NO 4 - - #define VCCEN_PIN GPIO_D(18) - #define VCCEN_PIN_FUNC_NO 1 - #define VPPEN_PIN GPIO_D(19) - #define VPPEN_PIN_FUNC_NO 1 -#endif - -#ifdef SCR2_TEST - #define SCR_BASE SCR2_BASE - #define GIC_SRC_SCR GIC_SRC_SCR2 - #define SCR_NO 2 - - //IO define - #define DET_PIN GPIO_D(10) - #define DET_PIN_FUNC_NO 4 - #define CLK_PIN GPIO_D(11) - #define CLK_PIN_FUNC_NO 4 - #define RST_PIN GPIO_D(12) - #define RST_PIN_FUNC_NO 4 - #define DATA_PIN GPIO_D(13) - #define DATA_PIN_FUNC_NO 4 - - #define VCCEN_PIN GPIO_D(18) - #define VCCEN_PIN_FUNC_NO 1 - #define VPPEN_PIN GPIO_D(19) - #define VPPEN_PIN_FUNC_NO 1 -#endif - -#ifdef SCR3_TEST - #define SCR_BASE SCR3_BASE - #define GIC_SRC_SCR GIC_SRC_SCR3 - #define SCR_NO 3 - - //IO define - #define DET_PIN GPIO_D(10) - #define DET_PIN_FUNC_NO 4 - #define CLK_PIN GPIO_D(11) - #define CLK_PIN_FUNC_NO 4 - #define RST_PIN GPIO_D(12) - #define RST_PIN_FUNC_NO 4 - #define DATA_PIN GPIO_D(13) - #define DATA_PIN_FUNC_NO 4 - - #define VCCEN_PIN GPIO_D(18) - #define VCCEN_PIN_FUNC_NO 1 - #define VPPEN_PIN GPIO_D(19) - #define VPPEN_PIN_FUNC_NO 1 -#endif - - -#define SCR_INTSTA_DEACT (0x1<<23) -#define SCR_INTSTA_ACT (0x1<<22) -#define SCR_INTSTA_INS (0x1<<21) -#define SCR_INTSTA_REM (0x1<<20) -#define SCR_INTSTA_ATRDONE (0x1<<19) -#define SCR_INTSTA_ATRFAIL (0x1<<18) -#define SCR_INTSTA_CHTO (0x1<<17) //Character Timout -#define SCR_INTSTA_CLOCK (0x1<<16) -#define SCR_INTSTA_RXPERR (0x1<<12) -#define SCR_INTSTA_RXDONE (0x1<<11) -#define SCR_INTSTA_RXFTH (0x1<<10) -#define SCR_INTSTA_RXFFULL (0x1<<9) -#define SCR_INTSTA_TXPERR (0x1<<4) -#define SCR_INTSTA_TXDONE (0x1<<3) -#define SCR_INTSTA_TXFTH (0x1<<2) -#define SCR_INTSTA_TXFEMPTY (0x1<<1) -#define SCR_INTSTA_TXFDONE (0x1<<0) - - - -#define SCR_FIFO_DEPTH 16 - -#define SCR_CSR_OFF (0x000) -#define SCR_INTEN_OFF (0x004) -#define SCR_INTST_OFF (0x008) -#define SCR_FCSR_OFF (0x00c) -#define SCR_FCNT_OFF (0x010) -#define SCR_RPT_OFF (0x014) -#define SCR_DIV_OFF (0x018) -#define SCR_LTIM_OFF (0x01c) -#define SCR_CTIM_OFF (0x020) -#define SCR_LCTL_OFF (0x030) -#define SCR_DBE_TIME (0x040) -#define SCR_FSM_OFF (0x03c) -#define SCR_FIFO_OFF (0x100) - - - -#if 0 -#define LAI_XI 0 -#define SHEN_ZHOU_1 1 -#define SHEN_ZHOU_2 2 -#define SHU_ZI_1 3 -#define SHU_ZI_2 4 -#define DIAN_XI_4G 5 -#define LIAN_TONG 6 -#define YI_DONG 7 -#define DIGITAL_VIDEO 8 -#endif - -#if 0 -//SCR Card State FSM -#define SCR_CARD_IDLE 0x0 -#define SCR_CARD_ACT 0x1 -#define SCR_CARD_ATR 0x2 -#define SCR_CARD_DATA 0x3 -#define SCR_CARD_DEACT 0x4 -//SCR Active/Deactive State FSM -#define SCR_ACT_INACTIVE 0x0 -#define SCR_ACT_A1 0x1 // Vcc shall be powered -#define SCR_ACT_A2 0x2 // I/O shall be put in reception mode -#define SCR_ACT_A3 0x3 // Vpp shall be raised to idle state (if AutoVPP) -#define SCR_ACT_ACTIVE 0x4 // CLK shall be provided with a suitable and stable clock -#define SCR_ACT_D1 0x5 // State L on RST -#define SCR_ACT_D2 0x6 // State L on CLK -#define SCR_ACT_D3 0x7 // Vpp inactive (if AutoVPP) -#define SCR_ACT_D4 0x8 // State A on I/O -#define SCR_ACT_D5 0x9 // Vcc inactive -//SCR ATR State FSM -#define SCR_ATR_IDLE 0x0 -#define SCR_ATR_RST 0x1 -#define SCR_ATR_WAIT 0x2 -#define SCR_ATR_START 0x3 -#define SCR_ATR_DONEx 0x4 -#define SCR_ATR_FAILx 0x5 -//SCR ATR Structure State FSM -#define SCR_STR_IDLE 0x0 -#define SCR_STR_TS 0x1 -#define SCR_STR_T0 0x2 -#define SCR_STR_TX 0x3 -#define SCR_STR_TK 0x4 -#define SCR_STR_TCK 0x5 -#define SCR_STR_DONE 0x6 -#define SCR_STR_FAIL 0x7 -#endif - - -//#endif - -#endif//_SCR_CONFIG_H_ diff --git a/src/platform/f133/include/hal/scr_hal.h b/src/platform/f133/include/hal/scr_hal.h deleted file mode 100644 index 486d9bf816138ea1e8759f7ef8c3d551b7d4c176..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/scr_hal.h +++ /dev/null @@ -1,120 +0,0 @@ -#include -#include -#include -#include "scr_config.h" - -#ifndef _SCR_HAL_H_ -#define _SCR_HAL_H_ - -//#ifdef CONFIG_SCR_TEST - -typedef struct -{ - volatile uint32_t wptr; - volatile uint32_t rptr; - #define SCR_BUFFER_SIZE_MASK 0xff - volatile uint8_t buffer[SCR_BUFFER_SIZE_MASK+1]; -}scr_buffer, *pscr_buffer; - -typedef struct { - uint32_t reg_base; - uint32_t irq_no; - volatile uint32_t irq_accsta; - volatile uint32_t irq_cursta; - volatile uint32_t irq_flag; - //control and status register config - uint32_t csr_config; - //interrupt enable bit map - uint32_t inten_bm; - //txfifo threshold - uint32_t txfifo_thh; - //rxfifo threahold - uint32_t rxfifo_thh; - //tx repeat - uint32_t tx_repeat; - //rx repeat - uint32_t rx_repeat; - //scclk divisor - uint32_t scclk_div; - //baud divisor - uint32_t baud_div; - //activation/deactivation time, in scclk cycles - uint32_t act_time; - //reset time, in scclk cycles - uint32_t rst_time; - //ATR limit time, in scclk cycles - uint32_t atr_time; - //gaurd time, in ETUs - uint32_t guard_time; - //character limit time, in ETUs - uint32_t chlimit_time; - - uint32_t debounce_time; - - scr_buffer rxbuf; - scr_buffer txbuf; - - volatile uint32_t detected; - volatile uint32_t activated; - #define SCR_ATR_RESP_INVALID 0 - #define SCR_ATR_RESP_FAIL 1 - #define SCR_ATR_RESP_OK 2 - volatile uint32_t atr_resp; - - uint32_t chto_flag; - -}scr_struct, *pscr_struct; - - -#define SCR_FSM_MAX_RECORD 1024 -typedef struct { - uint32_t count; - uint32_t old; - uint32_t record[SCR_FSM_MAX_RECORD]; -}scr_fsm_record, *pscr_fsm_record; - - -typedef struct{ - uint8_t TS; - - uint8_t TK[15]; - uint8_t TK_NUM; - - uint32_t T; //Protocol - uint32_t FMAX; //in MHz - uint32_t F; - uint32_t D; - uint32_t I; //Max Cunrrent for Program, in mA - uint32_t P; //Program Voltage - uint32_t N; //Extra Guard Time, in ETUs -}scatr_struct, *pscatr_struct; - - -typedef struct { - uint8_t ppss; - uint8_t pps0; - uint8_t pps1; - uint8_t pps2; - uint8_t pps3; - uint8_t pck; -} upps_struct, *ppps_struct; - - -//SCR Test Stage (State Machine) -typedef enum {sts_wait_connect=0, - sts_wait_act, - sts_wait_atr, - sts_warm_reset, - sts_wait_atr_again, - sts_start_pps, - sts_wait_pps_resp, - sts_send_cmd, - sts_start_deact, - sts_wait_deact, - sts_wait_disconnect, - sts_idle, - } scr_test_stage; - - -#endif //_SCR_HAL_H_ - diff --git a/src/platform/f133/include/hal/scr_hal_function.h b/src/platform/f133/include/hal/scr_hal_function.h deleted file mode 100644 index a70ccfcaab0ad29e504591ac81fab400075c86bd..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/scr_hal_function.h +++ /dev/null @@ -1,421 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "hal_clk.h" -#include "scr_config.h" -#include "scr_hal.h" - -#ifndef _SCR_HAL_FUNCTION_H_ -#define _SCR_HAL_FUNCTION_H_ - -#define get_wvalue readl - -void put_wvalue(u32 addr, u32 v) -{ - writel(v, addr); -} - -void scr_set_csr_config(pscr_struct pscr, uint32_t config) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_CSR_OFF); - reg_val &= ~(0x1ff<<16); - reg_val |= config & (0x1ff<<16); - put_wvalue(pscr->reg_base + SCR_CSR_OFF, reg_val); -} - -uint32_t scr_get_csr_config(pscr_struct pscr) -{ - return get_wvalue(pscr->reg_base + SCR_CSR_OFF); -} - -uint32_t scr_detected(pscr_struct pscr) -{ - return (get_wvalue(pscr->reg_base + SCR_CSR_OFF)>>31); -} - -void scr_start_deactivation(pscr_struct pscr) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_CSR_OFF); - reg_val |= (0x1<<11); - put_wvalue(pscr->reg_base + SCR_CSR_OFF, reg_val); -} - -void scr_start_activation(pscr_struct pscr) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_CSR_OFF); - reg_val |= (0x1<<10); - put_wvalue(pscr->reg_base + SCR_CSR_OFF, reg_val); -} - -void scr_start_warmreset(pscr_struct pscr) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_CSR_OFF); - reg_val |= (0x1<<9); - put_wvalue(pscr->reg_base + SCR_CSR_OFF, reg_val); -} - -void scr_stop_clock(pscr_struct pscr) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_CSR_OFF); - reg_val |= (0x1<<8); - put_wvalue(pscr->reg_base + SCR_CSR_OFF, reg_val); -} - -void scr_restart_clock(pscr_struct pscr) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_CSR_OFF); - reg_val &= ~(0x1<<8); - put_wvalue(pscr->reg_base + SCR_CSR_OFF, reg_val); -} - -void scr_global_interrupt_enable(pscr_struct pscr) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_CSR_OFF); - reg_val |= (0x1<<2); - put_wvalue(pscr->reg_base + SCR_CSR_OFF, reg_val); -} - -void scr_global_interrupt_disable(pscr_struct pscr) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_CSR_OFF); - reg_val &= ~(0x1<<2); - put_wvalue(pscr->reg_base + SCR_CSR_OFF, reg_val); -} - -void scr_receive_enable(pscr_struct pscr) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_CSR_OFF); - reg_val |= (0x1<<1); - put_wvalue(pscr->reg_base + SCR_CSR_OFF, reg_val); -} - -void scr_receive_disable(pscr_struct pscr) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_CSR_OFF); - reg_val &= ~(0x1<<1); - put_wvalue(pscr->reg_base + SCR_CSR_OFF, reg_val); -} - -void scr_transmit_enable(pscr_struct pscr) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_CSR_OFF); - reg_val |= (0x1<<0); - put_wvalue(pscr->reg_base + SCR_CSR_OFF, reg_val); -} - -void scr_transmit_disable(pscr_struct pscr) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_CSR_OFF); - reg_val &= ~(0x1<<0); - put_wvalue(pscr->reg_base + SCR_CSR_OFF, reg_val); -} - -void scr_set_interrupt_enable(pscr_struct pscr, uint32_t bm) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_INTEN_OFF); - reg_val |= bm; - put_wvalue(pscr->reg_base + SCR_INTEN_OFF, reg_val); -} - -void scr_set_interrupt_disable(pscr_struct pscr, uint32_t bm) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_INTEN_OFF); - reg_val &= ~bm; - put_wvalue(pscr->reg_base + SCR_INTEN_OFF, reg_val); -} - -uint32_t scr_get_interrupt_enable(pscr_struct pscr) -{ - return get_wvalue(pscr->reg_base + SCR_INTEN_OFF); -} - -uint32_t scr_get_interrupt_status(pscr_struct pscr) -{ - return get_wvalue(pscr->reg_base + SCR_INTST_OFF); -} - -void scr_clear_interrupt_status(pscr_struct pscr, uint32_t bm) -{ - put_wvalue(pscr->reg_base + SCR_INTST_OFF, bm); -} - -void scr_flush_txfifo(pscr_struct pscr) -{ - put_wvalue(pscr->reg_base + SCR_FCSR_OFF, (0x1<<2)); -} - -void scr_flush_rxfifo(pscr_struct pscr) -{ - put_wvalue(pscr->reg_base + SCR_FCSR_OFF, (0x1<<10)); -} - -uint32_t scr_txfifo_is_empty(pscr_struct pscr) -{ - return (get_wvalue(pscr->reg_base + SCR_FCSR_OFF)&0x1); -} - -uint32_t scr_txfifo_is_full(pscr_struct pscr) -{ - return ((get_wvalue(pscr->reg_base + SCR_FCSR_OFF)>>1)&0x1); -} - -uint32_t scr_rxfifo_is_empty(pscr_struct pscr) -{ - return ((get_wvalue(pscr->reg_base + SCR_FCSR_OFF)>>8)&0x1); -} - -uint32_t scr_rxfifo_is_full(pscr_struct pscr) -{ - return ((get_wvalue(pscr->reg_base + SCR_FCSR_OFF)>>9)&0x1); -} - -void scr_set_txfifo_threshold(pscr_struct pscr, uint32_t thh) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_FCNT_OFF); - reg_val &= ~(0xff<<16); - reg_val |= (thh&0xff)<<16; - put_wvalue(pscr->reg_base + SCR_FCNT_OFF, reg_val); -} - -void scr_set_rxfifo_threshold(pscr_struct pscr, uint32_t thh) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_FCNT_OFF); - reg_val &= ~(0xffU<<24); - reg_val |= (thh&0xff)<<24; - put_wvalue(pscr->reg_base + SCR_FCNT_OFF, reg_val); -} - -uint32_t scr_get_txfifo_count(pscr_struct pscr) -{ - return (get_wvalue(pscr->reg_base + SCR_FCNT_OFF)&0xff); -} - -uint32_t scr_get_rxfifo_count(pscr_struct pscr) -{ - return ((get_wvalue(pscr->reg_base + SCR_FCNT_OFF)>>8)&0xff); -} - -void scr_set_tx_repeat(pscr_struct pscr, uint32_t repeat) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_RPT_OFF); - reg_val &= ~(0xf<<0); - reg_val |= (repeat&0xf)<<0; - put_wvalue(pscr->reg_base + SCR_RPT_OFF, reg_val); -} - -void scr_set_rx_repeat(pscr_struct pscr, uint32_t repeat) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_RPT_OFF); - reg_val &= ~(0xf<<4); - reg_val |= (repeat&0xf)<<4; - put_wvalue(pscr->reg_base + SCR_RPT_OFF, reg_val); -} - -void scr_set_scclk_divisor(pscr_struct pscr, uint32_t divisor) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_DIV_OFF); - reg_val &= ~(0xffff<<0); - reg_val |= (divisor&0xffff)<<0; - put_wvalue(pscr->reg_base + SCR_DIV_OFF, reg_val); -} - -void scr_set_baud_divisor(pscr_struct pscr, uint32_t divisor) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_DIV_OFF); - reg_val &= ~(0xffffU<<16); - reg_val |= (divisor&0xffff)<<16; - put_wvalue(pscr->reg_base + SCR_DIV_OFF, reg_val); -} - -uint32_t scr_get_scclk_divisor(pscr_struct pscr) -{ - return get_wvalue(pscr->reg_base + SCR_DIV_OFF)&0xffff; -} - -uint32_t scr_get_baud_divisor(pscr_struct pscr) -{ - return get_wvalue(pscr->reg_base + SCR_DIV_OFF)>>16; -} - -void scr_set_activation_time(pscr_struct pscr, uint32_t scclk) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_LTIM_OFF); - reg_val &= ~(0xff<<0); - reg_val |= (scclk&0xff)<<0; - put_wvalue(pscr->reg_base + SCR_LTIM_OFF, reg_val); -} - -void scr_set_reset_time(pscr_struct pscr, uint32_t scclk) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_LTIM_OFF); - reg_val &= ~(0xff<<8); - reg_val |= (scclk&0xff)<<8; - put_wvalue(pscr->reg_base + SCR_LTIM_OFF, reg_val); -} - -void scr_set_atrlimit_time(pscr_struct pscr, uint32_t scclk) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_LTIM_OFF); - reg_val &= ~(0xff<<16); - reg_val |= (scclk&0xff)<<16; - put_wvalue(pscr->reg_base + SCR_LTIM_OFF, reg_val); -} - -uint32_t scr_get_line_time(pscr_struct pscr) -{ - return get_wvalue(pscr->reg_base + SCR_LTIM_OFF); -} - -void scr_set_guard_time(pscr_struct pscr, uint32_t etu) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_CTIM_OFF); - reg_val &= ~(0xff<<0); - reg_val |= (etu&0xff)<<0; - put_wvalue(pscr->reg_base + SCR_CTIM_OFF, reg_val); -} - -void scr_set_chlimit_time(pscr_struct pscr, uint32_t etu) -{ - uint32_t reg_val; - - reg_val = get_wvalue(pscr->reg_base + SCR_CTIM_OFF); - reg_val &= ~(0xffffU<<16); - reg_val |= (etu&0xffff)<<16; - put_wvalue(pscr->reg_base + SCR_CTIM_OFF, reg_val); -} - -void scr_set_debounce_time(pscr_struct pscr, uint32_t etu) -{ - put_wvalue(pscr->reg_base + SCR_DBE_TIME, etu); -} - -uint32_t scr_get_character_time(pscr_struct pscr) -{ - return get_wvalue(pscr->reg_base + SCR_CTIM_OFF); -} - -void scr_auto_vpp_enable(pscr_struct pscr) -{ -// set_wbit(pscr->reg_base + SCR_LCTL_OFF, 0x1<<5); - int ret; - - ret = readl(pscr->reg_base + SCR_LCTL_OFF); - writel(0x20 | ret, pscr->reg_base + SCR_LCTL_OFF); -} - -void scr_auto_vpp_disable(pscr_struct pscr) -{ -// clr_wbit(pscr->reg_base + SCR_LCTL_OFF, 0x1<<5); - int ret; - - ret = readl(pscr->reg_base + SCR_LCTL_OFF); - writel(0xdf & ret, pscr->reg_base + SCR_LCTL_OFF); -} - -void scr_write_fifo(pscr_struct pscr, uint8_t data) -{ - while(get_wvalue(pscr->reg_base + SCR_FCSR_OFF)&0x2); - put_wvalue(pscr->reg_base + SCR_FIFO_OFF, (uint32_t)data); -} - -uint8_t scr_read_fifo(pscr_struct pscr) -{ - return ((uint8_t)get_wvalue(pscr->reg_base + SCR_FIFO_OFF)); -} - -uint32_t scr_get_fsm(pscr_struct pscr) -{ - return get_wvalue(pscr->reg_base + SCR_FSM_OFF); -} - -uint32_t scr_buffer_is_empty(pscr_buffer pbuf) -{ - return (pbuf->wptr==pbuf->rptr); -} - -uint32_t scr_buffer_is_full(pscr_buffer pbuf) -{ - return ((pbuf->wptr^pbuf->rptr)==(SCR_BUFFER_SIZE_MASK+1)); -} - -void scr_buffer_flush(pscr_buffer pbuf) -{ - pbuf->wptr = pbuf->rptr = 0; -} - - -extern uint32_t scr_init(pscr_struct pscr); -extern void scr_handler_irq(pscr_struct pscr); -extern void scr_fsm_record_start(pscr_struct pscr, pscr_fsm_record pfsm); -extern void scr_fsm_record_run(pscr_struct pscr, pscr_fsm_record pfsm); -extern void scr_fsm_decode(uint32_t val); - -extern void scr_fill_buffer(pscr_buffer pbuf, uint8_t data); -extern uint8_t scr_dump_buffer(pscr_buffer pbuf); - -extern uint32_t scr_test_interrupt_status(pscr_struct pscr); - -u32 scr_rx_fifo_read(u8 *buffer); - -extern uint32_t smartcard_params_init(pscatr_struct pscatr); - -extern uint32_t smartcard_atr_decode(pscatr_struct pscatr, uint8_t* pdata, ppps_struct pps, uint32_t with_ts); - -//#endif - -#endif //_SCR_HAL_H_ - diff --git a/src/platform/f133/include/hal/sdmmc/card.h b/src/platform/f133/include/hal/sdmmc/card.h deleted file mode 100644 index 469e9ec902794096e81a53bed87c63fbe63fa60e..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/card.h +++ /dev/null @@ -1,356 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_SDMMC_CARD_H_ -#define _DRIVER_CHIP_SDMMC_CARD_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include "osal/os_mutex.h" - -#define CONFIG_SDIO_USE_FUNS -//#define CONFIG_USE_SDIO_COMBO - -//#define SD_SUPPORT_VERSION3 /* not support for not support 1V8 */ #error !! -//#define CONFIG_USE_MMC_QUIRK /* not support now */ #error !! -//#define CONFIG_SDIO_USE_FUNS /* close to save code. and not support now */ #error !! - -#define SYSTEM_SIMULATION - -#ifdef CONFIG_USE_SDIO -struct sdio_func; -typedef void (sdio_irq_handler_t)(struct sdio_func *); - -/* - * SDIO function devices - */ -struct sdio_func { - struct mmc_card *card; /* the card this device belongs to */ - sdio_irq_handler_t *irq_handler; /* IRQ callback */ - uint32_t num; /* function number */ - - unsigned char class; /* standard interface class */ - unsigned short vendor; /* vendor id */ - unsigned short device; /* device id */ - - uint32_t max_blksize; /* maximum block size */ - uint32_t cur_blksize; /* current block size */ - - uint32_t enable_timeout; /* max enable timeout in msec */ - - uint32_t state; /* function state */ -#define SDIO_STATE_PRESENT (1<<0) /* present in sysfs */ - - uint8_t tmpbuf[4]; /* DMA:able scratch buffer */ - - unsigned num_info; /* number of info strings */ - const char **info; /* info strings */ - - struct sdio_func_tuple *tuples; - /*for rtl*/ - void *drv_prv; -}; - -#define sdio_func_present(f) ((f)->state & SDIO_STATE_PRESENT) -#define sdio_func_set_present(f) ((f)->state |= SDIO_STATE_PRESENT) - -#endif - -struct mmc_ocr { - union { - uint32_t vol_window : 24, - to_1v8_acpt : 1, - : 5, - high_capacity : 1, - : 1; - uint32_t ocr; - }; -}; - -struct mmc_cid { - uint16_t oemid; - uint8_t manfid; - uint32_t serial; - uint16_t year; - uint8_t month; - uint8_t hwrev; - uint8_t fwrev; - uint8_t prod_name[6]; -}; - -struct mmc_csd { - uint8_t csd_ver; - //uint8_t c_size_mult; - //uint16_t c_size; - uint32_t max_dtr; /* max transfer speed */ - uint16_t read_blk_len; - uint16_t cmdclass; - uint32_t capacity; -}; - -struct sd_scr { - uint8_t sda_vsn; - uint8_t sda_spec3; - uint8_t sda_spec4; - uint8_t sda_spec5; - uint8_t bus_widths; - uint8_t security_sup; -#define SD_SCR_BUS_WIDTH_1 (1<<0) -#define SD_SCR_BUS_WIDTH_4 (1<<2) - uint8_t cmds; -#define SD_SCR_CMD20_SUPPORT (1<<0) -#define SD_SCR_CMD23_SUPPORT (1<<1) -}; - -struct sd_ssr { - uint32_t au; /* In sectors */ - uint32_t erase_timeout; /* In milliseconds */ - uint32_t erase_offset; /* In milliseconds */ -}; - -struct sd_switch_caps { - uint32_t hs_max_dtr; - uint32_t uhs_max_dtr; -#define HIGH_SPEED_MAX_DTR 50000000 -#define UHS_SDR104_MAX_DTR 208000000 -#define UHS_SDR50_MAX_DTR 100000000 -#define UHS_DDR50_MAX_DTR 50000000 -#define UHS_SDR25_MAX_DTR UHS_DDR50_MAX_DTR -#define UHS_SDR12_MAX_DTR 25000000 - uint32_t sd3_bus_mode; -#define UHS_SDR12_BUS_SPEED 0 -#define HIGH_SPEED_BUS_SPEED 1 -#define UHS_SDR25_BUS_SPEED 1 -#define UHS_SDR50_BUS_SPEED 2 -#define UHS_SDR104_BUS_SPEED 3 -#define UHS_DDR50_BUS_SPEED 4 - -#define SD_MODE_HIGH_SPEED (1 << HIGH_SPEED_BUS_SPEED) -#define SD_MODE_UHS_SDR12 (1 << UHS_SDR12_BUS_SPEED) -#define SD_MODE_UHS_SDR25 (1 << UHS_SDR25_BUS_SPEED) -#define SD_MODE_UHS_SDR50 (1 << UHS_SDR50_BUS_SPEED) -#define SD_MODE_UHS_SDR104 (1 << UHS_SDR104_BUS_SPEED) -#define SD_MODE_UHS_DDR50 (1 << UHS_DDR50_BUS_SPEED) - uint32_t sd3_drv_type; -#define SD_DRIVER_TYPE_B 0x01 -#define SD_DRIVER_TYPE_A 0x02 -#define SD_DRIVER_TYPE_C 0x04 -#define SD_DRIVER_TYPE_D 0x08 - uint32_t sd3_curr_limit; -#define SD_SET_CURRENT_LIMIT_200 0 -#define SD_SET_CURRENT_LIMIT_400 1 -#define SD_SET_CURRENT_LIMIT_600 2 -#define SD_SET_CURRENT_LIMIT_800 3 - -#define SD_MAX_CURRENT_200 (1 << SD_SET_CURRENT_LIMIT_200) -#define SD_MAX_CURRENT_400 (1 << SD_SET_CURRENT_LIMIT_400) -#define SD_MAX_CURRENT_600 (1 << SD_SET_CURRENT_LIMIT_600) -#define SD_MAX_CURRENT_800 (1 << SD_SET_CURRENT_LIMIT_800) -}; - -struct mmc_ext_csd { - uint8_t version; - uint8_t card_type; - uint8_t csd_struc; - uint8_t hs_timing; - uint8_t bus_width; - uint8_t part_config; - uint8_t boot_bus_cond; -}; - -struct sdio_cccr { - uint32_t sdio_vsn; - uint32_t sd_vsn; - uint32_t multi_block:1, - low_speed:1, - wide_bus:1, - high_power:1, - high_speed:1, - disable_cd:1; -}; - -struct sdio_cis { - uint16_t vendor; - uint16_t device; - uint16_t blksize; - uint32_t max_dtr; -}; - -struct mmc_host; - -#define SDIO_MAX_FUNCS 7 - -/** @bried SD Card Init Structure definition. */ -typedef struct { - uint16_t debug_mask; - uint16_t type; /* set card type if we know to speed up scan card, MMC_TYPE_xx */ -} SDCard_InitTypeDef; - -struct mmc_card { - uint16_t debug_mask; - uint16_t suspend; -//#if ((defined CONFIG_USE_SD) || (defined CONFIG_USE_MMC)) - /* register info. */ - struct mmc_cid cid; - struct mmc_csd csd; - struct sd_scr scr; - struct sd_ssr ssr; - struct mmc_ext_csd extcsd; - struct sd_switch_caps sw_caps; /* switch (CMD6) caps */ -//#endif - /* card information */ - uint32_t id; - uint32_t type; /* card type */ -#define MMC_TYPE_MMC 1 /* MMC card */ -#define MMC_TYPE_SD 2 /* SD card */ -#define MMC_TYPE_SDIO 3 /* SDIO card */ -#define MMC_TYPE_SD_COMBO 4 /* SD combo (IO+mem) card */ -#define MMC_TYPE_MAX 5 - - uint32_t sd_bus_speed; /* Bus Speed Mode set for the card */ - uint32_t state; /* (our) card state */ -#define MMC_STATE_PRESENT (1 << 0) /* present */ -#define MMC_STATE_READONLY (1 << 1) /* card is read-only */ -#define MMC_STATE_HIGHSPEED (1 << 2) /* card is in high speed mode */ -#define MMC_STATE_BLOCKADDR (1 << 3) /* card uses block-addressing */ -#define MMC_STATE_HIGHSPEED_DDR (1 << 4) /* card is in high speed mode */ - -#define MMC_STATE_ULTRAHIGHSPEED (1<<5) /* card is in ultra high speed mode */ -#define MMC_CARD_SDXC (1<<6) /* card is SDXC */ -#define MMC_CARD_REMOVED (1<<7) /* card has been removed */ -#define MMC_STATE_HIGHSPEED_200 (1<<8) /* card is in HS200 mode */ -#define MMC_STATE_SLEEP (1<<9) /* card is in sleep state */ -//#ifdef CONFIG_USE_MMC_QUIRK - uint32_t quirks; /* card quirks */ -#define MMC_QUIRK_LENIENT_FN0 (1 << 0) /* allow SDIO FN0 writes outside of the VS CCCR range */ -#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1 << 1) /* use func->cur_blksize */ -/* for byte mode */ -#define MMC_QUIRK_NONSTD_SDIO (1 << 2) /* non-standard SDIO card attached */ - /* (missing CIA registers) */ -#define MMC_QUIRK_BROKEN_CLK_GATING (1<<3) /* clock gating the sdio bus will make card fail */ -#define MMC_QUIRK_NONSTD_FUNC_IF (1<<4) /* SDIO card has nonstd function interfaces */ -#define MMC_QUIRK_DISABLE_CD (1<<5) /* disconnect CD/DAT[3] resistor */ -#define MMC_QUIRK_INAND_CMD38 (1<<6) /* iNAND devices have broken CMD38 */ -#define MMC_QUIRK_BLK_NO_CMD23 (1<<7) /* Avoid CMD23 for regular multiblock */ -#define MMC_QUIRK_BROKEN_BYTE_MODE_512 (1<<8) /* Avoid sending 512 bytes in */ -#define MMC_QUIRK_LONG_READ_TIME (1<<9) /* Data read time > CSD says */ -#define MMC_QUIRK_SEC_ERASE_TRIM_BROKEN (1<<10) /* Skip secure for erase/trim */ -//#endif -/* missing CIA registers */ - -//#ifdef CONFIG_SDIO_USE_FUNS - uint32_t erase_size; /* erase size in sectors */ - uint32_t erase_shift; /* if erase unit is power 2 */ - uint32_t pref_erase; /* in sectors */ - uint8_t erased_byte; /* value of erased bytes */ - - uint32_t raw_cid[4]; /* raw card CID */ - uint32_t raw_csd[4]; /* raw card CSD */ - uint32_t raw_scr[2]; /* raw card SCR */ - uint32_t sdio_funcs; /* number of SDIO functions */ - struct sdio_func *sdio_func[SDIO_MAX_FUNCS]; /* SDIO functions (devices) */ - uint32_t num_info; /* number of info strings */ - const int8_t **info; /* info strings */ -//#ifdef CONFIG_SDIO_IRQ_SUPPORT -// sdio_irq_handler_t *sdio_single_irq; /* IRQ callback, all funs only support one for efficiency! */ - struct sdio_func *sdio_single_irq; /* SDIO function when only one IRQ active */ -//#endif -//#endif -#ifdef CONFIG_USE_SDIO - uint32_t manfid; - uint32_t cisptr[8]; - uint16_t fn_bsize[8]; - void *mem_info_p; //if with memory, to store information about memory portion - //struct sdio_func *sdio_func[SDIO_MAX_FUNCS]; /* SDIO functions (devices) */ - struct sdio_cccr cccr; /* common card info */ - struct sdio_cis cis; /* common tuple info */ - - struct sdio_func_tuple *tuples; /* unknown common tuples */ -#endif - uint8_t bus_width; - uint8_t speed_class; - uint16_t ref; - OS_Mutex_t mutex; - uint32_t cidno[4]; - - uint32_t rca; /* relative card address of device */ - struct mmc_ocr ocr; - struct mmc_host *host; /* the host this device belongs to */ -}; - -struct mmc_card_info { - struct mmc_card card; - struct sdio_func sdio_func[SDIO_MAX_FUNCS]; /* SDIO functions (devices) */ - //const int8_t **info; /* info strings */ - //struct sdio_func *sdio_single_irq; /* SDIO function when only one IRQ active */ - //void *mem_info_p; //if with memory, to store information about memory portion -#ifdef CONFIG_USE_SDIO - //struct sdio_func_tuple *tuples; /* unknown common tuples */ -#endif - uint32_t sdc_id; -}; - -#define mmc_card_mmc(c) ((c)->type == MMC_TYPE_MMC) -#define mmc_card_sd(c) ((c)->type == MMC_TYPE_SD) -#define mmc_card_sdio(c) ((c)->type == MMC_TYPE_SDIO) -#define mmc_card_sd_combo(c) ((c)->type == MMC_TYPE_SD_COMBO) - -#define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT) -#define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY) -#define mmc_card_highspeed(c) ((c)->state & MMC_STATE_HIGHSPEED) -#define mmc_card_hs200(c) ((c)->state & MMC_STATE_HIGHSPEED_200) -#define mmc_card_blockaddr(c) ((c)->state & MMC_STATE_BLOCKADDR) -#define mmc_card_ddr_mode(c) ((c)->state & MMC_STATE_HIGHSPEED_DDR) -#define mmc_card_uhs(c) ((c)->state & MMC_STATE_ULTRAHIGHSPEED) -#define mmc_sd_card_uhs(c) ((c)->state & MMC_STATE_ULTRAHIGHSPEED) -#define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC) -#define mmc_card_removed(c) ((c) && ((c)->state & MMC_CARD_REMOVED)) -#define mmc_card_is_sleep(c) ((c)->state & MMC_STATE_SLEEP) - -#define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT) -#define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY) -#define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED) -#define mmc_card_set_hs200(c) ((c)->state |= MMC_STATE_HIGHSPEED_200) -#define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR) -#define mmc_card_set_ddr_mode(c) ((c)->state |= MMC_STATE_HIGHSPEED_DDR) -#define mmc_card_set_uhs(c) ((c)->state |= MMC_STATE_ULTRAHIGHSPEED) -#define mmc_sd_card_set_uhs(c) ((c)->state |= MMC_STATE_ULTRAHIGHSPEED) -#define mmc_card_set_ext_capacity(c) ((c)->state |= MMC_CARD_SDXC) -#define mmc_card_set_removed(c) ((c)->state |= MMC_CARD_REMOVED) -#define mmc_card_set_sleep(c) ((c)->state |= MMC_STATE_SLEEP) - -#define mmc_card_clr_sleep(c) ((c)->state &= ~MMC_STATE_SLEEP) - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_CHIP_SDMMC_CARD_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/cmd/cmd_debug.h b/src/platform/f133/include/hal/sdmmc/cmd/cmd_debug.h deleted file mode 100644 index 90de2490c525bb377ce7b49789f9fc2b7d80e280..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/cmd/cmd_debug.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _CMD_DEBUG_H_ -#define _CMD_DEBUG_H_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define CMD_DBG_ON 1 -#define CMD_WRN_ON 1 -#define CMD_ERR_ON 1 - -#define CMD_SYSLOG printf - -#define CMD_LOG(flags, fmt, arg...) \ - do { \ - if (flags) \ - CMD_SYSLOG(fmt, ##arg); \ - } while (0) - -#define CMD_DBG(fmt, arg...) \ - CMD_LOG(CMD_DBG_ON, "[cmd] "fmt, ##arg) - -#define CMD_WRN(fmt, arg...) \ - CMD_LOG(CMD_WRN_ON, "[cmd WRN] "fmt, ##arg) - -#define CMD_ERR(fmt, arg...) \ - CMD_LOG(CMD_ERR_ON, "[cmd ERR] %s():%d, "fmt, __func__, __LINE__, ##arg) - -#ifdef __cplusplus -} -#endif - -#endif /* _CMD_DEBUG_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/cmd/cmd_defs.h b/src/platform/f133/include/hal/sdmmc/cmd/cmd_defs.h deleted file mode 100644 index 9a09375c4df59d8fbf0c24d997b2a383dadc3474..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/cmd/cmd_defs.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _CMD_DEFS_H_ -#define _CMD_DEFS_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -enum cmd_code_type { - CMD_CODE_TYEP_STATUS = 0, - CMD_CODE_TYEP_EVENT, -}; - -enum cmd_status { - CMD_STATUS_ACKED = 100, /* already acked, no need to send respond */ - - /* success status */ - CMD_STATUS_SUCCESS_MIN = 200, - CMD_STATUS_OK = 200, /* command exec success */ - CMD_STATUS_SUCCESS_MAX = 200, - - /* error status */ - CMD_STATUS_ERROR_MIN = 400, - CMD_STATUS_UNKNOWN_CMD = 400, /* unknown command */ - CMD_STATUS_INVALID_ARG = 401, /* invalid argument */ - CMD_STATUS_FAIL = 402, /* command exec failed */ - CMD_STATUS_ERROR_MAX = 402, -}; - -enum cmd_event { - CMD_EVENT_MIN = 600, - CMD_EVENT_TEST_FINISH = 600, - CMD_EVENT_TIMER_NOTIFY = 601, - CMD_EVENT_RTC_NOTIFY = 602, - CMD_EVENT_MQTT_MSG_RECV = 603, - CMD_EVENT_WDG_TIMEOUT = 604, - CMD_EVENT_MAX = 604, -}; - -#ifdef __cplusplus -} -#endif - -#endif /* _CMD_DEFS_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/cmd/cmd_sd.h b/src/platform/f133/include/hal/sdmmc/cmd/cmd_sd.h deleted file mode 100644 index 60f3d231ecd88db41ac07617fa34dad0319c0fb1..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/cmd/cmd_sd.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _CMD_SD_H_ -#define _CMD_SD_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -/* example: - * 1. init sd use: drv sd config p=invert - * use "p=none" when tx rx gpio direct connect in test mode. - * 2. get received addr and key use: drv sd value 0 - * 3. deinit sd use: drv sd deconfig 0 - */ - -enum cmd_status cmd_sd_exec(char *cmd); - -#ifdef __cplusplus -} -#endif - -#endif /* _CMD_SD_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/cmd/cmd_util.h b/src/platform/f133/include/hal/sdmmc/cmd/cmd_util.h deleted file mode 100644 index 62bb5ed6991d8de8e5a53ccbc625ca587df6ee04..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/cmd/cmd_util.h +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _CMD_UTIL_H_ -#define _CMD_UTIL_H_ - -#include -#include -#include "sys/param.h" -#include "cmd_defs.h" -#include "cmd_debug.h" -//#include "console/console.h" -#include "os.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* command format: ... */ -struct cmd_data { - char *name; - enum cmd_status (*exec)(char *); -}; - -/* command2 format: [ ...] */ -struct cmd2_data { - char *name; - int name_len; - enum cmd_status (*exec)(char *); -}; - -enum cmd_status cmd_exec(char *cmd, const struct cmd_data *cdata, int count); -enum cmd_status cmd2_exec(char *cmd, const struct cmd2_data *cdata, int count); - -int cmd_parse_argv(char *cmd, char *argv[], int size); - -const char *cmd_get_status_desc(enum cmd_status status); -//const char *cmd_get_event_desc(enum cmd_event event); - -int cmd_write(enum cmd_code_type type, int code, const char *fmt, ...); - -#define cmd_write_respond(status, fmt, arg...) \ - cmd_write(CMD_CODE_TYEP_STATUS, (int)status, fmt, ##arg) - -#define cmd_write_event(event, fmt, arg...) \ - cmd_write(CMD_CODE_TYEP_EVENT, (int)event, fmt, ##arg) - -int32_t cmd_raw_mode_read(uint8_t *buf, int32_t size, uint32_t msec); -int32_t cmd_raw_mode_write(uint8_t *buf, int32_t size); - -#define cmd_raw_mode_enable() console_disable(); -#define cmd_raw_mode_disable() console_enable(); - - -#define cmd_malloc(l) malloc(l) -#define cmd_free(p) free(p) - -#define cmd_memcpy(d, s, n) memcpy(d, s, n) -#define cmd_memset(s, c, n) memset(s, c, n) -#define cmd_memcmp(s1, s2, n) memcmp(s1, s2, n) - -#define cmd_strlen(s) strlen(s) -#define cmd_strcmp(s1, s2) strcmp(s1, s2) -#define cmd_strncmp(s1, s2, n) strncmp(s1, s2, n) -#define cmd_strcasecmp(s1, s2) strcasecmp(s1, s2) -#define cmd_strncasecmp(s1, s2, n) strncasecmp(s1, s2, n) -#define cmd_strchr(s, c) strchr(s, c) -#define cmd_strrchr(s, c) strrchr(s, c) -#define cmd_strstr(s1, s2) strstr(s1, s2) -#define cmd_strtol(s, p, b) strtol(s, p, b) -#define cmd_strdup(s) strdup(s) -#define cmd_strlcpy(d, s, n) strlcpy(d, s, n) - -#define cmd_atoi(s) atoi(s) -#define cmd_atol(s) atol(s) - -#define cmd_sscanf(s, f, a...) sscanf(s, f, ##a) -#define cmd_sprintf(s, f, a...) sprintf(s, f, ##a) -#define cmd_snprintf(s, n, f, a...) snprintf(s, n, f, ##a) - -#define cmd_nitems(a) nitems(a) - -#define cmd_msleep(msec) OS_MSleep(msec) - -#ifdef __cplusplus -} -#endif - -#endif /* _CMD_UTIL_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/hal/chip.h b/src/platform/f133/include/hal/sdmmc/hal/chip.h deleted file mode 100644 index e7124d1c3a5e29ec2568a5b3669d9907d83ab494..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/hal/chip.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_CHIP_H_ -#define _DRIVER_CHIP_CHIP_H_ - -#ifdef __cplusplus -extern "C" { -#endif - - - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_CHIP_CHIP_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/hal/hal_base.h b/src/platform/f133/include/hal/sdmmc/hal/hal_base.h deleted file mode 100644 index 07a3a0931c839bf014503de9aebd53c08469608e..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/hal/hal_base.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_HAL_BASE_H_ -#define _DRIVER_CHIP_HAL_BASE_H_ - -#include "hal_def.h" -#include "hal_clock.h" -//#include "hal_prcm.h" -#include "hal_ccm.h" -#include "hal_util.h" - -#include "hal_board.h" -#include "hal_dev.h" - -#include "xradio_hal_debug.h" -#include "hal_os.h" - -#endif /* _DRIVER_CHIP_HAL_BASE_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/hal/hal_board.h b/src/platform/f133/include/hal/sdmmc/hal/hal_board.h deleted file mode 100644 index 3969f01f5117d46bee6a61decfcf96ac47506b33..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/hal/hal_board.h +++ /dev/null @@ -1,50 +0,0 @@ -/** - * @file hal_board.h - * @author ALLWINNERTECH IOT WLAN Team - */ - -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_HAL_BOARD_H_ -#define _DRIVER_HAL_BOARD_H_ - -#include "hal_def.h" - -#ifdef __cplusplus -extern "C" { -#endif - - - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_HAL_BOARD_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/hal/hal_ccm.h b/src/platform/f133/include/hal/sdmmc/hal/hal_ccm.h deleted file mode 100644 index 99330352d63bc25a951fe1987881452726a332c4..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/hal/hal_ccm.h +++ /dev/null @@ -1,49 +0,0 @@ -/** - * @file hal_ccm.h - * @author ALLWINNERTECH IOT WLAN Team - */ - -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_HAL_CCM_H_ -#define _DRIVER_CHIP_HAL_CCM_H_ - -#include "hal_def.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_CHIP_HAL_CCM_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/hal/hal_clock.h b/src/platform/f133/include/hal/sdmmc/hal/hal_clock.h deleted file mode 100644 index 80145a25c7a29e36f09336801952e3fca82aeb7f..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/hal/hal_clock.h +++ /dev/null @@ -1,132 +0,0 @@ -/** - * @file hal_clock.h - * @author ALLWINNERTECH IOT WLAN Team - */ - -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_HAL_CLOCK_H_ -#define _DRIVER_CHIP_HAL_CLOCK_H_ - -//#include "hal_prcm.h" -#include "hal_ccm.h" -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Get HF clock, which is the value of external high frequency oscillator - * @return HF clock in Hz - */ -static __always_inline uint32_t HAL_GetHFClock(void) -{ -// return HAL_PRCM_GetHFClock(); - printf("%s,%d Warning Use fix value 24000000\n", __FUNCTION__,__LINE__); - return 40*1000*1000; -} - -/** - * @brief Get LF clock, which is the value of low frequence oscillator - * @return LF clock in Hz - */ -static __always_inline uint32_t HAL_GetLFClock(void) -{ - //return HAL_PRCM_GetLFClock(); - printf("********%s, %d Error:Empty implementation*******\n", __FUNCTION__,__LINE__); - return 24*1000*1000; -} - -/** - * @brief Get CPU clock - * @return CPU clock in Hz - */ -static __always_inline uint32_t HAL_GetCPUClock(void) -{ - //return HAL_PRCM_GetCPUAClk(); - printf("********%s, %d Error:Empty implementation*******\n", __FUNCTION__,__LINE__); - return 24*1000*1000; -} - -/** - * @brief Get Device clock - * @return Device clock in Hz - */ -static __always_inline uint32_t HAL_GetDevClock(void) -{ -// return HAL_PRCM_GetDevClock(); -#ifndef SDC_PLL_CLK - printf("%s,%d Warning Use fix value 1200000000\n", __FUNCTION__,__LINE__); - return 1200*1000*1000; -#else - printf("%s,%d Warning Use fix value %d\n", __FUNCTION__,__LINE__, SDC_PLL_CLK); - return SDC_PLL_CLK; -#endif -} - -/** - * @brief Get AHB1 clock - * @return AHB1 clock in Hz - */ -static __always_inline uint32_t HAL_GetAHB1Clock(void) -{ - //return HAL_CCM_BusGetAHB1Clock(); - printf("********%s, %d Error:Empty implementation*******\n", __FUNCTION__,__LINE__); - return 24*1000*1000; -} - -/** - * @brief Get AHB2 clock - * @return AHB2 clock in Hz - */ -static __always_inline uint32_t HAL_GetAHB2Clock(void) -{ - //return HAL_CCM_BusGetAHB2Clock(); - printf("********%s, %d Error:Empty implementation*******\n", __FUNCTION__,__LINE__); - return 24*1000*1000; -} - -/** - * @brief Get APB clock - * @return APB clock in Hz - */ -static __always_inline uint32_t HAL_GetAPBClock(void) -{ - //return HAL_CCM_BusGetAPBClock(); - printf("********%s, %d Error:Empty implementation*******\n", __FUNCTION__,__LINE__); - return 24*1000*1000; -} - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_CHIP_HAL_CLOCK_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/hal/hal_def.h b/src/platform/f133/include/hal/sdmmc/hal/hal_def.h deleted file mode 100644 index b2c7daf97a0d63b06533f90ea2f63651f7dbe94c..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/hal/hal_def.h +++ /dev/null @@ -1,95 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_HAL_DEF_H_ -#define _DRIVER_CHIP_HAL_DEF_H_ - -#include "chip.h" -#include "../sys/compiler.h" -//#include "kernel/os/os_common.h" -#include "stdint.h" -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - - -/* - * Bitwise operation - */ -#define HAL_BIT(pos) (1U << (pos)) - -#define HAL_SET_BIT(reg, mask) ((reg) |= (mask)) -#define HAL_CLR_BIT(reg, mask) ((reg) &= ~(mask)) -#define HAL_GET_BIT(reg, mask) ((reg) & (mask)) -#define HAL_GET_BIT_VAL(reg, shift, vmask) (((reg) >> (shift)) & (vmask)) - -#define HAL_MODIFY_REG(reg, clr_mask, set_mask) \ - ((reg) = (((reg) & (~(clr_mask))) | (set_mask))) - -/* - * Macros for accessing LSBs of a 32-bit register (little endian only) - */ -#define HAL_REG_32BIT(reg_addr) (*((__IO uint32_t *)(reg_addr))) -#define HAL_REG_16BIT(reg_addr) (*((__IO uint16_t *)(reg_addr))) -#define HAL_REG_8BIT(reg_addr) (*((__IO uint8_t *)(reg_addr))) - -/* Macro for counting the element number of an array */ -#define HAL_ARRAY_SIZE(a) (sizeof((a)) / sizeof((a)[0])) - -/* Wait forever timeout value */ -// #define HAL_WAIT_FOREVER OS_WAIT_FOREVER - -#define HAL_SIZE_T (unsigned long) -#define HAL_PT_TO_U(v) (HAL_SIZE_T(v)) - -/*use to prinf and sscanf function to avoid compiler error*/ -#define HAL_PR_SZ_L(v) (HAL_SIZE_T(v)) -#define HAL_PR_SZ(v) ((unsigned int)(v)) -#define HAL_PR_SZ_P(v) ((unsigned int *)(v)) - - -#define HAL_WMB() {dsb(0xf);} - -typedef hal_status_t HAL_Status; - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_CHIP_HAL_DEF_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/hal/hal_dev.h b/src/platform/f133/include/hal/sdmmc/hal/hal_dev.h deleted file mode 100644 index 784dc402d7bbc784074005667178a9ead1e0dbed..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/hal/hal_dev.h +++ /dev/null @@ -1,49 +0,0 @@ -/** - * @file hal_dev.h - * @author ALLWINNERTECH IOT WLAN Team - */ - -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_HAL_DEV_H_ -#define _DRIVER_HAL_DEV_H_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_HAL_DEV_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/hal/hal_gpio.h b/src/platform/f133/include/hal/sdmmc/hal/hal_gpio.h deleted file mode 100644 index d6091423252adfeb13959614f319d301123d23d3..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/hal/hal_gpio.h +++ /dev/null @@ -1,91 +0,0 @@ -/** - * @file hal_gpio.h - * @author ALLWINNERTECH IOT WLAN Team - */ - -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_HAL_GPIO_H_ -#define _DRIVER_CHIP_HAL_GPIO_H_ - -#include "hal_def.h" - -#ifdef __cplusplus -extern "C" { -#endif - - - -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - - - - -/** - * @brief GPIO port definition - */ -typedef enum { - GPIO_PORT_A = 0U, - GPIO_PORT_B = 1U, - GPIO_PORT_NUM -} GPIO_Port; - - -/******************************************************************************/ - -/** - * @brief GPIO pin state definition - */ -typedef enum { - GPIO_PIN_LOW = 0, - GPIO_PIN_HIGH = 1, -} GPIO_PinState; - -/** - * @brief GPIO pin number definition - */ -typedef enum { - GPIO_PIN_0 = 0U, -} GPIO_Pin; - - - - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_CHIP_HAL_GPIO_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/hal/hal_prcm.h b/src/platform/f133/include/hal/sdmmc/hal/hal_prcm.h deleted file mode 100644 index 4114d7404cdfe151edba9624d666bc3126a1e784..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/hal/hal_prcm.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_HAL_PRCM_H_ -#define _DRIVER_CHIP_HAL_PRCM_H_ - -#include "hal_def.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -void HAL_PRCM_Start(void); - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_CHIP_HAL_PRCM_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/hal/hal_util.h b/src/platform/f133/include/hal/sdmmc/hal/hal_util.h deleted file mode 100644 index 2f35f5dfe0a49e9e37e6d4bfdbedaa6cd8d45c35..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/hal/hal_util.h +++ /dev/null @@ -1,50 +0,0 @@ -/** - * @file hal_util.h - * @author ALLWINNERTECH IOT WLAN Team - */ - -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_HAL_UTIL_H_ -#define _DRIVER_CHIP_HAL_UTIL_H_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -void HAL_UDelay(uint32_t us); - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_CHIP_HAL_UTIL_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/hal/rom_debug.h b/src/platform/f133/include/hal/sdmmc/hal/rom_debug.h deleted file mode 100644 index 9198b0f78378ca64ed8dff42f2d1f088437870f9..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/hal/rom_debug.h +++ /dev/null @@ -1,201 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _ROM_DEBUG_H_ -#define _ROM_DEBUG_H_ - -#include -#ifndef CONFIG_KERNEL_FREERTOS -#include -#endif - -#include "sys/sys_debug.h" - - -/* debug */ -#ifndef CONFIG_KERNEL_FREERTOS -#define ROM_SYSLOG printk -#else -#define ROM_SYSLOG printf -#endif - -#define ROM_DUMP_ON 1 -#define ROM_DBG_ON 1 -#define ROM_INF_ON 1 -#define ROM_WRN_ON 1 -#define ROM_ERR_ON 1 -#define ROM_ANY_ON 1 -#define ROM_ABORT_ON 0 - -#ifndef sys_abort -#define sys_abort() ({volatile int i = 1; printf("%s, %d\n", __FUNCTION__, __LINE__); while(i);}) -#endif - -#if ROM_ABORT_ON -#define ROM_ABORT() sys_abort() -#else -#define ROM_ABORT() -#endif - -#if ROM_DUMP_ON -#define ROM_DUMP_BYTES(level, addr, len) \ - do { \ - if (level & ROM_DUMP_MASK) \ - print_hex_dump_bytes(addr, len);\ - } while (0) -#define ROM_DUMP_WORDS(level, addr, len) \ - do { \ - if (level & ROM_DUMP_MASK) \ - print_hex_dump_words(addr, len);\ - } while (0) -#else -#define ROM_DUMP_BYTES(level, addr, len) -#define ROM_DUMP_WORDS(level, addr, len) -#endif - -#define ROM_LOG(level, mask, expand, fmt, arg...) \ - do { \ - if (level & mask) \ - ROM_SYSLOG(expand fmt, ##arg); \ - } while (0) - -#if ROM_DBG_ON -#define ROM_DBG(level, fmt, arg...) ROM_LOG(level, ROM_DBG_MASK, "[DBG]", fmt, ##arg) -#else -#define ROM_DBG(level, fmt, arg...) -#endif - -#if ROM_INF_ON -#define ROM_INF(level, fmt, arg...) ROM_LOG(level, ROM_INF_MASK, "", fmt, ##arg) -#else -#define ROM_INF(level, fmt, arg...) -#endif - -#if ROM_WRN_ON -#define ROM_WRN(level, fmt, arg...) ROM_LOG(level, ROM_WRN_MASK, "[WRN] ", fmt, ##arg) -#else -#define ROM_WRN(level, fmt, arg...) -#endif - -#if ROM_ERR_ON -#define ROM_ERR(level, fmt, arg...) \ - do { \ - if (level & ROM_ERR_MASK) \ - ROM_SYSLOG("[ERR] "fmt, ##arg); \ - if (level & ROM_ABORT_ON) { \ - ROM_ABORT(); \ - } \ - } while (0) -#else -#define ROM_ERR(level, fmt, arg...) -#endif - -#if ROM_ANY_ON -#define ROM_ANY(level, fmt, arg...) \ - do { \ - if (level & ROM_ANY_MASK) \ - ROM_SYSLOG(fmt, ##arg); \ - } while (0) -#else -#define ROM_ANY(level, fmt, arg...) -#endif - -#define ROM_ASSERT_PARAM(exp) \ - do { \ - if (!(exp)) { \ - ROM_SYSLOG("Invalid param at %s:%d\n", __func__, __LINE__); \ - } \ - } while (0) - -#define ROM_BUG_ON(v) do {if(v) {printf("BUG at %s:%d!\n", __func__, __LINE__); ROM_ABORT();}} while (0) -#define ROM_WARN_ON(v) do {if(v) {printf("WARN at %s:%d!\n", __func__, __LINE__);}} while (0) - -#ifdef __CONFIG_ROM - -#define ROM_IT_DBG ROM_DBG -#define ROM_IT_INF ROM_INF -#define ROM_IT_WRN ROM_WRN -#define ROM_IT_ERR ROM_ERR -#define ROM_IT_ANY ROM_ANY - -#ifndef __CONFIG_SECTION_ATTRIBUTE_NONXIP -#define __s_func __func__ -#endif - -#else - -/* debug in interrupt handler */ -#ifdef __CONFIG_SECTION_ATTRIBUTE_NONXIP - -#define ROM_IT_LOG(mask, fmt, arg...) \ - do { \ - if (mask & ROM_DBG_MASK) { \ - __nonxip_rodata static const char __fmt[] = fmt; \ - ROM_SYSLOG(__fmt, ##arg); \ - } \ - } while (0) - -#define ROM_IT_DBG(mask, fmt, arg...) \ - do { \ - if (mask & ROM_DBG_MASK) { \ - __nonxip_rodata static const char __fmt[] = fmt; \ - ROM_SYSLOG(__fmt, ##arg); \ - } \ - } while (0) - -#define ROM_IT_WRN(mask, fmt, arg...) \ - do { \ - if (mask & ROM_WRN_MASK) { \ - __nonxip_rodata static const char __fmt[] = "[WRN] "fmt; \ - ROM_SYSLOG(__fmt, ##arg); \ - } \ - } while (0) - -#define ROM_IT_ERR(mask, fmt, arg...) \ - do { \ - if (mask & ROM_ERR_MASK) { \ - __nonxip_rodata static const char __fmt[] = "[ERR] %s():%d, "fmt; \ - ROM_SYSLOG(__fmt, __s_func, __LINE__, ##arg); \ - } \ - if (mask & ROM_ABORT_MASK) \ - ROM_ABORT(); \ - } while (0) - -#else /* __CONFIG_SECTION_ATTRIBUTE_NONXIP */ - -#define __s_func __func__ -#define ROM_IT_DBG ROM_DBG -#define ROM_IT_WRN ROM_WRN -#define ROM_IT_ERR ROM_ERR - -#endif /* __CONFIG_SECTION_ATTRIBUTE_NONXIP */ - -#endif - -#endif /* _ROM_DEBUG_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/hal/xradio_hal_debug.h b/src/platform/f133/include/hal/sdmmc/hal/xradio_hal_debug.h deleted file mode 100644 index 9175a26b840229f5449c8868e77eedcf1911b0f3..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/hal/xradio_hal_debug.h +++ /dev/null @@ -1,136 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_HAL_DEBUG_H_ -#define _DRIVER_CHIP_HAL_DEBUG_H_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/* debug */ -#define HAL_SYSLOG printf - -#define HAL_DBG_ON 0 -#define HAL_WRN_ON 1 -#define HAL_ERR_ON 1 -#define HAL_ABORT_ON 0 - -#define HAL_DBG_TIMER 0 -#define HAL_DBG_WDG 0 -#define HAL_DBG_MBOX 0 -#define HAL_DBG_I2C 0 - -#define HAL_ABORT() sys_abort() - -#define HAL_LOG(flags, fmt, arg...) \ - do { \ - if (flags) \ - HAL_SYSLOG(fmt, ##arg); \ - } while (0) - - -#define HAL_DBG(fmt, arg...) HAL_LOG(HAL_DBG_ON, "[HAL] "fmt, ##arg) - -#define HAL_TIMER_DBG(fmt, arg...) \ - HAL_LOG(HAL_DBG_ON && HAL_DBG_TIMER, "[HAL TIMER] "fmt, ##arg) - -#define HAL_WDG_DBG(fmt, arg...) \ - HAL_LOG(HAL_DBG_ON && HAL_DBG_WDG, "[HAL WDG] "fmt, ##arg) - -#define HAL_MBOX_DBG(fmt, arg...) \ - HAL_LOG(HAL_DBG_ON && HAL_DBG_MBOX, "[HAL MBOX] "fmt, ##arg) - -#define HAL_I2C_DBG(fmt, arg...) \ - HAL_LOG(HAL_DBG_ON && HAL_DBG_I2C, "[HAL I2C] "fmt, ##arg) - -#define HAL_WRN(fmt, arg...) HAL_LOG(HAL_WRN_ON, "[HAL WRN] "fmt, ##arg) - -#define HAL_ERR(fmt, arg...) \ - do { \ - HAL_LOG(HAL_ERR_ON, "[HAL ERR] %s():%d, "fmt, \ - __func__, __LINE__, ##arg); \ - if (HAL_ABORT_ON) \ - HAL_ABORT(); \ - } while (0) - -#define HAL_ASSERT_PARAM(exp) \ - do { \ - if (!(exp)) { \ - HAL_SYSLOG("Invalid param at %s:%d\n", __func__, __LINE__); \ - } \ - } while (0) - -/* debug in interrupt handler */ -#ifdef __CONFIG_XIP_SECTION_FUNC_LEVEL - -#define HAL_IT_LOG(flags, fmt, arg...) \ - do { \ - if (flags) { \ - __nonxip_data static char __fmt[] = fmt; \ - HAL_SYSLOG(__fmt, ##arg); \ - } \ - } while (0) - -#define HAL_IT_DBG(fmt, arg...) HAL_IT_LOG(HAL_DBG_ON, "[HAL] "fmt, ##arg) - -#define HAL_IT_MBOX_DBG(fmt, arg...) \ - HAL_IT_LOG(HAL_DBG_ON && HAL_DBG_MBOX, "[HAL MBOX] "fmt, ##arg) - -#define HAL_IT_I2C_DBG(fmt, arg...) \ - HAL_IT_LOG(HAL_DBG_ON && HAL_DBG_I2C, "[HAL I2C] "fmt, ##arg) - -#define HAL_IT_WRN(fmt, arg...) HAL_IT_LOG(HAL_WRN_ON, "[HAL WRN] "fmt, ##arg) - -#define HAL_IT_ERR(fmt, arg...) \ - do { \ - HAL_IT_LOG(HAL_ERR_ON, "[HAL ERR] %s():%d, "fmt, \ - __s_func, __LINE__, ##arg); \ - if (HAL_ABORT_ON) \ - HAL_ABORT(); \ - } while (0) - -#else /* __CONFIG_XIP_SECTION_FUNC_LEVEL */ - -#define __s_func __func__ -#define HAL_IT_DBG HAL_DBG -#define HAL_IT_I2C_DBG HAL_I2C_DBG -#define HAL_IT_MBOX_DBG HAL_MBOX_DBG -#define HAL_IT_WRN HAL_WRN -#define HAL_IT_ERR HAL_ERR - -#endif /* __CONFIG_XIP_SECTION_FUNC_LEVEL */ - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_CHIP_HAL_DEBUG_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/hal_sdhost.h b/src/platform/f133/include/hal/sdmmc/hal_sdhost.h deleted file mode 100644 index 5d2cb4e78c439a789958950505ac67a88453478e..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/hal_sdhost.h +++ /dev/null @@ -1,122 +0,0 @@ -/** - * @file hal_sdhost.h - * @author ALLWINNERTECH IOT WLAN Team - */ - -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_SDMMC_HAL_SDHOST_H_ -#define _DRIVER_CHIP_SDMMC_HAL_SDHOST_H_ - -//#include "driver/chip/hal_def.h" -#include "hal/hal_gpio.h" -#include -#include - - -#ifdef __cplusplus -extern "C" { -#endif - -typedef enum { - SDC0 = 0, /*!< SDC0 controller */ - SDC1 = 1, /*!< SDC1 controller */ - SDC_NUM /*!< only support 2 SD controller. */ -} SDC_Port; - -typedef enum { - SDCGPIO_BAS = 0, - SDCGPIO_DET = 1, -} HAL_SDCGPIOType; - -typedef struct { - uint8_t data_bits; - int8_t has_detect_gpio; - GPIO_Port detect_port; - GPIO_Pin detect_pin; - uint16_t detect_delay; /* delay interval (in ms) to wait power stable */ - GPIO_PinState detect_pin_present_val; -} HAL_SDCGPIOCfg; - -/** @bried Detect card callback if used CONFIG_DETECT_CARD. */ -typedef void (*card_detect_cb)(uint32_t present, uint16_t sdc_id); - -/** @bried SDC Init Structure definition. */ -typedef struct { - uint16_t debug_mask; - uint8_t low_speed; - uint8_t dma_use; - uint32_t pwr_mode; -#ifdef CONFIG_DETECT_CARD - uint32_t cd_mode; -/* NOTE: The specification advise that CARD_DETECT_BY_D3 is not a preferred - * mechanism for card detection. Moreover it won't work with MMC cards. - * And, this won't work with external pull-up resistors on the card interface. - * The preferred card detection mechanism is a mechanical switch on the card connector. -*/ -#define CARD_DETECT_BY_GPIO_IRQ (2) /* mmc detected by gpio irq */ -#define CARD_ALWAYS_PRESENT (3) /* mmc always present, without detect pin */ -#define CARD_DETECT_BY_FS (4) /* mmc insert/remove by fs */ -#define CARD_DETECT_BY_D3 (5) /* mmc detected by data3 */ - - card_detect_cb cd_cb; /* NOTE: should delay 500ms before rescan card to wait Voltage stable */ -#endif -} SDC_InitTypeDef; - -/** - * @brief Initializes the SDC peripheral. - * @param sdc_id: - * @arg sdc_id->SDC ID. - * @param param: - * @arg param->[in] The configuration information. - * @retval SDC handler. - */ -extern struct mmc_host *hal_sdc_init(struct mmc_host *host); - -/** - * @brief DeInitializes the SDC peripheral. - * @param sdc_id: - * @arg sdc_id-> SDC ID. - * @retval None. - */ -extern int32_t hal_sdc_deinit(uint32_t sdc_id); - -extern struct mmc_host *hal_sdc_create(uint32_t sdc_id, SDC_InitTypeDef *param); -extern int32_t hal_sdc_destroy(struct mmc_host *host); - -extern struct mmc_host *hal_sdc_open(uint32_t sdc_id); -extern uint32_t hal_sdc_close(uint32_t sdc_id); -extern void hal_sdc_set_high_speed(struct mmc_host *host); - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_CHIP_SDMMC_HAL_SDHOST_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_common.h b/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_common.h deleted file mode 100644 index 9ea49fee3d4ac5870e7c29dad8613477c6bd1658..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_common.h +++ /dev/null @@ -1,83 +0,0 @@ -/** - * @file os_common.h - * @author ALLWINNERTECH IOT WLAN Team - */ - -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_FREERTOS_OS_COMMON_H_ -#define _KERNEL_OS_FREERTOS_OS_COMMON_H_ - -#include -#include "compiler.h" -#include "FreeRTOS.h" -#include "projdefs.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Thread priority definition - */ -typedef enum { - OS_PRIORITY_IDLE = 0, - OS_PRIORITY_LOW = 1, - OS_PRIORITY_BELOW_NORMAL = 2, - OS_PRIORITY_NORMAL = 3, - OS_PRIORITY_ABOVE_NORMAL = 4, - OS_PRIORITY_HIGH = 5, - OS_PRIORITY_REAL_TIME = 6 -} OS_Priority; - -/** - * @brief OS status definition - */ -typedef enum { - OS_OK = 0, /* success */ - OS_FAIL = -1, /* general failure */ - OS_E_NOMEM = -2, /* out of memory */ - OS_E_PARAM = -3, /* invalid parameter */ - OS_E_TIMEOUT = -4, /* operation timeout */ - OS_E_ISR = -5, /* not allowed in ISR context */ -} OS_Status; - -/** @brief Type definition of OS time */ -typedef uint32_t OS_Time_t; - -#define OS_WAIT_FOREVER 0xffffffffU /* Wait forever timeout value */ -#define OS_SEMAPHORE_MAX_COUNT 0xffffffffU /* Maximum count value for semaphore */ -#define OS_INVALID_HANDLE NULL /* OS invalid handle */ - -#ifdef __cplusplus -} -#endif - -#endif /* _KERNEL_OS_FREERTOS_OS_COMMON_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_errno.h b/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_errno.h deleted file mode 100644 index d51664c1b414fda7e36056a2d7595b8fbac727b3..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_errno.h +++ /dev/null @@ -1,78 +0,0 @@ -/** - * @file os_errno.h - * @author ALLWINNERTECH IOT WLAN Team - */ - -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_FREERTOS_OS_ERRNO_H_ -#define _KERNEL_OS_FREERTOS_OS_ERRNO_H_ - -#include "_os_common.h" -#include "task.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * Thread safe errno handling for FreeRTOS - */ - -#if (configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0) - -#define OS_ERRNO_LOCATION_IDX 0 - -/** - * @brief Get error number of the current thread - * @return Error number of the current thread - */ -static __always_inline int OS_GetErrno(void) -{ - return (int)pvTaskGetThreadLocalStoragePointer(NULL, OS_ERRNO_LOCATION_IDX); -} - -/** - * @brief Set error number of the current thread - * @param[in] Error number to be set - * @return None - */ -static __always_inline void OS_SetErrno(int err) -{ - vTaskSetThreadLocalStoragePointer(NULL, OS_ERRNO_LOCATION_IDX, (void *)err); -} - -#endif /* configNUM_THREAD_LOCAL_STORAGE_POINTERS */ - -#ifdef __cplusplus -} -#endif - -#endif /* _KERNEL_OS_FREERTOS_OS_ERRNO_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_mutex.h b/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_mutex.h deleted file mode 100644 index 681513a2e62e51fefc6611f430886b6a498bd3ec..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_mutex.h +++ /dev/null @@ -1,109 +0,0 @@ -/** - * @file os_mutex.h - * @author ALLWINNERTECH IOT WLAN Team - */ - -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_FREERTOS_OS_MUTEX_H_ -#define _KERNEL_OS_FREERTOS_OS_MUTEX_H_ - -#include "_os_common.h" -#include "_os_time.h" -#include "_os_thread.h" -#include "semphr.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Mutex object definition - */ -typedef struct OS_Mutex { - SemaphoreHandle_t handle; -} OS_Mutex_t; - -OS_Status OS_MutexCreate(OS_Mutex_t *mutex); -OS_Status OS_MutexDelete(OS_Mutex_t *mutex); -OS_Status OS_MutexLock(OS_Mutex_t *mutex, OS_Time_t waitMS); -OS_Status OS_MutexUnlock(OS_Mutex_t *mutex); - -OS_Status OS_RecursiveMutexCreate(OS_Mutex_t *mutex); -OS_Status OS_RecursiveMutexLock(OS_Mutex_t *mutex, OS_Time_t waitMS); -OS_Status OS_RecursiveMutexUnlock(OS_Mutex_t *mutex); - -/** - * @brief Delete the recursive mutex object - * @param[in] mutex Pointer to the recursive mutex object - * @retval OS_Status, OS_OK on success - */ -static __always_inline OS_Status OS_RecursiveMutexDelete(OS_Mutex_t *mutex) -{ - return OS_MutexDelete(mutex); -} - -/** - * @brief Check whether the mutex object is valid or not - * @param[in] mutex Pointer to the mutex object - * @return 1 on valid, 0 on invalid - */ -static __always_inline int OS_MutexIsValid(OS_Mutex_t *mutex) -{ - return (mutex->handle != OS_INVALID_HANDLE); -} - -/** - * @brief Set the mutex object to invalid state - * @param[in] mutex Pointer to the mutex object - * @return None - */ -static __always_inline void OS_MutexSetInvalid(OS_Mutex_t *mutex) -{ - mutex->handle = OS_INVALID_HANDLE; -} - -/** - * @brief Get the mutex object's owner - * @note A mutex object's owner is a thread that locks the mutex - * @param[in] mutex Pointer to the mutex object - * @return The handle of the thread that locks the mutex object. - * NULL when the mutex is not locked by any thread. - */ -static __always_inline OS_ThreadHandle_t OS_MutexGetOwner(OS_Mutex_t *mutex) -{ - return (OS_ThreadHandle_t)xSemaphoreGetMutexHolder(mutex->handle); -} - -#ifdef __cplusplus -} -#endif - -#endif /* _KERNEL_OS_FREERTOS_OS_MUTEX_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_queue.h b/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_queue.h deleted file mode 100644 index bb166588031a2bd71cf95c404d2a2d06a6c87bc8..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_queue.h +++ /dev/null @@ -1,137 +0,0 @@ -/** - * @file os_queue.h - * @author ALLWINNERTECH IOT WLAN Team - */ - -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_FREERTOS_OS_QUEUE_H_ -#define _KERNEL_OS_FREERTOS_OS_QUEUE_H_ - -#include "_os_common.h" -#include "queue.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Queue object definition - */ -typedef struct OS_Queue { - QueueHandle_t handle; -} OS_Queue_t; - -OS_Status OS_QueueCreate(OS_Queue_t *queue, uint32_t queueLen, uint32_t itemSize); -OS_Status OS_QueueDelete(OS_Queue_t *queue); -OS_Status OS_QueueSend(OS_Queue_t *queue, const void *item, OS_Time_t waitMS); -OS_Status OS_QueueReceive(OS_Queue_t *queue, void *item, OS_Time_t waitMS); - -/** - * @brief Check whether the queue object is valid or not - * @param[in] queue Pointer to the queue object - * @return 1 on valid, 0 on invalid - */ -static __always_inline int OS_QueueIsValid(OS_Queue_t *queue) -{ - return (queue->handle != OS_INVALID_HANDLE); -} - -/** - * @brief Set the queue object to invalid state - * @param[in] queue Pointer to the queue object - * @return None - */ -static __always_inline void OS_QueueSetInvalid(OS_Queue_t *queue) -{ - queue->handle = OS_INVALID_HANDLE; -} - -/** - * @brief Create and initialize a message queue object - * @note A message queue is a queue with each data item can store a pointer. - * The size of each data item (message) is equal to sizeof(void *). - * @param[in] queue Pointer to the message queue object - * @param[in] queueLen The maximum number of items that the message queue can - * hold at any one time. - * @retval OS_Status, OS_OK on success - */ -static __always_inline OS_Status OS_MsgQueueCreate(OS_Queue_t *queue, uint32_t queueLen) -{ - return OS_QueueCreate(queue, queueLen, sizeof(void *)); -} - -/** - * @brief Delete the message queue object - * @param[in] queue Pointer to the message queue object - * @retval OS_Status, OS_OK on success - */ -static __always_inline OS_Status OS_MsgQueueDelete(OS_Queue_t *queue) -{ - return OS_QueueDelete(queue); -} - -/** - * @brief Send (write) a message to the back of the message queue - * @param[in] queue Pointer to the message queue object - * @param[in] msg A message, which is a pointer, to be copied into the queue - * @param[in] waitMS The maximum amount of time the thread should remain in the - * blocked state to wait for space to become available on the - * message queue, should the message queue already be full. - * OS_WAIT_FOREVER for waiting forever, zero for no waiting. - * @retval OS_Status, OS_OK on success - */ -static __always_inline OS_Status OS_MsgQueueSend(OS_Queue_t *queue, void *msg, OS_Time_t waitMS) -{ - return OS_QueueSend(queue, &msg, waitMS); -} - -/** - * @brief Receive (read) a message from the message queue - * @param[in] queue Pointer to the message queue object - * @param[in] msg Pointer to the message buffer into which the received message - * will be copied. A message is a pointer. - * @param[in] waitMS The maximum amount of time the thread should remain in the - * blocked state to wait for message to become available on - * the message queue, should the message queue already be - * empty. - * OS_WAIT_FOREVER for waiting forever, zero for no waiting. - * @retval OS_Status, OS_OK on success - */ -static __always_inline OS_Status OS_MsgQueueReceive(OS_Queue_t *queue, void **msg, OS_Time_t waitMS) -{ - return OS_QueueReceive(queue, msg, waitMS); -} - -#ifdef __cplusplus -} -#endif - -#endif /* _KERNEL_OS_FREERTOS_OS_QUEUE_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_semaphore.h b/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_semaphore.h deleted file mode 100644 index d5ab1f74f1cff18604d22cf1d994ac5b61f6f1c2..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_semaphore.h +++ /dev/null @@ -1,84 +0,0 @@ -/** - * @file os_semaphore.h - * @author ALLWINNERTECH IOT WLAN Team - */ - -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_FREERTOS_OS_SEMAPHORE_H_ -#define _KERNEL_OS_FREERTOS_OS_SEMAPHORE_H_ - -#include "_os_common.h" -#include "semphr.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Semaphore object definition - */ -typedef struct OS_Semaphore { - SemaphoreHandle_t handle; -} OS_Semaphore_t; - -OS_Status OS_SemaphoreCreate(OS_Semaphore_t *sem, uint32_t initCount, uint32_t maxCount); -OS_Status OS_SemaphoreCreateBinary(OS_Semaphore_t *sem); -OS_Status OS_SemaphoreDelete(OS_Semaphore_t *sem); -OS_Status OS_SemaphoreWait(OS_Semaphore_t *sem, OS_Time_t waitMS); -OS_Status OS_SemaphoreRelease(OS_Semaphore_t *sem); -OS_Status OS_SemaphoreReset(OS_Semaphore_t *sem); - - -/** - * @brief Check whether the semaphore object is valid or not - * @param[in] sem Pointer to the semaphore object - * @return 1 on valid, 0 on invalid - */ -static __always_inline int OS_SemaphoreIsValid(OS_Semaphore_t *sem) -{ - return (sem->handle != OS_INVALID_HANDLE); -} - -/** - * @brief Set the semaphore object to invalid state - * @param[in] sem Pointer to the semaphore object - * @return None - */ -static __always_inline void OS_SemaphoreSetInvalid(OS_Semaphore_t *sem) -{ - sem->handle = OS_INVALID_HANDLE; -} - -#ifdef __cplusplus -} -#endif - -#endif /* _KERNEL_OS_FREERTOS_OS_SEMAPHORE_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_thread.h b/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_thread.h deleted file mode 100644 index 9d22ad6b06c47050b51a327e288a11ec2949226e..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_thread.h +++ /dev/null @@ -1,186 +0,0 @@ -/** - * @file os_thread.h - * @author ALLWINNERTECH IOT WLAN Team - */ - -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_FREERTOS_OS_THREAD_H_ -#define _KERNEL_OS_FREERTOS_OS_THREAD_H_ - -#include "_os_common.h" -#include "_os_time.h" -#include -#include "task.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* thread priority */ -#define OS_THREAD_PRIO_SYS_CTRL OS_PRIORITY_ABOVE_NORMAL -#define OS_THREAD_PRIO_LWIP OS_PRIORITY_NORMAL -#define OS_THREAD_PRIO_CONSOLE OS_PRIORITY_ABOVE_NORMAL -#define OS_THREAD_PRIO_APP OS_PRIORITY_NORMAL - -/** @brief Thread entry definition, which is a pointer to a function */ -typedef TaskFunction_t OS_ThreadEntry_t; - -/** @brief Thread handle definition */ -typedef TaskHandle_t OS_ThreadHandle_t; - -/** - * @brief Thread object definition - */ -typedef struct OS_Thread { - OS_ThreadHandle_t handle; -} OS_Thread_t; - -OS_Status OS_ThreadCreate(OS_Thread_t *thread, const char *name, - OS_ThreadEntry_t entry, void *arg, - OS_Priority priority, uint32_t stackSize); -OS_Status OS_ThreadDelete(OS_Thread_t *thread); - -/** - * @brief Check whether the thread object is valid or not - * @param[in] thread Pointer to the thread object - * @return 1 on valid, 0 on invalid - */ -static __always_inline int OS_ThreadIsValid(OS_Thread_t *thread) -{ - return (thread->handle != OS_INVALID_HANDLE); -} - -/** - * @brief Set the thread object to invalid state - * @param[in] thread Pointer to the thread object - * @return None - */ -static __always_inline void OS_ThreadSetInvalid(OS_Thread_t *thread) -{ - thread->handle = OS_INVALID_HANDLE; -} - -/** - * @brief Sleep for the given milliseconds - * - * This function causes the calling thread to sleep and block for the given - * milliseconds. - * - * @param[in] msec Milliseconds to sleep - * @return None - */ -static __always_inline void OS_ThreadSleep(OS_Time_t msec) -{ - vTaskDelay((TickType_t)OS_MSecsToTicks(msec)); -} - -/** - * @brief Yield to another thread of equal priority - * - * Yielding is where a thread volunteers to leave the running state, without - * being pre-empted, and before its time slice has been fully utilized. - * - * @return None - */ -static __always_inline void OS_ThreadYield(void) -{ - taskYIELD(); -} - -/** - * @brief Get the handle of the current running thread - * @return Handle of the current running thread - */ -static __always_inline OS_ThreadHandle_t OS_ThreadGetCurrentHandle(void) -{ - return (OS_ThreadHandle_t)xTaskGetCurrentTaskHandle(); -} - -/** - * @brief Start the thread scheduler running. - * @return None - */ -static __always_inline void OS_ThreadStartScheduler(void) -{ - vTaskStartScheduler(); -} - -/** - * @brief Suspend the thread scheduler - * - * Suspending the scheduler prevents a context switch from occurring but leaves - * interrupts enabled. If an interrupt requests a context switch while the - * scheduler is suspended, then the request is held pending and is performed - * only when the scheduler is resumed (un-suspended). - * - * @return None - */ -static __always_inline void OS_ThreadSuspendScheduler(void) -{ - vTaskSuspendAll(); -} - -/** - * @brief Resume the thread scheduler - * - * Resume scheduler activity, following a previous call to - * OS_ThreadSuspendScheduler(), by transitioning the scheduler into the - * active state from the suspended state. - * - * @return None - */ -static __always_inline void OS_ThreadResumeScheduler(void) -{ - xTaskResumeAll(); -} - -/** - * @brief Check whether the thread scheduler is running or not - * @return 1 on runing, 0 on not running - */ -static __always_inline int OS_ThreadIsSchedulerRunning(void) -{ - return (xTaskGetSchedulerState() == taskSCHEDULER_RUNNING); -} - -#if INCLUDE_uxTaskGetStackHighWaterMark -uint32_t OS_ThreadGetStackMinFreeSize(OS_Thread_t *thread); -#endif - -#if (configUSE_TRACE_FACILITY == 1) -void OS_ThreadList(void); -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* _KERNEL_OS_FREERTOS_OS_THREAD_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_time.h b/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_time.h deleted file mode 100644 index 20e0bc7747ff96d64d1eaea3360de9bda54c9d0c..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_time.h +++ /dev/null @@ -1,124 +0,0 @@ -/** - * @file os_time.h - * @author ALLWINNERTECH IOT WLAN Team - */ - -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_FREERTOS_OS_TIME_H_ -#define _KERNEL_OS_FREERTOS_OS_TIME_H_ - -#include "_os_common.h" -//#include "task.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* Parameters used to convert the time values */ -#define OS_MSEC_PER_SEC 1000U /* milliseconds per second */ -#define OS_USEC_PER_MSEC 1000U /* microseconds per millisecond */ -#define OS_USEC_PER_SEC 1000000U /* microseconds per second */ - -/* system clock's frequency, OS ticks per second */ -#define OS_HZ configTICK_RATE_HZ - -/* microseconds per OS tick (1000000 / OS_HZ) */ -#define OS_TICK (OS_USEC_PER_SEC / OS_HZ) - -/** @brief Get the number of ticks since OS start */ -/* Due to portTICK_TYPE_IS_ATOMIC is 1, calling xTaskGetTickCount() in ISR is - * safe also. - */ -#define OS_GetTicks() ((OS_Time_t)xTaskGetTickCount()) - -/** @brief Get the number of seconds since OS start */ -#define OS_GetTime() (OS_GetTicks() / OS_HZ) - -/** - * @brief Macros used to convert various time units to each other - * - Secs stand for seconds - * - MSecs stand for milliseconds - * - Ticks stand for OS ticks - * - Jiffies stand for OS jiffies, which is a synonym for OS ticks - */ -#define OS_SecsToTicks(sec) ((OS_Time_t)(sec) * OS_HZ) -#define OS_MSecsToTicks(msec) ((OS_Time_t)pdMS_TO_TICKS(msec)) -#define OS_TicksToMSecs(t) ((uint32_t)(t) / (OS_USEC_PER_MSEC / OS_TICK)) -#define OS_TicksToSecs(t) ((uint32_t)(t) / (OS_USEC_PER_SEC / OS_TICK)) - -#define OS_GetJiffies() OS_GetTicks() -#define OS_SecsToJiffies(sec) OS_SecsToTicks(sec) -#define OS_MSecsToJiffies(msec) OS_MSecsToTicks(msec) -#define OS_JiffiesToMSecs(j) OS_TicksToMSecs(j) -#define OS_JiffiesToSecs(j) OS_TicksToSecs(j) - -/** - * @brief Macros used to sleep for the given time (milliseconds or seconds) - */ -#define OS_MSleep(msec) vTaskDelay(pdMS_TO_TICKS(msec)) -//#define OS_MSleep(msec) udelay(msec*1000); -#define OS_Sleep(sec) OS_MSleep((sec) * OS_MSEC_PER_SEC) -#define OS_SSleep(sec) OS_Sleep(sec) -#define OS_Udelay(usec) udelay(usec); - -/** - * @brief Macros used to compare time values - * - * These inlines deal with timer wrapping correctly. You are - * strongly encouraged to use them - * 1. Because people otherwise forget - * 2. Because if the timer wrap changes in future you won't have to - * alter your code. - * - * OS_TimeAfter(a,b) returns true if the time a is after time b. - * - * Do this with "<0" and ">=0" to only test the sign of the result. A - * good compiler would generate better code (and a really good compiler - * wouldn't care). Gcc is currently neither. - */ -#define OS_TimeAfter(a, b) ((int32_t)(b) - (int32_t)(a) < 0) -#define OS_TimeBefore(a, b) OS_TimeAfter(b, a) -#define OS_TimeAfterEqual(a, b) ((int32_t)(a) - (int32_t)(b) >= 0) -#define OS_TimeBeforeEqual(a, b) OS_TimeAfterEqual(b, a) - -/** @brief Macros used to generate fake random 32-bit value */ -/* The fake random 32-bit value is generated by combining OS ticks and - * the value of SysTick current value register. - */ -#define OS_Rand32() \ - ((uint32_t)(((*((volatile uint32_t *)0xE000E018)) & 0xffffff) | \ - (OS_GetTicks() << 24))) - -#ifdef __cplusplus -} -#endif - -#endif /* _KERNEL_OS_FREERTOS_OS_TIME_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_timer.h b/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_timer.h deleted file mode 100644 index 58785140019823697e82b0f9d425d47fba4d5026..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/FreeRTOS/_os_timer.h +++ /dev/null @@ -1,135 +0,0 @@ -/** - * @file os_timer.h - * @author ALLWINNERTECH IOT WLAN Team - */ - -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_FREERTOS_OS_TIMER_H_ -#define _KERNEL_OS_FREERTOS_OS_TIMER_H_ - -#include "_os_common.h" -#include "timers.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#if (defined(configUSE_TIMER_ID_AS_CALLBACK_ARG) && configUSE_TIMER_ID_AS_CALLBACK_ARG == 1) -#define OS_TIMER_USE_FREERTOS_ORIG_CALLBACK 0 -#else -#define OS_TIMER_USE_FREERTOS_ORIG_CALLBACK 1 -#endif - -/** - * @brief Timer type definition - * - one shot timer: Timer will be in the dormant state after it expires. - * - periodic timer: Timer will auto-reload after it expires. - */ -typedef enum { - OS_TIMER_ONCE = 0, /* one shot timer */ - OS_TIMER_PERIODIC = 1 /* periodic timer */ -} OS_TimerType; - -/** @brief Timer expire callback function definition */ -typedef void (*OS_TimerCallback_t)(void *arg); - -/** @brief Timer handle definition */ -typedef TimerHandle_t OS_TimerHandle_t; - -#if OS_TIMER_USE_FREERTOS_ORIG_CALLBACK -/** - * @brief Timer expire callback data definition - */ -typedef struct OS_TimerCallbackData { - OS_TimerCallback_t callback; /* Timer expire callback function */ - void *argument; /* Argument of timer expire callback function */ -} OS_TimerCallbackData_t; -#endif - -/** - * @brief Timer object definition - */ -typedef struct OS_Timer { - TimerHandle_t handle; -#if OS_TIMER_USE_FREERTOS_ORIG_CALLBACK - OS_TimerCallbackData_t *priv; /* private data for internally usage */ -#endif -} OS_Timer_t; - - -OS_Status OS_TimerCreate(OS_Timer_t *timer, OS_TimerType type, - OS_TimerCallback_t cb, void *arg, OS_Time_t periodMS); -OS_Status OS_TimerDelete(OS_Timer_t *timer); -OS_Status OS_TimerStart(OS_Timer_t *timer); -OS_Status OS_TimerChangePeriod(OS_Timer_t *timer, OS_Time_t periodMS); -OS_Status OS_TimerStop(OS_Timer_t *timer); - -/** - * @brief Check whether the timer object is valid or not - * @param[in] timer Pointer to the timer object - * @return 1 on valid, 0 on invalid - */ -static __always_inline int OS_TimerIsValid(OS_Timer_t *timer) -{ - return (timer->handle != OS_INVALID_HANDLE); -} - -/** - * @brief Set the timer object to invalid state - * @param[in] timer Pointer to the timer object - * @return None - */ -static __always_inline void OS_TimerSetInvalid(OS_Timer_t *timer) -{ - timer->handle = OS_INVALID_HANDLE; -} - -/** - * @brief Check whether the timer is active or not - * - * A timer is inactive when it is in one of the following cases: - * - The timer has been created, but not started. - * - The timer is a one shot timer that has not been restarted since it - * expired. - * - * @param[in] timer Pointer to the timer object - * @return 1 on active, 0 on inactive - */ -static __always_inline int OS_TimerIsActive(OS_Timer_t *timer) -{ - return (xTimerIsTimerActive(timer->handle) != pdFALSE); -} - -#ifdef __cplusplus -} -#endif - -#endif /* _KERNEL_OS_FREERTOS_OS_TIMER_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_common.h b/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_common.h deleted file mode 100644 index 008ffd2091d30dc214f1baae155ff1adbf80f6d9..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_common.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_RTTHREAD_OS_COMMON_H_ -#define _KERNEL_OS_RTTHREAD_OS_COMMON_H_ - -#include -#include -#include "rtthread.h" -#include "rthw.h" - -#ifdef __cplusplus -extern "C" { -#endif - -typedef enum { - OS_PRIORITY_IDLE = 31, //(RT_THREAD_PRIORITY_MAX - 1) - 0, // 31 - OS_PRIORITY_LOW = 30, //(RT_THREAD_PRIORITY_MAX - 1) - 1, // 30 - OS_PRIORITY_BELOW_NORMAL = 29, //(RT_THREAD_PRIORITY_MAX - 1) - 2, // 29 - OS_PRIORITY_NORMAL = 10, //(RT_THREAD_PRIORITY_MAX) / (3), // 10 - OS_PRIORITY_ABOVE_NORMAL = 9, //(RT_THREAD_PRIORITY_MAX + 4) / (4), // 9 - OS_PRIORITY_HIGH = 8, //(RT_THREAD_PRIORITY_MAX) / (5), // 6 - OS_PRIORITY_REAL_TIME = 1 // 1 -} OS_Priority; - -/** - * @brief OS status definition - */ -typedef enum { - OS_OK = 0, /* success */ - OS_FAIL = -1, /* general failure */ - OS_E_NOMEM = -2, /* out of memory */ - OS_E_PARAM = -3, /* invalid parameter */ - OS_E_TIMEOUT = -4, /* operation timeout */ - OS_E_ISR = -5, /* not allowed in ISR context */ -} OS_Status; - -/** @brief Type definition of OS time */ -typedef unsigned long OS_Time_t; - -#define OS_WAIT_FOREVER 0xffffffffU /* Wait forever timeout value */ -#define OS_SEMAPHORE_MAX_COUNT 0xffffffffU /* Maximum count value for semaphore */ -#define OS_INVALID_HANDLE NULL /* OS invalid handle */ - -#ifdef __cplusplus -} -#endif - -#endif /* _KERNEL_OS_RTTHREAD_OS_COMMON_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_errno.h b/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_errno.h deleted file mode 100644 index 338a6dc2eaa8471099cf83efd1d6aa6e7c96cbc9..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_errno.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_RTTHREAD_OS_ERRNO_H_ -#define _KERNEL_OS_RTTHREAD_OS_ERRNO_H_ - -#include "kernel/os/RT-Thread/os_common.h" - -#ifdef __cplusplus -extern "C" { -#endif - -rt_err_t rt_get_errno(void); -void rt_set_errno(rt_err_t error); - -/* - * Thread safe errno handling for RT-Thread - */ - -/** - * @brief Get error number of the current thread - * @return Error number of the current thread - */ -static inline int OS_GetErrno(void) -{ - return (int)rt_get_errno(); -} - -/** - * @brief Set error number of the current thread - * @param[in] Error number to be set - * @return None - */ -static inline void OS_SetErrno(int err) -{ - rt_set_errno((rt_err_t)err); -} - -#ifdef __cplusplus -} -#endif - -#endif /* _KERNEL_OS_RTTHREAD_OS_ERRNO_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_mutex.h b/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_mutex.h deleted file mode 100644 index 63c14df22d4a8d42a7143e11da0e74f9ee832480..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_mutex.h +++ /dev/null @@ -1,141 +0,0 @@ -/* - * Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_RTTHREAD_OS_MUTEX_H_ -#define _KERNEL_OS_RTTHREAD_OS_MUTEX_H_ - -#include "../os_common.h" -#include "../os_thread.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Mutex object definition - */ -typedef struct OS_Mutex { - rt_mutex_t handle; -} OS_Mutex_t; - -OS_Status OS_MutexCreate(OS_Mutex_t *mutex); -OS_Status OS_MutexDelete(OS_Mutex_t *mutex); -OS_Status OS_MutexLock(OS_Mutex_t *mutex, OS_Time_t waitMS); -OS_Status OS_MutexUnlock(OS_Mutex_t *mutex); - -/** - * @brief Create and initialize a recursive mutex object - * @note A recursive mutex can be locked repeatedly by one single thread. - * The mutex doesn't become available again until the owner has called - * OS_RecursiveMutexUnlock() for each successful OS_RecursiveMutexLock(). - * @param[in] mutex Pointer to the recursive mutex object - * @retval OS_Status, OS_OK on success - */ -static inline OS_Status OS_RecursiveMutexCreate(OS_Mutex_t *mutex) -{ - return OS_MutexCreate(mutex); -} - -/** - * @brief Delete the recursive mutex object - * @param[in] mutex Pointer to the recursive mutex object - * @retval OS_Status, OS_OK on success - */ -static inline OS_Status OS_RecursiveMutexDelete(OS_Mutex_t *mutex) -{ - return OS_MutexDelete(mutex); -} - -/** - * @brief Lock the recursive mutex object - * @note A recursive mutex can be locked repeatedly by one single thread. - * If the recursive mutex is already locked by other thread, the caller - * will be blocked for the specified time duration. - * @param[in] mutex Pointer to the recursive mutex object - * @param[in] waitMS The maximum amount of time (in millisecond) the thread - * should remain in the blocked state to wait for the - * recursive mutex to become unlocked. - * OS_WAIT_FOREVER for waiting forever, zero for no waiting. - * @retval OS_Status, OS_OK on success - */ -static inline OS_Status OS_RecursiveMutexLock(OS_Mutex_t *mutex, OS_Time_t waitMS) -{ - return OS_MutexLock(mutex, waitMS); -} - -/** - * @brief Unlock the recursive mutex object previously locked using - * OS_RecursiveMutexLock() - * @note The recursive mutex should be unlocked from the same thread context - * from which it was locked. - * @param[in] mutex Pointer to the mutex object - * @retval OS_Status, OS_OK on success - */ -static inline OS_Status OS_RecursiveMutexUnlock(OS_Mutex_t *mutex) -{ - return OS_MutexUnlock(mutex); -} - -/** - * @brief Check whether the mutex object is valid or not - * @param[in] mutex Pointer to the mutex object - * @return 1 on valid, 0 on invalid - */ -static inline int OS_MutexIsValid(OS_Mutex_t *mutex) -{ - return (mutex->handle != OS_INVALID_HANDLE); -} - -/** - * @brief Set the mutex object to invalid state - * @param[in] mutex Pointer to the mutex object - * @return None - */ -static inline void OS_MutexSetInvalid(OS_Mutex_t *mutex) -{ - mutex->handle = OS_INVALID_HANDLE; -} - -/** - * @brief Get the mutex object's owner - * @note A mutex object's owner is a thread that locks the mutex - * @param[in] mutex Pointer to the mutex object - * @return The handle of the thread that locks the mutex object. - * NULL when the mutex is not locked by any thread. - */ -static inline OS_ThreadHandle_t OS_MutexGetOwner(OS_Mutex_t *mutex) -{ - return (OS_ThreadHandle_t)(mutex->handle->owner); -} - -#ifdef __cplusplus -} -#endif - -#endif /* _KERNEL_OS_RTTHREAD_OS_MUTEX_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_queue.h b/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_queue.h deleted file mode 100644 index c612034f14cb8fc56e288fc93e37304a5dd2f83d..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_queue.h +++ /dev/null @@ -1,132 +0,0 @@ -/* - * Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_RTTHREAD_OS_QUEUE_H_ -#define _KERNEL_OS_RTTHREAD_OS_QUEUE_H_ - -#include "_os_common.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Queue object definition - */ -typedef struct OS_Queue { - rt_mq_t handle; - uint32_t itemSize; -} OS_Queue_t; - -OS_Status OS_QueueCreate(OS_Queue_t *queue, uint32_t queueLen, uint32_t itemSize); -OS_Status OS_QueueDelete(OS_Queue_t *queue); -OS_Status OS_QueueSend(OS_Queue_t *queue, const void *item, OS_Time_t waitMS); -OS_Status OS_QueueReceive(OS_Queue_t *queue, void *item, OS_Time_t waitMS); - -/** - * @brief Check whether the queue object is valid or not - * @param[in] queue Pointer to the queue object - * @return 1 on valid, 0 on invalid - */ -static inline int OS_QueueIsValid(OS_Queue_t *queue) -{ - return (queue->handle != OS_INVALID_HANDLE); -} - -/** - * @brief Set the queue object to invalid state - * @param[in] queue Pointer to the queue object - * @return None - */ -static inline void OS_QueueSetInvalid(OS_Queue_t *queue) -{ - queue->handle = OS_INVALID_HANDLE; -} - -/** - * @brief Create and initialize a message queue object - * @note A message queue is a queue with each data item can store a pointer. - * The size of each data item (message) is equal to sizeof(void *). - * @param[in] queue Pointer to the message queue object - * @param[in] queueLen The maximum number of items that the message queue can - * hold at any one time. - * @retval OS_Status, OS_OK on success - */ -static inline OS_Status OS_MsgQueueCreate(OS_Queue_t *queue, uint32_t queueLen) -{ - return OS_QueueCreate(queue, queueLen, sizeof(void *)); -} - -/** - * @brief Delete the message queue object - * @param[in] queue Pointer to the message queue object - * @retval OS_Status, OS_OK on success - */ -static inline OS_Status OS_MsgQueueDelete(OS_Queue_t *queue) -{ - return OS_QueueDelete(queue); -} - -/** - * @brief Send (write) a message to the back of the message queue - * @param[in] queue Pointer to the message queue object - * @param[in] msg A message, which is a pointer, to be copied into the queue - * @param[in] waitMS The maximum amount of time the thread should remain in the - * blocked state to wait for space to become available on the - * message queue, should the message queue already be full. - * OS_WAIT_FOREVER for waiting forever, zero for no waiting. - * @retval OS_Status, OS_OK on success - */ -static inline OS_Status OS_MsgQueueSend(OS_Queue_t *queue, void *msg, OS_Time_t waitMS) -{ - return OS_QueueSend(queue, &msg, waitMS); -} - -/** - * @brief Receive (read) a message from the message queue - * @param[in] queue Pointer to the message queue object - * @param[in] msg Pointer to the message buffer into which the received message - * will be copied. A message is a pointer. - * @param[in] waitMS The maximum amount of time the thread should remain in the - * blocked state to wait for message to become available on - * the message queue, should the message queue already be - * empty. - * OS_WAIT_FOREVER for waiting forever, zero for no waiting. - * @retval OS_Status, OS_OK on success - */ -static inline OS_Status OS_MsgQueueReceive(OS_Queue_t *queue, void **msg, OS_Time_t waitMS) -{ - return OS_QueueReceive(queue, msg, waitMS); -} - -#ifdef __cplusplus -} -#endif - -#endif /* _KERNEL_OS_RTTHREAD_OS_QUEUE_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_semaphore.h b/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_semaphore.h deleted file mode 100644 index d859f9715aaa1a9db0683af3c888f1a6ff3646e0..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_semaphore.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_RTTHREAD_OS_SEMAPHORE_H_ -#define _KERNEL_OS_RTTHREAD_OS_SEMAPHORE_H_ - -#include "_os_common.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Semaphore object definition - */ -typedef struct OS_Semaphore { - rt_sem_t handle; -} OS_Semaphore_t; - -OS_Status OS_SemaphoreCreate(OS_Semaphore_t *sem, uint32_t initCount, uint32_t maxCount); -OS_Status OS_SemaphoreCreateBinary(OS_Semaphore_t *sem); -OS_Status OS_SemaphoreDelete(OS_Semaphore_t *sem); -OS_Status OS_SemaphoreWait(OS_Semaphore_t *sem, OS_Time_t waitMS); -OS_Status OS_SemaphoreRelease(OS_Semaphore_t *sem); -OS_Status OS_SemaphoreReset(OS_Semaphore_t *sem); - -/** - * @brief Check whether the semaphore object is valid or not - * @param[in] sem Pointer to the semaphore object - * @return 1 on valid, 0 on invalid - */ -static inline int OS_SemaphoreIsValid(OS_Semaphore_t *sem) -{ - return (sem->handle != OS_INVALID_HANDLE); -} - -/** - * @brief Set the semaphore object to invalid state - * @param[in] sem Pointer to the semaphore object - * @return None - */ -static inline void OS_SemaphoreSetInvalid(OS_Semaphore_t *sem) -{ - sem->handle = OS_INVALID_HANDLE; -} - -#ifdef __cplusplus -} -#endif - -#endif /* _KERNEL_OS_RTTHREAD_OS_SEMAPHORE_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_thread.h b/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_thread.h deleted file mode 100644 index 0d37e14c3a602801191eef9bf4b4782f2e5f6944..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_thread.h +++ /dev/null @@ -1,171 +0,0 @@ -/* - * Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_RTTHREAD_OS_THREAD_H_ -#define _KERNEL_OS_RTTHREAD_OS_THREAD_H_ - -#include "_os_common.h" -#include "_os_time.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* thread priority */ -#define OS_THREAD_PRIO_DRV_BH OS_PRIORITY_HIGH -#define OS_THREAD_PRIO_DRV_WORK OS_PRIORITY_ABOVE_NORMAL -#define OS_THREAD_PRIO_NET80211 OS_PRIORITY_ABOVE_NORMAL -#define OS_THREAD_PRIO_SYS_CTRL OS_PRIORITY_ABOVE_NORMAL -#define OS_THREAD_PRIO_WPAS OS_PRIORITY_ABOVE_NORMAL -#define OS_THREAD_PRIO_HOSTAPD OS_PRIORITY_ABOVE_NORMAL -#define OS_THREAD_PRIO_DRV_RX OS_PRIORITY_NORMAL -#define OS_THREAD_PRIO_LWIP OS_PRIORITY_NORMAL -#define OS_THREAD_PRIO_CONSOLE OS_PRIORITY_ABOVE_NORMAL -#define OS_THREAD_PRIO_APP OS_PRIORITY_NORMAL - -/** @brief Thread entry definition, which is a pointer to a function */ -typedef void (*OS_ThreadEntry_t)(void *arg); - -/** @brief Thread handle definition */ -typedef rt_thread_t OS_ThreadHandle_t; - -/** - * @brief Thread object definition - */ -typedef struct OS_Thread { - rt_thread_t handle; -} OS_Thread_t; - -OS_Status OS_ThreadCreate(OS_Thread_t *thread, const char *name, - OS_ThreadEntry_t entry, void *arg, - OS_Priority priority, uint32_t stackSize); -OS_Status OS_ThreadDelete(OS_Thread_t *thread); - -/** - * @brief Check whether the thread object is valid or not - * @param[in] thread Pointer to the thread object - * @return 1 on valid, 0 on invalid - */ -static inline int OS_ThreadIsValid(OS_Thread_t *thread) -{ - return (thread->handle != OS_INVALID_HANDLE); -} - -/** - * @brief Set the thread object to invalid state - * @param[in] thread Pointer to the thread object - * @return None - */ -static inline void OS_ThreadSetInvalid(OS_Thread_t *thread) -{ - thread->handle = OS_INVALID_HANDLE; -} - -/** - * @brief Sleep for the given milliseconds - * - * This function causes the calling thread to sleep and block for the given - * milliseconds. - * - * @param[in] msec Milliseconds to sleep - * @return None - */ -static inline void OS_ThreadSleep(OS_Time_t msec) -{ - rt_thread_delay((rt_tick_t)OS_MSecsToTicks(msec)); -} - -/** - * @brief Yield to another thread of equal priority - * - * Yielding is where a thread volunteers to leave the running state, without - * being pre-empted, and before its time slice has been fully utilized. - * - * @return None - */ -static inline void OS_ThreadYield(void) -{ - rt_thread_yield(); -} - -/** - * @brief Get the handle of the current running thread - * @return Handle of the current running thread - */ -static inline OS_ThreadHandle_t OS_ThreadGetCurrentHandle(void) -{ - return (OS_ThreadHandle_t)rt_thread_self(); -} - -/** - * @brief Suspend the thread scheduler - * - * Suspending the scheduler prevents a context switch from occurring but leaves - * interrupts enabled. If an interrupt requests a context switch while the - * scheduler is suspended, then the request is held pending and is performed - * only when the scheduler is resumed (un-suspended). - * - * @return None - */ -static inline void OS_ThreadSuspendScheduler(void) -{ - rt_enter_critical(); -} - -/** - * @brief Resume the thread scheduler - * - * Resume scheduler activity, following a previous call to - * OS_ThreadSuspendScheduler(), by transitioning the scheduler into the - * active state from the suspended state. - * - * @return None - */ -static inline void OS_ThreadResumeScheduler(void) -{ - rt_exit_critical(); -} - -/** - * @brief Check whether the thread scheduler is running or not - * @return 1 on runing, 0 on not running - */ -static inline int OS_ThreadIsSchedulerRunning(void) -{ - // TODO - printf("[ERR] %s() NOT SUPPORT!", __func__); - return 1; -// return (xTaskGetSchedulerState() == taskSCHEDULER_RUNNING); -} - -#ifdef __cplusplus -} -#endif - -#endif /* _KERNEL_OS_RTTHREAD_OS_THREAD_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_time.h b/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_time.h deleted file mode 100644 index d96bf502f484b10ebd08828ff6d7511bcbd002c1..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_time.h +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_RTTHREAD_OS_TIME_H_ -#define _KERNEL_OS_RTTHREAD_OS_TIME_H_ - -#include "_os_common.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* Parameters used to convert the time values */ -#define OS_MSEC_PER_SEC 1000U /* milliseconds per second */ -#define OS_USEC_PER_MSEC 1000U /* microseconds per millisecond */ -#define OS_USEC_PER_SEC 1000000U /* microseconds per second */ - -/* system clock's frequency, OS ticks per second */ -#define OS_HZ (RT_TICK_PER_SECOND) - -/* microseconds per OS tick (1000000 / OS_HZ) */ -#define OS_TICK (OS_USEC_PER_SEC / OS_HZ) - -/** @brief Get the number of ticks since OS start */ -/* Due to portTICK_TYPE_IS_ATOMIC is 1, calling xTaskGetTickCount() in ISR is - * safe also. - */ -#define OS_GetTicks() ((OS_Time_t)rt_tick_get()) - -/** @brief Get the number of seconds since OS start */ -#define OS_GetTime() (OS_GetTicks() / OS_HZ) - -/** - * @brief Macros used to convert various time units to each other - * - Secs stand for seconds - * - MSecs stand for milliseconds - * - Ticks stand for OS ticks - * - Jiffies stand for OS jiffies, which is a synonym for OS ticks - */ -/* there will be return 0 ticks ,when OS_HZ less than 1000 */ -/* - *#define OS_SecsToTicks(sec) ((OS_Time_t)(sec) * OS_HZ) - *#define OS_MSecsToTicks(msec) ((OS_Time_t)(msec) * (OS_USEC_PER_MSEC / OS_TICK)) -*/ -#define OS_SecsToTicks(sec) ((OS_Time_t)(sec) * OS_HZ) -#define OS_MSecsToTicks(msec) ((OS_Time_t)(msec) * OS_USEC_PER_MSEC / OS_TICK) -/* - * there will be warned : division by zero,so change the definition - *#define OS_TicksToMSecs(t) ((uint32_t)(t) / (OS_USEC_PER_MSEC / OS_TICK)) - *#define OS_TicksToSecs(t) ((uint32_t)(t) / (OS_USEC_PER_SEC / OS_TICK)) -*/ -#define OS_TicksToMSecs(t) ((uint32_t)(t) * OS_TICK / OS_USEC_PER_MSEC) -#define OS_TicksToSecs(t) ((uint32_t)(t) * OS_TICK / OS_USEC_PER_SEC) - -#define OS_GetJiffies() OS_GetTicks() -#define OS_SecsToJiffies(sec) OS_SecsToTicks(sec) -#define OS_MSecsToJiffies(msec) OS_MSecsToTicks(msec) -#define OS_JiffiesToMSecs(j) OS_TicksToMSecs(j) -#define OS_JiffiesToSecs(j) OS_TicksToSecs(j) - -/** - * @brief Macros used to sleep for the given time (milliseconds or seconds) - */ -#define OS_MSleep(msec) rt_thread_delay((rt_tick_t)OS_MSecsToTicks(msec)) -#define OS_Sleep(sec) OS_MSleep((sec) * OS_MSEC_PER_SEC) -#define OS_SSleep(sec) OS_Sleep(sec) - -/** - * @brief Macros used to compare time values - * - * These inlines deal with timer wrapping correctly. You are - * strongly encouraged to use them - * 1. Because people otherwise forget - * 2. Because if the timer wrap changes in future you won't have to - * alter your code. - * - * OS_TimeAfter(a,b) returns true if the time a is after time b. - * - * Do this with "<0" and ">=0" to only test the sign of the result. A - * good compiler would generate better code (and a really good compiler - * wouldn't care). Gcc is currently neither. - */ -#define OS_TimeAfter(a, b) ((int32_t)(b) - (int32_t)(a) < 0) -#define OS_TimeBefore(a, b) OS_TimeAfter(b, a) -#define OS_TimeAfterEqual(a, b) ((int32_t)(a) - (int32_t)(b) >= 0) -#define OS_TimeBeforeEqual(a, b) OS_TimeAfterEqual(b, a) - -/** @brief Macros used to generate fake random 32-bit value */ -/* The fake random 32-bit value is generated by combining OS ticks and - * the value of rand(). - */ -int rand(void); -#define OS_Rand32() ((uint32_t)((rand() & 0xffffff) | (OS_GetTicks() << 24))) - -#ifdef __cplusplus -} -#endif - -#endif /* _KERNEL_OS_RTTHREAD_OS_TIME_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_timer.h b/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_timer.h deleted file mode 100644 index 27dd39eb6598d0724cfa4ad3d030e59662eef18d..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/RT-Thread/_os_timer.h +++ /dev/null @@ -1,108 +0,0 @@ -/* - * Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_RTTHREAD_OS_TIMER_H_ -#define _KERNEL_OS_RTTHREAD_OS_TIMER_H_ - -#include "_os_common.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Timer type definition - * - one shot timer: Timer will be in the dormant state after it expires. - * - periodic timer: Timer will auto-reload after it expires. - */ -typedef enum { - OS_TIMER_ONCE = 0, /* one shot timer */ - OS_TIMER_PERIODIC = 1 /* periodic timer */ -} OS_TimerType; - -/** @brief Timer expire callback function definition */ -typedef void (*OS_TimerCallback_t)(void *arg); - -/** @brief Timer handle definition */ -typedef rt_timer_t OS_TimerHandle_t; - -typedef struct OS_Timer -{ - rt_timer_t handle; -} OS_Timer_t; - - -OS_Status OS_TimerCreate(OS_Timer_t *timer, OS_TimerType type, - OS_TimerCallback_t cb, void *arg, OS_Time_t periodMS); -OS_Status OS_TimerDelete(OS_Timer_t *timer); -OS_Status OS_TimerStart(OS_Timer_t *timer); -OS_Status OS_TimerChangePeriod(OS_Timer_t *timer, OS_Time_t periodMS); -OS_Status OS_TimerStop(OS_Timer_t *timer); - -/** - * @brief Check whether the timer object is valid or not - * @param[in] timer Pointer to the timer object - * @return 1 on valid, 0 on invalid - */ -static inline int OS_TimerIsValid(OS_Timer_t *timer) -{ - return (timer->handle != OS_INVALID_HANDLE); -} - -/** - * @brief Set the timer object to invalid state - * @param[in] timer Pointer to the timer object - * @return None - */ -static inline void OS_TimerSetInvalid(OS_Timer_t *timer) -{ - timer->handle = OS_INVALID_HANDLE; -} - -/** - * @brief Check whether the timer is active or not - * - * A timer is inactive when it is in one of the following cases: - * - The timer has been created, but not started. - * - The timer is a one shot timer that has not been restarted since it - * expired. - * - * @param[in] timer Pointer to the timer object - * @return 1 on active, 0 on inactive - */ -static inline int OS_TimerIsActive(OS_Timer_t *timer) -{ - return ((timer->handle->parent.flag & RT_TIMER_FLAG_ACTIVATED) ? 1 : 0); -} - -#ifdef __cplusplus -} -#endif - -#endif /* _KERNEL_OS_RTTHREAD_OS_TIMER_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/hal_os.h b/src/platform/f133/include/hal/sdmmc/osal/hal_os.h deleted file mode 100644 index 2413591544103af67e1b2c78ef3e1b266b7a3083..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/hal_os.h +++ /dev/null @@ -1,194 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_HAL_OS_H_ -#define _DRIVER_CHIP_HAL_OS_H_ - -#include "os.h" -#include -#include -#include - -#ifndef CONFIG_KERNEL_FREERTOS -#include -#include -#endif - -#include -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/* IRQ disable/enable */ -#define HAL_DisableIRQ() hal_interrupt_disable() -#define HAL_EnableIRQ() hal_interrupt_enable() - -/* Check if IRQ is disabled */ -#define HAL_IsIRQDisabled() hal_interrupt_is_disable() - -/* Check if in ISR context or not */ -#define HAL_IsISRContext() hal_interrupt_get_nest() - -extern hal_spinlock_t sdmmc_lock; - -/* Critical Sections */ -#define HAL_EnterCriticalSection() ({hal_spin_lock_irqsave(&sdmmc_lock);}) -#define HAL_ExitCriticalSection(f) ({hal_spin_unlock_irqrestore(&sdmmc_lock, f);}) -#define HAL_ATMOTIC_SET(a,v) ({int flags = HAL_EnterCriticalSection();\ - a = v;HAL_ExitCriticalSection(flags);}) -#define HAL_ATMOTIC_READ(a) ({int flags=0;int v=0; flags = HAL_EnterCriticalSection();v=a;HAL_ExitCriticalSection(flags);v;}) - -#define HAL_FlushDcacheRegion(s,len) (hal_dcache_clean_invalidate(s,len)) -#define HAL_InvalidDcacheRegion(s,len) (hal_dcache_invalidate(s, len)) - -#define HAL_GetTimeMs() (hal_gettime_ns() / 1000 / 1000) -#define HAL_GetTimeUs() (hal_gettime_ns() / 1000) -#define HAL_GetTimeNs() (hal_gettime_ns()) - -/* Semaphore */ -typedef OS_Semaphore_t HAL_Semaphore; - -#define HAL_SemaphoreInit(sem, initCount, maxCount) \ - (OS_SemaphoreCreate(sem, initCount, maxCount) == OS_OK ? HAL_OK : HAL_ERROR) - -#define HAL_SemaphoreInitBinary(sem) \ - (OS_SemaphoreCreateBinary(sem) == OS_OK ? HAL_OK : HAL_ERROR) - -#define HAL_SemaphoreDeinit(sem) \ - (OS_SemaphoreDelete(sem) == OS_OK ? HAL_OK : HAL_ERROR) - -#define HAL_SemaphoreWait(sem, msec) \ - (OS_SemaphoreWait(sem, msec) == OS_OK ? HAL_OK : HAL_ERROR) - -#define HAL_SemaphoreRelease(sem) \ - (OS_SemaphoreRelease(sem) == OS_OK ? HAL_OK : HAL_ERROR) - -#define HAL_SemaphoreIsValid(sem) \ - OS_SemaphoreIsValid(sem) - -#define HAL_SemaphoreSetInvalid(sem) \ - OS_SemaphoreSetInvalid(sem) - -/* Mutex */ -typedef OS_Mutex_t HAL_Mutex; - -#define HAL_MutexInit(mtx) \ - (OS_RecursiveMutexCreate(mtx) == OS_OK ? HAL_OK : HAL_ERROR) - -#define HAL_MutexDeinit(mtx) \ - (OS_RecursiveMutexDelete(mtx) == OS_OK ? HAL_OK : HAL_ERROR) - -#define HAL_MutexLock(mtx, msec) \ - (OS_RecursiveMutexLock(mtx, msec) == OS_OK ? HAL_OK : HAL_ERROR) - -#define HAL_MutexUnlock(mtx) \ - (OS_RecursiveMutexUnlock(mtx) == OS_OK ? HAL_OK : HAL_ERROR) - -/* Thread */ -#define HAL_ThreadSuspendScheduler() OS_ThreadSuspendScheduler() -#define HAL_ThreadResumeScheduler() OS_ThreadResumeScheduler() -#define HAL_ThreadIsSchedulerRunning() OS_ThreadIsSchedulerRunning() -#define HAL_ThreadEnd(s) (HAL_ATMOTIC_SET(s,0)) -#define HAL_ThreadStop(s) (HAL_ATMOTIC_SET(s,1)) -#define HAL_Thread_Should_Stop(s) (HAL_ATMOTIC_READ(s)) -#define HAL_ThreadDelete(w) (OS_ThreadDelete(NULL)) - - -/* Keep system alive, eg. feed watchdog */ -#define HAL_Alive() HAL_WDG_Feed() - -/* Time */ -#define HAL_Ticks() OS_GetTicks() -#define HAL_MSleep(msec) OS_MSleep(msec) -#define HAL_UDelay(us) OS_Udelay(us) - -#define HAL_SecsToTicks(sec) OS_SecsToTicks(sec) -#define HAL_MSecsToTicks(msec) OS_MSecsToTicks(msec) -#define HAL_TicksToMSecs(t) OS_TicksToMSecs(t) -#define HAL_TicksToSecs(t) OS_TicksToSecs(t) - -#define HAL_TimeAfter(a, b) OS_TimeAfter(a, b) -#define HAL_TimeBefore(a, b) OS_TimeBefore(a, b) -#define HAL_TimeAfterEqual(a, b) OS_TimeAfterEqual(a, b) -#define HAL_TimeBeforeEqual(a, b) OS_TimeBeforeEqual(a, b) - -#define HAL_ALIGN(x, a) ALIGN_UP(x, a) - -#define OS_CACHE_ALIGN_BYTES (64) - -static inline void *malloc_align_buf(size_t size) -{ - void *fake_ptr = NULL; - void *malloc_ptr = NULL; - - /*malloc_ptr = krhino_mm_alloc(size + OS_CACHE_ALIGN_BYTES);*/ - malloc_ptr = hal_malloc(size + OS_CACHE_ALIGN_BYTES); - if (HAL_PT_TO_U(malloc_ptr) & 0x3) { - printf("error: krhino_mm_alloc not align to 4 byte\r\n"); - } - fake_ptr = (void *)(HAL_PT_TO_U(malloc_ptr + OS_CACHE_ALIGN_BYTES) & (~(OS_CACHE_ALIGN_BYTES -1))); - *(uint32_t *)((uint32_t *)fake_ptr - 1) = HAL_PT_TO_U(malloc_ptr); - - return fake_ptr; -} - -static inline void free_align_buf(void *addr) -{ - void *malloc_ptr = NULL; - if (!addr) - return; - malloc_ptr = (void *)HAL_PT_TO_U(*(uint32_t *)((uint32_t *)addr - 1)); - /*krhino_mm_free(malloc_ptr);*/ - hal_free(malloc_ptr); -} - - -/* Memory */ -#define HAL_Malloc(l) malloc(l) -#define HAL_Free(p) free(p) -#define HAL_Memcpy(d, s, l) memcpy(d, s, l) -#define HAL_Memset(d, c, l) memset(d, c, l) -#define HAL_Memcmp(a, b, l) memcmp(a, b, l) -#define HAL_Memmove(d, s, n) memmove(d, s, n) -#define HAL_MallocAlign(l) (dma_alloc_coherent(l)) -#define HAL_FreeAlign(p) (dma_free_coherent(p)) - -#ifdef CONFIG_DRIVER_SYSCONFIG -#define HAL_SetPin -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_CHIP_HAL_OS_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/os.h b/src/platform/f133/include/hal/sdmmc/osal/os.h deleted file mode 100644 index 547e6cb6300af02c9ef739ed379591cff7805607..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/os.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_OS_H_ -#define _KERNEL_OS_OS_H_ - -#include "os_time.h" -#include "os_thread.h" -#include "os_queue.h" -#include "os_semaphore.h" -#include "os_mutex.h" -#include "os_timer.h" -#include -#include - -#endif /* _KERNEL_OS_OS_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/os_common.h b/src/platform/f133/include/hal/sdmmc/osal/os_common.h deleted file mode 100644 index b85d0aa94b9217fa8f49d243b52e1e6efac2d8bc..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/os_common.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_OS_COMMON_H_ -#define _KERNEL_OS_OS_COMMON_H_ - -#if defined(CONFIG_KERNEL_FREERTOS) -#include "FreeRTOS/_os_common.h" -#elif defined(CONFIG_RTTKERNEL) -#include "RT-Thread/_os_common.h" -#else -#error "No OS defined!" -#endif - -#endif /* _KERNEL_OS_OS_COMMON_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/os_cpuusage.h b/src/platform/f133/include/hal/sdmmc/osal/os_cpuusage.h deleted file mode 100644 index 914653639ca93d1b4308e2e55f7c30a5779ab38c..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/os_cpuusage.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_OS_CPUUSAGE_H_ -#define _KERNEL_OS_OS_CPUUSAGE_H_ - -#ifdef __CONFIG_OS_FREERTOS -#include "_cpuusage.h" -#else -#error "No OS defined!" -#endif - -#endif /* _KERNEL_OS_OS_CPUUSAGE_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/os_errno.h b/src/platform/f133/include/hal/sdmmc/osal/os_errno.h deleted file mode 100644 index fed3562139267500feb5a80c8167234e122b7535..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/os_errno.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_OS_ERRNO_H_ -#define _KERNEL_OS_OS_ERRNO_H_ - -#if defined(CONFIG_KERNEL_FREERTOS) -#include "FreeRTOS/_os_errno.h" -#elif defined(CONFIG_RTTKERNEL) -#include "RT-Thread/_os_errno.h" -#else -#error "No OS defined!" -#endif - -#endif /* _KERNEL_OS_OS_ERRNO_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/os_mutex.h b/src/platform/f133/include/hal/sdmmc/osal/os_mutex.h deleted file mode 100644 index 2ce93df748127719e1bea41473aff9b784a45e15..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/os_mutex.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_OS_MUTEX_H_ -#define _KERNEL_OS_OS_MUTEX_H_ - -#if defined(CONFIG_KERNEL_FREERTOS) -#include "FreeRTOS/_os_mutex.h" -#elif defined(CONFIG_RTTKERNEL) -#include "RT-Thread/_os_mutex.h" -#else -#error "No OS defined!" -#endif - -#endif /* _KERNEL_OS_OS_MUTEX_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/os_queue.h b/src/platform/f133/include/hal/sdmmc/osal/os_queue.h deleted file mode 100644 index 953899ee38efb90b23686d15132c9a338a2d8425..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/os_queue.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_OS_QUEUE_H_ -#define _KERNEL_OS_OS_QUEUE_H_ - -#if defined(CONFIG_KERNEL_FREERTOS) -#include "FreeRTOS/_os_queue.h" -#elif defined(CONFIG_RTTKERNEL) -#include "RT-Thread/_os_queue.h" -#else -#error "No OS defined!" -#endif - -#endif /* _KERNEL_OS_OS_QUEUE_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/os_semaphore.h b/src/platform/f133/include/hal/sdmmc/osal/os_semaphore.h deleted file mode 100644 index e84fb3370960ce6f670966a9f499f01a78f33d42..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/os_semaphore.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_OS_SEMAPHORE_H_ -#define _KERNEL_OS_OS_SEMAPHORE_H_ - -#if defined(CONFIG_KERNEL_FREERTOS) -#include "FreeRTOS/_os_semaphore.h" -#elif defined(CONFIG_RTTKERNEL) -#include "RT-Thread/_os_semaphore.h" -#else -#error "No OS defined!" -#endif - -#endif /* _KERNEL_OS_OS_SEMAPHORE_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/os_thread.h b/src/platform/f133/include/hal/sdmmc/osal/os_thread.h deleted file mode 100644 index 9461caa0b12a134ff7c17da7408dc529e281af15..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/os_thread.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_OS_THREAD_H_ -#define _KERNEL_OS_OS_THREAD_H_ - -#if defined(CONFIG_KERNEL_FREERTOS) -#include "FreeRTOS/_os_thread.h" -#elif defined(CONFIG_RTTKERNEL) -#include "RT-Thread/_os_thread.h" -#else -#error "No OS defined!" -#endif - -#endif /* _KERNEL_OS_OS_THREAD_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/os_time.h b/src/platform/f133/include/hal/sdmmc/osal/os_time.h deleted file mode 100644 index b06e124bf9cc25e9b651d7dc0554a5dd235bcb18..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/os_time.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_OS_TIME_H_ -#define _KERNEL_OS_OS_TIME_H_ - -#if defined(CONFIG_KERNEL_FREERTOS) -#include "FreeRTOS/_os_time.h" -#elif defined(CONFIG_RTTKERNEL) -#include "RT-Thread/_os_time.h" -#else -#error "No OS defined!" -#endif - -#endif /* _KERNEL_OS_OS_TIME_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/osal/os_timer.h b/src/platform/f133/include/hal/sdmmc/osal/os_timer.h deleted file mode 100644 index 9a791740838e8ec84d7ac6e778708cb250907339..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/osal/os_timer.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _KERNEL_OS_OS_TIMER_H_ -#define _KERNEL_OS_OS_TIMER_H_ - -#if defined(CONFIG_KERNEL_FREERTOS) -#include "FreeRTOS/_os_timer.h" -#elif defined(CONFIG_RTTKERNEL) -#include "RT-Thread/_os_timer.h" -#else -#error "No OS defined!" -#endif - -#endif /* _KERNEL_OS_OS_TIMER_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/sd_test.h b/src/platform/f133/include/hal/sdmmc/sd_test.h deleted file mode 100644 index 966cfeb69344aef989006c6ecd5f7d2cdffd6b20..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/sd_test.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _SD_TEST_H_ -#define _SD_TEST_H_ - -#include "sdio.h" -#include "sdmmc.h" -#include "card.h" -#include "hal_sdhost.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef CONFIG_DETECT_CARD -void card_detect(uint32_t present, uint16_t sdc_id); -#endif -int32_t mmc_test_init(uint32_t host_id, SDC_InitTypeDef *sdc_param, uint32_t scan); -struct mmc_card *mmc_scan_init(uint16_t sd_id, uint16_t sdc_id, SDCard_InitTypeDef *card_param); -int32_t mmc_test_exit(uint16_t sd_id, uint16_t host_id); -int32_t mmc_test(uint32_t host_id, uint32_t cd_mode, uint32_t sdc_degmask, uint32_t card_dbgmask); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/hal/sdmmc/sdio.h b/src/platform/f133/include/hal/sdmmc/sdio.h deleted file mode 100644 index 09d09f47c289be9231f10fd94411d27fb3d86a7c..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/sdio.h +++ /dev/null @@ -1,448 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_SDMMC_SDIO_H_ -#define _DRIVER_CHIP_SDMMC_SDIO_H_ - -#include -#include "card.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define printk printf - -#ifdef CONFIG_USE_SDIO -/* - * SDIO function CIS tuple (unknown to the core) - */ -struct sdio_func_tuple { - struct sdio_func_tuple *next; - unsigned char code; - unsigned char size; - unsigned char data[0]; -}; - -//#define SDIO_DEBUG - -#define SDIO_EXCLUSIVE_HOST - -/* SDIO commands type argument response */ -#define SD_IO_SEND_OP_COND 5 /* bcr [23:0] OCR R4 */ -#define SD_IO_RW_DIRECT 52 /* ac [31:0] See below R5 */ -#define SD_IO_RW_EXTENDED 53 /* adtc [31:0] See below R5 */ - -/* - * SD_IO_RW_DIRECT argument format: - * - * [31] R/W flag - * [30:28] Function number - * [27] RAW flag - * [25:9] Register address - * [7:0] Data - */ - -/* - * SD_IO_RW_EXTENDED argument format: - * - * [31] R/W flag - * [30:28] Function number - * [27] Block mode - * [26] Increment address - * [25:9] Register address - * [8:0] Byte/block count - */ - -#define R4_18V_PRESENT (1<<24) -#define R4_MEMORY_PRESENT (1 << 27) - -//#define CONFIG_SDIO_IRQ_SUPPORT - -/* - SDIO status in R5 - Type - e : error bit - s : status bit - r : detected and set for the actual command response - x : detected and set during command execution. the host must poll - the card by sending status command in order to read these bits. - Clear condition - a : according to the card state - b : always related to the previous command. Reception of - a valid command will clear it (with a delay of one command) - c : clear by read - */ - -#define R5_COM_CRC_ERROR (1 << 15) /* er, b */ -#define R5_ILLEGAL_COMMAND (1 << 14) /* er, b */ -#define R5_ERROR (1 << 11) /* erx, c */ -#define R5_FUNCTION_NUMBER (1 << 9) /* er, c */ -#define R5_OUT_OF_RANGE (1 << 8) /* er, c */ -#define R5_STATUS(x) (x & 0xCB00) -#define R5_IO_CURRENT_STATE(x) ((x & 0x3000) >> 12) /* s, b */ - -/* - * Card Common Control Registers (CCCR) - */ - -#define SDIO_CCCR_CCCR 0x00 - -#define SDIO_CCCR_REV_1_00 0 /* CCCR/FBR Version 1.00 */ -#define SDIO_CCCR_REV_1_10 1 /* CCCR/FBR Version 1.10 */ -#define SDIO_CCCR_REV_1_20 2 /* CCCR/FBR Version 1.20 */ -#define SDIO_CCCR_REV_3_00 3 /* CCCR/FBR Version 3.00 */ - -#define SDIO_SDIO_REV_1_00 0 /* SDIO Spec Version 1.00 */ -#define SDIO_SDIO_REV_1_10 1 /* SDIO Spec Version 1.10 */ -#define SDIO_SDIO_REV_1_20 2 /* SDIO Spec Version 1.20 */ -#define SDIO_SDIO_REV_2_00 3 /* SDIO Spec Version 2.00 */ -#define SDIO_SDIO_REV_3_00 4 /* SDIO Spec Version 3.00 */ - -#define SDIO_CCCR_SD 0x01 - -#define SDIO_SD_REV_1_01 0 /* SD Physical Spec Version 1.01 */ -#define SDIO_SD_REV_1_10 1 /* SD Physical Spec Version 1.10 */ -#define SDIO_SD_REV_2_00 2 /* SD Physical Spec Version 2.00 */ -#define SDIO_SD_REV_3_00 3 /* SD Physical Spev Version 3.00 */ - -#define SDIO_CCCR_IOEx 0x02 -#define SDIO_CCCR_IORx 0x03 -#define SDIO_CCCR_IENx 0x04 /* Function/Master Interrupt Enable */ -#define SDIO_CCCR_INTx 0x05 /* Function Interrupt Pending */ -#define SDIO_CCCR_ABORT 0x06 /* function abort/card reset */ -#define SDIO_CCCR_IF 0x07 /* bus interface controls */ - -#define SDIO_BUS_WIDTH_1BIT 0x00 -#define SDIO_BUS_WIDTH_4BIT 0x02 -#define SDIO_BUS_ECSI 0x20 /* Enable continuous SPI interrupt */ -#define SDIO_BUS_SCSI 0x40 /* Support continuous SPI interrupt */ - -#define SDIO_BUS_ASYNC_INT 0x20 - -#define SDIO_BUS_CD_DISABLE 0x80 /* disable pull-up on DAT3 (pin 1) */ - -#define SDIO_CCCR_CAPS 0x08 - -#define SDIO_CCCR_CAP_SDC 0x01 /* can do CMD52 while data transfer */ -#define SDIO_CCCR_CAP_SMB 0x02 /* can do multi-block xfers (CMD53) */ -#define SDIO_CCCR_CAP_SRW 0x04 /* supports read-wait protocol */ -#define SDIO_CCCR_CAP_SBS 0x08 /* supports suspend/resume */ -#define SDIO_CCCR_CAP_S4MI 0x10 /* interrupt during 4-bit CMD53 */ -#define SDIO_CCCR_CAP_E4MI 0x20 /* enable ints during 4-bit CMD53 */ -#define SDIO_CCCR_CAP_LSC 0x40 /* low speed card */ -#define SDIO_CCCR_CAP_4BLS 0x80 /* 4 bit low speed card */ - -#define SDIO_CCCR_CIS 0x09 /* common CIS pointer (3 bytes) */ - -/* Following 4 regs are valid only if SBS is set */ -#define SDIO_CCCR_SUSPEND 0x0c -#define SDIO_CCCR_SELx 0x0d -#define SDIO_CCCR_EXECx 0x0e -#define SDIO_CCCR_READYx 0x0f - -#define SDIO_CCCR_BLKSIZE 0x10 - -#define SDIO_CCCR_POWER 0x12 - -#define SDIO_POWER_SMPC 0x01 /* Supports Master Power Control */ -#define SDIO_POWER_EMPC 0x02 /* Enable Master Power Control */ - -#define SDIO_CCCR_SPEED 0x13 - -#define SDIO_SPEED_SHS 0x01 /* Supports High-Speed mode */ -#define SDIO_SPEED_BSS_SHIFT 1 -#define SDIO_SPEED_BSS_MASK (7<_bus_refs) - BUG_ON(1); /* check when need debug */ - card->_bus_refs++; -#endif -} -#endif - -/** - * release_host - release a bus for a certain SDIO function - * @func: SDIO function that was accessed - * - * Release a bus, allowing others to claim the bus for their - * operations. - */ -#ifdef SDIO_EXCLUSIVE_HOST -extern void sdio_release_host(struct mmc_card *card); -#else -static inline void sdio_release_host(struct mmc_card *card) { -#ifdef SDIO_DEBUG - card->_bus_refs--; - if (card->_bus_refs) - BUG_ON(1); /* check when need debug */ -#endif -} -#endif - -static inline void sdio_lock(struct mmc_card *card) { - sdio_claim_host(card); -} - -static inline void sdio_unlock(struct mmc_card *card) { - sdio_release_host(card); -} - -extern int32_t sdio_set_block_size(struct mmc_card *card, uint32_t fn_num, - uint32_t blksz); -extern int32_t sdio_enable_func(struct mmc_card *card, uint32_t func_num); -extern int32_t sdio_disable_func(struct mmc_card *card, uint32_t func_num); -extern int32_t sdio_pm(sdio_t *card, int32_t suspend); - -extern void sdio_test(void); -extern int mmc_io_rw_direct(struct mmc_card *card, int32_t write, uint32_t fn, uint32_t addr, uint8_t in, uint8_t *out); - -extern struct sdio_func ** get_mmc_card_func(uint8_t card_id); - -#endif /* CONFIG_USE_SDIO */ - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_CHIP_SDMMC_SDIO_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/sdmmc.h b/src/platform/f133/include/hal/sdmmc/sdmmc.h deleted file mode 100644 index e511307a499eb7dc78c3a9b5e091923a2ae3e649..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/sdmmc.h +++ /dev/null @@ -1,513 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_SDMMC_SDMMC_H_ -#define _DRIVER_CHIP_SDMMC_SDMMC_H_ - -#include "card.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define SD_EXCLUSIVE_HOST - -/* SD commands type argument response */ - /* class 0 */ -/* This is basically the same command as for MMC with some quirks. */ -#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6, ask the card to publish a new relative address */ -#define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7, sends Sd memory card interface condition, for sd 2.0 */ -#define SD_SWITCH_VOLTAGE 11 /* ac R1, switch to 1.8V bus signaling level */ - - /* class 10 */ -#define SD_SWITCH 6 /* adtc [31:0] See below R1, checks swithcable function(mode 0),And swtich card function(mode 1), for sd 1.x */ - - /* class 5 */ -#define SD_ERASE_WR_BLK_START 32 /* ac [31:0] data addr R1 */ -#define SD_ERASE_WR_BLK_END 33 /* ac [31:0] data addr R1 */ - - /* Application commands */ -#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */ -#define SD_APP_SD_STATUS 13 /* adtc R1 */ -#define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */ -#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */ -#define SD_APP_SEND_SCR 51 /* adtc R1 */ - -/* OCR bit definitions */ -#define SD_OCR_S18R (1 << 24) /* 1.8V switching request */ -#define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */ -#define SD_OCR_XPC (1 << 28) /* SDXC power control */ -#define SD_OCR_CCS (1 << 30) /* Card Capacity Status */ - -/* - * SD_SWITCH argument format: - * - * [31] Check (0) or switch (1) - * [30:24] Reserved (0) - * [23:20] Function group 6 - * [19:16] Function group 5 - * [15:12] Function group 4 - * [11:8] Function group 3 - * [7:4] Function group 2 - * [3:0] Function group 1 - */ - -/* - * SD_SEND_IF_COND argument format: - * - * [31:12] Reserved (0) - * [11:8] Host Voltage Supply Flags - * [7:0] Check Pattern (0xAA) - */ - -/* - * SCR field definitions - */ -#define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */ -#define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */ -#define SCR_SPEC_VER_2 2 /* Implements system specification 2.00-3.0X */ - -/* - * SD bus widths - */ -#define SD_BUS_WIDTH_1 0 -#define SD_BUS_WIDTH_4 2 - -/* - * SD_SWITCH mode - */ -#define SD_SWITCH_CHECK 0 -#define SD_SWITCH_SET 1 - -/* - * SD_SWITCH function groups - */ -#define SD_SWITCH_GRP_ACCESS 0 - -/* - * SD_SWITCH access modes - */ -#define SD_SWITCH_ACCESS_DEF 0 -#define SD_SWITCH_ACCESS_HS 1 - -/*command index*/ -/*basic commands*/ -#define MMC_GO_IDLE_STATE 0 /* bc,rest all cards to idle state */ -#define MMC_ALL_SEND_CID 2 /* bcr R2, asks any card to send CID numbers */ -#define MMC_SET_RELATIVE_ADDR 3 /* bcr,ask the card to publish a new relative address,R6 */ -#define MMC_SET_DSR 4 /* bc,program the DSR of all cards,for sd 2.0 */ -#define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1, select or deselect one card */ -#define MMC_SEND_EXT_CSD 8 /* adtc,the card sends it's ex_csd as a block of data,R1 */ -#define MMC_SEND_CSD 9 /* ac [31:16] RCA R2, addressed card send CSD */ -#define MMC_SEND_CID 10 /* ac, addressed card send CID,R2 */ -#define MMC_READ_DATA_UNTIL_STOP 11 /* atdc,read data stream from catd until a STOP_TRANSMITISSION follows,R1 */ -#define MMC_STOP_TRANSMISSION 12 /* ac, termilate a multiple block read/write operation,R1b */ -#define MMC_SEND_STATUS 13 /* ac, addressed card send its status regesiter,R1 */ -#define MMC_GO_INACTIVE_STATE 15 /* ac, sets the card to inactive state */ -#define MMC_SEND_TUNING_PATTERN 19 /* adtc, send 64 bytes pattern for sdr50 and sdr104 mode */ - -/* erase commands*/ -#define MMC_ERASE_WR_BLK_START 32 /* ac,sets the address of the first write bloock to be erased,R1 */ -#define MMC_ERASE_WR_BLK_END 33 /* ac,sets the address of the last write bloock to be erased,R1 */ - -/*MMC private command*/ -#define MMC_SEND_OP_COND 1 /* bcr,Activates the card's initialization process,R3 */ -#define MMC_SWITCH 6 /* ac,switch the mode of operation of the selected card or modifies tge EXT_CSD,R1b */ -#define MMC_BUSTEST_R 14 /* adtc,a host reads the reversed testing data pattern from a card,R1 */ -#define MMC_BUSTEST_W 19 /* adtc,a host sends the bus teset data pattern to a card,R1 */ - -/*sd io command*/ -#define IO_SEND_OP_COND 5 /* for SD IO.similar to ACMD41 for sd mem */ -#define IO_RW_DIRECT 52 -#define IO_RW_EXTENDED 53 -#define SD_IO_CMD54 54 - - /* class 2 */ -#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1, select a block length for all read/write cmds */ -#define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1, reads a block of the size seclected by SET_BLOCKLEN */ -#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1, continuously send blocks of data until interrupted by a stop transmission commmad */ -#define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */ -#define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */ - - /* class 3 */ -#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */ - - /* class 4 */ -#define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */ -#define MMC_WRITE_SINGLE_BLOCK 24 /* adtc [31:0] data addr R1, writes a block of the size seclected by SET_BLOCKLEN */ -#define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1, continuously writes blocks of data until interrupted by a stop transmission commmad */ -#define MMC_PROGRAM_CID 26 /* adtc R1 */ -#define MMC_PROGRAM_CSD 27 /* adtc R1, program the programmable bits of CSD */ - - /* class 6 */ -#define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b, sets the write protect bit of the addressed group */ -#define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b, clears the write protect bit of the addressed group */ -#define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1, ask the card to send status of the write protection bits */ - - /* class 5 */ -#define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */ -#define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */ -#define MMC_ERASE 38 /* ac R1b, erase all selected write blocks */ - - /* class 9 */ -#define MMC_FAST_IO 39 /* ac R4, used to read or write 8 bit registers */ -#define MMC_GO_IRQ_STATE 40 /* bcr R5, sets the system info interrupt mode */ - - /* class 7 */ -#define MMC_LOCK_UNLOCK 42 /* adtc R1b, lock or unlock sd card */ - - /* class 8 */ -#define MMC_APP_CMD 55 /* ac [31:16] RCA R1, indicates the next cmd is an specific cmd */ -#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1, send or get a block of data */ - -static inline uint32_t mmc_op_multi(uint32_t opcode) -{ - return opcode == MMC_WRITE_MULTIPLE_BLOCK || - opcode == MMC_READ_MULTIPLE_BLOCK; -} - -/* - * MMC_SWITCH argument format: - * - * [31:26] Always 0 - * [25:24] Access Mode - * [23:16] Location of target Byte in EXT_CSD - * [15:08] Value Byte - * [07:03] Always 0 - * [02:00] Command Set - */ - -/* - MMC status in R1, for native mode (SPI bits are different) - Type - e : error bit - s : status bit - r : detected and set for the actual command response - x : detected and set during command execution. the host must poll - the card by sending status command in order to read these bits. - Clear condition - a : according to the card state - b : always related to the previous command. Reception of - a valid command will clear it (with a delay of one command) - c : clear by read - */ - -#define R1_OUT_OF_RANGE (1 << 31) /* er, c */ -#define R1_ADDRESS_ERROR (1 << 30) /* erx, c */ -#define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */ -#define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */ -#define R1_ERASE_PARAM (1 << 27) /* ex, c */ -#define R1_WP_VIOLATION (1 << 26) /* erx, c */ -#define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */ -#define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */ -#define R1_COM_CRC_ERROR (1 << 23) /* er, b */ -#define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */ -#define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */ -#define R1_CC_ERROR (1 << 20) /* erx, c */ -#define R1_ERROR (1 << 19) /* erx, c */ -#define R1_UNDERRUN (1 << 18) /* ex, c */ -#define R1_OVERRUN (1 << 17) /* ex, c */ -#define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */ -#define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */ -#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */ -#define R1_ERASE_RESET (1 << 13) /* sr, c */ -#define R1_STATUS(x) (x & 0xFFFFE000) -#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */ -#define R1_READY_FOR_DATA (1 << 8) /* sx, a */ -#define R1_SWITCH_ERROR (1 << 7) /* sx, c */ -#define R1_APP_CMD (1 << 5) /* sr, c */ - -#define R1_STATE_IDLE 0 -#define R1_STATE_READY 1 -#define R1_STATE_IDENT 2 -#define R1_STATE_STBY 3 -#define R1_STATE_TRAN 4 -#define R1_STATE_DATA 5 -#define R1_STATE_RCV 6 -#define R1_STATE_PRG 7 -#define R1_STATE_DIS 8 - -/*ce-ata command*/ -#define CEATA_RW_MULTIPLE_REGISTER 60 -#define CEATA_RW_MULTIPLE_BLOCK 61 - -/*application specific commands used by sd mem*/ -#define SET_BUS_WIDTH 6 /* ac,define the bus width(00 = 1bit, 10 = 4bit),R1 */ -#define SD_STATUS 13 /* adtc,send the sd card status,R1 */ -#define SEND_NUM_WR_BLOCKS 22 /* adtc,send the number of written write blocks,R1 */ -#define SET_WR_BLK_ERASE_CNT 23 /* ac,set the number of write blocks to be pre-erased before writing,R1 */ -#define SD_APP_OP_COND 41 /* bcr,asks the accessed card to send its OCR(operating conditon register) content,R3 */ -#define SET_CLR_CARD_DETECT 42 /* ac,connect or disconnect the pull up resistor of the card for card detect,R1 */ -#define SEND_SCR 51 /* adtc,reads the SCR(sd configure register),R1 */ - -/* MMC/SD in SPI mode reports R1 status always, and R2 for SEND_STATUS - * R1 is the low order byte; R2 is the next highest byte, when present. - */ -#define R1_SPI_IDLE (1 << 0) -#define R1_SPI_ERASE_RESET (1 << 1) -#define R1_SPI_ILLEGAL_COMMAND (1 << 2) -#define R1_SPI_COM_CRC (1 << 3) -#define R1_SPI_ERASE_SEQ (1 << 4) -#define R1_SPI_ADDRESS (1 << 5) -#define R1_SPI_PARAMETER (1 << 6) - -/* R1 bit 7 is always zero */ -#define R2_SPI_CARD_LOCKED (1 << 8) -#define R2_SPI_WP_ERASE_SKIP (1 << 9) /* or lock/unlock fail */ -#define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP -#define R2_SPI_ERROR (1 << 10) -#define R2_SPI_CC_ERROR (1 << 11) -#define R2_SPI_CARD_ECC_ERROR (1 << 12) -#define R2_SPI_WP_VIOLATION (1 << 13) -#define R2_SPI_ERASE_PARAM (1 << 14) -#define R2_SPI_OUT_OF_RANGE (1 << 15) /* or CSD overwrite */ -#define R2_SPI_CSD_OVERWRITE R2_SPI_OUT_OF_RANGE - -#define CEATA_INDENTIFY_DEVICE 0xec -#define CEATA_READ_DMA_EXT 0x25 -#define CEATA_WRITE_DMA_EXT 0x35 -#define CEATA_STANBY_IMMIDIATE 0xe0 -#define CEATA_FLUSH_CACHE_EXT 0Xea - -/* - * OCR bits are mostly in host.h - */ -#define MMC_CARD_BUSY 0x80000000 /* Card Power up status bit */ - -/* Card Command Classes (CCC) */ -#define CCC_BASIC (1<<0) /* (0) Basic protocol functions */ - /* (CMD0,1,2,3,4,7,9,10,12,13,15) */ - /* (and for SPI, CMD58,59) */ -#define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */ - /* (CMD11) */ -#define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */ - /* (CMD16,17,18) */ -#define CCC_STREAM_WRITE (1<<3) /* (3) Stream write commands */ - /* (CMD20) */ -#define CCC_BLOCK_WRITE (1<<4) /* (4) Block write commands */ - /* (CMD16,24,25,26,27) */ -#define CCC_ERASE (1<<5) /* (5) Ability to erase blocks */ - /* (CMD32,33,34,35,36,37,38,39) */ -#define CCC_WRITE_PROT (1<<6) /* (6) Able to write protect blocks */ - /* (CMD28,29,30) */ -#define CCC_LOCK_CARD (1<<7) /* (7) Able to lock down card */ - /* (CMD16,CMD42) */ -#define CCC_APP_SPEC (1<<8) /* (8) Application specific */ - /* (CMD55,56,57,ACMD*) */ -#define CCC_IO_MODE (1<<9) /* (9) I/O mode */ - /* (CMD5,39,40,52,53) */ -#define CCC_SWITCH (1<<10) /* (10) High speed switch */ - /* (CMD6,34,35,36,37,50) */ - /* (11) Reserved */ - /* (CMD?) */ - -/* CSD field definitions */ -#define MMC_CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */ -#define MMC_CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */ -#define MMC_CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */ -#define MMC_CSD_STRUCT_EXT_CSD 3 /* Version is coded in CSD_STRUCTURE in EXT_CSD */ - -#define MMC_CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */ -#define MMC_CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */ -#define MMC_CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */ -#define MMC_CSD_SPEC_VER_3 3 /* Implements system specification 3.1 - 3.2 - 3.31 */ -#define MMC_CSD_SPEC_VER_4 4 /* Implements system specification 4.0 - 4.1 */ - -/* EXT_CSD fields */ -#define MMC_EXT_CSD_BOOT_BUS_COND 177 /* R/W */ -#define MMC_EXT_CSD_PART_CONF 179 /* R/W */ -#define MMC_EXT_CSD_BUS_WIDTH 183 /* R/W */ -#define MMC_EXT_CSD_HS_TIMING 185 /* R/W */ -#define MMC_EXT_CSD_CARD_TYPE 196 /* RO */ -#define MMC_EXT_CSD_REV 192 /* RO */ -#define MMC_EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ - -/* EXT_CSD field definitions */ -#define MMC_EXT_CSD_CMD_SET_NORMAL (1<<0) -#define MMC_EXT_CSD_CMD_SET_SECURE (1<<1) -#define MMC_EXT_CSD_CMD_SET_CPSECURE (1<<2) - -#define MMC_EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */ -#define MMC_EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */ - -#define MMC_EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ -#define MMC_EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ -#define MMC_EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ -#define MMC_EXT_CSD_BUS_WIDTH_4_DDR 5 /* Card is in 4 bit mode in DDR mode */ -#define MMC_EXT_CSD_BUS_WIDTH_8_DDR 6 /* Card is in 8 bit mode in DDR mode */ - -/* MMC_SWITCH access modes */ -#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ -#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */ -#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */ -#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */ - -/* MMC_SWITCH boot modes */ -#define MMC_SWITCH_MMCPART_NOAVAILABLE (0xff) -#define MMC_SWITCH_PART_ACCESS_MASK (0x7) -#define MMC_SWITCH_PART_SUPPORT (0x1) -#define MMC_SWITCH_PART_BOOT_PART_MASK (0x7 << 3) -#define MMC_SWITCH_PART_BOOT_PART_NONE (0x0) -#define MMC_SWITCH_PART_BOOT_PART_1 (0x1) -#define MMC_SWITCH_PART_BOOT_PART_2 (0x2) -#define MMC_SWITCH_PART_BOOT_USER (0x7) -#define MMC_SWITCH_PART_BOOT_ACK_MASK (0x1 << 6) -#define MMC_SWITCH_PART_BOOT_ACK_ENB (0x1) - -/* MMC_SWITCH boot condition */ -#define MMC_SWITCH_MMCBOOT_BUS_NOAVAILABLE (0xff) -#define MMC_SWITCH_BOOT_MODE_MASK (0x3 << 3) -#define MMC_SWITCH_BOOT_SDR_NORMAL (0x0) -#define MMC_SWITCH_BOOT_SDR_HS (0x1) -#define MMC_SWITCH_BOOT_DDR (0x2) -#define MMC_SWITCH_BOOT_RST_BUS_COND_MASK (0x1 << 2) -#define MMC_SWITCH_BOOT_RST_BUS_COND (0x0) -#define MMC_SWITCH_BOOT_RETAIN_BUS_COND (0x1) -#define MMC_SWITCH_BOOT_BUS_WIDTH_MASK (0x3 << 0) -#define MMC_SWITCH_BOOT_BUS_SDRx1_DDRx4 (0x0) -#define MMC_SWITCH_BOOT_BUS_SDRx4_DDRx4 (0x1) -#define MMC_SWITCH_BOOT_BUS_SDRx8_DDRx8 (0x2) - -/* SD_SWITCH function groups */ -#define SD_SWITCH_GRP_ACCESS_MODE 0 -#define SD_SWITCH_GRP_CMD_SYSTEM 1 -#define SD_SWITCH_GRP_DRV_STRENGTH 2 -#define SD_SWITCH_GRP_CUR_LIMIT 3 - -/* SD_SWITCH access modes */ -#define SD_SWITCH_ACCESS_DEF_SDR12 0 -#define SD_SWITCH_ACCESS_HS_SDR25 1 -#define SD_SWITCH_ACCESS_SDR50 2 -#define SD_SWITCH_ACCESS_SDR104 3 -#define SD_SWITCH_ACCESS_DDR50 4 - -/* SD_SWITCH cmd system */ -#define SD_SWITCH_CMDSYS_DEF 0 -#define SD_SWITCH_CMDSYS_EC 1 -#define SD_SWITCH_CMDSYS_OTP 3 -#define SD_SWITCH_CMDSYS_ASSD 4 -#define SD_SWITCH_CMDSYS_ESD 0xc - -/* SD_SWITCH driver strength */ -#define SD_SWITCH_DRVSTR_DEF_TB 0 -#define SD_SWITCH_DRVSTR_DEF_TA 1 -#define SD_SWITCH_DRVSTR_DEF_TC 2 -#define SD_SWITCH_DRVSTR_DEF_TD 3 - -/* SD_SWITCH current limit */ -#define SD_SWITCH_CURLMT_DEF_200MA 0 -#define SD_SWITCH_CURLMT_DEF_400MA 1 -#define SD_SWITCH_CURLMT_DEF_600MA 2 -#define SD_SWITCH_CURLMT_DEF_800MA 3 - -/** - * @brief read SD card. - * @param card: - * @arg card->card handler. - * @param buf: - * @arg buf->for store readed data. - * @param sblk: - * @arg sblk->start block num. - * @param nblk: - * @arg nblk->number of blocks. - * @retval 0 if success or other if failed. - */ -extern int32_t mmc_block_read(struct mmc_card *card, uint8_t *buf, uint64_t sblk, uint32_t nblk); - -/** - * @brief write SD card. - * @param card: - * @arg card->card handler. - * @param buf: - * @arg buf->data will be write. - * @param sblk: - * @arg sblk->start block num. - * @param nblk: - * @arg nblk->number of blocks. - * @retval 0 if success or other if failed. - */ -extern int32_t mmc_block_write(struct mmc_card *card, const uint8_t *buf, uint64_t sblk, uint32_t nblk); - -/** - * @brief scan or rescan SD card. - * @param card: - * @arg card->card handler. - * @param sdc_id: - * @arg sdc_id->SDC ID which card on. - * @retval 0 if success or other if failed. - */ -extern int32_t mmc_rescan(struct mmc_card *card, uint32_t sdc_id); - -/** - * @brief deinit SD card. - * @param card: - * @arg card->card handler. - * @retval 0 if success or other if failed. - */ -extern int32_t mmc_card_deinit(struct mmc_card *card); - -/** - * @brief malloc for card_info. - * @param card_id: - * @arg card ID. - * @retval 0 if success or other if failed. - */ -extern int32_t mmc_card_create(uint8_t card_id, SDCard_InitTypeDef *param); - -/** - * @brief free for card_info. - * @param card_id: - * @arg card ID. - * @retval 0 if success or other if failed. - */ -extern int32_t mmc_card_delete(uint8_t card_id); - -/** - * @brief get pointer of mmc_card. - * @param card_id: - * @arg card ID. - * @retval pointer of mmc_card if success or NULL if failed. - */ -extern struct mmc_card* mmc_card_open(uint8_t card_id); - -/** - * @brief close mmc_card. - * @param card_id: - * @arg card ID. - * @retval 0 if success or other if failed. - */ -extern int32_t mmc_card_close(uint8_t card_id); -extern struct mmc_card_info* mmc_card_save(uint8_t card_id); -extern int32_t mmc_card_restore(struct mmc_card_info *s_card_info); - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_CHIP_SDMMC_SDMMC_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/sys/compiler.h b/src/platform/f133/include/hal/sdmmc/sys/compiler.h deleted file mode 100644 index 233d3cc0c256403f42302a904a13a955b2ad28bb..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/sys/compiler.h +++ /dev/null @@ -1,97 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _COMPILER_H_ -#define _COMPILER_H_ - -#if defined(__CC_ARM) -/* ARM Compiler */ - -#define inline __inline -//#define __inline __inline -#define __inline__ __inline - -#ifndef __always_inline -#define __always_inline __forceinline -#endif - -#ifndef __noinline -#define __noinline -#endif - -#if defined(__GNUC__) -/* ARM Compiler support GNU */ -#define __packed __attribute__((__packed__)) -#else -//#define __packed __packed -#endif -//#define __asm __asm -//#define __weak __weak - -#elif defined(__GNUC__) -/* GNU Compiler */ - -#include - -//#define inline inline -#define __inline inline -#define __inline__ inline - -#ifdef __always_inline -#undef __always_inline /* already defined in */ -#define __always_inline inline __attribute__((always_inline)) -#endif - -#ifndef __noinline -#define __noinline __attribute__((__noinline__)) -#endif - -#define __packed __attribute__((__packed__)) -#define __asm asm -#define __weak __attribute__((weak)) - -#ifdef __CONFIG_XIP_SECTION_FUNC_LEVEL -#define __xip_text __attribute__((section (".xip_text"))) -#define __xip_rodata __attribute__((section (".xip_rodata"))) -#define __nonxip_text __attribute__((section (".nonxip_text"))) -#define __nonxip_data __attribute__((section (".nonxip_data"))) -#define __nonxip_rodata __attribute__((section (".nonxip_rodata"))) -#else /* __CONFIG_XIP_SECTION_FUNC_LEVEL */ -#define __xip_text -#define __xip_rodata -#define __nonxip_text -#define __nonxip_data -#define __nonxip_rodata -#endif /* __CONFIG_XIP_SECTION_FUNC_LEVEL */ - -#else -#error "Compiler not supported." -#endif - -#endif /* _COMPILER_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/sys/defs.h b/src/platform/f133/include/hal/sdmmc/sys/defs.h deleted file mode 100644 index 10d533d05b80b980a81d7d4cb63e0507e6d400df..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/sys/defs.h +++ /dev/null @@ -1,94 +0,0 @@ -/* libc/sys/linux/sys/cdefs.h - Helper macros for K&R vs. ANSI C compat. */ - -/* Written 2000 by Werner Almesberger */ - -/*- - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Berkeley Software Design, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)cdefs.h 8.8 (Berkeley) 1/9/95 - * $FreeBSD$ - */ - -#ifndef _SYS_DEFS_H_ -#define _SYS_DEFS_H_ - -#include "types.h" -#include "compiler.h" - -#ifndef __DEQUALIFY -#define __DEQUALIFY(type, var) ((type)(uintptr_t)(const volatile void *)(var)) -#endif - -#ifndef offsetof -#define offsetof(type, field) \ - ((size_t)(uintptr_t)((const volatile void *)&((type *)0)->field)) -#endif - -#ifndef __offsetof -#define __offsetof(type, field) offsetof(type, field) -#endif - -#ifndef __containerof -#define __containerof(ptr, type, field) \ - __DEQUALIFY(type *, (const volatile char *)(ptr) - offsetof(type, field)) -#endif - -#ifndef container_of -#define container_of(ptr, type, field) __containerof(ptr, type, field) -#endif - - -/* - * Definitions for byte order, according to byte significance from low - * address to high. - */ -#ifndef _LITTLE_ENDIAN -#define _LITTLE_ENDIAN 1234 /* LSB first: i386, vax */ -#endif -#ifndef _BIG_ENDIAN -#define _BIG_ENDIAN 4321 /* MSB first: 68000, ibm, net */ -#endif - -#ifndef LITTLE_ENDIAN -#define LITTLE_ENDIAN _LITTLE_ENDIAN -#endif -#ifndef BIG_ENDIAN -#define BIG_ENDIAN _BIG_ENDIAN -#endif - -#ifndef _BYTE_ORDER -#define _BYTE_ORDER _LITTLE_ENDIAN -#endif -#ifndef BYTE_ORDER -#define BYTE_ORDER _BYTE_ORDER -#endif - -#endif /* _SYS_DEFS_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/sys/endian.h b/src/platform/f133/include/hal/sdmmc/sys/endian.h deleted file mode 100644 index 302a16e672048b6d6df6746f43e65a936d6019d1..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/sys/endian.h +++ /dev/null @@ -1,257 +0,0 @@ -/*- - * Copyright (c) 2002 Thomas Moestl - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD: releng/10.1/sys/sys/endian.h 208331 2010-05-20 06:16:13Z phk $ - */ - -#ifndef _SYS_ENDIAN_H_ -#define _SYS_ENDIAN_H_ - -#include "sunxi_hal_common.h" - -#ifndef _LITTLE_ENDIAN -#define _LITTLE_ENDIAN 1 -#endif - -#define _BYTE_ORDER _LITTLE_ENDIAN - -#ifndef __bswap32 - -#if ((defined(__GNUC__) && !defined(__CC_ARM))) - -#define __bswap16(x) ((uint16_t)__builtin_bswap16(x)) -#define __bswap32(x) ((uint32_t)__builtin_bswap32(x)) -#define __bswap64(x) ((uint64_t)__builtin_bswap64(x)) - -#else /* ((defined(__GNUC__) && !defined(__CC_ARM))) */ - -#define __bswap16(x) ((uint16_t)( \ - (((uint16_t)(x) & (uint16_t)0x00ffU) << 8) | \ - (((uint16_t)(x) & (uint16_t)0xff00U) >> 8))) - -#define __bswap32(x) ((uint32_t)( \ - (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \ - (((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \ - (((uint32_t)(x) & (uint32_t)0x00ff0000UL) >> 8) | \ - (((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24))) - -#define __bswap64(x) ((uint64_t)( \ - (((uint64_t)(x) & (uint64_t)0x00000000000000ffULL) << 56) | \ - (((uint64_t)(x) & (uint64_t)0x000000000000ff00ULL) << 40) | \ - (((uint64_t)(x) & (uint64_t)0x0000000000ff0000ULL) << 24) | \ - (((uint64_t)(x) & (uint64_t)0x00000000ff000000ULL) << 8) | \ - (((uint64_t)(x) & (uint64_t)0x000000ff00000000ULL) >> 8) | \ - (((uint64_t)(x) & (uint64_t)0x0000ff0000000000ULL) >> 24) | \ - (((uint64_t)(x) & (uint64_t)0x00ff000000000000ULL) >> 40) | \ - (((uint64_t)(x) & (uint64_t)0xff00000000000000ULL) >> 56))) - -#endif /* ((defined(__GNUC__) && !defined(__CC_ARM))) */ - -#else /* __bswap32 */ - -#undef __bswap32 -#define __bswap32(x) (uint32_t)__builtin_bswap32(x) - -#endif /* __bswap32 */ - -/* - * General byte order swapping functions. - */ -#define bswap16(x) __bswap16(x) -#define bswap32(x) __bswap32(x) -#define bswap64(x) __bswap64(x) - -/* - * Host to big endian, host to little endian, big endian to host, and little - * endian to host byte order functions as detailed in byteorder(9). - */ -#if _BYTE_ORDER == _LITTLE_ENDIAN -#define htobe16(x) bswap16((x)) -#define htobe32(x) bswap32((x)) -#define htobe64(x) bswap64((x)) -#define htole16(x) ((uint16_t)(x)) -#define htole32(x) ((uint32_t)(x)) -#define htole64(x) ((uint64_t)(x)) - -#define be16toh(x) bswap16((x)) -#define be32toh(x) bswap32((x)) -#define be64toh(x) bswap64((x)) -#define le16toh(x) ((uint16_t)(x)) -#define le32toh(x) ((uint32_t)(x)) -#define le64toh(x) ((uint64_t)(x)) -#elif (_BYTE_ORDER == _BIG_ENDIAN) -#define htobe16(x) ((uint16_t)(x)) -#define htobe32(x) ((uint32_t)(x)) -#define htobe64(x) ((uint64_t)(x)) -#define htole16(x) bswap16((x)) -#define htole32(x) bswap32((x)) -#define htole64(x) bswap64((x)) - -#define be16toh(x) ((uint16_t)(x)) -#define be32toh(x) ((uint32_t)(x)) -#define be64toh(x) ((uint64_t)(x)) -#define le16toh(x) bswap16((x)) -#define le32toh(x) bswap32((x)) -#define le64toh(x) bswap64((x)) -#else -#error "Endian not defined!" -#endif /* _BYTE_ORDER == _LITTLE_ENDIAN */ - -#define __cpu_to_le64(x) htole64(x) -#define __le64_to_cpu(x) le64toh(x) -#define __cpu_to_le32(x) htole32(x) -#define __le32_to_cpu(x) le32toh(x) -#define __cpu_to_le16(x) htole16(x) -#define __le16_to_cpu(x) le16toh(x) -#define __cpu_to_be64(x) htobe64(x) -#define __be64_to_cpu(x) be64toh(x) -#define __cpu_to_be32(x) htobe32(x) -#define __be32_to_cpu(x) be32toh(x) -#define __cpu_to_be16(x) htobe16(x) -#define __be16_to_cpu(x) be16toh(x) - -#define cpu_to_le64 __cpu_to_le64 -#define le64_to_cpu __le64_to_cpu -#define cpu_to_le32 __cpu_to_le32 -#define le32_to_cpu __le32_to_cpu -#define cpu_to_le16 __cpu_to_le16 -#define le16_to_cpu __le16_to_cpu -#define cpu_to_be64 __cpu_to_be64 -#define be64_to_cpu __be64_to_cpu -#define cpu_to_be32 __cpu_to_be32 -#define be32_to_cpu __be32_to_cpu -#define cpu_to_be16 __cpu_to_be16 -#define be16_to_cpu __be16_to_cpu - - -/* Alignment-agnostic encode/decode bytestream to/from little/big endian. */ - -static __inline uint16_t -be16dec(const void *pp) -{ - uint8_t const *p = (uint8_t const *)pp; - - return ((p[0] << 8) | p[1]); -} - -static __inline uint32_t -be32dec(const void *pp) -{ - uint8_t const *p = (uint8_t const *)pp; - - return (((unsigned)p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3]); -} - -static __inline uint64_t -be64dec(const void *pp) -{ - uint8_t const *p = (uint8_t const *)pp; - - return (((uint64_t)be32dec(p) << 32) | be32dec(p + 4)); -} - -static __inline uint16_t -le16dec(const void *pp) -{ - uint8_t const *p = (uint8_t const *)pp; - - return ((p[1] << 8) | p[0]); -} - -static __inline uint32_t -le32dec(const void *pp) -{ - uint8_t const *p = (uint8_t const *)pp; - - return (((unsigned)p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]); -} - -static __inline uint64_t -le64dec(const void *pp) -{ - uint8_t const *p = (uint8_t const *)pp; - - return (((uint64_t)le32dec(p + 4) << 32) | le32dec(p)); -} - -static __inline void -be16enc(void *pp, uint16_t u) -{ - uint8_t *p = (uint8_t *)pp; - - p[0] = (u >> 8) & 0xff; - p[1] = u & 0xff; -} - -static __inline void -be32enc(void *pp, uint32_t u) -{ - uint8_t *p = (uint8_t *)pp; - - p[0] = (u >> 24) & 0xff; - p[1] = (u >> 16) & 0xff; - p[2] = (u >> 8) & 0xff; - p[3] = u & 0xff; -} - -static __inline void -be64enc(void *pp, uint64_t u) -{ - uint8_t *p = (uint8_t *)pp; - - be32enc(p, (uint32_t)(u >> 32)); - be32enc(p + 4, (uint32_t)(u & 0xffffffffU)); -} - -static __inline void -le16enc(void *pp, uint16_t u) -{ - uint8_t *p = (uint8_t *)pp; - - p[0] = u & 0xff; - p[1] = (u >> 8) & 0xff; -} - -static __inline void -le32enc(void *pp, uint32_t u) -{ - uint8_t *p = (uint8_t *)pp; - - p[0] = u & 0xff; - p[1] = (u >> 8) & 0xff; - p[2] = (u >> 16) & 0xff; - p[3] = (u >> 24) & 0xff; -} - -static __inline void -le64enc(void *pp, uint64_t u) -{ - uint8_t *p = (uint8_t *)pp; - - le32enc(p, (uint32_t)(u & 0xffffffffU)); - le32enc(p + 4, (uint32_t)(u >> 32)); -} - -#endif /* _SYS_ENDIAN_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/sys/interrupt.h b/src/platform/f133/include/hal/sdmmc/sys/interrupt.h deleted file mode 100644 index aa8082c2892817b7008d9f23aa29a48e2d5fb4ef..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/sys/interrupt.h +++ /dev/null @@ -1,185 +0,0 @@ -/* - * Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _SYS_INTERRUPT_H_ -#define _SYS_INTERRUPT_H_ - -#include "compiler.h" - -#if defined(__CC_ARM) -/* ARM Compiler */ - -/* - * CPU interrupt mask handling. - */ -#define IRQMASK_REG_NAME_R primask -#define IRQMASK_REG_NAME_W primask - -/* - * Save the current interrupt enable state & disable IRQs - */ -static __always_inline unsigned long arch_irq_save(void) -{ - unsigned long flags; - - __asm { - mrs flags, IRQMASK_REG_NAME_R - cpsid i - } - return flags; -} - -/* - * restore saved IRQ state - */ -static __always_inline void arch_irq_restore(unsigned long flags) -{ - __asm { msr IRQMASK_REG_NAME_W, flags } -} - -/* - * Enable IRQs - */ -#define arch_irq_enable() __enable_irq() - -/* - * Disable IRQs - */ -#define arch_irq_disable() __disable_irq() - -/* - * Enable FIQs - */ -#define arch_fiq_enable() __enable_fiq() - -/* - * Disable FIQs - */ -#define arch_fiq_disable() __disable_fiq() - -#elif defined(__GNUC__) -/* GNU Compiler */ - -#ifdef __CONFIG_OS_RTTHREAD - -/* - * Save the current interrupt enable state & disable IRQs - */ -#define arch_irq_save(void) rt_hw_interrupt_disable() - -/* - * restore saved IRQ state - */ -#define arch_irq_restore(flags) rt_hw_interrupt_enable(flags) - -/* - * Enable IRQs - */ -#define arch_irq_enable() rt_hw_interrupt_enable(__irq_level) - -/* - * Disable IRQs - */ -#define arch_irq_disable() rt_base_t __irq_level = rt_hw_interrupt_disable() - -#else /* __CONFIG_OS_RTTHREAD */ - -/* - * CPU interrupt mask handling. - */ -#define IRQMASK_REG_NAME_R "primask" -#define IRQMASK_REG_NAME_W "primask" - -/* - * Save the current interrupt enable state & disable IRQs - */ -static __always_inline unsigned long arch_irq_save(void) -{ - unsigned long flags; - - __asm volatile( - "mrs %0, " IRQMASK_REG_NAME_R "\n" - "cpsid i" - : "=r" (flags) : : "memory", "cc"); - return flags; -} - -/* - * restore saved IRQ state - */ -static __always_inline void arch_irq_restore(unsigned long flags) -{ - __asm volatile( - "msr " IRQMASK_REG_NAME_W ", %0" - : - : "r" (flags) - : "memory", "cc"); -} - -/* - * Save the current interrupt enable state. - */ -static __always_inline unsigned long arch_irq_get_flags(void) -{ - unsigned long flags; - - __asm volatile( - "mrs %0, " IRQMASK_REG_NAME_R "\n" - : "=r" (flags) : : "memory", "cc"); - return flags; - -} - -/* - * Enable IRQs - */ -#define arch_irq_enable() __asm volatile("cpsie i" : : : "memory", "cc") - -/* - * Disable IRQs - */ -#define arch_irq_disable() __asm volatile("cpsid i" : : : "memory", "cc") - -/* - * Enable FIQs - */ -#define arch_fiq_enable() __asm volatile("cpsie f" : : : "memory", "cc") - -/* - * Disable FIQs - */ -#define arch_fiq_disable() __asm volatile("cpsid f" : : : "memory", "cc") - -#endif /* __CONFIG_OS_RTTHREAD */ - -#else -#error "Compiler not supported." -#endif - -#endif /* _SYS_INTERRUPT_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/sys/list.h b/src/platform/f133/include/hal/sdmmc/sys/list.h deleted file mode 100644 index 1bc6f0311b9e5853e8129dd20cabbda841908bab..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/sys/list.h +++ /dev/null @@ -1,584 +0,0 @@ -#ifndef _SYS_LIST_H -#define _SYS_LIST_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include "compiler.h" - -/* - * Simple doubly linked list implementation. - * - * Some of the internal functions ("__xxx") are useful when - * manipulating whole lists rather than single entries, as - * sometimes we already know the next/prev entries and we can - * generate better code by using them directly rather than - * using the generic single-entry routines. - */ - -struct list_head { - struct list_head *next, *prev; -}; - -#define LIST_HEAD_INIT(name) { &(name), &(name) } - -#define LIST_HEAD_DEF(name) \ - struct list_head name = LIST_HEAD_INIT(name) - -static __always_inline void INIT_LIST_HEAD(struct list_head *list) -{ - list->next = list; - list->prev = list; -} - -/* - * Insert a new entry between two known consecutive entries. - * - * This is only for internal list manipulation where we know - * the prev/next entries already! - */ -static __always_inline void __list_add(struct list_head *newl, - struct list_head *prev, - struct list_head *next) -{ - next->prev = newl; - newl->next = next; - newl->prev = prev; - prev->next = newl; -} - -/** - * list_add - add a new entry - * @new: new entry to be added - * @head: list head to add it after - * - * Insert a new entry after the specified head. - * This is good for implementing stacks. - */ -static __always_inline void list_add(struct list_head *newl, struct list_head *head) -{ - __list_add(newl, head, head->next); -} - - -/** - * list_add_tail - add a new entry - * @new: new entry to be added - * @head: list head to add it before - * - * Insert a new entry before the specified head. - * This is useful for implementing queues. - */ -static __always_inline void list_add_tail(struct list_head *newl, struct list_head *head) -{ - __list_add(newl, head->prev, head); -} - -/* - * Delete a list entry by making the prev/next entries - * point to each other. - * - * This is only for internal list manipulation where we know - * the prev/next entries already! - */ -static __always_inline void __list_del(struct list_head * prev, struct list_head * next) -{ - next->prev = prev; - prev->next = next; -} - -/** - * list_del - deletes entry from list. - * @entry: the element to delete from the list. - * Note: list_empty() on entry does not return true after this, the entry is - * in an undefined state. - */ -static __always_inline void __list_del_entry(struct list_head *entry) -{ - __list_del(entry->prev, entry->next); -} - -static __always_inline void list_del(struct list_head *entry) -{ - __list_del(entry->prev, entry->next); - entry->next = entry; - entry->prev = entry; -} - -/** - * list_replace - replace old entry by new one - * @old : the element to be replaced - * @new : the new element to insert - * - * If @old was empty, it will be overwritten. - */ -static __always_inline void list_replace(struct list_head *old, struct list_head *newl) -{ - newl->next = old->next; - newl->next->prev = newl; - newl->prev = old->prev; - newl->prev->next = newl; -} - -static __always_inline void list_replace_init(struct list_head *old, - struct list_head *newl) -{ - list_replace(old, newl); - INIT_LIST_HEAD(old); -} - -/** - * list_del_init - deletes entry from list and reinitialize it. - * @entry: the element to delete from the list. - */ -static __always_inline void list_del_init(struct list_head *entry) -{ - __list_del_entry(entry); - INIT_LIST_HEAD(entry); -} - -/** - * list_move - delete from one list and add as another's head - * @list: the entry to move - * @head: the head that will precede our entry - */ -static __always_inline void list_move(struct list_head *list, struct list_head *head) -{ - __list_del_entry(list); - list_add(list, head); -} - -/** - * list_move_tail - delete from one list and add as another's tail - * @list: the entry to move - * @head: the head that will follow our entry - */ -static __always_inline void list_move_tail(struct list_head *list, - struct list_head *head) -{ - __list_del_entry(list); - list_add_tail(list, head); -} - -/** - * list_is_last - tests whether @list is the last entry in list @head - * @list: the entry to test - * @head: the head of the list - */ -static __always_inline int list_is_last(const struct list_head *list, - const struct list_head *head) -{ - return list->next == head; -} - -/** - * list_empty - tests whether a list is empty - * @head: the list to test. - */ -static __always_inline int list_empty(const struct list_head *head) -{ - return head->next == head; -} - -/** - * list_empty_careful - tests whether a list is empty and not being modified - * @head: the list to test - * - * Description: - * tests whether a list is empty _and_ checks that no other CPU might be - * in the process of modifying either member (next or prev) - * - * NOTE: using list_empty_careful() without synchronization - * can only be safe if the only activity that can happen - * to the list entry is list_del_init(). Eg. it cannot be used - * if another CPU could re-list_add() it. - */ -static __always_inline int list_empty_careful(const struct list_head *head) -{ - struct list_head *next = head->next; - return (next == head) && (next == head->prev); -} - -/** - * list_rotate_left - rotate the list to the left - * @head: the head of the list - */ -static __always_inline void list_rotate_left(struct list_head *head) -{ - struct list_head *first; - - if (!list_empty(head)) { - first = head->next; - list_move_tail(first, head); - } -} - -/** - * list_is_singular - tests whether a list has just one entry. - * @head: the list to test. - */ -static __always_inline int list_is_singular(const struct list_head *head) -{ - return !list_empty(head) && (head->next == head->prev); -} - -static __always_inline void __list_cut_position(struct list_head *list, - struct list_head *head, struct list_head *entry) -{ - struct list_head *new_first = entry->next; - list->next = head->next; - list->next->prev = list; - list->prev = entry; - entry->next = list; - head->next = new_first; - new_first->prev = head; -} - -/** - * list_cut_position - cut a list into two - * @list: a new list to add all removed entries - * @head: a list with entries - * @entry: an entry within head, could be the head itself - * and if so we won't cut the list - * - * This helper moves the initial part of @head, up to and - * including @entry, from @head to @list. You should - * pass on @entry an element you know is on @head. @list - * should be an empty list or a list you do not care about - * losing its data. - * - */ -static __always_inline void list_cut_position(struct list_head *list, - struct list_head *head, struct list_head *entry) -{ - if (list_empty(head)) - return; - if (list_is_singular(head) && - (head->next != entry && head != entry)) - return; - if (entry == head) - INIT_LIST_HEAD(list); - else - __list_cut_position(list, head, entry); -} - -static __always_inline void __list_splice(const struct list_head *list, - struct list_head *prev, - struct list_head *next) -{ - struct list_head *first = list->next; - struct list_head *last = list->prev; - - first->prev = prev; - prev->next = first; - - last->next = next; - next->prev = last; -} - -/** - * list_splice - join two lists, this is designed for stacks - * @list: the new list to add. - * @head: the place to add it in the first list. - */ -static __always_inline void list_splice(const struct list_head *list, - struct list_head *head) -{ - if (!list_empty(list)) - __list_splice(list, head, head->next); -} - -/** - * list_splice_tail - join two lists, each list being a queue - * @list: the new list to add. - * @head: the place to add it in the first list. - */ -static __always_inline void list_splice_tail(struct list_head *list, - struct list_head *head) -{ - if (!list_empty(list)) - __list_splice(list, head->prev, head); -} - -/** - * list_splice_init - join two lists and reinitialise the emptied list. - * @list: the new list to add. - * @head: the place to add it in the first list. - * - * The list at @list is reinitialised - */ -static __always_inline void list_splice_init(struct list_head *list, - struct list_head *head) -{ - if (!list_empty(list)) { - __list_splice(list, head, head->next); - INIT_LIST_HEAD(list); - } -} - -/** - * list_splice_tail_init - join two lists and reinitialise the emptied list - * @list: the new list to add. - * @head: the place to add it in the first list. - * - * Each of the lists is a queue. - * The list at @list is reinitialised - */ -static __always_inline void list_splice_tail_init(struct list_head *list, - struct list_head *head) -{ - if (!list_empty(list)) { - __list_splice(list, head->prev, head); - INIT_LIST_HEAD(list); - } -} - -/** - * list_entry - get the struct for this entry - * @ptr: the &struct list_head pointer. - * @type: the type of the struct this is embedded in. - * @member: the name of the list_head within the struct. - */ -#define list_entry(ptr, type, member) \ - container_of(ptr, type, member) - -/** - * list_first_entry - get the first element from a list - * @ptr: the list head to take the element from. - * @type: the type of the struct this is embedded in. - * @member: the name of the list_head within the struct. - * - * Note, that list is expected to be not empty. - */ -#define list_first_entry(ptr, type, member) \ - list_entry((ptr)->next, type, member) - -/** - * list_last_entry - get the last element from a list - * @ptr: the list head to take the element from. - * @type: the type of the struct this is embedded in. - * @member: the name of the list_head within the struct. - * - * Note, that list is expected to be not empty. - */ -#define list_last_entry(ptr, type, member) \ - list_entry((ptr)->prev, type, member) - -/** - * list_first_entry_or_null - get the first element from a list - * @ptr: the list head to take the element from. - * @type: the type of the struct this is embedded in. - * @member: the name of the list_head within the struct. - * - * Note that if the list is empty, it returns NULL. - */ -#define list_first_entry_or_null(ptr, type, member) \ - (!list_empty(ptr) ? list_first_entry(ptr, type, member) : NULL) - -/** - * list_next_entry - get the next element in list - * @pos: the type * to cursor - * @member: the name of the list_head within the struct. - */ -#define list_next_entry(pos, member) \ - list_entry((pos)->member.next, typeof(*(pos)), member) - -/** - * list_prev_entry - get the prev element in list - * @pos: the type * to cursor - * @member: the name of the list_head within the struct. - */ -#define list_prev_entry(pos, member) \ - list_entry((pos)->member.prev, typeof(*(pos)), member) - -/** - * list_for_each - iterate over a list - * @pos: the &struct list_head to use as a loop cursor. - * @head: the head for your list. - */ -#define list_for_each(pos, head) \ - for (pos = (head)->next; pos != (head); pos = pos->next) - -/** - * list_for_each_prev - iterate over a list backwards - * @pos: the &struct list_head to use as a loop cursor. - * @head: the head for your list. - */ -#define list_for_each_prev(pos, head) \ - for (pos = (head)->prev; pos != (head); pos = pos->prev) - -/** - * list_for_each_safe - iterate over a list safe against removal of list entry - * @pos: the &struct list_head to use as a loop cursor. - * @n: another &struct list_head to use as temporary storage - * @head: the head for your list. - */ -#define list_for_each_safe(pos, n, head) \ - for (pos = (head)->next, n = pos->next; pos != (head); \ - pos = n, n = pos->next) - -/** - * list_for_each_prev_safe - iterate over a list backwards safe against removal of list entry - * @pos: the &struct list_head to use as a loop cursor. - * @n: another &struct list_head to use as temporary storage - * @head: the head for your list. - */ -#define list_for_each_prev_safe(pos, n, head) \ - for (pos = (head)->prev, n = pos->prev; \ - pos != (head); \ - pos = n, n = pos->prev) - -/** - * list_for_each_entry - iterate over list of given type - * @pos: the type * to use as a loop cursor. - * @head: the head for your list. - * @member: the name of the list_head within the struct. - */ -#define list_for_each_entry(pos, head, member) \ - for (pos = list_first_entry(head, typeof(*pos), member); \ - &pos->member != (head); \ - pos = list_next_entry(pos, member)) - -/** - * list_for_each_entry_reverse - iterate backwards over list of given type. - * @pos: the type * to use as a loop cursor. - * @head: the head for your list. - * @member: the name of the list_head within the struct. - */ -#define list_for_each_entry_reverse(pos, head, member) \ - for (pos = list_last_entry(head, typeof(*pos), member); \ - &pos->member != (head); \ - pos = list_prev_entry(pos, member)) - -/** - * list_prepare_entry - prepare a pos entry for use in list_for_each_entry_continue() - * @pos: the type * to use as a start point - * @head: the head of the list - * @member: the name of the list_head within the struct. - * - * Prepares a pos entry for use as a start point in list_for_each_entry_continue(). - */ -#define list_prepare_entry(pos, head, member) \ - ((pos) ? : list_entry(head, typeof(*pos), member)) - -/** - * list_for_each_entry_continue - continue iteration over list of given type - * @pos: the type * to use as a loop cursor. - * @head: the head for your list. - * @member: the name of the list_head within the struct. - * - * Continue to iterate over list of given type, continuing after - * the current position. - */ -#define list_for_each_entry_continue(pos, head, member) \ - for (pos = list_next_entry(pos, member); \ - &pos->member != (head); \ - pos = list_next_entry(pos, member)) - -/** - * list_for_each_entry_continue_reverse - iterate backwards from the given point - * @pos: the type * to use as a loop cursor. - * @head: the head for your list. - * @member: the name of the list_head within the struct. - * - * Start to iterate over list of given type backwards, continuing after - * the current position. - */ -#define list_for_each_entry_continue_reverse(pos, head, member) \ - for (pos = list_prev_entry(pos, member); \ - &pos->member != (head); \ - pos = list_prev_entry(pos, member)) - -/** - * list_for_each_entry_from - iterate over list of given type from the current point - * @pos: the type * to use as a loop cursor. - * @head: the head for your list. - * @member: the name of the list_head within the struct. - * - * Iterate over list of given type, continuing from current position. - */ -#define list_for_each_entry_from(pos, head, member) \ - for (; &pos->member != (head); \ - pos = list_next_entry(pos, member)) - -/** - * list_for_each_entry_safe - iterate over list of given type safe against removal of list entry - * @pos: the type * to use as a loop cursor. - * @n: another type * to use as temporary storage - * @head: the head for your list. - * @member: the name of the list_head within the struct. - */ -#define list_for_each_entry_safe(pos, n, head, member) \ - for (pos = list_first_entry(head, typeof(*pos), member), \ - n = list_next_entry(pos, member); \ - &pos->member != (head); \ - pos = n, n = list_next_entry(n, member)) - -/** - * list_for_each_entry_safe_continue - continue list iteration safe against removal - * @pos: the type * to use as a loop cursor. - * @n: another type * to use as temporary storage - * @head: the head for your list. - * @member: the name of the list_head within the struct. - * - * Iterate over list of given type, continuing after current point, - * safe against removal of list entry. - */ -#define list_for_each_entry_safe_continue(pos, n, head, member) \ - for (pos = list_next_entry(pos, member), \ - n = list_next_entry(pos, member); \ - &pos->member != (head); \ - pos = n, n = list_next_entry(n, member)) - -/** - * list_for_each_entry_safe_from - iterate over list from current point safe against removal - * @pos: the type * to use as a loop cursor. - * @n: another type * to use as temporary storage - * @head: the head for your list. - * @member: the name of the list_head within the struct. - * - * Iterate over list of given type from current point, safe against - * removal of list entry. - */ -#define list_for_each_entry_safe_from(pos, n, head, member) \ - for (n = list_next_entry(pos, member); \ - &pos->member != (head); \ - pos = n, n = list_next_entry(n, member)) - -/** - * list_for_each_entry_safe_reverse - iterate backwards over list safe against removal - * @pos: the type * to use as a loop cursor. - * @n: another type * to use as temporary storage - * @head: the head for your list. - * @member: the name of the list_head within the struct. - * - * Iterate backwards over list of given type, safe against removal - * of list entry. - */ -#define list_for_each_entry_safe_reverse(pos, n, head, member) \ - for (pos = list_last_entry(head, typeof(*pos), member), \ - n = list_prev_entry(pos, member); \ - &pos->member != (head); \ - pos = n, n = list_prev_entry(n, member)) - -/** - * list_safe_reset_next - reset a stale list_for_each_entry_safe loop - * @pos: the loop cursor used in the list_for_each_entry_safe loop - * @n: temporary storage used in list_for_each_entry_safe - * @member: the name of the list_head within the struct. - * - * list_safe_reset_next is not safe to use in general if the list may be - * modified concurrently (eg. the lock is dropped in the loop body). An - * exception to this is if the cursor element (pos) is pinned in the list, - * and list_safe_reset_next is called after re-taking the lock and before - * completing the current iteration of the loop body. - */ -#define list_safe_reset_next(pos, n, member) \ - n = list_next_entry(pos, member) - -#ifdef __cplusplus -} -#endif - -#endif /* _SYS_LIST_H */ diff --git a/src/platform/f133/include/hal/sdmmc/sys/mbuf.h b/src/platform/f133/include/hal/sdmmc/sys/mbuf.h deleted file mode 100644 index 1c292a4eb9ae218d7376630910d9f7ed5eab51e7..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/sys/mbuf.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _SYS_MBUF_H_ -#define _SYS_MBUF_H_ - -#if (__CONFIG_MBUF_IMPL_MODE == 0) -#include "sys/mbuf_0.h" -#elif (__CONFIG_MBUF_IMPL_MODE == 1) -#include "sys/mbuf_1.h" -#else -#error "Invalid __CONFIG_MBUF_IMPL_MODE!" -#endif - -#endif /* !_SYS_MBUF_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/sys/mbuf_0.h b/src/platform/f133/include/hal/sdmmc/sys/mbuf_0.h deleted file mode 100644 index 0b93f49497671be8626d299a572c201502f7738d..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/sys/mbuf_0.h +++ /dev/null @@ -1,354 +0,0 @@ -/*- - * Copyright (c) 1982, 1986, 1988, 1993 - * The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)mbuf.h 8.5 (Berkeley) 2/19/95 - * $FreeBSD: releng/10.1/sys/sys/mbuf.h 269047 2014-07-24 06:03:45Z kevlo $ - */ - -#ifndef _SYS_MBUF_0_H_ -#define _SYS_MBUF_0_H_ - -#if (__CONFIG_MBUF_IMPL_MODE == 0) - -#include -#ifdef __CONFIG_ARCH_DUAL_CORE -#include "sys/ducc/ducc_addr.h" -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * Callback structure - */ -struct m_cb { - void *func; - void *arg; -}; - -/* - * Record/packet header in first mbuf of chain; always valid and M_PKTHDR is set. - * Size : 24 - */ -struct pkthdr { - void *rcvif; /* rcv interface */ - int32_t len; /* total packet length */ - - union { - uint8_t eigth[8]; - uint16_t sixteen[4]; - uint32_t thirtytwo[2]; - uint64_t sixtyfour[1]; - uintptr_t unintptr[1]; - void *ptr; - } PH_per; - - struct m_cb cb; -}; - -struct ext_info { - uint8_t eigth[32]; -}; - -#define ether_vtag PH_per.sixteen[0] -#define PH_vt PH_per -#define vt_nrecs sixteen[0] -#define tso_segsz PH_per.sixteen[1] -#define csum_phsum PH_per.sixteen[2] -#define csum_data PH_per.thirtytwo[1] - -/* - * The core of the mbuf object along with some shortcut defines for practical - * purposes. - */ -struct mbuf { // Size : 48 + 32 = 80 - /* - * Header present at the beginning of every mbuf. - * Size : 24 - */ - uint8_t *m_buf; /* a continuous buffer */ // useless now - struct mbuf *m_nextpkt; /* next chain in queue/record */ - uint8_t *m_data; /* location of data */ - int32_t m_len; /* amount of data in this mbuf */ - uint16_t m_headspace; /* empty space available at the head */ - uint16_t m_tailspace; /* empty space available at the tail */ - uint32_t m_type :8, /* type of data in this mbuf */ // use as flag - m_flags :24; /* flags; see below */ - /*** End of the mbuf header ***/ - - struct pkthdr m_pkthdr; /* M_PKTHDR always set */ - struct ext_info m_ext_info; /* extend info */ -}; - -#if (defined(__CONFIG_ARCH_NET_CORE) || !defined(__CONFIG_ARCH_DUAL_CORE)) - -#define MBUF_HEAD_SPACE 68 /* reserved head space in mbuf::m_buf, align to 4 */ -#define MBUF_TAIL_SPACE 16 /* reserved tail space in mbuf::m_buf, align to 4 */ - -/* - * mbuf flags of global significance and layer crossing. - * Those of only protocol/layer specific significance are to be mapped - * to M_PROTO[1-12] and cleared at layer handoff boundaries. - * NB: Limited to the lower 24 bits. - */ -#define M_EXT 0x00000001 /* has associated external storage */ -#define M_PKTHDR 0x00000002 /* start of record */ // always set -#define M_EOR 0x00000004 /* end of record */ -#define M_RDONLY 0x00000008 /* associated data is marked read-only */ -#define M_BCAST 0x00000010 /* send/received as link-level broadcast */ -#define M_MCAST 0x00000020 /* send/received as link-level multicast */ -#define M_PROMISC 0x00000040 /* packet was not for us */ -#define M_VLANTAG 0x00000080 /* ether_vtag is valid */ -#define M_FLOWID 0x00000100 /* deprecated: flowid is valid */ -#define M_NOFREE 0x00000200 /* do not free mbuf, embedded in cluster */ - -#define M_PROTO1 0x00001000 /* protocol-specific */ -#define M_PROTO2 0x00002000 /* protocol-specific */ -#define M_PROTO3 0x00004000 /* protocol-specific */ -#define M_PROTO4 0x00008000 /* protocol-specific */ -#define M_PROTO5 0x00010000 /* protocol-specific */ -#define M_PROTO6 0x00020000 /* protocol-specific */ -#define M_PROTO7 0x00040000 /* protocol-specific */ -#define M_PROTO8 0x00080000 /* protocol-specific */ -#define M_PROTO9 0x00100000 /* protocol-specific */ -#define M_PROTO10 0x00200000 /* protocol-specific */ -#define M_PROTO11 0x00400000 /* protocol-specific */ -#define M_PROTO12 0x00800000 /* protocol-specific */ - -/* - * Flags to purge when crossing layers. - */ -#define M_PROTOFLAGS \ - (M_PROTO1|M_PROTO2|M_PROTO3|M_PROTO4|M_PROTO5|M_PROTO6|M_PROTO7|M_PROTO8|\ - M_PROTO9|M_PROTO10|M_PROTO11|M_PROTO12) - -/* - * Flags preserved when copying m_pkthdr. - */ -#define M_COPYFLAGS \ - (M_PKTHDR|M_EOR|M_RDONLY|M_BCAST|M_MCAST|M_VLANTAG|M_PROMISC| \ - M_PROTOFLAGS) - -/* - * Mbuf flag description for use with printf(9) %b identifier. - */ -#define M_FLAG_BITS \ - "\20\1M_EXT\2M_PKTHDR\3M_EOR\4M_RDONLY\5M_BCAST\6M_MCAST" \ - "\7M_PROMISC\10M_VLANTAG\11M_FLOWID" -#define M_FLAG_PROTOBITS \ - "\15M_PROTO1\16M_PROTO2\17M_PROTO3\20M_PROTO4\21M_PROTO5" \ - "\22M_PROTO6\23M_PROTO7\24M_PROTO8\25M_PROTO9\26M_PROTO10" \ - "\27M_PROTO11\30M_PROTO12" -#define M_FLAG_PRINTF (M_FLAG_BITS M_FLAG_PROTOBITS) - - -/* - * mbuf types describing the content of the mbuf (including external storage). - */ -#define MT_NOTMBUF 0 /* USED INTERNALLY ONLY! Object is not mbuf */ -#define MT_DATA 1 /* dynamic (data) allocation */ -#define MT_HEADER MT_DATA /* packet header, use M_PKTHDR instead */ - -#define MT_VENDOR1 4 /* for vendor-internal use */ -#define MT_VENDOR2 5 /* for vendor-internal use */ -#define MT_VENDOR3 6 /* for vendor-internal use */ -#define MT_VENDOR4 7 /* for vendor-internal use */ - -#define MT_SONAME 8 /* socket name */ - -#define MT_EXP1 9 /* for experimental use */ -#define MT_EXP2 10 /* for experimental use */ -#define MT_EXP3 11 /* for experimental use */ -#define MT_EXP4 12 /* for experimental use */ - -#define MT_CONTROL 14 /* extra-data protocol message */ -#define MT_OOBDATA 15 /* expedited data */ -#define MT_NTYPES 16 /* number of mbuf types for mbtypes[] */ - -#define MT_NOINIT 255 /* Not a type but a flag to allocate - a non-initialized mbuf */ - -#endif /* (defined(__CONFIG_ARCH_NET_CORE) || !defined(__CONFIG_ARCH_DUAL_CORE)) */ - -#ifdef __CONFIG_ARCH_DUAL_CORE -/* - * NB: mbuf is allocated from net core, pointer conversion MUST be done when - * transfer mbuf from app core to net core, or vice versa. - */ - -#ifdef __CONFIG_ARCH_NET_CORE -/* convert mbuf's pointers in net core, the new mbuf is used by net core */ -#define MBUF_APP2NET(m) \ - do { \ - (m) = (struct mbuf *)DUCC_NETMEM_APP2NET(m); \ - (m)->m_data = (uint8_t *)DUCC_NETMEM_APP2NET((m)->m_data); \ - } while (0) - -/* convert mbuf's pointers in net core, the new mbuf is used by app core */ -#define MBUF_NET2APP(m) \ - do { \ - (m)->m_data = (uint8_t *)DUCC_NETMEM_NET2APP((m)->m_data); \ - (m) = (struct mbuf *)DUCC_NETMEM_NET2APP(m); \ - } while (0) -#endif /* __CONFIG_ARCH_NET_CORE */ - -#ifdef __CONFIG_ARCH_APP_CORE -/* convert mbuf's pointers in app core, the new mbuf is used by net core */ -#define MBUF_APP2NET(m) \ - do { \ - (m)->m_data = (uint8_t *)DUCC_NETMEM_APP2NET((m)->m_data); \ - (m) = (struct mbuf *)DUCC_NETMEM_APP2NET(m); \ - } while (0) - -/* convert mbuf's pointers in app core, the new mbuf is used by app core */ -#define MBUF_NET2APP(m) \ - do { \ - (m) = (struct mbuf *)DUCC_NETMEM_NET2APP(m); \ - (m)->m_data = (uint8_t *)DUCC_NETMEM_NET2APP((m)->m_data); \ - } while (0) -#endif /* __CONFIG_ARCH_APP_CORE */ - -#endif /* __CONFIG_ARCH_DUAL_CORE */ - -#if (defined(__CONFIG_ARCH_NET_CORE) || !defined(__CONFIG_ARCH_DUAL_CORE)) - -struct mbuf *mb_get(int len, int tx); -void mb_free(struct mbuf *m); -int mb_adj(struct mbuf *m, int req_len); -int mb_copydata(const struct mbuf *m, int off, int len, uint8_t *cp); -struct mbuf *mb_dup(struct mbuf *m); -struct mbuf *mb_pullup(struct mbuf *m, int len); // NOT really support! -struct mbuf *mb_split(struct mbuf *m0, int len0); -int mb_append(struct mbuf *m, int len, const uint8_t *cp); -int mb_reserve(struct mbuf *m, int len, uint16_t headspace, uint16_t tailspace); - -#define m_freem(m) mb_free(m) -#define m_adj(m, l) mb_adj(m, l) -#define m_copydata(m, o, l, p) mb_copydata(m, o, l, p) -#define m_dup(m, h) mb_dup(m) -#define m_pullup(m, l) mb_pullup(m, l) -#define m_split(m, l, w) mb_split(m, l) -#define m_append(m, l, c) mb_append(m, l, c) - -#endif /* (defined(__CONFIG_ARCH_NET_CORE) || !defined(__CONFIG_ARCH_DUAL_CORE)) */ - -/* - * Macro for type conversion: convert mbuf pointer to data pointer of correct - * type: - * - * mtod(m, t) -- Convert mbuf pointer to data pointer of correct type. - */ -#define mtod(m, t) ((t)((m)->m_data)) - -#if (defined(__CONFIG_ARCH_NET_CORE) || !defined(__CONFIG_ARCH_DUAL_CORE)) - -/* - * Compute the amount of space available before the current start of data in - * an mbuf. - */ -#define M_LEADINGSPACE(m) ((m)->m_headspace) - -/* - * Compute the amount of space available after the end of data in an mbuf. - */ -#define M_TRAILINGSPACE(m) ((m)->m_tailspace) - - -/* - * Arrange to prepend space of size plen to mbuf m. If a new mbuf must be - * allocated, how specifies whether to wait. If the allocation fails, the - * original mbuf chain is freed and m is set to NULL. - */ -#define MB_PREPEND(m, plen) \ - do { \ - int _plen = (plen); \ - if (_plen >= 0 && M_LEADINGSPACE(m) >= _plen) { \ - (m)->m_headspace -= (_plen); \ - (m)->m_data -= (_plen); \ - (m)->m_len += (_plen); \ - (m)->m_pkthdr.len += (_plen); \ - } else { \ - mb_free(m); \ - (m) = NULL; \ - } \ - } while (0) - -#define M_PREPEND(m, plen, how) MB_PREPEND(m, plen) - -static __inline void m_clrprotoflags(struct mbuf *m) -{ - m->m_flags &= ~M_PROTOFLAGS; -} - -/* option of limiting memory usage */ -#define MBUF_OPT_LIMIT_MEM 1 - -#if MBUF_OPT_LIMIT_MEM -/* - * Flags for @param tx in mb_get(), which also saved in struct mbuf::m_type - * - MBUF_GET_FLAG_LIMIT_TX: memory usage limit by MBUF_TX_MEM_MAX - * - MBUF_GET_FLAG_LIMIT_RX: memory usage limit by MBUF_RX_MEM_MAX - */ -#define MBUF_GET_FLAG_MASK (0xF << 4) -#define MBUF_GET_FLAG_LIMIT_TX (1 << 4) -#define MBUF_GET_FLAG_LIMIT_RX (1 << 5) - -void mb_mem_set_limit(uint32_t tx, uint32_t rx, uint32_t txrx); -void mb_mem_get_limit(uint32_t *tx, uint32_t *rx, uint32_t *txrx); - -#else /* MBUF_OPT_LIMIT_MEM */ - -#define MBUF_GET_FLAG_LIMIT_TX 0 -#define MBUF_GET_FLAG_LIMIT_RX 0 - -#endif /* MBUF_OPT_LIMIT_MEM */ - -#if 0 // only for test, no need to implement -#define MCLSHIFT 11 /* convert bytes to mbuf clusters */ -#define MCLBYTES (1 << MCLSHIFT) /* size of an mbuf cluster */ - -/* - * Concatenate mbuf chain n to m. - * Both chains must be of the same type (e.g. MT_DATA). - * Any m_pkthdr is not updated. - */ -void m_cat(struct mbuf *m, struct mbuf *n); -struct mbuf *m_getcl(int how, short type, int flags); -void m_align(struct mbuf *m, int len); -#endif - -#endif /* (defined(__CONFIG_ARCH_NET_CORE) || !defined(__CONFIG_ARCH_DUAL_CORE)) */ - -#ifdef __cplusplus -} -#endif - -#endif /* (__CONFIG_MBUF_IMPL_MODE == 0) */ -#endif /* !_SYS_MBUF_0_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/sys/param.h b/src/platform/f133/include/hal/sdmmc/sys/param.h deleted file mode 100644 index 4ee9c0a0684f5d1f21476bb7746532bc4d8e0f4b..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/sys/param.h +++ /dev/null @@ -1,78 +0,0 @@ -/*- - * Copyright (c) 1982, 1986, 1989, 1993 - * The Regents of the University of California. All rights reserved. - * (c) UNIX System Laboratories, Inc. - * All or some portions of this file are derived from material licensed - * to the University of California by American Telephone and Telegraph - * Co. or Unix System Laboratories, Inc. and are reproduced herein with - * the permission of UNIX System Laboratories, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)param.h 8.3 (Berkeley) 4/4/95 - * $FreeBSD: releng/10.1/sys/sys/param.h 272463 2014-10-03 00:58:34Z gjb $ - */ - -#ifndef _SYS_PARAM_H_ -#define _SYS_PARAM_H_ - -#define NBBY 8 /* number of bits in a byte */ -#define NBPW sizeof(int) /* number of bytes per word (integer) */ - -/* Bit map related macros. */ -#define setbit(a,i) (((unsigned char *)(a))[(i)/NBBY] |= 1<<((i)%NBBY)) -#define clrbit(a,i) (((unsigned char *)(a))[(i)/NBBY] &= ~(1<<((i)%NBBY))) -#define isset(a,i) \ - (((const unsigned char *)(a))[(i)/NBBY] & (1<<((i)%NBBY))) -#define isclr(a,i) \ - ((((const unsigned char *)(a))[(i)/NBBY] & (1<<((i)%NBBY))) == 0) - -/* Macros for counting and rounding. */ -#ifndef howmany -#define howmany(x, y) (((x)+((y)-1))/(y)) -#endif -#define nitems(x) (sizeof((x)) / sizeof((x)[0])) -#define rounddown(x, y) (((x)/(y))*(y)) -#define rounddown2(x, y) ((x)&(~((y)-1))) /* if y is power of two */ -#define roundup(x, y) ((((x)+((y)-1))/(y))*(y)) /* to any y */ -#define roundup2(x, y) (((x)+((y)-1))&(~((y)-1))) /* if y is powers of two */ -#define powerof2(x) ((((x)-1)&(x))==0) - -/* Macros for min/max. */ -#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) - -#define ct_assert(e) extern char (*ct_assert(void)) [sizeof(char[1 - 2*!(e)])] - - -#define do_div(n,base) ({ \ - unsigned int __base = (base); \ - unsigned int __rem; \ - __rem = ((u64)(n)) % __base; \ - (n) = ((u64)(n)) / __base; \ - __rem; \ - }) - - -#endif /* _SYS_PARAM_H_ */ diff --git a/src/platform/f133/include/hal/sdmmc/sys/sys_debug.h b/src/platform/f133/include/hal/sdmmc/sys/sys_debug.h deleted file mode 100644 index 5ec433f93de2e7875d8a7690a5ffe75211ca9cbd..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/sys/sys_debug.h +++ /dev/null @@ -1,392 +0,0 @@ -/* - * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __R_DEBUG_H__ -#define __R_DEBUG_H__ - -#include -#include -#include -#include -#include - -#define R_DEBUG_ON - - -/* - * @brief Debug level - */ -#define DBG_LEVEL_MASK (0x0F) - - -#define R_LEVEL_EMERG 0 - -#define R_LEVEL_ALERT 1 - -#define R_LEVEL_CRIT 2 - -#define R_LEVEL_ERROR 3 - -#define R_LEVEL_WARNING 4 - -#define R_LEVEL_NOTICE 5 - -#define R_LEVEL_INFO 6 - -#define R_LEVEL_DEBUG 7 - -#define R_LEVEL_ALL 0x0F - - -/* - * No expanded condition - */ -#define NOEXPAND 1 - - -/* - * module ON/OFF - */ -#define DBG_ON (1 << 4) - -#define DBG_OFF (0) - - -/* - * Always show message - */ -#define MOD_DBG_ALW_ON (DBG_ON | R_LEVEL_ALL) - - -/************************************************************ - * R_DEBUG INTERFACE - ************************************************************/ -#ifdef R_DEBUG_ON - -#define R_DEBUG_PRINT(msg, arg...) printf(msg, ##arg) - -#define R_DEBUG_ABORT() \ - do { \ - printf("system aborted!"); \ - sys_abort(); \ - } while (0) - - -/* - * @brief The realization of showing debug messages. - * @param module: Contained a module On/Off and a module debug level. - * @param dlevel: Debug message showed level for seal like MDEBUG. - * @param expand: Expanded condition if level param and module ON/OFF are not - * enough for developer. - * @param msg: The debug message. - * @param arg: Arguement shown in debug message which like printf arguement. - * @retval None - */ -#define _R_DEBUG(module, dlevel, expand, msg, arg...) \ - do { \ - if ( \ - ((module) & DBG_ON) && \ - (((module) & DBG_LEVEL_MASK) >= dlevel) && \ - (expand)) { \ - R_DEBUG_PRINT(msg, ##arg); \ - } \ - } while(0) - -/* - * @brief The realization of showing debug messages and it can't be turn off by - * module ON/OFF. - * @param module: Contained a module On/Off and a module debug level. - * @param dlevel: Debug message showed level for seal. - * @param expand: Expanded condition if level param is not enough for developer. - * @param msg: The debug message. - * @param arg: Arguement shown in debug message which like printf arguement. - * @retval None - */ -#define _R_INFO(module, dlevel, expand, msg, arg...) \ - do { \ - if ( \ - (((int16_t)(module) & DBG_LEVEL_MASK) >= dlevel) && \ - (expand)) { \ - R_DEBUG_PRINT(msg, ##arg); \ - } \ - } while(0) - -/* - * @brief The realization of assert debug messages shown the assert position, - * for example: "[Assert] At module_debug.h line 112 fun _MASSERT: **" - * @param module: Contained a module On/Off and a module debug level. - * @param dlevel: Debug message showed level for seal. - * @param msg: The debug message. - * @param arg: Arguement shown in debug message which like printf arguement. - * @retval None - */ -#define _R_ASSERT(assert, module, dlevel, msg, arg...) \ - _R_DEBUG(module, dlevel, !(assert), \ - "[Assert] At %s line %d fun %s: " msg, \ - __FILE__, __LINE__, __func__, ##arg) - -/* - * @brief The realization of assert debug messages shown the assert position, - * and abort. for example: "[Assert] At module_debug.h line 112 fun - * _MASSERT: ***" - * @param module: Contained a module On/Off and a module debug level. - * @param dlevel: Debug message showed level for seal. - * @param msg: The debug message. - * @param arg: Arguement shown in debug message which like printf arguement. - * @retval None - */ -#define _R_ASSERT_ABORT(assert, module, dlevel, msg, arg...) \ - do { \ - if ((((int16_t)(module) & DBG_LEVEL_MASK) >= dlevel) && !(assert)) { \ - R_DEBUG_PRINT("[Assert] At %s line %d fun %s: " msg, \ - __FILE__, __LINE__, __func__, ##arg); \ - R_DEBUG_ABORT(); \ - } \ - } while(0) - - -/* - * @brief A level debug message - * @param module: Contained a module On/Off and a module debug level. - * @param expand: Expanded condition if level param and module ON/OFF are not - * enough for developer. - * @param msg: The debug message. - * @param arg: Arguement shown in debug message which like printf arguement. - * @retval None - */ -#define R_ERROR(module, expand, msg, arg...) \ - _R_DEBUG(module, R_LEVEL_ERROR, expand, msg, ##arg) - -#define R_ALERT(module, expand, msg, arg...) \ - _R_DEBUG(module, R_LEVEL_ALERT, expand, msg, ##arg) - -#define R_CRIT(module, expand, msg, arg...) \ - _R_DEBUG(module, R_LEVEL_CRIT, expand, msg, ##arg) - -#define R_EMERG(module, expand, msg, arg...) \ - _R_DEBUG(module, R_LEVEL_EMERG, R_xpand, msg, ##arg) - -#define R_WARN(module, expand, msg, arg...) \ - _R_DEBUG(module, R_LEVEL_WARNING, expand, msg, ##arg) - -#define R_NOTICE(module, expand, msg, arg...) \ - _R_DEBUG(module, R_LEVEL_NOTICE, expand, msg, ##arg) - -#define R_INFO(module, expand, msg, arg...) \ - _R_DEBUG(module, R_LEVEL_INFO, expand, msg, ##arg) - -#define R_DEBUG(module, expand, msg, arg...) \ - _R_DEBUG(module, R_LEVEL_DEBUG, expand, msg, ##arg) - - -/* - * @brief Assert a full debug message with position(file, line, etc.) without level. - * for example: "[Assert] At module_debug.h line 112 fun _MASSERT: ***" - * @param assert: Debug condition - * @param module: Contained a module On/Off at least. - * @param msg: The debug message. - * @param arg: Arguement shown in debug message which like printf arguement. - * @retval None - */ -#define R_ASSERT(assert, module, msg, arg...) \ - _R_ASSERT(assert, module, R_LEVEL_ALL, msg, ##arg) - -#define R_ASSERT_ABORT(assert, module, msg, arg...) \ - _R_ASSERT_ABORT(assert, module, R_LEVEL_ALL, msg, ##arg) - -/* - * @brief Assert a full debug message with position(file, line, etc.) and - * error number without level. for example: - * "[Assert] At module_debug.h line 112 fun _MASSERT: condition p != NULL is fault. errno is 115." - * @param condition: It will assert a message if condition is fault. - * @retval Nuon - */ -#ifndef assert -#define assert(condition) R_ASSERT(condition, MOD_DBG_ALW_ON, "condition %s is fault. errno is %d.\n", #condition, r_thread_errno) -#endif - -/* -// THIS REALIZATION DO NOT SEAL -#define R_ASSERT(assert, module, msg, arg...) \ - _R_ASSERT(assert, module, R_LEVEL_ALL, "[%s]" msg, #module, ##arg) - -#define R_ASSERT_ABORT(assert, module, msg, arg...) \ - _R_ASSERT_ABORT(assert, module, R_LEVEL_ALL, "[%s]" msg, #module, ##arg) -*/ - - -/* - * @brief notify the function entry and exit/return in the debug level - * @param module: Contained a module On/Off at least. - * @param mname: module name in string - * @param ret: return value - * @retval None - */ -#define R_ENTRY(module, mname) \ - R_DEBUG(module, NOEXPAND, mname "entry %s().\n", __func__) - -#define R_RET(module, mname, ret) \ - R_DEBUG(module, NOEXPAND, mname "exit %s() with return %d.\n", __func__, ret) - -#define R_RET_NOVAL(module, mname) \ - R_DEBUG(module, NOEXPAND, mname "exit %s().\n", __func__) - - -#else /* MDEBUG_ON */ - -#define R_DEBUG_PRINT(msg, arg...) - -#define R_DEBUG_ABORT() - - -#define _R_DEBUG(module, dlevel, expand, msg, arg...) - -#define _R_INFO(module, dlevel, expand, msg, arg...) - -#define _R_ASSERT(assert, module, dlevel, msg, arg...) - -#define _R_ASSERT_ABORT(assert, module, dlevel, msg, arg...) - - -#define R_ERROR(module, expand, msg, arg...) - -#define R_ALERT(module, expand, msg, arg...) - -#define R_CRIT(module, expand, msg, arg...) - -#define R_EMERG(module, expand, msg, arg...) - -#define R_WARN(module, expand, msg, arg...) - -#define R_NOTICE(module, expand, msg, arg...) - -#define R_INFO(module, expand, msg, arg...) - -#define R_DEBUG(module, expand, msg, arg...) - - -#define R_ASSERT(assert, module, msg, arg...) - -#define R_ASSERT_ABORT(assert, module, msg, arg...) - -#ifndef assert -#define assert(condition) -#endif - - -#define R_ENTRY(module, mname) - -#define R_RET(module, mname, ret) - -#define R_RET_NOVAL(module, mname) - -#endif /* R_DEBUG_ON */ - -#define ROM_DUMP_MASK (1 << 0) -#define ROM_DBG_MASK (1 << 1) -#define ROM_INF_MASK (1 << 2) -#define ROM_WRN_MASK (1 << 3) -#define ROM_ERR_MASK (1 << 4) -#define ROM_ANY_MASK (1 << 5) -#define ROM_ABORT_MASK (1 << 6) -#define ROM_TOTAL_MASKS (ROM_DUMP_MASK | ROM_DBG_MASK | ROM_INF_MASK | \ - ROM_WRN_MASK | ROM_ERR_MASK | ROM_ANY_MASK | \ - ROM_ABORT_MASK) - -enum { - DUMP_PREFIX_NONE, - DUMP_PREFIX_ADDRESS, - DUMP_PREFIX_OFFSET -}; - -extern int hex_to_bin(char ch); - -extern int hex2bin(unsigned char *dst, const char *src, size_t count); - -extern void hex_dump_to_buffer(const void *buf, size_t len, int rowsize, - int groupsize, char *linebuf, size_t linebuflen, - bool ascii); - -extern void hex_dump_to_buffer(const void *buf, size_t len, int rowsize, - int groupsize, char *linebuf, size_t linebuflen, - bool ascii); - -extern void print_hex_dump(const char *prefix_str, int prefix_type, - int rowsize, int groupsize, - const void *buf, size_t len, bool ascii); - - -extern void print_hex_dump_words(const void *addr, unsigned int len); - -/* -//$ Example of r_debug from mqtt $ - -#define MQTT_MODULE (DBG_ON | R_LEVEL_DEBUG) - -#ifdef MOTT_ASSERT_ON -#define MQTT_ASSERT(assert, msg, arg...) R_ALERT(MOD_DBG_ALW_ON, (assert), "[MQTT assert] "msg, ##arg) -#else -#define MQTT_ASSERT(assert, msg, arg...) -#endif - -#ifdef MQTT_DBG_ON - -#define MQTT_INFO(msg, arg...) R_INFO(MQTT_MODULE, NOEXPAND, "[MQTT info] " msg, ##arg) - -#define MQTT_WARN(msg, arg...) R_WARN(MQTT_MODULE, NOEXPAND, "[MQTT warning] " msg, ##arg) - -#define MQTT_DEBUG(msg, arg...) R_DEBUG(MQTT_MODULE, NOEXPAND, "[MQTT debug] " msg, ##arg) - - - -#define MQTT_ENTRY() R_ENTRY(MQTT_MODULE, "[MQTT entry] ") - -#define MQTT_EXIT(ret) R_RET(MQTT_MODULE, "[MQTT return] ", ret) - -#else - -#define MQTT_INFO(msg, arg...) - -#define MQTT_WARN(msg, arg...) - -#define MQTT_DEBUG(msg, arg...) - - -#define MQTT_ENTRY() - -#define MQTT_EXIT(ret) - -#endif - -*/ - -extern void print_hex_dump_bytes(const void *addr, unsigned int len); -extern void print_hex_dump_words(const void *addr, unsigned int len); - -#endif /* __R_DEBUG_H__ */ diff --git a/src/platform/f133/include/hal/sdmmc/sys/xr_util.h b/src/platform/f133/include/hal/sdmmc/sys/xr_util.h deleted file mode 100644 index 3ca997fe3fb4c685bd9a09a150b1c7259636e759..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sdmmc/sys/xr_util.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _SYS_XR_UTIL_H_ -#define _SYS_XR_UTIL_H_ - -#include "compiler.h" -#include "sys/interrupt.h" - -#ifdef __CONFIG_OS_RTTHREAD - /*#define sys_abort() while (1)*/ -#else - -#if defined(__CC_ARM) - #define arch_breakpoint(value) __breakpoint(value) -#elif defined(__GNUC__) - #define arch_breakpoint(value) __asm volatile ("bkpt "#value) -#endif - -#define xr_breakpoint arch_breakpoint - -#ifndef sys_abort -#define sys_abort() \ - do { \ - arch_fiq_disable(); \ - arch_breakpoint(0); \ - } while (0) -#endif - -#define xr_abort sys_abort - - -#endif - -#endif /* _SYS_XR_UTIL_H_ */ diff --git a/src/platform/f133/include/hal/sound/card.h b/src/platform/f133/include/hal/sound/card.h deleted file mode 100644 index ac1b24fe35cb3ae76c25cfe6a3a85faf53350147..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sound/card.h +++ /dev/null @@ -1,54 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#ifndef __SOUND_CARD_H -#define __SOUND_CARD_H - -#ifdef __cplusplus -extern "C" { -#endif - -typedef struct snd_codec snd_codec_t; - -int snd_card_register(const char *name, snd_codec_t *codec, int platform_type); -int snd_card_unregister_all(void); - -int ksnd_card_index(const char *name); -const char *ksnd_card_name(int index); -int ksnd_card_num(void); -int ksnd_card_info(int card_num); -int ksnd_pcm_stream_info(int card_num, int device_num, int stream); - -#ifdef __cplusplus -} -#endif - -#endif /* __SOUND_CARD_H */ diff --git a/src/platform/f133/include/hal/sound/dma_wrap.h b/src/platform/f133/include/hal/sound/dma_wrap.h deleted file mode 100644 index c72309f42382b6e24a7df7f23e920aa3158f0193..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sound/dma_wrap.h +++ /dev/null @@ -1,198 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#ifndef __DMA_WRAP_H_ -#define __DMA_WRAP_H_ -#include -#include -#include - -struct dma_chan { - struct sunxi_dma_chan *dma_handle; -}; - -#if 0 -static inline void dma_free_coherent(void *addr) -{ - void *malloc_ptr = NULL; - if (!addr) - return; - malloc_ptr = *(uint32_t *)((uint32_t *)addr - 1); - hal_free(malloc_ptr); -} - -static inline void *dma_alloc_coherent(size_t size) -{ - void *fake_ptr = NULL; - void *malloc_ptr = NULL; - - malloc_ptr = hal_malloc(size + 64); - if ((uint32_t)malloc_ptr & 0x3) { - snd_err("error: krhino_mm_alloc not align to 4 byte\r\n"); - } - fake_ptr = (uint32_t)(malloc_ptr + 64) & (~63); - *(uint32_t *)((uint32_t *)fake_ptr - 1) = malloc_ptr; - - return fake_ptr; -} -#endif - -static inline struct dma_chan *dma_request_channel(void) -{ - struct dma_chan *chan = NULL; - hal_dma_chan_status_t status = 0; - - chan = calloc(1, sizeof(struct dma_chan)); - status = hal_dma_chan_request(&chan->dma_handle); - if (status != HAL_DMA_CHAN_STATUS_FREE) { - snd_err("request dma chan failed\n"); - free(chan); - return NULL; - } - return chan; -} - -static inline void dma_release_channel(struct dma_chan *chan) -{ - hal_dma_status_t status = 0; - if (!chan) - return; - status = hal_dma_chan_free(chan->dma_handle); - if (status != HAL_DMA_STATUS_OK) - snd_err("free dma chan failed\n"); - free(chan); -} - -static inline enum dma_status dmaengine_tx_status(struct dma_chan *chan, - uint32_t *residue) -{ - return hal_dma_tx_status(chan->dma_handle, residue); -} - -static inline int dmaengine_prep_dma_cyclic( - struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, - size_t period_len, enum dma_transfer_direction dir) -{ - hal_dma_status_t status = 0; - - snd_print("[%s] line:%d buf_addr:%p, buf_len:0x%x, period_len:0x%x\n", - __func__, __LINE__, buf_addr, buf_len, period_len); - - status = hal_dma_prep_cyclic(chan->dma_handle, - (unsigned long)buf_addr, (unsigned long)buf_len, - (unsigned long)period_len, dir); - - if (status != HAL_DMA_STATUS_OK) { - snd_err("hal_dma_prep_cyclic failed\n"); - return -1; - } - return 0; -} - -static inline int dmaengine_submit(struct dma_chan *chan, - dma_callback callback, void *callback_param) -{ - hal_dma_status_t status = 0; - - snd_print("\n"); - status = hal_dma_callback_install(chan->dma_handle, - callback, callback_param); - if (status != HAL_DMA_STATUS_OK) { - snd_err("hal_dma_prep_cyclic failed\n"); - return -1; - } - - return 0; -} - -static inline int dmaengine_slave_config(struct dma_chan *chan, - struct dma_slave_config *config) -{ - hal_dma_status_t status = 0; - - snd_print("\n"); - status = hal_dma_slave_config(chan->dma_handle, config); - if (status != HAL_DMA_STATUS_OK) { - snd_err("hal_dma_slave_config failed\n"); - return -1; - } - - return 0; -} - -static inline void dma_async_issue_pending(struct dma_chan *chan) -{ - hal_dma_status_t status = 0; - - snd_print("\n"); - status = hal_dma_start(chan->dma_handle); - if (status != HAL_DMA_STATUS_OK) { - snd_err("hal_dma_start failed\n"); - return ; - } - - return; -} - -static inline int dmaengine_terminate_async(struct dma_chan *chan) -{ - hal_dma_status_t status = 0; - - status = hal_dma_stop(chan->dma_handle); - if (status != HAL_DMA_STATUS_OK) { - snd_err("hal_dma_stop failed\n"); - return -1; - } - - /* Freeing memory in interrupt is not allowed - status = hal_dma_chan_desc_free(chan->dma_handle); - if (status != HAL_DMA_STATUS_OK) { - snd_err("hal_dma_chan_desc_free failed, return:%d\n", status); - return -1; - } - */ - - return 0; -} - -static inline int dmaengine_pause(struct dma_chan *chan) -{ - printf("dma pause not support.\n"); - return -1; -} - -static inline int dmaengine_resume(struct dma_chan *chan) -{ - printf("dma resume not support.\n"); - return -1; -} - -#endif /* __DMA_WRAP_H_ */ diff --git a/src/platform/f133/include/hal/sound/ksound.h b/src/platform/f133/include/hal/sound/ksound.h deleted file mode 100644 index 73c5d09605b4f45ab3d72ac02b5626db9f0f9be9..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sound/ksound.h +++ /dev/null @@ -1,82 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#ifndef __SOUND_KSOUND_H -#define __SOUND_KSOUND_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include "pcm_common.h" - -typedef struct snd_pcm_substream snd_pcm_substream_t; - -/* pcm */ -int ksnd_pcm_open(int card_num, int device_num, int stream, int mode, void **substream); -int ksnd_pcm_release(int card_num, int device_num, int stream); -int ksnd_pcm_hw_refine(void *substream, void *params); -int ksnd_pcm_prepare(void *substream_handle); -int ksnd_pcm_reset(void *substream_handle); -int ksnd_pcm_hw_params(void *substream_handle, void *params_wrapper); -int ksnd_pcm_hw_free(void *substream_handle); -snd_pcm_sframes_t ksnd_pcm_writei(void *substream_handle, const void *buffer, snd_pcm_uframes_t size); -snd_pcm_sframes_t ksnd_pcm_readi(void *substream_handle, void *buffer, snd_pcm_uframes_t size); -int ksnd_pcm_start(void *substream_handle); -int ksnd_pcm_drain(void *substream_handle); -int ksnd_pcm_drop(void *substream_handle); -int ksnd_pcm_pause(void *substream_handle, int enable); -int ksnd_pcm_sw_params(void *substream_handle, void *params_wrapper); -int ksnd_pcm_sync_ptr(void *substream_handle, void *status, void *control, unsigned int flags); -int ksnd_pcm_delay(void *substream_handle, void *delay); -int ksnd_pcm_channel_info(void *substream_handle, void *info_wrapper); -void ksnd_pcm_hw_mmap_dcache_update(void *substream_handle, snd_pcm_uframes_t offset, - snd_pcm_uframes_t size); -int ksnd_pcm_wait(void *substream_handle, int index, int timeout); -int ksnd_pcm_rewind(snd_pcm_substream_t *substream, snd_pcm_uframes_t frames); -int ksnd_pcm_dsleep_init(void *substream_handle); -int ksnd_pcm_dsleep_release(void *substream_handle, int index); - -/* ctl */ -int ksnd_ctl_num(const char *name); -int ksnd_ctl_get(const char *name, const char *elem, void *info); -int ksnd_ctl_get_bynum(const char *name, const unsigned int elem_num, void *info); -int ksnd_ctl_set(const char *name, const char *elem, unsigned int val); -int ksnd_ctl_set_bynum(const char *name, const unsigned int elem_num, unsigned int val); -int ksnd_ctl_add_elem(const char *name, void *info); -int ksnd_ctl_remove_elem(const char *name, const unsigned int elem_num); - -int ksnd_ctl_set_multi_args(const char *name, const char *elem, int num, ...); -#ifdef __cplusplus -} -#endif - -#endif /* __SOUND_KSOUND_H */ diff --git a/src/platform/f133/include/hal/sound/pcm_common.h b/src/platform/f133/include/hal/sound/pcm_common.h deleted file mode 100644 index 8625d51d1bad122f4267ee2dddc34f41f7b5311a..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sound/pcm_common.h +++ /dev/null @@ -1,820 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#ifndef __SOUND_PCM_COMMON_H -#define __SOUND_PCM_COMMON_H - -#include -#include - -#ifndef EBADFD -#define EBADFD 77 -#endif -#ifndef ESTRPIPE -#define ESTRPIPE 86 -#endif - -#ifndef LONG_MAX -#define LONG_MAX ((long)(~0UL>>1)) -#endif -#ifndef ULONG_MAX -#define ULONG_MAX (~0UL) -#endif -#ifndef UINT_MAX -#define UINT_MAX (~0U) -#endif - -#define SND_PCM_APPEND (1<<8) - -typedef unsigned long snd_pcm_uframes_t; -typedef signed long snd_pcm_sframes_t; -typedef union snd_interval snd_interval_t; - -#define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports mmap */ -#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 /* period data are valid during transfer */ -#define SNDRV_PCM_INFO_DOUBLE 0x00000004 /* Double buffering needed for PCM start/stop */ -#define SNDRV_PCM_INFO_BATCH 0x00000010 /* double buffering */ -#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 /* channels are interleaved */ -#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 /* channels are not interleaved */ -#define SNDRV_PCM_INFO_COMPLEX 0x00000400 /* complex frame organization (mmap only) */ -#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 /* hardware transfer block of samples */ -#define SNDRV_PCM_INFO_OVERRANGE 0x00020000 /* hardware supports ADC (capture) overrange detection */ -#define SNDRV_PCM_INFO_RESUME 0x00040000 /* hardware supports stream resume after suspend */ -#define SNDRV_PCM_INFO_PAUSE 0x00080000 /* pause ioctl is supported */ -#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 /* only half duplex */ -#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 /* playback and capture stream are somewhat correlated */ -#define SNDRV_PCM_INFO_SYNC_START 0x00400000 /* pcm support some kind of sync go */ -#define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000 /* period wakeup can be disabled */ -#define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000 /* (Deprecated)has audio wall clock for audio/system time sync */ -#define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000 /* report hardware link audio time, reset on startup */ -#define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000 /* report absolute hardware link audio time, not reset on startup */ -#define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000 /* report estimated link audio time */ -#define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000 /* report synchronized audio/system time */ -#define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000 /* internal kernel flag - trigger in drain */ -#define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000 /* internal kernel flag - FIFO size is in frames */ - -/** PCM access type */ -typedef enum _snd_pcm_access { - /** mmap access with simple interleaved channels */ - SND_PCM_ACCESS_MMAP_INTERLEAVED = 0, - /** mmap access with simple non interleaved channels */ - SND_PCM_ACCESS_MMAP_NONINTERLEAVED, - /** mmap access with complex placement */ - SND_PCM_ACCESS_MMAP_COMPLEX, - /** snd_pcm_readi/snd_pcm_writei access */ - SND_PCM_ACCESS_RW_INTERLEAVED, - /** snd_pcm_readn/snd_pcm_writen access */ - SND_PCM_ACCESS_RW_NONINTERLEAVED, - SND_PCM_ACCESS_LAST = SND_PCM_ACCESS_RW_NONINTERLEAVED -} snd_pcm_access_t; - -/** PCM sample format */ -typedef enum _snd_pcm_format { - /** Unknown */ - SND_PCM_FORMAT_UNKNOWN = -1, - /** Signed 8 bit */ - SND_PCM_FORMAT_S8 = 0, - /** Unsigned 8 bit */ - SND_PCM_FORMAT_U8, - /** Signed 16 bit Little Endian */ - SND_PCM_FORMAT_S16_LE, - /** Signed 16 bit Big Endian */ - SND_PCM_FORMAT_S16_BE, - /** Unsigned 16 bit Little Endian */ - SND_PCM_FORMAT_U16_LE, - /** Unsigned 16 bit Big Endian */ - SND_PCM_FORMAT_U16_BE, - /** Signed 24 bit Little Endian using low three bytes in 32-bit word */ - SND_PCM_FORMAT_S24_LE, - /** Signed 24 bit Big Endian using low three bytes in 32-bit word */ - SND_PCM_FORMAT_S24_BE, - /** Unsigned 24 bit Little Endian using low three bytes in 32-bit word */ - SND_PCM_FORMAT_U24_LE, - /** Unsigned 24 bit Big Endian using low three bytes in 32-bit word */ - SND_PCM_FORMAT_U24_BE, - /** Signed 32 bit Little Endian */ - SND_PCM_FORMAT_S32_LE, - /** Signed 32 bit Big Endian */ - SND_PCM_FORMAT_S32_BE, - /** Unsigned 32 bit Little Endian */ - SND_PCM_FORMAT_U32_LE, - /** Unsigned 32 bit Big Endian */ - SND_PCM_FORMAT_U32_BE, - - /* only support little endian */ - /** Signed 16 bit CPU endian */ - SND_PCM_FORMAT_S16 = SND_PCM_FORMAT_S16_LE, - /** Unsigned 16 bit CPU endian */ - SND_PCM_FORMAT_U16 = SND_PCM_FORMAT_U16_LE, - /** Signed 24 bit CPU endian */ - SND_PCM_FORMAT_S24 = SND_PCM_FORMAT_S24_LE, - /** Unsigned 24 bit CPU endian */ - SND_PCM_FORMAT_U24 = SND_PCM_FORMAT_U24_LE, - /** Signed 32 bit CPU endian */ - SND_PCM_FORMAT_S32 = SND_PCM_FORMAT_S32_LE, - /** Unsigned 32 bit CPU endian */ - SND_PCM_FORMAT_U32 = SND_PCM_FORMAT_U32_LE, - - SND_PCM_FORMAT_LAST = SND_PCM_FORMAT_U32_BE, -} snd_pcm_format_t; - -/** PCM state */ -typedef enum _ksnd_pcm_state { - /** Open */ - SNDRV_PCM_STATE_OPEN = 0, - /** Setup installed */ - SNDRV_PCM_STATE_SETUP, - /** Ready to start */ - SNDRV_PCM_STATE_PREPARED, - /** Running */ - SNDRV_PCM_STATE_RUNNING, - /** Stopped: underrun (playback) or overrun (capture) detected */ - SNDRV_PCM_STATE_XRUN, - /** Draining: running (playback) or stopped (capture) */ - SNDRV_PCM_STATE_DRAINING, - /** Paused */ - SNDRV_PCM_STATE_PAUSED, - /** Hardware is suspended */ - SNDRV_PCM_STATE_SUSPENDED, - /** Hardware is disconnected */ - SNDRV_PCM_STATE_DISCONNECTED, - SNDRV_PCM_STATE_LAST = SNDRV_PCM_STATE_DISCONNECTED -} ksnd_pcm_state_t; - - -typedef int snd_pcm_hw_param_t; -#define SND_PCM_HW_PARAM_ACCESS 0 -#define SND_PCM_HW_PARAM_FORMAT 1 -#define SND_PCM_HW_PARAM_FIRST_MASK SND_PCM_HW_PARAM_ACCESS -#define SND_PCM_HW_PARAM_LAST_MASK SND_PCM_HW_PARAM_FORMAT -#define SND_PCM_HW_PARAM_SAMPLE_BITS 2 -#define SND_PCM_HW_PARAM_FRAME_BITS 3 -#define SND_PCM_HW_PARAM_CHANNELS 4 -#define SND_PCM_HW_PARAM_RATE 5 -#define SND_PCM_HW_PARAM_PERIOD_TIME 6 -#define SND_PCM_HW_PARAM_PERIOD_SIZE 7 -#define SND_PCM_HW_PARAM_PERIOD_BYTES 8 -#define SND_PCM_HW_PARAM_PERIODS 9 -#define SND_PCM_HW_PARAM_BUFFER_TIME 10 -#define SND_PCM_HW_PARAM_BUFFER_SIZE 11 -#define SND_PCM_HW_PARAM_BUFFER_BYTES 12 -#define SND_PCM_HW_PARAM_FIRST_RANGE SND_PCM_HW_PARAM_SAMPLE_BITS -#define SND_PCM_HW_PARAM_LAST_RANGE SND_PCM_HW_PARAM_BUFFER_BYTES -#define SND_PCM_HW_PARAM_FIRST_INTERVAL SND_PCM_HW_PARAM_ACCESS -#define SND_PCM_HW_PARAM_LAST_INTERVAL SND_PCM_HW_PARAM_BUFFER_BYTES - -static inline int hw_is_mask(int var) -{ - return var >= SND_PCM_HW_PARAM_FIRST_MASK && - var <= SND_PCM_HW_PARAM_LAST_MASK; -} - -static inline int hw_is_range(int var) -{ - return var >= SND_PCM_HW_PARAM_FIRST_RANGE && - var <= SND_PCM_HW_PARAM_LAST_RANGE; -} - -union snd_interval { - struct { - uint32_t min; - uint32_t max; - int openmin; /* whether the interval is left-open */ - int openmax; /* whether the interval is right-open */ - int integer; /* whether the value is integer or not */ - int empty; - } range; - uint32_t mask; -}; - -typedef struct snd_pcm_hw_params { - union snd_interval intervals[SND_PCM_HW_PARAM_LAST_INTERVAL - - SND_PCM_HW_PARAM_FIRST_INTERVAL + 1]; - unsigned int can_paused; - - uint32_t rmask; /* W: requested masks */ - uint32_t cmask; /* R: changed masks */ -} snd_pcm_hw_params_t; - -typedef struct snd_pcm_sw_params { - snd_pcm_uframes_t avail_min; /* min avail frames for wakeup */ - snd_pcm_uframes_t start_threshold; /* min hw_avail frames for automatic start */ - snd_pcm_uframes_t stop_threshold; /* min avail frames for automatic stop */ - snd_pcm_uframes_t silence_size; /* silence block size */ - snd_pcm_uframes_t boundary; /* pointers wrap point */ -} snd_pcm_sw_params_t; - - -typedef long ksnd_pcm_sframes_t; -typedef unsigned long ksnd_pcm_uframes_t; - -struct snd_pcm_mmap_status { - ksnd_pcm_state_t state; - ksnd_pcm_uframes_t hw_ptr; -}; - -struct snd_pcm_mmap_control { - ksnd_pcm_uframes_t appl_ptr; - ksnd_pcm_uframes_t avail_min; -}; - -#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0) /* execute hwsync */ -#define SNDRV_PCM_SYNC_PTR_APPL (1<<1) /* get appl_ptr from driver (r/w op) */ -#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2) /* get avail_min from driver */ - -typedef struct _snd_pcm_channel_info { - unsigned int channel; - void *addr; /* base address of channel samples */ - unsigned int first; /* offset to first sample in bits */ - unsigned int step; /* samples distance in bits */ - enum { SND_PCM_AREA_MMAP, SND_PCM_AREA_LOCAL } type; -} snd_pcm_channel_info_t; - - -static inline unsigned int div32(unsigned int a, unsigned int b, - unsigned int *r) -{ - if (b == 0) { - *r = 0; - return UINT_MAX; - } - *r = a % b; - return a / b; -} - -static inline uint64_t div_u64_rem(uint64_t dividend, uint32_t divisor, uint32_t *remainder) -{ - *remainder = dividend % divisor; - return dividend / divisor; -} - -static inline unsigned int div_down(unsigned int a, unsigned int b) -{ - if (b == 0) - return UINT_MAX; - return a / b; -} - -static inline unsigned int div_up(unsigned int a, unsigned int b) -{ - unsigned int r; - unsigned int q; - if (b == 0) - return UINT_MAX; - q = div32(a, b, &r); - if (r) - ++q; - return q; -} - -static inline unsigned int mul(unsigned int a, unsigned int b) -{ - if (a == 0) - return 0; - if (div_down(UINT_MAX, a) < b) - return UINT_MAX; - return a * b; -} - -static inline unsigned int add(unsigned int a, unsigned int b) -{ - if (a >= UINT_MAX - b) - return UINT_MAX; - return a + b; -} - -static inline unsigned int sub(unsigned int a, unsigned int b) -{ - if (a > b) - return a - b; - return 0; -} - -static inline unsigned int muldiv32(unsigned int a, unsigned int b, - unsigned int c, unsigned int *r) -{ - uint64_t n = (uint64_t)a * (uint64_t)b; - uint32_t rem; - if (c == 0) { - *r = 0; - return UINT_MAX; - } - n = div_u64_rem(n, c, &rem); - if (n >= UINT_MAX) { - *r = 0; - return UINT_MAX; - } - *r = rem; - return n; -} - -static inline int __pcm_ffs(uint32_t value) -{ - uint32_t offset; - - for (offset = 0; offset < sizeof(value)*8; offset++) { - if (value & (1< 0; offset--) { - if (value & (1<<(offset - 1))) - return offset; - } - return -1; -} - -static inline snd_pcm_access_t params_access(const struct snd_pcm_hw_params *p) -{ - const union snd_interval *interval = NULL; - interval = &p->intervals[SND_PCM_HW_PARAM_ACCESS - - SND_PCM_HW_PARAM_FIRST_INTERVAL]; - - if (interval->mask != 0) - return (snd_pcm_access_t)__ffs(interval->mask); - return (snd_pcm_access_t)-1; -} - -static inline snd_pcm_format_t params_format(const struct snd_pcm_hw_params *p) -{ - const union snd_interval *interval = NULL; - interval = &p->intervals[SND_PCM_HW_PARAM_FORMAT - - SND_PCM_HW_PARAM_FIRST_INTERVAL]; - - if (interval->mask != 0) - return (snd_pcm_format_t)__ffs(interval->mask); - return SND_PCM_FORMAT_UNKNOWN; -} - -static inline snd_interval_t *hw_param_interval(struct snd_pcm_hw_params *params, - snd_pcm_hw_param_t var) -{ - return ¶ms->intervals[var]; -} - -static inline const union snd_interval *hw_param_interval_c(const struct snd_pcm_hw_params *params, - int var) -{ - return ¶ms->intervals[var - SND_PCM_HW_PARAM_FIRST_INTERVAL]; -} - -static inline unsigned int params_channels(const struct snd_pcm_hw_params *p) -{ - return hw_param_interval_c(p, SND_PCM_HW_PARAM_CHANNELS)->range.min; -} - -static inline unsigned int params_rate(const struct snd_pcm_hw_params *p) -{ - return hw_param_interval_c(p, SND_PCM_HW_PARAM_RATE)->range.min; -} - -static inline unsigned int params_period_size(const struct snd_pcm_hw_params *p) -{ - return hw_param_interval_c(p, SND_PCM_HW_PARAM_PERIOD_SIZE)->range.min; -} - -static inline unsigned int params_period_time(const struct snd_pcm_hw_params *p) -{ - return hw_param_interval_c(p, SND_PCM_HW_PARAM_PERIOD_TIME)->range.min; -} - -static inline unsigned int params_periods(const struct snd_pcm_hw_params *p) -{ - return hw_param_interval_c(p, SND_PCM_HW_PARAM_PERIODS)->range.min; -} - -static inline unsigned int params_buffer_size(const struct snd_pcm_hw_params *p) -{ - return hw_param_interval_c(p, SND_PCM_HW_PARAM_BUFFER_SIZE)->range.min; -} - -static inline unsigned int params_buffer_time(const struct snd_pcm_hw_params *p) -{ - return hw_param_interval_c(p, SND_PCM_HW_PARAM_BUFFER_TIME)->range.min; -} - - -int snd_pcm_format_physical_width(snd_pcm_format_t format); - - -#define SND_MASK_BITS 32 - -static inline void snd_mask_none(snd_interval_t *interval) -{ - interval->mask = 0U; -} - -static inline void snd_mask_any(snd_interval_t *interval) -{ - interval->mask = ~0U; -} - -static inline int snd_mask_empty(const snd_interval_t *interval) -{ - return !interval->mask; -} - -static inline int snd_mask_full(const snd_interval_t *interval) -{ - return interval->mask == 0xffffffff; -} - -static inline unsigned int snd_mask_min(const snd_interval_t *interval) -{ - unsigned int i; - for (i = 0; i < sizeof(interval->mask) * 8; i++) { - if (interval->mask & (1 << i)) - return i; - } - return 0; -} - -static inline unsigned int snd_mask_max(const snd_interval_t *interval) -{ - unsigned int i; - for (i = sizeof(interval->mask) * 8; i > 0; i--) { - if (interval->mask & (1 << (i - 1))) - return i - 1; - } - return 0; -} - -static inline void snd_mask_set(snd_interval_t *interval, unsigned int val) -{ - interval->mask |= (1 << val); -} - -static inline void snd_mask_reset(snd_interval_t *interval, unsigned int val) -{ - interval->mask &= ~(1 << val); -} - -static inline void snd_mask_set_range(snd_interval_t *interval, - unsigned int from, unsigned int to) -{ - unsigned int i; - for (i = from; i <= to; i++) - interval->mask |= (1 << i); -} - -static inline void snd_mask_reset_range(snd_interval_t *interval, - unsigned int from, unsigned int to) -{ - unsigned int i; - for (i = from; i <= to; i++) - interval->mask &= ~(1 << i); -} - -static inline void snd_mask_leave(snd_interval_t *interval, unsigned int val) -{ - snd_mask_none(interval); - interval->mask |= (1 << val); -} - -static inline void snd_mask_intersect(snd_interval_t *interval, const snd_interval_t *v) -{ - interval->mask &= v->mask; -} - -static inline int snd_mask_eq(snd_interval_t *interval, const snd_interval_t *v) -{ - return interval->mask == v->mask; -} - -static inline void snd_mask_copy(snd_interval_t *interval, const snd_interval_t *v) -{ - interval->mask = v->mask; -} - -static inline int snd_mask_test(const snd_interval_t *interval, unsigned int val) -{ - return interval->mask & (1 << val); -} - -static inline int snd_mask_single(const snd_interval_t *interval) -{ - unsigned int bits = sizeof(interval->mask) * 8; - unsigned int i; - int c = 0; - for (i = 0; i < bits; ++i) { - if (!(interval->mask & (1 << i))) - continue; - if (c) - return 0; - c++; - } - return 1; -} - -static inline int snd_mask_refine(snd_interval_t *interval, const snd_interval_t *v) -{ - snd_interval_t old; - snd_mask_copy(&old, interval); - snd_mask_intersect(interval, v); - if (snd_mask_empty(interval)) - return -EINVAL; - return !snd_mask_eq(interval, &old); -} - -static inline int snd_mask_refine_first(snd_interval_t *interval) -{ - if (snd_mask_single(interval)) - return 0; - snd_mask_leave(interval, snd_mask_min(interval)); - return 1; -} - -static inline int snd_mask_refine_last(snd_interval_t *interval) -{ - if (snd_mask_single(interval)) - return 0; - snd_mask_leave(interval, snd_mask_max(interval)); - return 1; -} - -static inline int snd_mask_refine_min(snd_interval_t *interval, unsigned int val) -{ - if (snd_mask_min(interval) >= val) - return 0; - snd_mask_reset_range(interval, 0, val - 1); - if (snd_mask_empty(interval)) - return -EINVAL; - return 1; -} - -static inline int snd_mask_refine_max(snd_interval_t *interval, unsigned int val) -{ - if (snd_mask_max(interval) <= val) - return 0; - snd_mask_reset_range(interval, val + 1, SND_MASK_BITS); - if (snd_mask_empty(interval)) - return -EINVAL; - return 1; -} - -static inline int snd_mask_refine_set(snd_interval_t *interval, unsigned int val) -{ - int changed; - changed = !snd_mask_single(interval); - snd_mask_leave(interval, val); - if (snd_mask_empty(interval)) - return -EINVAL; - return changed; -} - -static inline int snd_mask_value(const snd_interval_t *interval) -{ - return snd_mask_min(interval); -} - -static inline int snd_mask_always_eq(const snd_interval_t *m1, const snd_interval_t *m2) -{ - return snd_mask_single(m1) && snd_mask_single(m2) && - snd_mask_value(m1) == snd_mask_value(m2); -} - -static inline int snd_mask_never_eq(const snd_interval_t *m1, const snd_interval_t *m2) -{ - if (m1->mask & m2->mask) - return 0; - return 1; -} - -static inline void snd_range_any(snd_interval_t *i) -{ - i->range.min = 0; - i->range.openmin = 0; - i->range.max = UINT_MAX; - i->range.openmax= 0; - i->range.integer = 0; - i->range.empty = 0; -} - -static inline void snd_range_none(snd_interval_t *i) -{ - i->range.empty = 1; -} - -static inline int snd_range_checkempty(snd_interval_t *i) -{ - return (i->range.min > i->range.max || - (i->range.min == i->range.max && (i->range.openmin || i->range.openmax))); -} - -static inline int snd_range_empty(const snd_interval_t *i) -{ - return i->range.empty; -} - -static inline int snd_range_single(const snd_interval_t *i) -{ -#if 0 - return (i->range.min == i->range.max || - (i->range.min + 1 == i->range.max && i->range.openmax)); -#else - /* fix hw params install error, maybe not the best way */ - return (i->range.min == i->range.max || - ((i->range.min + 1 == i->range.max) && i->range.openmax) || - ((i->range.min + 2 == i->range.max) && i->range.openmax && i->range.openmin)); -#endif -} - -static inline int snd_range_value(const snd_interval_t *i) -{ - return i->range.min; -} - -static inline void snd_range_set_value(snd_interval_t *i, unsigned int val) -{ - i->range.openmax = i->range.openmin = 0; - i->range.min = i->range.max = val; - i->range.integer = 0; - i->range.empty = 0; -} - -static inline int snd_range_min(const snd_interval_t *i) -{ - return i->range.min; -} - -static inline int snd_range_max(const snd_interval_t *i) -{ - unsigned int v; - v = i->range.max; - if (i->range.openmax) - v--; - return v; -} - -static inline void snd_range_set_minmax(snd_interval_t *i, unsigned int min, unsigned int max) -{ - i->range.openmax = i->range.openmin = 0; - i->range.min = min; - i->range.max = max; - i->range.integer = 0; - i->range.empty = 0; -} - -static inline int snd_range_test(const snd_interval_t *i, unsigned int val) -{ - return !((i->range.min > val || (i->range.min == val && i->range.openmin) || - i->range.max < val || (i->range.max == val && i->range.openmax))); -} - -static inline void snd_range_copy(snd_interval_t *d, const snd_interval_t *s) -{ - d->range = s->range; -} - -static inline int snd_range_setinteger(snd_interval_t *i) -{ - if (i->range.integer) - return 0; - if (i->range.openmin && i->range.openmax && i->range.min == i->range.max) - return -EINVAL; - i->range.integer = 1; - return 1; -} - -static inline void snd_range_floor(snd_interval_t *i) -{ - if (i->range.integer || snd_range_empty(i)) - return; - i->range.openmin = 0; - if (i->range.openmax) { - i->range.max--; - i->range.openmax = 0; - } - i->range.integer = 1; -} - -static inline void snd_range_unfloor(snd_interval_t *i) -{ - if (snd_range_empty(i)) - return; - if (i->range.max == UINT_MAX) - return; - if (i->range.openmax) - return; - i->range.max++; - i->range.openmax = 1; - i->range.integer = 0; -} - -static inline int snd_range_eq(const snd_interval_t *i1, const snd_interval_t *i2) -{ - if (i1->range.empty) - return i2->range.empty; - if (i2->range.empty) - return i1->range.empty; - return i1->range.min == i2->range.min && - i1->range.openmin == i2->range.openmin && - i1->range.max == i2->range.max && - i1->range.openmax == i2->range.openmax; -} - -static inline int snd_range_always_eq(const snd_interval_t *i1, const snd_interval_t *i2) -{ - return snd_range_single(i1) && snd_range_single(i2) && - snd_range_value(i1) == snd_range_value(i2); -} - -static inline int snd_range_never_eq(const snd_interval_t *i1, const snd_interval_t *i2) -{ - - return (i1->range.max < i2->range.min || - (i1->range.max == i2->range.min && - (i1->range.openmax || i1->range.openmin)) || - i1->range.min > i2->range.max || - (i1->range.min == i2->range.max && - (i1->range.openmin || i2->range.openmax))); -} - -int snd_range_refine(snd_interval_t *i, const snd_interval_t *v); -int snd_range_refine_first(snd_interval_t *i); -int snd_range_refine_last(snd_interval_t *i); -int snd_range_refine_min(snd_interval_t *i, unsigned int min, int openmin); -int snd_range_refine_max(snd_interval_t *i, unsigned int max, int openmax); -int snd_range_refine_set(snd_interval_t *i, unsigned int val); -void snd_range_add(const snd_interval_t *a, const snd_interval_t *b, snd_interval_t *c); -void snd_range_sub(const snd_interval_t *a, const snd_interval_t *b, snd_interval_t *c); -void snd_range_mul(const snd_interval_t *a, const snd_interval_t *b, snd_interval_t *c); -void snd_range_div(const snd_interval_t *a, const snd_interval_t *b, snd_interval_t *c); -void snd_range_muldiv(const snd_interval_t *a, const snd_interval_t *b, - const snd_interval_t *c, snd_interval_t *d); -void snd_range_muldivk(const snd_interval_t *a, const snd_interval_t *b, - unsigned int k, snd_interval_t *c); -void snd_range_mulkdiv(const snd_interval_t *a, unsigned int k, - const snd_interval_t *b, snd_interval_t *c); -int snd_range_list(snd_interval_t *i, unsigned int count, - const unsigned int *list, unsigned int mask); - -const char *snd_pcm_hw_param_name(snd_pcm_hw_param_t param); - -struct snd_pcm_hw_rule; -typedef int (*snd_pcm_hw_rule_func_t)(struct snd_pcm_hw_params *params, - struct snd_pcm_hw_rule *rule); - -struct snd_pcm_hw_rule { - unsigned int cond; - int var; - int deps[4]; - snd_pcm_hw_rule_func_t func; - void *private_data; -}; - -int snd_pcm_hw_rule_mul(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule); -int snd_pcm_hw_rule_div(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule); -int snd_pcm_hw_rule_muldivk(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule); -int snd_pcm_hw_rule_mulkdiv(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule); -int snd_pcm_hw_rule_format(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule); -int snd_pcm_hw_rule_sample_bits(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule); -int snd_pcm_hw_rule_rate(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule); -int snd_pcm_hw_rule_buffer_bytes_max(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule); - -#endif /* __SOUND_PCM_COMMON_H */ diff --git a/src/platform/f133/include/hal/sound/snd_core.h b/src/platform/f133/include/hal/sound/snd_core.h deleted file mode 100644 index 5a7278048f44bd5a38ec0e9e672574dce7318439..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sound/snd_core.h +++ /dev/null @@ -1,628 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#ifndef __SOUND_CORE_H -#define __SOUND_CORE_H -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "aw_list.h" -#include "pcm_common.h" -#include "hal_atomic.h" -#include "hal_interrupt.h" -//#define SNDRV_DEBUG - -#define SND_CORE_VERSION "V1.4.0" - -typedef unsigned int hal_irq_state_t; - -#define hal_local_irq_enable() hal_interrupt_enable() -#define hal_local_irq_disable() hal_interrupt_disable() -#define hal_local_irq_save(flags) \ - do { \ - flags = hal_interrupt_save(); \ - } while (0) -#define hal_local_irq_restore(flags) \ - do { \ - hal_interrupt_restore(flags); \ - } while (0) - -typedef void* __iomem; -typedef __iomem dma_addr_t; - -struct snd_dai; -struct snd_pcm_substream; -struct snd_pcm_hw_params; -struct snd_pcm_runtime; -struct snd_pcm; - -typedef hal_mutex_t snd_mutex_t; -snd_mutex_t snd_mutex_init(void); -int snd_mutex_lock_timeout(snd_mutex_t mutex, long ms); -int snd_mutex_lock(snd_mutex_t mutex); -void snd_mutex_unlock(snd_mutex_t mutex); -void snd_mutex_destroy(snd_mutex_t mutex); - -typedef struct { - hal_sem_t sem; - int waiting; -} *snd_schd_t; -snd_schd_t snd_schd_init(void); -int snd_schd_timeout(snd_schd_t schd, long ms); -void snd_schd_wakeup(snd_schd_t schd); -void snd_schd_destroy(snd_schd_t schd); - -void snd_pcm_stream_lock_irq(struct snd_pcm_substream *substream); -void snd_pcm_stream_unlock_irq(struct snd_pcm_substream *substream); - -hal_irq_state_t _snd_pcm_stream_lock_irqsave(struct snd_pcm_substream *substream); -void snd_pcm_stream_unlock_irqrestore(struct snd_pcm_substream *substream, - unsigned long flags); - -#define snd_pcm_stream_lock_irqsave(substream, flags) \ - do { \ - flags = _snd_pcm_stream_lock_irqsave(substream); \ - } while (0) - -#define snd_readb(reg) (*(volatile uint8_t *)(reg)) -#define snd_readw(reg) (*(volatile uint16_t *)(reg)) -#define snd_readl(reg) (*(volatile uint32_t *)(reg)) -#define snd_writeb(value,reg) (*(volatile uint8_t *)(reg) = (value)) -#define snd_writew(value,reg) (*(volatile uint16_t *)(reg) = (value)) -#define snd_writel(value,reg) (*(volatile uint32_t *)(reg) = (value)) - -#define snd_malloc(size) calloc(1, size) -#define snd_strdup(ptr) strdup(ptr) -#define snd_free(ptr) free((void *)ptr) - - -#define SNDRV_LOG_COLOR_NONE "\e[0m" -#define SNDRV_LOG_COLOR_RED "\e[31m" -#define SNDRV_LOG_COLOR_GREEN "\e[32m" -#define SNDRV_LOG_COLOR_YELLOW "\e[33m" -#define SNDRV_LOG_COLOR_BLUE "\e[34m" - -#ifdef SNDRV_DEBUG -#define snd_print(fmt, args...) \ - printf(SNDRV_LOG_COLOR_GREEN "[SND_DEBUG][%s:%d]" fmt \ - SNDRV_LOG_COLOR_NONE, __FUNCTION__, __LINE__, ##args) -#else -#define snd_print(fmt, args...) -#endif - -#if 0 -#define snd_info(fmt, args...) \ - printf(SNDRV_LOG_COLOR_BLUE "[SND_INFO][%s:%d]" fmt \ - SNDRV_LOG_COLOR_NONE, __FUNCTION__, __LINE__, ##args) -#else -#define snd_info(fmt, args...) -#endif - -#define snd_err(fmt, args...) \ - printf(SNDRV_LOG_COLOR_RED "[SND_ERR][%s:%d]" fmt \ - SNDRV_LOG_COLOR_NONE, __FUNCTION__, __LINE__, ##args) -#if 0 -#define snd_lock_debug(fmt, args...) \ - printf(SNDRV_LOG_COLOR_RED "[SND_LOCK_DEBUG][%s:%u]" fmt \ - SNDRV_LOG_COLOR_NONE, __FUNCTION__, __LINE__, ##args) -#else -#define snd_lock_debug(fmt, args...) -#endif - -typedef int snd_ctl_elem_type_t; -#define SND_CTL_ELEM_TYPE_INTEGER ((snd_ctl_elem_type_t)0) -#define SND_CTL_ELEM_TYPE_ENUMERATED ((snd_ctl_elem_type_t)1) -#define SND_CTL_ELEM_TYPE_LAST SND_CTL_ELEM_TYPE_ENUMERATE - -#define SND_CTL_ENUM_AUTO_MASK (0) - -#define SND_CTL_KCONTROL(xname, xreg, xshift, xmax) \ -{ \ - .type = SND_CTL_ELEM_TYPE_INTEGER, \ - .name = xname, \ - .reg = xreg, \ - .shift = xshift, \ - .max = xmax, \ - .min = 0, \ - .get = NULL, \ - .set = NULL, \ - .count = 1, \ -} - -#define SND_CTL_KCONTROL_EXT(xname, xmax, xmin, xget, xset) \ -{ \ - .type = SND_CTL_ELEM_TYPE_INTEGER, \ - .name = xname, \ - .reg = 0, \ - .shift = 0, \ - .max = xmax, \ - .min = xmin, \ - .get = xget, \ - .set = xset, \ - .count = 1, \ -} - -#define SND_CTL_KCONTROL_EXT_REG(xname, xreg, xshift, xmax, xget, xset) \ -{ \ - .type = SND_CTL_ELEM_TYPE_INTEGER, \ - .name = xname, \ - .reg = xreg, \ - .shift = xshift, \ - .max = xmax, \ - .min = 0, \ - .get = xget, \ - .set = xset, \ - .count = 1, \ -} - -#define SND_CTL_KCONTROL_VALUE_EXT(xname, xreg, xshift, xmax, xmin, xget, xset) \ -{ \ - .type = SND_CTL_ELEM_TYPE_INTEGER, \ - .name = xname, \ - .reg = xreg, \ - .shift = xshift, \ - .max = xmax, \ - .min = xmin, \ - .get = xget, \ - .set = xset, \ - .count = 1, \ -} - -#define SND_CTL_KCONTROL_USER(xname, xmax, xmin, xcur) \ -{ \ - .type = SND_CTL_ELEM_TYPE_INTEGER, \ - .name = xname, \ - .max = xmax, \ - .min = xmin, \ - .reg = xcur, \ - .get = NULL, \ - .set = NULL, \ - .count = 1, \ - .private_data_type = SND_MODULE_USER, \ -} - -#define SND_CTL_ENUM(xname, xitems, xtexts, xreg, xshift) \ -{ \ - .type = SND_CTL_ELEM_TYPE_ENUMERATED, \ - .name = xname,\ - .items = xitems, \ - .texts = xtexts, \ - .reg = xreg, \ - .shift = xshift, \ - .mask = SND_CTL_ENUM_AUTO_MASK, \ - .get = NULL, \ - .set = NULL, \ - .count = 1, \ -} - -#define SND_CTL_ENUM_EXT(xname, xitems, xtexts, xmask, xget, xset) \ -{ \ - .type = SND_CTL_ELEM_TYPE_ENUMERATED, \ - .name = xname,\ - .items = xitems, \ - .texts = xtexts, \ - .mask = xmask, \ - .get = xget, \ - .set = xset, \ - .count = 1, \ -} - -#define SND_CTL_ENUM_VALUE_EXT(xname, xitems, xtexts, xreg, xshift, xmask, xget, xset) \ -{ \ - .type = SND_CTL_ELEM_TYPE_ENUMERATED, \ - .name = xname,\ - .items = xitems, \ - .texts = xtexts, \ - .reg = xreg, \ - .shift = xshift, \ - .mask = xmask, \ - .get = xget, \ - .set = xset, \ - .count = 1, \ -} - -enum snd_platform_type { - SND_PLATFORM_TYPE_CPUDAI = 0, - SND_PLATFORM_TYPE_CPUDAI_DAC, - SND_PLATFORM_TYPE_CPUDAI_ADC, - SND_PLATFORM_TYPE_INTERNAL_I2S, - SND_PLATFORM_TYPE_DAUDIO0 = 5, - SND_PLATFORM_TYPE_DAUDIO1, - SND_PLATFORM_TYPE_DAUDIO2, - SND_PLATFORM_TYPE_DAUDIO3, - SND_PLATFORM_TYPE_DAUDIO_MAX, - SND_PLATFORM_TYPE_DMIC = 10, - SND_PLATFORM_TYPE_SPDIF = 12, - SND_PLATFORM_TYPE_MAX, -}; - -enum snd_module_type { - SND_MODULE_UNKNOWN = 0, - SND_MODULE_CODEC, - SND_MODULE_PLATFORM, - SND_MODULE_USER, -}; - -enum { - SNDRV_PCM_STREAM_PLAYBACK = 0, - SNDRV_PCM_STREAM_CAPTURE, - SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE, -}; - -enum snd_device_type { - SNDRV_DEV_CONTROL, - SNDRV_DEV_PCM, - SNDRV_DEV_TIMER, -}; - -struct sunxi_dma_params { - char *name; - dma_addr_t dma_addr; - uint32_t src_maxburst; - uint32_t dst_maxburst; - uint8_t dma_drq_type_num; -}; - -struct snd_dma_buffer { - dma_addr_t addr; - size_t bytes; -}; - -struct snd_pcm_ops { - int (*open)(struct snd_pcm_substream *substream); - int (*close)(struct snd_pcm_substream *substream); - int (*ioctl)(struct snd_pcm_substream * substream, - unsigned int cmd, void *arg); - int (*hw_params)(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *params); - int (*hw_free)(struct snd_pcm_substream *substream); - int (*prepare)(struct snd_pcm_substream *substream); - int (*trigger)(struct snd_pcm_substream *substream, int cmd); - snd_pcm_uframes_t (*pointer)(struct snd_pcm_substream *substream); - int (*copy)(struct snd_pcm_substream *substream, int channel, - snd_pcm_uframes_t pos, - void *buf, snd_pcm_uframes_t count); -}; - -struct snd_dai_ops { - int (*set_sysclk)(struct snd_dai *dai, - int clk_id, unsigned int freq, int dir); - int (*set_clkdiv)(struct snd_dai *dai, int div_id, int div); - int (*set_pll)(struct snd_dai *dai, int pll_id, int source, - unsigned int freq_in, unsigned int freq_out); - int (*set_fmt)(struct snd_dai *dai, unsigned int fmt); - int (*startup)(struct snd_pcm_substream *, - struct snd_dai *); - void (*shutdown)(struct snd_pcm_substream *, - struct snd_dai *); - int (*hw_params)(struct snd_pcm_substream *, - struct snd_pcm_hw_params *, struct snd_dai *); - int (*hw_free)(struct snd_pcm_substream *, - struct snd_dai *); - int (*prepare)(struct snd_pcm_substream *, - struct snd_dai *); - int (*trigger)(struct snd_pcm_substream *, int, - struct snd_dai *); - int (*dapm_control)(struct snd_pcm_substream *, - struct snd_dai *, int onoff); -}; - -struct snd_pcm_hardware { - uint32_t info; - uint32_t formats; - uint32_t rates; - uint32_t rate_min; - uint32_t rate_max; - uint32_t channels_min; - uint32_t channels_max; - uint32_t buffer_bytes_max; - uint32_t period_bytes_min; - uint32_t period_bytes_max; - uint32_t periods_min; - uint32_t periods_max; -}; - -struct snd_pcm_hw_constrains { - union snd_interval intervals[SND_PCM_HW_PARAM_LAST_INTERVAL - SND_PCM_HW_PARAM_FIRST_INTERVAL + 1]; - unsigned int rules_num; - unsigned int rules_all; - struct snd_pcm_hw_rule *rules; -}; - -static inline snd_interval_t *constrs_interval(struct snd_pcm_hw_constrains *constrs, - snd_pcm_hw_param_t var) -{ - return &constrs->intervals[var - SND_PCM_HW_PARAM_FIRST_INTERVAL]; -} - -struct snd_pcm_stream { - const char *stream_name; - uint64_t formats; - uint32_t rates; - uint32_t rate_min; - uint32_t rate_max; - uint32_t channels_min; - uint32_t channels_max; -}; - -struct snd_dai { - const char *name; - uint32_t id; - struct snd_pcm_stream playback; - struct snd_pcm_stream capture; - const struct snd_dai_ops *ops; - void *playback_dma_data; - void *capture_dma_data; - int (*probe)(struct snd_dai *dai); - int (*remove)(struct snd_dai *dai); - void *component; -}; - -typedef struct snd_codec { - const char *name; - struct snd_dai *codec_dai; - uint32_t codec_dai_num; - int (*probe)(struct snd_codec *); - int (*remove)(struct snd_codec *); - void *private_data; - void *codec_base_addr; - bool playback_only; - bool capture_only; - struct snd_pcm_hardware *hw; - unsigned int (*read)(struct snd_codec *, unsigned int); - unsigned int (*write)(struct snd_codec *, unsigned int, unsigned int); - struct snd_kcontrol *controls; - unsigned int num_controls; -} snd_codec_t; - -struct snd_platform { - char *name; - int type; - int (*probe)(struct snd_platform *); - int (*remove)(struct snd_platform *); - int (*pcm_new)(struct snd_pcm *); - void (*pcm_free)(struct snd_pcm *); - const struct snd_pcm_ops *ops; - struct snd_dai *cpu_dai; - void *private_data; - void *mem_base; - struct snd_kcontrol *controls; - unsigned int num_controls; - struct snd_pcm_hardware *pcm_hw; -}; - - -struct snd_pcm_runtime { - snd_pcm_uframes_t hw_ptr_base; - snd_pcm_access_t access; - snd_pcm_format_t format; - unsigned int rate; - unsigned int channels; - unsigned int can_paused; - snd_pcm_uframes_t period_size; - unsigned int periods; - snd_pcm_uframes_t buffer_size; - snd_pcm_uframes_t min_align; /* Min alignment for the format, frame align */ - unsigned int frame_bits; - unsigned int sample_bits; - unsigned int no_period_wakeup: 1; - - dma_addr_t dma_addr; - size_t dma_bytes; - - struct snd_dma_buffer *dma_buffer_p; - - /* private section */ - void *private_data; - - struct snd_pcm_mmap_status *status; - struct snd_pcm_mmap_control *control; - - /* HW constrains */ - struct snd_pcm_hardware hw; - struct snd_pcm_hw_constrains hw_constrains; - - /* Other params */ - snd_pcm_uframes_t start_threshold; - snd_pcm_uframes_t stop_threshold; - snd_pcm_uframes_t silence_size; - - snd_pcm_uframes_t silence_start; - snd_pcm_uframes_t silence_filled; - - snd_pcm_uframes_t boundary; - - /* locking / scheduling */ - snd_pcm_uframes_t twake; - snd_schd_t tsleep; /* transfer sleep */ - snd_schd_t sleep; /* poll sleep (drain...) */ - snd_schd_t dsleep; /* direct access sleep */ - - snd_schd_t dsleep_list[32]; - - unsigned int xrun_cnt; - - snd_mutex_t pcm_mutex; -}; - -struct snd_ctl_info { - unsigned int id; - snd_ctl_elem_type_t type; - const char *name; - unsigned long value; - int min,max; - int count; - /* for enum */ - unsigned int items; - const char * const *texts; - - unsigned long *private_data; -}; - -typedef int (snd_kcontrol_get_t) (struct snd_kcontrol *, struct snd_ctl_info *); -typedef int (snd_kcontrol_set_t) (struct snd_kcontrol *, unsigned long); - -struct snd_kcontrol { - unsigned int id; - snd_ctl_elem_type_t type; - const char *name; - int reg; - unsigned int shift; - int min,max; - int mask; - int count; - /* for enum */ - unsigned int items; - const char * const *texts; - unsigned long value; - - snd_kcontrol_get_t *get; - snd_kcontrol_set_t *set; - struct list_head list; - int dynamic; - void *private_data; - int private_data_type; -}; - -struct snd_ctl { - struct snd_card *card; - char id[64]; - struct list_head controls; - int controls_num; - snd_mutex_t ctl_mutex; -}; - -typedef struct snd_pcm_substream { - struct snd_pcm *pcm; - char name[48]; - int stream; - struct snd_pcm_runtime *runtime; - struct snd_pcm_ops *ops; - struct snd_dma_buffer dma_buffer; - hal_spinlock_t lock; - int ref_count; - int dapm_state; - int hw_opened; -} snd_pcm_substream_t; - -struct snd_pcm { - struct snd_card *card; - char name[48]; - char id[32]; - int num; - struct snd_pcm_substream *streams[2]; - struct list_head list; - enum snd_device_type type; - void (*private_free) (struct snd_pcm *pcm); - snd_mutex_t open_mutex; -}; - -struct snd_card { - char *name; - int num; - struct snd_codec *codec; - struct snd_platform *platform; - struct list_head devices; - struct list_head list; - struct snd_ctl *ctl; -}; - -void snd_core_version(void); -int snd_card_register(const char *name, - struct snd_codec *codec, - int platform_type); -int snd_card_unregister_all(void); - -static inline void *snd_soc_dai_get_component(struct snd_dai *dai) -{ - return dai->component; -} - -static inline struct snd_dai *snd_soc_get_codec_dai(struct snd_pcm_substream *substream) -{ - struct snd_codec *codec; - if (!substream || !substream->pcm || !substream->pcm->card) - return NULL; - codec = substream->pcm->card->codec; - if (!codec) - return NULL; - return codec->codec_dai; -} - -static inline struct snd_dai *snd_soc_get_cpu_dai(struct snd_pcm_substream *substream) -{ - struct snd_platform *platform; - if (!substream || !substream->pcm || !substream->pcm->card) - return NULL; - platform = substream->pcm->card->platform; - if (!platform) - return NULL; - return platform->cpu_dai; -} - -static inline void snd_pcm_set_runtime_buffer(struct snd_pcm_substream *substream, - struct snd_dma_buffer *bufp) -{ - struct snd_pcm_runtime *runtime = substream->runtime; - - if (bufp) { - runtime->dma_buffer_p = bufp; - runtime->dma_addr = bufp->addr; - runtime->dma_bytes = bufp->bytes; - } else { - runtime->dma_buffer_p = NULL; - runtime->dma_addr = 0; - runtime->dma_bytes = 0; - } -} - -int snd_ctl_add_elem(struct snd_ctl *ctl, struct snd_ctl_info *info); -int snd_ctl_remove_elem(struct snd_ctl *ctl, struct snd_kcontrol *control); -struct snd_card *snd_card_find_by_name(const char *name); -struct snd_card *snd_card_find_by_num(int num); -int snd_card_get_number(void); -struct snd_pcm *snd_card_find_pcm(struct snd_card *card, int device_num); -void snd_set_runtime_hwparams(struct snd_pcm_substream *substream, - const struct snd_pcm_hardware *hw); -void snd_kcontrol_to_snd_ctl_info(struct snd_kcontrol *kcontrol, - struct snd_ctl_info *info, unsigned long value); -int snd_soc_dai_set_fmt(struct snd_dai *dai, unsigned int fmt); -/* card list */ -void snd_card_list(void); -int sunxi_soundcard_init(void); - -#endif /* __SOUND_CORE_H */ diff --git a/src/platform/f133/include/hal/sound/snd_dma.h b/src/platform/f133/include/hal/sound/snd_dma.h deleted file mode 100644 index c41ae97f9723724a51c6498ba79540f34b9f90fe..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sound/snd_dma.h +++ /dev/null @@ -1,46 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#ifndef __SOUND_DMA_H -#define __SOUND_DMA_H -#include "snd_core.h" -#include - -int snd_dmaengine_pcm_open_request_chan(struct snd_pcm_substream *substream); -snd_pcm_uframes_t snd_dmaengine_pcm_pointer(struct snd_pcm_substream *substream); -int snd_dmaengine_pcm_close_release_chan(struct snd_pcm_substream *substream); -int snd_dmaengine_pcm_trigger(struct snd_pcm_substream *substream, int cmd); -int snd_hwparams_to_dma_slave_config(const struct snd_pcm_substream *substream, - const struct snd_pcm_hw_params *params, - struct dma_slave_config *slave_config); -struct dma_chan *snd_dmaengine_pcm_get_chan(struct snd_pcm_substream *substream); - -#endif /* __SOUND_DMA_H */ diff --git a/src/platform/f133/include/hal/sound/snd_io.h b/src/platform/f133/include/hal/sound/snd_io.h deleted file mode 100644 index 511d4fa86b4a30d52f0600363daa794c36eef80f..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sound/snd_io.h +++ /dev/null @@ -1,48 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#ifndef __SOUND_IO_H_ -#define __SOUND_IO_H_ - - -unsigned int snd_codec_read(struct snd_codec *codec, unsigned int reg); -int snd_codec_write(struct snd_codec *codec, unsigned int reg, unsigned int val); -int snd_codec_update_bits(struct snd_codec *codec, unsigned int reg, - unsigned int mask, unsigned int value); - - -unsigned int snd_platform_read(struct snd_platform *platform, unsigned int reg); -int snd_platform_write(struct snd_platform *platform, unsigned int reg, unsigned int val); -int snd_platform_update_bits(struct snd_platform *platform, unsigned int reg, - unsigned int mask, unsigned int value); - - -#endif /* __SOUND_IO_H_ */ diff --git a/src/platform/f133/include/hal/sound/snd_misc.h b/src/platform/f133/include/hal/sound/snd_misc.h deleted file mode 100644 index 76f532e36eee2c2fd00137f03021940c6690a99b..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sound/snd_misc.h +++ /dev/null @@ -1,48 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#ifndef __SOUND_MISC_H -#define __SOUND_MISC_H - -int snd_pcm_limit_hw_rates(struct snd_pcm_runtime *runtime); -unsigned int snd_pcm_rate_mask_intersect(unsigned int rates_a, unsigned int rates_b); -int snd_pcm_format_physical_width(snd_pcm_format_t format); -int snd_pcm_format_set_silence(snd_pcm_format_t format, void *data, unsigned int samples); - -struct snd_pcm_hw_constraint_list { - const unsigned int *list; - unsigned int count; - unsigned int mask; -}; - -extern const struct snd_pcm_hw_constraint_list snd_pcm_known_rates; - -#endif /* __SOUND_MISC_H */ diff --git a/src/platform/f133/include/hal/sound/snd_pcm.h b/src/platform/f133/include/hal/sound/snd_pcm.h deleted file mode 100644 index c3b37d7e354b3d9a7c13afa4102e8e0d1bcf39d3..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sound/snd_pcm.h +++ /dev/null @@ -1,233 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#ifndef __SOUND_PCM_H -#define __SOUND_PCM_H -#include -#define SND_SOC_DAIFMT_I2S 1 /* I2S mode */ -#define SND_SOC_DAIFMT_RIGHT_J 2 /* Right Justified mode */ -#define SND_SOC_DAIFMT_LEFT_J 3 /* Left Justified mode */ -#define SND_SOC_DAIFMT_DSP_A 4 /* L data MSB after FRM LRC */ -#define SND_SOC_DAIFMT_DSP_B 5 /* L data MSB during FRM LRC */ -#define SND_SOC_DAIFMT_AC97 6 /* AC97 */ -#define SND_SOC_DAIFMT_PDM 7 /* Pulse density modulation */ - -/* left and right justified also known as MSB and LSB respectively */ -#define SND_SOC_DAIFMT_MSB SND_SOC_DAIFMT_LEFT_J -#define SND_SOC_DAIFMT_LSB SND_SOC_DAIFMT_RIGHT_J - -#define SND_SOC_DAIFMT_SIG_SHIFT 8 -#define SND_SOC_DAIFMT_MASTER_SHIFT 12 - -#define SND_SOC_DAIFMT_NB_NF (1 << 8) /* normal bit clock + frame */ -#define SND_SOC_DAIFMT_NB_IF (2 << 8) /* normal BCLK + inv FRM */ -#define SND_SOC_DAIFMT_IB_NF (3 << 8) /* invert BCLK + nor FRM */ -#define SND_SOC_DAIFMT_IB_IF (4 << 8) /* invert BCLK + FRM */ - -#define SND_SOC_DAIFMT_CBM_CFM (1 << 12) /* codec clk & FRM master */ -#define SND_SOC_DAIFMT_CBS_CFM (2 << 12) /* codec clk slave & FRM master */ -#define SND_SOC_DAIFMT_CBM_CFS (3 << 12) /* codec clk master & frame slave */ -#define SND_SOC_DAIFMT_CBS_CFS (4 << 12) /* codec clk & FRM slave */ - -#define SND_SOC_DAIFMT_FORMAT_MASK 0x000f -#define SND_SOC_DAIFMT_CLOCK_MASK 0x00f0 -#define SND_SOC_DAIFMT_INV_MASK 0x0f00 -#define SND_SOC_DAIFMT_MASTER_MASK 0xf000 - -#define SNDRV_PCM_IOCTL1_RESET 0 -/* 1 is absent slot. */ -#define SNDRV_PCM_IOCTL1_CHANNEL_INFO 2 -#define SNDRV_PCM_IOCTL1_GSTATE 3 -#define SNDRV_PCM_IOCTL1_FIFO_SIZE 4 - -#define SNDRV_PCM_TRIGGER_STOP 0 -#define SNDRV_PCM_TRIGGER_START 1 -#define SNDRV_PCM_TRIGGER_PAUSE_PUSH 3 -#define SNDRV_PCM_TRIGGER_PAUSE_RELEASE 4 -#define SNDRV_PCM_TRIGGER_SUSPEND 5 -#define SNDRV_PCM_TRIGGER_RESUME 6 -#define SNDRV_PCM_TRIGGER_DRAIN 7 - - -#define SNDRV_PCM_RATE_5512 (1<<0) /* 5512Hz */ -#define SNDRV_PCM_RATE_8000 (1<<1) /* 8000Hz */ -#define SNDRV_PCM_RATE_11025 (1<<2) /* 11025Hz */ -#define SNDRV_PCM_RATE_16000 (1<<3) /* 16000Hz */ -#define SNDRV_PCM_RATE_22050 (1<<4) /* 22050Hz */ -#define SNDRV_PCM_RATE_32000 (1<<5) /* 32000Hz */ -#define SNDRV_PCM_RATE_44100 (1<<6) /* 44100Hz */ -#define SNDRV_PCM_RATE_48000 (1<<7) /* 48000Hz */ -#define SNDRV_PCM_RATE_64000 (1<<8) /* 64000Hz */ -#define SNDRV_PCM_RATE_88200 (1<<9) /* 88200Hz */ -#define SNDRV_PCM_RATE_96000 (1<<10) /* 96000Hz */ -#define SNDRV_PCM_RATE_176400 (1<<11) /* 176400Hz */ -#define SNDRV_PCM_RATE_192000 (1<<12) /* 192000Hz */ - -#define SNDRV_PCM_RATE_CONTINUOUS (1<<30) /* continuous range */ -#define SNDRV_PCM_RATE_KNOT (1<<31) /* supports more non-continuos rates */ - -#define SNDRV_PCM_RATE_8000_44100 (SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_11025|\ - SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_22050|\ - SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100) -#define SNDRV_PCM_RATE_8000_48000 (SNDRV_PCM_RATE_8000_44100|SNDRV_PCM_RATE_48000) -#define SNDRV_PCM_RATE_8000_96000 (SNDRV_PCM_RATE_8000_48000|SNDRV_PCM_RATE_64000|\ - SNDRV_PCM_RATE_88200|SNDRV_PCM_RATE_96000) -#define SNDRV_PCM_RATE_8000_192000 (SNDRV_PCM_RATE_8000_96000|SNDRV_PCM_RATE_176400|\ - SNDRV_PCM_RATE_192000) - -#define SNDRV_PCM_FORMAT_S8 ((snd_pcm_format_t) 0) -#define SNDRV_PCM_FORMAT_U8 ((snd_pcm_format_t) 1) -#define SNDRV_PCM_FORMAT_S16_LE ((snd_pcm_format_t) 2) -#define SNDRV_PCM_FORMAT_S16_BE ((snd_pcm_format_t) 3) -#define SNDRV_PCM_FORMAT_U16_LE ((snd_pcm_format_t) 4) -#define SNDRV_PCM_FORMAT_U16_BE ((snd_pcm_format_t) 5) -#define SNDRV_PCM_FORMAT_S24_LE ((snd_pcm_format_t) 6) -#define SNDRV_PCM_FORMAT_S24_BE ((snd_pcm_format_t) 7) -#define SNDRV_PCM_FORMAT_U24_LE ((snd_pcm_format_t) 8) -#define SNDRV_PCM_FORMAT_U24_BE ((snd_pcm_format_t) 9) -#define SNDRV_PCM_FORMAT_S32_LE ((snd_pcm_format_t) 10) -#define SNDRV_PCM_FORMAT_S32_BE ((snd_pcm_format_t) 11) -#define SNDRV_PCM_FORMAT_U32_LE ((snd_pcm_format_t) 12) -#define SNDRV_PCM_FORMAT_U32_BE ((snd_pcm_format_t) 13) - -#define _SNDRV_PCM_FMTBIT(fmt) (1ULL << (int)SND_PCM_FORMAT_##fmt) -#define SNDRV_PCM_FMTBIT_S8 _SNDRV_PCM_FMTBIT(S8) -#define SNDRV_PCM_FMTBIT_U8 _SNDRV_PCM_FMTBIT(U8) -#define SNDRV_PCM_FMTBIT_S16_LE _SNDRV_PCM_FMTBIT(S16_LE) -#define SNDRV_PCM_FMTBIT_S16_BE _SNDRV_PCM_FMTBIT(S16_BE) -#define SNDRV_PCM_FMTBIT_U16_LE _SNDRV_PCM_FMTBIT(U16_LE) -#define SNDRV_PCM_FMTBIT_U16_BE _SNDRV_PCM_FMTBIT(U16_BE) -#define SNDRV_PCM_FMTBIT_S24_LE _SNDRV_PCM_FMTBIT(S24_LE) -#define SNDRV_PCM_FMTBIT_S24_BE _SNDRV_PCM_FMTBIT(S24_BE) -#define SNDRV_PCM_FMTBIT_U24_LE _SNDRV_PCM_FMTBIT(U24_LE) -#define SNDRV_PCM_FMTBIT_U24_BE _SNDRV_PCM_FMTBIT(U24_BE) -#define SNDRV_PCM_FMTBIT_S32_LE _SNDRV_PCM_FMTBIT(S32_LE) -#define SNDRV_PCM_FMTBIT_S32_BE _SNDRV_PCM_FMTBIT(S32_BE) -#define SNDRV_PCM_FMTBIT_U32_LE _SNDRV_PCM_FMTBIT(U32_LE) -#define SNDRV_PCM_FMTBIT_U32_BE _SNDRV_PCM_FMTBIT(U32_BE) - - -#ifdef SNDRV_LITTLE_ENDIAN -#define SNDRV_PCM_FMTBIT_S16 SNDRV_PCM_FMTBIT_S16_LE -#define SNDRV_PCM_FMTBIT_U16 SNDRV_PCM_FMTBIT_U16_LE -#define SNDRV_PCM_FMTBIT_S24 SNDRV_PCM_FMTBIT_S24_LE -#define SNDRV_PCM_FMTBIT_U24 SNDRV_PCM_FMTBIT_U24_LE -#define SNDRV_PCM_FMTBIT_S32 SNDRV_PCM_FMTBIT_S32_LE -#define SNDRV_PCM_FMTBIT_U32 SNDRV_PCM_FMTBIT_U32_LE -#define SNDRV_PCM_FMTBIT_FLOAT SNDRV_PCM_FMTBIT_FLOAT_LE -#define SNDRV_PCM_FMTBIT_FLOAT64 SNDRV_PCM_FMTBIT_FLOAT64_LE -#define SNDRV_PCM_FMTBIT_IEC958_SUBFRAME SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE -#endif -#ifdef SNDRV_BIG_ENDIAN -#define SNDRV_PCM_FMTBIT_S16 SNDRV_PCM_FMTBIT_S16_BE -#define SNDRV_PCM_FMTBIT_U16 SNDRV_PCM_FMTBIT_U16_BE -#define SNDRV_PCM_FMTBIT_S24 SNDRV_PCM_FMTBIT_S24_BE -#define SNDRV_PCM_FMTBIT_U24 SNDRV_PCM_FMTBIT_U24_BE -#define SNDRV_PCM_FMTBIT_S32 SNDRV_PCM_FMTBIT_S32_BE -#define SNDRV_PCM_FMTBIT_U32 SNDRV_PCM_FMTBIT_U32_BE -#define SNDRV_PCM_FMTBIT_FLOAT SNDRV_PCM_FMTBIT_FLOAT_BE -#define SNDRV_PCM_FMTBIT_FLOAT64 SNDRV_PCM_FMTBIT_FLOAT64_BE -#define SNDRV_PCM_FMTBIT_IEC958_SUBFRAME SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE -#endif - -static inline snd_pcm_sframes_t bytes_to_frames(struct snd_pcm_runtime *runtime, ssize_t size) -{ - return size * 8 / runtime->frame_bits; -} - -static inline ssize_t frames_to_bytes(struct snd_pcm_runtime *runtime, snd_pcm_sframes_t size) -{ - return size * runtime->frame_bits / 8; -} - -static inline size_t snd_pcm_lib_buffer_bytes(struct snd_pcm_substream *substream) -{ - struct snd_pcm_runtime *runtime = substream->runtime; - return frames_to_bytes(runtime, runtime->buffer_size); -} - -static inline size_t snd_pcm_lib_period_bytes(struct snd_pcm_substream *substream) -{ - struct snd_pcm_runtime *runtime = substream->runtime; - return frames_to_bytes(runtime, runtime->period_size); -} - -/* Get the available(readable) space for capture */ -static inline snd_pcm_uframes_t snd_pcm_capture_avail(struct snd_pcm_runtime *runtime) -{ - snd_pcm_sframes_t avail = runtime->status->hw_ptr - runtime->control->appl_ptr; - if (avail < 0) - avail += runtime->boundary; - return avail; -} - -/* Get the available(writeable) space for playback */ -static inline snd_pcm_uframes_t snd_pcm_playback_avail(struct snd_pcm_runtime *runtime) -{ - snd_pcm_sframes_t avail = runtime->status->hw_ptr + runtime->buffer_size - runtime->control->appl_ptr; - - if (avail < 0) - avail += runtime->boundary; - else if ((snd_pcm_uframes_t) avail >= runtime->boundary) - avail -= runtime->boundary; - - return avail; -} - -/* Get the queued space(has been written) for playback */ -static inline snd_pcm_sframes_t snd_pcm_playback_hw_avail(struct snd_pcm_runtime *runtime) -{ - return runtime->buffer_size - snd_pcm_playback_avail(runtime); -} - -/* Get the free space for capture */ -static inline snd_pcm_sframes_t snd_pcm_capture_hw_avail(struct snd_pcm_runtime *runtime) -{ - return runtime->buffer_size - snd_pcm_capture_avail(runtime); -} - -static inline int snd_pcm_playback_data(struct snd_pcm_substream *substream) -{ - struct snd_pcm_runtime *runtime = substream->runtime; - - if (runtime->stop_threshold >= runtime->boundary) - return 1; - - return snd_pcm_playback_avail(runtime) < runtime->buffer_size; -} - -static inline int snd_pcm_playback_empty(struct snd_pcm_substream *substream) -{ - struct snd_pcm_runtime *runtime = substream->runtime; - return snd_pcm_playback_avail(runtime) >= runtime->buffer_size; -} - -#endif /* __SOUND_PCM_H */ diff --git a/src/platform/f133/include/hal/sun8i/pwm-sun8iw19.h b/src/platform/f133/include/hal/sun8i/pwm-sun8iw19.h deleted file mode 100644 index cd89b61b1ed1bb9bfa2aee15e81287a1b62d5550..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sun8i/pwm-sun8iw19.h +++ /dev/null @@ -1,128 +0,0 @@ - -/* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. - - * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in - * the the People's Republic of China and other countries. - * All Allwinner Technology Co.,Ltd. trademarks are used with permission. - - * DISCLAIMER - * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. - * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) - * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN - * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. - * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS - * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. - * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. - - - * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT - * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING - * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE - * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - - */ - -#ifndef __PWM_SUN8IW19_H__ -#define __PWM_SUN8IW19_H__ - - -/***************************************************************************** - * define register offset - *****************************************************************************/ -#define PWM_BASE 0x0300a000 - -#define PWM_PIER 0x00 /*PWM IRQ enable register 0x00*/ -#define PWM_PISR 0x04 /*PWM IRQ status register 0x04*/ -#define PWM_CIER 0x10 /*PWM capture IRQ enable register 0x10*/ - -#define PWM_CISR 0X14 /*PWM capture IRQ status register 0X14*/ - -#define PWM_PCCR_BASE 0x20 -#define PWM_PCCR01 0x20 /*PWM01 clock configuration register*/ -#define PWM_PCCR23 0x24 /*PWM23 clock configuration register */ -#define PWM_PCCR45 0x28 /*PWM45 clock configuration register */ -#define PWM_PCCR67 0x2C /*PWM67 clock configuration register */ -#define PWM_PCCR8 0x30 /*PWM8 clock configuration register */ - -#define PWM_PCGR 0X40 /*PWM CLOCK Gating Register 0X40*/ - -#define PWM_PDZCR_BASE 0X60 -#define PWM_PDZCR01 0X60 /*PWM01 Dead Zone Contol Register 0X60*/ -#define PWM_PDZCR23 0X64 /*PWM23 Dead Zone Contol Register 0X64*/ -#define PWM_PDZCR45 0X68 /*PWM45 Dead Zone Contol Register 0X68*/ -#define PWM_PDZCR67 0X6C /*PWM67 Dead Zone Contol Register 0X6C*/ -#define PWM_PDZCR89 0X70 /*PWM89 Dead Zone Contol Register 0X70*/ - -#define PWM_PER 0x80 /*enable register 0x80*/ - -#define PWM_PGR0 0X90 /*PWM Group0 Register 0X90*/ -#define PWM_PGR1 0X94 /*PWM Group0 Register 0X94*/ - -#define PWM_CER 0xc0 /*PWM Capture Enable Register */ - -#define PWM_PCR 0x0100/*PWM Contorl Register */ -/* offset: 0x0100+0x0000+N*0x0020 N=0~8 */ - -#define PWM_PPR 0x0104/*PWM Period Register */ -/* offset: 0x0100+0x00004+N*0x0020 N=0~8 */ - -#define PWM_PCNTR 0x0108/*PWM Counter Register */ -/* offset: 0x0100+0x0008+N*0x0020 N=0~8 */ - -#define PWM_PPCNTR 0x010C/*PWM Pulse Counter Register */ -/* offset: 0x0100+0x000c+N*0x0020 N=0~8 */ - -#define PWM_CCR 0x0110/*Capture Control Register */ -/* offset: 0x0100+0x0010+N*0x0020 N=0~8 */ - -#define PWM_CRLR 0x0114/*Capture RIse Lock Register */ -/* offset: 0x0100+0x0014+N*0x0020 N=0~8 */ - -#define PWM_CFLR 0x0118/*Capture Control Register */ -/* offset: 0x0100+0x0018+N*0x0020 N=0~8 */ - -#define PWM_VR 0x03f0/*PWM Version Register */ - - -/***************************************************************************** - * define PWM SET - *****************************************************************************/ -#define PWM_CLK_SRC_SHIFT 0x7 -#define PWM_CLK_SRC_WIDTH 0x2 - -#define PWM_DIV_M_SHIFT 0x0 -#define PWM_DIV_M_WIDTH 0x4 - -#define PWM_PRESCAL_SHIFT 0x0 -#define PWM_PRESCAL_WIDTH 0x8 - -#define PWM_ACTIVE_CYCLES_SHIFT 0x0 -#define PWM_ACTIVE_CYCLES_WIDTH 0x10 - -#define PWM_PERIOD_SHIFT 0x10 -#define PWM_PERIOD_WIDTH 0x10 - -#define PWM_CLK_GATING_SHIFT 0x0 -#define PWM_CLK_GATING_WIDTH 0x1 - -#define PWM_EN_CONTROL_SHIFT 0x0 -#define PWM_EN_CONTORL_WIDTH 0x1 - -#define PWM_ACT_STA_SHIFT 0x8 -#define PWM_ACT_STA_WIDTH 0x1 -#define PWM_NUM 10 - - - -#endif /* __PWM-SUN8IW19_H__ */ - - diff --git a/src/platform/f133/include/hal/sunxi_drv_uart.h b/src/platform/f133/include/hal/sunxi_drv_uart.h deleted file mode 100644 index 5a97e66cccabdc32739a883300b60b1b5c6cc8e0..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_drv_uart.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef SUNXI_DRV_UART_H -#define SUNXI_DRV_UART_H -#include -typedef struct sunxi_driver_uart -{ - struct devfs_node base; - int32_t dev_id; - const void *hal_drv; -} sunxi_driver_uart_t; - -#endif /*SUNXI_DRV_UART_H*/ diff --git a/src/platform/f133/include/hal/sunxi_hal_ahb.h b/src/platform/f133/include/hal/sunxi_hal_ahb.h deleted file mode 100644 index e723b40239593b6441a79d659b58aafa52f7ba80..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_ahb.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. - - * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in - * the the People's Republic of China and other countries. - * All Allwinner Technology Co.,Ltd. trademarks are used with permission. - - * DISCLAIMER - * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. - * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) - * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN - * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. - * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS - * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. - * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. - - - * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT - * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING - * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE - * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __HAL_AHB_H -#define __HAL_AHB_H - -#include - -#define ahb_err(fmt, args...) printf("%s()%d - "fmt, __func__, __LINE__, ##args) - -/* AHB HUSTER ids */ -enum ahb_huster { - AHB_CPU0 = 0, /* CPU0 bandwidth */ - AHB_CPU1, /* CPU1 bandwidth */ - AHB_RISCV, /* RISCV */ - AHB_DSP, /* DSP */ - AHB_CE, /* CE */ - AHB_DMA0, /* DMA0 */ - AHB_DMA1, /* DMA1 */ - AHB_CSI, /* CSI */ - AHB_ST0, /* ST0 */ - AHB_ST1, /* ST1 */ -}; - -typedef enum{ - HAL_AHB_STATUS_BUSY_CHANNEL = -4, - HAL_AHB_STATUS_ERROR_PARAMETER = -3, - HAL_AHB_STATUS_ERROR_CHANNEL = -2, - HAL_AHB_STATUS_ERROR = -1, - HAL_AHB_STATUS_OK = 0 -}hal_ahb_status_t; - -hal_ahb_status_t hal_ahb_huster_get_value(enum ahb_huster type, unsigned int *value); -hal_ahb_status_t hal_ahb_huster_enable(void); -hal_ahb_status_t hal_ahb_disable_id_chan(enum ahb_huster type); - -uint32_t ahb_get_sum_total_read(void); -uint32_t ahb_get_sum_total_write(void); -uint32_t ahb_get_max_total_read(void); -uint32_t ahb_get_max_total_write(void); - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_avs.h b/src/platform/f133/include/hal/sunxi_hal_avs.h deleted file mode 100644 index f267ec0ae039d5258fbfe3bb3824113d30fb51c6..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_avs.h +++ /dev/null @@ -1,102 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTYS TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERSSDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTYS TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef SUNXI_HAL_AVS_H -#define SUNXI_HAL_AVS_H - -#include "hal_interrupt.h" -#include "sunxi_hal_common.h" -#include -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define CONFIG_DRIVERS_TMR_DEBUG - -#ifdef CONFIG_DRIVERS_TMR_DEBUG -#define AVS_INFO(fmt, arg...) hal_log_info(fmt, ##arg) -#else -#define AVS_INFO(fmt, arg...) do {}while(0) -#endif - -#define AVS_ERR(fmt, arg...) hal_log_err(fmt, ##arg) - -#define AVS_CNT_CTRL_REG (0x00C0) -#define AVS_CNT_REG(n) (0x00C4 + 0x0004 * n) -#define AVS_CNT_DIV_REG (0x00CC) -#define AVS_DIV_MASK 0xfff - -typedef enum -{ - AVS_ENABLE = 0, - AVS_DISABLE, - AVS_PAUSE, - AVS_CONTINUE, - AVS_GET_COUNTER, - AVS_SET_COUNTER, - AVS_SET_DIV, -} hal_avs_cmd_t; - -typedef enum -{ - AVS0 = 0, - AVS1, - AVS_NUM, -} hal_avs_id_t; - -typedef struct -{ - hal_avs_id_t id; - unsigned long base; - hal_clk_t clk; - u8 enable; -} hal_sunxi_avs; - -int hal_avs_continue(hal_avs_id_t id); -int hal_avs_pause(hal_avs_id_t id); -int hal_avs_disable(hal_avs_id_t id); -int hal_avs_enable(hal_avs_id_t id); -int hal_avs_get_counter(hal_avs_id_t id, u32 *counter); -int hal_avs_set_counter(hal_avs_id_t id, u32 counter); -int hal_avs_set_cnt_div(hal_avs_id_t id, u32 div); -int hal_avs_init(hal_avs_id_t id); -int hal_avs_uninit(hal_avs_id_t id); -int hal_avs_control(hal_avs_id_t id, hal_avs_cmd_t cmd, void *arg); - -#ifdef __cplusplus -} -#endif -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_ce.h b/src/platform/f133/include/hal/sunxi_hal_ce.h deleted file mode 100644 index afb837e5ce9c2336246c3ccfaa7a0dbbc19b2dd8..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_ce.h +++ /dev/null @@ -1,106 +0,0 @@ -#ifndef SUNXI_HAL_TWI_H -#define SUNXI_HAL_TWI_H - -#include "hal_sem.h" -#include "hal_clk.h" -#include "sunxi_hal_common.h" -#include "hal_gpio.h" -#include "sunxi_hal_regulator.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define CE_ALIGN_SIZE (0x4) -#define CE_ROUND_UP(x,y) ((((x) + ((y) - 1)) / (y)) * (y)) - -#define AES_KEYSIZE_128 128 -#define AES_KEYSIZE_192 192 -#define AES_KEYSIZE_256 256 - -#define AES_BLOCK_SIZE (16) - -/*define the ctx for aes requtest*/ -typedef struct { - uint8_t *src_buffer; - uint32_t src_length; - uint8_t *dst_buffer; - uint32_t dst_length; - uint8_t *iv; - uint8_t *iv_next; - uint8_t *key; - uint32_t key_length; - __aligned(CACHELINE_LEN) uint8_t padding[AES_BLOCK_SIZE]; - uint32_t padding_len; - uint32_t dir; - uint32_t mode; - uint32_t bitwidth; -} crypto_aes_req_ctx_t; - -/*define the ctx for hash requtest*/ -#define SHA_MAX_DIGEST_SIZE (64) -#define MD5_DIGEST_SIZE (16) -#define SHA1_DIGEST_SIZE (20) -#define SHA224_DIGEST_SIZE (28) -#define SHA256_DIGEST_SIZE (32) -#define SHA384_DIGEST_SIZE (48) -#define SHA512_DIGEST_SIZE (64) - -#define MD5_BLOCK_SIZE (64) -#define SHA1_BLOCK_SIZE (64) -#define SHA224_BLOCK_SIZE (64) -#define SHA256_BLOCK_SIZE (64) -#define SHA384_BLOCK_SIZE (128) -#define SHA512_BLOCK_SIZE (128) - -typedef struct { - uint8_t *src_buffer; - uint32_t src_length; - uint8_t *dst_buffer; - uint32_t dst_length; - __aligned(CACHELINE_LEN) uint8_t md[SHA_MAX_DIGEST_SIZE]; - uint32_t md_size; - __aligned(CACHELINE_LEN) uint8_t padding[SHA512_BLOCK_SIZE * 2]; - uint32_t padding_len; - uint32_t type; - uint32_t dir; - uint32_t padding_mode; -} crypto_hash_req_ctx_t; - -typedef struct { - uint8_t *rng_buf; - uint32_t rng_len; - uint32_t mode; - uint8_t *key; - uint32_t key_len; -} crypto_rng_req_ctx_t; - -/*define the ctx for rsa requtest*/ -typedef struct { - uint8_t *key_n; - uint32_t n_len; - uint8_t *key_e; - uint32_t e_len; - uint8_t *key_d; - uint32_t d_len; - uint8_t *src_buffer; - uint32_t src_length; - uint8_t *dst_buffer; - uint32_t dst_length; - uint32_t dir; - uint32_t type; - uint32_t bitwidth; -} crypto_rsa_req_ctx_t; - -int do_aes_crypto(crypto_aes_req_ctx_t *req_ctx); -int sunxi_ce_init(void); -int sunxi_ce_uninit(void); -int do_hash_crypto(crypto_hash_req_ctx_t *req_ctx); -int do_rsa_crypto(crypto_rsa_req_ctx_t *req_ctx); -int do_rng_gen(crypto_rng_req_ctx_t *req_ctx); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_cir.h b/src/platform/f133/include/hal/sunxi_hal_cir.h deleted file mode 100644 index 1de3efecbb8933ad68b8c270f1a0962d5aaeabc7..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_cir.h +++ /dev/null @@ -1,216 +0,0 @@ -/* - * =========================================================================================== - * - * Filename: sunxi_hal_spi.h - * - * Description: SPI HAL definition. - * - * Version: Melis3.0 - * Create: 2020-04-08 11:11:56 - * Revision: none - * Compiler: GCC:version 9.2.1 - * - * Author: bantao@allwinnertech.com - * Organization: SWC-BPD - * Last Modified: 2020-04-08 16:02:11 - * - * =========================================================================================== - */ - -#ifndef _CIR_H_ -#define _CIR_H_ - -#include "hal_clk.h" -#include "hal_reset.h" - -#ifdef CONFIG_COMPONENTS_PM -#include -#endif - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Registers */ -#define CIR_CTRL (0x00) /* IR Control */ -#define CIR_RXCTRL (0x10) /* Rx Config */ -#define CIR_RXFIFO (0x20) /* Rx Data */ -#define CIR_RXINT (0x2C) /* Rx Interrupt Enable */ -#define CIR_RXSTA (0x30) /* Rx Interrupt Status */ -#define CIR_CONFIG (0x34) /* IR Sample Config */ - -/*CIR_CTRL*/ -#define GEN_OFFSET 0 -#define RXEN_OFFSET 1 -#define CIR_ENABLE_OFFSET 4 -#define CIR_MODE_OFFSET 6 -/*global enable*/ -#define GEN (0x01 << GEN_OFFSET) -/*receiver block enable*/ -#define RXEN (0x01 << RXEN_OFFSET) -/*cir enable*/ -#define CIR_ENABLE (0x03 << CIR_ENABLE_OFFSET) -/*active pulse accept mode*/ -#define CIR_MODE (0x03 << CIR_MODE_OFFSET) - -/*CIR_RXCTRL*/ -#define RPPI_OFFSET 2 -#define RPPI (0x01 << RPPI_OFFSET) /*receiver pulse polarity invert*/ - -/*CIR_RXINT*/ -#define ROI_EN_OFFSET 0 -#define PREI_EN_OFFSET 1 -#define RAI_EN_OFFSET 4 -#define DRQ_EN_OFFSET 5 -#define RAL_OFFSET 8 -/*receiver fifo overrun interrupt enable*/ -#define ROI_EN (0x01 << ROI_EN_OFFSET) -/*receiver packet end interrupt enable*/ -#define PREI_EN (0x01 << PREI_EN_OFFSET) -/*rx fifo available interrupt enable*/ -#define RAI_EN (0x01 << RAI_EN_OFFSET) -/*rx fifo dma enable*/ -#define DRQ_EN (0x01 << DRQ_EN_OFFSET) -/*rx fifo available received byte level*/ -#define RAL (0x3f << RAL_OFFSET) -#define IRQ_MASK (0x3f) - -/*CIR_RXSTA*/ -#define ROI_OFFSET 0 -#define RPE_OFFSET 1 -#define RA_OFFSET 4 -#define STAT_OFFSET 7 -#define RAC_OFFSET 8 -#define ROI (0x01 << ROI_OFFSET) /*receiver fifo overrun*/ -#define RPE (0x01 << RPE_OFFSET) /*receiver packet end reg*/ -#define RA (0x01 << RA_OFFSET) /*rx fifo available*/ -#define STAT (0x01 << STAT_OFFSET) /*status of cir, 0:idle, 1:busy*/ -#define RAC (0x7f << RAC_OFFSET) /*rx fifo available counter*/ - -/*CIR_CONFIG*/ -#define SCS_OFFSET 0 -#define NTHR_OFFSET 2 -#define ITHR_OFFSET 8 -#define ATHR_OFFSET 16 -#define ATHC_OFFSET 23 -#define SCS2_OFFSET 24 -#define SCS (0x03 << SCS_OFFSET) /*sample clk select for cir*/ -#define NTHR (0x3f << NTHR_OFFSET) /*noise threshold for cir*/ -#define ITHR (0xff << ITHR_OFFSET) /*idle threshold for cir*/ -#define ATHR (0x7f << ATHR_OFFSET) /*active threshold for cir*/ -#define ATHC (0x01 << ATHC_OFFSET) /*active threshold control for cir*/ -#define SCS2 (0x01 << SCS2_OFFSET) /*bit2 of sample clock select for cir*/ - -#define CIR_NOISE_THR_NEC 32 -#define CIR_NOISE_THR_RC5 22 - -/* Idle Threshold = (11+1)*128clock*10.7us = 16ms > 9ms */ -#define RXIDLE_VAL (11) - -/* Active Threshold (1+1)*128clock*10.7us = 2.6ms */ -#define ACTIVE_T_SAMPLE (32) - -typedef enum { - CIR_MASTER_0 = 0, - CIR_MASTER_NUM, -} cir_port_t; - -typedef enum { - CIR_BOTH_PULSE = 0x01, /*both positive and negative pulses*/ - CIR_LOW_PULSE = 0x02, /*only negative pulse*/ - CIR_HIGH_PULSE = 0x03, /*only positive pulse*/ -} cir_mode_t; - -typedef enum { - CIR_PIN_ERR = -4, - CIR_CLK_ERR = -3, - CIR_IRQ_ERR = -2, - CIR_PORT_ERR = -1, - CIR_OK = 0, -} cir_status_t; - -typedef enum { - CIR_CLK_DIV64 = 0x0, - CIR_CLK_DIV128 = 0x01, - CIR_CLK_DIV256 = 0x02, - CIR_CLK_DIV512 = 0x03, - CIR_CLK = 0x04, -} cir_sample_clock_t; - -typedef struct { - uint32_t gpio; - uint8_t enable_mux; - uint8_t disable_mux; -} cir_gpio_t; - -typedef struct { - uint32_t bus_clk; - uint32_t mclk; - uint32_t pclk; -} cir_clk_t; - -typedef int (*cir_callback_t)(cir_port_t port, uint32_t data_type, uint32_t data); - -static u32 sunxi_irrx_regs_offset[] = { - CIR_CTRL, - CIR_RXCTRL, - CIR_RXINT, - CIR_CONFIG, -}; - -typedef struct { - cir_port_t port; - unsigned long base; - uint32_t irq; - cir_clk_t *clk; - cir_gpio_t *pin; - cir_callback_t callback; - uint8_t status; - - hal_clk_t bclk; - hal_clk_t pclk; - hal_clk_t mclk; - hal_clk_t test_clk; - - hal_clk_id_t m_clk_id; - hal_clk_id_t p_clk_id; - hal_clk_id_t b_clk_id; - hal_clk_id_t test_clk_id; - - hal_clk_type_t cir_clk_type_R; - hal_clk_type_t cir_clk_type_FIXED; - hal_clk_type_t test_clk_type; - - struct reset_control *cir_reset; - u32 regs_backup[ARRAY_SIZE(sunxi_irrx_regs_offset)]; -#ifdef CONFIG_COMPONENTS_PM - struct pm_device pm; -#endif -} sunxi_cir_t; - -void sunxi_cir_callback_register(cir_port_t port, cir_callback_t callback); -void sunxi_cir_mode_enable(cir_port_t port, uint8_t enable); -void sunxi_cir_mode_config(cir_port_t port, cir_mode_t mode); -void sunxi_cir_sample_clock_select(cir_port_t port, cir_sample_clock_t div); -void sunxi_cir_sample_noise_threshold(cir_port_t port, int8_t threshold); -void sunxi_cir_sample_idle_threshold(cir_port_t port, int8_t threshold); -void sunxi_cir_sample_active_threshold(cir_port_t port, int8_t threshold); -void sunxi_cir_sample_active_thrctrl(cir_port_t port, int8_t enable); -void sunxi_cir_fifo_level(cir_port_t port, int8_t size); -void sunxi_cir_irq_enable(cir_port_t port, int enable); -void sunxi_cir_irq_disable(cir_port_t port); -void sunxi_cir_signal_invert(cir_port_t port, uint8_t invert); -void sunxi_cir_module_enable(cir_port_t port, int8_t enable); -cir_status_t sunxi_cir_init(cir_port_t port); -void sunxi_cir_deinit(cir_port_t port); -#ifdef CONFIG_STANDBY -void sunxi_cir_suspend(cir_port_t port); -void sunxi_cir_resume(cir_port_t port); -#endif - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_cir_tx.h b/src/platform/f133/include/hal/sunxi_hal_cir_tx.h deleted file mode 100644 index 1ac84ca4c72bfdd5f9a4c7f8657b3d37e963b74e..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_cir_tx.h +++ /dev/null @@ -1,143 +0,0 @@ -/* - * drivers/media/rc/sunxi-ir-tx.h - * - * Copyright (c) 2013-2021 Allwinnertech Co., Ltd. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef _SUNXI_IR_TX_H -#define _SUNXI_IR_TX_H - -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_COMPONENTS_PM -#include -#endif - -#define IR_TX_GLR (0x00) -#define IR_TX_MCR (0x04) -#define IR_TX_CR (0x08) -#define IR_TX_IDC_H (0x0c) -#define IR_TX_IDC_L (0x10) -#define IR_TX_ICR_H (0x14) -#define IR_TX_ICR_L (0x18) -#define IR_TX_TELR (0x20) -#define IR_TX_INTC (0x24) -#define IR_TX_TACR (0x28) -#define IR_TX_STAR (0x2c) -#define IR_TX_TR (0x30) -#define IR_TX_DMAC (0x34) -#define IR_TX_FIFO_DR (0x80) - -#define IR_TX_GL_VALUE (0xa3) -#define IR_TX_MC_VALUE (0x86) -#define IR_TX_CLK_VALUE (0x05 << 1) -#define IR_TX_IDC_H_VALUE (0x04) -#define IR_TX_IDC_L_VALUE (0x00) -#define IR_TX_TEL_VALUE (0x96 - 1) -#define IR_TX_INT_C_VALUE (0x01) -#define IR_TX_STA_VALUE (0x03) -#define IR_TX_T_VALUE (0x64) -#define IR_TX_CLK 12000000 - -#define IR_TX_FIFO_SIZE (128) - -#define IR_TX_RAW_BUF_SIZE (256) -#define IR_TX_CYCLE_TYPE (0) /* 1:cycle 0:non-cycle */ -#define IR_TX_CLK_Ts (1) - -#define SUNXI_IR_TX_VERSION "v1.0.0" - - -typedef enum { - CIR_TX_PIN_ERR = -4, - CIR_TX_CLK_ERR = -3, - CIR_TX_IRQ_ERR = -2, - CIR_TX_PORT_ERR = -1, - CIR_TX_OK = 0, -} cir_tx_status_t; - -typedef enum { - CIR_TX_CLK_DIV64 = 0x0, - CIR_TX_CLK_DIV128 = 0x01, - CIR_TX_CLK_DIV256 = 0x02, - CIR_TX_CLK_DIV512 = 0x03, - CIR_TX_CLK = 0x04, -} cir_tx_sample_clock_t; - -typedef struct { - uint32_t gpio; - uint8_t enable_mux; - uint8_t disable_mux; -} cir_gpio_t; - -struct cmd { - unsigned char protocol, address, command; -}; - -enum { - DEBUG_INIT = 1U << 0, - DEBUG_INFO = 1U << 1, - DEBUG_SUSPEND = 1U << 2, -}; - -static u32 sunxi_irtx_regs_offset[] = { - IR_TX_MCR, - IR_TX_CR, - IR_TX_IDC_H, - IR_TX_IDC_L, - IR_TX_STAR, - IR_TX_INTC, - IR_TX_GLR, - IR_TX_TR, -}; - -struct sunxi_cir_tx_t { - unsigned long reg_base; - uint32_t irq; - uint8_t status; - cir_gpio_t *pin; - - hal_clk_t bclk; - hal_clk_t gclk; - - hal_clk_id_t b_clk_id; - hal_clk_id_t g_clk_id; - - hal_clk_type_t cir_tx_clk_type; - - struct reset_control *cir_reset; - u32 regs_backup[ARRAY_SIZE(sunxi_irtx_regs_offset)]; -#ifdef CONFIG_COMPONENTS_PM - struct pm_device pm; -#endif -}; - -struct cir_tx_raw_buffer { - unsigned int tx_dcnt; - unsigned char tx_buf[IR_TX_RAW_BUF_SIZE]; -}; - -cir_tx_status_t hal_cir_tx_init(struct sunxi_cir_tx_t *cir_tx); -void hal_cir_tx_set_duty_cycle(int duty_cycle); -void hal_cir_tx_set_carrier(int carrier_freq); -void hal_cir_tx_xmit(unsigned int *txbuf, unsigned int count); -//void send_ir_code(struct sunxi_cir_tx_t *cir_tx); - -#define IR_TX_IOCSEND _IOR(66, 1, struct cmd) - -#endif /* _SUNXI_IR_TX_H */ diff --git a/src/platform/f133/include/hal/sunxi_hal_common.h b/src/platform/f133/include/hal/sunxi_hal_common.h deleted file mode 100644 index 9b464b05c0b58eb0a9deeb9385efe64dfc757268..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_common.h +++ /dev/null @@ -1,274 +0,0 @@ -#ifndef SUNXI_HAL_COMMON_H -#define SUNXI_HAL_COMMON_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include -#include -#include -#include - -#ifdef CONFIG_DEBUG_BACKTRACE -#include -#endif -#include - -#ifndef min -#define min(a, b) ((a) < (b) ? (a) : (b)) -#endif - -#ifndef max -#define max(a,b) ((a) < (b) ? (b) : (a)) -#endif - -#ifndef MIN -#define MIN(a, b) ((a) < (b) ? (a) : (b)) -#endif - -#ifndef MAX -#define MAX(a,b) ((a) < (b) ? (b) : (a)) -#endif - -#ifndef ARRAY_SIZE -#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) -#endif - -#define __ALIGN_KERNEL(x, a) __ALIGN_KERNEL_MASK(x, (typeof(x))(a) - 1) -#define __ALIGN_KERNEL_MASK(x, mask) (((x) + (mask)) & ~(mask)) - -#ifndef ALIGN_UP -#define ALIGN_UP(x, a) __ALIGN_KERNEL((x), (a)) -#endif - -#ifndef ALIGN_DOWN -#define ALIGN_DOWN(x, a) __ALIGN_KERNEL((x) - ((a) - 1), (a)) -#endif - -#ifndef BIT -#define BIT(x) (1 << x) -#endif - -#define get_bvalue(addr) (*((volatile unsigned char *)(addr))) -#define put_bvalue(addr, v) (*((volatile unsigned char *)(addr)) = (unsigned char)(v)) -#define get_hvalue(addr) (*((volatile unsigned short *)(addr))) -#define put_hvalue(addr, v) (*((volatile unsigned short *)(addr)) = (unsigned short)(v)) -#define get_wvalue(addr) (*((volatile unsigned int *)(addr))) -#define put_wvalue(addr, v) (*((volatile unsigned int *)(addr)) = (unsigned int)(v)) - -#define set_byte(addr, v) (*((volatile unsigned char *)(addr)) |= (unsigned char)(v)) -#define clr_byte(addr, v) (*((volatile unsigned char *)(addr)) &= ~(unsigned char)(v)) -#define set_half_word(addr, v) (*((volatile unsigned short *)(addr)) |= (unsigned short)(v)) -#define clr_half_word(addr, v) (*((volatile unsigned short *)(addr)) &= ~(unsigned short)(v)) -#define set_word(addr, v) (*((volatile unsigned int *)(addr)) |= (unsigned int)(v)) -#define clr_word(addr, v) (*((volatile unsigned int *)(addr)) &= ~(unsigned int)(v)) - -#ifndef readb -#define readb(addr) (*((volatile unsigned char *)(addr))) -#endif -#ifndef readw -#define readw(addr) (*((volatile unsigned short *)(addr))) -#endif -#ifndef readl -#define readl(addr) (*((volatile unsigned int *)(unsigned long)(addr))) -#endif -#ifndef writeb -#define writeb(v, addr) (*((volatile unsigned char *)(addr)) = (unsigned char)(v)) -#endif -#ifndef writew -#define writew(v, addr) (*((volatile unsigned short *)(addr)) = (unsigned short)(v)) -#endif -#ifndef writel -#define writel(v, addr) (*((volatile unsigned int *)(unsigned long)(addr)) = (unsigned int)(v)) -#endif - -#define cmp_wvalue(addr, v) (v == (*((volatile unsigned int *) (addr)))) - -/* common register access operation. */ -#define hal_readb(reg) (*(volatile uint8_t *)(long)(reg)) -#define hal_readw(reg) (*(volatile uint16_t *)(reg)) -#define hal_readl(reg) (*(volatile uint32_t *)(reg)) -#define hal_writeb(value,reg) (*(volatile uint8_t *)(long)(reg) = (value)) -#define hal_writew(value,reg) (*(volatile uint16_t *)(reg) = (value)) -#define hal_writel(value,reg) (*(volatile uint32_t *)(reg) = (value)) - -#ifndef OK -#define OK (0) -#endif -#ifndef FAIL -#define FAIL (-1) -#endif -#ifndef TRUE -#define TRUE (1) -#endif -#ifndef FALSE -#define FALSE (0) -#endif -#ifndef true -#define true 1 -#endif -#ifndef false -#define false 0 -#endif - -#ifndef NULL -#define NULL 0 -#endif - -#define CACHELINE_LEN (64) - -typedef uint64_t u64; -typedef uint32_t u32; -typedef uint16_t u16; -typedef uint8_t u8; -typedef int64_t s64; -typedef int32_t s32; -typedef int16_t s16; -typedef int8_t s8; - -#define HAL_ARG_UNUSED(NAME) (void)(NAME) - -/* general function pointer defines */ -typedef s32 (*__pCBK_t) (void *p_arg); /* call-back */ -typedef s32 (*__pISR_hdle_t) (void *p_arg); /* ISR */ - -typedef s32(*__pNotifier_t) (u32 message, u32 aux); /* notifer call-back */ -typedef s32(*__pCPUExceptionHandler) (void); /* cpu exception handler pointer */ - -#define BUG() do { \ - printf("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \ - backtrace(NULL, NULL, 0, 0, printf); \ - while(1); \ - } while (0) - -#ifndef BUG_ON -#define BUG_ON(condition) do { if (unlikely(condition)) BUG(); } while (0) -#define WARN_ON(condition) ({ \ - int __ret_warn_on = !!(condition); \ - unlikely(__ret_warn_on); \ - }) -#endif - -#ifndef WARN -#define WARN(condition, format...) ({ \ - int __ret_warn_on = !!(condition); \ - if(__ret_warn_on) \ - printf(format); \ - unlikely(__ret_warn_on); \ - }) -#endif - -#ifdef CONFIG_DEBUG_BACKTRACE -#define hal_assert(ex) \ - if (!(ex)) { \ - printf("%s line %d, fatal error.\n", __func__, __LINE__); \ - backtrace(NULL, NULL, 0, 0, printf); \ - while(1); \ - } -#else -#define hal_assert(ex) \ - if (!(ex)) { \ - printf("%s line %d, fatal error.\n", __func__, __LINE__); \ - while(1); \ - } -#endif - -// version combine. -#define SUNXI_HAL_VERSION_MAJOR_MINOR(major, minor) (((major) << 8) | (minor)) - -typedef struct sunxi_hal_version -{ - // API version NO. - uint16_t api; - - // Driver version NO. - uint16_t drv; -} sunxi_hal_version_t; - -// General return code of hal driver. -#define SUNXI_HAL_OK 0UL -// Unspecified error. -#define SUNXI_HAL_ERROR -1UL -// Hal is busy. -#define SUNXI_HAL_ERROR_BUSY -2UL -// Timout occured. -#define SUNXI_HAL_ERROR_TIMEOUT -3UL -// Operaion not supported. -#define SUNXI_HAL_ERROR_UNSUPOT -4UL -// Parameter error. -#define SUNXI_HAL_ERROR_PARAERR -5UL -// Start of driver specific errors. -#define SUNXI_HAL_ERROR_DRVSPECIFIC -6UL - -typedef enum sunxi_hal_power_state -{ - ///< Power off: no operation possible - SUSNXI_HAL_POWER_OFF, - ///< Low Power mode: retain state, detect and signal wake-up events - SUSNXI_HAL_POWER_LOW, - ///< Power on: full operation at maximum performance - SUSNXI_HAL_POWER_FULL -} sunxi_hal_power_state_e; - -typedef int32_t (*poll_wakeup_func)(int32_t dev_id, short key); - -typedef struct _sunxi_hal_poll_ops -{ - int32_t (* check_poll_state) (int32_t dev, short key); - int32_t (* hal_poll_wakeup) (int32_t dev, short key); - int32_t (* register_poll_wakeup) (poll_wakeup_func poll_wakeup); -} sunxi_hal_poll_ops; - -/* bitops */ -static inline unsigned int fls(unsigned int val) -{ - unsigned int bit = 32; - - if (!val) - return 0; - if (!(val & 0xffff0000u)) - { - val <<= 16; - bit -= 16; - } - if (!(val & 0xff000000u)) - { - val <<= 8; - bit -= 8; - } - if (!(val & 0xf0000000u)) - { - val <<= 4; - bit -= 4; - } - if (!(val & 0xc0000000u)) - { - val <<= 2; - bit -= 2; - } - if (!(val & 0x80000000u)) - { - bit -= 1; - } - - return bit; -} - -void dma_free_coherent(void *addr); -void *dma_alloc_coherent(size_t size); -void dma_free_coherent_align(void *addr); -void *dma_alloc_coherent_align(size_t size, int align); - -#ifdef CONFIG_COMPONENTS_AMP -void *amp_align_malloc(int size); -void amp_align_free(void *ptr); -#endif - -#ifdef __cplusplus -} -#endif - -#endif /*SUNXI_HAL_COMMON_H*/ - diff --git a/src/platform/f133/include/hal/sunxi_hal_dbi.h b/src/platform/f133/include/hal/sunxi_hal_dbi.h deleted file mode 100644 index a6f4542c633144de8f117cd0d1df3e9ba8b70392..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_dbi.h +++ /dev/null @@ -1,275 +0,0 @@ -/* - * =========================================================================================== - * - * Filename: sunxi_hal_DBI.h - * - * Description: DBI HAL definition. - * - * Version: FreeRTOS - * Create: 2022-2-10 11:11:56 - * Revision: none - * Author: libairong@allwinnertech.com - * Organization: SWC-BPD - * Last Modified: 2022-3-21 16:02:11 - * - * =========================================================================================== - */ -#ifndef SUNXI_HAL_DBI_H -#define SUNXI_HAL_DBI_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "sunxi_hal_common.h" -#include -#include -#include -#include -#include -#include - -#define DBI_WRITE 0 -#define DBI_READ 1 - -typedef enum -{ - HAL_DBI_MASTER_0 = 0, /**< dbi master port 0 */ - HAL_DBI_MASTER_1 = 1, /**< dbi master port 1 */ - HAL_DBI_MASTER_MAX, /**< dbi master max port number\ */ -} hal_dbi_master_port_t; - -typedef enum -{ - DBI_MODE_ALLWAYS_ON = 0,//0:always on mode - DBI_MODE_SOFTWARE_TRIGGER = 1,//1:software trigger mode - DBI_MODE_TIMER_TRIGGER = 2,//2:timer trigger mode - DBI_MODE_TE_TRIGGER = 3,//3:te trigger mode -} hal_dbi_en_mode_t; - -typedef enum -{ - HAL_DBI_RGB666_FMT_NORMAL = 0,//0:normal format - HAL_DBI_RGB666_FMT_ILITEK = 1,//1 special format for ILITEK - HAL_DBI_RGB666_FMT_NEW_VISION = 2,//2 special format for new vision -} hal_dbi_rgb666_format_t; - -typedef enum -{ - DBI_RGB111 = 0, - DBI_RGB444 = 1, - DBI_RGB565 = 2, - DBI_RGB666 = 3, - DBI_RGB888 = 4, -} dbi_output_data_format_t; - -typedef enum { - L3I1 = 0, - L3I2 = 1, - L4I1 = 2, - L4I2 = 3, - D2LI = 4, -}dbi_interface_t; - -typedef enum { - DBI_SRC_RGB = 0, - DBI_SRC_RBG = 1, - DBI_SRC_GRB = 2, - DBI_SRC_GBR = 3, - DBI_SRC_BRG = 4, - DBI_SRC_BGR = 5, - /* following definition only for rgb565 - * to change the RGB order in two byte(16 bit). - * format:R(5bit)--G_1(3bit)--G_0(3bit)--B(5bit) - * G_0 mean the low 3 bit of G component - * G_1 mean the high 3 bit of G component - * */ - DBI_SRC_GRBG_0 = 6, - DBI_SRC_GRBG_1 = 7, - DBI_SRC_GBRG_0 = 8, - DBI_SRC_GBRG_1 = 9, -}dbi_source_format_t; - -typedef struct -{ - u32 cmd_typ;//Command type : 0:write command, 1 read command - u32 write_dump;//Write Command dummy cycles - u32 output_data_sequence;//Output data sequence: 0 MSB first,1 LSB first - u32 rgb_seq;//Output RGB sequence - u32 transmit_mode;//Transmit Mode:0 conmmand /Parameter - dbi_output_data_format_t dbi_output_data_format;//output Data Format - dbi_interface_t dbi_interface;//DBI interface - dbi_source_format_t dbi_source_format; - u32 dump_value;//dummy cycl value,output value during cycle - u32 rgb_bit_order;//RGB bit order - u32 epos;//Element position only for RGB32 Data Format - u32 rgb_src_typ;//RGB Source type :0 RGB 32,1 RGB16 - - hal_dbi_en_mode_t dbi_en_mode;//DBI enable mode select:0 always on mode;1software trgger mode;2 timer trgger mode; 3 te trigger mode - u32 rgb666_format;//2 Ddata line RGB666 format - u32 dbi_rx_clk_inv;//DBI rx clock inverse:0 、1 - u32 dbi_output_clk_mode;//DBI output clock mode - u32 dbi_clk_output_inv;// DBI clock output inverse - u32 dcx_data;//DCX data value: 0:DCX value equal to 0;1 DCX value equal to 1 - u32 rgb16_pix0_post;//RGB 16 data source sel:1 pixell in hight,0 pixell in low - u32 read_msb_or_lsb;//bit order of read data:0:read data is hight,1 read data is low - u32 read_dump;//read comman dummy cycles - u32 read_num;//Read data number of bytes - - u32 ahb_ready_bypass;//AHB ready bypass - u32 sdi_out_select;//DBI SDI pin output select: 0 ouput WRX,1 output DCX - u32 dcx_select;//DBI DCX pin function select:0 DBI DBX function,1 WRX - u32 sdi_pin_select;//DBI SDI pin function select : 0,DBI_SDI or WRX,1:DBI_TE,2DBI_DCX - u32 te_deb_select;//TE debounce function select :0 debounce,1 no-debounce - u32 te_edge_select;// TE edge trgger select : 0 TE rising edge,1 falling edge - u32 te_en;//te enable:0 disable;1 enable - - u32 v_size; - u32 h_size; - u32 clock_frequency; -} hal_dbi_config_t; - -typedef struct -{ - const uint8_t *tx_buf; /**< Data buffer to send, */ - u32 tx_len; /**< The total number of bytes to send. */ - u32 - tx_single_len; /**< The number of bytes to send in single mode. */ - uint8_t *rx_buf; /**< Received data buffer, */ - u32 rx_len; /**< The valid number of bytes received. */ - uint8_t tx_nbits : 3; /**< Data buffer to send in nbits mode */ - uint8_t rx_nbits : 3; /**< Data buffer to received in nbits mode */ - uint8_t dummy_byte; /**< Flash send dummy byte, default 0*/ -#define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */ -#define SPI_NBITS_DUAL 0x02 /* 2bit transfer */ -#define SPI_NBITS_QUAD 0x04 /* 4bit transfer */ - uint8_t bits_per_word; /**< transfer bit_per_word */ -} hal_dbi_master_transfer_t; - -typedef struct di_dma -{ - struct dma_slave_config config; - struct sunxi_dma_chan *chan; -} dbi_dma_t; - -typedef enum dbi_mode_type -{ - DBI_MODE_TYPE_RX, - DBI_MODE_TYPE_TX, - DBI_MODE_TYPE_NULL, -} dbi_mode_type_t; - -typedef struct sunxi_dbi -{ - int8_t result : 2; -#define SPI_XFER_READY 0 -#define SPI_XFER_OK 1 -#define SPI_XFER_FAILED -1 - - bool sem; - uint16_t irqnum; - unsigned long base; - dbi_mode_type_t mode_type; - - hal_clk_t pclk; /* PLL clock */ - hal_clk_t bus_clk; /* BUS clock */ - hal_clk_t mclk; /* spi module clock */ - struct reset_control *reset; - - gpio_pin_t *pin; - - dbi_dma_t dma_rx; - dbi_dma_t dma_tx; - - char *align_dma_buf; -#define ALIGN_DMA_BUF_SIZE (4096 + 64) - - hal_sem_t xSemaphore_tx; - hal_sem_t xSemaphore_rx; - - hal_dbi_master_port_t port; - - // For user config - hal_dbi_config_t dbi_reg_cfg; - hal_dbi_master_transfer_t* transfer; -} sunxi_dbi_t; -// enum dbi_src_seq { -// DBI_SRC_RGB = 0, -// DBI_SRC_RBG = 1, -// DBI_SRC_GRB = 2, -// DBI_SRC_GBR = 3, -// DBI_SRC_BRG = 4, -// DBI_SRC_BGR = 5, -// /* following definition only for rgb565 -// * to change the RGB order in two byte(16 bit). -// * format:R(5bit)--G_1(3bit)--G_0(3bit)--B(5bit) -// * G_0 mean the low 3 bit of G component -// * G_1 mean the high 3 bit of G component -// * */ -// DBI_SRC_GRBG_0 = 6, -// DBI_SRC_GRBG_1 = 7, -// DBI_SRC_GBRG_0 = 8, -// DBI_SRC_GBRG_1 = 9, -// }; -// enum dbi_out_seq { -// DBI_OUT_RGB = 0, -// DBI_OUT_RBG = 1, -// DBI_OUT_GRB = 2, -// DBI_OUT_GBR = 3, -// DBI_OUT_BRG = 4, -// DBI_OUT_BGR = 5, -// }; - -enum dbi_te_en { - DBI_TE_DISABLE = 0, - DBI_TE_RISING_EDGE = 1, - DBI_TE_FALLING_EDGE = 2, -}; - -// typedef struct { -// enum dbi_src_seq dbi_src_sequence; -// enum dbi_out_seq dbi_out_sequence; -// char dbi_rgb_bit_order; -// char dbi_rgb32_alpha_pos; -// char dbi_rgb16_pixel_endian; -// char dbi_format; /*DBI OUT format*/ -// char dbi_interface; -// u16 dbi_mode; -// char dbi_clk_out_mode; -// u16 dbi_video_v; -// u16 dbi_video_h; -// enum dbi_te_en dbi_te_en; -// void (*dbi_vsync_handle)(unsigned long data); -// char dbi_read_bytes; -// }hal_dbi_config; - -typedef enum -{ - DBI_MASTER_ERROR = -6, /**< DBI master function error occurred. */ - DBI_MASTER_ERROR_NOMEM = -5, /**< DBI master request mem failed. */ - DBI_MASTER_ERROR_TIMEOUT = -4, /**< DBI master xfer timeout. */ - DBI_MASTER_ERROR_BUSY = -3, /**< DBI master is busy. */ - DBI_MASTER_ERROR_PORT = -2, /**< DBI master invalid port. */ - DBI_MASTER_INVALID_PARAMETER = -1, /**< DBI master invalid input parameter. */ - DBI_MASTER_OK = 0 /**< DBI master operation completed successfully. */ -} dbi_master_status_t; - -dbi_master_status_t hal_set_dbi_config(hal_dbi_master_port_t port,hal_dbi_config_t *cfg); -dbi_master_status_t hal_dbi_init(hal_dbi_master_port_t port,hal_dbi_config_t *cfg); -void dbi_send_cmd(hal_dbi_master_port_t port,u8 cmd); -dbi_master_status_t hal_dbi_read(hal_dbi_master_port_t port,void *buf, uint32_t size); -void dbi_send_two_cmd(hal_dbi_master_port_t port,u8 cmd1, u8 cmd2); -void dbi_send_para(hal_dbi_master_port_t port,u8 para); -dbi_master_status_t dbi_send_pixel(hal_dbi_master_port_t port, u32 bufaddr); -dbi_master_status_t hal_dbi_deinit(hal_dbi_master_port_t port); - - -// Code editted by Gilbert -dbi_master_status_t hal_dbi_send_cmd(hal_dbi_master_port_t port,void *buf,u32 size); -dbi_master_status_t hal_dbi_send_para(hal_dbi_master_port_t port,void *buf,u32 size); -dbi_master_status_t hal_dbi_xfer(hal_dbi_master_port_t port, hal_dbi_master_transfer_t *transfer); -#ifdef __cplusplus -} -#endif -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_efuse.h b/src/platform/f133/include/hal/sunxi_hal_efuse.h deleted file mode 100644 index a17ed2d27a8d42c0728a1abab800d12c1f0c7890..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_efuse.h +++ /dev/null @@ -1,66 +0,0 @@ -/* -********************************************************************************************************************** -* -* the Embedded Secure Bootloader System -* -* -* Copyright(C), 2006-2014, Allwinnertech Co., Ltd. -* All Rights Reserved -* -* File : -* -* By : -* -* Version : V2.00 -* -* Date : -* -* Descript: -********************************************************************************************************************** -*/ - -#ifndef __SUNXI_SID_H__ -#define __SUNXI_SID_H__ - -#define CHIP_VER_A 0x0 -#define CHIP_VER_B 0x1 -#define CHIP_VER_C 0x2 -#define CHIP_VER_D 0x3 - -typedef enum efuse_err -{ - EFUSE_ERR_ARG = -1, - EFUSE_ERR_KEY_NAME_WRONG = -2, - EFUSE_ERR_KEY_SIZE_TOO_BIG = -3, - EFUSE_ERR_PRIVATE = -4, - EFUSE_ERR_ALREADY_BURNED = -5, - EFUSE_ERR_READ_FORBID = -6, - EFUSE_ERR_BURN_TIMING = -7, - EFUSE_ERR_NO_ACCESS = -8, - EFUSE_ERR_INVALID_ROTPK = -9, -}efuse_err_e; - -/* internal struct */ -typedef struct efuse_key_map_new{ - #define SUNXI_KEY_NAME_LEN 64 - char name[SUNXI_KEY_NAME_LEN]; /* key_name */ - int offset; /* key_addr offset */ - int size; /* unit: bit */ - int rd_fbd_offset; /* key can read or not */ - int burned_flg_offset; /* key has burned or not */ - int sw_rule; -}efuse_key_map_new_t; - - -int hal_efuse_write(char *key_name, unsigned char *key_data, size_t key_bit_len); -int hal_efuse_read(char *key_name, unsigned char *key_data, size_t key_bit_len); -int hal_efuse_read_ext(uint32_t start_bit, uint32_t bit_num, uint8_t *data); -int hal_efuse_set_security_mode(void); -int hal_efuse_get_security_mode(void); -int hal_efuse_get_chipid(unsigned char *buffer); -int hal_efuse_get_thermal_cdata(unsigned char *buffer); -int hal_efuse_get_chip_ver(void); -int hal_get_module_param_from_sid(uint32_t *dst, uint32_t offset, uint32_t len); - -efuse_key_map_new_t *efuse_search_key_by_name(const char *key_name); -#endif /* #ifndef __EFUSE_H__ */ diff --git a/src/platform/f133/include/hal/sunxi_hal_eise.h b/src/platform/f133/include/hal/sunxi_hal_eise.h deleted file mode 100644 index cb2561e3b03bce1f3f97e851ca5c6a63e244d938..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_eise.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * =========================================================================================== - * - * Filename: sunxi_eise.h - * - * Description: EISE HAL definition. - * - * Version: Melis3.0 - * Create: 2020-01-09 11:11:56 - * Revision: none - * Compiler: - * - * Author: ganqiuye(ganqiuye@allwinnertech.com) - * Organization: SWC-MPD - * Last Modified: 2020-04-02 17:32:52 - * - * =========================================================================================== - */ - -#ifndef SUNXI_HAL_EISE_H -#define SUNXI_HAL_EISE_H -#include -#include "hal_sem.h" -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "sunxi_hal_common.h" - -#define DEVICE_NAME "sunxi_eise" - -/* system address */ -#define PLL_ISE_CTRL_REG (0x00D0) -#define EISE_CLK_REG (0x06D0) -#define MBUS_CLK_GATING_REG (0x0804) -#define EISE_BGR_REG (0x06DC) - -/* eise register */ -#define EISE_CTRL_REG (0x00) -#define EISE_IN_SIZE (0x28) -#define EISE_OUT_SIZE (0x38) -#define EISE_ICFG_REG (0x04) -#define EISE_OCFG_REG (0x08) -#define EISE_INTERRUPT_EN (0x0c) -#define EISE_TIME_OUT_NUM (0x3c) - -#define EISE_INTERRUPT_STATUS (0x10) -#define EISE_ERROR_FLAG (0x14) -#define EISE_RESET_REG (0x88) - - -struct eise_register{ - unsigned int addr; - unsigned int value; -}; - -typedef struct hal_eise_t{ - unsigned int eise_base_addr; - unsigned int ccmu_base_addr; - // unsigned long err_cnt; - //unsigned long interrupt_times; - unsigned int irq_id; - hal_clk_id_t pclk; - hal_clk_id_t mclk; - hal_sem_t hal_sem; -}hal_eise_t; - -typedef struct sunxi_hal_driver_eise -{ - int32_t (*initialize)(int32_t dev); - - int32_t (*uninitialize)(int32_t dev); - - int32_t (*send)(int32_t dev, const char *data, uint32_t num); - - int32_t (*receive)(int32_t dev, int *data, uint32_t num); - - int32_t (*control)(int32_t dev, uint32_t control, void* arg); - sunxi_hal_poll_ops *poll_ops; -} const sunxi_hal_driver_eise_t; - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_flashctrl.h b/src/platform/f133/include/hal/sunxi_hal_flashctrl.h deleted file mode 100644 index 640b6a84226089e6d2fb3a9a4acf129005f1b521..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_flashctrl.h +++ /dev/null @@ -1,872 +0,0 @@ -/** - * @file hal_flashctrl.h - * @author XRADIO IOT WLAN Team - */ - -/* - * Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_HAL_FLASHCTRL_H_ -#define _DRIVER_CHIP_HAL_FLASHCTRL_H_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef __cplusplus - #define __I volatile /* !< Defines 'read only' permissions */ -#else - #define __I volatile const /* !< Defines 'read only' permissions */ -#endif -#define __O volatile /* !< Defines 'write only' permissions */ -#define __IO volatile /* !< Defines 'read / write' permissions */ - -#if (CONFIG_CHIP_ARCH_VER == 3) -#define FLASH_XIP_OPT_READ //debug r128 -//#define FLASH_XIP_OPT_WRITE /* close for not stable */ -//#define FLASH_XIP_OPT_ERASR -#endif - -// #define FLASH_DMA_TRANSFER_MIN_SIZE (64) -#define FLASH_DMA_TRANSFER_MIN_SIZE (64000) //no dma - -//#define FLASH_ISPR_MASK_NUM howmany(MAX_IRQn, 32) -#define FLASH_ISPR_MASK_NUM 32 - -#define FLASH_SWITCH_OUT_MS 2 -#define FLASH_CHECK_BUSY_US 200 -#define FLASH_BUSY_TIMEOUT_US 2000000 - - -#ifdef FLASH_XIP_OPT_ERASR -#define FLASH_REERASE_CHECK -#endif - -#ifdef FLASH_XIP_OPT_WRITE -#define FLASH_REWRITE_CHECK -#endif - -#define FLASHCTRL_ARCH_V2 (CONFIG_CHIP_ARCH_VER > 1) - -typedef enum { - FLASH_ADDR_XIP_IDX = 0, - FLASH_ADDR_PSRAM_IDX = 1, - FLASH_ADDR_USER_RD_IDX = 2, - FLASH_ADDR_TZ_XIP_IDX = 3, - FLASH_ADDR_TZ_PSRAM_IDX = 4, - FLASH_ADDR_FIELD_NUM = 6 -} FLASHC_BIAS_INDEX; - -typedef struct { - __IO uint32_t START_ADDR; /* , Address offset: N * 0x4 + 0x00 */ - __IO uint32_t END_ADDR; /* , Address offset: N * 0x4 + 0x04 */ - __IO uint32_t BIAS_ADDR; /* , Address offset: N * 0x4 + 0x08 */ - __I uint32_t RESERVE0C; /* , Address offset: N * 0x4 + 0x0C */ -} FADDR_T; - -typedef struct { - __IO uint32_t MEM_COM_CONFG; /* , Address offset: 0x000 */ - __IO uint32_t SQPI_CTRL_COM_CONFG; /* , Address offset: 0x004 */ - __IO uint32_t CACHE_RLVT_CONFG; /* , Address offset: 0x008 */ - __IO uint32_t MEM_AC_CHR_TIMING_CONFG; /* , Address offset: 0x00C */ - __IO uint32_t CBUS_RD_OPRT_CONFG; /* , Address offset: 0x010 */ - __IO uint32_t CBUS_WR_OPRT_CONFG; /* , Address offset: 0x014 */ - __IO uint32_t CBUS_RD_DUMMY_DATA_TOP_HALF; /* , Address offset: 0x018 */ - __IO uint32_t CBUS_RD_DUMMY_DATA_BUTT_HALF; /* , Address offset: 0x01C */ - __IO uint32_t CBUS_WR_DUMMY_DATA_TOP_HALF; /* , Address offset: 0x020 */ - __IO uint32_t CBUS_WR_DUMMY_DATA_BUTT_HALF; /* , Address offset: 0x024 */ - __IO uint32_t CBUS_IO_SW_WAIT_TIME; /* , Address offset: 0x028 */ - __IO uint32_t SBUS_RW_OPRT_CONFG; /* , Address offset: 0x02C */ - __IO uint32_t SBUS_ADDR_CONFG; /* , Address offset: 0x030 */ - __IO uint32_t SBUS_DUMMY_DATA_TOP_HALF; /* , Address offset: 0x034 */ - __IO uint32_t SBUS_DUMMY_DATA_BUTT_HALF; /* , Address offset: 0x038 */ - __IO uint32_t SBUS_IO_SW_WAIT_TIME; /* , Address offset: 0x03C */ - __IO uint32_t SBUS_WR_DATA_BYTE_NUM; /* , Address offset: 0x040 */ - __IO uint32_t SBUS_RD_DATA_BYTE_NUM; /* , Address offset: 0x044 */ - __IO uint32_t SBUS_START_SEND_REG; /* , Address offset: 0x048 */ - __IO uint32_t FIFO_TRIGGER_LEVEL; /* , Address offset: 0x04C */ - __I uint32_t FIFO_STATUS_REG; /* , Address offset: 0x050 */ - __IO uint32_t INT_ENABLE_REG; /* , Address offset: 0x054 */ - __IO uint32_t INT_STATUS_REG; /* , Address offset: 0x058 */ - __IO uint32_t XIP_WARP_MODE_EXE_IDCT; /* , Address offset: 0x05C */ - __I uint32_t MEM_CTRL_DEBUG_STATE; /* , Address offset: 0x060 */ - __I uint32_t DEBUG_CNT_SBUS_WR; /* , Address offset: 0x064 */ - __I uint32_t DEBUG_CNT_SBUS_RD; /* , Address offset: 0x068 */ - __IO uint32_t NOP_INSTRUCTION; /* , Address offset: 0x06C */ - __IO uint32_t CBUS_RW_EN_WTIME; /* , Address offset: 0x070 */ - __I uint32_t DEBUG_CNT_CBUS_WR; /* , Address offset: 0x074 */ - __I uint32_t DEBUG_CNT_CBUS_RD; /* , Address offset: 0x078 */ - __IO uint32_t RESERVE7C; - FADDR_T FLASH_ADDR[FLASH_ADDR_FIELD_NUM]; /* , Address offset: 0x080~0x0DC */ - __IO uint32_t RESERVEC0[32 - (FLASH_ADDR_FIELD_NUM * 4)]; /* , Address offset: 0x0E0~0x0FC */ - __IO uint32_t SBUS_WR_DATA_REG; /* , Address offset: 0x100 */ - __IO uint32_t RESERVE104[63]; - __I uint32_t SBUS_RD_DATA_REG; /* , Address offset: 0x200 */ - -#if 0 - /* NOTE: the same with psram ctrl define, change that define too if necessary */ - uint32_t RESERVE204[383]; - __IO uint32_t PMEM_COM_CFG; /* , Address offset: 0x800 */ - __IO uint32_t POPI_CTRL_COM_CFG; /* , Address offset: 0x804 */ - __IO uint32_t PCACHE_RLVT_CFG; /* , Address offset: 0x808 */ - __IO uint32_t RESERVE80C; - __IO uint32_t PC_RD_OPRT_CFG; /* , Address offset: 0x810 */ - __IO uint32_t PC_WD_OPRT_CFG; /* , Address offset: 0x814 */ - __IO uint32_t PC_RD_DUMMY_DATA_H; /* , Address offset: 0x818 */ - __IO uint32_t PC_RD_DUMMY_DATA_L; /* , Address offset: 0x81C */ - __IO uint32_t PC_WD_DUMMY_DATA_H; /* , Address offset: 0x820 */ - __IO uint32_t PC_WD_DUMMY_DATA_L; /* , Address offset: 0x824 */ - __IO uint32_t PC_IO_SW_WAIT_TIME; /* , Address offset: 0x828 */ - __IO uint32_t RESERVE82C[16]; - __IO uint32_t PSRAM_FORCE_CFG; /* , Address offset: 0x86C */ - __IO uint32_t PSRAM_COM_CFG; /* , Address offset: 0x870 */ -#endif -} OPI_MEM_CTRL_T; - -#define OPI_MEM_CTRL ((OPI_MEM_CTRL_T *)FLASH_CTRL_BASE) - -/* MEM_COM_CONFG: Memory Controller Common Configuration, 0x00 */ -#define FLASHC_CBUS_RW_ENABLE_SHIFT 0 -#define FLASHC_CBUS_RW_ENABLE_MASK (0x1U << FLASHC_CBUS_RW_ENABLE_SHIFT) -#define FLASHC_CBUS_RW_ENABLE_BIT (0x1U << FLASHC_CBUS_RW_ENABLE_SHIFT) -#define FLASHC_XIP_DEBUG_SHIFT 1 -#define FLASHC_XIP_DEBUG_MASK (0x1U << FLASHC_XIP_DEBUG_SHIFT) -#define FLASHC_XIP_ENABLE_SHIFT 2 -#define FLASHC_XIP_ENABLE_MASK (0x1U << FLASHC_XIP_ENABLE_SHIFT) -#define FLASHC_XIP_ENABLE_BIT (0x1U << FLASHC_XIP_ENABLE_SHIFT) -#define FLASHC_WRAP_AROUND_ENABLE_SHIFT 3 -#define FLASHC_WRAP_AROUND_ENABLE_MASK (0x1U << FLASHC_WRAP_AROUND_ENABLE_SHIFT) -#if (CONFIG_CHIP_ARCH_VER == 2) -#define FLASHC_FLASH_PSRAM_SELECT_SHIFT 4 -#define FLASHC_FLASH_PSRAM_SELECT_MASK (0x1U << FLASHC_FLASH_PSRAM_SELECT_SHIFT) -#elif (CONFIG_CHIP_ARCH_VER == 3) -#define FLASHC_ARBITER_EN_SHIFT 4 -#define FLASHC_ARBITER_EN_MASK (0x1U << FLASHC_ARBITER_EN_SHIFT) -#endif -#define FLASHC_REV_FIFO_RESET_SHIFT 5 -#define FLASHC_REV_FIFO_RESET_MASK (0x1U << FLASHC_REV_FIFO_RESET_SHIFT) -#define FLASHC_TRAN_FIFO_RESET_SHIFT 6 -#define FLASHC_TRAN_FIFO_RESET_MASK (0x1U << FLASHC_TRAN_FIFO_RESET_SHIFT) -#define FLASHC_SBUS_HREADY_WAITTIME_OUT_ENABLE_SHIFT 7 -#define FLASHC_SBUS_HREADY_WAITTIME_OUT_ENABLE_MASK (0x1U << FLASHC_SBUS_HREADY_WAITTIME_OUT_ENABLE_SHIFT) -#define FLASHC_SBUS_HREADY_ADJ_WAITTIME_OUT_SHIFT 8 -#define FLASHC_SBUS_HREADY_ADJ_WAITTIME_OUT_MASK (0xFFU<< FLASHC_SBUS_HREADY_ADJ_WAITTIME_OUT_SHIFT) -#if (CONFIG_CHIP_ARCH_VER == 2) -#define FLASHC_IO7_VACANCY_OUT_SHIFT 16 -#define FLASHC_IO7_VACANCY_OUT_MASK (0x3U << FLASHC_IO7_VACANCY_OUT_SHIFT) -#define FLASHC_IO6_VACANCY_OUT_SHIFT 18 -#define FLASHC_IO6_VACANCY_OUT_MASK (0x3U << FLASHC_IO6_VACANCY_OUT_SHIFT) -#define FLASHC_IO5_VACANCY_OUT_SHIFT 20 -#define FLASHC_IO5_VACANCY_OUT_MASK (0x3U << FLASHC_IO5_VACANCY_OUT_SHIFT) -#define FLASHC_IO4_VACANCY_OUT_SHIFT 22 -#define FLASHC_IO4_VACANCY_OUT_MASK (0x3U << FLASHC_IO4_VACANCY_OUT_SHIFT) -#endif -#define FLASHC_IO3_VACANCY_OUT_SHIFT 24 -#define FLASHC_IO3_VACANCY_OUT_MASK (0x3U << FLASHC_IO3_VACANCY_OUT_SHIFT) -#define FLASHC_IO2_VACANCY_OUT_SHIFT 26 -#define FLASHC_IO2_VACANCY_OUT_MASK (0x3U << FLASHC_IO2_VACANCY_OUT_SHIFT) -#define FLASHC_IO1_VACANCY_OUT_SHIFT 28 -#define FLASHC_IO1_VACANCY_OUT_MASK (0x3U << FLASHC_IO1_VACANCY_OUT_SHIFT) -#define FLASHC_ADDR_SIZE_MODE 30 -#define FLASHC_ADDR_SIZE_MODE_MASK (0x3U << FLASHC_ADDR_SIZE_MODE) - -/* SQPI_CTRL_COM_CONFG: OPI Controller Common Configuration, 0x04 */ -#define FLASHC_SPI_CPHA_CTRL_SHIFT 0 -#define FLASHC_SPI_CPHA_CTRL_MASK (0x1U << FLASHC_SPI_CPHA_CTRL_SHIFT) -#define FLASHC_SPI_CPOL_CTRL_SHIFT 1 -#define FLASHC_SPI_CPOL_CTRL_MASK (0x1U << FLASHC_SPI_CPOL_CTRL_SHIFT) -typedef enum { - FC_SCLK_Mode0 = 0 << FLASHC_SPI_CPHA_CTRL_SHIFT, /* 0:Phase 0(Leading edge for sample data, 0:Active high polarity) */ - FC_SCLK_Mode1 = 1 << FLASHC_SPI_CPHA_CTRL_SHIFT, /* 1:Phase 1(Leading edge for setup data, 0:Active high polarity) */ - FC_SCLK_Mode2 = 2 << FLASHC_SPI_CPHA_CTRL_SHIFT, /* 0:Phase 0(Leading edge for sample data, 1:Active low polarity) */ - FC_SCLK_Mode3 = 3 << FLASHC_SPI_CPHA_CTRL_SHIFT, /* 1:Phase 0(Leading edge for setup data, 1:Active low polarity) */ -} FC_Sclk_Mode; -#define FLASHC_FIRST_RCV_BIT_SLT_SHIFT 4 -#define FLASHC_FIRST_RCV_BIT_SLT_MASK (0x1U << FLASHC_FIRST_RCV_BIT_SLT_SHIFT) -typedef enum { - FC_TCTRL_FBS_MSB = 0 << FLASHC_FIRST_RCV_BIT_SLT_SHIFT, - FC_TCTRL_FBS_LSB = 1 << FLASHC_FIRST_RCV_BIT_SLT_SHIFT -} FC_TCTRL_Fbs; -#define FLASHC_FLASH_CS_POL_SHIFT 8 -#define FLASHC_FLASH_CS_POL_MASK (0x1U << FLASHC_FLASH_CS_POL_SHIFT) -typedef enum { - FC_TCTRL_CS_LOW_ENABLE = 0 << FLASHC_FLASH_CS_POL_SHIFT, - FC_TCTRL_CS_HIGH_ENABLE = 1 << FLASHC_FLASH_CS_POL_SHIFT -} FC_Cs; -#define FLASHC_WAIT_HALF_CYCLE_SHIFT 12 -#define FLASHC_WAIT_HALF_CYCLE_MASK (0x3U << FLASHC_WAIT_HALF_CYCLE_SHIFT) - -#define FLASHC_CS_OUTPUT_SEL_SHIFT 15 -#define FLASHC_CS_OUTPUT_SEL_MASK (0x3U << FLASHC_CS_OUTPUT_SEL_SHIFT) -#define FLASHC_FLASHCS0_PSRAMCS1 (0 << FLASHC_CS_OUTPUT_SEL_SHIFT) -#define FLASHC_FLASHCS1_PSRAMCS0 (1 << FLASHC_CS_OUTPUT_SEL_SHIFT) -#define FLASHC_FLASH_CS_ALL (2 << FLASHC_CS_OUTPUT_SEL_SHIFT) -#define FLASHC_PSRAM_CS_ALL (3 << FLASHC_CS_OUTPUT_SEL_SHIFT) - -#define FLASHC_CLK_SEL_EN_SHIFT 17 -#define FLASHC_CLK_SEL_EN_MASK (0x1U << FLASHC_CLK_SEL_EN_SHIFT) -#define FLASHC_SINGLE_DEV_EN_SHIFT 18 -#define FLASHC_SINGLE_DEV_EN_MASK (0x1U << FLASHC_SINGLE_DEV_EN_SHIFT) -#define FLASHC_SINGLE_DEV_SEL_SHIFT 19 -#define FLASHC_SINGLE_DEV_SEL_MASK (0x1U << FLASHC_SINGLE_DEV_SEL_SHIFT) -typedef enum { - FC_DEV_FLASH = 0 << FLASHC_SINGLE_DEV_SEL_SHIFT, - FC_DEV_PSRAM = 1 << FLASHC_SINGLE_DEV_SEL_SHIFT, -} FC_Sel_Dev; - -/* CACHE_RLVT_CONFG: Cache Relevant Configuration, 0x08 */ -#define FLASHC_RD_CACHE_LINE_LEN_CONFG_SHIFT 0 /* read cache line */ -#define FLASHC_RD_CACHE_LINE_LEN_CONFG_MASK (0x3U << FLASHC_RD_CACHE_LINE_LEN_CONFG_SHIFT) -typedef enum { - FC_RD_CACHE_LINE_LEN_8B = 0 << FLASHC_RD_CACHE_LINE_LEN_CONFG_SHIFT, - FC_RD_CACHE_LINE_LEN_16B = 1 << FLASHC_RD_CACHE_LINE_LEN_CONFG_SHIFT, - FC_RD_CACHE_LINE_LEN_32B = 2 << FLASHC_RD_CACHE_LINE_LEN_CONFG_SHIFT, -} FC_RdCacheLineLenCfg; -#define FLASHC_CBUS_WR_SIZE_SELECT_SHIFT 2 -#define FLASHC_CBUS_WR_SIZE_SELECT_BIT (0x1U << FLASHC_CBUS_WR_SIZE_SELECT_SHIFT) -#define FLASHC_CBUS_HREADY_TIME_OUT_SHIFT 3 -#define FLASHC_CBUS_HREADY_TIME_OUT_BIT (0x1U << FLASHC_CBUS_HREADY_TIME_OUT_SHIFT) -#define FLASHC_CBUS_HREADY_ADY_WAIT_TIME_OUT_SHIFT 4 -#define FLASHC_CBUS_HREADY_ADY_WAIT_TIME_OUT_VMASK (0xFFU) -#define FLASHC_CBUS_HREADY_ADY_WAIT_TIME_OUT_MASK (FLASHC_CBUS_HREADY_ADY_WAIT_TIME_OUT_VMASK << FLASHC_CBUS_HREADY_ADY_WAIT_TIME_OUT_SHIFT) -#define FLASHC_CBUS_HREADY_ADY_WAIT_TIME_OUT(wt) (((wt) & FLASHC_CBUS_HREADY_ADY_WAIT_TIME_OUT_VMASK) << FLASHC_CBUS_HREADY_ADY_WAIT_TIME_OUT_SHIFT) - -#if (CONFIG_CHIP_ARCH_VER == 3) -#define FLASHC_WT_CACHE_LINE_LEN_CONFG_SHIFT 12 /* write cache line */ -#define FLASHC_WT_CACHE_LINE_LEN_CONFG_MASK (0x3U << FLASHC_WT_CACHE_LINE_LEN_CONFG_SHIFT) -typedef enum { - FC_WT_CACHE_LINE_LEN_8B = 0 << FLASHC_WT_CACHE_LINE_LEN_CONFG_SHIFT, - FC_WT_CACHE_LINE_LEN_16B = 1 << FLASHC_WT_CACHE_LINE_LEN_CONFG_SHIFT, - FC_WT_CACHE_LINE_LEN_32B = 2 << FLASHC_WT_CACHE_LINE_LEN_CONFG_SHIFT, - FC_WT_CACHE_LINE_LEN_64B = 3 << FLASHC_WT_CACHE_LINE_LEN_CONFG_SHIFT, -} FC_WtCacheLneLenCfg; -#endif - -/* MEM_AC_CHR_TIMING_CONFG: Memory AC Charachter Timing Configuration, 0x0C */ -#define FLASHC_CBUS_SHSL_SHIFT 0 -#define FLASHC_CBUS_SHSL_MASK (0xFFU << FLASHC_CBUS_SHSL_SHIFT) -#define FLASHC_SBUS_SHSL_SHIFT 8 -#define FLASHC_SBUS_SHSL_MASK (0xFFU << FLASHC_SBUS_SHSL_SHIFT) -#define FLASHC_SPI_FLASH_CHSH_SHIFT 16 -#define FLASHC_SPI_FLASH_CHSH_MASK (0xFFU << FLASHC_SPI_FLASH_CHSH_SHIFT) -#define FLASHC_SPI_FLASH_SLCH_SHIFT 24 -#define FLASHC_SPI_FLASH_SLCH_MASK (0xFFU << FLASHC_SPI_FLASH_SLCH_SHIFT) - -/* - * Bit field definition of - * - CBUS_RD_OPRT_CONFG - * - CBUS_WR_OPRT_CONFG - * - SBUS_RW_OPRT_CONFG - */ -#define FLASHC_BUS_RW_CMD_SHIFT (24) -#define FLASHC_BUS_RW_CMD_VMASK (0x0FFU) -#define FLASHC_BUS_RW_CMD_MASK (FLASHC_BUS_RW_CMD_VMASK << FLASHC_BUS_RW_CMD_SHIFT) -#define FLASHC_BUS_RW_CMD(cmd) (((cmd) & FLASHC_BUS_RW_CMD_VMASK) << FLASHC_BUS_RW_CMD_SHIFT) - -#define FLASHC_BUS_CMD_BIT_SHIFT (20) -#define FLASHC_BUS_CMD_BIT_MASK (0x7U << FLASHC_BUS_CMD_BIT_SHIFT) - -#define FLASHC_BUS_ADDR_BIT_SHIFT (16) -#define FLASHC_BUS_ADDR_BIT_MASK (0x7U << FLASHC_BUS_ADDR_BIT_SHIFT) - -#define FLASHC_BUS_DUMY_BIT_SHIFT (12) -#define FLASHC_BUS_DUMY_BIT_MASK (0x7U << FLASHC_BUS_DUMY_BIT_SHIFT) - -#define FLASHC_BUS_DUMMY_WID_SHIFT (4) -#define FLASHC_BUS_DUMMY_WID_MASK (0x3FU << FLASHC_BUS_DUMMY_WID_SHIFT) - -#define FLASHC_BUS_DATA_BIT_SHIFT (0) -#define FLASHC_BUS_DATA_BIT_MASK (0x7U << FLASHC_BUS_DATA_BIT_SHIFT) - -/* CBUS_RD_OPRT_CONFG: Code-bus Read Operation Configuration, 0x10 */ -#if (CONFIG_CHIP_ARCH_VER == 3) -#define FLASHC_READ_DMA_EN HAL_BIT(23) -#endif - -/* CBUS_WR_OPRT_CONFG: Code-bus Write Operation Configuration, 0x14 */ - -/* CBUS_RD_DUMMY_DATA_TOP_HALF: Code-bus Read Dummy Data Top Half, 0x18 */ -#define FLASHC_RD_DUMMY_DATA_TOP_HALF_SHIFT 0 -#define FLASHC_RD_DUMMY_DATA_TOP_HALF_MASK (0xFFFFFFFFU << FLASHC_RD_DUMMY_DATA_TOP_HALF_SHIFT) - -/* CBUS_RD_DUMMY_DATA_BUTT_HALF: Code-bus Read Dummy Data Buttom Half, 0x1C */ -#define FLASHC_RD_DUMMY_DATA_BUTTOM_HALF_SHIFT 0 -#define FLASHC_RD_DUMMY_DATA_BUTTOM_HALF_MASK (0xFFFFFFFFU << FLASHC_RD_DUMMY_DATA_BUTTOM_HALF_SHIFT) - -/* CBUS_WR_DUMMY_DATA_TOP_HALF: Code-bus Write Dummy Data Top Half, 0x20 */ -#define FLASHC_WR_DUMMY_DATA_TOP_HALF_SHIFT 0 -#define FLASHC_WR_DUMMY_DATA_TOP_HALF_MASK (0xFFFFFFFFU << FLASHC_WR_DUMMY_DATA_TOP_HALF_SHIFT) - -/* CBUS_WR_DUMMY_DATA_BUTT_HALF: Code-bus Write Dummy Data Buttom Half, 0x24 */ -#define FLASHC_WR_DUMMY_DATA_BUTTOM_HALF_SHIFT 0 -#define FLASHC_WR_DUMMY_DATA_BUTTOM_HALF_MASK (0xFFFFFFFFU << FLASHC_WR_DUMMY_DATA_BUTTOM_HALF_SHIFT) - -/* CBUS_IO_SW_WAIT_TIME: Code-bus IO Switch Wait Time, 0x028 */ -#if (CONFIG_CHIP_ARCH_VER == 2) -#define FLASHC_CBUS_DUMMY_WAIT_CYCLE_SHIFT 0 -#define FLASHC_CBUS_DUMMY_WAIT_CYCLE_MASK (0xFFU << FLASHC_CBUS_DUMMY_WAIT_CYCLE_SHIFT) -#define FLASHC_CBUS_ADDR_WAIT_CYCLE_SHIFT 8 -#define FLASHC_CBUS_ADDR_WAIT_CYCLE_MASK (0xFFU << FLASHC_CBUS_ADDR_WAIT_CYCLE_SHIFT) -#define FLASHC_CBUS_CMD_WAIT_CYCLE_SHIFT 16 -#define FLASHC_CBUS_CMD_WAIT_CYCLE_MASK (0xFFU << FLASHC_CBUS_CMD_WAIT_CYCLE_SHIFT) -#endif -#define FLASHC_CBUS_LATENCY_WAIT_CYCLE_SHIFT 24 -#define FLASHC_CBUS_LATENCY_WAIT_CYCLE_MASK (0xFFU << FLASHC_CBUS_LATENCY_WAIT_CYCLE_SHIFT) - -/* SBUS_RW_OPRT_CONFG: System-bus Read/Write Operation Configuration, 0x02C */ -#if (CONFIG_CHIP_ARCH_VER == 3) -#define FLASHC_SBUS_DEV_SEL_SHIFT 23 -#define FLASHC_SBUS_DEV_SEL_MASK (0x1U << FLASHC_SBUS_DEV_SEL_SHIFT) -#define FLASHC_SBUS_DEV_SEL_FLASH (0x0U << FLASHC_SBUS_DEV_SEL_SHIFT) -#define FLASHC_SBUS_DEV_SEL_PSRAM (0x1U << FLASHC_SBUS_DEV_SEL_SHIFT) -#endif - -/* SBUS_ADDR_CONFG: System-bus Address Configuration, 0x030 */ -#define FLASHC_SBUS_ADDR_SHIFT 0 -#define FLASHC_SBUS_ADDR_MASK (0xFFFFFFFFU << FLASHC_SBUS_ADDR_SHIFT) - -/* SBUS_DUMMY_DATA_TOP_HALF: System-bus Dummy Data Top half, 0x034 */ -#define FLASHC_SBUS_DUMMY_TOP_HALF_SHIFT 0 -#define FLASHC_SBUS_DUMMY_TOP_HALF_MASK (0xFFFFFFFFU << FLASHC_SBUS_DUMMY_TOP_HALF_SHIFT) - -/* SBUS_DUMMY_DATA_BUTT_HALF: System-bus Dummy Data Buttom half, 0x038 */ -#define FLASHC_SBUS_DUMMY_BUTTOM_HALF_SHIFT 0 -#define FLASHC_SBUS_DUMMY_BUTTOM_HALF_MASK (0xFFFFFFFFU << FLASHC_SBUS_DUMMY_BUTTOM_HALF_SHIFT) - -/* SBUS_IO_SW_WAIT_TIME: System-bus IO Switch Wait Time, 0x03C */ -#if (CONFIG_CHIP_ARCH_VER == 2) -#define FLASHC_SBUS_DUMMY_WAIT_CYCLE_SHIFT 0 -#define FLASHC_SBUS_DUMMY_WAIT_CYCLE_MASK (0xFFU << FLASHC_SBUS_DUMMY_WAIT_CYCLE_SHIFT) -#define FLASHC_SBUS_ADDR_WAIT_CYCLE_SHIFT 8 -#define FLASHC_SBUS_ADDR_WAIT_CYCLE_MASK (0xFFU << FLASHC_SBUS_ADDR_WAIT_CYCLE_SHIFT) -#define FLASHC_SBUS_CMD_WAIT_CYCLE_SHIFT 16 -#define FLASHC_SBUS_CMD_WAIT_CYCLE_MASK (0xFFU << FLASHC_SBUS_CMD_WAIT_CYCLE_SHIFT) -#endif -#define FLASHC_SBUS_LATENCY_WAIT_CYCLE_SHIFT 24 -#define FLASHC_SBUS_LATENCY_WAIT_CYCLE_MASK (0xFFU << FLASHC_SBUS_LATENCY_WAIT_CYCLE_SHIFT) - -/* SBUS_WR_DATA_BYTE_NUM: System-bus Write Data Byte Number, 0x040 */ -#define FLASHC_SBUS_WR_BYTE_SHIFT 0 -#define FLASHC_SBUS_WR_BYTE_MASK (0xFFFFFFFFU << FLASHC_SBUS_WR_BYTE_SHIFT) - -/* SBUS_RD_DATA_BYTE_NUM: Sytem-bus Read Data Byte Number, 0x044 */ -#define FLASHC_SBUS_RD_BYTE_SHIFT 0 -#define FLASHC_SBUS_RD_BYTE_MASK (0xFFFFFFFFU << FLASHC_SBUS_RD_BYTE_SHIFT) - -/* SBUS_START_SEND_REG: System-bus Start Send Register, 0x048 */ -#define FLASHC_ENABLE_SBUS_SHIFT 0 -#define FLASHC_ENABLE_SBUS_MASK (0x1U << FLASHC_ENABLE_SBUS_SHIFT) - -/* FIFO Trigger Level */ -#define FLASHC_RD_FIFO_EMPTY_REQ_SHIFT 0 -#define FLASHC_RD_FIFO_EMPTY_REQ_MASK (0xFFU << FLASHC_RD_FIFO_EMPTY_REQ_SHIFT) -#define FLASHC_RD_FIFO_FULL_REQ_SHIFT 8 -#define FLASHC_RD_FIFO_FULL_REQ_MASK (0xFFU << FLASHC_RD_FIFO_FULL_REQ_SHIFT) -#define FLASHC_WR_FIFO_EMPTY_REQ_SHIFT 16 -#define FLASHC_WR_FIFO_EMPTY_REQ_MASK (0xFFU << FLASHC_WR_FIFO_EMPTY_REQ_SHIFT) -#define FLASHC_WR_FIFO_FULL_REQ_SHIFT 24 -#define FLASHC_WR_FIFO_FULL_REQ_MASK (0xFFU << FLASHC_WR_FIFO_FULL_REQ_SHIFT) - -/* FIFO_STATUS_REG: FIFO Status Register */ -#define FLASHC_RD_FIFO_COUNTER_SHIFT 0 -#define FLASHC_RD_FIFO_COUNTER_MASK (0xFFU <COMMON_CFG 0x00 - */ -#if (CONFIG_CHIP_ARCH_VER == 3) -#define PSRAMC_CLEAR_CACHE_BUF_SHIFT (4) -#define PSRAMC_CLEAR_CACHE_BUF_MASK (1 << PSRAMC_CLEAR_CACHE_BUF_SHIFT) -#define PSRAMC_CLEAR_CACHE_BUF_BIT (1 << PSRAMC_CLEAR_CACHE_BUF_SHIFT) -#define PSRAMC_FORCE_CACHE_TOUT_SHIFT (0) -#define PSRAMC_FORCE_CACHE_TOUT_MASK (1 << PSRAMC_FORCE_CACHE_TOUT_SHIFT) -#define PSRAMC_FORCE_CACHE_TOUT_BIT (1 << PSRAMC_FORCE_CACHE_TOUT_SHIFT) -#endif - -typedef enum { - FC_CYCLEBITS_0, - FC_CYCLEBITS_1, - FC_CYCLEBITS_2, - FC_CYCLEBITS_4 -} FC_CycleBits; - -typedef struct { - uint8_t cs_begin; /*!< cs active to valid clk edge setup minimum time */ - uint8_t cs_over; /*!< valid clk edge to cs active hold minimum time */ - uint8_t cs_deselect; /*!< cs minimum deselect time after read */ - uint8_t cmd_over; - uint8_t addr_over; - uint8_t dummy_over; - uint8_t data; /*!< delay n half cycle */ -} Flash_Ctrl_DelayCycle; - -typedef enum { - XIP_MODE_NORMAL, - XIP_MODE_FAST, - XIP_MODE_DUAL_O, - XIP_MODE_DUAL_IO, - XIP_MODE_QUAD_O, - XIP_MODE_QUAD_IO -} XIP_Mode; - -typedef struct XIP_Instruction { - uint8_t cmd; /*!< command */ - FC_CycleBits cmd_line; /*!< line mode of command */ - FC_CycleBits addr_line; /*!< line mode of address */ - FC_CycleBits dummy_line; /*!< line mode of dummy */ - FC_CycleBits data_line; /*!< line mode of data */ - uint32_t dum_btyes; /*!< dummy length */ -// uint32_t dummyh; -// uint32_t dummyl; -} XIP_Instruction; - -typedef struct { - uint32_t addr; /*!< XIP code started address in flash */ - uint32_t freq; /*!< flash working frequency */ - Flash_Ctrl_DelayCycle delay; /*!< board delay config */ - XIP_Instruction ins; /*!< XIP read instruction */ - bool cont_mode; /*!< continue mode or not */ -} XIP_Config; - -typedef struct Flashc_Config { - uint32_t freq; /*!< flash working frequency */ -// uint32_t t_shsl_ns; /*!< flash t_shsl parameter. for calculate the cs delay. */ - uint32_t ispr_mask[FLASH_ISPR_MASK_NUM]; - uint32_t switch_out_ms; - uint32_t check_busy_us; - uint32_t busy_timeout_us; - uint8_t optimize_mask; /* FLASH_OPTIMIZE_XX */ -#if (CONFIG_CHIP_ARCH_VER == 3) - uint32_t cs_mode; -#endif -} Flashc_Config; - -typedef struct Flashc_Delay { - uint32_t t_shsl_ns; /*!< flash t_shsl parameter. for calculate the cs delay. */ -} Flashc_Delay; - -typedef struct FC_InstructionField { - uint8_t *pdata; /*!< instruction field: data */ - uint32_t len; /*!< instruction field: data len */ - FC_CycleBits line; /*!< instruction field: line mode */ -} FC_InstructionField; - -typedef enum Flashc_Commands { - FC_CMD_ENABLE_32BITADDR_MODE = 0, - FC_CMD_CONFIG_OPTIMIZE, - FC_CMD_CONFIG_RESET_MASK, -} Flashc_Commands; - -typedef enum { - FC_CREATE, - FC_INIT, - FC_OPEN, - FC_TRANS, /* no use now */ - FC_CLOSE, - FC_DEINIT, - FC_DESTORY, -} FC_OPERATE; - -struct flash_controller { - uint8_t externAddr_on; - uint8_t xip_on; - uint8_t ccmu_on; - uint8_t pin_inited; - uint8_t sbusing; - uint8_t ref; -#define FLASH_OPTIMIZE_READ HAL_BIT(0) -#define FLASH_OPTIMIZE_WRITE HAL_BIT(1) -#define FLASH_OPTIMIZE_ERASE HAL_BIT(2) - uint8_t optimize_mask; - uint8_t xip_continue; -#if (CONFIG_CHIP_ARCH_VER == 3) - uint32_t cs_mode; -#endif - hal_sem_t dmaSem; - uint32_t irqsaveflag; - uint8_t resetMask; - int8_t cacheWriteThroughIdx; - uint8_t pm_xip; - uint8_t suspending; - XIP_Config pm_ibus_cfg; - Flashc_Config pm_sbus_cfg; -#ifdef CONFIG_PM - struct soc_device_driver flashc_drv; - struct soc_device flashc_dev; -#endif -}; - -typedef void (*flashc_caback)(struct flash_controller *ctrl, FC_OPERATE op, uint32_t step); - -/** - * @brief Initialize Flash controller IBUS driver (XIP). - * @param cfg: - * @arg cfg->addr: Started address of XIP code in Flash. - * @arg cfg->freq: Flash working frequency. - * @arg cfg->delay: Delay of hardware. - * @arg cfg->ins: Instruction of XIP reading - * @arg cfg->cont_mode: Enable continue mode in reading or not. - * @retval hal_status_t: The status of driver. - */ -hal_status_t HAL_Flashc_Xip_Init(struct flash_controller *ctrl, XIP_Config *cfg); - -/** - * @brief Deinitialize Flash controller IBUS (XIP). - * @param None - * @retval hal_status_t: The status of driver. - */ -hal_status_t HAL_Flashc_Xip_Deinit(struct flash_controller *ctrl); - -/** - * @internal - * @brief Flash controller IBUS (XIP) Enable without Pin initialization. - * @note Most for Flash controller SBUS. It will resume system schedule. - * @param None - * @retval None - */ -void HAL_Flashc_Xip_RawEnable(struct flash_controller *ctrl); - -/** - * @internal - * @brief Flash controller IBUS (XIP) Enable without Pin deinitialization. - * @note Most for Flash controller SBUS. It will suspend system schedule. - * @param None - * @retval None - */ -void HAL_Flashc_Xip_RawDisable(struct flash_controller *ctrl); - -/** - * @brief Initialize Flash controller SBUS. - * @param cfg: - * @arg cfg->freq: Flash working frequency. - * @retval hal_status_t: The status of driver. - */ -hal_status_t HAL_Flashc_Init(struct flash_controller *ctrl, const Flashc_Config *cfg); - -/** - * @brief Deinitialize Flash controller SBUS. - * @param None - * @retval hal_status_t: The status of driver. - */ -hal_status_t HAL_Flashc_Deinit(struct flash_controller *ctrl); - -void HAL_Flashc_RegisterCb(flashc_caback cb); - -/** - * @brief Open flash controller SBUS. - * @note At the same time, it will disable XIP and suspend schedule. - * @param None - * @retval hal_status_t: The status of driver. - */ -hal_status_t HAL_Flashc_Open(struct flash_controller *ctrl); - -/** - * @brief Close flash controller SBUS. - * @param None - * @retval hal_status_t: The status of driver. - */ -hal_status_t HAL_Flashc_Close(struct flash_controller *ctrl); - -/** - * @brief Flash controller ioctl. - * @note op : arg - * nothing support for now. - * @param op: ioctl command. - * @param arg: ioctl arguement - * @retval hal_status_t: The status of driver. - */ -hal_status_t HAL_Flashc_Ioctl(struct flash_controller *ctrl, uint32_t op, void *arg); - -/** - * @brief Write or read flash by flash controller SBUS. - * @note Send a instruction in command + address + dummy + write or read data. - * @param cmd: Command of instruction. - * @arg cmd->pdata: The data is filled with in this field. - * @arg cmd->len: The data len of this field. - * @arg cmd->line: The number of line transfering this field data. - * @param addr: Address of instruction - * @param dummy: Dummy of instruction - * @param data: Data of instruction - * @param dma: Transfer data by DMA or not. - * @retval hal_status_t: The status of driver. - */ -hal_status_t HAL_Flashc_Transfer(struct flash_controller *ctrl, int write, - FC_InstructionField *cmd, FC_InstructionField *addr, - FC_InstructionField *dummy, FC_InstructionField *data, bool dma); - -struct flash_controller *HAL_Flashc_Create(uint32_t id); -hal_status_t HAL_Flashc_Destory(struct flash_controller *ctrl); -int HAL_Flashc_IncRef(struct flash_controller *ctrl); -int HAL_Flashc_DecRef(struct flash_controller *ctrl); -void HAL_Flashc_SetDbgMask(uint8_t dbg_mask); -//int __FC_DebugCheck(int state); - -/** - * @brief Delay realization in Flash controller IBUS (XIP). - * @note Delay can be system sleep while it's not in XIP, but must be a while - * delay without system interface while it's in XIP. - * @param us: delay time in microsecond. - * @retval None - */ -void HAL_Flashc_Delay(struct flash_controller *ctrl, unsigned int us); - -void FC_GetDelayCycle(Flash_Ctrl_DelayCycle *delay, uint32_t freq); - -void HAL_Flashc_ResetCCMU(void); -bool HAL_Flashc_ConfigCCMU(uint32_t clk); -void HAL_Flashc_EnableCCMU(struct flash_controller *ctrl); -void FC_Sbus_TransmitDelay(Flash_Ctrl_DelayCycle *delay); -void FC_SetFlash(FC_Cs cs, FC_TCTRL_Fbs fbs, FC_Sclk_Mode mode); -void FC_Sbus_ResetFIFO(bool tx, bool rx); -void FC_Cbus_RW_Enable(bool enable); - -void HAL_Flashc_DisableCCMU(struct flash_controller *ctrl); - -void HAL_Flashc_PinInit(struct flash_controller *ctrl); -void FC_Ibus_TransmitDelay(Flash_Ctrl_DelayCycle *delay); -void HAL_Flashc_PinDeinit(struct flash_controller *ctrl); -void HAL_Flashc_DUMP_CbusCnt(void); - -uint32_t FC_GetXipUserEndAddr(void); -int32_t FlashCBUS_AddrRequire(uint8_t field, uint32_t sAddr, uint32_t bias, uint32_t userLen); -int32_t PsramCBUS_AddrRequire(uint8_t field, uint32_t sAddr, uint32_t bias, uint32_t userLen); -#if (CONFIG_CHIP_ARCH_VER == 3) -void HAL_Flashc_SetCacheLineLen(FC_RdCacheLineLenCfg rlen, FC_WtCacheLneLenCfg wlen); -void FC_SbusPrepare(void); -void FC_SbusFinish(void); - -void HAL_Flashc_CBUS_Dma_Enable(uint32_t en); -void HAL_FlashCrypto_Init(uint8_t *nonce); -void HAL_FlashCrypto_DeInit(void); -int32_t FlashCryptoRequest(uint32_t startAddr, uint32_t endAddr, uint8_t *key); -#if FLASH_CRYPTO_DISABLE_FUNC_EN -void FlashCryptoRelease(uint32_t channel); -#endif - -void FC_Crypto_Enable(uint8_t *key); -void FC_Clr_Crypto_Infor(void); -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_CHIP_HAL_FLASHCTRL_H_ */ diff --git a/src/platform/f133/include/hal/sunxi_hal_geth.h b/src/platform/f133/include/hal/sunxi_hal_geth.h deleted file mode 100644 index 96757cf9e42501d333052832929feb466e571bcf..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_geth.h +++ /dev/null @@ -1,316 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __SUNXI_HAL_GETH_H__ -#define __SUNXI_HAL_GETH_H__ - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include -//#include -#include -#include -#include -#include -#include - -#define CONFIG_DRIVERS_GETH_DEBUG - -#ifdef CONFIG_DRIVERS_GETH_DEBUG -#define GETH_INFO(fmt, arg...) printf("GPIO : %s()%d "fmt, __func__, __LINE__, ##arg) -#define GETH_ERR(fmt, arg...) printf("GPIO : %s()%d "fmt, __func__, __LINE__, ##arg) -#else -#define GETH_INFO(fmt, arg...) do {}while(0) -#define GETH_ERR(fmt, arg...) do {}while(0) -#endif - -/* Base config for geth */ -#define IOBASE 0x05020000 -#define PHY_CLK_REG (0x03000000 + 0x30) -#define CCMU_BASE 0x03001000 -#define CCMU_GETH_CLK_REG 0x097c -#define CCMU_GETH_RST_BIT 16 -#define CCMU_GETH_GATING_BIT 0 -#define CCMU_EPHY_CLK_REG 0x0970 -#define CCMU_EPHY_SCLK_GATING_BIT 31 -#define CCMU_EPHY_PLL_PERI0_GATING_BIT 30 - -#define DISABLE_AUTONEG -#define CONFIG_HARD_CHECKSUM -#define USE_EPHY25M - -/* Geth register list */ -#define GETH_BASIC_CTL0 0x00 -#define GETH_BASIC_CTL1 0x04 -#define GETH_INT_STA 0x08 -#define GETH_INT_EN 0x0C -#define GETH_TX_CTL0 0x10 -#define GETH_TX_CTL1 0x14 -#define GETH_TX_FLOW_CTL 0x1C -#define GETH_TX_DESC_LIST 0x20 -#define GETH_RX_CTL0 0x24 -#define GETH_RX_CTL1 0x28 -#define GETH_RX_DESC_LIST 0x34 -#define GETH_RX_FRM_FLT 0x38 -#define GETH_RX_HASH0 0x40 -#define GETH_RX_HASH1 0x44 -#define GETH_MDIO_ADDR 0x48 -#define GETH_MDIO_DATA 0x4C -#define GETH_ADDR_HI(reg) (0x50 + ((reg) << 3)) -#define GETH_ADDR_LO(reg) (0x54 + ((reg) << 3)) -#define GETH_TX_DMA_STA 0xB0 -#define GETH_TX_CUR_DESC 0xB4 -#define GETH_TX_CUR_BUF 0xB8 -#define GETH_RX_DMA_STA 0xC0 -#define GETH_RX_CUR_DESC 0xC4 -#define GETH_RX_CUR_BUF 0xC8 -#define GETH_RGMII_STA 0xD0 - -#define MII_BUSY 0x00000001 -#define MII_WRITE 0x00000002 - -#define CTL0_DM 0x01 -#define CTL0_LM 0x02 -#define CTL0_SPEED 0x04 - -#define BURST_LEN 0x3F000000 -#define RX_TX_PRI 0x02 -#define SOFT_RST 0x01 - -#define TX_FLUSH 0x01 -#define TX_MD 0x02 -#define TX_NEXT_FRM 0x04 -#define TX_TH 0x0700 - -#define RX_FLUSH 0x01 -#define RX_MD 0x02 -#define RX_RUNT_FRM 0x04 -#define RX_ERR_FRM 0x08 -#define RX_TH 0x0030 - -#define TX_INT 0x00001 -#define TX_STOP_INT 0x00002 -#define TX_UA_INT 0x00004 -#define TX_TOUT_INT 0x00008 -#define TX_UNF_INT 0x00010 -#define TX_EARLY_INT 0x00020 -#define RX_INT 0x00100 -#define RX_UA_INT 0x00200 -#define RX_STOP_INT 0x00400 -#define RX_TOUT_INT 0x00800 -#define RX_OVF_INT 0x01000 -#define RX_EARLY_INT 0x02000 -#define LINK_STA_INT 0x10000 - -/* PHY address */ -#define PHY_DM 0x0010 -#define PHY_AUTO_NEG 0x0020 -#define PHY_POWERDOWN 0x0080 -#define PHY_NEG_EN 0x1000 - -#define EXT_PHY 0 -#define INT_PHY 1 - -#define MAX_ADDR_LEN 6 - -#define u8 uint8_t -#define u16 uint16_t -#define u32 uint32_t - -struct rt_geth_device { - /* inherit from ethernet device */ - struct eth_device parent; - /* interface address info, hw address */ - uint16_t dev_addr[MAX_ADDR_LEN]; - /* ethernet device base address */ - uint32_t iobase; - /* phy mode */ - phy_interface_t phy_interface; -}; - -typedef enum rx_frame_status { - good_frame = 0, - discard_frame = 1, - csum_none = 2, - llc_snap = 4, -} hal_geth_rx_frame_status_t; - -typedef union { - struct { - /* TDES0 */ - u32 deferred:1; /* Deferred bit (only half-duplex) */ - u32 under_err:1; /* Underflow error */ - u32 ex_deferral:1; /* Excessive deferral */ - u32 coll_cnt:4; /* Collision count */ - u32 vlan_tag:1; /* VLAN Frame */ - - u32 ex_coll:1; /* Excessive collision */ - u32 late_coll:1; /* Late collision */ - u32 no_carr:1; /* No carrier */ - u32 loss_carr:1; /* Loss of collision */ - - u32 ipdat_err:1; /* IP payload error */ - u32 frm_flu:1; /* Frame flushed */ - u32 jab_timeout:1; /* Jabber timeout */ - u32 err_sum:1; /* Error summary */ - - u32 iphead_err:1; /* IP header error */ - u32 ttss:1; /* Transmit time stamp status */ - u32 reserved0:13; - u32 own:1; /* Own bit. CPU:0, DMA:1 */ - } tx; - - struct { - /* RDES0 */ - u32 chsum_err:1; /* Payload checksum error */ - u32 crc_err:1; /* CRC error */ - u32 dribbling:1; /* Dribble bit error */ - u32 mii_err:1; /* Received error (bit3) */ - - u32 recv_wt:1; /* Received watchdog timeout */ - u32 frm_type:1; /* Frame type */ - u32 late_coll:1; /* Late Collision */ - u32 ipch_err:1; /* IPv header checksum error (bit7) */ - - u32 last_desc:1; /* Laset descriptor */ - u32 first_desc:1; /* First descriptor */ - u32 vlan_tag:1; /* VLAN Tag */ - u32 over_err:1; /* Overflow error (bit11) */ - - u32 len_err:1; /* Length error */ - u32 sou_filter:1; /* Source address filter fail */ - u32 desc_err:1; /* Descriptor error */ - u32 err_sum:1; /* Error summary (bit15) */ - - u32 frm_len:14; /* Frame length */ - u32 des_filter:1; /* Destination address filter fail */ - u32 own:1; /* Own bit. CPU:0, DMA:1 */ - #define RX_PKT_OK 0x7FFFB77C - #define RX_LEN 0x3FFF0000 - } rx; - - u32 all; -} desc0_u; - -typedef union { - struct { - /* TDES1 */ - u32 buf1_size:11; /* Transmit buffer1 size */ - u32 buf2_size:11; /* Transmit buffer2 size */ - u32 ttse:1; /* Transmit time stamp enable */ - u32 dis_pad:1; /* Disable pad (bit23) */ - - u32 adr_chain:1; /* Second address chained */ - u32 end_ring:1; /* Transmit end of ring */ - u32 crc_dis:1; /* Disable CRC */ - u32 cic:2; /* Checksum insertion control (bit27:28) */ - u32 first_sg:1; /* First Segment */ - u32 last_seg:1; /* Last Segment */ - u32 interrupt:1; /* Interrupt on completion */ - } tx; - - struct { - /* RDES1 */ - u32 buf1_size:11; /* Received buffer1 size */ - u32 buf2_size:11; /* Received buffer2 size */ - u32 reserved1:2; - - u32 adr_chain:1; /* Second address chained */ - u32 end_ring:1; /* Received end of ring */ - u32 reserved2:5; - u32 dis_ic:1; /* Disable interrupt on completion */ - } rx; - - u32 all; -} desc1_u; - -typedef struct dma_desc { - desc0_u desc0; - desc1_u desc1; - u32 *desc2; - u32 *desc3; -//} __attribute__((packed)) hal_geth_dma_desc_t; -} hal_geth_dma_desc_t; - -typedef struct geth_priv { - struct hal_gmac_dma_desc_t *dma_desc_tx; - struct hal_gmac_dma_desc_t *dma_desc_rx; - char *rx_handle_buf; - - int32_t base; - int32_t phy_tpye; - int32_t phy_interface; -} hal_geth_priv_data_t; - -typedef struct sunxi_hal_driver_geth { - rt_err_t (*initialize)(rt_device_t dev); - void (*uninitialize)(rt_device_t dev); - int32_t (*get_mac_address)(const unsigned char *addr); - int32_t (*set_mac_address)(unsigned char *addr); - int32_t (*set_address_filter)(void); - rt_err_t (*send)(rt_device_t dev, struct pbuf *p); - struct pbuf* (*recv)(rt_device_t dev); - //int32_t (*phy_read)(uint8_t phy_addr, uint8_t reg_addr, uint16_t *data); - //int32_t (*phy_write)(uint8_t phy_addr, uint8_t reg_addr, uint16_t data); -} const sunxi_hal_driver_geth_t; - -void random_ether_addr(u8 *addr); -void geth_set_link_mode(uint32_t iobase, int duplex, int speed); -void geth_mac_loopback(uint32_t iobase, int enable); -void geth_start_tx(uint32_t iobase); -void geth_stop_tx(uint32_t iobase); -void geth_start_rx(uint32_t iobase); -void geth_stop_rx(uint32_t iobase); -uint32_t geth_mac_reset(uint32_t iobase); -void geth_mac_init(uint32_t iobase); -void geth_set_filter(uint32_t iobase); -void geth_set_mac_addr(uint32_t iobase, unsigned char *addr, int index); -void geth_mac_enable(uint32_t iobase); -void geth_mac_disable(uint32_t iobase); -void geth_tx_poll(uint32_t iobase); -void geth_rx_poll(uint32_t iobase); -void geth_flush_tx(uint32_t iobase); -void geth_int_enable(uint32_t iobase); -void geth_int_disable(uint32_t iobase); -void geth_clk_enable(void); -void geth_clk_disable(void); -uint32_t geth_mdio_read(uint32_t iobase, int phy_addr, u8 reg); -uint32_t geth_mdio_write(uint32_t iobase, int phy_addr, u8 reg, u16 data); - -#ifdef __cplusplus -} -#endif - -#endif /* __SUNXI_HAL_GETH_H__ */ diff --git a/src/platform/f133/include/hal/sunxi_hal_gpadc.h b/src/platform/f133/include/hal/sunxi_hal_gpadc.h deleted file mode 100644 index e4d9779d30b117c7d88ca0c649179290849f03d0..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_gpadc.h +++ /dev/null @@ -1,147 +0,0 @@ -/* - * drivers/input/sensor/sunxi_gpadc.h - * - * Copyright (C) 2016 Allwinner. - * fuzhaoke - * - * SUNXI GPADC Controller Driver Header - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - */ - -#ifndef HAL_GPADC_H -#define HAL_GPADC_H - -#include -#include -#include "sunxi_hal_common.h" -#include -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/* define this macro when debugging is required */ -/* #define CONFIG_DRIVERS_GPADC_DEBUG */ -#ifdef CONFIG_DRIVERS_GPADC_DEBUG -#define GPADC_INFO(fmt, arg...) hal_log_info(fmt, ##arg) -#else -#define GPADC_INFO(fmt, arg...) do {}while(0) -#endif - -#define GPADC_ERR(fmt, arg...) hal_log_err(fmt, ##arg) - -enum -{ - GPADC_DOWN, - GPADC_UP -}; - -typedef enum -{ - GP_CH_0 = 0, - GP_CH_1, - GP_CH_2, - GP_CH_3, - GP_CH_4, - GP_CH_5, - GP_CH_6, - GP_CH_7, - GP_CH_8, - GP_CH_9, - GP_CH_A, - GP_CH_B, - GP_CH_C, - GP_CH_D, - GP_CH_E, - GP_CH_MAX -} hal_gpadc_channel_t; - -typedef enum -{ - GPADC_IRQ_ERROR = -4, - GPADC_CHANNEL_ERROR = -3, - GPADC_CLK_ERROR = -2, - GPADC_ERROR = -1, - GPADC_OK = 0, -} hal_gpadc_status_t; - -typedef enum gp_select_mode -{ - GP_SINGLE_MODE = 0, - GP_SINGLE_CYCLE_MODE, - GP_CONTINUOUS_MODE, - GP_BURST_MODE, -} hal_gpadc_mode_t; - -typedef int (*gpadc_callback_t)(uint32_t data_type, uint32_t data); - -static uint32_t hal_gpadc_regs_offset[] = { - GP_SR_REG, - GP_CTRL_REG, - GP_CS_EN_REG, - GP_FIFO_INTC_REG, - GP_FIFO_DATA_REG, - GP_CB_DATA_REG, - GP_DATAL_INTC_REG, - GP_DATAH_INTC_REG, - GP_DATA_INTC_REG, - GP_CH0_CMP_DATA_REG, - GP_CH1_CMP_DATA_REG, - GP_CH2_CMP_DATA_REG, - GP_CH3_CMP_DATA_REG, - GP_CH4_CMP_DATA_REG, - GP_CH5_CMP_DATA_REG, - GP_CH6_CMP_DATA_REG, - GP_CH7_CMP_DATA_REG, - GP_CH8_CMP_DATA_REG, - GP_CH9_CMP_DATA_REG, - GP_CHA_CMP_DATA_REG, - GP_CHB_CMP_DATA_REG, - GP_CHC_CMP_DATA_REG, - GP_CHD_CMP_DATA_REG, - GP_CHE_CMP_DATA_REG, -}; - -typedef struct -{ - uint32_t reg_base; - uint32_t channel_num; - uint32_t irq_num; - uint32_t sample_rate; - struct reset_control *reset; -#if defined(CONFIG_SOC_SUN20IW1) || defined(CONFIG_ARCH_SUN8IW20) || defined(CONFIG_ARCH_SUN20IW2) - hal_clk_id_t bus_clk; - hal_clk_id_t rst_clk; - hal_clk_t mbus_clk; - hal_clk_t mbus_clk1; -#else - hal_clk_id_t mclk; - hal_clk_id_t pclk; -#endif - hal_gpadc_mode_t mode; - gpadc_callback_t callback[CHANNEL_MAX_NUM]; - uint32_t regs_backup[ARRAY_SIZE(hal_gpadc_regs_offset)]; -} hal_gpadc_t; - -int hal_gpadc_init(void); -hal_gpadc_status_t hal_gpadc_deinit(void); -hal_gpadc_status_t hal_gpadc_channel_init(hal_gpadc_channel_t channal); -hal_gpadc_status_t hal_gpadc_channel_exit(hal_gpadc_channel_t channal); -uint32_t gpadc_read_channel_data(hal_gpadc_channel_t channal); -hal_gpadc_status_t hal_gpadc_register_callback(hal_gpadc_channel_t channal, - gpadc_callback_t user_callback); -void gpadc_key_enable_highirq(hal_gpadc_channel_t channal); -void gpadc_key_disable_highirq(hal_gpadc_channel_t channal); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_htimer.h b/src/platform/f133/include/hal/sunxi_hal_htimer.h deleted file mode 100644 index 380d896190efdea6d28591b6fc663b26763e98ef..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_htimer.h +++ /dev/null @@ -1,71 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#ifndef __HAL_HTIMER_H__ -#define __HAL_HTIMER_H__ -#include -#include -#include -#include - -//#include - - - -#ifdef __cplusplus - extern "C" { -#endif - -typedef enum { - HAL_HRTIMER0, - HAL_HRTIMER1, - HAL_HRTIMER_NUM -}hal_htimer_id; - -/** This enum defines the return type of timer API. */ -typedef enum { - HAL_TIMER_STATUS_ERROR = -1, - HAL_TIMER_STATUS_OK = 0 -} hal_htimer_status_t; - -typedef void (*timer_callback)(void *param); - -void hal_htimer_init(void); -void hal_htimer_stop(hal_htimer_id timer); -void hal_htimer_start(hal_htimer_id timer, bool periodic); -hal_htimer_status_t hal_htimer_set_oneshot(hal_htimer_id timer, uint32_t delay_us, timer_callback callback, void *callback_param); -hal_htimer_status_t hal_htimer_set_periodic(hal_htimer_id timer, uint32_t delay_us, timer_callback callback, void *callback_param); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_ir.h b/src/platform/f133/include/hal/sunxi_hal_ir.h deleted file mode 100644 index 9ca6a1c9a0a1e88bf096c0b06218dd62c9d0b3dd..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_ir.h +++ /dev/null @@ -1,131 +0,0 @@ -/* - * =========================================================================================== - * - * Filename: sunxi_hal_spi.h - * - * Description: SPI HAL definition. - * - * Version: Melis3.0 - * Create: 2020-04-08 11:11:56 - * Revision: none - * Compiler: GCC:version 9.2.1 - * - * Author: bantao@allwinnertech.com - * Organization: SWC-BPD - * Last Modified: 2020-04-08 16:02:11 - * - * =========================================================================================== - */ - -#ifndef SUNXI_IR_RX_H -#define SUNXI_IR_RX_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "sunxi_hal_common.h" -#include -#include -#include - -/* Registers */ -#define IR_CTRL_REG (0x00) /* IR Control */ -#define IR_RXCFG_REG (0x10) /* Rx Config */ -#define IR_RXDAT_REG (0x20) /* Rx Data */ -#define IR_RXINTE_REG (0x2C) /* Rx Interrupt Enable */ -#define IR_RXINTS_REG (0x30) /* Rx Interrupt Status */ -#define IR_SPLCFG_REG (0x34) /* IR Sample Config */ - -#define IR_FIFO_SIZE (64) /* 64Bytes */ - -#define IR_SIMPLE_UNIT (21000) /* simple in ns */ -#define IR_CLK (24000000) /* 24Mhz */ -#define IR_SAMPLE_DEV (0x3<<0) /* 24MHz/512 =46875Hz (~21us) */ - -/* Active Threshold (0+1)*128clock*21us = 2.6ms */ -#define IR_ACTIVE_T ((0&0xff)<<16) - -/* Filter Threshold = 16*21us = 336us < 500us */ -#define IR_RXFILT_VAL (((16)&0x3f)<<2) - -/* Filter Threshold = 22*21us = 336us < 500us */ -#define IR_RXFILT_VAL_RC5 (((22)&0x3f)<<2) - -/* Idle Threshold = (5+1)*128clock*21us = 16ms > 9ms */ -#define IR_RXIDLE_VAL (((5)&0xff)<<8) - -/* Active Threshold (0+1)*128clock*21us = 2.6ms */ -#define IR_ACTIVE_T_SAMPLE ((16&0xff)<<16) - -#define IR_ACTIVE_T_C (1<<23) /* Active Threshold */ -#define IR_CIR_MODE (0x3<<4) /* CIR mode enable */ -#define IR_ENTIRE_ENABLE (0x3<<0) /* IR entire enable */ -#define IR_FIFO_20 (((20)-1)<<8) -#define IR_IRQ_STATUS ((0x1<<4)|0x3) -#define IR_BOTH_PULSE (0x1 << 6) -#define IR_LOW_PULSE (0x2 << 6) -#define IR_HIGH_PULSE (0x3 << 6) - -/*Bit Definition of IR_RXINTS_REG Register*/ -#define IR_RXINTS_RXOF (0x1<<0) /* Rx FIFO Overflow */ -#define IR_RXINTS_RXPE (0x1<<1) /* Rx Packet End */ -#define IR_RXINTS_RXDA (0x1<<4) /* Rx FIFO Data Available */ - - -enum ir_mode { - CIR_MODE_ENABLE, - IR_MODULE_ENABLE, - IR_BOTH_PULSE_MODE, /* new feature to avoid noisy */ - IR_LOW_PULSE_MODE, - IR_HIGH_PULSE_MODE, -}; - -enum ir_sample_config { - IR_SAMPLE_REG_CLEAR, - IR_CLK_SAMPLE, - IR_FILTER_TH_NEC, - IR_FILTER_TH_RC5, - IR_IDLE_TH, - IR_ACTIVE_TH, - IR_ACTIVE_TH_SAMPLE, -}; - -enum ir_irq_config { - IR_IRQ_STATUS_CLEAR, - IR_IRQ_ENABLE, - IR_IRQ_FIFO_SIZE, -}; - -typedef enum -{ - IR_PIN_ERR = -3, - IR_CLK_ERR = -2, - IR_IRQ_ERR = -1, - IR_OK = 0, -} hal_ir_status_t; - -typedef int (*ir_callback_t)(uint32_t data_type, uint32_t data); - -typedef struct sunxi_ir -{ - uint16_t irq_num; - uint32_t reg_base; - - gpio_pin_t pin; - uint8_t pin_mux; - uint8_t pin_drv; - - ir_callback_t callback; -} hal_ir_t; - -int hal_ir_register_callback(ir_callback_t callback); -int hal_ir_init(void); - -#ifdef __cplusplus -} -#endif - - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_ledc.h b/src/platform/f133/include/hal/sunxi_hal_ledc.h deleted file mode 100644 index a38633883c38f08648e17b36b420f619102d018b..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_ledc.h +++ /dev/null @@ -1,100 +0,0 @@ -#ifndef __HAL_LEDC_H -#define __HAL_LEDC_H -#include "sunxi_hal_common.h" -#include "ledc/platform_ledc.h" -#include "ledc/common_ledc.h" -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define SUNXI_LEDC_FIFO_DEPTH 32 -#define RESULT_COMPLETE 1 -#define RESULT_ERR 2 - -enum ledc_output_mode_val { - LEDC_OUTPUT_GRB = 0 << 6, - LEDC_OUTPUT_GBR = 1 << 6, - LEDC_OUTPUT_RGB = 2 << 6, - LEDC_OUTPUT_RBG = 3 << 6, - LEDC_OUTPUT_BGR = 4 << 6, - LEDC_OUTPUT_BRG = 5 << 6 -}; - -enum { - DEBUG_INIT = 1U << 0, - DEBUG_SUSPEND = 1U << 1, - DEBUG_INFO = 1U << 2, - DEBUG_INFO1 = 1U << 3, - DEBUG_INFO2 = 1U << 4, -}; - -struct ledc_config { - unsigned int led_count; - unsigned int reset_ns; - unsigned int t1h_ns; - unsigned int t1l_ns; - unsigned int t0h_ns; - unsigned int t0l_ns; - unsigned int wait_time0_ns; - unsigned long long wait_time1_ns; - unsigned int wait_data_time_ns; - char *output_mode; - unsigned int *data; - unsigned int length; -}; - -enum ledc_irq_ctrl_reg { - LEDC_TRANS_FINISH_INT_EN = (1 << 0), - LEDC_FIFO_CPUREQ_INT_EN = (1 << 1), - LEDC_WAITDATA_TIMEOUT_INT_EN = (1 << 3), - LEDC_FIFO_OVERFLOW_INT_EN = (1 << 4), - LEDC_GLOBAL_INT_EN = (1 << 5), -}; - -enum ledc_irq_status_reg { - LEDC_TRANS_FINISH_INT = (1 << 0), - LEDC_FIFO_CPUREQ_INT = (1 << 1), - LEDC_WAITDATA_TIMEOUT_INT = (1 << 3), - LEDC_FIFO_OVERFLOW_INT = (1 << 4), - LEDC_FIFO_FULL = (1 << 16), - LEDC_FIFO_EMPTY = (1 << 17), -}; - -static u32 sunxi_ledc_regs_offset[] = { - LEDC_CTRL_REG, - LED_RST_TIMING_CTRL_REG, - LED_T01_TIMING_CTRL_REG, - LEDC_WAIT_TIME0_CTRL_REG, - LEDC_WAIT_TIME1_CTRL_REG, - LEDC_INTC_REG, - LEDC_DATA_REG, - LEDC_DMA_CTRL_REG, -}; - -struct sunxi_led { - struct reset_control *reset; - hal_clk_t mod_clk; - hal_clk_t bus_clk; - u8 result; - struct ledc_config config; - u32 regs_backup[ARRAY_SIZE(sunxi_ledc_regs_offset)]; -}; - -int hal_ledc_init(void); -void hal_ledc_deinit(void); -void hal_ledc_trans_data(struct ledc_config *ledc); -void hal_ledc_clear_all_irq(void); -unsigned int hal_ledc_get_irq_status(void); -void hal_ledc_dma_callback(void *para); -void hal_ledc_reset(void); -int sunxi_led_init(void); -int sunxi_set_led_brightness(int led_num, unsigned int brightness); - -#ifdef __cplusplus -} -#endif -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_lradc.h b/src/platform/f133/include/hal/sunxi_hal_lradc.h deleted file mode 100644 index b1d0cc7dde89d04b863ec6be09273577e9d39df8..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_lradc.h +++ /dev/null @@ -1,75 +0,0 @@ -/* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. - - * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in - * the the People's Republic of China and other countries. - * All Allwinner Technology Co.,Ltd. trademarks are used with permission. - - * DISCLAIMER - * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. - * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) - * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN - * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. - * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS - * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. - * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. - - - * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT - * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING - * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE - * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __HAL_LRADC_H__ -#define __HAL_LRADC_H__ - -#include -#include -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -typedef void (*lradc_callback_t)(uint32_t irq_status, uint32_t data); - -typedef struct { - lradc_callback_t func; - void *arg; -} lradc_func_data; - -/***************************************************************************** - * Enums - *****************************************************************************/ -typedef enum{ - HAL_ADC_STATUS_ERROR_PARAMETER = -3, - HAL_ADC_STATUS_ERROR_CHANNEL = -2, - HAL_ADC_STATUS_ERROR = -1, - HAL_ADC_STATUS_OK = 0 -} hal_lradc_status_t; - -/***************************************************************************** - * Functions - *****************************************************************************/ -hal_lradc_status_t hal_lradc_init(void); - -hal_lradc_status_t hal_lradc_deinit(void); - -hal_lradc_status_t hal_lradc_register_callback(lradc_callback_t callback); - -#ifdef __cplusplus -} -#endif - -#endif /*__HAL_LRADC_H__*/ diff --git a/src/platform/f133/include/hal/sunxi_hal_lspsram.h b/src/platform/f133/include/hal/sunxi_hal_lspsram.h deleted file mode 100644 index bbbc1dc3b9100cdac8738b398e95b6b92b051d64..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_lspsram.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _SUNXI_HAL_LSPSRAM_H_ -#define _SUNXI_HAL_LSPSRAM_H_ - -struct psram_chip; - -int platform_psram_chip_config(void); -struct psram_chip *psram_chip_get_para(void); -void psram_suspend(struct psram_chip *psram_para); -int psram_resume(struct psram_chip *psram_para); - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_mbus.h b/src/platform/f133/include/hal/sunxi_hal_mbus.h deleted file mode 100644 index b8f49df9a8fe6997967bc891f923ede5854a532e..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_mbus.h +++ /dev/null @@ -1,72 +0,0 @@ -/* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. - - * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in - * the the People's Republic of China and other countries. - * All Allwinner Technology Co.,Ltd. trademarks are used with permission. - - * DISCLAIMER - * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. - * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) - * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN - * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. - * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS - * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. - * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. - - - * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT - * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING - * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE - * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __HAL_MBUS_H -#define __HAL_MBUS_H - -#include - -#define mbus_err(fmt, args...) printf("%s()%d - "fmt, __func__, __LINE__, ##args) - -/* MBUS PMU ids */ -enum mbus_pmu { - MBUS_PMU_CPU = 0, /* CPU bandwidth */ - MBUS_PMU_GPU, /* GPU bandwidth */ - MBUS_PMU_VE, /* VE */ - MBUS_PMU_DISP, /* DISPLAY */ - MBUS_PMU_OTH, /* other masters */ - MBUS_PMU_TOTAL, /* total masters */ - MBUS_PMU_RV_SYS, /* RV_SYS */ - MBUS_PMU_CE, /* CE */ - MBUS_PMU_DE, /* DE */ - MBUS_PMU_G2D, /* G2D */ - MBUS_PMU_TVD, /* TVD */ - MBUS_PMU_CSI, /* CSI */ - MBUS_PMU_DSP_SYS, /* DSP_SYS */ - MBUS_PMU_DI, /* DI */ - MBUS_PMU_IOMMU, /* IOMMU */ - MBUS_PMU_DMA0, /* DMA0 */ - MBUS_PMU_DMA1, /* DMA1 */ - MBUS_PMU_MAHB, /* MAHB */ -}; - -typedef enum{ - HAL_MBUS_STATUS_ERROR_PARAMETER = -3, - HAL_MBUS_STATUS_ERROR_CHANNEL = -2, - HAL_MBUS_STATUS_ERROR = -1, - HAL_MBUS_STATUS_OK = 0 -}hal_mbus_status_t; - -hal_mbus_status_t hal_mbus_pmu_get_value(enum mbus_pmu type, unsigned int *value); -hal_mbus_status_t hal_mbus_pmu_enable(void); - - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_power.h b/src/platform/f133/include/hal/sunxi_hal_power.h deleted file mode 100644 index 3e61831af7dc6f659488e28ebff9b384db01a86b..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_power.h +++ /dev/null @@ -1,222 +0,0 @@ -/* - * Copyright (c) 2020 Allwinner Technology Co., Ltd. ALL rights reserved. - */ - -#ifndef __SUNXI_HAL_POWER_H__ -#define __SUNXI_HAL_POWER_H__ -#include -#include -#include -#include -#include -#ifdef __cplusplus -extern "C" { -#endif - -/******************************************************************** - * power structs - ********************************************************************/ -struct power_dev{ - unsigned int flag; - struct bat_power_ops *bat_ops; - struct usb_power_ops *usb_ops; - struct power_supply *config; - hal_sem_t irq_schd; -}; - -struct bat_power_ops{ - int (*get_rest_cap) (struct power_dev *); - int (*get_coulumb_counter) (struct power_dev *); - int (*get_bat_present) (struct power_dev *); - int (*get_bat_online) (struct power_dev *); - int (*get_bat_status) (struct power_dev *); - int (*get_bat_health) (struct power_dev *); - int (*get_vbat) (struct power_dev *); - int (*get_ibat) (struct power_dev *); - int (*get_disibat) (struct power_dev *); - int (*get_temp) (struct power_dev *); - int (*get_temp_ambient) (struct power_dev *); - int (*set_chg_cur) (struct power_dev *, int cur); - int (*set_chg_vol) (struct power_dev *, int vol); - int (*set_batfet) (struct power_dev *, int onoff); -}; - -struct usb_power_ops{ - int (*get_usb_status) (struct power_dev *); - int (*get_usb_ihold) (struct power_dev *); - int (*get_usb_vhold) (struct power_dev *); - int (*set_usb_ihold) (struct power_dev *, int cur); - int (*set_usb_vhold) (struct power_dev *, int vol); - int (*get_cc_status) (struct power_dev *); -}; - -/******************************************************************** - * power request_flag - * - * +---> buffer - * | - * | --->Rsv - * | / --->pmu addr - * | / / --->twi port - * | / / / --->buffer - * | / / / / - * +--------------------------------------------------------+ - * |31 28|27 20|19 12|11 8|7 0| - * +--------------------------------------------------------+ - ********************************************************************/ -#define TWI_PORT_SHIFT 8 -#define AXP_ADDR_SHIFT 12 - -#define TWI_PORT(x) (((x) & TWI_PORT_MASK) >> TWI_PORT_SHIFT) -#define AXP_ADDR(x) (((x) & AXP_ADDR_MASK) >> AXP_ADDR_SHIFT) - -#define TWI_PORT_MASK 0x00f00 -#define AXP_ADDR_MASK 0xff000 - -#define AXP_OF_PROP_SET(_name, _value)\ -{\ - power_spy->_name = (int)_value; \ -} - -enum POWER_TYPE_ENUM{ - NO_POWER, - AXP2585_POWER, -}; - -enum POWER_AXP2585_VERSION_ENUM{ - AXP2585_UNKNOWN, - AXP2585_VERSION_C, - AXP2585_VERSION_D, -}; - -enum POWER_SUPPLY_STATUS{ - POWER_SUPPLY_STATUS_UNKNOWN = 0, - POWER_SUPPLY_STATUS_CHARGING, - POWER_SUPPLY_STATUS_DISCHARGING, - POWER_SUPPLY_STATUS_NOT_CHARGING, - POWER_SUPPLY_STATUS_FULL, -}; - -enum POWER_SUPPLY_HEALTH{ - POWER_SUPPLY_HEALTH_UNKNOWN = 0, - POWER_SUPPLY_HEALTH_GOOD, - POWER_SUPPLY_HEALTH_OVERHEAT, - POWER_SUPPLY_HEALTH_DEAD, - POWER_SUPPLY_HEALTH_OVERVOLTAGE, - POWER_SUPPLY_HEALTH_UNSPEC_FAILURE, - POWER_SUPPLY_HEALTH_COLD, - POWER_SUPPLY_HEALTH_WATCHDOG_TIMER_EXPIRE, - POWER_SUPPLY_HEALTH_SAFETY_TIMER_EXPIRE, -}; - -struct power_supply { - u32 pmu_used; - u32 pmu_id; - u32 pmu_version; - u32 pmu_battery_rdc; - u32 pmu_battery_cap; - u32 pmu_batdeten; - u32 pmu_chg_ic_temp; - u32 pmu_runtime_chgcur; - u32 pmu_suspend_chgcur; - u32 pmu_shutdown_chgcur; - u32 pmu_init_chgvol; - u32 pmu_init_chgend_rate; - u32 pmu_init_chg_enabled; - u32 pmu_init_bc_en; - u32 pmu_init_adc_freq; - u32 pmu_init_adcts_freq; - u32 pmu_init_chg_pretime; - u32 pmu_init_chg_csttime; - u32 pmu_batt_cap_correct; - u32 pmu_chg_end_on_en; - u32 pmu_ocv_coulumb_100; - - u32 pmu_bat_para[32]; - - u32 pmu_ac_vol; - u32 pmu_ac_cur; - u32 pmu_usbpc_vol; - u32 pmu_usbpc_cur; - u32 pmu_usbad_vol; - u32 pmu_usbad_cur; - u32 pmu_pwroff_vol; - u32 pmu_pwron_vol; - u32 pmu_powkey_off_time; - u32 pmu_powkey_off_en; - u32 pmu_powkey_off_delay_time; - u32 pmu_powkey_off_func; - u32 pmu_powkey_long_time; - u32 pmu_powkey_on_time; - u32 pmu_pwrok_time; - u32 pmu_pwrnoe_time; - u32 pmu_reset_shutdown_en; - u32 pmu_battery_warning_level1; - u32 pmu_battery_warning_level2; - u32 pmu_restvol_adjust_time; - u32 pmu_ocv_cou_adjust_time; - u32 pmu_chgled_func; - u32 pmu_chgled_type; - u32 pmu_vbusen_func; - u32 pmu_reset; - u32 pmu_irq_wakeup; - u32 pmu_hot_shutdown; - u32 pmu_inshort; - u32 power_start; - u32 pmu_as_slave; - u32 pmu_bat_unused; - u32 pmu_ocv_en; - u32 pmu_cou_en; - u32 pmu_update_min_time; - - u32 pmu_bat_temp_enable; - u32 pmu_bat_charge_ltf; - u32 pmu_bat_charge_htf; - u32 pmu_bat_shutdown_ltf; - u32 pmu_bat_shutdown_htf; - u32 pmu_bat_temp_para[16]; - - u32 pmu_irq_no; - u32 pmu_bc12_en; - gpio_pin_t pmu_irq_pin; -}; - -/******************************************************************** - * power init - ********************************************************************/ -int hal_power_twi_init(struct power_dev *rdev); -int hal_power_init(void); -int hal_power_get(struct power_dev *rdev); -int hal_power_put(struct power_dev *rdev); - -/******************************************************************** - * power ops - ********************************************************************/ - -int hal_power_get_bat_cap(struct power_dev *rdev); -int hal_power_get_coulumb_counter(struct power_dev *rdev); -int hal_power_get_bat_present(struct power_dev *rdev); -int hal_power_get_bat_online(struct power_dev *rdev); -int hal_power_get_bat_status(struct power_dev *rdev); -int hal_power_get_bat_health(struct power_dev *rdev); -int hal_power_get_vbat(struct power_dev *rdev); -int hal_power_get_ibat(struct power_dev *rdev); -int hal_power_get_disibat(struct power_dev *rdev); -int hal_power_get_temp(struct power_dev *rdev); -int hal_power_get_temp_ambient(struct power_dev *rdev); -int hal_power_set_chg_cur(struct power_dev *rdev, int cur); -int hal_power_set_chg_vol(struct power_dev *rdev, int vol); -int hal_power_set_batfet(struct power_dev *rdev, int onoff); - -int hal_power_get_usb_status(struct power_dev *rdev); -int hal_power_get_usb_ihold(struct power_dev *rdev); -int hal_power_get_usb_vhold(struct power_dev *rdev); -int hal_power_set_usb_ihold(struct power_dev *rdev, int cur); -int hal_power_set_usb_vhold(struct power_dev *rdev, int vol); -int hal_power_get_cc_status(struct power_dev *rdev); - -#ifdef __cplusplus -} -#endif - -#endif /* __SUNXI_HAL_POWER_H__ */ diff --git a/src/platform/f133/include/hal/sunxi_hal_power_private.h b/src/platform/f133/include/hal/sunxi_hal_power_private.h deleted file mode 100644 index 38927215f156aea08c0603b85d587755ec444535..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_power_private.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (c) 2020 Allwinner Technology Co., Ltd. ALL rights reserved. - */ - -#ifndef __SUNXI_HAL_REGULATOR_PRI_H__ -#define __SUNXI_HAL_REGULATOR_PRI_H__ -#ifdef __cplusplus -extern "C" { -#endif - -typedef short s16; -typedef long long int s64; - -typedef unsigned char u8; -typedef unsigned short u16; -typedef unsigned long long int u64; -int hal_power_byte_read(struct power_dev *rdev, u8 reg, u8 *reg_val); -int hal_power_byte_write(struct power_dev *rdev, u8 reg, u8 reg_val); -int hal_power_byte_update(struct power_dev *rdev, u8 reg, u8 val, u8 mask); -int hal_power_byte_bulk_read(struct power_dev *rdev, u8 reg, void *reg_val, int val_count); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_prcm.h b/src/platform/f133/include/hal/sunxi_hal_prcm.h deleted file mode 100644 index 2dc5482a6d2ee1ab2e64c41ae336ff030109f551..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_prcm.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef _SUNXI_HAL_PRCM_H -#define _SUNXI_HAL_PRCM_H - -#include -#include - - -#endif /* _SUNXI_HAL_PRCM_H */ diff --git a/src/platform/f133/include/hal/sunxi_hal_pwm.h b/src/platform/f133/include/hal/sunxi_hal_pwm.h deleted file mode 100644 index ad514c2d10b92f161d0232d0ee4f3088c9381d75..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_pwm.h +++ /dev/null @@ -1,165 +0,0 @@ - -/* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. - - * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in - * the the People's Republic of China and other countries. - * All Allwinner Technology Co.,Ltd. trademarks are used with permission. - - * DISCLAIMER - * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. - * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) - * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN - * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. - * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS - * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. - * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. - - - * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT - * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING - * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE - * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - - */ - -#ifndef __SUNXI_HAL_PWM_H__ -#define __SUNXI_HAL_PWM_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include -#include -// #include -#include - -//#define CONFIG_DRIVERS_PWM_DEBUG -#ifdef CONFIG_DRIVERS_PWM_DEBUG -#define PWM_INFO(fmt, arg...) hal_log_info(fmt, ##arg) -#else -#define PWM_INFO(fmt, arg...) do {}while(0) -#endif - -#define PWM_ERR(fmt, arg...) hal_log_err(fmt, ##arg) - -#define PRESCALE_MAX 256 - -/************* - *SET_BITS set - * **********/ -#define SETMASK(width, shift) ((width?((-1U) >> (32-width)):0) << (shift)) -#define CLRMASK(width, shift) (~(SETMASK(width, shift))) -#define GET_BITS(shift, width, reg) \ - (((reg) & SETMASK(width, shift)) >> (shift)) -#define SET_BITS(shift, width, reg, val) \ - (((reg) & CLRMASK(width, shift)) | (val << (shift))) - -/* define shift and width */ -#define PWM_CLK_SRC_SHIFT 0x7 -#define PWM_CLK_SRC_WIDTH 0x2 - -#define PWM_DIV_M_SHIFT 0x0 -#define PWM_DIV_M_WIDTH 0x4 - -#define PWM_PRESCAL_SHIFT 0x0 -#define PWM_PRESCAL_WIDTH 0x8 - -#define PWM_ACT_CYCLES_SHIFT 0x0 -#define PWM_ACT_CYCLES_WIDTH 0x10 - -#define PWM_PERIOD_CYCLES_SHIFT 0x10 -#define PWM_PERIOD_CYCLES_WIDTH 0x10 - -/***************************************************************************** - * Enums - *****************************************************************************/ -typedef unsigned long pwm_status_t; - -typedef enum -{ - PWM_CLK_OSC, - PWM_CLK_APB, -} hal_pwm_clk_src; - -typedef enum -{ - PWM_POLARITY_INVERSED = 0, - PWM_POLARITY_NORMAL = 1, -} hal_pwm_polarity; - -typedef enum -{ - PWM_CONTROL = 0, - PWM_CHANNEL_INT = 1, - PWM_CHANNEL_UNINT = 2, -} hal_pwm_cmd_t; - -typedef struct pwm_config -{ - uint32_t duty_ns; - uint32_t period_ns; - hal_pwm_polarity polarity; -} pwm_config_t; - -static u32 hal_pwm_regs_offset[] = { - PWM_PIER, - PWM_CIER, - PWM_PCCR01, - PWM_PCCR23, - PWM_PCCR45, - PWM_PCCR67, - PWM_PCGR, - PWM_PDZCR01, - PWM_PDZCR23, - PWM_PDZCR45, - PWM_PDZCR67, - PWM_PER, - PWM_CER, - PWM_PCR, - PWM_PPR, - PWM_CCR, - PWM_PCNTR, -}; - -typedef struct -{ - hal_clk_type_t pwm_clk_type; - hal_clk_id_t pwm_bus_clk_id; - hal_clk_t pwm_bus_clk; - hal_reset_type_t pwm_reset_type; - hal_reset_id_t pwm_reset_id; - struct reset_control *pwm_reset; - - bool pin_state[PWM_NUM]; - gpio_pin_t pin[PWM_NUM]; - gpio_muxsel_t enable_muxsel[PWM_NUM]; - u32 regs_backup[ARRAY_SIZE(hal_pwm_regs_offset)]; -} hal_pwm_t; - -pwm_status_t hal_pwm_init(void); -pwm_status_t hal_pwm_control(int channel, struct pwm_config *config_pwm); -void hal_pwm_enable_controller(uint32_t channel_in); -void hal_pwm_disable_controller(uint32_t channel_in); -pwm_status_t hal_pwm_deinit(void); - -int hal_pwm_resume(void *dev); -int hal_pwm_suspend(void *dev); - -#ifdef __cplusplus -} -#endif - -#endif /* __SUNXI_HAL_PWM_H__ */ - - diff --git a/src/platform/f133/include/hal/sunxi_hal_rcosc_cali.h b/src/platform/f133/include/hal/sunxi_hal_rcosc_cali.h deleted file mode 100644 index 2f59b0a939c7a7640dca34f8258033d2dc8c3b67..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_rcosc_cali.h +++ /dev/null @@ -1,115 +0,0 @@ -/** - * @file hal_rcosc_cali.h - * @author XRADIO IOT WLAN Team - */ - -/* - * Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_HAL_RCOSC_CALI_H_ -#define _DRIVER_CHIP_HAL_RCOSC_CALI_H_ - -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#ifndef HAL_ASSERT_PARAM -#define HAL_ASSERT_PARAM(exp) \ - do { \ - if (!(exp)) { \ - printf("Invalid param at %s:%d\n", __func__, __LINE__); \ - } \ - } while (0) -#endif - -#define RCOCALI_CNT_TARGET_MASK (0x0FFFF) -#define RCOCALI_RCO_DIVIDEND_MASK (0xFFFFFFFF) -#define RCOCALI_DCXO_CNT_MASK (0x3FFFFF) - -#define RCOCALI_QUOTIENT_INVALID_FLAG (0x1<<0) -#define RCOCALI_DENOMINATOR_INVALID_FLAG (0x1<<1) -#define RCOCALI_PARAM_ERR_CLR (0x1<<2) -#define RCOCALI_MONITOR_EN (0x1<<4) -#define RCOCALI_ABNORMAL_FLAG_CLR (0x1<<5) -#define RCOCALI_LONG_LEVEL_FOUND (0x1<<6) -#define RCOCALI_GLITCH_FOUND (0x1<<7) -#define RCOCALI_GLITCH_MAX_WIDTH_MASK (0x7F<<8) -#define RCOCALI_LEVEL_MAX_WIDTH_MASK (0xFFFF<<16) - -#define RCOCALI_INT_CLR (0x1<<1) -#define RCOCALI_INT_EN (0x1<<0) - -typedef struct { - __IO uint32_t CNT_TARGET; /* , Address offset: 0x000 */ - __IO uint32_t DIVIDEND; /* , Address offset: 0x004 */ - __O uint32_t DCXO_CNT; /* , Address offset: 0x008 */ - __IO uint32_t ABNORMAL_MONITOR; /* , Address offset: 0x00C */ - __IO uint32_t INTERRUPT; /* , Address offset: 0x010 */ -} RCOCALI_CTRL_T; - -#define RCOSC_CALI_CTRL_BASE (0x4004C800) - -#define RCOCALI_CTRL ((RCOCALI_CTRL_T *)RCOSC_CALI_CTRL_BASE) - -/** - * @brief RcoscCali initialization parameters - */ -typedef struct { - uint32_t cnt_n; - uint32_t out_clk; -} RCOCALI_InitParam; - -/** - * @brief RcoscCali configure parameters - */ -typedef struct { - PRCM_RCOSC_WkModSel mode; - PRCM_RCOSC_SCALE_PHASE2_WkTimes phase2_times; - PRCM_RCOSC_SCALE_PHASE3_WkTimes phase3_times; - uint8_t phase1_num; - uint8_t phase2_num; - uint16_t wup_time; -} RCOCALI_ConfigParam; - -hal_status_t HAL_RcoscCali_Init(const RCOCALI_InitParam *param); -hal_status_t HAL_RcoscCali_Init(const RCOCALI_InitParam *param); -hal_status_t HAL_RcoscCali_DeInit(void); -void HAL_RcoscCali_Start(); - -hal_status_t hal_get_rccal_output_freq(uint32_t *rccal_clk_freq); -hal_status_t hal_get_rc_lf_freq(uint32_t *rc_lf_freq); - -#ifdef __cplusplus -} -#endif - -#endif /* _DRIVER_CHIP_HAL_RCOSC_CALI_H_ */ diff --git a/src/platform/f133/include/hal/sunxi_hal_regulator.h b/src/platform/f133/include/hal/sunxi_hal_regulator.h deleted file mode 100644 index c4f82d15416f2d85aa8a7cf8dfbf4a9b709ba668..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_regulator.h +++ /dev/null @@ -1,358 +0,0 @@ -/* - * Copyright (c) 2020 Allwinner Technology Co., Ltd. ALL rights reserved. - */ - -#ifndef __SUNXI_HAL_REGULATOR_H__ -#define __SUNXI_HAL_REGULATOR_H__ -#include -#include -#ifdef __cplusplus -extern "C" { -#endif - -struct regulator_dev; - -struct regulator_ops{ - int (*enable) (struct regulator_dev *); - int (*disable) (struct regulator_dev *); - int (*set_voltage) (struct regulator_dev *, int target_uV); - int (*get_voltage) (struct regulator_dev *, int *vol_uV); - int (*set_en) (struct regulator_dev *, unsigned int flags); - int (*set_voltage_ext) (struct regulator_dev *, int target_uV, unsigned int status); - int (*get_voltage_ext) (struct regulator_dev *, int *vol_uV, unsigned int status); -}; - -struct regulator_dev{ - unsigned int flag; - struct regulator_ops *ops; - void *private; -}; - -struct regulator_linear_range { - unsigned int min_uV; - unsigned int min_sel; - unsigned int max_sel; - unsigned int uV_step; -}; - -struct regulator_desc { - int min_uv; - int max_uv; - int step1_uv; - int vol_reg; - int vol_mask; - int enable_reg; - int enable_mask; - int enable_val; - int disable_val; - const struct regulator_linear_range *linear_ranges; - int n_linear_ranges; - int *vtable; - int vol_act_mask; - int vol_slp_mask; -}; - -#define AXP_DESC(min, max, step1, vreg, vmask, ereg, emask)\ -{ \ - .min_uv = (min) * 1000, \ - .max_uv = (max) * 1000, \ - .step1_uv = (step1) * 1000, \ - .vol_reg = vreg, \ - .vol_mask = (vmask), \ - .enable_reg = ereg, \ - .enable_mask = (emask), \ -} - -#define AXP_DESC_FIXED(volt)\ -{ \ - .min_uv = (volt) * 1000, \ - .max_uv = (volt) * 1000, \ -} - -#define AXP_IO(min, max, step1, vreg, vmask, ereg, emask, eval, disval)\ -{ \ - .min_uv = (min) * 1000, \ - .max_uv = (max) * 1000, \ - .step1_uv = (step1) * 1000, \ - .vol_reg = vreg, \ - .vol_mask = (vmask), \ - .enable_reg = ereg, \ - .enable_mask = (emask), \ - .enable_val = eval, \ - .disable_val = disval, \ -} - -#define AXP_DESC_RANGES(_ranges, vreg, vmask, ereg, emask)\ -{ \ - .vol_reg = vreg, \ - .vol_mask = (vmask), \ - .enable_reg = ereg, \ - .enable_mask = (emask), \ - .linear_ranges = (_ranges), \ - .n_linear_ranges = ARRAY_SIZE(_ranges), \ -} - -#define AXP_SW(ereg, emask)\ -{ \ - .enable_reg = ereg, \ - .enable_mask = (emask), \ -} - -#define AXP_SEL(min, max, vreg, vmask, ereg, emask, table_name)\ -{ \ - .min_uv = (min) * 1000, \ - .max_uv = (max) * 1000, \ - .vol_reg = vreg, \ - .vol_mask = (vmask), \ - .enable_reg = ereg, \ - .enable_mask = (emask), \ - .vtable = (int *)&table_name##_table, \ -} - -/* Initialize struct regulator_linear_range */ -#define REGULATOR_LINEAR_RANGE(_min_uV, _min_sel, _max_sel, _step_uV) \ -{ \ - .min_uV = _min_uV, \ - .min_sel = _min_sel, \ - .max_sel = _max_sel, \ - .uV_step = _step_uV, \ -} - -/* soc_regulators */ - -#define SOC_DESC(min, max, step1, vreg, vmask_act, vmask_slp, ereg, emask)\ -{ \ - .min_uv = (int)min * 1000, \ - .max_uv = (int)max * 1000, \ - .step1_uv = (int)step1 * 1000, \ - .vol_reg = (int)vreg, \ - .vol_act_mask = (int)vmask_act, \ - .vol_slp_mask = (int)vmask_slp, \ - .enable_reg = (int)ereg, \ - .enable_mask = (int)emask, \ -} - -#define SOC_DESC_RANGES(_ranges, vreg, vmask_act, vmask_slp, ereg, emask)\ -{ \ - .vol_reg = (int)vreg, \ - .vol_act_mask = (int)vmask_act, \ - .vol_slp_mask = (int)vmask_slp, \ - .linear_ranges = (_ranges), \ - .n_linear_ranges = ARRAY_SIZE(_ranges), \ - .enable_reg = (int)ereg, \ - .enable_mask = (int)emask, \ -} - -/* for request_flag */ -#define TWI_PORT_SHIFT 8 -#define AXP_ADDR_SHIFT 12 -#define REGULATOR_TYPE_SHIFT 28 - -#define REGULATOR_ID(x) ((x) & AXP_ID_MASK) -#define TWI_PORT(x) (((x) & TWI_PORT_MASK) >> TWI_PORT_SHIFT) -#define AXP_ADDR(x) (((x) & AXP_ADDR_MASK) >> AXP_ADDR_SHIFT) -#define REGULATOR_TYPE(x) ((x) >> REGULATOR_TYPE_SHIFT) - -#define AXP_ID_MASK 0x000ff -#define TWI_PORT_MASK 0x00f00 -#define AXP_ADDR_MASK 0xff000 - -#define REGULATOR_GET(x, y) (((x) << REGULATOR_TYPE_SHIFT) | (y)) - -enum REGULATOR_TYPE_ENUM{ - AXP2101_REGULATOR, - PWM_REGULATOR, - GPIO_REGULATOR, - SOC_REGULATOR, - UNKNOWN_REGULATOR, -}; - -enum SOC_REGULATOR_STATUS_ENUM{ - ACT_MODE, - SLEEP_MODE, -}; - -enum SOC_REGULATOR_DCDC_SET_ENUM{ - DCDC_DEFAULT = 1, - DCDC_OPEN, - DCDC_CLOSE, -}; - -enum SOC_REGULATOR_LDO_EXT_SET_ENUM{ - LDO_EXT_OFF, - LDO_EXT_WITH_TOP_LDO, - LDO_EXT_ALWAYS_ON, -}; - -/* - * +---> regulator type - * | - * | --->Rsv - * | / --->pmu addr - * | / / --->twi port - * | / / / --->regulator id - * | / / / / - * +--------------------------------------------------------+ - * |31 28|27 20|19 12|11 8|7 0| - * +--------------------------------------------------------+ - */ - -//FIXME -/* -typedef short s16; -typedef long long int s64; - -typedef unsigned char u8; -typedef unsigned short u16; -typedef unsigned long long int u64; -*/ -static inline int hal_regulator_get_voltage(struct regulator_dev *rdev, - int *vol_uV) -{ - if(rdev && rdev->ops && rdev->ops->get_voltage) - { - return rdev->ops->get_voltage(rdev, vol_uV); - } - else - { - hal_soft_break(); - hal_log_err("fatal error."); - } - return 0; -} - -static inline int hal_regulator_set_voltage(struct regulator_dev *rdev, - int target_uV) -{ - if(rdev && rdev->ops && rdev->ops->set_voltage) - { - return rdev->ops->set_voltage(rdev, target_uV); - } - else - { - hal_soft_break(); - hal_log_err("fatal error."); - } - return 0; -} - -static inline int hal_regulator_enable(struct regulator_dev *rdev) -{ - if(rdev && rdev->ops && rdev->ops->enable) - { - return rdev->ops->enable(rdev); - } - else - { - hal_soft_break(); - hal_log_err("fatal error."); - } - return 0; -} - -static inline int hal_regulator_disable(struct regulator_dev *rdev) -{ - if(rdev && rdev->ops && rdev->ops->disable) - { - return rdev->ops->disable(rdev); - } - else - { - hal_soft_break(); - hal_log_err("fatal error."); - } - - return 0; -} -/* ext */ -static inline int hal_regulator_get_voltage_ext(struct regulator_dev *rdev, - int *vol_uV, unsigned int status) -{ - if(rdev && rdev->ops && rdev->ops->get_voltage_ext) - { - return rdev->ops->get_voltage_ext(rdev, vol_uV, status); - } - else - { - hal_soft_break(); - hal_log_err("fatal error."); - } - return 0; -} - -static inline int hal_regulator_set_voltage_ext(struct regulator_dev *rdev, - int target_uV, unsigned int status) -{ - if(rdev && rdev->ops && rdev->ops->set_voltage_ext) - { - return rdev->ops->set_voltage_ext(rdev, target_uV, status); - } - else - { - hal_soft_break(); - hal_log_err("fatal error."); - } - return 0; -} - -static inline int hal_regulator_set_able(struct regulator_dev *rdev, unsigned int flags) -{ - if(rdev && rdev->ops && rdev->ops->set_en) - { - return rdev->ops->set_en(rdev, flags); - } - else - { - hal_soft_break(); - hal_log_err("fatal error."); - } - return 0; -} - -int hal_regulator_get(unsigned int request_flag, struct regulator_dev *rdev); -/* TODO fix void type */ -/* TODO fix void type */ - -enum REGULATOR_ID_ENUM { - AXP2101_ID_DCDC1 = 0, - AXP2101_ID_DCDC2, - AXP2101_ID_DCDC3, - AXP2101_ID_DCDC4, - AXP2101_ID_DCDC5, - AXP2101_ID_ALDO1, - AXP2101_ID_ALDO2, - AXP2101_ID_ALDO3, - AXP2101_ID_ALDO4, - AXP2101_ID_BLDO1, - AXP2101_ID_BLDO2, - AXP2101_ID_DLDO1, - AXP2101_ID_DLDO2, - AXP2101_ID_CPUSLDO, - AXP2101_ID_MAX, -}; -extern const struct regulator_desc axp2101_regulators[]; - -enum REGULATOR_SOC_ID_ENUM { - SOC_ID_DCDC = 0, - SOC_ID_RTC, - SOC_ID_EXT_LDO, - SOC_ID_TOP_LDO, - SOC_ID_AON_LDO, - SOC_ID_APP_LDO, - SOC_ID_DSP_LDO, - SOC_ID_MAX, -}; -extern const struct regulator_desc soc_regulators[]; - -int hal_axp_twi_init(struct regulator_dev *rdev); -int hal_soc_regulator_init(void); -/*int hal_axp_byte_read(struct regulator_dev *rdev, u8 reg, u8 *reg_val); -int hal_axp_byte_write(struct regulator_dev *rdev, u8 reg, u8 reg_val); -int hal_axp_byte_update(struct regulator_dev *rdev, u8 reg, u8 val, u8 mask); -*/ - -#ifdef __cplusplus -} -#endif - -#endif /* __SUNXI_HAL_REGULATOR_H__ */ diff --git a/src/platform/f133/include/hal/sunxi_hal_regulator_private.h b/src/platform/f133/include/hal/sunxi_hal_regulator_private.h deleted file mode 100644 index d7a6f7981d8e7e1ac21b8751dc23f19f9926b7ab..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_regulator_private.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright (c) 2020 Allwinner Technology Co., Ltd. ALL rights reserved. - */ - -#ifndef __SUNXI_HAL_REGULATOR_PRI_H__ -#define __SUNXI_HAL_REGULATOR_PRI_H__ -#ifdef __cplusplus -extern "C" { -#endif - -typedef short s16; -typedef long long int s64; - -typedef unsigned char u8; -typedef unsigned short u16; -typedef unsigned long long int u64; -int hal_axp_byte_read(struct regulator_dev *rdev, u8 reg, u8 *reg_val); -int hal_axp_byte_write(struct regulator_dev *rdev, u8 reg, u8 reg_val); -int hal_axp_byte_update(struct regulator_dev *rdev, u8 reg, u8 val, u8 mask); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_rtc.h b/src/platform/f133/include/hal/sunxi_hal_rtc.h deleted file mode 100644 index 91796982e0771e2406a5b9cd4815e254008a12cb..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_rtc.h +++ /dev/null @@ -1,156 +0,0 @@ -#ifndef _SUNXI_HAL_RTC_H -#define _SUNXI_HAL_RTC_H - -#include -#include -#include -#include -#include - -/* - * Time unit conversions - */ -#define SEC_IN_MIN 60 -#define SEC_IN_HOUR (60 * SEC_IN_MIN) -#define SEC_IN_DAY (24 * SEC_IN_HOUR) - -/* - * The year parameter passed to the driver is usually an offset relative to - * the year 1900. This macro is used to convert this offset to another one - * relative to the minimum year allowed by the hardware. - */ -#define SUNXI_YEAR_OFF(x) ((x)->min - 1900) - -#define EFEX_FLAG (0x5AA5A55A) -#define RTC_FEL_INDEX 2 -#define RTC_BOOT_INDEX 6 -#define RTC_LOG_LEVEL_INDEX 5 - -/* debug */ -#define SUNXI_DEBUG_MODE_FLAG (0x59) -/* efex */ -#define SUNXI_EFEX_CMD_FLAG (0x5A) -/* boot-resignature */ -#define SUNXI_BOOT_RESIGNATURE_FLAG (0x5B) -/* recovery or boot-recovery */ -#define SUNXI_BOOT_RECOVERY_FLAG (0x5C) -/* sysrecovery */ -#define SUNXI_SYS_RECOVERY_FLAG (0x5D) -/* usb-recovery*/ -#define SUNXI_USB_RECOVERY_FLAG (0x5E) -/* bootloader */ -#define SUNXI_FASTBOOT_FLAG (0x5F) -/* uboot */ -#define SUNXI_UBOOT_FLAG (0x60) - -#define SUNXI_MASK_DH 0x0000001f -#define SUNXI_MASK_SM 0x0000003f -#define SUNXI_MASK_M 0x0000000f -#define SUNXI_MASK_LY 0x00000001 -#define SUNXI_MASK_D 0x00000ffe - -#define SUNXI_GET(x, mask, shift) (((x) & ((mask) << (shift))) \ - >> (shift)) - -#define SUNXI_SET(x, mask, shift) (((x) & (mask)) << (shift)) - -/* - * Get date values - */ -#define SUNXI_DATE_GET_DAY_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 0) -#define SUNXI_DATE_GET_MON_VALUE(x) SUNXI_GET(x, SUNXI_MASK_M, 8) -#define SUNXI_DATE_GET_YEAR_VALUE(x, d) SUNXI_GET(x, (d)->mask, (d)->yshift) - -/* - * Get time values - */ -#define SUNXI_TIME_GET_SEC_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 0) -#define SUNXI_TIME_GET_MIN_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 8) -#define SUNXI_TIME_GET_HOUR_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 16) - -/* - * Get alarm values - */ -#define SUNXI_ALRM_GET_SEC_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 0) -#define SUNXI_ALRM_GET_MIN_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 8) -#define SUNXI_ALRM_GET_HOUR_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 16) - -/* - * Set date values - */ -#define SUNXI_DATE_SET_DAY_VALUE(x) SUNXI_DATE_GET_DAY_VALUE(x) -#define SUNXI_DATE_SET_MON_VALUE(x) SUNXI_SET(x, SUNXI_MASK_M, 8) -#define SUNXI_DATE_SET_YEAR_VALUE(x, d) SUNXI_SET(x, (d)->mask, (d)->yshift) -#define SUNXI_LEAP_SET_VALUE(x, shift) SUNXI_SET(x, SUNXI_MASK_LY, shift) - -/* - * Set time values - */ -#define SUNXI_TIME_SET_SEC_VALUE(x) SUNXI_TIME_GET_SEC_VALUE(x) -#define SUNXI_TIME_SET_MIN_VALUE(x) SUNXI_SET(x, SUNXI_MASK_SM, 8) -#define SUNXI_TIME_SET_HOUR_VALUE(x) SUNXI_SET(x, SUNXI_MASK_DH, 16) - -/* - * Set alarm values - */ -#define SUNXI_ALRM_SET_SEC_VALUE(x) SUNXI_ALRM_GET_SEC_VALUE(x) -#define SUNXI_ALRM_SET_MIN_VALUE(x) SUNXI_SET(x, SUNXI_MASK_SM, 8) -#define SUNXI_ALRM_SET_HOUR_VALUE(x) SUNXI_SET(x, SUNXI_MASK_DH, 16) -#define SUNXI_ALRM_SET_DAY_VALUE(x) SUNXI_SET(x, SUNXI_MASK_D, 21) - -typedef int (*rtc_callback_t)(void); -/* - * min and max year are arbitrary set considering the limited range of the - * hardware register field - */ -struct hal_rtc_data_year -{ - unsigned int min; /* min year allowed */ - unsigned int max; /* max year allowed */ - unsigned int mask; /* mask for the year field */ - unsigned int yshift; /* bit shift to get the year */ - unsigned char leap_shift; /* bit shift to get the leap year */ -}; - -struct hal_rtc_dev -{ - struct hal_rtc_data_year *data_year; - rtc_callback_t user_callback; - unsigned long base; - int irq; - hal_clk_t bus_clk; - hal_clk_t rtc1k_clk; - hal_clk_t rtcspi_clk; - struct reset_control *reset; - -}; - -typedef enum -{ - RTC_GET_TIME = 0, - RTC_SET_TIME = 1, - RTC_GET_ALARM = 2, - RTC_SET_ALARM = 3, - RTC_CALLBACK = 4, - RTC_IRQENABLE = 5 -} hal_rtc_transfer_cmd_t; - -void hal_rtc_set_fel_flag(void); -u32 hal_rtc_probe_fel_flag(void); -void hal_rtc_clear_fel_flag(void); -int hal_rtc_get_bootmode_flag(void); -int hal_rtc_set_bootmode_flag(u8 flag); -void hal_rtc_write_data(int index, u32 val); -u32 hal_rtc_read_data(int index); -int hal_rtc_gettime(struct rtc_time *rtc_tm); -int hal_rtc_settime(struct rtc_time *rtc_tm); -int hal_rtc_getalarm(struct rtc_wkalrm *wkalrm); -int hal_rtc_setalarm(struct rtc_wkalrm *wkalrm); -int hal_rtc_alarm_irq_enable(unsigned int enabled); -void hal_rtc_min_year_show(unsigned int *min); -void hal_rtc_max_year_show(unsigned int *max); -int hal_rtc_register_callback(rtc_callback_t user_callback); -int hal_rtc_init(void); -int hal_rtc_deinit(void); - -#endif /* _SUNXI_HAL_RTC_H */ diff --git a/src/platform/f133/include/hal/sunxi_hal_scr.h b/src/platform/f133/include/hal/sunxi_hal_scr.h deleted file mode 100644 index 7967d4a59724a9fccf614f8df862d343251c531a..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_scr.h +++ /dev/null @@ -1,191 +0,0 @@ -/* - * drivers/char/sunxi-scr/sunxi-scr.h - * - * Copyright (C) 2016 Allwinner. - * fuzhaoke - * - * SUNXI SCR Register Definition - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - */ - -#ifndef __SUNXI_HAL_SCR_H__ -#define __SUNXI_HAL_SCR_H__ - -//#include "scr/smartcard.h" -#include -#include -#include -#include - -#define MAX_ATR_LEN 33 -#define GPIO_NUM 7 - -/* ==================== For debug =============================== */ -#define SCR_ENTER() pr_info("%s()%d - %s\n", __func__, __LINE__, "Enter ...") -#define SCR_EXIT() pr_info("%s()%d - %s\n", __func__, __LINE__, "Exit") -#define SCR_DBG(fmt, arg...) pr_debug("%s()%d - "fmt, __func__, __LINE__, ##arg) -#define SCR_INFO(fmt, arg...) pr_info("%s()%d - "fmt, __func__, __LINE__, ##arg) -#define SCR_WARN(fmt, arg...) pr_warn("%s()%d - "fmt, __func__, __LINE__, ##arg) -#define SCR_ERR(fmt, arg...) pr_err("%s()%d - "fmt, __func__, __LINE__, ##arg) - -/* ioctrol command */ -enum scr_cmd { - SCR_IOCGSTATUS = 0, - SCR_IOCRESET, - SCR_IOCGATR, - SCR_IOCGPARA, - SCR_IOCSPARA, - SCR_IOCGATRPARA, - SCR_IOCGPPSPARA, - SCR_IOCWRDATA, -}; - -enum scr_card_sta { - SCR_CARD_OUT = 0, - SCR_CARD_IN, -}; - -/* ATR data */ -struct scr_atr { - unsigned char atr_len; - unsigned char atr_data[MAX_ATR_LEN]; -}; - -/* current card parameters & status */ -struct scr_card_para { - uint16_t f; - uint16_t d; - uint16_t freq; - uint8_t recv_no_parity; - uint8_t protocol_type; -}; - -/* parse ATR data */ -struct smc_atr_para { - uint8_t TS; - - uint8_t TK[15]; - uint8_t TK_NUM; - - uint8_t T; /* Protocol */ - uint8_t FMAX; /* unit: MHz */ - uint32_t F; - uint32_t D; - uint32_t I; /* Max Cunrrent for Program, in mA */ - uint32_t P; /* Pogram Voltage */ - uint32_t N; /* Extra Guard Time, in ETUs */ -}; - -/* parse ATR data for PPS */ -struct smc_pps_para { - uint8_t ppss; - uint8_t pps0; - uint8_t pps1; - uint8_t pps2; - uint8_t pps3; - uint8_t pck; -}; - -/* write cmd and read data immediately */ -struct scr_wr_data { - uint8_t *cmd_buf; - uint32_t cmd_len; - uint8_t *rtn_data; - uint32_t rtn_len; - uint8_t psw1; - uint8_t psw2; -}; - -enum scr_atr_status { - SCR_ATR_RESP_INVALID, - SCR_ATR_RESP_FAIL, - SCR_ATR_RESP_AGAIN, - SCR_ATR_RESP_OK, -}; - -typedef enum -{ - SCR_PIN_ERR = -3, - SCR_CLK_ERR = -2, - SCR_IRQ_ERR = -1, - SCR_OK = 0, -} hal_scr_status_t; - -typedef struct sunxi_scr { - hal_clk_t clk; - hal_clk_t pclk; - - hal_clk_id_t clk_id; - hal_clk_type_t clk_type; - - hal_clk_id_t pclk_id; - hal_clk_type_t pclk_type; - - hal_reset_id_t reset_id; - hal_reset_type_t reset_type; - - struct reset_control *reset; - - gpio_pin_t pin; - uint8_t pin_mux; - uint8_t pin_drv; - - uint16_t irq_num; - uint32_t reg_base; - - uint32_t clk_freq; - hal_spinlock_t rx_lock; - - bool suspended; - - /* smart card register parameters */ - uint32_t inten_bm; /* interrupt enable bit map */ - uint32_t txfifo_thh; /* txfifo threshold */ - uint32_t rxfifo_thh; /* rxfifo threahold */ - uint32_t tx_repeat; /* tx repeat */ - uint32_t rx_repeat; /* rx repeat */ - uint32_t scclk_div; /* scclk divisor */ - uint32_t baud_div; /* baud divisor */ - uint8_t act_time; /* active/deactive time, in scclk cycles */ - uint8_t rst_time; /* reset time, in scclk cycles */ - uint8_t atr_time; /* ATR limit time, in scclk cycles */ - uint32_t guard_time; /* gaurd time, in ETUs */ - uint32_t chlimit_time; /* character limit time, in ETUs */ - - /* some necessary flags */ -// volatile uint8_t atr_resp; - uint8_t atr_resp; -// volatile uint8_t rx_transmit_status; - uint8_t rx_transmit_status; - - struct scr_card_para card_para; - struct scr_atr scr_atr_des; - struct smc_atr_para smc_atr_para; - struct smc_pps_para smc_pps_para; - -// wait_queue_head_t scr_poll; - struct timer_list *poll_timer; // fix me - bool card_in; - bool card_last; -} hal_scr_t; - -typedef struct { - uint32_t gpio; - uint8_t enable_mux; - uint8_t disable_mex; -} scr_gpio_t; - -/* test function */ -void hal_scr_test(enum scr_cmd cmd, void *arg); -hal_scr_status_t hal_scr_init(void); -/* -void smartcard_atr_decode(struct smc_atr_para *pscatr, struct smc_pps_para *psmc_pps, - uint8_t *pdata, uint8_t with_ts); -void smartcard_ta1_decode(struct smc_atr_para *psmc_atr, uint8_t ta1) -void smartcard_tb1_decode(struct smc_atr_para *psmc_atr, uint8_t tb1) -*/ -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_spi.h b/src/platform/f133/include/hal/sunxi_hal_spi.h deleted file mode 100644 index 3ecb959955708aad24b3090173aa6b11841d4928..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_spi.h +++ /dev/null @@ -1,236 +0,0 @@ -/* - * =========================================================================================== - * - * Filename: sunxi_hal_spi.h - * - * Description: SPI HAL definition. - * - * Version: Melis3.0 - * Create: 2019-11-18 11:11:56 - * Revision: none - * Compiler: GCC:version 9.2.1 - * - * Author: bantao@allwinnertech.com - * Organization: SWC-BPD - * Last Modified: 2019-12-03 16:02:11 - * - * =========================================================================================== - */ - -#ifndef SUNXI_HAL_SPI_H -#define SUNXI_HAL_SPI_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "sunxi_hal_common.h" -#include -#include -/* #include */ -#include -#include -#include -#include -#ifdef CONFIG_COMPONENTS_PM -#include -#include -#endif - -/***************************************************************************** - * spi master - *****************************************************************************/ -/** @brief This enum defines the SPI master port. - * This chip total has 2 SPI master port - */ -typedef enum -{ - HAL_SPI_MASTER_0 = 0, /**< spi master port 0 */ - HAL_SPI_MASTER_1 = 1, /**< spi master port 1 */ - HAL_SPI_MASTER_2 = 2, /**< spi master port 2 */ - HAL_SPI_MASTER_3 = 3, /**< spi master port 3 */ - HAL_SPI_MASTER_MAX = SPI_MAX_NUM, /**< spi master max port number\ */ -} hal_spi_master_port_t; - -typedef struct -{ - uint8_t *tx_buf; /**< Data buffer to send, */ - uint32_t tx_len; /**< The total number of bytes to send. */ - uint32_t - tx_single_len; /**< The number of bytes to send in single mode. */ - uint8_t *rx_buf; /**< Received data buffer, */ - uint32_t rx_len; /**< The valid number of bytes received. */ - uint8_t tx_nbits : 3; /**< Data buffer to send in nbits mode */ - uint8_t rx_nbits : 3; /**< Data buffer to received in nbits mode */ - uint8_t dummy_byte; /**< Flash send dummy byte, default 0*/ -#define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */ -#define SPI_NBITS_DUAL 0x02 /* 2bit transfer */ -#define SPI_NBITS_QUAD 0x04 /* 4bit transfer */ - uint8_t bits_per_word; /**< transfer bit_per_word */ -} hal_spi_master_transfer_t; - -typedef enum spi_mode_type -{ - SGLE_HALF_DUPLEX_RX, /* single mode, half duplex read */ - SGLE_HALF_DUPLEX_TX, /* single mode, half duplex write */ - SINGLE_FULL_DUPLEX_RX_TX, /* single mode, full duplex read and write */ - DUAL_HALF_DUPLEX_RX, /* dual mode, half duplex read */ - DUAL_HALF_DUPLEX_TX, /* dual mode, half duplex write */ - QUAD_HALF_DUPLEX_RX, /* quad mode, half duplex read */ - QUAD_HALF_DUPLEX_TX, /* quad mode, half duplex write */ - FULL_DUPLEX_TX_RX, /* full duplex read and write */ - MODE_TYPE_NULL, -} spi_mode_type_t; - -typedef struct spi_dma -{ - struct dma_slave_config config; - struct sunxi_dma_chan *chan; -} spi_dma_t; - -typedef enum -{ - SPI_MASTER_ERROR = -6, /**< SPI master function error occurred. */ - SPI_MASTER_ERROR_NOMEM = -5, /**< SPI master request mem failed. */ - SPI_MASTER_ERROR_TIMEOUT = -4, /**< SPI master xfer timeout. */ - SPI_MASTER_ERROR_BUSY = -3, /**< SPI master is busy. */ - SPI_MASTER_ERROR_PORT = -2, /**< SPI master invalid port. */ - SPI_MASTER_INVALID_PARAMETER = - -1, /**< SPI master invalid input parameter. */ - SPI_MASTER_OK = 0 /**< SPI master operation completed successfully. */ -} spi_master_status_t; - -/** @brief selection of spi slave device connected to which cs pin of spi master -*/ -typedef enum -{ - HAL_SPI_MASTER_SLAVE_0 = - 0, /**< spi slave device connect to spi master cs0 pin */ - HAL_SPI_MASTER_SLAVE_1 = - 1, /**< spi slave device connect to spi master cs1 pin */ - HAL_SPI_MASTER_SLAVE_MAX /**< spi master max cs pin number\ */ -} hal_spi_master_slave_port_t; - -/** @brief SPI master clock polarity definition */ -typedef enum -{ - HAL_SPI_MASTER_CLOCK_POLARITY0 = 0, /**< Clock polarity is 0 */ - HAL_SPI_MASTER_CLOCK_POLARITY1 = 2 /**< Clock polarity is 1 */ -} hal_spi_master_clock_polarity_t; - -/** @brief SPI master clock format definition */ -typedef enum -{ - HAL_SPI_MASTER_CLOCK_PHASE0 = 0, /**< Clock format is 0 */ - HAL_SPI_MASTER_CLOCK_PHASE1 = 1 /**< Clock format is 1 */ -} hal_spi_master_clock_phase_t; - -/** @brief SPI master transaction bit order definition */ -typedef enum -{ - HAL_SPI_MASTER_LSB_FIRST = - 0, /**< Both send and receive data transfer LSB first */ - HAL_SPI_MASTER_MSB_FIRST = - 1 /**< Both send and receive data transfer MSB first */ -} hal_spi_master_bit_order_t; - -/** @brief SPI master status. */ -typedef enum -{ - HAL_SPI_MASTER_STATUS_ERROR = - -6, /**< SPI master function error occurred. */ - HAL_SPI_MASTER_STATUS_ERROR_NOMEM = - -5, /**< SPI master request mem failed. */ - HAL_SPI_MASTER_STATUS_ERROR_TIMEOUT = - -4, /**< SPI master xfer timeout. */ - HAL_SPI_MASTER_STATUS_ERROR_BUSY = -3, /**< SPI master is busy. */ - HAL_SPI_MASTER_STATUS_ERROR_PORT = -2, /**< SPI master invalid port. */ - HAL_SPI_MASTER_STATUS_INVALID_PARAMETER = - -1, /**< SPI master invalid input parameter. */ - HAL_SPI_MASTER_STATUS_OK = - 0 /**< SPI master operation completed successfully. */ -} hal_spi_master_status_t; - -/** @brief SPI master running status. */ -typedef enum -{ - HAL_SPI_MASTER_IDLE = 0, /**< SPI master is idle. */ - HAL_SPI_MASTER_BUSY = 1 /**< SPI master is busy. */ -} hal_spi_master_running_status_t; - -typedef struct -{ - uint32_t clock_frequency; /**< SPI master clock frequency setting. */ - hal_spi_master_slave_port_t - slave_port; /**< SPI slave device selection. */ - hal_spi_master_bit_order_t - bit_order; /**< SPI master bit order setting. 0:MSB first 1:LSB - first*/ - hal_spi_master_clock_polarity_t - cpol; /**< SPI master clock polarity setting. 0:Active high - polarity(0 = Idle) 1:Active low polarity(1 = Idle) */ - hal_spi_master_clock_phase_t - cpha; /**< SPI master clock phase setting. 0: Phase 0(Leading edge - for sample data) 1: Phase 1(Leading edge for setup data) - */ - uint32_t sip; - uint32_t flash; -} hal_spi_master_config_t; - -typedef struct sunxi_spi -{ - int8_t result : 2; -#define SPI_XFER_READY 0 -#define SPI_XFER_OK 1 -#define SPI_XFER_FAILED -1 - - bool sem; - uint16_t irqnum; - unsigned long base; - spi_mode_type_t mode_type; - - hal_clk_t pclk; /* PLL clock */ - hal_clk_t bus_clk; /* BUS clock */ - hal_clk_t mclk; /* spi module clock */ - struct reset_control *reset; - - spi_dma_t dma_rx; - spi_dma_t dma_tx; - - char *align_dma_buf; -#define ALIGN_DMA_BUF_SIZE (4096 + 64) - - hal_sem_t xSemaphore_tx; - hal_sem_t xSemaphore_rx; - - hal_spi_master_port_t port; - hal_spi_master_config_t config; - hal_spi_master_transfer_t *transfer; - -#ifdef CONFIG_COMPONENTS_PM - struct pm_device pm; - struct wakelock wl; -#endif - bool used; -} sunxi_spi_t; - -struct hal_spi_master { - hal_spi_master_port_t port; - hal_spi_master_config_t cfg; -}; - -typedef enum -{ - SPI_WRITE_READ = 0, /**< SPI master is busy. */ - SPI_CONFIG = 1 /**< SPI master is idle. */ -} hal_spi_transfer_cmd_t; - -spi_master_status_t hal_spi_init(hal_spi_master_port_t port, hal_spi_master_config_t *cfg); -spi_master_status_t hal_spi_write(hal_spi_master_port_t port, void *buf, uint32_t size); -spi_master_status_t hal_spi_deinit(hal_spi_master_port_t port); -spi_master_status_t hal_spi_read(hal_spi_master_port_t port, void *buf, uint32_t size); -spi_master_status_t hal_spi_xfer(hal_spi_master_port_t port, hal_spi_master_transfer_t *transfer); -spi_master_status_t hal_spi_hw_config(hal_spi_master_port_t port, hal_spi_master_config_t *spi_config); - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_spinor.h b/src/platform/f133/include/hal/sunxi_hal_spinor.h deleted file mode 100644 index 2610fba9281225c3003b4f61c30ddcc1844fad36..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_spinor.h +++ /dev/null @@ -1,73 +0,0 @@ -#ifndef SUNXI_HAL_SPINOR_H -#define SUNXI_HAL_SPINOR_H - -#include -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define SUNXI_HAL_SPINOR_API_VERSION 1 -#define SUNXI_HAL_SPINOR_DRV_VERSION 0 - -typedef enum sunxi_hal_spinor_signal_event -{ - ARM_FLASH_EVENT_READY = (1UL << 0), - ARM_FLASH_EVENT_ERROR = (1UL << 1), -} sunxi_hal_spinor_signal_event_t; - -typedef struct sunxi_hal_spinor_status -{ - uint32_t busy: 1; - uint32_t error: 1; - uint32_t reserved: 30; -} sunxi_hal_spinor_status_t; - -typedef struct _sunxi_hal_spinor_sector_info -{ - uint32_t start; - uint32_t end; -} sunxi_hal_spinor_sector_info; - -typedef struct _sunxi_hal_spinor_info -{ - sunxi_hal_spinor_sector_info *sector_info; - uint32_t sector_count; - uint32_t sector_size; - uint32_t page_size; - uint32_t program_unit; - uint8_t erased_value; - uint8_t reserved[3]; -} sunxi_hal_spinor_info; - -typedef struct sunxi_hal_spinor_capabilities -{ - uint32_t event_ready: 1; - uint32_t data_width: 2; - uint32_t erase_chip: 1; - uint32_t reserved: 28; -} sunxi_hal_spinor_capabilities_t; - -int32_t hal_spinor_init(sunxi_hal_spinor_signal_event_t cb_event); -int32_t hal_spinor_deinit(void); -sunxi_hal_version_t hal_spinor_get_version(int32_t dev); -sunxi_hal_spinor_capabilities_t hal_spinor_get_capabilities(void); -sunxi_hal_spinor_status_t hal_spinor_get_status(void); -int32_t hal_spinor_power_control(sunxi_hal_power_state_e state); -int32_t hal_spinor_read_data(uint32_t addr, void *buf, uint32_t cnt); -int32_t hal_spinor_program_data(uint32_t addr, const void *buf, uint32_t cnt); -int32_t hal_spinor_erase_sector(uint32_t addr, uint32_t size); -int32_t hal_spinor_erase_chip(void); -int32_t hal_spinor_sync(void); -sunxi_hal_spinor_info *hal_spinor_get_info(void); -void hal_spinor_signal_event(uint32_t event); -int32_t hal_spinor_control(int32_t dev, uint32_t command, uint32_t arg); - -#ifdef __cplusplus -} -#endif - -#endif /*SUNXI_HAL_SPINOR_H*/ diff --git a/src/platform/f133/include/hal/sunxi_hal_sysctl.h b/src/platform/f133/include/hal/sunxi_hal_sysctl.h deleted file mode 100644 index d2221eec1d55703a35b117663909af573e271fc3..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_sysctl.h +++ /dev/null @@ -1,50 +0,0 @@ -/* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. - - * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in - * the the People's Republic of China and other countries. - * All Allwinner Technology Co.,Ltd. trademarks are used with permission. - - * DISCLAIMER - * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. - * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) - * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN - * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. - * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS - * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. - * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. - - - * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT - * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING - * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE - * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef SUNXI_HAL_SYSCTL_H -#define SUNXI_HAL_SYSCTL_H - -#include - -void HAL_SYSCTL_SetSipFlashTestMapMode(uint32_t en); -void HAL_SYSCTL_RamUseAsBT(uint32_t en); -void HAL_SYSCTL_RamUseAsCSI(uint32_t en); -void HAL_SYSCTL_RomSecureSel(uint32_t en); -void HAL_SYSCTL_SetPsensorControl(uint32_t PsensorId, uint32_t OSCSelect, - uint32_t ps_n, uint32_t en); -void HAL_SYSCTL_WaitPsensorRdyAndClean(void); -uint32_t HAL_SYSCTL_GetPsensorCnt(void); -void HAL_SYSCTL_SetDbgData(uint32_t id, uint32_t data); -uint32_t HAL_SYSCTL_GetDegData(uint32_t id); -uint32_t HAL_SYSCTL_GetPsensor(uint32_t PsensorId, uint32_t OSCSelect, - uint32_t ps_n); - -#endif /*SUNXI_HAL_SYSCTL_H*/ diff --git a/src/platform/f133/include/hal/sunxi_hal_thermal.h b/src/platform/f133/include/hal/sunxi_hal_thermal.h deleted file mode 100644 index f7ccb1cfa410b46b43b7f6efc479c5fe82373cab..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_thermal.h +++ /dev/null @@ -1,88 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTYS TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERSSDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTYS TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef SUXNI_HAL_THERMAL_H -#define SUXNI_HAL_THERMAL_H - -#include "sunxi_hal_common.h" -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#if (defined(CONFIG_ARCH_SUN8IW20) || defined(CONFIG_SOC_SUN20IW1)) -#define THS_BASE 0x02009400 -#else -#define THS_BASE 0x05070400 -#endif - -#define THS_NUM 1 - -#define OFFSET -2794 -#define SCALE -67 - -#define THS_CTL (THS_BASE + 0x0) -#define THS_EN (THS_BASE + 0x4) -#define THS_PCTL (THS_BASE + 0x8) -#define THS_DICTL (THS_BASE + 0x10) -#define THS_SICTL (THS_BASE + 0x14) -#define THS_AICTL (THS_BASE + 0x18) -#define THS_DIS (THS_BASE + 0x20) -#define THS_SIS (THS_BASE + 0x24) -#define THS_AOIS (THS_BASE + 0x28) -#define THS_AIS (THS_BASE + 0x2C) -#define THS_MFC (THS_BASE + 0x30) -#define THS_ATC (THS_BASE + 0x40) -#define THS_STC (THS_BASE + 0x80) -#define THS_CALIB (THS_BASE + 0xA0) -#define THS_DATA (THS_BASE + 0xC0) - -#define THS_CTRL_T_ACQ(x) ((0xffff & (x)) << 16) -#define THS_FILTER_EN 0x4 -#define THS_FILTER_TYPE(x) (0x3 & (x)) -#define THS_PC_TEMP_PERIOD(x) ((0xfffff & (x)) << 12) -#define TEMP_CALIB_MASK 0xfff - -#define FT_TEMP_MASK 0xfff -#define TEMP_TO_REG 672 -#define CALIBRATE_DEFAULT 0x800 - -int hal_ths_init(void); -int hal_ths_uninit(void); -int hal_ths_get_temp(unsigned int num, int *temp); - -#ifdef __cplusplus -} -#endif -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_timer.h b/src/platform/f133/include/hal/sunxi_hal_timer.h deleted file mode 100644 index 92a248ee291e949a809f0f79579c0f8fd530f79f..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_timer.h +++ /dev/null @@ -1,80 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the people's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#ifndef __HAL_TIMER_H__ -#define __HAL_TIMER_H__ - -#include -#include -#include -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** This enum defines the return type of timer API. */ -typedef enum { - HAL_TIMER_STATUS_ERROR = -1, - HAL_TIMER_STATUS_OK = 0 -} hal_timer_status_t; - -typedef enum -{ - SUNXI_TMR0 = 0, - SUNXI_TMR1, - SUNXI_TMR2, - SUNXI_TMR3, - SUNXI_TMR4, - SUNXI_TMR_NUM, -} hal_timer_id_t; - -typedef void (*timer_callback)(void *param); - -void hal_timer_init(hal_timer_id_t timer); -void hal_timer_uninit(hal_timer_id_t timer); -void hal_timer_stop(hal_timer_id_t timer); -void hal_timer_start(hal_timer_id_t timer, bool periodic); -hal_timer_status_t hal_timer_set_oneshot(hal_timer_id_t timer, uint32_t delay_us, timer_callback callback, void *callback_param); -hal_timer_status_t hal_timer_set_periodic(hal_timer_id_t timer, uint32_t delay_us, timer_callback callback, void *callback_param); - -void hal_wuptimer_init(hal_timer_id_t timer); -void hal_wuptimer_uninit(hal_timer_id_t timer); -void hal_wuptimer_stop(hal_timer_id_t timer); -void hal_wuptimer_start(hal_timer_id_t timer, bool periodic); -hal_timer_status_t hal_wuptimer_set_oneshot(hal_timer_id_t timer, uint32_t delay_us, timer_callback callback, void *callback_param); -hal_timer_status_t hal_wuptimer_set_periodic(hal_timer_id_t timer, uint32_t delay_us, timer_callback callback, void *callback_param); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_tpadc.h b/src/platform/f133/include/hal/sunxi_hal_tpadc.h deleted file mode 100644 index f87c33c7dc50a3a64dbfcfb4418b339cf60086a0..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_tpadc.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - * drivers/input/sensor/sunxi_gpadc.h - * - * Copyright (C) 2016 Allwinner. - * fuzhaoke - * - * SUNXI TPADC Controller Driver Header - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - */ - -#ifndef HAL_TPADC_H -#define HAL_TPADC_H - -#include "hal_clk.h" -#include "hal_reset.h" -#include "sunxi_hal_common.h" -#include -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define TPADC_DEBUG -#ifdef TPADC_DEBUG -#define TPADC_INFO(fmt, arg...) hal_log_info(fmt, ##arg) -#else -#define TPADC_INFO(fmt, arg...) do {}while(0) -#endif - -#define TPADC_ERR(fmt, arg...) hal_log_err(fmt, ##arg) - -typedef enum -{ - TPADC_IRQ_ERROR = -4, - TPADC_CHANNEL_ERROR = -3, - TPADC_CLK_ERROR = -2, - TPADC_ERROR = -1, - TPADC_OK = 0, -} hal_tpadc_status_t; - -typedef enum -{ - DATA_X = 0, - DATA_Y, - DATA_UP, -} data_flag_t; - -typedef enum -{ - TP_CH_0 = 0, - TP_CH_1, - TP_CH_2, - TP_CH_3, - TP_CH_MAX, -} tp_channel_id; - -typedef int (*tpadc_usercallback_t)(uint32_t data, data_flag_t flag); -typedef int (*tpadc_adc_usercallback_t)(uint32_t data, tp_channel_id channel); - -typedef struct hal_tpadc -{ - unsigned long reg_base; - uint32_t channel_num; - uint32_t irq_num; - uint32_t rate; - hal_clk_id_t bus_clk_id; - hal_clk_id_t mod_clk_id; - hal_reset_id_t rst_clk_id; - hal_clk_t bus_clk; - hal_clk_t mod_clk; - struct reset_control *rst_clk; - tpadc_usercallback_t callback; - tpadc_adc_usercallback_t adc_callback[TP_CH_MAX]; -} hal_tpadc_t; - -hal_tpadc_status_t hal_tpadc_init(void); -hal_tpadc_status_t hal_tpadc_exit(void); -hal_tpadc_status_t hal_tpadc_register_callback(tpadc_usercallback_t user_callback); - -hal_tpadc_status_t hal_tpadc_adc_init(void); -hal_tpadc_status_t hal_tpadc_adc_channel_init(tp_channel_id channel); -hal_tpadc_status_t hal_tpadc_adc_channel_exit(tp_channel_id channel); -hal_tpadc_status_t hal_tpadc_adc_exit(void); -hal_tpadc_status_t hal_tpadc_adc_register_callback(tp_channel_id channel , tpadc_adc_usercallback_t user_callback); - -hal_tpadc_status_t hal_tpadc_resume(void); -hal_tpadc_status_t hal_tpadc_suspend(void); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_trng.h b/src/platform/f133/include/hal/sunxi_hal_trng.h deleted file mode 100644 index 2c99880320bc61e9378f173a8c78ce932f166744..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_trng.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright (C) 2017 XRADIO TECHNOLOGY CO., LTD. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * 3. Neither the name of XRADIO TECHNOLOGY CO., LTD. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DRIVER_CHIP_HAL_TRNG_H_ -#define _DRIVER_CHIP_HAL_TRNG_H_ - -/** - * @brief Drv Status value - */ -typedef enum -{ - HAL_TRNG_STATUS_OK = 0, /* success */ - HAL_TRNG_STATUS_ERROR = -1, /* general error */ - HAL_TRNG_STATUS_BUSY = -2, /* device or resource busy */ - HAL_TRNG_STATUS_TIMEOUT = -3, /* wait timeout */ - HAL_TRNG_STATUS_INVALID = -4 /* invalid argument */ -} HAL_TRNG_Status; - - -/** - * @brief get trng random number. - * @param type : crypto method. - * @param random: return random numer - * @retval HAL_Status: the status of driver - */ -HAL_TRNG_Status HAL_TRNG_Extract(uint8_t type, uint32_t random[4]); - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_twi.h b/src/platform/f133/include/hal/sunxi_hal_twi.h deleted file mode 100644 index a06f596cd4b9d1e874cf2171827102841f5f4384..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_twi.h +++ /dev/null @@ -1,155 +0,0 @@ -#ifndef SUNXI_HAL_TWI_H -#define SUNXI_HAL_TWI_H - -#include "hal_sem.h" -#include -#include -#include "sunxi_hal_common.h" -#include "hal_gpio.h" -#include "sunxi_hal_regulator.h" -#include -#include -#include -#ifdef CONFIG_COMPONENTS_PM -#include -#include -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -//for debug -#define CONFIG_DRIVERS_TWI_DEBUG -#ifndef CONFIG_DRIVERS_TWI_DEBUG -#define TWI_INFO(fmt, arg...) hal_log_info(fmt, ##arg) -#else -#define TWI_INFO(fmt, arg...) do {}while(0) -#endif - -#define TWI_ERR(fmt, arg...) hal_log_err(fmt, ##arg) -#define TWI_WARN(fmt, arg...) hal_log_warn(fmt, ##arg) - -typedef enum -{ - TWI_XFER_IDLE = 0x1, - TWI_XFER_START = 0x2, - TWI_XFER_RUNNING = 0x4, -} twi_xfer_status_t; - -/** @brief This enum defines the HAL interface return value. */ -typedef enum -{ - TWI_STATUS_ERROR = -4, /**< An error occurred and the transaction has failed. */ - //TWI_STATUS_ERROR_TIMEOUT = -4, /**< The TWI bus xfer timeout, an error occurred. */ - TWI_STATUS_ERROR_BUSY = -3, /**< The TWI bus is busy, an error occurred. */ - TWI_STATUS_INVALID_PORT_NUMBER = -2, /**< A wrong port number is given. */ - TWI_STATUS_INVALID_PARAMETER = -1, /**< A wrong parameter is given. */ - TWI_STATUS_OK = 0 /**< No error occurred during the function call. */ -} twi_status_t; - -typedef enum -{ - TWI_MASTER_0, /**< TWI master 0. */ - TWI_MASTER_1, /**< TWI master 1. */ - TWI_MASTER_2, /**< TWI master 0. */ - TWI_MASTER_3, /**< TWI master 1. */ - TWI_MASTER_4, /**< TWI master 4. */ - S_TWI_MASTER_0, /**< S_TWI master 0. */ - TWI_MASTER_MAX /**< max TWI master number, \ */ -} twi_port_t; - -/** @brief This enum defines the TWI transaction speed. */ -typedef enum -{ - TWI_FREQUENCY_100K = 100000, /**< 100kbps. */ - TWI_FREQUENCY_200K = 200000, /**< 200kbps. */ - TWI_FREQUENCY_400K = 400000, /**< 400kbps. */ -} twi_frequency_t; - -/** @brief This enum defines the TWI transaction speed. */ -typedef enum -{ - ENGINE_XFER = 0, - TWI_DRV_XFER = 1, -} twi_mode_t; - -typedef struct twi_msg -{ - uint16_t addr; /* slave address */ - uint16_t flags; -#define TWI_M_RD 0x0001 /* read data, from slave to master - * TWI_M_RD is guaranteed to be 0x0001! - * */ -#define TWI_M_TEN 0x0010 /* this is a ten bit chip address */ - uint16_t len; /* msg length */ - uint8_t *buf; /* pointer to msg data */ -} twi_msg_t; - -typedef struct sunxi_twi -{ - uint8_t port; - uint8_t result; - uint8_t already_init; - uint8_t twi_drv_used; - uint8_t pkt_interval; - - uint16_t slave_addr; - uint16_t flags; - - uint32_t timeout; - uint32_t msgs_num; - uint32_t msgs_idx; - uint32_t msgs_ptr; - unsigned long base_addr; - uint32_t irqnum; - char irqname[32]; - - struct regulator_dev regulator; - struct reset_control *reset; - hal_clk_t pclk; - hal_clk_t mclk; - hal_clk_t clk; - twi_frequency_t freq; - - uint32_t pinmux; - uint32_t pin[TWI_PIN_NUM]; - twi_xfer_status_t status; - hal_sem_t hal_sem; - twi_msg_t *msgs; - - struct sunxi_dma_chan *dma_chan; - hal_sem_t dma_complete; - - hal_mutex_t lock; - -#ifdef CONFIG_COMPONENTS_PM - struct pm_device pm; - struct wakelock wl; -#endif -} hal_twi_t; - -typedef enum -{ - I2C_SLAVE = 0, - I2C_SLAVE_FORCE = 1, - I2C_TENBIT = 2, - I2C_RDWR = 3 -} hal_twi_transfer_cmd_t; - -//initialize twi port -twi_status_t hal_twi_init(twi_port_t port); -//uninitialize twi port -twi_status_t hal_twi_uninit(twi_port_t port); -//twi write -twi_status_t hal_twi_write(twi_port_t port, unsigned long pos, const void *buf, uint32_t size); -//twi read -twi_status_t hal_twi_read(twi_port_t port, unsigned long pos, void *buf, uint32_t size); -//twi control -twi_status_t hal_twi_control(twi_port_t port, hal_twi_transfer_cmd_t cmd, void *args); -twi_status_t hal_twi_xfer(twi_port_t port, twi_msg_t *msgs, int32_t num); -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_usb.h b/src/platform/f133/include/hal/sunxi_hal_usb.h deleted file mode 100644 index e5aed87d2c04e5525426b2b0815f0958780a55e5..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_usb.h +++ /dev/null @@ -1,125 +0,0 @@ -/* - * drivers/input/sensor/sunxi_gpadc.h - * - * Copyright (C) 2016 Allwinner. - * fuzhaoke - * - * SUNXI GPADC Controller Driver Header - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - */ - -#ifndef HAL_USB_H -#define HAL_USB_H - -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif -/******************************************************************** - * USB driver init - ********************************************************************/ -void sunxi_usb_init(void); - -/******************************************************************** - * USB HOST - ********************************************************************/ -int hal_usb_core_init(void); -int hal_usb_core_exit(void); -int hal_usb_hci_init(void); -int hal_usb_hci_deinit(void); -int hal_usb_hcd_init(int hci_num); -int hal_usb_hcd_deinit(int hci_num); - -void hal_hci_phy_range_show(int hci_num); -void hal_hci_phy_range_set(int hci_num, int val); -void hal_hci_driverlevel_show(int hci_num); -void hal_hci_driverlevel_adjust(int hci_num, int driverlevel); -void hal_hci_ed_test(int hci_num, const char *buf, unsigned int count); - -void hal_usb_hcd_debug_set(int value); -int hal_usb_hcd_debug_get(void); - -/******************************************************************** - * USB UDC - ********************************************************************/ - -typedef enum { - UDC_EVENT_RX_STANDARD_REQUEST = 1, - UDC_EVENT_RX_CLASS_REQUEST = 2, - UDC_EVENT_RX_DATA = 3, - UDC_EVENT_TX_COMPLETE = 4, -} udc_callback_event_t; - -typedef enum { - UDC_ERRNO_SUCCESS = 0, - UDC_ERRNO_CMD_NOT_SUPPORTED = -1, - UDC_ERRNO_CMD_INVALID = -2, - UDC_ERRNO_BUF_NULL = -3, - UDC_ERRNO_BUF_FULL = -4, - UDC_ERRNO_EP_INVALID = -5, - UDC_ERRNO_RX_NOT_READY = -6, - UDC_ERRNO_TX_BUSY = -7, -} udc_errno_t; - -typedef udc_errno_t (*udc_callback_t)(uint8_t ep_addr, udc_callback_event_t event, - void *data, uint32_t len); - -int32_t hal_udc_init(void); -int32_t hal_udc_deinit(void); - -int32_t hal_udc_ep_read(uint8_t ep_addr, void *buf, uint32_t len); -int32_t hal_udc_ep_write(uint8_t ep_addr, void *buf , uint32_t len); - -void hal_udc_device_desc_init(void *device_desc); -void hal_udc_config_desc_init(void *config_desc, uint32_t len); -void hal_udc_string_desc_init(const void *string_desc); -void hal_udc_register_callback(udc_callback_t user_callback); - -void hal_udc_ep_disable(uint8_t ep_addr); -void hal_udc_ep_enable(uint8_t ep_addr, uint16_t maxpacket, uint32_t ts_type); -void hal_udc_ep_set_buf(uint8_t ep_addr, void *buf, uint32_t len); - -void hal_udc_driverlevel_show(void); -void hal_udc_driverlevel_adjust(int driverlevel); -void hal_udc_phy_range_show(int usbc_num); -void hal_udc_phy_range_set(int usbc_num, int val); -void hal_udc_ed_test(const char *buf, size_t count); - -/******************************************************************** - * USB MANAGER - ********************************************************************/ -int hal_usb_manager_init(void); -int hal_usb_manager_deinit(void); - -/******************************************************************** - * USB GADGET - ********************************************************************/ -enum { - USB_GADGET_MANUFACTURER_IDX = 0, - USB_GADGET_PRODUCT_IDX, - USB_GADGET_SERIAL_IDX, - USB_GADGET_LANGUAGE_IDX, - USB_GADGET_CONFIG_IDX, - USB_GADGET_INTERFACE_IDX, - USB_GADGET_MAX_IDX, -}; - -int hal_gadget_init(void); -void hal_gadget_exit(void); -int usb_gadget_function_enable(const char *name); -int usb_gadget_function_disable(const char *name); -int usb_gadget_function_read(int ep_idx, char *buf, int size); -int usb_gadget_function_write(int ep_idx, char *buf, int size); -int usb_gadget_function_string_set(char *name, char *str, unsigned int idx); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/hal/sunxi_hal_watchdog.h b/src/platform/f133/include/hal/sunxi_hal_watchdog.h deleted file mode 100644 index 7bcc63a8fb60aa015a6eb96144e16392c95cba10..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/sunxi_hal_watchdog.h +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2014 - * Chen-Yu Tsai - * - * Watchdog register definitions - */ - -#ifndef _SUNXI_HAL_WATCHDOG_H_ -#define _SUNXI_HAL_WATCHDOG_H_ - -#include "sunxi_hal_common.h" - -void hal_watchdog_disable(void); -void hal_watchdog_reset(int timeout); -void hal_watchdog_restart(void); -void hal_watchdog_info(void); -void hal_watchdog_init(void); -void hal_watchdog_stop(int timeout); -void hal_watchdog_start(int timeout); -void hal_watchdog_feed(void); -int hal_watchdog_suspend(int timeout); -int hal_watchdog_resume(int timeout); -int hal_watchdog_is_running(void); -#endif /* _SUNXI_HAL_WATCHDOG_H_ */ diff --git a/src/platform/f133/include/hal/video/sunxi_display2.h b/src/platform/f133/include/hal/video/sunxi_display2.h deleted file mode 100644 index 56b270db8803771709f74dd2e8fb03d1ef0a16f2..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/video/sunxi_display2.h +++ /dev/null @@ -1,981 +0,0 @@ -/* - * Allwinner SoCs display driver. - * - * Copyright (C) 2016 Allwinner. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __SUNXI_DISPLAY2_H__ -#define __SUNXI_DISPLAY2_H__ - -#ifdef CONFIG_KERNEL_FREERTOS -#include -#else -#include -#endif -#include - -struct disp_manager; -struct disp_device; -struct disp_smbl; -struct disp_enhance; -struct disp_capture; - -struct disp_color { - unsigned char alpha; - unsigned char red; - unsigned char green; - unsigned char blue; -}; - -struct disp_rect { - int x; - int y; - unsigned int width; - unsigned int height; -}; - -struct disp_rectsz { - unsigned int width; - unsigned int height; -}; - -struct disp_position { - int x; - int y; -}; - -typedef enum disp_pixel_format { - DISP_FORMAT_ARGB_8888 = 0x00, /* MSB A-R-G-B LSB */ - DISP_FORMAT_ABGR_8888 = 0x01, - DISP_FORMAT_RGBA_8888 = 0x02, - DISP_FORMAT_BGRA_8888 = 0x03, - DISP_FORMAT_XRGB_8888 = 0x04, - DISP_FORMAT_XBGR_8888 = 0x05, - DISP_FORMAT_RGBX_8888 = 0x06, - DISP_FORMAT_BGRX_8888 = 0x07, - DISP_FORMAT_RGB_888 = 0x08, - DISP_FORMAT_BGR_888 = 0x09, - DISP_FORMAT_RGB_565 = 0x0a, - DISP_FORMAT_BGR_565 = 0x0b, - DISP_FORMAT_ARGB_4444 = 0x0c, - DISP_FORMAT_ABGR_4444 = 0x0d, - DISP_FORMAT_RGBA_4444 = 0x0e, - DISP_FORMAT_BGRA_4444 = 0x0f, - DISP_FORMAT_ARGB_1555 = 0x10, - DISP_FORMAT_ABGR_1555 = 0x11, - DISP_FORMAT_RGBA_5551 = 0x12, - DISP_FORMAT_BGRA_5551 = 0x13, - DISP_FORMAT_A2R10G10B10 = 0x14, - DISP_FORMAT_A2B10G10R10 = 0x15, - DISP_FORMAT_R10G10B10A2 = 0x16, - DISP_FORMAT_B10G10R10A2 = 0x17, - DISP_FORMAT_1bpp_palette_LE = 0x18, - DISP_FORMAT_2bpp_palette_LE = 0x19, - DISP_FORMAT_4bpp_palette_LE = 0x1a, - DISP_FORMAT_8bpp_palette_LE = 0x1b, - /* - * SP: semi-planar - * P:planar - * I:interleaved - * UVUV: U in the LSBs; - * VUVU: V in the LSBs - */ - DISP_FORMAT_YUV444_I_AYUV = 0x40, /* MSB A-Y-U-V LSB */ - DISP_FORMAT_YUV444_I_VUYA = 0x41, /* MSB V-U-Y-A LSB */ - DISP_FORMAT_YUV422_I_YVYU = 0x42, /* MSB Y-V-Y-U LSB */ - DISP_FORMAT_YUV422_I_YUYV = 0x43, /* MSB Y-U-Y-V LSB */ - DISP_FORMAT_YUV422_I_UYVY = 0x44, /* MSB U-Y-V-Y LSB */ - DISP_FORMAT_YUV422_I_VYUY = 0x45, /* MSB V-Y-U-Y LSB */ - DISP_FORMAT_YUV444_P = 0x46, /* MSB P3-2-1-0 LSB, YYYY UUUU VVVV */ - DISP_FORMAT_YUV422_P = 0x47, /* MSB P3-2-1-0 LSB YYYY UU VV */ - DISP_FORMAT_YUV420_P = 0x48, /* MSB P3-2-1-0 LSB YYYY U V (yu12)*/ - DISP_FORMAT_YUV411_P = 0x49, /* MSB P3-2-1-0 LSB YYYY U V */ - DISP_FORMAT_YUV422_SP_UVUV = 0x4a, /* MSB V-U-V-U LSB */ - DISP_FORMAT_YUV422_SP_VUVU = 0x4b, /* MSB U-V-U-V LSB */ - DISP_FORMAT_YUV420_SP_UVUV = 0x4c, - DISP_FORMAT_YUV420_SP_VUVU = 0x4d, - DISP_FORMAT_YUV411_SP_UVUV = 0x4e, - DISP_FORMAT_YUV411_SP_VUVU = 0x4f, - DISP_FORMAT_8BIT_GRAY = 0x50, - DISP_FORMAT_YUV444_I_AYUV_10BIT = 0x51, - DISP_FORMAT_YUV444_I_VUYA_10BIT = 0x52, - DISP_FORMAT_YUV422_I_YVYU_10BIT = 0x53, - DISP_FORMAT_YUV422_I_YUYV_10BIT = 0x54, - DISP_FORMAT_YUV422_I_UYVY_10BIT = 0x55, - DISP_FORMAT_YUV422_I_VYUY_10BIT = 0x56, - DISP_FORMAT_YUV444_P_10BIT = 0x57, - DISP_FORMAT_YUV422_P_10BIT = 0x58, - DISP_FORMAT_YUV420_P_10BIT = 0x59, - DISP_FORMAT_YUV411_P_10BIT = 0x5a, - DISP_FORMAT_YUV422_SP_UVUV_10BIT = 0x5b, - DISP_FORMAT_YUV422_SP_VUVU_10BIT = 0x5c, - DISP_FORMAT_YUV420_SP_UVUV_10BIT = 0x5d, - DISP_FORMAT_YUV420_SP_VUVU_10BIT = 0x5e, - DISP_FORMAT_YUV411_SP_UVUV_10BIT = 0x5f, - DISP_FORMAT_YUV411_SP_VUVU_10BIT = 0x60, - DISP_FORMAT_YUV420_P_YV12 = 0x61, /* MSB P3-2-1-0 LSB YYYY V U DISP_FORMAT_YUV420_P */ - DISP_FORMAT_YUV420_P_YU12 = 0x62, /* MSB P3-2-1-0 LSB YYYY U V DISP_FORMAT_YUV420_P*/ - - DISP_FORMAT_CSIRGB, - DISP_UNKNOWN_VALUE, - DISP_FORMAT_MAX, -}__disp_pixel_fmt_t; - -enum disp_3d_out_mode { - DISP_3D_OUT_MODE_CI_1 = 0x5, /* column interlaved 1 */ - DISP_3D_OUT_MODE_CI_2 = 0x6, /* column interlaved 2 */ - DISP_3D_OUT_MODE_CI_3 = 0x7, /* column interlaved 3 */ - DISP_3D_OUT_MODE_CI_4 = 0x8, /* column interlaved 4 */ - DISP_3D_OUT_MODE_LIRGB = 0x9, /* line interleaved rgb */ - - DISP_3D_OUT_MODE_TB = 0x0, /* top bottom */ - DISP_3D_OUT_MODE_FP = 0x1, /* frame packing */ - DISP_3D_OUT_MODE_SSF = 0x2, /* side by side full */ - DISP_3D_OUT_MODE_SSH = 0x3, /* side by side half */ - DISP_3D_OUT_MODE_LI = 0x4, /* line interleaved */ - DISP_3D_OUT_MODE_FA = 0xa, /* field alternative */ -}; - -enum disp_color_space { - DISP_UNDEF = 0x00, - DISP_UNDEF_F = 0x01, - DISP_GBR = 0x100, - DISP_BT709 = 0x101, - DISP_FCC = 0x102, - DISP_BT470BG = 0x103, - DISP_BT601 = 0x104, - DISP_SMPTE240M = 0x105, - DISP_YCGCO = 0x106, - DISP_BT2020NC = 0x107, - DISP_BT2020C = 0x108, - DISP_GBR_F = 0x200, - DISP_BT709_F = 0x201, - DISP_FCC_F = 0x202, - DISP_BT470BG_F = 0x203, - DISP_BT601_F = 0x204, - DISP_SMPTE240M_F = 0x205, - DISP_YCGCO_F = 0x206, - DISP_BT2020NC_F = 0x207, - DISP_BT2020C_F = 0x208, - DISP_RESERVED = 0x300, - DISP_RESERVED_F = 0x301, -}; - -typedef enum disp_color_space __disp_cs_mode_t; - -enum disp_csc_type { - DISP_CSC_TYPE_RGB = 0, - DISP_CSC_TYPE_YUV444 = 1, - DISP_CSC_TYPE_YUV422 = 2, - DISP_CSC_TYPE_YUV420 = 3, -}; - -enum disp_data_bits { - DISP_DATA_8BITS = 0, - DISP_DATA_10BITS = 1, - DISP_DATA_12BITS = 2, - DISP_DATA_16BITS = 3, -}; -enum disp_dvi_hdmi { - DISP_DVI_HDMI_UNDEFINED = 0, - DISP_DVI = 1, - DISP_HDMI = 2, -}; -enum disp_scan_info { - DISP_SCANINFO_NO_DATA = 0, - OVERSCAN = 1, - UNDERSCAN = 2, -}; -enum disp_color_range { - DISP_COLOR_RANGE_DEFAULT = 0, /*default*/ - DISP_COLOR_RANGE_0_255 = 1, - DISP_COLOR_RANGE_16_235 = 2, -}; - -enum disp_output_type { - DISP_OUTPUT_TYPE_NONE = 0, - DISP_OUTPUT_TYPE_LCD = 1, - DISP_OUTPUT_TYPE_TV = 2, - DISP_OUTPUT_TYPE_HDMI = 4, - DISP_OUTPUT_TYPE_VGA = 8, - DISP_OUTPUT_TYPE_VDPO = 16, - DISP_OUTPUT_TYPE_EDP = 32, /*16 for vdpo*/ -}; - -enum disp_tv_mode { - DISP_TV_MOD_480I = 0, - DISP_TV_MOD_576I = 1, - DISP_TV_MOD_480P = 2, - DISP_TV_MOD_576P = 3, - DISP_TV_MOD_720P_50HZ = 4, - DISP_TV_MOD_720P_60HZ = 5, - DISP_TV_MOD_1080I_50HZ = 6, - DISP_TV_MOD_1080I_60HZ = 7, - DISP_TV_MOD_1080P_24HZ = 8, - DISP_TV_MOD_1080P_50HZ = 9, - DISP_TV_MOD_1080P_60HZ = 0xa, - DISP_TV_MOD_1080P_24HZ_3D_FP = 0x17, - DISP_TV_MOD_720P_50HZ_3D_FP = 0x18, - DISP_TV_MOD_720P_60HZ_3D_FP = 0x19, - DISP_TV_MOD_1080P_25HZ = 0x1a, - DISP_TV_MOD_1080P_30HZ = 0x1b, - DISP_TV_MOD_PAL = 0xb, - DISP_TV_MOD_PAL_SVIDEO = 0xc, - DISP_TV_MOD_NTSC = 0xe, - DISP_TV_MOD_NTSC_SVIDEO = 0xf, - DISP_TV_MOD_PAL_M = 0x11, - DISP_TV_MOD_PAL_M_SVIDEO = 0x12, - DISP_TV_MOD_PAL_NC = 0x14, - DISP_TV_MOD_PAL_NC_SVIDEO = 0x15, - DISP_TV_MOD_3840_2160P_30HZ = 0x1c, - DISP_TV_MOD_3840_2160P_25HZ = 0x1d, - DISP_TV_MOD_3840_2160P_24HZ = 0x1e, - DISP_TV_MOD_4096_2160P_24HZ = 0x1f, - DISP_TV_MOD_4096_2160P_25HZ = 0x20, - DISP_TV_MOD_4096_2160P_30HZ = 0x21, - DISP_TV_MOD_3840_2160P_60HZ = 0x22, - DISP_TV_MOD_4096_2160P_60HZ = 0x23, - DISP_TV_MOD_3840_2160P_50HZ = 0x24, - DISP_TV_MOD_4096_2160P_50HZ = 0x25, - DISP_TV_MOD_2560_1440P_60HZ = 0x26, - DISP_TV_MOD_1440_2560P_70HZ = 0x27, - DISP_TV_MOD_1080_1920P_60HZ = 0x28, - DISP_TV_MOD_1280_1024P_60HZ = 0x41, - DISP_TV_MOD_1024_768P_60HZ = 0x42, - DISP_TV_MOD_900_540P_60HZ = 0x43, - DISP_TV_MOD_1920_720P_60HZ = 0x44, - /* vga */ - DISP_VGA_MOD_640_480P_60 = 0x50, - DISP_VGA_MOD_800_600P_60 = 0x51, - DISP_VGA_MOD_1024_768P_60 = 0x52, - DISP_VGA_MOD_1280_768P_60 = 0x53, - DISP_VGA_MOD_1280_800P_60 = 0x54, - DISP_VGA_MOD_1366_768P_60 = 0x55, - DISP_VGA_MOD_1440_900P_60 = 0x56, - DISP_VGA_MOD_1920_1080P_60 = 0x57, - DISP_VGA_MOD_1920_1200P_60 = 0x58, - DISP_TV_MOD_3840_1080P_30 = 0x59, - DISP_VGA_MOD_1280_720P_60 = 0x5a, - DISP_VGA_MOD_1600_900P_60 = 0x5b, - DISP_VGA_MOD_MAX_NUM = 0x5c, - DISP_TV_MODE_NUM, -}; - -enum disp_exit_mode { - DISP_EXIT_MODE_CLEAN_ALL = 0, - DISP_EXIT_MODE_CLEAN_PARTLY = 1, /* only clean interrupt temply */ -}; - -enum disp_buffer_flags { - DISP_BF_NORMAL = 0, /* non-stereo */ - DISP_BF_STEREO_TB = 1 << 0, /* stereo top-bottom */ - DISP_BF_STEREO_FP = 1 << 1, /* stereo frame packing */ - DISP_BF_STEREO_SSH = 1 << 2, /* stereo side by side half */ - DISP_BF_STEREO_SSF = 1 << 3, /* stereo side by side full */ - DISP_BF_STEREO_LI = 1 << 4, /* stereo line interlace */ - /* - * 2d plus depth to convert into 3d, - * left and right image using the same frame buffer - */ - DISP_BF_STEREO_2D_DEPTH = 1 << 5, -}; - -enum disp_layer_mode { - LAYER_MODE_BUFFER = 0, - LAYER_MODE_COLOR = 1, -}; - -enum disp_scan_flags { - DISP_SCAN_PROGRESSIVE = 0, - DISP_SCAN_INTERLACED_ODD_FLD_FIRST = 1 << 0, - DISP_SCAN_INTERLACED_EVEN_FLD_FIRST = 1 << 1, -}; - -enum disp_eotf { - DISP_EOTF_RESERVED = 0x000, - DISP_EOTF_BT709 = 0x001, - DISP_EOTF_UNDEF = 0x002, - DISP_EOTF_GAMMA22 = 0x004, /* SDR */ - DISP_EOTF_GAMMA28 = 0x005, - DISP_EOTF_BT601 = 0x006, - DISP_EOTF_SMPTE240M = 0x007, - DISP_EOTF_LINEAR = 0x008, - DISP_EOTF_LOG100 = 0x009, - DISP_EOTF_LOG100S10 = 0x00a, - DISP_EOTF_IEC61966_2_4 = 0x00b, - DISP_EOTF_BT1361 = 0x00c, - DISP_EOTF_IEC61966_2_1 = 0X00d, - DISP_EOTF_BT2020_0 = 0x00e, - DISP_EOTF_BT2020_1 = 0x00f, - DISP_EOTF_SMPTE2084 = 0x010, /* HDR10 */ - DISP_EOTF_SMPTE428_1 = 0x011, - DISP_EOTF_ARIB_STD_B67 = 0x012, /* HLG */ -}; -/* disp_atw_mode - mode for asynchronous time warp - * - * @NORMAL_MODE: dual buffer, left eye and right eye buffer is individual - * @LEFT_RIGHT_MODE: single buffer, the left half of each line buffer - * is for left eye, the right half is for the right eye - * @UP_DOWN_MODE: single buffer, the first half of the total buffer - * is for the left eye, the second half is for the right eye - */ -enum disp_atw_mode { - NORMAL_MODE, - LEFT_RIGHT_MODE, - UP_DOWN_MODE, -}; -struct disp_output { - unsigned int type; - unsigned int mode; -}; - -struct disp_rect64 { - long long x; - long long y; - long long width; - long long height; -}; - -struct disp_lbc_info { - unsigned int is_lossy; - unsigned int rc_en; - unsigned int pitch; - unsigned int seg_bit; -}; -struct disp_fb_info { - /* address of frame buffer, - * single addr for interleaved fomart, - * double addr for semi-planar fomart - * triple addr for planar format - */ - unsigned long long addr[3]; - struct disp_rectsz size[3]; - /* align for 3 comonent,unit: bytes */ - unsigned int align[3]; - enum disp_pixel_format format; - enum disp_color_space color_space; /* color space */ - unsigned int trd_right_addr[3]; /* right address of 3d fb */ - bool pre_multiply; /* true: pre-multiply fb */ - struct disp_rect64 crop; /* crop rectangle boundaries */ - enum disp_buffer_flags flags; - enum disp_scan_flags scan; - unsigned int lbc_en; - struct disp_lbc_info lbc_info; -}; - -struct disp_layer_info { - enum disp_layer_mode mode; - unsigned char zorder; - /* 0: pixel alpha; 1: global alpha; 2: global pixel alpha */ - unsigned char alpha_mode; - unsigned char alpha_value; /* global alpha value */ - struct disp_rect screen_win; /* display window on the screen */ - bool b_trd_out; /* 3d display */ - enum disp_3d_out_mode out_trd_mode; /* 3d display mode */ - union { - unsigned int color; /* valid when LAYER_MODE_COLOR */ - struct disp_fb_info fb; /* valid when LAYER_MODE_BUFFER */ - }; - - unsigned int id; /* frame id, the id of frame display currently */ -}; - -struct disp_layer_config { - struct disp_layer_info info; - bool enable; - unsigned int channel; - unsigned int layer_id; -}; - -/* disp_atw_info - asynchronous time wrap infomation - * - * @used: indicate if the atw funtion is used - * @mode: atw mode - * @b_row: the row number of the micro block - * @b_col: the column number of the micro block - * @cof_fd: dma_buf fd for the buffer contaied coefficient for atw - */ -struct disp_atw_info { - bool used; - enum disp_atw_mode mode; - unsigned int b_row; - unsigned int b_col; - int cof_fd; -}; -/** - * disp_vdpo_config - */ -struct disp_vdpo_config { - unsigned int data_seq_sel; - unsigned int dclk_invt; - unsigned int dclk_dly_num; - unsigned int spl_type_u; - unsigned int spl_type_v; -}; -/* disp_fb_info2 - image buffer info v2 - * - * @fd: dma_buf fd for frame buffer - * @size: size for each buffer, unit:pixels - * @align: align for each buffer, unit:bytes - * @format: pixel format - * @color_space: color space - * @trd_right_fd: dma_buf fd for the right-eye frame buffer, - * valid when frame-packing 3d buffer input - * @pre_multiply: indicate the pixel use premultiplied alpha - * @crop: crop rectangle for buffer to be display - * @flag: indicate stereo/non-stereo buffer - * @scan: indicate interleave/progressive scan type, and the scan order - * @depth: depth perception for stereo image, only valid when stereo image input - * unit: pixel - * @fbd_en: indicate if enable fbd function - * @lbc_en: indicate if enable lbc function - * @metadata_fd: dma_buf fd for the buffer contained metadata for fbc/hdr - * @metadata_size: the size of metadata buffer, unit:bytes - * @metadata_flag: the flag to indicate the type of metadata buffer - * 0 : no metadata - * 1 << 0: hdr static metadata - * 1 << 1: hdr dynamic metadata - * 1 << 4: frame buffer compress(fbc) metadata - * x : all type could be "or" together - */ -struct disp_fb_info2 { - int fd; - struct disp_rectsz size[3]; - unsigned int align[3]; - enum disp_pixel_format format; - enum disp_color_space color_space; - int trd_right_fd; - bool pre_multiply; - struct disp_rect64 crop; - enum disp_buffer_flags flags; - enum disp_scan_flags scan; - enum disp_eotf eotf; - int depth; - unsigned int fbd_en; - unsigned int lbc_en; - struct disp_lbc_info lbc_info; - int metadata_fd; - unsigned int metadata_size; - unsigned int metadata_flag; -}; - -/* disp_layer_info2 - layer info v2 - * - * @mode: buffer/clolor mode, when in color mode, the layer is widthout buffer - * @zorder: the zorder of layer, 0~max-layer-number - * @alpha_mode: - * 0: pixel alpha; - * 1: global alpha - * 2: mixed alpha, compositing width pixel alpha before global alpha - * @alpha_value: global alpha value, valid when alpha_mode is not pixel alpha - * @screen_win: the rectangle on the screen for fb to be display - * @b_trd_out: indicate if 3d display output - * @out_trd_mode: 3d output mode, valid when b_trd_out is true - * @color: the color value to be display, valid when layer is in color mode - * @fb: the framebuffer info related width the layer, valid when in buffer mode - * @id: frame id, the user could get the frame-id display currently by - * DISP_LAYER_GET_FRAME_ID ioctl - * @atw: asynchronous time wrap information - */ -struct disp_layer_info2 { - enum disp_layer_mode mode; - unsigned char zorder; - unsigned char alpha_mode; - unsigned char alpha_value; - struct disp_rect screen_win; - bool b_trd_out; - enum disp_3d_out_mode out_trd_mode; - union { - unsigned int color; - struct disp_fb_info2 fb; - }; - - unsigned int id; - struct disp_atw_info atw; -}; - -/* disp_layer_config2 - layer config v2 - * - * @info: layer info - * @enable: indicate to enable/disable the layer - * @channel: the channel index of the layer, 0~max-channel-number - * @layer_id: the layer index of the layer widthin it's channel - */ -struct disp_layer_config2 { - struct disp_layer_info2 info; - bool enable; - unsigned int channel; - unsigned int layer_id; -}; -/* disp_palette_config - palette config - * - * @num: the num of palette - * @data: the palette data, each palette data takes 4 bytes,show as below - * bits description - * 31:24 alpha value - * 23:16 red value - * 15:8 green value - * 7:0 blue value - * @channel: the channel index of the layer, 0~max-channel-number - */ -struct disp_palette_config { - unsigned int num; - void *data; - unsigned int channel; -}; -/** - * match rule: 0/1:always match; - * 2:match if min<=color<=max; - * 3:match if color>max or color= 720P) - * DISP_BT2020NC: HDR10 or HLG or wide-color-gamut - * @dvi_hdmi: output mode - * DVI: DISP_DVI - * HDMI: DISP_HDMI - * @range: RGB/YUV quantization range - * DEFUALT: limited range when sending a CE video format - * full range when sending an IT video format - * LIMITED: color limited range from 16 to 235 - * FULL: color full range from 0 to 255 - * @scan info: - * DISP_SCANINFO_NO_DATA: overscan if it is a CE format, - * underscan if it is an IT format - * OVERSCAN: composed for overscan display - * UNDERSCAN: composed for underscan display - * @aspect_ratio: active format aspect ratio - */ -struct disp_device_config { - enum disp_output_type type; - enum disp_tv_mode mode; - enum disp_csc_type format; - enum disp_data_bits bits; - enum disp_eotf eotf; - enum disp_color_space cs; - enum disp_dvi_hdmi dvi_hdmi; - enum disp_color_range range; - enum disp_scan_info scan; - unsigned int aspect_ratio; - unsigned int reserve1; -}; - -/* disp_device_dynamic_config - display deivce dynamic config - * - * @metadata_fd: dma_buf fd for the buffer contained metadata for fbc/hdr - * @metadata_size: the size of metadata buffer, unit:bytes - * @metadata_flag: the flag to indicate the type of metadata buffer - * 0 : no metadata - * 1 << 0: hdr static metadata - * 1 << 1: hdr dynamic metadata - * 1 << 4: frame buffer compress(fbc) metadata - * x : all type could be "or" together - * @vmap:vmap a block contigous phys memory into virtual space - * @vunmap: release virtual mapping obtained by vmap() - */ -struct disp_device_dynamic_config { - int metadata_fd; - unsigned int metadata_size; - unsigned int metadata_flag; - void *(*vmap)(unsigned long phys_addr, unsigned long size); - void (*vunmap)(const void *vaddr); -}; -struct disp_video_timings { - unsigned int vic; /* video information code */ - unsigned int tv_mode; - unsigned int pixel_clk; - unsigned int pixel_repeat; /* pixel repeat (pixel_repeat+1) times */ - unsigned int x_res; - unsigned int y_res; - unsigned int hor_total_time; - unsigned int hor_back_porch; - unsigned int hor_front_porch; - unsigned int hor_sync_time; - unsigned int ver_total_time; - unsigned int ver_back_porch; - unsigned int ver_front_porch; - unsigned int ver_sync_time; - unsigned int hor_sync_polarity; /* 0: negative, 1: positive */ - unsigned int ver_sync_polarity; /* 0: negative, 1: positive */ - bool b_interlace; - unsigned int vactive_space; - unsigned int trd_mode; - unsigned long dclk_rate_set; /*unit: hz */ - unsigned long long frame_period; /* unit: ns */ - int start_delay; /* unit: line */ -}; - -enum disp_fb_mode { - FB_MODE_SCREEN0 = 0, - FB_MODE_SCREEN1 = 1, - FB_MODE_SCREEN2 = 2, - FB_MODE_DUAL_SAME_SCREEN_TB = 3,/* two screen, top buffer for screen0, bottom buffer for screen1 */ - FB_MODE_DUAL_DIFF_SCREEN_SAME_CONTENTS = 4,/* two screen, they have same contents; */ -}; - -struct disp_fb_create_info { - enum disp_fb_mode fb_mode; - enum disp_layer_mode mode; - unsigned int buffer_num; - unsigned int width; - unsigned int height; - - unsigned int output_width; /* used when scaler mode */ - unsigned int output_height; /* used when scaler mode */ -}; - -enum disp_init_mode { - DISP_INIT_MODE_SCREEN0 = 0, /* fb0 for screen0 */ - DISP_INIT_MODE_SCREEN1 = 1, /* fb0 for screen1 */ - DISP_INIT_MODE_SCREEN2 = 2, /* fb0 for screen1 */ - DISP_INIT_MODE_TWO_DIFF_SCREEN = 3,/* fb0 for screen0 and fb1 for screen1 */ - DISP_INIT_MODE_TWO_SAME_SCREEN = 4,/* fb0(up buffer for screen0, down buffer for screen1) */ - DISP_INIT_MODE_TWO_DIFF_SCREEN_SAME_CONTENTS = 5,/* fb0 for two different screen(screen0 layer is normal layer, screen1 layer is scaler layer); */ -}; - -struct disp_tv_func { - int (*tv_enable)(u32 sel); - int (*tv_disable)(u32 sel); - int (*tv_suspend)(u32 sel); - int (*tv_resume)(u32 sel); - int (*tv_get_mode)(u32 sel); - int (*tv_set_mode)(u32 sel, enum disp_tv_mode tv_mod); - int (*tv_get_input_csc)(u32 sel); - int (*tv_get_video_timing_info)(u32 sel, - struct disp_video_timings ** - video_info); - int (*tv_mode_support)(u32 sel, enum disp_tv_mode mode); - int (*tv_hot_plugging_detect)(u32 state); - int (*tv_set_enhance_mode)(u32 sel, u32 mode); - int (*tv_irq_enable)(u32 sel, u32 irq_id, u32 en); - int (*tv_irq_query)(u32 sel); - unsigned int (*tv_get_cur_line)(u32 sel); - int (*vdpo_set_config)(u32 sel, struct disp_vdpo_config *p_cfg); - int (*tv_get_startdelay)(u32 sel); - void (*tv_show_builtin_patten)(u32 sel, u32 patten); -}; - -/* disp_vdevice_interface_para - vdevice interaface parameter - * - * @intf:interface - * 0:hv, 1:cpu, 3:lvds, 4:dsi - * @sub_intf: sub interface - * rgb interface: 0:parallel hv, 8:serial hv, 10:dummy rgb - * 11: rgb dummy, 12: ccir656 - * cpu interface: 0:18 pin, 10:9pin, 12:6pin, 8:16pin, 14:8pin - * lvds interface:0:single link, 1:dual link - * dsi inerafce: 0:video mode, 1:command mode, 2: video burst mode - * @sequence:output sequence - * rgb output: 0:rgb rgb, 1:rgb brg, 2:rgb gbr, 4:brg rgb - * 5:brg brg, 6:brg gbr - * 8:grb rgb, 9:grb brg, 10:grb gbr - * yuv output:0:yuyv, 1: yvyu, 2:uyvy, 3:vyuy - * @fdelay:yuv eav/sav F line delay - * 0: F toggle right after active video line - * 1: delay 2 line(CCIR NTSC) - * 2: delay 3 line(CCIR PAL) - * @clk_phase:clk phase - * 0: 0 degree, 1:90 degree, 2: 180 degree, 3:270 degree - * @sync_polarity:sync signals polarity - * 0: vsync active low,hsync active low - * 1: vsync active high,hsync active low - * 2: vsync active low,hsync active high - * 3: vsync active high,hsync active high - */ -struct disp_vdevice_interface_para { - unsigned int intf; - unsigned int sub_intf; - unsigned int sequence; - unsigned int fdelay; - unsigned int clk_phase; - unsigned int sync_polarity; - unsigned int ccir_clk_div; - unsigned int input_csc;/*not need to config for user*/ -}; - -struct disp_vdevice_source_ops { - int (*tcon_enable)(struct disp_device *dispdev); - int (*tcon_disable)(struct disp_device *dispdev); - int (*tcon_simple_enable)(struct disp_device *dispdev); - int (*tcon_simple_disable)(struct disp_device *dispdev); -}; - -struct disp_device_func { - int (*enable)(void); - int (*smooth_enable)(void); - int (*disable)(void); - int (*set_mode)(u32 mode); - int (*mode_support)(u32 mode); - int (*get_HPD_status)(void); - int (*get_input_csc)(void); - int (*get_input_color_range)(void); - int (*get_video_timing_info)(struct disp_video_timings **video_info); - int (*suspend)(void); - int (*resume)(void); - int (*early_suspend)(void); - int (*late_resume)(void); - int (*get_interface_para)(void *para); - int (*set_static_config)(struct disp_device_config *config); - int (*get_static_config)(struct disp_device_config *config); - int (*set_dynamic_config)(struct disp_device_dynamic_config *config); - int (*get_dynamic_config)(struct disp_device_dynamic_config *config); - - /*for hdmi cec*/ - s32 (*cec_standby_request)(void); - s32 (*cec_send_one_touch_play)(void); -}; - -struct disp_vdevice_init_data { - char name[32]; - u32 disp; - u32 fix_timing; - enum disp_output_type type; - struct disp_device_func func; -}; - -enum disp_tv_dac_source { - DISP_TV_DAC_SRC_COMPOSITE = 0, - DISP_TV_DAC_SRC_LUMA = 1, - DISP_TV_DAC_SRC_CHROMA = 2, - DISP_TV_DAC_SRC_Y = 4, - DISP_TV_DAC_SRC_PB = 5, - DISP_TV_DAC_SRC_PR = 6, - DISP_TV_DAC_SRC_NONE = 7, -}; - -enum disp_tv_output { - DISP_TV_NONE = 0, - DISP_TV_CVBS = 1, - DISP_TV_YPBPR = 2, - DISP_TV_SVIDEO = 4, - DISP_VGA = 5, -}; - -enum tag_DISP_CMD { - /* ----disp global---- */ - DISP_SYS_SHOW = 0x00, - DISP_RESERVE1 = 0x01, - DISP_SET_BKCOLOR = 0x03, - DISP_GET_BKCOLOR = 0x04, - DISP_SET_COLORKEY = 0x05, - DISP_GET_COLORKEY = 0x06, - DISP_GET_SCN_WIDTH = 0x07, - DISP_GET_SCN_HEIGHT = 0x08, - DISP_GET_OUTPUT_TYPE = 0x09, - DISP_SET_EXIT_MODE = 0x0A, - DISP_VSYNC_EVENT_EN = 0x0B, - DISP_BLANK = 0x0C, - DISP_SHADOW_PROTECT = 0x0D, - DISP_HWC_COMMIT = 0x0E, - DISP_DEVICE_SWITCH = 0x0F, - DISP_GET_OUTPUT = 0x10, - DISP_SET_COLOR_RANGE = 0x11, - DISP_GET_COLOR_RANGE = 0x12, - DISP_HWC_CUSTOM = 0x13, - DISP_DEVICE_SET_CONFIG = 0x14, - DISP_DEVICE_GET_CONFIG = 0x15, - - /* ----layer---- */ - DISP_LAYER_ENABLE = 0x40, - DISP_LAYER_DISABLE = 0x41, - DISP_LAYER_SET_INFO = 0x42, - DISP_LAYER_GET_INFO = 0x43, - DISP_LAYER_TOP = 0x44, - DISP_LAYER_BOTTOM = 0x45, - DISP_LAYER_GET_FRAME_ID = 0x46, - DISP_LAYER_SET_CONFIG = 0x47, - DISP_LAYER_GET_CONFIG = 0x48, - /* - * LAYER_S(G)ET_CONFIG2 takes disp_layer_config2, - * it will support more featuras - */ - DISP_LAYER_SET_CONFIG2 = 0x49, - DISP_LAYER_GET_CONFIG2 = 0x4a, - DISP_CHN_SET_PALETTE = 0x4b, - /* ----hdmi---- */ - DISP_HDMI_SUPPORT_MODE = 0xc4, - DISP_SET_TV_HPD = 0xc5, - DISP_HDMI_GET_EDID = 0xc6, - DISP_CEC_ONE_TOUCH_PLAY = 0xc7, - - /* ----lcd---- */ - DISP_LCD_ENABLE = 0x100, - DISP_LCD_DISABLE = 0x101, - DISP_LCD_SET_BRIGHTNESS = 0x102, - DISP_LCD_GET_BRIGHTNESS = 0x103, - DISP_LCD_BACKLIGHT_ENABLE = 0x104, - DISP_LCD_BACKLIGHT_DISABLE = 0x105, - DISP_LCD_SET_SRC = 0x106, - DISP_LCD_SET_FPS = 0x107, - DISP_LCD_GET_FPS = 0x108, - DISP_LCD_GET_SIZE = 0x109, - DISP_LCD_GET_MODEL_NAME = 0x10a, - DISP_LCD_SET_GAMMA_TABLE = 0x10b, - DISP_LCD_GAMMA_CORRECTION_ENABLE = 0x10c, - DISP_LCD_GAMMA_CORRECTION_DISABLE = 0x10d, - DISP_LCD_USER_DEFINED_FUNC = 0x10e, - DISP_LCD_CHECK_OPEN_FINISH = 0x10f, - DISP_LCD_CHECK_CLOSE_FINISH = 0x110, - - /*tv*/ - DISP_TV_SET_GAMMA_TABLE = 0x111, - /* ---- capture --- */ - DISP_CAPTURE_START = 0x140,/* caputre screen and scaler to dram */ - DISP_CAPTURE_STOP = 0x141, - DISP_CAPTURE_COMMIT = 0x142, - DISP_CAPTURE_COMMIT2 = 0x143, - DISP_CAPTURE_QUERY = 0x144, - DISP_CAPTURE_EXTEND = 0x145, - - /* ---enhance --- */ - DISP_ENHANCE_ENABLE = 0x180, - DISP_ENHANCE_DISABLE = 0x181, - DISP_ENHANCE_GET_EN = 0x182, - DISP_ENHANCE_SET_WINDOW = 0x183, - DISP_ENHANCE_GET_WINDOW = 0x184, - DISP_ENHANCE_SET_MODE = 0x185, - DISP_ENHANCE_GET_MODE = 0x186, - DISP_ENHANCE_DEMO_ENABLE = 0x187, - DISP_ENHANCE_DEMO_DISABLE = 0x188, - DISP_ENHANCE_SET_BRIGHT = 0x190, - DISP_ENHANCE_GET_BRIGHT = 0x191, - DISP_ENHANCE_SET_CONTRAST = 0x192, - DISP_ENHANCE_GET_CONTRAST = 0x193, - DISP_ENHANCE_SET_SATURATION = 0x194, - DISP_ENHANCE_GET_SATURATION = 0x195, - - /* ---smart backlight --- */ - DISP_SMBL_ENABLE = 0x200, - DISP_SMBL_DISABLE = 0x201, - DISP_SMBL_GET_EN = 0x202, - DISP_SMBL_SET_WINDOW = 0x203, - DISP_SMBL_GET_WINDOW = 0x204, - - /* ---- for test */ - DISP_FB_REQUEST = 0x280, - DISP_FB_RELEASE = 0x281, - - DISP_MEM_REQUEST = 0x2c0, - DISP_MEM_RELEASE = 0x2c1, - DISP_MEM_GETADR = 0x2c2, - DISP_VDPO_SET_CONFIG = 0x2c3, - DISP_WAIT_VSYNC = 0x2c4, - - /* --- rotation sw --- */ - DISP_ROTATION_SW_SET_ROT = 0x300, - DISP_ROTATION_SW_GET_ROT = 0x301, - - DISP_EINK_UPDATE = 0x402, - DISP_EINK_SET_TEMP = 0x403, - DISP_EINK_GET_TEMP = 0x404, - DISP_EINK_OVERLAP_SKIP = 0x405, - DISP_EINK_UPDATE2 = 0x406, - - /* --- pq --- */ - DISP_PQ_PROC = 0x500, - DISP_LCD_GET_GAMMA_TABLE = 0x501, -}; - -enum { - ROTATION_SW_0 = 0, - ROTATION_SW_90 = 1, - ROTATION_SW_180 = 2, - ROTATION_SW_270 = 3, -}; - -#define FBIOGET_LAYER_HDL_0 0x4700 -#define FBIOGET_LAYER_HDL_1 0x4701 - -#endif diff --git a/src/platform/f133/include/hal/video/sunxi_metadata.h b/src/platform/f133/include/hal/video/sunxi_metadata.h deleted file mode 100644 index 1bd91f99b44121d919855d5f4279fc95d51ae569..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/hal/video/sunxi_metadata.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Allwinner SoCs display driver. - * - * Copyright (C) 2016 Allwinner. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#ifndef __SUNXI_METADATA_H__ -#define __SUNXI_METADATA_H__ - -enum { - /* hdr static metadata is available */ - SUNXI_METADATA_FLAG_HDR_SATIC_METADATA = 0x00000001, - /* hdr dynamic metadata is available */ - SUNXI_METADATA_FLAG_HDR_DYNAMIC_METADATA = 0x00000002, - - /* afbc header data is available */ - SUNXI_METADATA_FLAG_AFBC_HEADER = 0x00000010, -}; - -struct afbc_header { - u32 signature; - u16 filehdr_size; - u16 version; - u32 body_size; - u8 ncomponents; - u8 header_layout; - u8 yuv_transform; - u8 block_split; - u8 inputbits[4]; - u16 block_width; - u16 block_height; - u16 width; - u16 height; - u8 left_crop; - u8 top_crop; - u16 block_layout; -}; - -struct display_master_data { - /* display primaries */ - u16 display_primaries_x[3]; - u16 display_primaries_y[3]; - - /* white_point */ - u16 white_point_x; - u16 white_point_y; - - /* max/min display mastering luminance */ - u32 max_display_mastering_luminance; - u32 min_display_mastering_luminance; -}; - -/* static metadata type 1 */ -struct hdr_static_metadata { - struct display_master_data disp_master; - - u16 maximum_content_light_level; - u16 maximum_frame_average_light_level; -}; - -/* sunxi video metadata for ve and de */ -struct sunxi_metadata { - struct hdr_static_metadata hdr_smetada; - struct afbc_header afbc_head; -}; - -#endif /* #ifndef __SUNXI_METADATA_H__ */ diff --git a/src/platform/f133/include/libos/arch.h b/src/platform/f133/include/libos/arch.h deleted file mode 100644 index 71931f42e4aa99cb804bb165b24cbebb96c4ec45..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/arch.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef ARCH_H__ -#define ARCH_H__ - -#define arch_break(...) do { \ - asm volatile ("ebreak": : :"memory"); \ - } while(0) - -void awos_arch_clean_dcache(void); -void awos_arch_clean_flush_dcache(void); -void awos_arch_flush_dcache(void); -void awos_arch_flush_cache(void); -void awos_arch_flush_icache_all(void); -void awos_arch_clean_flush_cache_region(unsigned long start, unsigned long len); -void awos_arch_clean_flush_cache(void); -void awos_arch_mems_flush_dcache_region(unsigned long start, unsigned long len); -void awos_arch_mems_clean_flush_dcache_region(unsigned long start, unsigned long len); -void awos_arch_mems_clean_dcache_region(unsigned long start, unsigned long len); -void awos_arch_mems_flush_icache_region(unsigned long start, unsigned long len); - -#endif diff --git a/src/platform/f133/include/libos/barrier.h b/src/platform/f133/include/libos/barrier.h deleted file mode 100644 index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..0000000000000000000000000000000000000000 diff --git a/src/platform/f133/include/libos/debug.h b/src/platform/f133/include/libos/debug.h deleted file mode 100644 index c76e114c7b6b74d6174ac8c3439325476e2bc340..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/debug.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef DEBUG_H__ -#define DEBUG_H__ - -#include "arch.h" - -#define software_break(...) \ - do { \ - arch_break(); \ - } while(0) - -#endif diff --git a/src/platform/f133/include/libos/init.h b/src/platform/f133/include/libos/init.h deleted file mode 100644 index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..0000000000000000000000000000000000000000 diff --git a/src/platform/f133/include/libos/interrupt.h b/src/platform/f133/include/libos/interrupt.h deleted file mode 100644 index b58b6ea4a3dc96463e081b2beaed8f6b847747c8..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/interrupt.h +++ /dev/null @@ -1,812 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* interrupt.h */ -#ifndef _LINUX_INTERRUPT_H -#define _LINUX_INTERRUPT_H - -//#include -#include -#include -#include -#include - -#define NR_CPUS 1 -#define NR_IRQS (207) -#define BITS_PER_BYTE 8 -#define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) -#define BITS_PER_TYPE(type) (sizeof(type) * BITS_PER_BYTE) -//#define DIV_ROUND_UP __KERNEL_DIV_ROUND_UP -#ifndef BITS_TO_LONGS -#define BITS_TO_LONGS(nr) __KERNEL_DIV_ROUND_UP(nr, BITS_PER_TYPE(long)) -#endif -#define DECLARE_BITMAP(name,bits) \ - unsigned long name[BITS_TO_LONGS(bits)] - -/* Don't assign or return these: may not be this big! */ -typedef struct cpumask -{ - DECLARE_BITMAP(bits, NR_CPUS); -} cpumask_t; -/* - * These correspond to the IORESOURCE_IRQ_* defines in - * linux/ioport.h to select the interrupt line behaviour. When - * requesting an interrupt without specifying a IRQF_TRIGGER, the - * setting should be assumed to be "as already configured", which - * may be as per machine or firmware initialisation. - */ -#define IRQF_TRIGGER_NONE 0x00000000 -#define IRQF_TRIGGER_RISING 0x00000001 -#define IRQF_TRIGGER_FALLING 0x00000002 -#define IRQF_TRIGGER_HIGH 0x00000004 -#define IRQF_TRIGGER_LOW 0x00000008 -#define IRQF_TRIGGER_MASK (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW | \ - IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING) -#define IRQF_TRIGGER_PROBE 0x00000010 - -/* - * These flags used only by the kernel as part of the - * irq handling routines. - * - * IRQF_SHARED - allow sharing the irq among several devices - * IRQF_PROBE_SHARED - set by callers when they expect sharing mismatches to occur - * IRQF_TIMER - Flag to mark this interrupt as timer interrupt - * IRQF_PERCPU - Interrupt is per cpu - * IRQF_NOBALANCING - Flag to exclude this interrupt from irq balancing - * IRQF_IRQPOLL - Interrupt is used for polling (only the interrupt that is - * registered first in a shared interrupt is considered for - * performance reasons) - * IRQF_ONESHOT - Interrupt is not reenabled after the hardirq handler finished. - * Used by threaded interrupts which need to keep the - * irq line disabled until the threaded handler has been run. - * IRQF_NO_SUSPEND - Do not disable this IRQ during suspend. Does not guarantee - * that this interrupt will wake the system from a suspended - * state. See Documentation/power/suspend-and-interrupts.rst - * IRQF_FORCE_RESUME - Force enable it on resume even if IRQF_NO_SUSPEND is set - * IRQF_NO_THREAD - Interrupt cannot be threaded - * IRQF_EARLY_RESUME - Resume IRQ early during syscore instead of at device - * resume time. - * IRQF_COND_SUSPEND - If the IRQ is shared with a NO_SUSPEND user, execute this - * interrupt handler after suspending interrupts. For system - * wakeup devices users need to implement wakeup detection in - * their interrupt handlers. - */ -#define IRQF_SHARED 0x00000080 -#define IRQF_PROBE_SHARED 0x00000100 -#define __IRQF_TIMER 0x00000200 -#define IRQF_PERCPU 0x00000400 -#define IRQF_NOBALANCING 0x00000800 -#define IRQF_IRQPOLL 0x00001000 -#define IRQF_ONESHOT 0x00002000 -#define IRQF_NO_SUSPEND 0x00004000 -#define IRQF_FORCE_RESUME 0x00008000 -#define IRQF_NO_THREAD 0x00010000 -#define IRQF_EARLY_RESUME 0x00020000 -#define IRQF_COND_SUSPEND 0x00040000 - -#define IRQF_TIMER (__IRQF_TIMER | IRQF_NO_SUSPEND | IRQF_NO_THREAD) -#define __must_check __attribute__((__warn_unused_result__)) - -/* - * These values can be returned by request_any_context_irq() and - * describe the context the interrupt will be run in. - * - * IRQC_IS_HARDIRQ - interrupt runs in hardirq context - * IRQC_IS_NESTED - interrupt runs in a nested threaded context - */ -enum -{ - IRQC_IS_HARDIRQ = 0, - IRQC_IS_NESTED, -}; - -/** - * enum irqreturn - * @IRQ_NONE interrupt was not from this device or was not handled - * @IRQ_HANDLED interrupt was handled by this device - * @IRQ_WAKE_THREAD handler requests to wake the handler thread - */ -enum irqreturn -{ - IRQ_NONE = (0 << 0), - IRQ_HANDLED = (1 << 0), - IRQ_WAKE_THREAD = (1 << 1), -}; - -#define IRQACTION_NAME_MAX 16 - -typedef enum irqreturn irqreturn_t; -#define IRQ_RETVAL(x) ((x) ? IRQ_HANDLED : IRQ_NONE) - -typedef irqreturn_t (*irq_handler_t)(int, void *); - -/** - * struct irqaction - per interrupt action descriptor - * @handler: interrupt handler function - * @name: name of the device - * @dev_id: cookie to identify the device - * @percpu_dev_id: cookie to identify the device - * @next: pointer to the next irqaction for shared interrupts - * @irq: interrupt number - * @flags: flags (see IRQF_* above) - * @thread_fn: interrupt handler function for threaded interrupts - * @thread: thread pointer for threaded interrupts - * @secondary: pointer to secondary irqaction (force threading) - * @thread_flags: flags related to @thread - * @thread_mask: bitmask for keeping track of @thread activity - * @dir: pointer to the proc/irq/NN/name entry - */ -struct irqaction -{ - irq_handler_t handler; - void *dev_id; - struct irqaction *next; - struct irqaction *secondary; - unsigned int irq; - unsigned int flags; - unsigned long thread_flags; - unsigned long thread_mask; - unsigned long irq_nums; - const char name[IRQACTION_NAME_MAX]; -}; - -extern irqreturn_t no_action(int cpl, void *dev_id); - -/* - * If a (PCI) device interrupt is not connected we set dev->irq to - * IRQ_NOTCONNECTED. This causes request_irq() to fail with -ENOTCONN, so we - * can distingiush that case from other error returns. - * - * 0x80000000 is guaranteed to be outside the available range of interrupts - * and easy to distinguish from other possible incorrect values. - */ -#define IRQ_NOTCONNECTED (1U << 31) - -extern int __must_check -request_threaded_irq(unsigned int irq, irq_handler_t handler, - irq_handler_t thread_fn, - unsigned long flags, const char *name, void *dev); - -static inline int __must_check request_irq(unsigned int irq, irq_handler_t handler, unsigned long flags, - const char *name, void *dev) -{ - return request_threaded_irq(irq, handler, NULL, flags, name, dev); -} - -extern int __must_check -request_any_context_irq(unsigned int irq, irq_handler_t handler, - unsigned long flags, const char *name, void *dev_id); - -/* - *extern int __must_check - *__request_percpu_irq(unsigned int irq, irq_handler_t handler, - * unsigned long flags, const char *devname, - * void __percpu *percpu_dev_id); - */ - -extern int __must_check -request_nmi(unsigned int irq, irq_handler_t handler, unsigned long flags, - const char *name, void *dev); - -/* - *static inline int __must_check - *request_percpu_irq(unsigned int irq, irq_handler_t handler, - * const char *devname, void __percpu *percpu_dev_id) - *{ - * return __request_percpu_irq(irq, handler, 0, - * devname, percpu_dev_id); - *} - * - */ -/* - *extern int __must_check - *request_percpu_nmi(unsigned int irq, irq_handler_t handler, - * const char *devname, void __percpu *dev); - */ - -extern const void *free_irq(unsigned int, void *); -//extern void free_percpu_irq(unsigned int, void __percpu *); - -extern const void *free_nmi(unsigned int irq, void *dev_id); -//extern void free_percpu_nmi(unsigned int irq, void __percpu *percpu_dev_id); - -//struct device; - -/* - *extern int __must_check - *devm_request_threaded_irq(struct device *dev, unsigned int irq, - * irq_handler_t handler, irq_handler_t thread_fn, - * unsigned long irqflags, const char *devname, - * void *dev_id); - */ - -/* - *static inline int __must_check - *devm_request_irq(struct device *dev, unsigned int irq, irq_handler_t handler, - * unsigned long irqflags, const char *devname, void *dev_id) - *{ - * return devm_request_threaded_irq(dev, irq, handler, NULL, irqflags, - * devname, dev_id); - *} - */ - -/* - *extern int __must_check - *devm_request_any_context_irq(struct device *dev, unsigned int irq, - * irq_handler_t handler, unsigned long irqflags, - * const char *devname, void *dev_id); - */ - -//extern void devm_free_irq(struct device *dev, unsigned int irq, void *dev_id); - -/* - * On lockdep we dont want to enable hardirqs in hardirq - * context. Use local_irq_enable_in_hardirq() to annotate - * kernel code that has to do this nevertheless (pretty much - * the only valid case is for old/broken hardware that is - * insanely slow). - * - * NOTE: in theory this might break fragile code that relies - * on hardirq delivery - in practice we dont seem to have such - * places left. So the only effect should be slightly increased - * irqs-off latencies. - */ -#ifdef CONFIG_LOCKDEP -# define local_irq_enable_in_hardirq() do { } while (0) -#else -# define local_irq_enable_in_hardirq() local_irq_enable() -#endif - -extern void disable_irq_nosync(unsigned int irq); -extern bool disable_hardirq(unsigned int irq); -extern void disable_irq(unsigned int irq); -extern void disable_percpu_irq(unsigned int irq); -extern void enable_irq(unsigned int irq); -extern void enable_percpu_irq(unsigned int irq, unsigned int type); -extern bool irq_percpu_is_enabled(unsigned int irq); -extern void irq_wake_thread(unsigned int irq, void *dev_id); - -extern void disable_nmi_nosync(unsigned int irq); -extern void disable_percpu_nmi(unsigned int irq); -extern void enable_nmi(unsigned int irq); -extern void enable_percpu_nmi(unsigned int irq, unsigned int type); -extern int prepare_percpu_nmi(unsigned int irq); -extern void teardown_percpu_nmi(unsigned int irq); - -/* The following three functions are for the core kernel use only. */ -extern void suspend_device_irqs(void); -extern void resume_device_irqs(void); - -/** - * struct irq_affinity_notify - context for notification of IRQ affinity changes - * @irq: Interrupt to which notification applies - * @kref: Reference count, for internal use - * @work: Work item, for internal use - * @notify: Function to be called on change. This will be - * called in process context. - * @release: Function to be called on release. This will be - * called in process context. Once registered, the - * structure must only be freed when this function is - * called or later. - */ -struct irq_affinity_notify -{ - unsigned int irq; - //struct kref kref; - //struct work_struct work; - //void (*notify)(struct irq_affinity_notify *, const cpumask_t *mask); - //void (*release)(struct kref *ref); -}; - -#define IRQ_AFFINITY_MAX_SETS 4 - -/** - * struct irq_affinity - Description for automatic irq affinity assignements - * @pre_vectors: Don't apply affinity to @pre_vectors at beginning of - * the MSI(-X) vector space - * @post_vectors: Don't apply affinity to @post_vectors at end of - * the MSI(-X) vector space - * @nr_sets: The number of interrupt sets for which affinity - * spreading is required - * @set_size: Array holding the size of each interrupt set - * @calc_sets: Callback for calculating the number and size - * of interrupt sets - * @priv: Private data for usage by @calc_sets, usually a - * pointer to driver/device specific data. - */ -struct irq_affinity -{ - unsigned int pre_vectors; - unsigned int post_vectors; - unsigned int nr_sets; - //unsigned int set_size[IRQ_AFFINITY_MAX_SETS]; - //void (*calc_sets)(struct irq_affinity *, unsigned int nvecs); - void *priv; -}; - -/** - * struct irq_affinity_desc - Interrupt affinity descriptor - * @mask: cpumask to hold the affinity assignment - * @is_managed: 1 if the interrupt is managed internally - */ -/* - *struct irq_affinity_desc { - * struct cpumask mask; - * unsigned int is_managed : 1; - *}; - */ - -#if (0) /*defined(CONFIG_SMP)*/ - -extern cpumask_var_t irq_default_affinity; - -/* Internal implementation. Use the helpers below */ -extern int __irq_set_affinity(unsigned int irq, const struct cpumask *cpumask, - bool force); - -/** - * irq_set_affinity - Set the irq affinity of a given irq - * @irq: Interrupt to set affinity - * @cpumask: cpumask - * - * Fails if cpumask does not contain an online CPU - */ -static inline int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask) -{ - return __irq_set_affinity(irq, cpumask, false); -} - -/** - * irq_force_affinity - Force the irq affinity of a given irq - * @irq: Interrupt to set affinity - * @cpumask: cpumask - * - * Same as irq_set_affinity, but without checking the mask against - * online cpus. - * - * Solely for low level cpu hotplug code, where we need to make per - * cpu interrupts affine before the cpu becomes online. - */ -static inline int irq_force_affinity(unsigned int irq, const struct cpumask *cpumask) -{ - return __irq_set_affinity(irq, cpumask, true); -} - -extern int irq_can_set_affinity(unsigned int irq); -extern int irq_select_affinity(unsigned int irq); - -extern int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m); - -extern int -irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify); - -struct irq_affinity_desc * -irq_create_affinity_masks(unsigned int nvec, struct irq_affinity *affd); - -unsigned int irq_calc_affinity_vectors(unsigned int minvec, unsigned int maxvec, - const struct irq_affinity *affd); - -#else /* CONFIG_SMP */ - -static inline int irq_set_affinity(unsigned int irq, const struct cpumask *m) -{ - return -1; -} - -static inline int irq_force_affinity(unsigned int irq, const struct cpumask *cpumask) -{ - return 0; -} - -static inline int irq_can_set_affinity(unsigned int irq) -{ - return 0; -} - -static inline int irq_select_affinity(unsigned int irq) -{ - return 0; -} - -static inline int irq_set_affinity_hint(unsigned int irq, - const struct cpumask *m) -{ - return -1; -} - -/* - *static inline int - *irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify) - *{ - * return 0; - *} - */ - -/* - *static inline struct irq_affinity_desc * - *irq_create_affinity_masks(unsigned int nvec, struct irq_affinity *affd) - *{ - * return NULL; - *} - */ - -/* - *static inline unsigned int - *irq_calc_affinity_vectors(unsigned int minvec, unsigned int maxvec, - * const struct irq_affinity *affd) - *{ - * return maxvec; - *} - */ - -#endif /* CONFIG_SMP */ - -/* - * Special lockdep variants of irq disabling/enabling. - * These should be used for locking constructs that - * know that a particular irq context which is disabled, - * and which is the only irq-context user of a lock, - * that it's safe to take the lock in the irq-disabled - * section without disabling hardirqs. - * - * On !CONFIG_LOCKDEP they are equivalent to the normal - * irq disable/enable methods. - */ -static inline void disable_irq_nosync_lockdep(unsigned int irq) -{ - disable_irq_nosync(irq); -#ifdef CONFIG_LOCKDEP - local_irq_disable(); -#endif -} - -static inline void disable_irq_nosync_lockdep_irqsave(unsigned int irq, unsigned long *flags) -{ - disable_irq_nosync(irq); -#ifdef CONFIG_LOCKDEP - local_irq_save(*flags); -#endif -} - -static inline void disable_irq_lockdep(unsigned int irq) -{ - disable_irq(irq); -#ifdef CONFIG_LOCKDEP - local_irq_disable(); -#endif -} - -static inline void enable_irq_lockdep(unsigned int irq) -{ -#ifdef CONFIG_LOCKDEP - local_irq_enable(); -#endif - enable_irq(irq); -} - -static inline void enable_irq_lockdep_irqrestore(unsigned int irq, unsigned long *flags) -{ -#ifdef CONFIG_LOCKDEP - local_irq_restore(*flags); -#endif - enable_irq(irq); -} - -/* IRQ wakeup (PM) control: */ -extern int irq_set_irq_wake(unsigned int irq, unsigned int on); - -static inline int enable_irq_wake(unsigned int irq) -{ - return irq_set_irq_wake(irq, 1); -} - -static inline int disable_irq_wake(unsigned int irq) -{ - return irq_set_irq_wake(irq, 0); -} - -/* - * irq_get_irqchip_state/irq_set_irqchip_state specific flags - */ -enum irqchip_irq_state -{ - IRQCHIP_STATE_PENDING, /* Is interrupt pending? */ - IRQCHIP_STATE_ACTIVE, /* Is interrupt in progress? */ - IRQCHIP_STATE_MASKED, /* Is interrupt masked? */ - IRQCHIP_STATE_LINE_LEVEL, /* Is IRQ line high? */ -}; - -extern int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which, - bool *state); -extern int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which, - bool state); - -#ifdef CONFIG_IRQ_FORCED_THREADING -extern bool force_irqthreads; -#else -#define force_irqthreads (0) -#endif - -#ifndef local_softirq_pending - -#ifndef local_softirq_pending_ref -//#define local_softirq_pending_ref irq_stat.__softirq_pending -#endif - -//#define local_softirq_pending() (__this_cpu_read(local_softirq_pending_ref)) -//#define set_softirq_pending(x) (__this_cpu_write(local_softirq_pending_ref, (x))) -//#define or_softirq_pending(x) (__this_cpu_or(local_softirq_pending_ref, (x))) - -#endif /* local_softirq_pending */ - -/* Some architectures might implement lazy enabling/disabling of - * interrupts. In some cases, such as stop_machine, we might want - * to ensure that after a local_irq_disable(), interrupts have - * really been disabled in hardware. Such architectures need to - * implement the following hook. - */ -#ifndef hard_irq_disable -#define hard_irq_disable() do { } while(0) -#endif - -/* PLEASE, avoid to allocate new softirqs, if you need not _really_ high - frequency threaded job scheduling. For almost all the purposes - tasklets are more than enough. F.e. all serial device BHs et - al. should be converted to tasklets, not to softirqs. - */ - -enum -{ - HI_SOFTIRQ = 0, - TIMER_SOFTIRQ, - NET_TX_SOFTIRQ, - NET_RX_SOFTIRQ, - BLOCK_SOFTIRQ, - IRQ_POLL_SOFTIRQ, - TASKLET_SOFTIRQ, - SCHED_SOFTIRQ, - HRTIMER_SOFTIRQ, /* Unused, but kept as tools rely on the - numbering. Sigh! */ - RCU_SOFTIRQ, /* Preferable RCU should always be the last softirq */ - - NR_SOFTIRQS -}; - -#define SOFTIRQ_STOP_IDLE_MASK (~(1 << RCU_SOFTIRQ)) - -/* map softirq index to softirq name. update 'softirq_to_name' in - * kernel/softirq.c when adding a new softirq. - */ -extern const char *const softirq_to_name[NR_SOFTIRQS]; - -/* softirq mask and active fields moved to irq_cpustat_t in - * asm/hardirq.h to get better cache usage. KAO - */ - -struct softirq_action -{ - void (*action)(struct softirq_action *); -}; - -//asmlinkage void do_softirq(void); -//asmlinkage void __do_softirq(void); - -#ifdef __ARCH_HAS_DO_SOFTIRQ -void do_softirq_own_stack(void); -#else -static inline void do_softirq_own_stack(void) -{ - //__do_softirq(); -} -#endif - -extern void open_softirq(int nr, void (*action)(struct softirq_action *)); -extern void softirq_init(void); -extern void __raise_softirq_irqoff(unsigned int nr); - -extern void raise_softirq_irqoff(unsigned int nr); -extern void raise_softirq(unsigned int nr); - -//DECLARE_PER_CPU(struct task_struct *, ksoftirqd); - -/* - *static inline struct task_struct *this_cpu_ksoftirqd(void) - *{ - * return this_cpu_read(ksoftirqd); - *} - */ - -/* Tasklets --- multithreaded analogue of BHs. - - Main feature differing them of generic softirqs: tasklet - is running only on one CPU simultaneously. - - Main feature differing them of BHs: different tasklets - may be run simultaneously on different CPUs. - - Properties: - * If tasklet_schedule() is called, then tasklet is guaranteed - to be executed on some cpu at least once after this. - * If the tasklet is already scheduled, but its execution is still not - started, it will be executed only once. - * If this tasklet is already running on another CPU (or schedule is called - from tasklet itself), it is rescheduled for later. - * Tasklet is strictly serialized wrt itself, but not - wrt another tasklets. If client needs some intertask synchronization, - he makes it with spinlocks. - */ - -/* - *struct tasklet_struct - *{ - * struct tasklet_struct *next; - * unsigned long state; - * atomic_t count; - * void (*func)(unsigned long); - * unsigned long data; - *}; - */ - -/* - *#define DECLARE_TASKLET(name, func, data) \ - *struct tasklet_struct name = { NULL, 0, ATOMIC_INIT(0), func, data } - */ - -/* - *#define DECLARE_TASKLET_DISABLED(name, func, data) \ - *struct tasklet_struct name = { NULL, 0, ATOMIC_INIT(1), func, data } - */ - - -enum -{ - TASKLET_STATE_SCHED, /* Tasklet is scheduled for execution */ - TASKLET_STATE_RUN /* Tasklet is running (SMP only) */ -}; - -//#ifdef CONFIG_SMP -#if 0 -static inline int tasklet_trylock(struct tasklet_struct *t) -{ - return !test_and_set_bit(TASKLET_STATE_RUN, &(t)->state); -} - -static inline void tasklet_unlock(struct tasklet_struct *t) -{ - smp_mb__before_atomic(); - clear_bit(TASKLET_STATE_RUN, &(t)->state); -} - -static inline void tasklet_unlock_wait(struct tasklet_struct *t) -{ - while (test_bit(TASKLET_STATE_RUN, &(t)->state)) - { - barrier(); - } -} -#else -#define tasklet_trylock(t) 1 -#define tasklet_unlock_wait(t) do { } while (0) -#define tasklet_unlock(t) do { } while (0) -#endif - -//extern void __tasklet_schedule(struct tasklet_struct *t); - -/* - *static inline void tasklet_schedule(struct tasklet_struct *t) - *{ - * if (!test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) - * __tasklet_schedule(t); - *} - * - *extern void __tasklet_hi_schedule(struct tasklet_struct *t); - * - *static inline void tasklet_hi_schedule(struct tasklet_struct *t) - *{ - * if (!test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) - * __tasklet_hi_schedule(t); - *} - * - *static inline void tasklet_disable_nosync(struct tasklet_struct *t) - *{ - * atomic_inc(&t->count); - * smp_mb__after_atomic(); - *} - * - *static inline void tasklet_disable(struct tasklet_struct *t) - *{ - * tasklet_disable_nosync(t); - * tasklet_unlock_wait(t); - * smp_mb(); - *} - * - *static inline void tasklet_enable(struct tasklet_struct *t) - *{ - * smp_mb__before_atomic(); - * atomic_dec(&t->count); - *} - * - *extern void tasklet_kill(struct tasklet_struct *t); - *extern void tasklet_kill_immediate(struct tasklet_struct *t, unsigned int cpu); - *extern void tasklet_init(struct tasklet_struct *t, - * void (*func)(unsigned long), unsigned long data); - */ - -/* - * Autoprobing for irqs: - * - * probe_irq_on() and probe_irq_off() provide robust primitives - * for accurate IRQ probing during kernel initialization. They are - * reasonably simple to use, are not "fooled" by spurious interrupts, - * and, unlike other attempts at IRQ probing, they do not get hung on - * stuck interrupts (such as unused PS2 mouse interfaces on ASUS boards). - * - * For reasonably foolproof probing, use them as follows: - * - * 1. clear and/or mask the device's internal interrupt. - * 2. sti(); - * 3. irqs = probe_irq_on(); // "take over" all unassigned idle IRQs - * 4. enable the device and cause it to trigger an interrupt. - * 5. wait for the device to interrupt, using non-intrusive polling or a delay. - * 6. irq = probe_irq_off(irqs); // get IRQ number, 0=none, negative=multiple - * 7. service the device to clear its pending interrupt. - * 8. loop again if paranoia is required. - * - * probe_irq_on() returns a mask of allocated irq's. - * - * probe_irq_off() takes the mask as a parameter, - * and returns the irq number which occurred, - * or zero if none occurred, or a negative irq number - * if more than one irq occurred. - */ - -#if !defined(CONFIG_GENERIC_IRQ_PROBE) -static inline unsigned long probe_irq_on(void) -{ - return 0; -} -static inline int probe_irq_off(unsigned long val) -{ - return 0; -} -static inline unsigned int probe_irq_mask(unsigned long val) -{ - return 0; -} -#else -extern unsigned long probe_irq_on(void); /* returns 0 on failure */ -extern int probe_irq_off(unsigned long); /* returns 0 or negative on failure */ -extern unsigned int probe_irq_mask(unsigned long); /* returns mask of ISA interrupts */ -#endif - -#ifdef CONFIG_PROC_FS -/* Initialize /proc/irq/ */ -extern void init_irq_proc(void); -#else -static inline void init_irq_proc(void) -{ -} -#endif - -#ifdef CONFIG_IRQ_TIMINGS -void irq_timings_enable(void); -void irq_timings_disable(void); -uint64_t irq_timings_next_event(uint64_t now); -#endif - -/* - *struct seq_file; - *int show_interrupts(struct seq_file *p, void *v); - *int arch_show_interrupts(struct seq_file *p, int prec); - * - */ -extern int early_irq_init(void); -extern int arch_probe_nr_irqs(void); -extern int arch_early_irq_init(void); - -/* - * We want to know which function is an entrypoint of a hardirq or a softirq. - */ -#define __irq_entry __attribute__((__section__(".irqentry.text"))) -#define __softirq_entry \ - __attribute__((__section__(".softirqentry.text"))) - -#endif diff --git a/src/platform/f133/include/libos/kapi.h b/src/platform/f133/include/libos/kapi.h deleted file mode 100644 index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..0000000000000000000000000000000000000000 diff --git a/src/platform/f133/include/libos/ktimer.h b/src/platform/f133/include/libos/ktimer.h deleted file mode 100644 index abadab31976392471d2e809b80772ea5e41da45f..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/ktimer.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __LIBOS_KTIMER_H__ -#define __LIBOS_KTIMER_H__ - -#include - -struct timespec64 { - unsigned long tv_sec; /* seconds */ - unsigned long tv_nsec; /* nanoseconds */ -}; - -int do_gettimeofday(struct timespec64 *ts); - -#endif diff --git a/src/platform/f133/include/libos/libc/bits/alltypes.h b/src/platform/f133/include/libos/libc/bits/alltypes.h deleted file mode 100644 index 39b22aa474e68065048d7979e938f5eee9f7893d..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/libc/bits/alltypes.h +++ /dev/null @@ -1,2 +0,0 @@ -#define __BYTE_ORDER 1234 -#define __LONG_MAX 0x7fffffffffffffffL diff --git a/src/platform/f133/include/libos/libc/bits/fenv.h b/src/platform/f133/include/libos/libc/bits/fenv.h deleted file mode 100644 index 806ec40f151b52429bdd407a47af38ce3d06a480..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/libc/bits/fenv.h +++ /dev/null @@ -1,17 +0,0 @@ -#define FE_INVALID 16 -#define FE_DIVBYZERO 8 -#define FE_OVERFLOW 4 -#define FE_UNDERFLOW 2 -#define FE_INEXACT 1 - -#define FE_ALL_EXCEPT 31 - -#define FE_TONEAREST 0 -#define FE_DOWNWARD 2 -#define FE_UPWARD 3 -#define FE_TOWARDZERO 1 - -typedef unsigned int fexcept_t; -typedef unsigned int fenv_t; - -#define FE_DFL_ENV ((const fenv_t *) -1) diff --git a/src/platform/f133/include/libos/libc/bits/float.h b/src/platform/f133/include/libos/libc/bits/float.h deleted file mode 100644 index 719c79085af84ad0148edcfbacce963d15178837..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/libc/bits/float.h +++ /dev/null @@ -1,16 +0,0 @@ -#define FLT_EVAL_METHOD 0 - -#define LDBL_TRUE_MIN 6.47517511943802511092443895822764655e-4966L -#define LDBL_MIN 3.36210314311209350626267781732175260e-4932L -#define LDBL_MAX 1.18973149535723176508575932662800702e+4932L -#define LDBL_EPSILON 1.92592994438723585305597794258492732e-34L - -#define LDBL_MANT_DIG 113 -#define LDBL_MIN_EXP (-16381) -#define LDBL_MAX_EXP 16384 - -#define LDBL_DIG 33 -#define LDBL_MIN_10_EXP (-4931) -#define LDBL_MAX_10_EXP 4932 - -#define DECIMAL_DIG 36 diff --git a/src/platform/f133/include/libos/libc/bits/stdint.h b/src/platform/f133/include/libos/libc/bits/stdint.h deleted file mode 100644 index 1bb147f24e02b0445b78079291aadea6c5c4a05e..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/libc/bits/stdint.h +++ /dev/null @@ -1,20 +0,0 @@ -typedef int32_t int_fast16_t; -typedef int32_t int_fast32_t; -typedef uint32_t uint_fast16_t; -typedef uint32_t uint_fast32_t; - -#define INT_FAST16_MIN INT32_MIN -#define INT_FAST32_MIN INT32_MIN - -#define INT_FAST16_MAX INT32_MAX -#define INT_FAST32_MAX INT32_MAX - -#define UINT_FAST16_MAX UINT32_MAX -#define UINT_FAST32_MAX UINT32_MAX - -#define INTPTR_MIN INT64_MIN -#define INTPTR_MAX INT64_MAX -#define UINTPTR_MAX UINT64_MAX -#define PTRDIFF_MIN INT64_MIN -#define PTRDIFF_MAX INT64_MAX -#define SIZE_MAX UINT64_MAX diff --git a/src/platform/f133/include/libos/libc/bits/types.h b/src/platform/f133/include/libos/libc/bits/types.h deleted file mode 100644 index dbb344152939d17e15004320e1704ea204eae09c..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/libc/bits/types.h +++ /dev/null @@ -1,30 +0,0 @@ -typedef signed char s8_t; -typedef unsigned char u8_t; - -typedef signed short s16_t; -typedef unsigned short u16_t; - -typedef signed int s32_t; -typedef unsigned int u32_t; - -typedef signed long long s64_t; -typedef unsigned long long u64_t; - -typedef signed long long intmax_t; -typedef unsigned long long uintmax_t; - -typedef signed long long ptrdiff_t; -typedef signed long long intptr_t; -typedef unsigned long long uintptr_t; - -typedef unsigned long long size_t; -typedef signed long long ssize_t; - -typedef signed int off_t; -typedef signed long long loff_t; - -typedef signed int bool_t; - -typedef int wchar_t; -typedef unsigned wint_t; -typedef unsigned long wctype_t; diff --git a/src/platform/f133/include/libos/libc/features.h b/src/platform/f133/include/libos/libc/features.h deleted file mode 100644 index 5484f9b241f61e2cfe0add05dafeb9f5af456a0e..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/libc/features.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef _FEATURES_H -#define _FEATURES_H - -#if __STDC_VERSION__ >= 199901L -#define __restrict restrict -#elif !defined(__GNUC__) -#define __restrict -#endif - -#if __STDC_VERSION__ >= 199901L || defined(__cplusplus) -#define __inline inline -#elif !defined(__GNUC__) -#define __inline -#endif - -#if __STDC_VERSION__ >= 201112L -#elif defined(__GNUC__) -#define _Noreturn __attribute__((__noreturn__)) -#else -#define _Noreturn -#endif - -#define __REDIR(x,y) __typeof__(x) x __asm__(#y) - -#define weak_sym __attribute__((__weak__)) -#define hidden_sym __attribute__((__visibility__("hidden"))) -#define weak_alias(old, new) \ - extern __typeof(old) new __attribute__((__weak__, __alias__(#old))) - -#endif diff --git a/src/platform/f133/include/libos/libc/limits.h b/src/platform/f133/include/libos/libc/limits.h deleted file mode 100644 index 981833f57e51ad9aa8d220bd6f7c60e6cac46323..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/libc/limits.h +++ /dev/null @@ -1,43 +0,0 @@ -#ifndef _LIMITS_H -#define _LIMITS_H - -#include - -#include /* __LONG_MAX */ - -/* Support signed or unsigned plain-char */ - -#if '\xff' > 0 -#define CHAR_MIN 0 -#define CHAR_MAX 255 -#else -#define CHAR_MIN (-128) -#define CHAR_MAX 127 -#endif - -#define CHAR_BIT 8 -#define SCHAR_MIN (-128) -#define SCHAR_MAX 127 -#define UCHAR_MAX 255 -#define SHRT_MIN (-1-0x7fff) -#define SHRT_MAX 0x7fff -#define USHRT_MAX 0xffff -#define INT_MIN (-1-0x7fffffff) -#define INT_MAX 0x7fffffff -#define UINT_MAX 0xffffffffU -#define LONG_MIN (-LONG_MAX-1) -#define LONG_MAX __LONG_MAX -#define ULONG_MAX (2UL*LONG_MAX+1) -#define LLONG_MIN (-LLONG_MAX-1) -#define LLONG_MAX 0x7fffffffffffffffLL -#define ULLONG_MAX (2ULL*LLONG_MAX+1) - -#define MB_LEN_MAX 4 - - -#define NL_ARGMAX 9 -#define NL_MSGMAX 32767 -#define NL_SETMAX 255 -#define NL_TEXTMAX 2048 - -#endif diff --git a/src/platform/f133/include/libos/libc/stdarg.h b/src/platform/f133/include/libos/libc/stdarg.h deleted file mode 100644 index 6e7df90cce208c6ab552943f133506e394c546ff..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/libc/stdarg.h +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef _STDARG_H -#define _STDARG_H - -#ifdef __cplusplus -extern "C" { -#endif - -typedef __builtin_va_list va_list; - -/* - * prepare to access variable args - */ -#define va_start(v, l) __builtin_va_start(v, l) - -/* - * the caller will get the value of current argument - */ -#define va_arg(v, l) __builtin_va_arg(v, l) - -/* - * end for variable args - */ -#define va_end(v) __builtin_va_end(v) - -/* - * copy variable args - */ -#define va_copy(d, s) __builtin_va_copy(d, s) - -#ifdef __cplusplus -} -#endif - -#endif /* _STDARG_H */ diff --git a/src/platform/f133/include/libos/libc/stdbool.h b/src/platform/f133/include/libos/libc/stdbool.h deleted file mode 100644 index 0f6a8a6e69b1c2035cd057a468298ffc123ba7f4..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/libc/stdbool.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef _STDBOOL_H -#define _STDBOOL_H - -#ifndef __cplusplus - -#define bool _Bool -#define false 0 -#define true 1 - -#endif /* __cplusplus */ - -#endif /* _STDBOOL_H */ diff --git a/src/platform/f133/include/libos/libc/stddef.h b/src/platform/f133/include/libos/libc/stddef.h deleted file mode 100644 index cfa9972dbdb58a23bf828d0efec8af03d1ea217e..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/libc/stddef.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef _STDDEF_H -#define _STDDEF_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0L -#else -#define NULL ((void*)0) -#endif -#endif - -#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER) - -#define container_of(ptr, type, member) ({ \ - const typeof( ((type *)0)->member ) *__mptr = (ptr); \ - (type *)( (char *)__mptr - offsetof(type,member) ); \ -}) - -#ifdef __cplusplus -} -#endif - -#endif /* _STDDEF_H */ diff --git a/src/platform/f133/include/libos/libc/stdint.h b/src/platform/f133/include/libos/libc/stdint.h deleted file mode 100644 index 7b71c1313887a8b4d9d99ea8db47f5978efbe575..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/libc/stdint.h +++ /dev/null @@ -1,123 +0,0 @@ -#ifndef _STDINT_H -#define _STDINT_H - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -typedef s8_t int8_t; -typedef u8_t uint8_t; - -typedef s16_t int16_t; -typedef u16_t uint16_t; - -typedef s32_t int32_t; -typedef u32_t uint32_t; - -typedef s64_t int64_t; -typedef u64_t uint64_t; - -typedef int8_t int_fast8_t; -typedef int64_t int_fast64_t; - -typedef int8_t int_least8_t; -typedef int16_t int_least16_t; -typedef int32_t int_least32_t; -typedef int64_t int_least64_t; - -typedef uint8_t uint_fast8_t; -typedef uint64_t uint_fast64_t; - -typedef uint8_t uint_least8_t; -typedef uint16_t uint_least16_t; -typedef uint32_t uint_least32_t; -typedef uint64_t uint_least64_t; - -#define INT8_MIN (-1-0x7f) -#define INT16_MIN (-1-0x7fff) -#define INT32_MIN (-1-0x7fffffff) -#define INT64_MIN (-1-0x7fffffffffffffff) - -#define INT8_MAX (0x7f) -#define INT16_MAX (0x7fff) -#define INT32_MAX (0x7fffffff) -#define INT64_MAX (0x7fffffffffffffff) - -#define UINT8_MAX (0xff) -#define UINT16_MAX (0xffff) -#define UINT32_MAX (0xffffffffu) -#define UINT64_MAX (0xffffffffffffffffu) - -#define INT_FAST8_MIN INT8_MIN -#define INT_FAST64_MIN INT64_MIN - -#define INT_LEAST8_MIN INT8_MIN -#define INT_LEAST16_MIN INT16_MIN -#define INT_LEAST32_MIN INT32_MIN -#define INT_LEAST64_MIN INT64_MIN - -#define INT_FAST8_MAX INT8_MAX -#define INT_FAST64_MAX INT64_MAX - -#define INT_LEAST8_MAX INT8_MAX -#define INT_LEAST16_MAX INT16_MAX -#define INT_LEAST32_MAX INT32_MAX -#define INT_LEAST64_MAX INT64_MAX - -#define UINT_FAST8_MAX UINT8_MAX -#define UINT_FAST64_MAX UINT64_MAX - -#define UINT_LEAST8_MAX UINT8_MAX -#define UINT_LEAST16_MAX UINT16_MAX -#define UINT_LEAST32_MAX UINT32_MAX -#define UINT_LEAST64_MAX UINT64_MAX - -#define INTMAX_MIN INT64_MIN -#define INTMAX_MAX INT64_MAX -#define UINTMAX_MAX UINT64_MAX - -#define WINT_MIN 0U -#define WINT_MAX UINT32_MAX - -#if L'\0'-1 > 0 -#define WCHAR_MAX (0xffffffffu+L'\0') -#define WCHAR_MIN (0+L'\0') -#else -#define WCHAR_MAX (0x7fffffff+L'\0') -#define WCHAR_MIN (-1-0x7fffffff+L'\0') -#endif - -#define SIG_ATOMIC_MIN INT32_MIN -#define SIG_ATOMIC_MAX INT32_MAX - -#include - -#define INT8_C(c) c -#define INT16_C(c) c -#define INT32_C(c) c - -#define UINT8_C(c) c -#define UINT16_C(c) c -#define UINT32_C(c) c ## U - -#if UINTPTR_MAX == UINT64_MAX -#define INT64_C(c) c ## L -#define UINT64_C(c) c ## UL -#define INTMAX_C(c) c ## L -#define UINTMAX_C(c) c ## UL -#else -#define INT64_C(c) c ## LL -#define UINT64_C(c) c ## ULL -#define INTMAX_C(c) c ## LL -#define UINTMAX_C(c) c ## ULL -#endif - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/libos/libc/stdio.h b/src/platform/f133/include/libos/libc/stdio.h deleted file mode 100644 index efecbf7067dca4c5122439946fd8e71f5826bb03..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/libc/stdio.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef _STDIO_H -#define _STDIO_H - -#include - -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif /* NULL */ - -#define snprintf NX_SNPrintf -#define sprintf(buf, fmt, ...) snprintf(buf, 512, fmt, ##__VA_ARGS__) - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/libos/libc/stdlib.h b/src/platform/f133/include/libos/libc/stdlib.h deleted file mode 100644 index 9c8e33805c8c578bad499014c16ca96edc70e7d8..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/libc/stdlib.h +++ /dev/null @@ -1,87 +0,0 @@ -#ifndef _STDLIB_H -#define _STDLIB_H - -#include - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0L -#else -#define NULL ((void*)0) -#endif -#endif - -/* program support utilities */ -#define EXIT_FAILURE 1 -#define EXIT_SUCCESS 0 - -#define RAND_MAX (0x7fffffff) - -int rand (void); -void srand (unsigned); - -/* memory management */ -void* malloc( size_t size ); -void *realloc( void *ptr, size_t new_size ); -void* calloc( size_t num, size_t size ); -void free( void* ptr ); - -_Noreturn void exit (int); -int atexit (void (*) (void)); -_Noreturn void abort(void); -_Noreturn void _Exit (int); - -/* Communicating with the environment */ -char *getenv (const char *); -int system (const char *); - -/* Algorithms */ -void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); -void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); - -/* Conversions to numeric formats */ -int atoi (const char *); -long atol (const char *); -long long atoll (const char *); -double atof (const char *); - -float strtof (const char *__restrict, char **__restrict); -double strtod (const char *__restrict, char **__restrict); -long double strtold (const char *__restrict, char **__restrict); - -long strtol (const char *__restrict, char **__restrict, int); -unsigned long strtoul (const char *__restrict, char **__restrict, int); -long long strtoll (const char *__restrict, char **__restrict, int); -unsigned long long strtoull (const char *__restrict, char **__restrict, int); - -int abs (int); -long labs (long); -long long llabs (long long); - -typedef struct { int quot, rem; } div_t; -typedef struct { long quot, rem; } ldiv_t; -typedef struct { long long quot, rem; } lldiv_t; - -div_t div (int, int); -ldiv_t ldiv (long, long); -lldiv_t lldiv (long long, long long); - -int mblen (const char *, size_t); -int mbtowc (wchar_t *__restrict, const char *__restrict, size_t); -int wctomb (char *, wchar_t); -size_t mbstowcs (wchar_t *__restrict, const char *__restrict, size_t); -size_t wcstombs (char *__restrict, const wchar_t *__restrict, size_t); - -hidden_sym char *__randname(char *); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/libos/libc/string.h b/src/platform/f133/include/libos/libc/string.h deleted file mode 100644 index 5867a6f1794ef75fb26a357d7683f20623128f80..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/libc/string.h +++ /dev/null @@ -1,59 +0,0 @@ -#ifndef _STRING_H -#define _STRING_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0L -#else -#define NULL ((void*)0) -#endif -#endif - -void *memcpy (void *__restrict, const void *__restrict, size_t); -void *memmove (void *, const void *, size_t); -void *memset (void *, int, size_t); -int memcmp (const void *, const void *, size_t); -void *memchr (const void *, int, size_t); - -char *strcpy (char *__restrict, const char *__restrict); -char *strncpy (char *__restrict, const char *__restrict, size_t); - -char *strcat (char *__restrict, const char *__restrict); -char *strncat (char *__restrict, const char *__restrict, size_t); - -int strcmp (const char *, const char *); -int strncmp (const char *, const char *, size_t); - -int strcoll (const char *, const char *); -size_t strxfrm (char *__restrict, const char *__restrict, size_t); - -char *strchr (const char *, int); -char *strrchr (const char *, int); - -size_t strcspn (const char *, const char *); -size_t strspn (const char *, const char *); -char *strpbrk (const char *, const char *); -char *strstr (const char *, const char *); -char *strtok (char *__restrict, const char *__restrict); - -size_t strlen (const char *); - -char *strerror (int); - -/* None-ANSI */ -size_t strnlen (const char *, size_t); - -char * strdup(const char * s); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/libos/log.h b/src/platform/f133/include/libos/log.h deleted file mode 100644 index 05af144fa52e8e39ce5f1ff232a04393ab3e08a7..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/log.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef LIBOS_LOG_H__ -#define LIBOS_LOG_H__ - -#define NX_LOG_LEVEL NX_LOG_WARNING -#include - -#define pr_err(fmt, ...) NX_LOG_E(fmt, ##__VA_ARGS__) -#define pr_warn(fmt, ...) NX_LOG_W(fmt, ##__VA_ARGS__) -#define pr_info(fmt, ...) NX_LOG_I(fmt, ##__VA_ARGS__) -#define pr_debug(fmt, ...) NX_LOG_D(fmt, ##__VA_ARGS__) - -#define __wrn(...) NX_Printf(__VA_ARGS__) -#define __inf(...) NX_Printf(__VA_ARGS__) -#define __err(...) NX_Printf(__VA_ARGS__) -#define __msg(...) NX_Printf(__VA_ARGS__) - -#ifndef printk -#define printk NX_Printf -#endif - -#include "typedef.h" - -#endif diff --git a/src/platform/f133/include/libos/misc/fb.h b/src/platform/f133/include/libos/misc/fb.h deleted file mode 100644 index 416937c66438c4181d5941024e44863845e1a7e0..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/misc/fb.h +++ /dev/null @@ -1,176 +0,0 @@ -/* - * ===================================================================================== - * - * Filename: fb.h - * - * Description: misc definition for display pixel format. - * - * Version: Melis3.0 - * Create: 2017-11-03 11:38:28 - * Revision: none - * Compiler: gcc version 6.3.0 (crosstool-NG crosstool-ng-1.23.0) - * - * Author: caozilong@allwinnertech.com - * Organization: BU1-PSW - * Last Modified: 2019-03-29 17:49:54 - * - * ===================================================================================== - */ - -#ifndef FRAMEBUFFER_H -#define FRAMEBUFFER_H -#include - -typedef enum __PIXEL_YUVFMT -{ - PIXEL_YUV444 = 0x71, - PIXEL_YUV422, - PIXEL_YUV420, - PIXEL_YUV411, - PIXEL_CSIRGB, - PIXEL_OTHERFMT, -} __pixel_yuvfmt_t; - -typedef enum __YUV_MODE -{ - YUV_MOD_INTERLEAVED = 0, - YUV_MOD_NON_MB_PLANAR, - YUV_MOD_MB_PLANAR, - YUV_MOD_UV_NON_MB_COMBINED, - YUV_MOD_UV_MB_COMBINED -} __yuv_mod_t; - -typedef enum -{ - YUV_SEQ_UYVY = 0, - YUV_SEQ_YUYV, - YUV_SEQ_VYUY, - YUV_SEQ_YVYU, - YUV_SEQ_AYUV = 0x10, - YUV_SEQ_VUYA, - YUV_SEQ_UVUV = 0x20, - YUV_SEQ_VUVU, - YUV_SEQ_OTHRS = 0xff, -} __yuv_seq_t; - - -typedef struct -{ - __u32 width; - __u32 height; -} SIZE; - -typedef enum -{ - BT601 = 0, - BT709, - YCC, - VXYCC, - MONO -} __cs_mode_t; - -typedef struct -{ - __s32 x; - __s32 y; - __u32 width; - __u32 height; -} RECT; - -typedef enum -{ - FB_TYPE_RGB = 0, - FB_TYPE_YUV = 1 -} __fb_type_t; - -typedef enum __PIXEL_RGBFMT -{ - PIXEL_MONO_1BPP = 0x51, - PIXEL_MONO_2BPP, - PIXEL_MONO_4BPP, - PIXEL_MONO_8BPP, - PIXEL_COLOR_RGB655, - PIXEL_COLOR_RGB565, - PIXEL_COLOR_RGB556, - PIXEL_COLOR_ARGB1555, - PIXEL_COLOR_RGBA5551, - PIXEL_COLOR_RGB0888, - PIXEL_COLOR_ARGB8888, -} __pixel_rgbfmt_t; - -typedef enum -{ - RGB_SEQ_ARGB = 0x00,//for 32bpp - RGB_SEQ_BRGA = 0x02, - RGB_SEQ_P10 = 0x10,//for 16bpp - RGB_SEQ_P01 = 0x11, - RGB_SEQ_P3210 = 0x20,//for 8bpp - RGB_SEQ_P0123 = 0x21, - RGB_SEQ_P76543210 = 0x30,//for 4bpp - RGB_SEQ_P67452301 = 0x31, - RGB_SEQ_P10325476 = 0x32, - RGB_SEQ_P01234567 = 0x33, - RGB_SEQ_2BPP_BIG_BIG = 0x40,//for 2bpp - RGB_SEQ_2BPP_BIG_LITTER = 0x41, - RGB_SEQ_2BPP_LITTER_BIG = 0x42, - RGB_SEQ_2BPP_LITTER_LITTER = 0x43, - RGB_SEQ_1BPP_BIG_BIG = 0x50,//for 1bpp - RGB_SEQ_1BPP_BIG_LITTER = 0x51, - RGB_SEQ_1BPP_LITTER_BIG = 0x52, - RGB_SEQ_1BPP_LITTER_LITTER = 0x53, -} __rgb_seq_t; - -typedef struct -{ - __fb_type_t type; - union - { - struct - { - __pixel_rgbfmt_t pixelfmt; - __bool br_swap; - __rgb_seq_t pixseq; - struct - { - void *addr; - __u32 size; - } palette; - } rgb; - struct - { - __pixel_yuvfmt_t pixelfmt; - __yuv_mod_t mod; - __yuv_seq_t yuvseq; - } yuv; - } fmt; - __cs_mode_t cs_mode; -} __fb_format_t; - - -typedef struct __FB -{ - SIZE size; - void *addr[3]; - __fb_format_t fmt; -} FB; - -typedef struct -{ - __u8 alpha; - __u8 red; - __u8 green; - __u8 blue; -} COLOR; /* 32-bit (ARGB) color */ - -typedef struct -{ - __s32 x; - __s32 y; -} OFFSET; /* coordinate (x, y) */ - -typedef COLOR __color_t; -typedef RECT __rect_t; -typedef OFFSET __pos_t; -typedef SIZE __rectsz_t; - -#endif /*FRAMEBUFFER_H*/ diff --git a/src/platform/f133/include/libos/misc/logo.h b/src/platform/f133/include/libos/misc/logo.h deleted file mode 100644 index c4d1d2f46b38e42fe91b8de284931b8a3e49cfba..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/misc/logo.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * ===================================================================================== - * - * Filename: logo.h - * - * Description: For show bootup stage logo. - * - * Version: 2.0 - * Create: 2017-11-03 11:35:27 - * Revision: none - * Compiler: gcc version 6.3.0 (crosstool-NG crosstool-ng-1.23.0) - * - * Author: caozilong@allwinnertech.com - * Organization: BU1-PSW - * Last Modified: 2017-11-03 11:38:15 - * - * ===================================================================================== - */ - -#ifndef LOGO_H -#define LOGO_H - -/* ----------------------------------------------------------------------------*/ -/** @brief release_logo_buf */ -/* ----------------------------------------------------------------------------*/ -void release_logo_buf(void); - -/* ----------------------------------------------------------------------------*/ -/** @brief show_logo */ -/* ----------------------------------------------------------------------------*/ -void show_logo(void); - -/* ----------------------------------------------------------------------------*/ -/** @brief close_logo */ -/* ----------------------------------------------------------------------------*/ -void close_logo(void); - -/* ----------------------------------------------------------------------------*/ -/** @brief show_cvbs */ -/* ----------------------------------------------------------------------------*/ -void show_cvbs(void); - -#endif /*LOGO_H*/ diff --git a/src/platform/f133/include/libos/misc/support.h b/src/platform/f133/include/libos/misc/support.h deleted file mode 100644 index 7b77cc9a262bea1a4ba2ddbfb12f625409a369fa..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/misc/support.h +++ /dev/null @@ -1,272 +0,0 @@ -/* - * ===================================================================================== - * - * Filename: support.h - * - * Description: misc utilities definition. - * - * Version: 2.0 - * Create: 2017-11-03 11:34:34 - * Revision: none - * Compiler: gcc version 6.3.0 (crosstool-NG crosstool-ng-1.23.0) - * - * Author: caozilong@allwinnertech.com - * Organization: BU1-PSW - * Last Modified: 2020-03-25 12:20:13 - * - * ===================================================================================== - */ - -#ifndef __SUPPORT_H__ -#define __SUPPORT_H__ -#include -#include -#include - -/* - * Generic macro to convert pointers to values for comparison purposes. - */ -#ifndef p2n -#define p2n(p) ((ptrdiff_t)((ptrdiff_t*)(p))) -#endif - -/* - * min()/max() macros that also do - * strict type-checking.. See the - * "unnecessary" pointer comparison. - */ -#ifndef min -#define min(x,y) ({ \ - typeof(x) _x = (x); \ - typeof(y) _y = (y); \ - (void) (&_x == &_y); \ - _x < _y ? _x : _y; }) -#endif - -#ifndef max -#define max(x,y) ({ \ - typeof(x) _x = (x); \ - typeof(y) _y = (y); \ - (void) (&_x == &_y); \ - _x > _y ? _x : _y; }) -#endif - -/* - * ..and if you can't take the strict - * types, you can specify one yourself. - * - * Or not use min/max at all, of course. - */ -#define min_t(type,x,y) \ - ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; }) -#define max_t(type,x,y) \ - ({ type __x = (x); type __y = (y); __x > __y ? __x: __y; }) - - -//#define BITS_PER_LONG 32 -//#define BITS_PER_LONG_LONG 64 - -#ifndef ALIGN -#define ALIGN(val,align) (((val) + ((align) - 1)) & ~((align) - 1)) -#endif -#define LONG_ALIGN(x) (((x)+(sizeof(long))-1)&~((sizeof(long))-1)) -#ifndef INT_MAX -#define INT_MAX ((int)(~0U>>1)) -#endif -#ifndef INT_MIN -#define INT_MIN (-INT_MAX - 1) -#endif -#ifndef UINT_MAX -#define UINT_MAX (~0U) -#endif -#ifndef LONG_MAX -#define LONG_MAX ((long)(~0UL>>1)) -#endif -#ifndef LONG_MIN -#define LONG_MIN (-LONG_MAX - 1) -#endif -#ifndef ULONG_MAX -#define ULONG_MAX (~0UL) -#endif -#ifndef LLONG_MAX -#define LLONG_MAX ((long long)(~0ULL>>1)) -#endif -#ifndef LLONG_MIN -#define LLONG_MIN (-LLONG_MAX - 1) -#endif -#ifndef ULLONG_MAX -#define ULLONG_MAX (~0ULL) -#endif - -#ifndef DATA_TYPE_X_BOOL -#define DATA_TYPE_X_BOOL -typedef enum -{ -#ifndef FALSE - FALSE = 0, -#endif -#ifndef NO - NO = 0, -#endif -#ifndef ZERO - ZERO = 0, -#endif -#ifndef TRUE - TRUE = 1, -#endif -#ifndef YES - YES = 1, -#endif -#ifndef ONE - ONE = 1, -#endif -#ifndef OK - OK = 0, -#endif -#ifndef FAIL - FAIL = -1, -#endif -} BOOL; -#endif -/* - * Check at compile time that something is of a particular type. - * Always evaluates to 1 so you may use it easily in comparisons. - */ -#define typecheck(type,x) \ - ({ type __dummy; \ - typeof(x) __dummy2; \ - (void)(&__dummy == &__dummy2); \ - 1; \ - }) - -static inline int is_power_of_2(unsigned long n) -{ - return (n != 0 && ((n & (n - 1)) == 0)); -} - -/* round "x" up/down to next multiple of "align" (which must be a power of 2) */ -#define ROUND_UP(x, align) \ - (((unsigned long)(x) + ((unsigned long)(align) - 1)) & \ - ~((unsigned long)(align) - 1)) -#define ROUND_DOWN(x, align) \ - ((unsigned long)(x) & ~((unsigned long)(align) - 1)) - -//#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) - -/** - * test_bit - Determine whether a bit is set - * @nr: bit number to test - * @addr: Address to start counting from - */ -static inline int test_bit(int nr, long *addr) -{ - int mask; - addr += nr >> 5; - mask = 1 << (nr & 0x1f); - return ((mask & *addr) != 0); -} - -/* - * These functions are the basis of our bit ops. - * - * First, the atomic bitops. These use native endian. - */ -static inline void set_bit(unsigned int bit, volatile unsigned long *p) -{ - unsigned long flags; - unsigned long mask = 1UL << (bit & 31); - p += bit >> 5; - ENTER_CRITICAL(flags); - *p |= mask; - EXIT_CRITICAL(flags); -} - -static inline void clear_bit(unsigned int bit, volatile unsigned long *p) -{ - unsigned long flags; - unsigned long mask = 1UL << (bit & 31); - p += bit >> 5; - ENTER_CRITICAL(flags); - *p &= ~mask; - EXIT_CRITICAL(flags); -} - -static inline void change_bit(unsigned int bit, volatile unsigned long *p) -{ - unsigned long flags; - unsigned long mask = 1UL << (bit & 31); - p += bit >> 5; - ENTER_CRITICAL(flags); - *p ^= mask; - EXIT_CRITICAL(flags); -} - -static inline int test_and_set_bit(unsigned int bit, volatile unsigned long *p) -{ - unsigned long flags; - unsigned int res; - unsigned long mask = 1UL << (bit & 31); - p += bit >> 5; - ENTER_CRITICAL(flags); - res = *p; - *p = res | mask; - EXIT_CRITICAL(flags); - return res & mask; -} - -static inline int test_and_clear_bit(unsigned int bit, volatile unsigned long *p) -{ - unsigned long flags; - unsigned int res; - unsigned long mask = 1UL << (bit & 31); - p += bit >> 5; - ENTER_CRITICAL(flags); - res = *p; - *p = res & ~mask; - EXIT_CRITICAL(flags); - return res & mask; -} - -static inline int test_and_change_bit(unsigned int bit, volatile unsigned long *p) -{ - unsigned long flags; - unsigned int res; - unsigned long mask = 1UL << (bit & 31); - p += bit >> 5; - ENTER_CRITICAL(flags); - res = *p; - *p = res ^ mask; - EXIT_CRITICAL(flags); - return res & mask; -} - -/* -------------------------------- jiffies -----------------------------*/ -#define HZ 100 -#define jiffies ((unsigned long)rt_tick_get()) - -/* - * These inlines deal with timer wrapping correctly. You are - * strongly encouraged to use them - * 1. Because people otherwise forget - * 2. Because if the timer wrap changes in future you won't have to - * alter your driver code. - * - * time_after(a,b) returns true if the time a is after time b. - * - * Do this with "<0" and ">=0" to only test the sign of the result. A - * good compiler would generate better code (and a really good compiler - * wouldn't care). Gcc is currently neither. - */ -#define time_after(a,b) \ - (typecheck(unsigned long, a) && \ - typecheck(unsigned long, b) && \ - ((int)(b) - (int)(a) < 0)) -#define time_before(a,b) time_after(b,a) - -#define time_after_eq(a,b) \ - (typecheck(unsigned long, a) && \ - typecheck(unsigned long, b) && \ - ((int)(a) - (int)(b) >= 0)) -#define time_before_eq(a,b) time_after_eq(b,a) - -#endif /* __SUPPORT_H__ */ diff --git a/src/platform/f133/include/libos/os.h b/src/platform/f133/include/libos/os.h deleted file mode 100644 index 3ce7bde151f3c86757768153528541d971640c75..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/os.h +++ /dev/null @@ -1,18 +0,0 @@ -#ifndef LIBOS_OS_H__ -#define LIBOS_OS_H__ - -#include -#include -#include - -#define isb() NX_MemoryBarrierInstruction() -#define dsb(v) NX_MemoryBarrierWrite() - -#define ENTER_CRITICAL(flag) (flag) = NX_IRQ_SaveLevel() -#define EXIT_CRITICAL(flag) NX_IRQ_RestoreLevel(flag) - -int32_t esCFG_GetKeyValue(char *SecName, char *KeyName, int32_t Value[], int32_t Count); -int32_t esCFG_GetGPIOSecKeyCount(char *GPIOSecName); -int32_t esCFG_GetGPIOSecData(char *GPIOSecName, void *pGPIOCfg, int32_t GPIONum); - -#endif diff --git a/src/platform/f133/include/libos/script.h b/src/platform/f133/include/libos/script.h deleted file mode 100644 index 93138631c139de3d309396bbde098758f7a7e19d..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/script.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifndef SCRIPT_H__ -#define SCRIPT_H__ - - -#endif diff --git a/src/platform/f133/include/libos/string.h b/src/platform/f133/include/libos/string.h deleted file mode 100644 index 5867a6f1794ef75fb26a357d7683f20623128f80..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/string.h +++ /dev/null @@ -1,59 +0,0 @@ -#ifndef _STRING_H -#define _STRING_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0L -#else -#define NULL ((void*)0) -#endif -#endif - -void *memcpy (void *__restrict, const void *__restrict, size_t); -void *memmove (void *, const void *, size_t); -void *memset (void *, int, size_t); -int memcmp (const void *, const void *, size_t); -void *memchr (const void *, int, size_t); - -char *strcpy (char *__restrict, const char *__restrict); -char *strncpy (char *__restrict, const char *__restrict, size_t); - -char *strcat (char *__restrict, const char *__restrict); -char *strncat (char *__restrict, const char *__restrict, size_t); - -int strcmp (const char *, const char *); -int strncmp (const char *, const char *, size_t); - -int strcoll (const char *, const char *); -size_t strxfrm (char *__restrict, const char *__restrict, size_t); - -char *strchr (const char *, int); -char *strrchr (const char *, int); - -size_t strcspn (const char *, const char *); -size_t strspn (const char *, const char *); -char *strpbrk (const char *, const char *); -char *strstr (const char *, const char *); -char *strtok (char *__restrict, const char *__restrict); - -size_t strlen (const char *); - -char *strerror (int); - -/* None-ANSI */ -size_t strnlen (const char *, size_t); - -char * strdup(const char * s); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/libos/typedef.h b/src/platform/f133/include/libos/typedef.h deleted file mode 100644 index 396dd01d44f58b44b4fd303ebc183a3d93636b9d..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/typedef.h +++ /dev/null @@ -1,89 +0,0 @@ -#ifndef TYPEDEF_H__ -#define TYPEDEF_H__ - -#include -#include "os.h" - -typedef int8_t __s8; -typedef int8_t s8; -typedef uint8_t __u8; -typedef uint8_t u8; - -typedef int16_t __s16; -typedef int16_t s16; -typedef uint16_t __u16; -typedef uint16_t u16; - -typedef uint32_t __u32; -typedef uint32_t u32; -typedef int32_t __s32; -typedef int32_t s32; - -typedef int64_t __s64; -typedef int64_t s64; -typedef uint64_t __u64; -typedef uint64_t u64; - -#define __packed __attribute__((packed)) -#define __aligned(x) __attribute__((__aligned__(x))) - -#ifndef EPDK_OK -#define EPDK_OK 0 -#endif - -#ifndef EPDK_FAIL -#define EPDK_FAIL (-1) -#endif - -#ifndef EPDK_TRUE -#define EPDK_TRUE 1 -#endif - -#ifndef EPDK_FALSE -#define EPDK_FALSE 0 -#endif - -#ifndef EPDK_DISABLED -#define EPDK_DISABLED 0 -#endif - -#ifndef EPDK_ENABLED -#define EPDK_ENABLED 1 -#endif - -#ifndef EPDK_NO -#define EPDK_NO 0 -#endif - -#ifndef EPDK_YES -#define EPDK_YES 1 -#endif - -#ifndef EPDK_OFF -#define EPDK_OFF 0 -#endif - -#ifndef EPDK_ON -#define EPDK_ON 1 -#endif - -#ifndef EPDK_CLR -#define EPDK_CLR 0 -#endif - -#ifndef EPDK_SET -#define EPDK_SET 1 -#endif - -typedef struct -{ - char gpio_name[32]; - int port; - int port_num; - int mul_sel; - int pull; - int drv_level; - int data; -} user_gpio_set_t; - -#endif diff --git a/src/platform/f133/include/libos/video/sunxi_display2.h b/src/platform/f133/include/libos/video/sunxi_display2.h deleted file mode 100644 index a9e11348b7ff4b7d53636fd1f7b3e6cb13eaee68..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/video/sunxi_display2.h +++ /dev/null @@ -1,971 +0,0 @@ -/* - * Allwinner SoCs display driver. - * - * Copyright (C) 2016 Allwinner. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __SUNXI_DISPLAY2_H__ -#define __SUNXI_DISPLAY2_H__ -#include -#include - -struct disp_manager; -struct disp_device; -struct disp_smbl; -struct disp_enhance; -struct disp_capture; - -struct disp_color { - unsigned char alpha; - unsigned char red; - unsigned char green; - unsigned char blue; -}; - -struct disp_rect { - int x; - int y; - unsigned int width; - unsigned int height; -}; - -struct disp_rectsz { - unsigned int width; - unsigned int height; -}; - -struct disp_position { - int x; - int y; -}; - -typedef enum disp_pixel_format { - DISP_FORMAT_ARGB_8888 = 0x00, /* MSB A-R-G-B LSB */ - DISP_FORMAT_ABGR_8888 = 0x01, - DISP_FORMAT_RGBA_8888 = 0x02, - DISP_FORMAT_BGRA_8888 = 0x03, - DISP_FORMAT_XRGB_8888 = 0x04, - DISP_FORMAT_XBGR_8888 = 0x05, - DISP_FORMAT_RGBX_8888 = 0x06, - DISP_FORMAT_BGRX_8888 = 0x07, - DISP_FORMAT_RGB_888 = 0x08, - DISP_FORMAT_BGR_888 = 0x09, - DISP_FORMAT_RGB_565 = 0x0a, - DISP_FORMAT_BGR_565 = 0x0b, - DISP_FORMAT_ARGB_4444 = 0x0c, - DISP_FORMAT_ABGR_4444 = 0x0d, - DISP_FORMAT_RGBA_4444 = 0x0e, - DISP_FORMAT_BGRA_4444 = 0x0f, - DISP_FORMAT_ARGB_1555 = 0x10, - DISP_FORMAT_ABGR_1555 = 0x11, - DISP_FORMAT_RGBA_5551 = 0x12, - DISP_FORMAT_BGRA_5551 = 0x13, - DISP_FORMAT_A2R10G10B10 = 0x14, - DISP_FORMAT_A2B10G10R10 = 0x15, - DISP_FORMAT_R10G10B10A2 = 0x16, - DISP_FORMAT_B10G10R10A2 = 0x17, - DISP_FORMAT_1bpp_palette_LE = 0x18, - DISP_FORMAT_2bpp_palette_LE = 0x19, - DISP_FORMAT_4bpp_palette_LE = 0x1a, - DISP_FORMAT_8bpp_palette_LE = 0x1b, - /* - * SP: semi-planar - * P:planar - * I:interleaved - * UVUV: U in the LSBs; - * VUVU: V in the LSBs - */ - DISP_FORMAT_YUV444_I_AYUV = 0x40, /* MSB A-Y-U-V LSB */ - DISP_FORMAT_YUV444_I_VUYA = 0x41, /* MSB V-U-Y-A LSB */ - DISP_FORMAT_YUV422_I_YVYU = 0x42, /* MSB Y-V-Y-U LSB */ - DISP_FORMAT_YUV422_I_YUYV = 0x43, /* MSB Y-U-Y-V LSB */ - DISP_FORMAT_YUV422_I_UYVY = 0x44, /* MSB U-Y-V-Y LSB */ - DISP_FORMAT_YUV422_I_VYUY = 0x45, /* MSB V-Y-U-Y LSB */ - DISP_FORMAT_YUV444_P = 0x46, /* MSB P3-2-1-0 LSB, YYYY UUUU VVVV */ - DISP_FORMAT_YUV422_P = 0x47, /* MSB P3-2-1-0 LSB YYYY UU VV */ - DISP_FORMAT_YUV420_P = 0x48, /* MSB P3-2-1-0 LSB YYYY U V (yu12)*/ - DISP_FORMAT_YUV411_P = 0x49, /* MSB P3-2-1-0 LSB YYYY U V */ - DISP_FORMAT_YUV422_SP_UVUV = 0x4a, /* MSB V-U-V-U LSB */ - DISP_FORMAT_YUV422_SP_VUVU = 0x4b, /* MSB U-V-U-V LSB */ - DISP_FORMAT_YUV420_SP_UVUV = 0x4c, - DISP_FORMAT_YUV420_SP_VUVU = 0x4d, - DISP_FORMAT_YUV411_SP_UVUV = 0x4e, - DISP_FORMAT_YUV411_SP_VUVU = 0x4f, - DISP_FORMAT_8BIT_GRAY = 0x50, - DISP_FORMAT_YUV444_I_AYUV_10BIT = 0x51, - DISP_FORMAT_YUV444_I_VUYA_10BIT = 0x52, - DISP_FORMAT_YUV422_I_YVYU_10BIT = 0x53, - DISP_FORMAT_YUV422_I_YUYV_10BIT = 0x54, - DISP_FORMAT_YUV422_I_UYVY_10BIT = 0x55, - DISP_FORMAT_YUV422_I_VYUY_10BIT = 0x56, - DISP_FORMAT_YUV444_P_10BIT = 0x57, - DISP_FORMAT_YUV422_P_10BIT = 0x58, - DISP_FORMAT_YUV420_P_10BIT = 0x59, - DISP_FORMAT_YUV411_P_10BIT = 0x5a, - DISP_FORMAT_YUV422_SP_UVUV_10BIT = 0x5b, - DISP_FORMAT_YUV422_SP_VUVU_10BIT = 0x5c, - DISP_FORMAT_YUV420_SP_UVUV_10BIT = 0x5d, - DISP_FORMAT_YUV420_SP_VUVU_10BIT = 0x5e, - DISP_FORMAT_YUV411_SP_UVUV_10BIT = 0x5f, - DISP_FORMAT_YUV411_SP_VUVU_10BIT = 0x60, - DISP_FORMAT_YUV420_P_YV12 = 0x61, /* MSB P3-2-1-0 LSB YYYY V U DISP_FORMAT_YUV420_P */ - DISP_FORMAT_YUV420_P_YU12 = 0x62, /* MSB P3-2-1-0 LSB YYYY U V DISP_FORMAT_YUV420_P*/ - - DISP_FORMAT_CSIRGB, - DISP_UNKNOWN_VALUE, - DISP_FORMAT_MAX, -}__disp_pixel_fmt_t; - -enum disp_3d_out_mode { - DISP_3D_OUT_MODE_CI_1 = 0x5, /* column interlaved 1 */ - DISP_3D_OUT_MODE_CI_2 = 0x6, /* column interlaved 2 */ - DISP_3D_OUT_MODE_CI_3 = 0x7, /* column interlaved 3 */ - DISP_3D_OUT_MODE_CI_4 = 0x8, /* column interlaved 4 */ - DISP_3D_OUT_MODE_LIRGB = 0x9, /* line interleaved rgb */ - - DISP_3D_OUT_MODE_TB = 0x0, /* top bottom */ - DISP_3D_OUT_MODE_FP = 0x1, /* frame packing */ - DISP_3D_OUT_MODE_SSF = 0x2, /* side by side full */ - DISP_3D_OUT_MODE_SSH = 0x3, /* side by side half */ - DISP_3D_OUT_MODE_LI = 0x4, /* line interleaved */ - DISP_3D_OUT_MODE_FA = 0xa, /* field alternative */ -}; - -enum disp_color_space { - DISP_UNDEF = 0x00, - DISP_UNDEF_F = 0x01, - DISP_GBR = 0x100, - DISP_BT709 = 0x101, - DISP_FCC = 0x102, - DISP_BT470BG = 0x103, - DISP_BT601 = 0x104, - DISP_SMPTE240M = 0x105, - DISP_YCGCO = 0x106, - DISP_BT2020NC = 0x107, - DISP_BT2020C = 0x108, - DISP_GBR_F = 0x200, - DISP_BT709_F = 0x201, - DISP_FCC_F = 0x202, - DISP_BT470BG_F = 0x203, - DISP_BT601_F = 0x204, - DISP_SMPTE240M_F = 0x205, - DISP_YCGCO_F = 0x206, - DISP_BT2020NC_F = 0x207, - DISP_BT2020C_F = 0x208, - DISP_RESERVED = 0x300, - DISP_RESERVED_F = 0x301, -}; - -typedef enum disp_color_space __disp_cs_mode_t; - -enum disp_csc_type { - DISP_CSC_TYPE_RGB = 0, - DISP_CSC_TYPE_YUV444 = 1, - DISP_CSC_TYPE_YUV422 = 2, - DISP_CSC_TYPE_YUV420 = 3, -}; - -enum disp_data_bits { - DISP_DATA_8BITS = 0, - DISP_DATA_10BITS = 1, - DISP_DATA_12BITS = 2, - DISP_DATA_16BITS = 3, -}; -enum disp_dvi_hdmi { - DISP_DVI_HDMI_UNDEFINED = 0, - DISP_DVI = 1, - DISP_HDMI = 2, -}; -enum disp_scan_info { - DISP_SCANINFO_NO_DATA = 0, - OVERSCAN = 1, - UNDERSCAN = 2, -}; -enum disp_color_range { - DISP_COLOR_RANGE_DEFAULT = 0, /*default*/ - DISP_COLOR_RANGE_0_255 = 1, - DISP_COLOR_RANGE_16_235 = 2, -}; - -enum disp_output_type { - DISP_OUTPUT_TYPE_NONE = 0, - DISP_OUTPUT_TYPE_LCD = 1, - DISP_OUTPUT_TYPE_TV = 2, - DISP_OUTPUT_TYPE_HDMI = 4, - DISP_OUTPUT_TYPE_VGA = 8, - DISP_OUTPUT_TYPE_VDPO = 16, - DISP_OUTPUT_TYPE_EDP = 32, /*16 for vdpo*/ -}; - -enum disp_tv_mode { - DISP_TV_MOD_480I = 0, - DISP_TV_MOD_576I = 1, - DISP_TV_MOD_480P = 2, - DISP_TV_MOD_576P = 3, - DISP_TV_MOD_720P_50HZ = 4, - DISP_TV_MOD_720P_60HZ = 5, - DISP_TV_MOD_1080I_50HZ = 6, - DISP_TV_MOD_1080I_60HZ = 7, - DISP_TV_MOD_1080P_24HZ = 8, - DISP_TV_MOD_1080P_50HZ = 9, - DISP_TV_MOD_1080P_60HZ = 0xa, - DISP_TV_MOD_1080P_24HZ_3D_FP = 0x17, - DISP_TV_MOD_720P_50HZ_3D_FP = 0x18, - DISP_TV_MOD_720P_60HZ_3D_FP = 0x19, - DISP_TV_MOD_1080P_25HZ = 0x1a, - DISP_TV_MOD_1080P_30HZ = 0x1b, - DISP_TV_MOD_PAL = 0xb, - DISP_TV_MOD_PAL_SVIDEO = 0xc, - DISP_TV_MOD_NTSC = 0xe, - DISP_TV_MOD_NTSC_SVIDEO = 0xf, - DISP_TV_MOD_PAL_M = 0x11, - DISP_TV_MOD_PAL_M_SVIDEO = 0x12, - DISP_TV_MOD_PAL_NC = 0x14, - DISP_TV_MOD_PAL_NC_SVIDEO = 0x15, - DISP_TV_MOD_3840_2160P_30HZ = 0x1c, - DISP_TV_MOD_3840_2160P_25HZ = 0x1d, - DISP_TV_MOD_3840_2160P_24HZ = 0x1e, - DISP_TV_MOD_4096_2160P_24HZ = 0x1f, - DISP_TV_MOD_4096_2160P_25HZ = 0x20, - DISP_TV_MOD_4096_2160P_30HZ = 0x21, - DISP_TV_MOD_3840_2160P_60HZ = 0x22, - DISP_TV_MOD_4096_2160P_60HZ = 0x23, - DISP_TV_MOD_3840_2160P_50HZ = 0x24, - DISP_TV_MOD_4096_2160P_50HZ = 0x25, - DISP_TV_MOD_2560_1440P_60HZ = 0x26, - DISP_TV_MOD_1440_2560P_70HZ = 0x27, - DISP_TV_MOD_1080_1920P_60HZ = 0x28, - DISP_TV_MOD_1280_1024P_60HZ = 0x41, - DISP_TV_MOD_1024_768P_60HZ = 0x42, - DISP_TV_MOD_900_540P_60HZ = 0x43, - DISP_TV_MOD_1920_720P_60HZ = 0x44, - /* vga */ - DISP_VGA_MOD_640_480P_60 = 0x50, - DISP_VGA_MOD_800_600P_60 = 0x51, - DISP_VGA_MOD_1024_768P_60 = 0x52, - DISP_VGA_MOD_1280_768P_60 = 0x53, - DISP_VGA_MOD_1280_800P_60 = 0x54, - DISP_VGA_MOD_1366_768P_60 = 0x55, - DISP_VGA_MOD_1440_900P_60 = 0x56, - DISP_VGA_MOD_1920_1080P_60 = 0x57, - DISP_VGA_MOD_1920_1200P_60 = 0x58, - DISP_TV_MOD_3840_1080P_30 = 0x59, - DISP_VGA_MOD_1280_720P_60 = 0x5a, - DISP_VGA_MOD_1600_900P_60 = 0x5b, - DISP_VGA_MOD_MAX_NUM = 0x5c, - DISP_TV_MODE_NUM, -}; - -enum disp_exit_mode { - DISP_EXIT_MODE_CLEAN_ALL = 0, - DISP_EXIT_MODE_CLEAN_PARTLY = 1, /* only clean interrupt temply */ -}; - -enum disp_buffer_flags { - DISP_BF_NORMAL = 0, /* non-stereo */ - DISP_BF_STEREO_TB = 1 << 0, /* stereo top-bottom */ - DISP_BF_STEREO_FP = 1 << 1, /* stereo frame packing */ - DISP_BF_STEREO_SSH = 1 << 2, /* stereo side by side half */ - DISP_BF_STEREO_SSF = 1 << 3, /* stereo side by side full */ - DISP_BF_STEREO_LI = 1 << 4, /* stereo line interlace */ - /* - * 2d plus depth to convert into 3d, - * left and right image using the same frame buffer - */ - DISP_BF_STEREO_2D_DEPTH = 1 << 5, -}; - -enum disp_layer_mode { - LAYER_MODE_BUFFER = 0, - LAYER_MODE_COLOR = 1, -}; - -enum disp_scan_flags { - DISP_SCAN_PROGRESSIVE = 0, - DISP_SCAN_INTERLACED_ODD_FLD_FIRST = 1 << 0, - DISP_SCAN_INTERLACED_EVEN_FLD_FIRST = 1 << 1, -}; - -enum disp_eotf { - DISP_EOTF_RESERVED = 0x000, - DISP_EOTF_BT709 = 0x001, - DISP_EOTF_UNDEF = 0x002, - DISP_EOTF_GAMMA22 = 0x004, /* SDR */ - DISP_EOTF_GAMMA28 = 0x005, - DISP_EOTF_BT601 = 0x006, - DISP_EOTF_SMPTE240M = 0x007, - DISP_EOTF_LINEAR = 0x008, - DISP_EOTF_LOG100 = 0x009, - DISP_EOTF_LOG100S10 = 0x00a, - DISP_EOTF_IEC61966_2_4 = 0x00b, - DISP_EOTF_BT1361 = 0x00c, - DISP_EOTF_IEC61966_2_1 = 0X00d, - DISP_EOTF_BT2020_0 = 0x00e, - DISP_EOTF_BT2020_1 = 0x00f, - DISP_EOTF_SMPTE2084 = 0x010, /* HDR10 */ - DISP_EOTF_SMPTE428_1 = 0x011, - DISP_EOTF_ARIB_STD_B67 = 0x012, /* HLG */ -}; -/* disp_atw_mode - mode for asynchronous time warp - * - * @NORMAL_MODE: dual buffer, left eye and right eye buffer is individual - * @LEFT_RIGHT_MODE: single buffer, the left half of each line buffer - * is for left eye, the right half is for the right eye - * @UP_DOWN_MODE: single buffer, the first half of the total buffer - * is for the left eye, the second half is for the right eye - */ -enum disp_atw_mode { - NORMAL_MODE, - LEFT_RIGHT_MODE, - UP_DOWN_MODE, -}; -struct disp_output { - unsigned int type; - unsigned int mode; -}; - -struct disp_rect64 { - long long x; - long long y; - long long width; - long long height; -}; - -struct disp_lbc_info { - unsigned int is_lossy; - unsigned int rc_en; - unsigned int pitch; - unsigned int seg_bit; -}; -struct disp_fb_info { - /* address of frame buffer, - * single addr for interleaved fomart, - * double addr for semi-planar fomart - * triple addr for planar format - */ - unsigned long long addr[3]; - struct disp_rectsz size[3]; - /* align for 3 comonent,unit: bytes */ - unsigned int align[3]; - enum disp_pixel_format format; - enum disp_color_space color_space; /* color space */ - unsigned int trd_right_addr[3]; /* right address of 3d fb */ - bool pre_multiply; /* true: pre-multiply fb */ - struct disp_rect64 crop; /* crop rectangle boundaries */ - enum disp_buffer_flags flags; - enum disp_scan_flags scan; - unsigned int lbc_en; - struct disp_lbc_info lbc_info; -}; - -struct disp_layer_info { - enum disp_layer_mode mode; - unsigned char zorder; - /* 0: pixel alpha; 1: global alpha; 2: global pixel alpha */ - unsigned char alpha_mode; - unsigned char alpha_value; /* global alpha value */ - struct disp_rect screen_win; /* display window on the screen */ - bool b_trd_out; /* 3d display */ - enum disp_3d_out_mode out_trd_mode; /* 3d display mode */ - union { - unsigned int color; /* valid when LAYER_MODE_COLOR */ - struct disp_fb_info fb; /* valid when LAYER_MODE_BUFFER */ - }; - - unsigned int id; /* frame id, the id of frame display currently */ -}; - -struct disp_layer_config { - struct disp_layer_info info; - bool enable; - unsigned int channel; - unsigned int layer_id; -}; - -/* disp_atw_info - asynchronous time wrap infomation - * - * @used: indicate if the atw funtion is used - * @mode: atw mode - * @b_row: the row number of the micro block - * @b_col: the column number of the micro block - * @cof_fd: dma_buf fd for the buffer contaied coefficient for atw - */ -struct disp_atw_info { - bool used; - enum disp_atw_mode mode; - unsigned int b_row; - unsigned int b_col; - int cof_fd; -}; -/** - * disp_vdpo_config - */ -struct disp_vdpo_config { - unsigned int data_seq_sel; - unsigned int dclk_invt; - unsigned int dclk_dly_num; - unsigned int spl_type_u; - unsigned int spl_type_v; -}; -/* disp_fb_info2 - image buffer info v2 - * - * @fd: dma_buf fd for frame buffer - * @size: size for each buffer, unit:pixels - * @align: align for each buffer, unit:bytes - * @format: pixel format - * @color_space: color space - * @trd_right_fd: dma_buf fd for the right-eye frame buffer, - * valid when frame-packing 3d buffer input - * @pre_multiply: indicate the pixel use premultiplied alpha - * @crop: crop rectangle for buffer to be display - * @flag: indicate stereo/non-stereo buffer - * @scan: indicate interleave/progressive scan type, and the scan order - * @depth: depth perception for stereo image, only valid when stereo image input - * unit: pixel - * @fbd_en: indicate if enable fbd function - * @lbc_en: indicate if enable lbc function - * @metadata_fd: dma_buf fd for the buffer contained metadata for fbc/hdr - * @metadata_size: the size of metadata buffer, unit:bytes - * @metadata_flag: the flag to indicate the type of metadata buffer - * 0 : no metadata - * 1 << 0: hdr static metadata - * 1 << 1: hdr dynamic metadata - * 1 << 4: frame buffer compress(fbc) metadata - * x : all type could be "or" together - */ -struct disp_fb_info2 { - int fd; - struct disp_rectsz size[3]; - unsigned int align[3]; - enum disp_pixel_format format; - enum disp_color_space color_space; - int trd_right_fd; - bool pre_multiply; - struct disp_rect64 crop; - enum disp_buffer_flags flags; - enum disp_scan_flags scan; - enum disp_eotf eotf; - int depth; - unsigned int fbd_en; - unsigned int lbc_en; - struct disp_lbc_info lbc_info; - int metadata_fd; - unsigned int metadata_size; - unsigned int metadata_flag; -}; - -/* disp_layer_info2 - layer info v2 - * - * @mode: buffer/clolor mode, when in color mode, the layer is widthout buffer - * @zorder: the zorder of layer, 0~max-layer-number - * @alpha_mode: - * 0: pixel alpha; - * 1: global alpha - * 2: mixed alpha, compositing width pixel alpha before global alpha - * @alpha_value: global alpha value, valid when alpha_mode is not pixel alpha - * @screen_win: the rectangle on the screen for fb to be display - * @b_trd_out: indicate if 3d display output - * @out_trd_mode: 3d output mode, valid when b_trd_out is true - * @color: the color value to be display, valid when layer is in color mode - * @fb: the framebuffer info related width the layer, valid when in buffer mode - * @id: frame id, the user could get the frame-id display currently by - * DISP_LAYER_GET_FRAME_ID ioctl - * @atw: asynchronous time wrap information - */ -struct disp_layer_info2 { - enum disp_layer_mode mode; - unsigned char zorder; - unsigned char alpha_mode; - unsigned char alpha_value; - struct disp_rect screen_win; - bool b_trd_out; - enum disp_3d_out_mode out_trd_mode; - union { - unsigned int color; - struct disp_fb_info2 fb; - }; - - unsigned int id; - struct disp_atw_info atw; -}; - -/* disp_layer_config2 - layer config v2 - * - * @info: layer info - * @enable: indicate to enable/disable the layer - * @channel: the channel index of the layer, 0~max-channel-number - * @layer_id: the layer index of the layer widthin it's channel - */ -struct disp_layer_config2 { - struct disp_layer_info2 info; - bool enable; - unsigned int channel; - unsigned int layer_id; -}; -/* disp_palette_config - palette config - * - * @num: the num of palette - * @data: the palette data, each palette data takes 4 bytes,show as below - * bits description - * 31:24 alpha value - * 23:16 red value - * 15:8 green value - * 7:0 blue value - * @channel: the channel index of the layer, 0~max-channel-number - */ -struct disp_palette_config { - unsigned int num; - void *data; - unsigned int channel; -}; -/** - * match rule: 0/1:always match; - * 2:match if min<=color<=max; - * 3:match if color>max or color= 720P) - * DISP_BT2020NC: HDR10 or HLG or wide-color-gamut - * @dvi_hdmi: output mode - * DVI: DISP_DVI - * HDMI: DISP_HDMI - * @range: RGB/YUV quantization range - * DEFUALT: limited range when sending a CE video format - * full range when sending an IT video format - * LIMITED: color limited range from 16 to 235 - * FULL: color full range from 0 to 255 - * @scan info: - * DISP_SCANINFO_NO_DATA: overscan if it is a CE format, - * underscan if it is an IT format - * OVERSCAN: composed for overscan display - * UNDERSCAN: composed for underscan display - * @aspect_ratio: active format aspect ratio - */ -struct disp_device_config { - enum disp_output_type type; - enum disp_tv_mode mode; - enum disp_csc_type format; - enum disp_data_bits bits; - enum disp_eotf eotf; - enum disp_color_space cs; - enum disp_dvi_hdmi dvi_hdmi; - enum disp_color_range range; - enum disp_scan_info scan; - unsigned int aspect_ratio; - unsigned int reserve1; -}; - -/* disp_device_dynamic_config - display deivce dynamic config - * - * @metadata_fd: dma_buf fd for the buffer contained metadata for fbc/hdr - * @metadata_size: the size of metadata buffer, unit:bytes - * @metadata_flag: the flag to indicate the type of metadata buffer - * 0 : no metadata - * 1 << 0: hdr static metadata - * 1 << 1: hdr dynamic metadata - * 1 << 4: frame buffer compress(fbc) metadata - * x : all type could be "or" together - * @vmap:vmap a block contigous phys memory into virtual space - * @vunmap: release virtual mapping obtained by vmap() - */ -struct disp_device_dynamic_config { - int metadata_fd; - unsigned int metadata_size; - unsigned int metadata_flag; - void *(*vmap)(unsigned long phys_addr, unsigned long size); - void (*vunmap)(const void *vaddr); -}; -struct disp_video_timings { - unsigned int vic; /* video information code */ - unsigned int tv_mode; - unsigned int pixel_clk; - unsigned int pixel_repeat; /* pixel repeat (pixel_repeat+1) times */ - unsigned int x_res; - unsigned int y_res; - unsigned int hor_total_time; - unsigned int hor_back_porch; - unsigned int hor_front_porch; - unsigned int hor_sync_time; - unsigned int ver_total_time; - unsigned int ver_back_porch; - unsigned int ver_front_porch; - unsigned int ver_sync_time; - unsigned int hor_sync_polarity; /* 0: negative, 1: positive */ - unsigned int ver_sync_polarity; /* 0: negative, 1: positive */ - bool b_interlace; - unsigned int vactive_space; - unsigned int trd_mode; - unsigned long dclk_rate_set; /*unit: hz */ - unsigned long long frame_period; /* unit: ns */ - int start_delay; /* unit: line */ -}; - -enum disp_fb_mode { - FB_MODE_SCREEN0 = 0, - FB_MODE_SCREEN1 = 1, - FB_MODE_SCREEN2 = 2, - FB_MODE_DUAL_SAME_SCREEN_TB = 3,/* two screen, top buffer for screen0, bottom buffer for screen1 */ - FB_MODE_DUAL_DIFF_SCREEN_SAME_CONTENTS = 4,/* two screen, they have same contents; */ -}; - -struct disp_fb_create_info { - enum disp_fb_mode fb_mode; - enum disp_layer_mode mode; - unsigned int buffer_num; - unsigned int width; - unsigned int height; - - unsigned int output_width; /* used when scaler mode */ - unsigned int output_height; /* used when scaler mode */ -}; - -enum disp_init_mode { - DISP_INIT_MODE_SCREEN0 = 0, /* fb0 for screen0 */ - DISP_INIT_MODE_SCREEN1 = 1, /* fb0 for screen1 */ - DISP_INIT_MODE_SCREEN2 = 2, /* fb0 for screen1 */ - DISP_INIT_MODE_TWO_DIFF_SCREEN = 3,/* fb0 for screen0 and fb1 for screen1 */ - DISP_INIT_MODE_TWO_SAME_SCREEN = 4,/* fb0(up buffer for screen0, down buffer for screen1) */ - DISP_INIT_MODE_TWO_DIFF_SCREEN_SAME_CONTENTS = 5,/* fb0 for two different screen(screen0 layer is normal layer, screen1 layer is scaler layer); */ -}; - -struct disp_tv_func { - int (*tv_enable)(u32 sel); - int (*tv_disable)(u32 sel); - int (*tv_suspend)(u32 sel); - int (*tv_resume)(u32 sel); - int (*tv_get_mode)(u32 sel); - int (*tv_set_mode)(u32 sel, enum disp_tv_mode tv_mod); - int (*tv_get_input_csc)(u32 sel); - int (*tv_get_video_timing_info)(u32 sel, - struct disp_video_timings ** - video_info); - int (*tv_mode_support)(u32 sel, enum disp_tv_mode mode); - int (*tv_hot_plugging_detect)(u32 state); - int (*tv_set_enhance_mode)(u32 sel, u32 mode); - int (*tv_irq_enable)(u32 sel, u32 irq_id, u32 en); - int (*tv_irq_query)(u32 sel); - unsigned int (*tv_get_cur_line)(u32 sel); - int (*vdpo_set_config)(u32 sel, struct disp_vdpo_config *p_cfg); - int (*tv_get_startdelay)(u32 sel); - void (*tv_show_builtin_patten)(u32 sel, u32 patten); -}; - -/* disp_vdevice_interface_para - vdevice interaface parameter - * - * @intf:interface - * 0:hv, 1:cpu, 3:lvds, 4:dsi - * @sub_intf: sub interface - * rgb interface: 0:parallel hv, 8:serial hv, 10:dummy rgb - * 11: rgb dummy, 12: ccir656 - * cpu interface: 0:18 pin, 10:9pin, 12:6pin, 8:16pin, 14:8pin - * lvds interface:0:single link, 1:dual link - * dsi inerafce: 0:video mode, 1:command mode, 2: video burst mode - * @sequence:output sequence - * rgb output: 0:rgb rgb, 1:rgb brg, 2:rgb gbr, 4:brg rgb - * 5:brg brg, 6:brg gbr - * 8:grb rgb, 9:grb brg, 10:grb gbr - * yuv output:0:yuyv, 1: yvyu, 2:uyvy, 3:vyuy - * @fdelay:yuv eav/sav F line delay - * 0: F toggle right after active video line - * 1: delay 2 line(CCIR NTSC) - * 2: delay 3 line(CCIR PAL) - * @clk_phase:clk phase - * 0: 0 degree, 1:90 degree, 2: 180 degree, 3:270 degree - * @sync_polarity:sync signals polarity - * 0: vsync active low,hsync active low - * 1: vsync active high,hsync active low - * 2: vsync active low,hsync active high - * 3: vsync active high,hsync active high - */ -struct disp_vdevice_interface_para { - unsigned int intf; - unsigned int sub_intf; - unsigned int sequence; - unsigned int fdelay; - unsigned int clk_phase; - unsigned int sync_polarity; - unsigned int ccir_clk_div; - unsigned int input_csc;/*not need to config for user*/ -}; - -struct disp_vdevice_source_ops { - int (*tcon_enable)(struct disp_device *dispdev); - int (*tcon_disable)(struct disp_device *dispdev); - int (*tcon_simple_enable)(struct disp_device *dispdev); - int (*tcon_simple_disable)(struct disp_device *dispdev); -}; - -struct disp_device_func { - int (*enable)(void); - int (*smooth_enable)(void); - int (*disable)(void); - int (*set_mode)(u32 mode); - int (*mode_support)(u32 mode); - int (*get_HPD_status)(void); - int (*get_input_csc)(void); - int (*get_input_color_range)(void); - int (*get_video_timing_info)(struct disp_video_timings **video_info); - int (*suspend)(void); - int (*resume)(void); - int (*early_suspend)(void); - int (*late_resume)(void); - int (*get_interface_para)(void *para); - int (*set_static_config)(struct disp_device_config *config); - int (*get_static_config)(struct disp_device_config *config); - int (*set_dynamic_config)(struct disp_device_dynamic_config *config); - int (*get_dynamic_config)(struct disp_device_dynamic_config *config); - - /*for hdmi cec*/ - s32 (*cec_standby_request)(void); - s32 (*cec_send_one_touch_play)(void); -}; - -struct disp_vdevice_init_data { - char name[32]; - u32 disp; - u32 fix_timing; - enum disp_output_type type; - struct disp_device_func func; -}; - -enum disp_tv_dac_source { - DISP_TV_DAC_SRC_COMPOSITE = 0, - DISP_TV_DAC_SRC_LUMA = 1, - DISP_TV_DAC_SRC_CHROMA = 2, - DISP_TV_DAC_SRC_Y = 4, - DISP_TV_DAC_SRC_PB = 5, - DISP_TV_DAC_SRC_PR = 6, - DISP_TV_DAC_SRC_NONE = 7, -}; - -enum disp_tv_output { - DISP_TV_NONE = 0, - DISP_TV_CVBS = 1, - DISP_TV_YPBPR = 2, - DISP_TV_SVIDEO = 4, - DISP_VGA = 5, -}; - -enum tag_DISP_CMD { - /* ----disp global---- */ - DISP_SYS_SHOW = 0x00, - DISP_RESERVE1 = 0x01, - DISP_SET_BKCOLOR = 0x03, - DISP_GET_BKCOLOR = 0x04, - DISP_SET_COLORKEY = 0x05, - DISP_GET_COLORKEY = 0x06, - DISP_GET_SCN_WIDTH = 0x07, - DISP_GET_SCN_HEIGHT = 0x08, - DISP_GET_OUTPUT_TYPE = 0x09, - DISP_SET_EXIT_MODE = 0x0A, - DISP_VSYNC_EVENT_EN = 0x0B, - DISP_BLANK = 0x0C, - DISP_SHADOW_PROTECT = 0x0D, - DISP_HWC_COMMIT = 0x0E, - DISP_DEVICE_SWITCH = 0x0F, - DISP_GET_OUTPUT = 0x10, - DISP_SET_COLOR_RANGE = 0x11, - DISP_GET_COLOR_RANGE = 0x12, - DISP_HWC_CUSTOM = 0x13, - DISP_DEVICE_SET_CONFIG = 0x14, - DISP_DEVICE_GET_CONFIG = 0x15, - - /* ----layer---- */ - DISP_LAYER_ENABLE = 0x40, - DISP_LAYER_DISABLE = 0x41, - DISP_LAYER_SET_INFO = 0x42, - DISP_LAYER_GET_INFO = 0x43, - DISP_LAYER_TOP = 0x44, - DISP_LAYER_BOTTOM = 0x45, - DISP_LAYER_GET_FRAME_ID = 0x46, - DISP_LAYER_SET_CONFIG = 0x47, - DISP_LAYER_GET_CONFIG = 0x48, - /* - * LAYER_S(G)ET_CONFIG2 takes disp_layer_config2, - * it will support more featuras - */ - DISP_LAYER_SET_CONFIG2 = 0x49, - DISP_LAYER_GET_CONFIG2 = 0x4a, - DISP_CHN_SET_PALETTE = 0x4b, - /* ----hdmi---- */ - DISP_HDMI_SUPPORT_MODE = 0xc4, - DISP_SET_TV_HPD = 0xc5, - DISP_HDMI_GET_EDID = 0xc6, - DISP_CEC_ONE_TOUCH_PLAY = 0xc7, - - /* ----lcd---- */ - DISP_LCD_ENABLE = 0x100, - DISP_LCD_DISABLE = 0x101, - DISP_LCD_SET_BRIGHTNESS = 0x102, - DISP_LCD_GET_BRIGHTNESS = 0x103, - DISP_LCD_BACKLIGHT_ENABLE = 0x104, - DISP_LCD_BACKLIGHT_DISABLE = 0x105, - DISP_LCD_SET_SRC = 0x106, - DISP_LCD_SET_FPS = 0x107, - DISP_LCD_GET_FPS = 0x108, - DISP_LCD_GET_SIZE = 0x109, - DISP_LCD_GET_MODEL_NAME = 0x10a, - DISP_LCD_SET_GAMMA_TABLE = 0x10b, - DISP_LCD_GAMMA_CORRECTION_ENABLE = 0x10c, - DISP_LCD_GAMMA_CORRECTION_DISABLE = 0x10d, - DISP_LCD_USER_DEFINED_FUNC = 0x10e, - DISP_LCD_CHECK_OPEN_FINISH = 0x10f, - DISP_LCD_CHECK_CLOSE_FINISH = 0x110, - - /*tv*/ - DISP_TV_SET_GAMMA_TABLE = 0x111, - /* ---- capture --- */ - DISP_CAPTURE_START = 0x140,/* caputre screen and scaler to dram */ - DISP_CAPTURE_STOP = 0x141, - DISP_CAPTURE_COMMIT = 0x142, - DISP_CAPTURE_COMMIT2 = 0x143, - DISP_CAPTURE_QUERY = 0x144, - DISP_CAPTURE_EXTEND = 0x145, - - /* ---enhance --- */ - DISP_ENHANCE_ENABLE = 0x180, - DISP_ENHANCE_DISABLE = 0x181, - DISP_ENHANCE_GET_EN = 0x182, - DISP_ENHANCE_SET_WINDOW = 0x183, - DISP_ENHANCE_GET_WINDOW = 0x184, - DISP_ENHANCE_SET_MODE = 0x185, - DISP_ENHANCE_GET_MODE = 0x186, - DISP_ENHANCE_DEMO_ENABLE = 0x187, - DISP_ENHANCE_DEMO_DISABLE = 0x188, - DISP_ENHANCE_SET_BRIGHT = 0x190, - DISP_ENHANCE_GET_BRIGHT = 0x191, - DISP_ENHANCE_SET_CONTRAST = 0x192, - DISP_ENHANCE_GET_CONTRAST = 0x193, - DISP_ENHANCE_SET_SATURATION = 0x194, - DISP_ENHANCE_GET_SATURATION = 0x195, - - /* ---smart backlight --- */ - DISP_SMBL_ENABLE = 0x200, - DISP_SMBL_DISABLE = 0x201, - DISP_SMBL_GET_EN = 0x202, - DISP_SMBL_SET_WINDOW = 0x203, - DISP_SMBL_GET_WINDOW = 0x204, - - /* ---- for test */ - DISP_FB_REQUEST = 0x280, - DISP_FB_RELEASE = 0x281, - - DISP_MEM_REQUEST = 0x2c0, - DISP_MEM_RELEASE = 0x2c1, - DISP_MEM_GETADR = 0x2c2, - DISP_VDPO_SET_CONFIG = 0x2c3, - - /* --- rotation sw --- */ - DISP_ROTATION_SW_SET_ROT = 0x300, - DISP_ROTATION_SW_GET_ROT = 0x301, - - DISP_EINK_UPDATE = 0x402, - DISP_EINK_SET_TEMP = 0x403, - DISP_EINK_GET_TEMP = 0x404, - DISP_EINK_OVERLAP_SKIP = 0x405, - DISP_EINK_UPDATE2 = 0x406, -}; - -enum { - ROTATION_SW_0 = 0, - ROTATION_SW_90 = 1, - ROTATION_SW_180 = 2, - ROTATION_SW_270 = 3, -}; - -#define FBIOGET_LAYER_HDL_0 0x4700 -#define FBIOGET_LAYER_HDL_1 0x4701 - -#endif diff --git a/src/platform/f133/include/libos/video/sunxi_metadata.h b/src/platform/f133/include/libos/video/sunxi_metadata.h deleted file mode 100644 index 7efb1c20a3f1ed416c91f0dfdc28fc3fb0354fbf..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/video/sunxi_metadata.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Allwinner SoCs display driver. - * - * Copyright (C) 2016 Allwinner. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#ifndef __SUNXI_METADATA_H__ -#define __SUNXI_METADATA_H__ - -enum { - /* hdr static metadata is available */ - SUNXI_METADATA_FLAG_HDR_SATIC_METADATA = 0x00000001, - /* hdr dynamic metadata is available */ - SUNXI_METADATA_FLAG_HDR_DYNAMIC_METADATA = 0x00000002, - - /* afbc header data is available */ - SUNXI_METADATA_FLAG_AFBC_HEADER = 0x00000010, -}; - -struct afbc_header { - u32 signature; - u16 filehdr_size; - u16 version; - u32 body_size; - u8 ncomponents; - u8 header_layout; - u8 yuv_transform; - u8 block_split; - u8 inputbits[4]; - u16 block_width; - u16 block_height; - u16 width; - u16 height; - u8 left_crop; - u8 top_crop; - u16 block_layout; -}; - -struct display_master_data { - /* display primaries */ - u16 display_primaries_x[3]; - u16 display_primaries_y[3]; - - /* white_point */ - u16 white_point_x; - u16 white_point_y; - - /* max/min display mastering luminance */ - u32 max_display_mastering_luminance; - u32 min_display_mastering_luminance; -}; - -/* static metadata type 1 */ -struct hdr_static_metadata { - struct display_master_data disp_master; - - u16 maximum_content_light_level; - u16 maximum_frame_average_light_level; -}; - -/* sunxi video metadata for ve and de */ -struct sunxi_metadata { - struct hdr_static_metadata hdr_smetada; - struct afbc_header afbc_head; -}; - -#endif /* #ifndef __SUNXI_METADATA_H__ */ diff --git a/src/platform/f133/include/libos/workqueue.h b/src/platform/f133/include/libos/workqueue.h deleted file mode 100644 index 58726feba41f7ac491eae601a0c729d18298156a..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/libos/workqueue.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef LIBOS_WORKQUEUE_H__ -#define LIBOS_WORKQUEUE_H__ - -#include - -#endif diff --git a/src/platform/f133/include/nx_configure.h b/src/platform/f133/include/nx_configure.h index dfc7ab14396cb434c75451baae68f535a7bc9fd7..214eb6ab4a76e8f202269f183d2d12851b087a96 100644 --- a/src/platform/f133/include/nx_configure.h +++ b/src/platform/f133/include/nx_configure.h @@ -19,12 +19,6 @@ #define CONFIG_NX_PORCESS_ENV_ARGS 1024 #define CONFIG_NX_TICKS_PER_SECOND 100 #define CONFIG_NX_PLATFORM_F133 1 -#define CONFIG_SOC_SUN20IW1 1 -#define CONFIG_DRIVERS_CCMU 1 -#define CONFIG_DRIVERS_SUNXI_CCU 1 -#define CONFIG_DRIVERS_GPIO 1 -#define CONFIG_DRIVERS_UART 1 -#define CONFIG_CLI_UART_PORT 0 #define CONFIG_NX_DRIVER_CONSOLE 1 #define CONFIG_NX_PRINT_BUF_LEN 256 #define CONFIG_NX_DRIVER_ROMDISK 1 diff --git a/src/platform/f133/include/osal/hal_atomic.h b/src/platform/f133/include/osal/hal_atomic.h deleted file mode 100644 index 1868d00116db27b474a247fb64de28ae8c1086e0..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_atomic.h +++ /dev/null @@ -1,45 +0,0 @@ -#ifndef SUNXI_HAL_ATOMIC_H -#define SUNXI_HAL_ATOMIC_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -//#include -//#include - -#ifdef CONFIG_KERNEL_FREERTOS -#ifdef CONFIG_CORE_DSP0 -#include -typedef unsigned int hal_spinlock_t; -#else -#include -typedef freert_spinlock_t hal_spinlock_t; -#endif /* CONFIG_CORE_DSP0 */ -#elif defined(CONFIG_OS_MELIS) -#include -typedef unsigned int melis_spinlock_t; -typedef melis_spinlock_t hal_spinlock_t; -#elif defined(CONFIG_KERNEL_NXOS) -#include -typedef NX_Spin hal_spinlock_t; -#else -#error "can not support unknown platform" -#endif - -void hal_spin_lock(hal_spinlock_t *lock); -void hal_spin_unlock(hal_spinlock_t *lock); - -unsigned long hal_spin_lock_irqsave(hal_spinlock_t *lock); -void hal_spin_unlock_irqrestore(hal_spinlock_t *lock, unsigned long __cpsr); - -int hal_spin_lock_init(hal_spinlock_t *lock); -int hal_spin_lock_deinit(hal_spinlock_t *lock); -void hal_enter_critical(void); -void hal_exit_critical(void); - -#ifdef __cplusplus -} -#endif -#endif diff --git a/src/platform/f133/include/osal/hal_cache.h b/src/platform/f133/include/osal/hal_cache.h deleted file mode 100644 index 1953158c357fbd8d64b4fe2d8b8f18875e0cf5c8..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_cache.h +++ /dev/null @@ -1,39 +0,0 @@ -#ifndef SUNXI_HAL_CACHE_H -#define SUNXI_HAL_CACHE_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include -#include - -#ifdef CONFIG_KERNEL_FREERTOS -#ifndef CONFIG_CORE_DSP0 -#include -#endif -#elif defined(CONFIG_OS_MELIS) -#include -#elif defined(CONFIG_KERNEL_NXOS) -#include -#else -#error "can not support unknown platform" -#endif - -void hal_dcache_clean(unsigned long vaddr_start, unsigned long size); -void hal_dcache_invalidate(unsigned long vaddr_start, unsigned long size); -void hal_dcache_clean_invalidate(unsigned long vaddr_start, unsigned long size); -void hal_icache_invalidate_all(void); -void hal_icache_invalidate(unsigned long vaddr_start, unsigned long size); -void hal_dcache_invalidate_all(void); -void hal_dcache_clean_all(void); - -void hal_dcache_init(void); -void hal_icache_init(void); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/osal/hal_cfg.h b/src/platform/f133/include/osal/hal_cfg.h deleted file mode 100644 index 9c9f28301096cbadc4ea2bfc9f8c28a5178e9288..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_cfg.h +++ /dev/null @@ -1,40 +0,0 @@ -#ifndef SUNXI_HAL_CFG_H -#define SUNXI_HAL_CFG_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -#ifdef CONFIG_KERNEL_FREERTOS -#include -#include -#include -int32_t Hal_Cfg_Init(void); - -#elif defined(CONFIG_OS_MELIS) -#include -#include -#include -#include -int32_t Hal_Cfg_Init(uint8_t *CfgVAddr, uint32_t size); - -#elif defined(CONFIG_KERNEL_NXOS) -#include -#else -#error "can not support unknown platform" -#endif - -int32_t Hal_Cfg_Exit(void); -int32_t Hal_Cfg_GetSubKeyValue(char *MainKeyName, char *SubKeyName, void *value, int32_t type); -int32_t Hal_Cfg_GetKeyValue(char *SecName, char *KeyName, int32_t Value[], int32_t Count); -int32_t Hal_Cfg_GetSecKeyCount(char *SecName); -int32_t Hal_Cfg_GetSecCount(void); -int32_t Hal_Cfg_GetGPIOSecKeyCount(char *GPIOSecName); -int32_t Hal_Cfg_GetGPIOSecData(char *GPIOSecName, void *pGPIOCfg, int32_t GPIONum); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/osal/hal_cmd.h b/src/platform/f133/include/osal/hal_cmd.h deleted file mode 100644 index 1ed7f963ea86cf7103e248fbbd61b6d5e542f91a..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_cmd.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef SUNXI_HAL_CMD_H -#define SUNXI_HAL_CMD_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* include me to supprot FINSH_FUNCTION_EXPORT_CMD */ -#ifdef CONFIG_KERNEL_FREERTOS -#include -#elif defined(CONFIG_RTTKERNEL) -#include -#else -#elif defined(CONFIG_KERNEL_NXOS) -#include -#else -#error "can not support the RTOS!!" -#endif - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/osal/hal_cpufreq.h b/src/platform/f133/include/osal/hal_cpufreq.h deleted file mode 100644 index 73de0916b6aba53373fde01c58fb7befac040ef4..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_cpufreq.h +++ /dev/null @@ -1,38 +0,0 @@ -/* cpufreq interlayer head file. - * - * Copyright (C) 2021 Allwinnertech. - */ - -#ifndef __CPU_FREQ__ -#define __CPU_FREQ__ - -#include - -/* struct platform_cpufreq_ops - platform cpufreq function - * @set_freq: set cpu freq - * @get_freq: get cpu current freq - * @get_freq_table_size: get the size of frequency table - * @get_freq_table_freq: get the freq in frequency table - */ -struct platform_cpufreq_ops { - int (*set_freq)(u32 clk_rate); - int (*get_freq)(void); - int (*get_freq_table_size)(void); - int (*get_freq_table_freq)(int index); -}; - -/* struct cpufreq_data - cpufreq instance - * @ops: platform cpufreq function - */ -struct cpufreq_data { - struct platform_cpufreq_ops *ops; -}; - -int hal_cpufreq_data_register(struct cpufreq_data *data); -int hal_cpufreq_data_unregister(struct cpufreq_data *data); -int hal_cpufreq_set_freq(u32 clk_rate); -int hal_cpufreq_get_freq(void); -int hal_cpufreq_get_freq_table_size(void); -int hal_cpufreq_get_freq_table_freq(int index); - -#endif /* __CPU_FREQ__ */ diff --git a/src/platform/f133/include/osal/hal_debug.h b/src/platform/f133/include/osal/hal_debug.h deleted file mode 100644 index 8d68d73f9e2c3d525739fb9085c9a1e26d886163..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_debug.h +++ /dev/null @@ -1,36 +0,0 @@ -#ifndef SUNXI_HAL_DEBUG_H -#define SUNXI_HAL_DEBUG_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "barrier.h" - -#if defined(CONFIG_KERNEL_FREERTOS) - -#include -#define hal_soft_break soft_break - -#elif defined(CONFIG_OS_MELIS) - -#include -#define hal_soft_break software_break - -#else - -#define hal_soft_break - -#endif - -#define hal_sys_abort() \ - do { \ - hal_soft_break(0); \ - } while (0) - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/osal/hal_event.h b/src/platform/f133/include/osal/hal_event.h deleted file mode 100644 index a1db6a690c6e86057de733c38c19fd0b1adcafb5..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_event.h +++ /dev/null @@ -1,79 +0,0 @@ -#ifndef SUNXI_HAL_EVENT_H -#define SUNXI_HAL_EVENT_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include - -#ifdef CONFIG_KERNEL_FREERTOS -#include -#include -#include -#include - -#define HAL_EVENT_OPTION_CLEAR (1 << 0) -#define HAL_EVENT_OPTION_AND (1 << 1) -#define HAL_EVENT_OPTION_OR (1 << 2) - -typedef StaticEventGroup_t hal_event; -typedef EventGroupHandle_t hal_event_t; -typedef EventBits_t hal_event_bits_t; - - -#elif defined(CONFIG_RTTKERNEL) -#include -#include - -#define HAL_EVENT_OPTION_CLEAR RT_EVENT_FLAG_CLEAR -#define HAL_EVENT_OPTION_AND RT_EVENT_FLAG_AND -#define HAL_EVENT_OPTION_OR RT_EVENT_FLAG_OR - -typedef rt_event_t hal_event_t; -typedef rt_uint32_t hal_event_bits_t; - -#else -#error "can not support the RTOS!!" -#endif - -int hal_event_init(hal_event_t ev); -int hal_event_datach(hal_event_t ev); - -hal_event_t hal_event_create(void); -hal_event_t hal_event_create_initvalue(int init_value); -int hal_event_delete(hal_event_t ev); - -/* - * wait for events - * @ev: hal_event_t handler - * @evs: events - * @option: it can be HAL_EVENT_OPTION_* - * @timeout:wait time(ms) - * - * @return: return new events value if success,otherwise return negative value - */ -hal_event_bits_t hal_event_wait(hal_event_t ev, hal_event_bits_t evs, uint8_t option, unsigned long timeout); - -#define hal_ev_wait_all(ev, evs, timeout) hal_event_wait(ev, evs, HAL_EVENT_OPTION_CLEAR | HAL_EVENT_OPTION_AND, timeout) -#define hal_ev_wait_any(ev, evs, timeout) hal_event_wait(ev, evs, HAL_EVENT_OPTION_CLEAR | HAL_EVENT_OPTION_OR, timeout) -#define hal_ev_wait_all_no_clear(ev, evs, timeout) hal_event_wait(ev, evs, HAL_EVENT_OPTION_AND, timeout) -#define hal_ev_wait_any_no_clear(ev, evs, timeout) hal_event_wait(ev, evs, HAL_EVENT_OPTION_OR, timeout) - -/* - * set event bit - * @ev: hal_event_t handler - * @evs: event bit to set - * - * @return: return 0 if success - */ -int hal_event_set_bits(hal_event_t ev, hal_event_bits_t evs); - -hal_event_bits_t hal_event_get(hal_event_t ev); - -#ifdef __cplusplus -} -#endif -#endif - diff --git a/src/platform/f133/include/osal/hal_interrupt.h b/src/platform/f133/include/osal/hal_interrupt.h deleted file mode 100644 index b82b56a12c43ba713c3cf6402ec114c7c5d9ee73..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_interrupt.h +++ /dev/null @@ -1,42 +0,0 @@ -#ifndef SUNXI_HAL_INTERRUPT_H -#define SUNXI_HAL_INTERRUPT_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include - -typedef enum hal_irqreturn { - HAL_IRQ_OK = (0 << 0), - HAL_IRQ_ERR = (1 << 0), -} hal_irqreturn_t; - -typedef hal_irqreturn_t (*hal_irq_handler_t)(void *); - -#ifdef CONFIG_ARCH_SUN55IW3 -#define MAKE_IRQn(major, sub) ((major) * 100 + (sub)) -#else -#define MAKE_IRQn(major, sub) (major) -#endif - -#define in_interrupt(...) hal_interrupt_get_nest() -#define in_nmi(...) (0) - -void hal_interrupt_enable(void); -void hal_interrupt_disable(void); -unsigned long hal_interrupt_save(void); -void hal_interrupt_restore(unsigned long flag); -uint32_t hal_interrupt_get_nest(void); - -int32_t hal_request_irq(int32_t irq, hal_irq_handler_t handler, const char *name, void *data); -void hal_free_irq(int32_t irq); -int hal_enable_irq(int32_t irq); -void hal_disable_irq(int32_t irq); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/osal/hal_log.h b/src/platform/f133/include/osal/hal_log.h deleted file mode 100644 index 4cb499899fcb9ddd1bfb843b6d3fd9e2e53f0e04..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_log.h +++ /dev/null @@ -1,80 +0,0 @@ -#ifndef SUNXI_HAL_LOG_H -#define SUNXI_HAL_LOG_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include - -#ifdef CONFIG_KERNEL_FREERTOS - -#include - -#define hal_log_err(fmt, ...) pr_err(fmt"\n", ##__VA_ARGS__) -#define hal_log_warn(fmt, ...) pr_warn(fmt"\n", ##__VA_ARGS__) -#define hal_log_info(fmt, ...) pr_info(fmt"\n", ##__VA_ARGS__) -#define hal_log_debug(fmt, ...) pr_debug(fmt"\n", ##__VA_ARGS__) - -#elif defined CONFIG_RTTKERNEL - -#include - -#define hal_log_err(fmt, ...) pr_err(fmt"\n", ##__VA_ARGS__) -#define hal_log_warn(fmt, ...) pr_warn(fmt"\n", ##__VA_ARGS__) -#define hal_log_info(fmt, ...) pr_info(fmt"\n", ##__VA_ARGS__) -#define hal_log_debug(fmt, ...) pr_debug(fmt"\n", ##__VA_ARGS__) - -#elif defined(CONFIG_KERNEL_NXOS) - -#include - -#define hal_log_err(fmt, ...) NX_LOG_E(fmt"\n", ##__VA_ARGS__) -#define hal_log_warn(fmt, ...) NX_LOG_W(fmt"\n", ##__VA_ARGS__) -#define hal_log_info(fmt, ...) NX_LOG_I(fmt"\n", ##__VA_ARGS__) -#define hal_log_debug(fmt, ...) NX_LOG_D(fmt"\n", ##__VA_ARGS__) - -#define printf NX_Printf - -#else -int printk(const char *fmt, ...); -#define HAL_XPOSTO(x) "\033[" #x "D\033[" #x "C" - -#define HAL_LOG_LAYOUT "%s%s%s: [%s:%04u]: %s%s" -#define HAL_LOG_BACKEND_CALL(log_lv, log_color, log_format, color_off, ...) \ - printk(HAL_LOG_LAYOUT log_format "%s""\n\r", \ - log_color, log_lv, color_off, __func__, __LINE__, HAL_XPOSTO(30),\ - log_color, ##__VA_ARGS__, color_off) - -#define HAL_LOG_COLOR(log_lv, log_color, log_format, ...) \ - HAL_LOG_BACKEND_CALL(log_lv, log_color, log_format, \ - HAL_LOG_COLOR_OFF, ##__VA_ARGS__) - - -#define HAL_LOG_COLOR_OFF "\033[0m" -#define HAL_LOG_COLOR_RED "\033[1;40;31m" -#define HAL_LOG_COLOR_YELLOW "\033[1;40;33m" -#define HAL_LOG_COLOR_BLUE "\033[1;40;34m" -#define HAL_LOG_COLOR_PURPLE "\033[1;40;35m" - -#define HAL_LOG_ERROR_PREFIX "[ERR]" -#define HAL_LOG_WARNING_PREFIX "[WRN]" -#define HAL_LOG_INFO_PREFIX "[INF]" -#define HAL_LOG_DEBUG_PREFIX "[DBG]" - -#define hal_log_err(...) \ - do { HAL_LOG_COLOR(HAL_LOG_ERROR_PREFIX, HAL_LOG_COLOR_OFF, ##__VA_ARGS__); } while(0) -#define hal_log_warn(...) \ - do { HAL_LOG_COLOR(HAL_LOG_WARNING_PREFIX, HAL_LOG_COLOR_OFF, ##__VA_ARGS__); } while(0) -#define hal_log_info(...) \ - do { HAL_LOG_COLOR(HAL_LOG_INFO_PREFIX, HAL_LOG_COLOR_OFF, ##__VA_ARGS__); } while(0) -#define hal_log_debug(...) \ - do { HAL_LOG_COLOR(HAL_LOG_DEBUG_PREFIX, HAL_LOG_COLOR_OFF, ##__VA_ARGS__); } while(0) -#endif - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/osal/hal_mem.h b/src/platform/f133/include/osal/hal_mem.h deleted file mode 100644 index 7dcf41ec612ac49b8467b8f0b741b4702538947b..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_mem.h +++ /dev/null @@ -1,74 +0,0 @@ -#ifndef SUNXI_HAL_MEM_H -#define SUNXI_HAL_MEM_H - -#ifdef __cplusplus -extern "C" -{ -#endif -//#include -#include -#include - -void *hal_realloc(void *ptr, uint32_t size); -void *hal_calloc(uint32_t numb, uint32_t size); - -void *hal_malloc(uint32_t size); -void hal_free(void *p); - -void *hal_malloc_align(uint32_t size, int align); -void hal_free_align(void *p); - -void dma_alloc_coherent_init(void); -void dma_free_coherent_prot(void *addr); -void *dma_alloc_coherent_prot(size_t size, unsigned long prot); -void *dma_alloc_coherent_non_cacheable(size_t size); -void dma_free_coherent_non_cacheable(void *addr); - -int dma_coherent_heap_init(void); -void *dma_coherent_heap_alloc(size_t size); -void dma_coherent_heap_free(void *ptr); - -void *dma_coherent_heap_alloc_align(size_t size,int align); -void dma_coherent_heap_free_align(void *ptr); - -unsigned long get_memory_prot(unsigned long prot); - -#ifdef CONFIG_KERNEL_FREERTOS -#ifdef CONFIG_CORE_DSP0 -extern unsigned long __va_to_pa(unsigned long vaddr); -extern unsigned long __pa_to_va(unsigned long paddr); -#else -#define __va_to_pa(vaddr) ((u32)vaddr) -#define __pa_to_va(vaddr) ((u32)vaddr) -#endif /* CONFIG_CORE_DSP0 */ -#elif defined(CONFIG_OS_MELIS) -#include - -unsigned long awos_arch_virt_to_phys(unsigned long virtaddr); -unsigned long awos_arch_phys_to_virt(unsigned long phyaddr); - -#define __va_to_pa(vaddr) awos_arch_virt_to_phys((vaddr)) -#define __pa_to_va(paddr) awos_arch_phys_to_virt((paddr)) -#elif defined(CONFIG_KERNEL_NXOS) -#include - -unsigned long awos_arch_virt_to_phys(unsigned long virtaddr); -unsigned long awos_arch_phys_to_virt(unsigned long phyaddr); - -#define __va_to_pa(vaddr) awos_arch_virt_to_phys((vaddr)) -#define __pa_to_va(paddr) awos_arch_phys_to_virt((paddr)) - -#else - -#define __va_to_pa(vaddr) ((unsigned long)vaddr) -#define __pa_to_va(vaddr) ((unsigned long)vaddr) - -#endif /* CONFIG_KERNEL_FREERTOS */ - -#define PAGE_MEM_ATTR_NON_CACHEABLE 0x000000001UL -#define PAGE_MEM_ATTR_CACHEABLE 0x000000002UL - -#ifdef __cplusplus -} -#endif -#endif diff --git a/src/platform/f133/include/osal/hal_mutex.h b/src/platform/f133/include/osal/hal_mutex.h deleted file mode 100644 index 625f7896935811a86b8b7a955b97cea43efa44ed..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_mutex.h +++ /dev/null @@ -1,39 +0,0 @@ -#ifndef SUNXI_HAL_MUTEX_H -#define SUNXI_HAL_MUTEX_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -#ifdef CONFIG_KERNEL_FREERTOS -#include -#include -typedef struct QueueDefinition hal_mutex; -typedef SemaphoreHandle_t hal_mutex_t; -#elif defined(CONFIG_RTTKERNEL) -#include -typedef struct rt_mutex hal_mutex; -typedef rt_mutex_t hal_mutex_t; -#elif defined(CONFIG_KERNEL_NXOS) -#include -typedef NX_Mutex *hal_mutex_t; -#else -#error "can not support the RTOS!!" -#endif - -#include -#include - -hal_mutex_t hal_mutex_create(void); -int hal_mutex_delete(hal_mutex_t mutex); -int hal_mutex_lock(hal_mutex_t mutex); -int hal_mutex_unlock(hal_mutex_t mutex); -int hal_mutex_trylock(hal_mutex_t mutex); -int hal_mutex_timedwait(hal_mutex_t mutex, int ticks); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/osal/hal_osal.h b/src/platform/f133/include/osal/hal_osal.h deleted file mode 100644 index 4af1b41cfa738ffc2f1dea3b437c5d9d0315a6b4..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_osal.h +++ /dev/null @@ -1,40 +0,0 @@ -#ifndef SUNXI_HAL_OSAL_H -#define SUNXI_HAL_OSAL_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define likely(x) __builtin_expect((long)!!(x), 1L) -#define unlikely(x) __builtin_expect((long)!!(x), 0L) - -#if defined(CONFIG_KERNEL_FREERTOS) && !defined(CONFIG_PORT_XCC_XTENSA) -#include -#endif - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/osal/hal_poll.h b/src/platform/f133/include/osal/hal_poll.h deleted file mode 100644 index a64fbf8cf537606f42720340ba321fc7e618c081..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_poll.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef HAL_POLL_H -#define HAL_POLL_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if defined(CONFIG_OS_MELIS) -#include -#elif defined(CONFIG_KERNEL_FREERTOS) -struct hal_pollreq; -#else -#error "can not support unknown platform" -#endif - -#ifdef __cplusplus -} -#endif - -#endif /*HAL_POLL_H*/ diff --git a/src/platform/f133/include/osal/hal_queue.h b/src/platform/f133/include/osal/hal_queue.h deleted file mode 100644 index f583cd935b62cdbb864849e18d0c88c2ebb6fc67..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_queue.h +++ /dev/null @@ -1,61 +0,0 @@ -#ifndef SUNXI_HAL_MAILBOX_H -#define SUNXI_HAL_MAILBOX_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include -#include - -#ifdef CONFIG_KERNEL_FREERTOS -#include -#include -typedef QueueHandle_t hal_mailbox_t; -typedef QueueHandle_t hal_queue_t; -#elif defined(CONFIG_RTTKERNEL) - -#include -#include -#include -typedef rt_mailbox_t hal_mailbox_t; -typedef rt_mq_t hal_queue_t; -typedef struct rt_workqueue hal_workqueue; -typedef struct rt_work hal_work; -typedef rt_wqueue_t hal_wqueue_t; - -#define hal_work_init rt_work_init -hal_workqueue *hal_workqueue_create(const char *name, unsigned short stack_size, unsigned char priority); -int hal_workqueue_dowork(hal_workqueue *queue, hal_work *work); - -void hal_wqueue_init(hal_wqueue_t *queue); -int hal_wqueue_wait(hal_wqueue_t *queue, int condition, int timeout); -void hal_wqueue_wakeup(hal_wqueue_t *queue, void *key); -#elif defined(CONFIG_KERNEL_NXOS) - -#include -typedef NX_Mailbox* hal_mailbox_t; - -#else -#error "can not support unknown platform" -#endif - -enum IPC_MAILBOX_CMD -{ - IPC_MAILBOX_CMD_GET_STATE, - IPC_MAILBOX_CMD_NUMS, -}; - - -hal_mailbox_t hal_mailbox_create(const char *name, unsigned int size); -int hal_mailbox_delete(hal_mailbox_t mailbox); -int hal_mailbox_send(hal_mailbox_t mailbox, unsigned int value); -int hal_mailbox_send_wait(hal_mailbox_t mailbox, unsigned int value, int timeout); -int hal_mailbox_recv(hal_mailbox_t mailbox, unsigned int *value, int timeout); -int hal_is_mailbox_empty(hal_mailbox_t mailbox); - -#ifdef __cplusplus -} -#endif -#endif diff --git a/src/platform/f133/include/osal/hal_sem.h b/src/platform/f133/include/osal/hal_sem.h deleted file mode 100644 index e0a3502c3ad3a0813876c9537210cdafaf38beb1..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_sem.h +++ /dev/null @@ -1,37 +0,0 @@ -#ifndef SUNXI_HAL_SEM_H -#define SUNXI_HAL_SEM_H - -#ifdef __cplusplus -extern "C" -{ -#endif -#include -#include - -#ifdef CONFIG_KERNEL_FREERTOS -#include -#include -typedef SemaphoreHandle_t hal_sem_t; -#elif defined(CONFIG_RTTKERNEL) -#include -typedef rt_sem_t hal_sem_t; -#elif defined(CONFIG_KERNEL_NXOS) -#include -typedef NX_Semaphore *hal_sem_t; -#else -#error "can not support the RTOS!!" -#endif - -hal_sem_t hal_sem_create(unsigned int cnt); -int hal_sem_delete(hal_sem_t sem); -int hal_sem_getvalue(hal_sem_t sem, int *val); -int hal_sem_post(hal_sem_t sem); -int hal_sem_timedwait(hal_sem_t sem, unsigned long ticks); -int hal_sem_trywait(hal_sem_t sem); -int hal_sem_wait(hal_sem_t sem); -int hal_sem_clear(hal_sem_t sem); - -#ifdef __cplusplus -} -#endif -#endif diff --git a/src/platform/f133/include/osal/hal_status.h b/src/platform/f133/include/osal/hal_status.h deleted file mode 100644 index 287088c50af20f03d557b89857e79f6b70c82ad6..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_status.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef SUNXI_HAL_STATUS_H -#define SUNXI_HAL_STATUS_H - -typedef enum { - HAL_OK = 0, /* success */ - HAL_ERROR = -1, /* general error */ - HAL_BUSY = -2, /* device or resource busy */ - HAL_TIMEOUT = -3, /* wait timeout */ - HAL_INVALID = -4, /* invalid argument */ - HAL_NOMEM = -5, /* no memory */ -} hal_status_t; - -#endif diff --git a/src/platform/f133/include/osal/hal_thread.h b/src/platform/f133/include/osal/hal_thread.h deleted file mode 100644 index 6a50a87179ab8045496ccb24240dedc279180c99..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_thread.h +++ /dev/null @@ -1,69 +0,0 @@ -#ifndef SUNXI_HAL_THREAD_H -#define SUNXI_HAL_THREAD_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -#if defined(CONFIG_KERNEL_FREERTOS) -#include -#include -typedef TaskHandle_t hal_thread_t; - -#define HAL_THREAD_PRIORITY_APP ((configMAX_PRIORITIES >> 1)) -#define HAL_THREAD_PRIORITY_CLI ((configMAX_PRIORITIES >> 1) + 2) -#define HAL_THREAD_PRIORITY_SYS ((configMAX_PRIORITIES >> 1) + 1) -#define HAL_THREAD_PRIORITY_NET ((configMAX_PRIORITIES >> 1) + 1) - -#define HAL_THREAD_PRIORITY_HIGHEST (configMAX_PRIORITIES - 1) -#define HAL_THREAD_PRIORITY_LOWEST (0) -#define HAL_THREAD_PRIORITY_MIDDLE (configMAX_PRIORITIES >> 1) - -#else -#include -typedef rt_thread_t hal_thread_t; -typedef struct rt_thread hal_thread; - -#define HAL_THREAD_PRIORITY_APP (4) -#define HAL_THREAD_PRIORITY_CLI (3) -#define HAL_THREAD_PRIORITY_SYS (3) -#define HAL_THREAD_PRIORITY_NET (3) - -#define HAL_THREAD_PRIORITY_HIGHEST (0) -#define HAL_THREAD_PRIORITY_LOWEST (31) -#define HAL_THREAD_PRIORITY_MIDDLE (15) - -#endif - -#define HAL_THREAD_STACK_SIZE (0x2000) -#define HAL_THREAD_TIMESLICE ( 10) - -#define HAL_THREAD_PRIORITY HAL_THREAD_PRIORITY_APP - -void *kthread_create(void (*threadfn)(void *data), void *data, const char *namefmt, int stacksize, int priority); -void *kthread_current(void); -int kthread_stop(void *thread); -int kthread_start(void *thread); -void *kthread_self(void); -int kthread_wakeup(void *thread); -int kthread_suspend(void *thread); -int kthread_msleep(int ms); -int kthread_sleep(int tick); -int kthread_scheduler_is_running(void); -int kthread_in_critical_context(void); -void kthread_tick_increase(void); - -#define kthread_run(threadfn, data, namefmt, ...) \ -({ \ - void *__k \ - = kthread_create(threadfn, data, namefmt, HAL_THREAD_STACK_SIZE, HAL_THREAD_PRIORITY_SYS); \ - if (__k) \ - kthread_start(__k); \ - __k; \ -}) - -#ifdef __cplusplus -} -#endif -#endif diff --git a/src/platform/f133/include/osal/hal_time.h b/src/platform/f133/include/osal/hal_time.h deleted file mode 100644 index 5bc2168fd23411bf72810b13c9abbe4d7f0708cc..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_time.h +++ /dev/null @@ -1,78 +0,0 @@ -#ifndef SUNXI_HAL_TIME_H -#define SUNXI_HAL_TIME_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Parameters used to convert the timespec values: */ -#define MSEC_PER_SEC 1000L -#define USEC_PER_MSEC 1000L -#define NSEC_PER_USEC 1000L -#define NSEC_PER_MSEC 1000000L -#define USEC_PER_SEC 1000000L -#define NSEC_PER_SEC 1000000000L -#define FSEC_PER_SEC 1000000000000000LL - -#ifdef CONFIG_KERNEL_FREERTOS -#include -#include -#include - -#undef HAL_WAIT_FOREVER -#define HAL_WAIT_FOREVER portMAX_DELAY -#define HAL_WAIT_NO (0) - -#define OSTICK_TO_MS(x) (x * (MSEC_PER_SEC / CONFIG_HZ)) -#define MS_TO_OSTICK(x) (x / (MSEC_PER_SEC / CONFIG_HZ)) - -#define hal_tick_get() xTaskGetTickCount() - -typedef TickType_t hal_tick_t; - -#elif defined(CONFIG_RTTKERNEL) - -#include - -#undef HAL_WAIT_FOREVER -#define HAL_WAIT_FOREVER RT_WAITING_FOREVER -#define HAL_WAIT_NO RT_WAITING_NO - -#define OSTICK_TO_MS(x) (x * (MSEC_PER_SEC / CONFIG_HZ)) -#define MS_TO_OSTICK(x) (x / (MSEC_PER_SEC / CONFIG_HZ)) - -#define hal_tick_get() rt_tick_get() -typedef rt_tick_t hal_tick_t; -#elif defined(CONFIG_KERNEL_NXOS) - -#include - -#undef HAL_WAIT_FOREVER -#define HAL_WAIT_FOREVER 0x7fffffff -#define HAL_WAIT_NO 0 - -#define OSTICK_TO_MS(x) NX_TICKS_TO_MILLISECOND(x) -#define MS_TO_OSTICK(x) NX_MILLISECOND_TO_TICKS(x) - -#define hal_tick_get() NX_ClockTickGet() -typedef NX_ClockTick hal_tick_t; - -#else -#error "can not support the RTOS!!" -#endif - -int hal_sleep(unsigned int secs); -int hal_usleep(unsigned int usecs); -int hal_msleep(unsigned int msecs); -void hal_udelay(unsigned int us); -void hal_mdelay(unsigned int ms); -void hal_sdelay(unsigned int s); - -uint64_t hal_gettime_ns(void); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/src/platform/f133/include/osal/hal_timer.h b/src/platform/f133/include/osal/hal_timer.h deleted file mode 100644 index 1841106a588289b69f7c2c2c1f55ffd9aacbdcc6..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_timer.h +++ /dev/null @@ -1,93 +0,0 @@ -#ifndef SUNXI_HAL_TIMER_H -#define SUNXI_HAL_TIMER_H - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include -#include -#include -#include - -#ifdef CONFIG_KERNEL_FREERTOS - -#include -#include -#include - -typedef TimerHandle_t osal_timer_t; -typedef void (*timeout_func)(void *parameter); - -#define OSAL_TIMER_FLAG_PERIODIC (1 << 0) -#define OSAL_TIMER_FLAG_ONE_SHOT (1 << 1) -#define OSAL_TIMER_FLAG_HARD_TIMER (1 << 2) -#define OSAL_TIMER_FLAG_SOFT_TIMER (1 << 3) - -#define OSAL_TIMER_CTRL_SET_TIME (1 << 1) - -#elif defined(CONFIG_RTTKERNEL) - -#include - -typedef rt_timer_t osal_timer_t; -typedef void (*timeout_func)(void *parameter); - -#define OSAL_TIMER_FLAG_DEACTIVATED RT_TIMER_FLAG_DEACTIVATED -#define OSAL_TIMER_FLAG_ACTIVATED RT_TIMER_FLAG_ACTIVATED -#define OSAL_TIMER_FLAG_ONE_SHOT RT_TIMER_FLAG_ONE_SHOT -#define OSAL_TIMER_FLAG_PERIODIC RT_TIMER_FLAG_PERIODIC - -#define OSAL_TIMER_FLAG_HARD_TIMER RT_TIMER_FLAG_HARD_TIMER -#define OSAL_TIMER_FLAG_SOFT_TIMER RT_TIMER_FLAG_SOFT_TIMER - -#define OSAL_TIMER_CTRL_SET_TIME RT_TIMER_CTRL_SET_TIME -#define OSAL_TIMER_CTRL_GET_TIME RT_TIMER_CTRL_GET_TIME -#define OSAL_TIMER_CTRL_SET_ONESHOT RT_TIMER_CTRL_SET_ONESHOT -#define OSAL_TIMER_CTRL_SET_PERIODIC RT_TIMER_CTRL_SET_PERIODIC -#define OSAL_TIMER_CTRL_GET_STATE RT_TIMER_CTRL_GET_STATE -#elif defined(CONFIG_KERNEL_NXOS) - -#include - -typedef NX_Timer *osal_timer_t; -typedef void (*timeout_func)(void *parameter); - -#define OSAL_TIMER_FLAG_ONE_SHOT NX_TIMER_ONESHOT -#define OSAL_TIMER_FLAG_PERIODIC NX_TIMER_PERIOD - -#define OSAL_TIMER_FLAG_HARD_TIMER 0 -#define OSAL_TIMER_FLAG_SOFT_TIMER 0 - -/** - * not support - */ -#define OSAL_TIMER_CTRL_SET_TIME 0 - -#else -#error "can not support unknown platform" -#endif - -osal_timer_t osal_timer_create(const char *name, - timeout_func timeout, - void *parameter, - unsigned int time, - unsigned char flag); - -hal_status_t osal_timer_delete(osal_timer_t timer); -hal_status_t osal_timer_start(osal_timer_t timer); -hal_status_t osal_timer_stop(osal_timer_t timer); -hal_status_t osal_timer_control(osal_timer_t timer, int cmd, void *arg); - -int hal_sleep(unsigned int secs); -int hal_usleep(unsigned int usecs); -int hal_msleep(unsigned int msecs); -void hal_udelay(unsigned int us); -uint64_t hal_gettime_ns(void); -uint64_t hal_gettime_us(void); - -#ifdef __cplusplus -} -#endif -#endif diff --git a/src/platform/f133/include/osal/hal_waitqueue.h b/src/platform/f133/include/osal/hal_waitqueue.h deleted file mode 100644 index 86ce73e63b0994933de7a3d25ae2bf5b271287c4..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_waitqueue.h +++ /dev/null @@ -1,69 +0,0 @@ -#ifndef SUNXI_HAL_WAITQUEUE_H -#define SUNXI_HAL_WAITQUEUE_H - -#ifdef __cplusplus -extern "C" -{ -#endif -#include -#include - -#ifdef CONFIG_KERNEL_FREERTOS -#include -#include -#include - -#include - -#define HAL_WQ_FLAG_CLEAN 0x00 -#define HAL_WQ_FLAG_WAKEUP 0x01 - -struct hal_waitqueue -{ - uint32_t flag; - hal_sem_t sem; - struct list_head waiting_list; -}; -typedef struct hal_waitqueue hal_waitqueue_t; - -struct hal_waitqueue_node; -typedef int (*hal_waitqueue_func_t)(struct hal_waitqueue_node *wait, void *key); - -struct hal_waitqueue_node -{ - void* polling_thread; - struct list_head list; - - hal_waitqueue_func_t wakeup; - uint32_t key; - hal_sem_t sem; -}; -typedef struct hal_waitqueue_node hal_waitqueue_node_t; - -int __wqueue_default_wake(struct hal_waitqueue_node *wait, void *key); - -void hal_waitqueue_add(hal_waitqueue_t *queue, struct hal_waitqueue_node *node); -void hal_waitqueue_remove(struct hal_waitqueue_node *node); -int hal_waitqueue_wait(hal_waitqueue_t *queue, int condition, int timeout); -void hal_waitqueue_wakeup(hal_waitqueue_t *queue, void *key); -void hal_waitqueue_init(hal_waitqueue_t *queue); -void hal_waitqueue_deinit(hal_waitqueue_t *queue); - -#define HAL_DEFINE_WAIT_NODE_FUNC(name, function) \ - struct hal_waitqueue_node name = { \ - xTaskGetCurrentTaskHandle(), \ - LIST_HEAD_INIT(((name).list)), \ - \ - function, \ - 0 \ - } - -#define HAL_DEFINE_WAIT_NODE(name) HAL_DEFINE_WAIT_NODE_FUNC(name, __wqueue_default_wake) - -#elif defined(CONFIG_RTTKERNEL) -#else -#error "can not support the RTOS!!" -#endif - -#endif - diff --git a/src/platform/f133/include/osal/hal_workqueue.h b/src/platform/f133/include/osal/hal_workqueue.h deleted file mode 100644 index 5bf9222c9b73138256bc13dc3609bd83a1513818..0000000000000000000000000000000000000000 --- a/src/platform/f133/include/osal/hal_workqueue.h +++ /dev/null @@ -1,105 +0,0 @@ -#ifndef SUNXI_HAL_WORKQUEUE_H -#define SUNXI_HAL_WORKQUEUE_H - -#ifdef __cplusplus -extern "C" -{ -#endif -#include -#include - -#ifdef CONFIG_KERNEL_FREERTOS -#include -#include -#include - -#ifdef CONFIG_SMP -#include -#endif - -#include -#include -#include -#include - -enum -{ - HAL_WORK_STATE_PENDING = 0x0001, /* Work item pending state */ - HAL_WORK_STATE_SUBMITTING = 0x0002, /* Work item submitting state */ -}; - -enum -{ - HAL_WORK_TYPE_DELAYED = 0x0001, -}; - -typedef struct _hal_work hal_work; - -typedef struct _hal_workqueue -{ - struct list_head work_list; - hal_work *work_current; - - hal_sem_t sem; - void *work_thread; -#ifdef CONFIG_SMP - hal_spinlock_t llock; -#endif -} hal_workqueue; - -struct _hal_work -{ - struct list_head list; - - void (*work_func)(hal_work *work, void *work_data); - void *work_data; - uint16_t flags; - uint16_t type; - osal_timer_t timer; - hal_workqueue *workqueue; -}; - -typedef struct _hal_delayed_work -{ - hal_work work; -} hal_delayed_work; - -hal_workqueue *hal_workqueue_create(const char *name, uint16_t stack_size, uint8_t priority); -int hal_workqueue_destroy(hal_workqueue *queue); -int hal_workqueue_dowork(hal_workqueue *queue, hal_work *work); -int hal_workqueue_submit_work(hal_workqueue *queue, hal_work *work, hal_tick_t time); -int hal_workqueue_cancel_work(hal_workqueue *queue, hal_work *work); -int hal_workqueue_cancel_work_sync(hal_workqueue *queue, hal_work *work); - -int hal_work_submit(hal_work *work, hal_tick_t time); -int hal_work_cancel(hal_work *work); - -void hal_work_init(hal_work *work, void (*work_func)(hal_work *work, void *work_data), void *work_data); - -void hal_delayed_work_init(hal_delayed_work *work, void (*work_func)(hal_work *work, void *work_data), void *work_data); - -int hal_work_sys_workqueue_init(void); - -#elif defined(CONFIG_RTTKERNEL) - -#include -#include -#include - -typedef struct rt_workqueue hal_workqueue; -typedef struct rt_work hal_work; - -#define hal_work_init rt_work_init -hal_workqueue *hal_workqueue_create(const char *name, unsigned short stack_size, unsigned char priority); -int hal_workqueue_destroy(hal_workqueue *queue); -int hal_workqueue_dowork(hal_workqueue *queue, hal_work *work); -int hal_workqueue_submit_work(hal_workqueue *queue, hal_work *work, hal_tick_t time); -int hal_workqueue_cancel_work(hal_workqueue *queue, hal_work *work); -int hal_workqueue_cancel_work_sync(hal_workqueue *queue, hal_work *work); - -#else -#error "can not support the RTOS!!" -#endif - -#endif - diff --git a/src/platform/f133/include/platform.h b/src/platform/f133/include/platform.h index c3be4b5b9f4fb39ec094dd0b67462e6e38b0ebf4..30825673cbf7dd990202031e8e6d3ee85189d335 100644 --- a/src/platform/f133/include/platform.h +++ b/src/platform/f133/include/platform.h @@ -12,7 +12,7 @@ #ifndef __PLATFORM_HEADER__ #define __PLATFORM_HEADER__ -#include +#include #define DRAM_SIZE_DEFAULT (64 * NX_MB) diff --git a/src/platform/f133/libos/abs.c b/src/platform/f133/libos/abs.c deleted file mode 100644 index e721fdc2b17e7917430eca885297b6e2d47986a1..0000000000000000000000000000000000000000 --- a/src/platform/f133/libos/abs.c +++ /dev/null @@ -1,6 +0,0 @@ -#include - -int abs(int a) -{ - return a>0 ? a : -a; -} diff --git a/src/platform/f133/libos/c906_cache.c b/src/platform/f133/libos/c906_cache.c deleted file mode 100644 index d7a4cf1efa6757416c4a9e5f0f73feb3fc42b1c0..0000000000000000000000000000000000000000 --- a/src/platform/f133/libos/c906_cache.c +++ /dev/null @@ -1,163 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#include - -#define L1_CACHE_BYTES (64) - -/** - * GCC version not support t-head cache flush, so we use fixed code to achieve. - * The following function cannot be optimized. - */ -static void dcache_wb_range(unsigned long start, unsigned long end) __attribute__((optimize("O0"))); -static void dcache_inv_range(unsigned long start, unsigned long end) __attribute__((optimize("O0"))); -static void dcache_wbinv_range(unsigned long start, unsigned long end) __attribute__((optimize("O0"))); -static void icache_inv_range(unsigned long start, unsigned long end) __attribute__((optimize("O0"))); - -static void dcache_wb_range(unsigned long start, unsigned long end) -{ - unsigned long i = start & ~(L1_CACHE_BYTES - 1); - - for (; i < end; i += L1_CACHE_BYTES) - { - /* asm volatile("dcache.cva %0\n"::"r"(i):"memory"); */ - /* - * compiler always use a5 = i. - * a6 not used, so we use a6 here. - */ - asm volatile("mv a6, %0\n"::"r"(i):"memory"); /* a6 = a5(i) */ - asm volatile(".long 0x0257800b"); /* dcache.cva a6 */ - } - asm volatile(".long 0x01b0000b"); /* sync.is */ -} - -static void dcache_inv_range(unsigned long start, unsigned long end) -{ - unsigned long i = start & ~(L1_CACHE_BYTES - 1); - - for (; i < end; i += L1_CACHE_BYTES) - { - /* asm volatile("dcache.iva %0\n"::"r"(i):"memory"); */ - asm volatile("mv a6, %0\n"::"r"(i):"memory"); /* a6 = a5(i) */ - asm volatile(".long 0x0268000b"); /* dcache.iva a6 */ - } - asm volatile(".long 0x01b0000b"); -} - -static void dcache_wbinv_range(unsigned long start, unsigned long end) -{ - unsigned long i = start & ~(L1_CACHE_BYTES - 1); - - for (; i < end; i += L1_CACHE_BYTES) - { - /* asm volatile("dcache.civa %0\n"::"r"(i):"memory"); */ - asm volatile("mv a6, %0\n"::"r"(i):"memory"); /* a6 = a5(i) */ - asm volatile(".long 0x0278000b"); /* dcache.civa a6 */ - } - asm volatile(".long 0x01b0000b"); -} - -static void icache_inv_range(unsigned long start, unsigned long end) -{ - unsigned long i = start & ~(L1_CACHE_BYTES - 1); - - for (; i < end; i += L1_CACHE_BYTES) - { - /* asm volatile("icache.iva %0\n"::"r"(i):"memory"); */ - asm volatile("mv a6, %0\n"::"r"(i):"memory"); /* a6 = a5(i) */ - asm volatile(".long 0x0308000b"); /* icache.iva a6 */ - } - asm volatile(".long 0x01b0000b"); -} - -void awos_arch_clean_dcache(void) -{ - /* asm volatile("dcache.call\n":::"memory"); */ - asm volatile(".long 0x0010000b\n":::"memory"); -} - -void awos_arch_clean_flush_dcache(void) -{ - /* asm volatile("dcache.ciall\n":::"memory"); */ - asm volatile(".long 0x0030000B\n":::"memory"); -} - -void awos_arch_flush_dcache(void) -{ - /* asm volatile("dcache.iall\n":::"memory"); */ - asm volatile(".long 0x0020000B\n":::"memory"); -} - -void awos_arch_flush_icache_all(void) -{ - // asm volatile("icache.iall\n":::"memory"); - asm volatile(".long 0x0100000B\n":::"memory"); -} - -void awos_arch_mems_flush_icache_region(unsigned long start, unsigned long len) -{ - icache_inv_range(start, start + len); -} - -void awos_arch_mems_clean_dcache_region(unsigned long start, unsigned long len) -{ - dcache_wb_range(start, start + len); -} - -void awos_arch_mems_clean_flush_dcache_region(unsigned long start, unsigned long len) -{ - dcache_wbinv_range(start, start + len); -} - -void awos_arch_mems_flush_dcache_region(unsigned long start, unsigned long len) -{ - dcache_inv_range(start, start + len); -} - -void awos_arch_clean_flush_cache(void) -{ - awos_arch_clean_flush_dcache(); - awos_arch_flush_icache_all(); -} - -void awos_arch_clean_flush_cache_region(unsigned long start, unsigned long len) -{ - awos_arch_mems_clean_flush_dcache_region(start, len); - awos_arch_mems_flush_icache_region(start, len); -} - -void awos_arch_flush_cache(void) -{ - awos_arch_flush_dcache(); - awos_arch_flush_icache_all(); -} - diff --git a/src/platform/f133/libos/cfg.c b/src/platform/f133/libos/cfg.c deleted file mode 100644 index 20ef891f41bf032f2bc4fbf08072140034cd355f..0000000000000000000000000000000000000000 --- a/src/platform/f133/libos/cfg.c +++ /dev/null @@ -1,226 +0,0 @@ - -#include -#include -#include -#include -#include - -NX_WEAK_SYM int32_t hal_spi_gpio_cfg_count(const char *secname) -{ - NX_Printf("FUNCTION:%s not implemented.\n", __FUNCTION__); - return 0; -} - -int32_t esCFG_GetGPIOSecKeyCount(char *GPIOSecName) -{ - // int id; - - if (!NX_StrCmp(GPIOSecName, "pwm1") || !NX_StrCmp(GPIOSecName, "pwm2") || !NX_StrCmp(GPIOSecName, "pwm7")) - { - return 1; - } - else if (!NX_StrCmp(GPIOSecName, "sdc0") || !NX_StrCmp(GPIOSecName, "sdc1")) - { - return 6; - } - else if (!NX_StrCmp(GPIOSecName, "spi0")) - { - return hal_spi_gpio_cfg_count(GPIOSecName); - } -#if 0 - else if (sscanf(GPIOSecName, "twi%d", &id) == 1) - { - return 2; - } -#endif - return 0; -} - -NX_WEAK_SYM int hal_spi_gpio_cfg_load(user_gpio_set_t *gpio_cfg, int32_t GPIONum, int id) -{ - NX_Printf("FUNCTION:%s not implemented.\n", __FUNCTION__); - return -1; -} - -NX_WEAK_SYM int hal_i2c_gpio_cfg_load(user_gpio_set_t *gpio_cfg, int32_t GPIONum, int id) -{ - NX_Printf("FUNCTION:%s not implemented.\n", __FUNCTION__); - return -1; -} - -#define CFG_GPIO_PORT(p) ((p) - 'A' + 1) - -int32_t esCFG_GetGPIOSecData(char *GPIOSecName, void *pGPIOCfg, int32_t GPIONum) -{ - user_gpio_set_t *gpio_cfg = (user_gpio_set_t *) pGPIOCfg; - int i; - // int id; - - if (!NX_StrCmp(GPIOSecName, "pwm1")) - { - NX_StrCopyN(gpio_cfg->gpio_name, "PB6", 4); - gpio_cfg->data = 0; - gpio_cfg->drv_level = 3; - gpio_cfg->mul_sel = 5; // PWM - gpio_cfg->port = CFG_GPIO_PORT('B'); // PORT-G - gpio_cfg->port_num = 6; // PG13 - gpio_cfg->pull = 0; // pull disable - } - else if (!NX_StrCmp(GPIOSecName, "pwm2")) - { - NX_StrCopyN(gpio_cfg->gpio_name, "PG13", 5); - gpio_cfg->data = 0; - gpio_cfg->drv_level = 3; - gpio_cfg->mul_sel = 5; // PWM - gpio_cfg->port = CFG_GPIO_PORT('G'); // PORT-G - gpio_cfg->port_num = 13; // PG13 - gpio_cfg->pull = 0; // pull disable - } - else if (!NX_StrCmp(GPIOSecName, "pwm7")) - { - NX_StrCopyN(gpio_cfg->gpio_name, "PD22", 5); - gpio_cfg->data = 0; - gpio_cfg->drv_level = 3; - gpio_cfg->mul_sel = 5; // PWM - gpio_cfg->port = CFG_GPIO_PORT('D'); // PORT-D - gpio_cfg->port_num = 22; // PD22 - gpio_cfg->pull = 0; // pull disable - } - else if (!NX_StrCmp(GPIOSecName, "sdc0")) - { - /* - [sdc0] - ;sdc0_used = 1 - ;bus-width = 4 - sdc0_d1 = port:PF00<2><1><1> - sdc0_d0 = port:PF01<2><1><1> - sdc0_clk = port:PF02<2><1><1> - sdc0_cmd = port:PF03<2><1><1> - sdc0_d3 = port:PF04<2><1><1> - sdc0_d2 = port:PF05<2><1><1> - */ - for (i = 0; i < GPIONum; i++) - { - NX_StrCopy(gpio_cfg->gpio_name, GPIOSecName); - gpio_cfg->port = CFG_GPIO_PORT('F'); - gpio_cfg->port_num = i; - gpio_cfg->mul_sel = 2; - gpio_cfg->pull = 1; - gpio_cfg->drv_level = 1; - gpio_cfg->data = 0; - gpio_cfg++; - } - } - else if (!NX_StrCmp(GPIOSecName, "sdc1")) - { - /* - [sdc1] - ;sdc1_used = 1 - ;bus-width= 4 - sdc1_clk = port:PG00<2><1><1> - sdc1_cmd = port:PG01<2><1><1> - sdc1_d0 = port:PG02<2><1><1> - sdc1_d1 = port:PG03<2><1><1> - sdc1_d2 = port:PG04<2><1><1> - sdc1_d3 = port:PG05<2><1><1> - */ - for (i = 0; i < GPIONum; i++) - { - NX_StrCopy(gpio_cfg->gpio_name, GPIOSecName); - gpio_cfg->port = CFG_GPIO_PORT('G'); - gpio_cfg->port_num = i; - gpio_cfg->mul_sel = 2; - gpio_cfg->pull = 1; - gpio_cfg->drv_level = 1; - gpio_cfg->data = 0; - gpio_cfg++; - } - } -#if 0 - else if (sscanf(GPIOSecName, "spi%d", &id) == 1) - { - return hal_spi_gpio_cfg_load(gpio_cfg, GPIONum, id); - } - else if (sscanf(GPIOSecName, "twi%d", &id) == 1) - { - extern int hal_i2c_gpio_cfg_load(user_gpio_set_t *gpio_cfg, int32_t GPIONum, int id); - return hal_i2c_gpio_cfg_load(gpio_cfg, GPIONum, id); - } -#endif - return 0; -} - -int32_t esCFG_GetKeyValue(char *SecName, char *KeyName, int32_t Value[], int32_t Count) -{ - if (!NX_StrCmp("target", SecName)) - { - /* - [target] - boot_clock = 1008 - storage_type = 1 - */ - if (!NX_StrCmp("storage_type", KeyName)) - { - if (Count == 1) - { - *Value = 1; - return 0; - } - } - else if (!NX_StrCmp("boot_clock", KeyName)) - { - if (Count == 1) - { - *Value = 1008; - return 0; - } - } - } - else if (!NX_StrCmp("card_product", SecName)) - { - /* - [card_product] - card_product_used = 1 - card_product_storage = 3 - */ - if (!NX_StrCmp("card_product_used", KeyName)) - { - if (Count == 1) - { - *Value = 1; - return 0; - } - } else if (!NX_StrCmp("card_product_storage", KeyName)) - { - if (Count == 1) - { - *Value = 3; - return 0; - } - } - } - else if (!NX_StrCmp("sdcard_global", SecName)) - { - /* - [sdcard_global] - used_card_no = 0x01 - ;used_card_no = 0x01, when use card0 - ;used_card_no = 0x02, when use card1 - ;used_card_no = 0x03, when use card0 & card1 - internal_card = 0x00 - ;internal_card = 0x00, 无内置卡内置卡 - ;internal_card = 0x01, card0 做内置卡 - ;internal_card = 0x02, card1 做内置卡 - */ - if (!NX_StrCmp("internal_card", KeyName)) - { - *Value = 0x01; - return 0; - } else if (!NX_StrCmp("used_card_no", KeyName)) - { - *Value = 0x03; - return 0; - } - } - return -1; -} diff --git a/src/platform/f133/libos/irq.c b/src/platform/f133/libos/irq.c deleted file mode 100644 index c5a39ae49c279e79c24b3c695bb50e4709234db2..0000000000000000000000000000000000000000 --- a/src/platform/f133/libos/irq.c +++ /dev/null @@ -1,42 +0,0 @@ - -#include -#include -#include - -void local_irq_enable(void) -{ - NX_IRQ_Enable(); -} - -void local_irq_disable(void) -{ - NX_IRQ_Disable(); -} - -void enable_irq(unsigned int irq) -{ - NX_IRQ_Unmask(irq); -} - -void disable_irq(unsigned int irq) -{ - NX_IRQ_Mask(irq); -} - -const void *free_irq(unsigned int irq, void *dev_id) -{ - NX_IRQ_Unbind(irq, dev_id); - - return NX_NULL; -} - -int request_threaded_irq(unsigned int irq, irq_handler_t handler, - irq_handler_t thread_fn, unsigned long irqflags, - const char *devname, void *dev_id) -{ - if (NX_IRQ_Bind(irq, (NX_IRQ_Handler)handler, dev_id, (char *)devname, 0) != NX_EOK) - { - return -1; - } - return 0; -} diff --git a/src/platform/f133/libos/malloc.c b/src/platform/f133/libos/malloc.c deleted file mode 100644 index a94477a2651091fcc66f925dd016b7e48b8590ce..0000000000000000000000000000000000000000 --- a/src/platform/f133/libos/malloc.c +++ /dev/null @@ -1,22 +0,0 @@ -#include -#include - -void* malloc( size_t size ) -{ - return (void *)NX_MemAlloc(size); -} - -void *realloc( void *ptr, size_t new_size ) -{ - return (void *)NX_MemReAlloc(ptr, new_size); -} - -void* calloc( size_t num, size_t size ) -{ - return (void *)NX_MemAlloc(num * size); -} - -void free( void* ptr ) -{ - NX_MemFree(ptr); -} diff --git a/src/platform/f133/libos/strcmp.c b/src/platform/f133/libos/strcmp.c deleted file mode 100644 index 808bd8370ddeca3a2cfc124601cbd6012be89f80..0000000000000000000000000000000000000000 --- a/src/platform/f133/libos/strcmp.c +++ /dev/null @@ -1,7 +0,0 @@ -#include - -int strcmp(const char *l, const char *r) -{ - for (; *l==*r && *l; l++, r++); - return *(unsigned char *)l - *(unsigned char *)r; -} diff --git a/src/platform/f133/nxos.mk b/src/platform/f133/nxos.mk index c21f3e6e49d50bcdf837199bc035d57acccd5802..cf79cca36caf4f66bdabdaa3b81b782739edb271 100644 --- a/src/platform/f133/nxos.mk +++ b/src/platform/f133/nxos.mk @@ -13,20 +13,7 @@ # Override default variables. # -CFLAGS += -fvar-tracking -mno-relax -nostdlib -nostdinc -include nx_configure.h +CFLAGS += -fvar-tracking -mno-relax ASFLAGS += -ffunction-sections -fdata-sections -ffreestanding MCFLAGS += -march=rv64imafdc -mabi=lp64d -mcmodel=medany LDFLAGS += -no-pie -n - -# -# Include header files -# -INCDIRS := platform/f133/include/osal -INCDIRS += platform/f133/include/libos -INCDIRS += platform/f133/include/libos/libc -INCDIRS += platform/f133/include/hal - -# hal driver -INCDIRS += platform/f133/hal -INCDIRS += platform/f133/hal/ccmu -INCDIRS += platform/f133/hal/ccmu/sunxi-ng/ diff --git a/src/platform/f133/osal/Kconfig b/src/platform/f133/osal/Kconfig deleted file mode 100644 index 6b3003671c4f9558858704f520755dac103a616c..0000000000000000000000000000000000000000 --- a/src/platform/f133/osal/Kconfig +++ /dev/null @@ -1,19 +0,0 @@ -menu "Osal Setup" - -config DRIVER_OSAL_CFG - bool "Osal Config" - default y - help - config interface for sys_config.fex - -if DRIVER_OSAL_CFG - config SYSCONF_BUILDIN - bool "sys_config.bin build in kernel image." - default n -endif - -config CACHE_ALIGN_CHECK - bool "Check Memory Address Alignment for Cache Operation" - default n - -endmenu diff --git a/src/platform/f133/osal/Makefile b/src/platform/f133/osal/Makefile deleted file mode 100644 index b58cbfa85b6beead20939e751ba0268c4e4e0588..0000000000000000000000000000000000000000 --- a/src/platform/f133/osal/Makefile +++ /dev/null @@ -1 +0,0 @@ -SRC += src/ diff --git a/src/platform/f133/osal/src/Makefile b/src/platform/f133/osal/src/Makefile deleted file mode 100644 index 487d0cbafebfb4deb693f5d1195e5e24168fd0f5..0000000000000000000000000000000000000000 --- a/src/platform/f133/osal/src/Makefile +++ /dev/null @@ -1 +0,0 @@ -SRC += *.c \ No newline at end of file diff --git a/src/platform/f133/osal/src/hal_atomic.c b/src/platform/f133/osal/src/hal_atomic.c deleted file mode 100644 index 3703549a547406662f6216787eaf32ac00c0283e..0000000000000000000000000000000000000000 --- a/src/platform/f133/osal/src/hal_atomic.c +++ /dev/null @@ -1,74 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#include -#include - -int hal_spin_lock_init(hal_spinlock_t *lock) -{ - NX_SpinInit(lock); - return 0; -} - -void hal_spin_lock(hal_spinlock_t *lock) -{ - NX_SpinLock(lock); - return; -} - -void hal_spin_unlock(hal_spinlock_t *lock) -{ - NX_SpinUnlock(lock); - return; -} - -unsigned long hal_spin_lock_irqsave(hal_spinlock_t *lock) -{ - NX_UArch flags; - NX_SpinLockIRQ(lock, &flags); - return (unsigned long)flags; -} - -/* TODO: handle lock */ -void hal_spin_unlock_irqrestore(hal_spinlock_t *lock, unsigned long __cpsr) -{ - NX_SpinUnlockIRQ(lock, __cpsr); -} - -void hal_enter_critical(void) -{ - NX_IRQ_Disable(); -} - -void hal_exit_critical(void) -{ - NX_IRQ_Enable(); -} diff --git a/src/platform/f133/osal/src/hal_cache.c b/src/platform/f133/osal/src/hal_cache.c deleted file mode 100644 index 6e74990b3009b039aa8dd2ffa8488ede039cc741..0000000000000000000000000000000000000000 --- a/src/platform/f133/osal/src/hal_cache.c +++ /dev/null @@ -1,105 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#include -#include - -#ifdef CONFIG_CACHE_ALIGN_CHECK -#include - -#ifdef CONFIG_DEBUG_BACKTRACE -/*#if 0*/ -#include -#include -#define CACHELINE_CHECK(option) \ -{ \ - if (!option) { \ - printf("[%s] cacheline check failed\n", __func__); \ - backtrace(NULL, NULL, 0, 0, printf); \ - assert(0); \ - } \ -} while (0) - -#else -#define CACHELINE_CHECK(option) \ -{ \ - NX_ASSERT(option); \ -} while (0) - -#endif /* CONFIG_DEBUG_BACKTRACE */ -#endif /* CACHE_ALIGN_CHECK */ - -void hal_dcache_clean(unsigned long vaddr_start, unsigned long size) -{ -#ifdef CONFIG_CACHE_ALIGN_CHECK - CACHELINE_CHECK(!(vaddr_start & (CACHELINE_LEN - 1))); - /*CACHELINE_CHECK((size % CACHELINE_LEN) == 0);*/ -#endif - awos_arch_mems_clean_dcache_region(vaddr_start, size); -} - -void hal_dcache_clean_invalidate(unsigned long vaddr_start, unsigned long size) -{ -#ifdef CONFIG_CACHE_ALIGN_CHECK - CACHELINE_CHECK(!(vaddr_start & (CACHELINE_LEN - 1))); - /*CACHELINE_CHECK((size % CACHELINE_LEN) == 0);*/ -#endif - awos_arch_mems_clean_flush_dcache_region(vaddr_start, size); -} - -void hal_dcache_invalidate(unsigned long vaddr_start, unsigned long size) -{ -#ifdef CONFIG_CACHE_ALIGN_CHECK - CACHELINE_CHECK(!(vaddr_start & (CACHELINE_LEN - 1))); - /*CACHELINE_CHECK((size % CACHELINE_LEN) == 0);*/ -#endif - awos_arch_mems_flush_dcache_region(vaddr_start, size); -} - -void hal_dcache_clean_all(void) -{ - awos_arch_clean_dcache(); -} - -void hal_dcache_invalidate_all(void) -{ - awos_arch_flush_dcache(); -} - -void hal_icache_invalidate_all(void) -{ - awos_arch_flush_icache_all(); -} - -void hal_icache_invalidate(unsigned long vaddr_start, unsigned long size) -{ - awos_arch_mems_flush_icache_region(vaddr_start, size); -} diff --git a/src/platform/f133/osal/src/hal_cfg.c b/src/platform/f133/osal/src/hal_cfg.c deleted file mode 100644 index 62f821e762034d3e81c47cb4e90e4e279adb8161..0000000000000000000000000000000000000000 --- a/src/platform/f133/osal/src/hal_cfg.c +++ /dev/null @@ -1,174 +0,0 @@ -/* -********************************************************************************************************* -* MELIS -* the Easy Portable/Player Develop Kits -* Config system -* -* (c) Copyright 2011-2014, Sunny China -* All Rights Reserved -* -* File : sys_config.c -* By : Sunny -* Version : v1.0 -* Date : 2011-4-28 -* Descript: system config sevice functions. -* Update : date auther ver notes -* 2011-4-28 20:57:56 Sunny 1.0 Create this file. -********************************************************************************************************* -*/ -#include "hal_cfg.h" - -int32_t esCFG_GetKeyValue(char *SecName, char *KeyName, int32_t Value[], int32_t Count); -int32_t esCFG_GetGPIOSecKeyCount(char *GPIOSecName); -int32_t esCFG_GetGPIOSecData(char *GPIOSecName, void *pGPIOCfg, int32_t GPIONum); - -#if 0 -/* -********************************************************************************************************* -* INITIALIZE CONFIG SYSTEM -* -* Description: -* -* Arguments : -* -* Returns : -* -* Note : -********************************************************************************************************* -*/ -int32_t Hal_Cfg_Init(uint8_t *CfgVAddr, uint32_t size) -{ - return esCFG_Init(CfgVAddr, size); -} - -/* -********************************************************************************************************* -* EXIT CONFIG SYSTEM -* -* Description: -* -* Arguments : -* -* Returns : -* -* Note : -********************************************************************************************************* -*/ -int32_t Hal_Cfg_Exit(void) -{ - return esCFG_Exit(); -} -#endif - -/* -********************************************************************************************************* -* 根据主键名称和子键名称获取脚本数据 -* -* Description: -* -* Arguments : main_name 主键名称 -* -* sub_name 子键名称 -* -* value 存放数据的buffer -* -* count buffer的最大个数 -* -* -* Returns : 获取数据是否成功 -* -* Notes : -********************************************************************************************************* -*/ -int32_t Hal_Cfg_GetKeyValue(char *SecName, char *KeyName, int32_t Value[], int32_t Count) -{ - return esCFG_GetKeyValue(SecName, KeyName, Value, Count); -} - -#if 0 -/* -********************************************************************************************************* -* 根据主键名称，获取主键下的子键总共个数 -* -* Description: -* -* Arguments : main_name 主键名称 -* -* -* -* Returns : 如果成功，返回子键个数 -* 如果失败，返回负数 -* -* Notes : -********************************************************************************************************* -*/ -int32_t Hal_Cfg_GetSecKeyCount(char *SecName) -{ - return esCFG_GetSecKeyCount(SecName); -} - -/* -********************************************************************************************************* -* 获取总共主键的个数 -* -* Description: -* -* Arguments : -* -* -* -* Returns : 如果成功，返回主键个数 -* 如果失败，返回负数 -* -* Notes : -********************************************************************************************************* -*/ -int32_t Hal_Cfg_GetSecCount(void) -{ - return esCFG_GetSecCount(); -} -#endif -/* -********************************************************************************************************* -* 根据主键名称，获取主键下的GPIO类型总共个数 -* -* Description: -* -* Arguments : main_name 主键名称 -* -* -* -* Returns : 如果成功，返回主键个数 -* 如果失败，返回负数 -* -* Notes : -********************************************************************************************************* -*/ -int32_t Hal_Cfg_GetGPIOSecKeyCount(char *GPIOSecName) -{ - return esCFG_GetGPIOSecKeyCount(GPIOSecName); -} - -/* -********************************************************************************************************* -* 根据主键名称，获取主键下的GPIO类型的所有数据 -* -* Description: -* -* Arguments : main_name 主键名称 -* -* gpio_cfg 存放GPIO数据信息的buffer -* -* gpio_count GPIO的总共个数 -* -* -* Returns : 如果成功，返回成功标志 -* 如果失败，返回负数 -* -* Notes : -********************************************************************************************************* -*/ -int32_t Hal_Cfg_GetGPIOSecData(char *GPIOSecName, void *pGPIOCfg, int32_t GPIONum) -{ - return esCFG_GetGPIOSecData(GPIOSecName, pGPIOCfg, GPIONum); -} diff --git a/src/platform/f133/osal/src/hal_event.cc b/src/platform/f133/osal/src/hal_event.cc deleted file mode 100644 index cbbe88363f56c9e1be323797def1e68605f2dbc7..0000000000000000000000000000000000000000 --- a/src/platform/f133/osal/src/hal_event.cc +++ /dev/null @@ -1,59 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include - -int hal_event_init(hal_event_t ev) -{ - return rt_event_init(ev, "melis_event", RT_IPC_FLAG_FIFO); -} - -int hal_event_datach(hal_event_t ev) -{ - return rt_event_detach(ev); -} - -hal_event_t hal_event_create(void) -{ - return rt_event_create("melis_event", 0, RT_IPC_FLAG_FIFO); -} - -hal_event_t hal_event_create_initvalue(int init_value) -{ - return rt_event_create("melis_event", init_value, RT_IPC_FLAG_FIFO); -} - -int hal_event_delete(hal_event_t ev) -{ - if (!ev) - { - return -EINVAL; - } - - return rt_event_delete(ev); -} - -hal_event_bits_t hal_event_wait(hal_event_t ev, hal_event_bits_t evs, uint8_t option, unsigned long timeout) -{ - hal_event_bits_t bits; - rt_event_recv(ev, evs, option, MS_TO_OSTICK(timeout), &bits); - return bits; -} - -int hal_event_set_bits(hal_event_t ev, hal_event_bits_t evs) -{ - if (!ev) - { - return -EINVAL; - } - return rt_event_send(ev, evs); -} - -hal_event_bits_t hal_event_get(hal_event_t ev) - hal_event_bits_t evs = 0; - rt_event_control(ev, RT_IPC_CMD_GET_STATE, &evs); - return evs; -} diff --git a/src/platform/f133/osal/src/hal_interrupt.c b/src/platform/f133/osal/src/hal_interrupt.c deleted file mode 100644 index c9ae19465dad8229f49965d61b3d96b0e12e539b..0000000000000000000000000000000000000000 --- a/src/platform/f133/osal/src/hal_interrupt.c +++ /dev/null @@ -1,89 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#include -#include -#include - -#if defined(CONFIG_KERNEL_FREERTOS) -#include -#endif - -int32_t hal_request_irq(int32_t irq, hal_irq_handler_t handler, const char *name, void *data) -{ - return request_irq(irq, (irq_handler_t)handler, 0, name, data); -} - -void hal_free_irq(int32_t irq) -{ - free_irq(irq, NULL); -} - -int hal_enable_irq(int32_t irq) -{ - enable_irq(irq); - - return 0; -} - -void hal_disable_irq(int32_t irq) -{ - disable_irq(irq); -} - -uint32_t hal_interrupt_get_nest(void) -{ - //uint32_t nest = rt_interrupt_get_nest(); - //return nest; - return 0; -} - -void hal_interrupt_enable(void) -{ - void local_irq_enable(void); - local_irq_enable(); -} - -void hal_interrupt_disable(void) -{ - void local_irq_disable(void); - local_irq_disable(); -} - -unsigned long hal_interrupt_save(void) -{ - return NX_IRQ_SaveLevel(); -} - -void hal_interrupt_restore(unsigned long flag) -{ - return NX_IRQ_RestoreLevel(flag); -} diff --git a/src/platform/f133/osal/src/hal_mem.c b/src/platform/f133/osal/src/hal_mem.c deleted file mode 100644 index 3e60631a188581158d2e3a6a2b39e0065906835f..0000000000000000000000000000000000000000 --- a/src/platform/f133/osal/src/hal_mem.c +++ /dev/null @@ -1,68 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#include -#include - -#include - -void *hal_malloc(uint32_t size) -{ - return NX_MemAlloc(size); -} - -void *hal_calloc(uint32_t count, uint32_t size) -{ - return NX_MemAlloc(count * size); -} - -void *hal_realloc(void *ptr, uint32_t size) -{ - return NX_MemReAlloc(ptr, size); -} - -void hal_free(void *p) -{ - NX_MemFree(p); -} - -void *hal_malloc_align(uint32_t size, int align) -{ - /** - * FIXME: use aligned malloc - */ - return NX_MemAlloc(size); -} - -void hal_free_align(void *p) -{ - NX_MemFree(p); -} diff --git a/src/platform/f133/osal/src/hal_mutex.c b/src/platform/f133/osal/src/hal_mutex.c deleted file mode 100644 index 4f05afd00787e705086d955eefd46138ccf7b73e..0000000000000000000000000000000000000000 --- a/src/platform/f133/osal/src/hal_mutex.c +++ /dev/null @@ -1,111 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#include -#include - -#define PEND_TICK_MAX (0x7FFFFFFF - 1) -#define HAL_MUTEX_OK 0 - -hal_mutex_t hal_mutex_create(void) -{ - hal_mutex_t mutex; - - mutex = hal_malloc(sizeof(NX_Mutex)); - if (mutex == NULL) - { - return NULL; - } - NX_MutexInit(mutex); - return mutex; -} - -int hal_mutex_delete(hal_mutex_t mutex) -{ - if (!mutex) - { - return -1; - } - hal_free(mutex); - return 0; -} - -int hal_mutex_lock(hal_mutex_t mutex) -{ - if (!mutex) - { - return -1; - } - if (NX_MutexLock(mutex) != NX_EOK) - { - return -2; - } - return 0; -} - -int hal_mutex_unlock(hal_mutex_t mutex) -{ - if (!mutex) - { - return -1; - } - if (NX_MutexUnlock(mutex) != NX_EOK) - { - return -2; - } - return 0; -} - -int hal_mutex_trylock(hal_mutex_t mutex) -{ - if (!mutex) - { - return -1; - } - if (NX_MutexTryLock(mutex) != NX_EOK) - { - return -2; - } - return 0; -} - -int hal_mutex_timedwait(hal_mutex_t mutex, int ticks) -{ - if (!mutex) - { - return -1; - } - if (NX_MutexLockTimeoutTicks(mutex, ticks) != NX_EOK) - { - return -2; - } - return 0; -} diff --git a/src/platform/f133/osal/src/hal_queue.c b/src/platform/f133/osal/src/hal_queue.c deleted file mode 100644 index 6a344fc44e0da187a21f34b718dba333f765cfb7..0000000000000000000000000000000000000000 --- a/src/platform/f133/osal/src/hal_queue.c +++ /dev/null @@ -1,133 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#include -#include -#include - -hal_mailbox_t hal_mailbox_create(const char *name, unsigned int size) -{ - return NX_MailboxCreate(size); -} - -int hal_mailbox_delete(hal_mailbox_t mailbox) -{ - if (mailbox == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - NX_MailboxDestroy(mailbox); - return 0; -} - -int hal_mailbox_send(hal_mailbox_t mailbox, unsigned int value) -{ - if (mailbox == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - if (NX_MailboxTrySend(mailbox, value) != NX_EOK) - { - // timeout. - return -2; - } - - return 0; -} - -int hal_mailbox_send_wait(hal_mailbox_t mailbox, unsigned int value, int timeout) -{ - if (mailbox == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - if (timeout == -1) - { - if (NX_MailboxSend(mailbox, value) != NX_EOK) - { - return -2; - } - } - else if (NX_MailboxSendTimeout(mailbox, value, NX_TICKS_TO_MILLISECOND(timeout)) != NX_EOK) - { - // timeout. - return -2; - } - - return 0; -} - -int hal_mailbox_recv(hal_mailbox_t mailbox, unsigned int *value, int timeout) -{ - NX_UArch tmp = 0; - if (mailbox == NULL || value == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - if (timeout == -1) - { - if (NX_MailboxReceive(mailbox, &tmp) != NX_EOK) - { - return -2; - } - } - else if (NX_MailboxReceiveTimeout(mailbox, &tmp, NX_TICKS_TO_MILLISECOND(timeout)) != NX_EOK) - { - // timeout. - return -2; - } - - *value = (unsigned int)tmp; - - return 0; -} - -int hal_is_mailbox_empty(hal_mailbox_t mailbox) -{ - if (mailbox == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - if (NX_MailboxCheckEmpty(mailbox) != NX_EOK) - return 0; - - return 1; -} diff --git a/src/platform/f133/osal/src/hal_queue.c2 b/src/platform/f133/osal/src/hal_queue.c2 deleted file mode 100644 index 213fcfd696e7ad5c1c9e8bb291617deef45b8e65..0000000000000000000000000000000000000000 --- a/src/platform/f133/osal/src/hal_queue.c2 +++ /dev/null @@ -1,129 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#include -#include -#include -#include - -hal_mailbox_t hal_mailbox_create(const char *name, unsigned int size) -{ - return rt_mb_create(name, size, RT_IPC_FLAG_FIFO); -} - -int hal_mailbox_delete(hal_mailbox_t mailbox) -{ - if (mailbox == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - rt_mb_delete(mailbox); - return 0; -} - -int hal_mailbox_send(hal_mailbox_t mailbox, unsigned int value) -{ - rt_err_t ret; - - if (mailbox == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - ret = rt_mb_send(mailbox, value); - if (ret != RT_EOK) - { - // timeout. - return -2; - } - - return 0; -} - -int hal_mailbox_send_wait(hal_mailbox_t mailbox, unsigned int value, int timeout) -{ - rt_err_t ret; - - if (mailbox == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - ret = rt_mb_send_wait(mailbox, value, timeout); - if (ret != RT_EOK) - { - // timeout. - return -2; - } - - return 0; -} - -int hal_mailbox_recv(hal_mailbox_t mailbox, unsigned int *value, int timeout) -{ - rt_err_t ret; - - if (mailbox == NULL || value == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - ret = rt_mb_recv(mailbox, (rt_ubase_t *)value, timeout); - if (ret != RT_EOK) - { - return -2; - } - - return 0; -} - -int hal_is_mailbox_empty(hal_mailbox_t mailbox) -{ - rt_err_t ret = -1; - int arg; - - if (mailbox == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - ret = rt_mb_control(mailbox, RT_IPC_CMD_GET_STATE, &arg); - if (ret != RT_EOK) - return -2; - - return (arg == 0)? 1: 0; -} diff --git a/src/platform/f133/osal/src/hal_sem.c b/src/platform/f133/osal/src/hal_sem.c deleted file mode 100644 index 877f0e37bfea6cdaf33917170693a0337deb8593..0000000000000000000000000000000000000000 --- a/src/platform/f133/osal/src/hal_sem.c +++ /dev/null @@ -1,160 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#include -#include -#include - -hal_sem_t hal_sem_create(unsigned int cnt) -{ - hal_sem_t sem; - - sem = hal_malloc(sizeof(NX_Semaphore)); - if (sem == NULL) - { - return NULL; - } - NX_SemaphoreInit(sem, cnt); - return sem; -} - -int hal_sem_delete(hal_sem_t sem) -{ - if (sem == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - hal_free(sem); - return 0; -} - -int hal_sem_getvalue(hal_sem_t sem, int *val) -{ - if (sem == NULL || val == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - *val = NX_SemaphoreGetValue(sem); - - return 0; -} - -int hal_sem_post(hal_sem_t sem) -{ - if (sem == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - // must be success. - if (NX_SemaphoreSignal(sem) != NX_EOK) - { - return -1; - } - return 0; -} - -int hal_sem_timedwait(hal_sem_t sem, unsigned long ticks) -{ - NX_Error ret; - - if (sem == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - ret = NX_SemaphoreWaitTimeoutTicks(sem, ticks); - if (ret != NX_EOK) - { - // timeout. - return -2; - } - - return 0; -} - -int hal_sem_trywait(hal_sem_t sem) -{ - NX_Error ret; - - if (sem == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - ret = NX_SemaphoreTryWait(sem); - if (ret != NX_EOK) - { - // timeout. - return -2; - } - - return 0; -} - -int hal_sem_wait(hal_sem_t sem) -{ - NX_Error ret; - - if (sem == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - ret = NX_SemaphoreWait(sem); - if (ret != NX_EOK) - { - // timeout. - return -2; - } - - return 0; -} - -int hal_sem_clear(hal_sem_t sem) -{ - if (sem == NULL) - { - __err("fatal error, parameter is invalid."); - return -1; - } - - NX_SemaphoreInit(sem, 0); - return 0; -} \ No newline at end of file diff --git a/src/platform/f133/osal/src/hal_thread.cc b/src/platform/f133/osal/src/hal_thread.cc deleted file mode 100644 index ea25f1a7f3d0643fcbb9545f3876c6cfc89370f8..0000000000000000000000000000000000000000 --- a/src/platform/f133/osal/src/hal_thread.cc +++ /dev/null @@ -1,154 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#include - -#include -#include - -void *kthread_create(void (*threadfn)(void *data), void *data, const char *namefmt, int stacksize, int priority) -{ - rt_thread_t thr; - - thr = rt_thread_create(namefmt, threadfn, data, \ - stacksize, \ - priority, \ - HAL_THREAD_TIMESLICE); - - RT_ASSERT(thr != RT_NULL); - - return (void *)thr; -} - -int kthread_start(void *thread) -{ - rt_thread_t thr; - rt_err_t ret; - - RT_ASSERT(thread != RT_NULL); - - thr = (rt_thread_t)thread; - - ret = rt_thread_startup(thr); - - return ret; -} - -int kthread_msleep(int ms) -{ - return rt_thread_mdelay(ms); -} - -int kthread_sleep(int tick) -{ - return rt_thread_delay(tick); -} - -int kthread_stop(void *thread) -{ - rt_thread_t thr; - - if (thread == rt_thread_self() || thread == NULL) - { - void rt_thread_exit(void); - rt_thread_exit(); - CODE_UNREACHABLE; - } - else - { - rt_thread_delete((rt_thread_t)thread); - } - - return 0; -} - -int kthread_wakeup(void *thread) -{ - rt_thread_t thr; - rt_err_t err; - - RT_ASSERT(thread != RT_NULL); - - thr = (rt_thread_t)thread; - - err = rt_thread_resume(thr); - if (err) - { - return -1; - } - - return 0; -} - -int kthread_suspend(void *thread) -{ - rt_thread_t thr; - rt_err_t err; - - RT_ASSERT(thread != RT_NULL); - - thr = (rt_thread_t)thread; - - err = rt_thread_suspend(thr); - if (err) - { - return -1; - } - - return 0; -} - -void *kthread_self(void) -{ - return (void *)rt_thread_self(); -} - -int kthread_scheduler_is_running(void) -{ - return (rt_critical_level() == 0); -} - -int kthread_in_critical_context(void) -{ - if (hal_interrupt_get_nest()) - return 1; - if (kthread_scheduler_is_running()) - return 1; - if (hal_interrupt_is_disable()) - return 1; - - return 0; -} - -void kthread_tick_increase(void) -{ - rt_tick_increase(); -} diff --git a/src/platform/f133/osal/src/hal_timer.c b/src/platform/f133/osal/src/hal_timer.c deleted file mode 100644 index a847cb1e0224b723f601e31dcf0c180dab6e4442..0000000000000000000000000000000000000000 --- a/src/platform/f133/osal/src/hal_timer.c +++ /dev/null @@ -1,123 +0,0 @@ -/* -* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. -* -* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in -* the the People's Republic of China and other countries. -* All Allwinner Technology Co.,Ltd. trademarks are used with permission. -* -* DISCLAIMER -* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. -* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) -* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN -* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. -* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS -* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. -* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. -* -* -* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT -* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, -* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING -* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE -* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. -* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) -* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED -* OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -#include -#include -#include - -static NX_Bool osal_timer_handler(struct NX_Timer *timer, void *arg) -{ - timeout_func func = (timeout_func)NX_TimerGetExtension(timer); - func(arg); - return NX_True; -} - -osal_timer_t osal_timer_create(const char *name, - timeout_func timeout, - void *parameter, - unsigned int time, - unsigned char flag) -{ - osal_timer_t timer; - - timer = NX_TimerCreate(time, osal_timer_handler, parameter, flag); - if (timer != NX_NULL) - { - NX_TimerSetExtension(timer, timeout); - } - return timer; -} - -hal_status_t osal_timer_delete(osal_timer_t timer) -{ - if (NX_TimerDestroy(timer) != NX_EOK) - { - return HAL_ERROR; - } - return HAL_OK; -} - -hal_status_t osal_timer_start(osal_timer_t timer) -{ - if (NX_TimerStart(timer) != NX_EOK) - { - return HAL_ERROR; - } - return HAL_OK; -} - -hal_status_t osal_timer_stop(osal_timer_t timer) -{ - if (NX_TimerStop(timer) != NX_EOK) - { - return HAL_ERROR; - } - return HAL_OK; -} - -hal_status_t osal_timer_control(osal_timer_t timer, int cmd, void *arg) -{ - return HAL_ERROR; - // return rt_timer_control(timer, cmd, arg); -} - -int hal_sleep(unsigned int secs) -{ - NX_ThreadSleep(secs * MSEC_PER_SEC); - return 0; -} - -int hal_msleep(unsigned int msecs) -{ - NX_ThreadSleep(msecs); - return 0; -} - -int hal_usleep(unsigned int usecs) -{ - NX_ThreadSleep(usecs / USEC_PER_MSEC); - return 0; -} - -void hal_udelay(unsigned int us) -{ - NX_ClockTickDelayMillisecond(us / USEC_PER_MSEC); -} - -uint64_t hal_gettime_ns(void) -{ - return (uint64_t)NX_ClockGetMillisecond() * 1000LL * 1000LL; -} - -uint64_t hal_gettime_us(void) -{ - return (uint64_t)NX_ClockGetMillisecond() * 1000LL; -} diff --git a/src/platform/f133/tools/SBI/opensbi-f133.bin b/src/platform/f133/tools/SBI/opensbi-f133.bin new file mode 100644 index 0000000000000000000000000000000000000000..5b672910aa26cb7fc301368e684e382bcbf264e5 Binary files /dev/null and b/src/platform/f133/tools/SBI/opensbi-f133.bin differ diff --git a/src/platform/f133/tools/xfel/Drivers/zadig-2.7.exe b/src/platform/f133/tools/xfel/Drivers/zadig-2.7.exe new file mode 100644 index 0000000000000000000000000000000000000000..72f5b696b5e0538f6fdb53614f78d921089113f0 Binary files /dev/null and b/src/platform/f133/tools/xfel/Drivers/zadig-2.7.exe differ diff --git a/src/platform/f133/tools/xfel/libusb-1.0.dll b/src/platform/f133/tools/xfel/libusb-1.0.dll new file mode 100644 index 0000000000000000000000000000000000000000..a2e99dd874e0ad1247f906b00d39d16e8093bf04 Binary files /dev/null and b/src/platform/f133/tools/xfel/libusb-1.0.dll differ diff --git a/src/platform/f133/tools/xfel/run.bat b/src/platform/f133/tools/xfel/run.bat new file mode 100644 index 0000000000000000000000000000000000000000..2574e06eb00b0379c57161effa922a5b963b481e --- /dev/null +++ b/src/platform/f133/tools/xfel/run.bat @@ -0,0 +1,4 @@ +.\xfel.exe ddr f133 +.\xfel.exe write 0x40000000 ..\SBI\opensbi-f133.bin +.\xfel.exe write 0x40200000 ..\..\NXOS.bin +.\xfel.exe exec 0x40000000 \ No newline at end of file diff --git a/src/platform/f133/tools/xfel/xfel.exe b/src/platform/f133/tools/xfel/xfel.exe new file mode 100644 index 0000000000000000000000000000000000000000..d94acb22e8d3c1b8a193cccdfabda25fcb17ee7d Binary files /dev/null and b/src/platform/f133/tools/xfel/xfel.exe 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0000000000000000000000000000000000000000..fac4a2548ee0ce85164542ca8dab4640ea23d09a Binary files /dev/null and b/src/platform/i386/tools/grub-2.04/boot/grub/i386-pc/diskboot.img differ diff --git a/src/platform/i386/tools/grub-2.04/boot/grub/i386-pc/eltorito.img b/src/platform/i386/tools/grub-2.04/boot/grub/i386-pc/eltorito.img new file mode 100644 index 0000000000000000000000000000000000000000..fc3e49363d60d18ed3e1aab469436be2d232a2ac Binary files /dev/null and b/src/platform/i386/tools/grub-2.04/boot/grub/i386-pc/eltorito.img differ diff --git a/src/platform/i386/tools/grub-2.04/boot/grub/i386-pc/kernel.img b/src/platform/i386/tools/grub-2.04/boot/grub/i386-pc/kernel.img new file mode 100644 index 0000000000000000000000000000000000000000..6e7895d787ff76f4a849c47a6d9f68a5a874f2fa Binary files /dev/null and b/src/platform/i386/tools/grub-2.04/boot/grub/i386-pc/kernel.img differ diff --git a/src/platform/i386/tools/grub-2.04/boot/grub/i386-pc/lnxboot.img b/src/platform/i386/tools/grub-2.04/boot/grub/i386-pc/lnxboot.img new file mode 100644 index 0000000000000000000000000000000000000000..a60fcf2cb09e7e4b462d2d557a9b7bcc480107f8 Binary files /dev/null and b/src/platform/i386/tools/grub-2.04/boot/grub/i386-pc/lnxboot.img differ diff --git a/src/platform/i386/tools/grub-2.04/boot/grub/i386-pc/lzma_decompress.img b/src/platform/i386/tools/grub-2.04/boot/grub/i386-pc/lzma_decompress.img new file mode 100644 index 0000000000000000000000000000000000000000..93f0e3571308748b950199ac8927f6fe6fdfc733 Binary files /dev/null and b/src/platform/i386/tools/grub-2.04/boot/grub/i386-pc/lzma_decompress.img differ diff --git a/src/platform/i386/tools/grub-2.04/boot/grub/i386-pc/pxeboot.img b/src/platform/i386/tools/grub-2.04/boot/grub/i386-pc/pxeboot.img new file mode 100644 index 0000000000000000000000000000000000000000..42b3f356b2bef689ba3b6450fd7adc88c3e3af34 Binary files /dev/null and b/src/platform/i386/tools/grub-2.04/boot/grub/i386-pc/pxeboot.img differ diff --git a/src/platform/i386/tools/grub-2.04/boot/grub/x86_64-efi/kernel.img b/src/platform/i386/tools/grub-2.04/boot/grub/x86_64-efi/kernel.img new file mode 100644 index 0000000000000000000000000000000000000000..22a43d084bf7982a747c27b0b6bd5c60e161a77b Binary files /dev/null and b/src/platform/i386/tools/grub-2.04/boot/grub/x86_64-efi/kernel.img differ diff --git a/src/platform/qemu_riscv64/defconfig b/src/platform/qemu_riscv64/defconfig index 6f8d415411a16a2debf9214204e6e174075c6dd4..68ce7ba35236240880a5071d7cd76dd322bdac29 100644 --- a/src/platform/qemu_riscv64/defconfig +++ b/src/platform/qemu_riscv64/defconfig @@ -32,7 +32,7 @@ CONFIG_NX_THREAD_STACK_SIZE=8192 CONFIG_NX_ENABLE_SCHED=y CONFIG_NX_THREAD_MAX_PRIORITY_NR=16 CONFIG_NX_PORCESS_ENV_ARGS=1024 -CONFIG_NX_TICKS_PER_SECOND=100 +CONFIG_NX_TICKS_PER_SECOND=1000 # end of OS Kernel # @@ -48,7 +48,6 @@ CONFIG_NX_UART0_FROM_SBI=y CONFIG_NX_DRIVER_CONSOLE=y CONFIG_NX_PRINT_BUF_LEN=256 CONFIG_NX_DRIVER_ROMDISK=y -CONFIG_NX_DRIVER_ROMDISK_HOSTOS_PATH="../../romdisk.cpio" # CONFIG_NX_DRIVER_DUMMY is not set CONFIG_NX_DRIVER_NULL=y CONFIG_NX_DRIVER_ZERO=y diff --git a/src/platform/qemu_riscv64/include/nx_configure.h b/src/platform/qemu_riscv64/include/nx_configure.h index 6ff566c916e22ff22d8a20d34d1dc7ccf8f80b59..f6ad433e24978518cbc8321093f3abc49cd354f5 100644 --- a/src/platform/qemu_riscv64/include/nx_configure.h +++ b/src/platform/qemu_riscv64/include/nx_configure.h @@ -17,13 +17,12 @@ #define CONFIG_NX_ENABLE_SCHED 1 #define CONFIG_NX_THREAD_MAX_PRIORITY_NR 16 #define CONFIG_NX_PORCESS_ENV_ARGS 1024 -#define CONFIG_NX_TICKS_PER_SECOND 100 +#define CONFIG_NX_TICKS_PER_SECOND 1000 #define CONFIG_NX_PLATFORM_RISCV64_QEMU 1 #define CONFIG_NX_UART0_FROM_SBI 1 #define CONFIG_NX_DRIVER_CONSOLE 1 #define CONFIG_NX_PRINT_BUF_LEN 256 #define CONFIG_NX_DRIVER_ROMDISK 1 -#define CONFIG_NX_DRIVER_ROMDISK_HOSTOS_PATH "../../romdisk.cpio" #define CONFIG_NX_DRIVER_NULL 1 #define CONFIG_NX_DRIVER_ZERO 1 #define CONFIG_NX_DRIVER_MEMINFO 1 diff --git a/src/time/clock.c b/src/time/clock.c index 21a966fe4ca509b1705fca6ca978867fcbb3e97c..c29af47dedb14336f33d54806c72e16d92c48562 100644 --- a/src/time/clock.c +++ b/src/time/clock.c @@ -82,6 +82,16 @@ NX_Error NX_ClockTickDelay(NX_ClockTick ticks) return NX_EOK; } +NX_Error NX_DelayMicrosecond(NX_TimeVal us) +{ + NX_TimeVal start = NX_ClockGetMicrosecond(); + while (NX_ClockGetMicrosecond() < start + us) + { + /* do nothing to delay */ + } + return NX_EOK; +} + NX_PRIVATE void NX_TimerIrqHandler(void *arg) { NX_TimerGo();