# FPGA秒表

**Repository Path**: Wind_to_valley/FPGAstopwatch

## Basic Information

- **Project Name**: FPGA秒表
- **Description**: 数电小作业 FPGA-EGO1开发板做的时钟,可调节时间,24小时制
- **Primary Language**: Unknown
- **License**: Not specified
- **Default Branch**: master
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 1
- **Forks**: 0
- **Created**: 2022-04-04
- **Last Updated**: 2024-12-08

## Categories & Tags

**Categories**: Uncategorized

**Tags**: Verilog

## README

No README documentation available for this project.