# FPGA

**Repository Path**: aidenshan/FPGA

## Basic Information

- **Project Name**: FPGA
- **Description**: FPGA调试共享
- **Primary Language**: Verilog
- **License**: Not specified
- **Default Branch**: master
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 0
- **Forks**: 5
- **Created**: 2023-08-03
- **Last Updated**: 2023-08-03

## Categories & Tags

**Categories**: Uncategorized

**Tags**: None

## README

# FPGA
FPGA调试共享