From 13ef25003a453e665382fc83995dbb6f46a8517e Mon Sep 17 00:00:00 2001 From: Jim Mattson Date: Mon, 5 Jun 2023 16:22:29 +0800 Subject: [PATCH 1/2] x86/cpufeatures: Add macros for Intel's new fast rep string features ANBZ: #5403 commit f8df91e73a6827a4569bb56cd53e55b4ea2f5b1f upstream. KVM_GET_SUPPORTED_CPUID should reflect these host CPUID bits. The bits are already cached in word 12. Give the bits X86_FEATURE names, so that they can be easily referenced. Hide these bits from /proc/cpuinfo, since the host kernel makes no use of them at present. Intel-SIG: commit f8df91e73a68 x86/cpufeatures: Add macros for Intel's new fast rep string features. Backport to support fast rep string features on Sapphire Rapids platform. Signed-off-by: Jim Mattson Reviewed-by: Sean Christopherson Link: https://lore.kernel.org/r/20220901211811.2883855-1-jmattson@google.com Signed-off-by: Sean Christopherson [ Aubrey Li: amend commit log ] Signed-off-by: Jason Zeng Signed-off-by: Aubrey Li --- arch/x86/include/asm/cpufeatures.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index ddc166dd5b2e..ae4b792cc6ab 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -328,6 +328,9 @@ /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ #define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instructions */ +#define X86_FEATURE_FZRM (12*32+10) /* "" Fast zero-length REP MOVSB */ +#define X86_FEATURE_FSRS (12*32+11) /* "" Fast short REP STOSB */ +#define X86_FEATURE_FSRC (12*32+12) /* "" Fast short REP {CMPSB,SCASB} */ /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */ #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */ -- Gitee From 235de20ce00b9aed78d7d43dd4cfcd8895d682c6 Mon Sep 17 00:00:00 2001 From: Jim Mattson Date: Mon, 5 Jun 2023 16:30:02 +0800 Subject: [PATCH 2/2] KVM: x86: Advertise fast REP string features inherent to the CPU ANBZ: #5403 commit 2a4209d6a9cb51082813e3081e1172ae68d27935 upstream. Fast zero-length REP MOVSB, fast short REP STOSB, and fast short REP {CMPSB,SCASB} are inherent features of the processor that cannot be hidden by the hypervisor. When these features are present on the host, enumerate them in KVM_GET_SUPPORTED_CPUID. Intel-SIG: commit 2a4209d6a9cb KVM: x86: Advertise fast REP string features inherent to the CPU. Backport to support fast rep string features on Sapphire Rapids platform. Signed-off-by: Jim Mattson Reviewed-by: Sean Christopherson Link: https://lore.kernel.org/r/20220901211811.2883855-2-jmattson@google.com Signed-off-by: Sean Christopherson [ Aubrey Li: amend commit log ] Signed-off-by: Jason Zeng Signed-off-by: Aubrey Li --- arch/x86/kvm/cpuid.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 53c2476c6657..55ddf22ccd0a 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -511,7 +511,8 @@ void kvm_set_cpu_caps(void) kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD); kvm_cpu_cap_mask(CPUID_7_1_EAX, - F(AVX512_BF16) | F(AVX_VNNI) + F(AVX512_BF16) | F(AVX_VNNI) | + F(FZRM) | F(FSRS) | F(FSRC) ); kvm_cpu_cap_mask(CPUID_D_1_EAX, -- Gitee