diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c
index 055cc65d5ce46ce43e389fb3d303205fc7b22d23..ee06233a29c65525d7b626d05a5535853dbd637d 100644
--- a/arch/x86/events/amd/uncore.c
+++ b/arch/x86/events/amd/uncore.c
@@ -216,7 +216,7 @@ static u64 l3_thread_slice_mask(u64 config)
 
 	if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON &&
 	    boot_cpu_data.x86 == 0x18) {
-		if (boot_cpu_data.x86_model == 0x6)
+		if (boot_cpu_data.x86_model >= 0x6 && boot_cpu_data.x86_model <= 0xf)
 			return ((config & HYGON_L3_SLICE_MASK) ? : HYGON_L3_SLICE_MASK) |
 			       ((config & HYGON_L3_THREAD_MASK) ? : HYGON_L3_THREAD_MASK);
 		else
@@ -286,7 +286,8 @@ amd_f17h_uncore_is_visible(struct kobject *kobj, struct attribute *attr, int i)
 static umode_t
 hygon_f18h_m6h_uncore_is_visible(struct kobject *kobj, struct attribute *attr, int i)
 {
-	return boot_cpu_data.x86 == 0x18 && boot_cpu_data.x86_model == 0x6 ?
+	return boot_cpu_data.x86 == 0x18 &&
+	       boot_cpu_data.x86_model >= 0x6 && boot_cpu_data.x86_model <= 0xf ?
 	       attr->mode : 0;
 }
 
@@ -879,7 +880,7 @@ int amd_uncore_l3_ctx_init(struct amd_uncore *uncore, unsigned int cpu)
 		   boot_cpu_data.x86 == 0x18) {
 		*l3_attr++ = &format_attr_event8.attr;
 		*l3_attr++ = &format_attr_umask8.attr;
-		if (boot_cpu_data.x86_model == 0x6) {
+		if (boot_cpu_data.x86_model >= 0x6 && boot_cpu_data.x86_model <= 0xf) {
 			*l3_attr++ = &format_attr_threadmask32.attr;
 			pmu->pmu.attr_update = hygon_uncore_l3_attr_update;
 		} else {
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 0b9135d9564ac812b71d41fbbc66f29dbbbb1505..01f14deada5b7c4dfc6268d909711ca9ef11a809 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -248,6 +248,7 @@ static int get_df_register(struct pci_dev *misc, u8 func, int offset, u32 *value
 				device = PCI_DEVICE_ID_HYGON_18H_M04H_DF_F1;
 			break;
 		case 0x6:
+		case 0x7:
 			device = PCI_DEVICE_ID_HYGON_18H_M05H_DF_F1;
 			break;
 		default:
@@ -256,6 +257,7 @@ static int get_df_register(struct pci_dev *misc, u8 func, int offset, u32 *value
 	} else if (func == 5) {
 		switch (boot_cpu_data.x86_model) {
 		case 0x6:
+		case 0x7:
 			device = PCI_DEVICE_ID_HYGON_18H_M06H_DF_F5;
 			break;
 		default:
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 0585e3dce77ed5a2127a45b3cd93f1ead8612233..2631321100269400e6cb35ea4c94ab23588d0fc8 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -3606,6 +3606,9 @@ static int per_family_init(struct amd64_pvt *pvt)
 		} else if (pvt->model == 0x6) {
 			pvt->ctl_name			= "F18h_M06h";
 			break;
+		} else if (pvt->model == 0x7) {
+			pvt->ctl_name			= "F18h_M07h";
+			break;
 		}
 		pvt->ctl_name				= "F18h";
 		break;