From b5399b1674b03f5be82bf1b094691fc2eabaef74 Mon Sep 17 00:00:00 2001 From: Liao Xuan Date: Sun, 12 May 2024 23:12:56 -0400 Subject: [PATCH 1/3] anolis: x86/amd_nb: Add support for Hygon family 18h model 7h ANBZ: #9404 Add Hygon family 18h model 7h processor support for amd_nb. Signed-off-by: Liao Xuan --- arch/x86/kernel/amd_nb.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c index 80d36fafcc6d..08a3c81bac31 100644 --- a/arch/x86/kernel/amd_nb.c +++ b/arch/x86/kernel/amd_nb.c @@ -266,6 +266,7 @@ static int get_df_register(struct pci_dev *misc, u8 func, int offset, u32 *value device = PCI_DEVICE_ID_HYGON_18H_M04H_DF_F1; break; case 0x6: + case 0x7: device = PCI_DEVICE_ID_HYGON_18H_M05H_DF_F1; break; default: @@ -274,6 +275,7 @@ static int get_df_register(struct pci_dev *misc, u8 func, int offset, u32 *value } else if (func == 5) { switch (boot_cpu_data.x86_model) { case 0x6: + case 0x7: device = PCI_DEVICE_ID_HYGON_18H_M06H_DF_F5; break; default: -- Gitee From 7d9235d8d823178371a173f8774ca53c82090a49 Mon Sep 17 00:00:00 2001 From: Liao Xuan Date: Mon, 20 May 2024 02:10:49 -0400 Subject: [PATCH 2/3] anolis: EDAC/amd64: Add support for Hygon family 18h model 7h ANBZ: #9404 Add Hygon family 18h model 7h processor support for amd64_edac. Signed-off-by: Liao Xuan --- drivers/edac/amd64_edac.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 69307f4661be..7e7fb0066a48 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -3537,6 +3537,11 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) fam_type = &family_types[F18_M06H_CPUS]; pvt->ops = &family_types[F18_M06H_CPUS].ops; break; + } else if (pvt->model == 0x7) { + fam_type = &family_types[F18_M06H_CPUS]; + pvt->ops = &family_types[F18_M06H_CPUS].ops; + family_types[F18_M06H_CPUS].ctl_name = "F18h_M07h"; + break; } fam_type = &family_types[F17_CPUS]; pvt->ops = &family_types[F17_CPUS].ops; -- Gitee From cd1f0ee198ee247c345396ff7b5c7632a0da81f5 Mon Sep 17 00:00:00 2001 From: Liao Xuan Date: Wed, 5 Jun 2024 05:42:37 -0400 Subject: [PATCH 3/3] anolis: perf/x86/uncore: Add L3 PMU support for Hygon family 18h model 7h ANBZ: #9404 From model 6h, Hygon processors can use the same L3 PMU slicemask and threadmask. Signed-off-by: Liao Xuan --- arch/x86/events/amd/uncore.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c index 1c569498ce8f..fe3cf6e4816f 100644 --- a/arch/x86/events/amd/uncore.c +++ b/arch/x86/events/amd/uncore.c @@ -196,7 +196,8 @@ static u64 l3_thread_slice_mask(u64 config) if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON && boot_cpu_data.x86 == 0x18) { - if (boot_cpu_data.x86_model == 0x6) + if (boot_cpu_data.x86_model >= 0x6 && + boot_cpu_data.x86_model <= 0xf) return ((config & HYGON_L3_SLICE_MASK) ? : HYGON_L3_SLICE_MASK) | ((config & HYGON_L3_THREAD_MASK) ? : HYGON_L3_THREAD_MASK); else @@ -642,7 +643,8 @@ static int __init amd_uncore_init(void) boot_cpu_data.x86 == 0x18) { *l3_attr++ = &format_attr_event8.attr; *l3_attr++ = &format_attr_umask.attr; - if (boot_cpu_data.x86_model == 6) { + if (boot_cpu_data.x86_model >= 0x6 && + boot_cpu_data.x86_model <= 0xf) { *l3_attr++ = &format_attr_slicemask4.attr; *l3_attr++ = &format_attr_threadmask32.attr; } else { -- Gitee