From 776f225575e3e7d793946a1c15b10a6d4a2295f2 Mon Sep 17 00:00:00 2001 From: Chu Guangqing Date: Thu, 4 Dec 2025 13:59:37 +0800 Subject: [PATCH] anolis: rm/yhgch: rename inspur_drm to yhgch_drm ANBZ: #27518 The driver name is changed to yhgch. Modify the supported resolutions to be consistent with the HAM chip's KVM support. the version is upgraded to 1.2. Signed-off-by: Chu Guangqing --- drivers/gpu/drm/Kconfig | 2 +- drivers/gpu/drm/Makefile | 2 +- drivers/gpu/drm/inspur/Kconfig | 5 - drivers/gpu/drm/inspur/Makefile | 4 - .../drm/inspur/inspur-drm/inspur_drm_regs.h | 210 ------------- .../drm/{inspur/inspur-drm => yhgch}/Kconfig | 8 +- .../drm/{inspur/inspur-drm => yhgch}/Makefile | 6 +- .../inspur_drm_de.c => yhgch/yhgch_drm_de.c} | 275 +++++++++--------- .../yhgch_drm_drv.c} | 222 +++++++------- .../yhgch_drm_drv.h} | 78 ++--- .../yhgch_drm_fbdev.c} | 52 ++-- drivers/gpu/drm/yhgch/yhgch_drm_regs.h | 210 +++++++++++++ .../yhgch_drm_vdac.c} | 54 ++-- .../inspur_ttm.c => yhgch/yhgch_ttm.c} | 268 ++++++++--------- 14 files changed, 694 insertions(+), 702 deletions(-) delete mode 100644 drivers/gpu/drm/inspur/Kconfig delete mode 100644 drivers/gpu/drm/inspur/Makefile delete mode 100644 drivers/gpu/drm/inspur/inspur-drm/inspur_drm_regs.h rename drivers/gpu/drm/{inspur/inspur-drm => yhgch}/Kconfig (32%) rename drivers/gpu/drm/{inspur/inspur-drm => yhgch}/Makefile (65%) rename drivers/gpu/drm/{inspur/inspur-drm/inspur_drm_de.c => yhgch/yhgch_drm_de.c} (51%) rename drivers/gpu/drm/{inspur/inspur-drm/inspur_drm_drv.c => yhgch/yhgch_drm_drv.c} (47%) rename drivers/gpu/drm/{inspur/inspur-drm/inspur_drm_drv.h => yhgch/yhgch_drm_drv.h} (36%) rename drivers/gpu/drm/{inspur/inspur-drm/inspur_drm_fbdev.c => yhgch/yhgch_drm_fbdev.c} (80%) create mode 100644 drivers/gpu/drm/yhgch/yhgch_drm_regs.h rename drivers/gpu/drm/{inspur/inspur-drm/inspur_drm_vdac.c => yhgch/yhgch_drm_vdac.c} (56%) rename drivers/gpu/drm/{inspur/inspur-drm/inspur_ttm.c => yhgch/yhgch_ttm.c} (50%) diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 1960b2d0c788..1420979d7de5 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -335,7 +335,7 @@ source "drivers/gpu/drm/tve200/Kconfig" source "drivers/gpu/drm/xen/Kconfig" -source "drivers/gpu/drm/inspur/Kconfig" +source "drivers/gpu/drm/yhgch/Kconfig" # Keep legacy drivers last diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile index 31063f242596..f24988cae81e 100644 --- a/drivers/gpu/drm/Makefile +++ b/drivers/gpu/drm/Makefile @@ -107,4 +107,4 @@ obj-$(CONFIG_DRM_TINYDRM) += tinydrm/ obj-$(CONFIG_DRM_PL111) += pl111/ obj-$(CONFIG_DRM_TVE200) += tve200/ obj-$(CONFIG_DRM_XEN) += xen/ -obj-$(CONFIG_DRM_INSPUR) += inspur/ +obj-$(CONFIG_DRM_YHGCH) += yhgch/ diff --git a/drivers/gpu/drm/inspur/Kconfig b/drivers/gpu/drm/inspur/Kconfig deleted file mode 100644 index 9ee949fc6936..000000000000 --- a/drivers/gpu/drm/inspur/Kconfig +++ /dev/null @@ -1,5 +0,0 @@ -# License: GPL-2.0 -# -# inspur drm device configuration. - -source "drivers/gpu/drm/inspur/inspur-drm/Kconfig" diff --git a/drivers/gpu/drm/inspur/Makefile b/drivers/gpu/drm/inspur/Makefile deleted file mode 100644 index 9fd0eb7a1035..000000000000 --- a/drivers/gpu/drm/inspur/Makefile +++ /dev/null @@ -1,4 +0,0 @@ -# -# Makefile for inspur drm drivers. - -obj-$(CONFIG_DRM_INSPUR) += inspur-drm/ diff --git a/drivers/gpu/drm/inspur/inspur-drm/inspur_drm_regs.h b/drivers/gpu/drm/inspur/inspur-drm/inspur_drm_regs.h deleted file mode 100644 index f29c1c6fdc89..000000000000 --- a/drivers/gpu/drm/inspur/inspur-drm/inspur_drm_regs.h +++ /dev/null @@ -1,210 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ - - -#ifndef INSPUR_DRM_HW_H -#define INSPUR_DRM_HW_H - -/* register definition */ -#define INSPUR_MISC_CTRL 0x4 - -#define INSPUR_MSCCTL_LOCALMEM_RESET(x) ((x) << 6) -#define INSPUR_MSCCTL_LOCALMEM_RESET_MASK 0x40 - -#define INSPUR_CURRENT_GATE 0x000040 -#define INSPUR_CURR_GATE_DISPLAY(x) ((x) << 2) -#define INSPUR_CURR_GATE_DISPLAY_MASK 0x4 - -#define INSPUR_CURR_GATE_LOCALMEM(x) ((x) << 1) -#define INSPUR_CURR_GATE_LOCALMEM_MASK 0x2 - -#define INSPUR_MODE0_GATE 0x000044 -#define INSPUR_MODE1_GATE 0x000048 -#define INSPUR_POWER_MODE_CTRL 0x00004C - -#define INSPUR_PW_MODE_CTL_OSC_INPUT(x) ((x) << 3) -#define INSPUR_PW_MODE_CTL_OSC_INPUT_MASK 0x8 - -#define INSPUR_PW_MODE_CTL_MODE(x) ((x) << 0) -#define INSPUR_PW_MODE_CTL_MODE_MASK 0x03 -#define INSPUR_PW_MODE_CTL_MODE_SHIFT 0 - -#define INSPUR_PW_MODE_CTL_MODE_MODE0 0 -#define INSPUR_PW_MODE_CTL_MODE_MODE1 1 -#define INSPUR_PW_MODE_CTL_MODE_SLEEP 2 - -//#define INSPUR_CRT_PLL_CTRL 0x000060 - -#define INSPUR_PLL_CTRL_BYPASS(x) ((x) << 18) -#define INSPUR_PLL_CTRL_BYPASS_MASK 0x40000 - -#define INSPUR_PLL_CTRL_POWER(x) ((x) << 17) -#define INSPUR_PLL_CTRL_POWER_MASK 0x20000 - -#define INSPUR_PLL_CTRL_INPUT(x) ((x) << 16) -#define INSPUR_PLL_CTRL_INPUT_MASK 0x10000 - -#define INSPUR_PLL_CTRL_POD(x) ((x) << 14) -#define INSPUR_PLL_CTRL_POD_MASK 0xC000 - -#define INSPUR_PLL_CTRL_OD(x) ((x) << 12) -#define INSPUR_PLL_CTRL_OD_MASK 0x3000 - -#define INSPUR_PLL_CTRL_N(x) ((x) << 8) -#define INSPUR_PLL_CTRL_N_MASK 0xF00 - -#define INSPUR_PLL_CTRL_M(x) ((x) << 0) -#define INSPUR_PLL_CTRL_M_MASK 0xFF - -#define INSPUR_CRT_DISP_CTL 0x80200 - -#define INSPUR_CRT_DISP_CTL_DPMS(x) ((x) << 30) -#define INSPUR_CRT_DISP_CTL_DPMS_MASK 0xc0000000 - -#define INSPUR_CRT_DPMS_ON 0 -#define INSPUR_CRT_DPMS_OFF 3 - -#define INSPUR_CRT_DISP_CTL_CRTSELECT(x) ((x) << 25) -#define INSPUR_CRT_DISP_CTL_CRTSELECT_MASK 0x2000000 - -#define INSPUR_CRTSELECT_CRT 1 - -#define INSPUR_CRT_DISP_CTL_CLOCK_PHASE(x) ((x) << 14) -#define INSPUR_CRT_DISP_CTL_CLOCK_PHASE_MASK 0x4000 - -#define INSPUR_CRT_DISP_CTL_VSYNC_PHASE(x) ((x) << 13) -#define INSPUR_CRT_DISP_CTL_VSYNC_PHASE_MASK 0x2000 - -#define INSPUR_CRT_DISP_CTL_HSYNC_PHASE(x) ((x) << 12) -#define INSPUR_CRT_DISP_CTL_HSYNC_PHASE_MASK 0x1000 - -#define INSPUR_CRT_DISP_CTL_TIMING(x) ((x) << 8) -#define INSPUR_CRT_DISP_CTL_TIMING_MASK 0x100 - -#define INSPUR_CRT_DISP_CTL_PLANE(x) ((x) << 2) -#define INSPUR_CRT_DISP_CTL_PLANE_MASK 4 - -#define INSPUR_CRT_DISP_CTL_FORMAT(x) ((x) << 0) -#define INSPUR_CRT_DISP_CTL_FORMAT_MASK 0x03 - -#define INSPUR_CRT_FB_ADDRESS 0x080204 - -#define INSPUR_CRT_FB_WIDTH 0x080208 -#define INSPUR_CRT_FB_WIDTH_WIDTH(x) ((x) << 16) -#define INSPUR_CRT_FB_WIDTH_WIDTH_MASK 0x3FFF0000 -#define INSPUR_CRT_FB_WIDTH_OFFS(x) ((x) << 0) -#define INSPUR_CRT_FB_WIDTH_OFFS_MASK 0x3FFF - -#define INSPUR_CRT_HORZ_TOTAL 0x08020C -#define INSPUR_CRT_HORZ_TOTAL_TOTAL(x) ((x) << 16) -#define INSPUR_CRT_HORZ_TOTAL_TOTAL_MASK 0xFFF0000 - -#define INSPUR_CRT_HORZ_TOTAL_DISP_END(x) ((x) << 0) -#define INSPUR_CRT_HORZ_TOTAL_DISP_END_MASK 0xFFF - -#define INSPUR_CRT_HORZ_SYNC 0x080210 -#define INSPUR_CRT_HORZ_SYNC_WIDTH(x) ((x) << 16) -#define INSPUR_CRT_HORZ_SYNC_WIDTH_MASK 0xFF0000 - -#define INSPUR_CRT_HORZ_SYNC_START(x) ((x) << 0) -#define INSPUR_CRT_HORZ_SYNC_START_MASK 0xFFF - -#define INSPUR_CRT_VERT_TOTAL 0x080214 -#define INSPUR_CRT_VERT_TOTAL_TOTAL(x) ((x) << 16) -#define INSPUR_CRT_VERT_TOTAL_TOTAL_MASK 0x7FFF0000 - -#define INSPUR_CRT_VERT_TOTAL_DISP_END(x) ((x) << 0) -#define INSPUR_CRT_VERT_TOTAL_DISP_END_MASK 0x7FF - -#define INSPUR_CRT_VERT_SYNC 0x080218 -#define INSPUR_CRT_VERT_SYNC_HEIGHT(x) ((x) << 16) -#define INSPUR_CRT_VERT_SYNC_HEIGHT_MASK 0x3F0000 - -#define INSPUR_CRT_VERT_SYNC_START(x) ((x) << 0) -#define INSPUR_CRT_VERT_SYNC_START_MASK 0x7FF - -/* Hardware Cursor */ -#define INSPUR_HWC_ADDRESS 0x080230 -#define INSPUR_HWC_ADDRESS_ENABLE(x) ((x) << 31) -#define INSPUR_HWC_ADDRESS_ENABLE_MASK 0x80000000 -#define INSPUR_HWC_ADDRESS_ADDRESS(x) ((x) << 0) -#define INSPUR_HWC_ADDRESS_ADDRESS_MASK 0xFFFFFFF - -#define INSPUR_HWC_LOCATION 0x080234 -#define INSPUR_HWC_LOCATION_TOP(x) ((x) << 27) -#define INSPUR_HWC_LOCATION_TOP_MASK 0x8000000 -#define INSPUR_HWC_LOCATION_Y(x) ((x) << 16) -#define INSPUR_HWC_LOCATION_Y_MASK 0x7FF0000 -#define INSPUR_HWC_LOCATION_LEFT(x) ((x) << 11) -#define INSPUR_HWC_LOCATION_LEFT_MASK 0x800 -#define INSPUR_HWC_LOCATION_X(x) ((x) << 0) -#define INSPUR_HWC_LOCATION_X_MASK 0x7FF - -#define INSPUR_HWC_COLOR_12 0x080238 -#define INSPUR_HWC_COLOR_12_2_RGB(x) ((x) << 16) -#define INSPUR_HWC_COLOR_12_2_RGB_MASK 0xFFFF0000 -#define INSPUR_HWC_COLOR_12_1_RGB(x) ((x) << 0) -#define INSPUR_HWC_COLOR_12_1_RGB_MASK 0xFFFF - -#define INSPUR_HWC_COLOR_3 0x08023C -#define INSPUR_HWC_COLOR_3_RGB(x) ((x) << 0) -#define INSPUR_HWC_COLOR_3_RGB_MASK 0xFFFF - -/* Auto Centering */ -#define INSPUR_CRT_AUTO_CENTERING_TL 0x080280 -#define INSPUR_CRT_AUTO_CENTERING_TL_TOP(x) ((x) << 16) -#define INSPUR_CRT_AUTO_CENTERING_TL_TOP_MASK 0x7FF0000 - -#define INSPUR_CRT_AUTO_CENTERING_TL_LEFT(x) ((x) << 0) -#define INSPUR_CRT_AUTO_CENTERING_TL_LEFT_MASK 0x7FF - -#define INSPUR_CRT_AUTO_CENTERING_BR 0x080284 -#define INSPUR_CRT_AUTO_CENTERING_BR_BOTTOM(x) ((x) << 16) -#define INSPUR_CRT_AUTO_CENTERING_BR_BOTTOM_MASK 0x7FF0000 - -#define INSPUR_CRT_AUTO_CENTERING_BR_RIGHT(x) ((x) << 0) -#define INSPUR_CRT_AUTO_CENTERING_BR_RIGHT_MASK 0x7FF - -/* register to control panel output */ -#define INSPUR_DISPLAY_CONTROL_HISILE 0x80288 -#define INSPUR_DISPLAY_CONTROL_FPVDDEN(x) ((x) << 0) -#define INSPUR_DISPLAY_CONTROL_PANELDATE(x) ((x) << 1) -#define INSPUR_DISPLAY_CONTROL_FPEN(x) ((x) << 2) -#define INSPUR_DISPLAY_CONTROL_VBIASEN(x) ((x) << 3) - -#define INSPUR_RAW_INTERRUPT 0x80290 -#define INSPUR_RAW_INTERRUPT_VBLANK(x) ((x) << 2) -#define INSPUR_RAW_INTERRUPT_VBLANK_MASK 0x4 - -#define INSPUR_RAW_INTERRUPT_EN 0x80298 -#define INSPUR_RAW_INTERRUPT_EN_VBLANK(x) ((x) << 2) -#define INSPUR_RAW_INTERRUPT_EN_VBLANK_MASK 0x4 - -/* register and values for PLL control */ -#define CRT_PLL1_NS 0x802a8 -#define CRT_PLL1_NS_OUTER_BYPASS(x) ((x) << 30) -#define CRT_PLL1_NS_INTER_BYPASS(x) ((x) << 29) -#define CRT_PLL1_NS_POWERON(x) ((x) << 24) - -#define CRT_PLL1_NS_25MHZ 0x00006691 //640x480 -#define CRT_PLL1_NS_40MHZ 0x00004580 //800x600 -#define CRT_PLL1_NS_65MHZ 0x00002568 //1024x768 -#define CRT_PLL1_NS_83MHZ 0x000027bb //1280x800 -#define CRT_PLL1_NS_106MHZ 0x000027ef //1440x900 -#define CRT_PLL1_NS_108MHZ 0x000027f2 //1280x1024 -#define CRT_PLL1_NS_146MHZ 0x00001575 //1680x1050 -#define CRT_PLL1_NS_148MHZ 0x0000145f //1920x1080 -#define CRT_PLL1_NS_193MHZ 0x000018f7 //1920x1200 - -#define CRT_PLL2_NS 0x802ac -#define CRT_PLL2_NS_25MHZ 0x0 -#define CRT_PLL2_NS_40MHZ 0x0 -#define CRT_PLL2_NS_65MHZ 0x0 -#define CRT_PLL2_NS_83MHZ 0x0 -#define CRT_PLL2_NS_106MHZ 0x0 -#define CRT_PLL2_NS_108MHZ 0x0 -#define CRT_PLL2_NS_146MHZ 0x0 -#define CRT_PLL2_NS_148MHZ 0x0 -#define CRT_PLL2_NS_193MHZ 0x0 - -#define INSPUR_FIELD(field, value) (field(value) & field##_MASK) -#endif diff --git a/drivers/gpu/drm/inspur/inspur-drm/Kconfig b/drivers/gpu/drm/yhgch/Kconfig similarity index 32% rename from drivers/gpu/drm/inspur/inspur-drm/Kconfig rename to drivers/gpu/drm/yhgch/Kconfig index 8f2d4c7c5178..b76275bbb90b 100644 --- a/drivers/gpu/drm/inspur/inspur-drm/Kconfig +++ b/drivers/gpu/drm/yhgch/Kconfig @@ -1,8 +1,8 @@ -config DRM_INSPUR - tristate "DRM Support for Inspur" + config DRM_YHGCH + tristate "DRM Support for YHGCH" depends on DRM && PCI && MMU select DRM_KMS_HELPER select DRM_TTM help - Choose this option if you have a Inspur soc chipset.If M is selected the - module will be called inspur-drm. + Choose this option if you have a YHGCH soc chipset.If M is selected the + module will be called yhgch-drm. diff --git a/drivers/gpu/drm/inspur/inspur-drm/Makefile b/drivers/gpu/drm/yhgch/Makefile similarity index 65% rename from drivers/gpu/drm/inspur/inspur-drm/Makefile rename to drivers/gpu/drm/yhgch/Makefile index 9f0d7f9a997b..b3975952b815 100644 --- a/drivers/gpu/drm/inspur/inspur-drm/Makefile +++ b/drivers/gpu/drm/yhgch/Makefile @@ -1,9 +1,9 @@ ifneq ($(KERNELRELEASE),) -inspur-drm-y := inspur_drm_drv.o inspur_drm_de.o inspur_drm_vdac.o inspur_drm_fbdev.o inspur_ttm.o +yhgch-drm-y := yhgch_drm_drv.o yhgch_drm_de.o yhgch_drm_vdac.o yhgch_drm_fbdev.o yhgch_ttm.o -#obj-$(CONFIG_DRM_INSPUR) += inspur-drm.o -obj-m += inspur-drm.o +#obj-$(CONFIG_DRM_YHGCH) += yhgch-drm.o +obj-m += yhgch-drm.o ccflags-y += -Iinclude/drm diff --git a/drivers/gpu/drm/inspur/inspur-drm/inspur_drm_de.c b/drivers/gpu/drm/yhgch/yhgch_drm_de.c similarity index 51% rename from drivers/gpu/drm/inspur/inspur-drm/inspur_drm_de.c rename to drivers/gpu/drm/yhgch/yhgch_drm_de.c index 9ceea6fc994a..a2f1710dc00e 100644 --- a/drivers/gpu/drm/inspur/inspur-drm/inspur_drm_de.c +++ b/drivers/gpu/drm/yhgch/yhgch_drm_de.c @@ -6,31 +6,31 @@ #include #include -#include "inspur_drm_drv.h" -#include "inspur_drm_regs.h" +#include "yhgch_drm_drv.h" +#include "yhgch_drm_regs.h" -struct inspur_dislay_pll_config { +struct yhgch_dislay_pll_config { unsigned long hdisplay; unsigned long vdisplay; u32 pll1_config_value; u32 pll2_config_value; }; -static const struct inspur_dislay_pll_config inspur_pll_table[] = { +static const struct yhgch_dislay_pll_config yhgch_pll_table[] = { { 640, 480, CRT_PLL1_NS_25MHZ, CRT_PLL2_NS_25MHZ }, { 800, 600, CRT_PLL1_NS_40MHZ, CRT_PLL2_NS_40MHZ }, { 1024, 768, CRT_PLL1_NS_65MHZ, CRT_PLL2_NS_65MHZ }, - { 1280, 800, CRT_PLL1_NS_83MHZ, CRT_PLL2_NS_83MHZ }, +// { 1280, 800, CRT_PLL1_NS_83MHZ, CRT_PLL2_NS_83MHZ }, { 1280, 1024, CRT_PLL1_NS_108MHZ, CRT_PLL2_NS_108MHZ }, - { 1440, 900, CRT_PLL1_NS_106MHZ, CRT_PLL2_NS_106MHZ }, - { 1680, 1050, CRT_PLL1_NS_146MHZ, CRT_PLL2_NS_146MHZ }, +// { 1440, 900, CRT_PLL1_NS_106MHZ, CRT_PLL2_NS_106MHZ }, +// { 1680, 1050, CRT_PLL1_NS_146MHZ, CRT_PLL2_NS_146MHZ }, { 1920, 1080, CRT_PLL1_NS_148MHZ, CRT_PLL2_NS_148MHZ }, - { 1920, 1200, CRT_PLL1_NS_193MHZ, CRT_PLL2_NS_193MHZ }, +// { 1920, 1200, CRT_PLL1_NS_193MHZ, CRT_PLL2_NS_193MHZ }, }; #define PADDING(align, data) (((data) + (align) - 1) & (~((align) - 1))) -static int inspur_plane_atomic_check(struct drm_plane *plane, +static int yhgch_plane_atomic_check(struct drm_plane *plane, struct drm_plane_state *state) { struct drm_framebuffer *fb = state->fb; @@ -70,7 +70,7 @@ static int inspur_plane_atomic_check(struct drm_plane *plane, return 0; } -static void inspur_plane_atomic_update(struct drm_plane *plane, +static void yhgch_plane_atomic_update(struct drm_plane *plane, struct drm_plane_state *old_state) { struct drm_plane_state *state = plane->state; @@ -78,44 +78,44 @@ static void inspur_plane_atomic_update(struct drm_plane *plane, int ret; u64 gpu_addr = 0; unsigned int line_l; - struct inspur_drm_private *priv = plane->dev->dev_private; - struct inspur_framebuffer *inspur_fb; - struct inspur_bo *bo; + struct yhgch_drm_private *priv = plane->dev->dev_private; + struct yhgch_framebuffer *yhgch_fb; + struct yhgch_bo *bo; if (!state->fb) return; - inspur_fb = to_inspur_framebuffer(state->fb); - bo = gem_to_inspur_bo(inspur_fb->obj); + yhgch_fb = to_yhgch_framebuffer(state->fb); + bo = gem_to_yhgch_bo(yhgch_fb->obj); ret = ttm_bo_reserve(&bo->bo, true, false, NULL); if (ret) { DRM_ERROR("failed to reserve ttm_bo: %d", ret); return; } - ret = inspur_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr); + ret = yhgch_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr); ttm_bo_unreserve(&bo->bo); if (ret) { - DRM_ERROR("failed to pin inspur_bo: %d", ret); + DRM_ERROR("failed to pin yhgch_bo: %d", ret); return; } - writel(gpu_addr, priv->mmio + INSPUR_CRT_FB_ADDRESS); + writel(gpu_addr, priv->mmio + YHGCH_CRT_FB_ADDRESS); reg = state->fb->width * (state->fb->format->cpp[0]); line_l = state->fb->pitches[0]; - writel(INSPUR_FIELD(INSPUR_CRT_FB_WIDTH_WIDTH, reg) | - INSPUR_FIELD(INSPUR_CRT_FB_WIDTH_OFFS, line_l), - priv->mmio + INSPUR_CRT_FB_WIDTH); + writel(YHGCH_FIELD(YHGCH_CRT_FB_WIDTH_WIDTH, reg) | + YHGCH_FIELD(YHGCH_CRT_FB_WIDTH_OFFS, line_l), + priv->mmio + YHGCH_CRT_FB_WIDTH); /* SET PIXEL FORMAT */ - reg = readl(priv->mmio + INSPUR_CRT_DISP_CTL); - reg &= ~INSPUR_CRT_DISP_CTL_FORMAT_MASK; - reg |= INSPUR_FIELD(INSPUR_CRT_DISP_CTL_FORMAT, + reg = readl(priv->mmio + YHGCH_CRT_DISP_CTL); + reg &= ~YHGCH_CRT_DISP_CTL_FORMAT_MASK; + reg |= YHGCH_FIELD(YHGCH_CRT_DISP_CTL_FORMAT, state->fb->format->cpp[0] * 8 / 16); - writel(reg, priv->mmio + INSPUR_CRT_DISP_CTL); + writel(reg, priv->mmio + YHGCH_CRT_DISP_CTL); } static const u32 channel_formats1[] = { @@ -125,7 +125,7 @@ static const u32 channel_formats1[] = { DRM_FORMAT_ABGR8888 }; -static struct drm_plane_funcs inspur_plane_funcs = { +static struct drm_plane_funcs yhgch_plane_funcs = { .update_plane = drm_atomic_helper_update_plane, .disable_plane = drm_atomic_helper_disable_plane, .destroy = drm_plane_cleanup, @@ -134,12 +134,12 @@ static struct drm_plane_funcs inspur_plane_funcs = { .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, }; -static const struct drm_plane_helper_funcs inspur_plane_helper_funcs = { - .atomic_check = inspur_plane_atomic_check, - .atomic_update = inspur_plane_atomic_update, +static const struct drm_plane_helper_funcs yhgch_plane_helper_funcs = { + .atomic_check = yhgch_plane_atomic_check, + .atomic_update = yhgch_plane_atomic_update, }; -static struct drm_plane *inspur_plane_init(struct inspur_drm_private *priv) +static struct drm_plane *yhgch_plane_init(struct yhgch_drm_private *priv) { struct drm_device *dev = priv->dev; struct drm_plane *plane; @@ -150,7 +150,7 @@ static struct drm_plane *inspur_plane_init(struct inspur_drm_private *priv) DRM_ERROR("failed to alloc memory when init plane\n"); return ERR_PTR(-ENOMEM); } - ret = drm_universal_plane_init(dev, plane, 1, &inspur_plane_funcs, + ret = drm_universal_plane_init(dev, plane, 1, &yhgch_plane_funcs, channel_formats1, ARRAY_SIZE(channel_formats1), NULL, DRM_PLANE_TYPE_PRIMARY, NULL); @@ -159,65 +159,65 @@ static struct drm_plane *inspur_plane_init(struct inspur_drm_private *priv) return ERR_PTR(ret); } - drm_plane_helper_add(plane, &inspur_plane_helper_funcs); + drm_plane_helper_add(plane, &yhgch_plane_helper_funcs); return plane; } -static void inspur_crtc_dpms(struct drm_crtc *crtc, int dpms) +static void yhgch_crtc_dpms(struct drm_crtc *crtc, int dpms) { - struct inspur_drm_private *priv = crtc->dev->dev_private; + struct yhgch_drm_private *priv = crtc->dev->dev_private; unsigned int reg; - reg = readl(priv->mmio + INSPUR_CRT_DISP_CTL); - reg &= ~INSPUR_CRT_DISP_CTL_DPMS_MASK; - reg |= INSPUR_FIELD(INSPUR_CRT_DISP_CTL_DPMS, dpms); - reg &= ~INSPUR_CRT_DISP_CTL_TIMING_MASK; - if (dpms == INSPUR_CRT_DPMS_ON) - reg |= INSPUR_CRT_DISP_CTL_TIMING(1); - writel(reg, priv->mmio + INSPUR_CRT_DISP_CTL); + reg = readl(priv->mmio + YHGCH_CRT_DISP_CTL); + reg &= ~YHGCH_CRT_DISP_CTL_DPMS_MASK; + reg |= YHGCH_FIELD(YHGCH_CRT_DISP_CTL_DPMS, dpms); + reg &= ~YHGCH_CRT_DISP_CTL_TIMING_MASK; + if (dpms == YHGCH_CRT_DPMS_ON) + reg |= YHGCH_CRT_DISP_CTL_TIMING(1); + writel(reg, priv->mmio + YHGCH_CRT_DISP_CTL); } -static void inspur_crtc_atomic_enable(struct drm_crtc *crtc, +static void yhgch_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) { unsigned int reg; - struct inspur_drm_private *priv = crtc->dev->dev_private; + struct yhgch_drm_private *priv = crtc->dev->dev_private; - inspur_set_power_mode(priv, INSPUR_PW_MODE_CTL_MODE_MODE0); + yhgch_set_power_mode(priv, YHGCH_PW_MODE_CTL_MODE_MODE0); /* Enable display power gate & LOCALMEM power gate */ - reg = readl(priv->mmio + INSPUR_CURRENT_GATE); - reg &= ~INSPUR_CURR_GATE_LOCALMEM_MASK; - reg &= ~INSPUR_CURR_GATE_DISPLAY_MASK; - reg |= INSPUR_CURR_GATE_LOCALMEM(1); - reg |= INSPUR_CURR_GATE_DISPLAY(1); - inspur_set_current_gate(priv, reg); + reg = readl(priv->mmio + YHGCH_CURRENT_GATE); + reg &= ~YHGCH_CURR_GATE_LOCALMEM_MASK; + reg &= ~YHGCH_CURR_GATE_DISPLAY_MASK; + reg |= YHGCH_CURR_GATE_LOCALMEM(1); + reg |= YHGCH_CURR_GATE_DISPLAY(1); + yhgch_set_current_gate(priv, reg); // drm_crtc_vblank_on(crtc); - inspur_crtc_dpms(crtc, INSPUR_CRT_DPMS_ON); + yhgch_crtc_dpms(crtc, YHGCH_CRT_DPMS_ON); } -static void inspur_crtc_atomic_disable(struct drm_crtc *crtc, +static void yhgch_crtc_atomic_disable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) { unsigned int reg; - struct inspur_drm_private *priv = crtc->dev->dev_private; + struct yhgch_drm_private *priv = crtc->dev->dev_private; - inspur_crtc_dpms(crtc, INSPUR_CRT_DPMS_OFF); + yhgch_crtc_dpms(crtc, YHGCH_CRT_DPMS_OFF); // drm_crtc_vblank_off(crtc); - inspur_set_power_mode(priv, INSPUR_PW_MODE_CTL_MODE_SLEEP); + yhgch_set_power_mode(priv, YHGCH_PW_MODE_CTL_MODE_SLEEP); /* Enable display power gate & LOCALMEM power gate */ - reg = readl(priv->mmio + INSPUR_CURRENT_GATE); - reg &= ~INSPUR_CURR_GATE_LOCALMEM_MASK; - reg &= ~INSPUR_CURR_GATE_DISPLAY_MASK; - reg |= INSPUR_CURR_GATE_LOCALMEM(0); - reg |= INSPUR_CURR_GATE_DISPLAY(0); - inspur_set_current_gate(priv, reg); + reg = readl(priv->mmio + YHGCH_CURRENT_GATE); + reg &= ~YHGCH_CURR_GATE_LOCALMEM_MASK; + reg &= ~YHGCH_CURR_GATE_DISPLAY_MASK; + reg |= YHGCH_CURR_GATE_LOCALMEM(0); + reg |= YHGCH_CURR_GATE_DISPLAY(0); + yhgch_set_current_gate(priv, reg); } static enum drm_mode_status -inspur_crtc_mode_valid(struct drm_crtc *crtc, +yhgch_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) { int i = 0; @@ -226,19 +226,19 @@ inspur_crtc_mode_valid(struct drm_crtc *crtc, if (vrefresh < 59 || vrefresh > 61) return MODE_NOCLOCK; - for (i = 0; i < ARRAY_SIZE(inspur_pll_table); i++) { - if (inspur_pll_table[i].hdisplay == mode->hdisplay && - inspur_pll_table[i].vdisplay == mode->vdisplay) + for (i = 0; i < ARRAY_SIZE(yhgch_pll_table); i++) { + if (yhgch_pll_table[i].hdisplay == mode->hdisplay && + yhgch_pll_table[i].vdisplay == mode->vdisplay) return MODE_OK; } return MODE_BAD; } -static void set_vclock_inspur(struct drm_device *dev, unsigned long pll) +static void set_vclock_yhgch(struct drm_device *dev, unsigned long pll) { u32 val; - struct inspur_drm_private *priv = dev->dev_private; + struct yhgch_drm_private *priv = dev->dev_private; val = readl(priv->mmio + CRT_PLL1_NS); val &= ~(CRT_PLL1_NS_OUTER_BYPASS(1)); @@ -269,13 +269,13 @@ static void get_pll_config(unsigned long x, unsigned long y, u32 *pll1, u32 *pll2) { int i; - int count = ARRAY_SIZE(inspur_pll_table); + int count = ARRAY_SIZE(yhgch_pll_table); for (i = 0; i < count; i++) { - if (inspur_pll_table[i].hdisplay == x && - inspur_pll_table[i].vdisplay == y) { - *pll1 = inspur_pll_table[i].pll1_config_value; - *pll2 = inspur_pll_table[i].pll2_config_value; + if (yhgch_pll_table[i].hdisplay == x && + yhgch_pll_table[i].vdisplay == y) { + *pll1 = yhgch_pll_table[i].pll1_config_value; + *pll2 = yhgch_pll_table[i].pll2_config_value; return; } } @@ -299,28 +299,28 @@ static unsigned int display_ctrl_adjust(struct drm_device *dev, unsigned long x, y; u32 pll1; /* bit[31:0] of PLL */ u32 pll2; /* bit[63:32] of PLL */ - struct inspur_drm_private *priv = dev->dev_private; + struct yhgch_drm_private *priv = dev->dev_private; x = mode->hdisplay; y = mode->vdisplay; get_pll_config(x, y, &pll1, &pll2); writel(pll2, priv->mmio + CRT_PLL2_NS); - set_vclock_inspur(dev, pll1); + set_vclock_yhgch(dev, pll1); /* - * inspur has to set up the top-left and bottom-right + * yhgch has to set up the top-left and bottom-right * registers as well. * Note that normal chip only use those two register for * auto-centering mode. */ - writel(INSPUR_FIELD(INSPUR_CRT_AUTO_CENTERING_TL_TOP, 0) | - INSPUR_FIELD(INSPUR_CRT_AUTO_CENTERING_TL_LEFT, 0), - priv->mmio + INSPUR_CRT_AUTO_CENTERING_TL); + writel(YHGCH_FIELD(YHGCH_CRT_AUTO_CENTERING_TL_TOP, 0) | + YHGCH_FIELD(YHGCH_CRT_AUTO_CENTERING_TL_LEFT, 0), + priv->mmio + YHGCH_CRT_AUTO_CENTERING_TL); - writel(INSPUR_FIELD(INSPUR_CRT_AUTO_CENTERING_BR_BOTTOM, y - 1) | - INSPUR_FIELD(INSPUR_CRT_AUTO_CENTERING_BR_RIGHT, x - 1), - priv->mmio + INSPUR_CRT_AUTO_CENTERING_BR); + writel(YHGCH_FIELD(YHGCH_CRT_AUTO_CENTERING_BR_BOTTOM, y - 1) | + YHGCH_FIELD(YHGCH_CRT_AUTO_CENTERING_BR_RIGHT, x - 1), + priv->mmio + YHGCH_CRT_AUTO_CENTERING_BR); /* * Assume common fields in ctrl have been properly set before @@ -329,74 +329,75 @@ static unsigned int display_ctrl_adjust(struct drm_device *dev, */ /* Set bit 25 of display controller: Select CRT or VGA clock */ - ctrl &= ~INSPUR_CRT_DISP_CTL_CRTSELECT_MASK; - ctrl &= ~INSPUR_CRT_DISP_CTL_CLOCK_PHASE_MASK; + ctrl &= ~YHGCH_CRT_DISP_CTL_CRTSELECT_MASK; + ctrl &= ~YHGCH_CRT_DISP_CTL_CLOCK_PHASE_MASK; - ctrl |= INSPUR_CRT_DISP_CTL_CRTSELECT(INSPUR_CRTSELECT_CRT); + ctrl |= YHGCH_CRT_DISP_CTL_CRTSELECT(YHGCH_CRTSELECT_CRT); /* clock_phase_polarity is 0 */ - ctrl |= INSPUR_CRT_DISP_CTL_CLOCK_PHASE(0); + ctrl |= YHGCH_CRT_DISP_CTL_CLOCK_PHASE(0); + ctrl |= YHGCH_FIELD(YHGCH_CRT_DISP_CTL_FORMAT, 2); - writel(ctrl, priv->mmio + INSPUR_CRT_DISP_CTL); + writel(ctrl, priv->mmio + YHGCH_CRT_DISP_CTL); return ctrl; } -static void inspur_crtc_mode_set_nofb(struct drm_crtc *crtc) +static void yhgch_crtc_mode_set_nofb(struct drm_crtc *crtc) { unsigned int val; struct drm_display_mode *mode = &crtc->state->mode; struct drm_device *dev = crtc->dev; - struct inspur_drm_private *priv = dev->dev_private; + struct yhgch_drm_private *priv = dev->dev_private; int width = mode->hsync_end - mode->hsync_start; int height = mode->vsync_end - mode->vsync_start; - //writel(format_pll_reg(), priv->mmio + INSPUR_CRT_PLL_CTRL); - writel(INSPUR_FIELD(INSPUR_CRT_HORZ_TOTAL_TOTAL, mode->htotal - 1) | - INSPUR_FIELD(INSPUR_CRT_HORZ_TOTAL_DISP_END, mode->hdisplay - 1), - priv->mmio + INSPUR_CRT_HORZ_TOTAL); + //writel(format_pll_reg(), priv->mmio + YHGCH_CRT_PLL_CTRL); + writel(YHGCH_FIELD(YHGCH_CRT_HORZ_TOTAL_TOTAL, mode->htotal - 1) | + YHGCH_FIELD(YHGCH_CRT_HORZ_TOTAL_DISP_END, mode->hdisplay - 1), + priv->mmio + YHGCH_CRT_HORZ_TOTAL); - writel(INSPUR_FIELD(INSPUR_CRT_HORZ_SYNC_WIDTH, width) | - INSPUR_FIELD(INSPUR_CRT_HORZ_SYNC_START, mode->hsync_start - 1), - priv->mmio + INSPUR_CRT_HORZ_SYNC); + writel(YHGCH_FIELD(YHGCH_CRT_HORZ_SYNC_WIDTH, width) | + YHGCH_FIELD(YHGCH_CRT_HORZ_SYNC_START, mode->hsync_start - 1), + priv->mmio + YHGCH_CRT_HORZ_SYNC); - writel(INSPUR_FIELD(INSPUR_CRT_VERT_TOTAL_TOTAL, mode->vtotal - 1) | - INSPUR_FIELD(INSPUR_CRT_VERT_TOTAL_DISP_END, mode->vdisplay - 1), - priv->mmio + INSPUR_CRT_VERT_TOTAL); + writel(YHGCH_FIELD(YHGCH_CRT_VERT_TOTAL_TOTAL, mode->vtotal - 1) | + YHGCH_FIELD(YHGCH_CRT_VERT_TOTAL_DISP_END, mode->vdisplay - 1), + priv->mmio + YHGCH_CRT_VERT_TOTAL); - writel(INSPUR_FIELD(INSPUR_CRT_VERT_SYNC_HEIGHT, height) | - INSPUR_FIELD(INSPUR_CRT_VERT_SYNC_START, mode->vsync_start - 1), - priv->mmio + INSPUR_CRT_VERT_SYNC); + writel(YHGCH_FIELD(YHGCH_CRT_VERT_SYNC_HEIGHT, height) | + YHGCH_FIELD(YHGCH_CRT_VERT_SYNC_START, mode->vsync_start - 1), + priv->mmio + YHGCH_CRT_VERT_SYNC); - val = INSPUR_FIELD(INSPUR_CRT_DISP_CTL_VSYNC_PHASE, 0); - val |= INSPUR_FIELD(INSPUR_CRT_DISP_CTL_HSYNC_PHASE, 0); - val |= INSPUR_CRT_DISP_CTL_TIMING(1); - val |= INSPUR_CRT_DISP_CTL_PLANE(1); + val = YHGCH_FIELD(YHGCH_CRT_DISP_CTL_VSYNC_PHASE, 0); + val |= YHGCH_FIELD(YHGCH_CRT_DISP_CTL_HSYNC_PHASE, 0); + val |= YHGCH_CRT_DISP_CTL_TIMING(1); + val |= YHGCH_CRT_DISP_CTL_PLANE(1); display_ctrl_adjust(dev, mode, val); } -static void inspur_crtc_atomic_begin(struct drm_crtc *crtc, +static void yhgch_crtc_atomic_begin(struct drm_crtc *crtc, struct drm_crtc_state *old_state) { unsigned int reg; struct drm_device *dev = crtc->dev; - struct inspur_drm_private *priv = dev->dev_private; + struct yhgch_drm_private *priv = dev->dev_private; - inspur_set_power_mode(priv, INSPUR_PW_MODE_CTL_MODE_MODE0); + yhgch_set_power_mode(priv, YHGCH_PW_MODE_CTL_MODE_MODE0); /* Enable display power gate & LOCALMEM power gate */ - reg = readl(priv->mmio + INSPUR_CURRENT_GATE); - reg &= ~INSPUR_CURR_GATE_DISPLAY_MASK; - reg &= ~INSPUR_CURR_GATE_LOCALMEM_MASK; - reg |= INSPUR_CURR_GATE_DISPLAY(1); - reg |= INSPUR_CURR_GATE_LOCALMEM(1); - inspur_set_current_gate(priv, reg); + reg = readl(priv->mmio + YHGCH_CURRENT_GATE); + reg &= ~YHGCH_CURR_GATE_DISPLAY_MASK; + reg &= ~YHGCH_CURR_GATE_LOCALMEM_MASK; + reg |= YHGCH_CURR_GATE_DISPLAY(1); + reg |= YHGCH_CURR_GATE_LOCALMEM(1); + yhgch_set_current_gate(priv, reg); /* We can add more initialization as needed. */ } -static void inspur_crtc_atomic_flush(struct drm_crtc *crtc, +static void yhgch_crtc_atomic_flush(struct drm_crtc *crtc, struct drm_crtc_state *old_state) { unsigned long flags; @@ -408,52 +409,52 @@ static void inspur_crtc_atomic_flush(struct drm_crtc *crtc, spin_unlock_irqrestore(&crtc->dev->event_lock, flags); } -static int inspur_crtc_enable_vblank(struct drm_crtc *crtc) +static int yhgch_crtc_enable_vblank(struct drm_crtc *crtc) { - struct inspur_drm_private *priv = crtc->dev->dev_private; + struct yhgch_drm_private *priv = crtc->dev->dev_private; - writel(INSPUR_RAW_INTERRUPT_EN_VBLANK(1), - priv->mmio + INSPUR_RAW_INTERRUPT_EN); + writel(YHGCH_RAW_INTERRUPT_EN_VBLANK(1), + priv->mmio + YHGCH_RAW_INTERRUPT_EN); return 0; } -static void inspur_crtc_disable_vblank(struct drm_crtc *crtc) +static void yhgch_crtc_disable_vblank(struct drm_crtc *crtc) { - struct inspur_drm_private *priv = crtc->dev->dev_private; + struct yhgch_drm_private *priv = crtc->dev->dev_private; - writel(INSPUR_RAW_INTERRUPT_EN_VBLANK(0), - priv->mmio + INSPUR_RAW_INTERRUPT_EN); + writel(YHGCH_RAW_INTERRUPT_EN_VBLANK(0), + priv->mmio + YHGCH_RAW_INTERRUPT_EN); } -static const struct drm_crtc_funcs inspur_crtc_funcs = { +static const struct drm_crtc_funcs yhgch_crtc_funcs = { .page_flip = drm_atomic_helper_page_flip, .set_config = drm_atomic_helper_set_config, .destroy = drm_crtc_cleanup, .reset = drm_atomic_helper_crtc_reset, .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, - .enable_vblank = inspur_crtc_enable_vblank, - .disable_vblank = inspur_crtc_disable_vblank, + .enable_vblank = yhgch_crtc_enable_vblank, + .disable_vblank = yhgch_crtc_disable_vblank, }; -static const struct drm_crtc_helper_funcs inspur_crtc_helper_funcs = { - .mode_set_nofb = inspur_crtc_mode_set_nofb, - .atomic_begin = inspur_crtc_atomic_begin, - .atomic_flush = inspur_crtc_atomic_flush, - .atomic_enable = inspur_crtc_atomic_enable, - .atomic_disable = inspur_crtc_atomic_disable, - .mode_valid = inspur_crtc_mode_valid, +static const struct drm_crtc_helper_funcs yhgch_crtc_helper_funcs = { + .mode_set_nofb = yhgch_crtc_mode_set_nofb, + .atomic_begin = yhgch_crtc_atomic_begin, + .atomic_flush = yhgch_crtc_atomic_flush, + .atomic_enable = yhgch_crtc_atomic_enable, + .atomic_disable = yhgch_crtc_atomic_disable, + .mode_valid = yhgch_crtc_mode_valid, }; -int inspur_de_init(struct inspur_drm_private *priv) +int yhgch_de_init(struct yhgch_drm_private *priv) { struct drm_device *dev = priv->dev; struct drm_crtc *crtc; struct drm_plane *plane; int ret; - plane = inspur_plane_init(priv); + plane = yhgch_plane_init(priv); if (IS_ERR(plane)) { DRM_ERROR("failed to create plane: %ld\n", PTR_ERR(plane)); return PTR_ERR(plane); @@ -466,7 +467,7 @@ int inspur_de_init(struct inspur_drm_private *priv) } ret = drm_crtc_init_with_planes(dev, crtc, plane, - NULL, &inspur_crtc_funcs, NULL); + NULL, &yhgch_crtc_funcs, NULL); if (ret) { DRM_ERROR("failed to init crtc: %d\n", ret); return ret; @@ -477,7 +478,7 @@ int inspur_de_init(struct inspur_drm_private *priv) DRM_ERROR("failed to set gamma size: %d\n", ret); return ret; } - drm_crtc_helper_add(crtc, &inspur_crtc_helper_funcs); + drm_crtc_helper_add(crtc, &yhgch_crtc_helper_funcs); return 0; } diff --git a/drivers/gpu/drm/inspur/inspur-drm/inspur_drm_drv.c b/drivers/gpu/drm/yhgch/yhgch_drm_drv.c similarity index 47% rename from drivers/gpu/drm/inspur/inspur-drm/inspur_drm_drv.c rename to drivers/gpu/drm/yhgch/yhgch_drm_drv.c index 5cc2fef5e603..8c7bd5c75b54 100644 --- a/drivers/gpu/drm/inspur/inspur-drm/inspur_drm_drv.c +++ b/drivers/gpu/drm/yhgch/yhgch_drm_drv.c @@ -6,42 +6,42 @@ #include #include -#include "inspur_drm_drv.h" -#include "inspur_drm_regs.h" +#include "yhgch_drm_drv.h" +#include "yhgch_drm_regs.h" -#define MEM_SIZE_RESERVE4KVM 0x200000 +#define MEM_SIZE_RESERVE4KVM 0x400000 -static const struct file_operations inspur_fops = { +static const struct file_operations yhgch_fops = { .owner = THIS_MODULE, .open = drm_open, .release = drm_release, .unlocked_ioctl = drm_ioctl, .compat_ioctl = drm_compat_ioctl, - .mmap = inspur_mmap, + .mmap = yhgch_mmap, .poll = drm_poll, .read = drm_read, .llseek = no_llseek, }; -static irqreturn_t inspur_drm_interrupt(int irq, void *arg) +static irqreturn_t yhgch_drm_interrupt(int irq, void *arg) { struct drm_device *dev = (struct drm_device *)arg; - struct inspur_drm_private *priv = - (struct inspur_drm_private *)dev->dev_private; + struct yhgch_drm_private *priv = + (struct yhgch_drm_private *)dev->dev_private; u32 status; - status = readl(priv->mmio + INSPUR_RAW_INTERRUPT); + status = readl(priv->mmio + YHGCH_RAW_INTERRUPT); - if (status & INSPUR_RAW_INTERRUPT_VBLANK(1)) { - writel(INSPUR_RAW_INTERRUPT_VBLANK(1), - priv->mmio + INSPUR_RAW_INTERRUPT); + if (status & YHGCH_RAW_INTERRUPT_VBLANK(1)) { + writel(YHGCH_RAW_INTERRUPT_VBLANK(1), + priv->mmio + YHGCH_RAW_INTERRUPT); drm_handle_vblank(dev, 0); } return IRQ_HANDLED; } -static void inspur_remove_framebuffers(struct pci_dev *pdev) +static void yhgch_remove_framebuffers(struct pci_dev *pdev) { struct apertures_struct *ap; bool primary = false; @@ -57,29 +57,29 @@ static void inspur_remove_framebuffers(struct pci_dev *pdev) primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; #endif - drm_fb_helper_remove_conflicting_framebuffers(ap, "inspurdrmfb", + drm_fb_helper_remove_conflicting_framebuffers(ap, "yhgchdrmfb", primary); kfree(ap); } -static struct drm_driver inspur_driver = { +static struct drm_driver yhgch_driver = { .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, - .load = inspur_load, - .unload = inspur_unload, - .fops = &inspur_fops, - .name = "inspur", - .date = "20230912", - .desc = "inspur drm driver", - .major = 3, - .minor = 0, - .gem_free_object_unlocked = inspur_gem_free_object, - .dumb_create = inspur_dumb_create, - .dumb_map_offset = inspur_dumb_mmap_offset, - .irq_handler = inspur_drm_interrupt, + .load = yhgch_load, + .unload = yhgch_unload, + .fops = &yhgch_fops, + .name = "yhgch", + .date = "20231125", + .desc = "yhgch drm driver", + .major = 1, + .minor = 2, + .gem_free_object_unlocked = yhgch_gem_free_object, + .dumb_create = yhgch_dumb_create, + .dumb_map_offset = yhgch_dumb_mmap_offset, + .irq_handler = yhgch_drm_interrupt, }; -static int __maybe_unused inspur_pm_suspend(struct device *dev) +static int __maybe_unused yhgch_pm_suspend(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); struct drm_device *drm_dev = pci_get_drvdata(pdev); @@ -87,7 +87,7 @@ static int __maybe_unused inspur_pm_suspend(struct device *dev) return drm_mode_config_helper_suspend(drm_dev); } -static int __maybe_unused inspur_pm_resume(struct device *dev) +static int __maybe_unused yhgch_pm_resume(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); struct drm_device *drm_dev = pci_get_drvdata(pdev); @@ -96,12 +96,12 @@ static int __maybe_unused inspur_pm_resume(struct device *dev) } -static const struct dev_pm_ops inspur_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(inspur_pm_suspend, - inspur_pm_resume) +static const struct dev_pm_ops yhgch_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(yhgch_pm_suspend, + yhgch_pm_resume) }; -static int inspur_kms_init(struct inspur_drm_private *priv) +static int yhgch_kms_init(struct yhgch_drm_private *priv) { int ret; @@ -110,21 +110,21 @@ static int inspur_kms_init(struct inspur_drm_private *priv) priv->dev->mode_config.min_width = 0; priv->dev->mode_config.min_height = 0; - priv->dev->mode_config.max_width = 1920; - priv->dev->mode_config.max_height = 1200; + priv->dev->mode_config.max_width = 4096; + priv->dev->mode_config.max_height = 4096; priv->dev->mode_config.fb_base = priv->fb_base; priv->dev->mode_config.preferred_depth = 32; priv->dev->mode_config.prefer_shadow = 1; - priv->dev->mode_config.funcs = (void *)&inspur_mode_funcs; + priv->dev->mode_config.funcs = (void *)&yhgch_mode_funcs; - ret = inspur_de_init(priv); + ret = yhgch_de_init(priv); if (ret) { DRM_ERROR("failed to init de: %d\n", ret); return ret; } - ret = inspur_vdac_init(priv); + ret = yhgch_vdac_init(priv); if (ret) { DRM_ERROR("failed to init vdac: %d\n", ret); return ret; @@ -133,7 +133,7 @@ static int inspur_kms_init(struct inspur_drm_private *priv) return 0; } -static void inspur_kms_fini(struct inspur_drm_private *priv) +static void yhgch_kms_fini(struct yhgch_drm_private *priv) { if (priv->mode_config_initialized) { drm_mode_config_cleanup(priv->dev); @@ -144,68 +144,68 @@ static void inspur_kms_fini(struct inspur_drm_private *priv) /* * It can operate in one of three modes: 0, 1 or Sleep. */ -void inspur_set_power_mode(struct inspur_drm_private *priv, +void yhgch_set_power_mode(struct yhgch_drm_private *priv, unsigned int power_mode) { unsigned int control_value = 0; void __iomem *mmio = priv->mmio; unsigned int input = 1; - if (power_mode > INSPUR_PW_MODE_CTL_MODE_SLEEP) + if (power_mode > YHGCH_PW_MODE_CTL_MODE_SLEEP) return; - if (power_mode == INSPUR_PW_MODE_CTL_MODE_SLEEP) + if (power_mode == YHGCH_PW_MODE_CTL_MODE_SLEEP) input = 0; - control_value = readl(mmio + INSPUR_POWER_MODE_CTRL); - control_value &= ~(INSPUR_PW_MODE_CTL_MODE_MASK | - INSPUR_PW_MODE_CTL_OSC_INPUT_MASK); - control_value |= INSPUR_FIELD(INSPUR_PW_MODE_CTL_MODE, power_mode); - control_value |= INSPUR_FIELD(INSPUR_PW_MODE_CTL_OSC_INPUT, input); - writel(control_value, mmio + INSPUR_POWER_MODE_CTRL); + control_value = readl(mmio + YHGCH_POWER_MODE_CTRL); + control_value &= ~(YHGCH_PW_MODE_CTL_MODE_MASK | + YHGCH_PW_MODE_CTL_OSC_INPUT_MASK); + control_value |= YHGCH_FIELD(YHGCH_PW_MODE_CTL_MODE, power_mode); + control_value |= YHGCH_FIELD(YHGCH_PW_MODE_CTL_OSC_INPUT, input); + writel(control_value, mmio + YHGCH_POWER_MODE_CTRL); } -void inspur_set_current_gate(struct inspur_drm_private *priv, unsigned int gate) +void yhgch_set_current_gate(struct yhgch_drm_private *priv, unsigned int gate) { unsigned int gate_reg; unsigned int mode; void __iomem *mmio = priv->mmio; /* Get current power mode. */ - mode = (readl(mmio + INSPUR_POWER_MODE_CTRL) & - INSPUR_PW_MODE_CTL_MODE_MASK) >> INSPUR_PW_MODE_CTL_MODE_SHIFT; + mode = (readl(mmio + YHGCH_POWER_MODE_CTRL) & + YHGCH_PW_MODE_CTL_MODE_MASK) >> YHGCH_PW_MODE_CTL_MODE_SHIFT; switch (mode) { - case INSPUR_PW_MODE_CTL_MODE_MODE0: - gate_reg = INSPUR_MODE0_GATE; + case YHGCH_PW_MODE_CTL_MODE_MODE0: + gate_reg = YHGCH_MODE0_GATE; break; - case INSPUR_PW_MODE_CTL_MODE_MODE1: - gate_reg = INSPUR_MODE1_GATE; + case YHGCH_PW_MODE_CTL_MODE_MODE1: + gate_reg = YHGCH_MODE1_GATE; break; default: - gate_reg = INSPUR_MODE0_GATE; + gate_reg = YHGCH_MODE0_GATE; break; } writel(gate, mmio + gate_reg); } -static void inspur_hw_config(struct inspur_drm_private *priv) +static void yhgch_hw_config(struct yhgch_drm_private *priv) { unsigned int reg; /* On hardware reset, power mode 0 is default. */ - inspur_set_power_mode(priv, INSPUR_PW_MODE_CTL_MODE_MODE0); + yhgch_set_power_mode(priv, YHGCH_PW_MODE_CTL_MODE_MODE0); /* Enable display power gate & LOCALMEM power gate */ - reg = readl(priv->mmio + INSPUR_CURRENT_GATE); - reg &= ~INSPUR_CURR_GATE_DISPLAY_MASK; - reg &= ~INSPUR_CURR_GATE_LOCALMEM_MASK; - reg |= INSPUR_CURR_GATE_DISPLAY(1); - reg |= INSPUR_CURR_GATE_LOCALMEM(1); + reg = readl(priv->mmio + YHGCH_CURRENT_GATE); + reg &= ~YHGCH_CURR_GATE_DISPLAY_MASK; + reg &= ~YHGCH_CURR_GATE_LOCALMEM_MASK; + reg |= YHGCH_CURR_GATE_DISPLAY(1); + reg |= YHGCH_CURR_GATE_LOCALMEM(1); - inspur_set_current_gate(priv, reg); + yhgch_set_current_gate(priv, reg); /* * Reset the memory controller. If the memory controller @@ -213,18 +213,18 @@ static void inspur_hw_config(struct inspur_drm_private *priv) * the memory.The memory should be resetted after * changing the MXCLK. */ - reg = readl(priv->mmio + INSPUR_MISC_CTRL); - reg &= ~INSPUR_MSCCTL_LOCALMEM_RESET_MASK; - reg |= INSPUR_MSCCTL_LOCALMEM_RESET(0); - writel(reg, priv->mmio + INSPUR_MISC_CTRL); + reg = readl(priv->mmio + YHGCH_MISC_CTRL); + reg &= ~YHGCH_MSCCTL_LOCALMEM_RESET_MASK; + reg |= YHGCH_MSCCTL_LOCALMEM_RESET(0); + writel(reg, priv->mmio + YHGCH_MISC_CTRL); - reg &= ~INSPUR_MSCCTL_LOCALMEM_RESET_MASK; - reg |= INSPUR_MSCCTL_LOCALMEM_RESET(1); + reg &= ~YHGCH_MSCCTL_LOCALMEM_RESET_MASK; + reg |= YHGCH_MSCCTL_LOCALMEM_RESET(1); - writel(reg, priv->mmio + INSPUR_MISC_CTRL); + writel(reg, priv->mmio + YHGCH_MISC_CTRL); } -static int inspur_hw_map(struct inspur_drm_private *priv) +static int yhgch_hw_map(struct yhgch_drm_private *priv) { struct drm_device *dev = priv->dev; struct pci_dev *pdev = dev->pdev; @@ -251,64 +251,64 @@ static int inspur_hw_map(struct inspur_drm_private *priv) return 0; } -static int inspur_hw_init(struct inspur_drm_private *priv) +static int yhgch_hw_init(struct yhgch_drm_private *priv) { int ret; - ret = inspur_hw_map(priv); + ret = yhgch_hw_map(priv); if (ret) return ret; - inspur_hw_config(priv); + yhgch_hw_config(priv); return 0; } -void inspur_unload(struct drm_device *dev) +void yhgch_unload(struct drm_device *dev) { - struct inspur_drm_private *priv = dev->dev_private; + struct yhgch_drm_private *priv = dev->dev_private; - inspur_fbdev_fini(priv); + yhgch_fbdev_fini(priv); drm_atomic_helper_shutdown(dev); if (dev->irq_enabled) drm_irq_uninstall(dev); - inspur_kms_fini(priv); - inspur_mm_fini(priv); + yhgch_kms_fini(priv); + yhgch_mm_fini(priv); dev->dev_private = NULL; } -int inspur_load(struct drm_device *dev, unsigned long flags) +int yhgch_load(struct drm_device *dev, unsigned long flags) { - struct inspur_drm_private *priv; + struct yhgch_drm_private *priv; int ret; priv = devm_kzalloc(dev->dev, sizeof(*priv), GFP_KERNEL); if (!priv) { - DRM_ERROR("no memory to allocate for inspur_drm_private\n"); + DRM_ERROR("no memory to allocate for yhgch_drm_private\n"); return -ENOMEM; } dev->dev_private = priv; priv->dev = dev; - ret = inspur_hw_init(priv); + ret = yhgch_hw_init(priv); if (ret) goto err; - ret = inspur_mm_init(priv); + ret = yhgch_mm_init(priv); if (ret) goto err; - ret = inspur_kms_init(priv); + ret = yhgch_kms_init(priv); if (ret) goto err; /* reset all the states of crtc/plane/encoder/connector */ drm_mode_config_reset(dev); - ret = inspur_fbdev_init(priv); + ret = yhgch_fbdev_init(priv); if (ret) { DRM_ERROR("failed to initialize fbdev: %d\n", ret); goto err; @@ -317,21 +317,21 @@ int inspur_load(struct drm_device *dev, unsigned long flags) return 0; err: - inspur_unload(dev); + yhgch_unload(dev); DRM_ERROR("failed to initialize drm driver: %d\n", ret); return ret; } -static int inspur_pci_probe(struct pci_dev *pdev, +static int yhgch_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) { - inspur_remove_framebuffers(pdev); + yhgch_remove_framebuffers(pdev); - return drm_get_pci_dev(pdev, ent, &inspur_driver); + return drm_get_pci_dev(pdev, ent, &yhgch_driver); } -static void inspur_pci_remove(struct pci_dev *pdev) +static void yhgch_pci_remove(struct pci_dev *pdev) { struct drm_device *dev = pci_get_drvdata(pdev); @@ -339,40 +339,40 @@ static void inspur_pci_remove(struct pci_dev *pdev) pci_disable_device(pdev); } -static void inspur_pci_shutdown(struct pci_dev *pdev) +static void yhgch_pci_shutdown(struct pci_dev *pdev) { - inspur_pci_remove(pdev); + yhgch_pci_remove(pdev); } -static struct pci_device_id inspur_pci_table[] = { +static struct pci_device_id yhgch_pci_table[] = { { 0x1bd4, 0x0750, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, { 0, } }; -static struct pci_driver inspur_pci_driver = { - .name = "inspur-drm", - .id_table = inspur_pci_table, - .probe = inspur_pci_probe, - .remove = inspur_pci_remove, - .shutdown = inspur_pci_shutdown, - .driver.pm = &inspur_pm_ops, +static struct pci_driver yhgch_pci_driver = { + .name = "yhgch-drm", + .id_table = yhgch_pci_table, + .probe = yhgch_pci_probe, + .remove = yhgch_pci_remove, + .shutdown = yhgch_pci_shutdown, + .driver.pm = &yhgch_pm_ops, }; -static int __init inspur_init(void) +static int __init yhgch_init(void) { - return pci_register_driver(&inspur_pci_driver); + return pci_register_driver(&yhgch_pci_driver); } -static void __exit inspur_exit(void) +static void __exit yhgch_exit(void) { - return pci_unregister_driver(&inspur_pci_driver); + return pci_unregister_driver(&yhgch_pci_driver); } -module_init(inspur_init); -module_exit(inspur_exit); +module_init(yhgch_init); +module_exit(yhgch_exit); -MODULE_DEVICE_TABLE(pci, inspur_pci_table); +MODULE_DEVICE_TABLE(pci, yhgch_pci_table); MODULE_AUTHOR(""); -MODULE_DESCRIPTION("DRM Driver for InspurBMC"); +MODULE_DESCRIPTION("DRM Driver for YHGCHBMC"); MODULE_LICENSE("GPL v2"); -MODULE_VERSION("3.0"); +MODULE_VERSION("1.2"); diff --git a/drivers/gpu/drm/inspur/inspur-drm/inspur_drm_drv.h b/drivers/gpu/drm/yhgch/yhgch_drm_drv.h similarity index 36% rename from drivers/gpu/drm/inspur/inspur-drm/inspur_drm_drv.h rename to drivers/gpu/drm/yhgch/yhgch_drm_drv.h index 6ddf3359f5ed..4fd0a8369e6f 100644 --- a/drivers/gpu/drm/inspur/inspur-drm/inspur_drm_drv.h +++ b/drivers/gpu/drm/yhgch/yhgch_drm_drv.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 */ -#ifndef INSPUR_DRM_DRV_H -#define INSPUR_DRM_DRV_H +#ifndef YHGCH_DRM_DRV_H +#define YHGCH_DRM_DRV_H #include #include @@ -9,24 +9,24 @@ #include #include -struct inspur_framebuffer { +struct yhgch_framebuffer { struct drm_framebuffer fb; struct drm_gem_object *obj; }; -struct inspur_fbdev { +struct yhgch_fbdev { struct drm_fb_helper helper; - struct inspur_framebuffer *fb; + struct yhgch_framebuffer *fb; int size; }; -struct inspur_cursor { - struct inspur_bo *cursor_1; - struct inspur_bo *cursor_2; - struct inspur_bo *cursor_current; +struct yhgch_cursor { + struct yhgch_bo *cursor_1; + struct yhgch_bo *cursor_2; + struct yhgch_bo *cursor_current; }; -struct inspur_drm_private { +struct yhgch_drm_private { /* hw */ void __iomem *mmio; void __iomem *fb_map; @@ -44,16 +44,16 @@ struct inspur_drm_private { bool initialized; /* fbdev */ - struct inspur_fbdev *fbdev; + struct yhgch_fbdev *fbdev; bool mm_inited; /* hw cursor */ - struct inspur_cursor cursor; + struct yhgch_cursor cursor; }; -#define to_inspur_framebuffer(x) container_of(x, struct inspur_framebuffer, fb) +#define to_yhgch_framebuffer(x) container_of(x, struct yhgch_framebuffer, fb) -struct inspur_bo { +struct yhgch_bo { struct ttm_buffer_object bo; struct ttm_placement placement; struct ttm_bo_kmap_obj kmap; @@ -62,48 +62,48 @@ struct inspur_bo { int pin_count; }; -static inline struct inspur_bo *inspur_bo(struct ttm_buffer_object *bo) +static inline struct yhgch_bo *yhgch_bo(struct ttm_buffer_object *bo) { - return container_of(bo, struct inspur_bo, bo); + return container_of(bo, struct yhgch_bo, bo); } -static inline struct inspur_bo *gem_to_inspur_bo(struct drm_gem_object *gem) +static inline struct yhgch_bo *gem_to_yhgch_bo(struct drm_gem_object *gem) { - return container_of(gem, struct inspur_bo, gem); + return container_of(gem, struct yhgch_bo, gem); } -void inspur_set_power_mode(struct inspur_drm_private *priv, +void yhgch_set_power_mode(struct yhgch_drm_private *priv, unsigned int power_mode); -void inspur_set_current_gate(struct inspur_drm_private *priv, +void yhgch_set_current_gate(struct yhgch_drm_private *priv, unsigned int gate); -int inspur_load(struct drm_device *dev, unsigned long flags); -void inspur_unload(struct drm_device *dev); +int yhgch_load(struct drm_device *dev, unsigned long flags); +void yhgch_unload(struct drm_device *dev); -int inspur_de_init(struct inspur_drm_private *priv); -int inspur_vdac_init(struct inspur_drm_private *priv); -int inspur_fbdev_init(struct inspur_drm_private *priv); -void inspur_fbdev_fini(struct inspur_drm_private *priv); +int yhgch_de_init(struct yhgch_drm_private *priv); +int yhgch_vdac_init(struct yhgch_drm_private *priv); +int yhgch_fbdev_init(struct yhgch_drm_private *priv); +void yhgch_fbdev_fini(struct yhgch_drm_private *priv); -int inspur_gem_create(struct drm_device *dev, u32 size, bool iskernel, +int yhgch_gem_create(struct drm_device *dev, u32 size, bool iskernel, struct drm_gem_object **obj); -struct inspur_framebuffer *inspur_framebuffer_init(struct drm_device *dev, +struct yhgch_framebuffer *yhgch_framebuffer_init(struct drm_device *dev, const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object *obj); -int inspur_mm_init(struct inspur_drm_private *inspur); -void inspur_mm_fini(struct inspur_drm_private *inspur); -int inspur_bo_pin(struct inspur_bo *bo, u32 pl_flag, u64 *gpu_addr); -int inspur_bo_unpin(struct inspur_bo *bo); -void inspur_gem_free_object(struct drm_gem_object *obj); -int inspur_bo_create(struct drm_device *dev, int size, int align, u32 flags, - struct inspur_bo **phibmcbo); -int inspur_dumb_create(struct drm_file *file, struct drm_device *dev, +int yhgch_mm_init(struct yhgch_drm_private *yhgch); +void yhgch_mm_fini(struct yhgch_drm_private *yhgch); +int yhgch_bo_pin(struct yhgch_bo *bo, u32 pl_flag, u64 *gpu_addr); +int yhgch_bo_unpin(struct yhgch_bo *bo); +void yhgch_gem_free_object(struct drm_gem_object *obj); +int yhgch_bo_create(struct drm_device *dev, int size, int align, u32 flags, + struct yhgch_bo **phibmcbo); +int yhgch_dumb_create(struct drm_file *file, struct drm_device *dev, struct drm_mode_create_dumb *args); -int inspur_dumb_mmap_offset(struct drm_file *file, struct drm_device *dev, +int yhgch_dumb_mmap_offset(struct drm_file *file, struct drm_device *dev, u32 handle, u64 *offset); -int inspur_mmap(struct file *filp, struct vm_area_struct *vma); +int yhgch_mmap(struct file *filp, struct vm_area_struct *vma); -extern const struct drm_mode_config_funcs inspur_mode_funcs; +extern const struct drm_mode_config_funcs yhgch_mode_funcs; #endif diff --git a/drivers/gpu/drm/inspur/inspur-drm/inspur_drm_fbdev.c b/drivers/gpu/drm/yhgch/yhgch_drm_fbdev.c similarity index 80% rename from drivers/gpu/drm/inspur/inspur-drm/inspur_drm_fbdev.c rename to drivers/gpu/drm/yhgch/yhgch_drm_fbdev.c index 79aa376aaead..c6ffaf881ef0 100644 --- a/drivers/gpu/drm/inspur/inspur-drm/inspur_drm_fbdev.c +++ b/drivers/gpu/drm/yhgch/yhgch_drm_fbdev.c @@ -4,9 +4,9 @@ #include #include -#include "inspur_drm_drv.h" +#include "yhgch_drm_drv.h" -static int inspurfb_create_object(struct inspur_drm_private *priv, +static int yhgchfb_create_object(struct yhgch_drm_private *priv, const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object **gobj_p) { @@ -16,7 +16,7 @@ static int inspurfb_create_object(struct inspur_drm_private *priv, int ret = 0; size = mode_cmd->pitches[0] * mode_cmd->height; - ret = inspur_gem_create(dev, size, true, &gobj); + ret = yhgch_gem_create(dev, size, true, &gobj); if (ret) return ret; @@ -24,7 +24,7 @@ static int inspurfb_create_object(struct inspur_drm_private *priv, return ret; } -static struct fb_ops inspur_drm_fb_ops = { +static struct fb_ops yhgch_drm_fb_ops = { .owner = THIS_MODULE, .fb_check_var = drm_fb_helper_check_var, .fb_set_par = drm_fb_helper_set_par, @@ -36,12 +36,12 @@ static struct fb_ops inspur_drm_fb_ops = { .fb_setcmap = drm_fb_helper_setcmap, }; -static int inspur_drm_fb_create(struct drm_fb_helper *helper, +static int yhgch_drm_fb_create(struct drm_fb_helper *helper, struct drm_fb_helper_surface_size *sizes) { - struct inspur_fbdev *hi_fbdev = - container_of(helper, struct inspur_fbdev, helper); - struct inspur_drm_private *priv = helper->dev->dev_private; + struct yhgch_fbdev *hi_fbdev = + container_of(helper, struct yhgch_fbdev, helper); + struct yhgch_drm_private *priv = helper->dev->dev_private; struct fb_info *info; struct drm_mode_fb_cmd2 mode_cmd; struct drm_gem_object *gobj = NULL; @@ -49,7 +49,7 @@ static int inspur_drm_fb_create(struct drm_fb_helper *helper, int ret1; size_t size; unsigned int bytes_per_pixel; - struct inspur_bo *bo = NULL; + struct yhgch_bo *bo = NULL; DRM_DEBUG_DRIVER("surface width(%d), height(%d) and bpp(%d)\n", sizes->surface_width, sizes->surface_height, @@ -65,13 +65,13 @@ static int inspur_drm_fb_create(struct drm_fb_helper *helper, size = PAGE_ALIGN(mode_cmd.pitches[0] * mode_cmd.height); - ret = inspurfb_create_object(priv, &mode_cmd, &gobj); + ret = yhgchfb_create_object(priv, &mode_cmd, &gobj); if (ret) { DRM_ERROR("failed to create fbcon backing object: %d\n", ret); return -ENOMEM; } - bo = gem_to_inspur_bo(gobj); + bo = gem_to_yhgch_bo(gobj); ret = ttm_bo_reserve(&bo->bo, true, false, NULL); if (ret) { @@ -79,7 +79,7 @@ static int inspur_drm_fb_create(struct drm_fb_helper *helper, goto out_unref_gem; } - ret = inspur_bo_pin(bo, TTM_PL_FLAG_VRAM, NULL); + ret = yhgch_bo_pin(bo, TTM_PL_FLAG_VRAM, NULL); if (ret) { DRM_ERROR("failed to pin fbcon: %d\n", ret); goto out_unreserve_ttm_bo; @@ -101,7 +101,7 @@ static int inspur_drm_fb_create(struct drm_fb_helper *helper, info->par = hi_fbdev; - hi_fbdev->fb = inspur_framebuffer_init(priv->dev, &mode_cmd, gobj); + hi_fbdev->fb = yhgch_framebuffer_init(priv->dev, &mode_cmd, gobj); if (IS_ERR(hi_fbdev->fb)) { ret = PTR_ERR(hi_fbdev->fb); hi_fbdev->fb = NULL; @@ -112,9 +112,9 @@ static int inspur_drm_fb_create(struct drm_fb_helper *helper, priv->fbdev->size = size; hi_fbdev->helper.fb = &hi_fbdev->fb->fb; - strcpy(info->fix.id, "inspurdrmfb"); + strcpy(info->fix.id, "yhgchdrmfb"); - info->fbops = &inspur_drm_fb_ops; + info->fbops = &yhgch_drm_fb_ops; drm_fb_helper_fill_fix(info, hi_fbdev->fb->fb.pitches[0], hi_fbdev->fb->fb.format->depth); @@ -136,7 +136,7 @@ static int inspur_drm_fb_create(struct drm_fb_helper *helper, } ttm_bo_kunmap(&bo->kmap); out_unpin_bo: - inspur_bo_unpin(bo); + yhgch_bo_unpin(bo); out_unreserve_ttm_bo: ttm_bo_unreserve(&bo->bo); out_unref_gem: @@ -145,9 +145,9 @@ static int inspur_drm_fb_create(struct drm_fb_helper *helper, return ret; } -static void inspur_fbdev_destroy(struct inspur_fbdev *fbdev) +static void yhgch_fbdev_destroy(struct yhgch_fbdev *fbdev) { - struct inspur_framebuffer *gfb = fbdev->fb; + struct yhgch_framebuffer *gfb = fbdev->fb; struct drm_fb_helper *fbh = &fbdev->helper; // drm_fb_helper_unregister_fbi(fbh); @@ -158,26 +158,26 @@ static void inspur_fbdev_destroy(struct inspur_fbdev *fbdev) drm_framebuffer_put(&gfb->fb); } -static const struct drm_fb_helper_funcs inspur_fbdev_helper_funcs = { - .fb_probe = inspur_drm_fb_create, +static const struct drm_fb_helper_funcs yhgch_fbdev_helper_funcs = { + .fb_probe = yhgch_drm_fb_create, }; -int inspur_fbdev_init(struct inspur_drm_private *priv) +int yhgch_fbdev_init(struct yhgch_drm_private *priv) { int ret; struct fb_var_screeninfo *var; struct fb_fix_screeninfo *fix; - struct inspur_fbdev *hifbdev; + struct yhgch_fbdev *hifbdev; hifbdev = devm_kzalloc(priv->dev->dev, sizeof(*hifbdev), GFP_KERNEL); if (!hifbdev) { - DRM_ERROR("failed to allocate inspur_fbdev\n"); + DRM_ERROR("failed to allocate yhgch_fbdev\n"); return -ENOMEM; } priv->fbdev = hifbdev; drm_fb_helper_prepare(priv->dev, &hifbdev->helper, - &inspur_fbdev_helper_funcs); + &yhgch_fbdev_helper_funcs); /* Now just one crtc and one channel */ ret = drm_fb_helper_init(priv->dev, &hifbdev->helper, 1); @@ -238,11 +238,11 @@ int inspur_fbdev_init(struct inspur_drm_private *priv) return ret; } -void inspur_fbdev_fini(struct inspur_drm_private *priv) +void yhgch_fbdev_fini(struct yhgch_drm_private *priv) { if (!priv->fbdev) return; - inspur_fbdev_destroy(priv->fbdev); + yhgch_fbdev_destroy(priv->fbdev); priv->fbdev = NULL; } diff --git a/drivers/gpu/drm/yhgch/yhgch_drm_regs.h b/drivers/gpu/drm/yhgch/yhgch_drm_regs.h new file mode 100644 index 000000000000..dec27a64ab2e --- /dev/null +++ b/drivers/gpu/drm/yhgch/yhgch_drm_regs.h @@ -0,0 +1,210 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + + +#ifndef YHGCH_DRM_HW_H +#define YHGCH_DRM_HW_H + +/* register definition */ +#define YHGCH_MISC_CTRL 0x4 + +#define YHGCH_MSCCTL_LOCALMEM_RESET(x) ((x) << 6) +#define YHGCH_MSCCTL_LOCALMEM_RESET_MASK 0x40 + +#define YHGCH_CURRENT_GATE 0x000040 +#define YHGCH_CURR_GATE_DISPLAY(x) ((x) << 2) +#define YHGCH_CURR_GATE_DISPLAY_MASK 0x4 + +#define YHGCH_CURR_GATE_LOCALMEM(x) ((x) << 1) +#define YHGCH_CURR_GATE_LOCALMEM_MASK 0x2 + +#define YHGCH_MODE0_GATE 0x000044 +#define YHGCH_MODE1_GATE 0x000048 +#define YHGCH_POWER_MODE_CTRL 0x00004C + +#define YHGCH_PW_MODE_CTL_OSC_INPUT(x) ((x) << 3) +#define YHGCH_PW_MODE_CTL_OSC_INPUT_MASK 0x8 + +#define YHGCH_PW_MODE_CTL_MODE(x) ((x) << 0) +#define YHGCH_PW_MODE_CTL_MODE_MASK 0x03 +#define YHGCH_PW_MODE_CTL_MODE_SHIFT 0 + +#define YHGCH_PW_MODE_CTL_MODE_MODE0 0 +#define YHGCH_PW_MODE_CTL_MODE_MODE1 1 +#define YHGCH_PW_MODE_CTL_MODE_SLEEP 2 + +//#define YHGCH_CRT_PLL_CTRL 0x000060 + +#define YHGCH_PLL_CTRL_BYPASS(x) ((x) << 18) +#define YHGCH_PLL_CTRL_BYPASS_MASK 0x40000 + +#define YHGCH_PLL_CTRL_POWER(x) ((x) << 17) +#define YHGCH_PLL_CTRL_POWER_MASK 0x20000 + +#define YHGCH_PLL_CTRL_INPUT(x) ((x) << 16) +#define YHGCH_PLL_CTRL_INPUT_MASK 0x10000 + +#define YHGCH_PLL_CTRL_POD(x) ((x) << 14) +#define YHGCH_PLL_CTRL_POD_MASK 0xC000 + +#define YHGCH_PLL_CTRL_OD(x) ((x) << 12) +#define YHGCH_PLL_CTRL_OD_MASK 0x3000 + +#define YHGCH_PLL_CTRL_N(x) ((x) << 8) +#define YHGCH_PLL_CTRL_N_MASK 0xF00 + +#define YHGCH_PLL_CTRL_M(x) ((x) << 0) +#define YHGCH_PLL_CTRL_M_MASK 0xFF + +#define YHGCH_CRT_DISP_CTL 0x80200 + +#define YHGCH_CRT_DISP_CTL_DPMS(x) ((x) << 30) +#define YHGCH_CRT_DISP_CTL_DPMS_MASK 0xc0000000 + +#define YHGCH_CRT_DPMS_ON 0 +#define YHGCH_CRT_DPMS_OFF 3 + +#define YHGCH_CRT_DISP_CTL_CRTSELECT(x) ((x) << 25) +#define YHGCH_CRT_DISP_CTL_CRTSELECT_MASK 0x2000000 + +#define YHGCH_CRTSELECT_CRT 1 + +#define YHGCH_CRT_DISP_CTL_CLOCK_PHASE(x) ((x) << 14) +#define YHGCH_CRT_DISP_CTL_CLOCK_PHASE_MASK 0x4000 + +#define YHGCH_CRT_DISP_CTL_VSYNC_PHASE(x) ((x) << 13) +#define YHGCH_CRT_DISP_CTL_VSYNC_PHASE_MASK 0x2000 + +#define YHGCH_CRT_DISP_CTL_HSYNC_PHASE(x) ((x) << 12) +#define YHGCH_CRT_DISP_CTL_HSYNC_PHASE_MASK 0x1000 + +#define YHGCH_CRT_DISP_CTL_TIMING(x) ((x) << 8) +#define YHGCH_CRT_DISP_CTL_TIMING_MASK 0x100 + +#define YHGCH_CRT_DISP_CTL_PLANE(x) ((x) << 2) +#define YHGCH_CRT_DISP_CTL_PLANE_MASK 4 + +#define YHGCH_CRT_DISP_CTL_FORMAT(x) ((x) << 0) +#define YHGCH_CRT_DISP_CTL_FORMAT_MASK 0x03 + +#define YHGCH_CRT_FB_ADDRESS 0x080204 + +#define YHGCH_CRT_FB_WIDTH 0x080208 +#define YHGCH_CRT_FB_WIDTH_WIDTH(x) ((x) << 16) +#define YHGCH_CRT_FB_WIDTH_WIDTH_MASK 0x3FFF0000 +#define YHGCH_CRT_FB_WIDTH_OFFS(x) ((x) << 0) +#define YHGCH_CRT_FB_WIDTH_OFFS_MASK 0x3FFF + +#define YHGCH_CRT_HORZ_TOTAL 0x08020C +#define YHGCH_CRT_HORZ_TOTAL_TOTAL(x) ((x) << 16) +#define YHGCH_CRT_HORZ_TOTAL_TOTAL_MASK 0xFFF0000 + +#define YHGCH_CRT_HORZ_TOTAL_DISP_END(x) ((x) << 0) +#define YHGCH_CRT_HORZ_TOTAL_DISP_END_MASK 0xFFF + +#define YHGCH_CRT_HORZ_SYNC 0x080210 +#define YHGCH_CRT_HORZ_SYNC_WIDTH(x) ((x) << 16) +#define YHGCH_CRT_HORZ_SYNC_WIDTH_MASK 0xFF0000 + +#define YHGCH_CRT_HORZ_SYNC_START(x) ((x) << 0) +#define YHGCH_CRT_HORZ_SYNC_START_MASK 0xFFF + +#define YHGCH_CRT_VERT_TOTAL 0x080214 +#define YHGCH_CRT_VERT_TOTAL_TOTAL(x) ((x) << 16) +#define YHGCH_CRT_VERT_TOTAL_TOTAL_MASK 0x7FFF0000 + +#define YHGCH_CRT_VERT_TOTAL_DISP_END(x) ((x) << 0) +#define YHGCH_CRT_VERT_TOTAL_DISP_END_MASK 0x7FF + +#define YHGCH_CRT_VERT_SYNC 0x080218 +#define YHGCH_CRT_VERT_SYNC_HEIGHT(x) ((x) << 16) +#define YHGCH_CRT_VERT_SYNC_HEIGHT_MASK 0x3F0000 + +#define YHGCH_CRT_VERT_SYNC_START(x) ((x) << 0) +#define YHGCH_CRT_VERT_SYNC_START_MASK 0x7FF + +/* Hardware Cursor */ +#define YHGCH_HWC_ADDRESS 0x080230 +#define YHGCH_HWC_ADDRESS_ENABLE(x) ((x) << 31) +#define YHGCH_HWC_ADDRESS_ENABLE_MASK 0x80000000 +#define YHGCH_HWC_ADDRESS_ADDRESS(x) ((x) << 0) +#define YHGCH_HWC_ADDRESS_ADDRESS_MASK 0xFFFFFFF + +#define YHGCH_HWC_LOCATION 0x080234 +#define YHGCH_HWC_LOCATION_TOP(x) ((x) << 27) +#define YHGCH_HWC_LOCATION_TOP_MASK 0x8000000 +#define YHGCH_HWC_LOCATION_Y(x) ((x) << 16) +#define YHGCH_HWC_LOCATION_Y_MASK 0x7FF0000 +#define YHGCH_HWC_LOCATION_LEFT(x) ((x) << 11) +#define YHGCH_HWC_LOCATION_LEFT_MASK 0x800 +#define YHGCH_HWC_LOCATION_X(x) ((x) << 0) +#define YHGCH_HWC_LOCATION_X_MASK 0x7FF + +#define YHGCH_HWC_COLOR_12 0x080238 +#define YHGCH_HWC_COLOR_12_2_RGB(x) ((x) << 16) +#define YHGCH_HWC_COLOR_12_2_RGB_MASK 0xFFFF0000 +#define YHGCH_HWC_COLOR_12_1_RGB(x) ((x) << 0) +#define YHGCH_HWC_COLOR_12_1_RGB_MASK 0xFFFF + +#define YHGCH_HWC_COLOR_3 0x08023C +#define YHGCH_HWC_COLOR_3_RGB(x) ((x) << 0) +#define YHGCH_HWC_COLOR_3_RGB_MASK 0xFFFF + +/* Auto Centering */ +#define YHGCH_CRT_AUTO_CENTERING_TL 0x080280 +#define YHGCH_CRT_AUTO_CENTERING_TL_TOP(x) ((x) << 16) +#define YHGCH_CRT_AUTO_CENTERING_TL_TOP_MASK 0x7FF0000 + +#define YHGCH_CRT_AUTO_CENTERING_TL_LEFT(x) ((x) << 0) +#define YHGCH_CRT_AUTO_CENTERING_TL_LEFT_MASK 0x7FF + +#define YHGCH_CRT_AUTO_CENTERING_BR 0x080284 +#define YHGCH_CRT_AUTO_CENTERING_BR_BOTTOM(x) ((x) << 16) +#define YHGCH_CRT_AUTO_CENTERING_BR_BOTTOM_MASK 0x7FF0000 + +#define YHGCH_CRT_AUTO_CENTERING_BR_RIGHT(x) ((x) << 0) +#define YHGCH_CRT_AUTO_CENTERING_BR_RIGHT_MASK 0x7FF + +/* register to control panel output */ +#define YHGCH_DISPLAY_CONTROL_HISILE 0x80288 +#define YHGCH_DISPLAY_CONTROL_FPVDDEN(x) ((x) << 0) +#define YHGCH_DISPLAY_CONTROL_PANELDATE(x) ((x) << 1) +#define YHGCH_DISPLAY_CONTROL_FPEN(x) ((x) << 2) +#define YHGCH_DISPLAY_CONTROL_VBIASEN(x) ((x) << 3) + +#define YHGCH_RAW_INTERRUPT 0x80290 +#define YHGCH_RAW_INTERRUPT_VBLANK(x) ((x) << 2) +#define YHGCH_RAW_INTERRUPT_VBLANK_MASK 0x4 + +#define YHGCH_RAW_INTERRUPT_EN 0x80298 +#define YHGCH_RAW_INTERRUPT_EN_VBLANK(x) ((x) << 2) +#define YHGCH_RAW_INTERRUPT_EN_VBLANK_MASK 0x4 + +/* register and values for PLL control */ +#define CRT_PLL1_NS 0x802a8 +#define CRT_PLL1_NS_OUTER_BYPASS(x) ((x) << 30) +#define CRT_PLL1_NS_INTER_BYPASS(x) ((x) << 29) +#define CRT_PLL1_NS_POWERON(x) ((x) << 24) + +#define CRT_PLL1_NS_25MHZ 0x00006691 //640x480 +#define CRT_PLL1_NS_40MHZ 0x00004580 //800x600 +#define CRT_PLL1_NS_65MHZ 0x00002568 //1024x768 +#define CRT_PLL1_NS_83MHZ 0x000027bb //1280x800 +#define CRT_PLL1_NS_106MHZ 0x000027ef //1440x900 +#define CRT_PLL1_NS_108MHZ 0x000027f2 //1280x1024 +#define CRT_PLL1_NS_146MHZ 0x00001575 //1680x1050 +#define CRT_PLL1_NS_148MHZ 0x0000145f //1920x1080 +#define CRT_PLL1_NS_193MHZ 0x000018f7 //1920x1200 + +#define CRT_PLL2_NS 0x802ac +#define CRT_PLL2_NS_25MHZ 0x0 +#define CRT_PLL2_NS_40MHZ 0x0 +#define CRT_PLL2_NS_65MHZ 0x0 +#define CRT_PLL2_NS_83MHZ 0x0 +#define CRT_PLL2_NS_106MHZ 0x0 +#define CRT_PLL2_NS_108MHZ 0x0 +#define CRT_PLL2_NS_146MHZ 0x0 +#define CRT_PLL2_NS_148MHZ 0x0 +#define CRT_PLL2_NS_193MHZ 0x0 + +#define YHGCH_FIELD(field, value) (field(value) & field##_MASK) +#endif diff --git a/drivers/gpu/drm/inspur/inspur-drm/inspur_drm_vdac.c b/drivers/gpu/drm/yhgch/yhgch_drm_vdac.c similarity index 56% rename from drivers/gpu/drm/inspur/inspur-drm/inspur_drm_vdac.c rename to drivers/gpu/drm/yhgch/yhgch_drm_vdac.c index 9e3cd9dc7e02..2b43f5bb1f1f 100644 --- a/drivers/gpu/drm/inspur/inspur-drm/inspur_drm_vdac.c +++ b/drivers/gpu/drm/yhgch/yhgch_drm_vdac.c @@ -3,10 +3,10 @@ #include #include -#include "inspur_drm_drv.h" -#include "inspur_drm_regs.h" +#include "yhgch_drm_drv.h" +#include "yhgch_drm_regs.h" -static int inspur_connector_get_modes(struct drm_connector *connector) +static int yhgch_connector_get_modes(struct drm_connector *connector) { int count; @@ -17,7 +17,7 @@ static int inspur_connector_get_modes(struct drm_connector *connector) return count; } -static enum drm_mode_status inspur_connector_mode_valid(struct drm_connector +static enum drm_mode_status yhgch_connector_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) @@ -25,20 +25,20 @@ static enum drm_mode_status inspur_connector_mode_valid(struct drm_connector return MODE_OK; } -static struct drm_encoder *inspur_connector_best_encoder(struct drm_connector +static struct drm_encoder *yhgch_connector_best_encoder(struct drm_connector *connector) { return drm_encoder_find(connector->dev, NULL, connector->encoder_ids[0]); } -static const struct drm_connector_helper_funcs inspur_connector_helper_funcs = { - .get_modes = inspur_connector_get_modes, - .mode_valid = inspur_connector_mode_valid, - .best_encoder = inspur_connector_best_encoder, +static const struct drm_connector_helper_funcs yhgch_connector_helper_funcs = { + .get_modes = yhgch_connector_get_modes, + .mode_valid = yhgch_connector_mode_valid, + .best_encoder = yhgch_connector_best_encoder, }; -static const struct drm_connector_funcs inspur_connector_funcs = { +static const struct drm_connector_funcs yhgch_connector_funcs = { .fill_modes = drm_helper_probe_single_connector_modes, .destroy = drm_connector_cleanup, .reset = drm_atomic_helper_connector_reset, @@ -46,31 +46,31 @@ static const struct drm_connector_funcs inspur_connector_funcs = { .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, }; -static void inspur_encoder_mode_set(struct drm_encoder *encoder, +static void yhgch_encoder_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adj_mode) { u32 reg; struct drm_device *dev = encoder->dev; - struct inspur_drm_private *priv = dev->dev_private; - - reg = readl(priv->mmio + INSPUR_DISPLAY_CONTROL_HISILE); - reg |= INSPUR_DISPLAY_CONTROL_FPVDDEN(1); - reg |= INSPUR_DISPLAY_CONTROL_PANELDATE(1); - reg |= INSPUR_DISPLAY_CONTROL_FPEN(1); - reg |= INSPUR_DISPLAY_CONTROL_VBIASEN(1); - writel(reg, priv->mmio + INSPUR_DISPLAY_CONTROL_HISILE); + struct yhgch_drm_private *priv = dev->dev_private; + + reg = readl(priv->mmio + YHGCH_DISPLAY_CONTROL_HISILE); + reg |= YHGCH_DISPLAY_CONTROL_FPVDDEN(1); + reg |= YHGCH_DISPLAY_CONTROL_PANELDATE(1); + reg |= YHGCH_DISPLAY_CONTROL_FPEN(1); + reg |= YHGCH_DISPLAY_CONTROL_VBIASEN(1); + writel(reg, priv->mmio + YHGCH_DISPLAY_CONTROL_HISILE); } -static const struct drm_encoder_helper_funcs inspur_encoder_helper_funcs = { - .mode_set = inspur_encoder_mode_set, +static const struct drm_encoder_helper_funcs yhgch_encoder_helper_funcs = { + .mode_set = yhgch_encoder_mode_set, }; -static const struct drm_encoder_funcs inspur_encoder_funcs = { +static const struct drm_encoder_funcs yhgch_encoder_funcs = { .destroy = drm_encoder_cleanup, }; -int inspur_vdac_init(struct inspur_drm_private *priv) +int yhgch_vdac_init(struct yhgch_drm_private *priv) { struct drm_device *dev = priv->dev; struct drm_encoder *encoder; @@ -84,14 +84,14 @@ int inspur_vdac_init(struct inspur_drm_private *priv) } encoder->possible_crtcs = 0x1; - ret = drm_encoder_init(dev, encoder, &inspur_encoder_funcs, + ret = drm_encoder_init(dev, encoder, &yhgch_encoder_funcs, DRM_MODE_ENCODER_DAC, NULL); if (ret) { DRM_ERROR("failed to init encoder: %d\n", ret); return ret; } - drm_encoder_helper_add(encoder, &inspur_encoder_helper_funcs); + drm_encoder_helper_add(encoder, &yhgch_encoder_helper_funcs); connector = devm_kzalloc(dev->dev, sizeof(*connector), GFP_KERNEL); if (!connector) { @@ -100,13 +100,13 @@ int inspur_vdac_init(struct inspur_drm_private *priv) } ret = drm_connector_init(dev, connector, - &inspur_connector_funcs, + &yhgch_connector_funcs, DRM_MODE_CONNECTOR_VGA); if (ret) { DRM_ERROR("failed to init connector: %d\n", ret); return ret; } - drm_connector_helper_add(connector, &inspur_connector_helper_funcs); + drm_connector_helper_add(connector, &yhgch_connector_helper_funcs); drm_connector_register(connector); drm_connector_attach_encoder(connector, encoder); diff --git a/drivers/gpu/drm/inspur/inspur-drm/inspur_ttm.c b/drivers/gpu/drm/yhgch/yhgch_ttm.c similarity index 50% rename from drivers/gpu/drm/inspur/inspur-drm/inspur_ttm.c rename to drivers/gpu/drm/yhgch/yhgch_ttm.c index 90a5dc2a3b91..f5c6a42d87fb 100644 --- a/drivers/gpu/drm/inspur/inspur-drm/inspur_ttm.c +++ b/drivers/gpu/drm/yhgch/yhgch_ttm.c @@ -3,75 +3,75 @@ #include #include -#include "inspur_drm_drv.h" +#include "yhgch_drm_drv.h" #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) -static inline struct inspur_drm_private *inspur_bdev(struct ttm_bo_device *bd) +static inline struct yhgch_drm_private *yhgch_bdev(struct ttm_bo_device *bd) { - return container_of(bd, struct inspur_drm_private, bdev); + return container_of(bd, struct yhgch_drm_private, bdev); } -static int inspur_ttm_mem_global_init(struct drm_global_reference *ref) +static int yhgch_ttm_mem_global_init(struct drm_global_reference *ref) { return ttm_mem_global_init(ref->object); } -static void inspur_ttm_mem_global_release(struct drm_global_reference *ref) +static void yhgch_ttm_mem_global_release(struct drm_global_reference *ref) { ttm_mem_global_release(ref->object); } -static int inspur_ttm_global_init(struct inspur_drm_private *inspur) +static int yhgch_ttm_global_init(struct yhgch_drm_private *yhgch) { int ret; - inspur->mem_global_ref.global_type = DRM_GLOBAL_TTM_MEM; - inspur->mem_global_ref.size = sizeof(struct ttm_mem_global); - inspur->mem_global_ref.init = &inspur_ttm_mem_global_init; - inspur->mem_global_ref.release = &inspur_ttm_mem_global_release; - ret = drm_global_item_ref(&inspur->mem_global_ref); + yhgch->mem_global_ref.global_type = DRM_GLOBAL_TTM_MEM; + yhgch->mem_global_ref.size = sizeof(struct ttm_mem_global); + yhgch->mem_global_ref.init = &yhgch_ttm_mem_global_init; + yhgch->mem_global_ref.release = &yhgch_ttm_mem_global_release; + ret = drm_global_item_ref(&yhgch->mem_global_ref); if (ret) { DRM_ERROR("could not get ref on ttm global: %d\n", ret); return ret; } - inspur->bo_global_ref.mem_glob = inspur->mem_global_ref.object; - inspur->bo_global_ref.ref.global_type = DRM_GLOBAL_TTM_BO; - inspur->bo_global_ref.ref.size = sizeof(struct ttm_bo_global); - inspur->bo_global_ref.ref.init = &ttm_bo_global_init; - inspur->bo_global_ref.ref.release = &ttm_bo_global_release; - ret = drm_global_item_ref(&inspur->bo_global_ref.ref); + yhgch->bo_global_ref.mem_glob = yhgch->mem_global_ref.object; + yhgch->bo_global_ref.ref.global_type = DRM_GLOBAL_TTM_BO; + yhgch->bo_global_ref.ref.size = sizeof(struct ttm_bo_global); + yhgch->bo_global_ref.ref.init = &ttm_bo_global_init; + yhgch->bo_global_ref.ref.release = &ttm_bo_global_release; + ret = drm_global_item_ref(&yhgch->bo_global_ref.ref); if (ret) { DRM_ERROR("failed setting up TTM BO subsystem: %d\n", ret); - drm_global_item_unref(&inspur->mem_global_ref); + drm_global_item_unref(&yhgch->mem_global_ref); return ret; } return 0; } -static void inspur_ttm_global_release(struct inspur_drm_private *inspur) +static void yhgch_ttm_global_release(struct yhgch_drm_private *yhgch) { - drm_global_item_unref(&inspur->bo_global_ref.ref); - drm_global_item_unref(&inspur->mem_global_ref); - inspur->mem_global_ref.release = NULL; + drm_global_item_unref(&yhgch->bo_global_ref.ref); + drm_global_item_unref(&yhgch->mem_global_ref); + yhgch->mem_global_ref.release = NULL; } -static void inspur_bo_ttm_destroy(struct ttm_buffer_object *tbo) +static void yhgch_bo_ttm_destroy(struct ttm_buffer_object *tbo) { - struct inspur_bo *bo = container_of(tbo, struct inspur_bo, bo); + struct yhgch_bo *bo = container_of(tbo, struct yhgch_bo, bo); drm_gem_object_release(&bo->gem); kfree(bo); } -static bool inspur_ttm_bo_is_inspur_bo(struct ttm_buffer_object *bo) +static bool yhgch_ttm_bo_is_yhgch_bo(struct ttm_buffer_object *bo) { - return bo->destroy == &inspur_bo_ttm_destroy; + return bo->destroy == &yhgch_bo_ttm_destroy; } static int -inspur_bo_init_mem_type(struct ttm_bo_device *bdev, u32 type, +yhgch_bo_init_mem_type(struct ttm_bo_device *bdev, u32 type, struct ttm_mem_type_manager *man) { switch (type) { @@ -93,7 +93,7 @@ inspur_bo_init_mem_type(struct ttm_bo_device *bdev, u32 type, return 0; } -void inspur_ttm_placement(struct inspur_bo *bo, int domain) +void yhgch_ttm_placement(struct yhgch_bo *bo, int domain) { u32 count = 0; u32 i; @@ -119,31 +119,31 @@ void inspur_ttm_placement(struct inspur_bo *bo, int domain) } static void -inspur_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl) +yhgch_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl) { - struct inspur_bo *inspurbo = inspur_bo(bo); + struct yhgch_bo *yhgchbo = yhgch_bo(bo); - if (!inspur_ttm_bo_is_inspur_bo(bo)) + if (!yhgch_ttm_bo_is_yhgch_bo(bo)) return; - inspur_ttm_placement(inspurbo, TTM_PL_FLAG_SYSTEM); - *pl = inspurbo->placement; + yhgch_ttm_placement(yhgchbo, TTM_PL_FLAG_SYSTEM); + *pl = yhgchbo->placement; } -static int inspur_bo_verify_access(struct ttm_buffer_object *bo, +static int yhgch_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp) { - struct inspur_bo *inspurbo = inspur_bo(bo); + struct yhgch_bo *yhgchbo = yhgch_bo(bo); - return drm_vma_node_verify_access(&inspurbo->gem.vma_node, + return drm_vma_node_verify_access(&yhgchbo->gem.vma_node, filp->private_data); } -static int inspur_ttm_io_mem_reserve(struct ttm_bo_device *bdev, +static int yhgch_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem) { struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type]; - struct inspur_drm_private *inspur = inspur_bdev(bdev); + struct yhgch_drm_private *yhgch = yhgch_bdev(bdev); mem->bus.addr = NULL; mem->bus.offset = 0; @@ -158,7 +158,7 @@ static int inspur_ttm_io_mem_reserve(struct ttm_bo_device *bdev, return 0; case TTM_PL_VRAM: mem->bus.offset = mem->start << PAGE_SHIFT; - mem->bus.base = pci_resource_start(inspur->dev->pdev, 0); + mem->bus.base = pci_resource_start(yhgch->dev->pdev, 0); mem->bus.is_iomem = true; break; default: @@ -167,17 +167,17 @@ static int inspur_ttm_io_mem_reserve(struct ttm_bo_device *bdev, return 0; } -static void inspur_ttm_backend_destroy(struct ttm_tt *tt) +static void yhgch_ttm_backend_destroy(struct ttm_tt *tt) { ttm_tt_fini(tt); kfree(tt); } -static struct ttm_backend_func inspur_tt_backend_func = { - .destroy = &inspur_ttm_backend_destroy, +static struct ttm_backend_func yhgch_tt_backend_func = { + .destroy = &yhgch_ttm_backend_destroy, }; -static struct ttm_tt *inspur_ttm_tt_create(struct ttm_buffer_object *bo, +static struct ttm_tt *yhgch_ttm_tt_create(struct ttm_buffer_object *bo, uint32_t page_flags) { struct ttm_tt *tt; @@ -188,7 +188,7 @@ static struct ttm_tt *inspur_ttm_tt_create(struct ttm_buffer_object *bo, DRM_ERROR("failed to allocate ttm_tt\n"); return NULL; } - tt->func = &inspur_tt_backend_func; + tt->func = &yhgch_tt_backend_func; ret = ttm_tt_init(tt, bo, page_flags); if (ret) { DRM_ERROR("failed to initialize ttm_tt: %d\n", ret); @@ -198,72 +198,72 @@ static struct ttm_tt *inspur_ttm_tt_create(struct ttm_buffer_object *bo, return tt; } -static int inspur_ttm_tt_populate(struct ttm_tt *ttm, +static int yhgch_ttm_tt_populate(struct ttm_tt *ttm, struct ttm_operation_ctx *ctx) { return ttm_pool_populate(ttm, ctx); } -static void inspur_ttm_tt_unpopulate(struct ttm_tt *ttm) +static void yhgch_ttm_tt_unpopulate(struct ttm_tt *ttm) { ttm_pool_unpopulate(ttm); } -struct ttm_bo_driver inspur_bo_driver = { - .ttm_tt_create = inspur_ttm_tt_create, - .ttm_tt_populate = inspur_ttm_tt_populate, - .ttm_tt_unpopulate = inspur_ttm_tt_unpopulate, - .init_mem_type = inspur_bo_init_mem_type, - .evict_flags = inspur_bo_evict_flags, +struct ttm_bo_driver yhgch_bo_driver = { + .ttm_tt_create = yhgch_ttm_tt_create, + .ttm_tt_populate = yhgch_ttm_tt_populate, + .ttm_tt_unpopulate = yhgch_ttm_tt_unpopulate, + .init_mem_type = yhgch_bo_init_mem_type, + .evict_flags = yhgch_bo_evict_flags, .move = NULL, - .verify_access = inspur_bo_verify_access, - .io_mem_reserve = &inspur_ttm_io_mem_reserve, + .verify_access = yhgch_bo_verify_access, + .io_mem_reserve = &yhgch_ttm_io_mem_reserve, .io_mem_free = NULL, }; -int inspur_mm_init(struct inspur_drm_private *inspur) +int yhgch_mm_init(struct yhgch_drm_private *yhgch) { int ret; - struct drm_device *dev = inspur->dev; - struct ttm_bo_device *bdev = &inspur->bdev; + struct drm_device *dev = yhgch->dev; + struct ttm_bo_device *bdev = &yhgch->bdev; - ret = inspur_ttm_global_init(inspur); + ret = yhgch_ttm_global_init(yhgch); if (ret) return ret; - ret = ttm_bo_device_init(&inspur->bdev, - inspur->bo_global_ref.ref.object, - &inspur_bo_driver, + ret = ttm_bo_device_init(&yhgch->bdev, + yhgch->bo_global_ref.ref.object, + &yhgch_bo_driver, dev->anon_inode->i_mapping, DRM_FILE_PAGE_OFFSET, true); if (ret) { - inspur_ttm_global_release(inspur); + yhgch_ttm_global_release(yhgch); DRM_ERROR("error initializing bo driver: %d\n", ret); return ret; } - ret = ttm_bo_init_mm(bdev, TTM_PL_VRAM, inspur->fb_size >> PAGE_SHIFT); + ret = ttm_bo_init_mm(bdev, TTM_PL_VRAM, yhgch->fb_size >> PAGE_SHIFT); if (ret) { - inspur_ttm_global_release(inspur); + yhgch_ttm_global_release(yhgch); DRM_ERROR("failed ttm VRAM init: %d\n", ret); return ret; } - inspur->mm_inited = true; + yhgch->mm_inited = true; return 0; } -void inspur_mm_fini(struct inspur_drm_private *inspur) +void yhgch_mm_fini(struct yhgch_drm_private *yhgch) { - if (!inspur->mm_inited) + if (!yhgch->mm_inited) return; - ttm_bo_device_release(&inspur->bdev); - inspur_ttm_global_release(inspur); - inspur->mm_inited = false; + ttm_bo_device_release(&yhgch->bdev); + yhgch_ttm_global_release(yhgch); + yhgch->mm_inited = false; } -static void inspur_bo_unref(struct inspur_bo **bo) +static void yhgch_bo_unref(struct yhgch_bo **bo) { struct ttm_buffer_object *tbo; @@ -275,48 +275,48 @@ static void inspur_bo_unref(struct inspur_bo **bo) *bo = NULL; } -int inspur_bo_create(struct drm_device *dev, int size, int align, - u32 flags, struct inspur_bo **pinspurbo) +int yhgch_bo_create(struct drm_device *dev, int size, int align, + u32 flags, struct yhgch_bo **pyhgchbo) { - struct inspur_drm_private *inspur = dev->dev_private; - struct inspur_bo *inspurbo; + struct yhgch_drm_private *yhgch = dev->dev_private; + struct yhgch_bo *yhgchbo; size_t acc_size; int ret; - inspurbo = kzalloc(sizeof(*inspurbo), GFP_KERNEL); - if (!inspurbo) { - DRM_ERROR("failed to allocate inspurbo\n"); + yhgchbo = kzalloc(sizeof(*yhgchbo), GFP_KERNEL); + if (!yhgchbo) { + DRM_ERROR("failed to allocate yhgchbo\n"); return -ENOMEM; } - ret = drm_gem_object_init(dev, &inspurbo->gem, size); + ret = drm_gem_object_init(dev, &yhgchbo->gem, size); if (ret) { DRM_ERROR("failed to initialize drm gem object: %d\n", ret); - kfree(inspurbo); + kfree(yhgchbo); return ret; } - inspurbo->bo.bdev = &inspur->bdev; + yhgchbo->bo.bdev = &yhgch->bdev; - inspur_ttm_placement(inspurbo, TTM_PL_FLAG_VRAM | TTM_PL_FLAG_SYSTEM); + yhgch_ttm_placement(yhgchbo, TTM_PL_FLAG_VRAM | TTM_PL_FLAG_SYSTEM); - acc_size = ttm_bo_dma_acc_size(&inspur->bdev, size, - sizeof(struct inspur_bo)); + acc_size = ttm_bo_dma_acc_size(&yhgch->bdev, size, + sizeof(struct yhgch_bo)); - ret = ttm_bo_init(&inspur->bdev, &inspurbo->bo, size, - ttm_bo_type_device, &inspurbo->placement, + ret = ttm_bo_init(&yhgch->bdev, &yhgchbo->bo, size, + ttm_bo_type_device, &yhgchbo->placement, align >> PAGE_SHIFT, false, acc_size, - NULL, NULL, inspur_bo_ttm_destroy); + NULL, NULL, yhgch_bo_ttm_destroy); if (ret) { - inspur_bo_unref(&inspurbo); + yhgch_bo_unref(&yhgchbo); DRM_ERROR("failed to initialize ttm_bo: %d\n", ret); return ret; } - *pinspurbo = inspurbo; + *pyhgchbo = yhgchbo; return 0; } -int inspur_bo_pin(struct inspur_bo *bo, u32 pl_flag, u64 *gpu_addr) +int yhgch_bo_pin(struct yhgch_bo *bo, u32 pl_flag, u64 *gpu_addr) { int i, ret; @@ -329,7 +329,7 @@ int inspur_bo_pin(struct inspur_bo *bo, u32 pl_flag, u64 *gpu_addr) return 0; } - inspur_ttm_placement(bo, pl_flag); + yhgch_ttm_placement(bo, pl_flag); for (i = 0; i < bo->placement.num_placement; i++) bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT; ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx); @@ -342,7 +342,7 @@ int inspur_bo_pin(struct inspur_bo *bo, u32 pl_flag, u64 *gpu_addr) return 0; } -int inspur_bo_unpin(struct inspur_bo *bo) +int yhgch_bo_unpin(struct yhgch_bo *bo) { int i, ret; struct ttm_operation_ctx ctx = { false, false }; @@ -366,23 +366,23 @@ int inspur_bo_unpin(struct inspur_bo *bo) return 0; } -int inspur_mmap(struct file *filp, struct vm_area_struct *vma) +int yhgch_mmap(struct file *filp, struct vm_area_struct *vma) { struct drm_file *file_priv; - struct inspur_drm_private *inspur; + struct yhgch_drm_private *yhgch; if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET)) return -EINVAL; file_priv = filp->private_data; - inspur = file_priv->minor->dev->dev_private; - return ttm_bo_mmap(filp, vma, &inspur->bdev); + yhgch = file_priv->minor->dev->dev_private; + return ttm_bo_mmap(filp, vma, &yhgch->bdev); } -int inspur_gem_create(struct drm_device *dev, u32 size, bool iskernel, +int yhgch_gem_create(struct drm_device *dev, u32 size, bool iskernel, struct drm_gem_object **obj) { - struct inspur_bo *inspurbo; + struct yhgch_bo *yhgchbo; int ret; *obj = NULL; @@ -393,17 +393,17 @@ int inspur_gem_create(struct drm_device *dev, u32 size, bool iskernel, return -EINVAL; } - ret = inspur_bo_create(dev, size, 0, 0, &inspurbo); + ret = yhgch_bo_create(dev, size, 0, 0, &yhgchbo); if (ret) { if (ret != -ERESTARTSYS) DRM_ERROR("failed to allocate GEM object: %d\n", ret); return ret; } - *obj = &inspurbo->gem; + *obj = &yhgchbo->gem; return 0; } -int inspur_dumb_create(struct drm_file *file, struct drm_device *dev, +int yhgch_dumb_create(struct drm_file *file, struct drm_device *dev, struct drm_mode_create_dumb *args) { struct drm_gem_object *gobj; @@ -413,7 +413,7 @@ int inspur_dumb_create(struct drm_file *file, struct drm_device *dev, args->pitch = ALIGN(args->width * DIV_ROUND_UP(args->bpp, 8), 16); args->size = args->pitch * args->height; - ret = inspur_gem_create(dev, args->size, false, &gobj); + ret = yhgch_gem_create(dev, args->size, false, &gobj); if (ret) { DRM_ERROR("failed to create GEM object: %d\n", ret); return ret; @@ -430,75 +430,75 @@ int inspur_dumb_create(struct drm_file *file, struct drm_device *dev, return 0; } -void inspur_gem_free_object(struct drm_gem_object *obj) +void yhgch_gem_free_object(struct drm_gem_object *obj) { - struct inspur_bo *inspurbo = gem_to_inspur_bo(obj); + struct yhgch_bo *yhgchbo = gem_to_yhgch_bo(obj); - inspur_bo_unref(&inspurbo); + yhgch_bo_unref(&yhgchbo); } -static u64 inspur_bo_mmap_offset(struct inspur_bo *bo) +static u64 yhgch_bo_mmap_offset(struct yhgch_bo *bo) { return drm_vma_node_offset_addr(&bo->bo.vma_node); } -int inspur_dumb_mmap_offset(struct drm_file *file, struct drm_device *dev, +int yhgch_dumb_mmap_offset(struct drm_file *file, struct drm_device *dev, u32 handle, u64 *offset) { struct drm_gem_object *obj; - struct inspur_bo *bo; + struct yhgch_bo *bo; obj = drm_gem_object_lookup(file, handle); if (!obj) return -ENOENT; - bo = gem_to_inspur_bo(obj); - *offset = inspur_bo_mmap_offset(bo); + bo = gem_to_yhgch_bo(obj); + *offset = yhgch_bo_mmap_offset(bo); drm_gem_object_put_unlocked(obj); return 0; } -static void inspur_user_framebuffer_destroy(struct drm_framebuffer *fb) +static void yhgch_user_framebuffer_destroy(struct drm_framebuffer *fb) { - struct inspur_framebuffer *inspur_fb = to_inspur_framebuffer(fb); + struct yhgch_framebuffer *yhgch_fb = to_yhgch_framebuffer(fb); - drm_gem_object_put_unlocked(inspur_fb->obj); + drm_gem_object_put_unlocked(yhgch_fb->obj); drm_framebuffer_cleanup(fb); - kfree(inspur_fb); + kfree(yhgch_fb); } -static const struct drm_framebuffer_funcs inspur_fb_funcs = { - .destroy = inspur_user_framebuffer_destroy, +static const struct drm_framebuffer_funcs yhgch_fb_funcs = { + .destroy = yhgch_user_framebuffer_destroy, }; -struct inspur_framebuffer *inspur_framebuffer_init(struct drm_device *dev, +struct yhgch_framebuffer *yhgch_framebuffer_init(struct drm_device *dev, const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object *obj) { - struct inspur_framebuffer *inspur_fb; + struct yhgch_framebuffer *yhgch_fb; int ret; - inspur_fb = kzalloc(sizeof(*inspur_fb), GFP_KERNEL); - if (!inspur_fb) { - DRM_ERROR("failed to allocate inspur_fb\n"); + yhgch_fb = kzalloc(sizeof(*yhgch_fb), GFP_KERNEL); + if (!yhgch_fb) { + DRM_ERROR("failed to allocate yhgch_fb\n"); return ERR_PTR(-ENOMEM); } - drm_helper_mode_fill_fb_struct(dev, &inspur_fb->fb, mode_cmd); - inspur_fb->obj = obj; - ret = drm_framebuffer_init(dev, &inspur_fb->fb, &inspur_fb_funcs); + drm_helper_mode_fill_fb_struct(dev, &yhgch_fb->fb, mode_cmd); + yhgch_fb->obj = obj; + ret = drm_framebuffer_init(dev, &yhgch_fb->fb, &yhgch_fb_funcs); if (ret) { DRM_ERROR("drm_framebuffer_init failed: %d\n", ret); - kfree(inspur_fb); + kfree(yhgch_fb); return ERR_PTR(ret); } - return inspur_fb; + return yhgch_fb; } -static struct drm_framebuffer *inspur_user_framebuffer_create(struct drm_device +static struct drm_framebuffer *yhgch_user_framebuffer_create(struct drm_device *dev, struct drm_file *filp, @@ -507,7 +507,7 @@ static struct drm_framebuffer *inspur_user_framebuffer_create(struct drm_device *mode_cmd) { struct drm_gem_object *obj; - struct inspur_framebuffer *inspur_fb; + struct yhgch_framebuffer *yhgch_fb; DRM_DEBUG_DRIVER("%dx%d, format %c%c%c%c\n", mode_cmd->width, mode_cmd->height, @@ -520,16 +520,16 @@ static struct drm_framebuffer *inspur_user_framebuffer_create(struct drm_device if (!obj) return ERR_PTR(-ENOENT); - inspur_fb = inspur_framebuffer_init(dev, mode_cmd, obj); - if (IS_ERR(inspur_fb)) { + yhgch_fb = yhgch_framebuffer_init(dev, mode_cmd, obj); + if (IS_ERR(yhgch_fb)) { drm_gem_object_put_unlocked(obj); - return ERR_PTR((long)inspur_fb); + return ERR_PTR((long)yhgch_fb); } - return &inspur_fb->fb; + return &yhgch_fb->fb; } -const struct drm_mode_config_funcs inspur_mode_funcs = { +const struct drm_mode_config_funcs yhgch_mode_funcs = { .atomic_check = drm_atomic_helper_check, .atomic_commit = drm_atomic_helper_commit, - .fb_create = inspur_user_framebuffer_create, + .fb_create = yhgch_user_framebuffer_create, }; -- Gitee