diff --git a/arch/riscv/dts/k1-x_orangepi-rv2.dts b/arch/riscv/dts/k1-x_orangepi-rv2.dts
index 5a68bafe89f1d8e3396e795f21dcd2f8c02b83af..219700f40b6b15c73cef4c6f96dd707a82d62759 100644
--- a/arch/riscv/dts/k1-x_orangepi-rv2.dts
+++ b/arch/riscv/dts/k1-x_orangepi-rv2.dts
@@ -245,6 +245,13 @@
 &pcie1_rc {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pcie1_3>;
+	k1x,pwr_on = <&gpio 116 0>;
+	status = "okay";
+};
+
+&pcie2_rc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie2_4>;
 	status = "okay";
 };
 
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 14a797468eb3b458c0c2c2cbc0ab6dce8d36c32a..76b44d484b3c77685f4a8c85fbe9ae9e1348380b 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -450,6 +450,7 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("XM25QH64C", 0x204017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("XM25QU128C", 0x204118, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 #endif
 #ifdef CONFIG_SPI_FLASH_XTX
 	/* XTX Technology (Shenzhen) Limited */