diff --git a/.gitattributes b/.gitattributes deleted file mode 100644 index 3d2db7dafa60072b1b5f9b2993a12f77c96ead3c..0000000000000000000000000000000000000000 --- a/.gitattributes +++ /dev/null @@ -1,28 +0,0 @@ -* text=auto - -*.S text -*.asm text -*.c text -*.cc text -*.cpp text -*.cxx text -*.h text -*.htm text -*.html text -*.in text -*.ld text -*.m4 text -*.mak text -*.mk text -*.py text -*.js text -*.s text -*.txt text -*.xml text -Makefile text -AUTHORS text -COPYING text - -*.bat -text -*.inf -text -*.ini -text diff --git a/bsp/arch/arm/armv7-a/cortex-a9/src/cpus.S b/bsp/arch/arm/armv7-a/cortex-a9/src/cpus.S index 1b8f47c25838fe120d90ed4bf8eb8e68940e78cf..f6f5c892f47e40de2c4e3d2508019344bbe471b9 100644 --- a/bsp/arch/arm/armv7-a/cortex-a9/src/cpus.S +++ b/bsp/arch/arm/armv7-a/cortex-a9/src/cpus.S @@ -71,8 +71,8 @@ .equ NOFIQ, 0x40 .equ NOINT, 0xC0 //移植敏感，使用FIQ做实时中断的系统，应改为0x0000001f -.equ CPSR_sys, 0x0000001f -.equ CPSR_svc, 0x00000013 +.equ CPSR_sys, 0x0000005f +.equ CPSR_svc, 0x00000053 //因异步信号使能才允许调度，故上下文切换中恢复异步信号寄存器等同于使能异步信号 .macro restore_asyn_signal_reg @@ -136,7 +136,7 @@ __asm_start_thread: LDMFD SP!, {R4} @; pop new task cpsr MOV R5,SP ADD SP, SP, #60 - AND R4, R4, #0Xffffff3f + AND R4, R4, #0Xffffff7f @切换到svc的目标，是为了使得恢复中断使能和恢复pc能在一条指令中执行 mrs r0,cpsr bic r0,#MODEMASK diff --git a/bsp/arch/arm/armv7-a/cortex-a9/src/systick.c b/bsp/arch/arm/armv7-a/cortex-a9/src/systick.c index aa94a3db413d114e504763610f3091d00ebd2fcf..cb2df06efd2183af740f86d1135dd5903e774354 100644 --- a/bsp/arch/arm/armv7-a/cortex-a9/src/systick.c +++ b/bsp/arch/arm/armv7-a/cortex-a9/src/systick.c @@ -59,7 +59,8 @@ __attribute__((weak)) void __DjyInitTick(void) // setPriorityMask(0x1F); // Int_ContactLine(29); // Int_SetPrio(29, a); - init_private_timer(0x10000, 0); +#define LOAD_VALUE ((CN_CFG_TICK_US*CN_CFG_TIMER_CLK)/(0+1) - 1) + init_private_timer(0x411AA, 0); // init_private_timer(0x1000000, 0); // 0 - Auto Reload start_private_timer(); } diff --git a/bsp/boarddrv/demo/topeet_imx6q/drv/board/board.c b/bsp/boarddrv/demo/topeet_imx6q/drv/board/board.c index 579fb840ba09f94ac7eee735c77c7a08d271ca7f..33c1bd5a25459cbe89e0412c23d60da23bf7581a 100644 --- a/bsp/boarddrv/demo/topeet_imx6q/drv/board/board.c +++ b/bsp/boarddrv/demo/topeet_imx6q/drv/board/board.c @@ -44,7 +44,28 @@ //----------------------------------------------------------------------------- +#include +#include + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); +} + + void Board_Init(void) { + setup_iomux_uart(); } diff --git a/bsp/boarddrv/demo/topeet_imx6q/include/board-config.h b/bsp/boarddrv/demo/topeet_imx6q/include/board-config.h index 03f52597e4e9b4449eba7b73af26223d8009dc0e..2318236d9b9c4cee063f92ed5f52a792742c5550 100644 --- a/bsp/boarddrv/demo/topeet_imx6q/include/board-config.h +++ b/bsp/boarddrv/demo/topeet_imx6q/include/board-config.h @@ -12,10 +12,11 @@ extern "C" { /*____与硬件相关的配置____*/ #define Mhz 1000000 #define CN_CFG_MCLK (800*Mhz) //主频，内核要用，必须定义 -#define CN_CFG_HCLK (CN_CFG_MCLK/4) //高速外设时钟 -#define CN_CFG_PCLK (CN_CFG_MCLK/8) //低速外设时钟 +#define CN_CFG_PCLK (CN_CFG_MCLK/3) //低速外设时钟 #define CN_CFG_TIMER_CLK CN_CFG_PCLK //定时器时钟源 +// #define CN_CFG_HCLK (CN_CFG_MCLK/4) //高速外设时钟 + /*____以下定义tick参数____*/ #define CN_CFG_TICK_US 1000 //tick间隔，以us为单位。 #define CN_CFG_TICK_HZ 1000 //内核时钟频率，单位为hz。 diff --git a/bsp/boarddrv/demo/topeet_imx6q/lds/iboot.lds b/bsp/boarddrv/demo/topeet_imx6q/lds/iboot.lds index c0cd550ceb15f41f963f1c2bf6818fb3ed3d855f..402fc65d922b6718b29bca3b66e7089b701155a8 100644 --- a/bsp/boarddrv/demo/topeet_imx6q/lds/iboot.lds +++ b/bsp/boarddrv/demo/topeet_imx6q/lds/iboot.lds @@ -9,7 +9,7 @@ SECTIONS Rom_Start : { restore = .; - }>RAM1 + }>InnerFlash /*RevRam鏄疪am淇濈暀鍖哄煙锛岀敤浜庡瓨鍌╬reload鍓嶄娇鐢ㄦ垨淇濆瓨鐨勫唴鍦ㄦ暟鎹,鍙湁IAP_pload.c*/ /*鐨刾g_IapVar鍙橀噺浠庤娈靛唴鍒嗛厤锛屼笖璇ユ鍦╥boot.lds鍜宒ebug/release.lds淇濇寔涓鑷*/ @@ -37,7 +37,7 @@ SECTIONS KEEP(*libos_Iboot.a:sysinit.o (.text .text.* .rodata .rodata.*)) KEEP(*libos_Iboot.a:pre_loader.o (.text .text.* .rodata .rodata.*)) KEEP(*libos_Iboot.a:IAP_pLoad.o (.text .text.* .rodata .rodata.*)) - }>RAM1 + }>InnerFlash text_preload_rIbootRom_lIbootRom : { @@ -52,7 +52,7 @@ SECTIONS *src/iboot/critical/*.o (.text .text.* .rodata .rodata.*) *libos_Iboot.a:heap-static.o (.text .text.* .rodata .rodata.*) *libos_Iboot.a:list.o (.text .text.* .rodata .rodata.*) - }>RAM1 + }>InnerFlash text_sysload_rIbootRom_lIbootRom : { @@ -60,7 +60,7 @@ SECTIONS * (.text .text.* .rodata .rodata.*) g_pAppCodeEndRamAddr = .; PROVIDE(etext = .); - }>RAM1 + }>InnerFlash rw_preload_rRAM1_lIbootRom : @@ -75,7 +75,7 @@ SECTIONS *src/iboot/critical/*.o (.data .data.*) *libos_Iboot.a:heap-static.o (.data .data.*) *libos_Iboot.a:list.o (.data .data.*) - }>RAM1 + }>RAM1 AT>InnerFlash /*Cortex-M 绯诲垪鐨勫悜閲忚〃鍙噸瀹氫綅锛屽璧峰鍦板潃鐨勮姹傛槸锛氳嫢鏈塏涓悜閲忥紙鍖呭惈寮傚父锛夛紝*/ /*鍏堝澶у埌2鐨勬暣鏁版骞傦紝鑻ヤ负M锛屽垯Addr = ALIGN(4 * M) */ @@ -100,7 +100,7 @@ SECTIONS { . = ALIGN(0x08); * (.data .data.*) - }>RAM1 + }>RAM1 AT>InnerFlash zi_sysload_rRAM1_lRAM1 (NOLOAD) : { @@ -111,12 +111,12 @@ SECTIONS routine_shell_data_section : { KEEP(* (.ro_shell_data)) - }>RAM1 + }>RAM1 AT>InnerFlash expand_shell_data_section : { KEEP(* (.ex_shell_data)) - }>RAM1 + }>RAM1 AT>InnerFlash preload_cp_table : { @@ -139,7 +139,7 @@ SECTIONS LONG(ADDR(zi_preload_rRAM1_lRAM1)) LONG(SIZEOF(zi_preload_rRAM1_lRAM1)) LONG(0) - }>RAM1 + }>InnerFlash sysload_cp_table : { @@ -173,7 +173,7 @@ SECTIONS LONG(SIZEOF(expand_shell_data_section)) LONG(1) - }>RAM1 + }>InnerFlash heap_cp_table : { @@ -193,14 +193,14 @@ SECTIONS BYTE(0) /*涓茬粨鏉燂紝"sys"鏄爢鐨勫悕瀛*/ . = ALIGN(0x04); LONG(0) /*缁撴潫鏍囧織*/ - }>RAM1 + }>InnerFlash Iboot_Info : { . = ALIGN(0x08); gc_ptIbootSize = .; LONG(IbootSize) - }>RAM1 + }>InnerFlash App_Info : { @@ -210,7 +210,7 @@ SECTIONS gc_pAppRange = .; /* APP绌洪棿鑼冨洿 */ LONG(InnerRam1Start - IbootSize) - }>RAM1 + }>InnerFlash Iboot_AppInfo : { @@ -225,26 +225,26 @@ SECTIONS LONG( restore + IbootSize + 256 + 256) __AppStart = .; /*鍑芥暟鎸囬拡鍙橀噺锛屾寚鍚慉PP鐨凱reload鍑芥暟*/ LONG( restore + IbootSize + 256 + 256) - }>RAM1 + }>InnerFlash shell_config_section : { KEEP(*(.shellconfig)) - }>RAM1 + }>InnerFlash routine_shell_section : { KEEP(* (.ro_shell_cmd)) KEEP(* (.ro_shell_data)) - }>RAM1 + }>InnerFlash expand_shell_section : { KEEP(* (.ex_shell_cmd)) KEEP(* (.ex_shell_data)) . = ALIGN(0x08); - }>RAM1 + }>InnerFlash Shell_Info : { @@ -252,10 +252,7 @@ SECTIONS LONG(restore) /* 璇in鏂囦欢鐨勮捣濮嬪湴鍧*/ LONG(IbootSize) /* 璇in鏂囦欢鍏佽澶у皬*/ __eiboot = .; - }>RAM1 - - - + }>InnerFlash heap_rRAM1_lRAM1 (NOLOAD) : { diff --git a/bsp/boarddrv/demo/topeet_imx6q/lds/memory.lds b/bsp/boarddrv/demo/topeet_imx6q/lds/memory.lds index c6ffe6ce94ee007e0fa9bb150c1823a21830f8c8..d0dfa451feac927e83391345ae7ceb38b1c6a374 100644 --- a/bsp/boarddrv/demo/topeet_imx6q/lds/memory.lds +++ b/bsp/boarddrv/demo/topeet_imx6q/lds/memory.lds @@ -1,12 +1,13 @@ - -MEMORY -{ - OCRAM(RXW) : ORIGIN = 0x00900000, LENGTH = 256k - - RAM1(RXW) : ORIGIN = 0x10200000, LENGTH = 0x100000 -} - -IbootSize = 256k; - -InnerRam1Start = ORIGIN(RAM1); -InnerRam1Size = LENGTH(RAM1); + +MEMORY +{ + OCRAM(RXW) : ORIGIN = 0x00900000, LENGTH = 256k + + InnerFlash(RXW) : ORIGIN = 0x10200000, LENGTH = 0x100000 + RAM1(RXW) : ORIGIN = 0x10300000, LENGTH = 0x100000 +} + +IbootSize = 256k; + +InnerRam1Start = ORIGIN(RAM1); +InnerRam1Size = LENGTH(RAM1); diff --git a/bsp/boarddrv/demo/topeet_imx6q/startup/MP_GIC.S b/bsp/boarddrv/demo/topeet_imx6q/startup/MP_GIC.S index 49b16957cf5173de2d4baa0689daf444dcdba838..265dfeb52bbe83951b64771b9c4c3bd75309534c 100644 --- a/bsp/boarddrv/demo/topeet_imx6q/startup/MP_GIC.S +++ b/bsp/boarddrv/demo/topeet_imx6q/startup/MP_GIC.S @@ -304,13 +304,15 @@ disableGICProcessorInterface: .type setPriorityMask, "function" .cfi_startproc setPriorityMask: + cpsid i MRC p15, 4, r1, c15, c0, 0 // Read periph base address // Make sure that priority value is only 5 bits, and convert to expected format AND r0, r0, #0x1F MOV r0, r0, LSL #3 STR r0, [r1, #0x0104] // Write the Priority Mask register - + cpsie i + BX lr .cfi_endproc diff --git a/bsp/cpudrv/freescale/imx6q/include/cpu_peri_int_line.h b/bsp/cpudrv/freescale/imx6q/include/cpu_peri_int_line.h index 432738c6379925ac499cc551261c494811a7079b..d207f2ab5e0d6430a57197dec3bc39e03c68c1f5 100644 --- a/bsp/cpudrv/freescale/imx6q/include/cpu_peri_int_line.h +++ b/bsp/cpudrv/freescale/imx6q/include/cpu_peri_int_line.h @@ -2,6 +2,7 @@ #ifndef __CPU_PERI_INT_LINE_H__ #define __CPU_PERI_INT_LINE_H__ +/* cortex-a9 interrupts*/ #define CN_INT_LINE_0 0 #define CN_INT_LINE_1 1 #define CN_INT_LINE_2 2 @@ -35,7 +36,136 @@ #define CN_INT_LINE_30 30 #define CN_INT_LINE_31 31 -#define CN_INT_LINE_LAST 31 +/* imx6q interrupts*/ +#define CN_INT_LINE_IOMUXC 32 /* General-Purpose Register 1 from IOMUXC. Used to notify the cores on the exception condition while booting. */ +#define CN_INT_LINE_DAP 33 /* Debug Access Port interrupt request */ +#define CN_INT_LINE_SDMA 34 /* SDMA interrupt request from all channels */ +#define CN_INT_LINE_VPU 35 /* JPEG codec interrupt request */ +#define CN_INT_LINE_SNVS 36 /* PMIC power off request */ +#define CN_INT_LINE_IPU 37 /* IPU error interrupt request */ +#define CN_INT_LINE_IPU1 38 /* IPU1 sync interrupt request */ +#define CN_INT_LINE_IPU2 39 /* IPU2 error interrupt request */ +#define CN_INT_LINE_IPU2_xx 40 /* IPU2 sync interrupt request */ +#define CN_INT_LINE_GPU3D 41 /* GPU3D interrupt request */ +#define CN_INT_LINE_R2D 42 /* GPU2D R2D GPU2D general interrupt request */ +#define CN_INT_LINE_V2D 43 /* GPU2D V2D GPU2D(OpenVG) general interrupt request */ +#define CN_INT_LINE_VPU_x 44 /* VPU interrupt request */ +#define CN_INT_LINE_APBH_Bridge_DMA 45 /* Logical OR of APBH-Bridge-DMA channels 0-3 completion and error interrupts */ +#define CN_INT_LINE_EIM 46 /* EIM interrupt request */ +#define CN_INT_LINE_BCH 47 /* BCH operation complete interrupt */ +#define CN_INT_LINE_GPMI 48 /* GPMI operation timeout error interrupt */ +#define CN_INT_LINE_DTCP 49 /* DTCP interrupt request */ +#define CN_INT_LINE_VDOA 50 /* Logical OR of VDOA interrupt requests */ +#define CN_INT_LINE_SNVS_x51 51 /* SRTC consolidated interrupt */ +#define CN_INT_LINE_SNVS_x52 52 /* SRTC security interrupt */ +#define CN_INT_LINE_CSU 53 /* CSU interrupt request 1. Indicates to the processor that one or more alarm inputs were asserted */ +#define CN_INT_LINE_uSDHC1 54 /* uSDHC1 (Enhanced SDHC) interrupt request */ +#define CN_INT_LINE_uSDHC2 55 /* uSDHC2 (Enhanced SDHC) interrupt request */ +#define CN_INT_LINE_uSDHC3 56 /* uSDHC3 (Enhanced SDHC) interrupt request */ +#define CN_INT_LINE_uSDHC4 57 /* uSDHC4 (Enhanced SDHC) interrupt request */ +#define CN_INT_LINE_UART1 58 /* UART1 interrupt request */ +#define CN_INT_LINE_UART2 59 /* UART2 interrupt request */ +#define CN_INT_LINE_UART3 60 /* UART3 interrupt request */ +#define CN_INT_LINE_UART4 61 /* UART4 interrupt request */ +#define CN_INT_LINE_UART5 62 /* UART5 interrupt request */ +#define CN_INT_LINE_eCSPI1 63 /* eCSPI1 interrupt request */ +#define CN_INT_LINE_eCSPI2 64 /* eCSPI2 interrupt request */ +#define CN_INT_LINE_eCSPI3 65 /* eCSPI3 interrupt request */ +#define CN_INT_LINE_eCSPI4 66 /* eCSPI4 interrupt request */ +#define CN_INT_LINE_eCSPI5 67 /* eCSPI5 interrupt request */ +#define CN_INT_LINE_I2C1 68 /* I2C1 interrupt request */ +#define CN_INT_LINE_I2C2 69 /* I2C2 interrupt request */ +#define CN_INT_LINE_I2C3 70 /* I2C3 interrupt request */ +#define CN_INT_LINE_SATA 71 /* SATA interrupt request */ +#define CN_INT_LINE_USB_1 72 /* USB Host 1 interrupt request */ +#define CN_INT_LINE_USB_2 73 /* USB Host 2 interrupt request */ +#define CN_INT_LINE_USB_3 74 /* USB Host 3 interrupt request */ +#define CN_INT_LINE_USB_OTG 75 /* USB OTG interrupt request */ +#define CN_INT_LINE_USB_PHY 76 /* UTMI0 interrupt request */ +#define CN_INT_LINE_USB_PHY_x77 77 /* UTMI1 interrupt request */ +#define CN_INT_LINE_SSI1 78 /* SSI1 interrupt request */ +#define CN_INT_LINE_SSI2 79 /* SSI2 interrupt request */ +#define CN_INT_LINE_SSI3 80 /* SSI3 interrupt request */ +#define CN_INT_LINE_TEMP 81 /* Temperature Monitor Temperature Sensor (temperature greater than threshold) interrupt */ +#define CN_INT_LINE_ASRC 82 /* ASRC interrupt request */ +#define CN_INT_LINE_ESAI 83 /* ESAI interrupt request */ +#define CN_INT_LINE_SPDIF 84 /* SPDIF interrupt */ +#define CN_INT_LINE_MLB150 85 /* MLB error interrupt request */ +#define CN_INT_LINE_PMU 86 /* Brownout of the 1.1, 2.5, and 3.0 analog regulators occurred. */ +#define CN_INT_LINE_GPT 87 /* Logical OR of GPT rollover interrupt line, input capture 1 and 2 lines, output compare 1, 2, and 3 interrupt lines */ +#define CN_INT_LINE_EPIT1 88 /* EPIT1 output compare interrupt */ +#define CN_INT_LINE_EPIT2 89 /* EPIT2 output compare interrupt */ +#define CN_INT_LINE_GPIO1_INT7 90 /* INT7 interrupt request */ +#define CN_INT_LINE_GPIO1_INT6 91 /* INT6 interrupt request */ +#define CN_INT_LINE_GPIO1_INT5 92 /* INT5 interrupt request */ +#define CN_INT_LINE_GPIO1_INT4 93 /* INT4 interrupt request */ +#define CN_INT_LINE_GPIO1_INT3 94 /* INT3 interrupt request */ +#define CN_INT_LINE_GPIO1_INT2 95 /* INT2 interrupt request */ +#define CN_INT_LINE_GPIO1_INT1 96 /* INT1 interrupt request */ +#define CN_INT_LINE_GPIO1_INT0 97 /* INT0 interrupt request */ +#define CN_INT_LINE_GPIO1_0_15 98 /* Combined interrupt indication for GPIO1 signals 0 - 15 */ +#define CN_INT_LINE_GPIO1_16_31 99 /* Combined interrupt indication for GPIO1 signals 16 - 31 */ +#define CN_INT_LINE_GPIO2_0_15 100 /* Combined interrupt indication for GPIO2 signals 0 - 15 */ +#define CN_INT_LINE_GPIO2_16_31 101 /* Combined interrupt indication for GPIO2 signals 16 - 31 */ +#define CN_INT_LINE_GPIO3_0_15 102 /* Combined interrupt indication for GPIO3 signals 0 - 15 */ +#define CN_INT_LINE_GPIO3_16_31 103 /* Combined interrupt indication for GPIO3 signals 16 - 31 */ +#define CN_INT_LINE_GPIO4_0_15 104 /* Combined interrupt indication for GPIO4 signals 0 - 15 */ +#define CN_INT_LINE_GPIO4_16_31 105 /* Combined interrupt indication for GPIO4 signals 16 - 31 */ +#define CN_INT_LINE_GPIO5_0_15 106 /* Combined interrupt indication for GPIO5 signals 0 - 15 */ +#define CN_INT_LINE_GPIO5_16_31 107 /* Combined interrupt indication for GPIO5 signals 16 - 31 */ +#define CN_INT_LINE_GPIO6_0_15 108 /* Combined interrupt indication for GPIO6 signals 0 - 15 */ +#define CN_INT_LINE_GPIO6_16_31 109 /* Combined interrupt indication for GPIO6 signals 16 - 31 */ +#define CN_INT_LINE_GPIO7_0_15 110 /* Combined interrupt indication for GPIO7 signals 0 - 15 */ +#define CN_INT_LINE_GPIO7_16_31 111 /* Combined interrupt indication for GPIO7 signals 16 - 31 */ +#define CN_INT_LINE_WDOG1 112 /* WDOG1 timer reset interrupt request */ +#define CN_INT_LINE_WDOG2 113 /* WDOG2 timer reset interrupt request */ +#define CN_INT_LINE_KPP 114 /* Key Pad interrupt request */ +#define CN_INT_LINE_PWM1 115 /* Cumulative interrupt line for PWM1. Logical OR of rollover, compare, and FIFO waterlevel crossing interrupts" */ +#define CN_INT_LINE_PWM2 116 /* Cumulative interrupt line for PWM2. Logical OR of rollover, compare, and FIFO waterlevel crossing interrupts." */ +#define CN_INT_LINE_PWM3 117 /* Cumulative interrupt line for PWM3. Logical OR of rollover, compare, and FIFO waterlevel crossing interrupts." */ +#define CN_INT_LINE_PWM4 118 /* Cumulative interrupt line for PWM4. Logical OR of rollover, compare, and FIFO waterlevel crossing interrupts." */ +#define CN_INT_LINE_CCM 119 /* CCM interrupt request 1 */ +#define CN_INT_LINE_CCM_x120 120 /* CCM interrupt request 2 */ +#define CN_INT_LINE_GPC 121 /* GPC interrupt request 1 */ +#define CN_INT_LINE_122 122 /* Reserved Reserved */ +#define CN_INT_LINE_SRC 123 /* SRC interrupt request */ +#define CN_INT_LINE_CPU 124 /* L2 interrupt request */ +#define CN_INT_LINE_CPU_x125 125 /* Parity Check error interrupt request */ +#define CN_INT_LINE_CPU_x126 126 /* Performance Unit interrupt */ +#define CN_INT_LINE_CPU_x127 127 /* CTI trigger outputs interrupt */ +#define CN_INT_LINE_SRC_x128 128 /* Combined CPU WDOG interrupts (4x) out of SRC */ +#define CN_INT_LINE_129 129 /* Reserved Reserved */ +#define CN_INT_LINE_130 130 /* Reserved Reserved */ +#define CN_INT_LINE_131 131 /* Reserved Reserved */ +#define CN_INT_LINE_MIPI_CSI_1 132 /* CSI interrupt request 1 */ +#define CN_INT_LINE_MIPI_CSI_2 133 /* CSI interrupt request 2 */ +#define CN_INT_LINE_MIPI_DSI 134 /* DSI interrupt request */ +#define CN_INT_LINE_MIPI_HSI 135 /* HSI interrupt request */ +#define CN_INT_LINE_SJC 136 /* SJC interrupt from the General-Purpose register */ +#define CN_INT_LINE_CAAM_0 137 /* CAAM job ring 0 interrupt */ +#define CN_INT_LINE_CAAM_1 138 /* CAAM job ring 1 interrupt */ +#define CN_INT_LINE_139 139 /* Reserved Reserved */ +#define CN_INT_LINE_ASC1 140 /* ASC1 interrupt request */ +#define CN_INT_LINE_ASC2 141 /* ASC2 interrupt request */ +#define CN_INT_LINE_FLEXCAN1 142 /* FLEXCAN1 combined interrupt. Logical OR of ini_int_busoff, ini_int_error, ipi_int_mbor, ipi_int_rxwarning, ipi_int_txwarning and ipi_int_wakein. Combined interrupt of ini_int_busoff,ini_int_error,ipi_int_mbor,ipi_int_txwarning and ipi_int_waken */ +#define CN_INT_LINE_FLEXCAN2 143 /* FLEXCAN2 combined interrupt. Logical OR of ini_int_busoff, ini_int_error, ipi_int_mbor, ipi_int_rxwarning, ipi_int_txwarning and ipi_int_wakein. */ +#define CN_INT_LINE_144 144 /* Reserved Reserved */ +#define CN_INT_LINE_145 145 /* Reserved Reserved */ +#define CN_INT_LINE_146 146 /* Reserved Reserved */ +#define CN_INT_LINE_HDMI_x147 147 /* HDMI video and CEC control interrupt request. */ +#define CN_INT_LINE_HDMI_x148 148 /* HDMI CEC dedicated wake-up interrupt. */ +#define CN_INT_LINE_MLB150_x149 149 /* Channels [31:0] interrupt requests. Channels [63:32] interrupt requests are available on IRQ #158, unless the MLB150_ACTL[SMX] bit is set, in which case those channels are muxed into this IRQ. */ +#define CN_INT_LINE_ENET 150 /* 150 */ +#define CN_INT_LINE_ENET_TIMER 151 /* MAC 0 1588 Timer interrupt [synchronous] request */ +#define CN_INT_LINE_PCIe_req1 152 /* PCIe interrupt request 1 (intd/msi_ctrl_int) */ +#define CN_INT_LINE_PCIe_req2 153 /* PCIe interrupt request 2 (intc) */ +#define CN_INT_LINE_PCIe_req3 154 /* PCIe interrupt request 3 (intb) */ +#define CN_INT_LINE_PCIe_req4 155 /* PCIe interrupt request 4 (inta) */ +#define CN_INT_LINE_DCIC1 156 /* Logical OR of DCIC1 interrupt requests */ +#define CN_INT_LINE_DCIC2 157 /* Logical OR of DCIC2 interrupt requests */ +#define CN_INT_LINE_MLB150_xx 158 /* Logical OR of channel[63:32] interrupt requests */ +#define CN_INT_LINE_PMU_x159 159 /* Brownout of the core, GPU, and chip digital regulators occurred. */ -#endif //__CPU_PERI_INT_LINE_H__ +#define CN_INT_LINE_LAST 159 +#endif //__CPU_PERI_INT_LINE_H__ diff --git a/bsp/cpudrv/freescale/imx6q/include/iomux-v3.h b/bsp/cpudrv/freescale/imx6q/include/iomux-v3.h new file mode 100644 index 0000000000000000000000000000000000000000..915f95c76c8cb375eaf5c3846937a7d75dd9fed1 --- /dev/null +++ b/bsp/cpudrv/freescale/imx6q/include/iomux-v3.h @@ -0,0 +1,265 @@ +#define CONFIG_MX6Q +#define CONFIG_MX6 +/* + * Based on Linux i.MX iomux-v3.h file: + * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH, + * + * + * Copyright (C) 2011-2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MACH_IOMUX_V3_H__ +#define __MACH_IOMUX_V3_H__ + +// #include +typedef signed char s8; +typedef unsigned char u8; + +typedef signed short s16; +typedef unsigned short u16; + +typedef signed int s32; +typedef unsigned int u32; + +typedef signed long long s64; +typedef unsigned long long u64; + +/* + * build IOMUX_PAD structure + * + * This iomux scheme is based around pads, which are the physical balls + * on the processor. + * + * - Each pad has a pad control register (IOMUXC_SW_PAD_CTRL_x) which controls + * things like driving strength and pullup/pulldown. + * - Each pad can have but not necessarily does have an output routing register + * (IOMUXC_SW_MUX_CTL_PAD_x). + * - Each pad can have but not necessarily does have an input routing register + * (IOMUXC_x_SELECT_INPUT) + * + * The three register sets do not have a fixed offset to each other, + * hence we order this table by pad control registers (which all pads + * have) and put the optional i/o routing registers into additional + * fields. + * + * The naming convention for the pad modes is SOC_PAD___ + * If or refers to a GPIO, it is named GPIO__ + * + * IOMUX/PAD Bit field definitions + * + * MUX_CTRL_OFS: 0..11 (12) + * PAD_CTRL_OFS: 12..23 (12) + * SEL_INPUT_OFS: 24..35 (12) + * MUX_MODE + SION: 36..40 (5) + * PAD_CTRL + NO_PAD_CTRL: 41..58 (18) + * SEL_INP: 59..62 (4) + * reserved: 63 (1) +*/ + +typedef u64 iomux_v3_cfg_t; + +#define MUX_CTRL_OFS_SHIFT 0 +#define MUX_CTRL_OFS_MASK ((iomux_v3_cfg_t)0xfff << MUX_CTRL_OFS_SHIFT) +#define MUX_PAD_CTRL_OFS_SHIFT 12 +#define MUX_PAD_CTRL_OFS_MASK ((iomux_v3_cfg_t)0xfff << \ + MUX_PAD_CTRL_OFS_SHIFT) +#define MUX_SEL_INPUT_OFS_SHIFT 24 +#define MUX_SEL_INPUT_OFS_MASK ((iomux_v3_cfg_t)0xfff << \ + MUX_SEL_INPUT_OFS_SHIFT) + +#define MUX_MODE_SHIFT 36 +#define MUX_MODE_MASK ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT) +#define MUX_PAD_CTRL_SHIFT 41 +#define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x3ffff << MUX_PAD_CTRL_SHIFT) +#define MUX_SEL_INPUT_SHIFT 59 +#define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT) + +#define MUX_MODE_SION ((iomux_v3_cfg_t)IOMUX_CONFIG_SION << \ + MUX_MODE_SHIFT) +#define MUX_PAD_CTRL(x) ((iomux_v3_cfg_t)(x) << MUX_PAD_CTRL_SHIFT) + +#define IOMUX_PAD(pad_ctrl_ofs, mux_ctrl_ofs, mux_mode, sel_input_ofs, \ + sel_input, pad_ctrl) \ + (((iomux_v3_cfg_t)(mux_ctrl_ofs) << MUX_CTRL_OFS_SHIFT) | \ + ((iomux_v3_cfg_t)(mux_mode) << MUX_MODE_SHIFT) | \ + ((iomux_v3_cfg_t)(pad_ctrl_ofs) << MUX_PAD_CTRL_OFS_SHIFT) | \ + ((iomux_v3_cfg_t)(pad_ctrl) << MUX_PAD_CTRL_SHIFT) | \ + ((iomux_v3_cfg_t)(sel_input_ofs) << MUX_SEL_INPUT_OFS_SHIFT)| \ + ((iomux_v3_cfg_t)(sel_input) << MUX_SEL_INPUT_SHIFT)) + +#define NEW_PAD_CTRL(cfg, pad) (((cfg) & ~MUX_PAD_CTRL_MASK) | \ + MUX_PAD_CTRL(pad)) + +#define __NA_ 0x000 +#define NO_MUX_I 0 +#define NO_PAD_I 0 + +#define NO_PAD_CTRL (1 << 17) + +#ifdef CONFIG_MX7 + +#define IOMUX_LPSR_SEL_INPUT_OFS 0x70000 +#define IOMUX_CONFIG_LPSR 0x8 +#define MUX_MODE_LPSR ((iomux_v3_cfg_t)IOMUX_CONFIG_LPSR << \ + MUX_MODE_SHIFT) + +#define PAD_CTL_DSE_1P8V_140OHM (0x0<<0) +#define PAD_CTL_DSE_1P8V_35OHM (0x1<<0) +#define PAD_CTL_DSE_1P8V_70OHM (0x2<<0) +#define PAD_CTL_DSE_1P8V_23OHM (0x3<<0) + +#define PAD_CTL_DSE_3P3V_196OHM (0x0<<0) +#define PAD_CTL_DSE_3P3V_49OHM (0x1<<0) +#define PAD_CTL_DSE_3P3V_98OHM (0x2<<0) +#define PAD_CTL_DSE_3P3V_32OHM (0x3<<0) + +#define PAD_CTL_SRE_FAST (0 << 2) +#define PAD_CTL_SRE_SLOW (0x1 << 2) + +#define PAD_CTL_HYS (0x1 << 3) +#define PAD_CTL_PUE (0x1 << 4) + +#define PAD_CTL_PUS_PD100KOHM ((0x0 << 5) | PAD_CTL_PUE) +#define PAD_CTL_PUS_PU5KOHM ((0x1 << 5) | PAD_CTL_PUE) +#define PAD_CTL_PUS_PU47KOHM ((0x2 << 5) | PAD_CTL_PUE) +#define PAD_CTL_PUS_PU100KOHM ((0x3 << 5) | PAD_CTL_PUE) + +#else + +#ifdef CONFIG_MX6 + +#define PAD_CTL_HYS (1 << 16) + +#define PAD_CTL_PUS_100K_DOWN (0 << 14 | PAD_CTL_PUE) +#define PAD_CTL_PUS_47K_UP (1 << 14 | PAD_CTL_PUE) +#define PAD_CTL_PUS_100K_UP (2 << 14 | PAD_CTL_PUE) +#define PAD_CTL_PUS_22K_UP (3 << 14 | PAD_CTL_PUE) +#define PAD_CTL_PUE (1 << 13 | PAD_CTL_PKE) +#define PAD_CTL_PKE (1 << 12) + +#define PAD_CTL_ODE (1 << 11) + +#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) +#define PAD_CTL_SPEED_LOW (0 << 6) +#else +#define PAD_CTL_SPEED_LOW (1 << 6) +#endif +#define PAD_CTL_SPEED_MED (2 << 6) +#define PAD_CTL_SPEED_HIGH (3 << 6) + +#define PAD_CTL_DSE_DISABLE (0 << 3) +#define PAD_CTL_DSE_240ohm (1 << 3) +#define PAD_CTL_DSE_120ohm (2 << 3) +#define PAD_CTL_DSE_80ohm (3 << 3) +#define PAD_CTL_DSE_60ohm (4 << 3) +#define PAD_CTL_DSE_48ohm (5 << 3) +#define PAD_CTL_DSE_40ohm (6 << 3) +#define PAD_CTL_DSE_34ohm (7 << 3) + +#if defined CONFIG_MX6SL +#define PAD_CTL_LVE (1 << 1) +#define PAD_CTL_LVE_BIT (1 << 22) +#endif + +#elif defined(CONFIG_VF610) + +#define PAD_MUX_MODE_SHIFT 20 + +#define PAD_CTL_INPUT_DIFFERENTIAL (1 << 16) + +#define PAD_CTL_SPEED_MED (1 << 12) +#define PAD_CTL_SPEED_HIGH (3 << 12) + +#define PAD_CTL_SRE (1 << 11) + +#define PAD_CTL_DSE_150ohm (1 << 6) +#define PAD_CTL_DSE_50ohm (3 << 6) +#define PAD_CTL_DSE_25ohm (6 << 6) +#define PAD_CTL_DSE_20ohm (7 << 6) + +#define PAD_CTL_PUS_47K_UP (1 << 4 | PAD_CTL_PUE) +#define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE) +#define PAD_CTL_PUS_22K_UP (3 << 4 | PAD_CTL_PUE) +#define PAD_CTL_PKE (1 << 3) +#define PAD_CTL_PUE (1 << 2 | PAD_CTL_PKE) + +#define PAD_CTL_OBE_IBE_ENABLE (3 << 0) +#define PAD_CTL_OBE_ENABLE (1 << 1) +#define PAD_CTL_IBE_ENABLE (1 << 0) + +#else + +#define PAD_CTL_DVS (1 << 13) +#define PAD_CTL_INPUT_DDR (1 << 9) +#define PAD_CTL_HYS (1 << 8) + +#define PAD_CTL_PKE (1 << 7) +#define PAD_CTL_PUE (1 << 6 | PAD_CTL_PKE) +#define PAD_CTL_PUS_100K_DOWN (0 << 4 | PAD_CTL_PUE) +#define PAD_CTL_PUS_47K_UP (1 << 4 | PAD_CTL_PUE) +#define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE) +#define PAD_CTL_PUS_22K_UP (3 << 4 | PAD_CTL_PUE) + +#define PAD_CTL_ODE (1 << 3) + +#define PAD_CTL_DSE_LOW (0 << 1) +#define PAD_CTL_DSE_MED (1 << 1) +#define PAD_CTL_DSE_HIGH (2 << 1) +#define PAD_CTL_DSE_MAX (3 << 1) + +#endif + +#define PAD_CTL_SRE_SLOW (0 << 0) +#define PAD_CTL_SRE_FAST (1 << 0) + +#endif + +#define IOMUX_CONFIG_SION 0x10 + +#define GPIO_PIN_MASK 0x1f +#define GPIO_PORT_SHIFT 5 +#define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT) +#define GPIO_PORTA (0 << GPIO_PORT_SHIFT) +#define GPIO_PORTB (1 << GPIO_PORT_SHIFT) +#define GPIO_PORTC (2 << GPIO_PORT_SHIFT) +#define GPIO_PORTD (3 << GPIO_PORT_SHIFT) +#define GPIO_PORTE (4 << GPIO_PORT_SHIFT) +#define GPIO_PORTF (5 << GPIO_PORT_SHIFT) + +void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad); +void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list, + unsigned count); +/* +* Set bits for general purpose registers +*/ +void imx_iomux_set_gpr_register(int group, int start_bit, + int num_bits, int value); + +/* macros for declaring and using pinmux array */ +#if defined(CONFIG_MX6QDL) +#define IOMUX_PADS(x) (MX6Q_##x), (MX6DL_##x) +#define SETUP_IOMUX_PAD(def) \ +if (is_cpu_type(MXC_CPU_MX6Q)) { \ + imx_iomux_v3_setup_pad(MX6Q_##def); \ +} else { \ + imx_iomux_v3_setup_pad(MX6DL_##def); \ +} +#define SETUP_IOMUX_PADS(x) \ + imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x)/2) +#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) +#define IOMUX_PADS(x) MX6Q_##x +#define SETUP_IOMUX_PAD(def) \ + imx_iomux_v3_setup_pad(MX6Q_##def); +#define SETUP_IOMUX_PADS(x) \ + imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x)) +#else +#define IOMUX_PADS(x) MX6DL_##x +#define SETUP_IOMUX_PAD(def) \ + imx_iomux_v3_setup_pad(MX6DL_##def); +#define SETUP_IOMUX_PADS(x) \ + imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x)) +#endif + +#endif /* __MACH_IOMUX_V3_H__*/ diff --git a/bsp/cpudrv/freescale/imx6q/include/irqreturn.h b/bsp/cpudrv/freescale/imx6q/include/irqreturn.h new file mode 100644 index 0000000000000000000000000000000000000000..bd4c066ad39b3bf419df923c19f27b5964130f96 --- /dev/null +++ b/bsp/cpudrv/freescale/imx6q/include/irqreturn.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _LINUX_IRQRETURN_H +#define _LINUX_IRQRETURN_H + +/** + * enum irqreturn + * @IRQ_NONE interrupt was not from this device or was not handled + * @IRQ_HANDLED interrupt was handled by this device + * @IRQ_WAKE_THREAD handler requests to wake the handler thread + */ +enum irqreturn { + IRQ_NONE = (0 << 0), + IRQ_HANDLED = (1 << 0), + IRQ_WAKE_THREAD = (1 << 1), +}; + +typedef enum irqreturn irqreturn_t; +#define IRQ_RETVAL(x) ((x) ? IRQ_HANDLED : IRQ_NONE) + +#endif diff --git a/bsp/cpudrv/freescale/imx6q/include/mx6-pins.h b/bsp/cpudrv/freescale/imx6q/include/mx6-pins.h new file mode 100644 index 0000000000000000000000000000000000000000..4bb2aeed285ca0acb485a2aac2a4fdfc87e328ce --- /dev/null +++ b/bsp/cpudrv/freescale/imx6q/include/mx6-pins.h @@ -0,0 +1,52 @@ +#define CONFIG_MX6Q +#define CONFIG_MX6 +/* + * Copyright (C) 2013 Boundary Devices Inc. + * Copyright (C) 2015-2016 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __ASM_ARCH_MX6_PINS_H__ +#define __ASM_ARCH_MX6_PINS_H__ + +#include "iomux-v3.h" + + +#define MX6_PAD_DECLARE(prefix, name, pco, mc, mm, sio, si, pc) \ + prefix##name = IOMUX_PAD(pco, mc, mm, sio, si, pc) + +#ifdef CONFIG_MX6QDL +enum { +#define MX6_PAD_DECL(name, pco, mc, mm, sio, si, pc) \ + MX6_PAD_DECLARE(MX6Q_PAD_,name, pco, mc, mm, sio, si, pc), +#include "mx6q_pins.h" +#undef MX6_PAD_DECL +#define MX6_PAD_DECL(name, pco, mc, mm, sio, si, pc) \ + MX6_PAD_DECLARE(MX6DL_PAD_,name, pco, mc, mm, sio, si, pc), +#include "mx6dl_pins.h" +}; +#elif defined(CONFIG_MX6Q) +enum { +#define MX6_PAD_DECL(name, pco, mc, mm, sio, si, pc) \ + MX6_PAD_DECLARE(MX6_PAD_,name, pco, mc, mm, sio, si, pc), +#include "mx6q_pins.h" +}; +#elif defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +enum { +#define MX6_PAD_DECL(name, pco, mc, mm, sio, si, pc) \ + MX6_PAD_DECLARE(MX6_PAD_,name, pco, mc, mm, sio, si, pc), +#include "mx6dl_pins.h" +}; +#elif defined(CONFIG_MX6SL) +#include "mx6sl_pins.h" +#elif defined(CONFIG_MX6SX) +#include "mx6sx_pins.h" +#elif defined(CONFIG_MX6ULL) +#include "mx6ull_pins.h" +#elif defined(CONFIG_MX6UL) +#include "mx6ul_pins.h" +#else +#error "Please select cpu" +#endif /* CONFIG_MX6Q */ + +#endif /*__ASM_ARCH_MX6_PINS_H__ */ diff --git a/bsp/cpudrv/freescale/imx6q/include/mx6q_pins.h b/bsp/cpudrv/freescale/imx6q/include/mx6q_pins.h new file mode 100644 index 0000000000000000000000000000000000000000..5cf08b60e2537662509679988552ac84433eef89 --- /dev/null +++ b/bsp/cpudrv/freescale/imx6q/include/mx6q_pins.h @@ -0,0 +1,1039 @@ +/* + * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Auto Generate file, please don't edit it + */ +#ifndef __ASM_ARCH_MX6_MX6Q_PINS_H__ +#define __ASM_ARCH_MX6_MX6Q_PINS_H__ + +MX6_PAD_DECL(SD2_DAT1__SD2_DATA1, 0x0360, 0x004C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD2_DAT1__ECSPI5_SS0, 0x0360, 0x004C, 1, 0x0834, 0, 0) +MX6_PAD_DECL(SD2_DAT1__EIM_CS2_B, 0x0360, 0x004C, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD2_DAT1__AUD4_TXFS, 0x0360, 0x004C, 3, 0x07C8, 0, 0) +MX6_PAD_DECL(SD2_DAT1__KEY_COL7, 0x0360, 0x004C, 4, 0x08F0, 0, 0) +MX6_PAD_DECL(SD2_DAT1__GPIO1_IO14, 0x0360, 0x004C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD2_DAT2__SD2_DATA2, 0x0364, 0x0050, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD2_DAT2__ECSPI5_SS1, 0x0364, 0x0050, 1, 0x0838, 0, 0) +MX6_PAD_DECL(SD2_DAT2__EIM_CS3_B, 0x0364, 0x0050, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD2_DAT2__AUD4_TXD, 0x0364, 0x0050, 3, 0x07B8, 0, 0) +MX6_PAD_DECL(SD2_DAT2__KEY_ROW6, 0x0364, 0x0050, 4, 0x08F8, 0, 0) +MX6_PAD_DECL(SD2_DAT2__GPIO1_IO13, 0x0364, 0x0050, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD2_DAT0__SD2_DATA0, 0x0368, 0x0054, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD2_DAT0__ECSPI5_MISO, 0x0368, 0x0054, 1, 0x082C, 0, 0) +MX6_PAD_DECL(SD2_DAT0__AUD4_RXD, 0x0368, 0x0054, 3, 0x07B4, 0, 0) +MX6_PAD_DECL(SD2_DAT0__KEY_ROW7, 0x0368, 0x0054, 4, 0x08FC, 0, 0) +MX6_PAD_DECL(SD2_DAT0__GPIO1_IO15, 0x0368, 0x0054, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD2_DAT0__DCIC2_OUT, 0x0368, 0x0054, 6, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TXC__USB_H2_DATA, 0x036C, 0x0058, 0, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TXC__RGMII_TXC, 0x036C, 0x0058, 1, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TXC__SPDIF_EXT_CLK, 0x036C, 0x0058, 2, 0x0918, 0, 0) +MX6_PAD_DECL(RGMII_TXC__GPIO6_IO19, 0x036C, 0x0058, 5, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TXC__XTALOSC_REF_CLK_24M, 0x036C, 0x0058, 7, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TD0__HSI_TX_READY, 0x0370, 0x005C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TD0__RGMII_TD0, 0x0370, 0x005C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TD0__GPIO6_IO20, 0x0370, 0x005C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TD1__HSI_RX_FLAG, 0x0374, 0x0060, 0, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TD1__RGMII_TD1, 0x0374, 0x0060, 1, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TD1__GPIO6_IO21, 0x0374, 0x0060, 5, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TD2__HSI_RX_DATA, 0x0378, 0x0064, 0, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TD2__RGMII_TD2, 0x0378, 0x0064, 1, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TD2__GPIO6_IO22, 0x0378, 0x0064, 5, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TD3__HSI_RX_WAKE, 0x037C, 0x0068, 0, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TD3__RGMII_TD3, 0x037C, 0x0068, 1, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TD3__GPIO6_IO23, 0x037C, 0x0068, 5, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_RX_CTL__USB_H3_DATA, 0x0380, 0x006C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_RX_CTL__RGMII_RX_CTL, 0x0380, 0x006C, 1, 0x0858, 0, 0) +MX6_PAD_DECL(RGMII_RX_CTL__GPIO6_IO24, 0x0380, 0x006C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_RD0__HSI_RX_READY, 0x0384, 0x0070, 0, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_RD0__RGMII_RD0, 0x0384, 0x0070, 1, 0x0848, 0, 0) +MX6_PAD_DECL(RGMII_RD0__GPIO6_IO25, 0x0384, 0x0070, 5, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TX_CTL__USB_H2_STROBE, 0x0388, 0x0074, 0, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TX_CTL__RGMII_TX_CTL, 0x0388, 0x0074, 1, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TX_CTL__GPIO6_IO26, 0x0388, 0x0074, 5, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_TX_CTL__ENET_REF_CLK, 0x0388, 0x0074, 7 | IOMUX_CONFIG_SION, 0x083C, 0, 0) +MX6_PAD_DECL(RGMII_RD1__HSI_TX_FLAG, 0x038C, 0x0078, 0, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_RD1__RGMII_RD1, 0x038C, 0x0078, 1, 0x084C, 0, 0) +MX6_PAD_DECL(RGMII_RD1__GPIO6_IO27, 0x038C, 0x0078, 5, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_RD2__HSI_TX_DATA, 0x0390, 0x007C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_RD2__RGMII_RD2, 0x0390, 0x007C, 1, 0x0850, 0, 0) +MX6_PAD_DECL(RGMII_RD2__GPIO6_IO28, 0x0390, 0x007C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_RD3__HSI_TX_WAKE, 0x0394, 0x0080, 0, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_RD3__RGMII_RD3, 0x0394, 0x0080, 1, 0x0854, 0, 0) +MX6_PAD_DECL(RGMII_RD3__GPIO6_IO29, 0x0394, 0x0080, 5, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_RXC__USB_H3_STROBE, 0x0398, 0x0084, 0, 0x0000, 0, 0) +MX6_PAD_DECL(RGMII_RXC__RGMII_RXC, 0x0398, 0x0084, 1, 0x0844, 0, 0) +MX6_PAD_DECL(RGMII_RXC__GPIO6_IO30, 0x0398, 0x0084, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A25__EIM_ADDR25, 0x039C, 0x0088, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A25__ECSPI4_SS1, 0x039C, 0x0088, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A25__ECSPI2_RDY, 0x039C, 0x0088, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A25__IPU1_DI1_PIN12, 0x039C, 0x0088, 3, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A25__IPU1_DI0_D1_CS, 0x039C, 0x0088, 4, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A25__GPIO5_IO02, 0x039C, 0x0088, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A25__HDMI_TX_CEC_LINE, 0x039C, 0x0088, 6, 0x088C, 0, 0) +MX6_PAD_DECL(EIM_EB2__EIM_EB2_B, 0x03A0, 0x008C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB2__ECSPI1_SS0, 0x03A0, 0x008C, 1, 0x0800, 0, 0) +MX6_PAD_DECL(EIM_EB2__IPU2_CSI1_DATA19, 0x03A0, 0x008C, 3, 0x08D4, 0, 0) +MX6_PAD_DECL(EIM_EB2__HDMI_TX_DDC_SCL, 0x03A0, 0x008C, 4, 0x0890, 0, 0) +MX6_PAD_DECL(EIM_EB2__GPIO2_IO30, 0x03A0, 0x008C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB2__I2C2_SCL, 0x03A0, 0x008C, 22, 0x08A0, 0, 0) +MX6_PAD_DECL(EIM_EB2__SRC_BOOT_CFG30, 0x03A0, 0x008C, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D16__EIM_DATA16, 0x03A4, 0x0090, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D16__ECSPI1_SCLK, 0x03A4, 0x0090, 1, 0x07F4, 0, 0) +MX6_PAD_DECL(EIM_D16__IPU1_DI0_PIN05, 0x03A4, 0x0090, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D16__IPU2_CSI1_DATA18, 0x03A4, 0x0090, 3, 0x08D0, 0, 0) +MX6_PAD_DECL(EIM_D16__HDMI_TX_DDC_SDA, 0x03A4, 0x0090, 4, 0x0894, 0, 0) +MX6_PAD_DECL(EIM_D16__GPIO3_IO16, 0x03A4, 0x0090, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D16__I2C2_SDA, 0x03A4, 0x0090, 22, 0x08A4, 0, 0) +MX6_PAD_DECL(EIM_D17__EIM_DATA17, 0x03A8, 0x0094, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D17__ECSPI1_MISO, 0x03A8, 0x0094, 1, 0x07F8, 0, 0) +MX6_PAD_DECL(EIM_D17__IPU1_DI0_PIN06, 0x03A8, 0x0094, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D17__IPU2_CSI1_PIXCLK, 0x03A8, 0x0094, 3, 0x08E0, 0, 0) +MX6_PAD_DECL(EIM_D17__DCIC1_OUT, 0x03A8, 0x0094, 4, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D17__GPIO3_IO17, 0x03A8, 0x0094, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D17__I2C3_SCL, 0x03A8, 0x0094, 22, 0x08A8, 0, 0) +MX6_PAD_DECL(EIM_D18__EIM_DATA18, 0x03AC, 0x0098, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D18__ECSPI1_MOSI, 0x03AC, 0x0098, 1, 0x07FC, 0, 0) +MX6_PAD_DECL(EIM_D18__IPU1_DI0_PIN07, 0x03AC, 0x0098, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D18__IPU2_CSI1_DATA17, 0x03AC, 0x0098, 3, 0x08CC, 0, 0) +MX6_PAD_DECL(EIM_D18__IPU1_DI1_D0_CS, 0x03AC, 0x0098, 4, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D18__GPIO3_IO18, 0x03AC, 0x0098, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D18__I2C3_SDA, 0x03AC, 0x0098, 22, 0x08AC, 0, 0) +MX6_PAD_DECL(EIM_D19__EIM_DATA19, 0x03B0, 0x009C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D19__ECSPI1_SS1, 0x03B0, 0x009C, 1, 0x0804, 0, 0) +MX6_PAD_DECL(EIM_D19__IPU1_DI0_PIN08, 0x03B0, 0x009C, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D19__IPU2_CSI1_DATA16, 0x03B0, 0x009C, 3, 0x08C8, 0, 0) +MX6_PAD_DECL(EIM_D19__UART1_CTS_B, 0x03B0, 0x009C, 4, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D19__UART1_RTS_B, 0x03B0, 0x009C, 4, 0x091C, 0, 0) +MX6_PAD_DECL(EIM_D19__GPIO3_IO19, 0x03B0, 0x009C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D19__EPIT1_OUT, 0x03B0, 0x009C, 6, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D20__EIM_DATA20, 0x03B4, 0x00A0, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D20__ECSPI4_SS0, 0x03B4, 0x00A0, 1, 0x0824, 0, 0) +MX6_PAD_DECL(EIM_D20__IPU1_DI0_PIN16, 0x03B4, 0x00A0, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D20__IPU2_CSI1_DATA15, 0x03B4, 0x00A0, 3, 0x08C4, 0, 0) +MX6_PAD_DECL(EIM_D20__UART1_CTS_B, 0x03B4, 0x00A0, 4, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D20__UART1_RTS_B, 0x03B4, 0x00A0, 4, 0x091C, 1, 0) +MX6_PAD_DECL(EIM_D20__GPIO3_IO20, 0x03B4, 0x00A0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D20__EPIT2_OUT, 0x03B4, 0x00A0, 6, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D21__EIM_DATA21, 0x03B8, 0x00A4, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D21__ECSPI4_SCLK, 0x03B8, 0x00A4, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D21__IPU1_DI0_PIN17, 0x03B8, 0x00A4, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D21__IPU2_CSI1_DATA11, 0x03B8, 0x00A4, 3, 0x08B4, 0, 0) +MX6_PAD_DECL(EIM_D21__USB_OTG_OC, 0x03B8, 0x00A4, 4, 0x0944, 0, 0) +MX6_PAD_DECL(EIM_D21__GPIO3_IO21, 0x03B8, 0x00A4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D21__I2C1_SCL, 0x03B8, 0x00A4, 22, 0x0898, 0, 0) +MX6_PAD_DECL(EIM_D21__SPDIF_IN, 0x03B8, 0x00A4, 7, 0x0914, 0, 0) +MX6_PAD_DECL(EIM_D22__EIM_DATA22, 0x03BC, 0x00A8, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D22__ECSPI4_MISO, 0x03BC, 0x00A8, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D22__IPU1_DI0_PIN01, 0x03BC, 0x00A8, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D22__IPU2_CSI1_DATA10, 0x03BC, 0x00A8, 3, 0x08B0, 0, 0) +MX6_PAD_DECL(EIM_D22__USB_OTG_PWR, 0x03BC, 0x00A8, 4, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D22__GPIO3_IO22, 0x03BC, 0x00A8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D22__SPDIF_OUT, 0x03BC, 0x00A8, 6, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D23__EIM_DATA23, 0x03C0, 0x00AC, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D23__IPU1_DI0_D0_CS, 0x03C0, 0x00AC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D23__UART3_CTS_B, 0x03C0, 0x00AC, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D23__UART3_RTS_B, 0x03C0, 0x00AC, 2, 0x092C, 0, 0) +MX6_PAD_DECL(EIM_D23__UART1_DCD_B, 0x03C0, 0x00AC, 3, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D23__IPU2_CSI1_DATA_EN, 0x03C0, 0x00AC, 4, 0x08D8, 0, 0) +MX6_PAD_DECL(EIM_D23__GPIO3_IO23, 0x03C0, 0x00AC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D23__IPU1_DI1_PIN02, 0x03C0, 0x00AC, 6, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D23__IPU1_DI1_PIN14, 0x03C0, 0x00AC, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB3__EIM_EB3_B, 0x03C4, 0x00B0, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB3__ECSPI4_RDY, 0x03C4, 0x00B0, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB3__UART3_CTS_B, 0x03C4, 0x00B0, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB3__UART3_RTS_B, 0x03C4, 0x00B0, 2, 0x092C, 1, 0) +MX6_PAD_DECL(EIM_EB3__UART1_RI_B, 0x03C4, 0x00B0, 3, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB3__IPU2_CSI1_HSYNC, 0x03C4, 0x00B0, 4, 0x08DC, 0, 0) +MX6_PAD_DECL(EIM_EB3__GPIO2_IO31, 0x03C4, 0x00B0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB3__IPU1_DI1_PIN03, 0x03C4, 0x00B0, 6, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB3__SRC_BOOT_CFG31, 0x03C4, 0x00B0, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D24__EIM_DATA24, 0x03C8, 0x00B4, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D24__ECSPI4_SS2, 0x03C8, 0x00B4, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D24__UART3_TX_DATA, 0x03C8, 0x00B4, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D24__UART3_RX_DATA, 0x03C8, 0x00B4, 2, 0x0930, 0, 0) +MX6_PAD_DECL(EIM_D24__ECSPI1_SS2, 0x03C8, 0x00B4, 3, 0x0808, 0, 0) +MX6_PAD_DECL(EIM_D24__ECSPI2_SS2, 0x03C8, 0x00B4, 4, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D24__GPIO3_IO24, 0x03C8, 0x00B4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D24__AUD5_RXFS, 0x03C8, 0x00B4, 6, 0x07D8, 0, 0) +MX6_PAD_DECL(EIM_D24__UART1_DTR_B, 0x03C8, 0x00B4, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D25__EIM_DATA25, 0x03CC, 0x00B8, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D25__ECSPI4_SS3, 0x03CC, 0x00B8, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D25__UART3_TX_DATA, 0x03CC, 0x00B8, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D25__UART3_RX_DATA, 0x03CC, 0x00B8, 2, 0x0930, 1, 0) +MX6_PAD_DECL(EIM_D25__ECSPI1_SS3, 0x03CC, 0x00B8, 3, 0x080C, 0, 0) +MX6_PAD_DECL(EIM_D25__ECSPI2_SS3, 0x03CC, 0x00B8, 4, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D25__GPIO3_IO25, 0x03CC, 0x00B8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D25__AUD5_RXC, 0x03CC, 0x00B8, 6, 0x07D4, 0, 0) +MX6_PAD_DECL(EIM_D25__UART1_DSR_B, 0x03CC, 0x00B8, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D26__EIM_DATA26, 0x03D0, 0x00BC, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D26__IPU1_DI1_PIN11, 0x03D0, 0x00BC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D26__IPU1_CSI0_DATA01, 0x03D0, 0x00BC, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D26__IPU2_CSI1_DATA14, 0x03D0, 0x00BC, 3, 0x08C0, 0, 0) +MX6_PAD_DECL(EIM_D26__UART2_TX_DATA, 0x03D0, 0x00BC, 4, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D26__UART2_RX_DATA, 0x03D0, 0x00BC, 4, 0x0928, 0, 0) +MX6_PAD_DECL(EIM_D26__GPIO3_IO26, 0x03D0, 0x00BC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D26__IPU1_SISG2, 0x03D0, 0x00BC, 6, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D26__IPU1_DISP1_DATA22, 0x03D0, 0x00BC, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D27__EIM_DATA27, 0x03D4, 0x00C0, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D27__IPU1_DI1_PIN13, 0x03D4, 0x00C0, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D27__IPU1_CSI0_DATA00, 0x03D4, 0x00C0, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D27__IPU2_CSI1_DATA13, 0x03D4, 0x00C0, 3, 0x08BC, 0, 0) +MX6_PAD_DECL(EIM_D27__UART2_TX_DATA, 0x03D4, 0x00C0, 4, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D27__UART2_RX_DATA, 0x03D4, 0x00C0, 4, 0x0928, 1, 0) +MX6_PAD_DECL(EIM_D27__GPIO3_IO27, 0x03D4, 0x00C0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D27__IPU1_SISG3, 0x03D4, 0x00C0, 6, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D27__IPU1_DISP1_DATA23, 0x03D4, 0x00C0, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D28__EIM_DATA28, 0x03D8, 0x00C4, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D28__I2C1_SDA, 0x03D8, 0x00C4, 17, 0x089C, 0, 0) +MX6_PAD_DECL(EIM_D28__ECSPI4_MOSI, 0x03D8, 0x00C4, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D28__IPU2_CSI1_DATA12, 0x03D8, 0x00C4, 3, 0x08B8, 0, 0) +MX6_PAD_DECL(EIM_D28__UART2_DTE_CTS_B, 0x03D8, 0x00C4, 4, 0x0924, 0, 0) +MX6_PAD_DECL(EIM_D28__UART2_DTE_RTS_B, 0x03D8, 0x00C4, 4, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D28__GPIO3_IO28, 0x03D8, 0x00C4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D28__IPU1_EXT_TRIG, 0x03D8, 0x00C4, 6, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D28__IPU1_DI0_PIN13, 0x03D8, 0x00C4, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D29__EIM_DATA29, 0x03DC, 0x00C8, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D29__IPU1_DI1_PIN15, 0x03DC, 0x00C8, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D29__ECSPI4_SS0, 0x03DC, 0x00C8, 2, 0x0824, 1, 0) +MX6_PAD_DECL(EIM_D29__UART2_CTS_B, 0x03DC, 0x00C8, 4, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D29__UART2_RTS_B, 0x03DC, 0x00C8, 4, 0x0924, 1, 0) +MX6_PAD_DECL(EIM_D29__GPIO3_IO29, 0x03DC, 0x00C8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D29__IPU2_CSI1_VSYNC, 0x03DC, 0x00C8, 6, 0x08E4, 0, 0) +MX6_PAD_DECL(EIM_D29__IPU1_DI0_PIN14, 0x03DC, 0x00C8, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D30__EIM_DATA30, 0x03E0, 0x00CC, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D30__IPU1_DISP1_DATA21, 0x03E0, 0x00CC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D30__IPU1_DI0_PIN11, 0x03E0, 0x00CC, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D30__IPU1_CSI0_DATA03, 0x03E0, 0x00CC, 3, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D30__UART3_CTS_B, 0x03E0, 0x00CC, 4, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D30__UART3_RTS_B, 0x03E0, 0x00CC, 4, 0x092C, 2, 0) +MX6_PAD_DECL(EIM_D30__GPIO3_IO30, 0x03E0, 0x00CC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D30__USB_H1_OC, 0x03E0, 0x00CC, 6, 0x0948, 0, 0) +MX6_PAD_DECL(EIM_D31__EIM_DATA31, 0x03E4, 0x00D0, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D31__IPU1_DISP1_DATA20, 0x03E4, 0x00D0, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D31__IPU1_DI0_PIN12, 0x03E4, 0x00D0, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D31__IPU1_CSI0_DATA02, 0x03E4, 0x00D0, 3, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D31__UART3_CTS_B, 0x03E4, 0x00D0, 4, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D31__UART3_RTS_B, 0x03E4, 0x00D0, 4, 0x092C, 3, 0) +MX6_PAD_DECL(EIM_D31__GPIO3_IO31, 0x03E4, 0x00D0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_D31__USB_H1_PWR, 0x03E4, 0x00D0, 6, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A24__EIM_ADDR24, 0x03E8, 0x00D4, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A24__IPU1_DISP1_DATA19, 0x03E8, 0x00D4, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A24__IPU2_CSI1_DATA19, 0x03E8, 0x00D4, 2, 0x08D4, 1, 0) +MX6_PAD_DECL(EIM_A24__IPU2_SISG2, 0x03E8, 0x00D4, 3, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A24__IPU1_SISG2, 0x03E8, 0x00D4, 4, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A24__GPIO5_IO04, 0x03E8, 0x00D4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A24__SRC_BOOT_CFG24, 0x03E8, 0x00D4, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A23__EIM_ADDR23, 0x03EC, 0x00D8, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A23__IPU1_DISP1_DATA18, 0x03EC, 0x00D8, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A23__IPU2_CSI1_DATA18, 0x03EC, 0x00D8, 2, 0x08D0, 1, 0) +MX6_PAD_DECL(EIM_A23__IPU2_SISG3, 0x03EC, 0x00D8, 3, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A23__IPU1_SISG3, 0x03EC, 0x00D8, 4, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A23__GPIO6_IO06, 0x03EC, 0x00D8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A23__SRC_BOOT_CFG23, 0x03EC, 0x00D8, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A22__EIM_ADDR22, 0x03F0, 0x00DC, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A22__IPU1_DISP1_DATA17, 0x03F0, 0x00DC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A22__IPU2_CSI1_DATA17, 0x03F0, 0x00DC, 2, 0x08CC, 1, 0) +MX6_PAD_DECL(EIM_A22__GPIO2_IO16, 0x03F0, 0x00DC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A22__SRC_BOOT_CFG22, 0x03F0, 0x00DC, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A21__EIM_ADDR21, 0x03F4, 0x00E0, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A21__IPU1_DISP1_DATA16, 0x03F4, 0x00E0, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A21__IPU2_CSI1_DATA16, 0x03F4, 0x00E0, 2, 0x08C8, 1, 0) +MX6_PAD_DECL(EIM_A21__GPIO2_IO17, 0x03F4, 0x00E0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A21__SRC_BOOT_CFG21, 0x03F4, 0x00E0, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A20__EIM_ADDR20, 0x03F8, 0x00E4, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A20__IPU1_DISP1_DATA15, 0x03F8, 0x00E4, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A20__IPU2_CSI1_DATA15, 0x03F8, 0x00E4, 2, 0x08C4, 1, 0) +MX6_PAD_DECL(EIM_A20__GPIO2_IO18, 0x03F8, 0x00E4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A20__SRC_BOOT_CFG20, 0x03F8, 0x00E4, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A19__EIM_ADDR19, 0x03FC, 0x00E8, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A19__IPU1_DISP1_DATA14, 0x03FC, 0x00E8, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A19__IPU2_CSI1_DATA14, 0x03FC, 0x00E8, 2, 0x08C0, 1, 0) +MX6_PAD_DECL(EIM_A19__GPIO2_IO19, 0x03FC, 0x00E8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A19__SRC_BOOT_CFG19, 0x03FC, 0x00E8, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A18__EIM_ADDR18, 0x0400, 0x00EC, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A18__IPU1_DISP1_DATA13, 0x0400, 0x00EC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A18__IPU2_CSI1_DATA13, 0x0400, 0x00EC, 2, 0x08BC, 1, 0) +MX6_PAD_DECL(EIM_A18__GPIO2_IO20, 0x0400, 0x00EC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A18__SRC_BOOT_CFG18, 0x0400, 0x00EC, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A17__EIM_ADDR17, 0x0404, 0x00F0, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A17__IPU1_DISP1_DATA12, 0x0404, 0x00F0, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A17__IPU2_CSI1_DATA12, 0x0404, 0x00F0, 2, 0x08B8, 1, 0) +MX6_PAD_DECL(EIM_A17__GPIO2_IO21, 0x0404, 0x00F0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A17__SRC_BOOT_CFG17, 0x0404, 0x00F0, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A16__EIM_ADDR16, 0x0408, 0x00F4, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A16__IPU1_DI1_DISP_CLK, 0x0408, 0x00F4, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A16__IPU2_CSI1_PIXCLK, 0x0408, 0x00F4, 2, 0x08E0, 1, 0) +MX6_PAD_DECL(EIM_A16__GPIO2_IO22, 0x0408, 0x00F4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_A16__SRC_BOOT_CFG16, 0x0408, 0x00F4, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_CS0__EIM_CS0_B, 0x040C, 0x00F8, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_CS0__IPU1_DI1_PIN05, 0x040C, 0x00F8, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_CS0__ECSPI2_SCLK, 0x040C, 0x00F8, 2, 0x0810, 0, 0) +MX6_PAD_DECL(EIM_CS0__GPIO2_IO23, 0x040C, 0x00F8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_CS1__EIM_CS1_B, 0x0410, 0x00FC, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_CS1__IPU1_DI1_PIN06, 0x0410, 0x00FC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_CS1__ECSPI2_MOSI, 0x0410, 0x00FC, 2, 0x0818, 0, 0) +MX6_PAD_DECL(EIM_CS1__GPIO2_IO24, 0x0410, 0x00FC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_OE__EIM_OE_B, 0x0414, 0x0100, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_OE__IPU1_DI1_PIN07, 0x0414, 0x0100, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_OE__ECSPI2_MISO, 0x0414, 0x0100, 2, 0x0814, 0, 0) +MX6_PAD_DECL(EIM_OE__GPIO2_IO25, 0x0414, 0x0100, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_RW__EIM_RW, 0x0418, 0x0104, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_RW__IPU1_DI1_PIN08, 0x0418, 0x0104, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_RW__ECSPI2_SS0, 0x0418, 0x0104, 2, 0x081C, 0, 0) +MX6_PAD_DECL(EIM_RW__GPIO2_IO26, 0x0418, 0x0104, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_RW__SRC_BOOT_CFG29, 0x0418, 0x0104, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_LBA__EIM_LBA_B, 0x041C, 0x0108, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_LBA__IPU1_DI1_PIN17, 0x041C, 0x0108, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_LBA__ECSPI2_SS1, 0x041C, 0x0108, 2, 0x0820, 0, 0) +MX6_PAD_DECL(EIM_LBA__GPIO2_IO27, 0x041C, 0x0108, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_LBA__SRC_BOOT_CFG26, 0x041C, 0x0108, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB0__EIM_EB0_B, 0x0420, 0x010C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB0__IPU1_DISP1_DATA11, 0x0420, 0x010C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB0__IPU2_CSI1_DATA11, 0x0420, 0x010C, 2, 0x08B4, 1, 0) +MX6_PAD_DECL(EIM_EB0__CCM_PMIC_READY, 0x0420, 0x010C, 4, 0x07F0, 0, 0) +MX6_PAD_DECL(EIM_EB0__GPIO2_IO28, 0x0420, 0x010C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB0__SRC_BOOT_CFG27, 0x0420, 0x010C, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB1__EIM_EB1_B, 0x0424, 0x0110, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB1__IPU1_DISP1_DATA10, 0x0424, 0x0110, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB1__IPU2_CSI1_DATA10, 0x0424, 0x0110, 2, 0x08B0, 1, 0) +MX6_PAD_DECL(EIM_EB1__GPIO2_IO29, 0x0424, 0x0110, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_EB1__SRC_BOOT_CFG28, 0x0424, 0x0110, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA0__EIM_AD00, 0x0428, 0x0114, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA0__IPU1_DISP1_DATA09, 0x0428, 0x0114, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA0__IPU2_CSI1_DATA09, 0x0428, 0x0114, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA0__GPIO3_IO00, 0x0428, 0x0114, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA0__SRC_BOOT_CFG00, 0x0428, 0x0114, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA1__EIM_AD01, 0x042C, 0x0118, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA1__IPU1_DISP1_DATA08, 0x042C, 0x0118, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA1__IPU2_CSI1_DATA08, 0x042C, 0x0118, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA1__GPIO3_IO01, 0x042C, 0x0118, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA1__SRC_BOOT_CFG01, 0x042C, 0x0118, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA2__EIM_AD02, 0x0430, 0x011C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA2__IPU1_DISP1_DATA07, 0x0430, 0x011C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA2__IPU2_CSI1_DATA07, 0x0430, 0x011C, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA2__GPIO3_IO02, 0x0430, 0x011C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA2__SRC_BOOT_CFG02, 0x0430, 0x011C, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA3__EIM_AD03, 0x0434, 0x0120, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA3__IPU1_DISP1_DATA06, 0x0434, 0x0120, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA3__IPU2_CSI1_DATA06, 0x0434, 0x0120, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA3__GPIO3_IO03, 0x0434, 0x0120, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA3__SRC_BOOT_CFG03, 0x0434, 0x0120, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA4__EIM_AD04, 0x0438, 0x0124, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA4__IPU1_DISP1_DATA05, 0x0438, 0x0124, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA4__IPU2_CSI1_DATA05, 0x0438, 0x0124, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA4__GPIO3_IO04, 0x0438, 0x0124, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA4__SRC_BOOT_CFG04, 0x0438, 0x0124, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA5__EIM_AD05, 0x043C, 0x0128, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA5__IPU1_DISP1_DATA04, 0x043C, 0x0128, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA5__IPU2_CSI1_DATA04, 0x043C, 0x0128, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA5__GPIO3_IO05, 0x043C, 0x0128, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA5__SRC_BOOT_CFG05, 0x043C, 0x0128, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA6__EIM_AD06, 0x0440, 0x012C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA6__IPU1_DISP1_DATA03, 0x0440, 0x012C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA6__IPU2_CSI1_DATA03, 0x0440, 0x012C, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA6__GPIO3_IO06, 0x0440, 0x012C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA6__SRC_BOOT_CFG06, 0x0440, 0x012C, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA7__EIM_AD07, 0x0444, 0x0130, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA7__IPU1_DISP1_DATA02, 0x0444, 0x0130, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA7__IPU2_CSI1_DATA02, 0x0444, 0x0130, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA7__GPIO3_IO07, 0x0444, 0x0130, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA7__SRC_BOOT_CFG07, 0x0444, 0x0130, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA8__EIM_AD08, 0x0448, 0x0134, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA8__IPU1_DISP1_DATA01, 0x0448, 0x0134, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA8__IPU2_CSI1_DATA01, 0x0448, 0x0134, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA8__GPIO3_IO08, 0x0448, 0x0134, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA8__SRC_BOOT_CFG08, 0x0448, 0x0134, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA9__EIM_AD09, 0x044C, 0x0138, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA9__IPU1_DISP1_DATA00, 0x044C, 0x0138, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA9__IPU2_CSI1_DATA00, 0x044C, 0x0138, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA9__GPIO3_IO09, 0x044C, 0x0138, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA9__SRC_BOOT_CFG09, 0x044C, 0x0138, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA10__EIM_AD10, 0x0450, 0x013C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA10__IPU1_DI1_PIN15, 0x0450, 0x013C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA10__IPU2_CSI1_DATA_EN, 0x0450, 0x013C, 2, 0x08D8, 1, 0) +MX6_PAD_DECL(EIM_DA10__GPIO3_IO10, 0x0450, 0x013C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA10__SRC_BOOT_CFG10, 0x0450, 0x013C, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA11__EIM_AD11, 0x0454, 0x0140, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA11__IPU1_DI1_PIN02, 0x0454, 0x0140, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA11__IPU2_CSI1_HSYNC, 0x0454, 0x0140, 2, 0x08DC, 1, 0) +MX6_PAD_DECL(EIM_DA11__GPIO3_IO11, 0x0454, 0x0140, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA11__SRC_BOOT_CFG11, 0x0454, 0x0140, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA12__EIM_AD12, 0x0458, 0x0144, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA12__IPU1_DI1_PIN03, 0x0458, 0x0144, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA12__IPU2_CSI1_VSYNC, 0x0458, 0x0144, 2, 0x08E4, 1, 0) +MX6_PAD_DECL(EIM_DA12__GPIO3_IO12, 0x0458, 0x0144, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA12__SRC_BOOT_CFG12, 0x0458, 0x0144, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA13__EIM_AD13, 0x045C, 0x0148, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA13__IPU1_DI1_D0_CS, 0x045C, 0x0148, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA13__GPIO3_IO13, 0x045C, 0x0148, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA13__SRC_BOOT_CFG13, 0x045C, 0x0148, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA14__EIM_AD14, 0x0460, 0x014C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA14__IPU1_DI1_D1_CS, 0x0460, 0x014C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA14__GPIO3_IO14, 0x0460, 0x014C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA14__SRC_BOOT_CFG14, 0x0460, 0x014C, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA15__EIM_AD15, 0x0464, 0x0150, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA15__IPU1_DI1_PIN01, 0x0464, 0x0150, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA15__IPU1_DI1_PIN04, 0x0464, 0x0150, 2, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA15__GPIO3_IO15, 0x0464, 0x0150, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_DA15__SRC_BOOT_CFG15, 0x0464, 0x0150, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_WAIT__EIM_WAIT_B, 0x0468, 0x0154, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_WAIT__EIM_DTACK_B, 0x0468, 0x0154, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_WAIT__GPIO5_IO00, 0x0468, 0x0154, 5, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_WAIT__SRC_BOOT_CFG25, 0x0468, 0x0154, 7, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_BCLK__EIM_BCLK, 0x046C, 0x0158, 0, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_BCLK__IPU1_DI1_PIN16, 0x046C, 0x0158, 1, 0x0000, 0, 0) +MX6_PAD_DECL(EIM_BCLK__GPIO6_IO31, 0x046C, 0x0158, 5, 0x0000, 0, 0) +#if 0 //cym20190606 +MX6_PAD_DECL(DI0_DISP_CLK__IPU1_DI0_DISP_CLK, 0x0470, 0x015C, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +#else +MX6_PAD_DECL(DI0_DISP_CLK__IPU1_DI0_DISP_CLK, 0x0470, 0x015C, 0, 0x0000, 0, PAD_CTL_DSE_240ohm) +#endif +MX6_PAD_DECL(DI0_DISP_CLK__IPU2_DI0_DISP_CLK, 0x0470, 0x015C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DI0_DISP_CLK__GPIO4_IO16, 0x0470, 0x015C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DI0_PIN15__IPU1_DI0_PIN15, 0x0474, 0x0160, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DI0_PIN15__IPU2_DI0_PIN15, 0x0474, 0x0160, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DI0_PIN15__AUD6_TXC, 0x0474, 0x0160, 2, 0x0000, 0, 0) +MX6_PAD_DECL(DI0_PIN15__GPIO4_IO17, 0x0474, 0x0160, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DI0_PIN2__IPU1_DI0_PIN02, 0x0478, 0x0164, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DI0_PIN2__IPU2_DI0_PIN02, 0x0478, 0x0164, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DI0_PIN2__AUD6_TXD, 0x0478, 0x0164, 2, 0x0000, 0, 0) +MX6_PAD_DECL(DI0_PIN2__GPIO4_IO18, 0x0478, 0x0164, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DI0_PIN3__IPU1_DI0_PIN03, 0x047C, 0x0168, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DI0_PIN3__IPU2_DI0_PIN03, 0x047C, 0x0168, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DI0_PIN3__AUD6_TXFS, 0x047C, 0x0168, 2, 0x0000, 0, 0) +MX6_PAD_DECL(DI0_PIN3__GPIO4_IO19, 0x047C, 0x0168, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DI0_PIN4__IPU1_DI0_PIN04, 0x0480, 0x016C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(DI0_PIN4__IPU2_DI0_PIN04, 0x0480, 0x016C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DI0_PIN4__AUD6_RXD, 0x0480, 0x016C, 2, 0x0000, 0, 0) +MX6_PAD_DECL(DI0_PIN4__SD1_WP, 0x0480, 0x016C, 3, 0x094C, 0, 0) +MX6_PAD_DECL(DI0_PIN4__GPIO4_IO20, 0x0480, 0x016C, 5, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT0__IPU1_DISP0_DATA00, 0x0484, 0x0170, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT0__IPU2_DISP0_DATA00, 0x0484, 0x0170, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT0__ECSPI3_SCLK, 0x0484, 0x0170, 2, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT0__GPIO4_IO21, 0x0484, 0x0170, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT1__IPU1_DISP0_DATA01, 0x0488, 0x0174, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT1__IPU2_DISP0_DATA01, 0x0488, 0x0174, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT1__ECSPI3_MOSI, 0x0488, 0x0174, 2, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT1__GPIO4_IO22, 0x0488, 0x0174, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT2__IPU1_DISP0_DATA02, 0x048C, 0x0178, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT2__IPU2_DISP0_DATA02, 0x048C, 0x0178, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT2__ECSPI3_MISO, 0x048C, 0x0178, 2, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT2__GPIO4_IO23, 0x048C, 0x0178, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT3__IPU1_DISP0_DATA03, 0x0490, 0x017C, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT3__IPU2_DISP0_DATA03, 0x0490, 0x017C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT3__ECSPI3_SS0, 0x0490, 0x017C, 2, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT3__GPIO4_IO24, 0x0490, 0x017C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT4__IPU1_DISP0_DATA04, 0x0494, 0x0180, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT4__IPU2_DISP0_DATA04, 0x0494, 0x0180, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT4__ECSPI3_SS1, 0x0494, 0x0180, 2, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT4__GPIO4_IO25, 0x0494, 0x0180, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT5__IPU1_DISP0_DATA05, 0x0498, 0x0184, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT5__IPU2_DISP0_DATA05, 0x0498, 0x0184, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT5__ECSPI3_SS2, 0x0498, 0x0184, 2, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT5__AUD6_RXFS, 0x0498, 0x0184, 3, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT5__GPIO4_IO26, 0x0498, 0x0184, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT6__IPU1_DISP0_DATA06, 0x049C, 0x0188, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT6__IPU2_DISP0_DATA06, 0x049C, 0x0188, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT6__ECSPI3_SS3, 0x049C, 0x0188, 2, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT6__AUD6_RXC, 0x049C, 0x0188, 3, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT6__GPIO4_IO27, 0x049C, 0x0188, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT7__IPU1_DISP0_DATA07, 0x04A0, 0x018C, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT7__IPU2_DISP0_DATA07, 0x04A0, 0x018C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT7__ECSPI3_RDY, 0x04A0, 0x018C, 2, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT7__GPIO4_IO28, 0x04A0, 0x018C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT8__IPU1_DISP0_DATA08, 0x04A4, 0x0190, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT8__IPU2_DISP0_DATA08, 0x04A4, 0x0190, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT8__PWM1_OUT, 0x04A4, 0x0190, 2, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT8__WDOG1_B, 0x04A4, 0x0190, 3, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT8__GPIO4_IO29, 0x04A4, 0x0190, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT9__IPU1_DISP0_DATA09, 0x04A8, 0x0194, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT9__IPU2_DISP0_DATA09, 0x04A8, 0x0194, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT9__PWM2_OUT, 0x04A8, 0x0194, 2, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT9__WDOG2_B, 0x04A8, 0x0194, 3, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT9__GPIO4_IO30, 0x04A8, 0x0194, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT10__IPU1_DISP0_DATA10, 0x04AC, 0x0198, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT10__IPU2_DISP0_DATA10, 0x04AC, 0x0198, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT10__GPIO4_IO31, 0x04AC, 0x0198, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT11__IPU1_DISP0_DATA11, 0x04B0, 0x019C, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT11__IPU2_DISP0_DATA11, 0x04B0, 0x019C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT11__GPIO5_IO05, 0x04B0, 0x019C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT12__IPU1_DISP0_DATA12, 0x04B4, 0x01A0, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT12__IPU2_DISP0_DATA12, 0x04B4, 0x01A0, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT12__GPIO5_IO06, 0x04B4, 0x01A0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT13__IPU1_DISP0_DATA13, 0x04B8, 0x01A4, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT13__IPU2_DISP0_DATA13, 0x04B8, 0x01A4, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT13__AUD5_RXFS, 0x04B8, 0x01A4, 3, 0x07D8, 1, 0) +MX6_PAD_DECL(DISP0_DAT13__GPIO5_IO07, 0x04B8, 0x01A4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT14__IPU1_DISP0_DATA14, 0x04BC, 0x01A8, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT14__IPU2_DISP0_DATA14, 0x04BC, 0x01A8, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT14__AUD5_RXC, 0x04BC, 0x01A8, 3, 0x07D4, 1, 0) +MX6_PAD_DECL(DISP0_DAT14__GPIO5_IO08, 0x04BC, 0x01A8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT15__IPU1_DISP0_DATA15, 0x04C0, 0x01AC, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT15__IPU2_DISP0_DATA15, 0x04C0, 0x01AC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT15__ECSPI1_SS1, 0x04C0, 0x01AC, 2, 0x0804, 1, 0) +MX6_PAD_DECL(DISP0_DAT15__ECSPI2_SS1, 0x04C0, 0x01AC, 3, 0x0820, 1, 0) +MX6_PAD_DECL(DISP0_DAT15__GPIO5_IO09, 0x04C0, 0x01AC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT16__IPU1_DISP0_DATA16, 0x04C4, 0x01B0, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT16__IPU2_DISP0_DATA16, 0x04C4, 0x01B0, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT16__ECSPI2_MOSI, 0x04C4, 0x01B0, 2, 0x0818, 1, 0) +MX6_PAD_DECL(DISP0_DAT16__AUD5_TXC, 0x04C4, 0x01B0, 3, 0x07DC, 0, 0) +MX6_PAD_DECL(DISP0_DAT16__SDMA_EXT_EVENT0, 0x04C4, 0x01B0, 4, 0x090C, 0, 0) +MX6_PAD_DECL(DISP0_DAT16__GPIO5_IO10, 0x04C4, 0x01B0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT17__IPU1_DISP0_DATA17, 0x04C8, 0x01B4, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT17__IPU2_DISP0_DATA17, 0x04C8, 0x01B4, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT17__ECSPI2_MISO, 0x04C8, 0x01B4, 2, 0x0814, 1, 0) +MX6_PAD_DECL(DISP0_DAT17__AUD5_TXD, 0x04C8, 0x01B4, 3, 0x07D0, 0, 0) +MX6_PAD_DECL(DISP0_DAT17__SDMA_EXT_EVENT1, 0x04C8, 0x01B4, 4, 0x0910, 0, 0) +MX6_PAD_DECL(DISP0_DAT17__GPIO5_IO11, 0x04C8, 0x01B4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT18__IPU1_DISP0_DATA18, 0x04CC, 0x01B8, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT18__IPU2_DISP0_DATA18, 0x04CC, 0x01B8, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT18__ECSPI2_SS0, 0x04CC, 0x01B8, 2, 0x081C, 1, 0) +MX6_PAD_DECL(DISP0_DAT18__AUD5_TXFS, 0x04CC, 0x01B8, 3, 0x07E0, 0, 0) +MX6_PAD_DECL(DISP0_DAT18__AUD4_RXFS, 0x04CC, 0x01B8, 4, 0x07C0, 0, 0) +MX6_PAD_DECL(DISP0_DAT18__GPIO5_IO12, 0x04CC, 0x01B8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT18__EIM_CS2_B, 0x04CC, 0x01B8, 7, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT19__IPU1_DISP0_DATA19, 0x04D0, 0x01BC, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT19__IPU2_DISP0_DATA19, 0x04D0, 0x01BC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT19__ECSPI2_SCLK, 0x04D0, 0x01BC, 2, 0x0810, 1, 0) +MX6_PAD_DECL(DISP0_DAT19__AUD5_RXD, 0x04D0, 0x01BC, 3, 0x07CC, 0, 0) +MX6_PAD_DECL(DISP0_DAT19__AUD4_RXC, 0x04D0, 0x01BC, 4, 0x07BC, 0, 0) +MX6_PAD_DECL(DISP0_DAT19__GPIO5_IO13, 0x04D0, 0x01BC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT19__EIM_CS3_B, 0x04D0, 0x01BC, 7, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT20__IPU1_DISP0_DATA20, 0x04D4, 0x01C0, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT20__IPU2_DISP0_DATA20, 0x04D4, 0x01C0, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT20__ECSPI1_SCLK, 0x04D4, 0x01C0, 2, 0x07F4, 1, 0) +MX6_PAD_DECL(DISP0_DAT20__AUD4_TXC, 0x04D4, 0x01C0, 3, 0x07C4, 0, 0) +MX6_PAD_DECL(DISP0_DAT20__GPIO5_IO14, 0x04D4, 0x01C0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT21__IPU1_DISP0_DATA21, 0x04D8, 0x01C4, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT21__IPU2_DISP0_DATA21, 0x04D8, 0x01C4, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT21__ECSPI1_MOSI, 0x04D8, 0x01C4, 2, 0x07FC, 1, 0) +MX6_PAD_DECL(DISP0_DAT21__AUD4_TXD, 0x04D8, 0x01C4, 3, 0x07B8, 1, 0) +MX6_PAD_DECL(DISP0_DAT21__GPIO5_IO15, 0x04D8, 0x01C4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT22__IPU1_DISP0_DATA22, 0x04DC, 0x01C8, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT22__IPU2_DISP0_DATA22, 0x04DC, 0x01C8, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT22__ECSPI1_MISO, 0x04DC, 0x01C8, 2, 0x07F8, 1, 0) +MX6_PAD_DECL(DISP0_DAT22__AUD4_TXFS, 0x04DC, 0x01C8, 3, 0x07C8, 1, 0) +MX6_PAD_DECL(DISP0_DAT22__GPIO5_IO16, 0x04DC, 0x01C8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT23__IPU1_DISP0_DATA23, 0x04E0, 0x01CC, 0, 0x0000, 0, PAD_CTL_DSE_120ohm) +MX6_PAD_DECL(DISP0_DAT23__IPU2_DISP0_DATA23, 0x04E0, 0x01CC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(DISP0_DAT23__ECSPI1_SS0, 0x04E0, 0x01CC, 2, 0x0800, 1, 0) +MX6_PAD_DECL(DISP0_DAT23__AUD4_RXD, 0x04E0, 0x01CC, 3, 0x07B4, 1, 0) +MX6_PAD_DECL(DISP0_DAT23__GPIO5_IO17, 0x04E0, 0x01CC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_MDIO__ENET_MDIO, 0x04E4, 0x01D0, 1, 0x0840, 0, 0) +MX6_PAD_DECL(ENET_MDIO__ESAI_RX_CLK, 0x04E4, 0x01D0, 2, 0x086C, 0, 0) +MX6_PAD_DECL(ENET_MDIO__ENET_1588_EVENT1_OUT, 0x04E4, 0x01D0, 4, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_MDIO__GPIO1_IO22, 0x04E4, 0x01D0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_MDIO__SPDIF_LOCK, 0x04E4, 0x01D0, 6, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_REF_CLK__ENET_TX_CLK, 0x04E8, 0x01D4, 1 | IOMUX_CONFIG_SION, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_REF_CLK__ESAI_RX_FS, 0x04E8, 0x01D4, 2, 0x085C, 0, 0) +MX6_PAD_DECL(ENET_REF_CLK__GPIO1_IO23, 0x04E8, 0x01D4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_REF_CLK__SPDIF_SR_CLK, 0x04E8, 0x01D4, 6, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_RX_ER__USB_OTG_ID, 0x04EC, 0x01D8, 0, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_RX_ER__ENET_RX_ER, 0x04EC, 0x01D8, 1, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_RX_ER__ESAI_RX_HF_CLK, 0x04EC, 0x01D8, 2, 0x0864, 0, 0) +MX6_PAD_DECL(ENET_RX_ER__SPDIF_IN, 0x04EC, 0x01D8, 3, 0x0914, 1, 0) +MX6_PAD_DECL(ENET_RX_ER__ENET_1588_EVENT2_OUT, 0x04EC, 0x01D8, 4, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_RX_ER__GPIO1_IO24, 0x04EC, 0x01D8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_CRS_DV__ENET_RX_EN, 0x04F0, 0x01DC, 1, 0x0858, 1, 0) +MX6_PAD_DECL(ENET_CRS_DV__ESAI_TX_CLK, 0x04F0, 0x01DC, 2, 0x0870, 0, 0) +MX6_PAD_DECL(ENET_CRS_DV__SPDIF_EXT_CLK, 0x04F0, 0x01DC, 3, 0x0918, 1, 0) +MX6_PAD_DECL(ENET_CRS_DV__GPIO1_IO25, 0x04F0, 0x01DC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_RXD1__MLB_SIG, 0x04F4, 0x01E0, 0, 0x0908, 0, 0) +MX6_PAD_DECL(ENET_RXD1__ENET_RX_DATA1, 0x04F4, 0x01E0, 1, 0x084C, 1, 0) +MX6_PAD_DECL(ENET_RXD1__ESAI_TX_FS, 0x04F4, 0x01E0, 2, 0x0860, 0, 0) +MX6_PAD_DECL(ENET_RXD1__ENET_1588_EVENT3_OUT, 0x04F4, 0x01E0, 4, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_RXD1__GPIO1_IO26, 0x04F4, 0x01E0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_RXD0__ENET_RX_DATA0, 0x04F8, 0x01E4, 1, 0x0848, 1, 0) +MX6_PAD_DECL(ENET_RXD0__ESAI_TX_HF_CLK, 0x04F8, 0x01E4, 2, 0x0868, 0, 0) +MX6_PAD_DECL(ENET_RXD0__SPDIF_OUT, 0x04F8, 0x01E4, 3, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_RXD0__GPIO1_IO27, 0x04F8, 0x01E4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_TX_EN__ENET_TX_EN, 0x04FC, 0x01E8, 1, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_TX_EN__ESAI_TX3_RX2, 0x04FC, 0x01E8, 2, 0x0880, 0, 0) +MX6_PAD_DECL(ENET_TX_EN__GPIO1_IO28, 0x04FC, 0x01E8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_TXD1__MLB_CLK, 0x0500, 0x01EC, 0, 0x0900, 0, 0) +MX6_PAD_DECL(ENET_TXD1__ENET_TX_DATA1, 0x0500, 0x01EC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_TXD1__ESAI_TX2_RX3, 0x0500, 0x01EC, 2, 0x087C, 0, 0) +MX6_PAD_DECL(ENET_TXD1__ENET_1588_EVENT0_IN, 0x0500, 0x01EC, 4, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_TXD1__GPIO1_IO29, 0x0500, 0x01EC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_TXD0__ENET_TX_DATA0, 0x0504, 0x01F0, 1, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_TXD0__ESAI_TX4_RX1, 0x0504, 0x01F0, 2, 0x0884, 0, 0) +MX6_PAD_DECL(ENET_TXD0__GPIO1_IO30, 0x0504, 0x01F0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_MDC__MLB_DATA, 0x0508, 0x01F4, 0, 0x0904, 0, 0) +MX6_PAD_DECL(ENET_MDC__ENET_MDC, 0x0508, 0x01F4, 1, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_MDC__ESAI_TX5_RX0, 0x0508, 0x01F4, 2, 0x0888, 0, 0) +MX6_PAD_DECL(ENET_MDC__ENET_1588_EVENT1_IN, 0x0508, 0x01F4, 4, 0x0000, 0, 0) +MX6_PAD_DECL(ENET_MDC__GPIO1_IO31, 0x0508, 0x01F4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL0__ECSPI1_SCLK, 0x05C8, 0x01F8, 0, 0x07F4, 2, 0) +MX6_PAD_DECL(KEY_COL0__ENET_RX_DATA3, 0x05C8, 0x01F8, 1, 0x0854, 1, 0) +MX6_PAD_DECL(KEY_COL0__AUD5_TXC, 0x05C8, 0x01F8, 2, 0x07DC, 1, 0) +MX6_PAD_DECL(KEY_COL0__KEY_COL0, 0x05C8, 0x01F8, 3, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL0__UART4_TX_DATA, 0x05C8, 0x01F8, 4, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL0__UART4_RX_DATA, 0x05C8, 0x01F8, 4, 0x0938, 0, 0) +MX6_PAD_DECL(KEY_COL0__GPIO4_IO06, 0x05C8, 0x01F8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL0__DCIC1_OUT, 0x05C8, 0x01F8, 6, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW0__ECSPI1_MOSI, 0x05CC, 0x01FC, 0, 0x07FC, 2, 0) +MX6_PAD_DECL(KEY_ROW0__ENET_TX_DATA3, 0x05CC, 0x01FC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW0__AUD5_TXD, 0x05CC, 0x01FC, 2, 0x07D0, 1, 0) +MX6_PAD_DECL(KEY_ROW0__KEY_ROW0, 0x05CC, 0x01FC, 3, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW0__UART4_TX_DATA, 0x05CC, 0x01FC, 4, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW0__UART4_RX_DATA, 0x05CC, 0x01FC, 4, 0x0938, 1, 0) +MX6_PAD_DECL(KEY_ROW0__GPIO4_IO07, 0x05CC, 0x01FC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW0__DCIC2_OUT, 0x05CC, 0x01FC, 6, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL1__ECSPI1_MISO, 0x05D0, 0x0200, 0, 0x07F8, 2, 0) +MX6_PAD_DECL(KEY_COL1__ENET_MDIO, 0x05D0, 0x0200, 1, 0x0840, 1, 0) +MX6_PAD_DECL(KEY_COL1__AUD5_TXFS, 0x05D0, 0x0200, 2, 0x07E0, 1, 0) +MX6_PAD_DECL(KEY_COL1__KEY_COL1, 0x05D0, 0x0200, 3, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL1__UART5_TX_DATA, 0x05D0, 0x0200, 4, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL1__UART5_RX_DATA, 0x05D0, 0x0200, 4, 0x0940, 0, 0) +MX6_PAD_DECL(KEY_COL1__GPIO4_IO08, 0x05D0, 0x0200, 5, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL1__SD1_VSELECT, 0x05D0, 0x0200, 6, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW1__ECSPI1_SS0, 0x05D4, 0x0204, 0, 0x0800, 2, 0) +MX6_PAD_DECL(KEY_ROW1__ENET_COL, 0x05D4, 0x0204, 1, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW1__AUD5_RXD, 0x05D4, 0x0204, 2, 0x07CC, 1, 0) +MX6_PAD_DECL(KEY_ROW1__KEY_ROW1, 0x05D4, 0x0204, 3, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW1__UART5_TX_DATA, 0x05D4, 0x0204, 4, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW1__UART5_RX_DATA, 0x05D4, 0x0204, 4, 0x0940, 1, 0) +MX6_PAD_DECL(KEY_ROW1__GPIO4_IO09, 0x05D4, 0x0204, 5, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW1__SD2_VSELECT, 0x05D4, 0x0204, 6, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL2__ECSPI1_SS1, 0x05D8, 0x0208, 0, 0x0804, 2, 0) +MX6_PAD_DECL(KEY_COL2__ENET_RX_DATA2, 0x05D8, 0x0208, 1, 0x0850, 1, 0) +MX6_PAD_DECL(KEY_COL2__FLEXCAN1_TX, 0x05D8, 0x0208, 2, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL2__KEY_COL2, 0x05D8, 0x0208, 3, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL2__ENET_MDC, 0x05D8, 0x0208, 4, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL2__GPIO4_IO10, 0x05D8, 0x0208, 5, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL2__USB_H1_PWR_CTL_WAKE, 0x05D8, 0x0208, 6, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW2__ECSPI1_SS2, 0x05DC, 0x020C, 0, 0x0808, 1, 0) +MX6_PAD_DECL(KEY_ROW2__ENET_TX_DATA2, 0x05DC, 0x020C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW2__FLEXCAN1_RX, 0x05DC, 0x020C, 2, 0x07E4, 0, 0) +MX6_PAD_DECL(KEY_ROW2__KEY_ROW2, 0x05DC, 0x020C, 3, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW2__SD2_VSELECT, 0x05DC, 0x020C, 4, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW2__GPIO4_IO11, 0x05DC, 0x020C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW2__HDMI_TX_CEC_LINE, 0x05DC, 0x020C, 6, 0x088C, 1, 0) +MX6_PAD_DECL(KEY_COL3__ECSPI1_SS3, 0x05E0, 0x0210, 0, 0x080C, 1, 0) +MX6_PAD_DECL(KEY_COL3__ENET_CRS, 0x05E0, 0x0210, 1, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL3__HDMI_TX_DDC_SCL, 0x05E0, 0x0210, 2, 0x0890, 1, 0) +MX6_PAD_DECL(KEY_COL3__KEY_COL3, 0x05E0, 0x0210, 3, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL3__I2C2_SCL, 0x05E0, 0x0210, 20, 0x08A0, 1, 0) +MX6_PAD_DECL(KEY_COL3__GPIO4_IO12, 0x05E0, 0x0210, 5, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL3__SPDIF_IN, 0x05E0, 0x0210, 6, 0x0914, 2, 0) +MX6_PAD_DECL(KEY_ROW3__ASRC_EXT_CLK, 0x05E4, 0x0214, 1, 0x07B0, 0, 0) +MX6_PAD_DECL(KEY_ROW3__HDMI_TX_DDC_SDA, 0x05E4, 0x0214, 2, 0x0894, 1, 0) +MX6_PAD_DECL(KEY_ROW3__KEY_ROW3, 0x05E4, 0x0214, 3, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW3__I2C2_SDA, 0x05E4, 0x0214, 20, 0x08A4, 1, 0) +MX6_PAD_DECL(KEY_ROW3__GPIO4_IO13, 0x05E4, 0x0214, 5, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW3__SD1_VSELECT, 0x05E4, 0x0214, 6, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL4__FLEXCAN2_TX, 0x05E8, 0x0218, 0, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL4__IPU1_SISG4, 0x05E8, 0x0218, 1, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL4__USB_OTG_OC, 0x05E8, 0x0218, 2, 0x0944, 1, 0) +MX6_PAD_DECL(KEY_COL4__KEY_COL4, 0x05E8, 0x0218, 3, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL4__UART5_CTS_B, 0x05E8, 0x0218, 4, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_COL4__UART5_RTS_B, 0x05E8, 0x0218, 4, 0x093C, 0, 0) +MX6_PAD_DECL(KEY_COL4__GPIO4_IO14, 0x05E8, 0x0218, 5, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW4__FLEXCAN2_RX, 0x05EC, 0x021C, 0, 0x07E8, 0, 0) +MX6_PAD_DECL(KEY_ROW4__IPU1_SISG5, 0x05EC, 0x021C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW4__USB_OTG_PWR, 0x05EC, 0x021C, 2, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW4__KEY_ROW4, 0x05EC, 0x021C, 3, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW4__UART5_CTS_B, 0x05EC, 0x021C, 4, 0x0000, 0, 0) +MX6_PAD_DECL(KEY_ROW4__UART5_RTS_B, 0x05EC, 0x021C, 4, 0x093C, 1, 0) +MX6_PAD_DECL(KEY_ROW4__GPIO4_IO15, 0x05EC, 0x021C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_0__CCM_CLKO1, 0x05F0, 0x0220, 0, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_0__KEY_COL5, 0x05F0, 0x0220, 2, 0x08E8, 0, 0) +MX6_PAD_DECL(GPIO_0__ASRC_EXT_CLK, 0x05F0, 0x0220, 3, 0x07B0, 1, 0) +MX6_PAD_DECL(GPIO_0__EPIT1_OUT, 0x05F0, 0x0220, 4, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_0__GPIO1_IO00, 0x05F0, 0x0220, 5, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_0__USB_H1_PWR, 0x05F0, 0x0220, 6, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_0__SNVS_VIO_5, 0x05F0, 0x0220, 7, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_1__ESAI_RX_CLK, 0x05F4, 0x0224, 0, 0x086C, 1, 0) +MX6_PAD_DECL(GPIO_1__WDOG2_B, 0x05F4, 0x0224, 1, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_1__KEY_ROW5, 0x05F4, 0x0224, 2, 0x08F4, 0, 0) +MX6_PAD_DECL(GPIO_1__USB_OTG_ID, 0x05F4, 0x0224, 3, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_1__PWM2_OUT, 0x05F4, 0x0224, 4, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_1__GPIO1_IO01, 0x05F4, 0x0224, 5, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_1__SD1_CD_B, 0x05F4, 0x0224, 6, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_9__ESAI_RX_FS, 0x05F8, 0x0228, 0, 0x085C, 1, 0) +MX6_PAD_DECL(GPIO_9__WDOG1_B, 0x05F8, 0x0228, 1, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_9__KEY_COL6, 0x05F8, 0x0228, 2, 0x08EC, 0, 0) +MX6_PAD_DECL(GPIO_9__CCM_REF_EN_B, 0x05F8, 0x0228, 3, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_9__PWM1_OUT, 0x05F8, 0x0228, 4, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_9__GPIO1_IO09, 0x05F8, 0x0228, 5, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_9__SD1_WP, 0x05F8, 0x0228, 6, 0x094C, 1, 0) +MX6_PAD_DECL(GPIO_3__ESAI_RX_HF_CLK, 0x05FC, 0x022C, 0, 0x0864, 1, 0) +MX6_PAD_DECL(GPIO_3__I2C3_SCL, 0x05FC, 0x022C, 18, 0x08A8, 1, 0) +MX6_PAD_DECL(GPIO_3__XTALOSC_REF_CLK_24M, 0x05FC, 0x022C, 3, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_3__CCM_CLKO2, 0x05FC, 0x022C, 4, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_3__GPIO1_IO03, 0x05FC, 0x022C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_3__USB_H1_OC, 0x05FC, 0x022C, 6, 0x0948, 1, 0) +MX6_PAD_DECL(GPIO_3__MLB_CLK, 0x05FC, 0x022C, 7, 0x0900, 1, 0) +MX6_PAD_DECL(GPIO_6__ESAI_TX_CLK, 0x0600, 0x0230, 0, 0x0870, 1, 0) +MX6_PAD_DECL(GPIO_6__I2C3_SDA, 0x0600, 0x0230, 18, 0x08AC, 1, 0) +MX6_PAD_DECL(GPIO_6__GPIO1_IO06, 0x0600, 0x0230, 5, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_6__SD2_LCTL, 0x0600, 0x0230, 6, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_6__MLB_SIG, 0x0600, 0x0230, 7, 0x0908, 1, 0) +MX6_PAD_DECL(GPIO_2__ESAI_TX_FS, 0x0604, 0x0234, 0, 0x0860, 1, 0) +MX6_PAD_DECL(GPIO_2__KEY_ROW6, 0x0604, 0x0234, 2, 0x08F8, 1, 0) +MX6_PAD_DECL(GPIO_2__GPIO1_IO02, 0x0604, 0x0234, 5, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_2__SD2_WP, 0x0604, 0x0234, 6, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_2__MLB_DATA, 0x0604, 0x0234, 7, 0x0904, 1, 0) +MX6_PAD_DECL(GPIO_4__ESAI_TX_HF_CLK, 0x0608, 0x0238, 0, 0x0868, 1, 0) +MX6_PAD_DECL(GPIO_4__KEY_COL7, 0x0608, 0x0238, 2, 0x08F0, 1, 0) +MX6_PAD_DECL(GPIO_4__GPIO1_IO04, 0x0608, 0x0238, 5, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_4__SD2_CD_B, 0x0608, 0x0238, 6, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_5__ESAI_TX2_RX3, 0x060C, 0x023C, 0, 0x087C, 1, 0) +MX6_PAD_DECL(GPIO_5__KEY_ROW7, 0x060C, 0x023C, 2, 0x08FC, 1, 0) +MX6_PAD_DECL(GPIO_5__CCM_CLKO1, 0x060C, 0x023C, 3, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_5__GPIO1_IO05, 0x060C, 0x023C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_5__I2C3_SCL, 0x060C, 0x023C, 22, 0x08A8, 2, 0) +MX6_PAD_DECL(GPIO_5__ARM_EVENTI, 0x060C, 0x023C, 7, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_7__ESAI_TX4_RX1, 0x0610, 0x0240, 0, 0x0884, 1, 0) +MX6_PAD_DECL(GPIO_7__ECSPI5_RDY, 0x0610, 0x0240, 1, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_7__EPIT1_OUT, 0x0610, 0x0240, 2, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_7__FLEXCAN1_TX, 0x0610, 0x0240, 3, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_7__UART2_TX_DATA, 0x0610, 0x0240, 4, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_7__UART2_RX_DATA, 0x0610, 0x0240, 4, 0x0928, 2, 0) +MX6_PAD_DECL(GPIO_7__GPIO1_IO07, 0x0610, 0x0240, 5, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_7__SPDIF_LOCK, 0x0610, 0x0240, 6, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_7__USB_OTG_HOST_MODE, 0x0610, 0x0240, 7, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_8__ESAI_TX5_RX0, 0x0614, 0x0244, 0, 0x0888, 1, 0) +MX6_PAD_DECL(GPIO_8__XTALOSC_REF_CLK_32K, 0x0614, 0x0244, 1, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_8__EPIT2_OUT, 0x0614, 0x0244, 2, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_8__FLEXCAN1_RX, 0x0614, 0x0244, 3, 0x07E4, 1, 0) +MX6_PAD_DECL(GPIO_8__UART2_TX_DATA, 0x0614, 0x0244, 4, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_8__UART2_RX_DATA, 0x0614, 0x0244, 4, 0x0928, 3, 0) +MX6_PAD_DECL(GPIO_8__GPIO1_IO08, 0x0614, 0x0244, 5, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_8__SPDIF_SR_CLK, 0x0614, 0x0244, 6, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_8__USB_OTG_PWR_CTL_WAKE, 0x0614, 0x0244, 7, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_16__ESAI_TX3_RX2, 0x0618, 0x0248, 0, 0x0880, 1, 0) +MX6_PAD_DECL(GPIO_16__ENET_1588_EVENT2_IN, 0x0618, 0x0248, 1, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_16__ENET_REF_CLK, 0x0618, 0x0248, 2 | IOMUX_CONFIG_SION, 0x083C, 1, 0) +MX6_PAD_DECL(GPIO_16__SD1_LCTL, 0x0618, 0x0248, 3, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_16__SPDIF_IN, 0x0618, 0x0248, 4, 0x0914, 3, 0) +MX6_PAD_DECL(GPIO_16__GPIO7_IO11, 0x0618, 0x0248, 5, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_16__I2C3_SDA, 0x0618, 0x0248, 22, 0x08AC, 2, 0) +MX6_PAD_DECL(GPIO_16__JTAG_DE_B, 0x0618, 0x0248, 7, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_17__ESAI_TX0, 0x061C, 0x024C, 0, 0x0874, 0, 0) +MX6_PAD_DECL(GPIO_17__ENET_1588_EVENT3_IN, 0x061C, 0x024C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_17__CCM_PMIC_READY, 0x061C, 0x024C, 2, 0x07F0, 1, 0) +MX6_PAD_DECL(GPIO_17__SDMA_EXT_EVENT0, 0x061C, 0x024C, 3, 0x090C, 1, 0) +MX6_PAD_DECL(GPIO_17__SPDIF_OUT, 0x061C, 0x024C, 4, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_17__GPIO7_IO12, 0x061C, 0x024C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_18__ESAI_TX1, 0x0620, 0x0250, 0, 0x0878, 0, 0) +MX6_PAD_DECL(GPIO_18__ENET_RX_CLK, 0x0620, 0x0250, 1, 0x0844, 1, 0) +MX6_PAD_DECL(GPIO_18__SD3_VSELECT, 0x0620, 0x0250, 2, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_18__SDMA_EXT_EVENT1, 0x0620, 0x0250, 3, 0x0910, 1, 0) +MX6_PAD_DECL(GPIO_18__ASRC_EXT_CLK, 0x0620, 0x0250, 4, 0x07B0, 2, 0) +MX6_PAD_DECL(GPIO_18__GPIO7_IO13, 0x0620, 0x0250, 5, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_18__SNVS_VIO_5_CTL, 0x0620, 0x0250, 6, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_19__KEY_COL5, 0x0624, 0x0254, 0, 0x08E8, 1, 0) +MX6_PAD_DECL(GPIO_19__ENET_1588_EVENT0_OUT, 0x0624, 0x0254, 1, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_19__SPDIF_OUT, 0x0624, 0x0254, 2, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_19__CCM_CLKO1, 0x0624, 0x0254, 3, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_19__ECSPI1_RDY, 0x0624, 0x0254, 4, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_19__GPIO4_IO05, 0x0624, 0x0254, 5, 0x0000, 0, 0) +MX6_PAD_DECL(GPIO_19__ENET_TX_ER, 0x0624, 0x0254, 6, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_PIXCLK__IPU1_CSI0_PIXCLK, 0x0628, 0x0258, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_PIXCLK__GPIO5_IO18, 0x0628, 0x0258, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_PIXCLK__ARM_EVENTO, 0x0628, 0x0258, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_MCLK__IPU1_CSI0_HSYNC, 0x062C, 0x025C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_MCLK__CCM_CLKO1, 0x062C, 0x025C, 3, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_MCLK__GPIO5_IO19, 0x062C, 0x025C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_MCLK__ARM_TRACE_CTL, 0x062C, 0x025C, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DATA_EN__IPU1_CSI0_DATA_EN, 0x0630, 0x0260, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DATA_EN__EIM_DATA00, 0x0630, 0x0260, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DATA_EN__GPIO5_IO20, 0x0630, 0x0260, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DATA_EN__ARM_TRACE_CLK, 0x0630, 0x0260, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_VSYNC__IPU1_CSI0_VSYNC, 0x0634, 0x0264, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_VSYNC__EIM_DATA01, 0x0634, 0x0264, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_VSYNC__GPIO5_IO21, 0x0634, 0x0264, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_VSYNC__ARM_TRACE00, 0x0634, 0x0264, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT4__IPU1_CSI0_DATA04, 0x0638, 0x0268, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT4__EIM_DATA02, 0x0638, 0x0268, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT4__ECSPI1_SCLK, 0x0638, 0x0268, 2, 0x07F4, 3, 0) +MX6_PAD_DECL(CSI0_DAT4__KEY_COL5, 0x0638, 0x0268, 3, 0x08E8, 2, 0) +MX6_PAD_DECL(CSI0_DAT4__AUD3_TXC, 0x0638, 0x0268, 4, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT4__GPIO5_IO22, 0x0638, 0x0268, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT4__ARM_TRACE01, 0x0638, 0x0268, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT5__IPU1_CSI0_DATA05, 0x063C, 0x026C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT5__EIM_DATA03, 0x063C, 0x026C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT5__ECSPI1_MOSI, 0x063C, 0x026C, 2, 0x07FC, 3, 0) +MX6_PAD_DECL(CSI0_DAT5__KEY_ROW5, 0x063C, 0x026C, 3, 0x08F4, 1, 0) +MX6_PAD_DECL(CSI0_DAT5__AUD3_TXD, 0x063C, 0x026C, 4, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT5__GPIO5_IO23, 0x063C, 0x026C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT5__ARM_TRACE02, 0x063C, 0x026C, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT6__IPU1_CSI0_DATA06, 0x0640, 0x0270, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT6__EIM_DATA04, 0x0640, 0x0270, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT6__ECSPI1_MISO, 0x0640, 0x0270, 2, 0x07F8, 3, 0) +MX6_PAD_DECL(CSI0_DAT6__KEY_COL6, 0x0640, 0x0270, 3, 0x08EC, 1, 0) +MX6_PAD_DECL(CSI0_DAT6__AUD3_TXFS, 0x0640, 0x0270, 4, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT6__GPIO5_IO24, 0x0640, 0x0270, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT6__ARM_TRACE03, 0x0640, 0x0270, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT7__IPU1_CSI0_DATA07, 0x0644, 0x0274, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT7__EIM_DATA05, 0x0644, 0x0274, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT7__ECSPI1_SS0, 0x0644, 0x0274, 2, 0x0800, 3, 0) +MX6_PAD_DECL(CSI0_DAT7__KEY_ROW6, 0x0644, 0x0274, 3, 0x08F8, 2, 0) +MX6_PAD_DECL(CSI0_DAT7__AUD3_RXD, 0x0644, 0x0274, 4, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT7__GPIO5_IO25, 0x0644, 0x0274, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT7__ARM_TRACE04, 0x0644, 0x0274, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT8__IPU1_CSI0_DATA08, 0x0648, 0x0278, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT8__EIM_DATA06, 0x0648, 0x0278, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT8__ECSPI2_SCLK, 0x0648, 0x0278, 2, 0x0810, 2, 0) +MX6_PAD_DECL(CSI0_DAT8__KEY_COL7, 0x0648, 0x0278, 3, 0x08F0, 2, 0) +MX6_PAD_DECL(CSI0_DAT8__I2C1_SDA, 0x0648, 0x0278, 20, 0x089C, 1, 0) +MX6_PAD_DECL(CSI0_DAT8__GPIO5_IO26, 0x0648, 0x0278, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT8__ARM_TRACE05, 0x0648, 0x0278, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT9__IPU1_CSI0_DATA09, 0x064C, 0x027C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT9__EIM_DATA07, 0x064C, 0x027C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT9__ECSPI2_MOSI, 0x064C, 0x027C, 2, 0x0818, 2, 0) +MX6_PAD_DECL(CSI0_DAT9__KEY_ROW7, 0x064C, 0x027C, 3, 0x08FC, 2, 0) +MX6_PAD_DECL(CSI0_DAT9__I2C1_SCL, 0x064C, 0x027C, 20, 0x0898, 1, 0) +MX6_PAD_DECL(CSI0_DAT9__GPIO5_IO27, 0x064C, 0x027C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT9__ARM_TRACE06, 0x064C, 0x027C, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT10__IPU1_CSI0_DATA10, 0x0650, 0x0280, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT10__AUD3_RXC, 0x0650, 0x0280, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT10__ECSPI2_MISO, 0x0650, 0x0280, 2, 0x0814, 2, 0) +MX6_PAD_DECL(CSI0_DAT10__UART1_TX_DATA, 0x0650, 0x0280, 3, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT10__UART1_RX_DATA, 0x0650, 0x0280, 3, 0x0920, 0, 0) +MX6_PAD_DECL(CSI0_DAT10__GPIO5_IO28, 0x0650, 0x0280, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT10__ARM_TRACE07, 0x0650, 0x0280, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT11__IPU1_CSI0_DATA11, 0x0654, 0x0284, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT11__AUD3_RXFS, 0x0654, 0x0284, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT11__ECSPI2_SS0, 0x0654, 0x0284, 2, 0x081C, 2, 0) +MX6_PAD_DECL(CSI0_DAT11__UART1_TX_DATA, 0x0654, 0x0284, 3, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT11__UART1_RX_DATA, 0x0654, 0x0284, 3, 0x0920, 1, 0) +MX6_PAD_DECL(CSI0_DAT11__GPIO5_IO29, 0x0654, 0x0284, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT11__ARM_TRACE08, 0x0654, 0x0284, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT12__IPU1_CSI0_DATA12, 0x0658, 0x0288, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT12__EIM_DATA08, 0x0658, 0x0288, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT12__UART4_TX_DATA, 0x0658, 0x0288, 3, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT12__UART4_RX_DATA, 0x0658, 0x0288, 3, 0x0938, 2, 0) +MX6_PAD_DECL(CSI0_DAT12__GPIO5_IO30, 0x0658, 0x0288, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT12__ARM_TRACE09, 0x0658, 0x0288, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT13__IPU1_CSI0_DATA13, 0x065C, 0x028C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT13__EIM_DATA09, 0x065C, 0x028C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT13__UART4_TX_DATA, 0x065C, 0x028C, 3, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT13__UART4_RX_DATA, 0x065C, 0x028C, 3, 0x0938, 3, 0) +MX6_PAD_DECL(CSI0_DAT13__GPIO5_IO31, 0x065C, 0x028C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT13__ARM_TRACE10, 0x065C, 0x028C, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT14__IPU1_CSI0_DATA14, 0x0660, 0x0290, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT14__EIM_DATA10, 0x0660, 0x0290, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT14__UART5_TX_DATA, 0x0660, 0x0290, 3, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT14__UART5_RX_DATA, 0x0660, 0x0290, 3, 0x0940, 2, 0) +MX6_PAD_DECL(CSI0_DAT14__GPIO6_IO00, 0x0660, 0x0290, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT14__ARM_TRACE11, 0x0660, 0x0290, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT15__IPU1_CSI0_DATA15, 0x0664, 0x0294, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT15__EIM_DATA11, 0x0664, 0x0294, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT15__UART5_TX_DATA, 0x0664, 0x0294, 3, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT15__UART5_RX_DATA, 0x0664, 0x0294, 3, 0x0940, 3, 0) +MX6_PAD_DECL(CSI0_DAT15__GPIO6_IO01, 0x0664, 0x0294, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT15__ARM_TRACE12, 0x0664, 0x0294, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT16__IPU1_CSI0_DATA16, 0x0668, 0x0298, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT16__EIM_DATA12, 0x0668, 0x0298, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT16__UART4_CTS_B, 0x0668, 0x0298, 3, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT16__UART4_RTS_B, 0x0668, 0x0298, 3, 0x0934, 0, 0) +MX6_PAD_DECL(CSI0_DAT16__GPIO6_IO02, 0x0668, 0x0298, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT16__ARM_TRACE13, 0x0668, 0x0298, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT17__IPU1_CSI0_DATA17, 0x066C, 0x029C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT17__EIM_DATA13, 0x066C, 0x029C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT17__UART4_CTS_B, 0x066C, 0x029C, 3, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT17__UART4_RTS_B, 0x066C, 0x029C, 3, 0x0934, 1, 0) +MX6_PAD_DECL(CSI0_DAT17__GPIO6_IO03, 0x066C, 0x029C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT17__ARM_TRACE14, 0x066C, 0x029C, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT18__IPU1_CSI0_DATA18, 0x0670, 0x02A0, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT18__EIM_DATA14, 0x0670, 0x02A0, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT18__UART5_CTS_B, 0x0670, 0x02A0, 3, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT18__UART5_RTS_B, 0x0670, 0x02A0, 3, 0x093C, 2, 0) +MX6_PAD_DECL(CSI0_DAT18__GPIO6_IO04, 0x0670, 0x02A0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT18__ARM_TRACE15, 0x0670, 0x02A0, 7, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT19__IPU1_CSI0_DATA19, 0x0674, 0x02A4, 0, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT19__EIM_DATA15, 0x0674, 0x02A4, 1, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT19__UART5_CTS_B, 0x0674, 0x02A4, 3, 0x0000, 0, 0) +MX6_PAD_DECL(CSI0_DAT19__UART5_RTS_B, 0x0674, 0x02A4, 3, 0x093C, 3, 0) +MX6_PAD_DECL(CSI0_DAT19__GPIO6_IO05, 0x0674, 0x02A4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT7__SD3_DATA7, 0x0690, 0x02A8, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT7__UART1_TX_DATA, 0x0690, 0x02A8, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT7__UART1_RX_DATA, 0x0690, 0x02A8, 1, 0x0920, 2, 0) +MX6_PAD_DECL(SD3_DAT7__GPIO6_IO17, 0x0690, 0x02A8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT6__SD3_DATA6, 0x0694, 0x02AC, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT6__UART1_TX_DATA, 0x0694, 0x02AC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT6__UART1_RX_DATA, 0x0694, 0x02AC, 1, 0x0920, 3, 0) +MX6_PAD_DECL(SD3_DAT6__GPIO6_IO18, 0x0694, 0x02AC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT5__SD3_DATA5, 0x0698, 0x02B0, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT5__UART2_TX_DATA, 0x0698, 0x02B0, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT5__UART2_RX_DATA, 0x0698, 0x02B0, 1, 0x0928, 4, 0) +MX6_PAD_DECL(SD3_DAT5__GPIO7_IO00, 0x0698, 0x02B0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT4__SD3_DATA4, 0x069C, 0x02B4, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT4__UART2_TX_DATA, 0x069C, 0x02B4, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT4__UART2_RX_DATA, 0x069C, 0x02B4, 1, 0x0928, 5, 0) +MX6_PAD_DECL(SD3_DAT4__GPIO7_IO01, 0x069C, 0x02B4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_CMD__SD3_CMD, 0x06A0, 0x02B8, 16, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_CMD__UART2_CTS_B, 0x06A0, 0x02B8, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_CMD__UART2_RTS_B, 0x06A0, 0x02B8, 1, 0x0924, 2, 0) +MX6_PAD_DECL(SD3_CMD__FLEXCAN1_TX, 0x06A0, 0x02B8, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_CMD__GPIO7_IO02, 0x06A0, 0x02B8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_CLK__SD3_CLK, 0x06A4, 0x02BC, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_CLK__UART2_CTS_B, 0x06A4, 0x02BC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_CLK__UART2_RTS_B, 0x06A4, 0x02BC, 1, 0x0924, 3, 0) +MX6_PAD_DECL(SD3_CLK__FLEXCAN1_RX, 0x06A4, 0x02BC, 2, 0x07E4, 2, 0) +MX6_PAD_DECL(SD3_CLK__GPIO7_IO03, 0x06A4, 0x02BC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT0__SD3_DATA0, 0x06A8, 0x02C0, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT0__UART1_CTS_B, 0x06A8, 0x02C0, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT0__UART1_RTS_B, 0x06A8, 0x02C0, 1, 0x091C, 2, 0) +MX6_PAD_DECL(SD3_DAT0__FLEXCAN2_TX, 0x06A8, 0x02C0, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT0__GPIO7_IO04, 0x06A8, 0x02C0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT1__SD3_DATA1, 0x06AC, 0x02C4, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT1__UART1_CTS_B, 0x06AC, 0x02C4, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT1__UART1_RTS_B, 0x06AC, 0x02C4, 1, 0x091C, 3, 0) +MX6_PAD_DECL(SD3_DAT1__FLEXCAN2_RX, 0x06AC, 0x02C4, 2, 0x07E8, 1, 0) +MX6_PAD_DECL(SD3_DAT1__GPIO7_IO05, 0x06AC, 0x02C4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT2__SD3_DATA2, 0x06B0, 0x02C8, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT2__GPIO7_IO06, 0x06B0, 0x02C8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT3__SD3_DATA3, 0x06B4, 0x02CC, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT3__UART3_CTS_B, 0x06B4, 0x02CC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_DAT3__UART3_RTS_B, 0x06B4, 0x02CC, 1, 0x092C, 4, 0) +MX6_PAD_DECL(SD3_DAT3__GPIO7_IO07, 0x06B4, 0x02CC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_RST__SD3_RESET, 0x06B8, 0x02D0, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_RST__UART3_CTS_B, 0x06B8, 0x02D0, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD3_RST__UART3_RTS_B, 0x06B8, 0x02D0, 1, 0x092C, 5, 0) +MX6_PAD_DECL(SD3_RST__GPIO7_IO08, 0x06B8, 0x02D0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CLE__NAND_CLE, 0x06BC, 0x02D4, 0, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CLE__IPU2_SISG4, 0x06BC, 0x02D4, 1, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CLE__GPIO6_IO07, 0x06BC, 0x02D4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_ALE__NAND_ALE, 0x06C0, 0x02D8, 0, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_ALE__SD4_RESET, 0x06C0, 0x02D8, 1, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_ALE__GPIO6_IO08, 0x06C0, 0x02D8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_WP_B__NAND_WP_B, 0x06C4, 0x02DC, 0, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_WP_B__IPU2_SISG5, 0x06C4, 0x02DC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_WP_B__GPIO6_IO09, 0x06C4, 0x02DC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_RB0__NAND_READY_B, 0x06C8, 0x02E0, 0, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_RB0__IPU2_DI0_PIN01, 0x06C8, 0x02E0, 1, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_RB0__GPIO6_IO10, 0x06C8, 0x02E0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS0__NAND_CE0_B, 0x06CC, 0x02E4, 0, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS0__GPIO6_IO11, 0x06CC, 0x02E4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS1__NAND_CE1_B, 0x06D0, 0x02E8, 0, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS1__SD4_VSELECT, 0x06D0, 0x02E8, 1, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS1__SD3_VSELECT, 0x06D0, 0x02E8, 2, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS1__GPIO6_IO14, 0x06D0, 0x02E8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS2__NAND_CE2_B, 0x06D4, 0x02EC, 0, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS2__IPU1_SISG0, 0x06D4, 0x02EC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS2__ESAI_TX0, 0x06D4, 0x02EC, 2, 0x0874, 1, 0) +MX6_PAD_DECL(NANDF_CS2__EIM_CRE, 0x06D4, 0x02EC, 3, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS2__CCM_CLKO2, 0x06D4, 0x02EC, 4, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS2__GPIO6_IO15, 0x06D4, 0x02EC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS2__IPU2_SISG0, 0x06D4, 0x02EC, 6, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS3__NAND_CE3_B, 0x06D8, 0x02F0, 0, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS3__IPU1_SISG1, 0x06D8, 0x02F0, 1, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS3__ESAI_TX1, 0x06D8, 0x02F0, 2, 0x0878, 1, 0) +MX6_PAD_DECL(NANDF_CS3__EIM_ADDR26, 0x06D8, 0x02F0, 3, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS3__GPIO6_IO16, 0x06D8, 0x02F0, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_CS3__IPU2_SISG1, 0x06D8, 0x02F0, 6, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_CMD__SD4_CMD, 0x06DC, 0x02F4, 16, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_CMD__NAND_RE_B, 0x06DC, 0x02F4, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_CMD__UART3_TX_DATA, 0x06DC, 0x02F4, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_CMD__UART3_RX_DATA, 0x06DC, 0x02F4, 2, 0x0930, 2, 0) +MX6_PAD_DECL(SD4_CMD__GPIO7_IO09, 0x06DC, 0x02F4, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_CLK__SD4_CLK, 0x06E0, 0x02F8, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_CLK__NAND_WE_B, 0x06E0, 0x02F8, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_CLK__UART3_TX_DATA, 0x06E0, 0x02F8, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_CLK__UART3_RX_DATA, 0x06E0, 0x02F8, 2, 0x0930, 3, 0) +MX6_PAD_DECL(SD4_CLK__GPIO7_IO10, 0x06E0, 0x02F8, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D0__NAND_DATA00, 0x06E4, 0x02FC, 0, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D0__SD1_DATA4, 0x06E4, 0x02FC, 1, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D0__GPIO2_IO00, 0x06E4, 0x02FC, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D1__NAND_DATA01, 0x06E8, 0x0300, 0, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D1__SD1_DATA5, 0x06E8, 0x0300, 1, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D1__GPIO2_IO01, 0x06E8, 0x0300, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D2__NAND_DATA02, 0x06EC, 0x0304, 0, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D2__SD1_DATA6, 0x06EC, 0x0304, 1, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D2__GPIO2_IO02, 0x06EC, 0x0304, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D3__NAND_DATA03, 0x06F0, 0x0308, 0, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D3__SD1_DATA7, 0x06F0, 0x0308, 1, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D3__GPIO2_IO03, 0x06F0, 0x0308, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D4__NAND_DATA04, 0x06F4, 0x030C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D4__SD2_DATA4, 0x06F4, 0x030C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D4__GPIO2_IO04, 0x06F4, 0x030C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D5__NAND_DATA05, 0x06F8, 0x0310, 0, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D5__SD2_DATA5, 0x06F8, 0x0310, 1, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D5__GPIO2_IO05, 0x06F8, 0x0310, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D6__NAND_DATA06, 0x06FC, 0x0314, 0, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D6__SD2_DATA6, 0x06FC, 0x0314, 1, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D6__GPIO2_IO06, 0x06FC, 0x0314, 5, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D7__NAND_DATA07, 0x0700, 0x0318, 0, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D7__SD2_DATA7, 0x0700, 0x0318, 1, 0x0000, 0, 0) +MX6_PAD_DECL(NANDF_D7__GPIO2_IO07, 0x0700, 0x0318, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT0__SD4_DATA0, 0x0704, 0x031C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT0__NAND_DQS, 0x0704, 0x031C, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT0__GPIO2_IO08, 0x0704, 0x031C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT1__SD4_DATA1, 0x0708, 0x0320, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT1__PWM3_OUT, 0x0708, 0x0320, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT1__GPIO2_IO09, 0x0708, 0x0320, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT2__SD4_DATA2, 0x070C, 0x0324, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT2__PWM4_OUT, 0x070C, 0x0324, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT2__GPIO2_IO10, 0x070C, 0x0324, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT3__SD4_DATA3, 0x0710, 0x0328, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT3__GPIO2_IO11, 0x0710, 0x0328, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT4__SD4_DATA4, 0x0714, 0x032C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT4__UART2_TX_DATA, 0x0714, 0x032C, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT4__UART2_RX_DATA, 0x0714, 0x032C, 2, 0x0928, 6, 0) +MX6_PAD_DECL(SD4_DAT4__GPIO2_IO12, 0x0714, 0x032C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT5__SD4_DATA5, 0x0718, 0x0330, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT5__UART2_CTS_B, 0x0718, 0x0330, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT5__UART2_RTS_B, 0x0718, 0x0330, 2, 0x0924, 4, 0) +MX6_PAD_DECL(SD4_DAT5__GPIO2_IO13, 0x0718, 0x0330, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT6__SD4_DATA6, 0x071C, 0x0334, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT6__UART2_CTS_B, 0x071C, 0x0334, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT6__UART2_RTS_B, 0x071C, 0x0334, 2, 0x0924, 5, 0) +MX6_PAD_DECL(SD4_DAT6__GPIO2_IO14, 0x071C, 0x0334, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT7__SD4_DATA7, 0x0720, 0x0338, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT7__UART2_TX_DATA, 0x0720, 0x0338, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD4_DAT7__UART2_RX_DATA, 0x0720, 0x0338, 2, 0x0928, 7, 0) +MX6_PAD_DECL(SD4_DAT7__GPIO2_IO15, 0x0720, 0x0338, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT1__SD1_DATA1, 0x0724, 0x033C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT1__ECSPI5_SS0, 0x0724, 0x033C, 1, 0x0834, 1, 0) +MX6_PAD_DECL(SD1_DAT1__PWM3_OUT, 0x0724, 0x033C, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT1__GPT_CAPTURE2, 0x0724, 0x033C, 3, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT1__GPIO1_IO17, 0x0724, 0x033C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT0__SD1_DATA0, 0x0728, 0x0340, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT0__ECSPI5_MISO, 0x0728, 0x0340, 1, 0x082C, 1, 0) +MX6_PAD_DECL(SD1_DAT0__GPT_CAPTURE1, 0x0728, 0x0340, 3, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT0__GPIO1_IO16, 0x0728, 0x0340, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT3__SD1_DATA3, 0x072C, 0x0344, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT3__ECSPI5_SS2, 0x072C, 0x0344, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT3__GPT_COMPARE3, 0x072C, 0x0344, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT3__PWM1_OUT, 0x072C, 0x0344, 3, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT3__WDOG2_B, 0x072C, 0x0344, 4, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT3__GPIO1_IO21, 0x072C, 0x0344, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT3__WDOG2_RESET_B_DEB, 0x072C, 0x0344, 6, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_CMD__SD1_CMD, 0x0730, 0x0348, 16, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_CMD__ECSPI5_MOSI, 0x0730, 0x0348, 1, 0x0830, 0, 0) +MX6_PAD_DECL(SD1_CMD__PWM4_OUT, 0x0730, 0x0348, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_CMD__GPT_COMPARE1, 0x0730, 0x0348, 3, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_CMD__GPIO1_IO18, 0x0730, 0x0348, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT2__SD1_DATA2, 0x0734, 0x034C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT2__ECSPI5_SS1, 0x0734, 0x034C, 1, 0x0838, 1, 0) +MX6_PAD_DECL(SD1_DAT2__GPT_COMPARE2, 0x0734, 0x034C, 2, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT2__PWM2_OUT, 0x0734, 0x034C, 3, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT2__WDOG1_B, 0x0734, 0x034C, 4, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT2__GPIO1_IO19, 0x0734, 0x034C, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_DAT2__WDOG1_RESET_B_DEB, 0x0734, 0x034C, 6, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_CLK__SD1_CLK, 0x0738, 0x0350, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_CLK__ECSPI5_SCLK, 0x0738, 0x0350, 1, 0x0828, 0, 0) +MX6_PAD_DECL(SD1_CLK__GPT_CLKIN, 0x0738, 0x0350, 3, 0x0000, 0, 0) +MX6_PAD_DECL(SD1_CLK__GPIO1_IO20, 0x0738, 0x0350, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD2_CLK__SD2_CLK, 0x073C, 0x0354, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD2_CLK__ECSPI5_SCLK, 0x073C, 0x0354, 1, 0x0828, 1, 0) +MX6_PAD_DECL(SD2_CLK__KEY_COL5, 0x073C, 0x0354, 2, 0x08E8, 3, 0) +MX6_PAD_DECL(SD2_CLK__AUD4_RXFS, 0x073C, 0x0354, 3, 0x07C0, 1, 0) +MX6_PAD_DECL(SD2_CLK__GPIO1_IO10, 0x073C, 0x0354, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD2_CMD__SD2_CMD, 0x0740, 0x0358, 16, 0x0000, 0, 0) +MX6_PAD_DECL(SD2_CMD__ECSPI5_MOSI, 0x0740, 0x0358, 1, 0x0830, 1, 0) +MX6_PAD_DECL(SD2_CMD__KEY_ROW5, 0x0740, 0x0358, 2, 0x08F4, 2, 0) +MX6_PAD_DECL(SD2_CMD__AUD4_RXC, 0x0740, 0x0358, 3, 0x07BC, 1, 0) +MX6_PAD_DECL(SD2_CMD__GPIO1_IO11, 0x0740, 0x0358, 5, 0x0000, 0, 0) +MX6_PAD_DECL(SD2_DAT3__SD2_DATA3, 0x0744, 0x035C, 0, 0x0000, 0, 0) +MX6_PAD_DECL(SD2_DAT3__ECSPI5_SS3, 0x0744, 0x035C, 1, 0x0000, 0, 0) +MX6_PAD_DECL(SD2_DAT3__KEY_COL6, 0x0744, 0x035C, 2, 0x08EC, 2, 0) +MX6_PAD_DECL(SD2_DAT3__AUD4_TXC, 0x0744, 0x035C, 3, 0x07C4, 1, 0) +MX6_PAD_DECL(SD2_DAT3__GPIO1_IO12, 0x0744, 0x035C, 5, 0x0000, 0, 0) + +#endif /* __ASM_ARCH_MX6_MX6Q_PINS_H__ */ diff --git a/bsp/cpudrv/freescale/imx6q/src/hsmmc/s3c2416_hsmmc.c b/bsp/cpudrv/freescale/imx6q/src/hsmmc/s3c2416_hsmmc.c deleted file mode 100644 index 4bd27de88f58c365e643dc1ddec14f375f17231d..0000000000000000000000000000000000000000 --- a/bsp/cpudrv/freescale/imx6q/src/hsmmc/s3c2416_hsmmc.c +++ /dev/null @@ -1,1095 +0,0 @@ -#include -#include -#include -// -// 寄存器 -// -#define rHM1_BLKSIZE (*(volatile unsigned short*)0x4A800004) // Host buffer boundary and transfer block size register -#define rHM1_BLKCNT (*(volatile unsigned short*)0x4A800006) // Block count for current transfer -#define rHM1_ARGUMENT (*(volatile unsigned int*) 0x4A800008) // Command Argument -#define rHM1_TRNMOD (*(volatile unsigned short*)0x4A80000C) // Transfer Mode setting register -#define rHM1_CMDREG (*(volatile unsigned short*)0x4A80000E) // Command register -#define rHM1_RSPREG0 (*(volatile unsigned int*) 0x4A800010) // Response 0 -#define rHM1_RSPREG1 (*(volatile unsigned int*) 0x4A800014) // Response 1 -#define rHM1_RSPREG2 (*(volatile unsigned int*) 0x4A800018) // Response 2 -#define rHM1_RSPREG3 (*(volatile unsigned int*) 0x4A80001C) // Response 3 -#define rHM1_BDATA (*(volatile unsigned int*) 0x4A800020) // Buffer Data register -#define rHM1_PRNSTS (*(volatile unsigned int*) 0x4A800024) // Present state -#define rHM1_HOSTCTL (*(volatile unsigned char*) 0x4A800028) // Host control -#define rHM1_CLKCON (*(volatile unsigned short*)0x4A80002C) // Clock control -#define rHM1_SWRST (*(volatile unsigned char*) 0x4A80002F) // Software reset -#define rHM1_TIMEOUTCON (*(volatile unsigned char*) 0x4A80002E) // Time out control -#define rHM1_NORINTSTS (*(volatile unsigned short*)0x4A800030) // Normal interrupt status -#define rHM1_ERRINTSTS (*(volatile unsigned short*)0x4A800032) // Error interrupt status -#define rHM1_NORINTSTSEN (*(volatile unsigned short*)0x4A800034) // Normal interrupt status enable -#define rHM1_ERRINTSTSEN (*(volatile unsigned short*)0x4A800036) // Error interrupt status enable -#define rHM1_CONTROL2 (*(volatile unsigned int*) 0x4A800080) // Control 2 -#define rHM1_CONTROL3 (*(volatile unsigned int*) 0x4A800084) // Control 3 -#define rLOCKCON1 (*(volatile unsigned *) 0x4C000004) // EPLL lock time count -#define rEPLLCON (*(volatile unsigned *) 0x4C000018) // EPLL configuration -#define rCLKSRC (*(volatile unsigned *) 0x4C000020) // Clock source control -#define rCLKDIV1 (*(volatile unsigned *) 0x4C000028) // Clock divider ratio control -#define rSCLKCON (*(volatile unsigned *) 0x4C000038) // Special clock enable -#define rGPLCON (*(volatile unsigned *) 0x560000F0) -#define rGPHCON (*(volatile unsigned *) 0x56000070) -#define rMISCCR (*(volatile unsigned *) 0x56000080) - - -struct CardDescription Card; -s32 __IssueCommand_CH1( u16 Cmd, u32 Arg, u32 IsACmd); -s32 __WaitForTransferComplete_CH1(void); -void __ClockConfig_CH1(u32 ClkSrc, u32 Divisior, struct CardDescription Card); -s32 __IsCardInProgrammingState_CH1(struct CardDescription Card); -s32 S3c2416_HsmmcInit(u8 Channel); -s32 __WaitForCommandComplete_CH1(void); -s32 __WaitForBufferWriteReady_CH1(void); -s32 __WaitForBufferReadReady_CH1(void); -void __GetCSD_CH1(struct CardDescription *Card); -s32 __GetSCR_CH1(struct CardDescription *Card); -s32 __SetDataTransferWidth_CH1(struct CardDescription Card); -void __SetCommandReg_CH1(u16 Cmd,u32 IsACmd); -s32 __SetMMC_OCR_CH1(void); -s32 __SetSD_OCR_CH1(void); -void __SetSDSpeedMode_CH1(u32 SpeedMode); -void __SetMMCSpeedMode_CH1(u32 SpeedMode); -void __SetClock_CH1(u32 ClkSrc, u16 Divisor); -void __SetTransferModeReg_CH1(u32 MultiBlk, u32 DataDirection, u32 AutoCmd12En, u32 BlockCntEn, u32 DmaEn); -void __ClearCommandCompleteStatus_CH1(void); -void __ClearErrInterruptStatus_CH1(void); -void __ClearTransferCompleteStatus_CH1(void); -void __ClearBufferReadReadyStatus_CH1(void); -void __ClearBufferWriteReadyStatus_CH1(void); - - -//----------------------------------------------------------------------------- -//功能: HSMMC控制器初始化 -//参数: -//返回: 0 -- 成功; -//备注: -//----------------------------------------------------------------------------- -s32 S3c2416_HsmmcInit(u8 Channel) -{ - u32 Arg; - - if(1 != Channel) - return (-1);// 目前只支持SD1 - - rGPLCON = (rGPLCON & (~0xFFFFF)) | (0xAAAAA);// I/O配置 - - rHM1_SWRST = 0x3;// reset - rHM1_CLKCON &= (~(0x1<<2));// 关时钟 - rSCLKCON |= (1<<13);// - __SetClock_CH1(1, 0x40);//设置并开启时钟 - rHM1_TIMEOUTCON = 0xE;// 设置timeout - rHM1_HOSTCTL &= (~(0x1<<2));// Normal Speed(25M) - - rHM1_NORINTSTS = rHM1_NORINTSTS;// 清中断状态 - rHM1_ERRINTSTS = rHM1_ERRINTSTS; - rHM1_NORINTSTSEN = 0xFF;// 使能中断 - rHM1_ERRINTSTSEN = 0xFF; - - //将设备重置到Idle State - __IssueCommand_CH1(0, 0, 0); - Card.State = IDLE; - - //CM8判断是否为v2.0器件 - Arg = (0x1<<8) | (0xaa<<0); - if(__IssueCommand_CH1(8, Arg, 0)) - { - Card.SpecVer = V2; - } - - //设置OCR,工作电压 - if((V2 != Card.SpecVer) && (__SetMMC_OCR_CH1()))//判断是不是MMC - { - Card.Type = MMC; - printf("\r\nMMC card is detected\n"); - } - else - { - switch(__SetSD_OCR_CH1()) - { - case 1: Card.Type = SDSC; break; - case 2: Card.Type = SDHC; break; - default: return (-1); - } - printf("\r\n SD card is detected\n"); - } - - //读CID - __IssueCommand_CH1(2,0,0); - printf("\r\n Product Name : %c%c%c%c%c-v%d.%d",((rHM1_RSPREG2>>24)&0xFF), - ((rHM1_RSPREG2>>16)&0xFF), ((rHM1_RSPREG2>>8)&0xFF), (rHM1_RSPREG2&0xFF), - ((rHM1_RSPREG1>>24)&0xFF), ((rHM1_RSPREG1>>20)&0xF), ((rHM1_RSPREG1>>16)&0xF)); - Card.State = IDENT; - - //设置RCA - // Send RCA(Relative Card Address). It places the card in the STBY state - Card.RCA = (MMC == Card.Type) ? 0x0001 : 0x0000; - __IssueCommand_CH1(3, Card.RCA, 0); - if(MMC != Card.Type) - { - Card.RCA = (rHM1_RSPREG0 >> 16) & 0xFFFF; - printf("\r\n RCA = 0x%x\n", Card.RCA); - } - Card.State = STANDBY; - printf("\r\n Enter into the Stand-by State."); - - //读CSD - __GetCSD_CH1(&Card); - - //选择SD卡,进入transfer state - __IssueCommand_CH1(7, Card.RCA, 0); - Card.State = TRANSFER; - - //配置工作频率 - __GetSCR_CH1(&Card); - __ClockConfig_CH1(2, 8, Card); - - while (!__IsCardInProgrammingState_CH1(Card)); - - Card.BusWidth = 4; - while (!__SetDataTransferWidth_CH1(Card)); - - while (!__IsCardInProgrammingState_CH1(Card)); - - Card.BlkLenSettings = 9; - while(!__IssueCommand_CH1(16, (1<>8), rHM1_ERRINTSTS); - rHM1_ERRINTSTS = rHM1_ERRINTSTS; - rHM1_NORINTSTS = rHM1_NORINTSTS; - return 0; - } -} -//----------------------------------------------------------------------------- -//功能: 设置命令寄存器 -//参数: -//返回: 0 -- 成功; -//备注: -//----------------------------------------------------------------------------- -void __SetCommandReg_CH1(u16 Cmd,u32 IsACmd) -{ - u16 Sfr = 0; - - if (!IsACmd)//No ACMD - { - /* R2: 136-bits Resp.*/ - if ((Cmd==2) || (Cmd==9) || (Cmd==10)) - { - Sfr = (Cmd<<8) | (0<<4) | (1<<3) | (1<<0); - } - /* R1,R6,R5: 48-bits Resp. */ - else if ((Cmd==3) || (Cmd==8) || (Cmd==13) || (Cmd==16) || (Cmd==27) || - (Cmd==30) || (Cmd==32) || (Cmd==33) || (Cmd==35) || (Cmd==36) || - (Cmd==42) || (Cmd==55) || (Cmd==56)) - { - Sfr = (Cmd<<8) | (1<<4) | (1<<3) | (2<<0); - } - else if ((Cmd==11) || (Cmd==14) || (Cmd==17) || (Cmd==18) || (Cmd==19) || - (Cmd==20) || (Cmd==24) || (Cmd==25)) - { - Sfr = (Cmd<<8) | (1<<5) | (1<<4) | (1<<3) | (2<<0); - } - /* R1b,R5b: 48-bits Resp. */ - else if ((Cmd==6) || (Cmd==7) || (Cmd==12) || (Cmd==28) || (Cmd==29) || (Cmd==38)) - { - if (Cmd==12) - { - Sfr = (Cmd<<8) | (3<<6) | (1<<4) | (1<<3) | (3<<0); - } - else if (Cmd==6) - { - if((MMC !=Card.Type))// SD card - Sfr=(Cmd<<8)|(1<<5)|(1<<4)|(1<<3)|(2<<0); - else// MMC card - Sfr=(Cmd<<8)|(1<<4)|(1<<3)|(3<<0); - } - else - { - Sfr = (Cmd<<8) | (1<<4) | (1<<3) | (3<<0); - } - } - /* R3,R4: 48-bits Resp. */ - else if (Cmd==1) - { - Sfr = (Cmd<<8) | (0<<4) | (0<<3) | (2<<0); - } - /* No-Resp. */ - else - { - Sfr = (Cmd<<8) | (0<<4) | (0<<3) | (0<<0); - } - } - else// ACMD - { - if ((Cmd==6) || (Cmd==22) || (Cmd==23))// R1 - Sfr = (Cmd<<8) | (1<<4) | (1<<3) | (2<<0); - else if ((Cmd==13) || (Cmd==51)) - Sfr = (Cmd<<8) | (1<<5) | (1<<4) | (1<<3) | (2<<0); - else - Sfr = (Cmd<<8) | (0<<4) | (0<<3) | (2<<0); - } - rHM1_CMDREG = Sfr; -} -//----------------------------------------------------------------------------- -//功能: 等待命令完成 -//参数: -//返回: 1 -- 成功; 0 -- 失败; -//备注: -//----------------------------------------------------------------------------- -s32 __WaitForCommandComplete_CH1(void) -{ - u32 Loop = 0; - - while (!(rHM1_NORINTSTS & 0x1))//轮询方式 - { - if (((Loop % 500000) == 0) && (Loop>0)) - return (0);// 超时 - Loop++; - } - return (1); -} -//----------------------------------------------------------------------------- -//功能: 清命令完成中断位 -//参数: -//返回: 1 -- 成功; -//备注: -//----------------------------------------------------------------------------- -void __ClearCommandCompleteStatus_CH1(void) -{ - rHM1_NORINTSTS = (1<<0);// 清完成位 - while (rHM1_NORINTSTS & 0x1)// 查看是否清除 - rHM1_NORINTSTS = (1<<0); -} -//----------------------------------------------------------------------------- -//功能: 设置MMC的工作电压 -//参数: -//返回: 1 -- 成功; 0 -- 失败; -//备注: 未测试过 -//----------------------------------------------------------------------------- -s32 __SetMMC_OCR_CH1(void) -{ - u32 i, OCR; - - for (i=0; i<250; i++) - { - __IssueCommand_CH1(1, 0x0, 0); - OCR = rHM1_RSPREG0 | (1<<30); - __IssueCommand_CH1(1, OCR, 0);// (Ocr:2.7V~3.6V) - if (rHM1_RSPREG0 & (0x1<<31)) - { - if(rHM1_RSPREG0 & (1<<7)) - printf("\r\nVoltage range : 1.65V ~ 1.95V"); - else if(rHM1_RSPREG0 & (1<<18)) - printf("\r\nVoltage range: 2.7V ~ 3.1V\n"); - else if(rHM1_RSPREG0 & (1<<19)) - printf("\r\nVoltage range: 2.7V ~ 3.2V\n"); - else if(rHM1_RSPREG0 & (1<<20)) - printf("\r\nVoltage range: 2.7V ~ 3.3V\n"); - else if(rHM1_RSPREG0 & (1<<21)) - printf("\r\nVoltage range: 2.7V ~ 3.4V\n"); - - if(rHM1_RSPREG0 & (1<<30)) - { - printf("\r\nHigh Capacity Sector Mode Operation\n"); - } - - printf("\nrHM_RSPREG0 = %x\n", rHM1_RSPREG0); - return 1; - } - } - __ClearErrInterruptStatus_CH1(); - return 0; -} -//----------------------------------------------------------------------------- -//功能: 清错误中断位 -//参数: -//返回: 1 -- 成功; -//备注: -//----------------------------------------------------------------------------- -void __ClearErrInterruptStatus_CH1(void) -{ - while (rHM1_NORINTSTS & (0x1<<15)) - { - rHM1_NORINTSTS = rHM1_NORINTSTS; - rHM1_ERRINTSTS = rHM1_ERRINTSTS; - } -} -//----------------------------------------------------------------------------- -//功能: 设置SD的工作电压 -//参数: -//返回: 1 -- 成功, SDSC卡; 2 -- 成功, SDHC卡; 0 -- 失败; -//备注: -//----------------------------------------------------------------------------- -s32 __SetSD_OCR_CH1(void) -{ - u32 i; - s32 Ret = 0; - - for(i = 0; i < 250*10; i++) - { - __IssueCommand_CH1(55, 0x0000, 0); // CMD55 (For ACMD) - __IssueCommand_CH1(41, 0x40FF8000, 1); // (Ocr:2.7V~3.6V) - if (rHM1_RSPREG0 & (0x1<<31))// initialization complete - { - if(rHM1_RSPREG0 & (1<<7)) - printf("\r\nVoltage range : 1.65V ~ 1.95V"); - else if(rHM1_RSPREG0 & (1<<20)) - printf("\r\nVoltage range: 2.7V ~ 3.3V\n\n"); - else if(rHM1_RSPREG0 & (1<<21)) - printf("\r\nVoltage range: 2.7V ~ 3.4V\n\n"); - else if(rHM1_RSPREG0 & (1<<23)) - printf("\r\nVoltage range: 2.7V ~ 3.6V\n\n"); - - if(rHM1_RSPREG0 & (0x1<<30)) - { - printf("\r\nHigh Capacity Card\n"); - Ret = 2; - break; - } - - Ret = 1; - break; - } - //Delay(10); - } - // The current card is MMC card, then there's time out error, need to be cleared. - __ClearErrInterruptStatus_CH1(); - return (Ret); -} -//----------------------------------------------------------------------------- -//功能: 解析卡的CSD寄存器 -//参数: -//返回: 1 -- 成功; -//备注: -//----------------------------------------------------------------------------- -void __GetCSD_CH1(struct CardDescription *Card) -{ - u32 CardSize, OneBlockSize; - - __IssueCommand_CH1(9, Card->RCA, 0);// Send CSD命令 - - if((MMC == Card->Type)) - { -#if 0 - // todo: 为找到MMC手册 - Card->SpecVer = (rHM1_RSPREG3 >> 18) & 0xF; - printf("\r\n m_ucMMCSpecVer_ch1=%d\n", m_ucMMCSpecVer_ch1); - -#endif - } - else - { - printf("\r\n CSD version: %d", (rHM1_RSPREG3>>30) & 0xFF); - Card->TransSpeed = ((rHM1_RSPREG2>>24) & 0xFF); - } - - Card->ReadBlLen = (u8)((rHM1_RSPREG2 >> 8) & 0xf) ; - Card->ReadBlPartial = (u8)((rHM1_RSPREG2 >> 7) & 0x1) ; - Card->CSize = (u16)(((rHM1_RSPREG2 & 0x3) << 10) | ((rHM1_RSPREG1 >> 22) & 0x3ff)); - Card->CSizeMult = (u8)((rHM1_RSPREG1>>7) & 0x7); - Card->CapacityInBytes = (1 << Card->ReadBlLen) * (Card->CSize + 1) * (1 << (Card->CSizeMult + 2)); - - CardSize = Card->CapacityInBytes / 1048576;// 转为Mb - OneBlockSize = (1 << Card->ReadBlLen); - - printf("\r\n TRAN_SPEED: 0x%x", Card->TransSpeed); - printf("\r\n READ_BL_LEN: %d", Card->ReadBlLen); - printf("\r\n READ_BL_PARTIAL: %d", Card->ReadBlPartial); - printf("\r\n C_SIZE: %d", Card->CSize); - printf("\r\n C_SIZE_MULT: %d", Card->CSizeMult); - printf("\r\n One Block Size: %dByte", OneBlockSize); - printf("\r\n Total Card Size: %dMByte", (CardSize+1)); - -} -//----------------------------------------------------------------------------- -//功能: 设置时钟 -//参数: -//返回: 1 -- 成功; -//备注: -//----------------------------------------------------------------------------- -void __ClockConfig_CH1(u32 ClkSrc, u32 Divisior, struct CardDescription Card) -{ - u32 SrcFreq, WorkingFreq; - u32 HCLK = 133000000; - - rLOCKCON1 = 0x800; - rCLKSRC |= (1<<6);// EPLL Output - rEPLLCON = ((33<<16) | (1<<8) | (2)); - rEPLLCON &= (~(1<<24));// EPLL ON - rCLKDIV1 = (rCLKDIV1 & (~(0x3<<6))) | (0x0<<6); - rMISCCR = (rMISCCR & (~(0x7<<8))) | (1<<8); - rGPHCON = (rGPHCON & (~(0x3<<28))) | (1<<29);// - - if (ClkSrc == 1) - SrcFreq = HCLK; - else if (ClkSrc == 2)// Epll Out 48MHz - SrcFreq = 100000000; - else - ClkSrc = HCLK; - - if (Divisior != 0) - { - WorkingFreq = SrcFreq / (Divisior * 2); - printf("\r\n HCLK = %d, SD WorkingFreq = %dMHz", HCLK, WorkingFreq/(1000000)); - } - else - { - WorkingFreq = SrcFreq; - printf("\r\n WorkingFreq = %dMHz", WorkingFreq/(1000000)); - } - - if (MMC == Card.Type) - { - if(V4 == Card.SpecVer) - { - // It is necessary to enable the high speed mode in the card before - // changing the clock freq to a freq higher than 20MHz. - if (WorkingFreq > 20000000) - { - __SetMMCSpeedMode_CH1(1);// 高速 - printf("\r\n Set MMC High speed mode OK!!\n"); - } - else - { - __SetMMCSpeedMode_CH1(0);// 低速 - printf("\r\n Set MMC Normal speed mode OK!!\n"); - } - } - else // old version - printf("\r\n Old version MMC card can not support working frequency higher than 25MHz"); - } - else// SD卡 - { - if (Card.SpecVer > V1) - { - if (WorkingFreq > 25000000) - { - // Higher than 25MHz, should use high speed mode. Max 50MHz and 25MB/sec - __SetSDSpeedMode_CH1(1);// 高速 - printf("\r\n Set SD High speed mode OK!!"); - } - else - { - __SetSDSpeedMode_CH1(0);// 低速 - printf("\r\n Set SD Normal speed mode OK!!"); - } - } - else - printf("\r\n Old version SD card can not support working frequency higher than 25MHz"); - } - - // Higher than 25MHz, it is necessary to enable high speed mode of the host controller. - if (WorkingFreq > 25000000) - { - rHM1_HOSTCTL &= (~(0x1<<2)); - rHM1_HOSTCTL |= 1<<2; - } - else - { - rHM1_HOSTCTL &= (~(0x1<<2)); - } - - rHM1_CLKCON &= (~(0x1<<2)); // when change the sd clock frequency, need to stop sd clock. - - __SetClock_CH1(ClkSrc, Divisior); -} -//----------------------------------------------------------------------------- -//功能: 设置SD卡速度 -//参数: SpeedMode -- 1: 高速;0: 低速; -//返回: 1 -- 成功; -//备注: -//----------------------------------------------------------------------------- -void __SetSDSpeedMode_CH1(u32 SpeedMode) -{ - u32 Sfr; - u32 Arg = 0; - int i; - - if (!__IssueCommand_CH1(16, 64, 0)) // CMD16 - printf("\r\n CMD16 fail"); - else - { - rHM1_BLKSIZE = (7 << 12) | (64); - rHM1_BLKCNT = 1; - rHM1_ARGUMENT = 0; - __SetTransferModeReg_CH1(0, 1, 0, 0, 0); - - Arg = (0x1<<31) | (0xffff<<8) | (SpeedMode<<0); - if (!__IssueCommand_CH1(6, Arg, 0)) - printf("\r\n CMD6 fail"); - else - { - __WaitForBufferReadReady_CH1(); - __ClearBufferReadReadyStatus_CH1(); - - for(i=0; i<16; i++) - { - Sfr = rHM1_BDATA ; - } - - __WaitForTransferComplete_CH1(); - __ClearTransferCompleteStatus_CH1(); - } - } -} -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -void __SetTransferModeReg_CH1(u32 MultiBlk, u32 DataDirection, u32 AutoCmd12En, - u32 BlockCntEn, u32 DmaEn) -{ - rHM1_TRNMOD = (rHM1_TRNMOD & ~(0xffff)) | (MultiBlk<<5) | (DataDirection<<4) | - (AutoCmd12En<<2) | (BlockCntEn<<1) | (DmaEn<<0); -} - - - -//----------------------------------------------------------------------------- -//功能: 获取SCR寄存器 -//参数: -//返回: 1 -- 成功; 0 -- 失败; -//备注: todo:格式待确定 -//----------------------------------------------------------------------------- -s32 __GetSCR_CH1(struct CardDescription *Card) -{ - u32 SCR1, SCR2; - - if (!__IssueCommand_CH1(16, 8, 0)) - return 0;// 失败 - - rHM1_BLKSIZE = (7<<12) | (8); - rHM1_BLKCNT = 1; - rHM1_ARGUMENT = 0; - __SetTransferModeReg_CH1(0, 1, 0, 0, 0); - - if (!__IssueCommand_CH1(55, Card->RCA, 0))// CMD55 (For ACMD) - return 0; - - if (!__IssueCommand_CH1(51, 0, 1))// Acmd51 - return 0; - - __WaitForBufferReadReady_CH1(); - __ClearBufferReadReadyStatus_CH1(); - - SCR1 = rHM1_BDATA; - SCR2 = rHM1_BDATA; - - __WaitForTransferComplete_CH1(); - __ClearTransferCompleteStatus_CH1(); - - printf("\r\n SCR:[%x][%x]", SCR2, SCR1); - - if ((SCR1 & 0xf) == 0x0) - { - Card->SpecVer = V1; // Version 1.0 ~ 1.01 - printf("\r\n Card SpecVer: v1.0 ~ v1.01"); - } - else if ((SCR1 & 0xf) == 0x1) - { - Card->SpecVer = V1_1; // Version 1.10, support cmd6 - printf("\r\n Card SpecVer: v1.10"); - } - else if((SCR1 & 0xf) == 0x2) - { - Card->SpecVer = V2; // Version 2.0 support cmd6 and cmd8 - printf("\r\n Card SpecVer: v2.0"); - } - else - { - Card->SpecVer = UNKNOWN; - printf("\r\n Card SpecVer: unknown"); - } - - if(SCR1 & 0x100) - Card->DataStatusAfterErases = 1; - else - Card->DataStatusAfterErases = 0; - return 1; -} -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -void __SetClock_CH1(u32 ClkSrc, u16 Divisor) -{ - rHM1_CONTROL2 = (rHM1_CONTROL2 & ~(0xffffffff)) | (0x1<<15) | (0x1<<14) | - (0x1<<8) | (ClkSrc<<4); - rHM1_CONTROL3 = (1<<31) | (1<<23) | (1<<15) | (1<<7); - rHM1_CLKCON = (rHM1_CLKCON & ~((0xff<<8) | (0x1))) | (Divisor<<8) | (1<<0); - while (!(rHM1_CLKCON & 0x2));// 等待时钟稳定 - - rHM1_CLKCON |= (0x1<<2); - while(!(rHM1_CLKCON & (0x1<<3)));// 等待时钟稳定 -} -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -s32 __IsCardInProgrammingState_CH1(struct CardDescription Card) -{ - if (!__IssueCommand_CH1(13, Card.RCA, 0)) - { - printf("\r\nCard status = %x", ((rHM1_RSPREG0>>9) & 0xf)); - return 0; - } - else - { - if(((rHM1_RSPREG0>>9) & 0xf) == 4) - { - printf("\r\nCard is transfer status\n"); - return 1; - } - return 0; - } -} -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: -//备注: 未测试 -//----------------------------------------------------------------------------- -void __SetMMCSpeedMode_CH1(u32 SpeedMode) -{ - u32 Arg = 0; - - Arg = (3<<24) | (185<<16) | (SpeedMode<<8); // Change to the high-speed mode - - while(!__IssueCommand_CH1(6, Arg, 0)); -} -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -s32 __SetDataTransferWidth_CH1(struct CardDescription Card) -{ - u8 BitMode=0; - u32 Arg=0; - u8 HostCtrlVal = 0; - u32 BusWidth; - - switch (Card.BusWidth) - { - case 8: - BusWidth = (MMC == Card.Type) ? 8 : 4; - break; - case 4: - BusWidth = 4; - break; - case 1: - BusWidth = 1; - break; - default : - BusWidth = 4; - break; - } - - rHM1_NORINTSTSEN &= 0xFEFF; // 关闭状态中断 - - if(MMC != Card.Type)// SD Card Case - { - if (!__IssueCommand_CH1(55, Card.RCA, 0)) - return 0; - - if (Card.BusWidth == 1) - { - BitMode = 0; - if (!__IssueCommand_CH1(6, 0, 1)) // 1-bits - return 0; - } - else - { - BitMode = 1; - if (!__IssueCommand_CH1(6, 2, 1)) // 4-bits - return 0; - } - - } - else // MMC Card Case - { - if (V4 == Card.SpecVer) // It is for a newest MMC Card - { - if (BusWidth==1) - BitMode = 0; - else if (BusWidth==4) - BitMode = 1;//4 // 4-bit bus - else - BitMode = 2;//8-bit bus - - Arg = ((3<<24)|(183<<16)|(BitMode<<8)); - while(!__IssueCommand_CH1(6, Arg, 0)); - } - else - BitMode = 0; - } - - if (BitMode == 2) - { - HostCtrlVal &= 0xdf; - HostCtrlVal |= 1<<5; - } - else - { - HostCtrlVal &= 0xfd; - HostCtrlVal |= BitMode<<1; - } - - rHM1_HOSTCTL = HostCtrlVal; - rHM1_NORINTSTSEN |= (1 << 8);// 使能状态中断 - - return 1; -} -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -s32 __WaitForBufferWriteReady_CH1(void) -{ - u32 Loop = 0; - - while (!(rHM1_NORINTSTS & 0x10)) - { - if (((Loop % 500000) == 0) && Loop>0) - return 0; - Loop++; - } - return 1; -} -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -s32 __WaitForBufferReadReady_CH1(void) -{ - u32 Loop = 0; - - while (!(rHM1_NORINTSTS & 0x20)) - { - if (((Loop % 500000) == 0) && Loop>0) - return 0; - Loop++; - } - return 1; -} -//----------------------------------------------------------------------------- -//功能: 检查传输结束中断位 -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -s32 __WaitForTransferComplete_CH1(void) -{ - u32 Loop = 0; - - while (!(rHM1_NORINTSTS & 0x2)) - { - if (((Loop % (500000)) == 0) && (Loop > 0)) - { - u16 Test0 = rHM1_NORINTSTS; - u16 Test1 = rHM1_ERRINTSTS; - return 0; - } - Loop++; - } - return 1; -} -//----------------------------------------------------------------------------- -//功能: 清写缓冲中断位 -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -void __ClearBufferWriteReadyStatus_CH1(void) -{ - rHM1_NORINTSTS = (1<<4); - while (rHM1_NORINTSTS & 0x10) - rHM1_NORINTSTS = (1<<4); -} -//----------------------------------------------------------------------------- -//功能: 清读缓冲中断位 -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -void __ClearBufferReadReadyStatus_CH1(void) -{ - rHM1_NORINTSTS = (1<<5); - while (rHM1_NORINTSTS & 0x20) - rHM1_NORINTSTS = (1<<5); -} - - -//----------------------------------------------------------------------------- -//功能: 清传输中断位 -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -void __ClearTransferCompleteStatus_CH1(void) -{ - - rHM1_NORINTSTS = (1<<1); - while (rHM1_NORINTSTS & 0x2) - rHM1_NORINTSTS = (1<<1); -} - -//----------------------------------------------------------------------------- -//功能: 驱动测试 -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -void SDRawTest(void) -{ - - u32 i; - u32 *Buf = (u32*)malloc(512*4); - for(i = 0; i < 512; i++) - Buf[i] = i+2; - - //PrintBuf(Buf, 512*4); - S3c2416_HsmmcInit(1); - - S3c2416_BlkWrite(Buf, 1, 4); - - memset(Buf, 0, 512*4); - - S3c2416_BlkRead(Buf, 1, 4); - - PrintBuf(Buf, 512*4); - - S3c2416_BlkErase(1, 4); - - S3c2416_BlkRead(Buf, 1, 4); - - PrintBuf(Buf, 512*4); - -} diff --git a/bsp/cpudrv/freescale/imx6q/src/hsmmc/sdcard.c b/bsp/cpudrv/freescale/imx6q/src/hsmmc/sdcard.c deleted file mode 100644 index d1601330e9dd7acc704156bd86907d0bb87f6919..0000000000000000000000000000000000000000 --- a/bsp/cpudrv/freescale/imx6q/src/hsmmc/sdcard.c +++ /dev/null @@ -1,225 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "project_config.h" //本文件由IDE中配置界面生成，存放在APP的工程目录中。 - //允许是个空文件，所有配置将按默认值配置。 - -//@#$%component configure ****组件配置开始，用于 DIDE 中图形化配置界面 -//****配置块的语法和使用方法，参见源码根目录下的文件：component_config_readme.txt**** -//%$#@initcode ****初始化代码开始，由 DIDE 删除“//”后copy到初始化文件中 -// extern s32 ModuleInstall_SD(const char *targetfs,s32 doformat); -// ModuleInstall_SD(CFG_SDCARD_FSMOUNT_NAME,CFG_SDCARD_FORMAT); -//%$#@end initcode ****初始化代码结束 - -//%$#@describe ****组件描述开始 -//component name:"cpu onchip hsmmc"//CPU的hsmmc驱动 -//parent //填写该组件的父组件名字，none表示没有父组件 -//attribute:bsp //选填“third、system、bsp、user”，本属性用于在IDE中分组 -//select:choosable //选填“required、choosable、none”，若填必选且需要配置参数，则IDE裁剪界面中默认勾取， - //不可取消，必选且不需要配置参数的，或是不可选的，IDE裁剪界面中不显示， -//init time:medium //初始化时机，可选值：early，medium，later, pre-main。 - //表示初始化时间，分别是早期、中期、后期 -//dependence:"file system","heap","device file system"//该组件的依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件将强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//weakdependence:"none" //该组件的弱依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件不会被强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//mutex:"none" //该组件的互斥组件名（可以是none，表示无互斥组件）， - //如果与多个组件互斥，则依次列出，用“,”分隔 -//%$#@end describe ****组件描述结束 - -//%$#@configue ****参数配置开始 -#if ( CFG_MODULE_ENABLE_CPU_ONCHIP_HSMMC == false ) -//#warning " cpu_onchip_hsmmc 组件参数未配置，使用默认配置" -//%$#@target = header //header = 生成头文件,cmdline = 命令行变量，DJYOS自有模块禁用 -#define CFG_MODULE_ENABLE_CPU_ONCHIP_HSMMC false //如果勾选了本组件，将由DIDE在project_config.h或命令行中定义为true -//%$#@num,0,100, -//%$#@enum,true,false, -#define CFG_SDCARD_FORMAT false //是否需要器件格式化。 -//%$#@string,1,10, -#define CFG_SDCARD_FSMOUNT_NAME "fat" //需安装的文件系统的mount的名字 -//%$#select, ***从列出的选项中选择若干个定义成宏 -//%$#@free, -#endif -//%$#@end configue ****参数配置结束 -//@#$%component end configure - - -extern struct Object *s_ptDeviceRoot; -//----------------------------------------------------------------------------- -//功能: -//参数: -//输出: -//返回: -//----------------------------------------------------------------------------- -int MMC_disk_status(void) -{ - return (0); -} -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: -//备注: 可以将设备初始化放在这里; -//----------------------------------------------------------------------------- -int MMC_disk_initialize(void) -{ - static BYTE Done = 0; - - if(1 == Done) - return (0); - - Done = 1; - return (0); -} -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -int MMC_disk_read(BYTE *buff, DWORD sector, UINT count) -{ - u32 *Buf = (u32*)buff; - extern s32 S3c2416_BlkRead(const u32 *Buf, u32 BlkNo, u32 Count); - - if(S3c2416_BlkRead(Buf, sector, count)) - return (-1);// 失败 - - return (0);// 正确 -} -//----------------------------------------------------------------------------- -//功能: -//参数: buff -- 写入内容。 -// sector -- 目标页号。 -// count -- 页数量。 -//返回: 0 -- 正确;-1 -- 错误; -//备注: -//----------------------------------------------------------------------------- -int MMC_disk_write(BYTE *buff, DWORD sector, UINT count) -{ - - u32 *Buf = (u32*)buff; - extern s32 S3c2416_BlkWrite(const u32 *Buf, u32 BlkNo, u32 Count); - - if(S3c2416_BlkWrite(Buf, sector, count)) - return (-1);// 失败 - return (0);// 正确 -} -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -int MMC_ioctl( BYTE cmd, void *buff) -{ - - extern struct CardDescription Card; - switch(cmd) - { - case GET_SECTOR_SIZE: - *(DWORD *)(buff) = (1 << Card.BlkLenSettings);// - break; - case GET_SECTOR_COUNT: - *(DWORD*)(buff) = Card.CapacityInBytes >> Card.BlkLenSettings;// - break; - case GET_BLOCK_SIZE: - *(DWORD*)(buff) = 1;// todo - break; - default: - break; - } - return (RES_OK); -} - - -struct FatDrvFuns SDDrv = -{ - .DrvStatus = MMC_disk_status, - .DrvInitialize = MMC_disk_initialize, - .DrvRead = MMC_disk_read, - .DrvWrite = MMC_disk_write, - .DrvIoctl = MMC_ioctl -}; -extern struct CardDescription Card; -//----------------------------------------------------------------------------- -//功能: -//参数: targetfs -- 要挂载文件系统的mount点名字 -// Clean -- 器件格式化;"1"--是;"0"--否。 -//返回: "0" -- 成功; -// "-1" -- 输入参数错误; -// "-2" -- 内存不足; -// "-3" -- 操作失败; -//备注: todo：抽象一个sd管理结构体 -//----------------------------------------------------------------------------- -s32 ModuleInstall_SD(const char *targetfs,u8 doformat) -{ - s32 Ret; - const char *ChipName = "sdcard"; // 设备名; - char *FullPath,*notfind; - struct Object *targetobj; - struct FsCore *super; - - if(NULL == ChipName) - return (-1); - - Ret = S3c2416_HsmmcInit(1); - if(0 == Ret) - { - if(Device_Create(ChipName, NULL, NULL, NULL, NULL, NULL, ((ptu32_t)ChipName))) - { - if((false == doformat) || ((doformat) && - (0 != S3c2416_BlkErase(0, ((Card.CapacityInBytes >> Card.BlkLenSettings)-1))))) - { - printk("\r\nMODULE : INSTALL : \"%s\" format failed during initialization.\r\n", defaultName); - return (-3);// 失败 - } - - if(targetfs != NULL) - { - targetobj = OBJ_MatchPath(targetfs, ¬find); - if(notfind) - { - error_printf("SDCARD"," not found need to install file system.\r\n"); - return -1; - } - super = (struct FsCore *)OBJ_GetPrivate(targetobj); - super->MediaInfo = ChipName; - if(strcmp(super->pFsType->pType, "FAT") == 0) //这里的"FAT"为文件系统的类型名，在文件系统的filesystem结构中 - { - super->MediaDrv = &SDDrv; - } - else - { - super->MediaDrv = 0; - error_printf("SDCARD"," install file system type not FAT\r\n"); - return -1; - } - - FullPath = malloc(strlen(ChipName)+strlen(s_ptDeviceRoot->name)); //获取msc的完整路径 - sprintf(FullPath, "%s/%s", s_ptDeviceRoot->name,ChipName); - File_BeMedia(FullPath,targetfs); //在msc上挂载文件系统 - free(FullPath); - } - else - { - warning_printf("SDCARD", " No file system is installed\r\n"); - } - return (0); - } - - } - - return (-3);// 操作失败 -} diff --git a/bsp/cpudrv/freescale/imx6q/src/iic/cpu_peri_iic.c b/bsp/cpudrv/freescale/imx6q/src/iic/cpu_peri_iic.c deleted file mode 100644 index d5d529350c0204a06bb2eb2918a2bdc3d407ef86..0000000000000000000000000000000000000000 --- a/bsp/cpudrv/freescale/imx6q/src/iic/cpu_peri_iic.c +++ /dev/null @@ -1,519 +0,0 @@ -#include "board-config.h" -#include "cpu_peri.h" -#include "cpu_peri_iic.h" -#include "SysTime.h" -#include -#include "endian.h" -#include "iicbus.h" -#include "int.h" -#include "djyos.h" -#include "project_config.h" //本文件由IDE中配置界面生成，存放在APP的工程目录中。 - //允许是个空文件，所有配置将按默认值配置。 - -//@#$%component configure ****组件配置开始，用于 DIDE 中图形化配置界面 -//****配置块的语法和使用方法，参见源码根目录下的文件：component_config_readme.txt**** -//%$#@initcode ****初始化代码开始，由 DIDE 删除“//”后copy到初始化文件中 -// #if CFG_IIC0_ENABLE==1 -// extern bool_t ModuleInstall_IIC(u8 port); -// ModuleInstall_IIC(0); -// #endif -//%$#@end initcode ****初始化代码结束 - -//%$#@describe ****组件描述开始 -//component name:"cpu onchip iic"//CPU的iic总线驱动 -//parent:"iicbus" //填写该组件的父组件名字，none表示没有父组件 -//attribute:bsp //选填“third、system、bsp、user”，本属性用于在IDE中分组 -//select:choosable //选填“required、choosable、none”，若填必选且需要配置参数，则IDE裁剪界面中默认勾取， - //不可取消，必选且不需要配置参数的，或是不可选的，IDE裁剪界面中不显示， -//init time:medium //初始化时机，可选值：early，medium，later, pre-main。 - //表示初始化时间，分别是早期、中期、后期 -//dependence:"iicbus","int","lock"//该组件的依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件将强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//weakdependence:"none" //该组件的弱依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件不会被强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//mutex:"none" //该组件的互斥组件名（可以是none，表示无互斥组件）， - //如果与多个组件互斥，则依次列出，用“,”分隔 -//%$#@end describe ****组件描述结束 - -//%$#@configue ****参数配置开始 -#if ( CFG_MODULE_ENABLE_CPU_ONCHIP_IIC == false ) -//#warning " cpu_onchip_iic 组件参数未配置，使用默认配置" -//%$#@target = header //header = 生成头文件,cmdline = 命令行变量，DJYOS自有模块禁用 -#define CFG_MODULE_ENABLE_CPU_ONCHIP_IIC false //如果勾选了本组件，将由DIDE在project_config.h或命令行中定义为true -//%$#@num,16,512, -#define CFG_IIC0_BUF_LEN 128 //"IIC0缓冲区大小", -//%$#@enum,true,false, -#define CFG_IIC0_ENABLE false //"配置是否使用IIC0", -//%$#@string,1,10, -//%$#select, ***从列出的选项中选择若干个定义成宏 -//%$#@free, -#endif -//%$#@end configue ****参数配置结束 -//@#$%component end configure -//============================================================================== - -#define CN_IIC_TIMEOUT (1000 * mS) -#define CN_IIC_REGISTER_BADDR0 0x54000000 - -//中断中使用的数据类型结构体 -struct IIC_IntParamSet -{ - struct SemaphoreLCB *pDrvPostSemp; //信号量 - u32 TransCount; //传输数据量计数器 - u32 TransTotalLen; -}; - -//定义静态变量 -static struct IIC_CB *s_ptIIC0_CB; -//#define CFG_IIC0_BUF_LEN 128 -static u8 s_IIC0Buf[CFG_IIC0_BUF_LEN]; -static struct IIC_IntParamSet IntParamset0; - -// ============================================================================= -// 功能: 使能iic中断,接收与发送共用一个中断源。 -// 参数: reg,被操作的寄存器组指针 -// IntSrc,中断源 -// 返回: 无 -// ============================================================================= -static void __IIC_IntDisable(volatile tagI2CReg *reg) -{ - reg->IICCON &= ~IICCON_INT_MASK; -} - -// ============================================================================= -// 功能: 禁止iic中断 -// 参数: reg,被操作的寄存器组指针 -// IntSrc,操作的中断源 -// 返回: 无 -// ============================================================================= -static void __IIC_IntEnable(volatile tagI2CReg *reg) -{ - reg->IICCON |= IICCON_INT_MASK; -} - -static void __IIC_IntPendingBitClear(volatile tagI2CReg *reg) -{ - reg->IICCON &= ~(IICCON_INTPENDINGFLAG_MASK); -} - -// ============================================================================= -// 功能: 禁止iic中断,接收与发送共用一个中断源。 -// 参数: reg,被操作的寄存器组指针 -// 返回: 无 -// ============================================================================= -static void __IIC_GenerateStop(volatile tagI2CReg *reg) -{ - u32 timeout = CN_IIC_TIMEOUT; - if((reg->IICSTAT & IICSTAT_MS(3)) == IICSTAT_MS_MT_MODE) - reg->IICSTAT = 0xD0; - else if((reg->IICSTAT & IICSTAT_MS(3)) == IICSTAT_MS_MR_MODE) - reg->IICSTAT = 0x90; - - while((reg->IICSTAT & IICSTAT_BSY_MASK) && (timeout > 0)) - { - DJY_EventDelay(100); - timeout -= 100; - } -} - -// ============================================================================= -// 功能：IIC时钟配置函数，时钟来源为MCK，计算方法可参考技术手册 -// 参数：reg，设备句柄 -// iicclk，欲配置的时钟速度，标准的时钟如50KHz,100KHz,200KHz -// 返回：true=成功，false=失败 -// ============================================================================= -static void __IIC_SetClk(volatile tagI2CReg *reg,u32 iicclk) -{ - u32 BaseClk = CN_CFG_PCLK/256,temp; - - if(iicclk < BaseClk) //大于100K - { - reg->IICCON |= IICCON_IICLK_MASK; //IICCLK = CN_CFG_PCLK/16 - temp = (BaseClk/iicclk) - 1; - if(temp < 16) - { - reg->IICCON &= ~ (0xF << IICCON_TXCLK_OFFSET); - reg->IICCON |= IICCON_TXCLK(temp); - } - } -} - - -// ============================================================================= -// 功能：IIC引脚初始化，初始化为外设使用 -// 参数：iic_no,IIC控制器号 -// 返回：无 -// ============================================================================= -static void __IIC_GpioInit(void) -{ - u32 temp; - temp = pg_gpio_reg->GPECON; - temp &= ~(0x0F << 28); - temp |= (0x0A << 28); //配置IO口为SDA和SCL - pg_gpio_reg->GPECON = temp; - //pg_gpio_reg->GPHUP -} - -// ============================================================================= -// 功能: IIC默认硬件初始化配置，主要是时钟配置和GPIO写保护引脚配置 -// 参数: RegBaseAddr,寄存器基址 -// iicno,IIC控制器号 -// 返回: 无 -// ============================================================================= -static void __IIC_HardConfig(ptu32_t RegBaseAddr,u8 iicno) -{ - volatile tagI2CReg *reg; - reg = (volatile tagI2CReg *)RegBaseAddr; - - __IIC_GpioInit(); - - __IIC_SetClk(reg,CN_IIC_CLK_100K); - -} - -// ============================================================================= -// 功能: IIC中断配置函数 -// 参数: IntLine,中断线 -// ISR,中断服务函数指针 -// 返回: 无 -// ============================================================================= -static void __IIC_IntConfig(u32 IntLine,u32 (*ISR)(ptu32_t)) -{ - //中断线的初始化 - Int_Register(IntLine); - Int_IsrConnect(IntLine,ISR); - Int_SettoAsynSignal(IntLine); - Int_ClearLine(IntLine); //清掉初始化产生的发送fifo空的中断 - Int_RestoreAsynLine(IntLine); -} - -// ============================================================================= -// 功能：查询是否接收到ACK信号（2440是查询中断标志） -// 参数：寄存器基址指针 -// 返回：true,成功;false,失败 -// ============================================================================= -static bool_t __IIC_AckReceived(volatile tagI2CReg *Reg) -{ - u32 timeout = CN_IIC_TIMEOUT; -// while(Reg->IICSTAT & IICSTAT_ACK_MASK); //判断ACK -// while(!(Reg->IICCON & IICCON_INTPENDINGFLAG_MASK)); - - while((!(Reg->IICCON & IICCON_INTPENDINGFLAG_MASK)) && (timeout > 0)) - { - DJY_DelayUs(1); - timeout -=1; - } - if(timeout == 0) - { - return false; - } - return true; -} - -// ============================================================================= -// 功能: 启动写时序，启动写时序的过程为：器件地址（写）、存储地址（写），当存储地址完 -// 成时，需打开中断，重新配置寄存器为接收模式，之后将会发生发送中断，在中断服务 -// 函数中，每次发送一定的字节数，直到len数据量，post信号量iic_bus_semp，并产生 -// 停止时序 -// 参数: specific_flag,个性标记，本模块内即IIC寄存器基址 -// dev_addr,器件地址的前7比特，最后的三个比特位已经更新，该函数内部需将该地址左 -// 移一位，并修改最后的读写比特位，最后一比特写0，表示写，最后一比特写 -// 1,表示读; -// mem_addr,存储器内部地址,该函数需发送低maddr_len字节到总线 -// maddr_len,存储器内部地址的长度，字节单位； -// length,发送的数据总量，接收数据的倒数第一字节，即count-1，停止产生ACK信号， -// 当接收的字节数为count时，产生停止时序，并释放信号量iic_semp; -// iic_semp,发送完成时驱动需释放的信号量。发送程序读IIC_PortRead时，若读不到数 -// 则需释放该信号量，产生结束时序 -// 返回: TRUE，启动读时序成功，FALSE失败 -// ============================================================================= -static bool_t __IIC_GenerateWriteStart(volatile tagI2CReg *Reg, - u8 dev_addr, - u32 mem_addr, - u8 maddr_len, - u32 length, - struct SemaphoreLCB *iic_semp) -{ - struct IIC_IntParamSet *IntParam; - u8 i;u32 timeout = CN_IIC_TIMEOUT; - - if((u32)Reg != CN_IIC_REGISTER_BADDR0) - return false; - - IntParam = &IntParamset0; - IntParam->TransTotalLen = length; - IntParam->TransCount = 0; - IntParam->pDrvPostSemp = iic_semp; - - //关中断 - Int_CutLine(CN_INT_LINE_IIC0); - __IIC_IntEnable(Reg); - - while((Reg->IICSTAT & IICSTAT_BSY_MASK) &&(timeout > 0)) //check if busy - { - DJY_EventDelay(100); - timeout -= 100; - } - if(timeout == 0) - { - return false; - } - Reg->IICCON |= IICCON_ACKEN_MASK; - Reg->IICSTAT = IICSTAT_MS_MT_MODE | IICSTAT_TXRXEN_MASK; //配置为发送主模式 - Reg->IICDS = (dev_addr<IICSTAT |= IICSTAT_START_STOP_MASK; //启动发送 - if(! __IIC_AckReceived(Reg)) - { - __IIC_GenerateStop(Reg); - return false; - } - - for(i = 0; i < maddr_len; i ++) - { - Reg->IICDS = (u8) (mem_addr >> ((maddr_len - i - 1) *8)); - __IIC_IntPendingBitClear(Reg); - if(! __IIC_AckReceived(Reg)) - { - __IIC_GenerateStop(Reg); - return false; - } - } - Int_ContactLine(CN_INT_LINE_IIC0); - return true; -} - -// ============================================================================= -// 功能: 启动读时序，启动读时序的过程为：器件地址（写）、存储地址（写）、器件地址（读） -// 当器件地址（读）完成时，需打开中断，重新配置寄存器为接收模式，之后将会发生 -// 接收数据中断，在中断中将接收到的数据调用IIC_PortWrite写入缓冲，接收到len字 -// 节数的数据后，释放信号量iic_semp -// 参数: specific_flag,个性标记，本模块内即IIC寄存器基址 -// dev_addr,器件地址的前7比特，最后的三个比特位已经更新，该函数内部需将该地址左 -// 移一位，并修改最后的读写比特位，最后一比特写0，表示写，最后一比特写 -// 1,表示读; -// mem_addr,存储器内部地址,该函数需发送低maddr_len字节到总线 -// maddr_len,存储器内部地址的长度，字节单位； -// len,接收的数据总量，接收数据的倒数第一字节，即count-1，停止产生ACK信号，当接 -// 收的字节数为count时，产生停止时序，并释放信号量iic_semp; -// iic_semp,读完成时，驱动需释放的信号量（缓冲区信号量） -// 返回: TRUE，启动读时序成功，FALSE失败 -// ============================================================================= -static bool_t __IIC_GenerateReadStart( volatile tagI2CReg *Reg, - u8 dev_addr, - u32 mem_addr, - u8 maddr_len, - u32 length, - struct SemaphoreLCB *iic_semp) -{ - struct IIC_IntParamSet *IntParam; - u32 i,temp,timeout = CN_IIC_TIMEOUT; - - if((u32)Reg != CN_IIC_REGISTER_BADDR0) - return false; - - IntParam = &IntParamset0; - IntParam->TransTotalLen = length; - IntParam->TransCount = 0; - IntParam->pDrvPostSemp = iic_semp; - - //说明：此芯片IIC控制器，先将数据填入到CDS，启动发送便发送数据 - Int_CutLine(CN_INT_LINE_IIC0); - __IIC_IntEnable(Reg); //此芯片必须开中断，才能判断是否发送接收完 - - while((Reg->IICSTAT & IICSTAT_BSY_MASK) &&(timeout > 0)) //check if busy - { - DJY_EventDelay(100); - timeout -= 100; - } - if(timeout == 0) - { - return false; - } - Reg->IICCON |= IICCON_ACKEN_MASK; //此芯片必须开ACKEN位，否则会出问题 - Reg->IICSTAT = IICSTAT_MS_MT_MODE | IICSTAT_TXRXEN_MASK; //发送主模式 - Reg->IICDS = (dev_addr<IICSTAT |= IICSTAT_START_STOP_MASK; //启动发送 - if(! __IIC_AckReceived(Reg)) - { - __IIC_GenerateStop(Reg); - return false; - } - - __IIC_IntPendingBitClear(Reg); - for(i = 0; i < maddr_len; i ++) - { - Reg->IICDS = (u8) (mem_addr >> ((maddr_len - i - 1) *8)); -// __IIC_IntPendingBitClear(Reg); - if(! __IIC_AckReceived(Reg)) - { - __IIC_GenerateStop(Reg); - return false; - } - } - //产生Restart - Reg->IICDS = (dev_addr<IICSTAT = IICSTAT_MS_MR_MODE | IICSTAT_TXRXEN_MASK - | IICSTAT_START_STOP_MASK; //配置为发送主模式 - __IIC_IntPendingBitClear(Reg); - if(! __IIC_AckReceived(Reg)) - { - __IIC_GenerateStop(Reg); - return false; - } - -// temp = Reg->IICSTAT; //此处不可省，相当于清状态 - temp = Reg->IICDS; - temp = Reg->IICCON; - temp = Reg->IICSTAT; - __IIC_IntPendingBitClear(Reg); - Int_ContactLine(CN_INT_LINE_IIC0); - - return true; -} - -// ============================================================================= -// 功能: 结束本次读写回调函数，区分读写的不同停止时序，当属于发送时，则直接停止时序， -// 若为读，则先停止回复ACK，再停止 -// 参数: specific_flag,个性标记，本模块内即IIC寄存器基址 -// 返回: 无 -// ============================================================================= -static void __IIC_GenerateEnd(volatile tagI2CReg *Reg) -{ - if((u32)Reg != CN_IIC_REGISTER_BADDR0) - return; - - __IIC_IntDisable(Reg); - DJY_EventDelay(100); - __IIC_GenerateStop(Reg); -} - -// ============================================================================= -// 功能：IIC总线控制回调函数，被上层调用，目前只实现对IIC时钟频率配置 -// 参数：specific_flag,个性标记，本模块内即IIC寄存器基址 -// cmd,命令 -// data1,data2,数据，与具体命令相关 -// 返回：无 -// ============================================================================= -static s32 __IIC_BusCtrl(volatile tagI2CReg *Reg,u32 cmd,u32 data1,u32 data2) -{ - if((u32)Reg != CN_IIC_REGISTER_BADDR0) - return 0; - - switch(cmd) - { - case CN_IIC_SET_CLK: - __IIC_SetClk(Reg,data1); - break; - default: - break; - } - return 1; -} - -// ============================================================================= -// 功能：IIC接收与发送中断服务函数。该函数实现的功能如下： -// 1.每发送与接收一个或若干字节发生一次中断； -// 2.若有多个中断使用同一个中断号，则需根据具体情况区分使用的是哪个中断； -// 3.清中断标志，并判断ACK信号，每读写字节，计数器都需相应修改； -// 4.接收达到倒数第一个字节时，需配置不发送ACK信号； -// 5.接收或发送完成时，需post信号量IntParam->pDrvPostSemp； -// 6.接收或发送完成时，需产生停止时序。 -// 参数：i2c_int_line,中断号，本函数没用到 -// 返回：无意义 -// ============================================================================= -static u32 __IIC_ISR(ufast_t IntLine) -{ - static struct IIC_CB *ICB; - static struct IIC_IntParamSet *IntParam; - tagI2CReg *reg; - - u8 ch; - if(IntLine != CN_INT_LINE_IIC0) - return 0; - ICB = s_ptIIC0_CB; - IntParam = &IntParamset0; - reg = (tagI2CReg *)CN_IIC_REGISTER_BADDR0; - - if(reg->IICCON & IICCON_INTPENDINGFLAG_MASK) //是否有中断标志 - { - if((reg->IICSTAT & IICSTAT_MS_MT_MODE) == IICSTAT_MS_MT_MODE)//发送 - { - if(!(reg->IICSTAT & IICSTAT_ACK_MASK)) //是否收到ACK信号 - { - if(IIC_PortRead(ICB,&ch,1)) - { - reg->IICDS = ch; - IntParam->TransCount ++; - } - else if(IntParam->TransCount == IntParam->TransTotalLen) - { - __IIC_IntDisable(reg); - __IIC_IntPendingBitClear(reg); - __IIC_GenerateStop(reg); - Lock_SempPost(IntParam->pDrvPostSemp); - } - } - } - else if((reg->IICSTAT & IICSTAT_MS_MR_MODE) == IICSTAT_MS_MR_MODE) - { - ch = reg->IICDS; - if(IIC_PortWrite(ICB,&ch,1)) - IntParam->TransCount ++; - if(IntParam->TransCount == IntParam->TransTotalLen - 1) - { - reg->IICCON &= ~(IICCON_ACKEN_MASK); //倒数第二个数，不发ACK - } - else if(IntParam->TransCount == IntParam->TransTotalLen) - { - __IIC_IntPendingBitClear(reg); - __IIC_IntDisable(reg); - __IIC_GenerateStop(reg); - Lock_SempPost(IntParam->pDrvPostSemp); - } - } - } - else - { - //.... - } - __IIC_IntPendingBitClear(reg); - return 0; -} - -// ============================================================================= -// 功能：IIC底层驱动的初始化，完成整个IIC总线的初始化，其主要工作如下： -// 1.初始化总线控制块IIC_CB，回调函数和缓冲区的初始化赋值； -// 2.默认的硬件初始化，如GPIO或IIC寄存器等； -// 3.中断初始化，完成读写中断配置； -// 4.调用IICBusAdd或IICBusAdd_r增加总线结点； -// 参数：para,无具体意义 -// 返回：无 -// ============================================================================= -bool_t ModuleInstall_IIC(u8 port) -{ - struct IIC_Param IIC0_Config; - - IIC0_Config.BusName = "IIC0"; - IIC0_Config.IICBuf = (u8*)&s_IIC0Buf; - IIC0_Config.IICBufLen = CFG_IIC0_BUF_LEN; - IIC0_Config.SpecificFlag = CN_IIC_REGISTER_BADDR0; - IIC0_Config.pWriteReadPoll = NULL; - IIC0_Config.pGenerateWriteStart = (WriteStartFunc)__IIC_GenerateWriteStart; - IIC0_Config.pGenerateReadStart = (ReadStartFunc)__IIC_GenerateReadStart; - IIC0_Config.pGenerateEnd = (GenerateEndFunc)__IIC_GenerateEnd; - IIC0_Config.pBusCtrl = (IICBusCtrlFunc)__IIC_BusCtrl; - - __IIC_HardConfig(CN_IIC_REGISTER_BADDR0,0); - __IIC_IntConfig(CN_INT_LINE_IIC0,__IIC_ISR); - - if(s_ptIIC0_CB = IIC_BusAdd(&IIC0_Config)) - return 1; - else - return 0; -} - diff --git a/bsp/cpudrv/freescale/imx6q/src/iomux/iomux-v3.c b/bsp/cpudrv/freescale/imx6q/src/iomux/iomux-v3.c new file mode 100644 index 0000000000000000000000000000000000000000..b9c853a0ea93b42c221952c1263db4ab69c7f0ce --- /dev/null +++ b/bsp/cpudrv/freescale/imx6q/src/iomux/iomux-v3.c @@ -0,0 +1,172 @@ +#define CONFIG_MX6Q +#define CONFIG_MX6 +/* + * Based on the iomux-v3.c from Linux kernel: + * Copyright (C) 2008 by Sascha Hauer + * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH, + * + * + * Copyright (C) 2004-2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#if 0 +#include +#include +#include +#if !defined(CONFIG_MX25) && !defined(CONFIG_VF610) +#include +#endif +#include +#endif + + +#include "iomux-v3.h" + +/* imx-regs.h */ +#ifndef IOMUXC_BASE_ADDR +#define IOMUXC_BASE_ADDR 0x020E0000 +#endif + +static void *base = (void *)IOMUXC_BASE_ADDR; + +/* io.h */ + +/* + * Generic virtual read/write. Note that we don't support half-word + * read/writes. We define __arch_*[bl] here, and leave __arch_*w + * to the architecture specific code. + */ +#define __arch_getb(a) (*(volatile unsigned char *)(a)) +#define __arch_getw(a) (*(volatile unsigned short *)(a)) +#define __arch_getl(a) (*(volatile unsigned int *)(a)) +#define __arch_getq(a) (*(volatile unsigned long long *)(a)) + +#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) +#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) +#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) +#define __arch_putq(v,a) (*(volatile unsigned long long *)(a) = (v)) + + +#define __raw_writeb(v,a) __arch_putb(v,a) +#define __raw_writew(v,a) __arch_putw(v,a) +#define __raw_writel(v,a) __arch_putl(v,a) +#define __raw_writeq(v,a) __arch_putq(v,a) + +#define __raw_readb(a) __arch_getb(a) +#define __raw_readw(a) __arch_getw(a) +#define __raw_readl(a) __arch_getl(a) +#define __raw_readq(a) __arch_getq(a) + + /* + * TODO: The kernel offers some more advanced versions of barriers, it might + * have some advantages to use them instead of the simple one here. + */ +#define mb() asm volatile("dsb sy" : : : "memory") +#define dmb() __asm__ __volatile__ ("" : : : "memory") +#define __iormb() dmb() +#define __iowmb() dmb() + +#define writeb(v,c) ({ u8 __v = v; __iowmb(); __arch_putb(__v,c); __v; }) +#define writew(v,c) ({ u16 __v = v; __iowmb(); __arch_putw(__v,c); __v; }) +#define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; }) +#define writeq(v,c) ({ u64 __v = v; __iowmb(); __arch_putq(__v,c); __v; }) + +#define readb(c) ({ u8 __v = __arch_getb(c); __iormb(); __v; }) +#define readw(c) ({ u16 __v = __arch_getw(c); __iormb(); __v; }) +#define readl(c) ({ u32 __v = __arch_getl(c); __iormb(); __v; }) +#define readq(c) ({ u64 __v = __arch_getq(c); __iormb(); __v; }) + + + +/* + * configures a single pad in the iomuxer + */ +void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad) +{ + u32 mux_ctrl_ofs = (pad & MUX_CTRL_OFS_MASK) >> MUX_CTRL_OFS_SHIFT; + u32 mux_mode = (pad & MUX_MODE_MASK) >> MUX_MODE_SHIFT; + u32 sel_input_ofs = + (pad & MUX_SEL_INPUT_OFS_MASK) >> MUX_SEL_INPUT_OFS_SHIFT; + u32 sel_input = + (pad & MUX_SEL_INPUT_MASK) >> MUX_SEL_INPUT_SHIFT; + u32 pad_ctrl_ofs = + (pad & MUX_PAD_CTRL_OFS_MASK) >> MUX_PAD_CTRL_OFS_SHIFT; + u32 pad_ctrl = (pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT; + +#if defined CONFIG_MX6SL + /* Check whether LVE bit needs to be set */ + if (pad_ctrl & PAD_CTL_LVE) { + pad_ctrl &= ~PAD_CTL_LVE; + pad_ctrl |= PAD_CTL_LVE_BIT; + } +#endif + +#ifdef CONFIG_IOMUX_LPSR + u32 lpsr = (pad & MUX_MODE_LPSR) >> MUX_MODE_SHIFT; + + if (lpsr == IOMUX_CONFIG_LPSR) { + base = (void *)IOMUXC_LPSR_BASE_ADDR; + mux_mode &= ~IOMUX_CONFIG_LPSR; + /* set daisy chain sel_input */ + if (sel_input_ofs) + sel_input_ofs += IOMUX_LPSR_SEL_INPUT_OFS; + } +#endif + + __raw_writel(mux_mode, base + mux_ctrl_ofs); + + if (sel_input_ofs) + __raw_writel(sel_input, base + sel_input_ofs); + +#ifdef CONFIG_IOMUX_SHARE_CONF_REG + if (!(pad_ctrl & NO_PAD_CTRL)) + __raw_writel((mux_mode << PAD_MUX_MODE_SHIFT) | pad_ctrl, + base + pad_ctrl_ofs); +#else + if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs) + __raw_writel(pad_ctrl, base + pad_ctrl_ofs); +#endif + +#ifdef CONFIG_IOMUX_LPSR + if (lpsr == IOMUX_CONFIG_LPSR) + base = (void *)IOMUXC_BASE_ADDR; +#endif + +} + +/* configures a list of pads within declared with IOMUX_PADS macro */ +void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list, + unsigned count) +{ + iomux_v3_cfg_t const *p = pad_list; + int stride; + int i; + +#if defined(CONFIG_MX6QDL) + stride = 2; + if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D)) + p += 1; +#else + stride = 1; +#endif + for (i = 0; i < count; i++) { + imx_iomux_v3_setup_pad(*p); + p += stride; + } +} + +void imx_iomux_set_gpr_register(int group, int start_bit, + int num_bits, int value) +{ + int i = 0; + u32 reg; + reg = readl(base + group * 4); + while (num_bits) { + reg &= ~(1<<(start_bit + i)); + i++; + num_bits--; + } + reg |= (value << start_bit); + writel(reg, base + group * 4); +} diff --git a/bsp/cpudrv/freescale/imx6q/src/lcd/cpu_peri_lcd.c b/bsp/cpudrv/freescale/imx6q/src/lcd/cpu_peri_lcd.c deleted file mode 100644 index 9cb0b730e63f5ac975698b0aee422910e4570bbd..0000000000000000000000000000000000000000 --- a/bsp/cpudrv/freescale/imx6q/src/lcd/cpu_peri_lcd.c +++ /dev/null @@ -1,704 +0,0 @@ -#include "stdint.h" -#include "stdlib.h" -#include "stddef.h" -#include "string.h" - -#include "board-config.h" -#include "gkernel.h" -#include -#include "cpu_peri.h" - -#include "project_config.h" //本文件由IDE中配置界面生成，存放在APP的工程目录中。 - //允许是个空文件，所有配置将按默认值配置。 - -//@#$%component configure ****组件配置开始，用于 DIDE 中图形化配置界面 -//****配置块的语法和使用方法，参见源码根目录下的文件：component_config_readme.txt**** -//%$#@initcode ****初始化代码开始，由 DIDE 删除“//”后copy到初始化文件中 -// extern struct DisplayRsc* ModuleInstall_LCD(const char *DisplayName,const char* HeapName); -// ModuleInstall_LCD(CFG_LCD_DISP_NAME,CFG_LCD_HEAP_NAME); -//%$#@end initcode ****初始化代码结束 - -//%$#@describe ****组件描述开始 -//component name:"cpu onchip lcd"//CPU内置LCD控制器驱动 -//parent //填写该组件的父组件名字，none表示没有父组件 -//attribute:bsp //选填“third、system、bsp、user”，本属性用于在IDE中分组 -//select:choosable //选填“required、choosable、none”，若填必选且需要配置参数，则IDE裁剪界面中默认勾取， - //不可取消，必选且不需要配置参数的，或是不可选的，IDE裁剪界面中不显示， -//init time:medium //初始化时机，可选值：early，medium，later, pre-main。 - //表示初始化时间，分别是早期、中期、后期 -//dependence:"graphical kernel","heap"//该组件的依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件将强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//weakdependence:"none" //该组件的弱依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件不会被强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//mutex:"none" //该组件的互斥组件名（可以是none，表示无互斥组件）， - //如果与多个组件互斥，则依次列出，用“,”分隔 -//%$#@end describe ****组件描述结束 - -//%$#@configue ****参数配置开始 -#if ( CFG_MODULE_ENABLE_CPU_ONCHIP_LCD == false ) -//#warning " cpu_onchip_lcd 组件参数未配置，使用默认配置" -//%$#@target = header //header = 生成头文件,cmdline = 命令行变量，DJYOS自有模块禁用 -#define CFG_MODULE_ENABLE_CPU_ONCHIP_LCD false //如果勾选了本组件，将由DIDE在project_config.h或命令行中定义为true - //%$#@num,0,65536, -#define CFG_LCD_XSIZE 240 //"LCD宽度", -#define CFG_LCD_YSIZE 128 //"LCD高度", -//%$#@num,,, -#define CFG_LCD_XSIZE_UM 36500 //"LCD宽度-微米数", -#define CFG_LCD_YSIZE_UM 48600 //"LCD高度-微米数", -//%$#@num,0,100, -//%$#@enum,true,false, -//%$#@string,1,30, -#define CFG_LCD_DISP_NAME "LCD_S3C2416" //"显示器名称", -#define CFG_LCD_HEAP_NAME "extram" //"显示器使用堆名称", -//%$#select, ***从列出的选项中选择若干个定义成宏 -//%$#@free, -#endif -//%$#@end configue ****参数配置结束 -//@#$%component end configure - -#if 1 - -#if CN_LCD_PIXEL_FORMAT ==CN_SYS_PF_RGB565 -#define LCD_BPP 16 -#elif CN_LCD_PIXEL_FORMAT ==CN_SYS_PF_ERGB8888 -#define LCD_BPP 24 -#else -#error LCD_PIXEL_FORMAT不能支持! -#endif - - -#define LCD_FRAME_RATE 50 - -#define VS_INV 1 -#define HS_INV 1 -#define VCLK_INV 1 -#define VDEN_INV 1 - -#define VFPD 2 -#define VBPD 2 -#define VSPW 10 - -#define HFPD 2 -#define HBPD 2 -#define HSPW 41 - - -//* VIDCON0 - -#define VIDOUT (0) -#define L1_DATA16 (4) -#define L0_DATA16 (4) -#define PNRMODE (0) -#define CLKVALUP (1) -#define CLKVAL_F (6) -#define CLKDIR (1) -#define CLKSEL_F (0) - - - -//* WINCON1to4 -#if(LCD_BPP==16) -#define BITSWP (0) //shift on basis of half-word swap -#define BYTSWP (0) //shift on basis of half-word swap -#define HAWSWP (1) //shift on basis of half-word swap -#endif - -#if(LCD_BPP==24) -#define BITSWP (0) //shift on basis of half-word swap -#define BYTSWP (0) //shift on basis of half-word swap -#define HAWSWP (0) //shift on basis of half-word swap -#endif - -#define WINCONx_4WORD_BURST (2) -#define WINCONx_8WORD_BURST (1) -#define WINCONx_16WORD_BURST (0) -#define WINCONx_PLANE_BLENDING (0) -#define WINCONx_PIXEL_BLENDING (1) -#define WINCONx_1BPP_PALLET (0) -#define WINCONx_2BPP_PALLET (1) -#define WINCONx_4BPP_PALLET (2) -#define WINCONx_8BPP_PALLET (3) -#define WINCONx_8BPP_NO_PALLET (4) -#define WINCONx_16BPP_565 (5) -#define WINCONx_16BPP_A555 (6) -#define WINCONx_16BPP_1555 (7) -#define WINCONx_18BPP_666 (8) -#define WINCONx_18BPP_A665 (9) -#define WINCONx_19BPP_A666 (10) -#define WINCONx_24BPP_888 (11) -#define WINCONx_24BPP_A887 (12) -#define WINCONx_25BPP_A888 (13) -#define WINCONx_ALPHA_MODE_0 (0) -#define WINCONx_ALPHA_MODE_1 (1) - -//////////////////////////////////////////////////////// - -static struct DisplayObj lcd_display; - -u16 *pFrameBufferFG; //前台显示缓冲区. - -#ifdef CN_LCD_DRV_FRAME_BUFFER_EN - -static struct GkWinObj frame_win; -static struct RectBitmap frame_bm; - -static u16 lcd_buffer_bk[CFG_LCD_XSIZE*CFG_LCD_YSIZE]; //后台显示缓冲区. - -#endif - - -//----初始化lcd硬件------------------------------------------------------------ -//功能: 初始化lcd硬件。 -//参数: 无 -//返回: 无 -//备注: 本函数是移植关键函数 -//---------------------------------------------------------------------------- -static void __lcd_hard_init(u32 lcd_buffer_addr) -{ - u8 clk_div=0; - u16 hsync_cnt,vclk_cnt; - u32 clk_mhz,clk_lcd_src; - - struct GPIO_REG *gpio =GPIO_REG_BASE; - struct LCD_REG *lcd =LCD_REG_BASE; - - gpio->MISCCR |= (1<<28); - - gpio->GPCCON = 0xAAAAAAAA; - gpio->GPCUDP = 0xAAAAAAAA; - - gpio->GPDCON = 0xAAAAAAAA; - gpio->GPDUDP = 0xAAAAAAAA; - - hsync_cnt = (HFPD+HBPD+HSPW+CFG_LCD_XSIZE); - vclk_cnt = (VFPD+VBPD+VSPW+CFG_LCD_YSIZE); - - lcd->WINCON0 &= ~0x01; - lcd->WINCON1 &= ~0x01; - lcd->VIDCON0 &= (~3); // ENVID Off - //LCD_CLK =HCLK - clk_lcd_src = (133*1000000); - // clk_div = (u8)(clk_lcd_src/(hsync_cnt*vclk_cnt*LCD_FRAME_RATE))-1; - clk_div = 7; - - lcd->VIDCON0 = (VIDOUT<<22)|(L1_DATA16<<19)|(L0_DATA16<<16)|(PNRMODE<<13)|(CLKVALUP<<12)|(clk_div<<6)|(0<<5)|(CLKDIR<<4)|(0<<2)|(0<<0); - lcd->VIDCON1 = (VCLK_INV<<7)|(HS_INV<<6)|(VS_INV<<5)|(VDEN_INV<<4); - lcd->VIDTCON0 = ((VBPD-1)<<16)|((VFPD-1)<<8)|(VSPW-1); - lcd->VIDTCON1 = ((HBPD-1)<<16)|((HFPD-1)<<8)|(HSPW-1); - lcd->VIDTCON2 = ((CFG_LCD_YSIZE-1)<<11)|(CFG_LCD_XSIZE-1); - - lcd->VIDOSD0A = (0<<11)|(0); - lcd->VIDOSD0B = (CFG_LCD_XSIZE-1)<<11|(CFG_LCD_YSIZE-1); - - #if(LCD_BPP==16) - lcd->WINCON0 = (BITSWP<<18)|(BYTSWP<<17)|(HAWSWP<<16)|(WINCONx_16WORD_BURST<<9)|(WINCONx_16BPP_565<<2); // 16word burst, 16bpp, - - lcd->VIDW00ADD0B0 = (u32)lcd_buffer_addr; - lcd->VIDW00ADD1B0 = (u32)lcd_buffer_addr + CFG_LCD_XSIZE*CFG_LCD_YSIZE*2; - lcd->VIDW00ADD2B0 = (0<<13)|(CFG_LCD_XSIZE*2); - #endif - - #if(LCD_BPP==24) - lcd->rWINCON0 = (BITSWP<<18)|(BYTSWP<<17)|(HAWSWP<<16)|(WINCONx_16WORD_BURST<<9)|(WINCONx_24BPP_888<<2); // 16word burst, 24bpp, - - lcd->VIDW00ADD0B0 = (u32)lcd_buffer_addr; - lcd->VIDW00ADD1B0 = (u32)lcd_buffer_addr + CFG_LCD_XSIZE*CFG_LCD_YSIZE*4; - lcd->VIDW00ADD2B0 = (0<<13)|(CFG_LCD_XSIZE*4); - #endif - - - lcd->DITHMODE = (1<<5)|(1<<3)|(1<<1)|(1<<0); - - lcd->WINCON0 |= 0x1; - lcd->VIDCON0 |= (1<<5)|0x3; - -} - -static void __lcd_backlight_onoff(bool_t onoff) -{ - // BKLIGHT: GPC0(tq2416) - struct GPIO_REG *gpio =GPIO_REG_BASE; - - gpio->GPCCON &= ~(0x3<<0); - gpio->GPCCON |= (0x1<<0); - - if(onoff!=false) - { //ON - gpio->GPCDAT |= (1<<0); - - } - else - { //OFF - gpio->GPCDAT &= ~(1<<0); - } - -} - -//----控制显示器--------------------------------------------------------------- -//功能: 这是由driver提供商编写的，用于设置显示器各种参数的函数，属于应用程序的 -// 范畴，功能由设备厂商定义。 -//参数: disp，显示器指针 -//返回: true=成功，false=失败 -//----------------------------------------------------------------------------- -bool_t __lcd_disp_ctrl(struct DisplayObj *disp) -{ - return true; -} - - -//----位图中画像素------------------------------------------------------------- -//功能: 在位图中画一个像素，只有在bitmap的像素格式为cn_custom_pf时，才需要绘制。 -// 如果显卡不打算支持自定义格式，本函数直接返回。 -//参数: bitmap，目标位图 -// limit，限制矩形，只绘制在该矩形内部的部分 -// x、y，坐标 -// color，绘图用的颜色，CN_SYS_PF_ERGB8888格式 -// r2_code，二元光栅操作码 -//返回: 无 -//----------------------------------------------------------------------------- -bool_t __lcd_set_pixel_bm(struct RectBitmap *bitmap, - s32 x,s32 y,u32 color,u32 r2_code) -{ - return false; -} -//----位图中画线--------------------------------------------------------------- -//功能: 在位图中画一条直线，不绘制(x2,y2)点，只绘制在limit限定的区域内的部分。 -//参数: bitmap，目标位图 -// limit，限制矩形，只绘制在该矩形内部的部分 -// x1、y1、x2、y2，起点终点坐标 -// color，绘图用的颜色，CN_SYS_PF_ERGB8888格式 -// r2_code，二元光栅操作码 -//返回: true=成功绘制，false=失败，无硬件加速或不支持按r2_code画线 -//----------------------------------------------------------------------------- -bool_t __lcd_line_bm(struct RectBitmap *bitmap,struct Rectangle *limit, - s32 x1,s32 y1,s32 x2,s32 y2,u32 color,u32 r2_code) -{ - return false; -} -//----位图中画线(含端点)------------------------------------------------------- -//功能: 在位图中画一条直线，只绘制在limit限定的区域内的部分。 -//参数: bitmap，目标位图 -// limit，限制矩形，只绘制在该矩形内部的部分 -// x1、y1、x2、y2，起点终点坐标 -// color，绘图用的颜色，CN_SYS_PF_ERGB8888格式 -// r2_code，二元光栅操作码 -//返回: true=成功绘制，false=失败，无硬件加速或不支持按r2_code画线 -//----------------------------------------------------------------------------- -bool_t __lcd_line_bm_ie(struct RectBitmap *bitmap,struct Rectangle *limit, - s32 x1,s32 y1,s32 x2,s32 y2,u32 color,u32 r2_code) -{ - return false; -} -//----位图中填充矩形----------------------------------------------------------- -//功能: 把位图中的矩形用color颜色填充。 -//参数: bitmap，目标位图 -// dst_rect，待填充的矩形 -// color，填充颜色，CN_SYS_PF_ERGB8888格式 -//返回: true=成功绘制，false=失败 -//----------------------------------------------------------------------------- -bool_t __lcd_fill_rect_bm(struct RectBitmap *dst_bitmap, - struct Rectangle *Target, - struct Rectangle *Focus, - u32 Color0,u32 Color1,u32 Mode) -{ - s32 x, y; - u16 pixel; - u16 *dst,*p; - s32 n,m,width; - if(Mode != CN_FILLRECT_MODE_N) - return false; - - if(dst_bitmap->PixelFormat != CN_SYS_PF_RGB565) - return false; - - pixel = GK_ConvertRGB24ToPF(CN_SYS_PF_RGB565,Color0); - - dst = (u16*)((u32)dst_bitmap->bm_bits - + Focus->top * dst_bitmap->linebytes); - dst += Focus->left; - - width=Focus->right-Focus->left; - n = (width+7)/8; - for(y = Focus->top; y < Focus->bottom; y++) - { - p =dst; - m = width%8; - for(x = 0; x < n; x++) - { - switch(m) - { - case 0: *p++ =pixel; - case 7: *p++ =pixel; - case 6: *p++ =pixel; - case 5: *p++ =pixel; - case 4: *p++ =pixel; - case 3: *p++ =pixel; - case 2: *p++ =pixel; - case 1: *p++ =pixel; - } - m = 0; - } - - dst += dst_bitmap->linebytes >> 1; - } - return true; -} -//----bitmap中位块传送--------------------------------------------------------- -//功能: 把一个位图中的一个矩形区域传送到另一个区域，两个位图的像素格式不必相同， -// 源和目的位图可以相同， -//参数: dst_bitmap，目标位图 -// dst_rect，目标矩形 -// src_bitmap，源位图 -// xsrc、ysrc，源位图中被传送的区域左上角坐标 -// pat，pattern指针 -// bitmsk，rop4操作需要的掩码 -// rop_code，三元光栅操作码 -// transparentcolor，透明色 -//返回: true=成功,false=失败 -//----------------------------------------------------------------------------- -bool_t __lcd_blt_bm_to_bm(struct RectBitmap *dst_bitmap, - struct Rectangle *DstRect, - struct RectBitmap *src_bitmap, - struct Rectangle *SrcRect, - struct RopGroup RopCode,u32 transparentcolor) -{ - u16 *src_offset,*dst_offset; //源位图点阵缓冲区可能不对齐!!! - u32 y; - struct RopGroup Rop = { 0, 0, 0, CN_R2_COPYPEN, 0, 0, 0 }; - - if((dst_bitmap->PixelFormat != CN_SYS_PF_ERGB8888) - ||(src_bitmap->PixelFormat != CN_SYS_PF_ERGB8888) - ||(memcmp(&RopCode, &Rop ,sizeof(struct RopGroup))!=0)) - { - return false; - } - else - { - if((ptu32_t)src_bitmap->bm_bits & 1) //源位图缓冲区非对齐模型 - { - }else - { - dst_offset = (u16*)((ptu32_t)dst_bitmap->bm_bits - + DstRect->top * dst_bitmap->linebytes); - dst_offset += DstRect->left; - - src_offset = (u16*)((ptu32_t)src_bitmap->bm_bits - + SrcRect->top * src_bitmap->linebytes); - src_offset += SrcRect->left; - - for(y = DstRect->top; y < DstRect->bottom; y++) - { - memcpy(dst_offset,src_offset,(DstRect->right-DstRect->left)<<1); - dst_offset += dst_bitmap->linebytes >> 1; - src_offset += src_bitmap->linebytes >> 1; - } - } - } - return true; -} - -//----screen中画像素----------------------------------------------------------- -//功能: 在screen中画一个像素. -//参数: x、y，像素坐标 -// color，颜色 -// r2_code，二元光栅操作码 -//返回: true=成功绘制，false=没有绘制，或无需绘制 -//----------------------------------------------------------------------------- -bool_t __lcd_set_pixel_screen(s32 x,s32 y,u32 color,u32 rop2_code) -{ - u32 dest; - u32 byteoffset; - byteoffset = y*CFG_LCD_XSIZE + x; - - color = GK_ConvertRGB24ToPF(CN_LCD_PIXEL_FORMAT,color); - - dest = (u32)pFrameBufferFG[byteoffset]; - dest = GK_BlendRop2(dest,color,rop2_code); - pFrameBufferFG[byteoffset] = dest; - -#ifdef CN_LCD_DRV_REMOTE_EN - RemoteSetPixel(x,y,color,rop2_code); -#endif - - return true; -} - -//在screen中画一个像素，有frame buffer的情况下，正常显示gui不会调用这个函数， -//如果窗口direct_screen==true，则可能调用本函数，无论是否有frame buffer， -//driver都必须提供并且必须实现本函数 -//镜像显示器必须实现本函数的功能,不能直接返回false -//参数: -// PixelGroup: 像素坐标数组指针. -// color: 颜色值,CN_SYS_PF_ERGB8888格式 -// n: 坐标点的数量 -// r2_code: 显示效果,详见gkernel.h中的CN_R2_BLACK族常数定义 -bool_t __lcd_set_pixel_group_screen(struct PointCdn *PixelGroup,u32 color,u32 n, u32 r2_code) -{ - u32 dest,i; - u32 offset; - color = GK_ConvertRGB24ToPF(CN_LCD_PIXEL_FORMAT,color); - - for(i=0;ileft-Focus->right; - n=(width+7)/8; - for(y=Focus->top;ybottom;y++) - { - m=width%8; - p =&pFrameBufferFG[y*CFG_LCD_XSIZE]; - for(x=0;xPixelFormat!=CN_LCD_PIXEL_FORMAT) - { //如果源位图与LCD格式不相同 - return false; - } - - double_width_src = src_bitmap->width*2; //源位图一行所占的字节数 - //每一行要被传送的字节数 - size = (dst_rect->right-dst_rect->left)*(CN_LCD_PIXEL_FORMAT>>8)/8; - //源位图左上角坐标的字节偏移量 - byteoffset_bitmap = ysrc*double_width_src + xsrc*2; - //目标矩形左上角坐标的双字节偏移量，因为pg_video_buf为u16的指针 - //因为是传送到screen上，所以每行双字节数取cn_lcd_xsize - byteoffset_rect = dst_rect->top*CFG_LCD_XSIZE + dst_rect->left; - - //bitmap到screen位块传送 - for(y = dst_rect->top;y < dst_rect->bottom;y++) - { - memcpy(&(pFrameBufferFG[byteoffset_rect]), - &src_bitmap->bm_bits[byteoffset_bitmap],size); - byteoffset_bitmap += double_width_src; - byteoffset_rect += CFG_LCD_XSIZE; - } - return true; -} -//----从screen中取像素--------------------------------------------------------- -//功能: 从screen中取一像素，并转换成CN_SYS_PF_ERGB8888或cn_sys_pf_a8r8g8b8格式。 -//参数: x、y，坐标 -//返回: 像素颜色值 -//----------------------------------------------------------------------------- -u32 __lcd_get_pixel_screen(s32 x,s32 y) -{ - u32 r,g,b,color,offset; - - offset = (u32)pFrameBufferFG; - offset += y*CFG_LCD_XSIZE*2; - offset += x*2; - color = (u32)(*(u16*)offset); - r = (color>>11) &0x1f; - g = (color>>5) & 0x3f; - b = color & 0x1f; - return (r<<19) | (g<<10) | (b<<3); -} - -//----读取bitmap中矩形块------------------------------------------------------- -//功能: 把一个位图中的矩形读取到另一个位图中。 -//参数: rect，欲读取的矩形 -// dest，保存矩形的位图，其长宽必须与rect相同 -//返回: true=成功读取，false=失败，原因可能是提供了不支持的像素格式 -//----------------------------------------------------------------------------- -bool_t __lcd_get_rect_screen(struct Rectangle *rect,struct RectBitmap *dest) -{ - return false; -} - - - -//----初始化lcd设备------------------------------------------------------------ -//功能: 初始化lcd设备。 -//参数: 无 -//返回: 显示器资源指针 -//----------------------------------------------------------------------------- - -struct DisplayObj* ModuleInstall_LCD(const char *DisplayName,const char* HeapName) -{ - struct HeapCB *heap; - - __lcd_backlight_onoff(false); - - heap =Heap_FindHeap(HeapName); - if(heap==NULL) - { - return NULL; - } - - - pFrameBufferFG =M_MallocHeap(CFG_LCD_XSIZE*CFG_LCD_YSIZE *2,heap,0); - - __lcd_hard_init(pFrameBufferFG); - - //无须初始化frame_buffer和desktop，z_topmost三个成员 -#ifdef CN_LCD_DRV_FRAME_BUFFER_EN - - frame_bm.PixelFormat = CN_LCD_PIXEL_FORMAT; - frame_bm.width = CFG_LCD_XSIZE; - frame_bm.height = CFG_LCD_YSIZE; - frame_bm.linebytes = CFG_LCD_XSIZE *2; - frame_bm.bm_bits = (u8*)lcd_buffer_bk; - frame_win.wm_bitmap =&frame_bm; - - lcd_display.frame_buffer = &frame_win; - lcd_display.framebuf_direct = false; - -#else - - lcd_display.frame_buffer =NULL; - lcd_display.framebuf_direct = true; - -#endif - - tg_lcd_display.width_um = CFG_LCD_XSIZE_UM; - tg_lcd_display.height_um = CFG_LCD_YSIZE_UM; - lcd_display.width = CFG_LCD_XSIZE; - lcd_display.height = CFG_LCD_YSIZE; - lcd_display.pixel_format = CN_LCD_PIXEL_FORMAT; - - - lcd_display.draw.SetPixelToBitmap = __lcd_set_pixel_bm; - lcd_display.draw.FillRectToBitmap = __lcd_fill_rect_bm; - lcd_display.draw.LineToBitmap = __lcd_line_bm; - lcd_display.draw.LineToBitmapIe = __lcd_line_bm_ie; - lcd_display.draw.BltBitmapToBitmap = __lcd_blt_bm_to_bm; - lcd_display.draw.SetPixelToScreen = __lcd_set_pixel_screen; - lcd_display.draw.SetPixelGroupToScreen = __lcd_set_pixel_group_screen; - lcd_display.draw.LineToScreen = __lcd_line_screen; - lcd_display.draw.LineToScreenIe = __lcd_line_screen_ie; - lcd_display.draw.FillRectToScreen = __lcd_fill_rect_screen; - lcd_display.draw.CopyBitmapToScreen = __lcd_bm_to_screen; - lcd_display.draw.GetPixelFromScreen = __lcd_get_pixel_screen; - lcd_display.draw.GetRectFromScreen = __lcd_get_rect_screen; - - lcd_display.DisplayHeap = heap; - lcd_display.disp_ctrl = __lcd_disp_ctrl; - - if(GK_InstallDisplay(&lcd_display,DisplayName)) - { - __lcd_backlight_onoff(true); - -#ifdef CN_LCD_DRV_REMOTE_EN - RemoteDisplayInit(); -#endif - - return &lcd_display; - } - else - { - - return NULL; - } -} - -#endif - - - - diff --git a/bsp/cpudrv/freescale/imx6q/src/nand/cpu_nand_yaf/cpu_nand_yaf.c b/bsp/cpudrv/freescale/imx6q/src/nand/cpu_nand_yaf/cpu_nand_yaf.c deleted file mode 100644 index b9e16d3e74f665a9dd487e75c242e267f97e8537..0000000000000000000000000000000000000000 --- a/bsp/cpudrv/freescale/imx6q/src/nand/cpu_nand_yaf/cpu_nand_yaf.c +++ /dev/null @@ -1,345 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -//@#$%component configure ****组件配置开始，用于 DIDE 中图形化配置界面 -//****配置块的语法和使用方法，参见源码根目录下的文件：component_config_readme.txt**** -//%$#@initcode ****初始化代码开始，由 DIDE 删除“//”后copy到初始化文件中 -// extern bool_t ModuleInstall_NandInstallYaf(const char *TargetFs,s32 bstart, s32 bend, u32 doformat); -// ModuleInstall_NandInstallYaf(CFG_NFLASH_YAFFSMOUNT_NAME, CFG_NFLASH_YAF_PART_START, -// CFG_NFLASH_YAF_PART_END, CFG_NFLASH_YAF_PART_FORMAT); -//%$#@end initcode ****初始化代码结束 - -//%$#@describe ****组件描述开始 -//component name:"nand_install_yaf"//nand安装yaf -//parent:"cpu onchip nand" //填写该组件的父组件名字，none表示没有父组件 -//attribute:bsp //选填“third、system、bsp、user”，本属性用于在IDE中分组 -//select:choosable //选填“required、choosable、none”，若填必选且需要配置参数，则IDE裁剪界面中默认勾取， - //不可取消，必选且不需要配置参数的，或是不可选的，IDE裁剪界面中不显示， -//init time:early //初始化时机，可选值：early，medium，later, pre-main。 - //表示初始化时间，分别是早期、中期、后期 -//dependence:"yaf2 file system","cpu onchip nand"//该组件的依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件将强制选中， - //如果依赖多个组件，则依次列出 -//weakdependence:"none" //该组件的弱依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件不会被强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//mutex:"none" //该组件的互斥组件名（可以是none，表示无互斥组件）， - //如果与多个组件互斥，则依次列出 -//%$#@end describe ****组件描述结束 - -//%$#@configue ****参数配置开始 -#if ( CFG_MODULE_ENABLE_NAND_INSTALL_YAF == false ) -//#warning " nand_install_yaf 组件参数未配置，使用默认配置" -//%$#@target = header //header = 生成头文件,cmdline = 命令行变量，DJYOS自有模块禁用 -#define CFG_MODULE_ENABLE_NAND_INSTALL_YAF false //如果勾选了本组件，将由DIDE在project_config.h或命令行中定义为true -//%$#@num,0,100, -//%$#@string,1,10, -#define CFG_NFLASH_YAFFSMOUNT_NAME "yaf2" //需安装的文件系统的mount的名字 -//%$#@num,-1,2048 -#define CFG_NFLASH_YAF_PART_START 0 //分区起始，填写块号，块号从0开始计算 -#define CFG_NFLASH_YAF_PART_END -1 //分区结束，-1表示最后一块 -//%$#@enum,true,false, -#define CFG_NFLASH_YAF_PART_FORMAT false //分区选项,是否需要格式化该分区。 -//%$#select, ***定义无值的宏，仅用于第三方组件 -//%$#@free, -#endif -//%$#@end configue ****参数配置结束 - -//%$#@exclude ****编译排除文件列表 -//%$#@end exclude ****组件描述结束 - -//@#$%component end configure - -extern struct NandDescr *__nandescription; // NAND器件描述; -extern struct umedia *nand_umedia; -extern bool_t Nandflash_is_install(void); -extern s32 __nand_FsInstallInit(const char *fs, s32 bstart, s32 bend, void *mediadrv); -int yaf_nand_write(struct yaffs_dev *yaf2dev, int chunk, - const u8 *data, int data_len, - const u8 *oob, int oob_len); -int yaf_nand_read(struct yaffs_dev *yaf2dev, int chunk, - u8 *data, int data_len, - u8 *oob, int oob_len, - enum yaffs_ecc_result *ecc_result_out); -int yaf_nand_eraseblock(struct yaffs_dev *yaf2dev, int block_no); -int yaf_nand_markbad(struct yaffs_dev *yaf2dev, int block_no); -int yaf_nand_checkbad(struct yaffs_dev *yaf2dev, int block_no); -int yaf_nand_initialize(struct yaffs_dev *dev); -int yaf_nand_deinitialize(struct yaffs_dev *dev); - -struct yaffs_driver YAF_NAND_DRV = -{ - .drv_write_chunk_fn = yaf_nand_write, - .drv_read_chunk_fn = yaf_nand_read, - .drv_erase_fn = yaf_nand_eraseblock, - .drv_mark_bad_fn = yaf_nand_markbad, - .drv_check_bad_fn = yaf_nand_checkbad, - .drv_initialise_fn = yaf_nand_initialize, - .drv_deinitialise_fn = yaf_nand_deinitialize -}; - -// ============================================================================ -// 功能：判断该区域是否擦除 -// 参数：buf -- 读到该区域的数据；datalen -- 数据长度；taglen -- oob长度 -// 返回：擦除 -- 1；未擦除 -- 0； -// 备注： -// ============================================================================ -s32 yaf_nand_is_erased(const u8 *buf, s32 datalen, s32 taglen) -{ - s32 alllen = datalen + taglen; - while (alllen--) - { - if (*buf != 0xff) - return 0; - buf++; - } - return 1; -} - -// ============================================================================ -// 功能：通过yaf文件系统往flash里写数据 -// 参数：yaf2dev -- yaf的驱动结构； chunk -- flash的页号； data -- 待写数据的缓存； data_len -- 待写数据长度 -// oob -- ecc校验码； oob_len -- ecc校验码长度 -// 返回：成功 -- YAFFS_OK；失败 -- YAFFS_FAIL -// 备注：intag模式与oob是不会同时存在的，如果初始化时时intag模式，oob上不会存在内容； -// ============================================================================ -int yaf_nand_write(struct yaffs_dev *yaf2dev, int chunk, - const u8 *data, int data_len, - const u8 *oob, int oob_len) -{ - struct uopt opt = {0}; - s32 i, spare = 0, res = YAFFS_OK, main; - - if(((s32)(yaf2dev->driver_context) > 1)&&(oob)) - { - printf("\r\n: erro : yaffs2 : bad driver logic when write"); - return (YAFFS_FAIL); - } - -#if 0// todo: yaffs调用时,存在data==NULL,data_len不为零的情况。 - if (((!data) && (data_len > 0)) || ((!oob) && (oob_len > 0))) - return (YAFFS_FAIL); -#endif - - if(yaf2dev->param.use_nand_ecc) - { - opt.hecc = 1; - opt.secc = 1; - } - - main = __nandescription->BytesPerPage; - __nand_req(sparebytes, (ptu32_t)&spare); - for(i = 0; i < (s32)(yaf2dev->driver_context); i++) - { - memset(nand_umedia->ubuf, 0xFF, main+spare); - if(data) - { - opt.main = 1; - memcpy(nand_umedia->ubuf, data, data_len); - data += main; - } - - if(oob) - { - opt.spare = 1; - memcpy(nand_umedia->ubuf+main, oob, oob_len); - } - - if(__nand_write((s64)chunk, (void*)nand_umedia->ubuf, opt) != 0) - { - res = YAFFS_FAIL; - break; - } - } - - return (res); -} - -// ============================================================================ -// 功能：通过yaf文件系统读flash里的数据 -// 参数：yaf2dev -- yaf的驱动结构； chunk -- flash的页号； data -- 待读数据的缓存； data_len -- 待写数据长度 -// oob -- ecc校验码； oob_len -- ecc校验码长度 -// 返回：成功 -- YAFFS_OK；失败 -- YAFFS_FAIL -// 备注：intag模式与oob是不会同时存在的，如果初始化时时intag模式，oob上不会存在内容； -// ============================================================================ -int yaf_nand_read(struct yaffs_dev *yaf2dev, int chunk, - u8 *data, int data_len, - u8 *oob, int oob_len, - enum yaffs_ecc_result *ecc_result_out) -{ - struct uopt opt = {0}; - s32 i, spare = 0, res = YAFFS_OK, main; - - if(((s32)(yaf2dev->driver_context) > 1)&&(oob)) - { - printf("\r\n: erro : yaffs2 : bad driver logic when read"); - *ecc_result_out = YAFFS_ECC_RESULT_UNKNOWN; - return (YAFFS_FAIL); - } - -#if 0// todo: yaffs调用时,存在data==NULL,data_len不为零的情况。 - if (((!data) && (data_len > 0)) || ((!oob) && (oob_len > 0))) - return (YAFFS_FAIL); -#endif - - - - if(yaf2dev->param.use_nand_ecc) - { - opt.hecc = 1; - opt.secc = 1; - } - - main = __nandescription->BytesPerPage;; - __nand_req(sparebytes, (ptu32_t)&spare); - opt.main = 1; - if(oob) - opt.spare = 1; - - for(i = 0; i < (s32)(yaf2dev->driver_context); i++) - { - if(__nand_read((s64)chunk, (void*)nand_umedia->ubuf, opt) != 0) - { - if(!yaf_nand_is_erased(nand_umedia->ubuf, main, oob_len)) - *ecc_result_out = YAFFS_ECC_RESULT_UNFIXED;/* ECC校验失败(保证不是被擦除的块中的页) */ - else - *ecc_result_out = YAFFS_ECC_RESULT_UNKNOWN;/* 读错误等,或者无错误（情景：ECC读一个刚被擦除的页） */ - - printf("\r\n: erro : yaffs2 : bad when read"); - res = YAFFS_FAIL; - break; - } - - if(data) - { - memcpy(data, nand_umedia->ubuf, main); - data += main; - } - - if(oob) - memcpy(oob, (nand_umedia->ubuf+main), oob_len); - } - - return (res); -} - -// ============================================================================ -// 功能：通过yaf文件系统擦除flash里某个块的数据 -// 参数：yaf2dev -- yaf的驱动结构； block_no -- 需要擦除的块号 -// 返回：成功 -- YAFFS_OK；失败 -- YAFFS_FAIL -// 备注： -// ============================================================================ -int yaf_nand_eraseblock(struct yaffs_dev *yaf2dev, int block_no) -{ - struct uesz sz = {0}; - - sz.block = 1; - if(__nand_erase(block_no, sz) != 0) - return (YAFFS_FAIL); - else - return (YAFFS_OK); -} - -// ============================================================================ -// 功能：标记某块是坏块 -// 参数：yaf2dev -- yaf的驱动结构； block_no -- 需要标记的块号 -// 返回：成功 -- YAFFS_OK；失败 -- YAFFS_FAIL -// 备注： -// ============================================================================ -int yaf_nand_markbad(struct yaffs_dev *yaf2dev, int block_no) -{ - __nand_req(markbad, block_no); - return (YAFFS_OK); -} -// ============================================================================ -// 功能：检查某块是否是坏块 -// 参数： -// 返回： -// 备注： -// ============================================================================ -int yaf_nand_checkbad(struct yaffs_dev *yaf2dev, int block_no) -{ - if(__nand_req(checkbad, block_no)) - return (YAFFS_FAIL); - else - return (YAFFS_OK); - -} - -// ============================================================================ -// 功能： -// 参数： -// 返回： -// 备注： -// ============================================================================ -int yaf_nand_initialize(struct yaffs_dev *yaf2dev) -{ - return (YAFFS_OK); -} - -// ============================================================================ -// 功能： -// 参数： -// 返回： -// 备注： -// ============================================================================ -int yaf_nand_deinitialize(struct yaffs_dev *yaf2dev) -{ - return (YAFFS_OK); -} - -//----------------------------------------------------------------------------- -// 功能：在nand安装yaf -// 参数： TargetFs -- 要挂载的文件系统 -// parts -- 分区数； -// TargetPart -- 指定要挂到哪个分区下，分区从0开始 -// 分区数据 -- 起始块，结束块数（如果结束块是6，起始块是0，则该分区使用的块为0，1，2，3，4，5块，不包括第六块），是否格式化； -// 返回：成功（0）；失败（-1）； -// 备注：如果还不知道要安装什么文件系统，或者不安装文件系统TargetFs填NULL，TargetPart填-1； -//----------------------------------------------------------------------------- -bool_t ModuleInstall_NandInstallYaf(const char *TargetFs,s32 bstart, s32 bend, u32 doformat) -{ - struct FsCore *super; - char *notfind; - struct Object *targetobj; - if(Nandflash_is_install() == true) - { - if((TargetFs != NULL) && (bstart != bend)) - { - if(doformat) - { - struct uesz sz; - sz.unit = 0; - sz.block = 1; - if(-1 == __nand_req(format, bstart , bend, &sz)) - { - warning_printf("yaf2"," Format failure.\r\n"); - } - } - targetobj = OBJ_MatchPath(TargetFs, ¬find); - if(notfind) - { - error_printf("nand"," not found need to install file system.\r\n"); - return false; - } - super = (struct FsCore *)OBJ_GetPrivate(targetobj); - if(strcmp(super->pFsType->pType, "YAF2") == 0) - { - if(__nand_FsInstallInit(TargetFs,bstart,bend,&YAF_NAND_DRV) == 0) - return true; - } - error_printf("nand"," need to install file system not YAF2.\r\n"); - } - } - return false; -} diff --git a/bsp/cpudrv/freescale/imx6q/src/nand/cpu_peri_nand.c b/bsp/cpudrv/freescale/imx6q/src/nand/cpu_peri_nand.c deleted file mode 100644 index 9abb33f90ecc0277d69db41158b7487e5714372c..0000000000000000000000000000000000000000 --- a/bsp/cpudrv/freescale/imx6q/src/nand/cpu_peri_nand.c +++ /dev/null @@ -1,1348 +0,0 @@ -//思路: -// 采用一个buf表示页和oob区域,而不是将他们分开表示。原因是读部分数据时,ECC校验 -// 却是需要整个页和OOB数据。因此带ECC校验时,每次都需读写的整个页和OOB的数据才行 -// - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "stm32f7xx_hal_conf.h" - -#include "project_config.h" //本文件由IDE中配置界面生成，存放在APP的工程目录中。 - //允许是个空文件，所有配置将按默认值配置。 - -//@#$%component configure ****组件配置开始，用于 DIDE 中图形化配置界面 -//****配置块的语法和使用方法，参见源码根目录下的文件：component_config_readme.txt**** -//%$#@initcode ****初始化代码开始，由 DIDE 删除“//”后copy到初始化文件中 -// extern s32 ModuleInstall_NAND(u32 doformat); -// ModuleInstall_NAND(CFG_NFLASH_PART_FORMAT); -//%$#@end initcode ****初始化代码结束 - -//%$#@describe ****组件描述开始 -//component name:"cpu onchip nand"//CPU的nand驱动 -//parent:"none" //填写该组件的父组件名字，none表示没有父组件 -//attribute:bsp //选填“third、system、bsp、user”，本属性用于在IDE中分组 -//select:choosable //选填“required、choosable、none”，若填必选且需要配置参数，则IDE裁剪界面中默认勾取， - //不可取消，必选且不需要配置参数的，或是不可选的，IDE裁剪界面中不显示， -//init time:early //初始化时机，可选值：early，medium，later, pre-main。 - //表示初始化时间，分别是早期、中期、后期 -//dependence:"device file system","file system"//该组件的依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件将强制选中， - //如果依赖多个组件，则依次列出 -//weakdependence:"none" //该组件的弱依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件不会被强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//mutex:"none" //该组件的互斥组件名（可以是none，表示无互斥组件）， - //如果与多个组件互斥，则依次列出 -//%$#@end describe ****组件描述结束 - -//%$#@configue ****参数配置开始 -#if ( CFG_MODULE_ENABLE_CPU_ONCHIP_NAND == false ) -//#warning " cpu_onchip_nand 组件参数未配置，使用默认配置" -//%$#@target = header //header = 生成头文件,cmdline = 命令行变量，DJYOS自有模块禁用 -#define CFG_MODULE_ENABLE_CPU_ONCHIP_NAND false //如果勾选了本组件，将由DIDE在project_config.h或命令行中定义为true -//%$#@enum,true,false, -#define CFG_NFLASH_PART_FORMAT false //是否需要擦除该芯片。 -//%$#select, ***定义无值的宏，仅用于第三方组件 -//%$#@free, -#endif -//%$#@end configue ****参数配置结束 - -//%$#@exclude ****编译排除文件列表 -//%$#@end exclude ****组件描述结束 - -//@#$%component end configure - -//上面的分区起始和分区结束我写的是-1到10000，具体数值可根据具体芯片参数填写 - -#define NAND_CONTROLLER_REG (pg_nand_reg) -#define NandChipOn() (NAND_CONTROLLER_REG->NFCONT &= ~(1<<1)) -#define NandChipOff() (NAND_CONTROLLER_REG->NFCONT |= (1<<1)) -#define SetNandCommand(cmd) (NAND_CONTROLLER_REG->NFCMD = cmd) -#define SetNandAddr(i, addr) (NAND_CONTROLLER_REG->NFADDR = addr) -#define SetNandData(data) (NAND_CONTROLLER_REG->NFDATA = data) -#define GetNandData() (NAND_CONTROLLER_REG->NFDATA) - -s32 __nand_FsInstallInit(const char *fs, s32 bstart, s32 bend, void *mediadrv); -s32 __nand_req(enum ucmd cmd, ptu32_t args, ...); -s32 __nand_read(s64 unit, void *data, struct uopt opt); -s32 __nand_write(s64 unit, void *data, struct uopt opt); -s32 __nand_erase(s64 unit, struct uesz sz); -static u32 *badstable = NULL; -static u32 badslocation = 0; -static bool_t sNandflashInited = false; -#define NFlashLockTimeOut CN_CFG_TICK_US * 1000 * 10 -extern s32 deonfi(const char *data, struct NandDescr *onfi, u8 little); -extern struct Object *s_ptDeviceRoot; -static struct NandDescr *s_ptNandInfo; -static struct MutexLCB *NandFlashLock; -struct umedia *nand_umedia; -static const char *NandFlashName = "nand"; //该flash在obj在的名字 - -static void ResetNand(void); -static s32 StatusOfNand(void); -static void WaitNandReady(void); -//----------------------------------------------------------------------------- -//功能: -//参数: -//输出: ">0" -- 写成功; "-2" -- 写失败; -//返回: -//----------------------------------------------------------------------------- -s32 S3C2416_SpareProgram(u32 PageNo, const u8 *Data) -{ - - u32 i; - s32 Ret; - u32 SpareOffset = s_ptNandInfo->BytesPerPage; - - if(Lock_MutexPend(NandFlashLock, NFlashLockTimeOut) == false) - { - return (-2); - } - - NandChipOn(); - - SetNandCommand(PAGE_PROGRAM_CMD_BYTE1); - - NAND_CONTROLLER_REG->NFADDR = (u8)SpareOffset; - NAND_CONTROLLER_REG->NFADDR = (u8)((SpareOffset>>8) & 0xF); - NAND_CONTROLLER_REG->NFADDR = (u8)(PageNo); - NAND_CONTROLLER_REG->NFADDR = (u8)(PageNo>>8); - NAND_CONTROLLER_REG->NFADDR = (u8)((PageNo>>16) & 0x1); - - for(i = 0; i < (s_ptNandInfo->OOB_Size); i++) - SetNandData(Data[i]); - - SetNandCommand(PAGE_PROGRAM_CMD_BYTE2);// 写入Main数据完成 - - DJY_EventDelay(700);// 切出 - WaitNandReady();//时序要求 - - Ret = StatusOfNand(); - - NandChipOff(); - - if(Ret) - { - Lock_MutexPost(NandFlashLock); - return (-2); - } - Lock_MutexPost(NandFlashLock); - return (s_ptNandInfo->OOB_Size); -} -//----------------------------------------------------------------------------- -//功能: -//参数: -//输出: ">0" -- 读成功; "-2" -- 写失败; -//返回: -//----------------------------------------------------------------------------- -s32 S3C2416_SpareRead(u32 PageNo, u8 *Data) -{ - u8 i; - s32 Ret; - u32 SpareOffset = s_ptNandInfo->BytesPerPage; - - if(Lock_MutexPend(NandFlashLock, NFlashLockTimeOut) == false) - { - return (-2); - } - - NandChipOn(); - - SetNandCommand(PAGE_READ_CMD_BYTE1); - - NAND_CONTROLLER_REG->NFADDR = (u8)(SpareOffset); - NAND_CONTROLLER_REG->NFADDR = (u8)((SpareOffset>>8) & 0xF); - NAND_CONTROLLER_REG->NFADDR = (u8)(PageNo); - NAND_CONTROLLER_REG->NFADDR = (u8)(PageNo>>8); - NAND_CONTROLLER_REG->NFADDR = (u8)(PageNo>>16) & 0x1; - - SetNandCommand(PAGE_READ_CMD_BYTE2); - - DJY_EventDelay(25);// 切出 - WaitNandReady();//时序要求 - - for(i = 0; i < s_ptNandInfo->OOB_Size; i++) - Data[i] = GetNandData(); - - Ret = StatusOfNand(); - - NandChipOff(); - - if(Ret) - { - Lock_MutexPost(NandFlashLock); - return (-2); - } - Lock_MutexPost(NandFlashLock); - return (s_ptNandInfo->OOB_Size); -} - -//----------------------------------------------------------------------------- -//功能: -//参数: Data -- 数据空间。不能为NULL。 -// Flags -- -//返回: ">0" -- 正常，写入的字节数; -// "-1" -- 参数错误; -// "-2" -- 写失败; -//备注: -//----------------------------------------------------------------------------- -s32 S3C2416_PageProgram(u32 PageNo, const u8 *Data, u32 Flags) -{ - //逻辑: - // - u32 i, EccOffset; - s32 Ret; - u8 *Spare; - - if(Lock_MutexPend(NandFlashLock, NFlashLockTimeOut) == false) - { - return (-2); - } - - // ECC 功能 - Ret = NAND_CONTROLLER_REG->NFMECC0;//测试 - switch (Flags & MASK_ECC) - { - case HW_ECC : - { - NAND_CONTROLLER_REG->NFCONT &= (~(1<<7));// 开启(解锁)Main ECC - NAND_CONTROLLER_REG->NFCONT |= (1<<5);// 初始化Main ECC - break; - } - case SW_ECC : - case NO_ECC : - { - NAND_CONTROLLER_REG->NFCONT |= (1<<7);// 关闭Main ECC - break; - } - default : - Lock_MutexPost(NandFlashLock); - return (-1); - } - - NandChipOn(); - - SetNandCommand(PAGE_PROGRAM_CMD_BYTE1); - - NAND_CONTROLLER_REG->NFADDR = 0x0; - NAND_CONTROLLER_REG->NFADDR = 0x0; - NAND_CONTROLLER_REG->NFADDR = (u8)(PageNo); - NAND_CONTROLLER_REG->NFADDR = (u8)(PageNo>>8); - NAND_CONTROLLER_REG->NFADDR = (u8)(PageNo>>16) & 0x1; - - for(i = 0; i < s_ptNandInfo->BytesPerPage; i++) - SetNandData(Data[i]); - - SetNandCommand(PAGE_PROGRAM_CMD_BYTE2);// 写入Main数据完成 - - DJY_EventDelay(700);// 切出 - WaitNandReady();// 时序要求 - - Ret = StatusOfNand(); - - NandChipOff(); - - if(Ret) - { - Lock_MutexPost(NandFlashLock); - return (-2); - } - - if (!((SPARE_REQ & Flags) || (HW_ECC & Flags))) - { - Lock_MutexPost(NandFlashLock); - return (s_ptNandInfo->BytesPerPage);// 只写页,结束退出 - } - - Spare = (u8*)Data + s_ptNandInfo->BytesPerPage;// 注意：这里是基于驱动都有统一的缓冲块逻辑 - - if(HW_ECC & Flags) - { - NAND_CONTROLLER_REG->NFCONT |= (1<<7);// 关闭(锁)Mian ECC - EccOffset = s_ptNandInfo->OOB_Size - 4;// 4个字节(1-bit ECC校验) - Ret = NAND_CONTROLLER_REG->NFMECC0;//测试 - *(u32*)(Spare + EccOffset) = NAND_CONTROLLER_REG->NFMECC0;// - } - - if(!(SPARE_REQ & Flags)) - memset(Spare, 0xFF, EccOffset);// 未要求写spare,则默认写0xFF - - if(-2 == S3C2416_SpareProgram(PageNo, Spare)) - { - Lock_MutexPost(NandFlashLock); - return (-2); - } - - Lock_MutexPost(NandFlashLock); - return (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size); -} -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: ">0" -- 正常，读出的字节数。 -// "-1" -- 输入参数错误; -// "-2" -- 读失败; -// "-3" -- ECC纠错失败; -//备注: 不管读写是否正确，都将数据回传 -//----------------------------------------------------------------------------- -s32 S3C2416_PageRead(u32 PageNo, u8 *Data, u32 Flags) -{ - //逻辑: - // - u32 i; - s32 Ret; - u8 *Spare; - - if(Lock_MutexPend(NandFlashLock, NFlashLockTimeOut) == false) - { - return (-2); - } - // ecc 功能 - switch (Flags & MASK_ECC) - { - case HW_ECC : - { - NAND_CONTROLLER_REG->NFCONT &= (~(1<<7));// 开启(解锁)Main ECC - NAND_CONTROLLER_REG->NFCONT |= (1<<5);// 初始化Main ECC - break; - } - case SW_ECC : - case NO_ECC : - { - NAND_CONTROLLER_REG->NFCONT |= (1<<7);// 关闭Main ECC - break; - } - default : - Lock_MutexPost(NandFlashLock); - return (-1); - } - - NandChipOn(); - - SetNandCommand(PAGE_READ_CMD_BYTE1); - - NAND_CONTROLLER_REG->NFADDR = 0x0; - NAND_CONTROLLER_REG->NFADDR = 0x0; - NAND_CONTROLLER_REG->NFADDR = (u8)(PageNo); - NAND_CONTROLLER_REG->NFADDR = (u8)(PageNo>>8); - NAND_CONTROLLER_REG->NFADDR = (u8)(PageNo>>16) & 0x1; - - SetNandCommand(PAGE_READ_CMD_BYTE2); - - DJY_EventDelay(25);// 切出 - WaitNandReady();// 时序要求 - - for(i = 0; i < s_ptNandInfo->BytesPerPage; i++) - Data[i] = GetNandData(); - - Ret = StatusOfNand(); - - NandChipOff(); - - if(Ret) - { - Lock_MutexPost(NandFlashLock); - return (-2); - } - - if (!((SPARE_REQ & Flags) || (HW_ECC & Flags))) - { - Lock_MutexPost(NandFlashLock); - return (s_ptNandInfo->BytesPerPage);// 只读页,结束退出 - } - - Spare = Data + s_ptNandInfo->BytesPerPage;// 注意：这里是基于驱动都有统一的缓冲块逻辑 - - if(HW_ECC & Flags) - NAND_CONTROLLER_REG->NFCONT |= (1<<7);// 关闭(锁)Mian ECC - - if(-2 == S3C2416_SpareRead(PageNo, Spare)) - { - Lock_MutexPost(NandFlashLock); - return (-2); - } - - if(HW_ECC & Flags) - { - u32 EccRes, EccOffset, EccStatus; - - EccOffset = s_ptNandInfo->OOB_Size - 4;// - EccRes = *(u32*)(Spare + EccOffset); - // 针对YAFFS2的逻辑,HW_ECC读一个新擦除块的页，ECC校验码为0xFFFFFFFF(-1), - // 代入if里的逻辑会执行纠错，修改读回的数据, 需将屏蔽掉这个错误 - if(EccRes != -1) - { - NAND_CONTROLLER_REG->NFMECCD0 = ((u32)((EccRes & 0xFF00) << 8) | (u32)(EccRes & 0xFF)); - NAND_CONTROLLER_REG->NFMECCD1 = ((u32)((EccRes & 0xFF000000) >> 8) | (u32)(EccRes & 0xFF0000) >> 16); - - EccStatus = NAND_CONTROLLER_REG->NFECCERR0; - switch(EccStatus & 0x3) - { - case 0: break;// 无错 - case 1:// 1位错，可纠错 - { - Data[(EccStatus >> 7) & 0x7ff] ^= (1 << ((EccStatus >> 4) & 0x7)); - debug_printf("nand driver"，"fix: bit 0x%x in Byte 0x%x\r\n", - ((EccStatus >> 4) & 0x7), ((EccStatus >> 7) & 0x7ff)); - break; - } - case 2:// 错误位太多, 不可纠错 - case 3:// ECC计算错误 - debug_printf("nand driver", "cannot be fixed\r\n"); - Lock_MutexPost(NandFlashLock); - return (-3); - } - } - } - Lock_MutexPost(NandFlashLock); - return (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size); - -} - -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: "0" -- 成功;"-1" -- 失败; -//备注: -//----------------------------------------------------------------------------- -s32 S3C2416_BlockErase(u32 BlkNo) -{ - s32 Ret; - - if(Lock_MutexPend(NandFlashLock, NFlashLockTimeOut) == false) - { - return (-1); - } - - NandChipOn(); - - SetNandCommand(BLOCK_ERASE_CMD_BYTE1); - - NAND_CONTROLLER_REG->NFADDR = (u8)(BlkNo << 6);// 3个地址周期表示的是页号 - NAND_CONTROLLER_REG->NFADDR = (u8)(BlkNo >> 2); - NAND_CONTROLLER_REG->NFADDR = (u8)(BlkNo >> 10); - - SetNandCommand(BLOCK_ERASE_CMD_BYTE2); - - DJY_EventDelay(3000);// 切出 - WaitNandReady(); - - Ret = StatusOfNand(); - - NandChipOff(); - Lock_MutexPost(NandFlashLock); - return (Ret); -} - -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: "0" -- 好块; -// "-1" -- 坏块; -// "-2" -- 内存不足 -// "-3" -- 读失败; -//备注: -//----------------------------------------------------------------------------- -s32 S3C2416_BadChk(u32 BlkNo) -{ - u8 *Spare, i; - s32 Ret = 0; - u32 PageNo = BlkNo * s_ptNandInfo->PagesPerBlk; - - Spare = malloc (s_ptNandInfo->OOB_Size); - if (NULL == Spare) - return (-2); - - for (i = 0; i < 2; i++)// 只判断每块的首两页 - { - if(-2 == S3C2416_SpareRead(PageNo + i, Spare)) - { - Ret = -3; - break; - } - - if ((0xAA == Spare[s_ptNandInfo->BadMarkOffset]) && - (0xAA == Spare[s_ptNandInfo->BadMarkOffset-1])) - { - Ret = -1; - break; - } - } - - free(Spare); - - return (Ret); -} -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: "0" -- 成功; -// "-1" -- 失败; -// "-2" -- 内存不足; -//备注: -//----------------------------------------------------------------------------- -s32 S3C2416_BadMark(u32 BlkNo) -{ - //逻辑: - // 不管BAD MARK位原来是多少以及是否有ECC校验问题, 只管将该位标志为坏块 - - u8 *Spare, i; - s32 Ret = 0; - u32 PageNo = BlkNo * s_ptNandInfo->PagesPerBlk; - - Spare = malloc (s_ptNandInfo->OOB_Size); - if (NULL == Spare) - return (-2); - - - memset(Spare, 0xFF, s_ptNandInfo->OOB_Size); - Spare[s_ptNandInfo->BadMarkOffset] = 0xAA; - Spare[s_ptNandInfo->BadMarkOffset-1] = 0xAA; - - for (i = 0; i < 2; i++) - { - if(-2 == S3C2416_SpareProgram(PageNo + i, Spare)) - Ret = -1; - } - - free(Spare); - - return (Ret); -} -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: "0" -- 成功; "-1" -- 解析失败; "-2" -- 内存不足; -//备注: -//----------------------------------------------------------------------------- -static s32 S3C2416_GetNandDescr(struct NandDescr *Descr) -{ - u16 i; - s32 Ret = 0; - char *OnfiBuf; - - OnfiBuf = (char*)malloc(786); - if (NULL == OnfiBuf) - return (-1); - - memset(OnfiBuf, 0, 786); - - NandChipOn(); - - SetNandCommand(PARAMETER_PAGE_READ_CMD_BYTE); - - NAND_CONTROLLER_REG->NFADDR = 0; - - WaitNandReady();// 时序要求 - - for(i = 0; i < 786; i++) - OnfiBuf[i] = GetNandData(); - - NandChipOff(); - -// PrintBuf(OnfiBuf, 786);//测试 - - if(deonfi((const char*)OnfiBuf, Descr, 0)) - Ret = -1; - - free (OnfiBuf); - - return (Ret); -} -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -static void S3C2416_NAND_ControllerConfig(void) -{ - //逻辑: - // - - //nand config register - NAND_CONTROLLER_REG->NFCONF = (0<<23)|// ECCType [24:23] 0:1-bit ECC - (1<<12)|// TACLS [14:12] CLE&ALE duration = HCLK*TACLS. - (3<<8)| // TWRPH0 [10:8] TWRPH0 duration = HCLK*(TWRPH0+1) - (1<<4)| // TWRPH1 [6:4] TWRPH1 duration = HCLK*(TWRPH1+1) - (1<<3)| // AdvFlash(R) [3] Advanced NAND, 0:256/512, 1:1024/2048 - (0<<2)| // PageSize(R) [2] NAND memory page size - (1<<1)| // AddrCycle(R) [1] NAND flash addr size - (0<<0); // BusWidth(R/W) [0] NAND bus width. 0:8-bit, 1:16-bit. - - //nand control register - NAND_CONTROLLER_REG->NFCONT = (0<<13)| // Lock-tight [13] 0:Disable lock, 1:Enable lock. - (0<<12)| // Soft Lock [12] 0:Disable lock, 1:Enable lock. - (0<<10)| // EnablillegalAcINT[10] Illegal access interupt control.0:Disable,1:Enable - (0<<9)| // EnbRnBINT [9] RnB interrupt. 0:Disable, 1:Enable - (0<<8)| // RnB_TrandMode[8] RnB transition detection config.0:Low->High,1:High->Low - (1<<6)| // SpareECCLock [6] 0:Unlock, 1:Lock - (1<<5)| // MainECCLock [5] 0:Unlock, 1:Lock - (1<<4)| // InitECC(W) [4] 1:Init ECC decoder/encoder. - (1<<1)| // Reg_nCE [1] 0:nFCE=0, 1:nFCE=1. - (1<<0); // NANDC Enable [0] operating mode. 0:Disable, 1:Enable. - - ResetNand(); -} -//----------------------------------------------------------------------------- -// 功能：安装nand驱动 -// 参数： doformat -- 是否格式化； -// 返回：成功（0）；失败（-1）； -// 备注： -//----------------------------------------------------------------------------- -s32 ModuleInstall_NAND(u32 doformat) -{ - if(!s_ptNandInfo) - { - if(__nand_init()) - { - printf("\r\n: erro : device : nand initialization failed(init)."); - return (-1); - } - } - - if(doformat) - { - struct uesz sz; - sz.unit = 0; - sz.block = 1; - __nand_req(format, 0 , -1, &sz); - } - - if(!badstable) - { - badstable = nandbuildbads(__nand_req); - if(!badstable) - { - printf("\r\n: erro : device : nand initialization failed(bad table)."); - return (-1); - } - } - - nand_umedia = malloc(sizeof(struct umedia)+s_ptNandInfo->BytesPerPage+s_ptNandInfo->OOB_Size); - if(!nand_umedia) - return (-1); - - nand_umedia->mreq = __nand_req; - nand_umedia->type = nand; - nand_umedia->ubuf = (u8*)um + sizeof(struct umedia); - - if(!Device_Create((const char*)NandFlashName, NULL, NULL, NULL, NULL, NULL, ((ptu32_t)nand_umedia))) - { - printf("\r\n: erro : device : %s addition failed.", NandFlashName); - free(nand_umedia); - return (-1); - } - sNandflashInited = true; - return (0); -} -// ============================================================================= -// 功能：判断nandflash是否安装 -// 参数： 无 -// 返回：已成功安装（true）；未成功安装（false）； -// 备注： -// ============================================================================= -bool_t Nandflash_is_install(void) -{ - return sNandflashInited; -} -/****************************************************************************** - PRIVATE FUNCTION(本地私有函数) -******************************************************************************/ -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -static void ResetNand(void) -{ - NandChipOn(); - - SetNandCommand(RESET_CMD_BYTE); - - WaitNandReady(); - - NandChipOff(); -} -//----------------------------------------------------------------------------- -//功能: 检查NAND操作是否出错 -//参数: -//返回: 0 -- 正常; -1 -- 错误; -//备注: 未判断busy等状态 -//----------------------------------------------------------------------------- -static s32 StatusOfNand(void) -{ - u8 Status = 0x1; - - do - { - SetNandCommand(STATUS_READ_CMD_BYTE); - Status = GetNandData(); - } - while(Status & 0x1); - - return(0); -} - -//----------------------------------------------------------------------------- -//功能: Nand时序逻辑 -//参数: -//返回: -//备注: 实际上是判断NAND芯片的R/Bn引脚，这种判断是必不可少的 -//----------------------------------------------------------------------------- -static void WaitNandReady(void) -{ - while(0 == (NAND_CONTROLLER_REG->NFSTAT & 0x1)); -} - -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -static void __WaitEccDone(void) -{ - ;//1-bit ECC 没有判断的位 -} -#if 0 -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -void RawTest(void) -{ - struct FlashChip *Chip; - u32 i; - u8 *Buf; - u32 TestPage = 640; - - ModuleInstall_NAND("nand", 0, 0);//安装nand设备 - - Chip = dListEntry(s_ptNandInfo, struct FlashChip, Descr); - - Buf = Chip->Buf; - - memset(Buf, 0x0, (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)); - - Chip->Ops.ErsBlk(TestPage/s_ptNandInfo->PagesPerBlk); - - Chip->Ops.RdPage(TestPage, Buf, NO_ECC | SPARE_REQ); - - //PrintBuf(Buf, (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)); - - for(i = 0; i < s_ptNandInfo->BytesPerPage; i++) - Buf[i] = (u8)i; - - Chip->Ops.WrPage(TestPage, Buf, HW_ECC | SPARE_REQ); - - memset(Buf, 0xFF, (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)); - - Chip->Ops.RdPage(TestPage, Buf, HW_ECC | SPARE_REQ); - - //PrintBuf(Buf, (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)); - - //测试ECC功能,1位出错情况 - // 1次 - Buf[1] = 0; - - Chip->Ops.WrPage(TestPage, Buf, NO_ECC); - - memset(Buf, 0xFF, (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)); - - Chip->Ops.RdPage(TestPage, Buf, HW_ECC | SPARE_REQ); - - //PrintBuf(Buf, (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)); - // 2次 - TestPage++; - Chip->Ops.WrPage(TestPage, Buf, HW_ECC | SPARE_REQ); - - Buf[2] = 0; - Chip->Ops.WrPage(TestPage, Buf, NO_ECC); - - memset(Buf, 0xFF, (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)); - - Chip->Ops.RdPage(TestPage, Buf, HW_ECC | SPARE_REQ); - - //PrintBuf(Buf, (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)); - - // 3次 - TestPage++; - Chip->Ops.WrPage(TestPage, Buf, HW_ECC | SPARE_REQ); - - Buf[3] = 1; - Chip->Ops.WrPage(TestPage, Buf, NO_ECC); - - memset(Buf, 0xFF, (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)); - - Chip->Ops.RdPage(TestPage, Buf, HW_ECC | SPARE_REQ); - - //PrintBuf(Buf, (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)); - - //测试ECC功能,2位出错情况,是不能纠错了 - TestPage++; - Chip->Ops.WrPage(TestPage, Buf, HW_ECC | SPARE_REQ); - - Buf[3] = 0; - Chip->Ops.WrPage(TestPage, Buf, NO_ECC | SPARE_REQ); - - memset(Buf, 0xFF, (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)); - - Chip->Ops.RdPage(TestPage, Buf, HW_ECC | SPARE_REQ); - - //PrintBuf(Buf, (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)); - while(1); -} -//----------------------------------------------------------------------------- -//功能: -//参数: -//返回: -//备注: -//----------------------------------------------------------------------------- -void PageTest(const u32 PageNo, const u8 Init) -{ - volatile u8 *Buf; - u32 i, Ret; - struct FlashChip *Chip; - u32 ECC_Flags = 0; - - if(Init) - { - if(ModuleInstall_NAND("nand", 0, 0)) //安装nand设备 - while(1); - } - - if(HW_ECC_SUPPORTED & s_ptNandInfo->Controller) - ECC_Flags |= HW_ECC; - - if(SW_ECC_SUPPORTED & s_ptNandInfo->Controller) - ECC_Flags |= SW_ECC; - - if(NO_ECC_SUPPORTED & s_ptNandInfo->Controller) - ECC_Flags |= NO_ECC; - - Chip = dListEntry(s_ptNandInfo, struct FlashChip, Descr); - - Buf = Chip->Buf; - - for(i = 0; i < s_ptNandInfo->BytesPerPage; i++) - Buf[i] = (u8)i; - - Chip->Ops.WrPage(PageNo, Buf, ECC_Flags | SPARE_REQ); - - memset(Buf, 0, (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)); - - Ret = Chip->Ops.RdPage(PageNo, Buf, ECC_Flags | SPARE_REQ); - for(i=0; i<(s_ptNandInfo->BytesPerPage); i++) - { - if(((u8)i) != Buf[i]) - while(1); - } - - // ECC一位纠错 - Buf[1] = 0xF0; - - Chip->Ops.WrPage(PageNo, Buf, NO_ECC); - - memset(Buf, 0, (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)); - - Ret = Chip->Ops.RdPage(PageNo, Buf, ECC_Flags | SPARE_REQ); - for(i=0; i<(s_ptNandInfo->BytesPerPage); i++) - { - if(((u8)i) != Buf[i]) - while(1); - } - -} -void BadMarkFunctionCheck(struct FlashChip *Chip) -{ - u32 i; - u32 Blks; - - if(NULL == Chip) - while(1); - - Blks = Chip->Descr.Nand.BlksPerLUN * Chip->Descr.Nand.LUNs; - - for(i = 0; i < Blks; i++) - { - if(Chip->Ops.Special.Nand.MrkBad(i)) - while(1); - } - - for(i = 0; i < Blks; i++) - { - if(-1 != Chip->Ops.Special.Nand.ChkBlk(i)) - while(1); - } -} -void ContinuityTest(struct FlashChip *Chip) -{ - u32 i, j, Len; - u32 Blks, Pages; - s32 BadBlks = 0; - u8 *Temp; - - if(NULL == Chip) - while(1); - - Blks = Chip->Descr.Nand.BlksPerLUN * Chip->Descr.Nand.LUNs; - - for(i = Chip->Descr.Nand.ReservedBlks; i < Blks; i++) - { - if(0 != Chip->Ops.ErsBlk(i)) - { - /* 擦除失败 */ -// TraceDrv(NAND_TRACE_ERROR, "block %d cannot be erased!\r\n", i); - while(1); - } - } - - // 擦除后的校验 - Len = (Chip->Descr.Nand.BytesPerPage + Chip->Descr.Nand.OOB_Size); - Temp = (u8*)malloc(Len); - if(NULL == Temp) - while(1);// 内存不足 - for(i = (Chip->Descr.Nand.ReservedBlks * Chip->Descr.Nand.PagesPerBlk); i < (Blks * Chip->Descr.Nand.PagesPerBlk); i++) - { - if(Len != Chip->Ops.RdPage(i, Temp, SPARE_REQ | NO_ECC)) - while(1); - for(j = 0; j < Len; j++) - { - if(0xFF != Temp[j]) - while(1); - } - } -} - -void ChipRawTest(void) -{ - struct FlashChip *Chip; - u32 i, Ret; - u8 *Buf; - u32 TestPages; - u32 TestBlocks; - u32 ECC_Flags = 0; - u32 ErrorCount = 0; - - if(ModuleInstall_NAND("nand", 0, 0))//安装nand设备 - while(1); - - if(HW_ECC_SUPPORTED & s_ptNandInfo->Controller) - ECC_Flags |= HW_ECC; - - if(SW_ECC_SUPPORTED & s_ptNandInfo->Controller) - ECC_Flags |= SW_ECC; - - if(NO_ECC_SUPPORTED & s_ptNandInfo->Controller) - ECC_Flags |= NO_ECC; - - Chip = dListEntry(s_ptNandInfo, struct FlashChip, Descr); - - Buf = Chip->Buf; - - for(TestBlocks = 0; TestBlocks < s_ptNandInfo->BlksPerLUN; TestBlocks++) - { - Chip->Ops.ErsBlk(TestBlocks); - - for(TestPages = 0; TestPages < s_ptNandInfo->PagesPerBlk; TestPages++) - { - u32 CurPage = TestPages + (TestBlocks * s_ptNandInfo->PagesPerBlk); - memset(Buf, 0xAA, (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)); - Ret = Chip->Ops.RdPage(CurPage, Buf, NO_ECC | SPARE_REQ); - for(i=0; i<(s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size); i++) - { - if(0xFF != Buf[i]) - { - ErrorCount += 1; - //PrintBuf(Buf, (s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)); - while(1); - } - } - - PageTest(CurPage, 0); - } - } - - - for(TestBlocks = 0; TestBlocks < s_ptNandInfo->BlksPerLUN; TestBlocks++) - { - if(Chip->Ops.ErsBlk(TestBlocks)) - while(1); - } - - - BadMarkFunctionCheck(Chip); - - ContinuityTest(Chip); - - while(1); -} -#else - -// ============================================================================ -// 功能：nand 命令 -// 参数：ucmd -- 命令； -// 其他 -- 命令参数； -// 返回： -// 备注： -// ============================================================================ -s32 __nand_req(enum ucmd cmd, ptu32_t args, ...) -{ - s32 res = 0; - - switch(cmd) - { - case whichblock: - { - va_list list; - u32 *block; - s64 unit; - - block = (u32*)args; - va_start(list, args); - unit = (s64)va_arg(list, u32); - va_end(list); - *block = unit / s_ptNandInfo->PagesPerBlk; - break; - } - - case totalblocks: - { - // args = &blocks - *((u32*)args) = s_ptNandInfo->BlksPerLUN * s_ptNandInfo->LUNs; - break; - } - - case blockunits: - { - // args = &units - *((u32*)args) = s_ptNandInfo->PagesPerBlk; - break; - } - - case unitbytes: - { - // args = &bytes - *((u32*)args) = s_ptNandInfo->BytesPerPage; - break; - } - - case checkbad: - { - if(badslocation==(u32)args) - res = 1; - else - res = S3C2416_BadChk((u32)args); // args = block - - break; - } - - case savebads: - { - struct uopt opt = {0}; - opt.main = 1; - if(0 != __nand_write(badslocation, (void*)args, opt)) // 坏块表放置在第0页 - res = -1; - - break; - } - - case getbads: - { - struct uopt opt = {0}; - u32 **table = (u32**)args; - - opt.main = 1; - if(!(*table)) - { - res = 1; - } - else - { - res = __nand_read(badslocation, (void*)(*table), opt); // 坏块表放置在第0页 - } - - break; - } - - case markbad: - { - res = S3C2416_BadMark((u32)args); // args = block - break; - } - - case format: - { - va_list list; - s32 start, end; - u8 *tmp, escape = 0; - struct uesz *sz; - struct uopt opt = {0}; - - start = (u32)args; - va_start(list, args); - end = va_arg(list, u32); - sz = (struct uesz*)va_arg(list, u32); - va_end(list); - - if(!sz->block) - return (-1); - - tmp = malloc(s_ptNandInfo->BytesPerPage); - if(!tmp) - return (-1); - - opt.main = 1; - if(0 ==__nand_read(badslocation, (void*)(tmp), opt)) // 读坏块表 - { - if(nandvalidbads((u32*)tmp)) - escape = 1; // 存在坏块表，不擦除； - - if(-1 == (s32)end) - end = s_ptNandInfo->BlksPerLUN * s_ptNandInfo->LUNs; - - do - { - if((badslocation == (--end)) && escape) // 坏块表在第一页 - continue; - - if(__nand_erase((s64)end, *sz)) - { - res = -1; - break; - } - } - while(end!=start); - } - else - { - res = -1; - } - - free(tmp); - break; - } - - default: res = -1; break; - } - - return (res); -} - -// ============================================================================ -// 功能：nand 读； -// 参数：unit -- 读的序号（页）； -// data -- 读的数据； -// opt -- 读的方式； -// 返回：成功 -- （0）；失败 -- （-1） -// 备注： -// ============================================================================ -s32 __nand_read(s64 unit, void *data, struct uopt opt) -{ - u32 flags = 0; - s32 res; - nandbadfreeunit(badstable, &unit, __nand_req); - if(opt.hecc) - flags |= HW_ECC; - else if(opt.secc) - flags |= SW_ECC; - else - flags |= NO_ECC; - - if(opt.main) - { - if(opt.spare) - flags |= SPARE_REQ; - - res = S3C2416_PageRead((u32)unit, (u8*)data, flags); - if (!((SPARE_REQ & flags) || (HW_ECC & flags))) - { - if(res != (s32)s_ptNandInfo->BytesPerPage) - { - return (-1); - } - } - else - { - if(res != (s32)(s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)) - { - return (-1); - } - } - } - else - { - res = S3C2416_SpareRead((u32)unit, (u8*)data); - if(res != (s32)s_ptNandInfo->OOB_Size) - { - return (-1); - } - } - - return (0); -} - -// ============================================================================ -// 功能：nand 写； -// 参数：unit -- 写的序号（页）； -// data -- 写的数据； -// opt -- 写的方式； -// 返回：成功 -- （0）；失败 -- （-1） -// 返回： -// 备注： -// ============================================================================ -s32 __nand_write(s64 unit, void *data, struct uopt opt) -{ - u32 flags = 0; - s32 res; - nandbadfreeunit(badstable, &unit, __nand_req); - if(opt.hecc) - flags |= HW_ECC; - else if(opt.secc) - flags |= SW_ECC; - else - flags |= NO_ECC; - - if(opt.main) - { - if(opt.spare) - flags |= SPARE_REQ; - - res = S3C2416_PageProgram((u32)unit, (u8*)data, flags); - if (!((SPARE_REQ & flags) || (HW_ECC & flags))) - { - if(res != (s32)(s_ptNandInfo->BytesPerPage)) - { - return (-1); - } - } - else - { - if(res != (s32)(s_ptNandInfo->BytesPerPage + s_ptNandInfo->OOB_Size)) - { - return (-1); - } - } - } - else - { - res = S3C2416_SpareProgram((u32)unit, (u8*)data); - if(res != (s32)s_ptNandInfo->OOB_Size) - { - return (-1); - } - } - - return (0); -} - -// ============================================================================ -// 功能：nand 擦除 -// 参数：unit -- 擦除的序号； -// sz -- 擦除的单位（unit或block） -// 返回：成功 -- （0）；失败 -- （-1） -// 备注： -// ============================================================================ -s32 __nand_erase(s64 unit, struct uesz sz) -{ - u32 block; - - if(sz.unit) - { - nandbadfreeunit(badstable, &unit, __nand_req); - block = (u32)(unit / s_ptNandInfo->PagesPerBlk); - } - else - { - block = unit; - nandbadfreeblock(badstable, &block, __nand_req); - } - - return (S3C2416_BlockErase(block)); -} - -// ============================================================================ -// 功能： -// 参数： -// 返回： -// 备注： -// ============================================================================ -static s32 __nand_init(void) -{ - s_ptNandInfo = malloc(sizeof(*s_ptNandInfo)); - if(!s_ptNandInfo) - return (-1); - - S3C2416_NAND_ControllerConfig();// 芯片管脚等基本配置() - if(S3C2416_GetNandDescr(s_ptNandInfo)) - { - free(s_ptNandInfo); - s_ptNandInfo = NULL; - return (-1); - } - NandFlashLock = Lock_MutexCreate("Nand Flash Lock"); //创建nand的互斥锁 - s_ptNandInfo->ReservedBlks = 0; - s_ptNandInfo->Controller = HW_ECC_SUPPORTED; - s_ptNandInfo->BadMarkOffset = s_ptNandInfo->OOB_Size - 4 - 1; - return (0); -} - -// ============================================================================ -// 功能：把nand和文件系统关联起来 -// 参数：fs -- 需要挂载的文件系统，mediadrv -- 媒体驱动， -// bstart -- 起始块，bend -- 结束块（不包括该块，只到该块的上一块） -// 返回：0 -- 成功， -1 -- 失败 -// 备注： -// ============================================================================ -s32 __nand_FsInstallInit(const char *fs, s32 bstart, s32 bend, void *mediadrv) -{ - char *FullPath,*notfind; - struct Object *targetobj; - struct FsCore *super; - s32 res,BlockNum; - targetobj = OBJ_MatchPath(fs, ¬find); - if(notfind) - { - error_printf("nand"," not found need to install file system.\r\n"); - return -1; - } - super = (struct FsCore *)OBJ_GetPrivate(targetobj); - super->MediaInfo = nand_umedia; - super->MediaDrv = mediadrv; - if(-1 == (s32)bend) - { - bend = s_ptNandInfo->BlksPerLUN * s_ptNandInfo->LUNs; - BlockNum = bend - bstart; - } - else - { - BlockNum = bend - bstart; - } - super->AreaSize = s_ptNandInfo->BytesPerPage * s_ptNandInfo->PagesPerBlk * BlockNum; - super->MediaStart = bstart*s_ptNandInfo->PagesPerBlk; // 起始unit号 - - res = strlen(NandFlashName)+strlen(s_ptDeviceRoot->name) + 1; - FullPath = malloc(res); - memset(FullPath, 0, res); - sprintf(FullPath, "%s/%s", s_ptDeviceRoot->name,NandFlashName); //获取该设备的全路径 - File_BeMedia(FullPath,fs); //往该设备挂载文件系统 - free(FullPath); - - printf("\r\n: info : device : %s added(start:%d, end:%d).", fs, bstart, bend); - return (0); -} - diff --git a/bsp/cpudrv/freescale/imx6q/src/nude_io/cpu_peri_nude_io.c b/bsp/cpudrv/freescale/imx6q/src/nude_io/cpu_peri_nude_io.c deleted file mode 100644 index 51bbb0d5c947885967b53f7cdc77e47d78465c19..0000000000000000000000000000000000000000 --- a/bsp/cpudrv/freescale/imx6q/src/nude_io/cpu_peri_nude_io.c +++ /dev/null @@ -1,78 +0,0 @@ -#include "board-config.h" -#include "stdint.h" -#include "string.h" -#include "cpu_peri.h" -//#include "nude_io.h" - - -u8 Nude_ScanByte(void) -{ - u32 fifo_reg; - for(;;) - { - fifo_reg = pg_uart0_reg->UFSTAT; - if((fifo_reg & 0x3f) != 0) - return pg_uart0_reg->URXH; - } -} -bool_t Nude_ReadByte(u8 *byte) -{ - u32 fifo_reg; - fifo_reg = pg_uart0_reg->UFSTAT; - if((fifo_reg & 0x3f) != 0) - { - *byte = pg_uart0_reg->URXH; - return true; - }else - return false; -} - -void Nude_PrintfByte(u8 byte) -{ - u32 fifo_reg; - for(;;) - { - fifo_reg = pg_uart0_reg->UFSTAT; - if(((fifo_reg>>8) & 0x3f) < 0x3f) - { - pg_uart0_reg->UTXH = byte; - return ; - } - } -} - -void Nude_PrintfStr(u8 *str) -{ - u32 i=0; - while(str[i] != 0) - { - Nude_PrintfByte(str[i]); - i++; - } -} - -void Nude_PrintfHex(u32 hex,u32 size) -{ - u8 uni; - if((size < 1 )|| (size >8)) - return ; - for(;size > 0; size--) - { - uni = (hex >>(size*4-4))&0xf; - if(uni < 10) - Nude_PrintfByte(uni+0x30); - else - Nude_PrintfByte(uni+0x37); - } -} - -bool_t Nude_TerminalInit(void) -{ - u32 temp; - //初始化IO端口位uart功能 - //Ports : GPH10 GPH9 GPH8 GPH7 GPH6 GPH5 GPH4 GPH3 GPH2 GPH1 GPH0 - //Signal : xx xx xx xx xx xx xx RXD0 TXD0 nRTS0 nCTS0 - //Binary : xx xx xx xx xx xx xx xx xx xx xx - - return true; -} diff --git a/bsp/cpudrv/freescale/imx6q/src/peri/cpu_peri.c b/bsp/cpudrv/freescale/imx6q/src/peri/cpu_peri.c deleted file mode 100644 index dd69d2baf85756b386665c4914f802074602a2a8..0000000000000000000000000000000000000000 --- a/bsp/cpudrv/freescale/imx6q/src/peri/cpu_peri.c +++ /dev/null @@ -1,56 +0,0 @@ -#include "cpu_peri.h" -#include "project_config.h" //本文件由IDE中配置界面生成，存放在APP的工程目录中。 - //允许是个空文件，所有配置将按默认值配置。 - -//@#$%component configure ****组件配置开始，用于 DIDE 中图形化配置界面 -//****配置块的语法和使用方法，参见源码根目录下的文件：component_config_readme.txt**** -//%$#@initcode ****初始化代码开始，由 DIDE 删除“//”后copy到初始化文件中 -//%$#@end initcode ****初始化代码结束 - -//%$#@describe ****组件描述开始 -//component name:"cpu peripheral register definition"//CPU外设数据结构定义 -//parent:"none" //填写该组件的父组件名字，none表示没有父组件 -//attribute:bsp //选填“third、system、bsp、user”，本属性用于在IDE中分组 -//select:choosable //选填“required、choosable、none”，若填必选且需要配置参数，则IDE裁剪界面中默认勾取， - //不可取消，必选且不需要配置参数的，或是不可选的，IDE裁剪界面中不显示， -//init time:none //初始化时机，可选值：early，medium，later, pre-main。 - //表示初始化时间，分别是早期、中期、后期 -//dependence:"none" //该组件的依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件将强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//weakdependence:"none" //该组件的弱依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件不会被强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//mutex:"none" //该组件的互斥组件名（可以是none，表示无互斥组件）， - //如果与多个组件互斥，则依次列出，用“,”分隔 -//%$#@end describe ****组件描述结束 - -//%$#@configue ****参数配置开始 -#if ( CFG_MODULE_ENABLE_CPU_PERIPHERAL_REGISTER_DEFINITION == false ) -//#warning " cpu_peripheral_register_definition 组件参数未配置，使用默认配置" -//%$#@target = header //header = 生成头文件,cmdline = 命令行变量，DJYOS自有模块禁用 -#define CFG_MODULE_ENABLE_CPU_PERIPHERAL_REGISTER_DEFINITION false //如果勾选了本组件，将由DIDE在project_config.h或命令行中定义为true -//%$#@num,0,100, -//%$#@enum,true,false, -//%$#@string,1,10, -//%$#select, ***从列出的选项中选择若干个定义成宏 -//%$#@free, -#endif -//%$#@end configue ****参数配置结束 -//@#$%component end configure - -struct dummy { - int regs[100]; -}; - -struct dummy dummy[1]; - -struct INTC_REG *pg_int_reg = dummy; -struct GPIO_REG *pg_gpio_reg = dummy; -struct UART_REG *pg_uart0_reg = dummy; -struct UART_REG *pg_uart1_reg = dummy; -struct UART_REG *pg_uart2_reg = dummy; -struct UART_REG *pg_uart3_reg = dummy; -struct NFC_REG *pg_nand_reg = dummy; -struct TIMER_REG *pg_timer_reg = dummy; -struct WDT_REG *pg_wdt_reg = dummy; diff --git a/bsp/cpudrv/freescale/imx6q/src/rtc/cpu_peri_rtc.c b/bsp/cpudrv/freescale/imx6q/src/rtc/cpu_peri_rtc.c deleted file mode 100644 index f8fa594c7ee4c7a96abf88b436de6cf0a951b5ce..0000000000000000000000000000000000000000 --- a/bsp/cpudrv/freescale/imx6q/src/rtc/cpu_peri_rtc.c +++ /dev/null @@ -1,158 +0,0 @@ -#include "stdint.h" -#include "os.h" -#include "time.h" -#include "cpu_peri_rtc.h" - -#include "project_config.h" //本文件由IDE中配置界面生成，存放在APP的工程目录中。 - //允许是个空文件，所有配置将按默认值配置。 - -//@#$%component configure ****组件配置开始，用于 DIDE 中图形化配置界面 -//****配置块的语法和使用方法，参见源码根目录下的文件：component_config_readme.txt**** -//%$#@initcode ****初始化代码开始，由 DIDE 删除“//”后copy到初始化文件中 -// ModuleInstall_RTC(0); -//%$#@end initcode ****初始化代码结束 - -//%$#@describe ****组件描述开始 -//component name:"cpu onchip rtc"//CPU的rtc外设驱动 -//parent:"rtc" //填写该组件的父组件名字，none表示没有父组件 -//attribute:bsp //选填“third、system、bsp、user”，本属性用于在IDE中分组 -//select:choosable //选填“required、choosable、none”，若填必选且需要配置参数，则IDE裁剪界面中默认勾取， - //不可取消，必选且不需要配置参数的，或是不可选的，IDE裁剪界面中不显示， -//init time:medium //初始化时机，可选值：early，medium，later, pre-main。 - //表示初始化时间，分别是早期、中期、后期 -//dependence:"time" //该组件的依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件将强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//weakdependence:"none" //该组件的弱依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件不会被强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//mutex:"none" //该组件的互斥组件名（可以是none，表示无互斥组件）， - //如果与多个组件互斥，则依次列出，用“,”分隔 -//%$#@end describe ****组件描述结束 - -//%$#@configue ****参数配置开始 -#if ( CFG_MODULE_ENABLE_CPU_ONCHIP_RTC == false ) -//#warning " cpu_onchip_rtc 组件参数未配置，使用默认配置" -//%$#@target = header //header = 生成头文件,cmdline = 命令行变量，DJYOS自有模块禁用 -#define CFG_MODULE_ENABLE_CPU_ONCHIP_RTC false //如果勾选了本组件，将由DIDE在project_config.h或命令行中定义为true -//%$#@num,0,100, -//%$#@enum,true,false, -//%$#@string,1,10, -//%$#select, ***从列出的选项中选择若干个定义成宏 -//%$#@free, -#endif -//%$#@end configue ****参数配置结束 -//@#$%component end configure - - -#define HexToBcd(x) ((((x) / 10) <<4) + ((x) % 10)) -#define BcdToHex(x) ((((x) & 0xF0) >>4) * 10 + ((x) & 0x0F)) - -//// ============================================================================= -//// 功能：RTC中断，使用RTC模块的TICK计数器，配置为每一秒中断一次，并在中断中读取RTC -//// 时钟，并配置系统时钟 -//// 参数：中断线号 -//// 返回：0 -//// ============================================================================= -//u32 RTC_ISR(ufast_t rtc_int_line) -//{ -// struct tm dtm; -// -// rRTCCON = 1 ; //RTC read and write enable -// dtm.tm_year = BcdToHex(rBCDYEAR) + 2000; -// dtm.tm_mon = BcdToHex(rBCDMON); -// dtm.tm_mday = BcdToHex(rBCDDATE); -// dtm.tm_hour = BcdToHex(rBCDHOUR); -// dtm.tm_min = BcdToHex(rBCDMIN); -// dtm.tm_sec = BcdToHex(rBCDSEC); -// rRTCCON &= ~1 ; //RTC read and write disable -// -// Time_SetDateTime(&dtm); // 向OS的Clock模块传递新的时间值 -// return 0; -//} - -// ============================================================================= -// 功能：RTC时钟更新，将系统时间更新到RTC模块，由于时钟模块的年存储的最大值为99，因此 -// 本RTC模块设计从2000为起始值，如2014，则RTC模块的rBCDYEAR存储的是14 -// 参数：dtm，更新时间 -// 返回：true,成功;false,失败 -// ============================================================================= -bool_t RTC_SetTime(s64 time) -{ - bool_t result = false; - struct tm dtm; - s64 time_s; - - time_s = time/1000000; - Time_LocalTime_r(&time_s,&dtm); - - if((dtm.tm_year > 2000) && (dtm.tm_year < 2099)) - { - rRTCCON = 1 ; //RTC read and write enable - rBCDYEAR = HexToBcd(dtm.tm_year - 2000); - rBCDMON = HexToBcd(dtm.tm_mon); - rBCDDATE = HexToBcd(dtm.tm_mday); - rBCDHOUR = HexToBcd(dtm.tm_hour); - rBCDMIN = HexToBcd(dtm.tm_min); - rBCDSEC = HexToBcd(dtm.tm_sec); - rRTCCON &= ~1 ; //RTC read and write disable - result = true; - } - return result; -} - -// ============================================================================= -// 功能：获取RTC时钟，读取RTC模块的时间，由于时钟模块的年存储的最大值为99，因此需将读 -// 到的年份加基数年2000，如，读RTC模块的rBCDYEAR为14，则为2014年 -// 参数：dtm，更新时间 -// 返回：true -// ============================================================================= -bool_t RTC_GetTime(s64 *time) -{ - struct tm dtm; - - rRTCCON = 1 ; //RTC read and write enable - dtm.tm_year = BcdToHex(rBCDYEAR) + 2000; - dtm.tm_mon = BcdToHex(rBCDMON); - dtm.tm_mday = BcdToHex(rBCDDATE); - dtm.tm_hour = BcdToHex(rBCDHOUR); - dtm.tm_min = BcdToHex(rBCDMIN); - dtm.tm_sec = BcdToHex(rBCDSEC); - dtm.tm_us = 0; - rRTCCON &= ~1 ; //RTC read and write disable - - *time = 1000000 * Time_MkTime(&dtm); - return true; -} - -// ============================================================================= -// 功能：初始化RTC模块.若时钟计数器复位过，则设置默认时间，否则读RTC时间，并配置系统 -// 时间 -// 参数：模块初始化函数没有参数 -// 返回：true = 成功初始化，false = 初始化失败 -// ============================================================================= -ptu32_t ModuleInstall_RTC(ptu32_t para) -{ - struct tm DateTime; - bool_t RtcIsReset = false; - - //判断时钟计数器是否被复位，即是否断电池 - rRTCCON = 1 ; - RtcIsReset = rRTCCON & (1<<3); - rRTCCON &= ~1 ; - - if(RtcIsReset == true) - { - DateTime.tm_us = 0; - DateTime.tm_sec = 0; - DateTime.tm_min = 0; - DateTime.tm_hour = 0; - DateTime.tm_mday = 1; - DateTime.tm_mon = 1; - DateTime.tm_year = 2000; - RTC_SetTime(&DateTime); - Time_SetDateTime(&DateTime); - } - Rtc_RegisterDev(RTC_GetTime,RTC_SetTime); - return true; -} diff --git a/bsp/cpudrv/freescale/imx6q/src/sdi/cpu_peri_sdi.c b/bsp/cpudrv/freescale/imx6q/src/sdi/cpu_peri_sdi.c deleted file mode 100644 index 6240922a280f715b2684e6e5554bae0f89ea0bc2..0000000000000000000000000000000000000000 --- a/bsp/cpudrv/freescale/imx6q/src/sdi/cpu_peri_sdi.c +++ /dev/null @@ -1,563 +0,0 @@ -#include "stdint.h" -#include -#include -#include "cpu_peri.h" - -/************************SD卡命令说明**************************************** -Class0 :(卡的识别、初始化等基本命令集) -cmd0:复位SD 卡. -CMD1:读OCR寄存器. -cmd9:读CSD寄存器. -CMD10:读CID寄存器. -CMD12:停止读多块时的数据传输 -cmd13:读 Card_Status 寄存器 - -Class2 (读卡命令集): -CMD16:设置块的长度 -CMD17:读单块. -CMD18:读多块,直至主机发送CMD12为止 . - -Class4(写卡命令集) : -CMD24:写单块. -CMD25:写多块. -CMD27:写CSD寄存器 . - -Class5 (擦除卡命令集): -CMD32:设置擦除块的起始地址. -CMD33:设置擦除块的终止地址. -CMD38: 擦除所选择的块. - -Class6(写保护命令集): -CMD28:设置写保护块的地址. -CMD29:擦除写保护块的地址. -CMD30: Ask the card for the status of the write protection bits - -class7：卡的锁定，解锁功能命令集 -class8：申请特定命令集 。 -class10 －11 ：保留 -*/ - -unsigned int Tx_buf[128]; //128[word]*4bit=512[byte] -unsigned int Rx_buf[128]; //128[word]*4bit=512[byte] -volatile unsigned int rd_cnt; -volatile unsigned int wt_cnt; -int MMC=0; // 0:SD , 1:MMC 留着，以后MMC卡使用 -volatile int RCA; - -//----大小端相互转换--------------------------------------------------- -//功能：int类型的，大小端随意转换(即小端可以转为大端，大端也可以转为小端) -//参数：inta， int类型参数 -// intb， int类型参数 -//返回： -//--------------------------------------------------------------------- -void byte_conversion(uint32_t *inta,uint32_t *intb) -{ - uint8_t *a_byte; - uint8_t *b_byte; - - a_byte=(uint8_t *)inta; - b_byte=(uint8_t *)intb; - b_byte[3]=a_byte[0]; - b_byte[2]=a_byte[1]; - b_byte[1]=a_byte[2]; - b_byte[0]=a_byte[3]; - -} - - -//----SD卡选择-------------------------------------------------------- -//功能：本函数是用来选择一张SD卡 -//参数：sel_desel -//返回：1，成功 -// 0，失败 -//--------------------------------------------------------------------- - -void card_sel_desel(char sel_desel) -{ - //-- Card select or deselect - if(sel_desel) - { -RECMDS7: - rSDICARG=RCA<<16; // CMD7(RCA,stuff bit) - rSDICCON= (0x1<<9)|(0x1<<8)|0x47; // sht_resp, wait_resp, start, CMD7 - //发送CMD7，实现对卡的选择 - if(!chk_cmd_end(7, 1)) - goto RECMDS7; - rSDICSTA=0xa00; // Clear cmd_end(with rsp) - //--State(transfer) check - if( (rSDIRSP0 & 0x1e00) !=0x800 ) - goto RECMDS7; - } - else - { -RECMDD7: - rSDICARG=0<<16; //CMD7(RCA,stuff bit) - rSDICCON=(0x1<<8)|0x47; //no_resp, start, CMD7 - //发送CMD7，实现对卡的选择 - if(!chk_cmd_end(7, 0)) - goto RECMDD7; - rSDICSTA=0x800; // Clear cmd_end(no rsp) - } -} -//----读一扇区-------------------------------------------------------- -//功能：本函数是用来读取SD卡指定某一扇区 -//参数：addr，扇区号 -// buf，缓冲区 -//返回： -//--------------------------------------------------------------------- - -void read_one_sector(u32 sector_addr,unsigned int *buf) -{ - unsigned int value; - int status; - - rd_cnt=0; - rSDIFSTA=rSDIFSTA|(1<<16); // FIFO reset -/* - 保留 [31:25] - Burst4 enable [24] 在DMA模式下使能Burst4。仅当数据大小是字时该位被 - (Burst4) 置位。0：无效 1：Burst4使能 - - Data Size [23:22] 指出用FIFO传输的大小，哪个类型，半字或字。00 = 字节 - (DataSize) 传输，01 =半字传输 10 = 字传输， 11 = 保留 - - SDIO Interrupt [21] 决定SDIO的中断周期是 2个周期还是外部更多周期，当数据块 - Period Type(PrdType) 最后被发送（对SDIO）。0=正好两个周期 1=更多周期（像单周期） - - Transmit After [20] 决定数据传输在响应收到后开始或不开始。0= 在DatMode设置后直接 - Response(TARSP) 1= 在响应收到后（假定设置DatMode设为 2b11） - - Receive After [19] 决定数据传输在命令发出后开始或不开始 0= 在DatMode设置后直接 - Command(RACMD) 1= 在命令发出后（假定设置DatMode设为2b10） - - Busy After [18] 决定忙接收在命令发出后开始或不开始 0= 在DatMode设置后直接 - Command(BACMD) 1= 在命令发出后（假定设置DatMode设为2b01） - - Block mode [17] 数据传输模式 0=流数据传输 1=模块数据传输 - (BlkMode) - - Wide bus [16] 决定使能宽总线模式 0：标准总线模式（仅使用SDIDAT[0]） - enable(WideBus) 1：宽总线模式（使用SDIDAT[3]） - - DMA Enable [15] 使能DMA（当DMA操作完成时，该位应该无效） - (EnDMA) 0：无效（查询） 1：DMA使能 - - Data Transfer [14] 决定数据传输是否开始，该位自动清除。 - Start(DTST) 0：数据准备好， 1：数据开始 - - Data Transfer [13:12] 决定数据传输的方向 00 =无操作， 01 = 仅忙检测模式 - Mode (DatMode) 10 =数据接收模式，11 =数据发送模式 - - BlkNum [11:0] 模块数(0~4095)，当流模式时不考虑 -*/ - rSDIDCON=(2<<22)|(1<<19)|(1<<17)|(1<<16)|(1<<14)|(2<<12)|(1<<0); - //rSDIDCON，[11:0] 我设置是1，所以这里block_addr，必须是地址，而不是扇区号 - //移动9位，512字节。这样，block_addr就变成了"扇区号"了 - rSDICARG=sector_addr<<9; // CMD17/18(addr) - - //开始准备读取数据 - - rSDICCON=(0x1<<9)|(0x1<<8)|0x51; // sht_resp, wait_resp, dat, start, CMD17 - if(!chk_cmd_end(17, 1)) //-- Check end of CMD17 - return ; - rSDICSTA=0xa00; // Clear cmd_end(with rsp) - while(rd_cnt<128) // 128word=512byte - { - if((rSDIDSTA&0x20)==0x20) // Check timeout - { - rSDIDSTA=(0x1<<0x5); // Clear timeout flag - break; - } - status=rSDIFSTA; - if((status&0x1000)==0x1000) // Is Rx data? - { - value = rSDIDAT; - byte_conversion(&value,buf); - *buf++; - rd_cnt++; - } - } - //-- Check end of DATA - if(!chk_dat_end()) - return ; - - rSDIDCON=rSDIDCON&~(7<<12); - rSDIFSTA=rSDIFSTA&0x200; //Clear Rx FIFO Last data Ready, YH 040221 - rSDIDSTA=0x10; // Clear data Tx/Rx end detect - -} -//----写一扇区-------------------------------------------------------- -//功能：本函数是用来把数据写入SD卡指定某一扇区 -//参数：addr，扇区号 -// buf，缓冲区 -//返回： -//--------------------------------------------------------------------- -void write_one_sector(u32 sector_addr,unsigned int *buf) -{ - u32 value; - int status; - - buf=(u32*)buf;//由于FAT是是以u8传入。不知道上面是否强制转换了 - wt_cnt=0; - rSDIFSTA=rSDIFSTA|(1<<16); //YH 040223 FIFO reset - /* - 保留 [31:25] - Burst4 enable [24] 在DMA模式下使能Burst4。仅当数据大小是字时该位被 - (Burst4) 置位。0：无效 1：Burst4使能 - - Data Size [23:22] 指出用FIFO传输的大小，哪个类型，半字或字。00 = 字节 - (DataSize) 传输，01 =半字传输 10 = 字传输， 11 = 保留 - - SDIO Interrupt [21] 决定SDIO的中断周期是 2个周期还是外部更多周期，当数据块 - Period Type(PrdType) 最后被发送（对SDIO）。0=正好两个周期 1=更多周期（像单周期） - - Transmit After [20] 决定数据传输在响应收到后开始或不开始。0= 在DatMode设置后直接 - Response(TARSP) 1= 在响应收到后（假定设置DatMode设为 2b11） - - Receive After [19] 决定数据传输在命令发出后开始或不开始 0= 在DatMode设置后直接 - Command(RACMD) 1= 在命令发出后（假定设置DatMode设为2b10） - - Busy After [18] 决定忙接收在命令发出后开始或不开始 0= 在DatMode设置后直接 - Command(BACMD) 1= 在命令发出后（假定设置DatMode设为2b01） - - Block mode [17] 数据传输模式 0=流数据传输 1=模块数据传输 - (BlkMode) - - Wide bus [16] 决定使能宽总线模式 0：标准总线模式（仅使用SDIDAT[0]） - enable(WideBus) 1：宽总线模式（使用SDIDAT[3]） - - DMA Enable [15] 使能DMA（当DMA操作完成时，该位应该无效） - (EnDMA) 0：无效（查询） 1：DMA使能 - - Data Transfer [14] 决定数据传输是否开始，该位自动清除。 - Start(DTST) 0：数据准备好， 1：数据开始 - - Data Transfer [13:12] 决定数据传输的方向 00 =无操作， 01 = 仅忙检测模式 - Mode (DatMode) 10 =数据接收模式，11 =数据发送模式 - - BlkNum [11:0] 模块数(0~4095)，当流模式时不考虑 -*/ - rSDIDCON=(2<<22)|(1<<20)|(1<<17)|(1<<16)|(1<<14)|(3<<12)|(1<<0); - //扇区号转为地址，移动9位，是512字节的意思 - rSDICARG=sector_addr<<9; // CMD24/25(addr) - rSDICCON=(0x1<<9)|(0x1<<8)|0x58; //sht_resp, wait_resp, dat, start, CMD24 - if(!chk_cmd_end(24, 1)) //-- Check end of CMD24 - return; - rSDICSTA=0xa00; // Clear cmd_end(with rsp) - while(wt_cnt<128) - { - status=rSDIFSTA; - if((status&0x2000)==0x2000) - { - byte_conversion(buf,&value); - rSDIDAT=value; - *buf++; - wt_cnt++; - } - } - if(!chk_dat_end()) - return; - //Clear Data Transfer mode => no operation,Cleata - //Data Transfer start - rSDIDCON=rSDIDCON&~(7<<12); - rSDIDSTA=0x10; // Clear data Tx/Rx end -} - -//----检查命令发送----------------------------------------------------- -//功能：判断命令是否发送成功 -//参数：cmd，sd卡的命令，见本文件头部注释[sd卡命令说明] -// be_resp，1 有应答，0无应答 -//返回：1，成功 -// 0，time out -//--------------------------------------------------------------------- - -int chk_cmd_end(int cmd, int be_resp) -{ - int finish0; - - if(!be_resp) // No response - { - finish0=rSDICSTA; - while((finish0&0x800)!=0x800) // Check cmd end - finish0=rSDICSTA; - - rSDICSTA=finish0;// Clear cmd end state - - return 1; - } - else // With response - { - finish0=rSDICSTA; - // Check cmd/rsp end - //debug 这个是bug，如果没有SD卡，那么不就是在这里一直循环 - //有空了修改一下 - while( !( ((finish0&0x200)==0x200) | ((finish0&0x400)==0x400) )) - finish0=rSDICSTA; - if((cmd==1) | (cmd==41)) // CRC no check, cmd9 is a long Resp. command. - { - if( (finish0&0xf00) != 0xa00 ) // Check error - { - rSDICSTA=finish0; // Clear error state - - if(((finish0&0x400)==0x400)) - return 0; // Timeout error - } - rSDICSTA=finish0; // Clear cmd & rsp end state - } - else // CRC check - { - if( (finish0&0x1f00) != 0xa00 ) // Check error - { - rSDICSTA=finish0; // Clear error state - - if(((finish0&0x400)==0x400)) - return 0; // Timeout error - } - rSDICSTA=finish0; - } - return 1; - } -} -//----检查数据结束----------------------------------------------------- -//功能：检查数据发送或者接收完毕，以及是否超时 -//参数：cmd，sd卡的命令，见本文件头部注释[sd卡命令说明] -// be_resp，是否回应 -//返回：1，成功 -// 0，失败， -//--------------------------------------------------------------------- -int chk_dat_end(void) -{ - int finish; - - finish=rSDIDSTA; - while( !( ((finish&0x10)==0x10) | ((finish&0x20)==0x20) )) - // Chek timeout or data end - finish=rSDIDSTA; - - if( (finish&0xfc) != 0x10 ) - { - rSDIDSTA=0xec; // Clear error state - return 0; - } - return 1; -} - -//---使卡进入IDEL状态----------------------------------------------------- -//功能：使卡进入IDEL状态 -//参数：无 -//返回：无 -//--------------------------------------------------------------------- - -void cmd0(void) -{ - //-- Make card idle state - rSDICARG=0x0; // cmd0(stuff bit) - rSDICCON=(1<<8)|0x40; // No_resp, start, cmd0 - - //-- Check end of cmd0 - chk_cmd_end(0, 0); - rSDICSTA=0x800; // Clear cmd_end(no rsp) -} -//---检查是否是MMC卡--------------------------------------------------- -//功能：检查是否是MMC卡，并且设置目标工作电压 -//参数：无 -//返回：无 -//--------------------------------------------------------------------- -int chk_MMC_OCR(void) -{ - int i; - - for(i=0;i<100;i++) //Negotiation time is dependent on CARD Vendors. - { - rSDICARG=0xff8000; //CMD1(SD OCR:2.7V~3.6V) - rSDICCON=(0x1<<9)|(0x1<<8)|0x41; //sht_resp, wait_resp, start, CMD1 - //YH 0903 [31]:Card Power up status bit (busy) - if(chk_cmd_end(1, 1) && (rSDIRSP0>>16)==0x80ff) - { - rSDICSTA=0xa00; // Clear cmd_end(with rsp) - return 1; // Success - } - } - rSDICSTA=0xa00; // Clear cmd_end(with rsp) - return 0; // Fail -} -//---检查是否是SD卡--------------------------------------------------- -//功能：检查是否是SD卡，并且设置目标工作电压 -//参数：无 -//返回：无 -//--------------------------------------------------------------------- -int chk_SD_OCR(void) -{ - int i; - - //-- Negotiate operating condition for SD, it makes card ready state - for(i=0;i<50;i++) //If this time is short, init. can be fail. - { - cmd55(); // Make ACMD - - rSDICARG=0xff8000; //ACMD41(SD OCR:2.7V~3.6V) - rSDICCON=(0x1<<9)|(0x1<<8)|0x69;//sht_resp, wait_resp, start, ACMD41 - - //-- Check end of ACMD41 - if( (chk_cmd_end(41, 1) & rSDIRSP0)==0x80ff8000 ) - { - rSDICSTA=0xa00; // Clear cmd_end(with rsp) - - return 1; // Success - } - DJY_DelayUs(200000); // Wait Card power up status - } - rSDICSTA=0xa00; // Clear cmd_end(with rsp) - return 0; // Fail -} -//---检测卡是否插入--------------------------------------------------- -//功能：检测卡是否插入 -//参数：无 -//返回：1 成功，0 失败 -//--------------------------------------------------------------------- - -int cmd55(void) -{ - //--Make ACMD - rSDICARG=RCA<<16; //CMD7(RCA,stuff bit) - rSDICCON=(0x1<<9)|(0x1<<8)|0x77; //sht_resp, wait_resp, start, cmd55 - - //-- Check end of cmd55 - if(!chk_cmd_end(55, 1)) - return 0; - - rSDICSTA=0xa00; // Clear cmd_end(with rsp) - return 1; -} -//---获取卡内状态--------------------------------------------------- -//功能：获取卡内状态 -//参数：无 -//返回：1 成功 -// 0 失败 -//--------------------------------------------------------------------- - -int cmd13(void)//SEND_STATUS -{ - int response0; - - rSDICARG=RCA<<16; // cmd13(RCA,stuff bit) - rSDICCON=(0x1<<9)|(0x1<<8)|0x4d; // sht_resp, wait_resp, start, cmd13 - - //-- Check end of cmd13 - if(!chk_cmd_end(13, 1)) - return 0; - //if(rSDIRSP0&0x100) - response0=rSDIRSP0; - response0 &= 0x3c00; - response0 = response0 >> 9; - if(response0==6) - //Test_SDI(); - - rSDICSTA=0xa00; // Clear cmd_end(with rsp) - return 1; -} -//---获取卡的CSD寄存器的值--------------------------------------------------- -//功能：获取卡的CSD寄存器的值 -//参数：无 -//返回：1，成功 0，失败 -//--------------------------------------------------------------------- - -int cmd9(void)//SEND_CSD -{ - rSDICARG=RCA<<16; // cmd9(RCA,stuff bit) - rSDICCON=(0x1<<10)|(0x1<<9)|(0x1<<8)|0x49; // long_resp, wait_resp, start, cmd9 - - if(!chk_cmd_end(9, 1)) - return 0; - else - return 1; -} -//---设置卡通信宽度--------------------------------------------------- -//功能：设置卡通信宽度为4bit -//参数：无 -//返回：无 -//--------------------------------------------------------------------- - -void set_4bit_bus(void) -{ - cmd55(); // Make ACMD - //-- CMD6 implement - rSDICARG=1<<1; //Wide 0: 1bit, 1: 4bit - rSDICCON=(0x1<<9)|(0x1<<8)|0x46; //sht_resp, wait_resp, start, cmd55 - if(!chk_cmd_end(6, 1)) // ACMD6 - return; - rSDICSTA=0xa00; // Clear cmd_end(with rsp) -} -//----SD卡初始化-------------------------------------------------------- -//功能：sd卡控制器初始化，使SD卡可以开始工作 -//参数：无 -//返回：1，成功 -// 0，失败 -//备注: MMC测试要注意，Cmd & Data 必须使能，上拉(不过，MMC我没测试过) -//--------------------------------------------------------------------- - -int module_init_SD(void) -{ - - int i; - - RCA=0; - MMC=0; - //GPIO初始化 - rGPEUP = 0xf83f; // SDCMD, SDDAT[3:0] => PU En. - rGPECON = 0xaaaaaaaa; //SDCMD, SDDAT[3:0] - //设置频率为400KHz - rSDIPRE=CN_CFG_PCLK/(INICLK)-1; - rSDICON=(1<<4)|1; // Type B, clk enable - rSDIFSTA=rSDIFSTA|(1<<16); //YH 040223 FIFO reset - rSDIBSIZE=0x200; // 512byte(128word) - rSDIDTIMER=0x7fffff; // Set timeout count - // Wait 74SDCLK for MMC card - for(i=0;i<0x1000;i++); - //发送命令0，使sd卡进入idle状态 - cmd0(); - - //检查是否是MMC卡，并且设置目标工作电压 - //设置MMC，为了以后兼容MMC - if(chk_MMC_OCR()) - { - MMC=1; - goto RECMD2; - } - //检查是否是SD卡，并且设置目标工作电压 - if(!chk_SD_OCR()) - return 0; -RECMD2: - rSDICARG=0x0; // CMD2(stuff bit) - rSDICCON=(0x1<<10)|(0x1<<9)|(0x1<<8)|0x42; //lng_resp, wait_resp, start, CMD2 - //发送CMD2，获取SD卡身份信息，并且使卡进入identification模式 - if(!chk_cmd_end(2, 1)) - goto RECMD2; - rSDICSTA=0xa00; // Clear cmd_end(with rsp) -RECMD3: - //--Send RCA - rSDICARG=MMC<<16; // CMD3(MMC:Set RCA, SD:Ask RCA-->SBZ) - rSDICCON=(0x1<<9)|(0x1<<8)|0x43; // sht_resp, wait_resp, start, CMD3 - //发送CMD3，SD卡获取RCA,进入stand_by状态 - if(!chk_cmd_end(3, 1)) - goto RECMD3; - - rSDICSTA=0xa00; // Clear cmd_end(with rsp) - RCA=( rSDIRSP0 & 0xffff0000 )>>16; - rSDIPRE=CN_CFG_PCLK/(SDCLK)-1; // Normal clock=25MHz - //--State(stand-by) check - if( (rSDIRSP0 & 0x1e00) !=0x600 ) // CURRENT_STATE check - goto RECMD3; - card_sel_desel(1); // Select - set_4bit_bus(); - return 1; -} - -void test_sdi() -{ - char buf[512] = "djyos test"; - char buf1[512]; - memset(buf1,0,512); - write_one_sector(1, (unsigned int *)buf); - read_one_sector(1, (unsigned int *)buf1); -} diff --git a/bsp/cpudrv/freescale/imx6q/src/timer/cpu_peri_timer.c b/bsp/cpudrv/freescale/imx6q/src/timer/cpu_peri_timer.c deleted file mode 100644 index eebfd303b31c47d3ffcb1c94ee8f2c97b44d919f..0000000000000000000000000000000000000000 --- a/bsp/cpudrv/freescale/imx6q/src/timer/cpu_peri_timer.c +++ /dev/null @@ -1,632 +0,0 @@ -#include "stdint.h" -#include "stddef.h" -#include "board-config.h" -#include "cpu_peri.h" -#include "cpu_peri_int_line.h" -#include "timer_hard.h" -#include "project_config.h" //本文件由IDE中配置界面生成，存放在APP的工程目录中。 - //允许是个空文件，所有配置将按默认值配置。 - -//@#$%component configure ****组件配置开始，用于 DIDE 中图形化配置界面 -//****配置块的语法和使用方法，参见源码根目录下的文件：component_config_readme.txt**** -//%$#@initcode ****初始化代码开始，由 DIDE 删除“//”后copy到初始化文件中 -// extern bool_t ModuleInstall_HardTimer(void); -// ModuleInstall_HardTimer(); -//%$#@end initcode ****初始化代码结束 - -//%$#@describe ****组件描述开始 -//component name:"cpu onchip timer"//CPU的定时器外设驱动 -//parent:"Software Timers"//填写该组件的父组件名字，none表示没有父组件 -//attribute:bsp //选填“third、system、bsp、user”，本属性用于在IDE中分组 -//select:choosable //选填“required、choosable、none”，若填必选且需要配置参数，则IDE裁剪界面中默认勾取， - //不可取消，必选且不需要配置参数的，或是不可选的，IDE裁剪界面中不显示， -//init time:early //初始化时机，可选值：early，medium，later, pre-main。 - //表示初始化时间，分别是早期、中期、后期 -//dependence:"Software Timers","int"//该组件的依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件将强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//weakdependence:"none" //该组件的弱依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件不会被强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//mutex:"none" //该组件的互斥组件名（可以是none，表示无互斥组件）， - //如果与多个组件互斥，则依次列出，用“,”分隔 -//%$#@end describe ****组件描述结束 - -//%$#@configue ****参数配置开始 -#if ( CFG_MODULE_ENABLE_CPU_ONCHIP_TIMER == false ) -//#warning " cpu_onchip_timer 组件参数未配置，使用默认配置" -//%$#@target = header //header = 生成头文件,cmdline = 命令行变量，DJYOS自有模块禁用 -#define CFG_MODULE_ENABLE_CPU_ONCHIP_TIMER false //如果勾选了本组件，将由DIDE在project_config.h或命令行中定义为true -//%$#@num,0,100, -//%$#@enum,true,false, -//%$#@string,1,10, -//%$#select, ***从列出的选项中选择若干个定义成宏 -//%$#@free, -#endif -//%$#@end configue ****参数配置结束 -//@#$%component end configure - -#define TIMER_NUM 3 //3个用户硬件定时器(第4个保留作为OS tick) -#define TIMER_CLK_HZ 1000000 - -typedef struct{ - u8 idx; - u8 intr_line; - u16 state; - u32 cycle; - fnTimerIsr isr; -}tagTIMER_CTX; - -static tagTIMER_CTX timer_ctx[TIMER_NUM]; - -//2440的定时器功能简述: -//1、减计数方式工作 -//2、每个定时器可选5个时钟源，分别为主频的1/2分频~1/16分频，或EXTCLK。 -//3、有两个8位预分频器，01共享一个，234共享一个。 -//4、每个定时器都有比较寄存器，用于产生PWM波形。 -//5、每个定时器可以设定为单次运行和重复运行，可以手动启动和停止。 - -static void Timer_Init(void) -{ - //DMA:No select(All Interrupt), - pg_timer_reg->TCFG1 = 0; -} - -//----设置定时器时钟源---------------------------------------------------------- -//功能: 设置各定时器时钟源. -//参数: timer,定时器号 -// value,定时器输入时钟源,timer和value的对应表如下: -// value: 0 1 2 3 4 -// timer0: 1/2分频 1/4分频 1/8分频 1/16分频 EXTCLK0 -// timer1: 1/2分频 1/4分频 1/8分频 1/16分频 EXTCLK0 -// timer2: 1/2分频 1/4分频 1/8分频 1/16分频 EXTCLK1 -// timer3: 1/2分频 1/4分频 1/8分频 1/16分频 EXTCLK1 -// timer4: 1/2分频 1/4分频 1/8分频 1/16分频 EXTCLK1 -//返回: 无 -//----------------------------------------------------------------------------- -void Timer_SetClkSource(ufast_t timer,ufast_t value) -{ - pg_timer_reg->TCFG1 &= ~(0xf << (timer<<2)); - pg_timer_reg->TCFG1 |= value << (timer<<2); -} - -//----设置定时器预分频数------------------------------------------------------- -//功能: 设置各定时器预分频数. -//参数: group,定时器组号,01为1组,234为1组 -// value,定时器预分频数,0~255对应1~256分频 -//返回: 无 -//----------------------------------------------------------------------------- -void Timer_SetPrecale(ufast_t group,uint16_t value) -{ - pg_timer_reg->TCFG0 &= ~(0xff << (group<<3)); - pg_timer_reg->TCFG0 |= value << (group<<3); -} - -//----设置定时器计数值---------------------------------------------------------- -//功能: 设置各定时器计数值.定时器的溢出中断时间为:value*(预分频+1)/时钟源分频数 -//参数: timer,定时器号 -// value,计数值 -//返回: 无 -//----------------------------------------------------------------------------- -void Timer_SetCounter(ufast_t timer,uint16_t value) -{ - switch (timer) - { - case 0: - pg_timer_reg->TCNTB0 = value; - break; - case 1: - pg_timer_reg->TCNTB1 = value; - break; - case 2: - pg_timer_reg->TCNTB2 = value; - break; - case 3: - pg_timer_reg->TCNTB3 = value; - break; - case 4: - pg_timer_reg->TCNTB4 = value; - break; - default:break; - } -} - -u16 Timer_GetReload(ufast_t timer) -{ - switch (timer) - { - case 0: - return (u16)(pg_timer_reg->TCNTB0); - case 1: - return (u16)(pg_timer_reg->TCNTB1); - case 2: - return (u16)(pg_timer_reg->TCNTB2); - case 3: - return (u16)(pg_timer_reg->TCNTB3); - case 4: - return (u16)(pg_timer_reg->TCNTB4); - default:break; - } - return 0; -} -//----设置定时器比较值---------------------------------------------------------- -//功能: 用于pwm占空比设计 -//参数: timer,定时器号 -// value,比较值 -//返回: 无 -//----------------------------------------------------------------------------- -void Timer_SetCompare(ufast_t timer,uint16_t value) -{ - switch (timer) - { - case 0: - pg_timer_reg->TCMPB0 = value; - break; - case 1: - pg_timer_reg->TCMPB1 = value; - break; - case 2: - pg_timer_reg->TCMPB2 = value; - break; - case 3: - pg_timer_reg->TCMPB3 = value; - break; - default:break; - } -} - -//----设置定时器工作方式------------------------------------------------------- -//功能: 设定定时器是连续工作还是单次工作 -//参数: timer,定时器号 -// type,0=单次工作,1=自动加载连续工作 -//返回: 无 -//----------------------------------------------------------------------------- -bool_t Timer_SetType(ufast_t timer,ufast_t type) -{ - type &= 0x1; - switch (timer) - { - case 0: - pg_timer_reg->TCON &= ~(1<<3); - pg_timer_reg->TCON |= type<<3; - return true; - case 1: - pg_timer_reg->TCON &= ~(1<<11); - pg_timer_reg->TCON |= type<<11; - return true; - case 2: - pg_timer_reg->TCON &= ~(1<<15); - pg_timer_reg->TCON |= type<<15; - return true; - case 3: - pg_timer_reg->TCON &= ~(1<<19); - pg_timer_reg->TCON |= type<<19; - return true; - case 4: - pg_timer_reg->TCON &= ~(1<<22); - pg_timer_reg->TCON |= type<<22; - return true; - default: - return false; - } -} - -//----重载定时器计数和比较值--------------------------------------------------- -//功能: 手动重新加载定时器的计数和比较寄存器值 -//参数: timer,定时器号 -//返回: 无 -//----------------------------------------------------------------------------- -void Timer_Reload(ufast_t timer) -{ - switch (timer) - { - case 0: - pg_timer_reg->TCON |= 1<<1; - pg_timer_reg->TCON &= ~(1<<1); - break; - case 1: - pg_timer_reg->TCON |= 1<<9; - pg_timer_reg->TCON &= ~(1<<9); - break; - case 2: - pg_timer_reg->TCON |= 1<<13; - pg_timer_reg->TCON &= ~(1<<13); - break; - case 3: - pg_timer_reg->TCON |= 1<<17; - pg_timer_reg->TCON &= ~(1<<17); - break; - case 4: - pg_timer_reg->TCON |= 1<<21; - pg_timer_reg->TCON &= ~(1<<21); - break; - default:break; - } -} - -//----启动定时器-------------------------------------------------------- -//功能: 启动定时器 -//参数: timer,定时器号 -//返回: 无 -//----------------------------------------------------------------------------- -bool_t Timer_Start(ufast_t timer) -{ - switch (timer) - { - case 0: - pg_timer_reg->TCON |=1; - return true; - case 1: - pg_timer_reg->TCON |=1<<8; - return true; - case 2: - pg_timer_reg->TCON |=1<<12; - return true; - case 3: - pg_timer_reg->TCON |=1<<16; - return true; - case 4: - pg_timer_reg->TCON |=1<<20; - return true; - default: - return false; - } -} - -//----停止定时器-------------------------------------------------------- -//功能: 停止定时器 -//参数: timer,定时器号 -//返回: 无 -//----------------------------------------------------------------------------- -bool_t Timer_Stop(ufast_t timer) -{ - switch (timer) - { - case 0: - pg_timer_reg->TCON &=~1; - return true; - case 1: - pg_timer_reg->TCON &=~(1<<8); - return true; - case 2: - pg_timer_reg->TCON &=~(1<<12); - return true; - case 3: - pg_timer_reg->TCON &=~(1<<16); - return true; - case 4: - pg_timer_reg->TCON &=~(1<<20); - return true; - default: - return false; - } -} - -//----读定时器当前值-------------------------------------------------------- -//功能: 读出定时器的当前计数值 -//参数: timer,定时器号 -//返回: 当前计数值 -//----------------------------------------------------------------------------- -uint16_t Timer_Read(ufast_t timer) -{ - switch (timer) - { - case 0: - return pg_timer_reg->TCNTO0; - break; - case 1: - return pg_timer_reg->TCNTO1; - break; - case 2: - return pg_timer_reg->TCNTO2; - break; - case 3: - return pg_timer_reg->TCNTO3; - break; - case 4: - return pg_timer_reg->TCNTO4; - break; - default:break; - } - return 0; -} - -// ============================================================================= -// 函数功能:__timer_alloc -// 分配定时器 -// 输入参数:timerisr,定时器的中断处理函数 -// 输出参数: -// 返回值 :分配的定时器句柄，NULL则分配不成功 -// 说明 : -// ============================================================================= -static ptu32_t __timer_alloc(fnTimerIsr timerisr) -{ - s32 i; - tagTIMER_CTX *tmr_ctx=NULL; - atom_low_t atom; - - for(i=0;icycle = 0; - tmr_ctx->isr = timerisr; - Int_Register(tmr_ctx->intr_line); - Int_CutLine(tmr_ctx->intr_line); - Int_IsrConnect(tmr_ctx->intr_line,timerisr); - Int_SettoAsynSignal(tmr_ctx->intr_line); - - Timer_SetType(i,1); -// Timer_SetCounter(i,TIMER_CLK_HZ/cycle); - Timer_Reload(i); - } - - return (ptu32_t)tmr_ctx; -} - -// ============================================================================= -// 函数功能:__timer_free -// 释放定时器 -// 输入参数:timer，分配的定时器 -// 输出参数: -// 返回值 :true成功false失败 -// 说明 : -// ============================================================================= -static bool_t __timer_free(ptu32_t timerhandle) -{ - tagTIMER_CTX *tmr_ctx; - atom_low_t atom; - - tmr_ctx =(tagTIMER_CTX*)timerhandle; - - if(tmr_ctx!=NULL) - { - atom = Int_LowAtomStart(); - - tmr_ctx->state &= ~CN_TIMER_ENUSE; - Timer_Stop(tmr_ctx->idx); - Int_CutLine(tmr_ctx->intr_line); - Int_IsrDisConnect(tmr_ctx->intr_line); - Int_EvttDisConnect(tmr_ctx->intr_line); - Int_UnRegister(tmr_ctx->intr_line); - Int_LowAtomEnd(atom); - return true; - } - return false; - -} - -static bool_t Timer_ENCOUNT(tagTIMER_CTX *tmr,bool_t en) -{ - if(en) - { - tmr->state |= CN_TIMER_ENCOUNT; - Timer_Start(tmr->idx); - } - else - { - tmr->state &= ~CN_TIMER_ENCOUNT; - Timer_Stop(tmr->idx); - } - return true; -} - -static bool_t Timer_SetCycle(tagTIMER_CTX *tmr,u32 cycle) -{ - u32 count; - - tmr->cycle =cycle; - count =TIMER_CLK_HZ/cycle; - if(count<=0xFFFF) - { - Timer_SetCounter(tmr->idx,count); - return true; - } - return false; -} - -static bool_t Timer_SetReload(tagTIMER_CTX *tmr,bool_t en) -{ - if(en) - { - tmr->state |= CN_TIMER_RELOAD; - __Timer_SetType(tmr->idx,1); - } - else - { - tmr->state &= ~CN_TIMER_RELOAD; - __Timer_SetType(tmr->idx,0); - } - - return true; -} - -static bool_t Timer_ENINT(tagTIMER_CTX *tmr) -{ - tmr->state |= CN_TIMER_ENINT; - Int_ContactLine(tmr->intr_line); - return true; -} - -static bool_t Timer_DISINT(tagTIMER_CTX *tmr) -{ - tmr->state &= ~CN_TIMER_ENINT; - Int_CutLine(tmr->intr_line); - return true; -} - -static bool_t Timer_SETINTPRO(tagTIMER_CTX *timer, bool_t en) -{ - if(timer->state & CN_TIMER_ENUSE) - { - if(en) - { - timer->state |= CN_TIMER_REALINT; - Int_EvttDisConnect(timer->intr_line); - return Int_SettoReal(timer->intr_line); - } - else - { - timer->state &= ~CN_TIMER_REALINT; - return Int_SettoAsynSignal(timer->intr_line); - } - } - - return false; - -} -// ============================================================================= -// 函数功能:__timer_ctrl -// 看定时器的定时时间是否已经到了 -// 输入参数:timerhandle 待操作的定时器句柄 -// ctrlcmd, 操作命令码 -// 输出参数:inoutpara,根据ctrlcmd的不同而不同 -// 返回值 :true成功 false失败 -// 说明 : -// ============================================================================= -static bool_t __timer_ctrl(ptu32_t timerhandle, enum HardTimerCmdCode ctrlcmd,ptu32_t inoutpara) -{ - - bool_t result = false; - tagTIMER_CTX *timer; - timer = (tagTIMER_CTX *)timerhandle; - - if(NULL != timer) - { - switch(ctrlcmd) - { - case EN_TIMER_STARTCOUNT: - result = Timer_ENCOUNT(timer,true); - break; - - case EN_TIMER_PAUSECOUNT: - result = Timer_ENCOUNT(timer,false); - break; - - case EN_TIMER_SETCYCLE: - result = Timer_SetCycle(timer,(u32)inoutpara); - break; - - case EN_TIMER_SETRELOAD: - result = Timer_SetReload(timer, *(u32*)inoutpara); - break; - - case EN_TIMER_ENINT: - result = Timer_ENINT(timer); - break; - - case EN_TIMER_DISINT: - result = Timer_DISINT(timer); - break; - - case EN_TIMER_SETINTPRO: - result = Timer_SETINTPRO(timer, *(u32*)inoutpara); - break; - - case EN_TIMER_GETTIME: - if((u32*)inoutpara!=NULL) - { - *(u32*)inoutpara = Timer_Read(timer->idx); - return true; - } - return false; - - case EN_TIMER_GETCYCLE: - { - if((u32*)inoutpara!=NULL) - { - *(u32*)inoutpara =timer->cycle; - return true; - } - return false; - } - - case EN_TIMER_GETID: - { - u32 id; - if((u32*)inoutpara!=NULL) - { - id =timer->intr_line<<16|timer->idx; - *(u32*)inoutpara =id; - return true; - } - return false; - } - - case EN_TIMER_GETSTATE: - { - if((u32*)inoutpara!=NULL) - { - *(u32*)inoutpara =timer->state; - return true; - } - return false; - } - default: - break; - }; - } - - return result; -} - -// ============================================================================= -// 函数功能:__timer_get_freq -// 获取定时器主频 -// 输入参数:timerhandle 待操作的定时器句柄 -// 输出参数: -// 返回值 :定时器主频 -// 说明 :单位（HZ） -// ============================================================================= -static u32 __timer_get_freq(ptu32_t timerhandle) -{ - return TIMER_CLK_HZ; -} - -// ============================================================================= -// 函数功能:ModuleInstall_HardTimer -// -// 输入参数: -// 输出参数: -// 返回值 : -// 说明 : -// ============================================================================= -bool_t ModuleInstall_HardTimer(void) -{ - struct TimerChip s3c_timer; - s32 i,pre_div; - - pre_div =(CN_CFG_PCLK/2)/TIMER_CLK_HZ; - - Timer_Init(); - Timer_SetPrecale(0,pre_div); //Timer0,1. - Timer_SetPrecale(1,pre_div); //Timer2,3,4. - - for(i=0;i -#include -#include -#include "stdint.h" - -#include "int_hard.h" -#include "int.h" -#include "cpu_peri.h" -#include "Touch.h" -#include "gkernel.h" -#include "systime.h" - -#include "project_config.h" //本文件由IDE中配置界面生成，存放在APP的工程目录中。 - //允许是个空文件，所有配置将按默认值配置。 - -//@#$%component configure ****组件配置开始，用于 DIDE 中图形化配置界面 -//****配置块的语法和使用方法，参见源码根目录下的文件：component_config_readme.txt**** -//%$#@initcode ****初始化代码开始，由 DIDE 删除“//”后copy到初始化文件中 -// extern bool_t ModuleInstall_TOUCH_S3C2416(void); -// ModuleInstall_TOUCH_S3C2416( ); -//#if(CFG_MODULE_ENABLE_GRAPHICAL_DECORATE_DEVELOPMENT == true) -// extern bool_t GDD_AddInputDev(const char *InputDevName); -// GDD_AddInputDev(CFG_TOUCH_DEV_NAME); -//#endif -//%$#@end initcode ****初始化代码结束 - -//%$#@describe ****组件描述开始 -//component name:"cpu onchip touch"//CPU触摸屏外设驱动 -//parent:"touch" //填写该组件的父组件名字，none表示没有父组件 -//attribute:bsp //选填“third、system、bsp、user”，本属性用于在IDE中分组 -//select:choosable //选填“required、choosable、none”，若填必选且需要配置参数，则IDE裁剪界面中默认勾取， - //不可取消，必选且不需要配置参数的，或是不可选的，IDE裁剪界面中不显示， -//init time:medium //初始化时机，可选值：early，medium，later, pre-main。 - //表示初始化时间，分别是早期、中期、后期 -//dependence:"graphical kernel","touch"//该组件的依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件将强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//weakdependence:"none" //该组件的弱依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件不会被强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//mutex:"none" //该组件的互斥组件名（可以是none，表示无互斥组件）， - //如果与多个组件互斥，则依次列出，用“,”分隔 -//%$#@end describe ****组件描述结束 - -//%$#@configue ****参数配置开始 -#if ( CFG_MODULE_ENABLE_CPU_ONCHIP_TOUCH == false ) -//#warning " cpu_onchip_touch 组件参数未配置，使用默认配置" -//%$#@target = header //header = 生成头文件,cmdline = 命令行变量，DJYOS自有模块禁用 -#define CFG_MODULE_ENABLE_CPU_ONCHIP_TOUCH false //如果勾选了本组件，将由DIDE在project_config.h或命令行中定义为true -//%$#@num,0,100, -//%$#@enum,true,false, -//%$#@string,1,10, -#define CFG_TOUCH_DEV_NAME "TOUCH_MX6Q" //"触摸屏名称",配置触摸屏名称 -#define CFG_DISPLAY_NAME "LCD_MX6Q" //"显示器名称",配置触摸屏所在显示器的名称 -//%$#select, ***从列出的选项中选择若干个定义成宏 -//%$#@free, -#endif -//%$#@end configue ****参数配置结束 -//@#$%component end configure - -/*============================================================================*/ - -#define ADC_MCLK (50*1000*1000) -#define ADC_CLK 2000000 /*2MHZ*/ - -/*============================================================================*/ - -#define TS_XY_SWAP -#define TS_ORG_RD - -#define TS_CAL_XOFFSET (40) -#define TS_CAL_YOFFSET (40) - -#define TS_CAL_LU_XPOS (TS_CAL_XOFFSET) -#define TS_CAL_LU_YPOS (TS_CAL_YOFFSET) - -#define TS_CAL_RU_XPOS (CN_LCD_XSIZE-TS_CAL_XOFFSET) -#define TS_CAL_RU_YPOS (TS_CAL_YOFFSET) - -#define TS_CAL_LD_XPOS (TS_CAL_XOFFSET) -#define TS_CAL_LD_YPOS (CN_LCD_YSIZE-TS_CAL_YOFFSET) - -#define TS_CAL_RD_XPOS (CN_LCD_XSIZE-TS_CAL_XOFFSET) -#define TS_CAL_RD_YPOS (CN_LCD_YSIZE-TS_CAL_YOFFSET) - -#define TS_CAL_XSIZE (TS_CAL_RU_XPOS-TS_CAL_LU_XPOS) -#define TS_CAL_YSIZE (TS_CAL_RD_YPOS-TS_CAL_RU_YPOS) - -typedef struct TS_CFG_DATA -{ - u16 LUAdx,LUAdy; - u16 RUAdx,RUAdy; - u16 RDAdx,RDAdy; - u16 LDAdx,LDAdy; -}TS_CFG_DATA; - -/////////////////// - -static int ts_xsize,ts_ysize; -static int ts_cal_ref_pos[4][2]; -static TS_CFG_DATA ts_cfg_data; //配置数据 - -#define CN_LCD_XSIZE ts_xsize -#define CN_LCD_YSIZE ts_ysize - -/*============================================================================*/ -/*============================================================================*/ - -static bool_t ts_translate_data(s32 *x,s32 *y) -{ - int x_coor,y_coor,adx,ady; - int ts_adx_min,ts_adx_max,ts_ady_min,ts_ady_max; - - if((x!=NULL)&&(y!=NULL)) - { - adx =*x; - ady =*y; - -#ifdef TS_ORG_LU - ts_adx_min =ts_cfg_data.LUAdx; - ts_ady_min =ts_cfg_data.LUAdy; - - ts_adx_max =ts_cfg_data.RDAdx; - ts_ady_max =ts_cfg_data.RDAdy; - - if((ts_adx_min==ts_adx_max) || (ts_ady_min==ts_ady_max)) - { - *x =-1; - *y =-1; - return false; - } - -#ifdef TS_XY_SWAP - x_coor = TS_CAL_XOFFSET+(CN_LCD_XSIZE-(TS_CAL_XOFFSET<<1))*(ady-ts_ady_min)/ (ts_ady_max-ts_ady_min); - y_coor = TS_CAL_YOFFSET+(CN_LCD_YSIZE-(TS_CAL_YOFFSET<<1))*(adx-ts_adx_min)/ (ts_adx_max-ts_adx_min); -#else - x_coor = TS_CAL_XOFFSET+(CN_LCD_XSIZE-(TS_CAL_XOFFSET<<1))*(adx-ts_adx_min)/ (ts_adx_max-ts_adx_min); - y_coor = TS_CAL_YOFFSET+(CN_LCD_YSIZE-(TS_CAL_YOFFSET<<1))*(ady-ts_ady_min)/ (ts_ady_max-ts_ady_min); -#endif - *x =x_coor; - *y =y_coor; -#endif - -#ifdef TS_ORG_RU - ts_adx_min =ts_cfg_data.RUAdx; - ts_ady_min =ts_cfg_data.RUAdy; - - ts_adx_max =ts_cfg_data.LDAdx; - ts_ady_max =ts_cfg_data.LDAdy; - - if((ts_adx_min==ts_adx_max) || (ts_ady_min==ts_ady_max)) - { - *x =-1; - *y =-1; - return false; - } - -#ifdef TS_XY_SWAP - x_coor = TS_CAL_XOFFSET+(CN_LCD_XSIZE-(TS_CAL_XOFFSET<<1))*(ady-ts_ady_min)/ (ts_ady_max-ts_ady_min); - y_coor = TS_CAL_YOFFSET+(CN_LCD_YSIZE-(TS_CAL_YOFFSET<<1))*(adx-ts_adx_min)/ (ts_adx_max-ts_adx_min); -#else - x_coor = TS_CAL_XOFFSET+(CN_LCD_XSIZE-(TS_CAL_XOFFSET<<1))*(adx-ts_adx_min)/ (ts_adx_max-ts_adx_min); - y_coor = TS_CAL_YOFFSET+(CN_LCD_YSIZE-(TS_CAL_YOFFSET<<1))*(ady-ts_ady_min)/ (ts_ady_max-ts_ady_min); -#endif - *x =CN_LCD_XSIZE-x_coor; - *y =y_coor; -#endif - -#ifdef TS_ORG_RD - ts_adx_min =ts_cfg_data.RDAdx; - ts_ady_min =ts_cfg_data.RDAdy; - - ts_adx_max =ts_cfg_data.LUAdx; - ts_ady_max =ts_cfg_data.LUAdy; - - if((ts_adx_min==ts_adx_max) || (ts_ady_min==ts_ady_max)) - { - *x =-1; - *y =-1; - return false; - } - -#ifdef TS_XY_SWAP - x_coor = TS_CAL_XOFFSET+(CN_LCD_XSIZE-(TS_CAL_XOFFSET<<1))*(ady-ts_ady_min)/ (ts_ady_max-ts_ady_min); - y_coor = TS_CAL_YOFFSET+(CN_LCD_YSIZE-(TS_CAL_YOFFSET<<1))*(adx-ts_adx_min)/ (ts_adx_max-ts_adx_min); -#else - x_coor = TS_CAL_XOFFSET+(CN_LCD_XSIZE-(TS_CAL_XOFFSET<<1))*(adx-ts_adx_min)/ (ts_adx_max-ts_adx_min); - y_coor = TS_CAL_YOFFSET+(CN_LCD_YSIZE-(TS_CAL_YOFFSET<<1))*(ady-ts_ady_min)/ (ts_ady_max-ts_ady_min); -#endif - *x =CN_LCD_XSIZE-x_coor; - *y =CN_LCD_YSIZE-y_coor; -#endif - -#ifdef TS_ORG_LD - ts_adx_min =ts_cfg_data.LDAdx; - ts_ady_min =ts_cfg_data.LDAdy; - - ts_adx_max =ts_cfg_data.RUAdx; - ts_ady_max =ts_cfg_data.RUAdy; - - if((ts_adx_min==ts_adx_max) || (ts_ady_min==ts_ady_max)) - { - *x =-1; - *y =-1; - return false; - } - -#ifdef TS_XY_SWAP - x_coor = TS_CAL_XOFFSET+(CN_LCD_XSIZE-(TS_CAL_XOFFSET<<1))*(ady-ts_ady_min)/ (ts_ady_max-ts_ady_min); - y_coor = TS_CAL_YOFFSET+(CN_LCD_YSIZE-(TS_CAL_YOFFSET<<1))*(adx-ts_adx_min)/ (ts_adx_max-ts_adx_min); -#else - x_coor = TS_CAL_XOFFSET+(CN_LCD_XSIZE-(TS_CAL_XOFFSET<<1))*(adx-ts_adx_min)/ (ts_adx_max-ts_adx_min); - y_coor = TS_CAL_YOFFSET+(CN_LCD_YSIZE-(TS_CAL_YOFFSET<<1))*(ady-ts_ady_min)/ (ts_ady_max-ts_ady_min); -#endif - *x =x_coor; - *y =CN_LCD_YSIZE-y_coor; - -#endif - return true; - } - return false; -} - -/*============================================================================*/ - - -void touch_ratio_adjust(struct GkWinObj *desktop); -static ufast_t read_touch_data(struct SingleTouchMsg *touch_data); -static bool_t touch_hard_init(void); - -//----初始化触摸屏模块--------------------------------------------------------- -//功能: -//参数: display_dev_name:本触摸屏对应的显示器名(资源名) -// touch_dev_name:触摸屏设备名. -//返回: 无 -//----------------------------------------------------------------------------- -bool_t ModuleInstall_TOUCH_S3C2416(void) -{ - struct GkWinObj *desktop; - static struct SingleTouchPrivate touch_dev; - - desktop = GK_GetDesktop(CFG_DISPLAY_NAME); - ts_xsize =desktop->right-desktop->left; - ts_ysize =desktop->bottom-desktop->top; - - ts_cal_ref_pos[0][0] =TS_CAL_LU_XPOS; - ts_cal_ref_pos[0][1] =TS_CAL_LU_YPOS; - ts_cal_ref_pos[1][0] =TS_CAL_RU_XPOS; - ts_cal_ref_pos[1][1] =TS_CAL_RU_YPOS; - ts_cal_ref_pos[2][0] =TS_CAL_RD_XPOS; - ts_cal_ref_pos[2][1] =TS_CAL_RD_YPOS; - ts_cal_ref_pos[3][0] =TS_CAL_LD_XPOS; - ts_cal_ref_pos[3][1] =TS_CAL_LD_YPOS; - - if(!touch_hard_init( )) - { - return false; - } - touch_ratio_adjust(desktop); - touch_dev.read_touch = read_touch_data; - touch_dev.touch_loc.display = GK_GetDisplay(CFG_DISPLAY_NAME); - Touch_InstallDevice(CFG_TOUCH_DEV_NAME,&touch_dev); - return true; -} - -//----触摸屏硬件初始化--------------------------------------------------------- -//功能: 触摸屏硬件初始化 -//参数: 无 -//返回: 键盘设备号，-1表示按照键盘设备失败 -//----------------------------------------------------------------------------- -static bool_t touch_hard_init(void) -{ - int prs; - - struct ADC_REG *adc=ADC_REG_BASE; - - prs = (ADC_MCLK/ADC_CLK)-1; - - adc->ADCDLY = 4000; //Normal conversion mode delay about (1/3.6864M)*50000=13.56ms - adc->ADCCON = (1<<14) | (prs<<6) | (1<<3)| (0<<2) ; //read start - adc->ADCTSC = 0xd3; //Wfait,XP_PU,XP_Dis,XM_Dis,YP_Dis,YM_En - return true; -} - -static bool_t ts_is_down(void) -{ - struct ADC_REG *adc=ADC_REG_BASE; - int i,j; - /// - - for(i=0;i<4;i++) //检测4次 - { - if((adc->ADCDAT0&(1<<15))) return false; - if((adc->ADCDAT1&(1<<15))) return false; - for(j=0;j<50;j++); //Delay - } - //DebugPrintf("ts_down\r\n"); - return true; -} - -static void InsertSort(int *A, int p, int r) -{ - int i,j; - int key; - for(i=p+1; i<=r; i++) - { - key = A[i]; - j = i-1; - while (j >= 0 && A[j] > key) - { - A[j+1] = A[j]; - j--; - } - A[j+1] = key; - } -} - -#define TS_SAMPLE_COUNT 8 -static int ad_buf[TS_SAMPLE_COUNT]; - -static int ts_get_x_data_raw(void) -{ - int i,j,prs; - int dat; - struct ADC_REG *adc=ADC_REG_BASE; - ///// - - prs = (ADC_MCLK/ADC_CLK)-1; - - adc->ADCDLY = 1000; - adc->ADCCON = (1<<14) | (prs<<6)|(1<<3) ; //read start - adc->ADCTSC = (0<<7)|(1<<6)|(0<<5)|(1<<4)|(1<<3)|(0<<2)|(1);// read x - for(j=200;j>0;j--); - - for(i=0;iADCCON |=0x1; //start ADC - for(j=200;j>0;j--); - while(adc->ADCCON & 0x1); //check if Enable_start is low - while(!(adc->ADCCON & (1<<15))); //check if EC(End of Conversion) flag is high, This line is necessary~!! - - ad_buf[i]=adc->ADCDAT0&0xFFF; - - } - - adc->ADCTSC = 0xd3; - - InsertSort(ad_buf,0,TS_SAMPLE_COUNT-1); - i = TS_SAMPLE_COUNT>>1; - dat = 0; - dat += ad_buf[i++]; - dat += ad_buf[i++]; - dat = dat>>1; - -// DebugPrintf("ts_adx =%04XH\r\n",dat); - - return dat; - //// -} - -static int ts_get_y_data_raw(void) -{ - int i,j,prs; - int dat; - struct ADC_REG *adc=ADC_REG_BASE; - ///// - - prs = (ADC_MCLK/ADC_CLK)-1; - - adc->ADCDLY = 1000; - adc->ADCCON = (1<<14) | (prs<<6)|(1<<3) ; //read start - adc->ADCTSC = (0<<7)|(1<<6)|(0<<5)|(1<<4)|(1<<3)|(0<<2)|(2);// read y - for(j=200;j>0;j--); - - for(i=0;iADCCON |=0x1; //start ADC - for(j=200;j>0;j--); - while(adc->ADCCON & 0x1); //check if Enable_start is low - while(!(adc->ADCCON & (1<<15))); //check if EC(End of Conversion) flag is high, This line is necessary~!! - - ad_buf[i] =adc->ADCDAT1&0xFFF; - - - } - - adc->ADCTSC = 0xd3; - - InsertSort(ad_buf,0,TS_SAMPLE_COUNT-1); - i = TS_SAMPLE_COUNT>>1; - dat = 0; - dat += ad_buf[i++]; - dat += ad_buf[i++]; - dat = dat>>1; - -// DebugPrintf("ts_ady =%04XH\r\n",dat); - - return dat; - //// - -} - -static bool_t ts_get_data_raw(s32 *x,s32 *y) -{ - if(ts_is_down()) - { - x=ts_get_x_data_raw(); - y=ts_get_y_data_raw(); - return true; - } - return false; -} - -//----读取触摸点坐标----------------------------------------------------------- -//功能: 读取stmpe811采集到的触摸点坐标，如果有多点，则平均之 -//参数: touch_data，采集到的坐标 -//返回: 1=触摸笔按下，0=触摸笔提起， -//----------------------------------------------------------------------------- -static ufast_t read_touch_data(struct SingleTouchMsg *touch_data) -{ - static s32 x=0,y=0,z=0; - - touch_data->display = NULL; - if(ts_is_down()) - { - - x =ts_get_x_data_raw(); - y =ts_get_y_data_raw(); - z =1; - ts_translate_data(&x,&y); - touch_data->x =x; - touch_data->y =y; - touch_data->z = z; - - return 1; - } - else - { - touch_data->z = 0; - return 0; - } - -} - - -static void draw_cursor(struct GkWinObj *desktop,int x,int y) -{ - GK_Lineto(desktop,x,y,x,y-20+1,CN_COLOR_RED,CN_R2_COPYPEN,0); //上 - GK_Lineto(desktop,x,y,x,y+20-1,CN_COLOR_RED,CN_R2_COPYPEN,0); //下 - GK_Lineto(desktop,x,y,x+20-1,y,CN_COLOR_RED,CN_R2_COPYPEN,0);//右 - GK_Lineto(desktop,x,y,x-20+1,y,CN_COLOR_RED,CN_R2_COPYPEN,0); //左 - GK_SyncShow(1000*mS); -} - -static void clr_cursor(struct GkWinObj *desktop,int x,int y) -{ - GK_Lineto(desktop,x,y,x,y-20+1,CN_COLOR_WHITE,CN_R2_COPYPEN,0); //上 - GK_Lineto(desktop,x,y,x,y+20-1,CN_COLOR_WHITE,CN_R2_COPYPEN,0); //下 - GK_Lineto(desktop,x,y,x+20-1,y,CN_COLOR_WHITE,CN_R2_COPYPEN,0);//右 - GK_Lineto(desktop,x,y,x-20+1,y,CN_COLOR_WHITE,CN_R2_COPYPEN,0); //左 - GK_SyncShow(1000*mS); - -} - -//----触摸屏校准--------------------------------------------------------------- -//功能: 触摸屏的尺寸可能与液晶可显示区域不完全一致，安装也可能有偏差，需要计算 -// 校准系数和偏移量。为获得更高精度，使用定点小数。 -//参数: display_name,本触摸屏对应的显示器名(资源名) -//返回: 无 -//----------------------------------------------------------------------------- -void touch_ratio_adjust(struct GkWinObj *desktop) -{ - - struct SingleTouchMsg touch_xyz0,touch_xyz1; - FILE *touch_init; - s32 limit_left,limit_top,limit_right,limit_bottom,pen_down_time,step; - - if((touch_init = fopen("sys:\\touch_init.dat","r")) != NULL) - { - - fread(&ts_cfg_data,sizeof(TS_CFG_DATA),1,touch_init); - } - else - { - limit_left = desktop->left; - limit_top = desktop->top; - limit_right = desktop->right; - limit_bottom = desktop->bottom; - // GK_CreateWin(desktop,desktop,limit_left,limit_top,limit_right,limit_bottom, - // CN_COLOR_WHITE,CN_WINBUF_BUF,"&tg_touch_adjust",CN_R3_SRCCOPY,0); - // GK_SetPrio(desktop,-1,CN_GK_SYNC); - GK_FillWin(desktop,CN_COLOR_WHITE,0); - - GK_DrawText(desktop,NULL,NULL,limit_left+10,limit_top+50, - "触摸屏矫正",21,CN_COLOR_BLUE,CN_R2_COPYPEN,0); - GK_DrawText(desktop,NULL,NULL,limit_left+10,limit_top+70, - "请准确点击十字交叉点",21,CN_COLOR_BLUE,CN_R2_COPYPEN,0); - - step=0; - while(step<4) - { - s32 adx,ady; - - if(step>0) - { - clr_cursor(desktop,ts_cal_ref_pos[step-1][0],ts_cal_ref_pos[step-1][1]); - } - draw_cursor(desktop,ts_cal_ref_pos[step][0],ts_cal_ref_pos[step][1]); - - while(ts_is_down()) - { - DJY_DelayUs(100*mS); - } - pen_down_time=0; - while(1) - { - if(ts_is_down()) - { - - adx=ts_get_x_data_raw(); - ady=ts_get_y_data_raw(); - if(pen_down_time++>5) - { - break; - } - } - else - { - pen_down_time=0; - } - DJY_DelayUs(100*mS); - } - - switch(step) - { - case 0: - ts_cfg_data.LUAdx =adx; - ts_cfg_data.LUAdy =ady; - break; - - case 1: - ts_cfg_data.RUAdx =adx; - ts_cfg_data.RUAdy =ady; - break; - - case 2: - ts_cfg_data.RDAdx =adx; - ts_cfg_data.RDAdy =ady; - break; - - case 3: - ts_cfg_data.LDAdx =adx; - ts_cfg_data.LDAdy =ady; - break; - - } - printf("ts_cal[%d]: %04X,%04X\r\n",step,adx,ady); - step++; - } - - GK_FillWin(desktop,CN_COLOR_WHITE,0); - GK_SyncShow(1000*mS); - while(ts_is_down()) - { - DJY_DelayUs(100*mS); - } - DJY_DelayUs(500*mS); - - // GK_DestroyWin(desktop); - touch_init = fopen("sys:\\touch_init.dat","w+"); - fwrite(&ts_cfg_data,sizeof(TS_CFG_DATA),1,touch_init); - } - fclose(touch_init); - -} diff --git a/bsp/cpudrv/freescale/imx6q/src/uart/cpu_peri_uart.c b/bsp/cpudrv/freescale/imx6q/src/uart/cpu_peri_uart.c index 4e6d60f92b79297b3c45a576259e52821a430fa3..002a4a365f70c8e389089e795ca2f52905faac7a 100644 --- a/bsp/cpudrv/freescale/imx6q/src/uart/cpu_peri_uart.c +++ b/bsp/cpudrv/freescale/imx6q/src/uart/cpu_peri_uart.c @@ -1,3 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (c) 2022-2023 xxx + */ + #include "board-config.h" #include #include "stdint.h" @@ -10,10 +18,13 @@ #include #include "string.h" #include "cpu_peri_uart.h" + +#include + //#include "cpu_peri_dma.h" // ============================================================================= #include "project_config.h" //本文件由IDE中配置界面生成，存放在APP的工程目录中。 - //允许是个空文件，所有配置将按默认值配置。 + //允许是个空文件，所有配置将按默认值配置。 //@#$%component configure ****组件配置开始，用于 DIDE 中图形化配置界面 //****配置块的语法和使用方法，参见源码根目录下的文件：component_config_readme.txt**** @@ -51,10 +62,10 @@ //如果与多个组件互斥，则依次列出 //%$#@end describe ****组件描述结束 -//%$#@configue ****参数配置开始 +//%$#@configue ****参数配置开始 #if ( CFG_MODULE_ENABLE_CPU_ONCHIP_UART == false ) //#warning " cpu_onchip_uart 组件参数未配置，使用默认配置" -//%$#@target = header //header = 生成头文件,cmdline = 命令行变量，DJYOS自有模块禁用 +//%$#@target = header //header = 生成头文件,cmdline = 命令行变量，DJYOS自有模块禁用 #define CFG_MODULE_ENABLE_CPU_ONCHIP_UART false //如果勾选了本组件，将由DIDE在project_config.h或命令行中定义为true //%$#@num,0,512, #define CFG_UART1_SENDBUF_LEN 64 //"UART1发送环形缓冲区大小", @@ -116,82 +127,527 @@ //@#$%component end configure // ============================================================================= -//#define CFG_UART0_SENDBUF_LEN 256 -//#define CFG_UART0_RECVBUF_LEN 256 +//#define CFG_UART0_SENDBUF_LEN 256 +//#define CFG_UART0_RECVBUF_LEN 256 // -//#define CFG_UART1_SENDBUF_LEN 256 -//#define CFG_UART1_RECVBUF_LEN 256 +//#define CFG_UART1_SENDBUF_LEN 256 +//#define CFG_UART1_RECVBUF_LEN 256 // -//#define CFG_UART2_SENDBUF_LEN 256 -//#define CFG_UART2_RECVBUF_LEN 256 +//#define CFG_UART2_SENDBUF_LEN 256 +//#define CFG_UART2_RECVBUF_LEN 256 -static u32 imxStartSend(ptu32_t PrivateTag) -{ - return 0; -} +/* Register definitions */ +#define URXD0 0x0 /* Receiver Register */ +#define URTX0 0x40 /* Transmitter Register */ +#define UCR1 0x80 /* Control Register 1 */ +#define UCR2 0x84 /* Control Register 2 */ +#define UCR3 0x88 /* Control Register 3 */ +#define UCR4 0x8c /* Control Register 4 */ +#define UFCR 0x90 /* FIFO Control Register */ +#define USR1 0x94 /* Status Register 1 */ +#define USR2 0x98 /* Status Register 2 */ +#define UESC 0x9c /* Escape Character Register */ +#define UTIM 0xa0 /* Escape Timer Register */ +#define UBIR 0xa4 /* BRM Incremental Register */ +#define UBMR 0xa8 /* BRM Modulator Register */ +#define UBRC 0xac /* Baud Rate Count Register */ +#define IMX21_ONEMS 0xb0 /* One Millisecond register */ +#define IMX1_UTS 0xd0 /* UART Test Register on i.mx1 */ +#define IMX21_UTS 0xb4 /* UART Test Register on all other i.mx*/ -static ptu32_t imxUartCtrl(ptu32_t PrivateTag,u32 cmd, va_list *arg0) -{ - return 0; -} +/* UART Control Register Bit Fields.*/ +#define URXD_DUMMY_READ (1<<16) +#define URXD_CHARRDY (1<<15) +#define URXD_ERR (1<<14) +#define URXD_OVRRUN (1<<13) +#define URXD_FRMERR (1<<12) +#define URXD_BRK (1<<11) +#define URXD_PRERR (1<<10) +#define URXD_RX_DATA (0xFF<<0) +#define UCR1_ADEN (1<<15) /* Auto detect interrupt */ +#define UCR1_ADBR (1<<14) /* Auto detect baud rate */ +#define UCR1_TRDYEN (1<<13) /* Transmitter ready interrupt enable */ +#define UCR1_IDEN (1<<12) /* Idle condition interrupt */ +#define UCR1_ICD_REG(x) (((x) & 3) << 10) /* idle condition detect */ +#define UCR1_RRDYEN (1<<9) /* Recv ready interrupt enable */ +#define UCR1_RXDMAEN (1<<8) /* Recv ready DMA enable */ +#define UCR1_IREN (1<<7) /* Infrared interface enable */ +#define UCR1_TXMPTYEN (1<<6) /* Transimitter empty interrupt enable */ +#define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ +#define UCR1_SNDBRK (1<<4) /* Send break */ +#define UCR1_TXDMAEN (1<<3) /* Transmitter ready DMA enable */ +#define IMX1_UCR1_UARTCLKEN (1<<2) /* UART clock enabled, i.mx1 only */ +#define UCR1_ATDMAEN (1<<2) /* Aging DMA Timer Enable */ +#define UCR1_DOZE (1<<1) /* Doze */ +#define UCR1_UARTEN (1<<0) /* UART enabled */ +#define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */ +#define UCR2_IRTS (1<<14) /* Ignore RTS pin */ +#define UCR2_CTSC (1<<13) /* CTS pin control */ +#define UCR2_CTS (1<<12) /* Clear to send */ +#define UCR2_ESCEN (1<<11) /* Escape enable */ +#define UCR2_PREN (1<<8) /* Parity enable */ +#define UCR2_PROE (1<<7) /* Parity odd/even */ +#define UCR2_STPB (1<<6) /* Stop */ +#define UCR2_WS (1<<5) /* Word size */ +#define UCR2_RTSEN (1<<4) /* Request to send interrupt enable */ +#define UCR2_ATEN (1<<3) /* Aging Timer Enable */ +#define UCR2_TXEN (1<<2) /* Transmitter enabled */ +#define UCR2_RXEN (1<<1) /* Receiver enabled */ +#define UCR2_SRST (1<<0) /* SW reset */ +#define UCR3_DTREN (1<<13) /* DTR interrupt enable */ +#define UCR3_PARERREN (1<<12) /* Parity enable */ +#define UCR3_FRAERREN (1<<11) /* Frame error interrupt enable */ +#define UCR3_DSR (1<<10) /* Data set ready */ +#define UCR3_DCD (1<<9) /* Data carrier detect */ +#define UCR3_RI (1<<8) /* Ring indicator */ +#define UCR3_ADNIMP (1<<7) /* Autobaud Detection Not Improved */ +#define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ +#define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ +#define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ +#define UCR3_DTRDEN (1<<3) /* Data Terminal Ready Delta Enable. */ +#define IMX21_UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select */ +#define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ +#define UCR3_BPEN (1<<0) /* Preset registers enable */ +#define UCR4_CTSTL_SHF 10 /* CTS trigger level shift */ +#define UCR4_CTSTL_MASK 0x3F /* CTS trigger is 6 bits wide */ +#define UCR4_INVR (1<<9) /* Inverted infrared reception */ +#define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */ +#define UCR4_WKEN (1<<7) /* Wake interrupt enable */ +#define UCR4_REF16 (1<<6) /* Ref freq 16 MHz */ +#define UCR4_IDDMAEN (1<<6) /* DMA IDLE Condition Detected */ +#define UCR4_IRSC (1<<5) /* IR special case */ +#define UCR4_TCEN (1<<3) /* Transmit complete interrupt enable */ +#define UCR4_BKEN (1<<2) /* Break condition interrupt enable */ +#define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */ +#define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ +#define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */ +#define UFCR_DCEDTE (1<<6) /* DCE/DTE mode select */ +#define UFCR_RFDIV (7<<7) /* Reference freq divider mask */ +#define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7) +#define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */ +#define USR1_PARITYERR (1<<15) /* Parity error interrupt flag */ +#define USR1_RTSS (1<<14) /* RTS pin status */ +#define USR1_TRDY (1<<13) /* Transmitter ready interrupt/dma flag */ +#define USR1_RTSD (1<<12) /* RTS delta */ +#define USR1_ESCF (1<<11) /* Escape seq interrupt flag */ +#define USR1_FRAMERR (1<<10) /* Frame error interrupt flag */ +#define USR1_RRDY (1<<9) /* Receiver ready interrupt/dma flag */ +#define USR1_AGTIM (1<<8) /* Ageing timer interrupt flag */ +#define USR1_DTRD (1<<7) /* DTR Delta */ +#define USR1_RXDS (1<<6) /* Receiver idle interrupt flag */ +#define USR1_AIRINT (1<<5) /* Async IR wake interrupt flag */ +#define USR1_AWAKE (1<<4) /* Aysnc wake interrupt flag */ +#define USR2_ADET (1<<15) /* Auto baud rate detect complete */ +#define USR2_TXFE (1<<14) /* Transmit buffer FIFO empty */ +#define USR2_DTRF (1<<13) /* DTR edge interrupt flag */ +#define USR2_IDLE (1<<12) /* Idle condition */ +#define USR2_RIDELT (1<<10) /* Ring Interrupt Delta */ +#define USR2_RIIN (1<<9) /* Ring Indicator Input */ +#define USR2_IRINT (1<<8) /* Serial infrared interrupt flag */ +#define USR2_WAKE (1<<7) /* Wake */ +#define USR2_DCDIN (1<<5) /* Data Carrier Detect Input */ +#define USR2_RTSF (1<<4) /* RTS edge interrupt flag */ +#define USR2_TXDC (1<<3) /* Transmitter complete */ +#define USR2_BRCD (1<<2) /* Break condition */ +#define USR2_ORE (1<<1) /* Overrun error */ +#define USR2_RDR (1<<0) /* Recv data ready */ +#define UTS_FRCPERR (1<<13) /* Force parity error */ +#define UTS_LOOP (1<<12) /* Loop tx and rx */ +#define UTS_TXEMPTY (1<<6) /* TxFIFO empty */ +#define UTS_RXEMPTY (1<<5) /* RxFIFO empty */ +#define UTS_TXFULL (1<<4) /* TxFIFO full */ +#define UTS_RXFULL (1<<3) /* RxFIFO full */ +#define UTS_SOFTRST (1<<0) /* Software reset */ + +#define TXTL 2 /* reset default */ +#define RXTL 1 /* reset default */ + +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + +struct mxc_uart { + u32 rxd; + u32 spare0[15]; + + u32 txd; + u32 spare1[15]; + + u32 cr1; + u32 cr2; + u32 cr3; + u32 cr4; + + u32 fcr; + u32 sr1; + u32 sr2; + u32 esc; + + u32 tim; + u32 bir; + u32 bmr; + u32 brc; + + u32 onems; + u32 ts; +}; + +#define ATZ1_BASE_ADDR 0x02000000 +#define UART1_BASE (ATZ1_BASE_ADDR + 0x20000) + +static u32 imxStartSend(ptu32_t PrivateTag); +static ptu32_t imxUartCtrl(ptu32_t PrivateTag, u32 cmd, va_list *arg0); + +static struct UartParam imxUartParam[1] = { + [0] = { + .Name = "UART1", + .TxRingBufLen = 256, + .RxRingBufLen = 256, + .Baud = 115200, + .mode = CN_UART_GENERAL, + .UartPortTag = 0, + .StartSend = imxStartSend, + .UartCtrl = imxUartCtrl, + }, +}; struct imxUartPort { - int port; - struct UartGeneralCB *UartGeneralCB; + int port; + struct UartGeneralCB *UartGeneralCB; + struct mxc_uart *mxc_base; + ufast_t ufl_line; /* irq number. */ + + unsigned int old_status; + unsigned int have_rtscts:1; + unsigned int have_rtsgpio:1; + unsigned int dte_mode:1; + unsigned int inverted_tx:1; + unsigned int inverted_rx:1; }; static struct imxUartPort imxUartPort[1] = { - [0] = { - .port = 0, - .UartGeneralCB = NULL, - }, + [0] = { + .port = 0, + .UartGeneralCB = NULL, + .mxc_base = (void *)0x02020000, + .ufl_line = CN_INT_LINE_UART1, + }, }; -static struct UartParam imxUartParam[1] = { - [0] = { - - .Name = "UART0", - .TxRingBufLen = 256, - .RxRingBufLen = 256, - .Baud = 115200, - .mode = CN_UART_GENERAL, - .UartPortTag = 0, - .StartSend = imxStartSend, - .UartCtrl = imxUartCtrl, - }, -}; +u32 imx_get_uartclk(void) +{ + u32 clk = 80000000; /* read from jtag. */ + return clk; +} + +static void mxc_serial_setbrg(void) +{ + u32 clk = imx_get_uartclk(); + volatile struct mxc_uart *mxc_base = (void *)0x02020000; + int baudrate = 115200; // CONFIG_BAUDRATE; + + mxc_base->fcr = 4 << 7 | 2 << 10 | 1; /* divide input clock by 2 */ + mxc_base->bir = 0xf; + mxc_base->bmr = clk / (2 * baudrate); + +} + +void imx_uart_stop_tx(struct imxUartPort *up) +{ + u32 ucr1, ucr4, usr2; + + ucr1 = up->mxc_base->cr1; + ucr1 &= ~UCR1_TRDYEN; + up->mxc_base->cr1 = ucr1; + + usr2 = up->mxc_base->sr2; + if(!(usr2 & USR2_TXDC)){ + return; + } + + ucr4 = up->mxc_base->cr4; + ucr4 &= ~UCR4_TCEN; + up->mxc_base->cr4 = ucr4; + + return; +} + + +/* called with port.lock taken and irqs off */ +static inline void imx_uart_transmit_buffer(struct imxUartPort *up) +{ + int count, flag; + int c; + char buf[1]; +#define BUFSZ 1 + + do { + if (flag = up->mxc_base->ts & UTS_TXFULL) break; + count = UART_PortRead(up->UartGeneralCB, buf, BUFSZ); + if(count < BUFSZ) { + imx_uart_stop_tx(up); + break; + } + + c = buf[0]; + up->mxc_base->txd = c; + } while (1); + return; +} + +static irqreturn_t __imx_uart_rxint(struct imxUartPort *up) +{ + volatile struct mxc_uart *mxc_base = up->mxc_base; + unsigned int rx; + u32 usr2; + + while (mxc_base->sr2 & USR2_RDR) { + unsigned char buf[1]; + rx = mxc_base->rxd; + buf[0] = rx; + UART_PortWrite(up->UartGeneralCB, buf, 1); + } + + return IRQ_HANDLED; +} + +/* + * Handle any change of modem status signal since we were last called. + */ +static void imx_uart_mctrl_check(struct imxUartPort *up) +{ + return; +} + +static irqreturn_t __imx_uart_rtsint(ptu32_t port) +{ + return IRQ_HANDLED; +} + + +u32 imx_uart_int(ptu32_t port) +{ + struct UartParam *Param; + struct imxUartPort *up; + + volatile struct mxc_uart *mxc_base; + + unsigned int ucr1, ucr2, ucr3, ucr4; + unsigned int usr1, usr2; + + u32 ret; + + /* ensure port is valid. */ + port = 0; + + Param = &imxUartParam[port]; + up = (void *)Param->UartPortTag; + if (!up) { + /* 串口没有初始化？ */ + return IRQ_HANDLED; + } + + mxc_base = up->mxc_base; + + /* spin_lock() */ + usr1 = mxc_base->sr1; + usr2 = mxc_base->sr2; + + ucr1 = mxc_base->cr1; + ucr2 = mxc_base->cr2; + ucr3 = mxc_base->cr3; + ucr4 = mxc_base->cr4; + + /* + * Even if a condition is true that can trigger an irq only handle it if + * the respective irq source is enabled. This prevents some undesired + * actions, for example if a character that sits in the RX FIFO and that + * should be fetched via DMA is tried to be fetched using PIO. Or the + * receiver is currently off and so reading from URXD0 results in an + * exception. So just mask the (raw) status bits for disabled irqs. + */ + + if ((ucr1 & UCR1_RRDYEN) == 0) + usr1 &= ~USR1_RRDY; + if ((ucr2 & UCR2_ATEN) == 0) + usr1 &= ~USR1_AGTIM; + if ((ucr1 & UCR1_TRDYEN) == 0) + usr1 &= ~USR1_TRDY; + if ((ucr4 & UCR4_TCEN) == 0) + usr2 &= ~USR2_TXDC; + if ((ucr3 & UCR3_DTRDEN) == 0) + usr1 &= ~USR1_DTRD; + if ((ucr1 & UCR1_RTSDEN) == 0) + usr1 &= ~USR1_RTSD; + if ((ucr3 & UCR3_AWAKEN) == 0) + usr1 &= ~USR1_AWAKE; + if ((ucr4 & UCR4_OREN) == 0) + usr2 &= ~USR2_ORE; + + + if (usr1 & (USR1_RRDY | USR1_AGTIM)) { + mxc_base->sr1 = USR1_AGTIM; + + __imx_uart_rxint(up); + ret = IRQ_HANDLED; + } + + if ((usr1 & USR1_TRDY) || (usr2 & USR2_TXDC)) { + imx_uart_transmit_buffer(up); + ret = IRQ_HANDLED; + } + + if (usr1 & USR1_DTRD) { + mxc_base->sr1 = USR1_DTRD; + imx_uart_mctrl_check(up); + + ret = IRQ_HANDLED; + } + + if (usr1 & USR1_RTSD) { + __imx_uart_rtsint(port); + ret = IRQ_HANDLED; + } + + if (usr1 & USR1_AWAKE) { + mxc_base->sr1 = USR1_AWAKE; + ret = IRQ_HANDLED; + } + + if (usr2 & USR2_ORE) { + mxc_base->sr2 = USR2_ORE; + ret = IRQ_HANDLED; + } + + /* spin_unlock() */ +// while (1); + return ret; +} + +#define TXTL_DEFAULT 2 /* reset default */ +#define RXTL_DEFAULT 1 /* reset default */ +#define TXTL_DMA 8 /* DMA burst setting */ +#define RXTL_DMA 9 /* DMA burst setting */ + +static void imx_uart_setup_ufcr(struct imxUartPort *up, unsigned char txwl, unsigned char rxwl) +{ + unsigned int val; + + /* set receiver / transmitter trigger level */ + val = up->mxc_base->fcr & (UFCR_RFDIV | UFCR_DCEDTE); + val |= txwl << UFCR_TXTL_SHF | rxwl; + up->mxc_base->fcr = val; +} + +static u32 imxStartSend(ptu32_t PrivateTag) +{ + struct imxUartPort *up = (void *)PrivateTag; + u32 ucr1; + + ucr1 = up->mxc_base->cr1; + ucr1 |= UCR1_TRDYEN; + up->mxc_base->cr1 = ucr1; + + return 0; +} + +static ptu32_t imxUartCtrl(ptu32_t PrivateTag, u32 cmd, va_list *arg0) +{ + return 0; +} + +/* half the RX buffer size */ +#define CTSTL 16 ptu32_t ModuleInstall_UART(ptu32_t serial_no) { - struct UartParam *Param; - struct imxUartPort *up; + struct UartParam *Param; + struct imxUartPort *up; + + volatile struct mxc_uart *mxc_base; + u32 ucr1, ucr2, ucr3, ucr4; + ufast_t ufl_line; + int i, ret; + + serial_no = 0; + /* check serial_no */ + Param = &imxUartParam[serial_no]; + Param->UartPortTag = &imxUartPort[serial_no]; - serial_no = 0; - Param = &imxUartParam[serial_no]; - up = &imxUartPort[serial_no]; + up = (void *)Param->UartPortTag; + mxc_base = up->mxc_base; + ufl_line = up->ufl_line; -// up->UartGeneralCB = UART_InstallGeneral(Param); + /* mxc_serial_probe */ + mxc_base->cr1 = 0; + mxc_base->cr2 = 0; + while (mxc_base->cr2 & UCR2_SRST == 0); + + mxc_base->cr3 = 0x0704 | UCR3_ADNIMP; + mxc_base->cr4 = 0x8000; + mxc_base->esc = 0x002b; + mxc_base->tim = 0; + mxc_base->ts = 0; + /* serial_setbrg */ + mxc_base->fcr = 4 << 7 | 2 << 10 | 1; /* divide input clock by 2 */ + mxc_base->bir = 0xf; + mxc_base->bmr = 80000000 / (2 * 115200); + + mxc_base->cr2 = UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST; + + /* 清除中断标志，并启用中断 */ + mxc_base->sr1 = USR1_RTSD | USR1_DTRD; + mxc_base->sr2 = USR2_ORE; + + mxc_base->cr1 = UCR1_UARTEN | UCR1_RRDYEN | UCR1_TRDYEN; + + + + /* 把中断和响应函数关联起来。 */ + Int_Register(ufl_line); + Int_SetClearType(ufl_line, CN_INT_CLEAR_AUTO); + Int_IsrConnect(ufl_line, imx_uart_int); + Int_SettoAsynSignal(ufl_line); + Int_ClearLine(ufl_line); + Int_RestoreAsynLine(ufl_line); + Int_SetIsrPara(ufl_line, serial_no); + + setIntTarget(58, 1); + + /* 安装到系统里去。 */ + up->UartGeneralCB = UART_InstallGeneral(Param); + ret = (up->UartGeneralCB != NULL); + + return ret; } -s32 imxPutStrDirect(const char *buf,u32 len) +s32 imxPutStrDirect(const char *buf, u32 len) { int c; - while (len) { - c = *buf++; - /* write c to hardware. */ - len--; + volatile struct mxc_uart *mxc_base; + int i; + + mxc_base = (void *)0x02020000; + + for (i = 0; i < len; i++) { + /* write c to hardware. */ + while (mxc_base->ts & UTS_TXEMPTY == 0); + c = buf[i]; + mxc_base->txd = c; } + return i; } + char imxGetCharDirect(void) { int c; - c = 'C'; /* read from hardware. */ + volatile struct mxc_uart *mxc_base = (void *)0x02020000; + + while (mxc_base->ts & UTS_RXEMPTY); + c = mxc_base->rxd & URXD_RX_DATA; return c; } void Stdio_KnlInOutInit(char * StdioIn, char *StdioOut) { - PutStrDirect = imxPutStrDirect; - GetCharDirect = imxGetCharDirect; + PutStrDirect = imxPutStrDirect; + GetCharDirect = imxGetCharDirect; } - diff --git a/bsp/cpudrv/freescale/imx6q/src/wdt/cpu_peri_wdt.c b/bsp/cpudrv/freescale/imx6q/src/wdt/cpu_peri_wdt.c deleted file mode 100644 index 5d019d9267f14b48b2c5eb3d515da6692f792ba5..0000000000000000000000000000000000000000 --- a/bsp/cpudrv/freescale/imx6q/src/wdt/cpu_peri_wdt.c +++ /dev/null @@ -1,161 +0,0 @@ -#include "stdint.h" -#include "stddef.h" -#include "stdio.h" -#include "cpu_peri.h" -#include "project_config.h" //本文件由IDE中配置界面生成，存放在APP的工程目录中。 - //允许是个空文件，所有配置将按默认值配置。 - -//@#$%component configure ****组件配置开始，用于 DIDE 中图形化配置界面 -//****配置块的语法和使用方法，参见源码根目录下的文件：component_config_readme.txt**** -//%$#@initcode ****初始化代码开始，由 DIDE 删除“//”后copy到初始化文件中 -// extern bool_t WDT_SAMSUNGInit(u32 setcycle); -// WDT_SAMSUNGInit(0); -//%$#@end initcode ****初始化代码结束 - -//%$#@describe ****组件描述开始 -//component name:"cpu onchip wdt"//CPU的看门狗外设驱动 -//parent:"watch dog" //填写该组件的父组件名字，none表示没有父组件 -//attribute:bsp //选填“third、system、bsp、user”，本属性用于在IDE中分组 -//select:choosable //选填“required、choosable、none”，若填必选且需要配置参数，则IDE裁剪界面中默认勾取， - //不可取消，必选且不需要配置参数的，或是不可选的，IDE裁剪界面中不显示， -//init time:pre-main //初始化时机，可选值：early，medium，later, pre-main。 - //表示初始化时间，分别是早期、中期、后期 -//dependence:"watch dog" //该组件的依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件将强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//weakdependence:"none" //该组件的弱依赖组件名（可以是none，表示无依赖组件）， - //选中该组件时，被依赖组件不会被强制选中， - //如果依赖多个组件，则依次列出，用“,”分隔 -//mutex:"none" //该组件的互斥组件名（可以是none，表示无互斥组件）， - //如果与多个组件互斥，则依次列出，用“,”分隔 -//%$#@end describe ****组件描述结束 - -//%$#@configue ****参数配置开始 -#if ( CFG_MODULE_ENABLE_CPU_ONCHIP_WDT == false ) -//#warning " cpu_onchip_wdt 组件参数未配置，使用默认配置" -//%$#@target = header //header = 生成头文件,cmdline = 命令行变量，DJYOS自有模块禁用 -#define CFG_MODULE_ENABLE_CPU_ONCHIP_WDT false //如果勾选了本组件，将由DIDE在project_config.h或命令行中定义为true -//%$#@num,500000,20000000, -#define CFG_WDT_WDTCYCLE (3*1000*1000) //"看门狗超时时间"，单位us -#define CFG_BOOT_TIME_LIMIT 20000000 //"启动加载超限时间",允许保护启动加载过程才需要配置此项 -//%$#@enum,true,false, -#define CFG_DEFEND_ON_BOOT false //"保护启动过程",启动加载过程如果出现死机，看门狗将复位 -//%$#@string,1,10, -//%$#select, ***从列出的选项中选择若干个定义成宏 -//%$#@free, -#endif -//%$#@end configue ****参数配置结束 -//@#$%component end configure -// ============================================================================= - -//#define CFG_WDT_WDTCYCLE (3*1000*1000) //单位为微秒=3S -#define CN_WDT_DOGNAME "SAMSUNGKWDT" - -// ============================================================================= -//功能: 启动看门狗 -//参数：无 -//返回：无 -// ============================================================================= -void WDT_Start(void) -{ - //disable watchdog interrupt - pg_wdt_reg->WTCON &= ~(3<<1); - //enable Watchdog timer;reset signal. - pg_wdt_reg->WTCON|=((1<<5)|(1<<0)); -} - -// ============================================================================= -//功能: 软件复位。 -//参数：无 -//返回：无 -//注意: 通过调用复位函数实现，真正的复位函数，不是在这里实现 -// ============================================================================= -void WDT_Reboot(void) -{ - while(1);//到时候，可以调用复位函数，这里先用while(1)代替 -} - -// ============================================================================= -//功能: 看门狗狗叫，需要进行硬件复位 -//参数：无 -//返回：无 -// ============================================================================= -void WDT_HardReset(void) -{ - while(1); - // 1、如果硬件有这个功能，可以设置成立马复位 - // 2、可以设置成修改timeout，立马复位。 -} - -// ============================================================================= -//功能: 看门狗喂狗函数 -//参数：无 -//返回：无 -// ============================================================================= -bool_t WDT_WdtFeed(void) -{ - printk("WDT FEED!\r\n"); - pg_wdt_reg->WTCNT = 15000; - return true; -} - -// ============================================================================= -//功能: 看门狗硬件初始化 -//参数：无 -//返回：无 -//注意: 根据用户的看门狗初始化，然后和djyos提供的条件连接 -// ============================================================================= -void WDT_HardInit(void) -{ - //Prescaler value=100;lock division factor=128 ;PCLK=67.5MHz - //t_watchdog=1/[PCLK/(Prescaler value+1)/Division_factor]=0.0002 - //disable watchdog - pg_wdt_reg->WTCON=((100<<8)|(3<<3)); - //看门狗时钟周期T=WTCNT*t_watchdog=3S - //看门狗喂狗 - pg_wdt_reg->WTDAT = 15000; - pg_wdt_reg->WTCNT = 15000; - - //以上看门狗初始化，用户可以根据各自平台设置，下面，按照djyos设置 - //设置check_timeout，单位为us，和系统的djy_timer_sync的参数单位一致 -// wdt_set_check_timeout(3000*1000); -// wdt_star(); -} - -//**************************************************// -//todo：这三个函数用于实现保护加载过程，使用的时候需补全 -u32 __FeedDog_Isr(ptu32_t intline) -{ - return false; -} -bool_t __BrdBoot_FeedStart(u32 bootfeedtime) -{ - return false; -} - -bool_t __BrdBoot_FeedEnd(void) -{ - return false; -} -//**************************************************// - -// ============================================================================= -// 功能：板上看门狗芯片初始化，此函数在软看门狗组件后面初始化，如果启动了“防护启动加载过程” -// 的功能，本函数调用后，将停止自动喂狗。 -// 输入参数: -// 返回值 :true成功false失败 -// ============================================================================= -bool_t WDT_SAMSUNGInit(u32 setcycle) -{ - bool_t result; - - WDT_HardInit(); - //初始化WDT模块 -// result = WdtHal_RegisterWdtChip(CN_WDT_DOGNAME,CFG_WDT_WDTCYCLE,WDT_WdtFeed,NULL,NULL); - result = WdtHal_RegisterWdtChip(CN_WDT_DOGNAME, CFG_WDT_WDTCYCLE, WDT_WdtFeed); -#if(CFG_DEFEND_ON_BOOT == true) - __BrdBoot_FeedEnd(); -#endif - return result; -} -