# miniMAC_1GE

**Repository Path**: ghlyc/miniMAC_1GE

## Basic Information

- **Project Name**: miniMAC_1GE
- **Description**: No description available
- **Primary Language**: Verilog
- **License**: Apache-2.0
- **Default Branch**: master
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 0
- **Forks**: 9
- **Created**: 2017-11-27
- **Last Updated**: 2020-12-19

## Categories & Tags

**Categories**: Uncategorized

**Tags**: None

## README

# miniMAC_1GE

Study design of Ethernet interfacing and packet processing on FPGAs, starting from a minimum functionality MAC layer design.