diff --git a/cpu/core-riscv/include/riscv_irq.h b/cpu/core-riscv/include/riscv_irq.h
deleted file mode 100644
index aa9ac91a623d385172601953cfb508e3515dcf7c..0000000000000000000000000000000000000000
--- a/cpu/core-riscv/include/riscv_irq.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef __RISCV_MAILBOX_H
-#define __RISCV_MAILBOX_H
-
-#include <stdint.h>
-
-void ingenic_mbx_sendmsg(uint32_t data);
-uint32_t ingenic_mbx_readmsg(void);
-void enable_irq(void);
-
-#endif
diff --git a/cpu/core-riscv/include/riscv_sys.h b/cpu/core-riscv/include/riscv_sys.h
deleted file mode 100644
index 20ef3f8bf54b4a1de12fdfd71134e3e1e3391657..0000000000000000000000000000000000000000
--- a/cpu/core-riscv/include/riscv_sys.h
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef __RISKV_SYSY_H
-#define __RISKV_SYSY_H
-
-void init_systick(void);
-void systick_delay_ms(unsigned int ms);
-void riscv_sys_init(void);
-void riscv_sys_deinit(void);
-
-#endif
diff --git a/cpu/core-riscv/src/riscv_irq.c b/cpu/core-riscv/src/riscv_irq.c
deleted file mode 100644
index 75c06dcd711c429aa692d0424f9163075b972689..0000000000000000000000000000000000000000
--- a/cpu/core-riscv/src/riscv_irq.c
+++ /dev/null
@@ -1,42 +0,0 @@
-#include <riscv.h>
-#include "riscv_irq.h"
-
-#ifdef RPMSG
-#include "rpmsg_platform.h"
-#endif
-
-
-void ingenic_mbx_sendmsg(uint32_t data)
-{
-	*CCU_TO_HOST = data;
-}
-
-uint32_t ingenic_mbx_readmsg(void)
-{
-	return *CCU_FROM_HOST;
-}
-
-void soft_handler(void) {
-	if(*CCU_SOFT_PEND & 0x1){
-		*CCU_SOFT_PEND = 0x0;
-		prom_printk("recevied soft irq\n");
-	}
-
-}
-
-void mailbox_handler(void) {
-	uint32_t msg = *CCU_FROM_HOST;
-	*CCU_FROM_HOST = 0x0;
-#ifdef RPMSG
-	rpmsg_handler(msg);
-#endif
-}
-
-void ost_handler(void) {
-	//prom_printk("ost_handler\n");
-	*CCU_TIME_CMP_H = 0xfffffff;
-	*CCU_TIME_CMP_L = 0xfffffff;
-	*CCU_CCSR = *CCU_CCSR & ~(1 << 5); // Disable timer
-}
-
-
diff --git a/cpu/core-riscv/src/riscv_sys.c b/cpu/core-riscv/src/riscv_sys.c
deleted file mode 100644
index 1266ed1d8e04ecf03813310e15a9fd6a4cb24369..0000000000000000000000000000000000000000
--- a/cpu/core-riscv/src/riscv_sys.c
+++ /dev/null
@@ -1,48 +0,0 @@
-#include <riscv.h>
-#include "riscv_sys.h"
-
-void init_systick()
-{
-    *CCU_CCSR = *CCU_CCSR & ~(1 << 5); // Disable timer
-    *CCU_TIME_L = 0;
-    *CCU_TIME_H = 0;
-    *CCU_TIME_CMP_H = 0x0fffffff;
-    *CCU_TIME_CMP_L = 0x0fffffff;
-
-}
-
-void systick_delay_ms(unsigned int ms)
-{
-    unsigned int time_count=0;
-    *CCU_TIME_L = 0;
-    *CCU_TIME_H = 0;
-    *CCU_TIME_CMP_H = 0x0fffffff;
-    *CCU_TIME_CMP_L = 0x0fffffff;
-
-    *CCU_CCSR = *CCU_CCSR | (1 << 5); //Enable timer
-
-    while(time_count<ms){
-        while(*CCU_TIME_L <= 600*1000);
-        *CCU_TIME_H = 0;
-        *CCU_TIME_L = 0;
-        time_count++;
-        //printf("time_count:%d\n",time_count);
-    }
-
-    *CCU_CCSR = *CCU_CCSR & ~(1 << 5); // Disable timer
-
-    *CCU_TIME_L = 0;
-    *CCU_TIME_H = 0;
-    *CCU_TIME_CMP_H = 0x0fffffff;
-    *CCU_TIME_CMP_L = 0x0fffffff;
-}
-
-void riscv_sys_init(void)
-{
-	init_systick();
-}
-
-void riscv_sys_deinit(void)
-{
-}
-
diff --git a/cpu/core-riscv/traps.c b/cpu/core-riscv/traps.c
index 7a0291aaff49498ffac37a2bc93970f78246deb8..e2ee5dc5e3427c1ae93808d5e13fb504c9319bc7 100644
--- a/cpu/core-riscv/traps.c
+++ b/cpu/core-riscv/traps.c
@@ -11,18 +11,43 @@
 void enable_irq_cpu(int irq)
 {
 	CSR_SET(MIE, 1 << irq);
-	CSR_SET(MSTATUS, MSTATUS_MIE);
 }
 
 void disable_irq_cpu(int irq)
 {
-	unsigned int mstatus = 0;
-	CSR_READ(MSTATUS, mstatus);
-	mstatus &= ~(MSTATUS_MIE);
-	CSR_SET(MSTATUS, mstatus);
+	unsigned int mie = 0;
+	CSR_READ(MIE, mie);
+	mie &= ~(1 << irq);
+	CSR_SET(MIE, mie);
 }
 
 
+/*
+ * handler
+ * */
+__attribute__ ((weak)) void ost_handler(int irq, void *data) {
+	//prom_printk("ost_handler\n");
+	*CCU_TIME_CMP_H = 0xfffffff;
+	*CCU_TIME_CMP_L = 0xfffffff;
+	*CCU_CCSR = *CCU_CCSR & ~(1 << 5); // Disable timer
+}
+
+__attribute__ ((weak)) void soft_handler(int irq, void *data) {
+	if(*CCU_SOFT_PEND & 0x1){
+		*CCU_SOFT_PEND = 0x0;
+		prom_printk("recevied soft irq\n");
+	}
+
+}
+
+__attribute__ ((weak)) void mailbox_handler(int irq, void *data) {
+	uint32_t msg = *CCU_FROM_HOST;
+	*CCU_FROM_HOST = 0x0;
+#ifdef RPMSG
+	rpmsg_handler(msg);
+#endif
+}
+
 /*
     CPU 中断分发函数，由汇编调用，属于CPU一级中断处理函数.
 */
@@ -39,9 +64,9 @@ void exc_handler(void) {
 		}
 	}else{
 		/*TODO*/
-	    //prom_printk("mcause = %x\n", cause);
-	    CSR_READ(MIP, mip);
-	    //prom_printk("mip = %x\n", mip);
+		//prom_printk("mcause = %x\n", cause);
+		CSR_READ(MIP, mip);
+		//prom_printk("mip = %x\n", mip);
 	}
 }
 
diff --git a/cpu/soc-x2600/include/interrupt.h b/cpu/soc-x2600/include/interrupt.h
index 2162bb0339fbc8e06c8871467f4c894465ae4d26..4d41ed2e90eaa0e4d66d53e1a02d841dde339ce3 100755
--- a/cpu/soc-x2600/include/interrupt.h
+++ b/cpu/soc-x2600/include/interrupt.h
@@ -118,6 +118,9 @@ extern void disable_irq_cpu(int irq);
 extern void handle_irq(int irq);
 extern void ll_set_irq_priority(int irq, irq_priority_t priority);
 
+void ost_handler(int irq, void *data);
+void soft_handler(int irq, void *data);
+void mailbox_handler(int irq, void *data);
 
 
 #ifdef __cplusplus
diff --git a/cpu/soc-x2600/src/interrupt.c b/cpu/soc-x2600/src/interrupt.c
index 7507c13a0d9db89dd82ad2d8b01e49afbc725898..0e5e62d8d9aded8b28d8d34ec04bddfd820341ec 100644
--- a/cpu/soc-x2600/src/interrupt.c
+++ b/cpu/soc-x2600/src/interrupt.c
@@ -317,9 +317,9 @@ void irq_init(void)
     ll_request_irq(IRQ_CPU_INTC, intc_handler, NULL);
 #elif CORE_RISCV
     ll_request_irq(IRQ_RISCV_INTC, intc_handler, NULL);
-  //ll_request_irq(IRQ_RISCV_OST, intc_handler, NULL);
-  //ll_request_irq(IRQ_RISCV_SOFT, intc_handler, NULL);
-  //ll_request_irq(IRQ_RISCV_MAILBOX, intc_handler, NULL);
+    ll_request_irq(IRQ_RISCV_OST, ost_handler, NULL);
+    ll_request_irq(IRQ_RISCV_SOFT, soft_handler, NULL);
+    ll_request_irq(IRQ_RISCV_MAILBOX, mailbox_handler, NULL);
 #endif
 
     local_irq_enable();