# Buck_F280025_1KW

**Repository Path**: magic123cn/Buck_F280025_1KW

## Basic Information

- **Project Name**: Buck_F280025_1KW
- **Description**: No description available
- **Primary Language**: Unknown
- **License**: Not specified
- **Default Branch**: main
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 0
- **Forks**: 0
- **Created**: 2026-04-13
- **Last Updated**: 2026-04-13

## Categories & Tags

**Categories**: Uncategorized

**Tags**: None

## README

# BUCK Dual-Loop Control on TMS320F280025

This repository contains a BUCK converter control project for the TI C2000 `TMS320F280025`.
It started from a basic `ePWM` waveform example and has been extended into an experimental closed-loop power control application with:

- complementary PWM output
- synchronized ADC sampling
- voltage outer loop
- current inner loop
- soft-start
- linear voltage calibration
- current offset compensation
- debug-friendly runtime variables

## Status

`Experimental`

This code is intended for lab bring-up, control-loop learning, and iterative tuning. It should not be treated as production-ready firmware without additional review, protection logic, and hardware validation.

## Key Features

- `ePWM1A/ePWM1B` complementary PWM generation
- dead-band insertion
- `ADCA` dual-channel synchronized sampling
- voltage feedback on `A3/C5 -> ADCAIN3`
- current feedback on `A14/C4 -> ADCAIN14`
- voltage PI outer loop
- current PI inner loop
- software soft-start for voltage reference
- inverted actuator mapping for the current hardware
- calibrated voltage conversion from ADC counts to real output voltage
- static current zero-offset compensation

## Hardware Summary

### MCU

- Device: `TMS320F280025`
- Package: `80QFP`
- SysConfig product baseline: `C2000Ware 6.00.01.00`

### PWM Pins

- `GPIO0`: `EPWM1A`
- `GPIO1`: `EPWM1B`

### ADC Pins

- Voltage feedback: `A3/C5`, `ADCA SOC0`, `ADCIN3`
- Current feedback: `A14/C4`, `ADCA SOC1`, `ADCIN14`

### Current Sensor

- Model: `ACS733KLATR-20-AB-T`
- Sensitivity used in code: `66 mV/A`

## Control Architecture

The current firmware uses a standard cascaded control structure:

```text
Vref -> Voltage PI -> Iref -> Current PI -> dutyCmd -> PWM mapping -> BUCK stage
                           ^                             |
                           |                             v
                        iSense <---------------------- ADC current

Vout <------------------------------------------------ ADC voltage
```

### Execution Model

- `ePWM1 SOCA` triggers both `ADCA SOC0` and `SOC1`
- `ADCINT1` fires after `SOC1` completes
- `buckAdcISR()` runs the control loop
- the current loop runs every ADC interrupt
- the voltage loop runs at a divided rate and is slower than the current loop

### Important PWM Direction Note

The current hardware behaves like an inverted actuator: a smaller applied PWM duty produces a higher BUCK output.

Because of that, the code intentionally separates:

- `dutyCmd`: controller output
- `pwmDutyApplied`: actual PWM duty sent to the power stage

The mapping used in code is:

```c
pwmDutyApplied = 1.0f - dutyCmd;
```

## Voltage Calibration

The voltage feedback path uses a linear fit based on measured calibration points:

- `30 V -> 2115`
- `57 V -> 2173`
- `95 V -> 2256`
- `189.7 V -> 2426`

Current conversion formula in code:

```text
Vout = 0.5152063 * ADC - 1062.4252
```

## Current Measurement

The current feedback path is based on ADC sampling plus software compensation:

- `rawCurrent`: latest raw ADC count
- `rawCurrentFilt`: filtered ADC count
- `rawCurrentComp`: debug-only compensated count
- `iSense_A`: current value converted to amperes

`rawCurrentComp` shifts the measured zero point from about `2100` counts toward the ideal midpoint `2048` so that zero-current debugging is easier.

## Repository Layout

```text
.
|-- epwm_ex2_updown_aq.c
|-- epwm_ex2_updown_aq.syscfg
|-- README.md
|-- buck_control_report.md
|-- 28002x_generic_flash_lnk.cmd
|-- 28002x_generic_ram_lnk.cmd
|-- targetConfigs/
|-- device/
`-- CPU1_RAM/syscfg/
```

### File Roles

- `epwm_ex2_updown_aq.c`: handwritten application logic
- `epwm_ex2_updown_aq.syscfg`: SysConfig source file
- `CPU1_RAM/syscfg/`: generated files, do not edit manually
- `buck_control_report.md`: project evolution and learning notes

## Development Rule

Do not edit generated files under `CPU1_RAM/syscfg/` directly.

Only edit:

- `epwm_ex2_updown_aq.c`
- `epwm_ex2_updown_aq.syscfg`

Otherwise, the next SysConfig regeneration may overwrite manual changes.

## Build

### Build in CCS

1. Open the project in Code Composer Studio.
2. Select the desired target configuration.
3. Build the project.
4. Flash and debug on the target board.

### Build from Command Line

From the repository root:

```powershell
& 'D:\1-CCS\1-file\ccs\utils\bin\gmake.exe' -C '.\CPU1_RAM' -j4 all
```

## Bring-Up Checklist

Recommended first power-up sequence:

1. Verify `EPWM1A/EPWM1B` waveform relationship before enabling full power.
2. Confirm that `rawVoltage` and `rawCurrent` are updating.
3. Confirm that `rawVoltageFilt` and `rawCurrentFilt` are stable.
4. Confirm that `vOut_V` follows the real output trend.
5. Confirm that `iSense_A` has the correct sign.
6. Close the loop only under current-limited and low-risk conditions.

## Recommended Debug Variables

Watch these variables in CCS:

- `gBuckDebug.rawVoltage`
- `gBuckDebug.rawVoltageFilt`
- `gBuckDebug.vOut_V`
- `gBuckDebug.vRef_V`
- `gBuckDebug.voltageError_V`
- `gBuckDebug.rawCurrent`
- `gBuckDebug.rawCurrentFilt`
- `gBuckDebug.rawCurrentComp`
- `gBuckDebug.iSense_A`
- `gBuckDebug.iRef_A`
- `gBuckDebug.currentError_A`
- `gBuckDebug.dutyCmd`
- `gBuckDebug.pwmDutyApplied`
- `gBuckDebug.pwmCmpa`
- `gBuckDebug.isrCount`
- `gBuckDebug.adcIntOverflowCount`

## Known Limitations

- PI gains are still lab-tuned and not part of a formal tuning workflow.
- There is no complete over-voltage, over-current, short-circuit, or fault-latch strategy yet.
- Current zero offset is handled by a static measured bias, not by automatic startup calibration.
- The repository still contains build outputs and generated artifacts.
- The repository does not yet include a formal `LICENSE` file.

## Safety Notes

This firmware directly controls a power stage. Before connecting it to a real BUCK converter, make sure that:

- the input source is current-limited
- validation starts at no-load or light-load
- PWM and output waveforms are observed on an oscilloscope
- sensor polarity and zero offsets are confirmed before closed-loop operation
- target voltage is not stepped aggressively on unknown hardware

## Documentation

- Project history and change summary: [buck_control_report.md](./buck_control_report.md)
- Main application logic: [epwm_ex2_updown_aq.c](./epwm_ex2_updown_aq.c)
- SysConfig source: [epwm_ex2_updown_aq.syscfg](./epwm_ex2_updown_aq.syscfg)

## Roadmap

- add automatic zero-current calibration during startup
- add fault handling and protection logic
- improve PI tuning workflow
- add cleaner debug and logging interfaces
- clean generated outputs before publishing
- add standard open-source repository files such as `.gitignore` and `LICENSE`

## Contributing

Contributions are welcome around:

- control-loop improvements
- calibration workflow
- protection logic
- documentation
- repository cleanup

Before submitting changes:

- do not modify generated files under `CPU1_RAM/syscfg/`
- document the hardware assumptions used for testing
- keep debug variables consistent with the documentation

## Open-Source Publishing Checklist

Before publishing this repository on GitHub, it is strongly recommended to add:

- `LICENSE`
- `.gitignore`
- release notes or tags
- optional hardware photos or schematic excerpts