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此仓库是为了提升国内下载速度的镜像仓库,每日同步一次。 原始仓库: https://github.com/LvNA-system/labeled-RISC-V
labeled-RISC-V —— 标签化RISC-V项目 该项目基于 RocketChip 增加了标签功能, 给硬件请求打上标签, 赋予硬件区分, 隔离和优先化三种新能力 spread retract

https://www.oschina.net/p/labeled-risc-v

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LvNAConfigs.scala 4.66 KB
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// See LICENSE for license details.
package freechips.rocketchip.system
import freechips.rocketchip.config.{Config, Field}
import freechips.rocketchip.devices.tilelink.WithRocketTests
import freechips.rocketchip.subsystem._
import boom.common.{DefaultBoomConfig, WithMediumBooms, WithRVC, WithSmallBooms}
import boom.system.WithNBoomCores
import boom.lsu.pref.WithPrefetcher
case object UseEmu extends Field[Boolean](false)
case object NohypeDefault extends Field[Boolean](true)
class WithEmu extends Config ((site, here, up) => {
case UseEmu => true
})
case object UseBoom extends Field[Boolean](false)
class WithBoom extends Config ((site, here, up) => {
case UseBoom => true
})
// Boom
class LvNABoomConfig extends Config(
new WithBoomNBL1(4)
// ++ new WithPrefetcher
++ new WithRVC
++ new WithSmallBooms
++ new DefaultBoomConfig
++ new WithNBoomCores(1)
++ new WithNL2CacheCapacity(0)
++ new WithEmu
++ new WithBoom
++ new WithRationalRocketTiles
++ new WithExtMemSize(0x8000000L) // 32MB
++ new WithNoMMIOPort
++ new WithJtagDTM
++ new WithDebugSBA
++ new BaseBoomConfig)
class LvNABoomPrefConfig extends Config(
new WithPrefetcher ++
new WithBoomNBL1(4) ++
new WithRVC
++ new WithSmallBooms
++ new DefaultBoomConfig
++ new WithNBoomCores(1)
++ new WithNL2CacheCapacity(0)
++ new WithEmu
++ new WithBoom
++ new WithRationalRocketTiles
++ new WithExtMemSize(0x8000000L) // 32MB
++ new WithNoMMIOPort
++ new WithJtagDTM
++ new WithDebugSBA
++ new BaseBoomConfig)
class LvNABoomTestConfig extends Config(
new WithPrefetcher ++
new WithBoomNBL1(4) ++
new WithRVC
++ new WithMediumBooms
++ new DefaultBoomConfig
++ new WithNBoomCores(1)
++ new WithNL2CacheCapacity(0)
++ new WithEmu
++ new WithBoom
++ new WithRationalRocketTiles
// ++ new WithJtagDTM : // remove JtagDTM for rocket tests
++ new WithExtMemBase(0x80000000L) // for rocket tests
++ new WithExtMemSize(0x1000000L) // 4MB
++ new WithNoMMIOPort
++ new WithDebugSBA
++ new WithRocketTests
++ new BaseBoomConfig)
class LvNARocketTestConfig extends Config(
new WithoutFPU
++ new WithNBigCores(1)
++ new WithNonblockingL1(8)
++ new WithNL2CacheCapacity(0)
++ new WithNoMMIOPort
++ new WithEmu
++ new WithRationalRocketTiles
// ++ new WithJtagDTM // remove JtagDTM for rocket tests
++ new WithExtMemBase(0x80000000L) // for rocket tests
++ new WithExtMemSize(0x8000000L) // 32MB
++ new WithRocketTests
++ new BaseConfig)
class LvNABoomFPGAConfigzcu102 extends Config(
new WithPrefetcher ++
new WithBoomNBL1(4) ++
new WithRVC
++ new WithSmallBooms
++ new DefaultBoomConfig
++ new WithNL2CacheCapacity(0)
++ new WithBoom
++ new WithNBoomCores(1)
++ new WithRationalRocketTiles
++ new WithTimebase(BigInt(10000000)) // 10 MHz
++ new WithExtMemSize(0x100000000L)
++ new WithJtagDTM
++ new WithDebugSBA
++ new BaseBoomFPGAConfig)
// Rocket
class LvNAConfigemu extends Config(
new WithoutFPU
++ new WithNonblockingL1(8)
++ new WithNL2CacheCapacity(256)
++ new WithNBigCores(2)
++ new WithEmu
++ new WithRationalRocketTiles
++ new WithExtMemSize(0x8000000L) // 32MB
++ new WithNoMMIOPort
++ new WithJtagDTM
++ new WithDebugSBA
++ new BaseConfig)
class LvNAFPGAConfigzedboard extends Config(
new WithoutFPU
++ new WithNonblockingL1(8)
++ new WithNL2CacheCapacity(256)
++ new WithNZedboardCores(2)
++ new WithTimebase(BigInt(20000000)) // 20 MHz
++ new WithExtMemSize(0x100000000L)
++ new WithJtagDTM
++ new WithDebugSBA
++ new BaseFPGAConfig)
class LvNAFPGAConfigzcu102 extends Config(
new WithoutFPU
++ new WithNonblockingL1(8)
++ new WithNL2CacheCapacity(2048)
++ new WithNBigCores(4)
++ new WithRationalRocketTiles
++ new WithTimebase(BigInt(10000000)) // 10 MHz
++ new WithExtMemSize(0x80000000L) // 2GB
++ new WithJtagDTM
++ new WithDebugSBA
++ new BaseFPGAConfig)
class LvNAFPGAConfigsidewinder extends Config(
new WithNonblockingL1(8)
++ new WithNL2CacheCapacity(2048)
++ new WithNExtTopInterrupts(5)
++ new WithNBigCores(4)
++ new WithRationalRocketTiles
++ new WithTimebase(BigInt(10000000)) // 10 MHz
++ new WithExtMemSize(0x80000000L)
++ new WithJtagDTM
++ new WithDebugSBA
++ new BaseFPGAConfig)
class LvNAFPGAConfigrv32 extends Config(
new WithoutFPU
//++ new WithNonblockingL1(8)
++ new WithRV32
++ new WithNBigCores(1)
++ new WithRationalRocketTiles
++ new WithTimebase(BigInt(10000000)) // 10 MHz
++ new WithExtMemBase(0x80000000L)
++ new WithExtMemSize(0x80000000L)
++ new WithJtagDTM
++ new WithDebugSBA
++ new BaseFPGAConfig)

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