diff --git a/boards.txt b/boards.txt index f7ce6dcf8458650bad8ca5859e4ccc8dbc578950..2c6aa51f50592d86ebd6b5e4baff6e28429c89f0 100644 --- a/boards.txt +++ b/boards.txt @@ -23,11 +23,11 @@ genericJZW010D.upload.tool=spider_upload genericJZW010D.upload.protocol=spider_dfu ## JZW010DA ------------------------- -genericJZW010D.menu.device_variant.JZW010DA=JZW010DA (20k RAM. 64k Flash) +genericJZW010D.menu.device_variant.JZW010DA=JZW010DA (64k RAM. 1M Flash) genericJZW010D.menu.device_variant.JZW010DA.build.cpu_flags=-DMCU_JZW010DA -genericJZW010D.menu.device_variant.JZW010DA.build.ldscript=ld/jtag_c8.ld -genericJZW010D.menu.device_variant.JZW010DA.upload.maximum_size=65536 -genericJZW010D.menu.device_variant.JZW010DA.upload.maximum_data_size=20480 +genericJZW010D.menu.device_variant.JZW010DA.build.ldscript=ld/flash_c8.ld +genericJZW010D.menu.device_variant.JZW010DA.upload.maximum_size=131072 +genericJZW010D.menu.device_variant.JZW010DA.upload.maximum_data_size=32768 diff --git a/cores/spider/HardwareSerial.cpp b/cores/spider/HardwareSerial.cpp new file mode 100644 index 0000000000000000000000000000000000000000..904b58b5476ee16755c4670ffd418a16c182dc96 --- /dev/null +++ b/cores/spider/HardwareSerial.cpp @@ -0,0 +1,145 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2010 Perry Hung. + * Copyright (c) 2011, 2012 LeafLabs, LLC. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file wirish/HardwareSerial.cpp + * @brief Wirish serial port implementation. + */ + +#include "HardwareSerial.h" + +#include +// #include +// #include +// #include + +HardwareSerial::HardwareSerial(usart_dev *usart_device, + uint8 tx_pin, + uint8 rx_pin) +{ + this->usart_device = usart_device; + this->tx_pin = tx_pin; + this->rx_pin = rx_pin; +} + +/* + * Set up/tear down + */ + +#define disable_timer_if_necessary(dev, ch) ((void)0) + +void HardwareSerial::begin(uint32 baud) +{ + begin(baud, SERIAL_8N1); +} +/* + * Roger Clark. + * Note. The config parameter is not currently used. This is a work in progress. + * Code needs to be written to set the config of the hardware serial control register in question. + * + */ + +void HardwareSerial::begin(uint32 baud, uint8_t config) +{ + // ASSERT(baud <= this->usart_device->max_baud);// Roger Clark. Assert doesn't do anything useful, we may as well save the space in flash and ram etc + + if (baud > this->usart_device->max_baud) + { + return; + } + + // const stm32_pin_info *txi = &PIN_MAP[this->tx_pin]; + // const stm32_pin_info *rxi = &PIN_MAP[this->rx_pin]; + + // disable_timer_if_necessary(txi->timer_device, txi->timer_channel); + + // usart_init(this->usart_device); + // usart_disable(this->usart_device); + // usart_config_gpios_async(this->usart_device, + // rxi->gpio_device, rxi->gpio_bit, + // txi->gpio_device, txi->gpio_bit, + // config); + // usart_set_baud_rate(this->usart_device, USART_USE_PCLK, baud); + // usart_enable(this->usart_device); +} + +void HardwareSerial::end(void) +{ + // usart_disable(this->usart_device); +} + +/* + * I/O + */ + +int HardwareSerial::read(void) +{ + // if (usart_data_available(usart_device) > 0) + // { + // return usart_getc(usart_device); + // } + // else + // { + // return -1; + // } + return 0; +} + +int HardwareSerial::available(void) +{ + return 0; // usart_data_available(this->usart_device); +} + +/* Roger Clark. Added function missing from LibMaple code */ + +int HardwareSerial::peek(void) +{ + return 0; // usart_peek(this->usart_device); +} + +int HardwareSerial::availableForWrite(void) +{ + return 0; // this->usart_device->wb->size - rb_full_count(this->usart_device->wb); +} + +size_t HardwareSerial::write(unsigned char ch) +{ + + // usart_putc(this->usart_device, ch); + return 1; +} + +/* edogaldo: Waits for the transmission of outgoing serial data to complete (Arduino 1.0 api specs) */ +void HardwareSerial::flush(void) +{ + // while(!rb_is_empty(this->usart_device->wb)); // wait for TX buffer empty + // while(!((this->usart_device->regs->SR) & (1< +#include +#include "Print.h" +#include "boards.h" +#include "Stream.h" +/* + * IMPORTANT: + * + * This class documented "by hand" (i.e., not using Doxygen) in the + * leaflabs-docs/ repository. + * + * If you alter the public HardwareSerial interface, you MUST update + * the documentation accordingly. + */ + +// Define constants and variables for buffering incoming serial data. We're +// using a ring buffer (I think), in which head is the index of the location +// to which to write the next incoming character and tail is the index of the +// location from which to read. +#if !(defined(SERIAL_TX_BUFFER_SIZE) && defined(SERIAL_RX_BUFFER_SIZE)) +#if (RAMEND < 1000) +#define SERIAL_TX_BUFFER_SIZE 16 +#define SERIAL_RX_BUFFER_SIZE 16 +#else +#define SERIAL_TX_BUFFER_SIZE 64 +#define SERIAL_RX_BUFFER_SIZE 64 +#endif +#endif +#if (SERIAL_TX_BUFFER_SIZE > 256) +typedef uint16_t tx_buffer_index_t; +#else +typedef uint8_t tx_buffer_index_t; +#endif +#if (SERIAL_RX_BUFFER_SIZE > 256) +typedef uint16_t rx_buffer_index_t; +#else +typedef uint8_t rx_buffer_index_t; +#endif + +struct usart_dev; + +/* Roger Clark + * + * Added config defines from AVR + * Note. The values will need to be changed to match STM32 USART config register values, these are just place holders. + */ +// Define config for Serial.begin(baud, config); +// Note. STM32 doesn't support as many different Serial modes as AVR or SAM cores. +// The word legth bit M must be set when using parity bit. + +#define SERIAL_8N1 0000000070 +#define SERIAL_8N2 0B00100000 +#define SERIAL_9N1 0B00001000 +#define SERIAL_9N2 0B00101000 + +#define SERIAL_8E1 0B00001010 +#define SERIAL_8E2 0B00101010 +/* not supported: +#define SERIAL_9E1 0B00001010 +#define SERIAL_9E2 0B00101010 +*/ +#define SERIAL_8O1 0B00001011 +#define SERIAL_8O2 0B00101011 +/* not supported: +#define SERIAL_9O1 0B00001011 +#define SERIAL_9O2 0B00101011 +*/ + +/* Roger Clark + * Moved macros from hardwareSerial.cpp + */ + +#define DEFINE_HWSERIAL(name, n) \ + HardwareSerial name(USART##n, \ + BOARD_USART##n##_TX_PIN, \ + BOARD_USART##n##_RX_PIN) + +#define DEFINE_HWSERIAL_UART(name, n) \ + HardwareSerial name(UART##n, \ + BOARD_USART##n##_TX_PIN, \ + BOARD_USART##n##_RX_PIN) + +/* Roger clark. Changed class inheritance from Print to Stream. + * Also added new functions for peek() and availableForWrite() + * Note. AvailableForWrite is only a stub function in the cpp + */ +class HardwareSerial : public Stream +{ + +public: + HardwareSerial(struct usart_dev *usart_device, + uint8 tx_pin, + uint8 rx_pin); + + /* Set up/tear down */ + void begin(uint32 baud); + void begin(uint32 baud, uint8_t config); + void end(); + virtual int available(void); + virtual int peek(void); + virtual int read(void); + int availableForWrite(void); + virtual void flush(void); + virtual size_t write(uint8_t); + inline size_t write(unsigned long n) { return write((uint8_t)n); } + inline size_t write(long n) { return write((uint8_t)n); } + inline size_t write(unsigned int n) { return write((uint8_t)n); } + inline size_t write(int n) { return write((uint8_t)n); } + using Print::write; + + /* Pin accessors */ + int txPin(void) { return this->tx_pin; } + int rxPin(void) { return this->rx_pin; } + + void setTxPin(uint8_t pin) { this->tx_pin = pin; } + void setRxPin(uint8_t pin) { this->rx_pin = pin; } + + operator bool() { return true; } + + /* Escape hatch into libmaple */ + /* FIXME [0.0.13] documentation */ + struct usart_dev *c_dev(void) { return this->usart_device; } + +private: + struct usart_dev *usart_device; + uint8 tx_pin; + uint8 rx_pin; + +protected: +#if 0 + volatile uint8_t * const _ubrrh; + volatile uint8_t * const _ubrrl; + volatile uint8_t * const _ucsra; + volatile uint8_t * const _ucsrb; + volatile uint8_t * const _ucsrc; + volatile uint8_t * const _udr; + // Has any byte been written to the UART since begin() + bool _written; + + volatile rx_buffer_index_t _rx_buffer_head; + volatile rx_buffer_index_t _rx_buffer_tail; + volatile tx_buffer_index_t _tx_buffer_head; + volatile tx_buffer_index_t _tx_buffer_tail; + // Don't put any members after these buffers, since only the first + // 32 bytes of this struct can be accessed quickly using the ldd + // instruction. + unsigned char _rx_buffer[SERIAL_RX_BUFFER_SIZE]; + unsigned char _tx_buffer[SERIAL_TX_BUFFER_SIZE]; +#endif +}; + +#ifndef SERIAL_USB +#define Serial Serial1 +#endif + +#if BOARD_HAVE_USART1 +extern HardwareSerial Serial1; +#endif + +extern HardwareSerial Serial2; + +#endif //_WIRISH_HARDWARESERIAL_H_ diff --git a/cores/spider/Print.cpp b/cores/spider/Print.cpp new file mode 100644 index 0000000000000000000000000000000000000000..a8aa07d69642b3dc6c01507ed8cf25d79f7d5e29 --- /dev/null +++ b/cores/spider/Print.cpp @@ -0,0 +1,318 @@ +/* + * Print.cpp - Base class that provides print() and println() + * Copyright (c) 2008 David A. Mellis. All right reserved. + * Copyright (c) 2011 LeafLabs, LLC. + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public License + * as published by the Free Software Foundation; either version 2.1 of + * the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + * Modified 23 November 2006 by David A. Mellis + * Modified 12 April 2011 by Marti Bolivar + */ + +#include "Print.h" + +#include "wirish_math.h" +#include "limits.h" + +#ifndef LLONG_MAX +/* + * Note: + * + * At time of writing (12 April 2011), the limits.h that came with the + * newlib we distributed didn't include LLONG_MAX. Because we're + * staying away from using templates (see /notes/coding_standard.rst, + * "Language Features and Compiler Extensions"), this value was + * copy-pasted from a println() of the value + * + * std::numeric_limits::max(). + */ +#define LLONG_MAX 9223372036854775807LL +#endif + +/* + * Public methods + */ + +size_t Print::write(const char *str) { + if (str == NULL) return 0; + return write((const uint8_t *)str, strlen(str)); +} + +size_t Print::write(const void *buffer, uint32 size) { + size_t n = 0; + uint8 *ch = (uint8*)buffer; + while (size--) { + write(*ch++); + n++; + } + return n; +} + +size_t Print::print(uint8 b, int base) { + return print((uint64)b, base); +} + +size_t Print::print(const String &s) +{ + return write(s.c_str(), s.length()); +} + +size_t Print::print(char c) { + return write(c); +} + +size_t Print::print(const char str[]) { + return write(str); +} + +size_t Print::print(int n, int base) { + return print((long long)n, base); +} + +size_t Print::print(unsigned int n, int base) { + return print((unsigned long long)n, base); +} + +size_t Print::print(long n, int base) { + return print((long long)n, base); +} + +size_t Print::print(unsigned long n, int base) { + return print((unsigned long long)n, base); +} + +size_t Print::print(long long n, int base) { + if (n < 0) { + print('-'); + n = -n; + } + return printNumber(n, base); +} + +size_t Print::print(unsigned long long n, int base) { + return printNumber(n, base); +} + +size_t Print::print(double n, int digits) { + return printFloat(n, digits); +} + +size_t Print::print(const __FlashStringHelper *ifsh) +{ + return print(reinterpret_cast(ifsh)); +} + +size_t Print::print(const Printable& x) +{ + return x.printTo(*this); +} + +size_t Print::println(void) +{ + size_t n = print('\r'); + n += print('\n'); + return n; +} + +size_t Print::println(const String &s) +{ + size_t n = print(s); + n += println(); + return n; +} + +size_t Print::println(char c) { + size_t n = print(c); + n += println(); + return n; +} + +size_t Print::println(const char c[]) { + size_t n = print(c); + n += println(); + return n; +} + +size_t Print::println(uint8 b, int base) { + size_t n = print(b, base); + n += println(); + return n; +} + +size_t Print::println(int n, int base) { + size_t s = print(n, base); + s += println(); + return s; +} + +size_t Print::println(unsigned int n, int base) { + size_t s = print(n, base); + s += println(); + return s; +} + +size_t Print::println(long n, int base) { + size_t s = print((long long)n, base); + s += println(); + return s; +} + +size_t Print::println(unsigned long n, int base) { + size_t s = print((unsigned long long)n, base); + s += println(); + return s; +} + +size_t Print::println(long long n, int base) { + size_t s = print(n, base); + s += println(); + return s; +} + +size_t Print::println(unsigned long long n, int base) { + size_t s = print(n, base); + s += println(); + return s; +} + +size_t Print::println(double n, int digits) { + size_t s = print(n, digits); + s += println(); + return s; +} + +size_t Print::println(const __FlashStringHelper *ifsh) +{ + size_t n = print(ifsh); + n += println(); + return n; +} + +size_t Print::println(const Printable& x) +{ + size_t n = print(x); + n += println(); + return n; +} + +#ifdef SUPPORTS_PRINTF +#include +#include +// Work in progress to support printf. +// Need to implement stream FILE to write individual chars to chosen serial port +int Print::printf (__const char *__restrict __format, ...) + { +FILE *__restrict __stream; + int ret_status = 0; + + + va_list args; + va_start(args,__format); + ret_status = vfprintf(__stream, __format, args); + va_end(args); + return ret_status; + } + #endif + +/* + * Private methods + */ + +size_t Print::printNumber(unsigned long long n, uint8 base) { + unsigned char buf[CHAR_BIT * sizeof(long long)]; + unsigned long i = 0; + size_t s=0; + if (n == 0) { + print('0'); + return 1; + } + + while (n > 0) { + buf[i++] = n % base; + n /= base; + } + + for (; i > 0; i--) { + s += print((char)(buf[i - 1] < 10 ? + '0' + buf[i - 1] : + 'A' + buf[i - 1] - 10)); + } + return s; +} + + +/* According to snprintf(), + * + * nextafter((double)numeric_limits::max(), 0.0) ~= 9.22337e+18 + * + * This slightly smaller value was picked semi-arbitrarily. */ +#define LARGE_DOUBLE_TRESHOLD (9.1e18) + +/* THIS FUNCTION SHOULDN'T BE USED IF YOU NEED ACCURATE RESULTS. + * + * This implementation is meant to be simple and not occupy too much + * code size. However, printing floating point values accurately is a + * subtle task, best left to a well-tested library function. + * + * See Steele and White 2003 for more details: + * + * http://kurtstephens.com/files/p372-steele.pdf + */ +size_t Print::printFloat(double number, uint8 digits) { +size_t s=0; + // Hackish fail-fast behavior for large-magnitude doubles + if (abs(number) >= LARGE_DOUBLE_TRESHOLD) { + if (number < 0.0) { + s=print('-'); + } + s+=print(""); + return s; + } + + // Handle negative numbers + if (number < 0.0) { + s+=print('-'); + number = -number; + } + + // Simplistic rounding strategy so that e.g. print(1.999, 2) + // prints as "2.00" + double rounding = 0.5; + for (uint8 i = 0; i < digits; i++) { + rounding /= 10.0; + } + number += rounding; + + // Extract the integer part of the number and print it + long long int_part = (long long)number; + double remainder = number - int_part; + s+=print(int_part); + + // Print the decimal point, but only if there are digits beyond + if (digits > 0) { + s+=print("."); + } + + // Extract digits from the remainder one at a time + while (digits-- > 0) { + remainder *= 10.0; + int to_print = (int)remainder; + s+=print(to_print); + remainder -= to_print; + } + return s; +} + diff --git a/cores/spider/Print.h b/cores/spider/Print.h new file mode 100644 index 0000000000000000000000000000000000000000..3d8d5a1f12f79623285bd6fac8afcbe90f894e26 --- /dev/null +++ b/cores/spider/Print.h @@ -0,0 +1,88 @@ +/* + * Print.h - Base class that provides print() and println() + * Copyright (c) 2008 David A. Mellis. All right reserved. + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public License + * as published by the Free Software Foundation; either version 2.1 of + * the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA. + * + * Modified 12 April 2011 by Marti Bolivar + */ + +#ifndef _WIRISH_PRINT_H_ +#define _WIRISH_PRINT_H_ + +#include +#include "WString.h" +#include "Printable.h" + +enum { + BIN = 2, + OCT = 8, + DEC = 10, + HEX = 16 +}; + +class Print { +public: + virtual size_t write(uint8 ch) = 0; + virtual size_t write(const char *str); + virtual size_t write(const void *buf, uint32 len); + + size_t print(const String &); + size_t print(char); + size_t print(const char[]); + size_t print(uint8, int=DEC); + size_t print(int, int=DEC); + size_t print(unsigned int, int=DEC); + size_t print(long, int=DEC); + size_t print(unsigned long, int=DEC); + size_t print(long long, int=DEC); + size_t print(unsigned long long, int=DEC); + size_t print(double, int=2); + size_t print(const __FlashStringHelper *); + size_t print(const Printable&); + size_t println(void); + size_t println(const String &s); + size_t println(char); + size_t println(const char[]); + size_t println(uint8, int=DEC); + size_t println(int, int=DEC); + size_t println(unsigned int, int=DEC); + size_t println(long, int=DEC); + size_t println(unsigned long, int=DEC); + size_t println(long long, int=DEC); + size_t println(unsigned long long, int=DEC); + size_t println(double, int=2); + size_t println(const __FlashStringHelper *); + size_t println(const Printable&); +#ifdef SUPPORTS_PRINTF +// Roger Clark. Work in progress to add printf support + int printf(const char * format, ...); +#endif + Print() : write_error(0) {} + + int getWriteError() { return write_error; } + void clearWriteError() { setWriteError(0); } + + protected: + void setWriteError(int err = 1) { write_error = err; } + +private: + int write_error; + size_t printNumber(unsigned long long, uint8); + size_t printFloat(double, uint8); +}; + +#endif diff --git a/cores/spider/Printable.h b/cores/spider/Printable.h new file mode 100644 index 0000000000000000000000000000000000000000..2a1b2e9f2c83f4109838b8b4b828bb2d94dc9eaf --- /dev/null +++ b/cores/spider/Printable.h @@ -0,0 +1,40 @@ +/* + Printable.h - Interface class that allows printing of complex types + Copyright (c) 2011 Adrian McEwen. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#ifndef Printable_h +#define Printable_h + +#include + +class Print; + +/** The Printable class provides a way for new classes to allow themselves to be printed. + By deriving from Printable and implementing the printTo method, it will then be possible + for users to print out instances of this class by passing them into the usual + Print::print and Print::println methods. +*/ + +class Printable +{ + public: + virtual size_t printTo(Print& p) const = 0; +}; + +#endif + diff --git a/cores/spider/Stream.cpp b/cores/spider/Stream.cpp new file mode 100644 index 0000000000000000000000000000000000000000..c682daeef5829f98367d0a55d88c3821e8f71ea3 --- /dev/null +++ b/cores/spider/Stream.cpp @@ -0,0 +1,335 @@ +/* + Stream.cpp - adds parsing methods to Stream class + Copyright (c) 2008 David A. Mellis. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + + Created July 2011 + parsing functions based on TextFinder library by Michael Margolis + */ + +#include "Arduino.h" +#include "Stream.h" + +#define PARSE_TIMEOUT 1000 // default number of milli-seconds to wait +#define NO_SKIP_CHAR 1 // a magic char not found in a valid ASCII numeric field + +// private method to read stream with timeout +int Stream::timedRead() +{ + int c; + _startMillis = millis(); + do { + c = read(); + if (c >= 0) return c; + } while(millis() - _startMillis < _timeout); + return -1; // -1 indicates timeout +} + +// private method to peek stream with timeout +int Stream::timedPeek() +{ + int c; + _startMillis = millis(); + do { + c = peek(); + if (c >= 0) return c; + } while(millis() - _startMillis < _timeout); + return -1; // -1 indicates timeout +} + +// returns peek of the next digit in the stream or -1 if timeout +// discards non-numeric characters +int Stream::peekNextDigit() +{ + int c; + while (1) { + c = timedPeek(); + if (c < 0) return c; // timeout + if (c == '-') return c; + if (c >= '0' && c <= '9') return c; + read(); // discard non-numeric + } +} + +// Public Methods +////////////////////////////////////////////////////////////// + +void Stream::setTimeout(unsigned long timeout) // sets the maximum number of milliseconds to wait +{ + _timeout = timeout; +} + + // find returns true if the target string is found +bool Stream::find(char *target) +{ + return findUntil(target, (char*)""); +} + +// reads data from the stream until the target string of given length is found +// returns true if target string is found, false if timed out +bool Stream::find(char *target, size_t length) +{ + return findUntil(target, length, NULL, 0); +} + +// as find but search ends if the terminator string is found +bool Stream::findUntil(char *target, char *terminator) +{ + return findUntil(target, strlen(target), terminator, strlen(terminator)); +} + +// reads data from the stream until the target string of the given length is found +// search terminated if the terminator string is found +// returns true if target string is found, false if terminated or timed out +bool Stream::findUntil(char *target, size_t targetLen, char *terminator, size_t termLen) +{ + size_t index = 0; // maximum target string length is 64k bytes! + size_t termIndex = 0; + int c; + + if( *target == 0) + return true; // return true if target is a null string + while( (c = timedRead()) > 0){ + + if(c != target[index]) + index = 0; // reset index if any char does not match + + if( c == target[index]){ + //////Serial.print("found "); Serial.write(c); Serial.print("index now"); Serial.println(index+1); + if(++index >= targetLen){ // return true if all chars in the target match + return true; + } + } + + if(termLen > 0 && c == terminator[termIndex]){ + if(++termIndex >= termLen) + return false; // return false if terminate string found before target string + } + else + termIndex = 0; + } + return false; +} + + +// returns the first valid (long) integer value from the current position. +// initial characters that are not digits (or the minus sign) are skipped +// function is terminated by the first character that is not a digit. +long Stream::parseInt() +{ + return parseInt(NO_SKIP_CHAR); // terminate on first non-digit character (or timeout) +} + +// as above but a given skipChar is ignored +// this allows format characters (typically commas) in values to be ignored +long Stream::parseInt(char skipChar) +{ + boolean isNegative = false; + long value = 0; + int c; + + c = peekNextDigit(); + // ignore non numeric leading characters + if(c < 0) + return 0; // zero returned if timeout + + do{ + if(c == skipChar) + ; // ignore this charactor + else if(c == '-') + isNegative = true; + else if(c >= '0' && c <= '9') // is c a digit? + value = value * 10 + c - '0'; + read(); // consume the character we got with peek + c = timedPeek(); + } + while( (c >= '0' && c <= '9') || c == skipChar ); + + if(isNegative) + value = -value; + return value; +} + + +// as parseInt but returns a floating point value +float Stream::parseFloat() +{ + return parseFloat(NO_SKIP_CHAR); +} + +// as above but the given skipChar is ignored +// this allows format characters (typically commas) in values to be ignored +float Stream::parseFloat(char skipChar){ + boolean isNegative = false; + boolean isFraction = false; + long value = 0; + int c; + float fraction = 1.0f; + + c = peekNextDigit(); + // ignore non numeric leading characters + if(c < 0) + return 0; // zero returned if timeout + + do{ + if(c == skipChar) + ; // ignore + else if(c == '-') + isNegative = true; + else if (c == '.') + isFraction = true; + else if(c >= '0' && c <= '9') { // is c a digit? + value = value * 10 + c - '0'; + if(isFraction) + fraction *= 0.1f; + } + read(); // consume the character we got with peek + c = timedPeek(); + } + while( (c >= '0' && c <= '9') || c == '.' || c == skipChar ); + + if(isNegative) + value = -value; + if(isFraction) + return value * fraction; + else + return value; +} + +// read characters from stream into buffer +// terminates if length characters have been read, or timeout (see setTimeout) +// returns the number of characters placed in the buffer +// the buffer is NOT null terminated. +// +size_t Stream::readBytes(char *buffer, size_t length) +{ + size_t count = 0; + while (count < length) { + int c = timedRead(); + if (c < 0) break; + *buffer++ = (char)c; + count++; + } + return count; +} + + +// as readBytes with terminator character +// terminates if length characters have been read, timeout, or if the terminator character detected +// returns the number of characters placed in the buffer (0 means no valid data found) + +size_t Stream::readBytesUntil(char terminator, char *buffer, size_t length) +{ + if (length < 1) return 0; + size_t index = 0; + while (index < length) { + int c = timedRead(); + if (c < 0 || c == terminator) break; + *buffer++ = (char)c; + index++; + } + return index; // return number of characters, not including null terminator +} + +String Stream::readString() +{ + String ret; + int c = timedRead(); + while (c >= 0) + { + ret += (char)c; + c = timedRead(); + } + return ret; +} + +String Stream::readStringUntil(char terminator) +{ + String ret; + int c = timedRead(); + while (c >= 0 && c != terminator) + { + ret += (char)c; + c = timedRead(); + } + return ret; +} + + +int Stream::findMulti( struct Stream::MultiTarget *targets, int tCount) { + // any zero length target string automatically matches and would make + // a mess of the rest of the algorithm. + for (struct MultiTarget *t = targets; t < targets+tCount; ++t) { + if (t->len <= 0) + return t - targets; + } + + while (1) { + int c = timedRead(); + if (c < 0) + return -1; + + for (struct MultiTarget *t = targets; t < targets+tCount; ++t) { + // the simple case is if we match, deal with that first. + if (c == t->str[t->index]) { + if (++t->index == t->len) + return t - targets; + else + continue; + } + + // if not we need to walk back and see if we could have matched further + // down the stream (ie '1112' doesn't match the first position in '11112' + // but it will match the second position so we can't just reset the current + // index to 0 when we find a mismatch. + if (t->index == 0) + continue; + + int origIndex = t->index; + do { + --t->index; + // first check if current char works against the new current index + if (c != t->str[t->index]) + continue; + + // if it's the only char then we're good, nothing more to check + if (t->index == 0) { + t->index++; + break; + } + + // otherwise we need to check the rest of the found string + int diff = origIndex - t->index; + size_t i; + for (i = 0; i < t->index; ++i) { + if (t->str[i] != t->str[i + diff]) + break; + } + + // if we successfully got through the previous loop then our current + // index is good. + if (i == t->index) { + t->index++; + break; + } + + // otherwise we just try the next index + } while (t->index); + } + } + // unreachable + return -1; +} diff --git a/cores/spider/Stream.h b/cores/spider/Stream.h new file mode 100644 index 0000000000000000000000000000000000000000..abdcd17688a5c87ba2a763d756fe5a3142eec69c --- /dev/null +++ b/cores/spider/Stream.h @@ -0,0 +1,115 @@ +/* + Stream.h - base class for character-based streams. + Copyright (c) 2010 David A. Mellis. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + + parsing functions based on TextFinder library by Michael Margolis +*/ + +#ifndef Stream_h +#define Stream_h + +#include +#include "Print.h" + +// compatability macros for testing +/* +#define getInt() parseInt() +#define getInt(skipChar) parseInt(skipchar) +#define getFloat() parseFloat() +#define getFloat(skipChar) parseFloat(skipChar) +#define getString( pre_string, post_string, buffer, length) +readBytesBetween( pre_string, terminator, buffer, length) +*/ + +class Stream : public Print +{ + protected: + unsigned long _timeout; // number of milliseconds to wait for the next char before aborting timed read + unsigned long _startMillis; // used for timeout measurement + int timedRead(); // private method to read stream with timeout + int timedPeek(); // private method to peek stream with timeout + int peekNextDigit(); // returns the next numeric digit in the stream or -1 if timeout + + public: + virtual int available() = 0; + virtual int read() = 0; + virtual int peek() = 0; + virtual void flush() = 0; + + Stream() {_timeout=1000;} + +// parsing methods + + void setTimeout(unsigned long timeout); // sets maximum milliseconds to wait for stream data, default is 1 second + unsigned long getTimeout(void) { return _timeout; } + + bool find(char *target); // reads data from the stream until the target string is found + bool find(uint8_t *target) { return find ((char *)target); } + // returns true if target string is found, false if timed out (see setTimeout) + + bool find(char *target, size_t length); // reads data from the stream until the target string of given length is found + bool find(uint8_t *target, size_t length) { return find ((char *)target, length); } + // returns true if target string is found, false if timed out + + bool find(char target) { return find (&target, 1); } + + bool findUntil(char *target, char *terminator); // as find but search ends if the terminator string is found + bool findUntil(uint8_t *target, char *terminator) { return findUntil((char *)target, terminator); } + + bool findUntil(char *target, size_t targetLen, char *terminate, size_t termLen); // as above but search ends if the terminate string is found + bool findUntil(uint8_t *target, size_t targetLen, char *terminate, size_t termLen) {return findUntil((char *)target, targetLen, terminate, termLen); } + + + long parseInt(); // returns the first valid (long) integer value from the current position. + // initial characters that are not digits (or the minus sign) are skipped + // integer is terminated by the first character that is not a digit. + + float parseFloat(); // float version of parseInt + + size_t readBytes( char *buffer, size_t length); // read chars from stream into buffer + size_t readBytes( uint8_t *buffer, size_t length) { return readBytes((char *)buffer, length); } + // terminates if length characters have been read or timeout (see setTimeout) + // returns the number of characters placed in the buffer (0 means no valid data found) + + size_t readBytesUntil( char terminator, char *buffer, size_t length); // as readBytes with terminator character + size_t readBytesUntil( char terminator, uint8_t *buffer, size_t length) { return readBytesUntil(terminator, (char *)buffer, length); } + // terminates if length characters have been read, timeout, or if the terminator character detected + // returns the number of characters placed in the buffer (0 means no valid data found) + + // Arduino String functions to be added here + String readString(); + String readStringUntil(char terminator); + + protected: + long parseInt(char skipChar); // as above but the given skipChar is ignored + // as above but the given skipChar is ignored + // this allows format characters (typically commas) in values to be ignored + + float parseFloat(char skipChar); // as above but the given skipChar is ignored + + struct MultiTarget { + const char *str; // string you're searching for + size_t len; // length of string you're searching for + size_t index; // index used by the search routine. + }; + + // This allows you to search for an arbitrary number of strings. + // Returns index of the target that is found first or -1 if timeout occurs. + int findMulti(struct MultiTarget *targets, int tCount); +}; + +#endif diff --git a/cores/spider/boards_private.h b/cores/spider/boards_private.h index 5f77326a15af37fb511f0b3768047f9c5867da75..1c2b7854c4c9186861cf1eb435049a1404d24fe8 100644 --- a/cores/spider/boards_private.h +++ b/cores/spider/boards_private.h @@ -44,28 +44,30 @@ // #define PMAP_ROW(gpio_dev, gpio_bit, timer_dev, timer_ch, adc_dev, adc_ch) \ // { gpio_dev, timer_dev, adc_dev, gpio_bit, timer_ch, adc_ch } -// namespace wirish { - // namespace priv { +namespace wirish +{ + namespace priv + { - // /* - // * Chip-specific initialization data - // */ + /* + * Chip-specific initialization data + */ // extern rcc_pll_cfg w_board_pll_cfg; // extern adc_prescaler w_adc_pre; // extern adc_smp_rate w_adc_smp; - // /* - // * Chip-specific initialization routines and helper functions. - // */ + /* + * Chip-specific initialization routines and helper functions. + */ - // void board_reset_pll(void); - // void board_setup_clock_prescalers(void); - // void board_setup_gpio(void); - // void board_setup_usb(void); - // void series_init(void); + void board_reset_pll(void); + void board_setup_clock_prescalers(void); + void board_setup_gpio(void); + void board_setup_usb(void); + void series_init(void); - // } -// } + } +} #endif diff --git a/cores/spider/io.h b/cores/spider/io.h index ca519aa105662ca2a786f7485761a2f48afca520..ec494fbdf8111729d34afc38e7b3b697c01439aa 100644 --- a/cores/spider/io.h +++ b/cores/spider/io.h @@ -39,7 +39,8 @@ * Specifies a GPIO pin behavior. * @see pinMode() */ -typedef enum WiringPinMode { +typedef enum WiringPinMode +{ OUTPUT, /**< Basic digital output: when the pin is HIGH, the voltage is held at +3.3v (Vcc) and when it is LOW, it is pulled down to ground. */ @@ -110,7 +111,7 @@ typedef enum WiringPinMode { void pinMode(uint8 pin, WiringPinMode mode); #define HIGH 0x1 -#define LOW 0x0 +#define LOW 0x0 /** * Writes a (digital) value to a pin. The pin must have its @@ -144,6 +145,8 @@ uint32 digitalRead(uint8 pin); */ uint16 analogRead(uint8 pin); +void togglePin(uint8 pin); + /** * Shift out a byte of data, one bit at a time. * @@ -160,6 +163,6 @@ uint16 analogRead(uint8 pin); */ void shiftOut(uint8 dataPin, uint8 clockPin, uint8 bitOrder, uint8 value); -uint32 shiftIn( uint32 ulDataPin, uint32 ulClockPin, uint32 ulBitOrder ); +uint32 shiftIn(uint32 ulDataPin, uint32 ulClockPin, uint32 ulBitOrder); #endif diff --git a/cores/spider/jzw01/jzw01x_hal_gpio.c b/cores/spider/jzw01/jzw01x_hal_gpio.c index dbab5916dfaab1679cd9cbbd105c79a3a0b0a54b..a2bc3b345176b36f29ac17a68ea464aaa253430a 100644 --- a/cores/spider/jzw01/jzw01x_hal_gpio.c +++ b/cores/spider/jzw01/jzw01x_hal_gpio.c @@ -214,52 +214,52 @@ const GPIO_UnitTypeDef pinmap[] = { void HAL_GPIO_SetMode(uint32_t pin, WiringPinMode mode) { - uint32_t offset = pin % 32; - - PAD->CR[pin / 2] &= (pin % 2 == 0) ? (~(0x3FF << PAD_CR_mFUN_Pos)) : (~(0x3FF << PAD_CR_nFUN_Pos)); - PAD->CR[pin / 2] |= (pin % 2 == 0) ? (0 << PAD_CR_mFUN_Pos) : (0 << PAD_CR_nFUN_Pos); - - pinmap[pin].Gpio->OESET &= ~(1 << offset); - - switch (mode) - { - case OUTPUT: - pinmap[pin].Gpio->OESET = (1 << offset); - PAD->CR[pin / 2] |= (pin % 2 == 0) ? (1 << PAD_CR_mPU_Pos) : (1 << PAD_CR_nPU_Pos); - break; - case OUTPUT_OPEN_DRAIN: - pinmap[pin].Gpio->OESET = (1 << offset); - PAD->CR[pin / 2] |= (pin % 2 == 0) ? (1 << PAD_CR_mODE_Pos) : (1 << PAD_CR_nODE_Pos); - break; - case INPUT: - case INPUT_FLOATING: - PAD->CR[pin / 2] &= ~((pin % 2 == 0) ? (1 << PAD_CR_mIDE_Pos) : (1 << PAD_CR_nIDE_Pos)); - break; - case INPUT_ANALOG: - PAD->CR[pin / 2] &= ~((pin % 2 == 0) ? (1 << PAD_CR_mPU_Pos) : (1 << PAD_CR_nPU_Pos)); - PAD->CR[pin / 2] &= ~((pin % 2 == 0) ? (1 << PAD_CR_mIDE_Pos) : (1 << PAD_CR_nIDE_Pos)); - PAD->CR[pin / 2] |= (pin % 2 == 0) ? (3 << PAD_CR_mAE1_Pos) : (3 << PAD_CR_nAE1_Pos); - break; - case INPUT_PULLUP: - PAD->CR[pin / 2] &= ~((pin % 2 == 0) ? (1 << PAD_CR_mIDE_Pos) : (1 << PAD_CR_nIDE_Pos)); - PAD->CR[pin / 2] |= (pin % 2 == 0) ? (1 << PAD_CR_mPU_Pos) : (1 << PAD_CR_nPU_Pos); - break; - case INPUT_PULLDOWN: - PAD->CR[pin / 2] &= ~((pin % 2 == 0) ? (1 << PAD_CR_mIDE_Pos) : (1 << PAD_CR_nIDE_Pos)); - PAD->CR[pin / 2] |= (pin % 2 == 0) ? (1 << PAD_CR_mPD_Pos) : (1 << PAD_CR_nPD_Pos); - break; - case PWM: - pinmap[pin].Gpio->OESET = (1 << offset); - PAD->CR[pin / 2] |= (pin % 2 == 0) ? (1 << PAD_CR_mPU_Pos) : (1 << PAD_CR_nPU_Pos); - break; - case PWM_OPEN_DRAIN: - pinmap[pin].Gpio->OESET = (1 << offset); - PAD->CR[pin / 2] |= (pin % 2 == 0) ? (1 << PAD_CR_mODE_Pos) : (1 << PAD_CR_nODE_Pos); - break; - default: - - return; - } + uint32_t offset = pin % 32; + + PAD->CR[pin / 2] &= (pin % 2 == 0) ? (~(0x3FF << PAD_CR_mFUN_Pos)) : (~(0x3FF << PAD_CR_nFUN_Pos)); + PAD->CR[pin / 2] |= (pin % 2 == 0) ? (0 << PAD_CR_mFUN_Pos) : (0 << PAD_CR_nFUN_Pos); + + pinmap[pin].Gpio->OESET &= ~(1 << offset); + + switch (mode) + { + case OUTPUT: + pinmap[pin].Gpio->OESET = (1 << offset); + PAD->CR[pin / 2] |= (pin % 2 == 0) ? (1 << PAD_CR_mPU_Pos) : (1 << PAD_CR_nPU_Pos); + break; + case OUTPUT_OPEN_DRAIN: + pinmap[pin].Gpio->OESET = (1 << offset); + PAD->CR[pin / 2] |= (pin % 2 == 0) ? (1 << PAD_CR_mODE_Pos) : (1 << PAD_CR_nODE_Pos); + break; + case INPUT: + case INPUT_FLOATING: + PAD->CR[pin / 2] &= ~((pin % 2 == 0) ? (1 << PAD_CR_mIDE_Pos) : (1 << PAD_CR_nIDE_Pos)); + break; + case INPUT_ANALOG: + PAD->CR[pin / 2] &= ~((pin % 2 == 0) ? (1 << PAD_CR_mPU_Pos) : (1 << PAD_CR_nPU_Pos)); + PAD->CR[pin / 2] &= ~((pin % 2 == 0) ? (1 << PAD_CR_mIDE_Pos) : (1 << PAD_CR_nIDE_Pos)); + PAD->CR[pin / 2] |= (pin % 2 == 0) ? (3 << PAD_CR_mAE1_Pos) : (3 << PAD_CR_nAE1_Pos); + break; + case INPUT_PULLUP: + PAD->CR[pin / 2] &= ~((pin % 2 == 0) ? (1 << PAD_CR_mIDE_Pos) : (1 << PAD_CR_nIDE_Pos)); + PAD->CR[pin / 2] |= (pin % 2 == 0) ? (1 << PAD_CR_mPU_Pos) : (1 << PAD_CR_nPU_Pos); + break; + case INPUT_PULLDOWN: + PAD->CR[pin / 2] &= ~((pin % 2 == 0) ? (1 << PAD_CR_mIDE_Pos) : (1 << PAD_CR_nIDE_Pos)); + PAD->CR[pin / 2] |= (pin % 2 == 0) ? (1 << PAD_CR_mPD_Pos) : (1 << PAD_CR_nPD_Pos); + break; + case PWM: + pinmap[pin].Gpio->OESET = (1 << offset); + PAD->CR[pin / 2] |= (pin % 2 == 0) ? (1 << PAD_CR_mPU_Pos) : (1 << PAD_CR_nPU_Pos); + break; + case PWM_OPEN_DRAIN: + pinmap[pin].Gpio->OESET = (1 << offset); + PAD->CR[pin / 2] |= (pin % 2 == 0) ? (1 << PAD_CR_mODE_Pos) : (1 << PAD_CR_nODE_Pos); + break; + default: + + return; + } } /** @@ -271,117 +271,117 @@ void HAL_GPIO_SetMode(uint32_t pin, WiringPinMode mode) */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - uint32_t position = 0x00u; - uint32_t ioposition; - uint32_t iocurrent; - uint32_t offset; - uint32_t config = 0x00u; - - /* Check the parameters */ - assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); - assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); - assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); + uint32_t position = 0x00u; + uint32_t ioposition; + uint32_t iocurrent; + uint32_t offset; + uint32_t config = 0x00u; - offset = (GPIOx == GPIOB) ? 16 : 0; + /* Check the parameters */ + assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); + assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); - /* Configure the port pins */ - while (((GPIO_Init->Pin) >> position) != 0x00u) - { - /* Get the IO position */ - ioposition = (0x01uL << position); + offset = (GPIOx == GPIOB) ? 16 : 0; - /* Get the current IO position */ - iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; - - if (iocurrent == ioposition) + /* Configure the port pins */ + while (((GPIO_Init->Pin) >> position) != 0x00u) { - /* Check the Alternate function parameters */ - assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); - //功能配置 - PAD->CR[position / 2 + offset] &= (position % 2 == 0) ? (~(0x3FF << PAD_CR_mFUN_Pos)) : (~(0x3FF << PAD_CR_nFUN_Pos)); - PAD->CR[position / 2 + offset] |= (position % 2 == 0) ? (GPIO_Init->Fun << PAD_CR_mFUN_Pos) : (GPIO_Init->Fun << PAD_CR_nFUN_Pos); - - //驱动能力 - PAD->CR[position / 2 + offset] |= (position % 2 == 0) ? (GPIO_Init->Driv << PAD_CR_mDRIVE_Pos) : (GPIO_Init->Driv << PAD_CR_nDRIVE_Pos); - - //上下拉配置 - - PAD->CR[position / 2 + offset] |= (position % 2 == 0) ? (GPIO_Init->Pull << PAD_CR_mPU_Pos) : (GPIO_Init->Pull << PAD_CR_nPU_Pos); - - /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ - switch (GPIO_Init->Mode) - { - - case GPIO_MODE_INPUT: //输入模式 - // IDE = 0,ODE = 0,OECLR=1 - GPIOx->OECLR = 1 << position; - break; - case GPIO_MODE_OUTPUT: //输出模式 - // IDE = 1,ODE = 0,OESET=1 - PAD->CR[position / 2 + offset] |= (position % 2 == 0) ? (1 << PAD_CR_mIDE_Pos) : (1 << PAD_CR_nIDE_Pos); - GPIOx->OESET = 1 << position; - break; - case GPIO_MODE_IN_OUT: //输入输出模式 - // IDE = 0,ODE = 0,OESET=1 - GPIOx->OESET = 1 << position; - break; - case GPIO_MODE_OUTPUT_OD: //开漏输出 - // IDE = 0,ODE = 1,OESET=1,OECLR=0 - PAD->CR[position / 2 + offset] |= (position % 2 == 0) ? (1 << PAD_CR_mODE_Pos) : (1 << PAD_CR_nODE_Pos); - GPIOx->OESET = 1 << position; - break; - case GPIO_Mode_ANALOG: //模拟模式 - // AE1=1,,ODE = 0,OESET=0,OECLR=1 - - PAD->CR[position / 2 + offset] &= ~((position % 2 == 0) ? (1 << PAD_CR_mPU_Pos) : (1 << PAD_CR_nPU_Pos)); - PAD->CR[position / 2 + offset] |= (position % 2 == 0) ? (1 << PAD_CR_mIDE_Pos) : (1 << PAD_CR_nIDE_Pos); - PAD->CR[position / 2 + offset] |= (position % 2 == 0) ? (3 << PAD_CR_mAE1_Pos) : (3 << PAD_CR_nAE1_Pos); - - // PAD->CR[position / 2] |= (position % 2 == 0) ? (1 << PAD_CR_mAE2_Pos) : (1 << PAD_CR_nAE2_Pos); - GPIOx->OECLR = 1 << position; - break; - case GPIO_MODE_IT_LOW_LEVEL: //低电平触发 - GPIOx->OECLR = 1 << position; - GPIOx->INTTYPCLR = 1 << position; - GPIOx->INTPOLCLR = 1 << position; - GPIOx->INTANY &= ~(1 << position); - GPIOx->INTEN |= 1 << position; - break; - case GPIO_MODE_IT_HIGH_LEVEL: //高电平触发 - GPIOx->OECLR = 1 << position; - GPIOx->INTTYPCLR = 1 << position; - GPIOx->INTPOLEN = 1 << position; - GPIOx->INTANY &= ~(1 << position); - GPIOx->INTEN |= 1 << position; - break; - case GPIO_MODE_IT_RISING: //上升沿 - GPIOx->OECLR = 1 << position; - GPIOx->INTTYPEN = 1 << position; - GPIOx->INTPOLEN = 1 << position; - GPIOx->INTANY &= ~(1 << position); - GPIOx->INTEN |= 1 << position; - break; - case GPIO_MODE_IT_FALLING: //下降沿 - GPIOx->OECLR = 1 << position; - GPIOx->INTTYPEN = 1 << position; - GPIOx->INTPOLCLR = 1 << position; - GPIOx->INTANY &= ~(1 << position); - GPIOx->INTEN |= 1 << position; - break; - case GPIO_MODE_IT_BOTH_EDGE: //双边沿 - GPIOx->OECLR = 1 << position; - GPIOx->INTTYPEN = 1 << position; - GPIOx->INTANY = 1 << position; - GPIOx->INTEN |= 1 << position; - break; - /* Parameters are checked with assert_param */ - default: - break; - } + /* Get the IO position */ + ioposition = (0x01uL << position); + + /* Get the current IO position */ + iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; + + if (iocurrent == ioposition) + { + /* Check the Alternate function parameters */ + assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); + //功能配置 + PAD->CR[position / 2 + offset] &= (position % 2 == 0) ? (~(0x3FF << PAD_CR_mFUN_Pos)) : (~(0x3FF << PAD_CR_nFUN_Pos)); + PAD->CR[position / 2 + offset] |= (position % 2 == 0) ? (GPIO_Init->Fun << PAD_CR_mFUN_Pos) : (GPIO_Init->Fun << PAD_CR_nFUN_Pos); + + //驱动能力 + PAD->CR[position / 2 + offset] |= (position % 2 == 0) ? (GPIO_Init->Driv << PAD_CR_mDRIVE_Pos) : (GPIO_Init->Driv << PAD_CR_nDRIVE_Pos); + + //上下拉配置 + + PAD->CR[position / 2 + offset] |= (position % 2 == 0) ? (GPIO_Init->Pull << PAD_CR_mPU_Pos) : (GPIO_Init->Pull << PAD_CR_nPU_Pos); + + /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ + switch (GPIO_Init->Mode) + { + + case GPIO_MODE_INPUT: //输入模式 + // IDE = 0,ODE = 0,OECLR=1 + GPIOx->OECLR = 1 << position; + break; + case GPIO_MODE_OUTPUT: //输出模式 + // IDE = 1,ODE = 0,OESET=1 + PAD->CR[position / 2 + offset] |= (position % 2 == 0) ? (1 << PAD_CR_mIDE_Pos) : (1 << PAD_CR_nIDE_Pos); + GPIOx->OESET = 1 << position; + break; + case GPIO_MODE_IN_OUT: //输入输出模式 + // IDE = 0,ODE = 0,OESET=1 + GPIOx->OESET = 1 << position; + break; + case GPIO_MODE_OUTPUT_OD: //开漏输出 + // IDE = 0,ODE = 1,OESET=1,OECLR=0 + PAD->CR[position / 2 + offset] |= (position % 2 == 0) ? (1 << PAD_CR_mODE_Pos) : (1 << PAD_CR_nODE_Pos); + GPIOx->OESET = 1 << position; + break; + case GPIO_Mode_ANALOG: //模拟模式 + // AE1=1,,ODE = 0,OESET=0,OECLR=1 + + PAD->CR[position / 2 + offset] &= ~((position % 2 == 0) ? (1 << PAD_CR_mPU_Pos) : (1 << PAD_CR_nPU_Pos)); + PAD->CR[position / 2 + offset] |= (position % 2 == 0) ? (1 << PAD_CR_mIDE_Pos) : (1 << PAD_CR_nIDE_Pos); + PAD->CR[position / 2 + offset] |= (position % 2 == 0) ? (3 << PAD_CR_mAE1_Pos) : (3 << PAD_CR_nAE1_Pos); + + // PAD->CR[position / 2] |= (position % 2 == 0) ? (1 << PAD_CR_mAE2_Pos) : (1 << PAD_CR_nAE2_Pos); + GPIOx->OECLR = 1 << position; + break; + case GPIO_MODE_IT_LOW_LEVEL: //低电平触发 + GPIOx->OECLR = 1 << position; + GPIOx->INTTYPCLR = 1 << position; + GPIOx->INTPOLCLR = 1 << position; + GPIOx->INTANY &= ~(1 << position); + GPIOx->INTEN |= 1 << position; + break; + case GPIO_MODE_IT_HIGH_LEVEL: //高电平触发 + GPIOx->OECLR = 1 << position; + GPIOx->INTTYPCLR = 1 << position; + GPIOx->INTPOLEN = 1 << position; + GPIOx->INTANY &= ~(1 << position); + GPIOx->INTEN |= 1 << position; + break; + case GPIO_MODE_IT_RISING: //上升沿 + GPIOx->OECLR = 1 << position; + GPIOx->INTTYPEN = 1 << position; + GPIOx->INTPOLEN = 1 << position; + GPIOx->INTANY &= ~(1 << position); + GPIOx->INTEN |= 1 << position; + break; + case GPIO_MODE_IT_FALLING: //下降沿 + GPIOx->OECLR = 1 << position; + GPIOx->INTTYPEN = 1 << position; + GPIOx->INTPOLCLR = 1 << position; + GPIOx->INTANY &= ~(1 << position); + GPIOx->INTEN |= 1 << position; + break; + case GPIO_MODE_IT_BOTH_EDGE: //双边沿 + GPIOx->OECLR = 1 << position; + GPIOx->INTTYPEN = 1 << position; + GPIOx->INTANY = 1 << position; + GPIOx->INTEN |= 1 << position; + break; + /* Parameters are checked with assert_param */ + default: + break; + } + } + UNUSED(config); + position++; } - UNUSED(config); - position++; - } } /** @@ -393,57 +393,57 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) */ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) { - // uint32_t position = 0x00u; - // uint32_t iocurrent; - // uint32_t tmp; - // __IO uint32_t *configregister; /* Store the address of CRL or CRH register based on pin number */ - // uint32_t registeroffset; - - /* Check the parameters */ - assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - /* Configure the port pins */ - // while ((GPIO_Pin >> position) != 0u) - // { - // /* Get current io position */ - // iocurrent = (GPIO_Pin) & (1uL << position); - - // if (iocurrent) - // { - // /*------------------------- EXTI Mode Configuration --------------------*/ - // /* Clear the External Interrupt or Event for the current IO */ - - // tmp = AFIO->EXTICR[position >> 2u]; - // tmp &= 0x0FuL << (4u * (position & 0x03u)); - // if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) - // { - // tmp = 0x0FuL << (4u * (position & 0x03u)); - // CLEAR_BIT(AFIO->EXTICR[position >> 2u], tmp); - - // /* Clear EXTI line configuration */ - // CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent); - // CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent); - - // /* Clear Rising Falling edge configuration */ - // CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent); - // CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent); - // } - // /*------------------------- GPIO Mode Configuration --------------------*/ - // /* Check if the current bit belongs to first half or last half of the pin count number - // in order to address CRH or CRL register */ - // configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; - // registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); - - // /* CRL/CRH default value is floating input(0x04) shifted to correct position */ - // MODIFY_REG(*configregister, ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), GPIO_CRL_CNF0_0 << registeroffset); - - // /* ODR default value is 0 */ - // CLEAR_BIT(GPIOx->ODR, iocurrent); - // } - - // position++; - // } + // uint32_t position = 0x00u; + // uint32_t iocurrent; + // uint32_t tmp; + // __IO uint32_t *configregister; /* Store the address of CRL or CRH register based on pin number */ + // uint32_t registeroffset; + + /* Check the parameters */ + assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + assert_param(IS_GPIO_PIN(GPIO_Pin)); + + /* Configure the port pins */ + // while ((GPIO_Pin >> position) != 0u) + // { + // /* Get current io position */ + // iocurrent = (GPIO_Pin) & (1uL << position); + + // if (iocurrent) + // { + // /*------------------------- EXTI Mode Configuration --------------------*/ + // /* Clear the External Interrupt or Event for the current IO */ + + // tmp = AFIO->EXTICR[position >> 2u]; + // tmp &= 0x0FuL << (4u * (position & 0x03u)); + // if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + // { + // tmp = 0x0FuL << (4u * (position & 0x03u)); + // CLEAR_BIT(AFIO->EXTICR[position >> 2u], tmp); + + // /* Clear EXTI line configuration */ + // CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent); + // CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent); + + // /* Clear Rising Falling edge configuration */ + // CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent); + // CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent); + // } + // /*------------------------- GPIO Mode Configuration --------------------*/ + // /* Check if the current bit belongs to first half or last half of the pin count number + // in order to address CRH or CRL register */ + // configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; + // registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); + + // /* CRL/CRH default value is floating input(0x04) shifted to correct position */ + // MODIFY_REG(*configregister, ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), GPIO_CRL_CNF0_0 << registeroffset); + + // /* ODR default value is 0 */ + // CLEAR_BIT(GPIOx->ODR, iocurrent); + // } + + // position++; + // } } /** @@ -473,20 +473,20 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) { - GPIO_PinState bitstatus; - - /* Check the parameters */ - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) - { - bitstatus = GPIO_PIN_SET; - } - else - { - bitstatus = GPIO_PIN_RESET; - } - return bitstatus; + GPIO_PinState bitstatus; + + /* Check the parameters */ + assert_param(IS_GPIO_PIN(GPIO_Pin)); + + if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) + { + bitstatus = GPIO_PIN_SET; + } + else + { + bitstatus = GPIO_PIN_RESET; + } + return bitstatus; } /** @@ -507,18 +507,18 @@ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin, GPIO_PinState PinState) { - /* Check the parameters */ - assert_param(IS_GPIO_PIN(GPIO_Pin)); - assert_param(IS_GPIO_PIN_ACTION(PinState)); - - if (PinState != GPIO_PIN_RESET) - { - GPIOx->ODR |= GPIO_Pin; - } - else - { - GPIOx->ODR &= ~GPIO_Pin; - } + /* Check the parameters */ + assert_param(IS_GPIO_PIN(GPIO_Pin)); + assert_param(IS_GPIO_PIN_ACTION(PinState)); + + if (PinState != GPIO_PIN_RESET) + { + GPIOx->ODR |= GPIO_Pin; + } + else + { + GPIOx->ODR &= ~GPIO_Pin; + } } /** @@ -529,17 +529,17 @@ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin, GPIO_PinState Pin */ void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) { - /* Check the parameters */ - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - if ((GPIOx->ODR & GPIO_Pin) != 0x00u) - { - GPIOx->ODR &= ~GPIO_Pin; - } - else - { - GPIOx->ODR |= GPIO_Pin; - } + /* Check the parameters */ + assert_param(IS_GPIO_PIN(GPIO_Pin)); + + if ((GPIOx->ODR & GPIO_Pin) != 0x00u) + { + GPIOx->ODR &= ~GPIO_Pin; + } + else + { + GPIOx->ODR |= GPIO_Pin; + } } /** @@ -613,44 +613,44 @@ void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) void HAL_GPIO_EXTI_Enable(GPIO_TypeDef *GPIOx, uint32_t priority) { - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - - if (GPIOx == GPIOA) - { - __HAL_EXTI_Enable(GPIOA_IRQn, priority); - } - else if (GPIOx == GPIOB) - { - __HAL_EXTI_Enable(GPIOB_IRQn, priority); - } + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + + if (GPIOx == GPIOA) + { + __HAL_EXTI_Enable(GPIOA_IRQn, priority); + } + else if (GPIOx == GPIOB) + { + __HAL_EXTI_Enable(GPIOB_IRQn, priority); + } } void HAL_GPIO_EXTI_Disable(GPIO_TypeDef *GPIOx) { - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - - if (GPIOx == GPIOA) - { - __HAL_EXTI_Disable(GPIOA_IRQn); - } - else if (GPIOx == GPIOB) - { - __HAL_EXTI_Disable(GPIOB_IRQn); - } + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + + if (GPIOx == GPIOA) + { + __HAL_EXTI_Disable(GPIOA_IRQn); + } + else if (GPIOx == GPIOB) + { + __HAL_EXTI_Disable(GPIOB_IRQn); + } } int32_t HAL_GPIO_Pin_To_Index(uint32_t GPIO_Pin) { - int32_t i; - for (i = 0; i < 32; i++) - { - if (GPIO_Pin & (1 << i)) + int32_t i; + for (i = 0; i < 32; i++) { - return i; + if (GPIO_Pin & (1 << i)) + { + return i; + } } - } - return -1; + return -1; } /** diff --git a/cores/spider/rules.mk b/cores/spider/rules.mk new file mode 100644 index 0000000000000000000000000000000000000000..f819f61f7e5b5f2fb61a2236f4caa1fff7ba70dd --- /dev/null +++ b/cores/spider/rules.mk @@ -0,0 +1,62 @@ +# Standard things +sp := $(sp).x +dirstack_$(sp) := $(d) +d := $(dir) +BUILDDIRS += $(BUILD_PATH)/$(d) + +# Add board directory and MCU-specific directory to BUILDDIRS. These +# are in subdirectories, but they're logically part of the Wirish +# submodule. +WIRISH_BOARD_PATH := boards/$(BOARD) +BUILDDIRS += $(BUILD_PATH)/$(d)/$(WIRISH_BOARD_PATH) +BUILDDIRS += $(BUILD_PATH)/$(d)/$(MCU_SERIES) + +# Safe includes for Wirish. +WIRISH_INCLUDES := -I$(d)/include -I$(d)/$(WIRISH_BOARD_PATH)/include + +# Local flags. Add -I$(d) to allow for private includes. +CFLAGS_$(d) := $(LIBMAPLE_INCLUDES) $(WIRISH_INCLUDES) -I$(d) + +# Local rules and targets +sSRCS_$(d) := start.S +cSRCS_$(d) := start_c.c +cSRCS_$(d) += syscalls.c +cSRCS_$(d) += $(MCU_SERIES)/util_hooks.c +cppSRCS_$(d) := boards.cpp +cppSRCS_$(d) += cxxabi-compat.cpp +cppSRCS_$(d) += ext_interrupts.cpp +cppSRCS_$(d) += HardwareSerial.cpp +cppSRCS_$(d) += HardwareTimer.cpp +cppSRCS_$(d) += Print.cpp +cppSRCS_$(d) += pwm.cpp +ifeq ($(MCU_SERIES), jzw010) +cppSRCS_$(d) += usb_serial.cpp # HACK: this is currently STM32F1 only. +cppSRCS_$(d) += HardwareSPI.cpp # FIXME: port to F2 and fix wirish.h +endif +cppSRCS_$(d) += wirish_analog.cpp +cppSRCS_$(d) += wirish_digital.cpp +cppSRCS_$(d) += wirish_math.cpp +cppSRCS_$(d) += wirish_shift.cpp +cppSRCS_$(d) += wirish_time.cpp +cppSRCS_$(d) += $(MCU_SERIES)/boards_setup.cpp +cppSRCS_$(d) += $(MCU_SERIES)/wirish_digital.cpp +cppSRCS_$(d) += $(MCU_SERIES)/wirish_debug.cpp +cppSRCS_$(d) += $(WIRISH_BOARD_PATH)/board.cpp + +sFILES_$(d) := $(sSRCS_$(d):%=$(d)/%) +cFILES_$(d) := $(cSRCS_$(d):%=$(d)/%) +cppFILES_$(d) := $(cppSRCS_$(d):%=$(d)/%) + +OBJS_$(d) := $(sFILES_$(d):%.S=$(BUILD_PATH)/%.o) \ + $(cFILES_$(d):%.c=$(BUILD_PATH)/%.o) \ + $(cppFILES_$(d):%.cpp=$(BUILD_PATH)/%.o) +DEPS_$(d) := $(OBJS_$(d):%.o=%.d) + +$(OBJS_$(d)): TGT_CFLAGS := $(CFLAGS_$(d)) + +TGT_BIN += $(OBJS_$(d)) + +# Standard things +-include $(DEPS_$(d)) +d := $(dirstack_$(sp)) +sp := $(basename $(sp)) diff --git a/cores/spider/systick.c b/cores/spider/systick.c index 303cc86a23452a875aaef0a9ea1377790ef166d4..eb9fa14bc6c261b5072b5ab275828171146a5356 100644 --- a/cores/spider/systick.c +++ b/cores/spider/systick.c @@ -84,13 +84,9 @@ void systick_attach_callback(void (*callback)(void)) * SysTick ISR */ -__weak void SysTick_Handler(void) +void SysTick_Handler(void) { systick_uptime_millis++; - if (systick_uptime_millis % 100 == 0) - { - togglePin(14); - } if (systick_user_callback) { diff --git a/cores/spider/wirish.h b/cores/spider/wirish.h index 3177a747e824716ceeffff4c4da5f28efae1f4e2..46ea7862901d1fe95899721486b26e931bb8e0f7 100644 --- a/cores/spider/wirish.h +++ b/cores/spider/wirish.h @@ -34,7 +34,7 @@ #ifndef _WIRISH_WIRISH_H_ #define _WIRISH_WIRISH_H_ -/* +/* * 20141030. Roger Clark Added the block of includes up to avr/interrupt so that stdlib functions like memcpy would be included and could be used. */ @@ -65,10 +65,11 @@ // #include // #include - +// #include // #endif // __cplusplus // #include + #include // #include @@ -83,25 +84,23 @@ typedef unsigned int word; #define false 0x0 #endif -#define lowByte(w) ((w) & 0xFF) -#define highByte(w) (((w) >> 8) & 0xFF) -#define bitRead(value, bit) (((value) >> (bit)) & 0x01) -#define bitSet(value, bit) ((value) |= (1UL << (bit))) -#define bitClear(value, bit) ((value) &= ~(1UL << (bit))) -#define bitWrite(value, bit, bitvalue) (bitvalue ? bitSet(value, bit) : \ - bitClear(value, bit)) -#define bit(b) (1UL << (b)) +#define lowByte(w) ((w)&0xFF) +#define highByte(w) (((w) >> 8) & 0xFF) +#define bitRead(value, bit) (((value) >> (bit)) & 0x01) +#define bitSet(value, bit) ((value) |= (1UL << (bit))) +#define bitClear(value, bit) ((value) &= ~(1UL << (bit))) +#define bitWrite(value, bit, bitvalue) (bitvalue ? bitSet(value, bit) : bitClear(value, bit)) +#define bit(b) (1UL << (b)) // Roger Clark. Added _BV macro for AVR compatibility. As requested by @sweetlilmre and @stevestrong #ifndef _BV #define _BV(bit) (1 << (bit)) -#endif +#endif -#define clockCyclesPerMicrosecond() ( F_CPU / 1000000L ) -#define clockCyclesToMicroseconds(a) ( ((a) * 1000L) / (F_CPU / 1000L) ) -#define microsecondsToClockCycles(a) ( (a) * (F_CPU / 1000000L) ) +#define clockCyclesPerMicrosecond() (F_CPU / 1000000L) +#define clockCyclesToMicroseconds(a) (((a)*1000L) / (F_CPU / 1000L)) +#define microsecondsToClockCycles(a) ((a) * (F_CPU / 1000000L)) #define digitalPinToInterrupt(pin) (pin) #endif - diff --git a/cores/spider/wirish_digital.cpp b/cores/spider/wirish_digital.cpp index 39cd30bf78da5f6bcf49076c7e1af5820fd40f9a..c561e437e461ca16e973c04f96fa34115a3fe4b1 100644 --- a/cores/spider/wirish_digital.cpp +++ b/cores/spider/wirish_digital.cpp @@ -68,7 +68,7 @@ void digitalWrite(uint8 pin, uint8 val) // Roger Clark. Deprecated these functions as they are not part of the standard Arduino API void togglePin(uint8 pin) { - if (pin >= BOARD_NR_GPIO_PINS) + if (pin >= 40) { return; } diff --git a/cores/spider/wirish_math.cpp b/cores/spider/wirish_math.cpp new file mode 100644 index 0000000000000000000000000000000000000000..f8ada9f9668fdae495c8975025a44995f08352dc --- /dev/null +++ b/cores/spider/wirish_math.cpp @@ -0,0 +1,58 @@ +/* + * Modified by LeafLabs, LLC. + * + * Part of the Wiring project - http://wiring.org.co Copyright (c) + * 2004-06 Hernando Barragan Modified 13 August 2006, David A. Mellis + * for Arduino - http://www.arduino.cc/ + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public License + * as published by the Free Software Foundation; either version 2.1 of + * the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + */ + +#include "stdlib.h" +#include "wirish_math.h" + +void randomSeed(unsigned int seed) { + if (seed != 0) { + srand(seed); + } +} + +long random(long howbig) { + if (howbig == 0) { + return 0; + } + + return rand() % howbig; +} + +long random(long howsmall, long howbig) { + if (howsmall >= howbig) { + return howsmall; + } + + long diff = howbig - howsmall; + return random(diff) + howsmall; +} + +extern uint16_t makeWord( uint16_t w ) +{ + return w ; +} + +extern uint16_t makeWord( uint8_t h, uint8_t l ) +{ + return (h << 8) | l ; +} diff --git a/cores/spider/wirish_math.h b/cores/spider/wirish_math.h new file mode 100644 index 0000000000000000000000000000000000000000..2a6fd6090aa445c6c680482ec8b43774be1cd06d --- /dev/null +++ b/cores/spider/wirish_math.h @@ -0,0 +1,183 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2010 Perry Hung. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file wirish/include/wirish/wirish_math.h + * @brief Includes ; provides Wiring-compatible math routines. + */ + +#ifndef _WIRISH_WIRISH_MATH_H_ +#define _WIRISH_WIRISH_MATH_H_ + +#include +#include + +/** + * @brief Initialize the pseudo-random number generator. + * @param seed the number used to initialize the seed; cannot be zero. + */ +void randomSeed(unsigned int seed); + +/** + * @brief Generate a pseudo-random number with upper bound. + * @param max An upper bound on the returned value, exclusive. + * @return A pseudo-random number in the range [0,max). + * @see randomSeed() + */ +long random(long max); + +/** + * @brief Generate a pseudo-random number with lower and upper bounds. + * @param min Lower bound on the returned value, inclusive. + * @param max Upper bound on the returned value, exclusive. + * @return A pseudo-random number in the range [min, max). + * @see randomSeed() + */ +long random(long min, long max); + +/** + * @brief Remap a number from one range to another. + * + * That is, a value equal to fromStart gets mapped to toStart, a value + * of fromEnd to toEnd, and other values are mapped proportionately. + * + * Does not constrain value to lie within [fromStart, fromEnd]. + * + * If a "start" value is larger than its corresponding "end", the + * ranges are reversed, so map(n, 1, 10, 10, 1) would reverse the + * range [1,10]. + * + * Negative numbers may appear as any argument. + * + * @param value the value to map. + * @param fromStart the beginning of the value's current range. + * @param fromEnd the end of the value's current range. + * @param toStart the beginning of the value's mapped range. + * @param toEnd the end of the value's mapped range. + * @return the mapped value. + */ + // Fix by Pito 9/2017 + static inline int32_t map(int32_t value, int32_t fromStart, int32_t fromEnd, + int32_t toStart, int32_t toEnd) { + return ((int64_t)(value - fromStart) * (toEnd - toStart)) / (fromEnd - fromStart) + + toStart; + } + +#define PI 3.1415926535897932384626433832795 +#define HALF_PI 1.5707963267948966192313216916398 +#define TWO_PI 6.283185307179586476925286766559 +#define DEG_TO_RAD 0.017453292519943295769236907684886 +#define RAD_TO_DEG 57.295779513082320876798154814105 + + +/* + * Roger Clark 20141113 + * + * Added BitOrder definition from SAM wiring_constants.h, as its needed for SPI + * as Maple doesn't have a wiring_constants file (though it probably should have in the long term to make it more compatible with the Arduino 1.0 + API + * also added definition for EULER and SERIAL and DISPLAY, also from the same SAM header + */ + +#define EULER 2.718281828459045235360287471352 +#define SERIAL 0x0 +#define DISPLAY 0x1 + +#if (__GNUC__ > 4) && defined(__cplusplus) + #include + using namespace std; +#else // C + #include + #ifndef min + #define min(a,b) ((a)<(b)?(a):(b)) + #endif // min + + #ifndef max + #define max(a,b) ((a)>(b)?(a):(b)) + #endif // max +#endif // __cplusplus + +#define constrain(amt,low,high) ((amt)<(low)?(low):((amt)>(high)?(high):(amt))) +#define round(x) ((x)>=0?(long)((x)+0.5):(long)((x)-0.5)) +#define radians(deg) ((deg)*DEG_TO_RAD) +#define degrees(rad) ((rad)*RAD_TO_DEG) +#define sq(x) ((x)*(x)) + +/* undefine stdlib's abs if encountered */ +#ifdef abs +#undef abs +#endif +#define abs(x) (((x) > 0) ? (x) : -(x)) + +/* Following are duplicate declarations (with Doxygen comments) for + * some of the math.h functions; this is for the convenience of the + * Sphinx docs. + */ + +/** + * Compute the cosine of an angle, in radians. + * @param x The radian measure of the angle. + * @return The cosine of x. This value will be between -1 and 1. + */ +double cos(double x); + +/** + * Compute the sine of an angle, in radians. + * @param x The radian measure of the angle. + * @return The sine of x. This value will be between -1 and 1. + */ +double sin(double x); + +/** + * Compute the tangent of an angle, in radians. + * @param x The radian measure of the angle. + * @return The tangent of x. There are no limits on the return value + * of this function. + */ +double tan(double x); + +/** + * Compute the square root of a number. + * @param x The number whose square root to find. This value cannot + * be negative. + * @return The square root of x. The return value is never negative. + */ +double sqrt(double x); + +/** + * Compute an exponentiation. + * @param x the base. This value cannot be zero if y <= 0. This value + * cannot be negative if y is not an integral value. + * @param y the exponent. + * @return x raised to the power y. + */ +double pow(double x, double y); + +extern uint16_t makeWord( uint16_t w ) ; +extern uint16_t makeWord( uint8_t h, uint8_t l ) ; + +#define word(...) makeWord(__VA_ARGS__) + +#endif diff --git a/cores/spider/wirish_time.cpp b/cores/spider/wirish_time.cpp index f43149bc68820df4c28d3291635d2ea1ea4dcebc..18722a954737c33d168712be379cef09ceb5deb6 100644 --- a/cores/spider/wirish_time.cpp +++ b/cores/spider/wirish_time.cpp @@ -39,16 +39,16 @@ extern "C" void delay(unsigned long ms) { - // uint32 start = micros(); + uint32 start = micros(); while (ms > 0) { - ms--; - // yield(); - // while ((ms > 0) && ((micros() - start) >= 1000)) - // { - // ms--; - // start += 1000; - // } + // ms--; + yield(); + while ((ms > 0) && ((micros() - start) >= 1000)) + { + ms--; + start += 1000; + } } } diff --git a/platform.txt b/platform.txt index 710b802d3de6844c3d1f9126f943e4e85db6875b..a8cc5de72d656cc76801a4993c7a6daa08e5b9a4 100644 --- a/platform.txt +++ b/platform.txt @@ -4,7 +4,7 @@ # https://github.com/arduino/Arduino/wiki/Arduino-IDE-1.5---3rd-party-Hardware-specification name=JZW01XX Boards (JZWduino.com) -version=0.1.2 +version=1.0.0 #编译警告配置 @@ -111,16 +111,6 @@ recipe.output.save_file={build.project_name}.{build.variant}.bin # Uploader tools # ------------------- -# Upload using Maple bootloader over DFU -tools.spider_upload.cmd=spider_upload -tools.spider_upload.cmd.windows=spider_upload.bat -tools.spider_upload.path={runtime.hardware.path}/tools/win -tools.spider_upload.path.macosx={runtime.hardware.path}/tools/macosx -tools.spider_upload.path.linux={runtime.hardware.path}/tools/linux -tools.spider_upload.path.linux64={runtime.hardware.path}/tools/linux64 -tools.spider_upload.upload.params.verbose=-d -tools.spider_upload.upload.params.quiet= -tools.spider_upload.upload.pattern="{path}/{cmd}" {serial.port.file} {upload.altID} {upload.usbID} "{build.path}/{build.project_name}.bin" #Added tool for generic STM32 upload via serial to Serial Port 1 (pins PA9 and PA10) - note. Boot0 line needs to high on board reset to enable upload via serial # at the end up the upload the program is automatically run, without the board being reset @@ -136,57 +126,15 @@ tools.serial_upload.upload.params.verbose=-d tools.serial_upload.upload.params.quiet=n tools.serial_upload.upload.pattern="{path}/{cmd}" {serial.port.file} {upload.altID} {upload.usbID} "{build.path}/{build.project_name}.bin" -# stlink upload -tools.stlink_upload.cmd=stlink_upload -tools.stlink_upload.cmd.windows=stlink_upload.bat -tools.stlink_upload.path.windows={runtime.hardware.path}/tools/win -tools.stlink_upload.path.macosx={runtime.hardware.path}/tools/macosx -tools.stlink_upload.path.linux={runtime.hardware.path}/tools/linux -tools.stlink_upload.path.linux64={runtime.hardware.path}/tools/linux64 -tools.stlink_upload.upload.params.verbose=-d -tools.stlink_upload.upload.params.quiet= -tools.stlink_upload.upload.pattern="{path}/{cmd}" "{build.path}/{build.project_name}.bin" - -# blackmagic probe upload -tools.bmp_upload.cmd=arm-none-eabi-gdb -tools.bmp_upload.path={runtime.tools.arm-none-eabi-gcc.path}/bin/ -tools.bmp_upload.upload.speed=230400 -tools.bmp_upload.upload.params.verbose= -tools.bmp_upload.upload.params.quiet=-q --batch-silent -tools.bmp_upload.upload.pattern="{path}{cmd}" -cd "{build.path}" -b {upload.speed} {upload.verbose} -ex "set debug remote 0" -ex "set target-async off" -ex "set remotetimeout 60" -ex "set mem inaccessible-by-default off" -ex "set confirm off" -ex "set height 0" -ex "target extended-remote {serial.port}" -ex "monitor swdp_scan" -ex "attach 1" -ex "x/wx 0x8000004" -ex "monitor erase_mass" -ex "echo 0x8000004 expect 0xffffffff after erase\n" -ex "x/wx 0x8000004" -ex "file {build.project_name}.elf" -ex "load" -ex "x/wx 0x08000004" -ex "tbreak main" -ex "run" -ex "echo \n\n\nUpload finished!" -ex "quit" - -# tools.jlink_upload.cmd=jlink_upload -# tools.jlink_upload.cmd.windows=jlink_upload.bat -# tools.jlink_upload.cmd.macosx=jlink_upload -# tools.jlink_upload.path={runtime.hardware.path}/tools/win -# tools.jlink_upload.path.macosx={runtime.hardware.path}/tools/macosx -# tools.jlink_upload.path.linux={runtime.hardware.path}/tools/linux -# tools.jlink_upload.path.linux64={runtime.hardware.path}/tools/linux64 -# tools.jlink_upload.upload.params.verbose=-d -# tools.jlink_upload.upload.params.quiet= -# tools.jlink_upload.upload.pattern="{path}/{cmd}" "{build.path}/{build.project_name}.bin" tools.jlink_upload.cmd=jlink_upload tools.jlink_upload.cmd.windows=jlink_upload.bat tools.jlink_upload.cmd.macosx=jlink_upload -tools.jlink_upload.path={runtime.hardware.path}/tools/win -tools.jlink_upload.path.macosx={runtime.hardware.path}/tools/macosx -tools.jlink_upload.path.linux={runtime.hardware.path}/tools/linux -tools.jlink_upload.path.linux64={runtime.hardware.path}/tools/linux64 +tools.jlink_upload.path={runtime.hardware.path}/1.0.0/tools/win +tools.jlink_upload.path.macosx={runtime.hardware.path}/1.0.0/tools/macosx +tools.jlink_upload.path.linux={runtime.hardware.path}/1.0.0/tools/linux +tools.jlink_upload.path.linux64={runtime.hardware.path}/1.0.0/tools/linux64 tools.jlink_upload.upload.params.verbose=-d tools.jlink_upload.upload.params.quiet=n tools.jlink_upload.upload.pattern="{path}/{cmd}" "{build.path}/{build.project_name}.bin" - - -# HID upload 2.0 -tools.hid_upload.cmd=hid_upload -tools.hid_upload.cmd.windows=hid-flash.exe -tools.hid_upload.cmd.macosx=hid_flash -tools.hid_upload.path={runtime.hardware.path}/tools/win -tools.hid_upload.path.macosx={runtime.hardware.path}/tools/macosx -tools.hid_upload.path.linux={runtime.hardware.path}/tools/linux -tools.hid_upload.path.linux64={runtime.hardware.path}/tools/linux64 -tools.hid_upload.upload.params.verbose=-d -tools.hid_upload.upload.params.quiet=n -tools.hid_upload.upload.pattern="{path}/{cmd}" "{build.path}/{build.project_name}.bin" {serial.port.file} diff --git a/system/libspider/include/libspider/core_cm0plus.h b/system/libspider/include/libspider/core_cm0plus.h index d104965db5198d5b45737d48abb3981fc1936ba2..d9a0140be88e7b8f3e68c510914b68fb927d6538 100644 --- a/system/libspider/include/libspider/core_cm0plus.h +++ b/system/libspider/include/libspider/core_cm0plus.h @@ -1,9 +1,9 @@ -/**************************************************************************//** - * @file core_cm0plus.h - * @brief CMSIS Cortex-M0+ Core Peripheral Access Layer Header File - * @version V5.0.7 - * @date 13. March 2019 - ******************************************************************************/ +/**************************************************************************/ /** + * @file core_cm0plus.h + * @brief CMSIS Cortex-M0+ Core Peripheral Access Layer Header File + * @version V5.0.7 + * @date 13. March 2019 + ******************************************************************************/ /* * Copyright (c) 2009-2019 Arm Limited. All rights reserved. * @@ -22,10 +22,10 @@ * limitations under the License. */ -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined (__clang__) - #pragma clang system_header /* treat file as system include file */ +#if defined(__ICCARM__) +#pragma system_include /* treat file as system include file for MISRA check */ +#elif defined(__clang__) +#pragma clang system_header /* treat file as system include file */ #endif #ifndef __CORE_CM0PLUS_H_GENERIC @@ -34,86 +34,85 @@ #include #ifdef __cplusplus - extern "C" { +extern "C" +{ #endif -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. + /** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex-M0+ - @{ - */ + /******************************************************************************* + * CMSIS definitions + ******************************************************************************/ + /** + \ingroup Cortex-M0+ + @{ + */ #include "cmsis_version.h" - + /* CMSIS CM0+ definitions */ -#define __CM0PLUS_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ -#define __CM0PLUS_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ -#define __CM0PLUS_CMSIS_VERSION ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \ - __CM0PLUS_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ +#define __CM0PLUS_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM0PLUS_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM0PLUS_CMSIS_VERSION ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \ + __CM0PLUS_CMSIS_VERSION_SUB) /*!< \deprecated CMSIS HAL version number */ -#define __CORTEX_M (0U) /*!< Cortex-M Core */ +#define __CORTEX_M (0U) /*!< Cortex-M Core */ /** __FPU_USED indicates whether an FPU is used or not. This core does not support an FPU at all */ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_FP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TI_ARM__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif +#define __FPU_USED 0U + +#if defined(__CC_ARM) +#if defined __TARGET_FPU_VFP +#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" +#endif + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) +#if defined __ARM_FP +#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" +#endif + +#elif defined(__GNUC__) +#if defined(__VFP_FP__) && !defined(__SOFTFP__) +#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" +#endif + +#elif defined(__ICCARM__) +#if defined __ARMVFP__ +#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" +#endif + +#elif defined(__TI_ARM__) +#if defined __TI_VFP_SUPPORT__ +#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" +#endif + +#elif defined(__TASKING__) +#if defined __FPU_VFP__ +#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" +#endif +#elif defined(__CSMC__) +#if (__CSMC__ & 0x400U) +#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" #endif -#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ +#endif +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ #ifdef __cplusplus } @@ -127,35 +126,36 @@ #define __CORE_CM0PLUS_H_DEPENDANT #ifdef __cplusplus - extern "C" { +extern "C" +{ #endif /* check device defines and use defaults */ #if defined __CHECK_DEVICE_DEFINES - #ifndef __CM0PLUS_REV - #define __CM0PLUS_REV 0x0000U - #warning "__CM0PLUS_REV not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 0U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 2U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif +#ifndef __CM0PLUS_REV +#define __CM0PLUS_REV 0x0000U +#warning "__CM0PLUS_REV not defined in device header file; using default!" +#endif + +#ifndef __MPU_PRESENT +#define __MPU_PRESENT 0U +#warning "__MPU_PRESENT not defined in device header file; using default!" +#endif + +#ifndef __VTOR_PRESENT +#define __VTOR_PRESENT 0U +#warning "__VTOR_PRESENT not defined in device header file; using default!" +#endif + +#ifndef __NVIC_PRIO_BITS +#define __NVIC_PRIO_BITS 2U +#warning "__NVIC_PRIO_BITS not defined in device header file; using default!" +#endif + +#ifndef __Vendor_SysTickConfig +#define __Vendor_SysTickConfig 0U +#warning "__Vendor_SysTickConfig not defined in device header file; using default!" +#endif #endif /* IO definitions (access restrictions to peripheral registers) */ @@ -167,440 +167,431 @@ \li for automatic generation of peripheral register debug information. */ #ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ +#define __I volatile /*!< Defines 'read only' permissions */ #else - #define __I volatile const /*!< Defines 'read only' permissions */ +#define __I volatile const /*!< Defines 'read only' permissions */ #endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ /* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex-M0+ */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core MPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + + /*@} end of group Cortex-M0+ */ + + /******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core MPU Register + ******************************************************************************/ + /** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. + */ + + /** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + + /** + \brief Union type to access the Application Program Status Register (APSR). + */ + typedef union + { + struct + { + uint32_t _reserved0 : 28; /*!< bit: 0..27 Reserved */ + uint32_t V : 1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C : 1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z : 1; /*!< bit: 30 Zero condition code flag */ + uint32_t N : 1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ + } APSR_Type; /* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + + /** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ + typedef union + { + struct + { + uint32_t ISR : 9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0 : 23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ + } IPSR_Type; /* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + /** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ + typedef union + { + struct + { + uint32_t ISR : 9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0 : 15; /*!< bit: 9..23 Reserved */ + uint32_t T : 1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t _reserved1 : 3; /*!< bit: 25..27 Reserved */ + uint32_t V : 1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C : 1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z : 1; /*!< bit: 30 Zero condition code flag */ + uint32_t N : 1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ + } xPSR_Type; /* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + /** + \brief Union type to access the Control Registers (CONTROL). + */ + typedef union + { + struct + { + uint32_t nPRIV : 1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL : 1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1 : 30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ + } CONTROL_Type; /* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + + /*@} end of group CMSIS_CORE */ + + /** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + + /** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ + typedef struct + { + __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ uint32_t RESERVED0[31U]; - __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ uint32_t RESERVED1[31U]; - __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ uint32_t RESERVED2[31U]; - __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ uint32_t RESERVED3[31U]; uint32_t RESERVED4[64U]; - __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ -} NVIC_Type; - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ + } NVIC_Type; + + /*@} end of group CMSIS_NVIC */ + + /** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + + /** + \brief Structure type to access the System Control Block (SCB). + */ + typedef struct + { + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ +#if defined(__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ #else - uint32_t RESERVED0; + uint32_t RESERVED0; #endif - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ uint32_t RESERVED1; - __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ -} SCB_Type; + __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + } SCB_Type; /* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ /* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) +#if defined(__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) /* SCB Interrupt Control State Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 8U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#define SCB_VTOR_TBLOFF_Pos 8U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ #endif /* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ /* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ /* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ /* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + + /*@} end of group CMSIS_SCB */ + + /** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + + /** + \brief Structure type to access the System Timer (SysTick). + */ + typedef struct + { + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ + } SysTick_Type; /* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ /* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ /* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ /* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ -} MPU_Type; - -#define MPU_TYPE_RALIASES 1U +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + + /*@} end of group CMSIS_SysTick */ + +#if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U) + /** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + + /** + \brief Structure type to access the Memory Protection Unit (MPU). + */ + typedef struct + { + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ + } MPU_Type; + +#define MPU_TYPE_RALIASES 1U /* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ /* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ /* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ /* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ +#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ /* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ /*@} end of group CMSIS_MPU */ #endif - /** \ingroup CMSIS_core_register \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) @@ -610,7 +601,6 @@ typedef struct */ /*@} end of group CMSIS_CoreDebug */ - /** \ingroup CMSIS_core_register \defgroup CMSIS_core_bitfield Core register bit field macros @@ -624,7 +614,7 @@ typedef struct \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. \return Masked and shifted value. */ -#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) +#define _VAL2FLD(field, value) (((uint32_t)(value) << field##_Pos) & field##_Msk) /** \brief Mask and shift a register value to extract a bit filed value. @@ -632,11 +622,10 @@ typedef struct \param[in] value Value of register. This parameter is interpreted as an uint32_t type. \return Masked and shifted bit field value. */ -#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) +#define _FLD2VAL(field, value) (((uint32_t)(value)&field##_Msk) >> field##_Pos) /*@} end of group CMSIS_core_bitfield */ - /** \ingroup CMSIS_core_register \defgroup CMSIS_core_base Core Definitions @@ -645,436 +634,411 @@ typedef struct */ /* Memory mapping of Core Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCB ((SCB_Type *)SCB_BASE) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *)SysTick_BASE) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *)NVIC_BASE) /*!< NVIC configuration struct */ + +#if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U) +#define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ +#define MPU ((MPU_Type *)MPU_BASE) /*!< Memory Protection Unit */ #endif -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ + /*@} */ + + /******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Register Access Functions + ******************************************************************************/ + /** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference + */ + + /* ########################## NVIC functions #################################### */ + /** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ #ifdef CMSIS_NVIC_VIRTUAL - #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE - #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" - #endif - #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE +#define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" +#endif +#include CMSIS_NVIC_VIRTUAL_HEADER_FILE #else - #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping - #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping - #define NVIC_EnableIRQ __NVIC_EnableIRQ - #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ - #define NVIC_DisableIRQ __NVIC_DisableIRQ - #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ - #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ - #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ +#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping +#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping +#define NVIC_EnableIRQ __NVIC_EnableIRQ +#define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ +#define NVIC_DisableIRQ __NVIC_DisableIRQ +#define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ +#define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ +#define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ /*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M0+ */ - #define NVIC_SetPriority __NVIC_SetPriority - #define NVIC_GetPriority __NVIC_GetPriority - #define NVIC_SystemReset __NVIC_SystemReset +#define NVIC_SetPriority __NVIC_SetPriority +#define NVIC_GetPriority __NVIC_GetPriority +#define NVIC_SystemReset __NVIC_SystemReset #endif /* CMSIS_NVIC_VIRTUAL */ #ifdef CMSIS_VECTAB_VIRTUAL - #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE - #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" - #endif - #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" +#endif +#include CMSIS_VECTAB_VIRTUAL_HEADER_FILE #else - #define NVIC_SetVector __NVIC_SetVector - #define NVIC_GetVector __NVIC_GetVector -#endif /* (CMSIS_VECTAB_VIRTUAL) */ - -#define NVIC_USER_IRQ_OFFSET 16 +#define NVIC_SetVector __NVIC_SetVector +#define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ +#define NVIC_USER_IRQ_OFFSET 16 /* The following EXC_RETURN values are saved the LR on exception entry */ -#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ -#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ -#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ - +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ /* Interrupt Priorities are WORD accessible only under Armv6-M */ /* The following MACROS handle generation of the register offset and byte masks */ -#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) -#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) -#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) +#define _BIT_SHIFT(IRQn) (((((uint32_t)(int32_t)(IRQn))) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ((((((uint32_t)(int32_t)(IRQn)) & 0x0FUL) - 8UL) >> 2UL)) +#define _IP_IDX(IRQn) ((((uint32_t)(int32_t)(IRQn)) >> 2UL)) #define __NVIC_SetPriorityGrouping(X) (void)(X) -#define __NVIC_GetPriorityGrouping() (0U) - -/** - \brief Enable Interrupt - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - __COMPILER_BARRIER(); - NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __COMPILER_BARRIER(); - } -} - - -/** - \brief Get Interrupt Enable status - \details Returns a device specific interrupt enable status from the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt is not enabled. - \return 1 Interrupt is enabled. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Disable Interrupt - \details Disables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - __DSB(); - __ISB(); - } -} - - -/** - \brief Get Pending Interrupt - \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. - \param [in] IRQn Device specific interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - \note IRQn must not be negative. - */ -__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); - } - else - { - return(0U); - } -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of a device specific interrupt in the NVIC pending register. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - } -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - \note The priority cannot be set for every processor exception. - */ -__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) >= 0) - { - NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - else - { - SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of a device specific interrupt or a processor exception. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) >= 0) - { - return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief Set Interrupt Vector - \details Sets an interrupt vector in SRAM based interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - VTOR must been relocated to SRAM before. - If VTOR is not present address 0 must be mapped to SRAM. - \param [in] IRQn Interrupt number - \param [in] vector Address of interrupt handler function - */ -__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - uint32_t vectors = SCB->VTOR; +#define __NVIC_GetPriorityGrouping() (0U) + + /** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ + __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) + { + if ((int32_t)(IRQn) >= 0) + { + __COMPILER_BARRIER(); + NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __COMPILER_BARRIER(); + } + } + + /** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ + __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) + { + if ((int32_t)(IRQn) >= 0) + { + return ((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return (0U); + } + } + + /** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ + __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) + { + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } + } + + /** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ + __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) + { + if ((int32_t)(IRQn) >= 0) + { + return ((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return (0U); + } + } + + /** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ + __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) + { + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } + } + + /** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ + __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) + { + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } + } + + /** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ + __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) + { + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + } + + /** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ + __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) + { + + if ((int32_t)(IRQn) >= 0) + { + return ((uint32_t)(((NVIC->IP[_IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn)) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return ((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn)) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + } + + /** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ + __STATIC_INLINE uint32_t NVIC_EncodePriority(uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) + { + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits)) - 1UL)))); + } + + /** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ + __STATIC_INLINE void NVIC_DecodePriority(uint32_t Priority, uint32_t PriorityGroup, uint32_t *const pPreemptPriority, uint32_t *const pSubPriority) + { + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority) & (uint32_t)((1UL << (SubPriorityBits)) - 1UL); + } + + /** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + If VTOR is not present address 0 must be mapped to SRAM. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ + __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) + { +#if defined(__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + uint32_t vectors = SCB->VTOR; #else - uint32_t vectors = 0x0U; + uint32_t vectors = 0x0U; #endif - (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector; - /* ARM Application Note 321 states that the M0+ does not require the architectural barrier */ -} - - -/** - \brief Get Interrupt Vector - \details Reads an interrupt vector from interrupt vector table. - The interrupt number can be positive to specify a device specific interrupt, - or negative to specify a processor exception. - \param [in] IRQn Interrupt number. - \return Address of interrupt handler function - */ -__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ -#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) - uint32_t vectors = SCB->VTOR; + (*(int *)(vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector; + /* ARM Application Note 321 states that the M0+ does not require the architectural barrier */ + } + + /** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ + __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) + { +#if defined(__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + uint32_t vectors = SCB->VTOR; #else - uint32_t vectors = 0x0U; + uint32_t vectors = 0x0U; #endif - return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)); -} + return (uint32_t)(*(int *)(vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)); + } + /** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ + __NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) + { + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + SCB_AIRCR_SYSRESETREQ_Msk); + __DSB(); /* Ensure completion of memory access */ -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - SCB_AIRCR_SYSRESETREQ_Msk); - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} + for (;;) /* wait until reset */ + { + __NOP(); + } + } -/*@} end of CMSIS_Core_NVICFunctions */ + /*@} end of CMSIS_Core_NVICFunctions */ -/* ########################## MPU functions #################################### */ + /* ########################## MPU functions #################################### */ -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +#if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U) #include "mpu_armv7.h" #endif -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - return 0U; /* No FPU */ -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} + /* ########################## FPU functions #################################### */ + /** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + + /** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ + __STATIC_INLINE uint32_t SCB_GetFPUType(void) + { + return 0U; /* No FPU */ + } + + /*@} end of CMSIS_Core_FpuFunctions */ + + /* ################################## SysTick function ############################################ */ + /** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined(__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + + /** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ + __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) + { + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority(SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ + } #endif -/*@} end of CMSIS_Core_SysTickFunctions */ - - - + /*@} end of CMSIS_Core_SysTickFunctions */ #ifdef __cplusplus } diff --git a/system/libspider/include/libspider/delay.h b/system/libspider/include/libspider/delay.h index 6e9788e94b15730e88d30a32a546cc59c8a2c2a8..ae6e4ca11cc08e3d2db74b3fb159addbe5b5e827 100644 --- a/system/libspider/include/libspider/delay.h +++ b/system/libspider/include/libspider/delay.h @@ -55,7 +55,11 @@ extern "C" us *= 1000; /* fudge for function call overhead */ - us--; + while (us) + { + us--; + } + // asm volatile(" mov r0, %[us] \n\t" // "1: subs r0, #1 \n\t" // " bhi 1b \n\t" diff --git a/system/libspider/include/libspider/ring_buffer.h b/system/libspider/include/libspider/ring_buffer.h new file mode 100644 index 0000000000000000000000000000000000000000..763ef00266f9f4967fdde578d1a7bf21138aef3a --- /dev/null +++ b/system/libspider/include/libspider/ring_buffer.h @@ -0,0 +1,222 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2011 LeafLabs, LLC. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file libmaple/include/libmaple/ring_buffer.h + * @brief Simple circular buffer + * + * This implementation is not thread-safe. In particular, none of + * these functions is guaranteed re-entrant. + */ + +#ifndef _LIBAPIDER_RING_BUFFER_H_ +#define _LIBAPIDER_RING_BUFFER_H_ + +#ifdef __cplusplus +extern "C" +{ +#endif + +#include + + /** + * Ring buffer type. + * + * The buffer is empty when head == tail. + * + * The buffer is full when the head is one byte in front of the tail, + * modulo buffer length. + * + * One byte is left free to distinguish empty from full. */ + typedef struct ring_buffer + { + volatile uint8 *buf; /**< Buffer items are stored into */ + volatile uint16 head; /**< Index of the next item to remove */ + volatile uint16 tail; /**< Index where the next item will get inserted */ + volatile uint16 size; /**< Buffer capacity minus one */ + } ring_buffer; + + /** + * Initialise a ring buffer. + * + * @param rb Instance to initialise + * + * @param size Number of items in buf. The ring buffer will always + * leave one element unoccupied, so the maximum number of + * elements it can store will be size - 1. Thus, size + * must be at least 2. + * + * @param buf Buffer to store items into + */ + static inline void rb_init(ring_buffer *rb, uint16 size, uint8 *buf) + { + rb->head = 0; + rb->tail = 0; + rb->size = size - 1; + rb->buf = buf; + } + + /** + * @brief Return the number of elements stored in the ring buffer. + * @param rb Buffer whose elements to count. + */ + static inline uint16 rb_full_count(ring_buffer *rb) + { + __IO ring_buffer *arb = rb; + int32 size = arb->tail - arb->head; + if (arb->tail < arb->head) + { + size += arb->size + 1; + } + return (uint16)size; + } + + /** + * @brief Returns true if and only if the ring buffer is full. + * @param rb Buffer to test. + */ + static inline int rb_is_full(ring_buffer *rb) + { + return (rb->tail + 1 == rb->head) || + (rb->tail == rb->size && rb->head == 0); + } + + /** + * @brief Returns true if and only if the ring buffer is empty. + * @param rb Buffer to test. + */ + static inline int rb_is_empty(ring_buffer *rb) + { + return rb->head == rb->tail; + } + + /** + * Append element onto the end of a ring buffer. + * @param rb Buffer to append onto. + * @param element Value to append. + */ + static inline void rb_insert(ring_buffer *rb, uint8 element) + { + rb->buf[rb->tail] = element; + rb->tail = (rb->tail == rb->size) ? 0 : rb->tail + 1; + } + + /** + * @brief Remove and return the first item from a ring buffer. + * @param rb Buffer to remove from, must contain at least one element. + */ + static inline uint8 rb_remove(ring_buffer *rb) + { + uint8 ch = rb->buf[rb->head]; + rb->head = (rb->head == rb->size) ? 0 : rb->head + 1; + return ch; + } + + /* + * Roger Clark. 20141125, + * added peek function. + * @brief Return the first item from a ring buffer, without removing it + * @param rb Buffer to remove from, must contain at least one element. + */ + + static inline int rb_peek(ring_buffer *rb) + { + if (rb->head == rb->tail) + { + return -1; + } + else + { + return rb->buf[rb->head]; + } + } + + /** + * @brief Attempt to remove the first item from a ring buffer. + * + * If the ring buffer is nonempty, removes and returns its first item. + * If it is empty, does nothing and returns a negative value. + * + * @param rb Buffer to attempt to remove from. + */ + static inline int16 rb_safe_remove(ring_buffer *rb) + { + return rb_is_empty(rb) ? -1 : rb_remove(rb); + } + + /** + * @brief Attempt to insert an element into a ring buffer. + * + * @param rb Buffer to insert into. + * @param element Value to insert into rb. + * @sideeffect If rb is not full, appends element onto buffer. + * @return If element was appended, then true; otherwise, false. */ + static inline int rb_safe_insert(ring_buffer *rb, uint8 element) + { + if (rb_is_full(rb)) + { + return 0; + } + rb_insert(rb, element); + return 1; + } + + /** + * @brief Append an item onto the end of a non-full ring buffer. + * + * If the buffer is full, removes its first item, then inserts the new + * element at the end. + * + * @param rb Ring buffer to insert into. + * @param element Value to insert into ring buffer. + * @return On success, returns -1. If an element was popped, returns + * the popped value. + */ + static inline int rb_push_insert(ring_buffer *rb, uint8 element) + { + int ret = -1; + if (rb_is_full(rb)) + { + ret = rb_remove(rb); + } + rb_insert(rb, element); + return ret; + } + + /** + * @brief Discard all items from a ring buffer. + * @param rb Ring buffer to discard all items from. + */ + static inline void rb_reset(ring_buffer *rb) + { + rb->tail = rb->head; + } + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif diff --git a/system/libspider/include/libspider/usart.h b/system/libspider/include/libspider/usart.h new file mode 100644 index 0000000000000000000000000000000000000000..d70c6c2df2403609137ac742124b13e2cee1022b --- /dev/null +++ b/system/libspider/include/libspider/usart.h @@ -0,0 +1,206 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2010 Perry Hung. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file libmaple/include/libmaple/usart.h + * @author Marti Bolivar , + * Perry Hung + * @brief USART definitions and prototypes + */ + +#ifndef _LIBMAPLE_USART_H_ +#define _LIBMAPLE_USART_H_ + +#ifdef __cplusplus +extern "C" +{ +#endif + +#include +#include +// #include +// #include +#include + + /* Roger clark. Replaced with line below #include */ +#include + + /* + * Devices + */ + +#ifndef USART_RX_BUF_SIZE +#define USART_RX_BUF_SIZE 64 +#endif + +#ifndef USART_TX_BUF_SIZE +#define USART_TX_BUF_SIZE 64 +#endif + + /** USART device type */ + typedef struct usart_dev + { + UART_TypeDef *regs; /**< Register map */ + ring_buffer *rb; /**< RX ring buffer */ + ring_buffer *wb; /**< TX ring buffer */ + uint32 max_baud; /**< @brief Deprecated. + * Maximum baud rate. */ + uint8 rx_buf[USART_RX_BUF_SIZE]; /**< @brief Deprecated. + * Actual RX buffer used by rb. + * This field will be removed in + * a future release. */ + uint8 tx_buf[USART_TX_BUF_SIZE]; /**< Actual TX buffer used by wb */ + // rcc_clk_id clk_id; /**< RCC clock information */ + IRQn_Type irq_num; /**< USART NVIC interrupt */ + } usart_dev; + + void usart_init(usart_dev *dev); + + struct gpio_dev; /* forward declaration */ + /* FIXME [PRE 0.0.13] decide if flags are necessary */ + /** + * @brief Configure GPIOs for use as USART TX/RX. + * @param udev USART device to use + * @param rx_dev RX pin gpio_dev + * @param rx RX pin bit on rx_dev + * @param tx_dev TX pin gpio_dev + * @param tx TX pin bit on tx_dev + * @param flags Currently ignored + */ + extern void usart_config_gpios_async(usart_dev *udev, + struct gpio_dev *rx_dev, uint8 rx, + struct gpio_dev *tx_dev, uint8 tx, + unsigned flags); + +#define USART_USE_PCLK 0 + void usart_set_baud_rate(usart_dev *dev, uint32 clock_speed, uint32 baud); + + void usart_enable(usart_dev *dev); + void usart_disable(usart_dev *dev); + void usart_foreach(void (*fn)(usart_dev *dev)); + uint32 usart_tx(usart_dev *dev, const uint8 *buf, uint32 len); + uint32 usart_rx(usart_dev *dev, uint8 *buf, uint32 len); + void usart_putudec(usart_dev *dev, uint32 val); + + /** + * @brief Disable all serial ports. + */ + static inline void usart_disable_all(void) + { + usart_foreach(usart_disable); + } + + /** + * @brief Transmit one character on a serial port. + * + * This function blocks until the character has been queued + * for transmission. + * + * @param dev Serial port to send on. + * @param byte Byte to transmit. + */ + static inline void usart_putc(usart_dev *dev, uint8 byte) + { + while (!usart_tx(dev, &byte, 1)) + ; + } + + /** + * @brief Transmit a character string on a serial port. + * + * This function blocks until str is completely transmitted. + * + * @param dev Serial port to send on + * @param str String to send + */ + static inline void usart_putstr(usart_dev *dev, const char *str) + { + uint32 i = 0; + while (str[i] != '\0') + { + usart_putc(dev, str[i++]); + } + } + + /** + * @brief Read one character from a serial port. + * + * It's not safe to call this function if the serial port has no data + * available. + * + * @param dev Serial port to read from + * @return byte read + * @see usart_data_available() + */ + static inline uint8 usart_getc(usart_dev *dev) + { + return rb_remove(dev->rb); + } + + /* + * Roger Clark. 20141125, + * added peek function. + * @param dev Serial port to read from + * @return byte read + */ + static inline int usart_peek(usart_dev *dev) + { + return rb_peek(dev->rb); + } + + /** + * @brief Return the amount of data available in a serial port's RX buffer. + * @param dev Serial port to check + * @return Number of bytes in dev's RX buffer. + */ + static inline uint32 usart_data_available(usart_dev *dev) + { + return rb_full_count(dev->rb); + } + + /** + * @brief Discard the contents of a serial port's RX buffer. + * @param dev Serial port whose buffer to empty. + */ + static inline void usart_reset_rx(usart_dev *dev) + { + rb_reset(dev->rb); + } + + /** + * @brief Discard the contents of a serial port's RX buffer. + * @param dev Serial port whose buffer to empty. + */ + static inline void usart_reset_tx(usart_dev *dev) + { + rb_reset(dev->wb); + } + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif diff --git a/system/libspider/jzw01/include/series/jzw01x_hal_conf.h b/system/libspider/jzw01/include/series/jzw01x_hal_conf.h index a42e223f45d77724a2b09f5b60180c3a516846d1..84aa5e22af4ce7295646cefb329600da5d46929e 100644 --- a/system/libspider/jzw01/include/series/jzw01x_hal_conf.h +++ b/system/libspider/jzw01/include/series/jzw01x_hal_conf.h @@ -6,13 +6,13 @@ extern "C" { #endif - /* Exported types ------------------------------------------------------------*/ - /* Exported constants --------------------------------------------------------*/ + /* Exported types ------------------------------------------------------------*/ + /* Exported constants --------------------------------------------------------*/ - /* ########################## Module Selection ############################## */ - /** - * @brief This is the list of modules to be used in the HAL driver - */ + /* ########################## Module Selection ############################## */ + /** + * @brief This is the list of modules to be used in the HAL driver + */ #define HAL_MODULE_ENABLED #define HAL_ADC_MODULE_ENABLED @@ -49,7 +49,7 @@ extern "C" /*#define HAL_SRAM_MODULE_ENABLED */ #define HAL_TIM_MODULE_ENABLED #define HAL_UART_MODULE_ENABLED -// #define HAL_DEBUG_MODULE_ENABLED +#define HAL_DEBUG_MODULE_ENABLED /*#define HAL_USART_MODULE_ENABLED */ /*#define HAL_WWDG_MODULE_ENABLED */ /*#define HAL_EXTI_MODULE_ENABLED */ @@ -58,16 +58,16 @@ extern "C" #define HAL_DMA_MODULE_ENABLED #define HAL_PMU_MODULE_ENABLED #define HAL_RANDOM_MODULE_ENABLED - // #define HAL_LOWPOWER_MODULE_ENABLED - // #define HAL_CORTEX_MODULE_ENABLED - // #define HAL_DMA_MODULE_ENABLED - // #define HAL_FLASH_MODULE_ENABLED - // #define HAL_EXTI_MODULE_ENABLED - // #define HAL_GPIO_MODULE_ENABLED - // #define HAL_PWR_MODULE_ENABLED - // #define HAL_RCC_MODULE_ENABLED + // #define HAL_LOWPOWER_MODULE_ENABLED + // #define HAL_CORTEX_MODULE_ENABLED + // #define HAL_DMA_MODULE_ENABLED + // #define HAL_FLASH_MODULE_ENABLED + // #define HAL_EXTI_MODULE_ENABLED + // #define HAL_GPIO_MODULE_ENABLED + // #define HAL_PWR_MODULE_ENABLED + // #define HAL_RCC_MODULE_ENABLED - // #define HAL_RF_MODULE_ENABLED + // #define HAL_RF_MODULE_ENABLED #ifdef HAL_LOWPOWER_MODULE_ENABLED #include @@ -160,14 +160,13 @@ extern "C" * @retval None */ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) - /* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t *file, uint32_t line); + /* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t *file, uint32_t line); #else #define assert_param(expr) ((void)0U) #endif /* USE_FULL_ASSERT */ #ifdef __cplusplus - extern } #endif diff --git a/system/libspider/jzw01/include/series/jzw01x_hal_dbg.h b/system/libspider/jzw01/include/series/jzw01x_hal_dbg.h index ad8885ac2e7f52df0860d8779b26bce67f1f195f..47aaf7222a02fba57349948562c2f5f965cd95a3 100644 --- a/system/libspider/jzw01/include/series/jzw01x_hal_dbg.h +++ b/system/libspider/jzw01/include/series/jzw01x_hal_dbg.h @@ -2,17 +2,16 @@ #define JZW01X_HAL_DEBUG_H #ifdef __cplusplus -extern "C" { +extern "C" +{ #endif -#include "jzw01x.h" - -void HAL_Dbg_Init(uint32_t baud); +#include + void HAL_Dbg_Init(uint32_t baud); #ifdef __cplusplus } #endif - #endif diff --git a/tools/win/jlink_upload.bat b/tools/win/jlink_upload.bat index edbbdf68f8f0e996ab17ad5c52fb41a397f0da01..6e9efe0b5b11d1f4127741a44faf722777d8118a 100644 --- a/tools/win/jlink_upload.bat +++ b/tools/win/jlink_upload.bat @@ -11,10 +11,14 @@ set tmpBinFilePath=%tmpBinFilePath:/=\% rem: create commander script file with the tmp bin that the Arduino IDE creates -@echo erase 0x10000000 0x10020000 > %tmpbinfilepath%.jlink -@echo loadbin %tmpbinfilepath% , 0x10000000 >> %tmpbinfilepath%.jlink -@echo r >> %tmpbinfilepath%.jlink -@echo q >> %tmpbinfilepath%.jlink +REM @echo exec EnableEraseAllFlashBanks > %tmpbinfilepath%.jlink +@echo erase 0x10000000 0x10004000 > %tmpbinfilepath%.jlink +@echo halt >> %tmpbinfilepath%.jlink +@echo loadfile %tmpbinfilepath% , 0x10000000 >> %tmpbinfilepath%.jlink +REM @echo r >> %tmpbinfilepath%.jlink +@echo qc >> %tmpbinfilepath%.jlink -"C:\\Program Files\\SEGGER\\JLink\\JLink.exe" -device JZW010DA -if SWD -speed 4000 %tmpBinFilePath%.jlink \ No newline at end of file +REM "C:\\Program Files\\SEGGER\\JLink\\JLink.exe" -autoconnect 1 -device JZW010DA -if SWD -speed 1000 %tmpBinFilePath%.jlink + +"C:\\Program Files\\SEGGER\JLink\\JLink.exe" -autoconnect 1 -device JZW010DA -if SWD -speed 1000 -commandfile %tmpBinFilePath%.jlink \ No newline at end of file diff --git a/tools/win/src/maple_loader/build/built-jar.properties b/tools/win/src/maple_loader/build/built-jar.properties index 10752d534b2d7ed0a87d29fdf8a9395e33ca6340..92249888081f6be10ff5a429b64be38567f2e794 100644 --- a/tools/win/src/maple_loader/build/built-jar.properties +++ b/tools/win/src/maple_loader/build/built-jar.properties @@ -1,4 +1,4 @@ #Mon, 20 Jul 2015 11:21:26 +1000 -C\:\\Users\\rclark\\Desktop\\maple-asp-master\\installer\\maple_loader= +C\:\\Users\\rclark\\Desktop\\spider-asp-master\\installer\\spider_loader= diff --git a/tools/win/src/maple_loader/nbproject/private/private.xml b/tools/win/src/maple_loader/nbproject/private/private.xml index a1bbd60c96c18310ccf73fb59a837135f0ccc53f..76eafe7d22e3c86b2e287ce4ae5281df71247396 100644 --- a/tools/win/src/maple_loader/nbproject/private/private.xml +++ b/tools/win/src/maple_loader/nbproject/private/private.xml @@ -3,8 +3,8 @@ - file:/C:/Users/rclark/Desktop/maple-asp-master/installer/maple_loader/src/CliTemplate/CliMain.java - file:/C:/Users/rclark/Desktop/maple-asp-master/installer/maple_loader/src/CliTemplate/DFUUploader.java + file:/C:/Users/rclark/Desktop/spider-asp-master/installer/spider_loader/src/CliTemplate/CliMain.java + file:/C:/Users/rclark/Desktop/spider-asp-master/installer/spider_loader/src/CliTemplate/DFUUploader.java - + \ No newline at end of file diff --git a/tools/win/src/maple_loader/src/CliTemplate/DFUUploader.java b/tools/win/src/maple_loader/src/CliTemplate/DFUUploader.java index 3dee0b4b71a40c0a5975ca9cecf5ff8c7e6f5610..c129e62c317f19d3f0c81d385972a1249223d199 100644 --- a/tools/win/src/maple_loader/src/CliTemplate/DFUUploader.java +++ b/tools/win/src/maple_loader/src/CliTemplate/DFUUploader.java @@ -134,7 +134,7 @@ public class DFUUploader implements MessageConsumer { /* we need to ensure both RTS and DTR are low to start, then pulse DTR on its own. This is the reset signal - maple responds to + spider responds to */ private void emitResetPulse() throws RunnerException { @@ -328,7 +328,7 @@ public class DFUUploader implements MessageConsumer { if(s.indexOf("No DFU capable USB device found") != -1) { System.err.print(s); - exception = new RunnerException("Problem uploading via dfu-util: No Maple found"); + exception = new RunnerException("Problem uploading via dfu-util: No spider found"); return; } diff --git a/variants/generic_jzw010d/board/board.h b/variants/generic_jzw010d/board/board.h index 01e59f4c30231a79c2b87789145d9daf7c9f89de..5a1bd37244a101168151d071ab4ec4c3b20e9d17 100644 --- a/variants/generic_jzw010d/board/board.h +++ b/variants/generic_jzw010d/board/board.h @@ -25,11 +25,11 @@ *****************************************************************************/ /** - * @file wirish/boards/maple_mini/include/board/board.h + * @file wirish/boards/spider_mini/include/board/board.h * @author Marti Bolivar - * @brief Maple Mini board header. + * @brief spider Mini board header. * - * See wirish/boards/maple/include/board/board.h for more information + * See wirish/boards/spider/include/board/board.h for more information * on these definitions. */ @@ -45,19 +45,16 @@ #define BOARD_USART1_TX_PIN PA2 #define BOARD_USART1_RX_PIN PA3 - #define BOARD_NR_SPI 1 #define BOARD_SPI1_NSS_PIN PA4 #define BOARD_SPI1_MOSI_PIN PA7 #define BOARD_SPI1_MISO_PIN PA6 #define BOARD_SPI1_SCK_PIN PA5 - #define BOARD_NR_GPIO_PINS 40 #define BOARD_NR_PWM_PINS 12 #define BOARD_NR_ADC_PINS 10 - #define BOARD_JTMS_SWDIO_PIN 22 #define BOARD_JTCK_SWCLK_PIN 21 #define BOARD_JTDI_PIN 20 @@ -69,46 +66,46 @@ // Note this needs to match with the PIN_MAP array in board.cpp enum { - PA0, - PA1, - PA2, - PA3, - PA4, - PA5, - PA6, - PA7, - PA8, - PA9, - PA10, - PA11, - PA12, - PA13, - PA14, - PA15, - PA16, - PA17, - PA18, - PA19, - PA20, - PA21, - PA22, - PA23, - PA24, - PA25, - PA26, - PA27, - PA28, - PA29, - PA30, - PA31, - PB0, - PB1, - PB2, - PB3, - PB4, - PB5, - PB6, - PB7, + PA0, + PA1, + PA2, + PA3, + PA4, + PA5, + PA6, + PA7, + PA8, + PA9, + PA10, + PA11, + PA12, + PA13, + PA14, + PA15, + PA16, + PA17, + PA18, + PA19, + PA20, + PA21, + PA22, + PA23, + PA24, + PA25, + PA26, + PA27, + PA28, + PA29, + PA30, + PA31, + PB0, + PB1, + PB2, + PB3, + PB4, + PB5, + PB6, + PB7, }; #endif diff --git a/variants/generic_jzw010d/ld/flash_c8.ld b/variants/generic_jzw010d/ld/flash_c8.ld index 5bfbc41580b52e3a4bc5ef74a892ec4962d2faf6..427cbb3ddd06b7d5db56e2939fbcccb1ee8fa064 100644 --- a/variants/generic_jzw010d/ld/flash_c8.ld +++ b/variants/generic_jzw010d/ld/flash_c8.ld @@ -18,8 +18,8 @@ MEMORY { -ram (xrw) : ORIGIN = 0x20000000, LENGTH = 10K -FLASH (rx) : ORIGIN = 0x10000000, LENGTH = 1M +ram (xrw) : ORIGIN = 0x20000000, LENGTH = 32K +FLASH (rx) : ORIGIN = 0x10000000, LENGTH = 128K } diff --git a/variants/generic_jzw010d/ld/jtag_c8.ld b/variants/generic_jzw010d/ld/jtag_c8.ld index 10aa2e8c5389c76903caa4e615ae3c35b7891160..548b9ea6e39ca35d2790f5f0cb38c23956b03075 100644 --- a/variants/generic_jzw010d/ld/jtag_c8.ld +++ b/variants/generic_jzw010d/ld/jtag_c8.ld @@ -22,8 +22,8 @@ MEMORY { - ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K - rom (rx) : ORIGIN = 0x10000000, LENGTH = 64K + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K + rom (rx) : ORIGIN = 0x10000000, LENGTH = 1M } /* Provide memory region aliases for common.inc */ diff --git a/variants/generic_jzw010d/wirish/boards.cpp b/variants/generic_jzw010d/wirish/boards.cpp index 152a1ee4de7da044c6c18cac4f6a534ca40a3ca8..8fa7f09a52f786db9f1f4faa2de9a08cf6d27694 100644 --- a/variants/generic_jzw010d/wirish/boards.cpp +++ b/variants/generic_jzw010d/wirish/boards.cpp @@ -66,14 +66,14 @@ static void setup_timers(void); void init(void) { // HAL_RCC_SysClock_Set(RCC_SYS_CLOCK_RC16M, 1); - systick_init(2000); + // systick_init(16000); // setup_flash(); - // setup_clocks(); + setup_clocks(); // setup_nvic(); - // SysTick_Config(16000); + SysTick_Config(16000); // wirish::priv::board_setup_gpio(); // setup_timers(); - // wirish::priv::series_init(); + wirish::priv::series_init(); // boardInit(); } @@ -120,13 +120,13 @@ static void setup_clocks(void) // // Turn off and reset the clock subsystems we'll be using, as well // // as the clock security subsystem (CSS). Note that resetting CFGR // // to its default value of 0 implies a switch to HSI for SYSCLK. - __RCC_SOC_CLK_HRESETN(); - __RCC_SOC_RST_HRESETN(); - __RCC_SYSCON_HRESETN(); - __RCC_SYS_CON_HRESETN(); - __RCC_APB0_SYNC_HRESETN(); - __RCC_APB1_SYNC_HRESETN(); - __RCC_INT_BRIDGE_HRESETN(); + // __RCC_SOC_CLK_HRESETN(); + // __RCC_SOC_RST_HRESETN(); + // __RCC_SYSCON_HRESETN(); + // __RCC_SYS_CON_HRESETN(); + // __RCC_APB0_SYNC_HRESETN(); + // __RCC_APB1_SYNC_HRESETN(); + // __RCC_INT_BRIDGE_HRESETN(); // RCC_BASE->CFGR = 0x00000000; // rcc_disable_css(); // rcc_turn_off_clk(RCC_CLK_PLL); diff --git a/variants/generic_jzw010d/wirish/boards_setup.cpp b/variants/generic_jzw010d/wirish/boards_setup.cpp index 43806b28b1ab21a5e79d5c8c0bb565ab1d430b8a..428d0f24d6f9512760bdcfcc96f2a4bd11d31378 100644 --- a/variants/generic_jzw010d/wirish/boards_setup.cpp +++ b/variants/generic_jzw010d/wirish/boards_setup.cpp @@ -35,7 +35,8 @@ */ #include "boards_private.h" - +#include +#include // #include // #include @@ -68,11 +69,11 @@ namespace wirish { // static stm32f1_rcc_pll_data pll_data = {BOARD_RCC_PLLMUL}; -// #if !USE_HSI_CLOCK + // #if !USE_HSI_CLOCK // __weak rcc_pll_cfg w_board_pll_cfg = {RCC_PLLSRC_HSE, &pll_data}; -// #else + // #else // __weak rcc_pll_cfg w_board_pll_cfg = {RCC_PLLSRC_HSI_DIV_2, &pll_data}; -// #endif + // #endif __weak void board_reset_pll(void) { @@ -85,11 +86,11 @@ namespace wirish // rcc_set_prescaler(RCC_PRESCALER_APB1, RCC_APB1_HCLK_DIV_2); // rcc_set_prescaler(RCC_PRESCALER_APB2, RCC_APB2_HCLK_DIV_1); -// #if F_CPU == 72000000 + // #if F_CPU == 72000000 // rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1_5); -// #elif F_CPU == 48000000 + // #elif F_CPU == 48000000 // rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1); -// #endif + // #endif } __weak void board_setup_gpio(void) @@ -102,6 +103,8 @@ namespace wirish // Initialize AFIO here, too, so peripheral remaps and external // interrupts work out of the box. // afio_init(); + HAL_RCC_UARTClock_Set(RCC_SYS_CLOCK_RC16M, 1); + HAL_Dbg_Init(115200); } } diff --git a/variants/generic_jzw010d/wirish/isrs.S b/variants/generic_jzw010d/wirish/isrs.S index 19524560b6b85a0641be54b6ff9741c20ec04469..dd561510daebdaf779e182c8f71eb2a031589a52 100644 --- a/variants/generic_jzw010d/wirish/isrs.S +++ b/variants/generic_jzw010d/wirish/isrs.S @@ -24,7 +24,7 @@ * SOFTWARE. *****************************************************************************/ -/* STM32F1 performance line ISR weak declarations */ +/* JZW performance line ISR weak declarations */ .thumb @@ -39,9 +39,9 @@ __default_handler: .weak __exc_nmi .globl __exc_nmi .set __exc_nmi, __default_handler -// .weak __exc_hardfault -// .globl __exc_hardfault -// .set __exc_hardfault, __default_handler + .weak __exc_hardfault + .globl __exc_hardfault + .set __exc_hardfault, __default_handler .weak __exc_svc .globl __exc_svc .set __exc_svc, __default_handler @@ -49,9 +49,9 @@ __default_handler: .weak __exc_pendsv .globl __exc_pendsv .set __exc_pendsv, __default_handler -// .weak SysTick_Handler // __exc_systick() defined in STM32F1/cores/maple/libmaple/systick.c -// .globl SysTick_Handler -// .set SysTick_Handler, __default_handler + .weak SysTick_Handler // __exc_systick() defined in STM32F1/cores/spider/libspider/systick.c + .globl SysTick_Handler + .set SysTick_Handler, __default_handler .weak Ble_IRQHandler .globl Ble_IRQHandler .set Ble_IRQHandler, __default_handler @@ -70,43 +70,43 @@ __default_handler: .weak I2C1_IRQHandler .globl I2C1_IRQHandler .set I2C1_IRQHandler, __default_handler - ; .weak UART0_IRQHandler // __irq_exti0() defined in STM32F1/cores/maple/libmaple/exti.c + ; .weak UART0_IRQHandler // __irq_exti0() defined in STM32F1/cores/spider/libspider/exti.c ; .globl UART0_IRQHandler ; .set UART0_IRQHandler, __default_handler - ; .weak UART1_IRQHandler // __irq_exti1() defined in STM32F1/cores/maple/libmaple/exti.c + ; .weak UART1_IRQHandler // __irq_exti1() defined in STM32F1/cores/spider/libspider/exti.c ; .globl UART1_IRQHandler ; .set UART1_IRQHandler, __default_handler - .weak WDG_IRQHandler // __irq_exti2() defined in STM32F1/cores/maple/libmaple/exti.c + .weak WDG_IRQHandler // __irq_exti2() defined in STM32F1/cores/spider/libspider/exti.c .globl WDG_IRQHandler .set WDG_IRQHandler, __default_handler - .weak SSP1_IRQHandler // __irq_exti3() defined in STM32F1/cores/maple/libmaple/exti.c + .weak SSP1_IRQHandler // __irq_exti3() defined in STM32F1/cores/spider/libspider/exti.c .globl SSP1_IRQHandler .set SSP1_IRQHandler, __default_handler - .weak Flash_IRQHandler // __irq_exti4() defined in STM32F1/cores/maple/libmaple/exti.c + .weak Flash_IRQHandler // __irq_exti4() defined in STM32F1/cores/spider/libspider/exti.c .globl Flash_IRQHandler .set Flash_IRQHandler, __default_handler - .weak GPIOA_IRQHandler // __irq_dma1_channel1() defined in STM32F1/cores/maple/libmaple/dma_f1.c + .weak GPIOA_IRQHandler // __irq_dma1_channel1() defined in STM32F1/cores/spider/libspider/dma_f1.c .globl GPIOA_IRQHandler .set GPIOA_IRQHandler, __default_handler - .weak GPIOB_IRQHandler // __irq_dma1_channel2() defined in STM32F1/cores/maple/libmaple/dma_f1.c + .weak GPIOB_IRQHandler // __irq_dma1_channel2() defined in STM32F1/cores/spider/libspider/dma_f1.c .globl GPIOB_IRQHandler .set GPIOB_IRQHandler, __default_handler - .weak LCD_IRQHandler // __irq_dma1_channel3() defined in STM32F1/cores/maple/libmaple/dma_f1.c + .weak LCD_IRQHandler // __irq_dma1_channel3() defined in STM32F1/cores/spider/libspider/dma_f1.c .globl LCD_IRQHandler .set LCD_IRQHandler, __default_handler - .weak SSI_IRQHandler // __irq_dma1_channel4() defined in STM32F1/cores/maple/libmaple/dma_f1.c + .weak SSI_IRQHandler // __irq_dma1_channel4() defined in STM32F1/cores/spider/libspider/dma_f1.c .globl SSI_IRQHandler .set SSI_IRQHandler, __default_handler - .weak ADVTIM_IRQHandler // __irq_dma1_channel5() defined in STM32F1/cores/maple/libmaple/dma_f1.c + .weak ADVTIM_IRQHandler // __irq_dma1_channel5() defined in STM32F1/cores/spider/libspider/dma_f1.c .globl ADVTIM_IRQHandler .set ADVTIM_IRQHandler, __default_handler - .weak I2S_RX_IRQHandler // __irq_dma1_channel6() defined in STM32F1/cores/maple/libmaple/dma_f1.c + .weak I2S_RX_IRQHandler // __irq_dma1_channel6() defined in STM32F1/cores/spider/libspider/dma_f1.c .globl I2S_RX_IRQHandler .set I2S_RX_IRQHandler, __default_handler - .weak I2S_TX_IRQHandler // __irq_dma1_channel7() defined in STM32F1/cores/maple/libmaple/dma_f1.c + .weak I2S_TX_IRQHandler // __irq_dma1_channel7() defined in STM32F1/cores/spider/libspider/dma_f1.c .globl I2S_TX_IRQHandler .set I2S_TX_IRQHandler, __default_handler - .weak DMA_IRQHandler // __irq_adc() defined in STM32F1/cores/maple/libmaple/adc_f1.c + .weak DMA_IRQHandler // __irq_adc() defined in STM32F1/cores/spider/libspider/adc_f1.c .globl DMA_IRQHandler .set DMA_IRQHandler, __default_handler \ No newline at end of file diff --git a/variants/generic_jzw010d/wirish/start.S b/variants/generic_jzw010d/wirish/start.S index 8b181aa993134647bebb235d8cb451852a5e9841..d02fbafd60f21ecb94915328d91284347ab8ee15 100644 --- a/variants/generic_jzw010d/wirish/start.S +++ b/variants/generic_jzw010d/wirish/start.S @@ -50,6 +50,9 @@ __start__: .fnstart ldr r1,=__msp_init mov sp,r1 + ldr r0,=0xE000ED08 + ldr r1,=__jzw01x_vector_table + str r1,[r0] ldr r1,=start_c bx r1 .pool diff --git a/variants/generic_jzw010d/wirish/start_c.c b/variants/generic_jzw010d/wirish/start_c.c index 0deee55ab273163451f5785957233620042f570a..dbb68693cd38dcbc06da108f76c5f28a131fa4f8 100644 --- a/variants/generic_jzw010d/wirish/start_c.c +++ b/variants/generic_jzw010d/wirish/start_c.c @@ -87,7 +87,7 @@ void __attribute__((noreturn)) start_c(void) /* Run initializers. */ __libc_init_array(); - + *(volatile int *)(0x40004000) = 0; /* Jump to main. */ exit_code = main(0, 0, 0); if (exit)