# serdes-tdc

**Repository Path**: muhmi/serdes-tdc

## Basic Information

- **Project Name**: serdes-tdc
- **Description**: No description available
- **Primary Language**: Verilog
- **License**: Not specified
- **Default Branch**: master
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 0
- **Forks**: 0
- **Created**: 2024-01-27
- **Last Updated**: 2024-01-27

## Categories & Tags

**Categories**: Uncategorized

**Tags**: None

## README

Time to Digital Converter core for Spartan-6 FPGAs
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Directory organization:
   core/            VHDL sources of the TDC core.
   demo/            Demonstration design for the SPEC board.
   doc/             Documentation.
   hostif/          Optional host interface.