From c483e051bd7ad893d9fe098a89fe9646a3b8877f Mon Sep 17 00:00:00 2001 From: Wanming Hu Date: Wed, 3 Sep 2025 11:26:06 +0800 Subject: [PATCH] uniproton: support sd3403 Support uniproton to run on sd3403/hieulerpi with oEE mica. Signed-off-by: Wanming Hu --- build/uniproton_ci_lib/globle.py | 8 +- .../config_armv8_sd3403/defconfig | 281 ++++++++ .../make_lib_rename_file_type.sh | 8 +- cmake/tool_chain/sd3403_armv8.cmake | 146 +++++ cmake/tool_chain/sd3403_armv8_config.cmake.in | 12 + cmake/tool_chain/uniproton_tool_chain.cmake | 2 +- config.xml | 11 + demos/sd3403/CMakeLists.txt | 123 ++++ demos/sd3403/apps/CMakeLists.txt | 1 + demos/sd3403/apps/openamp/CMakeLists.txt | 2 + demos/sd3403/apps/openamp/main.c | 486 ++++++++++++++ demos/sd3403/apps/openamp/test.h | 8 + demos/sd3403/bsp/CMakeLists.txt | 2 + demos/sd3403/bsp/cache_asm.S | 101 +++ demos/sd3403/bsp/cache_asm.h | 12 + demos/sd3403/bsp/hwi_init.c | 329 ++++++++++ demos/sd3403/bsp/hwi_init.h | 6 + demos/sd3403/bsp/mmu.c | 350 ++++++++++ demos/sd3403/bsp/mmu.h | 206 ++++++ demos/sd3403/bsp/pl011.h | 40 ++ demos/sd3403/bsp/print.c | 64 ++ demos/sd3403/bsp/print_openamp.c | 28 + demos/sd3403/bsp/sd3403/cpu_config.h | 96 +++ demos/sd3403/bsp/start.S | 153 +++++ demos/sd3403/bsp/timer.c | 127 ++++ demos/sd3403/bsp/timer.h | 6 + demos/sd3403/build/build_app.sh | 23 + demos/sd3403/build/build_openamp.sh | 58 ++ demos/sd3403/build/build_static.sh | 23 + demos/sd3403/build/sd3403.ld | 129 ++++ .../UniProton-patch-for-libmetal.patch | 604 ++++++++++++++++++ .../UniProton-patch-for-openamp.patch | 68 ++ demos/sd3403/config/CMakeLists.txt | 2 + demos/sd3403/config/prt_config.c | 484 ++++++++++++++ demos/sd3403/config/prt_config.h | 128 ++++ demos/sd3403/config/prt_config_internal.h | 90 +++ demos/sd3403/libs/.keep | 0 src/include/uapi/prt_buildef_common.h | 3 +- .../posixtestsuite/conformance/CMakeLists.txt | 4 +- testsuites/rhealstone/CMakeLists.txt | 4 +- 40 files changed, 4217 insertions(+), 11 deletions(-) create mode 100644 build/uniproton_config/config_armv8_sd3403/defconfig create mode 100644 cmake/tool_chain/sd3403_armv8.cmake create mode 100644 cmake/tool_chain/sd3403_armv8_config.cmake.in create mode 100644 demos/sd3403/CMakeLists.txt create mode 100644 demos/sd3403/apps/CMakeLists.txt create mode 100644 demos/sd3403/apps/openamp/CMakeLists.txt create mode 100644 demos/sd3403/apps/openamp/main.c create mode 100644 demos/sd3403/apps/openamp/test.h create mode 100644 demos/sd3403/bsp/CMakeLists.txt create mode 100644 demos/sd3403/bsp/cache_asm.S create mode 100644 demos/sd3403/bsp/cache_asm.h create mode 100644 demos/sd3403/bsp/hwi_init.c create mode 100644 demos/sd3403/bsp/hwi_init.h create mode 100644 demos/sd3403/bsp/mmu.c create mode 100644 demos/sd3403/bsp/mmu.h create mode 100644 demos/sd3403/bsp/pl011.h create mode 100644 demos/sd3403/bsp/print.c create mode 100644 demos/sd3403/bsp/print_openamp.c create mode 100644 demos/sd3403/bsp/sd3403/cpu_config.h create mode 100644 demos/sd3403/bsp/start.S create mode 100644 demos/sd3403/bsp/timer.c create mode 100644 demos/sd3403/bsp/timer.h create mode 100755 demos/sd3403/build/build_app.sh create mode 100644 demos/sd3403/build/build_openamp.sh create mode 100644 demos/sd3403/build/build_static.sh create mode 100644 demos/sd3403/build/sd3403.ld create mode 100644 demos/sd3403/component/UniProton-patch-for-libmetal.patch create mode 100644 demos/sd3403/component/UniProton-patch-for-openamp.patch create mode 100644 demos/sd3403/config/CMakeLists.txt create mode 100644 demos/sd3403/config/prt_config.c create mode 100644 demos/sd3403/config/prt_config.h create mode 100644 demos/sd3403/config/prt_config_internal.h create mode 100644 demos/sd3403/libs/.keep diff --git a/build/uniproton_ci_lib/globle.py b/build/uniproton_ci_lib/globle.py index 2d7cf4e6..cfddc035 100755 --- a/build/uniproton_ci_lib/globle.py +++ b/build/uniproton_ci_lib/globle.py @@ -10,7 +10,7 @@ home_path = os.path.dirname(build_dir) config_dir = os.path.join(home_path,'config.xml') kbuild_path = '%s/cmake/common/build_auxiliary_script' % home_path -cpus_ = {'all': ['clean', 'm4', 'raspi4', 'hi3093', 'hi3095', 'atlasa1', 'kp920', 'kp920_lite', 'x86_64', 'rk3568_jailhouse', 'rk3588', 'ascend310b', 'uvp', 'rv64virt', 'ds-d1s', 'e2000q','visionfive2', 'd9_secure'], +cpus_ = {'all': ['clean', 'm4', 'raspi4', 'hi3093', 'hi3095', 'atlasa1', 'kp920', 'kp920_lite', 'x86_64', 'rk3568_jailhouse', 'rk3588', 'ascend310b', 'uvp', 'rv64virt', 'ds-d1s', 'e2000q','visionfive2', 'd9_secure', 'sd3403'], 'clean': ['clean'], 'm4': ['m4'], 'raspi4': ['raspi4'], @@ -29,7 +29,8 @@ cpus_ = {'all': ['clean', 'm4', 'raspi4', 'hi3093', 'hi3095', 'atlasa1', 'kp920' 'e2000q': ['e2000q'], 'milkvduol' : ['milkvduol'], 'visionfive2' : ['visionfive2'], - 'd9_secure': ['d9_secure'] + 'd9_secure': ['d9_secure'], + 'sd3403': ['sd3403'] } cpu_plat = {'m4': ['cortex'], @@ -49,5 +50,6 @@ cpu_plat = {'m4': ['cortex'], 'e2000q': ['armv8'], 'milkvduol' : ['riscv64'], 'visionfive2': ['riscv64'], - 'd9_secure': ['cortex_r5'] + 'd9_secure': ['cortex_r5'], + 'sd3403': ['armv8'] } diff --git a/build/uniproton_config/config_armv8_sd3403/defconfig b/build/uniproton_config/config_armv8_sd3403/defconfig new file mode 100644 index 00000000..58d74920 --- /dev/null +++ b/build/uniproton_config/config_armv8_sd3403/defconfig @@ -0,0 +1,281 @@ +# +# Automatically generated file; DO NOT EDIT. +# UniProton Configuration +# + +# +# Arch Modules Configuration +# +CONFIG_OS_ARCH_ARMV8=y +CONFIG_OS_ARCH_CPU64=y +# CONFIG_OS_OPTION_GUARD_STACK is not set + +# +# ARMV8 Sepecfic Configuration +# +CONFIG_INTERNAL_OS_PLATFORM_ARMV8_AX=y +CONFIG_INTERNAL_OS_SD3403=y + +# +# ARMV8 DRV Features Configuration +# +CONFIG_INTERNAL_OS_GIC_VER="gicv600" +CONFIG_OS_GIC_VER=3 + +# +# Generic Configuration +# +CONFIG_OS_HARDWARE_PLATFORM="OS_ARMV8" +CONFIG_OS_CPU_TYPE="OS_SD3403" +CONFIG_OS_MAX_CORE_NUM=4 +CONFIG_OS_THIS_CORE=0 +CONFIG_INTERNAL_OS_BYTE_ORDER_LE=y +CONFIG_OS_BYTE_ORDER="OS_LITTLE_ENDIAN" +# CONFIG_OS_OPTION_CPU64 is not set +# CONFIG_OS_OPTION_SMP is not set +# CONFIG_OS_OPTION_DCACHE is not set +CONFIG_OS_CACHE_LINE_SIZE=64 +# CONFIG_OS_OPTION_INTERRUPT_PRO is not set +# CONFIG_OS_OPTION_INTERRUPT_PRO=y + +# +# Openamp Modules Configuration, mutually exclusive with Guest +# +CONFIG_OS_OPTION_OPENAMP=y + +# +# Guest Modules Configuration, mutually exclusive with Openamp +# +# CONFIG_GUEST_OS is not set + +# +# ITS Modules Configuration +# +# CONFIG_OS_GIC_ITS_TEST is not set + +# +# IPC Modules Configuration +# + +# +# Event feature configuration +# +CONFIG_OS_OPTION_EVENT=y +CONFIG_OS_OPTION_QUEUE=y + +# +# Semaphore feature configuration +# +# CONFIG_OS_OPTION_BIN_SEM is not set +# CONFIG_OS_OPTION_SEM_RECUR_PV is not set +# CONFIG_OS_OPTION_SEM_PRIOR is not set + +# +# Kernel Modules Configuration +# + +# +# IRQ Modules Configuration +# +# CONFIG_OS_OPTION_HWI_COMBINE is not set +# CONFIG_OS_OPTION_HWI_AFFINITY is not set +CONFIG_OS_OPTION_HWI_PRIORITY=y +CONFIG_OS_OPTION_HWI_ATTRIBUTE=y +# CONFIG_OS_OPTION_HWI_MAX_NUM_CONFIG is not set + +# +# Exc Modules Configuration +# +CONFIG_INTERNAL_OS_SCHEDULE_SINGLE_CORE_BY_CCODE=y +# CONFIG_OS_OPTION_SYS_TIME_USR is not set +# CONFIG_INTERNAL_OS_SPIN_LOCK is not set +# + +# +# Task module Configuration +# +CONFIG_OS_OPTION_TASK=y + +# +# TASK features configuration +# +# CONFIG_OS_OPTION_TASK_MON is not set +CONFIG_OS_OPTION_TASK_DELETE=y +CONFIG_OS_OPTION_TASK_SUSPEND=y +CONFIG_OS_OPTION_TASK_INFO=y +# CONFIG_OS_OPTION_TASK_AFFINITY_STATIC is not set +CONFIG_OS_OPTION_TASK_YIELD=y +CONFIG_OS_TSK_PRIORITY_HIGHEST=0 +CONFIG_OS_TSK_PRIORITY_LOWEST=63 +CONFIG_OS_TSK_NUM_OF_PRIORITIES=64 +CONFIG_OS_TSK_CORE_BYTES_IN_PID=2 +# CONFIG_OS_OPTION_POWEROFF is not set +CONFIG_OS_OPTION_TICK=y +# CONFIG_OS_OPTION_TICKLESS is not set + +# +# Timer Modules Configuration +# +CONFIG_INTERNAL_OS_SWTMR=y + +# +# MM Modules Configuration +# + +# +# OM Modules Configuration +# +CONFIG_OS_OPTION_CPUP=y +CONFIG_OS_OPTION_STACKTRACE=y + +# +# CPUP features configuration +# +CONFIG_INTERNAL_OS_CPUP_THREAD=y +CONFIG_OS_OPTION_CPUP_WARN=y +CONFIG_OS_OPTION_PROXY=y + +# +# Error Report Module Configuration +# + +# +# Hook feature configuration +# + +# +# security Modules Configuration +# +# CONFIG_OS_OPTION_RND is not set + +# +# Utility Modules Configuration +# +CONFIG_OS_OPTION_POSIX=y +CONFIG_OS_OPTION_POSIX_SIGNAL=y +CONFIG_OS_POSIX_TYPE_NEWLIB=y +CONFIG_OS_POSIX_SET_TZDST=y + +# +# Shell Modules Configuration. Adapted from LiteOS +# +CONFIG_CONFIG_LOCAL_ECHO=y +CONFIG_LOSCFG_SHELL=y +CONFIG_LOSCFG_SHELL_MICA_INPUT=y + +# +# dynamic module load Configuration +# +CONFIG_OS_OPTION_DYNAMIC_MODULE=y +# +# log module +# +CONFIG_OS_OPTION_LOG=y + +# +# Net Modules Configuration +# +# CONFIG_OS_SUPPORT_NET is not set + +# +# FAT module +# +CONFIG_CONFIG_FS_FAT=y + +# +# dirvers Modules Configuration +# +# CONFIG_OS_OPTION_NUTTX_VFS is not set +# if use dirver must config "CONFIG_OS_OPTION_NUTTX_VFS" +# CONFIG_OS_OPTION_DRIVER is not set +CONFIG_CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_CONFIG_DISABLE_ENVIRON=y + +# CONFIG_OS_OPTION_FATFS_PAGE_SIZE is Byte +CONFIG_OS_OPTION_FATFS_PAGE_SIZE=512 +CONFIG_OS_OPTION_FATFS_CODE_PAGE=437 + +# from fs_chstat.c +CONFIG_CONFIG_PSEUDOFS_SOFTLINKS=y +CONFIG_CONFIG_PSEUDOFS_ATTRIBUTES=y +# CONFIG_CONFIG_DISABLE_MOUNTPOINT + +# from fs_epoll.c +CONFIG_CONFIG_FS_NEPOLL_DESCRIPTORS=8 + +# from fs_eventfd.c +CONFIG_CONFIG_EVENT_FD_POLL=y +CONFIG_CONFIG_EVENT_FD_NPOLLWAITERS=2 + +# from fs_fdopen.c +# CONFIG_CONFIG_STDIO_DISABLE_BUFFERING +CONFIG_CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_CONFIG_STDIO_LINEBUFFER=y + +# +# driver SubModules Configuration +# +CONFIG_CONFIG_MTD=y +CONFIG_CONFIG_MTD_PARTITION=y +CONFIG_CONFIG_MTD_PARTITION_NAMES=y +CONFIG_CONFIG_DEBUG_FEATURES=y + +# CONFIG_OS_OPTION_NUTTX_UART is not set + +# from Make.defs +# CONFIG_CONFIG_FILE_STREAM is not set +CONFIG_CONFIG_EVENT_FD=y +CONFIG_CONFIG_TIMER_FD=y +# CONFIG_CONFIG_SIGNAL_FD is not set + +# from fs_poll.c +CONFIG_CONFIG_BUILD_KERNEL=y + +# from fs_select.c +CONFIG_CONFIG_FDCHECK=y + +# from fs_sendfile.c +CONFIG_CONFIG_NET_SENDFILE=y +CONFIG_CONFIG_SENDFILE_BUFSIZE=512 + +# from fs_signalfd.c +CONFIG_CONFIG_SCHED_HAVE_PARENT=y +CONFIG_SIGNAL_FD_NPOLLWAITERS=2 + +# from fs_stat.c +CONFIG_CONFIG_FS_NAMED_SEMAPHORES=y +# CONFIG_CONFIG_DISABLE_MQUEUE is not set +# CONFIG_CONFIG_DISABLE_MQUEUE_SYSV is not set +CONFIG_CONFIG_FS_SHM=y + +# from fs_timerfd.c +CONFIG_CONFIG_TIMER_FD_POLL=y +CONFIG_CONFIG_TIMER_FD_NPOLLWAITERS=2 + +# from fs_fstat.c +CONFIG_CONFIG_NET=y + +# from fs_ioctl.c +CONFIG_CONFIG_FDSAN=y + +# from fs_mkdir.c +# CONFIG_CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y + +# from tls.h +CONFIG_CONFIG_LIBC_MAX_EXITFUNS=0 +CONFIG_CONFIG_TLS_NELEM=0 +CONFIG_CONFIG_TLS_TASK_NELEM=0 + +# from lib_libstream.c +# CONFIG_CONFIG_BUILD_FLAT is not set + +# for fs_procfs_mount.c fs_gettype.c +# CONFIG_CONFIG_FS_PROCFS is not set +# CONFIG_CONFIG_FS_PROCFS_EXCLUDE_MOUNT is not set + +# for nuttx/clock.h +CONFIG_CONFIG_SYSTEM_TIME64=y + +# CONFIG_CONFIG_LOCAL_ECHO is not set + +CONFIG_CONFIG_BOARD_LOOPSPERMSEC=25000 diff --git a/cmake/common/build_auxiliary_script/make_lib_rename_file_type.sh b/cmake/common/build_auxiliary_script/make_lib_rename_file_type.sh index 33f27f3a..0eaeac1b 100755 --- a/cmake/common/build_auxiliary_script/make_lib_rename_file_type.sh +++ b/cmake/common/build_auxiliary_script/make_lib_rename_file_type.sh @@ -16,7 +16,7 @@ file=lib"${CK_LIB_SUFFIX}" if [ "${CPU_TYPE}" = "m4" ] || [ "${CPU_TYPE}" = "d9_secure" ] ; then ARNAME=arm-none-eabi-ar ; OBJCOPYNAME=arm-none-eabi-objcopy; -elif [ "${CPU_TYPE}" = "raspi4" ] || [ "${CPU_TYPE}" = "hi3093" ] || [ "${CPU_TYPE}" = "hi3095" ] || [ "${CPU_TYPE}" = "atlasa1" ] || [ "${CPU_TYPE}" = "kp920" ] || [ "${CPU_TYPE}" = "kp920_lite" ] || [ "${CPU_TYPE}" = "rk3568_jailhouse" ] || [ "${CPU_TYPE}" = "rk3588" ] || [ "${CPU_TYPE}" = "ascend310b" ] || [ "${CPU_TYPE}" = "e2000q" ]; +elif [ "${CPU_TYPE}" = "raspi4" ] || [ "${CPU_TYPE}" = "hi3093" ] || [ "${CPU_TYPE}" = "hi3095" ] || [ "${CPU_TYPE}" = "atlasa1" ] || [ "${CPU_TYPE}" = "kp920" ] || [ "${CPU_TYPE}" = "kp920_lite" ] || [ "${CPU_TYPE}" = "rk3568_jailhouse" ] || [ "${CPU_TYPE}" = "rk3588" ] || [ "${CPU_TYPE}" = "ascend310b" ] || [ "${CPU_TYPE}" = "e2000q" ] || [ "${CPU_TYPE}" = "sd3403" ]; then ARNAME=aarch64-none-elf-ar; OBJCOPYNAME=aarch64-none-elf-objcopy; elif [ "${CPU_TYPE}" = "x86_64" ]; then ARNAME=x86_64-openeuler-linux-gnu-ar; OBJCOPYNAME=x86_64-openeuler-linux-gnu-objcopy; @@ -29,7 +29,7 @@ fi sleep 2 pushd "$CK_LIB_PATH" ##为什么不加这一行要报错 -if [ "${CPU_TYPE}" = "m4" ] || [ "${CPU_TYPE}" = "raspi4" ] || [ "${CPU_TYPE}" = "hi3093" ] || [ "${CPU_TYPE}" = "hi3095" ] || [ "${CPU_TYPE}" = "atlasa1" ] || [ "${CPU_TYPE}" = "kp920" ] || [ "${CPU_TYPE}" = "kp920_lite" ] || [ "${CPU_TYPE}" = "x86_64" ] || [ "${CPU_TYPE}" = "rk3568_jailhouse" ] || [ "${CPU_TYPE}" = "rk3588" ] || [ "${CPU_TYPE}" = "ascend310b" ] || [ "${CPU_TYPE}" = "rv64virt" ] || [ "${CPU_TYPE}" = "ds-d1s" ] || [ "${CPU_TYPE}" = "e2000q" ] || [ "${CPU_TYPE}" = "milkvduol" ] || [ "${CPU_TYPE}" = "d9_secure" ]; then +if [ "${CPU_TYPE}" = "m4" ] || [ "${CPU_TYPE}" = "raspi4" ] || [ "${CPU_TYPE}" = "hi3093" ] || [ "${CPU_TYPE}" = "hi3095" ] || [ "${CPU_TYPE}" = "atlasa1" ] || [ "${CPU_TYPE}" = "kp920" ] || [ "${CPU_TYPE}" = "kp920_lite" ] || [ "${CPU_TYPE}" = "x86_64" ] || [ "${CPU_TYPE}" = "rk3568_jailhouse" ] || [ "${CPU_TYPE}" = "rk3588" ] || [ "${CPU_TYPE}" = "ascend310b" ] || [ "${CPU_TYPE}" = "rv64virt" ] || [ "${CPU_TYPE}" = "ds-d1s" ] || [ "${CPU_TYPE}" = "e2000q" ] || [ "${CPU_TYPE}" = "milkvduol" ] || [ "${CPU_TYPE}" = "d9_secure" ] || [ "${CPU_TYPE}" = "sd3403" ]; then [ -n tmp_"${file}" ] && rm -rf tmp_"${file}" fi mkdir tmp_"${file}" @@ -40,7 +40,7 @@ pushd tmp_"${file}" # 删除某变量指定的目录下所有文件。 # 通过对变量${FILE_PATH}进行判断，当${FILE_PATH}为空时，不会错误删除根目录下的文件。 [ -n "${file}" ] && rm -rf "${file}" -if [ "${CPU_TYPE}" = "m4" ] || [ "${CPU_TYPE}" = "raspi4" ] || [ "${CPU_TYPE}" = "hi3093" ] || [ "${CPU_TYPE}" = "hi3095" ] || [ "${CPU_TYPE}" = "kp920" ] || [ "${CPU_TYPE}" = "kp920_lite" ] || [ "${CPU_TYPE}" = "atlasa1" ]|| [ "${CPU_TYPE}" = "rk3568_jailhouse" ] || [ "${CPU_TYPE}" = "rk3588" ] || [ "${CPU_TYPE}" = "ascend310b" ] || [ "${CPU_TYPE}" = "rv64virt" ] || [ "${CPU_TYPE}" = "ds-d1s" ] || [ "${CPU_TYPE}" = "e2000q" ] || [ "${CPU_TYPE}" = "milkvduol" ] || [ "${CPU_TYPE}" = "d9_secure" ]; then +if [ "${CPU_TYPE}" = "m4" ] || [ "${CPU_TYPE}" = "raspi4" ] || [ "${CPU_TYPE}" = "hi3093" ] || [ "${CPU_TYPE}" = "hi3095" ] || [ "${CPU_TYPE}" = "kp920" ] || [ "${CPU_TYPE}" = "kp920_lite" ] || [ "${CPU_TYPE}" = "atlasa1" ]|| [ "${CPU_TYPE}" = "rk3568_jailhouse" ] || [ "${CPU_TYPE}" = "rk3588" ] || [ "${CPU_TYPE}" = "ascend310b" ] || [ "${CPU_TYPE}" = "rv64virt" ] || [ "${CPU_TYPE}" = "ds-d1s" ] || [ "${CPU_TYPE}" = "e2000q" ] || [ "${CPU_TYPE}" = "milkvduol" ] || [ "${CPU_TYPE}" = "d9_secure" ] || [ "${CPU_TYPE}" = "sd3403" ]; then find . -name '*.s.o'| awk -F "." '{print $2}'|xargs -I'{}' mv ./{}.s.o ./{}.o find . -name '*.S.o'| awk -F "." '{print $2}'|xargs -I'{}' mv ./{}.S.o ./{}.o find . -name '*.c.o'| awk -F "." '{print $2}'|xargs -I'{}' mv ./{}.c.o ./{}.o @@ -57,7 +57,7 @@ if [ "${CPU_TYPE}" = "m4" ] || [ "${CPU_TYPE}" = "d9_secure" ] ; then done fi -if [ "${CPU_TYPE}" = "raspi4" ] || [ "${CPU_TYPE}" = "hi3093" ] || [ "${CPU_TYPE}" = "hi3095" ] || [ "${CPU_TYPE}" = "atlasa1" ] || [ "${CPU_TYPE}" = "kp920" ] || [ "${CPU_TYPE}" = "kp920_lite" ] || [ "${CPU_TYPE}" = "rk3568_jailhouse" ] || [ "${CPU_TYPE}" = "rk3588" ] || [ "${CPU_TYPE}" = "ascend310b" ] || [ "${CPU_TYPE}" = "e2000q" ]; then +if [ "${CPU_TYPE}" = "raspi4" ] || [ "${CPU_TYPE}" = "hi3093" ] || [ "${CPU_TYPE}" = "hi3095" ] || [ "${CPU_TYPE}" = "atlasa1" ] || [ "${CPU_TYPE}" = "kp920" ] || [ "${CPU_TYPE}" = "kp920_lite" ] || [ "${CPU_TYPE}" = "rk3568_jailhouse" ] || [ "${CPU_TYPE}" = "rk3588" ] || [ "${CPU_TYPE}" = "ascend310b" ] || [ "${CPU_TYPE}" = "e2000q" ] || [ "${CPU_TYPE}" = "sd3403" ]; then for i in $(ls *.o); do if [ -f "${i}" ] ; then diff --git a/cmake/tool_chain/sd3403_armv8.cmake b/cmake/tool_chain/sd3403_armv8.cmake new file mode 100644 index 00000000..15e63454 --- /dev/null +++ b/cmake/tool_chain/sd3403_armv8.cmake @@ -0,0 +1,146 @@ +set(OBJCOPY_PATH "$ENV{HCC_PATH}" ) +##最终的链接目标，会生成对应的.a库 +################################################# +## guest代码 +################################################# +#添加进列表 +foreach(FILE_NAME ${ALL_OBJECT_LIBRARYS}) + list(FIND exclude "${FILE_NAME}" is_inclide) + if(${is_inclide} EQUAL -1) + list(APPEND GUEST_SRCS + $ + ) + endif() +endforeach() + +#编译结果 +string(TOUPPER ${PLAM_TYPE} PLAM_TYPE_UP) +string(TOUPPER ${CPU_TYPE} CPU_TYPE_UP) +add_library(SD3403 STATIC "${GUEST_SRCS}") +add_custom_target(cleanobj) +add_custom_command(TARGET cleanobj POST_BUILD + COMMAND echo finishing) + +if (${COMPILE_MODE} MATCHES "^.*dbg.*$") + message("=============== COMPILE_MODE is ${COMPILE_MODE} ===============") +endif() + +####以下为make install打包脚本##### +set(sd3403_armv8_export modules) + +# 下面的变量分别定义了安装根目录、头文件安装目录、动态库安装目录、静态库安装目录、OBJECT文件安装目录、可执行程序安装目录、配置文件安装目录。 +# 注意：所有安装路径必须是相对CMAKE_INSTALL_PREFIX的相对路径，不可以使用绝对路径!!! +# 否则安装目录下的配置文件(foo-config.cmake, foo-tragets.cmake等)拷贝到其它目录时无法工作。 +set(INSTALL_SD3403_ARMV8_BASE_DIR .) +set(INSTALL_SD3403_ARMV8_INCLUDE_DIR UniProton/include) +set(INSTALL_SD3403_ARMV8_ARCHIVE_DIR UniProton/lib/sd3403) +set(INSTALL_SD3403_ARMV8_ARCHIVE_SEC_DIR libboundscheck/lib/sd3403) +set(INSTALL_SD3403_ARMV8_ARCHIVE_CONFIG_DIR UniProton/config) +set(INSTALL_SD3403_ARMV8_CONFIG_DIR cmake/sd3403) + + +include(CMakePackageConfigHelpers) +configure_package_config_file(${PROJECT_SOURCE_DIR}/cmake/tool_chain/sd3403_armv8_config.cmake.in + ${CMAKE_CURRENT_BINARY_DIR}/uniproton-sd3403-armv8-config.cmake + INSTALL_DESTINATION ${INSTALL_SD3403_ARMV8_CONFIG_DIR} + PATH_VARS + INSTALL_SD3403_ARMV8_BASE_DIR + INSTALL_SD3403_ARMV8_INCLUDE_DIR + INSTALL_SD3403_ARMV8_ARCHIVE_DIR + INSTALL_SD3403_ARMV8_ARCHIVE_SEC_DIR + INSTALL_SD3403_ARMV8_ARCHIVE_CONFIG_DIR + INSTALL_SD3403_ARMV8_CONFIG_DIR + INSTALL_PREFIX ${CMAKE_INSTALL_PREFIX} +) +install(EXPORT ${sd3403_armv8_export} + NAMESPACE UniProton:: + FILE uniproton-sd3403-armv8-targets.cmake + DESTINATION ${INSTALL_SD3403_ARMV8_CONFIG_DIR} +) +install(FILES + ${CMAKE_CURRENT_BINARY_DIR}/uniproton-sd3403-armv8-config.cmake + DESTINATION ${INSTALL_SD3403_ARMV8_CONFIG_DIR} +) + +install(TARGETS + CortexMXsec_c + EXPORT ${sd3403_armv8_export} + ARCHIVE DESTINATION ${INSTALL_SD3403_ARMV8_ARCHIVE_SEC_DIR} +) + +install(TARGETS + SD3403 + EXPORT ${sd3403_armv8_export} + ARCHIVE DESTINATION ${INSTALL_SD3403_ARMV8_ARCHIVE_DIR}/ +) + +set(TOOLCHAIN_DIR "$ENV{HCC_PATH}") #该路径应该是外部传入,指向编译工具路径 +if (${COMPILE_MODE} MATCHES "^.*dbg.*$") + message("=============== COMPILE_MODE is ${COMPILE_MODE} ===============") +else() + +endif() + +install(FILES + ${PROJECT_SOURCE_DIR}/build/uniproton_config/config_armv8_sd3403/prt_buildef.h + DESTINATION ${INSTALL_SD3403_ARMV8_ARCHIVE_CONFIG_DIR}/sd3403 +) + +if (NOT "${LIBCK_INSTALL_FILE_OPTION}" STREQUAL "SUPER_BUILD") + ##{GLOB 所有文件 | GLOB_RECURSE 递归查找文件&文件夹} + install(FILES + ${PROJECT_SOURCE_DIR}/src/config/prt_config.c + ${PROJECT_SOURCE_DIR}/src/config/prt_config_internal.h + ${PROJECT_SOURCE_DIR}/src/config/config/prt_config.h + DESTINATION ${INSTALL_SD3403_ARMV8_ARCHIVE_CONFIG_DIR} + ) + ##{GLOB 所有文件 | GLOB_RECURSE 递归查找文件&文件夹} + file(GLOB common_include_files ${PROJECT_SOURCE_DIR}/src/include/uapi/common/*.h) + install(FILES + ${common_include_files} + DESTINATION ${INSTALL_SD3403_ARMV8_INCLUDE_DIR}/common + ) + + + ##{GLOB 所有文件 | GLOB_RECURSE 递归查找文件&文件夹 =======} + file(GLOB hw_board_include_files ${PROJECT_SOURCE_DIR}/src/include/uapi/sre/hw/board/*) + install(FILES + ${hw_board_include_files} + DESTINATION ${INSTALL_SD3403_ARMV8_INCLUDE_DIR}/hw/board + ) + + ##{GLOB 所有文件 | GLOB_RECURSE 递归查找文件&文件夹} + file(GLOB hw_cpu_include_files ${PROJECT_SOURCE_DIR}/src/include/uapi/sre/hw/cpu/*) + install(FILES + ${hw_cpu_include_files} + DESTINATION ${INSTALL_SD3403_ARMV8_INCLUDE_DIR}/hw/cpu + ) + + ##{GLOB 所有文件 | GLOB_RECURSE 递归查找文件&文件夹} + file(GLOB hw_drv_include_files ${PROJECT_SOURCE_DIR}/src/include/uapi/sre/hw/drv/*) + install(FILES + ${hw_drv_include_files} + DESTINATION ${INSTALL_SD3403_ARMV8_INCLUDE_DIR}/hw/drv + ) + + install(FILES + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_errno.h + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_event.h + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_exc.h + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_hook.h + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_hwi.h + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_mem.h + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_module.h + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_queue.h + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_sem.h + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_sys.h + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_task.h + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_tick.h + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_log.h + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_timer.h + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_typedef.h + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_cpup.h + ${PROJECT_SOURCE_DIR}/src/include/uapi/prt_err.h + DESTINATION ${INSTALL_SD3403_ARMV8_INCLUDE_DIR}/ + ) +endif() \ No newline at end of file diff --git a/cmake/tool_chain/sd3403_armv8_config.cmake.in b/cmake/tool_chain/sd3403_armv8_config.cmake.in new file mode 100644 index 00000000..442f176d --- /dev/null +++ b/cmake/tool_chain/sd3403_armv8_config.cmake.in @@ -0,0 +1,12 @@ +@PACKAGE_INIT@ +include(${CMAKE_CURRENT_LIST_DIR}/uniproton-sd3403-armv8-targets.cmake) + + + +set_and_check(INSTALL_SD3403_ARMV8_BASE_DIR "@PACKAGE_INSTALL_SD3403_ARMV8_BASE_DIR@") +set_and_check(INSTALL_SD3403_ARMV8_INCLUDE_DIR "@PACKAGE_INSTALL_SD3403_ARMV8_INCLUDE_DIR@") +set_and_check(INSTALL_SD3403_ARMV8_ARCHIVE_DIR "@PACKAGE_INSTALL_SD3403_ARMV8_ARCHIVE_DIR@") +set_and_check(INSTALL_SD3403_ARMV8_ARCHIVE_CONFIG_DIR "@PACKAGE_INSTALL_SD3403_ARMV8_ARCHIVE_CONFIG_DIR@") +set_and_check(INSTALL_SD3403_ARMV8_CONFIG_DIR "@PACKAGE_INSTALL_SD3403_ARMV8_CONFIG_DIR@") + +check_required_components(uniproton-sd3403-armv8) \ No newline at end of file diff --git a/cmake/tool_chain/uniproton_tool_chain.cmake b/cmake/tool_chain/uniproton_tool_chain.cmake index ac117140..60e6a7bc 100755 --- a/cmake/tool_chain/uniproton_tool_chain.cmake +++ b/cmake/tool_chain/uniproton_tool_chain.cmake @@ -20,7 +20,7 @@ set(COMPILE_WARING_FLAG " -Wall -Werror -Wextra -Wformat=2 -Wfloat-equal -Wshad include(${HOME_PATH}/cmake/tool_chain/uniproton_tool_chain_gcc.cmake) endif() -if (${CPU_TYPE} STREQUAL "raspi4" OR ${CPU_TYPE} STREQUAL "hi3093" OR ${CPU_TYPE} STREQUAL "hi3095" OR ${CPU_TYPE} STREQUAL "atlasa1" OR ${CPU_TYPE} STREQUAL "kp920" OR ${CPU_TYPE} STREQUAL "kp920_lite" OR ${CPU_TYPE} STREQUAL "rk3568_jailhouse" OR ${CPU_TYPE} STREQUAL "rk3588" OR ${CPU_TYPE} STREQUAL "ascend310b" OR ${CPU_TYPE} STREQUAL "e2000q") +if (${CPU_TYPE} STREQUAL "raspi4" OR ${CPU_TYPE} STREQUAL "hi3093" OR ${CPU_TYPE} STREQUAL "hi3095" OR ${CPU_TYPE} STREQUAL "atlasa1" OR ${CPU_TYPE} STREQUAL "kp920" OR ${CPU_TYPE} STREQUAL "kp920_lite" OR ${CPU_TYPE} STREQUAL "rk3568_jailhouse" OR ${CPU_TYPE} STREQUAL "rk3588" OR ${CPU_TYPE} STREQUAL "ascend310b" OR ${CPU_TYPE} STREQUAL "e2000q" OR ${CPU_TYPE} STREQUAL "sd3403") #### 统一告警选项,请审慎增删 set(STRONG_COMPILE_WARING_FLAG "-Wunused -Wredundant-decls -Wfloat-conversion -Wwrite-strings -Wunused-macros -Wswitch-default -Wshift-overflow=2 -Wnested-externs -Wmissing-include-dirs -Wlogical-op -Wjump-misses-init -Wformat-security -Wvla -Wframe-larger-than=4096 -Wduplicated-cond -Wdisabled-optimization -Wduplicated-branches -Wignored-qualifiers -Wimplicit-fallthrough=3 -Wpointer-arith -Wshift-negative-value -Wsign-compare -Wtype-limits -Wcast-qual -Wundef -Wbad-function-cast -Wold-style-definition -Wpacked -Wstrict-prototypes -Wstack-usage=2048") set(COMPILE_WARING_FLAG " -Wall -Werror -Wextra -Wformat=2 -Wfloat-equal -Wshadow -Wtrampolines -Wdate-time ")## -Wall -Werror -Wextra -Wformat=2 -Wfloat-equal diff --git a/config.xml b/config.xml index 9f2ab9e4..e4efbf31 100644 --- a/config.xml +++ b/config.xml @@ -208,4 +208,15 @@ + + + SRE + + armv8 + /opt/buildtools/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/bin + /opt/buildtools/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/bin + armv8_sd3403 + + + \ No newline at end of file diff --git a/demos/sd3403/CMakeLists.txt b/demos/sd3403/CMakeLists.txt new file mode 100644 index 00000000..636b30d6 --- /dev/null +++ b/demos/sd3403/CMakeLists.txt @@ -0,0 +1,123 @@ +cmake_minimum_required(VERSION 3.12) + +set(HOME_PATH ${CMAKE_CURRENT_SOURCE_DIR}/../..) +set(OUTPUT_PATH ${HOME_PATH}/output) + +set(CMAKE_C_COMPILER ${TOOLCHAIN_PATH}/bin/aarch64-none-elf-gcc) +set(CMAKE_CXX_COMPILER ${TOOLCHAIN_PATH}/bin/aarch64-none-elf-g++) +set(CMAKE_ASM_COMPILER ${TOOLCHAIN_PATH}/bin/aarch64-none-elf-gcc) +set(CMAKE_LINKER ${TOOLCHAIN_PATH}/bin/aarch64-none-elf-ld) + +project(exmaples LANGUAGES C ASM) + +set(POSIX_OPTION "-D_POSIX_THREADS -D_POSIX_THREAD_PRIORITY_SCHEDULING -D_POSIX_PRIORITY_SCHEDULING -D_POSIX_TIMERS -D_POSIX_CPUTIME -D_POSIX_THREAD_CPUTIME -D_POSIX_MONOTONIC_CLOCK -D_POSIX_TIMEOUTS -D_POSIX_CLOCK_SELECTION -D_POSIX_THREAD_PRIO_PROTECT -D_UNIX98_THREAD_MUTEX_ATTRIBUTES -D_POSIX_READER_WRITER_LOCKS") +set(CC_OPTION "-g -march=armv8.2-a+nosimd -Wl,--build-id=none -fno-builtin -fno-PIE -Wall -fno-dwarf2-cfi-asm -mcmodel=large -fomit-frame-pointer -fzero-initialized-in-bss -fdollars-in-identifiers -ffunction-sections -fdata-sections -fno-common -fno-aggressive-loop-optimizations -fno-optimize-strlen -fno-schedule-insns -fno-inline-small-functions -fno-inline-functions-called-once -fno-strict-aliasing -fno-builtin -finline-limit=20 -mstrict-align -mlittle-endian -specs=nosys.specs -nostartfiles -funwind-tables -nostdlib -nostdinc") +set(AS_OPTION "-g -march=armv8.2-a+nosimd -Wl,--build-id=none -fno-builtin -fno-PIE -Wall -fno-dwarf2-cfi-asm -mcmodel=large -fomit-frame-pointer -fzero-initialized-in-bss -fdollars-in-identifiers -ffunction-sections -fdata-sections -fno-common -fno-aggressive-loop-optimizations -fno-optimize-strlen -fno-schedule-insns -fno-inline-small-functions -fno-inline-functions-called-once -fno-strict-aliasing -fno-builtin -finline-limit=20 -mstrict-align -mlittle-endian -nostartfiles -mgeneral-regs-only -DENV_EL1") +set(LD_OPTION "-static -no-pie -Wl,--wrap=memset -Wl,--wrap=memcpy") +set(CMAKE_C_FLAGS "${CC_OPTION} ${POSIX_OPTION}") +set(CMAKE_ASM_FLAGS "${AS_OPTION} ${POSIX_OPTION}") + +# 公共函数定义导入 +include(${HOME_PATH}/cmake/functions/uniproton_functions.cmake) +# 函数import_kconfig把.config文件中的定义转换为cmake变量，用于后续子文件夹中决定是否编译某库 +import_kconfig(${HOME_PATH}/build/uniproton_config/config_armv8_sd3403/defconfig) + +set(CMAKE_LINK_FLAGS "${LD_OPTION} -T ${CMAKE_CURRENT_SOURCE_DIR}/build/sd3403.ld") +set(CMAKE_EXE_LINKER_FLAGS "${LD_OPTION} -T ${CMAKE_CURRENT_SOURCE_DIR}/build/sd3403.ld") +set(CC_OPTION "-O0") +set(AS_OPTION "-O0") + +include_directories( + ${CMAKE_CURRENT_SOURCE_DIR}/include + ${CMAKE_CURRENT_SOURCE_DIR}/config + ${CMAKE_CURRENT_SOURCE_DIR}/bsp + ${CMAKE_CURRENT_SOURCE_DIR}/bsp/sd3403 + ${HOME_PATH}/src/arch/include + ${HOME_PATH}/src/core/kernel/include + ${HOME_PATH}/src/utility/lib/include + ${CMAKE_CURRENT_SOURCE_DIR}/apps/openamp + ${CMAKE_CURRENT_SOURCE_DIR}/build/open-amp/output/usr/local/include + ${CMAKE_CURRENT_SOURCE_DIR}/build/libmetal/output/usr/local/include + ${HOME_PATH}/output/libc/include + ${HOME_PATH}/src/shell/adapter/include + ${HOME_PATH}/src/shell/full/include + ${HOME_PATH}/src/component/mica + ${HOME_PATH}/src/component/proxy + ${HOME_PATH}/src/om/include + ${HOME_PATH}/src/mem/include + ${OUTPUT_PATH}/drivers/include/ +) + +link_directories(${CMAKE_CURRENT_SOURCE_DIR}/libs) + +link_libraries( + -Wl,--start-group + "${CMAKE_CURRENT_SOURCE_DIR}/libs/libCortexMXsec_c.lib" + "${CMAKE_CURRENT_SOURCE_DIR}/libs/libSD3403.a" + "${CMAKE_CURRENT_SOURCE_DIR}/libs/libmetal.a" + "${CMAKE_CURRENT_SOURCE_DIR}/libs/libopen_amp.a" + "${TOOLCHAIN_PATH}/lib/gcc/aarch64-none-elf/10.3.1/libgcc.a" + -Wl,--end-group +) + +add_subdirectory(bsp) +add_subdirectory(config) +add_subdirectory(apps) +add_subdirectory(${HOME_PATH}/src/component/proxy proxy) +list(APPEND OBJS $) + +add_subdirectory(${HOME_PATH}/src/component/mica mica) +list(APPEND OBJS $) +if (${APP} STREQUAL "UniPorton_test_posix_time_interface" OR + ${APP} STREQUAL "UniPorton_test_posix_thread_sem_interface" OR + ${APP} STREQUAL "UniPorton_test_posix_thread_pthread_interface" OR + ${APP} STREQUAL "UniPorton_test_posix_malloc_interface" OR + ${APP} STREQUAL "UniPorton_test_posix_signal_interface") + add_subdirectory(${HOME_PATH}/testsuites/posixtestsuite/conformance tmp) + target_compile_options(rpmsg PUBLIC -DPOSIX_TESTCASE) + # 如果从核需要跑测试用例，config加上测试用例选项 + # target_compile_options(config PUBLIC -DPOSIX_TESTCASE) + list(APPEND OBJS $ $ $ $) +elseif (${APP} STREQUAL "UniPorton_test_proxy_posix_interface") + add_subdirectory(${HOME_PATH}/testsuites/posixtestsuite/conformance tmp) + target_compile_options(rpmsg PUBLIC -DPOSIX_TESTCASE) + list(APPEND OBJS $ $ $ $) +elseif (${APP} STREQUAL "task-switch" OR + ${APP} STREQUAL "task-preempt" OR + ${APP} STREQUAL "semaphore-shuffle" OR + ${APP} STREQUAL "interrupt-latency" OR + ${APP} STREQUAL "deadlock-break" OR + ${APP} STREQUAL "message-latency") + add_subdirectory(${HOME_PATH}/testsuites/rhealstone tmp) + target_compile_options(rpmsg PUBLIC -DRHEALSTONE_TESTCASE) + list(APPEND OBJS $ $ $ $) +elseif(${APP} STREQUAL "UniPorton_test_log_interface") + add_subdirectory(${HOME_PATH}/testsuites/log-test tmp) + target_compile_options(rpmsg PUBLIC -DPOSIX_TESTCASE -DLOG_TESTCASE) + target_compile_options(config PUBLIC -DPOSIX_TESTCASE -DLOG_TESTCASE) + list(APPEND OBJS $ $ $ $) +elseif(${APP} STREQUAL "UniPorton_test_ir") + add_subdirectory(${HOME_PATH}/testsuites/kern-test tmp) + target_compile_options(rpmsg PUBLIC -DPOSIX_TESTCASE) + list(APPEND OBJS $ $ $ $) +else() + list(APPEND OBJS $ $ $) +endif() +add_executable(${APP} ${OBJS}) + +if(${CONFIG_LOSCFG_SHELL}) +set(LD_OPTS) +list(APPEND LD_OPTS + -uhelp_shellcmd + -umemInfo_shellcmd + -utaskInfo_shellcmd + -uuname_shellcmd + -uhwi_shellcmd + -ucpup_shellcmd + -usem_shellcmd + -uswtmr_shellcmd + -uqueue_shellcmd + -usysteminfo_shellcmd +) +target_link_options(${APP} PUBLIC ${LD_OPTS}) +endif() diff --git a/demos/sd3403/apps/CMakeLists.txt b/demos/sd3403/apps/CMakeLists.txt new file mode 100644 index 00000000..470f22ee --- /dev/null +++ b/demos/sd3403/apps/CMakeLists.txt @@ -0,0 +1 @@ +add_subdirectory(openamp) \ No newline at end of file diff --git a/demos/sd3403/apps/openamp/CMakeLists.txt b/demos/sd3403/apps/openamp/CMakeLists.txt new file mode 100644 index 00000000..e152cfd9 --- /dev/null +++ b/demos/sd3403/apps/openamp/CMakeLists.txt @@ -0,0 +1,2 @@ +set(SRC main.c) +add_library(rpmsg OBJECT ${SRC}) diff --git a/demos/sd3403/apps/openamp/main.c b/demos/sd3403/apps/openamp/main.c new file mode 100644 index 00000000..8e8af4d4 --- /dev/null +++ b/demos/sd3403/apps/openamp/main.c @@ -0,0 +1,486 @@ +#include +#include +#include +#include +#include "securec.h" +#include "prt_config.h" +#include "prt_config_internal.h" +#include "prt_hwi.h" +#include "prt_task.h" +#include "test.h" +#include "prt_timer.h" +#include "prt_queue.h" +#include "rpmsg_backend.h" +#ifdef LOSCFG_SHELL_MICA_INPUT +#include "shell.h" +#include "show.h" +#endif + +TskHandle g_testTskHandle[5]; +U8 g_memRegion00[OS_MEM_FSC_PT_SIZE]; +U32 g_swtmrId; +extern U32 PRT_Printf(const char *format, ...); + +#if defined(OS_OPTION_OPENAMP) +unsigned int is_tty_ready(void); +#endif + +#if defined(POSIX_TESTCASE) || defined(RHEALSTONE_TESTCASE) +void Init(uintptr_t param1, uintptr_t param2, uintptr_t param3, uintptr_t param4); +#endif + +#if defined(OS_OPTION_OPENAMP) +extern U32 RpmsgHwiInit(void); + +int TestOpenamp() +{ + int ret; + ret = rpmsg_service_init(); + if (ret) { + return ret; + } + return OS_OK; +} +#endif + +#ifdef LOSCFG_SHELL_MICA_INPUT +static int osShellCmdTstReg(int argc, const char **argv) +{ + printf("tstreg: get %d arguments\n", argc); + for(int i = 0; i < argc; i++) { + printf(" no %d arguments: %s\n", i + 1, argv[i]); + } + + return 0; +} + +void micaShellInit() +{ + int ret = OsShellInit(0); + ShellCB *shellCB = OsGetShellCB(); + if (ret != 0 || shellCB == NULL) { + PRT_Printf("shell init fail\n"); + return; + } + (VOID)memset_s(shellCB->shellBuf, SHOW_MAX_LEN, 0, SHOW_MAX_LEN); + ret = osCmdReg(CMD_TYPE_EX, "tstreg", XARGS, (CMD_CBK_FUNC)osShellCmdTstReg); + if (ret == 0) { + PRT_Printf("[INFO]: reg cmd 'tstreg' successed!\n"); + } else { + PRT_Printf("[INFO]: reg cmd 'tstreg' failed!\n"); + } +} +#endif + +static void QueueReadTest() +{ + U32 ret, queueId; + ret = PRT_QueueCreate(2, 16, &queueId); + if (ret != OS_OK) { + PRT_Printf("ReadTest, PRT_QueueCreate fail.\n"); + return; + } + + char buf[16]; + int len = sizeof(buf); + ret = PRT_QueueRead(queueId, buf, &len, OS_QUEUE_WAIT_FOREVER); + if (ret != OS_OK) { + PRT_Printf("ReadTest, PRT_QueueRead fail.\n"); + return; + } + + return; +} + +static void QueueWriteTest() +{ + U32 ret, queueId; + ret = PRT_QueueCreate(2, 16, &queueId); + if (ret != OS_OK) { + PRT_Printf("WriteTest, PRT_QueueCreate fail.\n"); + return; + } + + char buf[16] = {1}; + ret = PRT_QueueWrite(queueId, buf, 16, OS_QUEUE_WAIT_FOREVER, OS_QUEUE_NORMAL); + + if (ret != OS_OK) { + PRT_Printf("WriteTest, PRT_QueueWrite fail.\n"); + return; + } + + return; +} + +void Test2TaskEntry() +{ + QueueReadTest(); + while (1) { + PRT_Printf("Test2TaskEntry run!!! \n"); + PRT_TaskDelay(2000); + } +} + +void Test3TaskEntry() +{ + QueueWriteTest(); + while (1) { + PRT_Printf("Test3TaskEntry run!!! \n"); + PRT_TaskDelay(2000); + } +} + +U32 QueueTest() +{ + U32 ret; + U8 ptNo = OS_MEM_DEFAULT_FSC_PT; + struct TskInitParam param = {0}; + + // task 2 + param.stackAddr = (uintptr_t)PRT_MemAllocAlign(0, ptNo, 0x2000, MEM_ADDR_ALIGN_016); + param.taskEntry = (TskEntryFunc)Test2TaskEntry; + param.taskPrio = 30; + param.name = "Test2Task"; + param.stackSize = 0x2000; + + ret = PRT_TaskCreate(&g_testTskHandle[1], ¶m); + if (ret) { + return ret; + } + + ret = PRT_TaskResume(g_testTskHandle[1]); + if (ret) { + return ret; + } + + // task 3 + param.stackAddr = (uintptr_t)PRT_MemAllocAlign(0, ptNo, 0x2000, MEM_ADDR_ALIGN_016); + param.taskEntry = (TskEntryFunc)Test3TaskEntry; + param.taskPrio = 25; + param.name = "Test3Task"; + param.stackSize = 0x2000; + + ret = PRT_TaskCreate(&g_testTskHandle[2], ¶m); + if (ret) { + return ret; + } + + ret = PRT_TaskResume(g_testTskHandle[2]); + if (ret) { + return ret; + } + + return OS_OK; +} +void Test4TaskEntry() +{ + while (1) { + PRT_Printf("task 1 run.\n"); + PRT_TaskDelay(150); + } +} + +void Test5TaskEntry() +{ + while (1) { + PRT_Printf("task 2 run.\n"); + PRT_TaskDelay(100); + } +} + +U32 TaskTest() +{ + U32 ret; + U8 ptNo = OS_MEM_DEFAULT_FSC_PT; + struct TskInitParam param = {0}; + + // task 2 + param.stackAddr = (uintptr_t)PRT_MemAllocAlign(0, ptNo, 0x2000, MEM_ADDR_ALIGN_016); + param.taskEntry = (TskEntryFunc)Test4TaskEntry; + param.taskPrio = 20; + param.name = "Test2Task"; + param.stackSize = 0x2000; + + ret = PRT_TaskCreate(&g_testTskHandle[3], ¶m); + if (ret) { + return ret; + } + + ret = PRT_TaskResume(g_testTskHandle[3]); + if (ret) { + return ret; + } + + // task 3 + param.stackAddr = (uintptr_t)PRT_MemAllocAlign(0, ptNo, 0x2000, MEM_ADDR_ALIGN_016); + param.taskEntry = (TskEntryFunc)Test5TaskEntry; + param.taskPrio = 25; + param.name = "Test3Task"; + param.stackSize = 0x2000; + + ret = PRT_TaskCreate(&g_testTskHandle[4], ¶m); + if (ret) { + return ret; + } + + ret = PRT_TaskResume(g_testTskHandle[4]); + if (ret) { + return ret; + } + + return OS_OK; +} + +#if (SMP_TESTCASE) +void SlaveTaskEntry() +{ + PRT_Printf("slave 1.\n"); + static U32 temp1 = 0; + while (1) { + PRT_TaskDelay(500); + PRT_Printf("slave 1.\n"); + temp1++; + } +} + +void SlaveTaskEntry2() +{ + static U32 temp2 = 0; + while (1) { + PRT_Printf("slave 2.\n"); + PRT_TaskDelay(300); + temp2++; + } +} + +U32 SlaveTestInit(U32 slaveId) +{ + U32 ret; + U8 ptNo = OS_MEM_DEFAULT_FSC_PT; + struct TskInitParam param = {0}; + TskHandle testTskHandle[2]; + // task 1 + param.stackAddr = PRT_MemAllocAlign(0, ptNo, 0x2000, MEM_ADDR_ALIGN_016); + param.taskEntry = (TskEntryFunc)SlaveTaskEntry; + param.taskPrio = 25; + param.name = "SlaveTask"; + param.stackSize = 0x2000; + + ret = PRT_TaskCreate(&testTskHandle[0], ¶m); + if (ret) { + return ret; + } + + ret = PRT_TaskCoreBind(testTskHandle[0], 1 << (PRT_GetPrimaryCore() + slaveId)); + if (ret) { + return ret; + } + + ret = PRT_TaskResume(testTskHandle[0]); + if (ret) { + return ret; + } + + param.stackAddr = PRT_MemAllocAlign(0, ptNo, 0x2000, MEM_ADDR_ALIGN_016); + param.taskEntry = (TskEntryFunc)SlaveTaskEntry2; + param.taskPrio = 30; + param.name = "Test2Task"; + param.stackSize = 0x2000; + + ret = PRT_TaskCreate(&testTskHandle[1], ¶m); + if (ret) { + return ret; + } + + ret = PRT_TaskCoreBind(testTskHandle[1], 1 << (PRT_GetPrimaryCore() + slaveId)); + if (ret) { + return ret; + } + + ret = PRT_TaskResume(testTskHandle[1]); + if (ret) { + return ret; + } + + return OS_OK; +} +#endif + +void Test1TaskEntry() +{ +#if defined(OS_OPTION_OPENAMP) + TestOpenamp(); +#endif + +#ifdef LOSCFG_SHELL_MICA_INPUT + micaShellInit(); +#endif + +#if defined(OS_OPTION_OPENAMP) + while (!is_tty_ready()) { + PRT_TaskDelay(OS_TICK_PER_SECOND / 10); + } +#endif + +#if defined(POSIX_TESTCASE) || defined(RHEALSTONE_TESTCASE) + PRT_Printf("init testcase\n"); + Init(0, 0, 0, 0); +#endif + +#if defined(OS_OPTION_QUEUE) && defined(QUEUE_TESTCASE) + QueueTest(); +#endif +} + +U32 OsTestInit(void) +{ + U32 ret; + U8 ptNo = OS_MEM_DEFAULT_FSC_PT; + struct TskInitParam param = {0}; + + // task 1 + param.stackAddr = (uintptr_t)PRT_MemAllocAlign(0, ptNo, 0x2000, MEM_ADDR_ALIGN_016); + param.taskEntry = (TskEntryFunc)Test1TaskEntry; + param.taskPrio = 25; + param.name = "Test1Task"; + param.stackSize = 0x2000; + + ret = PRT_TaskCreate(&g_testTskHandle[0], ¶m); + if (ret) { + return ret; + } + + ret = PRT_TaskResume(g_testTskHandle[0]); + if (ret) { + return ret; + } + + return OS_OK; +} + +static void TimerTestCallback(TimerHandle tmrHandle, U32 arg1, U32 arg2, U32 arg3, U32 arg4) +{ + return; +} + +U32 TimerTestStart() +{ + U32 ret; + struct TimerCreatePara timer = {0}; + + timer.type = OS_TIMER_SOFTWARE; + timer.mode = OS_TIMER_LOOP; + timer.interval = 1000; + timer.timerGroupId = 0; + timer.callBackFunc = TimerTestCallback; + + ret = PRT_TimerCreate(&timer, &g_swtmrId); + if (ret != OS_OK) { + return OS_ERROR; + } + + ret = PRT_TimerStart(0, g_swtmrId); + if (ret != OS_OK) { + (void)PRT_TimerDelete(0, g_swtmrId); + return OS_ERROR; + } + + return OS_OK; +} + +U32 PRT_AppInit(void) +{ + U32 ret; + +#if defined(OS_OPTION_OPENAMP) + /* + * Linux will send an interrupt to Uniproton after initialising vdev. + * However, if Uniproton has not registered the corresponding IPI handler, + * it will throw an exception (call OsHwiDefaultHandler()). + * + * Therefore, even though we may not need to handle the interrupts sent by Linux + * until the rpmsg backend is initialised, we also need to register the IPI handler + * before irq_enable. + * We will register the actual interrupt handler when rpmsg is initialised. + */ + ret = RpmsgHwiInit(); + if (ret) { + return ret; + } +#endif +#if (SMP_TESTCASE) + ret =TaskTest(); + if (ret) { + return ret; + } +#endif + +#if (SMP_TESTCASE) + for (U32 slaveId = 1; slaveId < OS_SYS_CORE_RUN_NUM; slaveId++) { + ret = SlaveTestInit(slaveId); + if (ret) { + return ret; + } + } +#endif + + ret = OsTestInit(); + if (ret) { + return ret; + } + + ret = TestClkStart(); + if (ret) { + return ret; + } + + ret = TimerTestStart(); + if (ret) { + return ret; + } + + return OS_OK; +} + +U32 PRT_HardDrvInit(void) +{ + U32 ret; + + ret = OsHwiInit(); + if (ret) { + return ret; + } + + return OS_OK; +} + +void PRT_HardBootInit(void) +{ +} + +S32 main(void) +{ + PRT_Printf("[uniproton] start \n"); + return OsConfigStart(); +} + +extern void *__wrap_memset(void *dest, int set, U32 len) +{ + if (dest == NULL || len == 0) { + return NULL; + } + + char *ret = (char *)dest; + for (int i = 0; i < len; ++i) { + ret[i] = set; + } + return dest; +} + +extern void *__wrap_memcpy(void *dest, const void *src, size_t size) +{ + for (size_t i = 0; i < size; ++i) { + *(char *)(dest + i) = *(char *)(src + i); + } + return dest; +} diff --git a/demos/sd3403/apps/openamp/test.h b/demos/sd3403/apps/openamp/test.h new file mode 100644 index 00000000..0dd355af --- /dev/null +++ b/demos/sd3403/apps/openamp/test.h @@ -0,0 +1,8 @@ +#include "prt_config.h" +#include "prt_task.h" +#include "prt_hwi.h" +#include "prt_hook.h" +#include "prt_exc.h" +#include "prt_mem.h" + +extern U32 PRT_Printf(const char *format, ...); \ No newline at end of file diff --git a/demos/sd3403/bsp/CMakeLists.txt b/demos/sd3403/bsp/CMakeLists.txt new file mode 100644 index 00000000..459521a0 --- /dev/null +++ b/demos/sd3403/bsp/CMakeLists.txt @@ -0,0 +1,2 @@ +set(SRCS start.S cache_asm.S hwi_init.c print.c timer.c mmu.c print_openamp.c) +add_library(bsp OBJECT ${SRCS}) \ No newline at end of file diff --git a/demos/sd3403/bsp/cache_asm.S b/demos/sd3403/bsp/cache_asm.S new file mode 100644 index 00000000..98b1c72c --- /dev/null +++ b/demos/sd3403/bsp/cache_asm.S @@ -0,0 +1,101 @@ +.global os_asm_invalidate_dcache_all +.global os_asm_flush_dcache_all +.global os_asm_clean_dcache_all +.global os_asm_invalidate_icache_all +.global os_asm_invalidate_tlb_all + + .type os_asm_dcache_level, "function" +os_asm_dcache_level: + lsl x12, x0, #1 + msr csselr_el1, x12 + isb + mrs x6, ccsidr_el1 + and x2, x6, #7 + add x2, x2, #4 + mov x3, #0x3ff + and x3, x3, x6, lsr #3 + clz w5, w3 + mov x4, #0x7fff + and x4, x4, x6, lsr #13 + +loop_set: + mov x6, x3 +loop_way: + lsl x7, x6, x5 + orr x9, x12, x7 + lsl x7, x4, x2 + orr x9, x9, x7 + tbz w1, #1, 3f + dc csw, x9 + b 2f +3: tbz w1, #0, 1f + dc isw, x9 + b 2f +1: dc cisw, x9 +2: subs x6, x6, #1 + b.ge loop_way + subs x4, x4, #1 + b.ge loop_set + + ret + + .type os_asm_dcache_all, "function" +os_asm_dcache_all: + mov x1, x0 + dsb sy + mrs x10, clidr_el1 + lsr x11, x10, #24 + and x11, x11, #0x7 + cbz x11, finished + mov x15, x30 + mov x0, #0 + +loop_level: + lsl x12, x0, #1 + add x12, x12, x0 + lsr x12, x10, x12 + and x12, x12, #7 + cmp x12, #2 + b.lt skip + bl os_asm_dcache_level +skip: + add x0, x0, #1 + cmp x11, x0 + b.gt loop_level + + mov x0, #0 + msr csselr_el1, x0 + dsb sy + isb + mov x30, x15 + +finished: + ret + + .type os_asm_invalidate_dcache_all, "function" +os_asm_invalidate_dcache_all: + mov x0, #0x1 + b os_asm_dcache_all + + .type os_asm_flush_dcache_all, "function" +os_asm_flush_dcache_all: + mov x0, #0x0 + b os_asm_dcache_all + + .type os_asm_clean_dcache_all, "function" +os_asm_clean_dcache_all: + mov x0, #0x2 + b os_asm_dcache_all + + .type os_asm_invalidate_icache_all, "function" +os_asm_invalidate_icache_all: + ic ialluis + isb sy + ret + + .type os_asm_invalidate_tlb_all, "function" +os_asm_invalidate_tlb_all: + tlbi vmalle1 + dsb sy + isb + ret diff --git a/demos/sd3403/bsp/cache_asm.h b/demos/sd3403/bsp/cache_asm.h new file mode 100644 index 00000000..df448083 --- /dev/null +++ b/demos/sd3403/bsp/cache_asm.h @@ -0,0 +1,12 @@ +#ifndef __CACHE_H__ +#define __CACHE_H__ + +#include "prt_buildef.h" +#include "prt_typedef.h" +#include "prt_module.h" +#include "prt_errno.h" + +extern void os_asm_invalidate_dcache_all(void); +extern void os_asm_invalidate_icache_all(void); +extern void os_asm_invalidate_tlb_all(void); +#endif \ No newline at end of file diff --git a/demos/sd3403/bsp/hwi_init.c b/demos/sd3403/bsp/hwi_init.c new file mode 100644 index 00000000..4dca87f7 --- /dev/null +++ b/demos/sd3403/bsp/hwi_init.c @@ -0,0 +1,329 @@ +#include "securec.h" +#include "prt_tick.h" +#include "prt_hwi.h" +#include "prt_sys.h" +#include "prt_task.h" +#include "cpu_config.h" +#include "prt_gic_external.h" +#if defined(OS_OPTION_SMP) +#include "prt_module_external.h" +#endif +#include "prt_config.h" + +enum SicGroupType { + SIC_GROUP_G0S = 0, + SIC_GROUP_G1NS = 1, + SIC_GROUP_G1S = 2, + SIC_GROUP_BUTT, +}; + +union SicrWaker { + struct { + U32 res0 : 1; + U32 sleepReq : 1; + U32 isSleep : 1; + U32 res1 : 29; + } bits; + U32 value; +}; + +union SicrCtrl { + struct { + U32 enLpis : 1; + U32 res2 : 2; + U32 rwp : 1; + U32 res1 : 20; + U32 dpg0 : 1; + U32 dpg1ns : 1; + U32 dpg1s : 1; + U32 res0 : 4; + U32 uwp : 1; + } bits; + U32 value; +}; + +union HwiIccSreElx { + struct { + U64 prt : 1; + U64 dfb : 1; + U64 dib : 1; + U64 enable : 1; + U64 res : 60; + } bits; + U64 value; +}; + +union SicdCtrl { + struct { + U32 enG0S : 1; + U32 enG1Ns : 1; + U32 enG1S : 1; + U32 res1 : 1; + U32 areS : 1; + U32 areNs : 1; + U32 ds : 1; + U32 res0 : 24; + U32 rwp : 1; + } bits; + U32 value; +}; + +extern void OsGicdWaitCfgWork(); + +void OsSicrInit(void) +{ + union SicrWaker sicrWaker; + uintptr_t regAddr; + + regAddr = GICR_WAKER_ADDR + OsGetCoreID() * SICR_ADDR_OFFSET_PER_CORE; + sicrWaker.value = GIC_REG_READ(regAddr); + + sicrWaker.bits.sleepReq = 0; + + GIC_REG_WRITE(regAddr, sicrWaker.value); + sicrWaker.value = GIC_REG_READ(regAddr); + + while (sicrWaker.bits.isSleep == 1) { + sicrWaker.value = GIC_REG_READ(regAddr); + } +} + +void OsSicrSetIntGroup(U32 coreId, U64 intId, enum SicGroupType groupId) +{ + uintptr_t group0RegAddr; + uintptr_t modRegAddr; + U32 group0RegTmp; + U32 modRegTmp; + + group0RegAddr = GICR_IGROUPR0_ADDR + OsGetCoreID() * SICR_ADDR_OFFSET_PER_CORE; + group0RegTmp = GIC_REG_READ(group0RegAddr); + + if ((groupId == SIC_GROUP_G0S) || (groupId == SIC_GROUP_G1S)) { + group0RegTmp &= ~(0x1U << intId); + } else { + group0RegTmp |= (0x1U << intId); + } + + GIC_REG_WRITE(group0RegAddr, group0RegTmp); + + modRegAddr = GICR_IGRPMODR0_ADDR + OsGetCoreID() * SICR_ADDR_OFFSET_PER_CORE; + modRegTmp = GIC_REG_READ(modRegAddr); + + if (groupId == SIC_GROUP_G1S) { + modRegTmp |= (0x1U << intId); + } else { + modRegTmp &= ~(0x1U << intId); + } + + GIC_REG_WRITE(modRegAddr, modRegTmp); +} + +U32 OsSiccEnableSre(void) +{ + volatile union HwiIccSreElx iccSre; + + OS_EMBED_ASM("MRS %0, " REG_ALIAS(ICC_SRE_EL1) " \n" : "=&r"(iccSre)); + iccSre.bits.prt = 1; + iccSre.bits.dfb = 1; + iccSre.bits.dib = 1; + OS_EMBED_ASM("MSR " REG_ALIAS(ICC_SRE_EL1) ", %0 \n" : : "r"(iccSre)); + OS_EMBED_ASM("DSB SY"); + OS_EMBED_ASM("ISB"); + + OS_EMBED_ASM("MRS %0, " REG_ALIAS(ICC_SRE_EL1) " \n" : "=&r"(iccSre.value)); + + if (iccSre.bits.prt != 1) { + return OS_FAIL; + } + + return OS_OK; +} + +void OsSiccCfgIntPreempt(void) +{ + U64 tmp = 0; + + OS_EMBED_ASM("MRS %0, " REG_ALIAS(ICC_BPR1_EL1) " \n" : "=&r"(tmp) : : "memory"); + tmp &= ~(GROUP_MAX_BPR); + tmp |= GROUP1_BP; + OS_EMBED_ASM("MSR " REG_ALIAS(ICC_BPR1_EL1) ", %0 \n" : : "r"(tmp) : "memory"); +} + +void OsSiccEnableGroup1(void) +{ + U64 tmp = 0; + + OS_EMBED_ASM("MRS %0, " REG_ALIAS(ICC_IGRPEN1_EL1) " \n" : "=&r"(tmp) : : "memory"); + tmp |= 0x01U; + OS_EMBED_ASM("MSR " REG_ALIAS(ICC_IGRPEN1_EL1) ", %0 \n" : : "r"(tmp) : "memory"); +} + +void OsSiccCfgPriorityMask(void) +{ + U64 tmp = 0; + + OS_EMBED_ASM("MRS %0, " REG_ALIAS(ICC_PMR_EL1) " \n" : "=&r"(tmp) : : "memory"); + tmp |= PRIO_MASK_LEVEL; + OS_EMBED_ASM("MSR " REG_ALIAS(ICC_PMR_EL1) ", %0 \n" : : "r"(tmp) : "memory"); +} + +U32 OsSiccInit(void) +{ + U32 ret; + + ret = OsSiccEnableSre(); + if (ret != OS_OK) { + return ret; + } + + OsSiccCfgIntPreempt(); + + OsSiccEnableGroup1(); + + OsSiccCfgPriorityMask(); + + return OS_OK; +} + +void OsSicdSetIntGroup(U32 intId, enum SicGroupType groupId) +{ + U64 group0RegAddr; + U64 modRegAddr; + U32 group0RegTmp; + U32 modRegTmp; + U32 sicdM; + U32 bitOffset; + + sicdM = (intId - MIN_GIC_SPI_NUM) / SICD_IGROUP_INT_NUM; + group0RegAddr = GICD_IGROUPN_ADDR + (SICD_REG_SIZE * sicdM); + modRegAddr = GICD_IGRPMODRN_ADDR + (SICD_REG_SIZE * sicdM); + bitOffset = (intId - MIN_GIC_SPI_NUM) % SICD_IGROUP_INT_NUM; + + group0RegTmp = GIC_REG_READ(group0RegAddr); + if ((groupId == SIC_GROUP_G0S) || (groupId == SIC_GROUP_G1S)) { + group0RegTmp &= ~(0x1U << bitOffset); + } else { + group0RegTmp |= (0x1U << bitOffset); + } + GIC_REG_WRITE(group0RegAddr, group0RegTmp); + + modRegTmp = GIC_REG_READ(modRegAddr); + if (groupId == SIC_GROUP_G1S) { + modRegTmp |= (0x1U << bitOffset); + } else { + modRegTmp &= ~(0x1U << bitOffset); + } + GIC_REG_WRITE(modRegAddr, modRegTmp); +} + +void OsSicSetGroup(U32 intId, enum SicGroupType groupId) +{ + U32 coreId = OsGetCoreID(); + enum GicIntState state; + + if (intId < MIN_GIC_SPI_NUM) { + state = OsGicrGetIntState(coreId, intId); + OsGicrDisableInt(coreId, intId); + OsSicrSetIntGroup(coreId, intId, groupId); + if (state == GIC_ENABLE) { + OsGicrEnableInt(coreId, intId); + } + } else { + state = OsGicdGetIntState(intId); + OsGicdDisableInt(intId); + OsSicdSetIntGroup(intId, groupId); + if (state == GIC_ENABLE) { + OsGicdEnableInt(intId); + } + } +} + +U32 OsSicInitLocal(void) +{ + U32 ret; + U32 intId; + U32 coreID = PRT_GetCoreID(); + + OsSicrInit(); + + ret = OsSiccInit(); + if (ret != OS_OK) { + return ret; + } + + for (intId = 0; intId < MIN_GIC_SPI_NUM; ++intId) { + OsSicSetGroup(intId, SIC_GROUP_G1NS); + } + + if (coreID == OS_SYS_CORE_PRIMARY) { + for (coreID = OS_SYS_CORE_PRIMARY; coreID < OS_SYS_CORE_PRIMARY + OS_SYS_CORE_RUN_NUM; coreID++) { + /* 清除SGI和PPI的disable，pending，active */ + for (intId = 0; intId < MIN_GIC_SPI_NUM; ++intId) { + OsGicrDisableInt(coreID, intId); + } + + for (intId = 0; intId < MIN_GIC_SPI_NUM; ++intId) { + OsGicrClearPendingBit(coreID, intId); + } + + for (intId = 0; intId < MIN_GIC_SPI_NUM; ++intId) { + OsGicrClearActiveBit(coreID, intId); + } + } + } + + return OS_OK; +} + +void OsSicdInit(void) +{ + union SicdCtrl sicdCtrl; + + sicdCtrl.value = GIC_REG_READ(GICD_CTLR_S_ADDR); + + if ((sicdCtrl.bits.enG0S == 1) || (sicdCtrl.bits.enG1Ns == 1) || (sicdCtrl.bits.enG1S == 1)) { + return; + } + + sicdCtrl.bits.ds = 0; // 0表示支持两种安全状态 + sicdCtrl.bits.areNs = 1; + sicdCtrl.bits.areS = 1; + sicdCtrl.bits.enG1Ns = 1; + GIC_REG_WRITE(GICD_CTLR_S_ADDR, sicdCtrl.value); + + OsGicdWaitCfgWork(); +} + +void OsSicInitGlobal(void) +{ + U32 intId; + + OsSicdInit(); + + for (intId = MIN_GIC_SPI_NUM; intId < MAX_INT_NUM; ++intId) { + OsSicSetGroup(intId, SIC_GROUP_G1NS); + } +} +INIT_SEC_L4_TEXT U32 OsGicInitSecondary(void) { + OsSicInitLocal(); + return OS_OK; +} + +U32 OsHwiInit(void) +{ + U32 ret; + + ret = OsSicInitLocal(); + if (ret != OS_OK) { + return ret; + } + +#if defined(OS_OPTION_SMP) + OsHwiSetSecondaryInitHook(OsGicInitSecondary); +#endif + + if (OsGetCoreID() == 0) { + OsSicInitGlobal(); + } + return OS_OK; +} \ No newline at end of file diff --git a/demos/sd3403/bsp/hwi_init.h b/demos/sd3403/bsp/hwi_init.h new file mode 100644 index 00000000..d2b921ba --- /dev/null +++ b/demos/sd3403/bsp/hwi_init.h @@ -0,0 +1,6 @@ +#ifndef __HWI_INIT_H__ +#define __HWI_INIT_H__ + +U32 OsHwiInit(void); + +#endif \ No newline at end of file diff --git a/demos/sd3403/bsp/mmu.c b/demos/sd3403/bsp/mmu.c new file mode 100644 index 00000000..57a5ea69 --- /dev/null +++ b/demos/sd3403/bsp/mmu.c @@ -0,0 +1,350 @@ +#include "prt_buildef.h" +#include "prt_typedef.h" +#include "prt_module.h" +#include "prt_errno.h" +#include "mmu.h" +#include "cache_asm.h" +#include "prt_sys.h" +#include "prt_task.h" +#include "prt_log.h" +#include "cpu_config.h" + +extern U64 g_mmu_page_begin; +extern U64 g_mmu_page_end; +extern U32 g_cfgPrimaryCore; + +static mmu_mmap_region_s g_mem_map_info[] = { + { + .virt = MMU_OPENAMP_ADDR, + .phys = MMU_OPENAMP_ADDR, + .size = OPENAMP_SHM_SIZE, + .max_level = 0x2, + .attrs = MMU_ATTR_DEVICE_NGNRNE | MMU_ACCESS_RWX, + }, { + .virt = MMU_IMAGE_ADDR, + .phys = MMU_IMAGE_ADDR, + .size = 0x1000000, + .max_level = 0x2, + .attrs = MMU_ATTR_CACHE_SHARE | MMU_ACCESS_RWX, + }, { + .virt = MMU_GIC_ADDR, + .phys = MMU_GIC_ADDR, + .size = 0x1000000, + .max_level = 0x2, + .attrs = MMU_ATTR_DEVICE_NGNRNE | MMU_ACCESS_RWX, + }, { + .virt = MMU_UART_ADDR, + .phys = MMU_UART_ADDR, + .size = 0x2000, + .max_level = 0x2, + .attrs = MMU_ATTR_DEVICE_NGNRNE | MMU_ACCESS_RWX, + }, { + .virt = MMU_LOG_MEM_ADDR, + .phys = MMU_LOG_MEM_ADDR, + .size = SHM_MAP_SIZE, + .max_level = 0x2, + .attrs = MMU_ATTR_DEVICE_NGNRNE | MMU_ACCESS_RWX, + } +}; + +static mmu_ctrl_s g_mmu_ctrl = { 0 }; + +static U64 mmu_get_tcr(U32 *pips, U32 *pva_bits) +{ + U64 max_addr = 0; + U64 ips, va_bits; + U64 tcr; + U32 i; + U32 mmu_table_num = sizeof(g_mem_map_info) / sizeof(mmu_mmap_region_s); + + for (i = 0; i < mmu_table_num; ++i) { + max_addr = MAX(max_addr, g_mem_map_info[i].virt + g_mem_map_info[i].size); + } + + if (max_addr > (1ULL << MMU_BITS_44)) { + ips = MMU_PHY_ADDR_LEVEL_5; + va_bits = MMU_BITS_48; + } else if (max_addr > (1ULL << MMU_BITS_42)) { + ips = MMU_PHY_ADDR_LEVEL_4; + va_bits = MMU_BITS_44; + } else if (max_addr > (1ULL << MMU_BITS_40)) { + ips = MMU_PHY_ADDR_LEVEL_3; + va_bits = MMU_BITS_42; + } else if (max_addr > (1ULL << MMU_BITS_36)) { + ips = MMU_PHY_ADDR_LEVEL_2; + va_bits = MMU_BITS_40; + } else if (max_addr > (1ULL << MMU_BITS_32)) { + ips = MMU_PHY_ADDR_LEVEL_1; + va_bits = MMU_BITS_36; + } else { + ips = MMU_PHY_ADDR_LEVEL_0; + va_bits = MMU_BITS_32; + } + + tcr = TCR_EL1_RSVD | TCR_IPS(ips); + + if (g_mmu_ctrl.granule == MMU_GRANULE_4K) { + tcr |= TCR_TG0_4K | TCR_SHARED_INNER | TCR_ORGN_WBWA | TCR_IRGN_WBWA; + } else { + tcr |= TCR_TG0_64K | TCR_SHARED_INNER | TCR_ORGN_WBWA | TCR_IRGN_WBWA; + } + + tcr |= TCR_T0SZ(va_bits); + + if (pips != NULL) { + *pips = ips; + } + + if (pva_bits != NULL) { + *pva_bits = va_bits; + } + + return tcr; +} + +static U32 mmu_get_pte_type(U64 const *pte) +{ + return (U32)(*pte & PTE_TYPE_MASK); +} + +static U32 mmu_level2shift(U32 level) +{ + if (g_mmu_ctrl.granule == MMU_GRANULE_4K) { + return (U32)(MMU_BITS_12 + MMU_BITS_9 * (MMU_LEVEL_3 - level)); + } else { + return (U32)(MMU_BITS_16 + MMU_BITS_13 * (MMU_LEVEL_3 - level)); + } +} + +static U64 *mmu_find_pte(U64 addr, U32 level) +{ + U64 *pte = NULL; + U64 idx; + U32 i; + + if (level < g_mmu_ctrl.start_level) { + return NULL; + } + + pte = (U64 *)g_mmu_ctrl.tlb_addr; + + for (i = g_mmu_ctrl.start_level; i < MMU_LEVEL_MAX; ++i) { + if (g_mmu_ctrl.granule == MMU_GRANULE_4K) { + idx = (addr >> mmu_level2shift(i)) & 0x1FF; + } else { + idx = (addr >> mmu_level2shift(i)) & 0x1FFF; + } + + pte += idx; + + if (i == level) { + return pte; + } + + if (mmu_get_pte_type(pte) != PTE_TYPE_TABLE) { + return NULL; + } + + if (g_mmu_ctrl.granule == MMU_GRANULE_4K) { + pte = (U64 *)(*pte & PTE_TABLE_ADDR_MARK_4K); + } else { + pte = (U64 *)(*pte & PTE_TABLE_ADDR_MARK_64K); + } + } + + return NULL; +} + +static U64 *mmu_create_table(void) +{ + U32 pt_len; + U64 *new_table = (U64 *)g_mmu_ctrl.tlb_fillptr; + + if (g_mmu_ctrl.granule == MMU_GRANULE_4K) { + pt_len = MAX_PTE_ENTRIES_4K * sizeof(U64); + } else { + pt_len = MAX_PTE_ENTRIES_64K * sizeof(U64); + } + + g_mmu_ctrl.tlb_fillptr += pt_len; + + if (g_mmu_ctrl.tlb_fillptr - g_mmu_ctrl.tlb_addr > g_mmu_ctrl.tlb_size) { + return NULL; + } + + (void)memset_s((void *)new_table, MAX_PTE_ENTRIES_64K * sizeof(U64), 0, pt_len); + + return new_table; +} + +static void mmu_set_pte_table(U64 *pte, U64 *table) +{ + *pte = PTE_TYPE_TABLE | (U64)table; +} + +static S32 mmu_add_map_pte_process(mmu_mmap_region_s const *map, U64 *pte, U64 phys, U32 level) +{ + U64 *new_table = NULL; + + if (level < map->max_level) { + if (mmu_get_pte_type(pte) == PTE_TYPE_FAULT) { + new_table = mmu_create_table(); + if (new_table == NULL) { + return -1; + } + mmu_set_pte_table(pte, new_table); + } + } else if (level == MMU_LEVEL_3) { + *pte = phys | map->attrs | PTE_TYPE_PAGE; + } else { + *pte = phys | map->attrs | PTE_TYPE_BLOCK; + } + + return 0; +} + +static S32 mmu_add_map(mmu_mmap_region_s const *map) +{ + U64 virt = map->virt; + U64 phys = map->phys; + U64 max_level = map->max_level; + U64 start_level = g_mmu_ctrl.start_level; + U64 block_size = 0; + U64 map_size = 0; + U32 level; + U64 *pte = NULL; + S32 ret; + + if (map->max_level <= start_level) { + return -2; + } + + while (map_size < map->size) { + for (level = start_level; level <= max_level; ++level) { + pte = mmu_find_pte(virt, level); + if (pte == NULL) { + return -3; + } + + ret = mmu_add_map_pte_process(map, pte, phys, level); + if (ret) { + return ret; + } + + if (level != start_level) { + block_size = 1ULL << mmu_level2shift(level); + } + } + + virt += block_size; + phys += block_size; + map_size += block_size; + } + + return 0; +} + +static inline void mmu_set_ttbr_tcr_mair(U64 table, U64 tcr, U64 attr) +{ + OS_EMBED_ASM("dsb sy"); + + OS_EMBED_ASM("msr ttbr0_el1, %0" : : "r" (table) : "memory"); + OS_EMBED_ASM("msr ttbr1_el1, %0" : : "r" (table) : "memory"); + OS_EMBED_ASM("msr tcr_el1, %0" : : "r" (tcr) : "memory"); + OS_EMBED_ASM("msr mair_el1, %0" : : "r" (attr) : "memory"); + + OS_EMBED_ASM("isb"); +} + +static U32 mmu_setup_pgtables(mmu_mmap_region_s *mem_map, U32 mem_region_num, U64 tlb_addr, U64 tlb_len, U32 granule) +{ + U32 i; + U32 ret; + U64 tcr; + U64 *new_table = NULL; + + g_mmu_ctrl.tlb_addr = tlb_addr; + g_mmu_ctrl.tlb_size = tlb_len; + g_mmu_ctrl.tlb_fillptr = tlb_addr; + g_mmu_ctrl.granule = granule; + g_mmu_ctrl.start_level = 0; + + tcr = mmu_get_tcr(NULL, &g_mmu_ctrl.va_bits); + + if (g_mmu_ctrl.granule == MMU_GRANULE_4K) { + if (g_mmu_ctrl.va_bits < MMU_BITS_39) { + g_mmu_ctrl.start_level = MMU_LEVEL_1; + } else { + g_mmu_ctrl.start_level = MMU_LEVEL_0; + } + } else { + if (g_mmu_ctrl.va_bits <= MMU_BITS_36) { + g_mmu_ctrl.start_level = MMU_LEVEL_2; + } else { + g_mmu_ctrl.start_level = MMU_LEVEL_1; + return 3; + } + } + + new_table = mmu_create_table(); + if (new_table == NULL) { + return 1; + } + + for (i = 0; i < mem_region_num; ++i) { + ret = mmu_add_map(&mem_map[i]); + if (ret) { + return ret; + } + } + + mmu_set_ttbr_tcr_mair(g_mmu_ctrl.tlb_addr, tcr, MEMORY_ATTRIBUTES); + + return 0; +} + +static S32 mmu_setup(void) +{ + S32 ret; + U64 page_addr; + U64 page_len; + + page_addr = (U64)&g_mmu_page_begin; + page_len = (U64)&g_mmu_page_end - (U64)&g_mmu_page_begin; + +#if defined(OS_OPTION_SMP) + if (OsGetCoreID() == g_cfgPrimaryCore) { + ret = mmu_setup_pgtables(g_mem_map_info, (sizeof(g_mem_map_info) / sizeof(mmu_mmap_region_s)), + page_addr, page_len, MMU_GRANULE_4K); + if (ret) { + return ret; + } + } +#else + ret = mmu_setup_pgtables(g_mem_map_info, (sizeof(g_mem_map_info) / sizeof(mmu_mmap_region_s)), + page_addr, page_len, MMU_GRANULE_4K); + if (ret) { + return ret; + } +#endif + + return 0; +} + +S32 mmu_init(void) +{ + S32 ret; + + ret = mmu_setup(); + if (ret) { + return ret; + } + + os_asm_invalidate_dcache_all(); + os_asm_invalidate_icache_all(); + os_asm_invalidate_tlb_all(); + + set_sctlr(get_sctlr() | CR_C | CR_M | CR_I); + + return 0; +} diff --git a/demos/sd3403/bsp/mmu.h b/demos/sd3403/bsp/mmu.h new file mode 100644 index 00000000..3917bcb4 --- /dev/null +++ b/demos/sd3403/bsp/mmu.h @@ -0,0 +1,206 @@ +#ifndef __MMU_H__ +#define __MMU_H__ + +#include "prt_typedef.h" + +#define CACHE_POS 0x2 +#define CACHE_ENABLE 0x4 +#define CACHE_MASK 0x7 + +#define MT_DEVICE_NGNRNE 0 +#define MT_DEVICE_NGNRE 1 +#define MT_DEVICE_GRE 2 +#define MT_NORMAL_NC 3 +#define MT_NORMAL 4 + +#define MEMORY_ATTRIBUTES ((0x00 << (MT_DEVICE_NGNRNE * 8)) | \ + (0x04 << (MT_DEVICE_NGNRE * 8)) | \ + (0x0c << (MT_DEVICE_GRE * 8)) | \ + (0x44 << (MT_NORMAL_NC * 8)) | \ + (0xffUL << (MT_NORMAL * 8))) + +#define PTE_TYPE_FAULT (0 << 0) +#define PTE_TYPE_BLOCK (1 << 0) +#define PTE_TYPE_VALID (1 << 0) +#define PTE_TYPE_MASK (3 << 0) +#define PTE_TYPE_PAGE (3 << 0) +#define PTE_TYPE_TABLE (3 << 0) + +#define PTE_TABLE_PXN (1UL << 59) +#define PTE_TABLE_XN (1UL << 60) +#define PTE_TABLE_AP (1UL << 61) +#define PTE_TABLE_NS (1UL << 63) + +#define PTE_BLOCK_MEMTYPE(x) ((x) << 2) +#define PTE_BLOCK_NS (1 << 5) +#define PTE_BLOCK_AP_R (2 << 6) +#define PTE_BLOCK_AP_RW (0 << 6) +#define PTE_BLOCK_NON_SHARE (0 << 8) +#define PTE_BLOCK_OUTER_SHARE (2 << 8) +#define PTE_BLOCK_INNER_SHARE (3 << 8) +#define PTE_BLOCK_AF (1 << 10) +#define PTE_BLOCK_NG (1 << 11) +#define PTE_BLOCK_PXN (1UL << 53) +#define PTE_BLOCK_UXN (1UL << 54) + +#define PMD_ATTRINDX(t) ((t) << 2) +#define PMD_ATTRINDX_MASK (7 << 2) +#define PMD_ATTRMASK (PTE_BLOCK_PXN | \ + PTE_BLOCK_UXN | \ + PMD_ATTRINDX_MASK | \ + PTE_TYPE_VALID) + +#define TCR_IPS(x) ((x) << 32) +#define TCR_T0SZ(x) ((64 - (x)) << 0) +#define TCR_IRGN_NC (0 << 8) +#define TCR_IRGN_WBWA (1 << 8) +#define TCR_IRGN_WT (2 << 8) +#define TCR_IRGN_WBNWA (3 << 8) +#define TCR_IRGN_MASK (3 << 8) +#define TCR_ORGN_NC (0 << 10) +#define TCR_ORGN_WBWA (1 << 10) +#define TCR_ORGN_WT (2 << 10) +#define TCR_ORGN_WBNWA (3 << 10) +#define TCR_ORGN_MASK (3 << 10) +#define TCR_SHARED_NON (0 << 12) +#define TCR_SHARED_OUTER (2 << 12) +#define TCR_SHARED_INNER (3 << 12) +#define TCR_TG0_4K (0 << 14) +#define TCR_TG0_64K (1 << 14) +#define TCR_TG0_16K (2 << 14) +#define TCR_EPD1_DISABLE (1 << 23) + +#define TCR_EL1_RSVD (1UL << 31) +#define TCR_EL2_RSVD (1UL << 31 | 1UL << 23) +#define TCR_EL3_RSVD (1UL << 31 | 1UL << 23) + +#define MAX_PTE_ENTRIES_4K 512 +#define MAX_PTE_ENTRIES_64K 8192 + +#define PTE_TABLE_ADDR_MARK_4K 0x0000FFFFFFFFF000ULL +#define PTE_TABLE_ADDR_MARK_64K 0x0000FFFFFFFF0000ULL + + +#define MMU_ATTR_DEVICE_NGNRNE (PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE)) +#define MMU_ATTR_DEVICE (PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE)) +#define MMU_ATTR_UNCACHE_UNSHARE (PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) | PTE_BLOCK_NON_SHARE) +#define MMU_ATTR_UNCACHE_SHARE (PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) | PTE_BLOCK_INNER_SHARE) +#define MMU_ATTR_CACHE_UNSHARE (PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE) +#define MMU_ATTR_CACHE_SHARE (PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE) +#define MMU_ATTR_MASK 0X31CULL + +#define MMU_ACCESS_NONE (PTE_BLOCK_AP_RW) +#define MMU_ACCESS_R (PTE_BLOCK_AF | PTE_BLOCK_UXN | PTE_BLOCK_PXN | PTE_BLOCK_AP_R) +#define MMU_ACCESS_RW (PTE_BLOCK_AF | PTE_BLOCK_UXN | PTE_BLOCK_PXN | PTE_BLOCK_AP_RW) +#define MMU_ACCESS_RWX (PTE_BLOCK_AF | PTE_BLOCK_AP_RW) +#define MMU_ACCESS_RX (PTE_BLOCK_AF | PTE_BLOCK_AP_R) +#define MMU_ACCESS_MASK 0X600000000004C0ULL + +#define MMU_GRANULE_4K 0 +#define MMU_GRANULE_64K 1 + +#define MAX(a, b) (((a) > (b)) ? (a) : (b)) +#define MIN(a, b) (((a) < (b)) ? (a) : (b)) + +#define CR_M (1 << 0) +#define CR_A (1 << 1) +#define CR_C (1 << 2) +#define CR_SA (1 << 3) +#define CR_I (1 << 12) +#define CR_WXN (1 << 19) +#define CR_EE (1 << 25) + +#define SPSR_EL_END_LE (0 << 9) +#define SPSR_EL_DEBUG_MASK (1 << 9) +#define SPSR_EL_ASYN_MASK (1 << 8) +#define SPSR_EL_SERR_MASK (1 << 8) +#define SPSR_EL_IRQ_MASK (1 << 7) +#define SPSR_EL_FIQ_MASK (1 << 6) +#define SPSR_EL_T_A32 (0 << 5) +#define SPSR_EL_M_AARCH64 (0 << 4) +#define SPSR_EL_M_AARCH32 (1 << 4) +#define SPSR_EL_M_SVC (0x3) +#define SPSR_EL_M_HYP (0xa) +#define SPSR_EL_M_EL1H (5) +#define SPSR_EL_M_EL2H (9) + +#define CPUECTLR_EL1_L1PCTL_MASK (7 << 13) +#define CPUECTLR_EL1_L3PCTL_MASK (7 << 10) + +typedef enum { + MMU_LEVEL_0 = 0, + MMU_LEVEL_1, + MMU_LEVEL_2, + MMU_LEVEL_3, + MMU_LEVEL_MAX +} mmu_level_e; + +typedef enum { + MMU_PHY_ADDR_LEVEL_0 = 0, + MMU_PHY_ADDR_LEVEL_1, + MMU_PHY_ADDR_LEVEL_2, + MMU_PHY_ADDR_LEVEL_3, + MMU_PHY_ADDR_LEVEL_4, + MMU_PHY_ADDR_LEVEL_5 +} mmu_physical_addr_size_e; + +typedef enum { + MMU_BITS_9 = 9, + MMU_BITS_12 = 12, + MMU_BITS_13 = 13, + MMU_BITS_16 = 16, + MMU_BITS_32 = 32, + MMU_BITS_36 = 36, + MMU_BITS_39 = 39, + MMU_BITS_40 = 40, + MMU_BITS_42 = 42, + MMU_BITS_44 = 44, + MMU_BITS_48 = 48, +} mmu_bits_e; + +typedef struct { + U64 tlb_addr; + U64 tlb_size; + U64 tlb_fillptr; + U32 granule; + U32 start_level; + U32 va_bits; +} mmu_ctrl_s; + +typedef struct { + U64 virt; + U64 phys; + U64 size; + U64 max_level; + U64 attrs; +} mmu_mmap_region_s; + +static inline unsigned long get_sctlr(void) +{ + unsigned long val; + + __asm__ __volatile__("mrs %0, sctlr_el1" : "=r" (val) : : "cc"); + + return val; +} + +static inline unsigned long get_cpuectr(void) +{ + unsigned long val; + + __asm__ __volatile__("mrs %0, S3_1_C15_C2_1" : "=r" (val) : : "cc"); + + return val; +} + +static inline void set_sctlr(unsigned long val) +{ + __asm__ __volatile__("dsb sy"); + __asm__ __volatile__("msr sctlr_el1, %0" : : "r" (val) : "cc"); + __asm__ __volatile__("dsb sy"); + __asm__ __volatile__("isb"); +} + +extern S32 mmu_init(void); + +#endif diff --git a/demos/sd3403/bsp/pl011.h b/demos/sd3403/bsp/pl011.h new file mode 100644 index 00000000..660e9bd1 --- /dev/null +++ b/demos/sd3403/bsp/pl011.h @@ -0,0 +1,40 @@ +#ifndef PL011_H +#define PL011_H + +#include "prt_typedef.h" + +#define UART_DR 0x00 +#define UART_FR 0x18 +#define UART_ILPR 0x20 +#define UART_IBRD 0x24 +#define UART_FBRD 0x28 +#define UART_LCR_H 0x2C +#define UART_CR 0x30 +#define UART_IFLS 0x34 +#define UART_IMSC 0x38 +#define UART_MIS 0x40 +#define UART_ICR 0x44 + +#define UART_CR_RX_EN (0x01 << 9) +#define UART_CR_TX_EN (0x01 << 8) +#define UART_CR_EN (0x01 << 0) +#define UART_LCR_H_FIFO_EN (0x01 << 4) +#define UART_LCR_H_8_BIT (0x03 << 5) +#define UART_INT_HALF (0x02 << 3) +#define UART_RXRIS (0x01 << 4) +#define UART_RTRIS (0x01 << 6) + +#define UART_TXFF 0x20 +#define UART_RXFE 0x10 + +#define PL011_CLK_DIV 16U +#define PL011_NUM_8 8U +#define CONSOLE_UART_BAUDRATE 115200U + +#define UART_REG(x) (*(volatile U32 *)(UART_BASE_ADDR + (x))) +#define UART_QUEUE_SIZE 1024 + +U32 UartGetChar(unsigned char *ch, U32 timeout); +void UartPutChar(unsigned char ch); +U32 PRT_UartInterruptInit(void); +#endif diff --git a/demos/sd3403/bsp/print.c b/demos/sd3403/bsp/print.c new file mode 100644 index 00000000..6b6d0a06 --- /dev/null +++ b/demos/sd3403/bsp/print.c @@ -0,0 +1,64 @@ +#include +#include "prt_typedef.h" +#include "cpu_config.h" +#include "securec.h" +#include "pl011.h" + +#define WRITE_UINT32(value, addr) { \ + OS_EMBED_ASM("DSB SY"); \ + *(volatile U32 *)(addr) = (U32)(value); \ +} + +#define GET_UINT32(addr) ({ \ + U32 r = *(volatile U32 *)(addr); \ + OS_EMBED_ASM("DSB SY"); r; \ +}) + +typedef U32 (*PrintFunc)(const char *format, va_list vaList); +#define OS_MAX_SHOW_LEN 0x200 + +void uart_poll_send(unsigned char ch) +{ + while (UART_REG(UART_FR) & UART_TXFF) { + asm volatile("yield" ::: "memory"); + } + UART_REG(UART_DR) = ch; +} + +void TestPutc(unsigned char ch) +{ + uart_poll_send(ch); + if(ch == '\n') { + uart_poll_send('\r'); + } +} +int TestPrintf(const char *format, va_list vaList) +{ + int len; + char buff[OS_MAX_SHOW_LEN] = {0}; + char *str = buff; + + len = vsnprintf_s(buff, OS_MAX_SHOW_LEN, OS_MAX_SHOW_LEN, format, vaList); + if (len == -1) { + return len; + } + + while (*str != '\0') { + TestPutc(*str); + str++; + } + + return OS_OK; +} + +U32 PRT_Printf(const char *format, ...) +{ + va_list vaList; + S32 count; + + va_start(vaList, format); + count = TestPrintf(format, vaList); + va_end(vaList); + + return count; +} diff --git a/demos/sd3403/bsp/print_openamp.c b/demos/sd3403/bsp/print_openamp.c new file mode 100644 index 00000000..1984664c --- /dev/null +++ b/demos/sd3403/bsp/print_openamp.c @@ -0,0 +1,28 @@ +#include +#include +#include +#include +#include "securec.h" + +#define OS_MAX_SHOW_LEN 0x200 + +extern int send_message(unsigned char *message, int len); +extern int vsnprintf(char *str, size_t size, const char *format, va_list ap); + +// 在linux pts终端中打印 +int printf(const char *format, ...) +{ + int len; + va_list vaList; + unsigned char buff[OS_MAX_SHOW_LEN]; + + memset_s(buff, OS_MAX_SHOW_LEN, 0, OS_MAX_SHOW_LEN); + va_start(vaList, format); + len = vsnprintf(buff, OS_MAX_SHOW_LEN, format, vaList); + if (len == -1) { + return len; + } + va_end(vaList); + + return send_message(buff, len + 1); +} diff --git a/demos/sd3403/bsp/sd3403/cpu_config.h b/demos/sd3403/bsp/sd3403/cpu_config.h new file mode 100644 index 00000000..54a320c8 --- /dev/null +++ b/demos/sd3403/bsp/sd3403/cpu_config.h @@ -0,0 +1,96 @@ +#ifndef CPU_CONFIG_H +#define CPU_CONFIG_H + +#include "cache_asm.h" + +#define UART_BASE_ADDR 0x11040000ULL +#define TEST_CLK_INT 30 +#define OS_GIC_BASE_ADDR 0x12400000ULL // GICD_BASE_ADDR +#define OS_GICR_OFFSET 0x40000U // GICR相对于GIC基地址偏移量配置 +#define MMU_IMAGE_ADDR 0x43000000ULL +#define MMU_GIC_ADDR OS_GIC_BASE_ADDR +#define MMU_UART_ADDR UART_BASE_ADDR +#define MMU_OPENAMP_ADDR 0x40000000ULL +#define OPENAMP_SHM_SIZE 0x100000 +#define MMU_LOG_MEM_ADDR 0x44000000ULL + +#define SICR_ADDR_OFFSET_PER_CORE 0x20000U +#define OS_GICR_STRIDE 0x20000U // GICR核间偏移量配置 + +#define GICD_CTLR_S_ADDR (OS_GIC_BASE_ADDR + 0x0000U) +#define GICD_IGROUPN_ADDR (OS_GIC_BASE_ADDR + 0x0080U) +#define GICD_ISENABLER0_ADDR (OS_GIC_BASE_ADDR + 0x0100U) +#define GICD_ICENABLER0_ADDR (OS_GIC_BASE_ADDR + 0x0180U) +#define GICD_IPRIORITYN_ADDR (OS_GIC_BASE_ADDR + 0x0400U) +#define GICD_IGRPMODRN_ADDR (OS_GIC_BASE_ADDR + 0x0D00U) + +#define GICR_BASE0 (OS_GIC_BASE_ADDR + OS_GICR_OFFSET) // GICR的基地址 +#define GICR_BASE1 (GICR_BASE0 + 0x10000U) // GICR_SGI_OFFSET + +#define GICR_CTRL_ADDR (GICR_BASE0 + 0x0000U) +#define GICR_WAKER_ADDR (GICR_BASE0 + 0x0014U) + +#define GICR_IGROUPR0_ADDR (GICR_BASE1 + 0x0080U) +#define GICR_ISENABLER0_ADDR (GICR_BASE1 + 0x0100U) +#define GICR_ICENABLER0_ADDR (GICR_BASE1 + 0x0180U) +#define GICR_IGRPMODR0_ADDR (GICR_BASE1 + 0x0D00U) + +#define GIC_DIST_BASE OS_GIC_BASE_ADDR +#define GIC_CPU_BASE (GIC_DIST_BASE + 0x1000U) + +#define GICD_CTLR (GIC_DIST_BASE + 0x0000U) +#define GICD_TYPER (GIC_DIST_BASE + 0x0004U) +#define GICD_IIDR (GIC_DIST_BASE + 0x0008U) +#define GICD_IGROUPRn (GIC_DIST_BASE + 0x0080U) +#define GICD_ISENABLERn (GIC_DIST_BASE + 0x0100U) +#define GICD_ICENABLERn (GIC_DIST_BASE + 0x0180U) +#define GICD_ISPENDRn (GIC_DIST_BASE + 0x0200U) +#define GICD_ICPENDRn (GIC_DIST_BASE + 0x0280U) +#define GICD_ISACTIVERn (GIC_DIST_BASE + 0x0300U) +#define GICD_ICACTIVERn (GIC_DIST_BASE + 0x0380U) +#define GICD_IPRIORITYn (GIC_DIST_BASE + 0x0400U) + +#define GICC_CTLR (GIC_CPU_BASE + 0x0000U) +#define GICC_PMR (GIC_CPU_BASE + 0x0004U) + +#define BIT(n) (1 << (n)) + +#define GICC_CTLR_ENABLEGRP0 BIT(0) +#define GICC_CTLR_ENABLEGRP1 BIT(1) +#define GICC_CTLR_FIQBYPDISGRP0 BIT(5) +#define GICC_CTLR_IRQBYPDISGRP0 BIT(6) +#define GICC_CTLR_FIQBYPDISGRP1 BIT(7) +#define GICC_CTLR_IRQBYPDISGRP1 BIT(8) + +#define GICC_CTLR_ENABLE_MASK (GICC_CTLR_ENABLEGRP0 | \ + GICC_CTLR_ENABLEGRP1) + +#define GICC_CTLR_BYPASS_MASK (GICC_CTLR_FIQBYPDISGRP0 | \ + GICC_CTLR_IRQBYPDISGRP0 | \ + GICC_CTLR_FIQBYPDISGRP1 | \ + GICC_CTLR_IRQBYPDISGRP1) + +#define GIC_REG_READ(addr) (*(volatile U32 *)((uintptr_t)(addr))) +#define GIC_REG_WRITE(addr, data) (*(volatile U32 *)((uintptr_t)(addr)) = (U32)(data)) + +#define MAX_INT_NUM 387 +#define MIN_GIC_SPI_NUM 32 +#define SICD_IGROUP_INT_NUM 32 +#define SICD_REG_SIZE 4 + +#define GROUP_MAX_BPR 0x7U +#define GROUP0_BP 0 +#define GROUP1_BP 0 + +#define PRIO_MASK_LEVEL 0xFFU + +#define ICC_SRE_EL1 S3_0_C12_C12_5 +#define ICC_BPR0_EL1 S3_0_C12_C8_3 +#define ICC_BPR1_EL1 S3_0_C12_C12_3 +#define ICC_IGRPEN1_EL1 S3_0_C12_C12_7 +#define ICC_PMR_EL1 S3_0_C4_C6_0 + +#define PARAS_TO_STRING(x...) #x +#define REG_ALIAS(x...) PARAS_TO_STRING(x) + +#endif diff --git a/demos/sd3403/bsp/start.S b/demos/sd3403/bsp/start.S new file mode 100644 index 00000000..3581436c --- /dev/null +++ b/demos/sd3403/bsp/start.S @@ -0,0 +1,153 @@ +#include "prt_buildef.h" +#include "prt_asm_arm_external.h" + + .global OsResetVector + .global OsArmSmccSmc +#ifdef OS_OPTION_OPENAMP + .global mmu_init + + .type mmu_init, function +#endif + .type start, function + .section .text.bspinit, "ax" + .balign 4 + +#define HCR_EL2_FMO (1 << 3) +#define HCR_EL2_IMO (1 << 4) +#define HCR_EL2_AMO (1 << 5) +#define HCR_EL2_TWI (1 << 13) +#define HCR_EL2_TWE (1 << 14) +#define HCR_EL2_TVM (1 << 26) +#define HCR_EL2_TGE (1 << 27) +#define HCR_EL2_HCD (1 << 29) +#define HCR_EL2_TRVM (1 << 30) +#define HCR_EL2_RW (1 << 31) + +#define SPSR_DBG_MASK (1 << 9) +#define SPSR_SERR_MASK (1 << 8) +#define SPSR_IRQ_MASK (1 << 7) +#define SPSR_FIQ_MASK (1 << 6) +#define SPSR_M_EL1H (5) + + + .global OsElxState + .type OsElxState, @function +OsElxState: + MRS x6, CurrentEL + MOV x2, #0x4 + CMP w6, w2 + + BEQ Start + +OsEl2Entry: + MRS x10, CNTHCTL_EL2 + ORR x10, x10, #0x3 + MSR CNTHCTL_EL2, x10 + + MRS x10, MIDR_EL1 + MRS x1, MPIDR_EL1 + MSR VPIDR_EL2, x10 + MSR VMPIDR_EL2, x1 + + MOV x10, #0x33ff + MSR CPTR_EL2, x10 + MSR HSTR_EL2, xzr + + MOV x10, #(HCR_EL2_RW) + ORR x10, x10, #(HCR_EL2_HCD) + BIC x10, x10, #(HCR_EL2_TVM) + BIC x10, x10, #(HCR_EL2_TRVM) + BIC x10, x10, #(HCR_EL2_TGE) + BIC x10, x10, #(HCR_EL2_AMO) + BIC x10, x10, #(HCR_EL2_IMO) + BIC x10, x10, #(HCR_EL2_FMO) + BIC x10, x10, #(HCR_EL2_TWI) + BIC x10, x10, #(HCR_EL2_TWE) + + MSR HCR_EL2, x10 + +OsEl2SwitchToEl1: + ADR x0, Start + MSR SP_EL1, XZR + MSR ELR_EL2, x0 + MOV x0, XZR + + LDR x20, =(SPSR_DBG_MASK | SPSR_SERR_MASK | \ + SPSR_IRQ_MASK | SPSR_FIQ_MASK | SPSR_M_EL1H) + MSR SPSR_EL2, x20 + + TLBI ALLE1IS + IC IALLU + DSB SY + ISB + ERET + +Start: +#if defined(OS_OPTION_SMP) + OsAsmGetCoreId x0 // 读取核号 + LDR x4, =g_cfgPrimaryCore + LDR w4, [x4] + CMP w0, w4 + BNE OsSlaveCoreProcess + +#endif + LDR x1, =__os_sys_sp_end + BIC sp, x1, #0xf + +#ifdef OS_OPTION_OPENAMP + BL mmu_init +#endif + + MRS x10, CNTKCTL_EL1 + ORR x10, x10, #0x3 + MSR CNTKCTL_EL1, x10 + + /* Enable the FPU */ + MRS x4, CPACR_EL1 + mov x4, #(3 << 20) + msr CPACR_EL1, x4 + isb + +#if !defined(OS_OPTION_SMP) + B OsResetVector +#endif + BL OsSetValidAllCoresMask + B OsMasterCoreProcess + +OsSlaveCoreProcess: + OsAsmGetCoreId x0 // 读取核号 + MOV x2, #0x1000 + mul x0, x0, x2 + LDR x1, =__os_sys_sp_end + SUB x1, x1, x0 + BIC sp, x1, #0xf + + MRS x10, CNTKCTL_EL1 + ORR x10, x10, #0x3 + MSR CNTKCTL_EL1, x10 + + /* Enable the FPU */ + MRS x4, CPACR_EL1 + mov x4, #(3 << 20) + msr CPACR_EL1, x4 + isb + +OsSlaveStart: +#ifdef OS_OPTION_OPENAMP + BL mmu_init +#endif + + B OsResetVector + +OsMasterCoreProcess: + B OsResetVector + +OsEnterReset: + B OsEnterReset + + .section .text, "ax" + .balign 4 + +OsArmSmccSmc: + smc #0x0 + ret \ No newline at end of file diff --git a/demos/sd3403/bsp/timer.c b/demos/sd3403/bsp/timer.c new file mode 100644 index 00000000..f1f3b621 --- /dev/null +++ b/demos/sd3403/bsp/timer.c @@ -0,0 +1,127 @@ +#include "prt_sys.h" +#include "prt_tick.h" +#include "prt_config.h" +#include "prt_task.h" +#include "prt_hwi.h" +#include "cpu_config.h" +#include "securec.h" + +U64 g_timerFrequency; +#define PMU_TIMER_FREQUENCY g_timerFrequency + +U64 GetGenericTimerFreq(void) +{ + U64 freq; + + OS_EMBED_ASM("MRS %0, CNTFRQ_EL0" : "=r"(freq) : : "memory", "cc"); + return freq; +} +#if defined(GUEST_OS) +void TimerIsr(uintptr_t para) +{ + (void)para; + U32 cfgMask = 0x0; + U64 cycle = PMU_TIMER_FREQUENCY / OS_TICK_PER_SECOND; + + OS_EMBED_ASM("MSR CNTV_CTL_EL0, %0" : : "r"(cfgMask) : "memory"); + PRT_ISB(); + OS_EMBED_ASM("MSR CNTV_TVAL_EL0, %0" : : "r"(cycle) : "memory", "cc"); + + cfgMask = 0x1; + OS_EMBED_ASM("MSR CNTV_CTL_EL0, %0" : : "r"(cfgMask) : "memory"); + + PRT_TickISR(); + PRT_ISB(); +} + +void CoreTimerInit(void) +{ + U32 cfgMask = 0x0; + U64 cycle = PMU_TIMER_FREQUENCY / OS_TICK_PER_SECOND; + + OS_EMBED_ASM("MSR CNTV_CTL_EL0, %0" : : "r"(cfgMask) : "memory"); + PRT_ISB(); + OS_EMBED_ASM("MSR CNTV_TVAL_EL0, %0" : : "r"(cycle) : "memory", "cc"); + + cfgMask = 0x1; + OS_EMBED_ASM("MSR CNTV_CTL_EL0, %0" : : "r"(cfgMask) : "memory"); +} +#else +void TimerIsr(uintptr_t para) +{ + (void)para; + U32 cfgMask = 0x0; + U64 cycle = PMU_TIMER_FREQUENCY / OS_TICK_PER_SECOND; + + OS_EMBED_ASM("MSR CNTP_CTL_EL0, %0" : : "r"(cfgMask) : "memory"); + PRT_ISB(); + OS_EMBED_ASM("MSR CNTP_TVAL_EL0, %0" : : "r"(cycle) : "memory", "cc"); + + cfgMask = 0x1; + OS_EMBED_ASM("MSR CNTP_CTL_EL0, %0" : : "r"(cfgMask) : "memory"); + + PRT_TickISR(); + PRT_ISB(); +} + +void CoreTimerInit(void) +{ + U32 cfgMask = 0x0; + U64 cycle = PMU_TIMER_FREQUENCY / OS_TICK_PER_SECOND; + + OS_EMBED_ASM("MSR CNTP_CTL_EL0, %0" : : "r"(cfgMask) : "memory"); + PRT_ISB(); + OS_EMBED_ASM("MSR CNTP_TVAL_EL0, %0" : : "r"(cycle) : "memory", "cc"); + + cfgMask = 0x1; + OS_EMBED_ASM("MSR CNTP_CTL_EL0, %0" : : "r"(cfgMask) : "memory"); +} +#endif + +U32 CoreTimerStart(void) +{ + g_timerFrequency = GetGenericTimerFreq(); + CoreTimerInit(); + return OS_OK; +} + +U32 TestClkStart(void) +{ + U32 ret; + + ret = PRT_HwiSetAttr(TEST_CLK_INT, 10, OS_HWI_MODE_ENGROSS); + if (ret != OS_OK) { + return ret; + } + + ret = PRT_HwiCreate(TEST_CLK_INT, (HwiProcFunc)TimerIsr, 0); + if (ret != OS_OK) { + return ret; + } + ret = PRT_HwiEnable(TEST_CLK_INT); + if (ret != OS_OK) { + return ret; + } + ret = CoreTimerStart(); + if (ret != OS_OK) { + return ret; + } + + return OS_OK; +} + +#if defined(OS_OPTION_SMP) +U32 OsCoreTimerSecondaryInit(void) +{ + U32 ret; + ret = PRT_HwiEnable(TEST_CLK_INT); + if (ret != OS_OK) { + return ret; + } + ret = CoreTimerStart(); + if (ret != OS_OK) { + return ret; + } + return ret; +} +#endif \ No newline at end of file diff --git a/demos/sd3403/bsp/timer.h b/demos/sd3403/bsp/timer.h new file mode 100644 index 00000000..df7b4075 --- /dev/null +++ b/demos/sd3403/bsp/timer.h @@ -0,0 +1,6 @@ +#ifndef __TIMER_H__ +#define __TIMER_H__ + +U32 TestClkStart(void); + +#endif \ No newline at end of file diff --git a/demos/sd3403/build/build_app.sh b/demos/sd3403/build/build_app.sh new file mode 100755 index 00000000..7638109b --- /dev/null +++ b/demos/sd3403/build/build_app.sh @@ -0,0 +1,23 @@ +# UniPorton_test_proxy_posix_interface sd3403 UniPorton_test_log_interface UniPorton_test_posix_time_interface +# deadlock-break interrupt-latency message-latency semaphore-shuffle task-preempt task-switch +export TOOLCHAIN_PATH=/opt/buildtools/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf +export APP=sd3403 +export TMP_DIR=$APP + +sh ./build_static.sh sd3403 +DEFCONFIG=../../../build/uniproton_config/config_armv8_sd3403/defconfig +if grep -q "CONFIG_OS_OPTION_OPENAMP=y" "$DEFCONFIG"; then + sh ./build_openamp.sh $TOOLCHAIN_PATH +fi + +echo "cmake start" +cmake -S .. -B $TMP_DIR -DAPP:STRING=$APP -DTOOLCHAIN_PATH:STRING=$TOOLCHAIN_PATH -DCPU_TYPE:SRTING="sd3403" -DCMAKE_TRY_COMPILE_TARGET_TYPE=STATIC_LIBRARY +echo "cmake end" + +pushd $TMP_DIR +make $APP +popd +cp ./$TMP_DIR/$APP $APP.elf +$TOOLCHAIN_PATH/bin/aarch64-none-elf-objcopy -O binary ./$APP.elf $APP.bin +$TOOLCHAIN_PATH/bin/aarch64-none-elf-objdump -D ./$APP.elf > $APP.asm +rm -rf $TMP_DIR \ No newline at end of file diff --git a/demos/sd3403/build/build_openamp.sh b/demos/sd3403/build/build_openamp.sh new file mode 100644 index 00000000..e169bcb7 --- /dev/null +++ b/demos/sd3403/build/build_openamp.sh @@ -0,0 +1,58 @@ +echo "################# git clone libmetal #################" +pushd ../component +rm -rf ./libmetal* +git clone https://gitee.com/src-openeuler/libmetal.git +mv ./libmetal/libmetal-2022.10.0.tar.gz . +rm -rf ./libmetal +tar -zxvf libmetal-2022.10.0.tar.gz +mv ./libmetal-2022.10.0 ./libmetal +cp UniProton-patch-for-libmetal.patch ./libmetal +cd libmetal +patch -p1 -d . < UniProton-patch-for-libmetal.patch +popd + +echo "################# git clone openamp #################" +pushd ../component +rm -rf ./open-amp* +git clone https://gitee.com/src-openeuler/OpenAMP.git +mv ./OpenAMP/openamp-2022.10.1.tar.gz . +rm -rf ./OpenAMP +tar -zxvf openamp-2022.10.1.tar.gz +mv ./openamp-2022.10.1 ./open-amp +cp UniProton-patch-for-openamp.patch ./open-amp +cd open-amp +patch -p1 -d . < UniProton-patch-for-openamp.patch +popd + +echo "######################### build metal #########################" +pushd . +mkdir -p libmetal +cd libmetal +mkdir -p build +cd build +rm -rf * +cmake ../../../component/libmetal -DCMAKE_TOOLCHAIN_FILE=../../../component/libmetal/cmake/platforms/uniproton_arm64_gcc.cmake -DTOOLCHAIN_PATH:STRING=$1 -DWITH_DOC=OFF -DWITH_EXAMPLES=OFF -DWITH_TESTS=OFF -DWITH_DEFAULT_LOGGER=OFF -DWITH_SHARED_LIB=OFF +make VERBOSE=1 DESTDIR=../output install +if [ $? -ne 0 ];then + echo "make metal failed!" + exit 1 +fi +popd + +echo "######################### build openamp #########################" +pushd . +mkdir -p open-amp +cd open-amp +mkdir -p build +cd build +rm -rf * +cmake ../../../component/open-amp -DCMAKE_TOOLCHAIN_FILE=../../../component/open-amp/cmake/platforms/uniproton_arm64_gcc.cmake -DTOOLCHAIN_PATH:STRING=$1 +make VERBOSE=1 DESTDIR=../output install +if [ $? -ne 0 ];then + echo "make openamp failed!" + exit 1 +fi +popd + +cp ./libmetal/output/usr/local/lib/*.a ../libs +cp ./open-amp/output/usr/local/lib/*.a ../libs diff --git a/demos/sd3403/build/build_static.sh b/demos/sd3403/build/build_static.sh new file mode 100644 index 00000000..3572966f --- /dev/null +++ b/demos/sd3403/build/build_static.sh @@ -0,0 +1,23 @@ +if [ ! -d "../include" ]; then + git clone https://gitee.com/openeuler/libboundscheck.git + if [ $? != 0 ]; then + tar -xvf libboundscheck.tar + fi + cp libboundscheck/include/* ../../../platform/libboundscheck/include + cp libboundscheck/src/* ../../../platform/libboundscheck/src + + mkdir ../include + cp -r ../../../src/include/uapi/* ../include + cp libboundscheck/include/* ../include + rm -rf libboundscheck +fi + +pushd ./../../../ + +python3 build.py $1 +cp output/UniProton/lib/$1/* demos/sd3403/libs +cp output/libboundscheck/lib/$1/* demos/sd3403/libs +cp -r output/libc demos/sd3403/include +cp -r src/include/uapi/* demos/sd3403/include +cp build/uniproton_config/config_armv8_sd3403/prt_buildef.h demos/$1/include/ +popd diff --git a/demos/sd3403/build/sd3403.ld b/demos/sd3403/build/sd3403.ld new file mode 100644 index 00000000..2e74a06e --- /dev/null +++ b/demos/sd3403/build/sd3403.ld @@ -0,0 +1,129 @@ +ENTRY(__text_start) + +_stack_size = 0x10000; +_heap_size = 0x10000; + +MEMORY +{ + IMU_SRAM (rwx) : ORIGIN = 0x43000000, LENGTH = 0x800000 + MMU_MEM (rwx) : ORIGIN = 0x43800000, LENGTH = 0x800000 +} + +SECTIONS +{ + text_start = .; + .start_bspinit : + { + __text_start = .; + KEEP(*(.text.bspinit)) + } > IMU_SRAM + + .start_text : + { + KEEP(*(.text.startup)) + } > IMU_SRAM + + .text : + { + *(.text) + *(.text.*) + *(*.text) + . = ALIGN(8); + os_symtab_start = .; + KEEP(*(.OsSymTab)) + os_symtab_end = .; + __text_end = .; + } > IMU_SRAM + . = ALIGN(8); + data_copy_start = .; + + .rodata : + { + . = ALIGN(8); + __rodata_start = .; + *(.rodata) + *(.rodata.*) + . = ALIGN(8); + __rodata_end = .; + } > IMU_SRAM + + .eh_frame : + { + . = ALIGN(8); + __os_unwind_table_start = .; + *(.eh_frame) + __os_unwind_table_end = .; + } > IMU_SRAM + + .heap (NOLOAD) : + { + . = ALIGN(8); + PROVIDE (__HEAP_INIT = .); + . = . + _heap_size; + . = ALIGN(8); + PROVIDE (__HEAP_END = .); + } > IMU_SRAM + + .stack (NOLOAD) : + { + . = ALIGN(8); + PROVIDE (__os_sys_sp_start = .); + . = . + _stack_size; + . = ALIGN(8); + PROVIDE (__os_sys_sp_end = .); + } > IMU_SRAM + end = .; + + .percpu.data : + { + __os_per_cpu_start = .; + *(.os.percpu.data) + __os_per_cpu_end = .; + LONG (ALIGNOF(.percpu.data)) + } > IMU_SRAM + + .data : + { + . = ALIGN(8); + __data_start = .; + *(.data) + *(.data.*) + KEEP(*( SORT (.uniproton.table.*))); + . = ALIGN(8); + __os_text_start = .; + QUAD(__text_start) + QUAD(__text_end) + __os_text_end = .; + __data_end = .; + } > IMU_SRAM + + .llt.bss : + { + _llt_bss_start = .; + *__code_measure_stub*.o(.bss) + *__code_measure_stub*.o(.bss.*) + _llt_bss_end = .; + } > IMU_SRAM + + .bss (NOLOAD) : + { + . = ALIGN(8); + __bss_start__ = .; + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(8); + __bss_end__ = .; + } > IMU_SRAM + + .mmu.table.base : + { + PROVIDE (g_mmu_page_begin = .); + PROVIDE (g_mmu_page_end = g_mmu_page_begin + 0x8000); + } > MMU_MEM + + .resource_table : ALIGN(8) + { + KEEP(*(.resource_table*)) + } > IMU_SRAM +} diff --git a/demos/sd3403/component/UniProton-patch-for-libmetal.patch b/demos/sd3403/component/UniProton-patch-for-libmetal.patch new file mode 100644 index 00000000..cf05fee6 --- /dev/null +++ b/demos/sd3403/component/UniProton-patch-for-libmetal.patch @@ -0,0 +1,604 @@ +diff -urN libmetal-2022.10.0/CMakeLists.txt libmetal-m/CMakeLists.txt +--- libmetal-2022.10.0/CMakeLists.txt 2022-10-28 10:12:23.000000000 +0800 ++++ libmetal-m/CMakeLists.txt 2023-08-23 15:11:41.351539000 +0800 +@@ -6,7 +6,10 @@ + if (POLICY CMP0077) + cmake_policy(SET CMP0077 NEW) + endif() +- ++include_directories( ++ ../../include ++ ../../include/libc/include) ++set (CMAKE_SYSTEM_NAME Uniproton) + set (LIBMETAL_ROOT_DIR "${CMAKE_CURRENT_SOURCE_DIR}") + + list (APPEND CMAKE_MODULE_PATH +diff -urN libmetal-2022.10.0/cmake/platforms/uniproton_arm64_gcc.cmake libmetal-m/cmake/platforms/uniproton_arm64_gcc.cmake +--- libmetal-2022.10.0/cmake/platforms/uniproton_arm64_gcc.cmake 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/cmake/platforms/uniproton_arm64_gcc.cmake 2023-08-23 15:20:20.848027600 +0800 +@@ -0,0 +1,16 @@ ++#cross-compilation config ++ ++set(CMAKE_SYSTEM_PROCESSOR arm) ++set(PROJECT_SYSTEM uniproton) ++ ++set(CMAKE_C_COMPILER_WORKS 1) ++set(CMAKE_CXX_COMPILER_WORKS 1) ++ ++set(CROSS_PREFIX "${TOOLCHAIN_PATH}/bin/aarch64-none-elf-" CACHE STRING "") ++set(CMAKE_C_COMPILER "${CROSS_PREFIX}gcc" CACHE STRING "") ++set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER CACHE STRING "") ++set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY NEVER CACHE STRING "") ++set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE NEVER CACHE STRING "") ++set(CMAKE_C_FLAGS "-nostdlib -nostdinc") ++ ++# vim: expandtab:ts=2:sw=2:smartindent +diff -urN libmetal-2022.10.0/cmake/platforms/uniproton_x86_64_gcc.cmake libmetal-m/cmake/platforms/uniproton_x86_64_gcc.cmake +--- libmetal-2022.10.0/cmake/platforms/uniproton_x86_64_gcc.cmake 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/cmake/platforms/uniproton_x86_64_gcc.cmake 2023-08-10 15:09:26.051593000 +0800 +@@ -0,0 +1,16 @@ ++#cross-compilation config ++ ++set(CMAKE_SYSTEM_PROCESSOR x86_64) ++set(PROJECT_SYSTEM uniproton) ++ ++set(CMAKE_C_COMPILER_WORKS 1) ++set(CMAKE_CXX_COMPILER_WORKS 1) ++ ++set(CROSS_PREFIX "${TOOLCHAIN_PATH}/bin/x86_64-openeuler-linux-gnu-" CACHE STRING "") ++set(CMAKE_C_COMPILER "${CROSS_PREFIX}gcc" CACHE STRING "") ++set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER CACHE STRING "") ++set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY NEVER CACHE STRING "") ++set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE NEVER CACHE STRING "") ++set(CMAKE_C_FLAGS "-nostdlib -nostdinc -D_GNU_SOURCE -D_POSIX_THREADS -D_POSIX_THREAD_PRIORITY_SCHEDULING -D_POSIX_PRIORITY_SCHEDULING -D_POSIX_TIMERS -D_POSIX_CPUTIME -D_POSIX_THREAD_CPUTIME -D_POSIX_MONOTONIC_CLOCK -D_POSIX_TIMEOUTS -D_POSIX_CLOCK_SELECTION -D_POSIX_THREAD_PRIO_PROTECT -D_UNIX98_THREAD_MUTEX_ATTRIBUTES -D_POSIX_READER_WRITER_LOCKS" CACHE STRING "") ++ ++# vim: expandtab:ts=2:sw=2:smartindent +diff -urN libmetal-2022.10.0/lib/system/uniproton/CMakeLists.txt libmetal-m/lib/system/uniproton/CMakeLists.txt +--- libmetal-2022.10.0/lib/system/uniproton/CMakeLists.txt 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/lib/system/uniproton/CMakeLists.txt 2023-08-23 14:30:40.223999400 +0800 +@@ -0,0 +1,17 @@ ++collect (PROJECT_LIB_HEADERS alloc.h) ++collect (PROJECT_LIB_HEADERS assert.h) ++collect (PROJECT_LIB_HEADERS cache.h) ++collect (PROJECT_LIB_HEADERS condition.h) ++collect (PROJECT_LIB_HEADERS io.h) ++collect (PROJECT_LIB_HEADERS irq.h) ++collect (PROJECT_LIB_HEADERS log.h) ++collect (PROJECT_LIB_HEADERS mutex.h) ++collect (PROJECT_LIB_HEADERS sleep.h) ++collect (PROJECT_LIB_HEADERS sys.h) ++ ++collect (PROJECT_LIB_SOURCES condition.c) ++collect (PROJECT_LIB_SOURCES device.c) ++collect (PROJECT_LIB_SOURCES init.c) ++collect (PROJECT_LIB_SOURCES shmem.c) ++ ++# vim: expandtab:ts=2:sw=2:smartindent +diff -urN libmetal-2022.10.0/lib/system/uniproton/alloc.h libmetal-m/lib/system/uniproton/alloc.h +--- libmetal-2022.10.0/lib/system/uniproton/alloc.h 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/lib/system/uniproton/alloc.h 2023-08-23 14:30:40.198995600 +0800 +@@ -0,0 +1,39 @@ ++/* ++ * Copyright (c) 2017, Linaro Limited. and Contributors. All rights reserved. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++/* ++ * @file uniproton/alloc.h ++ * @brief Uniproton libmetal memory allocattion definitions. ++ */ ++ ++#ifndef __METAL_ALLOC__H__ ++#error "Include metal/alloc.h instead of metal/uniproton/alloc.h" ++#endif ++ ++#ifndef __METAL_UNIPROTON_ALLOC__H__ ++#define __METAL_UNIPROTON_ALLOC__H__ ++ ++#include "prt_mem.h" ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++static inline void *metal_allocate_memory(unsigned int size) ++{ ++ return PRT_MemAlloc(OS_MID_SYS, OS_MEM_DEFAULT_PT0, size); ++} ++ ++static inline void metal_free_memory(void *ptr) ++{ ++ PRT_MemFree(OS_MID_SYS, ptr); ++} ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* __METAL_UNIPROTON_ALLOC__H__ */ +diff -urN libmetal-2022.10.0/lib/system/uniproton/assert.h libmetal-m/lib/system/uniproton/assert.h +--- libmetal-2022.10.0/lib/system/uniproton/assert.h 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/lib/system/uniproton/assert.h 2023-08-23 14:30:40.206995500 +0800 +@@ -0,0 +1,26 @@ ++/* ++ * Copyright (c) 2018, Xilinx Inc. and Contributors. All rights reserved. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++/* ++ * @file assert.h ++ * @brief Uniproton assertion support. ++ */ ++ ++#ifndef __METAL_ASSERT__H__ ++#error "Include metal/assert.h instead of metal/uniproton/assert.h" ++#endif ++ ++#ifndef __METAL_UNIPROTON_ASSERT__H__ ++#define __METAL_UNIPROTON_ASSERT__H__ ++ ++/** ++ * @brief Assertion macro. ++ * @param cond Condition to test. ++ */ ++#define metal_sys_assert(cond) ++ ++#endif /* __METAL_UNIPROTON_ASSERT__H__ */ ++ +diff -urN libmetal-2022.10.0/lib/system/uniproton/cache.h libmetal-m/lib/system/uniproton/cache.h +--- libmetal-2022.10.0/lib/system/uniproton/cache.h 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/lib/system/uniproton/cache.h 2023-08-23 14:30:40.213995600 +0800 +@@ -0,0 +1,39 @@ ++/* ++ * Copyright (c) 2018, Linaro Limited. and Contributors. All rights reserved. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++/* ++ * @file uniproton/cache.h ++ * @brief Uniproton cache operation primitives for libmetal. ++ */ ++ ++#ifndef __METAL_CACHE__H__ ++#error "Include metal/cache.h instead of metal/uniproton/cache.h" ++#endif ++ ++#ifndef __METAL_UNIPROTON_CACHE__H__ ++#define __METAL_UNIPROTON_CACHE__H__ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++static inline void __metal_cache_flush(void *addr, unsigned int len) ++{ ++ (void)addr; ++ (void)len; ++} ++ ++static inline void __metal_cache_invalidate(void *addr, unsigned int len) ++{ ++ (void)addr; ++ (void)len; ++} ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* __METAL_UNIPROTON_CACHE__H__ */ +diff -urN libmetal-2022.10.0/lib/system/uniproton/condition.c libmetal-m/lib/system/uniproton/condition.c +--- libmetal-2022.10.0/lib/system/uniproton/condition.c 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/lib/system/uniproton/condition.c 2023-08-23 14:30:40.232996100 +0800 +@@ -0,0 +1,33 @@ ++/* ++ * Copyright (c) 2017, Linaro Limited. and Contributors. All rights reserved. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++/* ++ * @file uniproton/condition.c ++ * @brief Uniproton libmetal condition variable handling. ++ */ ++ ++#include ++#include ++#include ++ ++int metal_condition_wait(struct metal_condition *cv, ++ metal_mutex_t *m) ++{ ++ unsigned int flags; ++ ++ /* Check if the mutex has been acquired */ ++ if (!cv || !m || !metal_mutex_is_acquired(m)) { ++ return -EINVAL; ++ } ++ ++ flags = metal_irq_save_disable(); ++ /* Release the mutex first. */ ++ metal_mutex_release(m); ++ metal_irq_restore_enable(flags); ++ /* Acquire the mutex again. */ ++ metal_mutex_acquire(m); ++ return 0; ++} +diff -urN libmetal-2022.10.0/lib/system/uniproton/condition.h libmetal-m/lib/system/uniproton/condition.h +--- libmetal-2022.10.0/lib/system/uniproton/condition.h 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/lib/system/uniproton/condition.h 2023-08-23 14:30:40.241995800 +0800 +@@ -0,0 +1,30 @@ ++/* ++ * Copyright (c) 2017, Linaro Limited. and Contributors. All rights reserved. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++/* ++ * @file uniproton/condition.h ++ * @brief Uniproton condition variable primitives for libmetal. ++ */ ++ ++#ifndef __METAL_CONDITION__H__ ++#error "Include metal/condition.h instead of metal/uniproton/condition.h" ++#endif ++ ++#ifndef __METAL_UNIPROTON_CONDITION__H__ ++#define __METAL_UNIPROTON_CONDITION__H__ ++ ++#include ++#include ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* __METAL_UNIPROTON_CONDITION__H__ */ +diff -urN libmetal-2022.10.0/lib/system/uniproton/device.c libmetal-m/lib/system/uniproton/device.c +--- libmetal-2022.10.0/lib/system/uniproton/device.c 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/lib/system/uniproton/device.c 2023-08-23 14:30:40.250995300 +0800 +@@ -0,0 +1,21 @@ ++/* ++ * Copyright (c) 2017, Linaro Limited. and Contributors. All rights reserved. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++/* ++ * @file uniproton/device.c ++ * @brief Uniproton libmetal device definitions. ++ */ ++ ++#include ++#include ++#include ++#include ++ ++int metal_generic_dev_sys_open(struct metal_device *dev) ++{ ++ return 0; ++} ++ +diff -urN libmetal-2022.10.0/lib/system/uniproton/init.c libmetal-m/lib/system/uniproton/init.c +--- libmetal-2022.10.0/lib/system/uniproton/init.c 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/lib/system/uniproton/init.c 2023-08-23 14:30:40.258995200 +0800 +@@ -0,0 +1,27 @@ ++/* ++ * Copyright (c) 2017, Linaro Limited. and Contributors. All rights reserved. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++/* ++ * @file uniproton/init.c ++ * @brief Uniproton libmetal initialization. ++ */ ++ ++#include ++#include ++ ++struct metal_state _metal; ++ ++int metal_sys_init(const struct metal_init_params *params) ++{ ++ (void)params; ++ metal_bus_register(&metal_generic_bus); ++ return 0; ++} ++ ++void metal_sys_finish(void) ++{ ++ metal_bus_unregister(&metal_generic_bus); ++} +diff -urN libmetal-2022.10.0/lib/system/uniproton/io.h libmetal-m/lib/system/uniproton/io.h +--- libmetal-2022.10.0/lib/system/uniproton/io.h 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/lib/system/uniproton/io.h 2023-08-23 14:30:40.266002600 +0800 +@@ -0,0 +1,37 @@ ++/* ++ * Copyright (c) 2017, Linaro Limited. and Contributors. All rights reserved. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++/* ++ * @file uniproton/io.h ++ * @brief Uniproton specific io definitions. ++ */ ++ ++#ifndef __METAL_IO__H__ ++#error "Include metal/io.h instead of metal/uniproton/io.h" ++#endif ++ ++#ifndef __METAL_UNIPROTON_IO__H__ ++#define __METAL_UNIPROTON_IO__H__ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#ifdef METAL_INTERNAL ++/** ++ * @brief memory mapping for an I/O region ++ */ ++static inline void metal_sys_io_mem_map(struct metal_io_region *io) ++{ ++ (void)io; ++} ++#endif ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* __METAL_UNIPROTON_IO__H__ */ +diff -urN libmetal-2022.10.0/lib/system/uniproton/irq.h libmetal-m/lib/system/uniproton/irq.h +--- libmetal-2022.10.0/lib/system/uniproton/irq.h 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/lib/system/uniproton/irq.h 2023-08-23 14:30:40.272995300 +0800 +@@ -0,0 +1,27 @@ ++/* ++ * Copyright (c) 2017, Linaro Limited. and Contributors. All rights reserved. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++/* ++ * @file uniproton/irq.c ++ * @brief Uniproton libmetal irq definitions. ++ */ ++ ++#ifndef __METAL_IRQ__H__ ++#error "Include metal/irq.h instead of metal/uniproton/irq.h" ++#endif ++ ++#ifndef __METAL_UNIPROTON_IRQ__H__ ++#define __METAL_UNIPROTON_IRQ__H__ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* __METAL_UNIPROTON_IRQ__H__ */ +diff -urN libmetal-2022.10.0/lib/system/uniproton/log.h libmetal-m/lib/system/uniproton/log.h +--- libmetal-2022.10.0/lib/system/uniproton/log.h 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/lib/system/uniproton/log.h 2023-08-23 14:30:40.281995000 +0800 +@@ -0,0 +1,27 @@ ++/* ++ * Copyright (c) 2018, Xilinx Inc. and Contributors. All rights reserved. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++/* ++ * @file uniproton/log.h ++ * @brief Uniproton libmetal log handler definition. ++ */ ++ ++#ifndef __METAL_METAL_LOG__H__ ++#error "Include metal/log.h instead of metal/uniproton/log.h" ++#endif ++ ++#ifndef __METAL_UNIPROTON_LOG__H__ ++#define __METAL_UNIPROTON_LOG__H__ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* __METAL_UNIPROTON_LOG__H__ */ +diff -urN libmetal-2022.10.0/lib/system/uniproton/mutex.h libmetal-m/lib/system/uniproton/mutex.h +--- libmetal-2022.10.0/lib/system/uniproton/mutex.h 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/lib/system/uniproton/mutex.h 2023-08-23 14:30:40.292021000 +0800 +@@ -0,0 +1,73 @@ ++/* ++ * Copyright (c) 2017, Linaro Limited. and Contributors. All rights reserved. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++/* ++ * @file uniproton/mutex.h ++ * @brief Uniproton mutex primitives for libmetal. ++ */ ++ ++#ifndef __METAL_MUTEX__H__ ++#error "Include metal/mutex.h instead of metal/uniproton/mutex.h" ++#endif ++ ++#ifndef __METAL_UNIPROTON_MUTEX__H__ ++#define __METAL_UNIPROTON_MUTEX__H__ ++ ++#include "errno.h" ++#include "pthread.h" ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++typedef pthread_mutex_t metal_mutex_t; ++ ++/* ++ * METAL_MUTEX_INIT - used for initializing an mutex element in a static struct ++ * or global ++ */ ++#define METAL_MUTEX_INIT(m) MUTEX_INITIALIZER ++/* ++ * METAL_MUTEX_DEFINE - used for defining and initializing a global or ++ * static singleton mutex ++ */ ++#define METAL_MUTEX_DEFINE(m) metal_mutex_t m = MUTEX_INITIALIZER ++ ++static inline void __metal_mutex_init(metal_mutex_t *mutex) ++{ ++ pthread_mutex_init(mutex, NULL); ++} ++ ++static inline void __metal_mutex_deinit(metal_mutex_t *mutex) ++{ ++ pthread_mutex_destroy(mutex); ++} ++ ++static inline int __metal_mutex_try_acquire(metal_mutex_t *mutex) ++{ ++ return pthread_mutex_trylock(mutex); ++} ++ ++static inline int __metal_mutex_is_acquired(metal_mutex_t *mutex) ++{ ++ ++} ++ ++static inline void __metal_mutex_acquire(metal_mutex_t *mutex) ++{ ++ pthread_mutex_lock(mutex); ++} ++ ++static inline void __metal_mutex_release(metal_mutex_t *mutex) ++{ ++ pthread_mutex_unlock(mutex); ++} ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* __METAL_UNIPROTON_MUTEX__H__ */ +diff -urN libmetal-2022.10.0/lib/system/uniproton/shmem.c libmetal-m/lib/system/uniproton/shmem.c +--- libmetal-2022.10.0/lib/system/uniproton/shmem.c 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/lib/system/uniproton/shmem.c 2023-08-23 14:30:40.299996700 +0800 +@@ -0,0 +1,19 @@ ++/* ++ * Copyright (c) 2017, Linaro Limited. and Contributors. All rights reserved. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++/* ++ * ++ * @file uniproton/shmem.c ++ * @brief Uniproton libmetal shared memory handling. ++ */ ++ ++#include ++ ++int metal_shmem_open(const char *name, size_t size, ++ struct metal_io_region **io) ++{ ++ return metal_shmem_open_generic(name, size, io); ++} +diff -urN libmetal-2022.10.0/lib/system/uniproton/sleep.h libmetal-m/lib/system/uniproton/sleep.h +--- libmetal-2022.10.0/lib/system/uniproton/sleep.h 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/lib/system/uniproton/sleep.h 2023-08-23 15:11:46.876052000 +0800 +@@ -0,0 +1,35 @@ ++/* ++ * Copyright (c) 2018, Linaro Limited. and Contributors. All rights reserved. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++/* ++ * @file uniproton/sleep.h ++ * @brief Uniproton sleep primitives for libmetal. ++ */ ++ ++#ifndef __METAL_SLEEP__H__ ++#error "Include metal/sleep.h instead of metal/uniproton/sleep.h" ++#endif ++ ++#ifndef __METAL_UNIPROTON_SLEEP__H__ ++#define __METAL_UNIPROTON_SLEEP__H__ ++ ++#include "prt_task.h" ++#include "prt_config.h" ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++static inline int __metal_sleep_usec(unsigned int usec) ++{ ++ return PRT_TaskDelay((U32)(OS_TICK_PER_SECOND * usec / 1000000)); ++} ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* __METAL_UNIPROTON_SLEEP__H__ */ +diff -urN libmetal-2022.10.0/lib/system/uniproton/sys.h libmetal-m/lib/system/uniproton/sys.h +--- libmetal-2022.10.0/lib/system/uniproton/sys.h 1970-01-01 08:00:00.000000000 +0800 ++++ libmetal-m/lib/system/uniproton/sys.h 2023-08-23 14:30:40.316008700 +0800 +@@ -0,0 +1,39 @@ ++/* ++ * Copyright (c) 2017, Linaro Limited. and Contributors. All rights reserved. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++/* ++ * @file uniproton/sys.h ++ * @brief Uniproton system primitives for libmetal. ++ */ ++ ++#ifndef __METAL_SYS__H__ ++#error "Include metal/sys.h instead of metal/uniproton/sys.h" ++#endif ++ ++#ifndef __METAL_UNIPROTON_SYS__H__ ++#define __METAL_UNIPROTON_SYS__H__ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#define METAL_INIT_DEFAULTS \ ++{ \ ++ .log_handler = metal_default_log_handler, \ ++ .log_level = METAL_LOG_INFO, \ ++} ++ ++/** Structure of libmetal runtime state. */ ++struct metal_state { ++ /** Common (system independent) data. */ ++ struct metal_common_state common; ++}; ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* __METAL_UNIPROTON_SYS__H__ */ diff --git a/demos/sd3403/component/UniProton-patch-for-openamp.patch b/demos/sd3403/component/UniProton-patch-for-openamp.patch new file mode 100644 index 00000000..17522952 --- /dev/null +++ b/demos/sd3403/component/UniProton-patch-for-openamp.patch @@ -0,0 +1,68 @@ +diff -urN openamp-2022.10.1/CMakeLists.txt openamp-m/CMakeLists.txt +--- openamp-2022.10.1/CMakeLists.txt 2022-12-13 11:21:05.000000000 +0800 ++++ openamp-m/CMakeLists.txt 2023-08-23 14:47:20.356542000 +0800 +@@ -6,7 +6,13 @@ + if (POLICY CMP0077) + cmake_policy(SET CMP0077 NEW) + endif() +- ++include_directories( ++ ../../build/libmetal/output/usr/local/include ++ ../../component/open-amp/lib/include ++ ../../include ++ ../../include/libc/include ++ ../../config) ++set (CMAKE_SYSTEM_NAME Uniproton) + set (OPENAMP_ROOT_DIR "${CMAKE_CURRENT_SOURCE_DIR}") + set (OPENAMP_BIN_ROOT "${CMAKE_CURRENT_BINARY_DIR}") + +diff -urN openamp-2022.10.1/cmake/depends.cmake openamp-m/cmake/depends.cmake +--- openamp-2022.10.1/cmake/depends.cmake 2022-12-13 11:21:05.000000000 +0800 ++++ openamp-m/cmake/depends.cmake 2023-08-23 14:31:06.765009900 +0800 +@@ -1,5 +1,5 @@ + if (WITH_LIBMETAL_FIND) +- find_package (Libmetal REQUIRED) ++ #find_package (Libmetal REQUIRED) + collect (PROJECT_INC_DIRS "${LIBMETAL_INCLUDE_DIR}") + collect (PROJECT_LIB_DIRS "${LIBMETAL_LIB_DIR}") + collect (PROJECT_LIB_DEPS "${LIBMETAL_LIB}") +diff -urN openamp-2022.10.1/cmake/platforms/uniproton_arm64_gcc.cmake openamp-m/cmake/platforms/uniproton_arm64_gcc.cmake +--- openamp-2022.10.1/cmake/platforms/uniproton_arm64_gcc.cmake 1970-01-01 08:00:00.000000000 +0800 ++++ openamp-m/cmake/platforms/uniproton_arm64_gcc.cmake 2023-08-23 15:24:32.582574700 +0800 +@@ -0,0 +1,16 @@ ++#cross-compilation config ++ ++set(CMAKE_SYSTEM_PROCESSOR arm) ++set(PROJECT_SYSTEM uniproton) ++ ++set(CMAKE_C_COMPILER_WORKS 1) ++set(CMAKE_CXX_COMPILER_WORKS 1) ++ ++set(CROSS_PREFIX "${TOOLCHAIN_PATH}/bin/aarch64-none-elf-" CACHE STRING "") ++set(CMAKE_C_COMPILER "${CROSS_PREFIX}gcc" CACHE STRING "") ++set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER CACHE STRING "") ++set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY NEVER CACHE STRING "") ++set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE NEVER CACHE STRING "") ++set(CMAKE_C_FLAGS "-nostdlib -nostdinc") ++ ++# vim: expandtab:ts=2:sw=2:smartindent +diff -urN openamp-2022.10.1/cmake/platforms/uniproton_x86_64_gcc.cmake openamp-m/cmake/platforms/uniproton_x86_64_gcc.cmake +--- openamp-2022.10.1/cmake/platforms/uniproton_x86_64_gcc.cmake 1970-01-01 08:00:00.000000000 +0800 ++++ openamp-m/cmake/platforms/uniproton_x86_64_gcc.cmake 2023-08-09 16:49:52.661428400 +0800 +@@ -0,0 +1,16 @@ ++#cross-compilation config ++ ++set(CMAKE_SYSTEM_PROCESSOR x86_64) ++set(PROJECT_SYSTEM uniproton) ++ ++set(CMAKE_C_COMPILER_WORKS 1) ++set(CMAKE_CXX_COMPILER_WORKS 1) ++ ++set(CROSS_PREFIX "${TOOLCHAIN_PATH}/bin/x86_64-openeuler-linux-gnu-" CACHE STRING "") ++set(CMAKE_C_COMPILER "${CROSS_PREFIX}gcc" CACHE STRING "") ++set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER CACHE STRING "") ++set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY NEVER CACHE STRING "") ++set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE NEVER CACHE STRING "") ++set(CMAKE_C_FLAGS "-D_GNU_SOURCE -D_POSIX_THREADS -D_POSIX_THREAD_PRIORITY_SCHEDULING -D_POSIX_PRIORITY_SCHEDULING -D_POSIX_TIMERS -D_POSIX_CPUTIME -D_POSIX_THREAD_CPUTIME -D_POSIX_MONOTONIC_CLOCK -D_POSIX_TIMEOUTS -D_POSIX_CLOCK_SELECTION -D_POSIX_THREAD_PRIO_PROTECT -D_UNIX98_THREAD_MUTEX_ATTRIBUTES -D_POSIX_READER_WRITER_LOCKS" CACHE STRING "") ++ ++# vim: expandtab:ts=2:sw=2:smartindent diff --git a/demos/sd3403/config/CMakeLists.txt b/demos/sd3403/config/CMakeLists.txt new file mode 100644 index 00000000..db66e37b --- /dev/null +++ b/demos/sd3403/config/CMakeLists.txt @@ -0,0 +1,2 @@ +set(SRCS prt_config.c) +add_library(config OBJECT ${SRCS}) \ No newline at end of file diff --git a/demos/sd3403/config/prt_config.c b/demos/sd3403/config/prt_config.c new file mode 100644 index 00000000..0b1cde31 --- /dev/null +++ b/demos/sd3403/config/prt_config.c @@ -0,0 +1,484 @@ +/* + * Copyright (c) 2009-2022 Huawei Technologies Co., Ltd. All rights reserved. + * + * UniProton is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + * Create: 2009-12-22 + * Description: UniProton的初始化C文件。 + */ +#include "prt_config_internal.h" +#include "cpu_config.h" +#include "prt_cpu_external.h" +#include "prt_log.h" + +#if (defined(OS_OPTION_SMP) || defined(OS_ARMV8)) +RESET_SEC_DATA U32 g_cfgPrimaryCore = OS_SYS_CORE_PRIMARY; +#endif +#if defined(OS_OPTION_SMP) +extern U32 g_slaveTickEnable; +#endif + +#if defined(LOG_TESTCASE) +void Init(uintptr_t param1, uintptr_t param2, uintptr_t param3, uintptr_t param4); +#endif + +OS_SEC_ALW_INLINE INLINE void OsConfigAddrSizeGet(uintptr_t addr, uintptr_t size, + uintptr_t *destAddr, uintptr_t *destSize) +{ + *destAddr = addr; + *destSize = size; +} + +U32 OsMemConfigReg(void) +{ + U32 ret; + + ret = OsFscMemInit(OS_MEM_FSC_PT_ADDR, OS_MEM_FSC_PT_SIZE); + if (ret != OS_OK) { + return ret; + } + + return OS_OK; +} + +U32 OsMemDefPtInit(void) +{ + return OS_OK; +} + +U32 OsMemConfigInit(void) +{ + /* 系统默认FSC内存分区初始化 */ + return OsMemDefPtInit(); +} + +#if defined(OS_ARCH_ARMV8) +U64 GetGenericTimerFreq(void); +#endif + +U32 OsSystemReg(void) +{ + struct SysModInfo sysModInfo; + +#if defined(OS_ARCH_ARMV8) + sysModInfo.systemClock = (U32)GetGenericTimerFreq(); +#else + sysModInfo.systemClock = OS_SYS_CLOCK; +#endif + sysModInfo.cpuType = OS_CPU_TYPE; + sysModInfo.sysTimeHook = OS_SYS_TIME_HOOK; +#if defined(OS_OPTION_SMP) + sysModInfo.coreRunNum = OS_SYS_CORE_RUN_NUM; + sysModInfo.coreMaxNum = OS_SYS_CORE_MAX_NUM; + sysModInfo.corePrimary = OS_SYS_CORE_PRIMARY; +#endif +#if defined(OS_OPTION_HWI_MAX_NUM_CONFIG) + sysModInfo.hwiMaxNum = OS_HWI_MAX_NUM_CONFIG; +#endif + + return OsSysRegister(&sysModInfo); +} + +#if (OS_INCLUDE_SEM == YES) +U32 OsSemConfigReg(void) +{ + struct SemModInfo semModInfo; + + semModInfo.maxNum = OS_SEM_MAX_SUPPORT_NUM; + return OsSemRegister(&semModInfo); + +} +#endif + +#if (OS_INCLUDE_TASK == YES) +void OsTaskInfoSet(struct TskModInfo *taskModInfo) +{ + taskModInfo->maxNum = OS_TSK_MAX_SUPPORT_NUM; + taskModInfo->defaultSize = OS_TSK_DEFAULT_STACK_SIZE; + taskModInfo->idleStackSize = OS_TSK_IDLE_STACK_SIZE; + taskModInfo->magicWord = WORD_PACK((U32)OS_TSK_STACK_MAGIC_WORD); +} +#else +#error "OS_INCLUDE_TASK MUST BE YES! The SWI has been cut out，the task can not cut out." +#endif + +U32 OsHookConfigReg(void) +{ + struct HookModInfo hookModInfo; + + hookModInfo.maxNum[OS_HOOK_HWI_ENTRY] = OS_HOOK_HWI_ENTRY_NUM; + hookModInfo.maxNum[OS_HOOK_HWI_EXIT] = OS_HOOK_HWI_EXIT_NUM; + hookModInfo.maxNum[OS_HOOK_TSK_CREATE] = OS_HOOK_TSK_CREATE_NUM; + hookModInfo.maxNum[OS_HOOK_TSK_DELETE] = OS_HOOK_TSK_DELETE_NUM; + hookModInfo.maxNum[OS_HOOK_TSK_SWITCH] = OS_HOOK_TSK_SWITCH_NUM; + hookModInfo.maxNum[OS_HOOK_IDLE_PERIOD] = OS_HOOK_IDLE_NUM; + + return OsHookRegister(&hookModInfo); +} + +U32 OsSysConfigReg(void) +{ + U32 ret; + + ret = OsSystemReg(); + if (ret != OS_OK) { + return ret; + } + return OS_OK; +} + +#if (OS_INCLUDE_TICK == YES) +U32 OsTickConfigReg(void) +{ + struct TickModInfo tickModInfo; + + tickModInfo.tickPerSecond = OS_TICK_PER_SECOND; + tickModInfo.tickPriority = 0; + + return OsTickRegister(&tickModInfo); +} +#endif + +#if (OS_INCLUDE_TASK == YES) +U32 OsTskConfigReg(void) +{ + struct TskModInfo taskModInfo; + OsTaskInfoSet(&taskModInfo); + return OsTskRegister(&taskModInfo); +} +#endif + +#if (OS_INCLUDE_QUEUE == YES) +U32 OsQueueConfigReg(void) +{ + return OsQueueRegister(OS_QUEUE_MAX_SUPPORT_NUM); +} +#endif + +#if (OS_INCLUDE_CPUP == YES) +U32 OsCpupConfigReg(void) +{ + struct CpupModInfo cpupModInfo; + + cpupModInfo.cpupWarnFlag = (bool)OS_CONFIG_CPUP_WARN; + cpupModInfo.sampleTime = OS_CPUP_SAMPLE_INTERVAL; + cpupModInfo.warn = OS_CPUP_SHORT_WARN; + cpupModInfo.resume = OS_CPUP_SHORT_RESUME; + + return OsCpupRegister(&cpupModInfo); +} +#endif + +#if (OS_INCLUDE_TICK_SWTMER == YES) +U32 OsSwTmrConfigInit(void) +{ + return OsSwTmrInit(OS_TICK_SWITIMER_MAX_NUM); +} +#endif + +#if (OS_INCLUDE_CPUP == YES) +#if (OS_INCLUDE_TICK == NO) +#error "OS_INCLUDE_CPUP depend on OS_INCLUDE_TICK!" +#endif +U32 OsCpupConfigInit(void) +{ + U32 ret; + + ret = OsCpupInit(); + if (ret != OS_OK) { + return ret; + } + + if (OS_CONFIG_CPUP_WARN == YES) { +#if defined(OS_OPTION_CPUP_WARN) + OsCpupWarnInit(); +#else + return OS_ERRNO_SYS_NO_CPUP_WARN; +#endif + } + return OS_OK; +} +#endif + +#if (OS_INCLUDE_SEM == YES) +U32 OsSemConfigInit(void) +{ + return OsSemInit(); +} +#endif + +#if (OS_INCLUDE_TASK == YES) +U32 OsTskConfigInit(void) +{ + return OsTskInit(); +} +#endif + +#if defined(OS_OPTION_SMP) +INIT_SEC_L4_TEXT U32 OsSchedRunQueConfigInit(void) +{ + OsSchedRunQueInit(); + return OS_OK; +} +#endif + +static U32 OsHwiConfigReg(void) +{ +#if (OS_INCLUDE_GIC_BASE_ADDR_CONFIG == YES) + U32 ret; + ret = OsGicConfigRegister((uintptr_t)OS_GIC_BASE_ADDR, (uintptr_t)OS_GICR_OFFSET, (uintptr_t)OS_GICR_STRIDE); + if (ret != OS_OK) { + return ret; + } +#endif + return OS_OK; +} + +#if defined(OS_OPTION_LOG) +static U32 PRT_LogMemInit(void) +{ + PRT_LogInit(MMU_LOG_MEM_ADDR); + (void)PRT_Log(OS_LOG_INFO, OS_LOG_F1, "PRT_Log init success1", 21); + return OS_OK; +} +#endif + +/* 系统初始化注册表 */ +struct OsModuleConfigInfo g_moduleConfigTab[] = { + /* {模块号， 模块注册函数， 模块初始化函数} */ +#if defined(OS_OPTION_LOG) + {OS_MID_LOG, {NULL, PRT_LogMemInit}}, +#endif + {OS_MID_SYS, {OsSysConfigReg, NULL}}, + {OS_MID_MEM, {OsMemConfigReg, OsMemConfigInit}}, + {OS_MID_HWI, {OsHwiConfigReg, OsHwiConfigInit}}, + {OS_MID_HARDDRV, {NULL, PRT_HardDrvInit}}, + {OS_MID_HOOK, {OsHookConfigReg, OsHookConfigInit}}, + {OS_MID_EXC, {NULL, OsExcConfigInit}}, +#if defined(OS_OPTION_SMP) + {OS_MID_SCHED, {NULL, OsSchedRunQueConfigInit}}, +#endif +#if (OS_INCLUDE_TASK == YES) + {OS_MID_TSK, {OsTskConfigReg, OsTskConfigInit}}, +#endif +#if (OS_INCLUDE_TICK == YES) + {OS_MID_TICK, {OsTickConfigReg, OsTickConfigInit}}, +#endif + +#if (OS_INCLUDE_TICK_SWTMER == YES) + {OS_MID_SWTMR, {NULL, OsSwTmrConfigInit}}, +#endif + +#if (OS_INCLUDE_CPUP == YES) + {OS_MID_CPUP, {OsCpupConfigReg, OsCpupConfigInit}}, +#endif +#if (OS_INCLUDE_SEM == YES) + {OS_MID_SEM, {OsSemConfigReg, OsSemConfigInit}}, +#endif +#if (OS_INCLUDE_QUEUE == YES) + {OS_MID_QUEUE, {OsQueueConfigReg, OsQueueConfigInit}}, +#endif + {OS_MID_APP, {NULL, PRT_AppInit}}, + + {OS_MID_BUTT, {NULL, NULL}}, +}; + +/* + * 描述：OS模块注册、初始化运行函数 + */ +U32 OsModuleConfigRun(enum OsinitPhaseId initPhaseId, U32 initPhase) +{ + U32 idx = 0; + U32 ret = OS_OK; + while (g_moduleConfigTab[idx].moudleId != OS_MID_BUTT) { + if (g_moduleConfigTab[idx].moudleConfigFunc[initPhaseId] == NULL) { + idx++; + continue; + } + ret = g_moduleConfigTab[idx].moudleConfigFunc[initPhaseId](); + if (ret != OS_OK) { + break; + } + idx++; + } + return ret; +} +U32 OsRegister(void) +{ + return OsModuleConfigRun(OS_REGISTER_ID, OS_REGISTER_PHASE); +} + +/* + * 描述：OsInitialize阶段 + */ +U32 OsInitialize(void) +{ + return OsModuleConfigRun(OS_INIT_ID, OS_INITIALIZE_PHASE); +} + +/* + * 描述：OsStart阶段 + */ +U32 OsStart(void) +{ + U32 ret; +#if (OS_INCLUDE_TICK == YES) + /* 表示系统在进行启动阶段，匹配MOUDLE_ID之后，标记进入TICK模块的启动 */ + ret = OsTickStart(); + if (ret != OS_OK) { + return ret; + } +#endif +#if (OS_INCLUDE_TASK == YES) + /* 表示系统在进行启动阶段，匹配MOUDLE_ID之后，标记进入任务模块的启动 */ +#if defined(LOG_TESTCASE) + if(OsGetCoreID() != g_cfgPrimaryCore) { + (void)PRT_Log(OS_LOG_INFO, OS_LOG_F1, "slv init enter", 14); + Init(0, 0, 0, 0); + } +#endif + ret = OsActivate(); +#else + ret = OS_OK; +#endif + + return ret; +} + +#if defined(OS_OPTION_SMP) +INIT_SEC_L4_TEXT U32 OsSlaveSchedTriggerOtherCoreInit(void) +{ + U32 ret; + ret = PRT_HwiEnable(OS_SMP_SCHED_TRIGGER_OTHER_CORE_SGI); + if (ret != OS_OK) { + return ret; + } + return ret; +} + +INIT_SEC_L4_TEXT U32 OsSlaveTskRecycleIPCInit(void) +{ + U32 ret; + ret = PRT_HwiEnable(OS_SMP_MC_CORE_IPC_SGI); + if (ret != OS_OK) { + return ret; + } + return ret; +} + +#if defined(OS_OPTION_POWEROFF) +INIT_SEC_L4_TEXT U32 OsStopOtherCoreInit(void) +{ + U32 ret; + ret = PRT_HwiEnable(OS_SMP_EXC_STOP_OTHER_CORE_SGI); + if (ret != OS_OK) { + return ret; + } + return ret; +} +#endif + +INIT_SEC_L4_TEXT U32 OsTickTriggerOtherCoreInit(void) +{ + U32 ret; + ret = PRT_HwiEnable(OS_SMP_TICK_TRIGGER_OTHER_CORE_SGI); + if (ret != OS_OK) { + return ret; + } + if (OsGetCoreID() == (OS_SYS_CORE_PRIMARY + OS_SYS_CORE_RUN_NUM - 1)) { + g_slaveTickEnable = TRUE; + } + return ret; +} + +INIT_SEC_L4_TEXT U32 OsSmpPreInit(void) +{ + U32 ret; + if(OsGetCoreID() != OS_SYS_CORE_PRIMARY) { + ret = OsModuleInit(); + if(ret != OS_OK) { + return ret; + } + + ret = OsSlaveSchedTriggerOtherCoreInit(); + if (ret != OS_OK) { + return ret; + } + + ret = OsSlaveTskRecycleIPCInit(); + if (ret != OS_OK) { + return ret; + } + +#if defined(OS_OPTION_TICKLESS) + ret = OsTickTriggerOtherCoreInit(); + if (ret != OS_OK) { + return ret; + } +#else + ret = OsCoreTimerSecondaryInit(); + if (ret != OS_OK) { + return ret; + } +#endif + +#if defined(OS_OPTION_POWEROFF) + ret = OsStopOtherCoreInit(); + if (ret != OS_OK) { + return ret; + } +#endif + + ret = OsStart(); + if(ret != OS_OK) { + return ret; + } + + /* 正常情况执行不应该到达这 */ + return OS_FAIL; + } + return OS_OK; + +} +#endif + +S32 OsConfigStart(void) +{ + U32 ret; + +#if defined(OS_OPTION_SMP) + ret = OsSmpPreInit(); + if(ret != OS_OK) { + return (S32)ret; + } +#endif + + OsHwInit(); + + /* OS模块注册 */ + ret = OsRegister(); + if (ret != OS_OK) { + return (S32)ret; + } + + /* OS模块初始化 */ + ret = OsInitialize(); + if (ret != OS_OK) { + return (S32)ret; + } + + /* OS启动调度 */ + ret = OsStart(); + if (ret != OS_OK) { + return (S32)ret; + } + + /* Execution should not reach this point */ + return (S32)OS_ERROR; +} diff --git a/demos/sd3403/config/prt_config.h b/demos/sd3403/config/prt_config.h new file mode 100644 index 00000000..1e428b4e --- /dev/null +++ b/demos/sd3403/config/prt_config.h @@ -0,0 +1,128 @@ +/* + * Copyright (c) 2009-2022 Huawei Technologies Co., Ltd. All rights reserved. + * + * UniProton is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + * Create: 2009-12-22 + * Description: UniProton配置头文件，裁剪开关和配置项。 + */ +#ifndef PRT_CONFIG_H +#define PRT_CONFIG_H + +#include "prt_buildef.h" +#include "prt_typedef.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +/* ***************************** 配置系统基本信息 ******************************* */ +/* 芯片主频 */ +#define OS_SYS_CLOCK 48000000 +/* 用户注册的获取系统时间的函数*/ +#define OS_SYS_TIME_HOOK NULL +/* 实际运行的核数，单位：个 */ +#define OS_SYS_CORE_RUN_NUM 1 +/* 最大可支持的核数，单位：个 */ +#define OS_SYS_CORE_MAX_NUM 4 +/* 主核ID */ +#define OS_SYS_CORE_PRIMARY 3 + +/* ***************************** 中断模块配置 ************************** */ +/* 硬中断最大支持个数 */ +#define OS_HWI_MAX_NUM_CONFIG 150 + +/* ***************************** 配置Tick中断模块 *************************** */ +/* Tick中断模块裁剪开关 */ +#define OS_INCLUDE_TICK YES +/* Tick中断时间间隔，tick处理时间不能超过1/OS_TICK_PER_SECOND(s) */ +#define OS_TICK_PER_SECOND 100 + +/* ***************************** 配置定时器模块 ***************************** */ +/* 基于TICK的软件定时器裁剪开关 */ +#define OS_INCLUDE_TICK_SWTMER YES +/* 基于TICK的软件定时器最大个数 */ +#define OS_TICK_SWITIMER_MAX_NUM 32 + +/* ***************************** 配置任务模块 ******************************* */ +/* 任务模块裁剪开关 */ +#define OS_INCLUDE_TASK YES +/* 最大支持的任务数,最大共支持254个 */ +#define OS_TSK_MAX_SUPPORT_NUM 32 +/* 缺省的任务栈大小 */ +#define OS_TSK_DEFAULT_STACK_SIZE 0x1000 +/* IDLE任务栈的大小 */ +#define OS_TSK_IDLE_STACK_SIZE 0x1000 +/* 任务栈初始化魔术字，默认是0xCA，只支持配置一个字节 */ +#define OS_TSK_STACK_MAGIC_WORD 0xCA + +/* ***************************** 配置CPU占用率及CPU告警模块 **************** */ +/* CPU占用率模块裁剪开关 */ +#define OS_INCLUDE_CPUP YES +/* 采样时间间隔(单位tick)，若其值大于0，则作为采样周期，否则两次调用PRT_CpupNow或PRT_CpupThread间隔作为周期 */ +#define OS_CPUP_SAMPLE_INTERVAL 1000 +/* CPU占用率告警动态配置项 */ +#define OS_CONFIG_CPUP_WARN YES +/* CPU占用率告警阈值(精度为万分比) */ +#define OS_CPUP_SHORT_WARN 8500 +/* CPU占用率告警恢复阈值(精度为万分比) */ +#define OS_CPUP_SHORT_RESUME 7500 + +/* ***************************** 配置内存管理模块 ************************** */ +/* 用户可以创建的最大分区数，取值范围[0,253] */ +#define OS_MEM_MAX_PT_NUM 200 +/* 私有FSC内存分区起始地址 */ +#define OS_MEM_FSC_PT_ADDR (uintptr_t)&g_memRegion00[0] +/* 私有FSC内存分区大小 */ +#define OS_MEM_FSC_PT_SIZE 0x80000 + +/* ***************************** 配置信号量管理模块 ************************* */ +/* 信号量模块裁剪开关 */ +#define OS_INCLUDE_SEM YES + +/* 最大支持的信号量数 */ +#define OS_SEM_MAX_SUPPORT_NUM 10 + +/* ***************************** 配置队列模块 ******************************* */ +/* 队列模块裁剪开关 */ +#define OS_INCLUDE_QUEUE YES +/* 最大支持的队列数,范围(0,0xFFFF] */ +#define OS_QUEUE_MAX_SUPPORT_NUM 10 + +/* ************************* 钩子模块配置 *********************************** */ +/* 硬中断进入钩子最大支持个数, 范围[0, 255] */ +#define OS_HOOK_HWI_ENTRY_NUM 5 +/* 硬中断退出钩子最大支持个数, 范围[0, 255] */ +#define OS_HOOK_HWI_EXIT_NUM 5 +/* 任务创建钩子最大支持个数, 范围[0, 255] */ +#define OS_HOOK_TSK_CREATE_NUM 1 +/* 任务删除钩子最大支持个数, 范围[0, 255] */ +#define OS_HOOK_TSK_DELETE_NUM 1 +/* 任务切换钩子最大支持个数, 范围[0, 255] */ +#define OS_HOOK_TSK_SWITCH_NUM 8 +/* IDLE钩子最大支持个数, 范围[0, 255] */ +#define OS_HOOK_IDLE_NUM 4 + +/* ************************* GIC模块配置 *********************************** */ +/* GIC地址可配置开关 */ +#define OS_INCLUDE_GIC_BASE_ADDR_CONFIG YES + +extern U8 g_memRegion00[]; + +S32 OsConfigStart(void); + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cpluscplus */ +#endif /* __cpluscplus */ + +#endif /* PRT_CONFIG_H */ diff --git a/demos/sd3403/config/prt_config_internal.h b/demos/sd3403/config/prt_config_internal.h new file mode 100644 index 00000000..c6f6dc04 --- /dev/null +++ b/demos/sd3403/config/prt_config_internal.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2009-2022 Huawei Technologies Co., Ltd. All rights reserved. + * + * UniProton is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + * Create: 2009-12-22 + * Description: UniProton配置私有文件。 + */ +#ifndef PRT_CONFIG_INTERNAL_H +#define PRT_CONFIG_INTERNAL_H + +#include +#include "prt_config.h" +#include "prt_sys.h" +#include "prt_task.h" +#include "prt_sem.h" +#include "prt_tick.h" +#include "prt_exc.h" +#include "prt_cpup.h" +#include "prt_mem.h" +#include "prt_hook.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cpluscplus */ +#endif /* __cpluscplus */ + +#define WORD_PACK(val) (((val) << 24) | ((val) << 16) | ((val) << 8) | (val)) + +/* UniProton模块注册函数的声明 */ +extern U32 OsFscMemInit(U32 addr, U32 size); +extern U32 OsSysRegister(struct SysModInfo *modInfo); +extern U32 OsTickRegister(struct TickModInfo *modInfo); +extern U32 OsTskRegister(struct TskModInfo *modInfo); +extern U32 OsCpupRegister(struct CpupModInfo *modInfo); +extern U32 OsSemRegister(const struct SemModInfo *modInfo); +extern U32 OsHookRegister(struct HookModInfo *modInfo); + +#if defined(OS_OPTION_SMP) +extern U32 OsModuleInit(void); +extern void OsSchedRunQueInit(void); +#endif +extern U32 OsHwiConfigInit(void); +extern U32 OsTickConfigInit(void); +extern U32 OsTskInit(void); +extern U32 OsCpupInit(void); +extern void OsCpupWarnInit(void); +extern U32 OsExcConfigInit(void); +extern U32 OsSemInit(void); +extern U32 OsHookConfigInit(void); + +/* UniProton系统启动相关函数的声明 */ +extern void OsHwInit(void); +extern U32 OsActivate(void); +extern U32 OsTickStart(void); +extern U32 PRT_HardDrvInit(void); +extern void PRT_HardBootInit(void); +extern U32 PRT_AppInit(void); + +extern U32 OsQueueRegister(U16 maxQueue); +extern U32 OsQueueConfigInit(void); +extern U32 OsGicConfigRegister(uintptr_t gicdBase, uintptr_t gicrOffset, uintptr_t gicrStride); +#if (OS_INCLUDE_TICK_SWTMER == YES) +extern U32 OsSwTmrInit(U32 maxTimerNum); +#endif + +enum OsinitPhaseId { + OS_REGISTER_ID = 0, + OS_INIT_ID, + OS_MOUDLE_CONFIG +}; +typedef U32 (*ConfigInitFunc)(void); +struct OsModuleConfigInfo { + enum MoudleId moudleId; + ConfigInitFunc moudleConfigFunc[OS_MOUDLE_CONFIG]; +}; +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cpluscplus */ +#endif /* __cpluscplus */ + +#endif /* PRT_CONFIG_INTERNAL_H */ diff --git a/demos/sd3403/libs/.keep b/demos/sd3403/libs/.keep new file mode 100644 index 00000000..e69de29b diff --git a/src/include/uapi/prt_buildef_common.h b/src/include/uapi/prt_buildef_common.h index a4992216..1f836a6d 100755 --- a/src/include/uapi/prt_buildef_common.h +++ b/src/include/uapi/prt_buildef_common.h @@ -46,7 +46,8 @@ #define OS_KP920_LITE 0x0e #define OS_HI3095 0x0f #define OS_D9_SECURE 0x10 -#define OS_CPU_TYPE_INVALID 0x11 +#define OS_SD3403 0x11 +#define OS_CPU_TYPE_INVALID 0x12 #ifndef INIT_SEC_L4_TEXT #define INIT_SEC_L4_TEXT diff --git a/testsuites/posixtestsuite/conformance/CMakeLists.txt b/testsuites/posixtestsuite/conformance/CMakeLists.txt index 3718e3be..7c898fca 100755 --- a/testsuites/posixtestsuite/conformance/CMakeLists.txt +++ b/testsuites/posixtestsuite/conformance/CMakeLists.txt @@ -481,7 +481,7 @@ file(GLOB_RECURSE ALL_RWFLAG_SRC ${CMAKE_CURRENT_SOURCE_DIR}/definitions/rwflag/ file(GLOB_RECURSE ALL_EXIT_SRC ${CMAKE_CURRENT_SOURCE_DIR}/interfaces/exit/*.c) -if(${CPU_TYPE} STREQUAL "x86_64" OR ${CPU_TYPE} STREQUAL "rk3568_jailhouse" OR ${CPU_TYPE} STREQUAL "rk3588" OR ${CPU_TYPE} STREQUAL "ascend310b" OR ${CPU_TYPE} STREQUAL "hi3093" OR ${CPU_TYPE} STREQUAL "hi3095" OR ${CPU_TYPE} STREQUAL "e2000q" OR ${CPU_TYPE} STREQUAL "kp920" OR ${CPU_TYPE} STREQUAL "kp920_lite") +if(${CPU_TYPE} STREQUAL "x86_64" OR ${CPU_TYPE} STREQUAL "rk3568_jailhouse" OR ${CPU_TYPE} STREQUAL "rk3588" OR ${CPU_TYPE} STREQUAL "ascend310b" OR ${CPU_TYPE} STREQUAL "hi3093" OR ${CPU_TYPE} STREQUAL "hi3095" OR ${CPU_TYPE} STREQUAL "e2000q" OR ${CPU_TYPE} STREQUAL "kp920" OR ${CPU_TYPE} STREQUAL "kp920_lite" OR ${CPU_TYPE} STREQUAL "sd3403") include_directories(../include) elseif(${CPU_TYPE} STREQUAL "m4") list(APPEND OBJS @@ -557,5 +557,7 @@ else() add_library(posixTest OBJECT ${ALL_SRC}) elseif(${CPU_TYPE} STREQUAL "hi3095") add_library(posixTest OBJECT ${ALL_SRC}) + elseif(${CPU_TYPE} STREQUAL "sd3403") + add_library(posixTest OBJECT ${ALL_SRC}) endif() endif() \ No newline at end of file diff --git a/testsuites/rhealstone/CMakeLists.txt b/testsuites/rhealstone/CMakeLists.txt index 927eb5c5..893d3f83 100755 --- a/testsuites/rhealstone/CMakeLists.txt +++ b/testsuites/rhealstone/CMakeLists.txt @@ -46,7 +46,9 @@ if (${CPU_TYPE} STREQUAL "ascend310b" OR ${CPU_TYPE} STREQUAL "rk3568_jailhouse" OR ${CPU_TYPE} STREQUAL "rk3588" OR ${CPU_TYPE} STREQUAL "e2000q" OR - ${CPU_TYPE} STREQUAL "x86_64" OR ${CPU_TYPE} STREQUAL "armv8") + ${CPU_TYPE} STREQUAL "x86_64" OR + ${CPU_TYPE} STREQUAL "armv8" OR + ${CPU_TYPE} STREQUAL "sd3403") add_library(rhealstoneTest OBJECT ${ALL_SRC} ./support/banchmark_support.c) target_include_directories(rhealstoneTest PUBLIC ./support) endif() -- Gitee