From 9000e7f7f6c13185d507d0ace3db41597f23d0a7 Mon Sep 17 00:00:00 2001
From: liyunfei <liyunfei33@huawei.com>
Date: Sun, 28 Sep 2025 11:23:21 +0800
Subject: [PATCH] add docs\zh\llvm\llvm_for_openeuler_option_list.md

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 create mode 100644 docs/zh/llvm/llvm_for_openeuler_option_list.md

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+#  LLVM for openEuler 优化选项列表
+
+LLVM for openEuler 支持通过 -mllvm 驱动的自定义优化选项，由于基于鲲鹏架构优化，使能自定义优化选项通常需要指定鲲鹏架构，如-mcpu=tsv110
+
+`-mllvm -profile-summary-cutoff-hot-icp=\<num\>`
+
+LLVM 的 Indirect Call Promotion（ICP）优化可以将函数间接调用转化为直接调用。该选项用于设置 ICP 优化阈值，从而解决软件规模过大时优化阈值过高的问题。当前语言支持 C/C++，后端支持 AArch64。
+
+`-mllvm -loop-versioning-overlap=\<true|false\>`
+
+针对手写循环进行的内存拷贝，生成特化版本，提升内存拷贝的效率。当前语言支持 C/C++，后端支持 AArch64。
+
+`-mllvm -indirect-load-prefetch=\<true|false\>`
+
+`-mllvm -outer-loop-prefetch=\<true|false\>`
+
+`-mllvm -random-access-prefetch-only=\<true|false\>`
+
+`-mllvm -disable-direct-prefetch=\<true|false\>`
+
+`-mllvm -indirect-prefetch-skip-intermediate=\<true|false\>`
+
+提升编译器预取能力，主要包括：
+
+- 间接内存访问预取
+
+- Crc哈希间接内存访问
+
+选项关系如下表所示
+
+||inner loop direct load prefetch|inner loop indirect load prefetch|outer loop direct load prefetch|outer loop indirect load prefetch|
+|-|-|-|-|-|
+|default|√| | | |
+|indirect-load-prefetch|√|√| | |
+|outer-loop-prefetch|√| |√| |
+|indirect-load-prefetch,outer-loop-prefetch|√|√|√|√|
+|indirect-load-prefetch,outer-loop-prefetch,random-access-prefetch-only|√|√(hash indirect load type only)| |√ (hash indirect load type only)|
+|indirect-load-prefetch,outer-loop-prefetch,disable-direct-prefetch| |√| |√|
+|indirect-load-prefetch,outer-loop-prefetch,indirect-prefetch-skip-intermediate|√|√ (exclude B[i] prefetch in A[B[i]])|√|√ (exclude B[i] prefetch in A[B[i]])|
+
+当前语言支持 C/C++，后端支持 AArch64。
+
+# LLVM for openEuler 功能选项列表
+
+`-fgcc-compatible`
+
+开启 LLVM for openEuler 对 GCC 编译器的兼容性特性，包括但不限于对编译器不识别的 GCC 功能性选项的告警严重程度降级至 warning。
-- 
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