diff --git a/arch/loongarch/configs/loongson3_defconfig b/arch/loongarch/configs/loongson3_defconfig index 392ea7437a09cc681ae890a28d31f8de7824f160..ed75f2f6afcb11aa9942055d85abfaf2fd96c967 100644 --- a/arch/loongarch/configs/loongson3_defconfig +++ b/arch/loongarch/configs/loongson3_defconfig @@ -2185,6 +2185,7 @@ CONFIG_CRC_T10DIF=y CONFIG_CRC_ITU_T=y CONFIG_CRC7=m CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=0 CONFIG_PRINTK_TIME=y CONFIG_PRINTK_CALLER=y CONFIG_BOOT_PRINTK_DELAY=y diff --git a/arch/loongarch/kernel/cacheinfo.c b/arch/loongarch/kernel/cacheinfo.c index c7988f757281cbc22116286aad2921acd5b64c83..8e231b0d2cd6c9bce2aac348f9d0d2dea471c347 100644 --- a/arch/loongarch/kernel/cacheinfo.c +++ b/arch/loongarch/kernel/cacheinfo.c @@ -51,6 +51,12 @@ static void cache_cpumap_setup(unsigned int cpu) continue; sib_leaf = sib_cpu_ci->info_list + index; + /* SMT cores share all caches */ + if (cpus_are_siblings(i, cpu)) { + cpumask_set_cpu(cpu, &sib_leaf->shared_cpu_map); + cpumask_set_cpu(i, &this_leaf->shared_cpu_map); + } + /* Node's cores share shared caches */ if (cache_leaves_are_shared(this_leaf, sib_leaf)) { cpumask_set_cpu(cpu, &sib_leaf->shared_cpu_map); cpumask_set_cpu(i, &this_leaf->shared_cpu_map); diff --git a/arch/loongarch/mm/cache.c b/arch/loongarch/mm/cache.c index 6be04d36ca0769658a2b52d25af50dd6ad7e07e0..f6cda2b5d7382754026a4eefa3591fc3ced57f84 100644 --- a/arch/loongarch/mm/cache.c +++ b/arch/loongarch/mm/cache.c @@ -63,6 +63,28 @@ static void flush_cache_leaf(unsigned int leaf) } while (--nr_nodes > 0); } +static void flush_cache_last_level(unsigned int leaf) +{ + u64 addr; + int i, j, nr_nodes, way_size; + struct cache_desc *cdesc = current_cpu_data.cache_leaves + leaf; + + nr_nodes = loongson_sysconf.nr_nodes; + + addr = CSR_DMW1_BASE; + iocsr_write8(0x1, 0x280); + way_size = cdesc->sets * cdesc->linesz; + do { + for (i = 0; i < (cdesc->ways * 3); i++) { + for (j = 0; j < (cdesc->sets); j++) { + READ_ONCE(*(u32 *)addr); + addr += cdesc->linesz; + } + } + addr += 0x100000000000; + } while (--nr_nodes > 0); +} + asmlinkage __visible void __flush_cache_all(void) { int leaf; @@ -71,7 +93,7 @@ asmlinkage __visible void __flush_cache_all(void) leaf = cache_present - 1; if (cache_inclusive(cdesc + leaf)) { - flush_cache_leaf(leaf); + flush_cache_last_level(leaf); return; } diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c index fe5e30662017deb47233ce11612dc1c1b4b0009b..736c291876355cb43f9ee632c1a4998b43ee8985 100644 --- a/drivers/bluetooth/btusb.c +++ b/drivers/bluetooth/btusb.c @@ -4645,6 +4645,9 @@ static int btusb_suspend(struct usb_interface *intf, pm_message_t message) if (data->suspend_count++) return 0; +#ifdef CONFIG_LOONGARCH + mdelay(1); +#endif spin_lock_irq(&data->txlock); if (!(PMSG_IS_AUTO(message) && data->tx_in_flight)) { set_bit(BTUSB_SUSPENDING, &data->flags); diff --git a/drivers/net/ethernet/intel/ice/ice_lag.c b/drivers/net/ethernet/intel/ice/ice_lag.c index 4e675c7c199fa1f41b339144651250ce33759e67..b460ea4f5fc8f39b05c3c077a372a19fcd608fec 100644 --- a/drivers/net/ethernet/intel/ice/ice_lag.c +++ b/drivers/net/ethernet/intel/ice/ice_lag.c @@ -1806,9 +1806,7 @@ static int ice_create_lag_recipe(struct ice_hw *hw, u16 *rid, new_rcp->content.act_ctrl_fwd_priority = prio; new_rcp->content.rid = *rid | ICE_AQ_RECIPE_ID_IS_ROOT; new_rcp->recipe_indx = *rid; - bitmap_zero((unsigned long *)new_rcp->recipe_bitmap, - ICE_MAX_NUM_RECIPES); - set_bit(*rid, (unsigned long *)new_rcp->recipe_bitmap); + put_unaligned_le64(BIT_ULL(*rid), new_rcp->recipe_bitmap); err = ice_aq_add_recipe(hw, new_rcp, 1, NULL); if (err) diff --git a/drivers/net/ethernet/intel/ice/ice_switch.c b/drivers/net/ethernet/intel/ice/ice_switch.c index 19f730a68fa21c4f7ebe00af47de1d7e49a0a9d5..36685b2923bdc0c0697342d33dc294cbdfce3c74 100644 --- a/drivers/net/ethernet/intel/ice/ice_switch.c +++ b/drivers/net/ethernet/intel/ice/ice_switch.c @@ -5071,10 +5071,8 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm, } /* fill recipe dependencies */ - bitmap_zero((unsigned long *)buf[recps].recipe_bitmap, - ICE_MAX_NUM_RECIPES); - set_bit(buf[recps].recipe_indx, - (unsigned long *)buf[recps].recipe_bitmap); + put_unaligned_le64(BIT_ULL(buf[recps].recipe_indx), + buf[recps].recipe_bitmap); content->act_ctrl_fwd_priority = rm->priority; if (rm->need_pass_l2) diff --git a/drivers/rtc/rtc-loongson.c b/drivers/rtc/rtc-loongson.c index e8ffc1ab90b02fbf6a383efaa79ea57cee4ae67b..90e9d97a86b48720a77178a2bc463f004a272321 100644 --- a/drivers/rtc/rtc-loongson.c +++ b/drivers/rtc/rtc-loongson.c @@ -114,6 +114,13 @@ static irqreturn_t loongson_rtc_isr(int irq, void *id) struct loongson_rtc_priv *priv = (struct loongson_rtc_priv *)id; rtc_update_irq(priv->rtcdev, 1, RTC_AF | RTC_IRQF); + + /* + * The TOY_MATCH0_REG should be cleared 0 here, + * otherwise the interrupt cannot be cleared. + */ + regmap_write(priv->regmap, TOY_MATCH0_REG, 0); + return IRQ_HANDLED; } @@ -131,11 +138,7 @@ static u32 loongson_rtc_handler(void *id) writel(RTC_STS, priv->pm_base + PM1_STS_REG); spin_unlock(&priv->lock); - /* - * The TOY_MATCH0_REG should be cleared 0 here, - * otherwise the interrupt cannot be cleared. - */ - return regmap_write(priv->regmap, TOY_MATCH0_REG, 0); + return ACPI_INTERRUPT_HANDLED; } static int loongson_rtc_set_enabled(struct device *dev) diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 77ed507fc6e169011f78c9808c2657680db1d2de..986c38a501663836b8cf9f1137a6dec427aa4065 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -2813,9 +2813,9 @@ static const struct pci_device_id azx_ids[] = { AZX_DCAPS_NO_MSI | AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_NO_64BIT }, /* Loongson HDAudio*/ { PCI_VDEVICE(LOONGSON, PCI_DEVICE_ID_LOONGSON_HDA), - .driver_data = AZX_DRIVER_LOONGSON }, + .driver_data = AZX_DRIVER_LOONGSON | AZX_DCAPS_NO_TCSEL}, { PCI_VDEVICE(LOONGSON, PCI_DEVICE_ID_LOONGSON_HDMI), - .driver_data = AZX_DRIVER_LOONGSON }, + .driver_data = AZX_DRIVER_LOONGSON | AZX_DCAPS_NO_TCSEL}, /* Hygon HDAudio */ { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_HYGON_18H_M05H_HDA), .driver_data = AZX_DRIVER_HYGON | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_NO_MSI },