From 7bd845b17aab36ac5d381557b797845404aaeb57 Mon Sep 17 00:00:00 2001 From: Zhao Qunqin Date: Mon, 3 Mar 2025 10:43:21 +0800 Subject: [PATCH 1/7] LoongArch: Update the flush cache policy LoongArch inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IBQ4JL CVE: NA -------------------------------- Otherwise, it may cause S3 wake-up failure in Loongson 3A6000 laptop. Signed-off-by: Zhao Qunqin Change-Id: I91684a1f58792480e9a71612ad8c522ae909e19c --- arch/loongarch/mm/cache.c | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/arch/loongarch/mm/cache.c b/arch/loongarch/mm/cache.c index 6be04d36ca07..f6cda2b5d738 100644 --- a/arch/loongarch/mm/cache.c +++ b/arch/loongarch/mm/cache.c @@ -63,6 +63,28 @@ static void flush_cache_leaf(unsigned int leaf) } while (--nr_nodes > 0); } +static void flush_cache_last_level(unsigned int leaf) +{ + u64 addr; + int i, j, nr_nodes, way_size; + struct cache_desc *cdesc = current_cpu_data.cache_leaves + leaf; + + nr_nodes = loongson_sysconf.nr_nodes; + + addr = CSR_DMW1_BASE; + iocsr_write8(0x1, 0x280); + way_size = cdesc->sets * cdesc->linesz; + do { + for (i = 0; i < (cdesc->ways * 3); i++) { + for (j = 0; j < (cdesc->sets); j++) { + READ_ONCE(*(u32 *)addr); + addr += cdesc->linesz; + } + } + addr += 0x100000000000; + } while (--nr_nodes > 0); +} + asmlinkage __visible void __flush_cache_all(void) { int leaf; @@ -71,7 +93,7 @@ asmlinkage __visible void __flush_cache_all(void) leaf = cache_present - 1; if (cache_inclusive(cdesc + leaf)) { - flush_cache_leaf(leaf); + flush_cache_last_level(leaf); return; } -- Gitee From 508590dfb21cbde0123c537cedcf2215965f050c Mon Sep 17 00:00:00 2001 From: Zhao Qunqin Date: Mon, 3 Mar 2025 10:43:22 +0800 Subject: [PATCH 2/7] hda/pci: Add AZX_DCAPS_NO_TCSEL flag for Loongson HDA devices LoongArch inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IBQ4JL CVE: NA -------------------------------- Loongson's HDA devices do not support TCSEL functionality Signed-off-by: Zhao Qunqin Change-Id: Ic9b4e7530d7b9fd5ee8c5f1330d2a11cc1903dd3 --- sound/pci/hda/hda_intel.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 77ed507fc6e1..986c38a50166 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -2813,9 +2813,9 @@ static const struct pci_device_id azx_ids[] = { AZX_DCAPS_NO_MSI | AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_NO_64BIT }, /* Loongson HDAudio*/ { PCI_VDEVICE(LOONGSON, PCI_DEVICE_ID_LOONGSON_HDA), - .driver_data = AZX_DRIVER_LOONGSON }, + .driver_data = AZX_DRIVER_LOONGSON | AZX_DCAPS_NO_TCSEL}, { PCI_VDEVICE(LOONGSON, PCI_DEVICE_ID_LOONGSON_HDMI), - .driver_data = AZX_DRIVER_LOONGSON }, + .driver_data = AZX_DRIVER_LOONGSON | AZX_DCAPS_NO_TCSEL}, /* Hygon HDAudio */ { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_HYGON_18H_M05H_HDA), .driver_data = AZX_DRIVER_HYGON | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_NO_MSI }, -- Gitee From 74d612a3e450573f8133ff95cc81fa75993512e1 Mon Sep 17 00:00:00 2001 From: Ming Wang Date: Mon, 3 Mar 2025 10:43:23 +0800 Subject: [PATCH 3/7] rtc: loongson: clear TOY_MATCH0_REG in loongson_rtc_isr() stable inclusion from stable-v6.6.76 commit 20f0f55e6d686eae7934e28358ea446e36cff77f category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/IBQ4JL CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=20f0f55e6d686eae7934e28358ea446e36cff77f -------------------------------- The TOY_MATCH0_REG should be cleared to 0 in the RTC interrupt handler, otherwise the interrupt cannot be cleared, which will cause the loongson_rtc_isr() to be triggered multiple times. The previous code cleared TOY_MATCH0_REG in the loongson_rtc_handler(), which is an ACPI interrupt. This did not prevent loongson_rtc_isr() from being triggered multiple times. This commit moves the clearing of TOY_MATCH0_REG to the loongson_rtc_isr() to ensure that the interrupt is properly cleared. Fixes: 1b733a9ebc3d ("rtc: Add rtc driver for the Loongson family chips") Signed-off-by: Ming Wang Reviewed-by: Huacai Chen Reviewed-by: Keguang Zhang # on LS1B Tested-by: Keguang Zhang --- drivers/rtc/rtc-loongson.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/rtc/rtc-loongson.c b/drivers/rtc/rtc-loongson.c index e8ffc1ab90b0..90e9d97a86b4 100644 --- a/drivers/rtc/rtc-loongson.c +++ b/drivers/rtc/rtc-loongson.c @@ -114,6 +114,13 @@ static irqreturn_t loongson_rtc_isr(int irq, void *id) struct loongson_rtc_priv *priv = (struct loongson_rtc_priv *)id; rtc_update_irq(priv->rtcdev, 1, RTC_AF | RTC_IRQF); + + /* + * The TOY_MATCH0_REG should be cleared 0 here, + * otherwise the interrupt cannot be cleared. + */ + regmap_write(priv->regmap, TOY_MATCH0_REG, 0); + return IRQ_HANDLED; } @@ -131,11 +138,7 @@ static u32 loongson_rtc_handler(void *id) writel(RTC_STS, priv->pm_base + PM1_STS_REG); spin_unlock(&priv->lock); - /* - * The TOY_MATCH0_REG should be cleared 0 here, - * otherwise the interrupt cannot be cleared. - */ - return regmap_write(priv->regmap, TOY_MATCH0_REG, 0); + return ACPI_INTERRUPT_HANDLED; } static int loongson_rtc_set_enabled(struct device *dev) -- Gitee From f6649d0617bef791933b5257f805e8dc35d9c603 Mon Sep 17 00:00:00 2001 From: Hongchen Zhang Date: Mon, 3 Mar 2025 10:43:24 +0800 Subject: [PATCH 4/7] LoongArch: set CONFIG_CMA_SIZE_MBYTES to 0 LoongArch inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IBQ4JL CVE: NA -------------------------------- When CONFIG_CMA_SIZE_MBYTES is not zero and its value is small, error log appear in dmesg as following: [12689.920994][ T2178] cma: cma_alloc: reserved: alloc failed, req-size: 4 pages, ret: -12 [12689.934128][ T2178] cma: cma_alloc: reserved: alloc failed, req-size: 4 pages, ret: -12 So set CONFIG_CMA_SIZE_MBYTES to 0 to hide the error log. Signed-off-by: Ming Wang Signed-off-by: Hongchen Zhang Change-Id: I135493f2f3aaaa99135fd25a9597e6109b23d5a5 --- arch/loongarch/configs/loongson3_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/loongarch/configs/loongson3_defconfig b/arch/loongarch/configs/loongson3_defconfig index 392ea7437a09..ed75f2f6afcb 100644 --- a/arch/loongarch/configs/loongson3_defconfig +++ b/arch/loongarch/configs/loongson3_defconfig @@ -2185,6 +2185,7 @@ CONFIG_CRC_T10DIF=y CONFIG_CRC_ITU_T=y CONFIG_CRC7=m CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=0 CONFIG_PRINTK_TIME=y CONFIG_PRINTK_CALLER=y CONFIG_BOOT_PRINTK_DELAY=y -- Gitee From 6b1d9f4222535f93aae34168014889c747fa3847 Mon Sep 17 00:00:00 2001 From: Michal Schmidt Date: Mon, 3 Mar 2025 10:43:25 +0800 Subject: [PATCH 5/7] ice: fix unaligned access in ice_create_lag_recipe LoongArch inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/IBQ4JL CVE: NA -------------------------------- new_rcp->recipe_bitmap was written to as if it were an aligned bitmap. It is an 8-byte array, but aligned only to 4. Use put_unaligned to set its value. Additionally, values in ice commands are typically in little-endian. I assume the recipe bitmap should be too, so use the *_le64 conversion. I don't have a big-endian system with ice to test this. I tested that the driver does not crash when probing on aarch64 anymore, which is good enough for me. I don't know if the LAG feature actually works. This is what the crash looked like without the fix: [ 17.599009] Unable to handle kernel paging request at virtual address ffff07ff9c6dc004 [ 17.599011] Mem abort info: [ 17.599011] ESR = 0x0000000096000021 [ 17.599012] EC = 0x25: DABT (current EL), IL = 32 bits [ 17.599013] SET = 0, FnV = 0 [ 17.599014] EA = 0, S1PTW = 0 [ 17.599014] FSC = 0x21: alignment fault [ 17.599015] Data abort info: [ 17.599016] ISV = 0, ISS = 0x00000021, ISS2 = 0x00000000 [ 17.599016] CM = 0, WnR = 0, TnD = 0, TagAccess = 0 [ 17.599017] GCS = 0, Overlay = 0, DirtyBit = 0, Xs = 0 [ 17.599019] swapper pgtable: 4k pages, 48-bit VAs, pgdp=0000080dd6bd0000 [ 17.599020] [ffff07ff9c6dc004] pgd=1800083fffacf003, p4d=1800083fffacf003, pud=1800083ffface003, pmd=1800083fff9ea003, pte=006808001c6dcf07 [ 17.599025] Internal error: Oops: 0000000096000021 [#1] SMP [ 17.599027] Modules linked in: crct10dif_ce ghash_ce sha2_ce sha256_arm64 mlx5_core sha1_ce sbsa_gwdt ice(+) nvme nvme_core mlxfw igb tls nvme_common psample i2c_algo_bit gnss pci_hyperv_intf i2c_designware_platform i2c_designware_core xgene_hwmon dm_mirror dm_region_hash dm_log dm_mod [ 17.599043] CPU: 0 PID: 18 Comm: kworker/0:1 Not tainted 5.14.0-407.el9.aarch64 #1 [ 17.599044] Hardware name: GIGABYTE R272-P31-00/MP32-AR1-00, BIOS F31L (SCP: 2.10.20220531) 09/29/2022 [ 17.599046] Workqueue: events work_for_cpu_fn [ 17.599051] pstate: 60400009 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 17.599053] pc : ice_create_lag_recipe.constprop.0+0xbc/0x11c [ice] [ 17.599091] lr : ice_create_lag_recipe.constprop.0+0x54/0x11c [ice] [ 17.599121] sp : ffff8000084a3c50 [ 17.599122] x29: ffff8000084a3c50 x28: ffffabc4a6790f00 x27: ffffabc4a6200fa0 [ 17.599124] x26: ffff07ff809e5c34 x25: ffff083e5f41980d x24: ffff07ff8610a0c0 [ 17.599126] x23: 0000000000000000 x22: ffff07ff9fe894c0 x21: ffff07ffb771a460 [ 17.599128] x20: ffff07ff9c6dc000 x19: 0000000000000000 x18: 0000000000000014 [ 17.599130] x17: 00000000c3142fa2 x16: 000000007e77e163 x15: 0000000018c66856 [ 17.599132] x14: 00000000b8afd426 x13: 000000007e8b3b19 x12: 000000004a34fdf7 [ 17.599134] x11: 00000000a7cb2fcc x10: 00000000ffffff8a x9 : 0000000000000000 [ 17.599136] x8 : 0000002000000005 x7 : 0000000000000001 x6 : ffffabc487a054d8 [ 17.599138] x5 : ffff07ff9c6dc004 x4 : 000000000000000a x3 : 0000000000000000 [ 17.599140] x2 : 0000000000000000 x1 : 0000000000000400 x0 : ffff07ff9c6dc004 [ 17.599142] Call trace: [ 17.599143] ice_create_lag_recipe.constprop.0+0xbc/0x11c [ice] [ 17.599172] ice_init_lag+0xcc/0x22c [ice] [ 17.599201] ice_init_features+0x160/0x2b4 [ice] [ 17.599230] ice_probe+0x2d0/0x30c [ice] [ 17.599258] local_pci_probe+0x58/0xb0 [ 17.599262] work_for_cpu_fn+0x20/0x30 [ 17.599264] process_one_work+0x1e4/0x4c0 [ 17.599266] worker_thread+0x220/0x450 [ 17.599268] kthread+0xe8/0xf4 [ 17.599270] ret_from_fork+0x10/0x20 [ 17.599273] Code: 380044a4 f800429f 8b000ca0 d503201f (f821301f) [ 17.599274] ---[ end trace 168d79e2ecf9f7e3 ]--- [ 17.599275] Kernel panic - not syncing: Oops: Fatal exception [ 17.893321] SMP: stopping secondary CPUs [ 17.897374] Kernel Offset: 0x2bc49c400000 from 0xffff800008000000 [ 17.903453] PHYS_OFFSET: 0x80000000 [ 17.906928] CPU features: 0x0,00000001,70028143,1041720b [ 17.912226] Memory Limit: none [ 17.915268] ---[ end Kernel panic - not syncing: Oops: Fatal exception ]--- Link: https://lore.kernel.org/all/20240131115823.541317-1-mschmidt@redhat.com/ Fixes: 1e0f9881ef79 ("ice: Flesh out implementation of support for SRIOV on bonded interface") Signed-off-by: Michal Schmidt Signed-off-by: Hongchen Zhang Change-Id: Ic7db3ac382d6bc36c98fd40f9585c55cc473a6f0 --- drivers/net/ethernet/intel/ice/ice_lag.c | 4 +--- drivers/net/ethernet/intel/ice/ice_switch.c | 6 ++---- 2 files changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_lag.c b/drivers/net/ethernet/intel/ice/ice_lag.c index 4e675c7c199f..b460ea4f5fc8 100644 --- a/drivers/net/ethernet/intel/ice/ice_lag.c +++ b/drivers/net/ethernet/intel/ice/ice_lag.c @@ -1806,9 +1806,7 @@ static int ice_create_lag_recipe(struct ice_hw *hw, u16 *rid, new_rcp->content.act_ctrl_fwd_priority = prio; new_rcp->content.rid = *rid | ICE_AQ_RECIPE_ID_IS_ROOT; new_rcp->recipe_indx = *rid; - bitmap_zero((unsigned long *)new_rcp->recipe_bitmap, - ICE_MAX_NUM_RECIPES); - set_bit(*rid, (unsigned long *)new_rcp->recipe_bitmap); + put_unaligned_le64(BIT_ULL(*rid), new_rcp->recipe_bitmap); err = ice_aq_add_recipe(hw, new_rcp, 1, NULL); if (err) diff --git a/drivers/net/ethernet/intel/ice/ice_switch.c b/drivers/net/ethernet/intel/ice/ice_switch.c index 19f730a68fa2..36685b2923bd 100644 --- a/drivers/net/ethernet/intel/ice/ice_switch.c +++ b/drivers/net/ethernet/intel/ice/ice_switch.c @@ -5071,10 +5071,8 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm, } /* fill recipe dependencies */ - bitmap_zero((unsigned long *)buf[recps].recipe_bitmap, - ICE_MAX_NUM_RECIPES); - set_bit(buf[recps].recipe_indx, - (unsigned long *)buf[recps].recipe_bitmap); + put_unaligned_le64(BIT_ULL(buf[recps].recipe_indx), + buf[recps].recipe_bitmap); content->act_ctrl_fwd_priority = rm->priority; if (rm->need_pass_l2) -- Gitee From cf5e7fb0aab363c11cab76784c5be7694fd88637 Mon Sep 17 00:00:00 2001 From: Huacai Chen Date: Mon, 3 Mar 2025 10:43:26 +0800 Subject: [PATCH 6/7] LoongArch: Correct the cacheinfo sharing information mainline inclusion from mainline-v6.14-rc1 commit b62a03049f141061d0397bfa86b74f65985d9338 category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IBQ4JL CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=b62a03049f141061d0397bfa86b74f65985d9338 -------------------------------- SMT cores and their sibling cores share the same L1 and L2 private caches (of course last level cache is also shared), so correct the cacheinfo sharing information to let shared_cpu_map correctly reflect this relationship. Below is the output of "lscpu" on Loongson-3A6000 (4 cores, 8 threads). 1. Before patch: L1d: 512 KiB (8 instances) L1i: 512 KiB (8 instances) L2: 2 MiB (8 instances) L3: 16 MiB (1 instance) 2. After patch: L1d: 256 KiB (4 instances) L1i: 256 KiB (4 instances) L2: 1 MiB (4 instances) L3: 16 MiB (1 instance) Change-Id: I6e07913c76bad6a120454510b3f4f8ecaef796f2 Reported-by: Chao Li Signed-off-by: Juxin Gao Signed-off-by: Huacai Chen --- arch/loongarch/kernel/cacheinfo.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/loongarch/kernel/cacheinfo.c b/arch/loongarch/kernel/cacheinfo.c index c7988f757281..8e231b0d2cd6 100644 --- a/arch/loongarch/kernel/cacheinfo.c +++ b/arch/loongarch/kernel/cacheinfo.c @@ -51,6 +51,12 @@ static void cache_cpumap_setup(unsigned int cpu) continue; sib_leaf = sib_cpu_ci->info_list + index; + /* SMT cores share all caches */ + if (cpus_are_siblings(i, cpu)) { + cpumask_set_cpu(cpu, &sib_leaf->shared_cpu_map); + cpumask_set_cpu(i, &this_leaf->shared_cpu_map); + } + /* Node's cores share shared caches */ if (cache_leaves_are_shared(this_leaf, sib_leaf)) { cpumask_set_cpu(cpu, &sib_leaf->shared_cpu_map); cpumask_set_cpu(i, &this_leaf->shared_cpu_map); -- Gitee From 7e901bcac0de503d6d06faf403f78f83b492aad0 Mon Sep 17 00:00:00 2001 From: Zhao Qunqin Date: Mon, 3 Mar 2025 10:43:27 +0800 Subject: [PATCH 7/7] blutetooth/btusb: delay 1ms while suspending LoongArch inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IBQ4JL CVE: NA -------------------------------- There are suspend, resume and suspend before hibernation, Loongson need to wait until the previous resume is completely over before the last suspending. Otherwise, it may cause S4 suspend failure in Loongson platform. Signed-off-by: Zhao Qunqin Change-Id: Ia4e6924d934d467a139f43e236c1156db609b71a --- drivers/bluetooth/btusb.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c index fe5e30662017..736c29187635 100644 --- a/drivers/bluetooth/btusb.c +++ b/drivers/bluetooth/btusb.c @@ -4645,6 +4645,9 @@ static int btusb_suspend(struct usb_interface *intf, pm_message_t message) if (data->suspend_count++) return 0; +#ifdef CONFIG_LOONGARCH + mdelay(1); +#endif spin_lock_irq(&data->txlock); if (!(PMSG_IS_AUTO(message) && data->tx_in_flight)) { set_bit(BTUSB_SUSPENDING, &data->flags); -- Gitee