From a1d2a0e272dbb306acd33de301f46764e687f972 Mon Sep 17 00:00:00 2001 From: Jiantao Xiao Date: Mon, 7 Aug 2023 09:04:17 +0800 Subject: [PATCH 01/12] Revert "net: hns3: add tm flush when setting tm" driver inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I7ON9Y CVE: NA ---------------------------------------------------------------------- This reverts commit b62afba40728081d30d3471e742e06c1f9d6fdfc. Signed-off-by: Jiantao Xiao --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 4 --- .../hns3/hns3_common/hclge_comm_cmd.c | 1 - .../hns3/hns3_common/hclge_comm_cmd.h | 2 -- .../ethernet/hisilicon/hns3/hns3_debugfs.c | 3 -- .../hisilicon/hns3/hns3pf/hclge_dcb.c | 34 +++---------------- .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.c | 31 +---------------- .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | 4 --- 7 files changed, 6 insertions(+), 73 deletions(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index d2118e3513e5..4192e2ff8f88 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -105,7 +105,6 @@ enum HNAE3_DEV_CAP_BITS { HNAE3_DEV_SUPPORT_WOL_B, HNAE3_DEV_SUPPORT_VF_FAULT_B, HNAE3_DEV_SUPPORT_NOTIFY_PKT_B, - HNAE3_DEV_SUPPORT_TM_FLUSH_B, }; #define hnae3_ae_dev_fd_supported(ae_dev) \ @@ -180,9 +179,6 @@ enum HNAE3_DEV_CAP_BITS { #define hnae3_ae_dev_notify_pkt_supported(ae_dev) \ test_bit(HNAE3_DEV_SUPPORT_NOTIFY_PKT_B, (ae_dev)->caps) -#define hnae3_ae_dev_tm_flush_supported(hdev) \ - test_bit(HNAE3_DEV_SUPPORT_TM_FLUSH_B, (hdev)->ae_dev->caps) - enum HNAE3_PF_CAP_BITS { HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B = 0, }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c index 31f107b8a6c7..eb8506f481dc 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c @@ -157,7 +157,6 @@ static const struct hclge_comm_caps_bit_map hclge_pf_cmd_caps[] = { {HCLGE_COMM_CAP_WOL_B, HNAE3_DEV_SUPPORT_WOL_B}, {HCLGE_COMM_CAP_VF_FAULT_B, HNAE3_DEV_SUPPORT_VF_FAULT_B}, {HCLGE_COMM_CAP_NOTIFY_PKT_B, HNAE3_DEV_SUPPORT_NOTIFY_PKT_B}, - {HCLGE_COMM_CAP_TM_FLUSH_B, HNAE3_DEV_SUPPORT_TM_FLUSH_B}, }; static const struct hclge_comm_caps_bit_map hclge_vf_cmd_caps[] = { diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h index 6557e654d2fe..eb3fd3447bab 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h @@ -153,7 +153,6 @@ enum hclge_opcode_type { HCLGE_OPC_TM_INTERNAL_STS = 0x0850, HCLGE_OPC_TM_INTERNAL_CNT = 0x0851, HCLGE_OPC_TM_INTERNAL_STS_1 = 0x0852, - HCLGE_OPC_TM_FLUSH = 0x0872, /* Packet buffer allocate commands */ HCLGE_OPC_TX_BUFF_ALLOC = 0x0901, @@ -351,7 +350,6 @@ enum HCLGE_COMM_CAP_BITS { HCLGE_COMM_CAP_LANE_NUM_B = 27, HCLGE_COMM_CAP_WOL_B = 28, HCLGE_COMM_CAP_NOTIFY_PKT_B = 29, - HCLGE_COMM_CAP_TM_FLUSH_B = 31, }; enum HCLGE_COMM_API_CAP_BITS { diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index ec76ee6a764c..6082805fce92 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -415,9 +415,6 @@ static struct hns3_dbg_cap_info hns3_dbg_cap[] = { }, { .name = "support vf fault detect", .cap_bit = HNAE3_DEV_SUPPORT_VF_FAULT_B, - }, { - .name = "support tm flush", - .cap_bit = HNAE3_DEV_SUPPORT_TM_FLUSH_B, } }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c index fad5a5ff3cda..09362823140d 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c @@ -227,10 +227,6 @@ static int hclge_notify_down_uinit(struct hclge_dev *hdev) if (ret) return ret; - ret = hclge_tm_flush_cfg(hdev, true); - if (ret) - return ret; - return hclge_notify_client(hdev, HNAE3_UNINIT_CLIENT); } @@ -242,10 +238,6 @@ static int hclge_notify_init_up(struct hclge_dev *hdev) if (ret) return ret; - ret = hclge_tm_flush_cfg(hdev, false); - if (ret) - return ret; - return hclge_notify_client(hdev, HNAE3_UP_CLIENT); } @@ -332,7 +324,6 @@ static int hclge_ieee_setpfc(struct hnae3_handle *h, struct ieee_pfc *pfc) struct net_device *netdev = h->kinfo.netdev; struct hclge_dev *hdev = vport->back; u8 i, j, pfc_map, *prio_tc; - int last_bad_ret = 0; int ret; if (!(hdev->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) @@ -370,28 +361,13 @@ static int hclge_ieee_setpfc(struct hnae3_handle *h, struct ieee_pfc *pfc) if (ret) return ret; - ret = hclge_tm_flush_cfg(hdev, true); - if (ret) - return ret; - - /* No matter whether the following operations are performed - * successfully or not, disabling the tm flush and notify - * the network status to up are necessary. - * Do not return immediately. - */ ret = hclge_buffer_alloc(hdev); - if (ret) - last_bad_ret = ret; - - ret = hclge_tm_flush_cfg(hdev, false); - if (ret) - last_bad_ret = ret; - - ret = hclge_notify_client(hdev, HNAE3_UP_CLIENT); - if (ret) - last_bad_ret = ret; + if (ret) { + hclge_notify_client(hdev, HNAE3_UP_CLIENT); + return ret; + } - return last_bad_ret; + return hclge_notify_client(hdev, HNAE3_UP_CLIENT); } static int hclge_ieee_setapp(struct hnae3_handle *h, struct dcb_app *app) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c index 6f399b43c1f2..061e3535f4e9 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c @@ -1485,11 +1485,7 @@ int hclge_tm_schd_setup_hw(struct hclge_dev *hdev) return ret; /* Cfg schd mode for each level schd */ - ret = hclge_tm_schd_mode_hw(hdev); - if (ret) - return ret; - - return hclge_tm_flush_cfg(hdev, false); + return hclge_tm_schd_mode_hw(hdev); } static int hclge_pause_param_setup_hw(struct hclge_dev *hdev) @@ -2119,28 +2115,3 @@ int hclge_tm_get_port_shaper(struct hclge_dev *hdev, return 0; } - -int hclge_tm_flush_cfg(struct hclge_dev *hdev, bool enable) -{ - struct hclge_desc desc; - int ret; - - if (!hnae3_ae_dev_tm_flush_supported(hdev)) - return 0; - - hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TM_FLUSH, false); - - desc.data[0] = cpu_to_le32(enable ? HCLGE_TM_FLUSH_EN_MSK : 0); - - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) { - dev_err(&hdev->pdev->dev, - "failed to config tm flush, ret = %d\n", ret); - return ret; - } - - if (enable) - msleep(HCLGE_TM_FLUSH_TIME_MS); - - return ret; -} diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h index c8b69f5df19e..03dbdc694cd0 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h @@ -33,9 +33,6 @@ enum hclge_opcode_type; #define HCLGE_DSCP_MAP_TC_BD_NUM 2 #define HCLGE_DSCP_TC_SHIFT(n) (((n) & 1) * 4) -#define HCLGE_TM_FLUSH_TIME_MS 10 -#define HCLGE_TM_FLUSH_EN_MSK BIT(0) - struct hclge_pg_to_pri_link_cmd { u8 pg_id; u8 rsvd1[3]; @@ -278,5 +275,4 @@ int hclge_tm_get_port_shaper(struct hclge_dev *hdev, struct hclge_tm_shaper_para *para); int hclge_up_to_tc_map(struct hclge_dev *hdev); int hclge_dscp_to_tc_map(struct hclge_dev *hdev); -int hclge_tm_flush_cfg(struct hclge_dev *hdev, bool enable); #endif -- Gitee From e429da2a856c8a16de1b766276d787fd794e5249 Mon Sep 17 00:00:00 2001 From: Jiantao Xiao Date: Mon, 7 Aug 2023 09:06:08 +0800 Subject: [PATCH 02/12] Revert "net: hns3: fix the imp capability bit cannot exceed 32 bits issue" driver inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I7ON9Y CVE: NA ---------------------------------------------------------------------- This reverts commit 702c687cf9c1a8da10769f2dd4adb4b97e7b868b. Signed-off-by: Jiantao Xiao --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 3 +-- .../hns3/hns3_common/hclge_comm_cmd.c | 21 +++---------------- 2 files changed, 4 insertions(+), 20 deletions(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 4192e2ff8f88..d24b72da6775 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -30,7 +30,6 @@ #include #include #include -#include #include #define HNAE3_MOD_VERSION "1.0" @@ -422,7 +421,7 @@ struct hnae3_ae_dev { unsigned long hw_err_reset_req; struct hnae3_dev_specs dev_specs; u32 dev_version; - DECLARE_BITMAP(caps, HNAE3_DEV_CAPS_MAX_NUM); + unsigned long caps[BITS_TO_LONGS(HNAE3_DEV_CAPS_MAX_NUM)]; void *priv; }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c index eb8506f481dc..bd7077fdcd30 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c @@ -172,20 +172,6 @@ static const struct hclge_comm_caps_bit_map hclge_vf_cmd_caps[] = { {HCLGE_COMM_CAP_GRO_B, HNAE3_DEV_SUPPORT_GRO_B}, }; -static void -hclge_comm_capability_to_bitmap(unsigned long *bitmap, __le32 *caps) -{ - const unsigned int words = HCLGE_COMM_QUERY_CAP_LENGTH; - u32 val[HCLGE_COMM_QUERY_CAP_LENGTH]; - unsigned int i; - - for (i = 0; i < words; i++) - val[i] = __le32_to_cpu(caps[i]); - - bitmap_from_arr32(bitmap, val, - HCLGE_COMM_QUERY_CAP_LENGTH * BITS_PER_TYPE(u32)); -} - static void hclge_comm_parse_capability(struct hnae3_ae_dev *ae_dev, bool is_pf, struct hclge_comm_query_version_cmd *cmd) @@ -194,12 +180,11 @@ hclge_comm_parse_capability(struct hnae3_ae_dev *ae_dev, bool is_pf, is_pf ? hclge_pf_cmd_caps : hclge_vf_cmd_caps; u32 size = is_pf ? ARRAY_SIZE(hclge_pf_cmd_caps) : ARRAY_SIZE(hclge_vf_cmd_caps); - DECLARE_BITMAP(caps, HCLGE_COMM_QUERY_CAP_LENGTH * BITS_PER_TYPE(u32)); - u32 i; + u32 caps, i; - hclge_comm_capability_to_bitmap(caps, cmd->caps); + caps = __le32_to_cpu(cmd->caps[0]); for (i = 0; i < size; i++) - if (test_bit(caps_map[i].imp_bit, caps)) + if (hnae3_get_bit(caps, caps_map[i].imp_bit)) set_bit(caps_map[i].local_bit, ae_dev->caps); } -- Gitee From 644997ef61aaef1531cbc458e07b09c2c7480e6c Mon Sep 17 00:00:00 2001 From: Jiantao Xiao Date: Mon, 7 Aug 2023 09:09:10 +0800 Subject: [PATCH 03/12] Revert "net: hns3: fix pointer cast to different type for wol" driver inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I7ON9Y CVE: NA ---------------------------------------------------------------------- This reverts commit f5432d461662fcb9a26c55e11dc4a7351e4f647b. Signed-off-by: Jiantao Xiao --- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index c37dcfabfad7..602f1a3772c2 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -12090,7 +12090,7 @@ int hclge_get_wol_supported_mode(struct hclge_dev *hdev, hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_WOL_GET_SUPPORTED_MODE, true); - wol_supported_cmd = (struct hclge_query_wol_supported_cmd *)desc.data; + wol_supported_cmd = (struct hclge_query_wol_supported_cmd *)&desc.data; ret = hclge_cmd_send(&hdev->hw, &desc, 1); if (ret) { @@ -12118,7 +12118,7 @@ int hclge_get_wol_cfg(struct hclge_dev *hdev, u32 *mode) return ret; } - wol_cfg_cmd = (struct hclge_wol_cfg_cmd *)desc.data; + wol_cfg_cmd = (struct hclge_wol_cfg_cmd *)&desc.data; *mode = le32_to_cpu(wol_cfg_cmd->wake_on_lan_mode); return 0; @@ -12132,7 +12132,7 @@ static int hclge_set_wol_cfg(struct hclge_dev *hdev, int ret; hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_WOL_CFG, false); - wol_cfg_cmd = (struct hclge_wol_cfg_cmd *)desc.data; + wol_cfg_cmd = (struct hclge_wol_cfg_cmd *)&desc.data; wol_cfg_cmd->wake_on_lan_mode = cpu_to_le32(wol_info->wol_current_mode); wol_cfg_cmd->sopass_size = wol_info->wol_sopass_size; memcpy(&wol_cfg_cmd->sopass, wol_info->wol_sopass, SOPASS_MAX); -- Gitee From 27be587d0f6f203d57adfbc3b260fe0683e4ea34 Mon Sep 17 00:00:00 2001 From: Jiantao Xiao Date: Mon, 7 Aug 2023 09:11:06 +0800 Subject: [PATCH 04/12] Revert "net: hns3: sync linux kernel hns3 wol to openeuler" driver inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I7ON9Y CVE: NA ---------------------------------------------------------------------- This reverts commit 92c6f2cfafba8a14b404e784ea496b303f1274f6. Signed-off-by: Jiantao Xiao --- .../net/ethernet/hisilicon/hns3/hns3_enet.h | 6 -- .../ethernet/hisilicon/hns3/hns3_ethtool.c | 12 +-- .../hisilicon/hns3/hns3pf/hclge_cmd.h | 12 +++ .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 16 ++-- .../hisilicon/hns3/hns3pf/hclge_main.c | 95 +++++++++++++++---- 5 files changed, 100 insertions(+), 41 deletions(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h index 861979579c36..85c352fff83b 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h @@ -755,12 +755,6 @@ static inline unsigned int hns3_page_order(struct hns3_enet_ring *ring) #define hns3_get_handle(ndev) \ (((struct hns3_nic_priv *)netdev_priv(ndev))->ae_handle) -#define hns3_get_ae_dev(handle) \ - (pci_get_drvdata((handle)->pdev)) - -#define hns3_get_ops(handle) \ - ((handle)->ae_algo->ops) - #define hns3_gl_usec_to_reg(int_gl) ((int_gl) >> 1) #define hns3_gl_round_down(int_gl) round_down(int_gl, 2) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c b/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c index ff62515a36ee..6eb3656509e0 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c @@ -2045,10 +2045,10 @@ static int hns3_get_link_ext_state(struct net_device *netdev, static void hns3_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) { struct hnae3_handle *handle = hns3_get_handle(netdev); - const struct hnae3_ae_ops *ops = hns3_get_ops(handle); - struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle); + struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev); + const struct hnae3_ae_ops *ops = handle->ae_algo->ops; - if (!hnae3_ae_dev_wol_supported(ae_dev)) + if (!hnae3_ae_dev_wol_supported(ae_dev) || !ops->get_wol) return; ops->get_wol(handle, wol); @@ -2058,10 +2058,10 @@ static int hns3_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) { struct hnae3_handle *handle = hns3_get_handle(netdev); - const struct hnae3_ae_ops *ops = hns3_get_ops(handle); - struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle); + struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev); + const struct hnae3_ae_ops *ops = handle->ae_algo->ops; - if (!hnae3_ae_dev_wol_supported(ae_dev)) + if (!hnae3_ae_dev_wol_supported(ae_dev) || !ops->set_wol) return -EOPNOTSUPP; return ops->set_wol(handle, wol); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h index e18ee08df327..cc28d9590ef7 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h @@ -898,6 +898,18 @@ struct hclge_phy_reg_cmd { u8 rsv2[12]; }; +enum HCLGE_WOL_MODE { + HCLGE_WOL_PHY = BIT(0), + HCLGE_WOL_UNICAST = BIT(1), + HCLGE_WOL_MULTICAST = BIT(2), + HCLGE_WOL_BROADCAST = BIT(3), + HCLGE_WOL_ARP = BIT(4), + HCLGE_WOL_MAGIC = BIT(5), + HCLGE_WOL_MAGICSECURED = BIT(6), + HCLGE_WOL_FILTER = BIT(7), + HCLGE_WOL_DISABLE = 0, +}; + struct hclge_wol_cfg_cmd { __le32 wake_on_lan_mode; u8 sopass[SOPASS_MAX]; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index dd7e830d5ace..7adad2d6315f 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -2515,29 +2515,29 @@ static int hclge_dbg_dump_mac_mc(struct hclge_dev *hdev, char *buf, int len) static void hclge_dump_wol_mode(u32 mode, char *buf, int len, int *pos) { - if (mode & WAKE_PHY) + if (mode & HCLGE_WOL_PHY) *pos += scnprintf(buf + *pos, len - *pos, " [p]phy\n"); - if (mode & WAKE_UCAST) + if (mode & HCLGE_WOL_UNICAST) *pos += scnprintf(buf + *pos, len - *pos, " [u]unicast\n"); - if (mode & WAKE_MCAST) + if (mode & HCLGE_WOL_MULTICAST) *pos += scnprintf(buf + *pos, len - *pos, " [m]multicast\n"); - if (mode & WAKE_BCAST) + if (mode & HCLGE_WOL_BROADCAST) *pos += scnprintf(buf + *pos, len - *pos, " [b]broadcast\n"); - if (mode & WAKE_ARP) + if (mode & HCLGE_WOL_ARP) *pos += scnprintf(buf + *pos, len - *pos, " [a]arp\n"); - if (mode & WAKE_MAGIC) + if (mode & HCLGE_WOL_MAGIC) *pos += scnprintf(buf + *pos, len - *pos, " [g]magic\n"); - if (mode & WAKE_MAGICSECURE) + if (mode & HCLGE_WOL_MAGICSECURED) *pos += scnprintf(buf + *pos, len - *pos, " [s]magic secured\n"); - if (mode & WAKE_FILTER) + if (mode & HCLGE_WOL_FILTER) *pos += scnprintf(buf + *pos, len - *pos, " [f]filter\n"); } diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 602f1a3772c2..fc9c73fd8dbd 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -12074,15 +12074,69 @@ static void hclge_uninit_rxd_adv_layout(struct hclge_dev *hdev) hclge_write_dev(&hdev->hw, HCLGE_RXD_ADV_LAYOUT_EN_REG, 0); } -static struct hclge_wol_info *hclge_get_wol_info(struct hnae3_handle *handle) +static __u32 hclge_wol_mode_to_ethtool(u32 mode) { - struct hclge_vport *vport = hclge_get_vport(handle); + __u32 ret = 0; + + if (mode & HCLGE_WOL_PHY) + ret |= WAKE_PHY; + + if (mode & HCLGE_WOL_UNICAST) + ret |= WAKE_UCAST; + + if (mode & HCLGE_WOL_MULTICAST) + ret |= WAKE_MCAST; + + if (mode & HCLGE_WOL_BROADCAST) + ret |= WAKE_BCAST; + + if (mode & HCLGE_WOL_ARP) + ret |= WAKE_ARP; + + if (mode & HCLGE_WOL_MAGIC) + ret |= WAKE_MAGIC; + + if (mode & HCLGE_WOL_MAGICSECURED) + ret |= WAKE_MAGICSECURE; + + if (mode & HCLGE_WOL_FILTER) + ret |= WAKE_FILTER; - return &vport->back->hw.mac.wol; + return ret; } -int hclge_get_wol_supported_mode(struct hclge_dev *hdev, - u32 *wol_supported) +static u32 hclge_wol_mode_from_ethtool(__u32 mode) +{ + u32 ret = HCLGE_WOL_DISABLE; + + if (mode & WAKE_PHY) + ret |= HCLGE_WOL_PHY; + + if (mode & WAKE_UCAST) + ret |= HCLGE_WOL_UNICAST; + + if (mode & WAKE_MCAST) + ret |= HCLGE_WOL_MULTICAST; + + if (mode & WAKE_BCAST) + ret |= HCLGE_WOL_BROADCAST; + + if (mode & WAKE_ARP) + ret |= HCLGE_WOL_ARP; + + if (mode & WAKE_MAGIC) + ret |= HCLGE_WOL_MAGIC; + + if (mode & WAKE_MAGICSECURE) + ret |= HCLGE_WOL_MAGICSECURED; + + if (mode & WAKE_FILTER) + ret |= HCLGE_WOL_FILTER; + + return ret; +} + +int hclge_get_wol_supported_mode(struct hclge_dev *hdev, u32 *wol_supported) { struct hclge_query_wol_supported_cmd *wol_supported_cmd; struct hclge_desc desc; @@ -12167,7 +12221,7 @@ static int hclge_init_wol(struct hclge_dev *hdev) ret = hclge_get_wol_supported_mode(hdev, &wol_info->wol_support_mode); if (ret) { - wol_info->wol_support_mode = 0; + wol_info->wol_support_mode = HCLGE_WOL_DISABLE; return ret; } @@ -12177,39 +12231,38 @@ static int hclge_init_wol(struct hclge_dev *hdev) static void hclge_get_wol(struct hnae3_handle *handle, struct ethtool_wolinfo *wol) { - struct hclge_wol_info *wol_info = hclge_get_wol_info(handle); + struct hclge_vport *vport = hclge_get_vport(handle); + struct hclge_dev *hdev = vport->back; + struct hclge_wol_info *wol_info = &hdev->hw.mac.wol; - wol->supported = wol_info->wol_support_mode; - wol->wolopts = wol_info->wol_current_mode; - if (wol_info->wol_current_mode & WAKE_MAGICSECURE) - memcpy(wol->sopass, wol_info->wol_sopass, SOPASS_MAX); + wol->supported = hclge_wol_mode_to_ethtool(wol_info->wol_support_mode); + wol->wolopts = + hclge_wol_mode_to_ethtool(wol_info->wol_current_mode); + if (wol_info->wol_current_mode & HCLGE_WOL_MAGICSECURED) + memcpy(&wol->sopass, wol_info->wol_sopass, SOPASS_MAX); } static int hclge_set_wol(struct hnae3_handle *handle, struct ethtool_wolinfo *wol) { - struct hclge_wol_info *wol_info = hclge_get_wol_info(handle); struct hclge_vport *vport = hclge_get_vport(handle); + struct hclge_dev *hdev = vport->back; + struct hclge_wol_info *wol_info = &hdev->hw.mac.wol; u32 wol_mode; - int ret; - wol_mode = wol->wolopts; + wol_mode = hclge_wol_mode_from_ethtool(wol->wolopts); if (wol_mode & ~wol_info->wol_support_mode) return -EINVAL; wol_info->wol_current_mode = wol_mode; - if (wol_mode & WAKE_MAGICSECURE) { - memcpy(wol_info->wol_sopass, wol->sopass, SOPASS_MAX); + if (wol_mode & HCLGE_WOL_MAGICSECURED) { + memcpy(wol_info->wol_sopass, &wol->sopass, SOPASS_MAX); wol_info->wol_sopass_size = SOPASS_MAX; } else { wol_info->wol_sopass_size = 0; } - ret = hclge_set_wol_cfg(vport->back, wol_info); - if (ret) - wol_info->wol_current_mode = 0; - - return ret; + return hclge_set_wol_cfg(hdev, wol_info); } static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev) -- Gitee From 1c46bf6ea87e335158292f83802a3679fd585558 Mon Sep 17 00:00:00 2001 From: Jiantao Xiao Date: Mon, 7 Aug 2023 09:11:46 +0800 Subject: [PATCH 05/12] Revert "net: hns3: fix the HCLGE_OPC_WOL_CFG opcode id for wol" driver inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I7ON9Y CVE: NA ---------------------------------------------------------------------- This reverts commit 987f422a346e84c9d29a7a83d4a8448a02bad97c. Signed-off-by: Jiantao Xiao --- .../net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h index eb3fd3447bab..42899629cc15 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h @@ -295,8 +295,8 @@ enum hclge_opcode_type { HCLGE_PPP_CMD0_INT_CMD = 0x2100, HCLGE_PPP_CMD1_INT_CMD = 0x2101, HCLGE_MAC_ETHERTYPE_IDX_RD = 0x2105, + HCLGE_OPC_WOL_CFG = 0x2200, HCLGE_OPC_WOL_GET_SUPPORTED_MODE = 0x2201, - HCLGE_OPC_WOL_CFG = 0x2202, HCLGE_NCSI_INT_EN = 0x2401, /* ROH MAC commands */ -- Gitee From 8ffe4326358515982a42cec7d9b35a4efa38fcb2 Mon Sep 17 00:00:00 2001 From: Jiantao Xiao Date: Mon, 7 Aug 2023 09:12:15 +0800 Subject: [PATCH 06/12] Revert "net: hns3: fix getting supported parameter from driver in hclge_set_wol" driver inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I7ON9Y CVE: NA ---------------------------------------------------------------------- This reverts commit c92b8f62f9246d96e19300d5ad3804d2e6d578f7. Signed-off-by: Jiantao Xiao --- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index fc9c73fd8dbd..f1f12e297557 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -12248,10 +12248,12 @@ static int hclge_set_wol(struct hnae3_handle *handle, struct hclge_vport *vport = hclge_get_vport(handle); struct hclge_dev *hdev = vport->back; struct hclge_wol_info *wol_info = &hdev->hw.mac.wol; + u32 wol_supported; u32 wol_mode; + wol_supported = hclge_wol_mode_from_ethtool(wol->supported); wol_mode = hclge_wol_mode_from_ethtool(wol->wolopts); - if (wol_mode & ~wol_info->wol_support_mode) + if (wol_mode & ~wol_supported) return -EINVAL; wol_info->wol_current_mode = wol_mode; -- Gitee From aeb528f919f52a8537d8ad7c3b4cb450925f0b37 Mon Sep 17 00:00:00 2001 From: Jiantao Xiao Date: Mon, 7 Aug 2023 09:33:11 +0800 Subject: [PATCH 07/12] Revert "net: hns3: support debugfs for wake on lan" driver inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I7ON9Y CVE: NA ---------------------------------------------------------------------- This reverts commit 7fbc48aac5b786563e1c1c11922dbaf0df31eb62. Signed-off-by: Jiantao Xiao --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 - .../ethernet/hisilicon/hns3/hns3_debugfs.c | 10 --- .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 62 ------------------- 3 files changed, 73 deletions(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index d24b72da6775..f9508de43d05 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -335,7 +335,6 @@ enum hnae3_dbg_cmd { HNAE3_DBG_CMD_UMV_INFO, HNAE3_DBG_CMD_PAGE_POOL_INFO, HNAE3_DBG_CMD_COAL_INFO, - HNAE3_DBG_CMD_WOL_INFO, HNAE3_DBG_CMD_UNKNOWN, }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 6082805fce92..763eb71f8795 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -357,13 +357,6 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { .buf_len = HNS3_DBG_READ_LEN_1MB, .init = hns3_dbg_common_file_init, }, - { - .name = "wol_info", - .cmd = HNAE3_DBG_CMD_WOL_INFO, - .dentry = HNS3_DBG_DENTRY_COMMON, - .buf_len = HNS3_DBG_READ_LEN, - .init = hns3_dbg_common_file_init, - }, }; static struct hns3_dbg_cap_info hns3_dbg_cap[] = { @@ -409,9 +402,6 @@ static struct hns3_dbg_cap_info hns3_dbg_cap[] = { }, { .name = "support modify vlan filter state", .cap_bit = HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, - }, { - .name = "support wake on lan", - .cap_bit = HNAE3_DEV_SUPPORT_WOL_B, }, { .name = "support vf fault detect", .cap_bit = HNAE3_DEV_SUPPORT_VF_FAULT_B, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index 7adad2d6315f..7fd6c79b98e9 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -2513,64 +2513,6 @@ static int hclge_dbg_dump_mac_mc(struct hclge_dev *hdev, char *buf, int len) return 0; } -static void hclge_dump_wol_mode(u32 mode, char *buf, int len, int *pos) -{ - if (mode & HCLGE_WOL_PHY) - *pos += scnprintf(buf + *pos, len - *pos, " [p]phy\n"); - - if (mode & HCLGE_WOL_UNICAST) - *pos += scnprintf(buf + *pos, len - *pos, " [u]unicast\n"); - - if (mode & HCLGE_WOL_MULTICAST) - *pos += scnprintf(buf + *pos, len - *pos, " [m]multicast\n"); - - if (mode & HCLGE_WOL_BROADCAST) - *pos += scnprintf(buf + *pos, len - *pos, " [b]broadcast\n"); - - if (mode & HCLGE_WOL_ARP) - *pos += scnprintf(buf + *pos, len - *pos, " [a]arp\n"); - - if (mode & HCLGE_WOL_MAGIC) - *pos += scnprintf(buf + *pos, len - *pos, " [g]magic\n"); - - if (mode & HCLGE_WOL_MAGICSECURED) - *pos += scnprintf(buf + *pos, len - *pos, - " [s]magic secured\n"); - - if (mode & HCLGE_WOL_FILTER) - *pos += scnprintf(buf + *pos, len - *pos, " [f]filter\n"); -} - -static int hclge_dbg_dump_wol_info(struct hclge_dev *hdev, char *buf, int len) -{ - u32 wol_supported; - int pos = 0; - u32 mode; - - if (!hnae3_ae_dev_wol_supported(hdev->ae_dev)) { - pos += scnprintf(buf + pos, len - pos, - "wake-on-lan is unsupported\n"); - return 0; - } - - pos += scnprintf(buf + pos, len - pos, "wake-on-lan mode:\n"); - pos += scnprintf(buf + pos, len - pos, " supported:\n"); - if (hclge_get_wol_supported_mode(hdev, &wol_supported)) - return -EINVAL; - - hclge_dump_wol_mode(wol_supported, buf, len, &pos); - - pos += scnprintf(buf + pos, len - pos, " current:\n"); - if (hclge_get_wol_cfg(hdev, &mode)) - return -EINVAL; - if (mode) - hclge_dump_wol_mode(mode, buf, len, &pos); - else - pos += scnprintf(buf + pos, len - pos, " [d]disabled\n"); - - return 0; -} - static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { { .cmd = HNAE3_DBG_CMD_TM_NODES, @@ -2720,10 +2662,6 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { .cmd = HNAE3_DBG_CMD_UMV_INFO, .dbg_dump = hclge_dbg_dump_umv_info, }, - { - .cmd = HNAE3_DBG_CMD_WOL_INFO, - .dbg_dump = hclge_dbg_dump_wol_info, - }, }; int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, -- Gitee From be1c15217c2b38eec58eff6fd11bc7156fd4d96a Mon Sep 17 00:00:00 2001 From: Jiantao Xiao Date: Mon, 7 Aug 2023 09:58:30 +0800 Subject: [PATCH 08/12] Revert "net: hns3: support wake on lan configuration and query" driver inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I7ON9Y CVE: NA ---------------------------------------------------------------------- This reverts commit c3c5f044b7dceb12282718525d65038c8717102c. Signed-off-by: Jiantao Xiao --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 12 -- .../hns3/hns3_common/hclge_comm_cmd.c | 1 - .../hns3/hns3_common/hclge_comm_cmd.h | 3 - .../ethernet/hisilicon/hns3/hns3_ethtool.c | 27 --- .../hisilicon/hns3/hns3pf/hclge_cmd.h | 24 --- .../hisilicon/hns3/hns3pf/hclge_main.c | 202 ------------------ .../hisilicon/hns3/hns3pf/hclge_main.h | 10 - 7 files changed, 279 deletions(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index f9508de43d05..7a0ae55e9488 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -101,7 +101,6 @@ enum HNAE3_DEV_CAP_BITS { HNAE3_DEV_SUPPORT_MC_MAC_MNG_B, HNAE3_DEV_SUPPORT_CQ_B, HNAE3_DEV_SUPPORT_LANE_NUM_B, - HNAE3_DEV_SUPPORT_WOL_B, HNAE3_DEV_SUPPORT_VF_FAULT_B, HNAE3_DEV_SUPPORT_NOTIFY_PKT_B, }; @@ -169,9 +168,6 @@ enum HNAE3_DEV_CAP_BITS { #define hnae3_ae_dev_lane_num_supported(ae_dev) \ test_bit(HNAE3_DEV_SUPPORT_LANE_NUM_B, (ae_dev)->caps) -#define hnae3_ae_dev_wol_supported(ae_dev) \ - test_bit(HNAE3_DEV_SUPPORT_WOL_B, (ae_dev)->caps) - #define hnae3_ae_dev_vf_fault_supported(ae_dev) \ test_bit(HNAE3_DEV_SUPPORT_VF_FAULT_B, (ae_dev)->caps) @@ -582,10 +578,6 @@ struct hnae3_ae_dev { * Get phc info * clean_vf_config * Clean residual vf info after disable sriov - * get_wol - * Get wake on lan info - * set_wol - * Config wake on lan */ struct hnae3_ae_ops { int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev); @@ -783,10 +775,6 @@ struct hnae3_ae_ops { void (*clean_vf_config)(struct hnae3_ae_dev *ae_dev, int num_vfs); int (*get_dscp_prio)(struct hnae3_handle *handle, u8 dscp, u8 *tc_map_mode, u8 *priority); - void (*get_wol)(struct hnae3_handle *handle, - struct ethtool_wolinfo *wol); - int (*set_wol)(struct hnae3_handle *handle, - struct ethtool_wolinfo *wol); int (*priv_ops)(struct hnae3_handle *handle, int opcode, void *data, size_t length); }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c index bd7077fdcd30..3f5d5b803484 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c @@ -154,7 +154,6 @@ static const struct hclge_comm_caps_bit_map hclge_pf_cmd_caps[] = { {HCLGE_COMM_CAP_GRO_B, HNAE3_DEV_SUPPORT_GRO_B}, {HCLGE_COMM_CAP_FD_B, HNAE3_DEV_SUPPORT_FD_B}, {HCLGE_COMM_CAP_LANE_NUM_B, HNAE3_DEV_SUPPORT_LANE_NUM_B}, - {HCLGE_COMM_CAP_WOL_B, HNAE3_DEV_SUPPORT_WOL_B}, {HCLGE_COMM_CAP_VF_FAULT_B, HNAE3_DEV_SUPPORT_VF_FAULT_B}, {HCLGE_COMM_CAP_NOTIFY_PKT_B, HNAE3_DEV_SUPPORT_NOTIFY_PKT_B}, }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h index 42899629cc15..10b37baceaeb 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h @@ -295,8 +295,6 @@ enum hclge_opcode_type { HCLGE_PPP_CMD0_INT_CMD = 0x2100, HCLGE_PPP_CMD1_INT_CMD = 0x2101, HCLGE_MAC_ETHERTYPE_IDX_RD = 0x2105, - HCLGE_OPC_WOL_CFG = 0x2200, - HCLGE_OPC_WOL_GET_SUPPORTED_MODE = 0x2201, HCLGE_NCSI_INT_EN = 0x2401, /* ROH MAC commands */ @@ -348,7 +346,6 @@ enum HCLGE_COMM_CAP_BITS { HCLGE_COMM_CAP_FD_B = 21, HCLGE_COMM_CAP_VF_FAULT_B = 26, HCLGE_COMM_CAP_LANE_NUM_B = 27, - HCLGE_COMM_CAP_WOL_B = 28, HCLGE_COMM_CAP_NOTIFY_PKT_B = 29, }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c b/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c index 6eb3656509e0..44ad1e9f4618 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c @@ -2042,31 +2042,6 @@ static int hns3_get_link_ext_state(struct net_device *netdev, return -ENODATA; } -static void hns3_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) -{ - struct hnae3_handle *handle = hns3_get_handle(netdev); - struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev); - const struct hnae3_ae_ops *ops = handle->ae_algo->ops; - - if (!hnae3_ae_dev_wol_supported(ae_dev) || !ops->get_wol) - return; - - ops->get_wol(handle, wol); -} - -static int hns3_set_wol(struct net_device *netdev, - struct ethtool_wolinfo *wol) -{ - struct hnae3_handle *handle = hns3_get_handle(netdev); - struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev); - const struct hnae3_ae_ops *ops = handle->ae_algo->ops; - - if (!hnae3_ae_dev_wol_supported(ae_dev) || !ops->set_wol) - return -EOPNOTSUPP; - - return ops->set_wol(handle, wol); -} - static const struct ethtool_ops hns3vf_ethtool_ops = { .supported_coalesce_params = HNS3_ETHTOOL_COALESCE, .supported_ring_params = HNS3_ETHTOOL_RING, @@ -2141,8 +2116,6 @@ static const struct ethtool_ops hns3_ethtool_ops = { .set_tunable = hns3_set_tunable, .reset = hns3_set_reset, .get_link_ext_state = hns3_get_link_ext_state, - .get_wol = hns3_get_wol, - .set_wol = hns3_set_wol, }; void hns3_ethtool_set_ops(struct net_device *netdev) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h index cc28d9590ef7..bf3028b019bb 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h @@ -898,30 +898,6 @@ struct hclge_phy_reg_cmd { u8 rsv2[12]; }; -enum HCLGE_WOL_MODE { - HCLGE_WOL_PHY = BIT(0), - HCLGE_WOL_UNICAST = BIT(1), - HCLGE_WOL_MULTICAST = BIT(2), - HCLGE_WOL_BROADCAST = BIT(3), - HCLGE_WOL_ARP = BIT(4), - HCLGE_WOL_MAGIC = BIT(5), - HCLGE_WOL_MAGICSECURED = BIT(6), - HCLGE_WOL_FILTER = BIT(7), - HCLGE_WOL_DISABLE = 0, -}; - -struct hclge_wol_cfg_cmd { - __le32 wake_on_lan_mode; - u8 sopass[SOPASS_MAX]; - u8 sopass_size; - u8 rsv[13]; -}; - -struct hclge_query_wol_supported_cmd { - __le32 supported_wake_mode; - u8 rsv[20]; -}; - struct hclge_hw; int hclge_cmd_send(struct hclge_hw *hw, struct hclge_desc *desc, int num); enum hclge_comm_cmd_status hclge_cmd_mdio_write(struct hclge_hw *hw, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index f1f12e297557..e4d4f1dc2980 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -12074,199 +12074,6 @@ static void hclge_uninit_rxd_adv_layout(struct hclge_dev *hdev) hclge_write_dev(&hdev->hw, HCLGE_RXD_ADV_LAYOUT_EN_REG, 0); } -static __u32 hclge_wol_mode_to_ethtool(u32 mode) -{ - __u32 ret = 0; - - if (mode & HCLGE_WOL_PHY) - ret |= WAKE_PHY; - - if (mode & HCLGE_WOL_UNICAST) - ret |= WAKE_UCAST; - - if (mode & HCLGE_WOL_MULTICAST) - ret |= WAKE_MCAST; - - if (mode & HCLGE_WOL_BROADCAST) - ret |= WAKE_BCAST; - - if (mode & HCLGE_WOL_ARP) - ret |= WAKE_ARP; - - if (mode & HCLGE_WOL_MAGIC) - ret |= WAKE_MAGIC; - - if (mode & HCLGE_WOL_MAGICSECURED) - ret |= WAKE_MAGICSECURE; - - if (mode & HCLGE_WOL_FILTER) - ret |= WAKE_FILTER; - - return ret; -} - -static u32 hclge_wol_mode_from_ethtool(__u32 mode) -{ - u32 ret = HCLGE_WOL_DISABLE; - - if (mode & WAKE_PHY) - ret |= HCLGE_WOL_PHY; - - if (mode & WAKE_UCAST) - ret |= HCLGE_WOL_UNICAST; - - if (mode & WAKE_MCAST) - ret |= HCLGE_WOL_MULTICAST; - - if (mode & WAKE_BCAST) - ret |= HCLGE_WOL_BROADCAST; - - if (mode & WAKE_ARP) - ret |= HCLGE_WOL_ARP; - - if (mode & WAKE_MAGIC) - ret |= HCLGE_WOL_MAGIC; - - if (mode & WAKE_MAGICSECURE) - ret |= HCLGE_WOL_MAGICSECURED; - - if (mode & WAKE_FILTER) - ret |= HCLGE_WOL_FILTER; - - return ret; -} - -int hclge_get_wol_supported_mode(struct hclge_dev *hdev, u32 *wol_supported) -{ - struct hclge_query_wol_supported_cmd *wol_supported_cmd; - struct hclge_desc desc; - int ret; - - hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_WOL_GET_SUPPORTED_MODE, - true); - wol_supported_cmd = (struct hclge_query_wol_supported_cmd *)&desc.data; - - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) { - dev_err(&hdev->pdev->dev, - "failed to query wol supported, ret = %d\n", ret); - return ret; - } - - *wol_supported = le32_to_cpu(wol_supported_cmd->supported_wake_mode); - - return 0; -} - -int hclge_get_wol_cfg(struct hclge_dev *hdev, u32 *mode) -{ - struct hclge_wol_cfg_cmd *wol_cfg_cmd; - struct hclge_desc desc; - int ret; - - hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_WOL_CFG, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) { - dev_err(&hdev->pdev->dev, - "failed to get wol config, ret = %d\n", ret); - return ret; - } - - wol_cfg_cmd = (struct hclge_wol_cfg_cmd *)&desc.data; - *mode = le32_to_cpu(wol_cfg_cmd->wake_on_lan_mode); - - return 0; -} - -static int hclge_set_wol_cfg(struct hclge_dev *hdev, - struct hclge_wol_info *wol_info) -{ - struct hclge_wol_cfg_cmd *wol_cfg_cmd; - struct hclge_desc desc; - int ret; - - hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_WOL_CFG, false); - wol_cfg_cmd = (struct hclge_wol_cfg_cmd *)&desc.data; - wol_cfg_cmd->wake_on_lan_mode = cpu_to_le32(wol_info->wol_current_mode); - wol_cfg_cmd->sopass_size = wol_info->wol_sopass_size; - memcpy(&wol_cfg_cmd->sopass, wol_info->wol_sopass, SOPASS_MAX); - - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) - dev_err(&hdev->pdev->dev, - "failed to set wol config, ret = %d\n", ret); - - return ret; -} - -static int hclge_update_wol(struct hclge_dev *hdev) -{ - struct hclge_wol_info *wol_info = &hdev->hw.mac.wol; - - if (!hnae3_ae_dev_wol_supported(hdev->ae_dev)) - return 0; - - return hclge_set_wol_cfg(hdev, wol_info); -} - -static int hclge_init_wol(struct hclge_dev *hdev) -{ - struct hclge_wol_info *wol_info = &hdev->hw.mac.wol; - int ret; - - if (!hnae3_ae_dev_wol_supported(hdev->ae_dev)) - return 0; - - memset(wol_info, 0, sizeof(struct hclge_wol_info)); - ret = hclge_get_wol_supported_mode(hdev, - &wol_info->wol_support_mode); - if (ret) { - wol_info->wol_support_mode = HCLGE_WOL_DISABLE; - return ret; - } - - return hclge_update_wol(hdev); -} - -static void hclge_get_wol(struct hnae3_handle *handle, - struct ethtool_wolinfo *wol) -{ - struct hclge_vport *vport = hclge_get_vport(handle); - struct hclge_dev *hdev = vport->back; - struct hclge_wol_info *wol_info = &hdev->hw.mac.wol; - - wol->supported = hclge_wol_mode_to_ethtool(wol_info->wol_support_mode); - wol->wolopts = - hclge_wol_mode_to_ethtool(wol_info->wol_current_mode); - if (wol_info->wol_current_mode & HCLGE_WOL_MAGICSECURED) - memcpy(&wol->sopass, wol_info->wol_sopass, SOPASS_MAX); -} - -static int hclge_set_wol(struct hnae3_handle *handle, - struct ethtool_wolinfo *wol) -{ - struct hclge_vport *vport = hclge_get_vport(handle); - struct hclge_dev *hdev = vport->back; - struct hclge_wol_info *wol_info = &hdev->hw.mac.wol; - u32 wol_supported; - u32 wol_mode; - - wol_supported = hclge_wol_mode_from_ethtool(wol->supported); - wol_mode = hclge_wol_mode_from_ethtool(wol->wolopts); - if (wol_mode & ~wol_supported) - return -EINVAL; - - wol_info->wol_current_mode = wol_mode; - if (wol_mode & HCLGE_WOL_MAGICSECURED) { - memcpy(wol_info->wol_sopass, &wol->sopass, SOPASS_MAX); - wol_info->wol_sopass_size = SOPASS_MAX; - } else { - wol_info->wol_sopass_size = 0; - } - - return hclge_set_wol_cfg(hdev, wol_info); -} - static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev) { struct pci_dev *pdev = ae_dev->pdev; @@ -12469,11 +12276,6 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev) /* Enable MISC vector(vector0) */ hclge_enable_vector(&hdev->misc_vector, true); - ret = hclge_init_wol(hdev); - if (ret) - dev_warn(&pdev->dev, - "failed to wake on lan init, ret = %d\n", ret); - hclge_state_init(hdev); hdev->last_reset_time = jiffies; @@ -12856,8 +12658,6 @@ static int hclge_reset_ae_dev(struct hnae3_ae_dev *ae_dev) hclge_init_rxd_adv_layout(hdev); - (void)hclge_update_wol(hdev); - dev_info(&pdev->dev, "Reset done, %s driver initialization finished.\n", HCLGE_DRIVER_NAME); @@ -13904,8 +13704,6 @@ struct hnae3_ae_ops hclge_ops = { .get_link_diagnosis_info = hclge_get_link_diagnosis_info, .clean_vf_config = hclge_clean_vport_config, .get_dscp_prio = hclge_get_dscp_prio, - .get_wol = hclge_get_wol, - .set_wol = hclge_set_wol, .priv_ops = hclge_ext_ops_handle, }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h index 92b9a8bf2f77..24e7f69dd0b6 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h @@ -252,13 +252,6 @@ enum HCLGE_MAC_DUPLEX { #define QUERY_SFP_SPEED 0 #define QUERY_ACTIVE_SPEED 1 -struct hclge_wol_info { - u32 wol_support_mode; /* store the wake on lan info */ - u32 wol_current_mode; - u8 wol_sopass[SOPASS_MAX]; - u8 wol_sopass_size; -}; - struct hclge_mac { u8 mac_id; u8 phy_addr; @@ -278,7 +271,6 @@ struct hclge_mac { u32 user_fec_mode; u32 fec_ability; int link; /* store the link status of mac & phy (if phy exists) */ - struct hclge_wol_info wol; struct phy_device *phydev; struct mii_bus *mdio_bus; phy_interface_t phy_if; @@ -1156,8 +1148,6 @@ int hclge_register_sysfs(struct hclge_dev *hdev); void hclge_unregister_sysfs(struct hclge_dev *hdev); int hclge_cfg_mac_speed_dup_hw(struct hclge_dev *hdev, int speed, u8 duplex, u8 lane_num); -int hclge_get_wol_supported_mode(struct hclge_dev *hdev, u32 *wol_supported); -int hclge_get_wol_cfg(struct hclge_dev *hdev, u32 *mode); struct hclge_vport *hclge_get_vf_vport(struct hclge_dev *hdev, int vf); int hclge_inform_vf_reset(struct hclge_vport *vport, u16 reset_type); void hclge_reset_task_schedule(struct hclge_dev *hdev); -- Gitee From 32e6e17f5d64fa08f6a7d6075852587ac13e1b32 Mon Sep 17 00:00:00 2001 From: Hao Lan Date: Mon, 27 Mar 2023 21:55:04 +0800 Subject: [PATCH 09/12] net: hns3: support wake on lan configuration and query mainline inclusion from mainline-v6.4-rc1 commit 3b064f541be822dc095991c6dda20a75eb51db5e category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I7ON9Y CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=3b064f541be822dc095991c6dda20a75eb51db5e ---------------------------------------------------------------------- The HNS3 driver supports Wake-on-LAN, which can wake up the server from power off state to power on state by magic packet or magic security packet. ChangeLog: v1->v2: Deleted the debugfs function that overlaps with the ethtool function from suggestion of Andrew Lunn. v2->v3: Return the wol configuration stored in driver, suggested by Alexander H Duyck. v3->v4: Add a helper to go from netdev to the local struct, suggested by Simon Horman and Jakub Kicinski. Reviewed-by: Simon Horman Signed-off-by: Hao Lan Signed-off-by: David S. Miller Signed-off-by: Jiantao Xiao --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 12 ++ .../hns3/hns3_common/hclge_comm_cmd.c | 1 + .../hns3/hns3_common/hclge_comm_cmd.h | 3 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 3 + .../net/ethernet/hisilicon/hns3/hns3_enet.h | 6 + .../ethernet/hisilicon/hns3/hns3_ethtool.c | 27 ++++ .../hisilicon/hns3/hns3pf/hclge_cmd.h | 12 ++ .../hisilicon/hns3/hns3pf/hclge_main.c | 130 ++++++++++++++++++ .../hisilicon/hns3/hns3pf/hclge_main.h | 8 ++ 9 files changed, 202 insertions(+) diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 7a0ae55e9488..f9508de43d05 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -101,6 +101,7 @@ enum HNAE3_DEV_CAP_BITS { HNAE3_DEV_SUPPORT_MC_MAC_MNG_B, HNAE3_DEV_SUPPORT_CQ_B, HNAE3_DEV_SUPPORT_LANE_NUM_B, + HNAE3_DEV_SUPPORT_WOL_B, HNAE3_DEV_SUPPORT_VF_FAULT_B, HNAE3_DEV_SUPPORT_NOTIFY_PKT_B, }; @@ -168,6 +169,9 @@ enum HNAE3_DEV_CAP_BITS { #define hnae3_ae_dev_lane_num_supported(ae_dev) \ test_bit(HNAE3_DEV_SUPPORT_LANE_NUM_B, (ae_dev)->caps) +#define hnae3_ae_dev_wol_supported(ae_dev) \ + test_bit(HNAE3_DEV_SUPPORT_WOL_B, (ae_dev)->caps) + #define hnae3_ae_dev_vf_fault_supported(ae_dev) \ test_bit(HNAE3_DEV_SUPPORT_VF_FAULT_B, (ae_dev)->caps) @@ -578,6 +582,10 @@ struct hnae3_ae_dev { * Get phc info * clean_vf_config * Clean residual vf info after disable sriov + * get_wol + * Get wake on lan info + * set_wol + * Config wake on lan */ struct hnae3_ae_ops { int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev); @@ -775,6 +783,10 @@ struct hnae3_ae_ops { void (*clean_vf_config)(struct hnae3_ae_dev *ae_dev, int num_vfs); int (*get_dscp_prio)(struct hnae3_handle *handle, u8 dscp, u8 *tc_map_mode, u8 *priority); + void (*get_wol)(struct hnae3_handle *handle, + struct ethtool_wolinfo *wol); + int (*set_wol)(struct hnae3_handle *handle, + struct ethtool_wolinfo *wol); int (*priv_ops)(struct hnae3_handle *handle, int opcode, void *data, size_t length); }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c index 3f5d5b803484..bd7077fdcd30 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c @@ -154,6 +154,7 @@ static const struct hclge_comm_caps_bit_map hclge_pf_cmd_caps[] = { {HCLGE_COMM_CAP_GRO_B, HNAE3_DEV_SUPPORT_GRO_B}, {HCLGE_COMM_CAP_FD_B, HNAE3_DEV_SUPPORT_FD_B}, {HCLGE_COMM_CAP_LANE_NUM_B, HNAE3_DEV_SUPPORT_LANE_NUM_B}, + {HCLGE_COMM_CAP_WOL_B, HNAE3_DEV_SUPPORT_WOL_B}, {HCLGE_COMM_CAP_VF_FAULT_B, HNAE3_DEV_SUPPORT_VF_FAULT_B}, {HCLGE_COMM_CAP_NOTIFY_PKT_B, HNAE3_DEV_SUPPORT_NOTIFY_PKT_B}, }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h index 10b37baceaeb..eb3fd3447bab 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h @@ -295,6 +295,8 @@ enum hclge_opcode_type { HCLGE_PPP_CMD0_INT_CMD = 0x2100, HCLGE_PPP_CMD1_INT_CMD = 0x2101, HCLGE_MAC_ETHERTYPE_IDX_RD = 0x2105, + HCLGE_OPC_WOL_GET_SUPPORTED_MODE = 0x2201, + HCLGE_OPC_WOL_CFG = 0x2202, HCLGE_NCSI_INT_EN = 0x2401, /* ROH MAC commands */ @@ -346,6 +348,7 @@ enum HCLGE_COMM_CAP_BITS { HCLGE_COMM_CAP_FD_B = 21, HCLGE_COMM_CAP_VF_FAULT_B = 26, HCLGE_COMM_CAP_LANE_NUM_B = 27, + HCLGE_COMM_CAP_WOL_B = 28, HCLGE_COMM_CAP_NOTIFY_PKT_B = 29, }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 763eb71f8795..84f2a709554f 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -402,6 +402,9 @@ static struct hns3_dbg_cap_info hns3_dbg_cap[] = { }, { .name = "support modify vlan filter state", .cap_bit = HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, + }, { + .name = "support wake on lan", + .cap_bit = HNAE3_DEV_SUPPORT_WOL_B, }, { .name = "support vf fault detect", .cap_bit = HNAE3_DEV_SUPPORT_VF_FAULT_B, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h index 85c352fff83b..861979579c36 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h @@ -755,6 +755,12 @@ static inline unsigned int hns3_page_order(struct hns3_enet_ring *ring) #define hns3_get_handle(ndev) \ (((struct hns3_nic_priv *)netdev_priv(ndev))->ae_handle) +#define hns3_get_ae_dev(handle) \ + (pci_get_drvdata((handle)->pdev)) + +#define hns3_get_ops(handle) \ + ((handle)->ae_algo->ops) + #define hns3_gl_usec_to_reg(int_gl) ((int_gl) >> 1) #define hns3_gl_round_down(int_gl) round_down(int_gl, 2) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c b/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c index 44ad1e9f4618..ff62515a36ee 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c @@ -2042,6 +2042,31 @@ static int hns3_get_link_ext_state(struct net_device *netdev, return -ENODATA; } +static void hns3_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) +{ + struct hnae3_handle *handle = hns3_get_handle(netdev); + const struct hnae3_ae_ops *ops = hns3_get_ops(handle); + struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle); + + if (!hnae3_ae_dev_wol_supported(ae_dev)) + return; + + ops->get_wol(handle, wol); +} + +static int hns3_set_wol(struct net_device *netdev, + struct ethtool_wolinfo *wol) +{ + struct hnae3_handle *handle = hns3_get_handle(netdev); + const struct hnae3_ae_ops *ops = hns3_get_ops(handle); + struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle); + + if (!hnae3_ae_dev_wol_supported(ae_dev)) + return -EOPNOTSUPP; + + return ops->set_wol(handle, wol); +} + static const struct ethtool_ops hns3vf_ethtool_ops = { .supported_coalesce_params = HNS3_ETHTOOL_COALESCE, .supported_ring_params = HNS3_ETHTOOL_RING, @@ -2116,6 +2141,8 @@ static const struct ethtool_ops hns3_ethtool_ops = { .set_tunable = hns3_set_tunable, .reset = hns3_set_reset, .get_link_ext_state = hns3_get_link_ext_state, + .get_wol = hns3_get_wol, + .set_wol = hns3_set_wol, }; void hns3_ethtool_set_ops(struct net_device *netdev) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h index bf3028b019bb..e18ee08df327 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h @@ -898,6 +898,18 @@ struct hclge_phy_reg_cmd { u8 rsv2[12]; }; +struct hclge_wol_cfg_cmd { + __le32 wake_on_lan_mode; + u8 sopass[SOPASS_MAX]; + u8 sopass_size; + u8 rsv[13]; +}; + +struct hclge_query_wol_supported_cmd { + __le32 supported_wake_mode; + u8 rsv[20]; +}; + struct hclge_hw; int hclge_cmd_send(struct hclge_hw *hw, struct hclge_desc *desc, int num); enum hclge_comm_cmd_status hclge_cmd_mdio_write(struct hclge_hw *hw, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index e4d4f1dc2980..b518ad282ccb 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -12074,6 +12074,124 @@ static void hclge_uninit_rxd_adv_layout(struct hclge_dev *hdev) hclge_write_dev(&hdev->hw, HCLGE_RXD_ADV_LAYOUT_EN_REG, 0); } +static struct hclge_wol_info *hclge_get_wol_info(struct hnae3_handle *handle) +{ + struct hclge_vport *vport = hclge_get_vport(handle); + + return &vport->back->hw.mac.wol; +} + +static int hclge_get_wol_supported_mode(struct hclge_dev *hdev, + u32 *wol_supported) +{ + struct hclge_query_wol_supported_cmd *wol_supported_cmd; + struct hclge_desc desc; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_WOL_GET_SUPPORTED_MODE, + true); + wol_supported_cmd = (struct hclge_query_wol_supported_cmd *)desc.data; + + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to query wol supported, ret = %d\n", ret); + return ret; + } + + *wol_supported = le32_to_cpu(wol_supported_cmd->supported_wake_mode); + + return 0; +} + +static int hclge_set_wol_cfg(struct hclge_dev *hdev, + struct hclge_wol_info *wol_info) +{ + struct hclge_wol_cfg_cmd *wol_cfg_cmd; + struct hclge_desc desc; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_WOL_CFG, false); + wol_cfg_cmd = (struct hclge_wol_cfg_cmd *)desc.data; + wol_cfg_cmd->wake_on_lan_mode = cpu_to_le32(wol_info->wol_current_mode); + wol_cfg_cmd->sopass_size = wol_info->wol_sopass_size; + memcpy(wol_cfg_cmd->sopass, wol_info->wol_sopass, SOPASS_MAX); + + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + dev_err(&hdev->pdev->dev, + "failed to set wol config, ret = %d\n", ret); + + return ret; +} + +static int hclge_update_wol(struct hclge_dev *hdev) +{ + struct hclge_wol_info *wol_info = &hdev->hw.mac.wol; + + if (!hnae3_ae_dev_wol_supported(hdev->ae_dev)) + return 0; + + return hclge_set_wol_cfg(hdev, wol_info); +} + +static int hclge_init_wol(struct hclge_dev *hdev) +{ + struct hclge_wol_info *wol_info = &hdev->hw.mac.wol; + int ret; + + if (!hnae3_ae_dev_wol_supported(hdev->ae_dev)) + return 0; + + memset(wol_info, 0, sizeof(struct hclge_wol_info)); + ret = hclge_get_wol_supported_mode(hdev, + &wol_info->wol_support_mode); + if (ret) { + wol_info->wol_support_mode = 0; + return ret; + } + + return hclge_update_wol(hdev); +} + +static void hclge_get_wol(struct hnae3_handle *handle, + struct ethtool_wolinfo *wol) +{ + struct hclge_wol_info *wol_info = hclge_get_wol_info(handle); + + wol->supported = wol_info->wol_support_mode; + wol->wolopts = wol_info->wol_current_mode; + if (wol_info->wol_current_mode & WAKE_MAGICSECURE) + memcpy(wol->sopass, wol_info->wol_sopass, SOPASS_MAX); +} + +static int hclge_set_wol(struct hnae3_handle *handle, + struct ethtool_wolinfo *wol) +{ + struct hclge_wol_info *wol_info = hclge_get_wol_info(handle); + struct hclge_vport *vport = hclge_get_vport(handle); + u32 wol_mode; + int ret; + + wol_mode = wol->wolopts; + if (wol_mode & ~wol_info->wol_support_mode) + return -EINVAL; + + wol_info->wol_current_mode = wol_mode; + if (wol_mode & WAKE_MAGICSECURE) { + memcpy(wol_info->wol_sopass, wol->sopass, SOPASS_MAX); + wol_info->wol_sopass_size = SOPASS_MAX; + } else { + wol_info->wol_sopass_size = 0; + } + + ret = hclge_set_wol_cfg(vport->back, wol_info); + if (ret) + wol_info->wol_current_mode = 0; + + return ret; +} + static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev) { struct pci_dev *pdev = ae_dev->pdev; @@ -12276,6 +12394,11 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev) /* Enable MISC vector(vector0) */ hclge_enable_vector(&hdev->misc_vector, true); + ret = hclge_init_wol(hdev); + if (ret) + dev_warn(&pdev->dev, + "failed to wake on lan init, ret = %d\n", ret); + hclge_state_init(hdev); hdev->last_reset_time = jiffies; @@ -12658,6 +12781,11 @@ static int hclge_reset_ae_dev(struct hnae3_ae_dev *ae_dev) hclge_init_rxd_adv_layout(hdev); + ret = hclge_update_wol(hdev); + if (ret) + dev_warn(&pdev->dev, + "failed to update wol config, ret = %d\n", ret); + dev_info(&pdev->dev, "Reset done, %s driver initialization finished.\n", HCLGE_DRIVER_NAME); @@ -13704,6 +13832,8 @@ struct hnae3_ae_ops hclge_ops = { .get_link_diagnosis_info = hclge_get_link_diagnosis_info, .clean_vf_config = hclge_clean_vport_config, .get_dscp_prio = hclge_get_dscp_prio, + .get_wol = hclge_get_wol, + .set_wol = hclge_set_wol, .priv_ops = hclge_ext_ops_handle, }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h index 24e7f69dd0b6..d0cacdd8aa80 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h @@ -252,6 +252,13 @@ enum HCLGE_MAC_DUPLEX { #define QUERY_SFP_SPEED 0 #define QUERY_ACTIVE_SPEED 1 +struct hclge_wol_info { + u32 wol_support_mode; /* store the wake on lan info */ + u32 wol_current_mode; + u8 wol_sopass[SOPASS_MAX]; + u8 wol_sopass_size; +}; + struct hclge_mac { u8 mac_id; u8 phy_addr; @@ -271,6 +278,7 @@ struct hclge_mac { u32 user_fec_mode; u32 fec_ability; int link; /* store the link status of mac & phy (if phy exists) */ + struct hclge_wol_info wol; struct phy_device *phydev; struct mii_bus *mdio_bus; phy_interface_t phy_if; -- Gitee From a21b75c3fa1a478894db7b80c260237c91ec4837 Mon Sep 17 00:00:00 2001 From: Hao Lan Date: Wed, 30 Nov 2022 18:23:58 +0800 Subject: [PATCH 10/12] net: hns3: support debugfs for wake on lan driver inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I7ON9Y CVE: NA ---------------------------------------------------------------------- Implement debugfs for wake on lan to hns3. The debugfs support verify the firmware wake on lan configuration. Signed-off-by: Hao Lan Signed-off-by: Jiantao Xiao Reviewed-by: Yue Haibing Signed-off-by: Zheng Zengkai --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 7 +++ .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 62 +++++++++++++++++++ .../hisilicon/hns3/hns3pf/hclge_main.c | 24 ++++++- .../hisilicon/hns3/hns3pf/hclge_main.h | 2 + 5 files changed, 94 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index f9508de43d05..d24b72da6775 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -335,6 +335,7 @@ enum hnae3_dbg_cmd { HNAE3_DBG_CMD_UMV_INFO, HNAE3_DBG_CMD_PAGE_POOL_INFO, HNAE3_DBG_CMD_COAL_INFO, + HNAE3_DBG_CMD_WOL_INFO, HNAE3_DBG_CMD_UNKNOWN, }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 84f2a709554f..6082805fce92 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -357,6 +357,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { .buf_len = HNS3_DBG_READ_LEN_1MB, .init = hns3_dbg_common_file_init, }, + { + .name = "wol_info", + .cmd = HNAE3_DBG_CMD_WOL_INFO, + .dentry = HNS3_DBG_DENTRY_COMMON, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, }; static struct hns3_dbg_cap_info hns3_dbg_cap[] = { diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index 7fd6c79b98e9..dd7e830d5ace 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -2513,6 +2513,64 @@ static int hclge_dbg_dump_mac_mc(struct hclge_dev *hdev, char *buf, int len) return 0; } +static void hclge_dump_wol_mode(u32 mode, char *buf, int len, int *pos) +{ + if (mode & WAKE_PHY) + *pos += scnprintf(buf + *pos, len - *pos, " [p]phy\n"); + + if (mode & WAKE_UCAST) + *pos += scnprintf(buf + *pos, len - *pos, " [u]unicast\n"); + + if (mode & WAKE_MCAST) + *pos += scnprintf(buf + *pos, len - *pos, " [m]multicast\n"); + + if (mode & WAKE_BCAST) + *pos += scnprintf(buf + *pos, len - *pos, " [b]broadcast\n"); + + if (mode & WAKE_ARP) + *pos += scnprintf(buf + *pos, len - *pos, " [a]arp\n"); + + if (mode & WAKE_MAGIC) + *pos += scnprintf(buf + *pos, len - *pos, " [g]magic\n"); + + if (mode & WAKE_MAGICSECURE) + *pos += scnprintf(buf + *pos, len - *pos, + " [s]magic secured\n"); + + if (mode & WAKE_FILTER) + *pos += scnprintf(buf + *pos, len - *pos, " [f]filter\n"); +} + +static int hclge_dbg_dump_wol_info(struct hclge_dev *hdev, char *buf, int len) +{ + u32 wol_supported; + int pos = 0; + u32 mode; + + if (!hnae3_ae_dev_wol_supported(hdev->ae_dev)) { + pos += scnprintf(buf + pos, len - pos, + "wake-on-lan is unsupported\n"); + return 0; + } + + pos += scnprintf(buf + pos, len - pos, "wake-on-lan mode:\n"); + pos += scnprintf(buf + pos, len - pos, " supported:\n"); + if (hclge_get_wol_supported_mode(hdev, &wol_supported)) + return -EINVAL; + + hclge_dump_wol_mode(wol_supported, buf, len, &pos); + + pos += scnprintf(buf + pos, len - pos, " current:\n"); + if (hclge_get_wol_cfg(hdev, &mode)) + return -EINVAL; + if (mode) + hclge_dump_wol_mode(mode, buf, len, &pos); + else + pos += scnprintf(buf + pos, len - pos, " [d]disabled\n"); + + return 0; +} + static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { { .cmd = HNAE3_DBG_CMD_TM_NODES, @@ -2662,6 +2720,10 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { .cmd = HNAE3_DBG_CMD_UMV_INFO, .dbg_dump = hclge_dbg_dump_umv_info, }, + { + .cmd = HNAE3_DBG_CMD_WOL_INFO, + .dbg_dump = hclge_dbg_dump_wol_info, + }, }; int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index b518ad282ccb..7e8a82898328 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -12081,8 +12081,8 @@ static struct hclge_wol_info *hclge_get_wol_info(struct hnae3_handle *handle) return &vport->back->hw.mac.wol; } -static int hclge_get_wol_supported_mode(struct hclge_dev *hdev, - u32 *wol_supported) +int hclge_get_wol_supported_mode(struct hclge_dev *hdev, + u32 *wol_supported) { struct hclge_query_wol_supported_cmd *wol_supported_cmd; struct hclge_desc desc; @@ -12104,6 +12104,26 @@ static int hclge_get_wol_supported_mode(struct hclge_dev *hdev, return 0; } +int hclge_get_wol_cfg(struct hclge_dev *hdev, u32 *mode) +{ + struct hclge_wol_cfg_cmd *wol_cfg_cmd; + struct hclge_desc desc; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_WOL_CFG, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to get wol config, ret = %d\n", ret); + return ret; + } + + wol_cfg_cmd = (struct hclge_wol_cfg_cmd *)desc.data; + *mode = le32_to_cpu(wol_cfg_cmd->wake_on_lan_mode); + + return 0; +} + static int hclge_set_wol_cfg(struct hclge_dev *hdev, struct hclge_wol_info *wol_info) { diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h index d0cacdd8aa80..92b9a8bf2f77 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h @@ -1156,6 +1156,8 @@ int hclge_register_sysfs(struct hclge_dev *hdev); void hclge_unregister_sysfs(struct hclge_dev *hdev); int hclge_cfg_mac_speed_dup_hw(struct hclge_dev *hdev, int speed, u8 duplex, u8 lane_num); +int hclge_get_wol_supported_mode(struct hclge_dev *hdev, u32 *wol_supported); +int hclge_get_wol_cfg(struct hclge_dev *hdev, u32 *mode); struct hclge_vport *hclge_get_vf_vport(struct hclge_dev *hdev, int vf); int hclge_inform_vf_reset(struct hclge_vport *vport, u16 reset_type); void hclge_reset_task_schedule(struct hclge_dev *hdev); -- Gitee From d5f397c1d409211e9c227c8ee786ccccb3392f82 Mon Sep 17 00:00:00 2001 From: Hao Lan Date: Thu, 20 Jul 2023 10:05:07 +0800 Subject: [PATCH 11/12] net: hns3: fix the imp capability bit cannot exceed 32 bits issue mainline inclusion from mainline-v6.5-rc4 commit b27d0232e8897f7c896dc8ad80c9907dd57fd3f3 category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I7ON9Y CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=b27d0232e8897f7c896dc8ad80c9907dd57fd3f3 ---------------------------------------------------------------------- Current only the first 32 bits of the capability flag bit are considered. When the matching capability flag bit is greater than 31 bits, it will get an error bit.This patch use bitmap to solve this issue. It can handle each capability bit whitout bit width limit. Fixes: da77aef9cc58 ("net: hns3: create common cmdq resource allocate/free/query APIs") Signed-off-by: Hao Lan Signed-off-by: Jijie Shao Signed-off-by: David S. Miller Signed-off-by: Jiantao Xiao --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 3 ++- .../hns3/hns3_common/hclge_comm_cmd.c | 21 ++++++++++++++++--- 2 files changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index d24b72da6775..4192e2ff8f88 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -30,6 +30,7 @@ #include #include #include +#include #include #define HNAE3_MOD_VERSION "1.0" @@ -421,7 +422,7 @@ struct hnae3_ae_dev { unsigned long hw_err_reset_req; struct hnae3_dev_specs dev_specs; u32 dev_version; - unsigned long caps[BITS_TO_LONGS(HNAE3_DEV_CAPS_MAX_NUM)]; + DECLARE_BITMAP(caps, HNAE3_DEV_CAPS_MAX_NUM); void *priv; }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c index bd7077fdcd30..eb8506f481dc 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c @@ -172,6 +172,20 @@ static const struct hclge_comm_caps_bit_map hclge_vf_cmd_caps[] = { {HCLGE_COMM_CAP_GRO_B, HNAE3_DEV_SUPPORT_GRO_B}, }; +static void +hclge_comm_capability_to_bitmap(unsigned long *bitmap, __le32 *caps) +{ + const unsigned int words = HCLGE_COMM_QUERY_CAP_LENGTH; + u32 val[HCLGE_COMM_QUERY_CAP_LENGTH]; + unsigned int i; + + for (i = 0; i < words; i++) + val[i] = __le32_to_cpu(caps[i]); + + bitmap_from_arr32(bitmap, val, + HCLGE_COMM_QUERY_CAP_LENGTH * BITS_PER_TYPE(u32)); +} + static void hclge_comm_parse_capability(struct hnae3_ae_dev *ae_dev, bool is_pf, struct hclge_comm_query_version_cmd *cmd) @@ -180,11 +194,12 @@ hclge_comm_parse_capability(struct hnae3_ae_dev *ae_dev, bool is_pf, is_pf ? hclge_pf_cmd_caps : hclge_vf_cmd_caps; u32 size = is_pf ? ARRAY_SIZE(hclge_pf_cmd_caps) : ARRAY_SIZE(hclge_vf_cmd_caps); - u32 caps, i; + DECLARE_BITMAP(caps, HCLGE_COMM_QUERY_CAP_LENGTH * BITS_PER_TYPE(u32)); + u32 i; - caps = __le32_to_cpu(cmd->caps[0]); + hclge_comm_capability_to_bitmap(caps, cmd->caps); for (i = 0; i < size; i++) - if (hnae3_get_bit(caps, caps_map[i].imp_bit)) + if (test_bit(caps_map[i].imp_bit, caps)) set_bit(caps_map[i].local_bit, ae_dev->caps); } -- Gitee From e94470344ecad6c3038e03fc72f15e5aa3a74e5b Mon Sep 17 00:00:00 2001 From: Hao Lan Date: Thu, 20 Jul 2023 10:05:08 +0800 Subject: [PATCH 12/12] net: hns3: add tm flush when setting tm mainline inclusion from mainline-v6.5-rc4 commit 6d2336120aa6e1a8a64fa5d6ee5c3f3d0809fe9b category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I7ON9Y CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=6d2336120aa6e1a8a64fa5d6ee5c3f3d0809fe9b ---------------------------------------------------------------------- When the tm module is configured with traffic, traffic may be abnormal. This patch fixes this problem. Before the tm module is configured, traffic processing should be stopped. After the tm module is configured, traffic processing is enabled. Signed-off-by: Hao Lan Signed-off-by: Jijie Shao Signed-off-by: David S. Miller Signed-off-by: Jiantao Xiao --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 4 +++ .../hns3/hns3_common/hclge_comm_cmd.c | 1 + .../hns3/hns3_common/hclge_comm_cmd.h | 2 ++ .../ethernet/hisilicon/hns3/hns3_debugfs.c | 3 ++ .../hisilicon/hns3/hns3pf/hclge_dcb.c | 34 ++++++++++++++++--- .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.c | 31 ++++++++++++++++- .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | 4 +++ 7 files changed, 73 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 4192e2ff8f88..d2118e3513e5 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -105,6 +105,7 @@ enum HNAE3_DEV_CAP_BITS { HNAE3_DEV_SUPPORT_WOL_B, HNAE3_DEV_SUPPORT_VF_FAULT_B, HNAE3_DEV_SUPPORT_NOTIFY_PKT_B, + HNAE3_DEV_SUPPORT_TM_FLUSH_B, }; #define hnae3_ae_dev_fd_supported(ae_dev) \ @@ -179,6 +180,9 @@ enum HNAE3_DEV_CAP_BITS { #define hnae3_ae_dev_notify_pkt_supported(ae_dev) \ test_bit(HNAE3_DEV_SUPPORT_NOTIFY_PKT_B, (ae_dev)->caps) +#define hnae3_ae_dev_tm_flush_supported(hdev) \ + test_bit(HNAE3_DEV_SUPPORT_TM_FLUSH_B, (hdev)->ae_dev->caps) + enum HNAE3_PF_CAP_BITS { HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B = 0, }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c index eb8506f481dc..31f107b8a6c7 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c @@ -157,6 +157,7 @@ static const struct hclge_comm_caps_bit_map hclge_pf_cmd_caps[] = { {HCLGE_COMM_CAP_WOL_B, HNAE3_DEV_SUPPORT_WOL_B}, {HCLGE_COMM_CAP_VF_FAULT_B, HNAE3_DEV_SUPPORT_VF_FAULT_B}, {HCLGE_COMM_CAP_NOTIFY_PKT_B, HNAE3_DEV_SUPPORT_NOTIFY_PKT_B}, + {HCLGE_COMM_CAP_TM_FLUSH_B, HNAE3_DEV_SUPPORT_TM_FLUSH_B}, }; static const struct hclge_comm_caps_bit_map hclge_vf_cmd_caps[] = { diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h index eb3fd3447bab..6557e654d2fe 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h @@ -153,6 +153,7 @@ enum hclge_opcode_type { HCLGE_OPC_TM_INTERNAL_STS = 0x0850, HCLGE_OPC_TM_INTERNAL_CNT = 0x0851, HCLGE_OPC_TM_INTERNAL_STS_1 = 0x0852, + HCLGE_OPC_TM_FLUSH = 0x0872, /* Packet buffer allocate commands */ HCLGE_OPC_TX_BUFF_ALLOC = 0x0901, @@ -350,6 +351,7 @@ enum HCLGE_COMM_CAP_BITS { HCLGE_COMM_CAP_LANE_NUM_B = 27, HCLGE_COMM_CAP_WOL_B = 28, HCLGE_COMM_CAP_NOTIFY_PKT_B = 29, + HCLGE_COMM_CAP_TM_FLUSH_B = 31, }; enum HCLGE_COMM_API_CAP_BITS { diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 6082805fce92..ec76ee6a764c 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -415,6 +415,9 @@ static struct hns3_dbg_cap_info hns3_dbg_cap[] = { }, { .name = "support vf fault detect", .cap_bit = HNAE3_DEV_SUPPORT_VF_FAULT_B, + }, { + .name = "support tm flush", + .cap_bit = HNAE3_DEV_SUPPORT_TM_FLUSH_B, } }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c index 09362823140d..fad5a5ff3cda 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c @@ -227,6 +227,10 @@ static int hclge_notify_down_uinit(struct hclge_dev *hdev) if (ret) return ret; + ret = hclge_tm_flush_cfg(hdev, true); + if (ret) + return ret; + return hclge_notify_client(hdev, HNAE3_UNINIT_CLIENT); } @@ -238,6 +242,10 @@ static int hclge_notify_init_up(struct hclge_dev *hdev) if (ret) return ret; + ret = hclge_tm_flush_cfg(hdev, false); + if (ret) + return ret; + return hclge_notify_client(hdev, HNAE3_UP_CLIENT); } @@ -324,6 +332,7 @@ static int hclge_ieee_setpfc(struct hnae3_handle *h, struct ieee_pfc *pfc) struct net_device *netdev = h->kinfo.netdev; struct hclge_dev *hdev = vport->back; u8 i, j, pfc_map, *prio_tc; + int last_bad_ret = 0; int ret; if (!(hdev->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) @@ -361,13 +370,28 @@ static int hclge_ieee_setpfc(struct hnae3_handle *h, struct ieee_pfc *pfc) if (ret) return ret; - ret = hclge_buffer_alloc(hdev); - if (ret) { - hclge_notify_client(hdev, HNAE3_UP_CLIENT); + ret = hclge_tm_flush_cfg(hdev, true); + if (ret) return ret; - } - return hclge_notify_client(hdev, HNAE3_UP_CLIENT); + /* No matter whether the following operations are performed + * successfully or not, disabling the tm flush and notify + * the network status to up are necessary. + * Do not return immediately. + */ + ret = hclge_buffer_alloc(hdev); + if (ret) + last_bad_ret = ret; + + ret = hclge_tm_flush_cfg(hdev, false); + if (ret) + last_bad_ret = ret; + + ret = hclge_notify_client(hdev, HNAE3_UP_CLIENT); + if (ret) + last_bad_ret = ret; + + return last_bad_ret; } static int hclge_ieee_setapp(struct hnae3_handle *h, struct dcb_app *app) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c index 061e3535f4e9..6f399b43c1f2 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c @@ -1485,7 +1485,11 @@ int hclge_tm_schd_setup_hw(struct hclge_dev *hdev) return ret; /* Cfg schd mode for each level schd */ - return hclge_tm_schd_mode_hw(hdev); + ret = hclge_tm_schd_mode_hw(hdev); + if (ret) + return ret; + + return hclge_tm_flush_cfg(hdev, false); } static int hclge_pause_param_setup_hw(struct hclge_dev *hdev) @@ -2115,3 +2119,28 @@ int hclge_tm_get_port_shaper(struct hclge_dev *hdev, return 0; } + +int hclge_tm_flush_cfg(struct hclge_dev *hdev, bool enable) +{ + struct hclge_desc desc; + int ret; + + if (!hnae3_ae_dev_tm_flush_supported(hdev)) + return 0; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TM_FLUSH, false); + + desc.data[0] = cpu_to_le32(enable ? HCLGE_TM_FLUSH_EN_MSK : 0); + + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to config tm flush, ret = %d\n", ret); + return ret; + } + + if (enable) + msleep(HCLGE_TM_FLUSH_TIME_MS); + + return ret; +} diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h index 03dbdc694cd0..c8b69f5df19e 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h @@ -33,6 +33,9 @@ enum hclge_opcode_type; #define HCLGE_DSCP_MAP_TC_BD_NUM 2 #define HCLGE_DSCP_TC_SHIFT(n) (((n) & 1) * 4) +#define HCLGE_TM_FLUSH_TIME_MS 10 +#define HCLGE_TM_FLUSH_EN_MSK BIT(0) + struct hclge_pg_to_pri_link_cmd { u8 pg_id; u8 rsvd1[3]; @@ -275,4 +278,5 @@ int hclge_tm_get_port_shaper(struct hclge_dev *hdev, struct hclge_tm_shaper_para *para); int hclge_up_to_tc_map(struct hclge_dev *hdev); int hclge_dscp_to_tc_map(struct hclge_dev *hdev); +int hclge_tm_flush_cfg(struct hclge_dev *hdev, bool enable); #endif -- Gitee