diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst
index 1f06e18a1859849c0f837c06de511650c03eb842..af12c363a699e8ae8663de093ff66a7c14564aaa 100644
--- a/Documentation/arm64/silicon-errata.rst
+++ b/Documentation/arm64/silicon-errata.rst
@@ -156,7 +156,7 @@ stable kernels.
 +----------------+-----------------+-----------------+-----------------------------+
 | Hisilicon      | LINXICORE9100   | #162100125      | HISILICON_ERRATUM_162100125 |
 +----------------+-----------------+-----------------+-----------------------------+
-| Hisilicon      | LINXICORE9100   | #162100602      | HISILICON_ERRATUM_162100602 |
+| Hisilicon      | SMMUv3          | #162100602      | HISILICON_ERRATUM_162100602 |
 +----------------+-----------------+-----------------+-----------------------------+
 | Hisilicon      | HIP09           | #162102203      | HISILICON_ERRATUM_162102203 |
 +----------------+-----------------+-----------------+-----------------------------+
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 429a6abb2f4dfe7b1759c9b77ebce31284b2833c..a1eab2b7d5b3c1bca364ce2802f0c6753499c62b 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -838,16 +838,15 @@ config HISILICON_ERRATUM_162102203
 
 config HISILICON_ERRATUM_162100602
 	bool "Hisilicon erratum 162100602"
-	depends on ARM_SMMU_V3
+	depends on ARM_SMMU_V3 && ARCH_HISI
 	default y
 	help
-	 On Hisilicon LINXICORE9100 cores, SMMU pagetable prefetch features may
-	 prefetch and use a invalid PTE even the PTE is valid at that time. This
-	 will cause the device trigger fake pagefaults. If the SMMU works in
-	 terminate mode, transactions which occur fake pagefaults will be aborted,
-	 and could result in unexpected errors.
+	  SMMU pagetable prefetch features may prefetch and use a invalid PTE even
+	  the PTE is valid at that time. This will cause the device trigger fake
+	  pagefaults. If the SMMU works in terminate mode, transactions which occur
+	  fake pagefaults will be aborted, and could result in unexpected errors.
 
-	 If unsure, say Y.
+	  If unsure, say Y.
 
 config QCOM_FALKOR_ERRATUM_1003
 	bool "Falkor E1003: Incorrect translation due to ASID change"
diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h
index 0220f10cddd7ff1fcb987a587f9a06c6eaf227b7..ce9fbf260a3cf20c0cbab1ede4f5982dbf3c7ac2 100644
--- a/arch/arm64/include/asm/cpucaps.h
+++ b/arch/arm64/include/asm/cpucaps.h
@@ -81,7 +81,6 @@
 #define ARM64_HAS_PBHA_STAGE2			73
 #define ARM64_SME				74
 #define ARM64_SME_FA64				75
-#define ARM64_WORKAROUND_HISILICON_ERRATUM_162100602	76
 
 #define ARM64_NCAPS				80
 
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index 6a3e948d5c2c0e7beba9b8f9a97b7b1b6f6de71b..7f175b3aac152f3b7d9b2e24dc347b4b72cd0a45 100644
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -331,13 +331,6 @@ static const struct midr_range hisilicon_erratum_162100125_cpus[] = {
 };
 #endif
 
-#ifdef CONFIG_HISILICON_ERRATUM_162100602
-static const struct midr_range hisilicon_erratum_162100602_cpus[] = {
-	MIDR_REV(MIDR_HISI_LINXICORE9100, 0, 0),
-	{},
-};
-#endif
-
 #ifdef CONFIG_QCOM_FALKOR_ERRATUM_1003
 static const struct arm64_cpu_capabilities qcom_erratum_1003_list[] = {
 	{
@@ -540,13 +533,6 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
 		ERRATA_MIDR_RANGE_LIST(hisilicon_erratum_162100125_cpus),
 	},
 #endif
-#ifdef CONFIG_HISILICON_ERRATUM_162100602
-	{
-		.desc = "Hisilicon erratum 162100602",
-		.capability = ARM64_WORKAROUND_HISILICON_ERRATUM_162100602,
-		ERRATA_MIDR_RANGE_LIST(hisilicon_erratum_162100602_cpus),
-	},
-#endif
 #ifdef CONFIG_QCOM_FALKOR_ERRATUM_1003
 	{
 		.desc = "Qualcomm Technologies Falkor/Kryo erratum 1003",
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index 458151b7fab2649822eee51361d206821678d545..9b9fff633546b755cde76879e0544a04482253f0 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -2948,7 +2948,7 @@ static void arm_smmu_iotlb_sync_map(struct iommu_domain *domain,
 	struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
 	size_t granule_size;
 
-	if (!cpus_have_const_cap(ARM64_WORKAROUND_HISILICON_ERRATUM_162100602))
+	if (!(smmu_domain->smmu->options & ARM_SMMU_OPT_SYNC_MAP))
 		return;
 
 	granule_size = 1 <<  __ffs(smmu_domain->domain.pgsize_bitmap);
@@ -5146,6 +5146,14 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu)
 		smmu->oas = 48;
 	}
 
+#ifdef CONFIG_HISILICON_ERRATUM_162100602
+	/* IIDR */
+	reg = readl_relaxed(smmu->base + ARM_SMMU_IIDR);
+	if (FIELD_GET(IIDR_VARIANT, reg) == 0x3 &&
+	    FIELD_GET(IIDR_REVISON, reg) == 0x2)
+		smmu->options |= ARM_SMMU_OPT_SYNC_MAP;
+#endif
+
 	if (arm_smmu_ops.pgsize_bitmap == -1UL)
 		arm_smmu_ops.pgsize_bitmap = smmu->pgsize_bitmap;
 	else
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
index 919473d2217b161fad53729ee8d9094b218e400f..776d326de105a03434849d430b4a454e81c4e157 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
@@ -80,6 +80,10 @@
 #define IDR5_VAX			GENMASK(11, 10)
 #define IDR5_VAX_52_BIT			1
 
+#define ARM_SMMU_IIDR			0x18
+#define IIDR_VARIANT			GENMASK(19, 16)
+#define IIDR_REVISON			GENMASK(15, 12)
+
 #define ARM_SMMU_CR0			0x20
 #define CR0_ATSCHK			(1 << 4)
 #define CR0_CMDQEN			(1 << 3)
@@ -712,6 +716,7 @@ struct arm_smmu_device {
 #define ARM_SMMU_OPT_SKIP_PREFETCH	(1 << 0)
 #define ARM_SMMU_OPT_PAGE0_REGS_ONLY	(1 << 1)
 #define ARM_SMMU_OPT_MSIPOLL		(1 << 2)
+#define ARM_SMMU_OPT_SYNC_MAP		(1 << 3)
 	u32				options;
 
 	union {