diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index fc56e4e30e29874017a38a92a6ab79346be156cc..2a875546bdc7432acffcff62f9482910a7078e3e 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1606,6 +1606,15 @@ config HW_PERF_EVENTS
 	def_bool y
 	depends on ARM_PMU
 
+config ARCH_LLC_128_LINE_SIZE
+	bool "Force 128 bytes alignment for fitting LLC cacheline"
+	depends on ARCH_HISI
+	default n
+	help
+	  As specific machine's LLC cacheline size may be up to
+	  128 bytes, gaining performance improvement from fitting
+	  128 Bytes LLC cache aligned.
+
 # Supported by clang >= 7.0 or GCC >= 12.0.0
 config CC_HAVE_SHADOW_CALL_STACK
 	def_bool $(cc-option, -fsanitize=shadow-call-stack -ffixed-x18)
diff --git a/arch/arm64/configs/openeuler_defconfig b/arch/arm64/configs/openeuler_defconfig
index 84229711848d684fd1eb3c2a9ec56a58e95b3b8b..3b8d78f944a01aa8eb1eb54bd1470293b65c9380 100644
--- a/arch/arm64/configs/openeuler_defconfig
+++ b/arch/arm64/configs/openeuler_defconfig
@@ -477,6 +477,7 @@ CONFIG_HZ=250
 CONFIG_SCHED_HRTICK=y
 CONFIG_ARCH_SPARSEMEM_ENABLE=y
 CONFIG_HW_PERF_EVENTS=y
+CONFIG_ARCH_LLC_128_LINE_SIZE=y
 CONFIG_CC_HAVE_SHADOW_CALL_STACK=y
 CONFIG_PARAVIRT=y
 CONFIG_PARAVIRT_SCHED=y
diff --git a/arch/arm64/include/asm/cache.h b/arch/arm64/include/asm/cache.h
index 1613779be63acfdcb31ecf782088d3d8b1ecddc7..8455df351ef89a30acb8e6f0e9d8942a14598818 100644
--- a/arch/arm64/include/asm/cache.h
+++ b/arch/arm64/include/asm/cache.h
@@ -8,6 +8,12 @@
 #define L1_CACHE_SHIFT		(6)
 #define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)
 
+#ifdef CONFIG_ARCH_LLC_128_LINE_SIZE
+#ifndef ____cacheline_aligned_128
+#define ____cacheline_aligned_128  __attribute__((__aligned__(128)))
+#endif
+#endif
+
 #define CLIDR_LOUU_SHIFT	27
 #define CLIDR_LOC_SHIFT		24
 #define CLIDR_LOUIS_SHIFT	21
diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c
index 8aab7ed414907e8b11d89bba99fe85bf534725a0..3511fc008a85d4ce1db6969b1a82847c42d7cc2b 100644
--- a/kernel/time/timekeeping.c
+++ b/kernel/time/timekeeping.c
@@ -48,9 +48,16 @@ DEFINE_RAW_SPINLOCK(timekeeper_lock);
  * cache line.
  */
 static struct {
+#ifdef CONFIG_ARCH_LLC_128_LINE_SIZE
+	u64		padding[8];
+#endif
 	seqcount_raw_spinlock_t	seq;
 	struct timekeeper	timekeeper;
+#ifdef CONFIG_ARCH_LLC_128_LINE_SIZE
+} tk_core ____cacheline_aligned_128 = {
+#else
 } tk_core ____cacheline_aligned = {
+#endif
 	.seq = SEQCNT_RAW_SPINLOCK_ZERO(tk_core.seq, &timekeeper_lock),
 };