{"release":{"tag":{"name":"4.19.90-2109.1.0","path":"/openeuler/kernel/tags/4.19.90-2109.1.0","tree_path":"/openeuler/kernel/tree/4.19.90-2109.1.0","message":"4.19.90-2109.1.0","commit":{"id":"bfb4f2afe04c34543850782c94e24886f7b7e6eb","short_id":"bfb4f2a","title":"iommu: smmuv2: Using the SMMU_BYPASS_DEV to bypass SMMU for some SoCs","title_markdown":"iommu: smmuv2: Using the SMMU_BYPASS_DEV to bypass SMMU for some SoCs","description":"\nhulk inclusion\ncategory: feature\nbugzilla: https://gitee.com/openeuler/kernel/issues/I41AUQ\nCVE: NA\n\n-------------------------------------\n\nExtended SMMU_BYPASS_DEV to support SMMU default bypass for some CPU SoCs\nwhich the SMMU is not functional well in address translation mode.\n\nThe mainline kernel already has the .def_domain_type hook for iommu_ops,\nso if we update the kernel in the future, we can add the CPU SoC SMMU bypass\ncode in the .def_domain_type hook, for now we just reuse the SMMU_BYPASS_DEV\nframwork.\n\nAfter we add the hook, we set all the devices for such SoCs in pass\nthrough mode, no matter adding iommu.passthrough=off/on or not in the\nboot cmdline.\n\nSigned-off-by: Hanjun Guo \u003Cguohanjun@huawei.com\u003E\nCc: Guo Hui \u003Cguohui@uniontech.com\u003E\nCc: Cheng Jian \u003Ccj.chengjian@huawei.com\u003E\nCc: Zhen Lei \u003Cthunder.leizhen@huawei.com\u003E\nCc: Xiuqi Xie \u003Cxiexiuqi@huawei.com\u003E\nReviewed-by: Xie XiuQi \u003Cxiexiuqi@huawei.com\u003E\nSigned-off-by: Cheng Jian \u003Ccj.chengjian@huawei.com\u003E","description_markdown":"hulk inclusion\ncategory: feature\nbugzilla: \u003Ca title=\"Issue: [openEuler] 支持飞腾FT2500双路服务器\" class=\"gfm gfm-issue\" href=\"/open_euler/dashboard?issue_id=I41AUQ\"\u003E#I41AUQ\u003C/a\u003ECVE: NA\n-------------------------------------\nExtended SMMU_BYPASS_DEV to support SMMU default bypass for some CPU SoCs\nwhich the SMMU is not functional well in address translation mode.\nThe mainline kernel already has the .def_domain_type hook for iommu_ops,\nso if we update the kernel in the future, we can add the CPU SoC SMMU bypass\ncode in the .def_domain_type hook, for now we just reuse the SMMU_BYPASS_DEV\nframwork.\nAfter we add the hook, we set all the devices for such SoCs in pass\nthrough mode, no matter adding iommu.passthrough=off/on or not in the\nboot cmdline.\nSigned-off-by: Hanjun Guo \u003Ca href=\"mailto:guohanjun@huawei.com\"\u003Eguohanjun@huawei.com\u003C/a\u003E\nCc: Guo Hui \u003Ca href=\"mailto:guohui@uniontech.com\"\u003Eguohui@uniontech.com\u003C/a\u003E\nCc: Cheng Jian \u003Ca href=\"mailto:cj.chengjian@huawei.com\"\u003Ecj.chengjian@huawei.com\u003C/a\u003E\nCc: Zhen Lei \u003Ca href=\"mailto:thunder.leizhen@huawei.com\"\u003Ethunder.leizhen@huawei.com\u003C/a\u003E\nCc: Xiuqi Xie \u003Ca href=\"mailto:xiexiuqi@huawei.com\"\u003Exiexiuqi@huawei.com\u003C/a\u003E\nReviewed-by: Xie XiuQi \u003Ca href=\"mailto:xiexiuqi@huawei.com\"\u003Exiexiuqi@huawei.com\u003C/a\u003E\nSigned-off-by: Cheng Jian \u003Ca href=\"mailto:cj.chengjian@huawei.com\"\u003Ecj.chengjian@huawei.com\u003C/a\u003E","message":"iommu: smmuv2: Using the SMMU_BYPASS_DEV to bypass SMMU for some SoCs\n\nhulk inclusion\ncategory: feature\nbugzilla: https://gitee.com/openeuler/kernel/issues/I41AUQ\nCVE: NA\n\n-------------------------------------\n\nExtended SMMU_BYPASS_DEV to support SMMU default bypass for some CPU SoCs\nwhich the SMMU is not functional well in address translation mode.\n\nThe mainline kernel already has the .def_domain_type hook for iommu_ops,\nso if we update the kernel in the future, we can add the CPU SoC SMMU bypass\ncode in the .def_domain_type hook, for now we just reuse the SMMU_BYPASS_DEV\nframwork.\n\nAfter we add the hook, we set all the devices for such SoCs in pass\nthrough mode, no matter adding iommu.passthrough=off/on or not in the\nboot cmdline.\n\nSigned-off-by: Hanjun Guo \u003Cguohanjun@huawei.com\u003E\nCc: Guo Hui \u003Cguohui@uniontech.com\u003E\nCc: Cheng Jian \u003Ccj.chengjian@huawei.com\u003E\nCc: Zhen Lei \u003Cthunder.leizhen@huawei.com\u003E\nCc: Xiuqi Xie \u003Cxiexiuqi@huawei.com\u003E\nReviewed-by: Xie XiuQi \u003Cxiexiuqi@huawei.com\u003E\nSigned-off-by: Cheng Jian \u003Ccj.chengjian@huawei.com\u003E\n","message_markdown":"iommu: smmuv2: Using the SMMU_BYPASS_DEV to bypass SMMU for some SoCs\nhulk inclusion\ncategory: feature\nbugzilla: \u003Ca title=\"Issue: [openEuler] 支持飞腾FT2500双路服务器\" class=\"gfm gfm-issue\" href=\"/open_euler/dashboard?issue_id=I41AUQ\"\u003E#I41AUQ\u003C/a\u003ECVE: NA\n-------------------------------------\nExtended SMMU_BYPASS_DEV to support SMMU default bypass for some CPU SoCs\nwhich the SMMU is not functional well in address translation mode.\nThe mainline kernel already has the .def_domain_type hook for iommu_ops,\nso if we update the kernel in the future, we can add the CPU SoC SMMU bypass\ncode in the .def_domain_type hook, for now we just reuse the SMMU_BYPASS_DEV\nframwork.\nAfter we add the hook, we set all the devices for such SoCs in pass\nthrough mode, no matter adding iommu.passthrough=off/on or not in the\nboot cmdline.\nSigned-off-by: Hanjun Guo \u003Ca href=\"mailto:guohanjun@huawei.com\"\u003Eguohanjun@huawei.com\u003C/a\u003E\nCc: Guo Hui \u003Ca href=\"mailto:guohui@uniontech.com\"\u003Eguohui@uniontech.com\u003C/a\u003E\nCc: Cheng Jian \u003Ca href=\"mailto:cj.chengjian@huawei.com\"\u003Ecj.chengjian@huawei.com\u003C/a\u003E\nCc: Zhen Lei \u003Ca href=\"mailto:thunder.leizhen@huawei.com\"\u003Ethunder.leizhen@huawei.com\u003C/a\u003E\nCc: Xiuqi Xie \u003Ca href=\"mailto:xiexiuqi@huawei.com\"\u003Exiexiuqi@huawei.com\u003C/a\u003E\nReviewed-by: Xie XiuQi \u003Ca href=\"mailto:xiexiuqi@huawei.com\"\u003Exiexiuqi@huawei.com\u003C/a\u003E\nSigned-off-by: Cheng Jian \u003Ca href=\"mailto:cj.chengjian@huawei.com\"\u003Ecj.chengjian@huawei.com\u003C/a\u003E","detail_path":"/openeuler/kernel/commit/bfb4f2afe04c34543850782c94e24886f7b7e6eb","commits_path":"/openeuler/kernel/commits/bfb4f2afe04c34543850782c94e24886f7b7e6eb","tree_path":"/openeuler/kernel/tree/bfb4f2afe04c34543850782c94e24886f7b7e6eb","author":{"name":"hanjun-guo","email":"guohanjun@huawei.com","username":"hanjun-guo","user_path":"/hanjun-guo","enterprise_user_path":null,"image_path":"no_portrait.png#hanjun-guo-hanjun-guo","is_gitee_user":true,"is_enterprise_user":false,"widget_url":""},"committer":{"name":"成坚  (CHENG Jian)","email":"cj.chengjian@huawei.com","username":"gatieme","user_path":"/gatieme","enterprise_user_path":null,"image_path":"no_portrait.png#成坚  (CHENG Jian)-gatieme","is_gitee_user":true,"is_enterprise_user":false,"widget_url":""},"authored_date":"2021-09-01T11:38:22+08:00","committed_date":"2021-09-01T11:43:48+08:00","signature":null,"build_state":null},"archive_path":"/openeuler/kernel/repository/archive/4.19.90-2109.1.0","signature":null},"operating":{"edit":false,"download":true,"destroy":false,"enterprise_forbid_zip":false},"release":{"title":"openEuler 20.03 update 4.19.90-2109.1.0","path":"/openeuler/kernel/releases/tag/4.19.90-2109.1.0","tag_path":"/openeuler/kernel/tree/4.19.90-2109.1.0","project_id":7696525,"created_at":"2021-09-01T11:53:05+08:00","is_prerelease":false,"description":"# 1 TASK\r\n-------\r\n\r\n| TASK | COMMIT |\r\n|:----:|:------:|\r\n|     bugzilla: https://gitee.com/openeuler/kernel/issues/I41AUQ | bfb4f2afe04c iommu: smmuv2: Using the SMMU_BYPASS_DEV to bypass SMMU for some SoCs\u003Cbr\u003Ed7d55cac8d80 iommu: dev_bypass: cleanup dev bypass code\u003Cbr\u003E92dfb050d816 arm64: phytium: using MIDR_PHYTIUM_FT2000PLUS instead of ARM_CPU_IMP_PHYTIUM\u003Cbr\u003E0213e93a2a53 arm64: Add MIDR encoding for PHYTIUM CPUs\u003Cbr\u003E |\r\n|     bugzilla: 46922, https://gitee.com/openeuler/kernel/issues/I41AUQ | 4e53f57b09fd arm64: Add MIDR encoding for HiSilicon Taishan CPUs\u003Cbr\u003E |\r\n|     bugzilla: 177205, https://gitee.com/openeuler/kernel/issues/I484Y1 | 74bd9b82dd7d sched: Fix sched_fork() access an invalid sched_task_group\u003Cbr\u003E |\r\n|     bugzilla: NA | e7488c7c4843 Bluetooth: switch to lock_sock in SCO\u003Cbr\u003Eb70ba11a2a14 Bluetooth: avoid circular locks in sco_sock_connect\u003Cbr\u003E50f9af1bd4a1 Bluetooth: schedule SCO timeouts with delayed_work\u003Cbr\u003E |\r\n\r\n# 2 CVE\r\n-------\r\n\r\n| CVE | issue |\r\n|:---:|:-----:|\r\n| CVE-2021-3640 | #I44HKK |\r\n","author":{"name":"成坚  (CHENG Jian)","username":"gatieme","path":"/gatieme","avatar_url":"no_portrait.png#成坚  (CHENG Jian)-gatieme"},"attach_files":[],"zip_download_url":"/openeuler/kernel/releases/tag/4.19.90-2109.1.0.zip","tar_download_url":"/openeuler/kernel/releases/tag/4.19.90-2109.1.0.tar.gz"}}}