From 6f0156825e793d33101f484840029a36a2d39080 Mon Sep 17 00:00:00 2001 From: wangwuzhe Date: Fri, 6 Nov 2020 20:35:39 +0800 Subject: [PATCH 1/2] remove some bits and update test scripts --- prefetch_mod.c | 134 +++++++-------------- prefetch_mod.h | 76 ++++-------- prefetch_reg.c | 226 +++++++++-------------------------- tests/DynamiCtrl.sh | 86 -------------- tests/DynamicAuc0.sh | 38 ------ tests/HhaCcCtrl.sh | 147 +++++++++-------------- tests/HhaCtrl.sh | 169 +++++++++----------------- tests/HhaDdrLevel.sh | 39 ++++-- tests/HhaDirCtrl.sh | 78 ++++++++++++ tests/HhaFuncDis.sh | 81 ++++++++++--- tests/L3tDAuctrl0.sh | 75 ++++++------ tests/L3tDAuctrl1.sh | 257 +++++++++++----------------------------- tests/L3tDynamicCtrl.sh | 139 ++++++++++------------ tests/L3tPNumConf1.sh | 4 +- tests/L3tPrefetch.sh | 232 +++++++++--------------------------- tests/L3tStaticCtrl.sh | 75 ++++++++++++ tests/MnDynamicCtrl.sh | 26 ++++ tests/Static.sh | 98 --------------- 18 files changed, 733 insertions(+), 1247 deletions(-) delete mode 100644 tests/DynamiCtrl.sh delete mode 100644 tests/DynamicAuc0.sh create mode 100644 tests/HhaDirCtrl.sh create mode 100644 tests/L3tStaticCtrl.sh delete mode 100644 tests/Static.sh diff --git a/prefetch_mod.c b/prefetch_mod.c index 1170401..e84f720 100644 --- a/prefetch_mod.c +++ b/prefetch_mod.c @@ -53,37 +53,28 @@ static ssize_t val_show(struct device* dev, struct device_attribute* attr, char* buf); /* Create device attribute files */ -static DEVICE_ATTR(read_unique, S_IRUGO|S_IWUSR, - read_unique_show, read_unique_store); - static DEVICE_ATTR(policy, S_IRUGO|S_IWUSR, prefetch_show, prefetch_store); +static DEVICE_ATTR(read_unique, S_IRUGO|S_IWUSR, + read_unique_show, read_unique_store); + static DEVICE_ATTR(cpumask, S_IRUGO|S_IWUSR, prefetch_mask_show, prefetch_mask_store); -static DEVICE_ATTR(iocapacity_limit, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(iocapacity_limit_en, S_IRUGO|S_IWUSR, val_show, val_store); static DEVICE_ATTR(tag_rep_alg, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(ramswap, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(ramswap_full_shut_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(sqmerge, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(sqmerge_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(rdmerge, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(prefetch_drop_hha, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(prime_drop_mask, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(sequence_opt, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(prefetch_drop_hha_en, S_IRUGO|S_IWUSR, val_show, val_store); static DEVICE_ATTR(prefetch_utl_ddr, S_IRUGO|S_IWUSR, @@ -104,24 +95,6 @@ static DEVICE_ATTR(prefetch_start_level, S_IRUGO|S_IWUSR, static DEVICE_ATTR(rdmerge_upgrade_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(ddr_compress_opt_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(snpsleep_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(prefetchtgt_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(cpu_pf_lqos_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(refillsize_com_ada_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(refillsize_pre_ada_en, S_IRUGO|S_IWUSR, - val_show, val_store); - static DEVICE_ATTR(prefetch_overide_level, S_IRUGO|S_IWUSR, val_show, val_store); @@ -188,12 +161,6 @@ static DEVICE_ATTR(pend_data_shut_en, S_IRUGO|S_IWUSR, static DEVICE_ATTR(ramfwd_shut_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(ramthr_merge_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(ext_en, S_IRUGO|S_IWUSR, - val_show, val_store); - static DEVICE_ATTR(reads_upgrade_en, S_IRUGO|S_IWUSR, val_show, val_store); @@ -230,6 +197,9 @@ static DEVICE_ATTR(rsperr_en, S_IRUGO|S_IWUSR, static DEVICE_ATTR(force_cq_clk_en, S_IRUGO|S_IWUSR, val_show, val_store); +static DEVICE_ATTR(rdnosnp_nca_shut_en, S_IRUGO|S_IWUSR, + val_show, val_store); + static DEVICE_ATTR(wrfull_create_en, S_IRUGO|S_IWUSR, val_show, val_store); @@ -239,9 +209,18 @@ static DEVICE_ATTR(cleanunique_data_en, S_IRUGO|S_IWUSR, static DEVICE_ATTR(lock_share_req_en, S_IRUGO|S_IWUSR, val_show, val_store); +static DEVICE_ATTR(ddr_compress_opt_en, S_IRUGO|S_IWUSR, + val_show, val_store); + static DEVICE_ATTR(atomic_monitor_en, S_IRUGO|S_IWUSR, val_show, val_store); +static DEVICE_ATTR(snpsleep_en, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(prefetchtgt_en, S_IRUGO|S_IWUSR, + val_show, val_store); + static DEVICE_ATTR(prefetch_clr_level, S_IRUGO|S_IWUSR, val_show, val_store); @@ -260,9 +239,6 @@ static DEVICE_ATTR(reg_ctrl_poison, S_IRUGO|S_IWUSR, static DEVICE_ATTR(reg_ctrl_compress_spec, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(reg_ctrl_data_reside, S_IRUGO|S_IWUSR, - val_show, val_store); - static DEVICE_ATTR(reg_ctrl_writeevict_drop, S_IRUGO|S_IWUSR, val_show, val_store); @@ -311,16 +287,28 @@ static DEVICE_ATTR(force_intl_allocate_fail, S_IRUGO|S_IWUSR, static DEVICE_ATTR(cpu_write_unique_stream_en, S_IRUGO|S_IWUSR, val_show, val_store); +static DEVICE_ATTR(cpu_pf_lqos_en, S_IRUGO|S_IWUSR, + val_show, val_store); + static DEVICE_ATTR(cpu_vic_lqos_en, S_IRUGO|S_IWUSR, val_show, val_store); static DEVICE_ATTR(prime_excl_mask_en, S_IRUGO|S_IWUSR, val_show, val_store); +static DEVICE_ATTR(prime_drop_mask_en, S_IRUGO|S_IWUSR, + val_show, val_store); + static DEVICE_ATTR(prime_home_mask_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(bankintlv_mode, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(refillsize_com_ada_en, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(refillsize_pre_ada_en, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(sequence_opt_en, S_IRUGO|S_IWUSR, val_show, val_store); static DEVICE_ATTR(pime_timeout_num, S_IRUGO|S_IWUSR, @@ -401,30 +389,12 @@ static DEVICE_ATTR(reg_miss_normalth, S_IRUGO|S_IWUSR, static DEVICE_ATTR(reg_miss_tosdir, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(reg_stream_filter, S_IRUGO|S_IWUSR, - val_show, val_store); - static DEVICE_ATTR(reg_entry_except, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(reg_edir_filter, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(reg_edir_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(reg_dir_indexhash, S_IRUGO|S_IWUSR, - val_show, val_store); - static DEVICE_ATTR(reg_dir_precision, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(reg_dir_share_mode, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(reg_dir_mca_mode, S_IRUGO|S_IWUSR, - val_show, val_store); - static DEVICE_ATTR(strict_order, S_IRUGO|S_IWUSR, val_show, val_store); @@ -470,9 +440,6 @@ static DEVICE_ATTR(reg_funcdis_ccixcbupdate, S_IRUGO|S_IWUSR, static DEVICE_ATTR(reg_funcdis_updateopen, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(reg_funcdis_ddrwrap, S_IRUGO|S_IWUSR, - val_show, val_store); - static DEVICE_ATTR(reg_prefetchtgt_outstanding, S_IRUGO|S_IWUSR, val_show, val_store); @@ -489,26 +456,17 @@ static struct attribute *prefetch_attrs[] = { &dev_attr_policy.attr, &dev_attr_cpumask.attr, &dev_attr_read_unique.attr, - &dev_attr_iocapacity_limit.attr, + &dev_attr_iocapacity_limit_en.attr, &dev_attr_tag_rep_alg.attr, - &dev_attr_ramswap.attr, - &dev_attr_sqmerge.attr, - &dev_attr_rdmerge.attr, - &dev_attr_prefetch_drop_hha.attr, - &dev_attr_prime_drop_mask.attr, - &dev_attr_sequence_opt.attr, + &dev_attr_ramswap_full_shut_en.attr, + &dev_attr_sqmerge_en.attr, + &dev_attr_prefetch_drop_hha_en.attr, &dev_attr_prefetch_utl_ddr.attr, &dev_attr_prefetch_utl_ddr_en.attr, &dev_attr_prefetch_utl_l3t.attr, &dev_attr_prefetch_utl_l3t_en.attr, &dev_attr_prefetch_start_level.attr, &dev_attr_rdmerge_upgrade_en.attr, - &dev_attr_ddr_compress_opt_en.attr, - &dev_attr_snpsleep_en.attr, - &dev_attr_prefetchtgt_en.attr, - &dev_attr_cpu_pf_lqos_en.attr, - &dev_attr_refillsize_com_ada_en.attr, - &dev_attr_refillsize_pre_ada_en.attr, &dev_attr_prefetch_overide_level.attr, &dev_attr_prefetch_vague_en.attr, &dev_attr_prefetch_core_en.attr, @@ -531,8 +489,6 @@ static struct attribute *prefetch_attrs[] = { &dev_attr_fast_data_shut_en.attr, &dev_attr_pend_data_shut_en.attr, &dev_attr_ramfwd_shut_en.attr, - &dev_attr_ramthr_merge_en.attr, - &dev_attr_ext_en.attr, &dev_attr_reads_upgrade_en.attr, &dev_attr_rdmerge_pipe_en.attr, &dev_attr_spill_en.attr, @@ -545,17 +501,20 @@ static struct attribute *prefetch_attrs[] = { &dev_attr_ramthr_en.attr, &dev_attr_rsperr_en.attr, &dev_attr_force_cq_clk_en.attr, + &dev_attr_rdnosnp_nca_shut_en.attr, &dev_attr_wrfull_create_en.attr, &dev_attr_cleanunique_data_en.attr, &dev_attr_lock_share_req_en.attr, + &dev_attr_ddr_compress_opt_en.attr, &dev_attr_atomic_monitor_en.attr, + &dev_attr_snpsleep_en.attr, + &dev_attr_prefetchtgt_en.attr, &dev_attr_prefetch_clr_level.attr, &dev_attr_reg_ctrl_spillprefetch.attr, &dev_attr_reg_ctrl_mpamen.attr, &dev_attr_reg_ctrl_mpamqos.attr, &dev_attr_reg_ctrl_poison.attr, &dev_attr_reg_ctrl_compress_spec.attr, - &dev_attr_reg_ctrl_data_reside.attr, &dev_attr_reg_ctrl_writeevict_drop.attr, &dev_attr_reg_ctrl_excl_clear_dis.attr, &dev_attr_reg_ctrl_excl_eventen.attr, @@ -572,10 +531,14 @@ static struct attribute *prefetch_attrs[] = { &dev_attr_prime_extend_mask_en.attr, &dev_attr_force_intl_allocate_fail.attr, &dev_attr_cpu_write_unique_stream_en.attr, + &dev_attr_cpu_pf_lqos_en.attr, &dev_attr_cpu_vic_lqos_en.attr, &dev_attr_prime_excl_mask_en.attr, + &dev_attr_prime_drop_mask_en.attr, &dev_attr_prime_home_mask_en.attr, - &dev_attr_bankintlv_mode.attr, + &dev_attr_refillsize_com_ada_en.attr, + &dev_attr_refillsize_pre_ada_en.attr, + &dev_attr_sequence_opt_en.attr, &dev_attr_pime_timeout_num.attr, &dev_attr_dvmsnp_outstanding.attr, &dev_attr_dvmreq_outstanding.attr, @@ -602,14 +565,8 @@ static struct attribute *prefetch_attrs[] = { &dev_attr_reg_miss_cbackth.attr, &dev_attr_reg_miss_normalth.attr, &dev_attr_reg_miss_tosdir.attr, - &dev_attr_reg_stream_filter.attr, &dev_attr_reg_entry_except.attr, - &dev_attr_reg_edir_filter.attr, - &dev_attr_reg_edir_en.attr, - &dev_attr_reg_dir_indexhash.attr, &dev_attr_reg_dir_precision.attr, - &dev_attr_reg_dir_share_mode.attr, - &dev_attr_reg_dir_mca_mode.attr, &dev_attr_strict_order.attr, &dev_attr_evict_green.attr, &dev_attr_block_retry.attr, @@ -625,7 +582,6 @@ static struct attribute *prefetch_attrs[] = { &dev_attr_reg_funcdis_cancelexcept.attr, &dev_attr_reg_funcdis_ccixcbupdate.attr, &dev_attr_reg_funcdis_updateopen.attr, - &dev_attr_reg_funcdis_ddrwrap.attr, &dev_attr_reg_prefetchtgt_outstanding.attr, &dev_attr_reg_prefetchtgt_level.attr, &dev_attr_reg_spec_rd_level.attr, diff --git a/prefetch_mod.h b/prefetch_mod.h index 5ac1188..f00c094 100644 --- a/prefetch_mod.h +++ b/prefetch_mod.h @@ -24,14 +24,13 @@ enum { }; enum FunctionOrderList { - IOCAPACITY_LIMIT_ORDER = 0, + IOCAPACITY_LIMIT_EN_ORDER = 0, TAG_REP_ALG_ORDER, - SQMERGE_ORDER, - RDMERGE_ORDER, - PREFETCH_DROP_HHA_ORDER, - RAMSWAP_ORDER, - PRIME_DROP_MASK_ORDER, - SEQUENCE_OPT_ORDER, + SQMERGE_EN_ORDER, + PREFETCH_DROP_HHA_EN_ORDER, + RAMSWAP_FULL_SHUT_EN_ORDER, + PRIME_DROP_MASK_EN_ORDER, + SEQUENCE_OPT_EN_ORDER, PREFETCH_ULT_DDR_ORDER, PREFETCH_ULT_DDR_EN_ORDER, PREFETCH_ULT_L3T_ORDER, @@ -66,8 +65,6 @@ enum FunctionOrderList { FAST_DATA_SHUT_EN_ORDER, PEND_DATA_SHUT_EN_ORDER, RAMFWD_SHUT_EN_ORDER, - RAMTHR_MERGE_EN_ORDER, - EXT_EN_ORDER, READS_UPGRADE_EN_ORDER, RDMERGE_PIPE_EN_ORDER, SPILL_EN_ORDER, @@ -91,7 +88,6 @@ enum FunctionOrderList { REG_CTRL_MPAMQOS_ORDER, REG_CTRL_POISON_ORDER, REG_CTRL_COMPRESS_SPEC_ORDER, - REG_CTRL_DATA_RESIDE_ORDER, REG_CTRL_WRITEEVICT_DROP_ORDER, REG_CTRL_EXCL_CLEAR_DIS_ORDER, REG_CTRL_EXCL_EVENTEN_ORDER, @@ -111,7 +107,6 @@ enum FunctionOrderList { CPU_VIC_LQOS_EN_ORDER, PRIME_EXCL_MASK_EN_ORDER, PRIME_HOME_MASK_EN_ORDER, - BANKINTLV_MODE_ORDER, PIME_TIMEOUT_NUM_ORDER, DVMSNP_OUTSTANDING_ORDER, DVMREQ_OUTSTANDING_ORDER, @@ -138,14 +133,8 @@ enum FunctionOrderList { REG_MISS_CBACKTH_ORDER, REG_MISS_NORMALTH_ORDER, REG_MISS_TOSDIR_ORDER, - REG_STREAM_FILTER_ORDER, REG_ENTRY_EXCEPT_ORDER, - REG_EDIR_FILTER_ORDER, - REG_EDIR_EN_ORDER, - REG_DIR_INDEXHASH_ORDER, REG_DIR_PRECISION_ORDER, - REG_DIR_SHARE_MODE_ORDER, - REG_DIR_MCA_MODE_ORDER, STRICT_ORDER_ORDER, EVICT_GREEN_ORDER, BLOCK_RETRY_ORDER, @@ -161,7 +150,6 @@ enum FunctionOrderList { REG_FUNCDIS_CANCELEXCEPT_ORDER, REG_FUNCDIS_CCIXCBUPDATE_ORDER, REG_FUNCDIS_UPDATEOPEN_ORDER, - REG_FUNCDIS_DDRWRAP_ORDER, REG_PREFETCHTGT_OUTSTANDING_ORDER, REG_PREFETCHTGT_LEVEL_ORDER, REG_SPEC_RD_LEVEL_ORDER, @@ -189,7 +177,7 @@ enum ComMsd1Ctrl { DDR_INTLV_SKT_START = 29, DDR_INTLV_SKT_END = 30, DDR_INTLV_DIE_START = 27, - DDR_INTLV_DIE_END = 27, + DDR_INTLV_DIE_END = 27 }; enum HhaCtrlReg { @@ -203,8 +191,6 @@ enum HhaCtrlReg { REG_CTRL_POISON_END = 19, REG_CTRL_COMPRESS_SPEC_START = 10, REG_CTRL_COMPRESS_SPEC_END = 10, - REG_CTRL_DATA_RESIDE_START = 8, - REG_CTRL_DATA_RESIDE_END = 8, REG_CTRL_WRITEEVICT_DROP_START = 7, REG_CTRL_WRITEEVICT_DROP_END = 7, REG_CTRL_PREFETCH_DROP_START = 6, @@ -267,22 +253,10 @@ enum HhaDirCtrlReg { REG_MISS_NORMALTH_END = 13, REG_MISS_TOSDIR_START = 12, REG_MISS_TOSDIR_END = 12, - REG_STREAM_FILTER_START = 11, - REG_STREAM_FILTER_END = 11, REG_ENTRY_EXCEPT_START = 10, REG_ENTRY_EXCEPT_END = 10, - REG_EDIR_FILTER_START = 9, - REG_EDIR_FILTER_END = 9, - REG_EDIR_EN_START = 8, - REG_EDIR_EN_END = 8, - REG_DIR_INDEXHASH_START = 7, - REG_DIR_INDEXHASH_END = 7, REG_DIR_PRECISION_START = 6, REG_DIR_PRECISION_END = 6, - REG_DIR_SHARE_MODE_START = 5, - REG_DIR_SHARE_MODE_END = 5, - REG_DIR_MCA_MODE_START = 4, - REG_DIR_MCA_MODE_END = 4, REG_DIR_REPLACE_ALG_START = 0, REG_DIR_REPLACE_ALG_END = 1 }; @@ -321,9 +295,7 @@ enum HhaFuncDisReg { REG_FUNCDIS_UPDATEOPEN_START = 3, REG_FUNCDIS_UPDATEOPEN_END = 3, PREFETCH_FUNCDIS_COMB_START = 2, - PREFETCH_FUNCDIS_COMB_END = 2, - REG_FUNCDIS_DDRWRAP_START = 0, - REG_FUNCDIS_DDRWRAP_END = 0, + PREFETCH_FUNCDIS_COMB_END = 2 }; enum HhaDdrLevelReg { @@ -360,14 +332,10 @@ enum L3tStaticCtrlReg { FAST_DATA_SHUT_EN_END = 18, PEND_DATA_SHUT_EN_START = 17, PEND_DATA_SHUT_EN_END = 17, - RAMSWAP_START = 16, - RAMSWAP_END = 16, + RAMSWAP_FULL_SHUT_EN_START = 16, + RAMSWAP_FULL_SHUT_EN_END = 16, RAMFWD_SHUT_EN_START = 15, RAMFWD_SHUT_EN_END = 15, - RAMTHR_MERGE_EN_START = 14, - RAMTHR_MERGE_EN_END = 14, - EXT_EN_START = 11, - EXT_EN_END = 11 }; enum L3tDynamicAuctrl0Reg { @@ -412,18 +380,16 @@ enum L3tDynamicCtrlReg { RAMTHR_EN_END = 15, RSPERR_EN_START = 14, RSPERR_EN_END = 14, - IOCAPACITY_LIMIT_START = 13, - IOCAPACITY_LIMIT_END = 13, + IOCAPACITY_LIMIT_EN_START = 13, + IOCAPACITY_LIMIT_EN_END = 13, FORCE_CQ_CLK_EN_START = 11, FORCE_CQ_CLK_EN_END = 11, - SQMERGE_START = 10, - SQMERGE_END = 10, - RDMERGE_START = 9, - RDMERGE_END = 9, + SQMERGE_EN_START = 10, + SQMERGE_EN_END = 10, RDMERGE_UPGRADE_EN_START = 8, RDMERGE_UPGRADE_EN_END = 8, - PREFETCH_DROP_HHA_START = 4, - PREFETCH_DROP_HHA_END = 4, + PREFETCH_DROP_HHA_EN_START = 4, + PREFETCH_DROP_HHA_EN_END = 4, TAG_REP_ALG_START = 0, TAG_REP_ALG_END = 1 }; @@ -459,18 +425,16 @@ enum L3tDynamicAuctrl1Reg { CPU_VIC_LQOS_EN_END = 10, PRIME_EXCL_MASK_EN_START = 6, PRIME_EXCL_MASK_EN_END = 6, - PRIME_DROP_MASK_START = 5, - PRIME_DROP_MASK_END = 5, + PRIME_DROP_MASK_EN_START = 5, + PRIME_DROP_MASK_EN_END = 5, PRIME_HOME_MASK_EN_START = 4, PRIME_HOME_MASK_EN_END = 4, REFILLSIZE_COM_ADA_EN_START = 3, REFILLSIZE_COM_ADA_EN_END = 3, REFILLSIZE_PRE_ADA_EN_START = 2, REFILLSIZE_PRE_ADA_EN_END = 2, - SEQUENCE_OPT_START = 1, - SEQUENCE_OPT_END = 1, - BANKINTLV_MODE_START = 0, - BANKINTLV_MODE_END = 0 + SEQUENCE_OPT_EN_START = 1, + SEQUENCE_OPT_EN_END = 1 }; enum L3tPrefetchReg { diff --git a/prefetch_reg.c b/prefetch_reg.c index f60c47d..098d0dd 100644 --- a/prefetch_reg.c +++ b/prefetch_reg.c @@ -29,7 +29,7 @@ #include "prefetch_mod.h" static DEFINE_MUTEX(l3t_dctrl_mtx); -static DEFINE_MUTEX(l3t_dauctrl_mtx); +static DEFINE_MUTEX(l3t_dauctrl1_mtx); static DEFINE_MUTEX(l3t_dauctr0_mtx); static DEFINE_MUTEX(l3t_prefetch_mtx); static DEFINE_MUTEX(l3t_pnumconf1_mtx); @@ -148,15 +148,15 @@ static cfg_t prefetch_cfg[] = { /* locate register bits */ static FuncStruct Funcs[] = { - [IOCAPACITY_LIMIT_ORDER] = { - .StartBit = IOCAPACITY_LIMIT_START, - .EndBit = IOCAPACITY_LIMIT_END, + [IOCAPACITY_LIMIT_EN_ORDER] = { + .StartBit = IOCAPACITY_LIMIT_EN_START, + .EndBit = IOCAPACITY_LIMIT_EN_END, .Base = TB_L3T0_BASE, .Offset = L3T_DYNAMIC_CTRL, .Sup = 1, .Glb = 0, .temp_mtx = &l3t_dctrl_mtx, - .Name = "iocapacity_limit" + .Name = "iocapacity_limit_en" }, [TAG_REP_ALG_ORDER] = { .StartBit = TAG_REP_ALG_START, @@ -168,65 +168,55 @@ static FuncStruct Funcs[] = { .temp_mtx = &l3t_dctrl_mtx, .Name = "tag_rep_alg" }, - [SQMERGE_ORDER] = { - .StartBit = SQMERGE_START, - .EndBit = SQMERGE_END, + [SQMERGE_EN_ORDER] = { + .StartBit = SQMERGE_EN_START, + .EndBit = SQMERGE_EN_END, .Base = TB_L3T0_BASE, .Offset = L3T_DYNAMIC_CTRL, .Sup = 1, .Glb = 0, .temp_mtx = &l3t_dctrl_mtx, - .Name = "sqmerge" + .Name = "sqmerge_en" }, - [RDMERGE_ORDER] = { - .StartBit = RDMERGE_START, - .EndBit = RDMERGE_END, + [PREFETCH_DROP_HHA_EN_ORDER] = { + .StartBit = PREFETCH_DROP_HHA_EN_START, + .EndBit = PREFETCH_DROP_HHA_EN_END, .Base = TB_L3T0_BASE, .Offset = L3T_DYNAMIC_CTRL, .Sup = 1, .Glb = 0, .temp_mtx = &l3t_dctrl_mtx, - .Name = "rdmerge" + .Name = "prefetch_drop_hha_en" }, - [PREFETCH_DROP_HHA_ORDER] = { - .StartBit = PREFETCH_DROP_HHA_START, - .EndBit = PREFETCH_DROP_HHA_END, - .Base = TB_L3T0_BASE, - .Offset = L3T_DYNAMIC_CTRL, - .Sup = 1, - .Glb = 0, - .temp_mtx = &l3t_dctrl_mtx, - .Name = "prefetch_drop_hha" - }, - [RAMSWAP_ORDER] = { - .StartBit = RAMSWAP_START, - .EndBit = RAMSWAP_END, + [RAMSWAP_FULL_SHUT_EN_ORDER] = { + .StartBit = RAMSWAP_FULL_SHUT_EN_START, + .EndBit = RAMSWAP_FULL_SHUT_EN_END, .Base = TB_L3T0_BASE, .Offset = L3T_STATIC_CTRL, .Sup = 1, .Glb = 0, .temp_mtx = &l3t_sctrl_mtx, - .Name = "ramswap" + .Name = "ramswap_full_shut_en" }, - [PRIME_DROP_MASK_ORDER] = { - .StartBit = PRIME_DROP_MASK_START, - .EndBit = PRIME_DROP_MASK_END, + [PRIME_DROP_MASK_EN_ORDER] = { + .StartBit = PRIME_DROP_MASK_EN_START, + .EndBit = PRIME_DROP_MASK_EN_END, .Base = TB_L3T0_BASE, .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, - .Name = "prime_drop_mask" + .temp_mtx = &l3t_dauctrl1_mtx, + .Name = "prime_drop_mask_en" }, - [SEQUENCE_OPT_ORDER] = { - .StartBit = SEQUENCE_OPT_START, - .EndBit = SEQUENCE_OPT_END, + [SEQUENCE_OPT_EN_ORDER] = { + .StartBit = SEQUENCE_OPT_EN_START, + .EndBit = SEQUENCE_OPT_EN_END, .Base = TB_L3T0_BASE, .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, - .Name = "sequence_opt" + .temp_mtx = &l3t_dauctrl1_mtx, + .Name = "sequence_opt_en" }, [PREFETCH_ULT_DDR_ORDER] = { .StartBit = PREFETCH_ULT_DDR_START, @@ -325,7 +315,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "cpu_pf_lqos_en" }, [REFILLSIZE_COM_ADA_EN_ORDER] = { @@ -335,7 +325,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "refillsize_com_ada_en" }, [REFILLSIZE_PRE_ADA_EN_ORDER] = { @@ -345,7 +335,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "refillsize_pre_ada_en" }, [PREFETCH_OVERIDE_LEVEL_ORDER] = { @@ -568,26 +558,6 @@ static FuncStruct Funcs[] = { .temp_mtx = &l3t_sctrl_mtx, .Name = "ramfwd_shut_en" }, - [RAMTHR_MERGE_EN_ORDER] = { - .StartBit = RAMTHR_MERGE_EN_START, - .EndBit = RAMTHR_MERGE_EN_END, - .Base = TB_L3T0_BASE, - .Offset = L3T_STATIC_CTRL, - .Sup = 1, - .Glb = 0, - .temp_mtx = &l3t_sctrl_mtx, - .Name = "ramthr_merge_en" - }, - [EXT_EN_ORDER] = { - .StartBit = EXT_EN_START, - .EndBit = EXT_EN_END, - .Base = TB_L3T0_BASE, - .Offset = L3T_STATIC_CTRL, - .Sup = 1, - .Glb = 0, - .temp_mtx = &l3t_sctrl_mtx, - .Name = "ext_en" - }, [READS_UPGRADE_EN_ORDER] = { .StartBit = READS_UPGRADE_EN_START, .EndBit = READS_UPGRADE_EN_END, @@ -710,13 +680,13 @@ static FuncStruct Funcs[] = { }, [RDNOSNP_NCA_SHUT_EN_ORDER] = { .StartBit = RDNOSNP_NCA_SHUT_EN_START, - .EndBit = FORCE_CQ_CLK_EN_END, + .EndBit = RDNOSNP_NCA_SHUT_EN_END, .Base = TB_L3T0_BASE, - .Offset = L3T_DYNAMIC_CTRL, + .Offset = L3T_DYNAMIC_AUCTRL0, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dctrl_mtx, - .Name = "force_cq_clk_en" + .temp_mtx = &l3t_dauctr0_mtx, + .Name = "rdnosnp_nca_shut_en" }, [WRFULL_CREATE_EN_ORDER] = { .StartBit = WRFULL_CREATE_EN_START, @@ -818,16 +788,6 @@ static FuncStruct Funcs[] = { .temp_mtx = &hha_ctrl_mtx, .Name = "reg_ctrl_compress_spec" }, - [REG_CTRL_DATA_RESIDE_ORDER] = { - .StartBit = REG_CTRL_DATA_RESIDE_START, - .EndBit = REG_CTRL_DATA_RESIDE_END, - .Base = TB_HHA0_BASE, - .Offset = HHA_CTRL, - .Sup = 1, - .Glb = 0, - .temp_mtx = &hha_ctrl_mtx, - .Name = "reg_ctrl_data_reside" - }, [REG_CTRL_WRITEEVICT_DROP_ORDER] = { .StartBit = REG_CTRL_WRITEEVICT_DROP_START, .EndBit = REG_CTRL_WRITEEVICT_DROP_END, @@ -875,7 +835,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "sequence_shape_en" }, [MPAM_PORTION_EN_ORDER] = { @@ -885,7 +845,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "mpam_portion_en" }, [MPAM_CAPACITY_EN_ORDER] = { @@ -895,7 +855,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "mpam_capacity_en" }, [ECCCHK_EN_ORDER] = { @@ -905,7 +865,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "eccchk_en" }, [REFILL_1024_RELAX_EN_ORDER] = { @@ -915,7 +875,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "refill_1024_relax_en" }, [LOOKUP_THR_EN_ORDER] = { @@ -925,7 +885,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "lookup_thr_en" }, [SNPUNIQUE_STASH_EN_ORDER] = { @@ -935,7 +895,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "snpunique_stash_en" }, [PRIME_TIMEOUT_MASK_EN_ORDER] = { @@ -945,7 +905,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "prime_timeout_mask_en" }, [PRIME_SLEEP_MASK_EN_ORDER] = { @@ -955,7 +915,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "prime_sleep_mask_en" }, [PRIME_EXTEND_MASK_EN_ORDER] = { @@ -965,7 +925,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "prime_extend_mask_en" }, [FORCE_INTL_ALLOCATE_FAIL_ORDER] = { @@ -975,7 +935,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "force_intl_allocate_fail" }, [CPU_WRITE_UNIQUE_STREAM_EN_ORDER] = { @@ -985,7 +945,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "cpu_write_unique_stream_en" }, [CPU_VIC_LQOS_EN_ORDER] = { @@ -995,7 +955,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "cpu_vic_lqos_en" }, [PRIME_EXCL_MASK_EN_ORDER] = { @@ -1005,7 +965,7 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "prime_excl_mask_en" }, [PRIME_HOME_MASK_EN_ORDER] = { @@ -1015,19 +975,9 @@ static FuncStruct Funcs[] = { .Offset = L3T_DYNAMIC_AUCTRL1, .Sup = 1, .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, + .temp_mtx = &l3t_dauctrl1_mtx, .Name = "prime_home_mask_en" }, - [BANKINTLV_MODE_ORDER] = { - .StartBit = BANKINTLV_MODE_START, - .EndBit = BANKINTLV_MODE_END, - .Base = TB_L3T0_BASE, - .Offset = L3T_DYNAMIC_AUCTRL1, - .Sup = 1, - .Glb = 0, - .temp_mtx = &l3t_dauctrl_mtx, - .Name = "bankintlv_mode" - }, [PIME_TIMEOUT_NUM_ORDER] = { .StartBit = PIME_TIMEOUT_NUM_START, .EndBit = PIME_TIMEOUT_NUM_END, @@ -1043,7 +993,7 @@ static FuncStruct Funcs[] = { .EndBit = DVMSNP_OUTSTANDING_END, .Base = TB_MN_BASE, .Offset = MN_DYNAMIC_CTRL, - .Sup = 5, + .Sup = 15, .Glb = 0, .temp_mtx = &mn_dctrl_mtx, .Name = "dvmsnp_outstanding" @@ -1288,16 +1238,6 @@ static FuncStruct Funcs[] = { .temp_mtx = &hha_dirctrl_mtx, .Name = "reg_miss_tosdir" }, - [REG_STREAM_FILTER_ORDER] = { - .StartBit = REG_STREAM_FILTER_START, - .EndBit = REG_STREAM_FILTER_END, - .Base = TB_HHA0_BASE, - .Offset = HHA_DIR_CTRL, - .Sup = 1, - .Glb = 0, - .temp_mtx = &hha_dirctrl_mtx, - .Name = "reg_stream_filter" - }, [REG_ENTRY_EXCEPT_ORDER] = { .StartBit = REG_ENTRY_EXCEPT_START, .EndBit = REG_ENTRY_EXCEPT_END, @@ -1308,36 +1248,6 @@ static FuncStruct Funcs[] = { .temp_mtx = &hha_dirctrl_mtx, .Name = "reg_entry_except" }, - [REG_EDIR_FILTER_ORDER] = { - .StartBit = REG_EDIR_FILTER_START, - .EndBit = REG_EDIR_FILTER_END, - .Base = TB_HHA0_BASE, - .Offset = HHA_DIR_CTRL, - .Sup = 1, - .Glb = 0, - .temp_mtx = &hha_dirctrl_mtx, - .Name = "reg_edir_filter" - }, - [REG_EDIR_EN_ORDER] = { - .StartBit = REG_EDIR_EN_START, - .EndBit = REG_EDIR_EN_END, - .Base = TB_HHA0_BASE, - .Offset = HHA_DIR_CTRL, - .Sup = 1, - .Glb = 0, - .temp_mtx = &hha_dirctrl_mtx, - .Name = "reg_edir_en" - }, - [REG_DIR_INDEXHASH_ORDER] = { - .StartBit = REG_DIR_INDEXHASH_START, - .EndBit = REG_DIR_INDEXHASH_END, - .Base = TB_HHA0_BASE, - .Offset = HHA_DIR_CTRL, - .Sup = 1, - .Glb = 0, - .temp_mtx = &hha_dirctrl_mtx, - .Name = "reg_dir_indexhash" - }, [REG_DIR_PRECISION_ORDER] = { .StartBit = REG_DIR_PRECISION_START, .EndBit = REG_DIR_PRECISION_END, @@ -1348,26 +1258,6 @@ static FuncStruct Funcs[] = { .temp_mtx = &hha_dirctrl_mtx, .Name = "reg_dir_precision" }, - [REG_DIR_SHARE_MODE_ORDER] = { - .StartBit = REG_DIR_SHARE_MODE_START, - .EndBit = REG_DIR_SHARE_MODE_END, - .Base = TB_HHA0_BASE, - .Offset = HHA_DIR_CTRL, - .Sup = 1, - .Glb = 0, - .temp_mtx = &hha_dirctrl_mtx, - .Name = "reg_dir_share_mode" - }, - [REG_DIR_MCA_MODE_ORDER] = { - .StartBit = REG_DIR_MCA_MODE_START, - .EndBit = REG_DIR_MCA_MODE_END, - .Base = TB_HHA0_BASE, - .Offset = HHA_DIR_CTRL, - .Sup = 1, - .Glb = 0, - .temp_mtx = &hha_dirctrl_mtx, - .Name = "reg_dir_mca_mode" - }, [STRICT_ORDER_ORDER] = { .StartBit = STRICT_ORDER_START, .EndBit = STRICT_ORDER_END, @@ -1438,7 +1328,7 @@ static FuncStruct Funcs[] = { .temp_mtx = &hha_funcdis_mtx, .Name = "reg_funcdis_pendprecision" }, - [REG_FUNCDIS_PENDPRECISION_ORDER] = { + [REG_FUNCDIS_COMBRDDDR_ORDER] = { .StartBit = REG_FUNCDIS_COMBRDDDR_START, .EndBit = REG_FUNCDIS_COMBRDDDR_END, .Base = TB_HHA0_BASE, @@ -1509,8 +1399,8 @@ static FuncStruct Funcs[] = { .Name = "reg_funcdis_ccixcbupdate" }, [REG_FUNCDIS_UPDATEOPEN_ORDER] = { - .StartBit = REG_FUNCDIS_UPDATEOPEN_ORDER, - .EndBit = REG_FUNCDIS_UPDATEOPEN_ORDER, + .StartBit = REG_FUNCDIS_UPDATEOPEN_START, + .EndBit = REG_FUNCDIS_UPDATEOPEN_END, .Base = TB_HHA0_BASE, .Offset = HHA_FUNC_DIS, .Sup = 1, @@ -1518,16 +1408,6 @@ static FuncStruct Funcs[] = { .temp_mtx = &hha_funcdis_mtx, .Name = "reg_funcdis_updateopen" }, - [REG_FUNCDIS_DDRWRAP_ORDER] = { - .StartBit = REG_FUNCDIS_DDRWRAP_ORDER, - .EndBit = REG_FUNCDIS_DDRWRAP_ORDER, - .Base = TB_HHA0_BASE, - .Offset = HHA_FUNC_DIS, - .Sup = 1, - .Glb = 0, - .temp_mtx = &hha_funcdis_mtx, - .Name = "reg_funcdis_ddrwrap" - }, [REG_PREFETCHTGT_OUTSTANDING_ORDER] = { .StartBit = REG_PREFETCHTGT_OUTSTANDING_START, .EndBit = REG_PREFETCHTGT_OUTSTANDING_END, diff --git a/tests/DynamiCtrl.sh b/tests/DynamiCtrl.sh deleted file mode 100644 index 10ad529..0000000 --- a/tests/DynamiCtrl.sh +++ /dev/null @@ -1,86 +0,0 @@ -#!/bin/bash -# SPDX-License-Identifier: GPL-2.0 -# * Copyright(c) 2019 Huawei Technologies Co., Ltd -# * -# * This program is free software; you can redistribute it and/or modify it -# * under the terms and conditions of the GNU General Public License, -# * version 2, as published by the Free Software Foundation. -# * -# * This program is distributed in the hope it will be useful, but WITHOUT -# * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -# * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -# * for more details. -# Create: 2020-09-08 -# Author: Liuke (liuke20@gitee) - -echo "L3T_DYNAMIC_CTRL: reads_upgrade_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/reads_upgrade_en -cat /sys/class/misc/prefetch/reads_upgrade_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/reads_upgrade_en -cat /sys/class/misc/prefetch/reads_upgrade_en | grep register\(1\) - -echo "L3T_DYNAMIC_CTRL: rdmerge_pipe_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/rdmerge_pipe_en -cat /sys/class/misc/prefetch/rdmerge_pipe_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/rdmerge_pipe_en -cat /sys/class/misc/prefetch/rdmerge_pipe_en | grep register\(1\) - -echo "L3T_DYNAMIC_CTRL: spill_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/spill_en -cat /sys/class/misc/prefetch/spill_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/spill_en -cat /sys/class/misc/prefetch/spill_en | grep register\(1\) - -echo "L3T_DYNAMIC_CTRL: spill_shared_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/spill_shared_en -cat /sys/class/misc/prefetch/spill_shared_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/spill_shared_en -cat /sys/class/misc/prefetch/spill_shared_en | grep register\(1\) - -echo "L3T_DYNAMIC_CTRL: spill_instr_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/spill_instr_en -cat /sys/class/misc/prefetch/spill_instr_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/spill_instr_en -cat /sys/class/misc/prefetch/spill_instr_en | grep register\(1\) - -echo "L3T_DYNAMIC_CTRL: sqrdmerge_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/sqrdmerge_en -cat /sys/class/misc/prefetch/sqrdmerge_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/sqrdmerge_en -cat /sys/class/misc/prefetch/sqrdmerge_en | grep register\(1\) - -echo "L3T_DYNAMIC_CTRL: prefetch_drop_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/prefetch_drop_en -cat /sys/class/misc/prefetch/prefetch_drop_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/prefetch_drop_en -cat /sys/class/misc/prefetch/prefetch_drop_en | grep register\(1\) - -echo "L3T_DYNAMIC_CTRL: datapull_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/datapull_en -cat /sys/class/misc/prefetch/datapull_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/datapull_en -cat /sys/class/misc/prefetch/datapull_en | grep register\(1\) - -echo "L3T_DYNAMIC_CTRL: mkinvld_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/mkinvld_en -cat /sys/class/misc/prefetch/mkinvld_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/mkinvld_en -cat /sys/class/misc/prefetch/mkinvld_en | grep register\(1\) - -echo "L3T_DYNAMIC_CTRL: ramthr_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/ramthr_en -cat /sys/class/misc/prefetch/ramthr_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/ramthr_en -cat /sys/class/misc/prefetch/ramthr_en | grep register\(1\) - -echo "L3T_DYNAMIC_CTRL: rsperr_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/rsperr_en -cat /sys/class/misc/prefetch/rsperr_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/rsperr_en -cat /sys/class/misc/prefetch/rsperr_en | grep register\(1\) - -echo "L3T_DYNAMIC_CTRL: force_cq_clk_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/force_cq_clk_en -cat /sys/class/misc/prefetch/force_cq_clk_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/force_cq_clk_en -cat /sys/class/misc/prefetch/force_cq_clk_en | grep register\(1\) diff --git a/tests/DynamicAuc0.sh b/tests/DynamicAuc0.sh deleted file mode 100644 index 302f4aa..0000000 --- a/tests/DynamicAuc0.sh +++ /dev/null @@ -1,38 +0,0 @@ -#!/bin/bash -# SPDX-License-Identifier: GPL-2.0 -# * Copyright(c) 2019 Huawei Technologies Co., Ltd -# * -# * This program is free software; you can redistribute it and/or modify it -# * under the terms and conditions of the GNU General Public License, -# * version 2, as published by the Free Software Foundation. -# * -# * This program is distributed in the hope it will be useful, but WITHOUT -# * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -# * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -# * for more details. -# Create: 2020-09-09 -# Author: Liuke (liuke20@gitee) - -echo "L3T_DYNAMIC_AUC0: wrfull_create_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/wrfull_create_en -cat /sys/class/misc/prefetch/wrfull_create_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/wrfull_create_en -cat /sys/class/misc/prefetch/wrfull_create_en | grep register\(1\) - -echo "L3T_DYNAMIC_AUC0: cleanunique_data_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/cleanunique_data_en -cat /sys/class/misc/prefetch/cleanunique_data_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/cleanunique_data_en -cat /sys/class/misc/prefetch/cleanunique_data_en | grep register\(1\) - -echo "L3T_DYNAMIC_AUC0: lock_share_req_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/lock_share_req_en -cat /sys/class/misc/prefetch/lock_share_req_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/lock_share_req_en -cat /sys/class/misc/prefetch/lock_share_req_en | grep register\(1\) - -echo "L3T_DYNAMIC_AUC0: atomic_monitor_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/atomic_monitor_en -cat /sys/class/misc/prefetch/atomic_monitor_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/atomic_monitor_en -cat /sys/class/misc/prefetch/atomic_monitor_en | grep register\(1\) diff --git a/tests/HhaCcCtrl.sh b/tests/HhaCcCtrl.sh index 6a7317d..1908271 100644 --- a/tests/HhaCcCtrl.sh +++ b/tests/HhaCcCtrl.sh @@ -15,100 +15,61 @@ # Description: This file is for testing bits setting and reading of register # HHA_CC_CTRL. -echo "HHA_CC_CTRL: reg_readoncesnp_dis set test, (exp: 0 ~ 1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_readoncesnp_dis - cat /sys/class/misc/prefetch/reg_readoncesnp_dis | grep register\(1\) -done - -echo "HHA_CC_CTRL: reg_cc_exter_stash set test, (exp: 0 ~ 1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_cc_exter_stash - cat /sys/class/misc/prefetch/reg_cc_exter_stash | grep register\(1\) -done - -echo "HHA_CC_CTRL: reg_cc_writebacki_spill_full set test, (exp: 0 ~ 1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_cc_writebacki_spill_full - cat /sys/class/misc/prefetch/reg_cc_writebacki_spill_full | grep register\(1\) -done - -echo "HHA_CC_CTRL: reg_cc_writeevicti_spill_full set test, (exp: 0 ~ 1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_cc_writeevicti_spill_full - cat /sys/class/misc/prefetch/reg_cc_writeevicti_spill_full | grep register\(1\) -done - -echo "HHA_CC_CTRL: reg_cc_stashonce_full set test, (exp: 0 ~ 1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_cc_stashonce_full - cat /sys/class/misc/prefetch/reg_cc_stashonce_full | grep register\(1\) -done - -echo "HHA_CC_CTRL: reg_cc_atomicstashl2 set test, (exp: 0 ~ 1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_cc_atomicstashl2 - cat /sys/class/misc/prefetch/reg_cc_atomicstashl2 | grep register\(1\) -done - -echo "HHA_CC_CTRL: reg_cc_atomicstashl3 set test, (exp: 0 ~ 1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_cc_atomicstashl3 - cat /sys/class/misc/prefetch/reg_cc_atomicstashl3 | grep register\(1\) -done - -echo "HHA_CC_CTRL: reg_cc_atomicstashclr set test, (exp: 0 ~ 1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_cc_atomicstashclr - cat /sys/class/misc/prefetch/reg_cc_atomicstashclr | grep register\(1\) -done - -echo "HHA_CC_CTRL: reg_cc_cmo_snpme set test, (exp: 0 ~ 1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_cc_cmo_snpme - cat /sys/class/misc/prefetch/reg_cc_cmo_snpme | grep register\(1\) -done - -echo "HHA_CC_CTRL: reg_cc_makee_change set test, (exp: 0 ~ 1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_cc_makee_change - cat /sys/class/misc/prefetch/reg_cc_makee_change | grep register\(1\) -done - -echo "HHA_CC_CTRL: reg_cc_ioc_hitsca_dis set test, (exp: 0 ~ 1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_cc_ioc_hitsca_dis - cat /sys/class/misc/prefetch/reg_cc_ioc_hitsca_dis | grep register\(1\) -done +register='HHA_CC_CTRL' +bitname_array=('reg_readoncesnp_dis' 'reg_cc_exter_stash' \ +'reg_cc_writebacki_spill_full' 'reg_cc_writeevicti_spill_full' 'reg_cc_stashonce_full' \ +'reg_cc_atomicstashl2' 'reg_cc_atomicstashl3' 'reg_cc_atomicstashclr' \ +'reg_cc_cmo_snpme' 'reg_cc_makee_change' 'reg_cc_ioc_hitsca_dis' \ +'reg_cc_passdirty' 'reg_cc_snpdrop' 'reg_cc_spill') +checkflag=1 -echo "HHA_CC_CTRL: reg_cc_passdirty set test, (exp: 0 ~ 1)" -for i in {0..1} +for bit in ${bitname_array[*]} do - echo $i > /sys/class/misc/prefetch/reg_cc_passdirty - cat /sys/class/misc/prefetch/reg_cc_passdirty | grep register\(1\) + echo "${register}: ${bit} set test, expected 0~1" + for i in {0..1} + do + echo $i > /sys/class/misc/prefetch/${bit} + cat /sys/class/misc/prefetch/${bit} | grep register\(1\) + if [ "register\(1\): ${i}.\n" != "$(cat /sys/class/misc/prefetch/${bit} | grep register\(1\))" ] + then + checkflag=0 + fi + done done -echo "HHA_CC_CTRL: reg_cc_snpdrop set test, (exp: 0 ~ 1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_cc_snpdrop - cat /sys/class/misc/prefetch/reg_cc_snpdrop | grep register\(1\) -done - -echo "HHA_CC_CTRL: reg_cc_spill set test, (exp: 0 ~ 1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_cc_spill - cat /sys/class/misc/prefetch/reg_cc_spill | grep register\(1\) -done \ No newline at end of file +count=0 +bit_arr=( +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1\ +) +echo "------------${register} combined test--------------" +for a0 in {0..1}; do bit_arr[0]=$a0 +for a1 in {0..1}; do bit_arr[1]=$a1 +for a2 in {0..1}; do bit_arr[2]=$a2 +for a3 in {0..1}; do bit_arr[3]=$a3 +for a4 in {0..1}; do bit_arr[4]=$a4 +for a5 in {0..1}; do bit_arr[5]=$a5 +for a6 in {0..1}; do bit_arr[6]=$a6 +for a7 in {0..1}; do bit_arr[7]=$a7 +for a8 in {0..1}; do bit_arr[8]=$a8 +for a9 in {0..1}; do bit_arr[9]=$a9 +for a10 in {0..1}; do bit_arr[10]=$a10 +for a11 in {0..1}; do bit_arr[11]=$a11 +for a12 in {0..1}; do bit_arr[12]=$a12 +for a13 in {0..1}; do bit_arr[13]=$a13 + echo "Current register bits value combination: ${count} ------------" + for i in {0..13} + do + echo ${bit_arr[$i]} > /sys/class/misc/prefetch/${bitname_array[$i]} + echo "${bitname_array[$i]}: $(cat /sys/class/misc/prefetch/${bitname_array[$i]} | grep register\(1\))" + done + let count++ +done;done;done;done;done;done;done +done;done;done;done;done;done;done +echo "----------${register} combined test done------------" \ No newline at end of file diff --git a/tests/HhaCtrl.sh b/tests/HhaCtrl.sh index 831987d..7561117 100644 --- a/tests/HhaCtrl.sh +++ b/tests/HhaCtrl.sh @@ -13,119 +13,62 @@ # Create: 2020-08-06 # Author: Liuke (liuke20@gitee) # Wang Wuzhe (wangwuzhe@gitee) - -echo "reg_ctrl_spillprefetch set test (exp 0,1) :" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_ctrl_spillprefetch - cat /sys/class/misc/prefetch/reg_ctrl_spillprefetch | grep register\(1\) -done - -echo "reg_ctrl_mpamen set test (exp 0,1) :" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_ctrl_mpamen - cat /sys/class/misc/prefetch/reg_ctrl_mpamen | grep register\(1\) -done - -echo "reg_ctrl_mpamqos set test (exp 0,1) :" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_ctrl_mpamqos - cat /sys/class/misc/prefetch/reg_ctrl_mpamqos | grep register\(1\) -done - -echo "reg_ctrl_poison set test (exp 0,1) :" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_ctrl_poison - cat /sys/class/misc/prefetch/reg_ctrl_poison | grep register\(1\) -done - -echo "reg_ctrl_compress_spec set test (exp 0,1) :" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_ctrl_compress_spec - cat /sys/class/misc/prefetch/reg_ctrl_compress_spec | grep register\(1\) -done - -echo "reg_ctrl_data_reside set test (exp 0,1) :" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_ctrl_data_reside - cat /sys/class/misc/prefetch/reg_ctrl_data_reside | grep register\(1\) -done - -echo "reg_ctrl_writeevict_drop set test (exp 0,1) :" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_ctrl_writeevict_drop - cat /sys/class/misc/prefetch/reg_ctrl_writeevict_drop | grep register\(1\) -done - -echo "reg_ctrl_prefetch_drop set test (exp 0,1) :" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_ctrl_prefetch_drop - cat /sys/class/misc/prefetch/reg_ctrl_prefetch_drop | grep register\(1\) -done - -echo "reg_ctrl_dmcassign set test (exp 0,1) :" -for i in {0..1} +# Description: This file is for testing bits setting and reading of register +# HHA_CTRL. + +register='HHA_CTRL' +bitname_array=('reg_ctrl_spillprefetch' 'reg_ctrl_mpamen' \ +'reg_ctrl_mpamqos' 'reg_ctrl_poison' 'reg_ctrl_compress_spec' \ +'reg_ctrl_writeevict_drop' 'reg_ctrl_prefetch_drop' 'reg_ctrl_dmcassign' \ +'reg_ctrl_rdatabyp' 'reg_ctrl_excl_clear_dis' 'reg_ctrl_excl_eventen' \ +'reg_ctrl_eccen') +checkflag=1 + +for bit in ${bitname_array[*]} do - echo $i > /sys/class/misc/prefetch/reg_ctrl_dmcassign - cat /sys/class/misc/prefetch/reg_ctrl_dmcassign | grep register\(1\) + echo "${register}: ${bit} set test, expected 0~1" + for i in {0..1} + do + echo $i > /sys/class/misc/prefetch/${bit} + cat /sys/class/misc/prefetch/${bit} | grep register\(1\) + if [ "register\(1\): ${i}.\n" != "$(cat /sys/class/misc/prefetch/${bit} | grep register\(1\))" ] + then + checkflag=0 + fi + done done -echo "reg_ctrl_rdatabyp set test (exp 0,1) :" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_ctrl_rdatabyp - cat /sys/class/misc/prefetch/reg_ctrl_rdatabyp | grep register\(1\) -done - -echo "reg_ctrl_excl_clear_dis set test (exp 0,1) :" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_ctrl_excl_clear_dis - cat /sys/class/misc/prefetch/reg_ctrl_excl_clear_dis | grep register\(1\) -done - -echo "reg_ctrl_excl_eventen set test (exp 0,1) :" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_ctrl_excl_eventen - cat /sys/class/misc/prefetch/reg_ctrl_excl_eventen | grep register\(1\) -done - -echo "reg_ctrl_eccen set test (exp 0,1) :" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_ctrl_eccen - cat /sys/class/misc/prefetch/reg_ctrl_eccen | grep register\(1\) -done - -echo "set reg_ctrl_prefetch_drop to be 0: exp(0, 1, 1)" -echo 0 > /sys/class/misc/prefetch/reg_ctrl_prefetch_drop -cat /sys/class/misc/prefetch/reg_ctrl_prefetch_drop | grep register\(1\) -cat /sys/class/misc/prefetch/reg_ctrl_dmcassign | grep register\(1\) -cat /sys/class/misc/prefetch/reg_ctrl_rdatabyp | grep register\(1\) - -echo "set reg_ctrl_dmcassign to be 0: exp(0, 0, 1)" -echo 0 > /sys/class/misc/prefetch/reg_ctrl_dmcassign -cat /sys/class/misc/prefetch/reg_ctrl_prefetch_drop | grep register\(1\) -cat /sys/class/misc/prefetch/reg_ctrl_dmcassign | grep register\(1\) -cat /sys/class/misc/prefetch/reg_ctrl_rdatabyp | grep register\(1\) - -echo "set reg_ctrl_rdatabyp to be 0: exp(0, 0, 0)" -echo 0 > /sys/class/misc/prefetch/reg_ctrl_rdatabyp -cat /sys/class/misc/prefetch/reg_ctrl_prefetch_drop | grep register\(1\) -cat /sys/class/misc/prefetch/reg_ctrl_dmcassign | grep register\(1\) -cat /sys/class/misc/prefetch/reg_ctrl_rdatabyp | grep register\(1\) - -echo "reg_dir_replace_alg set text (exp 0, 1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/reg_dir_replace_alg - cat /sys/class/misc/prefetch/reg_dir_replace_alg | grep register\(1\) -done +count=0 +bit_arr=( +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1\ +) +echo "------------${register} combined test--------------" +for a0 in {0..1}; do bit_arr[0]=$a0 +for a1 in {0..1}; do bit_arr[1]=$a1 +for a2 in {0..1}; do bit_arr[2]=$a2 +for a3 in {0..1}; do bit_arr[3]=$a3 +for a4 in {0..1}; do bit_arr[4]=$a4 +for a5 in {0..1}; do bit_arr[5]=$a5 +for a6 in {0..1}; do bit_arr[6]=$a6 +for a7 in {0..1}; do bit_arr[7]=$a7 +for a8 in {0..1}; do bit_arr[8]=$a8 +for a9 in {0..1}; do bit_arr[9]=$a9 +for a10 in {0..1}; do bit_arr[10]=$a10 +for a11 in {0..1}; do bit_arr[11]=$a11 + echo "Current register bits value combination: ${count} ------------" + for i in {0..11} + do + echo ${bit_arr[$i]} > /sys/class/misc/prefetch/${bitname_array[$i]} + echo "${bitname_array[$i]}: $(cat /sys/class/misc/prefetch/${bitname_array[$i]} | grep register\(1\))" + done + let count++ +done;done;done;done;done;done;done +done;done;done;done;done +echo "----------${register} combined test done------------" \ No newline at end of file diff --git a/tests/HhaDdrLevel.sh b/tests/HhaDdrLevel.sh index 192efd0..530ae8d 100644 --- a/tests/HhaDdrLevel.sh +++ b/tests/HhaDdrLevel.sh @@ -16,29 +16,50 @@ # HHA_DDR_LEVEL. echo "HHA_DDR_LEVEL: reg_prefetchtgt_outstanding set test, (exp: 0 ~ 127)" -for i in {16..127} +for i in {0..127} do echo $i > /sys/class/misc/prefetch/reg_prefetchtgt_outstanding cat /sys/class/misc/prefetch/reg_prefetchtgt_outstanding | grep register\(1\) done echo "HHA_DDR_LEVEL: reg_prefetchtgt_level set test, (exp: 0 ~ 127)" -for i in {32..127} +for i in {0..127} do echo $i > /sys/class/misc/prefetch/reg_prefetchtgt_level cat /sys/class/misc/prefetch/reg_prefetchtgt_level | grep register\(1\) done -# echo "HHA_DDR_LEVEL: reg_spec_rd_level set test, (exp: 0 ~ 127)" -# for i in {0..127} -# do -# echo $i > /sys/class/misc/prefetch/reg_spec_rd_level -# cat /sys/class/misc/prefetch/reg_spec_rd_level | grep register\(1\) -# done +echo "HHA_DDR_LEVEL: reg_spec_rd_level set test, (exp: 0 ~ 127)" +for i in {0..127} +do + echo $i > /sys/class/misc/prefetch/reg_spec_rd_level + cat /sys/class/misc/prefetch/reg_spec_rd_level | grep register\(1\) +done echo "HHA_DDR_LEVEL: reg_drop_level set test, (exp: 0 ~ 127)" for i in {0..127} do echo $i > /sys/class/misc/prefetch/reg_drop_level cat /sys/class/misc/prefetch/reg_drop_level | grep register\(1\) -done \ No newline at end of file +done + +echo "HHA_DDR_LEVEL combined test" +for i in {0..127} +do + echo $i > /sys/class/misc/prefetch/reg_prefetchtgt_outstanding + for j in {0..127} + do + echo $j > /sys/class/misc/prefetch/reg_prefetchtgt_level + for k in {0..127} + do + echo $k > /sys/class/misc/prefetch/reg_spec_rd_level + for n in {0..127} + do + echo $n > /sys/class/misc/prefetch/reg_drop_level + done + done + echo "---Round 2: ${j} done" + done + echo "---------Round 1: ${i} done" +done +echo "--------------HHA_DDR_LEVEL combined test done----------------" \ No newline at end of file diff --git a/tests/HhaDirCtrl.sh b/tests/HhaDirCtrl.sh new file mode 100644 index 0000000..9e7578c --- /dev/null +++ b/tests/HhaDirCtrl.sh @@ -0,0 +1,78 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0 +# * Copyright(c) 2019 Huawei Technologies Co., Ltd +# * +# * This program is free software; you can redistribute it and/or modify it +# * under the terms and conditions of the GNU General Public License, +# * version 2, as published by the Free Software Foundation. +# * +# * This program is distributed in the hope it will be useful, but WITHOUT +# * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# * for more details. +# Create: 2020-11-04 +# Author: Wang Wuzhe (wangwuzhe@gitee) +# Description: This file is for testing bits setting and reading of register +# HHA_DIR_CTRL. + +register='HHA_DIR_CTRL' +bitname_array=('reg_precisionsnp_dis' 'reg_notonly_excl' \ +'reg_buffer_share_dis' 'reg_miss_allindex' 'reg_miss_cbackth' \ +'reg_miss_normalth' 'reg_miss_tosdir' 'reg_entry_except' \ +'reg_dir_precision' 'reg_dir_replace_alg') +checkflag=1 + +for bit in ${bitname_array[*]} +do + echo "${register}: ${bit} set test, expected 0~1" + for i in {0..1} + do + echo $i > /sys/class/misc/prefetch/${bit} + cat /sys/class/misc/prefetch/${bit} | grep register\(1\) + if [ "register\(1\): ${i}.\n" != "$(cat /sys/class/misc/prefetch/${bit} | grep register\(1\))" ] + then + checkflag=0 + fi + done +done + +echo "${register}: ${bitname_array[10]} set test, expected 0~3" +for i in {0..3} +do + echo $i > /sys/class/misc/prefetch/${bitname_array[10]} + cat /sys/class/misc/prefetch/${bitname_array[10]} | grep register\(1\) +done + +count=0 +bit_arr=( +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1\ +) +echo "------------${register} combined test--------------" +for a0 in {0..1}; do bit_arr[0]=$a0 +for a1 in {0..1}; do bit_arr[1]=$a1 +for a2 in {0..1}; do bit_arr[2]=$a2 +for a3 in {0..1}; do bit_arr[3]=$a3 +for a4 in {0..1}; do bit_arr[4]=$a4 +for a5 in {0..1}; do bit_arr[5]=$a5 +for a6 in {0..1}; do bit_arr[6]=$a6 +for a7 in {0..1}; do bit_arr[7]=$a7 +for a8 in {0..1}; do bit_arr[8]=$a8 +for a9 in {0..3}; do bit_arr[9]=$a9 + echo "Current register bits value combination: ${count} ------------" + for i in {0..9} + do + echo ${bit_arr[$i]} > /sys/class/misc/prefetch/${bitname_array[$i]} + echo "${bitname_array[$i]}: $(cat /sys/class/misc/prefetch/${bitname_array[$i]} | grep register\(1\))" + done + let count++ +done;done;done;done;done;done;done +done;done;done +echo "----------${register} combined test done------------" + diff --git a/tests/HhaFuncDis.sh b/tests/HhaFuncDis.sh index 01b813a..be88914 100644 --- a/tests/HhaFuncDis.sh +++ b/tests/HhaFuncDis.sh @@ -12,27 +12,70 @@ # * for more details. # Create: 2020-08-06 # Author: Liuke (liuke20@gitee) +# Wang Wuzhe (wangwuzhe@gitee) +# Description: This file is for testing bits setting and reading of register +# HHA_FUNC_DIS. -echo "prefetch_comb set test (exp 0,1) :" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/prefetch_comb - cat /sys/class/misc/prefetch/prefetch_comb | grep register\(1\) -done +register='HHA_FUNC_DIS' +bitname_array=('strict_order' 'prefetch_comb' \ +'evict_green' 'block_retry' 'buffer_prio' \ +'half_wr_rdddr_delay' 'wback_cnfl_rdhalf' 'reg_funcdis_pendprecision' \ +'reg_funcdis_combrdddr' 'reg_funcdis_scramble' 'reg_funcdis_stashidpg' \ +'reg_funcdis_rdatatime' 'reg_funcdis_dmcutl' 'reg_funcdis_cancelexcept' \ +'reg_funcdis_ccixcbupdate' 'reg_funcdis_updateopen' 'reg_funcdis_comb') +checkflag=1 -echo "reg_funcdis_comb set test (exp 0,1) :" -for i in {0..1} +for bit in ${bitname_array[*]} do - echo $i > /sys/class/misc/prefetch/reg_funcdis_comb - cat /sys/class/misc/prefetch/reg_funcdis_comb | grep register\(1\) + echo "${register}: ${bit} set test, expected 0~1" + for i in {0..1} + do + echo $i > /sys/class/misc/prefetch/${bit} + cat /sys/class/misc/prefetch/${bit} | grep register\(1\) + if [ "register\(1\): ${i}.\n" != "$(cat /sys/class/misc/prefetch/${bit} | grep register\(1\))" ] + then + checkflag=0 + fi + done done -echo "set prefetch_comb to be 0: exp(0,1)" -echo 0 > /sys/class/misc/prefetch/prefetch_comb -cat /sys/class/misc/prefetch/prefetch_comb | grep register\(1\) -cat /sys/class/misc/prefetch/reg_funcdis_comb | grep register\(1\) - -echo "set reg_funcdis_comb to be 0: exp(0,0)" -echo 0 > /sys/class/misc/prefetch/reg_funcdis_comb -cat /sys/class/misc/prefetch/prefetch_comb | grep register\(1\) -cat /sys/class/misc/prefetch/reg_funcdis_comb | grep register\(1\) +count=0 +bit_arr=( +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1\ +) +echo "------------${register} combined test--------------" +for a0 in {0..1}; do bit_arr[0]=$a0 +for a1 in {0..1}; do bit_arr[1]=$a1 +for a2 in {0..1}; do bit_arr[2]=$a2 +for a3 in {0..1}; do bit_arr[3]=$a3 +for a4 in {0..1}; do bit_arr[4]=$a4 +for a5 in {0..1}; do bit_arr[5]=$a5 +for a6 in {0..1}; do bit_arr[6]=$a6 +for a7 in {0..1}; do bit_arr[7]=$a7 +for a8 in {0..1}; do bit_arr[8]=$a8 +for a9 in {0..1}; do bit_arr[9]=$a9 +for a10 in {0..1}; do bit_arr[10]=$a10 +for a11 in {0..1}; do bit_arr[11]=$a11 +for a12 in {0..1}; do bit_arr[12]=$a12 +for a13 in {0..1}; do bit_arr[13]=$a13 +for a14 in {0..1}; do bit_arr[14]=$a14 +for a15 in {0..1}; do bit_arr[15]=$a15 +for a16 in {0..1}; do bit_arr[16]=$a16 + echo "Current register bits value combination: ${count} ------------" + for i in {0..16} + do + echo ${bit_arr[$i]} > /sys/class/misc/prefetch/${bitname_array[$i]} + echo "${bitname_array[$i]}: $(cat /sys/class/misc/prefetch/${bitname_array[$i]} | grep register\(1\))" + done + let count++ +done;done;done;done;done;done;done +done;done;done;done;done;done;done +done;done;done +echo "----------${register} combined test done------------" diff --git a/tests/L3tDAuctrl0.sh b/tests/L3tDAuctrl0.sh index be40ad6..c489a0b 100644 --- a/tests/L3tDAuctrl0.sh +++ b/tests/L3tDAuctrl0.sh @@ -12,42 +12,49 @@ # * for more details. # Create: 2020-08-06 # Author: Liuke (liuke20@gitee) +# Wang Wuzhe (wangwuzhe@gitee) +# Description: This file is for testing bits setting and reading of register +# L3T_DYNAMIC_AUCTRL0. -echo "L3T_DYNAMIC_AUCTRL0: ddr_compress_opt_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/ddr_compress_opt_en - cat /sys/class/misc/prefetch/ddr_compress_opt_en | grep register\(1\) -done +register='L3T_DYNAMIC_AUCTRL0' +bitname_array=('rdnosnp_nca_shut_en' 'wrfull_create_en' \ +'cleanunique_data_en' 'lock_share_req_en' 'ddr_compress_opt_en' \ +'atomic_monitor_en' 'snpsleep_en' 'prefetchtgt_en') +checkflag=1 -echo "L3T_DYNAMIC_AUCTRL0: snpsleep_en set test, (exp:0,1)" -for i in {0..1} +for bit in ${bitname_array[*]} do - echo $i > /sys/class/misc/prefetch/snpsleep_en - cat /sys/class/misc/prefetch/snpsleep_en | grep register\(1\) + echo "${register}: ${bit} set test, expected 0~1" + for i in {0..1} + do + echo $i > /sys/class/misc/prefetch/${bit} + cat /sys/class/misc/prefetch/${bit} | grep register\(1\) + if [ "register\(1\): ${i}.\n" != "$(cat /sys/class/misc/prefetch/${bit} | grep register\(1\))" ] + then + checkflag=0 + fi + done done -echo "L3T_DYNAMIC_AUCTRL0: prefetchtgt_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/prefetchtgt_en - cat /sys/class/misc/prefetch/prefetchtgt_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL0: set ddr_compress_opt_en to 0, (exp:0,1,1)" -echo 0 > /sys/class/misc/prefetch/ddr_compress_opt_en -cat /sys/class/misc/prefetch/ddr_compress_opt_en | grep register\(1\) -cat /sys/class/misc/prefetch/snpsleep_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetchtgt_en | grep register\(1\) - -echo "L3T_DYNAMIC_AUCTRL0: set sequence_opt to 0, (exp:0,0,1)" -echo 0 > /sys/class/misc/prefetch/snpsleep_en -cat /sys/class/misc/prefetch/ddr_compress_opt_en | grep register\(1\) -cat /sys/class/misc/prefetch/snpsleep_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetchtgt_en | grep register\(1\) - -echo "L3T_DYNAMIC_AUCTRL0: set prefetchtgt_en to 0, (exp:0,0,0)" -echo 0 > /sys/class/misc/prefetch/prefetchtgt_en -cat /sys/class/misc/prefetch/ddr_compress_opt_en | grep register\(1\) -cat /sys/class/misc/prefetch/snpsleep_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetchtgt_en | grep register\(1\) +count=0 +bit_arr=(1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 1) +echo "------------${register} combined test--------------" +for a in {0..1}; do bit_arr[0]=$a +for b in {0..1}; do bit_arr[1]=$b +for c in {0..1}; do bit_arr[2]=$c +for d in {0..1}; do bit_arr[3]=$d +for e in {0..1}; do bit_arr[4]=$e +for f in {0..1}; do bit_arr[5]=$f +for g in {0..1}; do bit_arr[6]=$g +for h in {0..1}; do bit_arr[7]=$h + echo "Current register bits value combination: ${count} ------------" + for i in {0..7} + do + echo ${bit_arr[$i]} > /sys/class/misc/prefetch/${bitname_array[$i]} + echo "${bitname_array[$i]}: $(cat /sys/class/misc/prefetch/${bitname_array[$i]} | grep register\(1\))" + done + let count++ +done;done;done;done;done;done;done;done +echo "----------${register} combined test done------------" diff --git a/tests/L3tDAuctrl1.sh b/tests/L3tDAuctrl1.sh index af8adda..d072e11 100644 --- a/tests/L3tDAuctrl1.sh +++ b/tests/L3tDAuctrl1.sh @@ -13,190 +13,73 @@ # Create: 2020-07-21 # Author: Liuke (liuke20@gitee) # Wang Wuzhe (wangwuzhe@gitee) - -echo "L3T_DYNAMIC_AUCTRL1: sequence_shape_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/sequence_shape_en - cat /sys/class/misc/prefetch/sequence_shape_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: mpam_portion_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/mpam_portion_en - cat /sys/class/misc/prefetch/mpam_portion_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: mpam_capacity_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/mpam_capacity_en - cat /sys/class/misc/prefetch/mpam_capacity_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: eccchk_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/eccchk_en - cat /sys/class/misc/prefetch/eccchk_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: refill_1024_relax_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/refill_1024_relax_en - cat /sys/class/misc/prefetch/refill_1024_relax_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: lookup_thr_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/lookup_thr_en - cat /sys/class/misc/prefetch/lookup_thr_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: snpunique_stash_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/snpunique_stash_en - cat /sys/class/misc/prefetch/snpunique_stash_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: prime_timeout_mask_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/prime_timeout_mask_en - cat /sys/class/misc/prefetch/prime_timeout_mask_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: prime_sleep_mask_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/prime_sleep_mask_en - cat /sys/class/misc/prefetch/prime_sleep_mask_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: prime_extend_mask_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/prime_extend_mask_en - cat /sys/class/misc/prefetch/prime_extend_mask_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: force_intl_allocate_fail set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/force_intl_allocate_fail - cat /sys/class/misc/prefetch/force_intl_allocate_fail | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: cpu_write_unique_stream_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/cpu_write_unique_stream_en - cat /sys/class/misc/prefetch/cpu_write_unique_stream_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: cpu_pf_lqos_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/cpu_pf_lqos_en - cat /sys/class/misc/prefetch/cpu_pf_lqos_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: cpu_vic_lqos_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/cpu_vic_lqos_en - cat /sys/class/misc/prefetch/cpu_vic_lqos_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: prime_excl_mask_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/prime_excl_mask_en - cat /sys/class/misc/prefetch/prime_excl_mask_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: prime_drop_mask set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/prime_drop_mask - cat /sys/class/misc/prefetch/prime_drop_mask | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: prime_home_mask_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/prime_home_mask_en - cat /sys/class/misc/prefetch/prime_home_mask_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: refillsize_com_ada_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/refillsize_com_ada_en - cat /sys/class/misc/prefetch/refillsize_com_ada_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: refillsize_pre_ada_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/refillsize_pre_ada_en - cat /sys/class/misc/prefetch/refillsize_pre_ada_en | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: sequence_opt set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/sequence_opt - cat /sys/class/misc/prefetch/sequence_opt | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: bankintlv_mode set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/bankintlv_mode - cat /sys/class/misc/prefetch/bankintlv_mode | grep register\(1\) -done - -echo "L3T_DYNAMIC_AUCTRL1: set cpu_pf_lqos_en to 0, (exp:0,1,1,1,1)" -echo 0 > /sys/class/misc/prefetch/cpu_pf_lqos_en -cat /sys/class/misc/prefetch/cpu_pf_lqos_en | grep register\(1\) -cat /sys/class/misc/prefetch/prime_drop_mask | grep register\(1\) -cat /sys/class/misc/prefetch/refillsize_com_ada_en | grep register\(1\) -cat /sys/class/misc/prefetch/refillsize_pre_ada_en | grep register\(1\) -cat /sys/class/misc/prefetch/sequence_opt | grep register\(1\) - -echo "L3T_DYNAMIC_AUCTRL1: set prime_drop_mask to 0, (exp:0,0,1,1,1)" -echo 0 > /sys/class/misc/prefetch/prime_drop_mask -cat /sys/class/misc/prefetch/cpu_pf_lqos_en | grep register\(1\) -cat /sys/class/misc/prefetch/prime_drop_mask | grep register\(1\) -cat /sys/class/misc/prefetch/refillsize_com_ada_en | grep register\(1\) -cat /sys/class/misc/prefetch/refillsize_pre_ada_en | grep register\(1\) -cat /sys/class/misc/prefetch/sequence_opt | grep register\(1\) - -echo "L3T_DYNAMIC_AUCTRL1: set refillsize_com_ada_en to 0, (exp:0,0,0,1,1)" -echo 0 > /sys/class/misc/prefetch/refillsize_com_ada_en -cat /sys/class/misc/prefetch/cpu_pf_lqos_en | grep register\(1\) -cat /sys/class/misc/prefetch/prime_drop_mask | grep register\(1\) -cat /sys/class/misc/prefetch/refillsize_com_ada_en | grep register\(1\) -cat /sys/class/misc/prefetch/refillsize_pre_ada_en | grep register\(1\) -cat /sys/class/misc/prefetch/sequence_opt | grep register\(1\) - -echo "L3T_DYNAMIC_AUCTRL1: set refillsize_pre_ada_en to 0, (exp:0,0,0,0,1)" -echo 0 > /sys/class/misc/prefetch/refillsize_pre_ada_en -cat /sys/class/misc/prefetch/cpu_pf_lqos_en | grep register\(1\) -cat /sys/class/misc/prefetch/prime_drop_mask | grep register\(1\) -cat /sys/class/misc/prefetch/refillsize_com_ada_en | grep register\(1\) -cat /sys/class/misc/prefetch/refillsize_pre_ada_en | grep register\(1\) -cat /sys/class/misc/prefetch/sequence_opt | grep register\(1\) - -echo "L3T_DYNAMIC_AUCTRL1: set sequence_opt to 0, (exp:0,0,0,0,0)" -echo 0 > /sys/class/misc/prefetch/sequence_opt -cat /sys/class/misc/prefetch/cpu_pf_lqos_en | grep register\(1\) -cat /sys/class/misc/prefetch/prime_drop_mask | grep register\(1\) -cat /sys/class/misc/prefetch/refillsize_com_ada_en | grep register\(1\) -cat /sys/class/misc/prefetch/refillsize_pre_ada_en | grep register\(1\) -cat /sys/class/misc/prefetch/sequence_opt | grep register\(1\) +# Description: This file is for testing bits setting and reading of register +# L3T_DYNAMIC_AUCTRL1. + +register='L3T_DYNAMIC_AUCTRL1' +bitname_array=('sequence_shape_en' 'mpam_portion_en' \ +'mpam_capacity_en' 'eccchk_en' 'refill_1024_relax_en' \ +'lookup_thr_en' 'snpunique_stash_en' 'prime_timeout_mask_en' \ +'prime_sleep_mask_en' 'prime_extend_mask_en' 'force_intl_allocate_fail' \ +'cpu_write_unique_stream_en' 'cpu_pf_lqos_en' 'cpu_vic_lqos_en' \ +'prime_excl_mask_en' 'prime_drop_mask_en' 'prime_home_mask_en' \ +'refillsize_com_ada_en' 'refillsize_pre_ada_en' 'sequence_opt_en') +checkflag=1 + +for bit in ${bitname_array[*]} +do + echo "${register}: ${bit} set test, expected 0~1" + for i in {0..1} + do + echo $i > /sys/class/misc/prefetch/${bit} + cat /sys/class/misc/prefetch/${bit} | grep register\(1\) + if [ "register\(1\): ${i}.\n" != "$(cat /sys/class/misc/prefetch/${bit} | grep register\(1\))" ] + then + checkflag=0 + fi + done +done + +count=0 +bit_arr=( +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1\ +) +echo "------------${register} combined test--------------" +for a0 in {0..1}; do bit_arr[0]=$a0 +for a1 in {0..1}; do bit_arr[1]=$a1 +for a2 in {0..1}; do bit_arr[2]=$a2 +for a3 in {0..1}; do bit_arr[3]=$a3 +for a4 in {0..1}; do bit_arr[4]=$a4 +for a5 in {0..1}; do bit_arr[5]=$a5 +for a6 in {0..1}; do bit_arr[6]=$a6 +for a7 in {0..1}; do bit_arr[7]=$a7 +for a8 in {0..1}; do bit_arr[8]=$a8 +for a9 in {0..1}; do bit_arr[9]=$a9 +for a10 in {0..1}; do bit_arr[10]=$a10 +for a11 in {0..1}; do bit_arr[11]=$a11 +for a12 in {0..1}; do bit_arr[12]=$a12 +for a13 in {0..1}; do bit_arr[13]=$a13 +for a14 in {0..1}; do bit_arr[14]=$a14 +for a15 in {0..1}; do bit_arr[15]=$a15 +for a16 in {0..1}; do bit_arr[16]=$a16 +for a17 in {0..1}; do bit_arr[17]=$a17 +for a18 in {0..1}; do bit_arr[18]=$a18 +for a19 in {0..1}; do bit_arr[19]=$a19 + echo "Current register bits value combination: ${count} ------------" + for i in {0..19} + do + echo ${bit_arr[$i]} > /sys/class/misc/prefetch/${bitname_array[$i]} + echo "${bitname_array[$i]}: $(cat /sys/class/misc/prefetch/${bitname_array[$i]} | grep register\(1\))" + done + let count++ +done;done;done;done;done;done;done +done;done;done;done;done;done;done +done;done;done;done;done;done +echo "----------${register} combined test done------------" diff --git a/tests/L3tDynamicCtrl.sh b/tests/L3tDynamicCtrl.sh index a2bb863..5458c97 100644 --- a/tests/L3tDynamicCtrl.sh +++ b/tests/L3tDynamicCtrl.sh @@ -12,85 +12,70 @@ # * for more details. # Create: 2020-07-13 # Author: Liuke (liuke20@gitee) +# Wang Wuzhe (wangwuzhe@gitee) +# Description: This file is for testing bits setting and reading of register +# L3T_DYNAMIC_CTRL. -echo "L3T_STATIC_CTRL: ramswap set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/ramswap - cat /sys/class/misc/prefetch/ramswap | grep register\(1\) -done - -echo "L3T_DYNAMIC_CTRL: iocapacity_limit set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/iocapacity_limit - cat /sys/class/misc/prefetch/iocapacity_limit | grep register\(1\) -done - -echo "L3T_DYNAMIC_CTRL: sqmerge set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/sqmerge - cat /sys/class/misc/prefetch/sqmerge | grep register\(1\) -done -''' -echo "L3T_DYNAMIC_CTRL: prefetch_drop_hha set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/prefetch_drop_hha - cat /sys/class/misc/prefetch/prefetch_drop_hha | grep register\(1\) -done -''' -echo "L3T_DYNAMIC_CTRL: tag_rep_alg set test, (exp:0~3)" -for i in {0..3} -do - echo $i > /sys/class/misc/prefetch/tag_rep_alg - cat /sys/class/misc/prefetch/tag_rep_alg | grep register\(1\) -done +register='L3T_DYNAMIC_CTRL' +bitname_array=('reads_upgrade_en' 'rdmerge_pipe_en' \ +'spill_en' 'spill_shared_en' 'spill_instr_en' \ +'sqrdmerge_en' 'prefetch_drop_en' 'datapull_en' \ +'mkinvld_en' 'ramthr_en' 'rsperr_en' \ +'iocapacity_limit_en' 'force_cq_clk_en' 'sqmerge_en' \ +'rdmerge_upgrade_en' 'prefetch_drop_hha_en' 'tag_rep_alg') +checkflag=1 -echo "L3T_DYNAMIC_CTRL: rdmerge_upgrade_en set test, (exp:0~1)" -for i in {0..1} +for bit in ${bitname_array[*]} do - echo $i > /sys/class/misc/prefetch/rdmerge_upgrade_en - cat /sys/class/misc/prefetch/rdmerge_upgrade_en | grep register\(1\) + echo "${register}: ${bit} set test, expected 0~1" + for i in {0..1} + do + echo $i > /sys/class/misc/prefetch/${bit} + cat /sys/class/misc/prefetch/${bit} | grep register\(1\) + if [ "register\(1\): ${i}.\n" != "$(cat /sys/class/misc/prefetch/${bit} | grep register\(1\))" ] + then + checkflag=0 + fi + done done -echo "L3T_DYNAMIC_CTRL: set iocapacity_limit to 0, (exp:0, 1, 1, 3, 1)" -echo 0 > /sys/class/misc/prefetch/iocapacity_limit -cat /sys/class/misc/prefetch/iocapacity_limit | grep register\(1\) -cat /sys/class/misc/prefetch/sqmerge | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_drop_hha | grep register\(1\) -cat /sys/class/misc/prefetch/tag_rep_alg | grep register\(1\) -cat /sys/class/misc/prefetch/rdmerge_upgrade_en | grep register\(1\) - -echo "L3T_DYNAMIC_CTRL: set sqmerge to 0, (exp:0, 0, 1, 3, 1)" -echo 0 > /sys/class/misc/prefetch/sqmerge -cat /sys/class/misc/prefetch/iocapacity_limit | grep register\(1\) -cat /sys/class/misc/prefetch/sqmerge | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_drop_hha | grep register\(1\) -cat /sys/class/misc/prefetch/tag_rep_alg | grep register\(1\) -cat /sys/class/misc/prefetch/rdmerge_upgrade_en | grep register\(1\) - -echo "L3T_DYNAMIC_CTRL: set prefetch_drop_hha to 0, (exp:0, 0, 0, 3, 1)" -echo 0 > /sys/class/misc/prefetch/prefetch_drop_hha -cat /sys/class/misc/prefetch/iocapacity_limit | grep register\(1\) -cat /sys/class/misc/prefetch/sqmerge | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_drop_hha | grep register\(1\) -cat /sys/class/misc/prefetch/tag_rep_alg | grep register\(1\) -cat /sys/class/misc/prefetch/rdmerge_upgrade_en | grep register\(1\) - -echo "L3T_DYNAMIC_CTRL: set tag_rep_alg to 2, (exp:0, 0, 0, 2, 1)" -echo 2 > /sys/class/misc/prefetch/tag_rep_alg -cat /sys/class/misc/prefetch/iocapacity_limit | grep register\(1\) -cat /sys/class/misc/prefetch/sqmerge | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_drop_hha | grep register\(1\) -cat /sys/class/misc/prefetch/tag_rep_alg | grep register\(1\) -cat /sys/class/misc/prefetch/rdmerge_upgrade_en | grep register\(1\) - -echo "L3T_DYNAMIC_CTRL: set rdmerge_upgrade_en to 0, (exp:0, 0, 0, 2, 0)" -echo 0 > /sys/class/misc/prefetch/rdmerge_upgrade_en -cat /sys/class/misc/prefetch/iocapacity_limit | grep register\(1\) -cat /sys/class/misc/prefetch/sqmerge | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_drop_hha | grep register\(1\) -cat /sys/class/misc/prefetch/tag_rep_alg | grep register\(1\) -cat /sys/class/misc/prefetch/rdmerge_upgrade_en | grep register\(1\) +count=0 +bit_arr=( +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1\ +) +echo "------------${register} combined test--------------" +for a0 in {0..1}; do bit_arr[0]=$a0 +for a1 in {0..1}; do bit_arr[1]=$a1 +for a2 in {0..1}; do bit_arr[2]=$a2 +for a3 in {0..1}; do bit_arr[3]=$a3 +for a4 in {0..1}; do bit_arr[4]=$a4 +for a5 in {0..1}; do bit_arr[5]=$a5 +for a6 in {0..1}; do bit_arr[6]=$a6 +for a7 in {0..1}; do bit_arr[7]=$a7 +for a8 in {0..1}; do bit_arr[8]=$a8 +for a9 in {0..1}; do bit_arr[9]=$a9 +for a10 in {0..1}; do bit_arr[10]=$a10 +for a11 in {0..1}; do bit_arr[11]=$a11 +for a12 in {0..1}; do bit_arr[12]=$a12 +for a13 in {0..1}; do bit_arr[13]=$a13 +for a14 in {0..1}; do bit_arr[14]=$a14 +for a15 in {0..1}; do bit_arr[15]=$a15 +for a16 in {0..3}; do bit_arr[16]=$a16 + echo "Current register bits value combination: ${count} ------------" + for i in {0..16} + do + echo ${bit_arr[$i]} > /sys/class/misc/prefetch/${bitname_array[$i]} + echo "${bitname_array[$i]}: $(cat /sys/class/misc/prefetch/${bitname_array[$i]} | grep register\(1\))" + done + let count++ +done;done;done;done;done;done;done +done;done;done;done;done;done;done +done;done;done +echo "----------${register} combined test done------------" diff --git a/tests/L3tPNumConf1.sh b/tests/L3tPNumConf1.sh index 89e145c..44742bc 100644 --- a/tests/L3tPNumConf1.sh +++ b/tests/L3tPNumConf1.sh @@ -15,8 +15,8 @@ # Description: This file is for testing bits setting and reading of register # L3T_PRIME_NUM_CONFIG1. -echo "L3T_PRIME_NUM_CONFIG1: pime_timeout_num set test, (exp: 60000 ~ 65535)" -for i in {60000..65535} +echo "L3T_PRIME_NUM_CONFIG1: pime_timeout_num set test, (exp: 0 ~ 65535)" +for i in {0..65535} do echo $i > /sys/class/misc/prefetch/pime_timeout_num cat /sys/class/misc/prefetch/pime_timeout_num | grep register\(1\) diff --git a/tests/L3tPrefetch.sh b/tests/L3tPrefetch.sh index 5584ea4..ceeee44 100644 --- a/tests/L3tPrefetch.sh +++ b/tests/L3tPrefetch.sh @@ -13,181 +13,67 @@ # Create: 2020-07-21 # Author: Liuke (liuke20@gitee) # Wang Wuzhe (wangwuzhe@gitee) - -echo "L3T_PREFETCH: prefetch_clr_level set test, (exp:0~255)" -for i in {0..255} -do - echo $i > /sys/class/misc/prefetch/prefetch_clr_level - cat /sys/class/misc/prefetch/prefetch_clr_level | grep register\(1\) -done - -echo "L3T_PREFETCH: prefetch_overide_level set test, (exp:0~15)" -for i in {0..15} -do - echo $i > /sys/class/misc/prefetch/prefetch_overide_level - cat /sys/class/misc/prefetch/prefetch_overide_level | grep register\(1\) -done - -echo "L3T_PREFETCH: prefetch_utl_ddr set test, (exp:0~3)" -for i in {0..3} -do - echo $i > /sys/class/misc/prefetch/prefetch_utl_ddr - cat /sys/class/misc/prefetch/prefetch_utl_ddr | grep register\(1\) -done - -echo "L3T_PREFETCH: prefetch_utl_ddr_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/prefetch_utl_ddr_en - cat /sys/class/misc/prefetch/prefetch_utl_ddr_en | grep register\(1\) -done - -echo "L3T_PREFETCH: prefetch_utl_l3t set test, (exp:0~3)" -for i in {0..3} -do - echo $i > /sys/class/misc/prefetch/prefetch_utl_l3t - cat /sys/class/misc/prefetch/prefetch_utl_l3t | grep register\(1\) -done - -echo "L3T_PREFETCH: prefetch_utl_l3t_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/prefetch_utl_l3t_en - cat /sys/class/misc/prefetch/prefetch_utl_l3t_en | grep register\(1\) -done - -echo "L3T_PREFETCH: prefetch_vague_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/prefetch_vague_en - cat /sys/class/misc/prefetch/prefetch_vague_en | grep register\(1\) -done - -echo "L3T_PREFETCH: prefetch_core_en set test, (exp:0~15)" -for i in {0..15} +# Description: This file is for testing bits setting and reading of register +# L3T_PREFETCH. + +register='L3T_PREFETCH' +bitname_array=('prefetch_clr_level' 'prefetch_overide_level' \ +'prefetch_utl_ddr' 'prefetch_utl_ddr_en' 'prefetch_utl_l3t' \ +'prefetch_utl_l3t_en' 'prefetch_vague_en' 'prefetch_core_en' \ +'prefetch_match_en' 'prefetch_start_level') +bit_sup=(255 15 3 1 3 1 1 15 1 31) +checkflag=1 +bit_cnt=0 + +for bit in ${bitname_array[*]} do - echo $i > /sys/class/misc/prefetch/prefetch_core_en - cat /sys/class/misc/prefetch/prefetch_core_en | grep register\(1\) + echo "${register}: ${bit} set test, expected 0 ~ ${bit_sup[$bit_cnt]}" + for i in $(seq 0 ${bit_sup[$bit_cnt]}) + do + echo $i > /sys/class/misc/prefetch/${bit} + cat /sys/class/misc/prefetch/${bit} | grep register\(1\) + if [ "register\(1\): ${i}.\n" != "$(cat /sys/class/misc/prefetch/${bit} | grep register\(1\))" ] + then + checkflag=0 + fi + done + let bit_cnt++ done -echo "L3T_PREFETCH: prefetch_match_en set test, (exp:0,1)" -for i in {0..1} -do - echo $i > /sys/class/misc/prefetch/prefetch_match_en - cat /sys/class/misc/prefetch/prefetch_match_en | grep register\(1\) -done - -echo "L3T_PREFETCH: prefetch_start_level set test, (exp:0~15)" -for i in {0..15} -do - echo $i > /sys/class/misc/prefetch/prefetch_start_level - cat /sys/class/misc/prefetch/prefetch_start_level | grep register\(1\) -done - -echo "L3T_PREFETCH: set prefetch_overide_level to 10, (exp:10,3,1,3,1,1,15,1,15)" -echo 10 > /sys/class/misc/prefetch/prefetch_overide_level -cat /sys/class/misc/prefetch/prefetch_overide_level | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_vague_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_core_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_match_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_start_level | grep register\(1\) - -echo "L3T_PREFETCH: set prefetch_utl_ddr to 0, (exp:10,0,1,3,1,1,15,1,15)" -echo 0 > /sys/class/misc/prefetch/prefetch_utl_ddr -cat /sys/class/misc/prefetch/prefetch_overide_level | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_vague_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_core_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_match_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_start_level | grep register\(1\) - -echo "L3T_PREFETCH: set prefetch_utl_ddr_en to 0, (exp:10,0,0,3,1,1,15,1,15)" -echo 0 > /sys/class/misc/prefetch/prefetch_utl_ddr_en -cat /sys/class/misc/prefetch/prefetch_overide_level | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_vague_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_core_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_match_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_start_level | grep register\(1\) - -echo "L3T_PREFETCH: set prefetch_utl_l3t to 0, (exp:10,0,0,0,1,1,15,1,15)" -echo 0 > /sys/class/misc/prefetch/prefetch_utl_l3t -cat /sys/class/misc/prefetch/prefetch_overide_level | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_vague_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_core_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_match_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_start_level | grep register\(1\) - -echo "L3T_PREFETCH: set prefetch_utl_l3t_en to 0, (exp:10,0,0,0,0,1,15,1,15)" -echo 0 > /sys/class/misc/prefetch/prefetch_utl_l3t_en -cat /sys/class/misc/prefetch/prefetch_overide_level | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_vague_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_core_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_match_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_start_level | grep register\(1\) - -echo "L3T_PREFETCH: set prefetch_vague_en to 0, (exp:10,0,0,0,0,0,15,1,15)" -echo 0 > /sys/class/misc/prefetch/prefetch_vague_en -cat /sys/class/misc/prefetch/prefetch_overide_level | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_vague_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_core_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_match_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_start_level | grep register\(1\) - -echo "L3T_PREFETCH: set prefetch_core_en to 10, (exp:10,0,0,0,0,0,10,1,15)" -echo 10 > /sys/class/misc/prefetch/prefetch_core_en -cat /sys/class/misc/prefetch/prefetch_overide_level | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_vague_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_core_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_match_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_start_level | grep register\(1\) +count=0 +bit_arr=( +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1\ +) +echo "------------${register} combined test--------------" +for a0 in $(seq 0 ${bit_sup[0]}); do bit_arr[0]=$a0 +for a1 in $(seq 0 ${bit_sup[1]}); do bit_arr[1]=$a1 +for a2 in $(seq 0 ${bit_sup[2]}); do bit_arr[2]=$a2 +for a3 in $(seq 0 ${bit_sup[3]}); do bit_arr[3]=$a3 +for a4 in $(seq 0 ${bit_sup[4]}); do bit_arr[4]=$a4 +for a5 in $(seq 0 ${bit_sup[5]}); do bit_arr[5]=$a5 +for a6 in $(seq 0 ${bit_sup[6]}); do bit_arr[6]=$a6 +for a7 in $(seq 0 ${bit_sup[7]}); do bit_arr[7]=$a7 +for a8 in $(seq 0 ${bit_sup[8]}); do bit_arr[8]=$a8 +for a9 in $(seq 0 ${bit_sup[9]}); do bit_arr[9]=$a9 + if [ `expr $count % 10000` == 0 ]; then + echo "Current register bits value combination: ${count} ------------" + fi + + for i in {0..9} + do + echo ${bit_arr[$i]} > /sys/class/misc/prefetch/${bitname_array[$i]} + #echo "${bitname_array[$i]}: $(cat /sys/class/misc/prefetch/${bitname_array[$i]} | grep register\(1\))" + done + let count++ +done;done;done;done;done;done;done +done;done;done +echo "----------${register} combined test done------------" -echo "L3T_PREFETCH: set prefetch_match_en to 10, (exp:10,0,0,0,0,0,10,0,15)" -echo 0 > /sys/class/misc/prefetch/prefetch_match_en -cat /sys/class/misc/prefetch/prefetch_overide_level | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_vague_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_core_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_match_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_start_level | grep register\(1\) -echo "L3T_PREFETCH: set prefetch_start_level to 10, (exp:10,0,0,0,0,0,10,0,10)" -echo 10 > /sys/class/misc/prefetch/prefetch_start_level -cat /sys/class/misc/prefetch/prefetch_overide_level | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_ddr_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_utl_l3t_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_vague_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_core_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_match_en | grep register\(1\) -cat /sys/class/misc/prefetch/prefetch_start_level | grep register\(1\) diff --git a/tests/L3tStaticCtrl.sh b/tests/L3tStaticCtrl.sh new file mode 100644 index 0000000..dccb42c --- /dev/null +++ b/tests/L3tStaticCtrl.sh @@ -0,0 +1,75 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0 +# * Copyright(c) 2019 Huawei Technologies Co., Ltd +# * +# * This program is free software; you can redistribute it and/or modify it +# * under the terms and conditions of the GNU General Public License, +# * version 2, as published by the Free Software Foundation. +# * +# * This program is distributed in the hope it will be useful, but WITHOUT +# * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# * for more details. +# Create: 2020-11-04 +# Author: Liuke (liuke20@gitee) +# Wang Wuzhe (wangwuzhe@gitee) +# Description: This file is for testing bits setting and reading of register +# L3T_STATIC_CTRL. + +register='L3T_STATIC_CTRL' +bitname_array=('reg_nosnp_atomic_bypass_en' 'reg_ro_alloc_shut_en' \ +'reg_wrfull_hit_shut_en' 'req_conflict_en' 'lower_power_en' \ +'dataclean_shut_en' 'arb_flush_shut_en' 'pgnt_arb_exat_shut_en' \ +'fast_exter_shut_en' 'fast_data_shut_en' 'pend_data_shut_en' \ +'ramfwd_shut_en') +checkflag=1 + +for bit in ${bitname_array[*]} +do + echo "${register}: ${bit} set test, expected 0~1" + for i in {0..1} + do + echo $i > /sys/class/misc/prefetch/${bit} + cat /sys/class/misc/prefetch/${bit} | grep register\(1\) + if [ "register\(1\): ${i}.\n" != "$(cat /sys/class/misc/prefetch/${bit} | grep register\(1\))" ] + then + checkflag=0 + fi + done +done + +count=0 +bit_arr=( +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1 1 1 1 \ +1 1\ +) +echo "------------${register} combined test--------------" +for a0 in {0..1}; do bit_arr[0]=$a0 +for a1 in {0..1}; do bit_arr[1]=$a1 +for a2 in {0..1}; do bit_arr[2]=$a2 +for a3 in {0..1}; do bit_arr[3]=$a3 +for a4 in {0..1}; do bit_arr[4]=$a4 +for a5 in {0..1}; do bit_arr[5]=$a5 +for a6 in {0..1}; do bit_arr[6]=$a6 +for a7 in {0..1}; do bit_arr[7]=$a7 +for a8 in {0..1}; do bit_arr[8]=$a8 +for a9 in {0..1}; do bit_arr[9]=$a9 +for a10 in {0..1}; do bit_arr[10]=$a10 +for a11 in {0..1}; do bit_arr[11]=$a11 + echo "Current register bits value combination: ${count} ------------" + for i in {0..11} + do + echo ${bit_arr[$i]} > /sys/class/misc/prefetch/${bitname_array[$i]} + echo "${bitname_array[$i]}: $(cat /sys/class/misc/prefetch/${bitname_array[$i]} | grep register\(1\))" + done + let count++ +done;done;done;done;done;done;done +done;done;done;done;done +echo "----------${register} combined test done------------" + diff --git a/tests/MnDynamicCtrl.sh b/tests/MnDynamicCtrl.sh index 67b7a65..5cb5aae 100644 --- a/tests/MnDynamicCtrl.sh +++ b/tests/MnDynamicCtrl.sh @@ -41,4 +41,30 @@ for i in {0..1} do echo $i > /sys/class/misc/prefetch/dvmreq_perf_en cat /sys/class/misc/prefetch/dvmreq_perf_en | grep register\(1\) +done + +echo "MN_DYNAMIC_CTRL combined test" +for i in {0..15} +do + echo "-------------------dvmsnp_outstanding" + echo $i > /sys/class/misc/prefetch/dvmsnp_outstanding + cat /sys/class/misc/prefetch/dvmsnp_outstanding | grep register\(1\) + for j in {0..31} + do + echo "----------dvmreq_outstanding" + echo $j > /sys/class/misc/prefetch/dvmreq_outstanding + cat /sys/class/misc/prefetch/dvmreq_outstanding | grep register\(1\) + for k in {0..1} + do + echo "------dvmsnp_perf_en" + echo $k > /sys/class/misc/prefetch/dvmsnp_perf_en + cat /sys/class/misc/prefetch/dvmsnp_perf_en | grep register\(1\) + for n in {0..1} + do + echo "----dvmreq_perf_en" + echo $n > /sys/class/misc/prefetch/dvmreq_perf_en + cat /sys/class/misc/prefetch/dvmreq_perf_en | grep register\(1\) + done + done + done done \ No newline at end of file diff --git a/tests/Static.sh b/tests/Static.sh deleted file mode 100644 index aa823ca..0000000 --- a/tests/Static.sh +++ /dev/null @@ -1,98 +0,0 @@ -#!/bin/bash -# SPDX-License-Identifier: GPL-2.0 -# * Copyright(c) 2019 Huawei Technologies Co., Ltd -# * -# * This program is free software; you can redistribute it and/or modify it -# * under the terms and conditions of the GNU General Public License, -# * version 2, as published by the Free Software Foundation. -# * -# * This program is distributed in the hope it will be useful, but WITHOUT -# * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -# * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -# * for more details. -# Create: 2020-09-07 -# Author: Liuke (liuke20@gitee) - -echo "L3T_STATIC: reg_nosnp_atomic_bypass_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/reg_nosnp_atomic_bypass_en -cat /sys/class/misc/prefetch/reg_nosnp_atomic_bypass_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/reg_nosnp_atomic_bypass_en -cat /sys/class/misc/prefetch/reg_nosnp_atomic_bypass_en | grep register\(1\) - -echo "L3T_STATIC: reg_ro_alloc_shut_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/reg_ro_alloc_shut_en -cat /sys/class/misc/prefetch/reg_ro_alloc_shut_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/reg_ro_alloc_shut_en -cat /sys/class/misc/prefetch/reg_ro_alloc_shut_en | grep register\(1\) - -echo "L3T_STATIC: reg_wrfull_hit_shut_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/reg_wrfull_hit_shut_en -cat /sys/class/misc/prefetch/reg_wrfull_hit_shut_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/reg_wrfull_hit_shut_en -cat /sys/class/misc/prefetch/reg_wrfull_hit_shut_en | grep register\(1\) - -echo "L3T_STATIC: req_conflict_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/req_conflict_en -cat /sys/class/misc/prefetch/req_conflict_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/req_conflict_en -cat /sys/class/misc/prefetch/req_conflict_en | grep register\(1\) - -echo "L3T_STATIC: lower_power_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/lower_power_en -cat /sys/class/misc/prefetch/lower_power_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/lower_power_en -cat /sys/class/misc/prefetch/lower_power_en | grep register\(1\) - -echo "L3T_STATIC: dataclean_shut_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/dataclean_shut_en -cat /sys/class/misc/prefetch/dataclean_shut_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/dataclean_shut_en -cat /sys/class/misc/prefetch/dataclean_shut_en | grep register\(1\) - -echo "L3T_STATIC: arb_flush_shut_en_n set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/arb_flush_shut_en_n -cat /sys/class/misc/prefetch/arb_flush_shut_en_n | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/arb_flush_shut_en_n -cat /sys/class/misc/prefetch/arb_flush_shut_en_n | grep register\(1\) - -echo "L3T_STATIC: pgnt_arb_exat_shut_en_n set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/pgnt_arb_exat_shut_en_n -cat /sys/class/misc/prefetch/pgnt_arb_exat_shut_en_n | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/pgnt_arb_exat_shut_en_n -cat /sys/class/misc/prefetch/pgnt_arb_exat_shut_en_n | grep register\(1\) - -echo "L3T_STATIC: fast_exter_shut_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/fast_exter_shut_en -cat /sys/class/misc/prefetch/fast_exter_shut_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/fast_exter_shut_en -cat /sys/class/misc/prefetch/fast_exter_shut_en | grep register\(1\) - -echo "L3T_STATIC: fast_data_shut_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/fast_data_shut_en -cat /sys/class/misc/prefetch/fast_data_shut_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/fast_data_shut_en -cat /sys/class/misc/prefetch/fast_data_shut_en | grep register\(1\) - -echo "L3T_STATIC: pend_data_shut_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/pend_data_shut_en -cat /sys/class/misc/prefetch/pend_data_shut_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/pend_data_shut_en -cat /sys/class/misc/prefetch/pend_data_shut_en | grep register\(1\) - -echo "L3T_STATIC: ramfwd_shut_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/ramfwd_shut_en -cat /sys/class/misc/prefetch/ramfwd_shut_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/ramfwd_shut_en -cat /sys/class/misc/prefetch/ramfwd_shut_en | grep register\(1\) - -echo "L3T_STATIC: ramthr_merge_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/ramthr_merge_en -cat /sys/class/misc/prefetch/ramthr_merge_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/ramthr_merge_en -cat /sys/class/misc/prefetch/ramthr_merge_en | grep register\(1\) - -echo "L3T_STATIC: ext_en set test, (exp:0~1)" -echo 0 > /sys/class/misc/prefetch/ext_en -cat /sys/class/misc/prefetch/ext_en | grep register\(1\) -echo 1 > /sys/class/misc/prefetch/ext_en -cat /sys/class/misc/prefetch/ext_en | grep register\(1\) -- Gitee From 60f01b24d97fe208b5445d4bee4807a09189ddb5 Mon Sep 17 00:00:00 2001 From: wangwuzhe Date: Thu, 12 Nov 2020 09:04:33 +0800 Subject: [PATCH 2/2] rearrange device attributes --- prefetch_mod.c | 191 ++++++++++++++++++++++++------------------------- 1 file changed, 95 insertions(+), 96 deletions(-) diff --git a/prefetch_mod.c b/prefetch_mod.c index e84f720..ea16156 100644 --- a/prefetch_mod.c +++ b/prefetch_mod.c @@ -62,69 +62,6 @@ static DEVICE_ATTR(read_unique, S_IRUGO|S_IWUSR, static DEVICE_ATTR(cpumask, S_IRUGO|S_IWUSR, prefetch_mask_show, prefetch_mask_store); -static DEVICE_ATTR(iocapacity_limit_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(tag_rep_alg, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(ramswap_full_shut_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(sqmerge_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(prefetch_drop_hha_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(prefetch_utl_ddr, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(prefetch_utl_ddr_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(prefetch_utl_l3t, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(prefetch_utl_l3t_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(prefetch_start_level, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(rdmerge_upgrade_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(prefetch_overide_level, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(prefetch_vague_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(prefetch_core_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(prefetch_match_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(reg_ctrl_prefetch_drop, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(reg_ctrl_dmcassign, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(reg_ctrl_rdatabyp, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(reg_dir_replace_alg, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(prefetch_comb, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(reg_funcdis_comb, S_IRUGO|S_IWUSR, - val_show, val_store); - static DEVICE_ATTR(reg_nosnp_atomic_bypass_en, S_IRUGO|S_IWUSR, val_show, val_store); @@ -158,6 +95,9 @@ static DEVICE_ATTR(fast_data_shut_en, S_IRUGO|S_IWUSR, static DEVICE_ATTR(pend_data_shut_en, S_IRUGO|S_IWUSR, val_show, val_store); +static DEVICE_ATTR(ramswap_full_shut_en, S_IRUGO|S_IWUSR, + val_show, val_store); + static DEVICE_ATTR(ramfwd_shut_en, S_IRUGO|S_IWUSR, val_show, val_store); @@ -194,61 +134,46 @@ static DEVICE_ATTR(ramthr_en, S_IRUGO|S_IWUSR, static DEVICE_ATTR(rsperr_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(force_cq_clk_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(rdnosnp_nca_shut_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(wrfull_create_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(cleanunique_data_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(lock_share_req_en, S_IRUGO|S_IWUSR, - val_show, val_store); - -static DEVICE_ATTR(ddr_compress_opt_en, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(iocapacity_limit_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(atomic_monitor_en, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(force_cq_clk_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(snpsleep_en, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(sqmerge_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(prefetchtgt_en, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(rdmerge_upgrade_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(prefetch_clr_level, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(prefetch_drop_hha_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(reg_ctrl_spillprefetch, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(tag_rep_alg, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(reg_ctrl_mpamen, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(rdnosnp_nca_shut_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(reg_ctrl_mpamqos, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(wrfull_create_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(reg_ctrl_poison, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(cleanunique_data_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(reg_ctrl_compress_spec, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(lock_share_req_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(reg_ctrl_writeevict_drop, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(ddr_compress_opt_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(reg_ctrl_excl_clear_dis, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(atomic_monitor_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(reg_ctrl_excl_eventen, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(snpsleep_en, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(reg_ctrl_eccen, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(prefetchtgt_en, S_IRUGO|S_IWUSR, val_show, val_store); static DEVICE_ATTR(sequence_shape_en, S_IRUGO|S_IWUSR, @@ -311,19 +236,73 @@ static DEVICE_ATTR(refillsize_pre_ada_en, S_IRUGO|S_IWUSR, static DEVICE_ATTR(sequence_opt_en, S_IRUGO|S_IWUSR, val_show, val_store); +static DEVICE_ATTR(prefetch_clr_level, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(prefetch_overide_level, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(prefetch_utl_ddr, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(prefetch_utl_ddr_en, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(prefetch_utl_l3t, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(prefetch_utl_l3t_en, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(prefetch_vague_en, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(prefetch_core_en, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(prefetch_match_en, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(prefetch_start_level, S_IRUGO|S_IWUSR, + val_show, val_store); + static DEVICE_ATTR(pime_timeout_num, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(dvmsnp_outstanding, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(reg_ctrl_spillprefetch, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(dvmreq_outstanding, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(reg_ctrl_mpamen, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(dvmsnp_perf_en, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(reg_ctrl_mpamqos, S_IRUGO|S_IWUSR, val_show, val_store); -static DEVICE_ATTR(dvmreq_perf_en, S_IRUGO|S_IWUSR, +static DEVICE_ATTR(reg_ctrl_poison, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(reg_ctrl_compress_spec, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(reg_ctrl_writeevict_drop, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(reg_ctrl_prefetch_drop, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(reg_ctrl_dmcassign, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(reg_ctrl_rdatabyp, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(reg_ctrl_excl_clear_dis, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(reg_ctrl_excl_eventen, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(reg_ctrl_eccen, S_IRUGO|S_IWUSR, val_show, val_store); static DEVICE_ATTR(reg_readoncesnp_dis, S_IRUGO|S_IWUSR, @@ -395,9 +374,15 @@ static DEVICE_ATTR(reg_entry_except, S_IRUGO|S_IWUSR, static DEVICE_ATTR(reg_dir_precision, S_IRUGO|S_IWUSR, val_show, val_store); +static DEVICE_ATTR(reg_dir_replace_alg, S_IRUGO|S_IWUSR, + val_show, val_store); + static DEVICE_ATTR(strict_order, S_IRUGO|S_IWUSR, val_show, val_store); +static DEVICE_ATTR(prefetch_comb, S_IRUGO|S_IWUSR, + val_show, val_store); + static DEVICE_ATTR(evict_green, S_IRUGO|S_IWUSR, val_show, val_store); @@ -440,6 +425,9 @@ static DEVICE_ATTR(reg_funcdis_ccixcbupdate, S_IRUGO|S_IWUSR, static DEVICE_ATTR(reg_funcdis_updateopen, S_IRUGO|S_IWUSR, val_show, val_store); +static DEVICE_ATTR(reg_funcdis_comb, S_IRUGO|S_IWUSR, + val_show, val_store); + static DEVICE_ATTR(reg_prefetchtgt_outstanding, S_IRUGO|S_IWUSR, val_show, val_store); @@ -452,6 +440,17 @@ static DEVICE_ATTR(reg_spec_rd_level, S_IRUGO|S_IWUSR, static DEVICE_ATTR(reg_drop_level, S_IRUGO|S_IWUSR, val_show, val_store); +static DEVICE_ATTR(dvmsnp_outstanding, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(dvmreq_outstanding, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(dvmsnp_perf_en, S_IRUGO|S_IWUSR, + val_show, val_store); + +static DEVICE_ATTR(dvmreq_perf_en, S_IRUGO|S_IWUSR, + val_show, val_store); static struct attribute *prefetch_attrs[] = { &dev_attr_policy.attr, &dev_attr_cpumask.attr, -- Gitee