diff --git a/.oebuild/manifest.yaml b/.oebuild/manifest.yaml index 1a5fae513f13ab45e99f4a8dd4bc41aa5c4c0c9a..d64e065112cfa2b0bfa1b4be5e6935f7aa5f91ea 100644 --- a/.oebuild/manifest.yaml +++ b/.oebuild/manifest.yaml @@ -1851,3 +1851,30 @@ manifest_list: open62541: remote_url: https://gitee.com/src-openeuler/open62541.git version: 6564947947abe265d86aaf10fe6fdc1a03fb89b9 + vim: + remote_url: https://gitee.com/src-openeuler/vim.git + version: 67e5cc494de128be87367b929f75a60f803dbbb2 + python-pycryptodome: + remote_url: https://gitee.com/src-openeuler/python-pycryptodome.git + version: 2a53e85983df87058fb8879c2855a9393dce19c2 + python-pycryptodomex: + remote_url: https://gitee.com/src-openeuler/python-pycryptodomex.git + version: f86e282cbb869da1e86773beea1aaaed95873685 + fiptool: + remote_url: https://gitee.com/alichinese/rzg_trusted-firmware-a.git + version: aed3786384b99dc13a46a8d3af139df28b5642a3 + flash-writer: + remote_url: https://gitee.com/alichinese/myir-renesas-flash-writer.git + version: 8cd973992da7cdc8646a498b81d1a1e4e9f74f20 + optee-example: + remote_url: https://gitee.com/alichinese/optee_examples.git + version: e9c870525af8f7e7fccf575a0ca5394ce55adcec + rzg_optee-os: + remote_url: https://gitee.com/alichinese/rzg_optee-os.git + version: c6c0c5d713b6083cc71c1d48633e97d79ecb9f21 + myir-renesas-tf-a: + remote_url: https://gitee.com/alichinese/myir-renesas-tf-a.git + version: 1308cc5eb85aa67f5e29241e99c21d7e1b27c913 + mbedtls: + remote_url: https://gitee.com/alichinese/mbedtls.git + version: dd79db10014d85b26d11fe57218431f2e5ede6f2 diff --git a/.oebuild/platform/myir-remi.yaml b/.oebuild/platform/myir-remi.yaml new file mode 100644 index 0000000000000000000000000000000000000000..d29313956fb65fa7b8ec984845f1b23c2b5dd52e --- /dev/null +++ b/.oebuild/platform/myir-remi.yaml @@ -0,0 +1,9 @@ +type: platform + +machine: myir-remi + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +local_conf: | + TRUSTED_BOARD_BOOT = "1" + ENABLE_SPD_OPTEE = "1" diff --git a/bsp/meta-openeuler-bsp/conf/layer.conf b/bsp/meta-openeuler-bsp/conf/layer.conf index cf6da95a20676b049b9f685cb1ecc1938c6ffde4..778042b24e1906e2aa57b41717b34c0d6eef92a8 100644 --- a/bsp/meta-openeuler-bsp/conf/layer.conf +++ b/bsp/meta-openeuler-bsp/conf/layer.conf @@ -31,3 +31,16 @@ rockchip:${LAYERDIR}/rockchip/*/*/*.bbappend \ #enable find .inc under rockchip/, included in .bb BBPATH:append = ":${LAYERDIR}/rockchip" + +#enable .bb under rockchip/ when exist yocto-meta-rockchip +# BBFILES_DYNAMIC += " +# openeuler-bsp:${LAYERDIR}/renesas/recipes-remi/*/*/*.bb +# openeuler-bsp:${LAYERDIR}/renesas/recipes-remi/*/*/*.bbappend +# " + +BBFILES += "${LAYERDIR}/renesas/recipes-remi/recipes-*/*/*.bb \ + ${LAYERDIR}/renesas/recipes-remi/recipes-*/*/*.bbappend \ +" + +#enable find .inc under rockchip/, included in .bb +BBPATH:append = ":${LAYERDIR}/renesas/recipes-remi" diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/cip-core.inc b/bsp/meta-openeuler-bsp/conf/machine/include/cip-core.inc new file mode 100644 index 0000000000000000000000000000000000000000..d1509e7e3c38cd4a6b20151b282b9f93974cd097 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/cip-core.inc @@ -0,0 +1,28 @@ +DEBIAN_BASED = "${@bb.utils.contains('CIP_CORE', '1', 'debian', 'nondebian', d)}" +#DEBIAN_BASED = "nondebian" +OVERRIDES .= ":${DEBIAN_BASED}" + +BBMASK:append:nondebian = " recipes-debian" + +BBMASK:append:debian = " perl_debian" + +# Select gcc,gdb, python3 debian version +GCCVERSION_debian = "8.3.0" +SDKGCCVERSION_debian = "${GCCVERSION}" + +GLIBCVERSION_debian = "2.31%" +PREFERRED_VERSION_glibc_debian = "${GLIBCVERSION}" +PREFERRED_VERSION_nativesdk-glibc_debian = "${GLIBCVERSION}" +PREFERRED_VERSION_nativesdk-glibc-locale_debian = "${GLIBCVERSION}" + +BINUVERSION_debian = "2.31.%" +PREFERRED_VERSION_nativesdk-binutils_debian = "${BINUVERSION}" + +PREFERRED_VERSION_gdb_debian = "9.1" + +PREFERRED_VERSION_busybox_debian = "1.31.%" + +RDEPENDS:xz:append:debian = "bash" +RDEPENDS:gzip:append:debian = "bash" +RDEPENDS:adduser:append:debian = "perl" + diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/r9a07g044l.inc b/bsp/meta-openeuler-bsp/conf/machine/include/r9a07g044l.inc new file mode 100644 index 0000000000000000000000000000000000000000..2be23fa354e57bc91320c6b7011a96c09dc0a4f6 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/r9a07g044l.inc @@ -0,0 +1,3 @@ +SOC_FAMILY =. "rzg2l:" +require conf/machine/include/soc-family.inc +LINUXLIBCVERSION = "5.10%" diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/rzg2-common.inc b/bsp/meta-openeuler-bsp/conf/machine/include/rzg2-common.inc new file mode 100644 index 0000000000000000000000000000000000000000..53fe6a9f95a26623e5a69e452e521eff8246aafb --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/rzg2-common.inc @@ -0,0 +1,32 @@ +#EXT_GFX_BACKEND = "${@oe.utils.ifelse((d.getVar('RZ_FEATURE') == 'True') and (d.getVar('USE_RENESAS_GLES') == '1'), '1', '0')}" +EXT_GFX_BACKEND = "${@oe.utils.ifelse((d.getVar('USE_RENESAS_GLES') == '1'), '1', '0')}" +# 32BIT package install (default is disable) +# This variables can be used only in multilib. +USE_32BIT_PKGS ?= "0" +USE_32BIT_WAYLAND ?= "0" +USE_32BIT_MMP ?= "0" + +MACHINE_FEATURES = "" + +KERNEL_IMAGETYPE = "Image" +IMAGE_FSTYPES:append = " tar.bz2 ext4" + +SERIAL_CONSOLES = "115200;ttySC0" + +# Configuration for ARM Trusted Firmware +#EXTRA_IMAGEDEPENDS += " trusted-firmware-a" +EXTRA_IMAGEDEPENDS += " tf-a-myir" + +# Add variable to Build Configuration in build log +BUILDCFG_VARS:append = " SOC_FAMILY" + +# We must disable ptest when can not use GPLv3 License, +# ptest require many package, which have GPLv3 License, +DISTRO_FEATURES:remove = "${@bb.utils.contains("INCOMPATIBLE_LICENSE", "GPLv3", "ptest", "",d)}" + +# Match version between native and target sysroot in meta-gplv2 when not using GPLv3. +PREFERRED_VERSION_gdbm-native ?= "${@bb.utils.contains("INCOMPATIBLE_LICENSE", "GPLv3", "1.8.3", "",d)}" + +# u-boot +PREFERRED_VERSION_u-boot = "v2021.10%" +EXTRA_IMAGEDEPENDS += " u-boot-myir" diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/rzg2l-common.inc b/bsp/meta-openeuler-bsp/conf/machine/include/rzg2l-common.inc new file mode 100644 index 0000000000000000000000000000000000000000..56988ba620d97018b0804e4c8184de395a48936f --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/rzg2l-common.inc @@ -0,0 +1,10 @@ +require conf/machine/include/${SOC_FAMILY}.inc +require rzg2-common.inc + +# Firmware-pack +EXTRA_IMAGEDEPENDS += " firmware-pack" + +MACHINEOVERRIDES =. "rzg2l:" + +BBMASK:append = " recipes-rzg2h|recipes-rzv2l" +#BBMASK_append = " recipes-yg2lx" diff --git a/bsp/meta-openeuler-bsp/conf/machine/include/tune-cortexa55.inc b/bsp/meta-openeuler-bsp/conf/machine/include/tune-cortexa55.inc new file mode 100644 index 0000000000000000000000000000000000000000..3b9949f9bc96f55bd38327bec1f48fc4428b1b83 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/include/tune-cortexa55.inc @@ -0,0 +1,13 @@ +DEFAULTTUNE ?= "cortexa55" + +TUNEVALID[cortexa55] = "Enable Cortex-A55 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa55', ' -mtune=cortex-a55', '', d)}" + +require conf/machine/include/arm/arch-armv8-2a.inc + +# Little Endian base configs +AVAILTUNES += "cortexa55" +ARMPKGARCH:tune-cortexa55 = "cortexa55" +TUNE_FEATURES:tune-cortexa55 = "${TUNE_FEATURES:tune-aarch64} cortexa55" +PACKAGE_EXTRA_ARCHS:tune-cortexa55 = "${PACKAGE_EXTRA_ARCHS:tune-aarch64} cortexa55" +BASE_LIB:tune-cortexa55 = "lib64" diff --git a/bsp/meta-openeuler-bsp/conf/machine/myir-remi.conf b/bsp/meta-openeuler-bsp/conf/machine/myir-remi.conf new file mode 100644 index 0000000000000000000000000000000000000000..a4fa99dacab1525fd1e690abcfc7a35a9ebbcf45 --- /dev/null +++ b/bsp/meta-openeuler-bsp/conf/machine/myir-remi.conf @@ -0,0 +1,49 @@ +#@TYPE: Machine +#@NAME: myir-yg2lx machine +#@DESCRIPTION: RZ/G2L myir platform + +SOC_FAMILY = "r9a07g044l" +require conf/machine/include/rzg2l-common.inc +require conf/machine/include/cip-core.inc + +DEFAULTTUNE ?= "cortexa55" + +TUNE_CONF ?= "conf/machine/include/tune-cortexa55.inc" +require ${TUNE_CONF} + +PREFERRED_PROVIDER_virtual/kernel="linux-myir" +PREFERRED_PROVIDER_virtual/bootloader = "u-boot-myir" + +# DISTRO_FEATURES:append = " qt5" +# DISTRO_FEATURES:append = " virtualization" + +MACHINE_EXTRA_RRECOMMENDS = "kernel-modules" +#MACHINE_FEATURES += "watchdog" + +UBOOT_CONFIG ??= "mys-rzg2l" +#2G DDR +UBOOT_CONFIG[mys-rzg2l] = "mys-rzg2l_defconfig" + +#1G DDR +#UBOOT_CONFIG[myc-rzg2l] = "myc-rzg2l_ddr1gb_defconfig" + +# flash writer +EXTRA_IMAGEDEPENDS += " flash-writer" + +# Support board with PMIC. Default:yes. +# With this option enabled, build both bin files for PMIC board and Concrete board. +# PMIC_SUPPORT ?= "1" + +# Supported devicetree +#KERNEL_DEVICETREE = " \ +# renesas/r9a07g044l2-smarc.dtb \ +#" +#KERNEL_DEVICETREE = " \ +# myir/myb-rzg2l-hdmi.dtb \ +#" + + +KERNEL_DEVICETREE = " \ + myir/mys-rzg2l-wifi.dtb \ + myir/mys-rzg2l-sdcard.dtb \ +" diff --git a/bsp/meta-openeuler-bsp/renesas/include/core-image-bsp.inc b/bsp/meta-openeuler-bsp/renesas/include/core-image-bsp.inc new file mode 100644 index 0000000000000000000000000000000000000000..2ea3cedac44342a12274d4cc684486a57cef01e1 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/include/core-image-bsp.inc @@ -0,0 +1,73 @@ +# Basic packages +IMAGE_INSTALL:append = " \ + bonnie++ \ + util-linux \ + busybox \ + libusb1 \ + pciutils \ + iproute2 \ + i2c-tools \ + can-utils \ + ethtool \ + iperf3 \ + usbutils \ + mtd-utils \ + dosfstools \ + e2fsprogs-badblocks \ + e2fsprogs-dumpe2fs \ + e2fsprogs-e2fsck \ + e2fsprogs-e2scrub \ + e2fsprogs-mke2fs \ + e2fsprogs-resize2fs \ + e2fsprogs-tune2fs \ + minicom \ + memtester \ + alsa-utils \ + libdrm \ + libdrm-tests \ + yavta \ + kernel-module-uvcvideo \ + watchdog \ +" + +# Installation for Wifi/Bluetooth packages +IMAGE_INSTALL:append_rzg2h = " \ + linux-firmware-ti-connectivity-license \ + linux-firmware-wl18xx \ + init-ifupdown \ + wlconf \ + init-wl18xx \ + iw \ + wpa-supplicant \ + kernel-module-wlcore-sdio \ + bt-fw \ + obexftp \ + bluez-alsa \ + audio-init \ +" + +# Additional tools for support Tool develop +IMAGE_INSTALL:append = " \ + ckermit \ + connman \ + connman-client \ + connman-tools \ + connman-tests \ + connman-wait-online \ + lttng-modules \ + lttng-tools \ + lttng-ust \ + tcf-agent \ +" + +# Additional tools for support testing Realtime characteristic in system +IMAGE_INSTALL:append = " \ + ${@oe.utils.conditional("IS_RT_BSP", "1", " rt-tests ", " ",d)} \ +" + +require docker-control.inc +# Additional tools for supporting Docker +DOCKER_PKGS = " docker ca-certificates ntpdate kernel-module-nf-conntrack-netlink " +IMAGE_INSTALL:append = "\ + ${@oe.utils.conditional("USE_DOCKER", "1", " ${DOCKER_PKGS} ", "", d)} \ +" diff --git a/bsp/meta-openeuler-bsp/renesas/include/core-image-renesas-base.inc b/bsp/meta-openeuler-bsp/renesas/include/core-image-renesas-base.inc new file mode 100644 index 0000000000000000000000000000000000000000..d412946cbedd51648c4086f616addd7947a013be --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/include/core-image-renesas-base.inc @@ -0,0 +1,98 @@ +# Basic packages +IMAGE_INSTALL:append = " \ + bash \ + v4l-utils \ + v4l2-init \ + i2c-tools \ + coreutils \ +" + +update_issue() { + # Set BSP version + BSP_VERSION="3.0.1" + + # Set SoC and Board info + case "${MACHINE}" in + smarc-rzg2l) + BSP_SOC="RZG2L" + BSP_BOARD="RZG2L-SMARC-EVK" + ;; + smarc-rzg2lc) + BSP_SOC="RZG2LC" + BSP_BOARD="RZG2LC-SMARC-EVK" + ;; + smarc-rzg2ul) + BSP_SOC="RZG2UL" + BSP_BOARD="RZG2UL-SMARC-EVK" + ;; + smarc-rzv2l) + BSP_SOC="RZV2L" + BSP_BOARD="RZV2L-SMARC-EVK" + ;; + rzv2l-dev) + BSP_SOC="RZV2L" + BSP_BOARD="RZV2L-DEV" + ;; + hihope-rzg2h) + BSP_SOC="RZG2H" + BSP_BOARD="HIHOPE-RZG2H" + ;; + hihope-rzg2m) + BSP_SOC="RZG2M" + BSP_BOARD="HIHOPE-RZG2M" + ;; + hihope-rzg2n) + BSP_SOC="RZG2N" + BSP_BOARD="HIHOPE-RZG2N" + ;; + ek874) + BSP_SOC="RZG2E" + BSP_BOARD="EK874" + ;; + + esac + + # Make issue file + echo "BSP: ${BSP_SOC}/${BSP_BOARD}/${BSP_VERSION}" >> ${IMAGE_ROOTFS}/etc/issue + echo "LSI: ${BSP_SOC}" >> ${IMAGE_ROOTFS}/etc/issue + echo "Version: ${BSP_VERSION}" >> ${IMAGE_ROOTFS}/etc/issue +} +ROOTFS_POSTPROCESS_COMMAND += "update_issue; " + +# Renesas Basic packages for 32bit +BASIC_32BIT_PKGS = " \ + lib32-coreutils \ + lib32-libstdc++ \ +" + +# Support secure environment +IMAGE_INSTALL:append = " \ + optee-client \ +" + +BASIC_32BIT_PKGS:append:rzg2h = " \ + lib32-optee-client \ +" + +# Installation for 32bit packages +IMAGE_INSTALL:append = " \ + ${@oe.utils.conditional("USE_32BIT_PKGS", "1", "${BASIC_32BIT_PKGS}", "", d)} \ +" + +# Qos user packages only supports 64bit. +QOS_USER_PKGS = "" +QOS_USER_PKGS_aarch64 = " \ + qosif-user-module \ + qosif-tp-user-module \ +" + +# Installation for QoS packages +IMAGE_INSTALL:append_rzg2h = " \ + kernel-module-qos \ + ${QOS_USER_PKGS} \ +" + +# Environment setup, support building kernel modules with kernel src in SDK +export KERNELSRC="$SDKTARGETSYSROOT/usr/src/kernel" +export KERNELDIR="$SDKTARGETSYSROOT/usr/src/kernel" +export HOST_EXTRACFLAGS="-I${OECORE_NATIVE_SYSROOT}/usr/include/ -L${OECORE_NATIVE_SYSROOT}/usr/lib" diff --git a/bsp/meta-openeuler-bsp/renesas/include/core-image-renesas-mmp.inc b/bsp/meta-openeuler-bsp/renesas/include/core-image-renesas-mmp.inc new file mode 100644 index 0000000000000000000000000000000000000000..ca2af2c8c01aa2261dfb8311ba005e528359dd2f --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/include/core-image-renesas-mmp.inc @@ -0,0 +1,6 @@ +IMAGE_INSTALL:append = " \ + packagegroup-gstreamer1.0-plugins \ + packagegroup-wayland-community \ + packagegroup-multimedia-libs \ + packagegroup-multimedia-kernel-modules \ +" diff --git a/bsp/meta-openeuler-bsp/renesas/include/docker-control.inc b/bsp/meta-openeuler-bsp/renesas/include/docker-control.inc new file mode 100644 index 0000000000000000000000000000000000000000..1938969f465d8dd8344d40196e7e3656bfa27f79 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/include/docker-control.inc @@ -0,0 +1 @@ +USE_DOCKER="${@'1' if 'docker' in '${MACHINE_FEATURES}' else '0'}" diff --git a/bsp/meta-openeuler-bsp/renesas/include/ecc-control.inc b/bsp/meta-openeuler-bsp/renesas/include/ecc-control.inc new file mode 100644 index 0000000000000000000000000000000000000000..6e10d58f9744b63405544986f680ac9c3f685303 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/include/ecc-control.inc @@ -0,0 +1,23 @@ +def check_ecc_mode(d): + soc = d.getVar("SOC_FAMILY") + soc = soc.replace("rzg2:","") + mode = d.getVar("ECC_MODE") + if d.getVar("USE_ECC") == '1': + if mode == 'Full' : + if soc == 'r8a774c0' or soc == 'r8a774b1': + return '2' + if soc == 'r8a774a1' or soc == 'r8a774e1': + return '1' + if mode == 'Full Dual': + if soc == 'r8a774a1' or soc == 'r8a774e1': + return '1' + bb.fatal("\nSelect wrong ECC Full Mode for ECC_MODE.\ + \nSoC %s not support 'Full Dual'" % soc); + if mode == 'Full Single': + return '2' + return '0' + +ECC="${@'1' if 'ecc' in '${MACHINE_FEATURES}' else '0'}" +USE_ECC="${@'1' if '${ECC}' == '1' else '0'}" + +ECC_FULL="${@check_ecc_mode(d)}" diff --git a/bsp/meta-openeuler-bsp/renesas/include/rzg2-modules-common.inc b/bsp/meta-openeuler-bsp/renesas/include/rzg2-modules-common.inc new file mode 100644 index 0000000000000000000000000000000000000000..f305b66a63e3dbd2701601785f56b11b94c7c3f7 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/include/rzg2-modules-common.inc @@ -0,0 +1,23 @@ +export BUILDDIR = "${STAGING_INCDIR}/.." +export INCSHARED = "${STAGING_INCDIR}" +export LIBSHARED = "${STAGING_LIBDIR}" +export KERNELSRC = "${STAGING_KERNEL_DIR}" +export CROSS_COMPILE = "${TARGET_PREFIX}" +export KERNELDIR = "${STAGING_KERNEL_DIR}" +export LDFLAGS = "" +export CP = "cp" +require include/rzg2-path-common.inc + +# Fix error: openssl/bio.h: No such file or directory +do_make_scripts() { +unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS + make CC="${KERNEL_CC}" LD="${KERNEL_LD}" AR="${KERNEL_AR}" \ + HOSTCC="${BUILD_CC} ${BUILD_CFLAGS} ${BUILD_LDFLAGS}" HOSTCPP="${BUILD_CPP}" \ + -C ${STAGING_KERNEL_DIR} O=${STAGING_KERNEL_BUILDDIR} scripts prepare +} + +# Ensure one recipe isn't running do_make_scripts whilst another is using those +# scripts in do_compile. +do_compile[lockfiles] = "${TMPDIR}/kernel-scripts.lock" + +do_make_scripts[depends] += "openssl-native:do_populate_sysroot" diff --git a/bsp/meta-openeuler-bsp/renesas/include/rzg2-path-common.inc b/bsp/meta-openeuler-bsp/renesas/include/rzg2-path-common.inc new file mode 100644 index 0000000000000000000000000000000000000000..d3dcfffc95cd3cdb9452a38b32c331c7b8d2491a --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/include/rzg2-path-common.inc @@ -0,0 +1 @@ +RENESAS_DATADIR ?= "/usr/local" diff --git a/bsp/meta-openeuler-bsp/renesas/include/rzg2h-security-config.inc b/bsp/meta-openeuler-bsp/renesas/include/rzg2h-security-config.inc new file mode 100644 index 0000000000000000000000000000000000000000..5681a7ebe1c630fe49b3d9189d69938d13ae4106 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/include/rzg2h-security-config.inc @@ -0,0 +1,18 @@ +# For Security Features purpose + +RZG2H_SECURITY_FEATURE = 'DISABLE' + +DIRPATH_SEC_DATADIR_NATIVE = "${STAGING_DATADIR_NATIVE}/.secure" +SYMLINK_NATIVE_BOOT_KEY_DIR = "${DIRPATH_SEC_DATADIR_NATIVE}/keyring" +SYMLINK_NATIVE_USER_KEY_DIR = "${DIRPATH_SEC_DATADIR_NATIVE}/userkey" +SYMLINK_NATIVE_PROV_KEY_DIR = "${DIRPATH_SEC_DATADIR_NATIVE}/provkey" + +DIRPATH_SEC_LIBDIR_NATIVE = "${STAGING_LIBDIR_NATIVE}/.secure" +SYMLINK_NATIVE_SEC_LIB_DIR = "${DIRPATH_SEC_LIBDIR_NATIVE}/library" + +FILE_BOOTPRG_VERIFY_ENC_KEY = 'E-Key.bin' +FILE_BOOTPRG_VERIFY_SIG_KEY = 'SBS-Key.pem' +FILE_BOOT_KEYRING_ENC = 'Keyring_Enc.bin' +FILE_PROVISIONING_KEY_ENC = 'ProvisioningKey_Enc.bin' + +FIP_FLAGS_END_OF_PACKAGE = '0x8000' diff --git a/bsp/meta-openeuler-bsp/renesas/include/rzg2l-security-config.inc b/bsp/meta-openeuler-bsp/renesas/include/rzg2l-security-config.inc new file mode 100644 index 0000000000000000000000000000000000000000..742f45e673d11cd979ab5b38bd35ce287fa1430c --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/include/rzg2l-security-config.inc @@ -0,0 +1,37 @@ +# For Security Features purpose + +# Enable Secure Boot +TRUSTED_BOARD_BOOT := '1' + +# Enable build and load of OP-TEE +ENABLE_SPD_OPTEE := '0' + +# Trusted Board Boot Verification Mode: "encsign" or "sign" +IMG_AUTH_MODE = "encsign" + +# The name of the directory on the host PC where the user keys are stored +DIR_V_MAJOR = '0' +DIR_V_MINOR = '0' +DIR_V_TRACE = '0' +DIR_USER_KEY_VERSION = "${DIR_V_MAJOR}.${DIR_V_MINOR}.${DIR_V_TRACE}" + +# The name of the directory on the host PC where the UFPK is stored +DIR_USER_FACTORY_PROG_KEY = "user_factory_prog" + +# SYMLINK_NATIVE_BOOT_KEY_DIR = "${HOME}/rz_secprv/myir-remi/0.0.0" + +DIRPATH_SEC_DATADIR_NATIVE = "${STAGING_DATADIR_NATIVE}/secprv/${MACHINE}/${DIR_USER_KEY_VERSION}" +SYMLINK_NATIVE_BOOT_KEY_DIR = "${DIRPATH_SEC_DATADIR_NATIVE}/bootkey" +SYMLINK_NATIVE_PROV_KEY_DIR = "${DIRPATH_SEC_DATADIR_NATIVE}/provkey" + +DIRPATH_SEC_LIBDIR_NATIVE = "${STAGING_LIBDIR_NATIVE}/secprv/${MACHINE}" +SYMLINK_NATIVE_SEC_LIB_DIR = "${DIRPATH_SEC_LIBDIR_NATIVE}/seclib" + +DIRPATH_MANIFEST_GENTOOL = "${STAGING_BINDIR_NATIVE}/manifest_generation_tool" +KCERT_COMMON_OPTION = "-halgo SHA2-256 -salgo ECDSA-P256 -mskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/root_of_trust_key.pem" +CCERT_COMMON_OPTION = "-halgo SHA2-256 -salgo ECDSA-P256" +CCERT_COMMON_OPTION:append = " \ + ${@oe.utils.conditional("IMG_AUTH_MODE", "encsign", " -encimage -ealgo AES-CBC -iekey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/cmn_key_idx0.txt", "",d)} \ +" +MANIFEST_GENERATION_KCERT = "${DIRPATH_MANIFEST_GENTOOL}/manifest_generation_tool.py genkcert ${KCERT_COMMON_OPTION}" +MANIFEST_GENERATION_CCERT = "${DIRPATH_MANIFEST_GENTOOL}/manifest_generation_tool.py genccert ${CCERT_COMMON_OPTION}" diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/bootparameter-native_1.0.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/bootparameter-native_1.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..72f83cfb556f39aebb5719641a147ef8d350091c --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/bootparameter-native_1.0.bb @@ -0,0 +1,19 @@ +SECTION = "bootloaders" +DESCRIPTION = "Application to create binaries in the correct format for rzg2l board flashing" +LICENSE = "GPLv2" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/GPL-2.0-only;md5=801f80980d171dd6425610833a22dbe6" + +inherit native + +S = "${WORKDIR}" + +SRC_URI = "file://bootparameter.c" + +do_compile () { + ${CC} bootparameter.c -o bootparameter +} + +do_install () { + install -d ${D}${bindir} + install ${WORKDIR}/bootparameter ${D}${bindir} +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/bootparameter/bootparameter.c b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/bootparameter/bootparameter.c new file mode 100644 index 0000000000000000000000000000000000000000..4ba31dd3b0bdd1a34a55def2213854565e7b05df --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/bootparameter/bootparameter.c @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2021 Renesas Electronics Corp. + * Author: Biju Das +*/ + +#include +#include +#include +#include + +off_t fsize(const char *filename) +{ + struct stat st; + if (stat(filename, &st) == 0) + return st.st_size; + return -1; +} + +int main(int argc, char *argv[]) +{ + int size, i = 0; + char val = 0xff; + if (argc <= 2) { /* argc should be 2 for correct execution */ + /* We print argv[0] assuming it is the program name */ + printf("usage: %s bl2_filename output_file_name\n", argv[0]); + return -1; + } else { + // We assume argv[1] is a filename to open + FILE *fptr; + fptr = fopen(argv[2], "wb"); + /* fopen returns 0, the NULL pointer, on failure */ + if (fptr == 0) { + printf("Could not open file\n"); + } + + size = fsize(argv[1]); + printf("size is %x\n",size); + size = (size + 3) & (~0x3); + printf("Aligned size is %x\n",size); + + fwrite(&size, 4, 1, fptr); + for(i=0;i<506; i++) + fwrite(&val, 1, 1, fptr); + val = 0x55; + fwrite(&val, 1, 1, fptr); + val = 0xAA; + fwrite(&val, 1, 1, fptr); + + fclose(fptr); + } + return 0; +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/key_management_tool/config.sh b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/key_management_tool/config.sh new file mode 100755 index 0000000000000000000000000000000000000000..f8cd6c90bc5d943a6cbbb87e4616bb05a49c7b84 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/key_management_tool/config.sh @@ -0,0 +1,123 @@ +#!/bin/sh + +# RZ/G2L Tool Version +readonly TOOL_VERSION="1.00" + +# Default Root directory path where the generated keys are stored +DIRPATH_KEYGEN_ROOT="${HOME}/rz_key_mgr" + +# Directory name where User Factory Programming Key is stored +readonly DIR_USER_FACTORY_PROG='user_factory_prog' + +readonly FILE_USER_FACTORY_PROG_KEY='ufpk' +readonly USER_FACTORY_PROG_KEY_SIZE=32 + +readonly FILE_USER_FACTORY_PROG_IV0='ufpk_init_vec' +readonly USER_FACTORY_PROG_IV0_SIZE=16 + +# Boot program encryption key +readonly LIST_BOOTPRG_VERIFY_ENC_KEY='cmn_key_idx0 cmn_key_idx1 cmn_key_idx2 cmn_key_idx3 jtag_auth_code' +readonly BOOTPRG_VERIFY_ENC_KEY_TYPE='aes-128' + +# Boot program signing key +readonly LIST_BOOTPRG_VERIFY_SIG_KEY='root_of_trust_key bl2_key bl31_key bl32_key bl33_key' +readonly BOOTPRG_VERIFY_SIG_KEY_TYPE='ecc-p256-pri' + +# Key update key +readonly FILE_KEY_UPDATE_KEY='key_update_key' +readonly KEY_UPDATE_KEY_TYPE='kuk' +readonly KEY_UPDATE_KEY_SIZE=32 +readonly FILE_KEY_UPDATE_IV0='kuk_init_vec' +readonly KEY_UPDATE_IV0_TYPE='kui' +readonly KEY_UPDATE_IV0_SIZE=16 + +# Directory name where the generated user keys are stored +readonly DIR_USER_KEY='user_keys' + +# AES-128 Key for Basic cryptographic features +readonly FILE_AES_128_KEY='aes_128_key' +readonly AES_128_KEY_TYPE='aes-128' +readonly AES_128_KEY_SIZE=16 + +# AES-256 Key for Basic cryptographic features +readonly FILE_AES_256_KEY='aes_256_key' +readonly AES_256_KEY_TYPE='aes-256' +readonly AES_256_KEY_SIZE=32 + +# HMAC-SHA1 Key for Basic cryptographic features +readonly FILE_HMAC_SHA1_KEY='hmac_sha1_key' +readonly HMAC_SHA1_KEY_TYPE='hmac-sha1' +readonly HMAC_SHA1_KEY_SIZE=20 + +# HMAC-SHA256 Key for Basic cryptographic features +readonly FILE_HMAC_SHA256_KEY='hmac_sha256_key' +readonly HMAC_SHA256_KEY_TYPE='hmac-sha256' +readonly HMAC_SHA256_KEY_SIZE=32 + +# RSA-1024 Key for Basic cryptographic features +readonly FILE_RSA_1024_KEY='rsa_1024_key' +readonly RSA_1024_KEY_TYPE_PRI='rsa-1024-pri' +readonly RSA_1024_KEY_TYPE_PUB='rsa-1024-pub' +readonly RSA_1024_KEY_SIZE=128 + +# RSA-2048 Key for Basic cryptographic features +readonly FILE_RSA_2048_KEY='rsa_2048_key' +readonly RSA_2048_KEY_TYPE_PRI='rsa-2048-pri' +readonly RSA_2048_KEY_TYPE_PUB='rsa-2048-pub' +readonly RSA_2048_KEY_SIZE=256 + +# RSA-4096 Key for Basic cryptographic features +readonly FILE_RSA_4096_KEY='rsa_4096_key' +readonly RSA_4096_KEY_TYPE_PRI='rsa-4096-pri' +readonly RSA_4096_KEY_TYPE_PUB='rsa-4096-pub' +readonly RSA_4096_KEY_SIZE=512 + +# ECC NIST-P192 Key for Basic cryptographic features +readonly FILE_ECC_P192_KEY='ecc_p192_key' +readonly ECC_P192_KEY_TYPE_PRI='ecc-p192-pri' +readonly ECC_P192_KEY_TYPE_PUB='ecc-p192-pub' +readonly ECC_P192_KEY_SIZE_PRI=24 +readonly ECC_P192_KEY_SIZE_PUB=48 + +# ECC NIST-P224 Key for Basic cryptographic features +readonly FILE_ECC_P224_KEY='ecc_p224_key' +readonly ECC_P224_KEY_TYPE_PRI='ecc-p224-pri' +readonly ECC_P224_KEY_TYPE_PUB='ecc-p224-pub' +readonly ECC_P224_KEY_SIZE_PRI=28 +readonly ECC_P224_KEY_SIZE_PUB=56 + +# ECC NIST-P256 Key for Basic cryptographic features +readonly FILE_ECC_P256_KEY='ecc_p256_key' +readonly ECC_P256_KEY_TYPE_PRI='ecc-p256-pri' +readonly ECC_P256_KEY_TYPE_PUB='ecc-p256-pub' +readonly ECC_P256_KEY_SIZE_PRI=32 +readonly ECC_P256_KEY_SIZE_PUB=64 + +# ECC Brainpool-P512r1 Key for Basic cryptographic features +readonly FILE_ECC_BSI_P512_KEY='ecc_bsi_p512_key' +readonly ECC_BSI_P512_KEY_TYPE_PRI='ecc-bsi_p512-pri' +readonly ECC_BSI_P512_KEY_TYPE_PUB='ecc-bsi_p512-pub' +readonly ECC_BSI_P512_KEY_SIZE_PRI=64 +readonly ECC_BSI_P512_KEY_SIZE_PUB=128 + +# List of keys generated for basic cryptographic features +readonly LIST_GENERATION_USERKEY=" + ${AES_128_KEY_TYPE},${FILE_AES_128_KEY},2 + ${AES_256_KEY_TYPE},${FILE_AES_256_KEY},2 + ${HMAC_SHA1_KEY_TYPE},${FILE_HMAC_SHA1_KEY},0 + ${HMAC_SHA256_KEY_TYPE},${FILE_HMAC_SHA256_KEY},0 + ${RSA_1024_KEY_TYPE_PRI},${FILE_RSA_1024_KEY},2 + ${RSA_1024_KEY_TYPE_PUB},${FILE_RSA_1024_KEY},2 + ${RSA_2048_KEY_TYPE_PRI},${FILE_RSA_2048_KEY},2 + ${RSA_2048_KEY_TYPE_PUB},${FILE_RSA_2048_KEY},2 + ${RSA_4096_KEY_TYPE_PRI},${FILE_RSA_4096_KEY},2 + ${RSA_4096_KEY_TYPE_PUB},${FILE_RSA_4096_KEY},2 + ${ECC_P192_KEY_TYPE_PRI},${FILE_ECC_P192_KEY},2 + ${ECC_P192_KEY_TYPE_PUB},${FILE_ECC_P192_KEY},2 + ${ECC_P224_KEY_TYPE_PRI},${FILE_ECC_P224_KEY},2 + ${ECC_P224_KEY_TYPE_PUB},${FILE_ECC_P224_KEY},2 + ${ECC_P256_KEY_TYPE_PRI},${FILE_ECC_P256_KEY},2 + ${ECC_P256_KEY_TYPE_PUB},${FILE_ECC_P256_KEY},2 + ${ECC_BSI_P512_KEY_TYPE_PRI},${FILE_ECC_BSI_P512_KEY},2 + ${ECC_BSI_P512_KEY_TYPE_PUB},${FILE_ECC_BSI_P512_KEY},2 +" diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/key_management_tool/genkey.sh b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/key_management_tool/genkey.sh new file mode 100755 index 0000000000000000000000000000000000000000..b288875198308bdf159382c914b4f8fbb0a891e2 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/key_management_tool/genkey.sh @@ -0,0 +1,262 @@ +#!/bin/sh + +. ./utility.sh + +#******************************************************************************* +# Function Name: func_gen_cmnkey +# Description : Generate the common key. +# Arguments : ${1} - key length in bytes +# : stdout - Generated random numbers in text or binary +# Return Value : 0 or 1 +#******************************************************************************* +func_gen_cmnkey () +{ + local len_tag_key="${1}" + + if [ "true" != "${FLAG_HEX_COMMON}" ]; then + openssl rand "${len_tag_key}" + else + openssl rand -hex "${len_tag_key}" + fi + + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to generate Common Key." + return 1 + fi + return 0 +} + +#******************************************************************************* +# Function Name: func_gen_rsa_pri +# Description : Generate the rsa private key. +# Arguments : ${1} - key length in bytes +# : stdout - rsa private key in PEM format +# Return Value : 0 or 1 +#******************************************************************************* +func_gen_rsa_pri () +{ + local len_tag_key="$(expr ${1} \* 8)" + + openssl genrsa -f4 "${len_tag_key}" 2>/dev/null + + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to generate RSA Private Key." + return 1 + fi + + return 0 +} + +#******************************************************************************* +# Function Name: func_gen_rsa_pub +# Description : Generate the rsa public key. +# Arguments : stdin - rsa private key in PEM format +# : stdout - rsa public key in PEM format +# Return Value : 0 or 1 +#******************************************************************************* +func_gen_rsa_pub () +{ + local rsa_pri_key="$(cat)" + + echo "${rsa_pri_key}" | openssl rsa -pubout 2>/dev/null + + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to generate RSA Public Key." + return 1 + fi + + return 0 +} + +#******************************************************************************* +# Function Name: func_gen_p256 +# Description : Generate the ecc private key. +# Arguments : ${1} - key generation option +# : stdout - ecc private key in PEM format +# Return Value : 0 or 1 +#******************************************************************************* +func_gen_ecc_pri () +{ + openssl ecparam -genkey -name ${1} -noout 2>/dev/null + + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to generate ECC Private Key." + return 1 + fi + + return 0 +} + +#******************************************************************************* +# Function Name: func_gen_ecc_pub +# Description : Generate the ecc p256 public key. +# Arguments : stdin - ecc private key in PEM format +# : stdout - ecc public key in PEM format +# Return Value : 0 or 1 +#******************************************************************************* +func_gen_ecc_pub () +{ + openssl ec -pubout 2>/dev/null + + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to generate ECC Public Key." + return 1 + fi + + return 0 +} + +#******************************************************************************* +# Function Name: func_usage_exit +# Description : Show usage and exit this script. +# Arguments : none +# Return Value : none (exit) +#******************************************************************************* +func_usage_exit () +{ + errlog + errlog "This script is for generating RZ/G2 security key." + errlog "Version ${TOOL_VERSION}" + errlog + errlog "Usage:" + errlog " ${SCRIPT_NAME} -t [-x]" + errlog + errlog "Write the generated key to standard output." + errlog "If the type of key generated is a public key, the private key is read from standard input or pipe." + errlog + errlog " -t " + errlog " Type of key to be generated." + errlog " The supported key types are:" + errlog " ${AES_128_KEY_TYPE}" + errlog " ${AES_256_KEY_TYPE}" + errlog " ${HMAC_SHA1_KEY_TYPE}" + errlog " ${HMAC_SHA256_KEY_TYPE}" + errlog " ${RSA_1024_KEY_TYPE_PRI}" + errlog " ${RSA_1024_KEY_TYPE_PUB}" + errlog " ${RSA_2048_KEY_TYPE_PRI}" + errlog " ${RSA_2048_KEY_TYPE_PUB}" + errlog " ${RSA_4096_KEY_TYPE_PRI}" + errlog " ${RSA_4096_KEY_TYPE_PUB}" + errlog " ${ECC_P192_KEY_TYPE_PRI}" + errlog " ${ECC_P192_KEY_TYPE_PUB}" + errlog " ${ECC_P224_KEY_TYPE_PRI}" + errlog " ${ECC_P224_KEY_TYPE_PUB}" + errlog " ${ECC_P256_KEY_TYPE_PRI}" + errlog " ${ECC_P256_KEY_TYPE_PUB}" + errlog " ${ECC_BSI_P512_KEY_TYPE_PRI}" + errlog " ${ECC_BSI_P512_KEY_TYPE_PUB}" + errlog + errlog " -x" + errlog " Output common key in hex text." + errlog + + exit 1 +} + +#******************************************************************************* +# Function Name: func_main +# Description : Call the key generation function for each specified key type. +# Arguments : none +# Return Value : 0 or 1 +#******************************************************************************* +func_main () +{ + if [ -z "${TYPE_TARGET_KEY}" ]; then + errlog "[error] ${SCRIPT_NAME}: The key type is not specified." + func_usage_exit + fi + + case "${TYPE_TARGET_KEY}" in + + "${AES_128_KEY_TYPE}") + func_gen_cmnkey "${AES_128_KEY_SIZE}" + ;; + "${AES_256_KEY_TYPE}") + func_gen_cmnkey "${AES_256_KEY_SIZE}" + ;; + "${HMAC_SHA1_KEY_TYPE}") + func_gen_cmnkey "${HMAC_SHA1_KEY_SIZE}" + ;; + "${HMAC_SHA256_KEY_TYPE}") + func_gen_cmnkey "${HMAC_SHA256_KEY_SIZE}" + ;; + "${RSA_1024_KEY_TYPE_PRI}") + func_gen_rsa_pri "${RSA_1024_KEY_SIZE}" + ;; + "${RSA_1024_KEY_TYPE_PUB}") + func_gen_rsa_pub < "${TMP_FILE}" + ;; + "${RSA_2048_KEY_TYPE_PRI}") + func_gen_rsa_pri "${RSA_2048_KEY_SIZE}" + ;; + "${RSA_2048_KEY_TYPE_PUB}") + func_gen_rsa_pub < "${TMP_FILE}" + ;; + "${RSA_4096_KEY_TYPE_PRI}") + func_gen_rsa_pri "${RSA_4096_KEY_SIZE}" + ;; + "${RSA_4096_KEY_TYPE_PUB}") + func_gen_rsa_pub < "${TMP_FILE}" + ;; + "${ECC_P192_KEY_TYPE_PRI}") + func_gen_ecc_pri prime192v1 + ;; + "${ECC_P192_KEY_TYPE_PUB}") + func_gen_ecc_pub < "${TMP_FILE}" + ;; + "${ECC_P224_KEY_TYPE_PRI}") + func_gen_ecc_pri secp224r1 + ;; + "${ECC_P224_KEY_TYPE_PUB}") + func_gen_ecc_pub < "${TMP_FILE}" + ;; + "${ECC_P256_KEY_TYPE_PRI}") + func_gen_ecc_pri prime256v1 + ;; + "${ECC_P256_KEY_TYPE_PUB}") + func_gen_ecc_pub < "${TMP_FILE}" + ;; + "${ECC_BSI_P512_KEY_TYPE_PRI}") + func_gen_ecc_pri brainpoolP512r1 + ;; + "${ECC_BSI_P512_KEY_TYPE_PUB}") + func_gen_ecc_pub < "${TMP_FILE}" + ;; + *) errlog "[error] ${SCRIPT_NAME}: Unsupported key type \"${TYPE_TARGET_KEY}\"." + func_usage_exit + ;; + esac + + exit $? +} + +#******************************************************************************* +# Startup +#******************************************************************************* +cd "$(dirname ${0})" + +. ./config.sh + +SCRIPT_NAME="$(basename ${0})" + +if [ -f /dev/stdin ] || [ -p /dev/stdin ]; then + cat "/dev/stdin" > "${TMP_FILE}" +fi + +while getopts :t:xh OPT +do + case "${OPT}" in + t) typ_tag_key="${OPTARG}" + ;; + x) flg_hex_cmn="true" + ;; + :|\?) func_usage_exit + ;; + esac +done + +TYPE_TARGET_KEY="$(echo "${typ_tag_key}" | tr '[:upper:]' '[:lower:]')" +FLAG_HEX_COMMON="${flg_hex_cmn}" + +# Call func_main +func_main diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/key_management_tool/sec_keygen.sh b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/key_management_tool/sec_keygen.sh new file mode 100755 index 0000000000000000000000000000000000000000..a4d9a2097e5f7f800cd2aee659fc9434b22785b9 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/key_management_tool/sec_keygen.sh @@ -0,0 +1,896 @@ +#!/bin/sh + +. ./utility.sh + +#******************************************************************************* +# Function Name: func_find_dirnames_match_pttrn +# Description : Find the directory names that matches the pattern. +# : The pattern is "major minor trace". +# Arguments : ${1} - directory path to search +# : ${2} - major number +# : ${3} - minor number +# : ${4} - trace number +# : stdout - directory name that matches the pattern +# Return Value : 0 or others +#******************************************************************************* +func_find_dirnames_match_pttrn () +{ + local dirname=""; local parentdir="${1}" + + local major="${2}"; local minor="${3}"; local trace="${4}" + + if [ ! -d "${parentdir}" ]; then + errlog "[error] ${SCRIPT_NAME}: Unable to find the directory \"${parentdir}\"." + return 1 + fi + + dirname="$(cd "${parentdir}"; find ./ -maxdepth 1 -type d | \ + grep "^\.\/${major:-[0-9]\+}\.${minor:-\([0-9]\+\)}\.${trace:-\([0-9]\+\)}.*$" | \ + sed 's/^\.\///')" + + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to find the directory name that matches the pattern." + return 1 + fi + + echo "${dirname}" + + return 0 +} + +#******************************************************************************* +# Function Name: func_extract_pttrn_from_dirname +# Description : Extract the pattern from the directory name. +# Arguments : ${1} - directory name +# : stdout - pattern number +# Return Value : 0 or 1 +#******************************************************************************* +func_extract_pttrn_from_dirname () +{ + local dirname="${1}"; local pttrn_nums="" + + if [ ! -z "${dirname}" ]; then + + pttrn_nums="$(echo "${dirname}" | sed -r -n -e "s/^([0-9]+)(\.([0-9]+))?(\.([0-9]+))?$/\1 \3 \5/p")" + + if [ -z "${pttrn_nums}" ]; then + errlog "[error] ${SCRIPT_NAME}: Incorrect directory name pattern \"${dirname}\"." + return 1 + fi + echo -n "${pttrn_nums}" + fi + return 0 +} + +#******************************************************************************* +# Function Name: func_from_pttrn_to_dirname +# Description : Create a directory name from the input pattern. +# Arguments : ${1} - major number +# : ${2} - minor number +# : ${3} - trace number +# : stdout - directory name +# Return Value : 0 or 1 +#******************************************************************************* +func_from_pttrn_to_dirname () +{ + local dirname="" + + local major=0; local minor=0; local trace=0; + + if [ ! -z "${1}" ]; then major="${1}"; fi + if [ ! -z "${2}" ]; then minor="${2}"; fi + if [ ! -z "${3}" ]; then trace="${3}"; fi + + dirname="${major}.${minor}.${trace}" + + func_extract_pttrn_from_dirname "${dirname}" >/dev/null + if [ 0 != $? ]; then + return 1 + fi + + echo "${dirname}" + + return 0 +} + +#******************************************************************************* +# Function Name: func_get_pttrn_newest_dirname +# Description : Choose the newest directory that matches the pattern number. +# Arguments : ${1} - directory path to search +# : ${2} - directory name +# : stdout - directory name pattern +# Return Value : 0 or 1 +#******************************************************************************* +func_get_pttrn_newest_dirname () +{ + local parentdir="${1}"; local dirname="${2}"; local pttrn_value=""; + + pttrn_value="$(func_extract_pttrn_from_dirname ${dirname})" + if [ 0 != $? ]; then + return 1 + fi + + list_matched_dirname="$(func_find_dirnames_match_pttrn "${parentdir}" ${pttrn_value})" + if [ 0 != $? ]; then + return 1 + fi + + list_dirname_number="$(echo "${list_matched_dirname}" | sed -r -n -e "s/^([0-9]+)(\.([0-9]+))(\.([0-9]+)).*$/\1 \3 \5/p")" + + echo "${list_dirname_number}" | sort -k 1n,1 -k 2n,2 | tail -n 1 + + return 0 +} + +#******************************************************************************* +# Function Name: func_update_major_number +# Description : Update the major number of the newest directory. +# Arguments : ${1} - directory path to search +# : stdout - directory name +# Return Value : 0 or 1 +#******************************************************************************* +func_update_major_number () +{ + local parentdir="${1}"; local pattern="" + + local trace=0; local minor=0; local major=0; + + pattern="$(func_get_pttrn_newest_dirname "${parentdir}")" + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Unable to find the newest directory." + return 1 + fi + + if [ -n "${pattern}" ]; then + set -- ${pattern} + major="${1}" + major=$(( major + 1 )) + fi + + func_from_pttrn_to_dirname "${major}" "${minor}" "${trace}" +} + +#******************************************************************************* +# Function Name: func_update_minor_number +# Description : Update the minor number of the directory that matches the pattern. +# Arguments : ${1} - directory path to search +# : ${2} - major number +# : ${3} - minor number +# : ${4} - trace number +# : stdout - directory name +# Return Value : 0 or 1 +#******************************************************************************* +func_update_minor_number () +{ + local parentdir="${1}"; local pattern="" + + local major="${2}"; local minor="${3}"; local trace="${4}"; + + if [ -z "${major}${minor}${trace}" ]; then + errlog "[error] ${SCRIPT_NAME}: The version pattern is empty." + return 1 + fi + + func_from_pttrn_to_dirname ${major} ${minor} ${trace} >/dev/null + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to create the directory name from the pattern \"${major}" "${minor}" "${trace}\"." + return 1 + fi + + pattern="$(func_get_pttrn_newest_dirname "${parentdir}" ${major})" + if [ 0 != $? ] || [ -z "${pattern}" ]; then + errlog "[error] ${SCRIPT_NAME}: Unable to find the latest directory." + return 1 + fi + + set -- ${pattern} + + trace=${minor}; minor=${2}; major=${1}; + + minor="$(( minor + 1 ))" + + func_from_pttrn_to_dirname ${major} ${minor} ${trace} +} + +#******************************************************************************* +# Function Name: func_get_key_filepath +# Description : Return the path of the key file. +# Arguments : ${1} - key type +# : ${2} - key name +# : ${3} - directory path where the key is generated +# : ${4} - key number (may be empty) +# : stdout - key file path +# Return Value : 0 or 1 +#******************************************************************************* +func_get_key_filepath () +{ + local fpath_gen_key="" + + local key_type="${1}"; local key_name="${2}"; local dirpath="${3}"; local key_num="${4}" + + if [ -z "${key_num}" ] || [ "${key_num}" -le 1 ]; then + key_num="" + fi + + fpath_gen_key="${dirpath%/}/${key_name}${key_num}" + + case "${key_type}" in + + "${AES_128_KEY_TYPE}") + fpath_gen_key="${fpath_gen_key}.txt" + ;; + "${AES_256_KEY_TYPE}") + fpath_gen_key="${fpath_gen_key}.txt" + ;; + "${HMAC_SHA1_KEY_TYPE}") + fpath_gen_key="${fpath_gen_key}.txt" + ;; + "${HMAC_SHA256_KEY_TYPE}") + fpath_gen_key="${fpath_gen_key}.txt" + ;; + "${RSA_1024_KEY_TYPE_PRI}") + fpath_gen_key="${fpath_gen_key}.pem" + ;; + "${RSA_1024_KEY_TYPE_PUB}") + fpath_gen_key="${fpath_gen_key}_pub.pem" + ;; + "${RSA_2048_KEY_TYPE_PRI}") + fpath_gen_key="${fpath_gen_key}.pem" + ;; + "${RSA_2048_KEY_TYPE_PUB}") + fpath_gen_key="${fpath_gen_key}_pub.pem" + ;; + "${RSA_4096_KEY_TYPE_PRI}") + fpath_gen_key="${fpath_gen_key}.pem" + ;; + "${RSA_4096_KEY_TYPE_PUB}") + fpath_gen_key="${fpath_gen_key}_pub.pem" + ;; + "${ECC_P192_KEY_TYPE_PRI}") + fpath_gen_key="${fpath_gen_key}.pem" + ;; + "${ECC_P192_KEY_TYPE_PUB}") + fpath_gen_key="${fpath_gen_key}_pub.pem" + ;; + "${ECC_P224_KEY_TYPE_PRI}") + fpath_gen_key="${fpath_gen_key}.pem" + ;; + "${ECC_P224_KEY_TYPE_PUB}") + fpath_gen_key="${fpath_gen_key}_pub.pem" + ;; + "${ECC_P256_KEY_TYPE_PRI}") + fpath_gen_key="${fpath_gen_key}.pem" + ;; + "${ECC_P256_KEY_TYPE_PUB}") + fpath_gen_key="${fpath_gen_key}_pub.pem" + ;; + "${ECC_BSI_P512_KEY_TYPE_PRI}") + fpath_gen_key="${fpath_gen_key}.pem" + ;; + "${ECC_BSI_P512_KEY_TYPE_PUB}") + fpath_gen_key="${fpath_gen_key}_pub.pem" + ;; + "${KEY_UPDATE_KEY_TYPE}") + fpath_gen_key="${fpath_gen_key}.txt" + ;; + "${KEY_UPDATE_IV0_TYPE}") + fpath_gen_key="${fpath_gen_key}.txt" + ;; + *) + errlog "[error] ${SCRIPT_NAME}: Unsupported key type \"${key_type}\"." + return 1 + ;; + esac + + echo "${fpath_gen_key}" + + return 0 +} + +#******************************************************************************* +# Function Name: func_generate_keyfile +# Description : Generate a key and return the path of the key file. +# Arguments : ${1} - key type +# : ${2} - key name +# : ${3} - directory path where the key is generated +# : ${4} - key number (may be empty) +# : stdout - path of the generated key file +# Return Value : 0 or 1 +#******************************************************************************* +func_generate_keyfile () +{ + local fpath_gen_key=""; local fpath_pri_key="" + + local key_type="${1}"; local key_name="${2}"; local dirpath="${3}"; local key_num="${4}" + + fpath_gen_key="$(func_get_key_filepath "${key_type}" "${key_name}" "${dirpath}" "${key_num}")" + if [ 0 != $? ]; then + return 1 + fi + + case "${key_type}" in + + "${AES_128_KEY_TYPE}") + ./genkey.sh -t "${AES_128_KEY_TYPE}" -x > "${fpath_gen_key}" + ;; + "${AES_256_KEY_TYPE}") + ./genkey.sh -t "${AES_256_KEY_TYPE}" -x > "${fpath_gen_key}" + ;; + "${HMAC_SHA1_KEY_TYPE}") + ./genkey.sh -t "${HMAC_SHA1_KEY_TYPE}" -x > "${fpath_gen_key}" + ;; + "${HMAC_SHA256_KEY_TYPE}") + ./genkey.sh -t "${HMAC_SHA256_KEY_TYPE}" -x > "${fpath_gen_key}" + ;; + "${RSA_1024_KEY_TYPE_PRI}") + ./genkey.sh -t "${RSA_1024_KEY_TYPE_PRI}" > "${fpath_gen_key}" + ;; + "${RSA_1024_KEY_TYPE_PUB}") + fpath_pri_key="$(func_get_key_filepath "${RSA_1024_KEY_TYPE_PRI}" "${key_name}" "${dirpath}" "${key_num}")" + ./genkey.sh -t "${RSA_1024_KEY_TYPE_PUB}" < "${fpath_pri_key}" > "${fpath_gen_key}" + ;; + "${RSA_2048_KEY_TYPE_PRI}") + ./genkey.sh -t "${RSA_2048_KEY_TYPE_PRI}" > "${fpath_gen_key}" + ;; + "${RSA_2048_KEY_TYPE_PUB}") + fpath_pri_key="$(func_get_key_filepath "${RSA_2048_KEY_TYPE_PRI}" "${key_name}" "${dirpath}" "${key_num}")" + ./genkey.sh -t "${RSA_2048_KEY_TYPE_PUB}" < "${fpath_pri_key}" > "${fpath_gen_key}" + ;; + "${RSA_4096_KEY_TYPE_PRI}") + ./genkey.sh -t "${RSA_4096_KEY_TYPE_PRI}" > "${fpath_gen_key}" + ;; + "${RSA_4096_KEY_TYPE_PUB}") + fpath_pri_key="$(func_get_key_filepath "${RSA_4096_KEY_TYPE_PRI}" "${key_name}" "${dirpath}" "${key_num}")" + ./genkey.sh -t "${RSA_4096_KEY_TYPE_PUB}" < "${fpath_pri_key}" > "${fpath_gen_key}" + ;; + "${ECC_P192_KEY_TYPE_PRI}") + ./genkey.sh -t "${ECC_P192_KEY_TYPE_PRI}" > "${fpath_gen_key}" + ;; + "${ECC_P192_KEY_TYPE_PUB}") + fpath_pri_key="$(func_get_key_filepath "${ECC_P192_KEY_TYPE_PRI}" "${key_name}" "${dirpath}" "${key_num}")" + ./genkey.sh -t "${ECC_P192_KEY_TYPE_PUB}" < "${fpath_pri_key}" > "${fpath_gen_key}" + ;; + "${ECC_P224_KEY_TYPE_PRI}") + ./genkey.sh -t "${ECC_P224_KEY_TYPE_PRI}" > "${fpath_gen_key}" + ;; + "${ECC_P224_KEY_TYPE_PUB}") + fpath_pri_key="$(func_get_key_filepath "${ECC_P224_KEY_TYPE_PRI}" "${key_name}" "${dirpath}" "${key_num}")" + ./genkey.sh -t "${ECC_P224_KEY_TYPE_PUB}" < "${fpath_pri_key}" > "${fpath_gen_key}" + ;; + "${ECC_P256_KEY_TYPE_PRI}") + ./genkey.sh -t "${ECC_P256_KEY_TYPE_PRI}" > "${fpath_gen_key}" + ;; + "${ECC_P256_KEY_TYPE_PUB}") + fpath_pri_key="$(func_get_key_filepath "${ECC_P256_KEY_TYPE_PRI}" "${key_name}" "${dirpath}" "${key_num}")" + ./genkey.sh -t "${ECC_P256_KEY_TYPE_PUB}" < "${fpath_pri_key}" > "${fpath_gen_key}" + ;; + "${ECC_BSI_P512_KEY_TYPE_PRI}") + ./genkey.sh -t "${ECC_BSI_P512_KEY_TYPE_PRI}" > "${fpath_gen_key}" + ;; + "${ECC_BSI_P512_KEY_TYPE_PUB}") + fpath_pri_key="$(func_get_key_filepath "${ECC_BSI_P512_KEY_TYPE_PRI}" "${key_name}" "${dirpath}" "${key_num}")" + ./genkey.sh -t "${ECC_BSI_P512_KEY_TYPE_PUB}" < "${fpath_pri_key}" > "${fpath_gen_key}" + ;; + "${KEY_UPDATE_KEY_TYPE}") + ./genkey.sh -t "${AES_128_KEY_TYPE}" -x > "${fpath_gen_key}" + ./genkey.sh -t "${AES_128_KEY_TYPE}" -x >> "${fpath_gen_key}" + ;; + "${KEY_UPDATE_IV0_TYPE}") + ./genkey.sh -t "${AES_128_KEY_TYPE}" -x > "${fpath_gen_key}" + ;; + *) + errlog "[error] ${SCRIPT_NAME}: Unsupported key type \"${key_type}\"." + return 1 + ;; + esac + + if [ 0 != $? ]; then + return 1 + fi + + echo "${fpath_gen_key}" + + return 0 +} + +#******************************************************************************* +# Function Name: func_encrypt_keyfile +# Description : Encrypt a key and return the path of the encrypted key file. +# Arguments : ${1} - key type +# : ${2} - path of the encrypted key file +# : ${3} - path to the directory where the wrapping key is stored +# : stdout - encrypted key path +# Return Value : 0 or 1 +#******************************************************************************* +func_encrypt_keyfile () +{ + local fname_gen_key=""; local fpath_enc_key="" + + local key_type="${1}"; local fpath_gen_key="${2}"; local dirpath_refkey="${3}"; + + fname_gen_key="${fpath_gen_key##*/}" + fpath_enc_key="${fpath_gen_key%/*}/encrypted-${fname_gen_key%.*}.bin" + + case "${key_type}" in + + "${AES_128_KEY_TYPE}") + ./wrapkey.sh -t "${AES_128_KEY_TYPE}" -p "${dirpath_refkey}" -x < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${AES_256_KEY_TYPE}") + ./wrapkey.sh -t "${AES_256_KEY_TYPE}" -p "${dirpath_refkey}" -x < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${HMAC_SHA1_KEY_TYPE}") + ./wrapkey.sh -t "${HMAC_SHA1_KEY_TYPE}" -p "${dirpath_refkey}" -x < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${HMAC_SHA256_KEY_TYPE}") + ./wrapkey.sh -t "${HMAC_SHA256_KEY_TYPE}" -p "${dirpath_refkey}" -x < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${RSA_1024_KEY_TYPE_PRI}") + ./wrapkey.sh -t "${RSA_1024_KEY_TYPE_PRI}" -p "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${RSA_1024_KEY_TYPE_PUB}") + ./wrapkey.sh -t "${RSA_1024_KEY_TYPE_PUB}" -p "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${RSA_2048_KEY_TYPE_PRI}") + ./wrapkey.sh -t "${RSA_2048_KEY_TYPE_PRI}" -p "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${RSA_2048_KEY_TYPE_PUB}") + ./wrapkey.sh -t "${RSA_2048_KEY_TYPE_PUB}" -p "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${RSA_4096_KEY_TYPE_PRI}") + ./wrapkey.sh -t "${RSA_4096_KEY_TYPE_PRI}" -p "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${RSA_4096_KEY_TYPE_PUB}") + ./wrapkey.sh -t "${RSA_4096_KEY_TYPE_PUB}" -p "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${ECC_P192_KEY_TYPE_PRI}") + ./wrapkey.sh -t "${ECC_P192_KEY_TYPE_PRI}" -p "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${ECC_P192_KEY_TYPE_PUB}") + ./wrapkey.sh -t "${ECC_P192_KEY_TYPE_PUB}" -p "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${ECC_P224_KEY_TYPE_PRI}") + ./wrapkey.sh -t "${ECC_P224_KEY_TYPE_PRI}" -p "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${ECC_P224_KEY_TYPE_PUB}") + ./wrapkey.sh -t "${ECC_P224_KEY_TYPE_PUB}" -p "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${ECC_P256_KEY_TYPE_PRI}") + ./wrapkey.sh -t "${ECC_P256_KEY_TYPE_PRI}" -p "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${ECC_P256_KEY_TYPE_PUB}") + ./wrapkey.sh -t "${ECC_P256_KEY_TYPE_PUB}" -p "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${ECC_BSI_P512_KEY_TYPE_PRI}") + ./wrapkey.sh -t "${ECC_BSI_P512_KEY_TYPE_PRI}" -p "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${ECC_BSI_P512_KEY_TYPE_PUB}") + ./wrapkey.sh -t "${ECC_BSI_P512_KEY_TYPE_PUB}" -p "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${KEY_UPDATE_KEY_TYPE}") + ./wrapkey.sh -t "${AES_256_KEY_TYPE}" -p "${dirpath_refkey}" -x < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + *) + errlog "[error] ${SCRIPT_NAME}: Unsupported key type \"${key_type}\"." + return 1 + ;; + esac + + if [ 0 != $? ]; then + return 1 + else + echo "${fpath_enc_key}" + return 0 + fi +} + +#******************************************************************************* +# Function Name: func_update_keyfile +# Description : Encrypt a key and return the path of the encrypted key file. +# Arguments : ${1} - key type +# : ${2} - path of the encrypted key file +# : ${3} - path to the directory where the wrapping key is stored +# : stdout - encrypted key path +# Return Value : 0 or 1 +#******************************************************************************* +func_update_keyfile () +{ + local fname_gen_key=""; local fpath_enc_key="" + + local key_type="${1}"; local fpath_gen_key="${2}"; local dirpath_refkey="${3}"; + + fname_gen_key="${fpath_gen_key##*/}" + fpath_enc_key="${fpath_gen_key%/*}/encrypted-${fname_gen_key%.*}.bin" + + case "${key_type}" in + + "${AES_128_KEY_TYPE}") + ./wrapkey.sh -t "${AES_128_KEY_TYPE}" -u "${dirpath_refkey}" -x < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${AES_256_KEY_TYPE}") + ./wrapkey.sh -t "${AES_256_KEY_TYPE}" -u "${dirpath_refkey}" -x < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${HMAC_SHA1_KEY_TYPE}") + ./wrapkey.sh -t "${HMAC_SHA1_KEY_TYPE}" -u "${dirpath_refkey}" -x < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${HMAC_SHA256_KEY_TYPE}") + ./wrapkey.sh -t "${HMAC_SHA256_KEY_TYPE}" -u "${dirpath_refkey}" -x < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${RSA_1024_KEY_TYPE_PRI}") + ./wrapkey.sh -t "${RSA_1024_KEY_TYPE_PRI}" -u "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${RSA_1024_KEY_TYPE_PUB}") + ./wrapkey.sh -t "${RSA_1024_KEY_TYPE_PUB}" -u "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${RSA_2048_KEY_TYPE_PRI}") + ./wrapkey.sh -t "${RSA_2048_KEY_TYPE_PRI}" -u "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${RSA_2048_KEY_TYPE_PUB}") + ./wrapkey.sh -t "${RSA_2048_KEY_TYPE_PUB}" -u "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${RSA_4096_KEY_TYPE_PRI}") + ./wrapkey.sh -t "${RSA_4096_KEY_TYPE_PRI}" -u "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${RSA_4096_KEY_TYPE_PUB}") + ./wrapkey.sh -t "${RSA_4096_KEY_TYPE_PUB}" -u "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${ECC_P192_KEY_TYPE_PRI}") + ./wrapkey.sh -t "${ECC_P192_KEY_TYPE_PRI}" -u "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${ECC_P192_KEY_TYPE_PUB}") + ./wrapkey.sh -t "${ECC_P192_KEY_TYPE_PUB}" -u "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${ECC_P224_KEY_TYPE_PRI}") + ./wrapkey.sh -t "${ECC_P224_KEY_TYPE_PRI}" -u "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${ECC_P224_KEY_TYPE_PUB}") + ./wrapkey.sh -t "${ECC_P224_KEY_TYPE_PUB}" -u "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${ECC_P256_KEY_TYPE_PRI}") + ./wrapkey.sh -t "${ECC_P256_KEY_TYPE_PRI}" -u "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${ECC_P256_KEY_TYPE_PUB}") + ./wrapkey.sh -t "${ECC_P256_KEY_TYPE_PUB}" -u "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${ECC_BSI_P512_KEY_TYPE_PRI}") + ./wrapkey.sh -t "${ECC_BSI_P512_KEY_TYPE_PRI}" -u "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + "${ECC_BSI_P512_KEY_TYPE_PUB}") + ./wrapkey.sh -t "${ECC_BSI_P512_KEY_TYPE_PUB}" -u "${dirpath_refkey}" < "${fpath_gen_key}" > "${fpath_enc_key}" + ;; + *) + errlog "[error] ${SCRIPT_NAME}: Unsupported key type \"${key_type}\"." + return 1 + ;; + esac + + if [ 0 != $? ]; then + return 1 + else + echo "${fpath_enc_key}" + return 0 + fi +} + +#******************************************************************************* +# Function Name: func_create_bootkey +# Description : Create the boot key. +# Arguments : stdout - directory path where the boot key is generated +# Return Value : 0 or 1 +#******************************************************************************* +func_create_bootkey () +{ + local dirname_bootkey=""; local dirpath_bootkey="" + + local filepath_gen_enckey=""; local filepath_enc_cmnkey=""; local filepath_gen_sigkey="" + + mkdir -p "${DIRPATH_KEYGEN_ROOT}" + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to create the directory \"${DIRPATH_KEYGEN_ROOT}\"." + return 1 + fi + + dirname_bootkey="$(func_update_major_number "${DIRPATH_KEYGEN_ROOT}")" + if [ 0 != $? ] || [ -z "${dirname_bootkey}" ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to update the major number of the directory name." + return 1 + fi + + dirpath_bootkey="${DIRPATH_KEYGEN_ROOT%/}/${dirname_bootkey}" + + mkdir -p "${dirpath_bootkey}" + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to create the directory \"${dirpath_bootkey}\"." + return 1 + fi + + for fname in ${LIST_BOOTPRG_VERIFY_ENC_KEY}; do + + filepath_gen_enckey="$(func_generate_keyfile "${BOOTPRG_VERIFY_ENC_KEY_TYPE}" "${fname}" "${dirpath_bootkey}")" + if [ 0 != $? ] || [ ! -s "${filepath_gen_enckey}" ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to generate the ${fname}." + return 1 + fi + + filepath_enc_cmnkey="$(func_encrypt_keyfile "${BOOTPRG_VERIFY_ENC_KEY_TYPE}" "${filepath_gen_enckey}" "${DIRPATH_USER_FACTORY_PROG_KEY}")" + if [ 0 != $? ] || [ ! -s "${filepath_enc_cmnkey}" ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to wrap the \"${filepath_gen_enckey}\"." + return 1 + fi + + done + + for fname in ${LIST_BOOTPRG_VERIFY_SIG_KEY}; do + + filepath_gen_sigkey="$(func_generate_keyfile "${BOOTPRG_VERIFY_SIG_KEY_TYPE}" "${fname}" "${dirpath_bootkey}")" + if [ 0 != $? ] || [ ! -s "${filepath_gen_sigkey}" ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to generate the ${fname}." + return 1 + fi + + done + + filepath_gen_enckey="$(func_generate_keyfile "${KEY_UPDATE_KEY_TYPE}" "${FILE_KEY_UPDATE_KEY}" "${dirpath_bootkey}")" + if [ 0 != $? ] || [ ! -s "${filepath_gen_enckey}" ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to generate the ${FILE_KEY_UPDATE_KEY}." + return 1 + fi + + filepath_enc_cmnkey="$(func_encrypt_keyfile "${KEY_UPDATE_KEY_TYPE}" "${filepath_gen_enckey}" "${DIRPATH_USER_FACTORY_PROG_KEY}")" + if [ 0 != $? ] || [ ! -s "${filepath_enc_cmnkey}" ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to wrap the \"${filepath_gen_enckey}\"." + return 1 + fi + + filepath_gen_enckey="$(func_generate_keyfile "${KEY_UPDATE_IV0_TYPE}" "${FILE_KEY_UPDATE_IV0}" "${dirpath_bootkey}")" + if [ 0 != $? ] || [ ! -s "${filepath_gen_enckey}" ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to generate the ${FILE_KEY_UPDATE_IV0}." + return 1 + fi + + echo "${dirpath_bootkey}" + + return 0 +} + +#******************************************************************************* +# Function Name: func_create_userkey +# Description : Create the user keys for Basic cryptographic features +# Arguments : ${1} - directory name where the boot key is stored +# : stdout - directory path where the use keys were generated +# Return Value : 0 or 1 +#******************************************************************************* +func_create_userkey () +{ + local dirname_bootkey=""; local dirpath_bootkey=""; local dirpath_userkey=""; + + local filepath_gen_key=""; local filepath_enc_key="" + + local dirname_pttrn="${1}"; local pttrn_dirname=""; local num_key_typ="" + + pttrn_dirname="$(func_get_pttrn_newest_dirname "${DIRPATH_KEYGEN_ROOT}" "${dirname_pttrn}")" + if [ 0 != $? ] || [ -z "${pttrn_dirname}" ]; then + errlog "[error] ${SCRIPT_NAME}: Unable to find the latest directory." + return 1 + fi + + dirname_bootkey="$(func_from_pttrn_to_dirname ${pttrn_dirname})" + if [ 0 != $? ] || [ -z "${dirname_bootkey}" ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to create the directory name from the pattern \"${pttrn_dirname}\"." + return 1 + fi + + dirpath_bootkey="${DIRPATH_KEYGEN_ROOT%/}/${dirname_bootkey}" + if [ ! -d "${dirpath_bootkey}" ]; then + errlog "[error] ${SCRIPT_NAME}: Unable to find the directory \"${dirpath_bootkey}\"." + return 1 + fi + + symlink_userkey="${dirpath_bootkey%/}/${DIR_USER_KEY}" + dirpath_userkey="${dirpath_bootkey%/}/${DIR_USER_KEY}"_"$(date '+%Y%m%d-%H%M%S')" + + num_key_typ="$(echo "${LIST_GENERATION_USERKEY}" | wc -l)" + + for i in ${LIST_GENERATION_USERKEY}; do + + set -- $(echo "${i}" | sed -e "s/,/ /g"); + + local typ_gen_key="${1}"; local name_gen_key="${2}"; local num_gen_key="${3:-"0"}" + + for j in $(awk "BEGIN{for(x=1; x<=${num_gen_key}; ++x) print x}"); do + + if [ ! -d "${dirpath_userkey}" ]; then + mkdir -p "${dirpath_userkey}" + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to create the directory \"${dirpath_userkey}\"." + return 1 + fi + fi + + filepath_gen_key="$(func_generate_keyfile "${typ_gen_key}" "${name_gen_key}" "${dirpath_userkey}" ${j})" + + if [ 0 != $? ] || [ ! -s "${filepath_gen_key}" ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to generate the ${name_gen_key}." + return 1 + fi + + filepath_enc_key="$(func_encrypt_keyfile ${typ_gen_key} "${filepath_gen_key}" "${DIRPATH_USER_FACTORY_PROG_KEY}")"; + + if [ 0 != $? ] || [ ! -s "${filepath_enc_key}" ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to wrap the \"${filepath_gen_key}\"." + return 1 + fi + done + done + + ln -nfs "${dirpath_userkey}" "${symlink_userkey}" + + echo "${dirpath_userkey}" + + return 0 +} + +#******************************************************************************* +# Function Name: func_update_userkey +# Description : Update the user keys for Basic cryptographic features +# Arguments : ${1} - directory name where the boot key is stored +# : stdout - directory path where the use keys were generated +# Return Value : 0 or 1 +#******************************************************************************* +func_update_userkey () +{ + local dirname_bootkey=""; local dirpath_bootkey=""; local dirpath_userkey=""; + + local filepath_gen_key=""; local filepath_enc_key="" + + local dirname_pttrn="${1}"; local pttrn_dirname=""; local num_key_typ="" + + pttrn_dirname="$(func_get_pttrn_newest_dirname "${DIRPATH_KEYGEN_ROOT}" "${dirname_pttrn}")" + if [ 0 != $? ] || [ -z "${pttrn_dirname}" ]; then + errlog "[error] ${SCRIPT_NAME}: Unable to find the latest directory." + return 1 + fi + + dirname_bootkey="$(func_from_pttrn_to_dirname ${pttrn_dirname})" + if [ 0 != $? ] || [ -z "${dirname_bootkey}" ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to create the directory name from the pattern \"${pttrn_dirname}\"." + return 1 + fi + + dirpath_bootkey="${DIRPATH_KEYGEN_ROOT%/}/${dirname_bootkey}" + if [ ! -d "${dirpath_bootkey}" ]; then + errlog "[error] ${SCRIPT_NAME}: Unable to find the directory \"${dirpath_bootkey}\"." + return 1 + fi + + symlink_userkey="${dirpath_bootkey%/}/${DIR_USER_KEY}" + dirpath_userkey="${dirpath_bootkey%/}/${DIR_USER_KEY}"_"$(date '+%Y%m%d-%H%M%S')" + + num_key_typ="$(echo "${LIST_GENERATION_USERKEY}" | wc -l)" + + for i in ${LIST_GENERATION_USERKEY}; do + + set -- $(echo "${i}" | sed -e "s/,/ /g"); + + local typ_gen_key="${1}"; local name_gen_key="${2}"; local num_gen_key="${3:-"0"}" + + for j in $(awk "BEGIN{for(x=1; x<=${num_gen_key}; ++x) print x}"); do + + if [ ! -d "${dirpath_userkey}" ]; then + mkdir -p "${dirpath_userkey}" + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to create the directory \"${dirpath_userkey}\"." + return 1 + fi + fi + + filepath_gen_key="$(func_generate_keyfile "${typ_gen_key}" "${name_gen_key}" "${dirpath_userkey}" ${j})" + + if [ 0 != $? ] || [ ! -s "${filepath_gen_key}" ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to generate the ${name_gen_key}." + return 1 + fi + + filepath_enc_key="$(func_update_keyfile ${typ_gen_key} "${filepath_gen_key}" "${dirpath_bootkey}")"; + + if [ 0 != $? ] || [ ! -s "${filepath_enc_key}" ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to wrap the \"${filepath_gen_key}\"." + return 1 + fi + done + done + + ln -nfs "${dirpath_userkey}" "${symlink_userkey}" + + echo "${dirpath_userkey}" + + return 0 +} + +#******************************************************************************* +# Function Name: func_usage_exit +# Description : Show usage and exit this script. +# Arguments : none +# Return Value : none (exit) +#******************************************************************************* +func_usage_exit() +{ + errlog + errlog "This script is for generating RZ/G2 security key." + errlog "Version ${TOOL_VERSION}" + errlog + errlog "Usage:" + errlog " ${SCRIPT_NAME} [-t ]" + errlog + errlog "Generate keys for RZ/G2 security in the specified directory." + errlog + errlog " -t " + errlog " The path of the directory for the key generation." + errlog " If this option is not specified, \"${DIRPATH_KEYGEN_ROOT}\" is created." + errlog + + exit 1 +} + +#******************************************************************************* +# Function Name: func_main +# Description : Call the key generation function for each specified key type. +# Arguments : none +# Return Value : 0 or 1 +#******************************************************************************* +func_main () +{ + local dirpath=""; local dirname="${DIRNAME_PATTERN}" + + if [ 'create' = "${FLAG_SEC_KEYGEN}" ]; then + + dirpath="$(func_create_bootkey)" + if [ 0 != $? ]; then + exit 1 + fi + elif [ 'update' = "${FLAG_SEC_KEYGEN}" ]; then + dirpath="$(func_update_userkey "${dirname}")" + if [ 0 != $? ]; then + exit 1 + fi + fi + + echo "${dirpath}" + + exit 0 +} + +#******************************************************************************* +# Startup +#******************************************************************************* +cd "$(dirname ${0})" + +. ./config.sh + +SCRIPT_NAME="$(basename ${0})" + +FLAG_SEC_KEYGEN='create' + +while getopts :t:d:u OPT +do + case "${OPT}" in + t) dirpath_keygen="${OPTARG}" + ;; + d) dirname_pttrn="${OPTARG}" + ;; + u) FLAG_SEC_KEYGEN='update' + ;; + :|\?) func_usage_exit + ;; + esac +done + +DIRNAME_PATTERN="${dirname_pttrn}" + +if [ -n "${dirpath_keygen}" ]; then + DIRPATH_KEYGEN_ROOT="${dirpath_keygen}" +fi +DIRPATH_USER_FACTORY_PROG_KEY="${DIRPATH_KEYGEN_ROOT%/}/${DIR_USER_FACTORY_PROG}" + +# Call func_main +func_main diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/key_management_tool/utility.sh b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/key_management_tool/utility.sh new file mode 100755 index 0000000000000000000000000000000000000000..1f6ef5a1cbbd11d61931fc132cb2e812c6103a09 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/key_management_tool/utility.sh @@ -0,0 +1,401 @@ +#!/bin/sh + +if [ -z "${TMP_FILE}" ]; then + TMP_FILE="$(mktemp)" + if [ ! -f "${TMP_FILE}" ]; then + echo "[error] utility.sh: Failed to create temporary file." >&2 + exit 1 + fi + trap 'rm -f ${TMP_FILE}' EXIT # Command to delete temporary files when the script ends +fi + +#******************************************************************************* +# Function Name: errlog +# Description : Write logs to standard error +# Arguments : ${1} - key length +# Return Value : none +#******************************************************************************* +errlog () +{ + echo "${1}" 1>&2 + return 0 +} + +#******************************************************************************* +# Function Name: func_extract_rsaprm +# Description : Extract parameters from PEM format RSA key. +# Arguments : ${1} - rsa parameters +# : stdin - rsa key in PEM format +# : stdout - hexadecimal string of the rsa key parameter +# Return Value : 0 or 1 +#******************************************************************************* +func_extract_rsaprm () +{ + local txt_rsa_prms="${1}" + + local pem_rsa_key="$(cat)" + + local txt_rsa_key="" + + echo "${pem_rsa_key}" | grep -i "PRIVATE KEY" >/dev/null + if [ 0 = $? ]; then + txt_rsa_key="$(echo "${pem_rsa_key}" | openssl rsa -noout -text 2>/dev/null)" + else + txt_rsa_key="$(echo "${pem_rsa_key}" | openssl rsa -noout -text -pubin 2>/dev/null)" + fi + + if [ $? != 0 ] || [ -z "${txt_rsa_key}" ]; then + errlog "[error] utility.sh: Unable to load RSA key from PEM file." + return 1 + fi + + local line_num_prm="" + + for txt_rsa_prm in ${txt_rsa_prms}; do + line_num_prm="$(echo "${txt_rsa_key}" | grep -i "${txt_rsa_prm}:" -n | sed -e 's/:.*//g')" + if [ 0 = $? ] && [ ! -z "${line_num_prm}" ]; then + break; + fi + done + + if [ -z "${line_num_prm}" ]; then + errlog "[error] utility.sh: RSA parameter cannot be found \"${txt_rsa_prms}\"." + return 1 + fi + + txt_rsa_key="$(echo "${txt_rsa_key}" | tail -n +"${line_num_prm}")" + + echo "${txt_rsa_key}" | while read txt_line || [ -n "${txt_line}" ]; + do + local txt_key_line="$(echo "${txt_line}" | sed "s/^\s*\(.*\)\s*$/\1/g")" + echo -n "${txt_key_line}" + + local txt_end_code="$(echo "${txt_key_line}" | sed "s/^.*\(.\)$/\1/g")" + if [ ":" != "${txt_end_code}" ]; then + break + fi + done | sed -e "s/${txt_rsa_prm}:[ \t]*\([^ \t]*\).*/\1/i" | sed -e "s/://g" | sed -e "s/^00//g" + + return $? +} + +#******************************************************************************* +# Function Name: func_load_rsa_pub +# Description : Load the rsa public key parameter as a hexadecimal string +# Arguments : ${1} - rsa key length in bytes +# : stdin - rsa key in PEM format +# : stdout - hexadecimal string of the rsa public key parameter +# Return Value : 0 or 1 +#******************************************************************************* +func_load_rsa_pub () +{ + local pem_rsa_key="$(cat)" + + local len_tag_key="$(expr ${1} \* 2)" + + if [ $? -ge 2 ];then + errlog "[error] utility.sh: The expected value of the key length is invalid." + return 1 + fi + + local hex_modulus="$(echo "${pem_rsa_key}" | func_extract_rsaprm "modulus")" + if [ 0 != $? ]; then + errlog "[error] utility.sh: The modulus parameter cannot be found." + return 1 + fi + + if [ ${len_tag_key} -ne ${#hex_modulus} ]; then + errlog "[error] utility.sh: The key length does not match the expected value." + return 1 + fi + + local hex_exponent="$(echo "${pem_rsa_key}" | func_extract_rsaprm "exponent")" + if [ 0 != $? ]; then + errlog "[error] utility.sh: The exponent parameter cannot be found." + return 1 + fi + + hex_exponent="$(printf "%08X" "${hex_exponent}")$(func_zeropad 12)" + + echo -n "${hex_modulus}${hex_exponent}" + + return 0 +} + +#******************************************************************************* +# Function Name: func_load_rsa_pri +# Description : Load the rsa private key parameter as a hexadecimal string +# Arguments : ${1} - rsa key length in bytes +# : stdin - rsa private key in PEM format +# : stdout - hexadecimal string of the rsa private key parameter +# Return Value : 0 or 1 +#******************************************************************************* +func_load_rsa_pri () +{ + local pem_rsa_key="$(cat)" + + local len_tag_key="$(expr ${1} \* 2)" + + if [ $? -ge 2 ];then + errlog "[error] utility.sh: The expected value of the key length is invalid." + return 1 + fi + + local hex_modulus="$(echo "${pem_rsa_key}" | func_extract_rsaprm "modulus")" + if [ 0 != $? ]; then + errlog "[error] utility.sh: The modulus parameter cannot be found." + return 1 + fi + + if [ ${len_tag_key} -ne ${#hex_modulus} ]; then + errlog "[error] utility.sh: The key length does not match the expected value." + return 1 + fi + + local hex_privateExponent="$(echo "${pem_rsa_key}" | func_extract_rsaprm "privateExponent")" + if [ 0 != $? ]; then + errlog "[error] utility.sh: The privateExponent parameter cannot be found." + return 1 + fi + + echo -n "${hex_modulus}${hex_privateExponent}" + + return 0 +} + +#******************************************************************************* +# Function Name: func_extract_eccprm +# Description : Extract parameters from PEM format ECC key. +# Arguments : ${1} - ecc parameters +# : stdin - ecc key in PEM format +# : stdout - hexadecimal string of the ecc key parameter +# Return Value : 0 or 1 +#******************************************************************************* +func_extract_eccprm () +{ + local txt_ecc_prms="${1}" + + local pem_ecc_key="$(cat)" + + local txt_ecc_key="" + + echo "${pem_ecc_key}" | grep -i "PRIVATE KEY" >/dev/null + if [ 0 = $? ]; then + txt_ecc_key="$(echo "${pem_ecc_key}" | openssl ec -text -noout 2>/dev/null)" + else + txt_ecc_key="$(echo "${pem_ecc_key}" | openssl ec -text -noout -pubin -conv_form uncompressed 2>/dev/null)" + fi + + if [ $? != 0 ] || [ -z "${txt_ecc_key}" ]; then + errlog "[error] utility.sh: Unable to load ECC key from PEM file." + return 1 + fi + + local line_num_prm="" + + for txt_ecc_prm in ${txt_ecc_prms}; do + line_num_prm="$(echo "${txt_ecc_key}" | grep -i "${txt_ecc_prm}:" -n | sed -e 's/:.*//g')" + if [ 0 = $? ] && [ ! -z "${line_num_prm}" ]; then + break; + fi + done + + if [ -z "${line_num_prm}" ]; then + errlog "[error] utility.sh: ECC parameter cannot be found \"${txt_ecc_prms}\"." + return 1 + fi + + txt_ecc_key="$(echo "${txt_ecc_key}" | tail -n +"${line_num_prm}")" + + echo "${txt_ecc_key}" | while read txt_line || [ -n "${txt_line}" ]; + do + local txt_key_line="$(echo "${txt_line}" | sed "s/^\s*\(.*\)\s*$/\1/g")" + echo -n "${txt_key_line}" + + local txt_end_code="$(echo "${txt_key_line}" | sed "s/^.*\(.\)$/\1/g")" + if [ ":" != "${txt_end_code}" ]; then + break + fi + done | sed -e "s/${txt_ecc_prm}:[ \t]*\([^ \t]*\).*/\1/i" | sed -e "s/://g" + + return $? +} + +#******************************************************************************* +# Function Name: func_load_ecc_pub +# Description : Load the ecc public key parameter as a hexadecimal string +# Arguments : ${1} - ecc key length in bytes +# : stdin - ecc key in PEM format +# : stdout - hexadecimal string of the ecc public key parameter +# Return Value : 0 or 1 +#******************************************************************************* +func_load_ecc_pub () +{ + local pem_ecc_key="$(cat)" + + local len_tag_key="$(expr ${1} \* 2)" + + if [ $? -ge 2 ];then + errlog "[error] utility.sh: The expected value of the key length is invalid." + return 1 + fi + + local hex_pub="$(echo "${pem_ecc_key}" | func_extract_eccprm "pub")" + if [ 0 != $? ]; then + errlog "[error] utility.sh: The public parameter cannot be found." + return 1 + fi + + hex_pub="$(echo "${hex_pub}" | sed -e "s/^04//g")" + + echo -n "${hex_pub}" + + return 0 +} + +#******************************************************************************* +# Function Name: func_load_ecc_pri +# Description : Load the ecc private key parameter as a hexadecimal string +# Arguments : ${1} - ecc key length in bytes +# : stdin - ecc private key in PEM format +# : stdout - hexadecimal string of the ecc private key parameter +# Return Value : 0 or 1 +#******************************************************************************* +func_load_ecc_pri () +{ + local pem_ecc_key="$(cat)" + + local len_tag_key="$(expr ${1} \* 2)" + + if [ $? -ge 2 ];then + errlog "[error] utility.sh: The expected value of the key length is invalid." + return 1 + fi + + local hex_priv="$(echo "${pem_ecc_key}" | func_extract_eccprm "priv")" + if [ 0 != $? ]; then + errlog "[error] utility.sh: The priv parameter cannot be found." + return 1 + fi + + echo -n "${hex_priv}" + + return 0 +} + +#******************************************************************************* +# Function Name: func_load_cmnkey +# Description : Load the common key as a hexadecimal string +# Arguments : ${1} - common key length in bytes +# : stdin - common key data +# : stdout - hexadecimal string of common key +# Return Value : 0 or 1 +#******************************************************************************* +func_load_cmnkey () +{ + local hex_cmn_key="$(func_bin_to_hex)" + + if [ 0 != $? ]; then + errlog "[error] utility.sh: The common key cannot be loaded." + return 1 + fi + + local len_cmn_key="$(expr ${1} \* 2)" + + if [ $? -ge 2 ];then + errlog "[error] utility.sh: The expected value of the key length is invalid." + return 1 + fi + + if [ ${len_cmn_key} -ne ${#hex_cmn_key} ]; then + errlog "[error] utility.sh: The key length does not match the expected value." + return 1 + fi + + echo -n "${hex_cmn_key}" + + return 0 +} + +#******************************************************************************* +# Function Name: func_bin_to_hex +# Description : Convert binary to hexadecimal string +# Arguments : ${1} - path to binary file +# : stdin - binary data +# : stdout - hexadecimal string +# Return Value : 0 or 1 +#******************************************************************************* +# func_bin_to_hex () +# { +# if [ ! -z "${1}" ]; then +# cat "${1}" | xxd -p | tr -d '\n\r' +# elif [ -p /dev/stdin ] || [ -f /dev/stdin ]; then +# cat "/dev/stdin" | xxd -p | tr -d '\n\r' +# else +# echo -n +# fi +# return $? +# } + +func_bin_to_hex() { + if [ ! -z "${1}" ]; then + hex=$(od -An -tx1 < "${1}" | tr -d ' \n') + echo "$hex" + elif [ -p /dev/stdin ] || [ -f /dev/stdin ]; then + hex=$(od -An -tx1 < /dev/stdin | tr -d ' \n') + echo "$hex" + else + echo -n + fi + return $? +} + +#******************************************************************************* +# Function Name: func_hex_to_bin +# Description : Convert hexadecimal string to binary +# Arguments : ${1} or stdin - hexadecimal string +# : stdout - binary +# Return Value : 0 or 1 +#******************************************************************************* +func_hex_to_bin () +{ + local hex_string="" + + if [ ! -z "${1}" ]; then + hex_string="${1}" + elif [ -p /dev/stdin ] || [ -f /dev/stdin ]; then + hex_string="$(cat "/dev/stdin")" + else + hex_string="" + fi + + local hex_check="$(echo -n "${hex_string}" | grep "[^0-9a-fA-F]")" + + if [ ! -z "${hex_check}" ]; then + return 1 + fi + + echo -n ${hex_string} | xxd -r -p + + return 0 +} + +#******************************************************************************* +# Function Name: func_zeropad +# Description : Outputs text filled with zeros +# Arguments : ${1} - zero padding length in bytes +# : stdout - zero padding string +# Return Value : 0 +#******************************************************************************* +func_zeropad () +{ + local pads="$(expr ${1} \* 2)" + if [ $? -lt 2 ];then + while [ $pads -gt 0 ] + do + echo -n 0 + pads=$(($pads-1)) + done + fi + return 0 +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/key_management_tool/wrapkey.sh b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/key_management_tool/wrapkey.sh new file mode 100755 index 0000000000000000000000000000000000000000..9b2d614b6979b20db7037ff19b05d8d8a8e3f1d0 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/key_management_tool/wrapkey.sh @@ -0,0 +1,493 @@ +#!/bin/sh + +. ./utility.sh + +#******************************************************************************* +# Function Name: func_encrypt_key +# Description : Encrypt keys +# Arguments : ${1} - key in hex string for wrapping +# : ${2} - key in hex string for mac +# : ${3} - iv0 in hex string for wrapping +# : stdin - key in hex string to encrypt +# : stdout - encrypted key in binary +# Return Value : 0 or 1 +#******************************************************************************* +func_encrypt_key () +{ + local hex_tag_key="$(cat)" + + local hex_ekey="${1}"; local hex_mkey="${2}"; local hex_eiv0="${3}" + + local len_tag_key="$(expr ${#hex_tag_key} / 2)" + local len_zero_pad=$(( ((len_tag_key + 15) & (~15)) - len_tag_key )) + + hex_tag_key="${hex_tag_key}$(func_zeropad "${len_zero_pad}")" + + func_hex_to_bin "${hex_tag_key}" | openssl enc -aes-128-cbc -e -nosalt -nopad -K "${hex_ekey}" -iv "${hex_eiv0}" > "${TMP_FILE}" + if [ 0 != $? ] || [ ! -s "${TMP_FILE}" ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to encrypt Key" + return 1 + fi + + func_hex_to_bin "${hex_tag_key}" | openssl dgst -mac cmac -macopt cipher:aes-128-cbc -macopt hexkey:"${hex_mkey}" -binary >> "${TMP_FILE}" + if [ 0 != $? ] || [ ! -s "${TMP_FILE}" ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to generate MAC." + return 1 + fi + + cat "${TMP_FILE}" + + return 0 +} + +#******************************************************************************* +# Function Name: func_wrap_cmnkey +# Description : Wrap the common key. +# Arguments : ${1} - key length +# : stdout - encrypted common key in binary +# Return Value : 0 or 1 +#******************************************************************************* +func_wrap_cmnkey () +{ + local len_tag_key="${1}" + + hex_cmn_key="" + + if [ "true" != "${FLAG_HEX_COMMON}" ]; then + hex_cmn_key="$(func_load_cmnkey "${len_tag_key}" < "${TMP_FILE}")" + else + hex_cmn_key="$(cat "${TMP_FILE}")" + func_hex_to_bin "${hex_cmn_key}" > ${TMP_FILE} + hex_cmn_key="$(func_load_cmnkey "${len_tag_key}" < "${TMP_FILE}")" + fi + + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to load Common Key." + return 1 + fi + + echo "${hex_cmn_key}" | func_encrypt_key "${HEX_ENC_KEY}" "${HEX_MAC_KEY}" "${HEX_ENC_IV0}" + if [ 0 != $? ];then + errlog "[error] ${SCRIPT_NAME}: Failed to wrap Common Key." + return 1 + fi + + return 0 +} + +#******************************************************************************* +# Function Name: func_wrap_rsa_pub +# Description : Wrap the rsa public key. +# Arguments : ${1} - key length +# : stdout - encrypted rsa public key in binary +# Return Value : 0 or 1 +#******************************************************************************* +func_wrap_rsa_pub () +{ + local len_tag_key="${1}" + + local hex_pub_key="" + + hex_pub_key="$(func_load_rsa_pub "${len_tag_key}" < "${TMP_FILE}")" + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to load RSA Public Key." + return 1 + fi + + echo "${hex_pub_key}" | func_encrypt_key "${HEX_ENC_KEY}" "${HEX_MAC_KEY}" "${HEX_ENC_IV0}" + if [ 0 != $? ];then + errlog "[error] ${SCRIPT_NAME}: Failed to wrap RSA Public Key." + return 1 + fi + + return 0 +} + +#******************************************************************************* +# Function Name: func_wrap_rsa_pri +# Description : Wrap the rsa private key. +# Arguments : ${1} - key length +# : stdout - encrypted rsa private key in binary +# Return Value : 0 or 1 +#******************************************************************************* +func_wrap_rsa_pri () +{ + local len_tag_key="${1}"; + + local hex_pri_key="" + + hex_pri_key="$(func_load_rsa_pri "${len_tag_key}" < "${TMP_FILE}")" + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to load RSA Private Key." + return 1 + fi + + echo "${hex_pri_key}" | func_encrypt_key "${HEX_ENC_KEY}" "${HEX_MAC_KEY}" "${HEX_ENC_IV0}" + if [ 0 != $? ];then + errlog "[error] ${SCRIPT_NAME}: Failed to wrap RSA Private Key." + return 1 + fi + + return 0 +} + +#******************************************************************************* +# Function Name: func_wrap_ecc_pub +# Description : Wrap the ecc public key. +# Arguments : ${1} - key length +# : stdout - encrypted ecc public key in binary +# Return Value : 0 or 1 +#******************************************************************************* +func_wrap_ecc_pub () +{ + local len_tag_key="${1}"; local len_txt_prm=""; local len_key_prm=""; + local len_zero_pad=""; + + local hex_pub_key=""; local hex_key_qx=""; local hex_key_qy=""; + + hex_pub_key="$(func_load_ecc_pub "${len_tag_key}" < "${TMP_FILE}")" + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to load ECC Public Key." + return 1 + fi + + len_txt_prm="$(expr ${#hex_pub_key} / 2)" + len_key_prm="$(expr ${len_tag_key} / 2)" + len_zero_pad=$(( ((len_key_prm + 15) & (~15)) - len_key_prm )) + + errlog "${hex_pub_key}" + + hex_key_qx="$(echo "${hex_pub_key}" | cut -c -${len_txt_prm})" + hex_key_qy="$(echo "${hex_pub_key}" | rev | cut -c -${len_txt_prm} | rev)" + + hex_key_qx="$(func_zeropad "${len_zero_pad}")${hex_key_qx}" + hex_key_qy="$(func_zeropad "${len_zero_pad}")${hex_key_qy}" + + hex_pub_key="${hex_key_qx}${hex_key_qy}" + + errlog "${hex_pub_key}" + echo "${hex_pub_key}" | func_encrypt_key "${HEX_ENC_KEY}" "${HEX_MAC_KEY}" "${HEX_ENC_IV0}" + if [ 0 != $? ];then + errlog "[error] ${SCRIPT_NAME}: Failed to wrap ECC Public Key." + return 1 + fi + + return 0 +} + +#******************************************************************************* +# Function Name: func_wrap_ecc_pri +# Description : Wrap the ecc private key. +# Arguments : ${1} - key length +# : stdout - encrypted ecc private key in binary +# Return Value : 0 or 1 +#******************************************************************************* +func_wrap_ecc_pri () +{ + local len_tag_key="${1}"; local len_key_prm=""; local len_zero_pad=""; + + local hex_pri_key="" + + hex_pri_key="$(func_load_ecc_pri "${len_tag_key}" < "${TMP_FILE}")" + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to load ECC Private Key." + return 1 + fi + + len_key_prm="$(expr ${#hex_pri_key} / 2)" + len_zero_pad=$(( ((len_key_prm + 15) & (~15)) - len_key_prm )) + + hex_pri_key="$(func_zeropad "${len_zero_pad}")${hex_pri_key}" + + echo "${hex_pri_key}" | func_encrypt_key "${HEX_ENC_KEY}" "${HEX_MAC_KEY}" "${HEX_ENC_IV0}" + if [ 0 != $? ];then + errlog "[error] ${SCRIPT_NAME}: Failed to wrap ECC Private Key." + return 1 + fi + + return 0 +} + +#******************************************************************************* +# Function Name: func_exists_keys +# Description : Check if the user factory programming key and iv0 exists. +# : If the key does not exist, create it. +# Arguments : none +# Return Value : 0 or 1 +#******************************************************************************* +func_exists_keys () +{ + if [ ! -s "${FILEPATH_KEY_ENCRYPTION_KEY}" ]; then + + mkdir -p "$(dirname "${FILEPATH_KEY_ENCRYPTION_KEY}")" + + ./genkey.sh -t "${AES_128_KEY_TYPE}" > "${FILEPATH_KEY_ENCRYPTION_KEY}" + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to generate ${FILEPATH_KEY_ENCRYPTION_KEY}" + return 1 + fi + + ./genkey.sh -t "${AES_128_KEY_TYPE}" >> "${FILEPATH_KEY_ENCRYPTION_KEY}" + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to generate ${FILEPATH_KEY_ENCRYPTION_KEY}" + return 1 + fi + fi + + if [ ! -s "${FILEPATH_KEY_ENCRYPTION_IV0}" ]; then + + mkdir -p "$(dirname "${FILEPATH_KEY_ENCRYPTION_IV0}")" + + ./genkey.sh -t "${AES_128_KEY_TYPE}" > "${FILEPATH_KEY_ENCRYPTION_IV0}" + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to generate ${FILEPATH_KEY_ENCRYPTION_IV0}" + return 1 + fi + fi + + return 0 +} + +#******************************************************************************* +# Function Name: func_load_enc_key +# Description : +# Arguments : none +# Return Value : 0 or 1 +#******************************************************************************* +func_load_enc_key () +{ + local hex_key_enc_key=""; local txt_key_enc_key=""; + + if [ "true" != "${FLAG_KEY_UPDATE}" ]; then + + func_exists_keys + if [ 0 != $? ]; then + return 1 + fi + + hex_key_enc_key="$(func_load_cmnkey "${USER_FACTORY_PROG_KEY_SIZE}" < "${FILEPATH_KEY_ENCRYPTION_KEY}")" + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to load User Factory Programming Key." + return 1 + fi + + HEX_ENC_KEY="$(echo "${hex_key_enc_key}" | cut -c 1-32)" + HEX_MAC_KEY="$(echo "${hex_key_enc_key}" | cut -c 33-64)" + + HEX_ENC_IV0="$(func_load_cmnkey "${USER_FACTORY_PROG_IV0_SIZE}" < "${FILEPATH_KEY_ENCRYPTION_IV0}")" + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to load the initialization vector file." + return 1 + fi + else + + if [ ! -s "${FILEPATH_KEY_ENCRYPTION_KEY}" ] || [ ! -s "${FILEPATH_KEY_ENCRYPTION_IV0}" ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to load ${FILEPATH_KEY_ENCRYPTION_KEY} or ${FILEPATH_KEY_ENCRYPTION_IV0}." + return 1 + fi + + txt_key_enc_key="$(cat "${FILEPATH_KEY_ENCRYPTION_KEY}")" + hex_key_enc_key="$(func_hex_to_bin "${txt_key_enc_key}" | func_load_cmnkey "${KEY_UPDATE_KEY_SIZE}")" + + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to load Key Update Key file." + return 1 + fi + + HEX_ENC_KEY="$(echo "${hex_key_enc_key}" | cut -c 1-32)" + HEX_MAC_KEY="$(echo "${hex_key_enc_key}" | cut -c 33-64)" + + txt_key_enc_key="$(cat "${FILEPATH_KEY_ENCRYPTION_IV0}")" + HEX_ENC_IV0="$(func_hex_to_bin "${txt_key_enc_key}" | func_load_cmnkey "${KEY_UPDATE_IV0_SIZE}")" + + if [ 0 != $? ]; then + errlog "[error] ${SCRIPT_NAME}: Failed to load the Key Update IV file." + return 1 + fi + fi + + return 0 +} + +#******************************************************************************* +# Function Name: func_usage_exit +# Description : Show usage and exit this script. +# Arguments : none +# Return Value : none (exit) +#******************************************************************************* +func_usage_exit() +{ + errlog + errlog "This script is for wrapping RZ/G2 security keys." + errlog "Version ${TOOL_VERSION}" + errlog + errlog "Usage:" + errlog " ${SCRIPT_NAME} -t [-p | -u ]" + errlog + errlog "Read the key from standard input or pipe and write the wrapped key to" + errlog "standard output." + errlog + errlog " -t " + errlog " Type of user key to be wrapped." + errlog " The supported user key types are:" + errlog " ${AES_128_KEY_TYPE}" + errlog " ${AES_256_KEY_TYPE}" + errlog " ${HMAC_SHA1_KEY_TYPE}" + errlog " ${HMAC_SHA256_KEY_TYPE}" + errlog " ${RSA_1024_KEY_TYPE_PRI}" + errlog " ${RSA_1024_KEY_TYPE_PUB}" + errlog " ${RSA_2048_KEY_TYPE_PRI}" + errlog " ${RSA_2048_KEY_TYPE_PUB}" + errlog " ${RSA_4096_KEY_TYPE_PRI}" + errlog " ${RSA_4096_KEY_TYPE_PUB}" + errlog " ${ECC_P256_KEY_TYPE_PRI}" + errlog " ${ECC_P256_KEY_TYPE_PUB}" + errlog + errlog " -p " + errlog " Path to the directory that contains the temporary encryption key for" + errlog " the provisioning." + errlog " If the key does not exist, it will be generated by this script." + errlog " The key for provisioning is ${FILE_USER_FACTORY_PROG_KEY}." + errlog + errlog " -u " + errlog " Path to the directory that contains the key update key." + errlog " The key update key is ${FILE_KEY_UPDATE_KEY}." + errlog + + exit 1 +} + +#******************************************************************************* +# Function Name: func_main +# Description : . +# Arguments : . +# Return Value : . +#******************************************************************************* +func_main () +{ + func_load_enc_key + if [ 0 != $? ]; then + exit $? + fi + + case "${TYPE_TARGET_KEY}" in + + "${AES_128_KEY_TYPE}") + func_wrap_cmnkey "${AES_128_KEY_SIZE}" + ;; + "${AES_256_KEY_TYPE}") + func_wrap_cmnkey "${AES_256_KEY_SIZE}" + ;; + "${HMAC_SHA1_KEY_TYPE}") + func_wrap_cmnkey "${HMAC_SHA1_KEY_SIZE}" + ;; + "${HMAC_SHA256_KEY_TYPE}") + func_wrap_cmnkey "${HMAC_SHA256_KEY_SIZE}" + ;; + "${RSA_1024_KEY_TYPE_PRI}") + func_wrap_rsa_pri "${RSA_1024_KEY_SIZE}" + ;; + "${RSA_1024_KEY_TYPE_PUB}") + func_wrap_rsa_pub "${RSA_1024_KEY_SIZE}" + ;; + "${RSA_2048_KEY_TYPE_PRI}") + func_wrap_rsa_pri "${RSA_2048_KEY_SIZE}" + ;; + "${RSA_2048_KEY_TYPE_PUB}") + func_wrap_rsa_pub "${RSA_2048_KEY_SIZE}" + ;; + "${RSA_4096_KEY_TYPE_PRI}") + func_wrap_rsa_pri "${RSA_4096_KEY_SIZE}" + ;; + "${RSA_4096_KEY_TYPE_PUB}") + func_wrap_rsa_pub "${RSA_4096_KEY_SIZE}" + ;; + "${ECC_P192_KEY_TYPE_PRI}") + func_wrap_ecc_pri "${ECC_P192_KEY_SIZE_PRI}" + ;; + "${ECC_P192_KEY_TYPE_PUB}") + func_wrap_ecc_pub "${ECC_P192_KEY_SIZE_PUB}" + ;; + "${ECC_P224_KEY_TYPE_PRI}") + func_wrap_ecc_pri "${ECC_P224_KEY_SIZE_PRI}" + ;; + "${ECC_P224_KEY_TYPE_PUB}") + func_wrap_ecc_pub "${ECC_P224_KEY_SIZE_PUB}" + ;; + "${ECC_P256_KEY_TYPE_PRI}") + func_wrap_ecc_pri "${ECC_P256_KEY_SIZE_PRI}" + ;; + "${ECC_P256_KEY_TYPE_PUB}") + func_wrap_ecc_pub "${ECC_P256_KEY_SIZE_PUB}" + ;; + "${ECC_BSI_P512_KEY_TYPE_PRI}") + func_wrap_ecc_pri "${ECC_BSI_P512_KEY_SIZE_PRI}" + ;; + "${ECC_BSI_P512_KEY_TYPE_PUB}") + func_wrap_ecc_pub "${ECC_BSI_P512_KEY_SIZE_PUB}" + ;; + "${KEY_UPDATE_KEY_TYPE}") + func_wrap_cmnkey "${KEY_UPDATE_KEY_SIZE}" + ;; + *) errlog "[error] ${SCRIPT_NAME}: Unsupported key type \"${TYPE_TARGET_KEY}\"." + func_usage_exit + ;; + esac + + exit $? +} + +#******************************************************************************* +# Startup +#******************************************************************************* +cd "$(dirname ${0})" + +. ./config.sh + +SCRIPT_NAME="$(basename ${0})" + +if [ -f /dev/stdin ] || [ -p /dev/stdin ]; then + cat "/dev/stdin" > "${TMP_FILE}" +fi + +while getopts :t:p:u:x OPT +do + case "${OPT}" in + t) typ_tag_key="${OPTARG}" + ;; + p) flg_key_upd="false" + dirpath_prv="${OPTARG}" + ;; + u) flg_key_upd="true" + dirpath_prv="${OPTARG}" + ;; + x) flg_hex_cmn="true" + ;; + :|\?) func_usage_exit + ;; + esac +done + +if [ ! -s "${TMP_FILE}" ] || [ -z "${typ_tag_key}" ] || [ -z "${dirpath_prv}" ]; then + func_usage_exit +fi + +TYPE_TARGET_KEY="$(echo "${typ_tag_key}" | tr '[:upper:]' '[:lower:]')" + +FLAG_HEX_COMMON="${flg_hex_cmn}" +FLAG_KEY_UPDATE="${flg_key_upd}" + +if [ "true" != "${FLAG_KEY_UPDATE}" ]; then + FILEPATH_KEY_ENCRYPTION_KEY="${dirpath_prv%/}/${FILE_USER_FACTORY_PROG_KEY}.bin" + FILEPATH_KEY_ENCRYPTION_IV0="${dirpath_prv%/}/${FILE_USER_FACTORY_PROG_IV0}.bin" +else + FILEPATH_KEY_ENCRYPTION_KEY="${dirpath_prv%/}/${FILE_KEY_UPDATE_KEY}.txt" + FILEPATH_KEY_ENCRYPTION_IV0="${dirpath_prv%/}/${FILE_KEY_UPDATE_IV0}.txt" +fi + +HEX_ENC_KEY= +HEX_MAC_KEY= +HEX_ENC_IV0= + +# Call func_main +func_main diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl2_encsign_info.xml b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl2_encsign_info.xml new file mode 100644 index 0000000000000000000000000000000000000000..4fe1d0d4d58f06f260b335af02c1caa48d14f088 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl2_encsign_info.xml @@ -0,0 +1,33 @@ + + + + + + +
+ 0x00010000 + 0x00000000 +
+ + + + + EncThenSign + + CertificateAndImage + + +
+ 0x00010000 + 0x00000001 + 0x00013000 + 0x00013000 + 0x00000001 + + 0x00000000 +
+ + 000200000003000000013000 + + + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl2_sign_info.xml b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl2_sign_info.xml new file mode 100644 index 0000000000000000000000000000000000000000..9b77c2e1bdffae6a8de88670f77432eaf60711d3 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl2_sign_info.xml @@ -0,0 +1,32 @@ + + + + + + +
+ 0x00010000 + 0x00000000 +
+ + + + + + CertificateAndImage + + +
+ 0x00010000 + 0x00000000 + 0x00013000 + 0x00013000 + 0x00000001 + + 0x00000000 +
+ + + + + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl31_encsign_info.xml b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl31_encsign_info.xml new file mode 100644 index 0000000000000000000000000000000000000000..cac9ef4b722c79bac9e022c9ed64e369ceef93c2 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl31_encsign_info.xml @@ -0,0 +1,34 @@ + + + + + + +
+ 0x00010000 + 0x00000000 +
+ + + + + EncThenSign + + CertificateAndImage + + +
+ 0x00010000 + 0x00000001 + 0x44000000 + 0x44000000 + 0x00000001 + + 0x00000000 +
+ + 000200000003000044000000 + + + + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl31_sign_info.xml b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl31_sign_info.xml new file mode 100644 index 0000000000000000000000000000000000000000..9ebb56e2d943a724c14751861cfd8de4e14de620 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl31_sign_info.xml @@ -0,0 +1,32 @@ + + + + + + +
+ 0x00010000 + 0x00000000 +
+ + + + + + CertificateAndImage + + +
+ 0x00010000 + 0x00000000 + 0x44000000 + 0x44000000 + 0x00000001 + + 0x00000000 +
+ + + + + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl32_encsign_info.xml b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl32_encsign_info.xml new file mode 100644 index 0000000000000000000000000000000000000000..f04d37594b8c52e4805303df2371b0f8e90e5cec --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl32_encsign_info.xml @@ -0,0 +1,34 @@ + + + + + + +
+ 0x00010000 + 0x00000000 +
+ + + + + EncThenSign + + CertificateAndImage + + +
+ 0x00010000 + 0x00000001 + 0x44100000 + 0x44100000 + 0x00000001 + + 0x00000000 +
+ + 000200000003000044100000 + + + + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl32_sign_info.xml b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl32_sign_info.xml new file mode 100644 index 0000000000000000000000000000000000000000..b2d2bcb6e9d24381a2c94446032566c2cce96cc8 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl32_sign_info.xml @@ -0,0 +1,32 @@ + + + + + + +
+ 0x00010000 + 0x00000000 +
+ + + + + + CertificateAndImage + + +
+ 0x00010000 + 0x00000000 + 0x44100000 + 0x44100000 + 0x00000001 + + 0x00000000 +
+ + + + + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl33_encsign_info.xml b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl33_encsign_info.xml new file mode 100644 index 0000000000000000000000000000000000000000..302eb035bbcab0a9ea03b4ab7dcce4dd19cd6480 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl33_encsign_info.xml @@ -0,0 +1,34 @@ + + + + + + +
+ 0x00010000 + 0x00000000 +
+ + + + + EncThenSign + + CertificateAndImage + + +
+ 0x00010000 + 0x00000001 + 0x50000000 + 0x50000000 + 0x00000001 + + 0x00000000 +
+ + 000200000003000050000000 + + + + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl33_sign_info.xml b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl33_sign_info.xml new file mode 100644 index 0000000000000000000000000000000000000000..eee9c3b473c2c463ef5ce903fa56f69995a82979 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/info/bl33_sign_info.xml @@ -0,0 +1,32 @@ + + + + + + +
+ 0x00010000 + 0x00000000 +
+ + + + + + CertificateAndImage + + +
+ 0x00010000 + 0x00000000 + 0x50000000 + 0x50000000 + 0x00000001 + + 0x00000000 +
+ + + + + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/manifest_generation_tool.py b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/manifest_generation_tool.py new file mode 100644 index 0000000000000000000000000000000000000000..7cc5ed79cb76cd4deeebc6e6eb6decc101f2a15a --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/manifest_generation_tool.py @@ -0,0 +1,1091 @@ +# ********************************************************************************************************************* +# DISCLAIMER +# This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No +# other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +# applicable laws, including copyright laws. +# THIS SOFTWARE IS PROVIDED 'AS IS' AND RENESAS MAKES NO WARRANTIES REGARDING +# THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM +# EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES +# SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS +# SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +# Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of +# this software. By using this software, you agree to the additional terms and conditions found by accessing the +# following link: +# www.renesas.com/disclaimer +# +# Copyright (C) 2019-2020 Renesas Electronics Corporation. All rights reserved. +# ********************************************************************************************************************* +import os +import re +import binascii +import argparse +import xml.etree.ElementTree as ET +import tool_crypto as tc + +# ====================================================================================================================== +# Private constant valiables +# ====================================================================================================================== +# Error message print +ERRMSG = print + +# Size +WORD_BYTES = 4 +BASE_HEX = 16 +IMAGE_UNIT_SIZE = 16 +IV_LEN = 16 +TLV_TYPE_LEN_SIZE = 4 +TLV_TYPE_MASK = 0xFFFFFF00 +TLV_LEN_MASK = 0x000000FF +TLV_VAL_LEN_MIN = 0 +TLV_VAL_LEN_MAX = 1020 + +# Endian string +ENDIAN_BIG = 'big' +ENDIAN_LITTLE = 'little' + +# Custom tlvs order string +ORDER_TOP = 'top' +ORDER_BOTTOM = 'bottom' + +# Signing target string +SIGNTARGET_CERTANDIMG = 'CertificateAndImage' +SIGNTARGET_CERTONLY = 'CertificateOnly' + +# Dictionary keys +KEY_ENCMANNER = 'encryption_manner' +KEY_SIGNTARGET = 'signing_target' +KEY_WDATA = 'word_data' +KEY_CTLV_ORDER = 'custom_tlvs_order' +KEY_MANIVER = 'manifest_ver' +KEY_FLAGS = 'flags' +KEY_LADDR = 'load_addr' +KEY_DADDR = 'dest_addr' +KEY_IMGVER = 'image_version' +KEY_BUILDNUM = 'build_number' +KEY_HASHS = 'hash' +KEY_PCS = 'product_class' +KEY_ICIS = 'image_cipher_info' +KEY_CUSTOMTLVS = 'custom_tlv' +KEY_TYPE = 'type' +KEY_ALGO = 'algorithm' +KEY_MODE = 'mode' +KEY_VAL = 'value' +KEY_TARGET = 'target' +KEY_UT = 'use_type' +KEY_HASH_ISPK = 'ImageSignerPK' +KEY_HASH_IMG = 'Image' +KEY_HASH_EIMG = 'EncryptedImage' +KEY_PID = 'ProductID' +KEY_VID = 'VendorID' +KEY_ICI_IMG_CIP = 'ImageCipher' +KEY_ICI_TMP_IMG_DEC = 'TemporaryImageDecryption' + +# Error Message +ERRMSG_OPENFAIL = 'manifest_generation_tool.py : error: File open failed : %s' +ERRMSG_PARSEFAIL = 'manifest_generation_tool.py : error: Manifest info parsing failed : %s' +ERRMSG_IMPORTFAIL = 'manifest_generation_tool.py : error: Key import failed : %s' +ERRMSG_ENCIMGOPTFAIL = 'manifest_generation_tool.py : error: The encimage option is specified, but the iekey, ealgo '\ + 'option is not specified' +ERRMSG_ENCIMGINFOFAIL = 'manifest_generation_tool.py : error: Inconsistency occurs in the contents of encimage option '\ + 'and Manifest Info : %s' +ERRMSG_SIGNFAIL = 'manifest_generation_tool.py : error: Signature creation failed' +ERRMSG_ENCFAIL = 'manifest_generation_tool.py : error: Image encryption failed' +ERRMSG_TLVFAIL = 'manifest_generation_tool.py : error: TLV creation failed : %s' +ERRMSG_HASHFAIL = 'manifest_generation_tool.py : error: hash failed : %s' + +# Type Class +TLV_TYPE_CLS_POS = (28) # Type Class Bit Position +TLV_TYPE_CLS_KEY = (0x0 << (TLV_TYPE_CLS_POS)) # Class Key +TLV_TYPE_CLS_HASH = (0x1 << (TLV_TYPE_CLS_POS)) # Class Hash +TLV_TYPE_CLS_SIGN = (0x2 << (TLV_TYPE_CLS_POS)) # Class Signature +TLV_TYPE_CLS_CRC = (0x4 << (TLV_TYPE_CLS_POS)) # Class CRC +TLV_TYPE_CLS_IV = (0x5 << (TLV_TYPE_CLS_POS)) # Class IV +TLV_TYPE_CLS_PC = (0xD << (TLV_TYPE_CLS_POS)) # Class Product class +TLV_TYPE_CLS_ICI = (0xE << (TLV_TYPE_CLS_POS)) # Class Image Cipher info + +# Use type of KEY class +TLV_TYPE_CLS_KEY_UT_POS = (24) # Use Type Bit Position +TLV_TYPE_CLS_KEY_UT_OEM_ROOT_PK = (0x0 << (TLV_TYPE_CLS_KEY_UT_POS)) # OEM root public key +TLV_TYPE_CLS_KEY_UT_IMG_PK = (0x1 << (TLV_TYPE_CLS_KEY_UT_POS)) # Image public key + +# Use type of HASH class +TLV_TYPE_CLS_HASH_UT_POS = (24) # Use Type Bit Position +TLV_TYPE_CLS_HASH_UT_IMG_PK = (0x0 << (TLV_TYPE_CLS_HASH_UT_POS)) # Image public key Hash +TLV_TYPE_CLS_HASH_UT_IMG = (0x1 << (TLV_TYPE_CLS_HASH_UT_POS)) # Image Hash +TLV_TYPE_CLS_HASH_UT_ENCIMG = (0x2 << (TLV_TYPE_CLS_HASH_UT_POS)) # Encrypt Image Hash + +# Use type of Signature class +TLV_TYPE_CLS_SIGN_UT_POS = (24) # Use Type Bit Position +TLV_TYPE_CLS_SIGN_UT_CERT = (0x0 << (TLV_TYPE_CLS_SIGN_UT_POS)) # Certificate Signature +TLV_TYPE_CLS_SIGN_UT_CODE_CERT_AND_IMG = (0x5 << (TLV_TYPE_CLS_SIGN_UT_POS)) # Code Certificate + Image Signature +TLV_TYPE_CLS_SIGN_UT_CODE_CERT_AND_ENCIMG = (0x6 << (TLV_TYPE_CLS_SIGN_UT_POS)) # Code Certificate + + # Encrypted Image Signature + +# Hash Algorithm of Signature class +TLV_TYPE_CLS_SIGN_HASH_ALGO_POS = (10) # Hash Algorithm Bit Position +TLV_TYPE_CLS_SIGN_HASH_ALGO_SHA2_256 = (0x1 << (TLV_TYPE_CLS_SIGN_HASH_ALGO_POS)) # SHA2-256 +TLV_TYPE_CLS_SIGN_HASH_ALGO_SHA2_384 = (0x2 << (TLV_TYPE_CLS_SIGN_HASH_ALGO_POS)) # SHA2-384 +TLV_TYPE_CLS_SIGN_HASH_ALGO_SHA3_256 = (0x5 << (TLV_TYPE_CLS_SIGN_HASH_ALGO_POS)) # SHA3-256 +TLV_TYPE_CLS_SIGN_HASH_ALGO_SHA3_384 = (0x6 << (TLV_TYPE_CLS_SIGN_HASH_ALGO_POS)) # SHA3-384 + +# Scheme of Signature class +TLV_TYPE_CLS_SIGN_SCHEME_POS = (8) # Scheme Bit Position +TLV_TYPE_CLS_SIGN_SCHEME_RSASSA_PSS = (0x1 << (TLV_TYPE_CLS_SIGN_SCHEME_POS)) # RSASSA-PSS + +# Use type of CRC class +TLV_TYPE_CLS_CRC_UT_POS = (24) # Use Type Bit Position +TLV_TYPE_CLS_CRC_UT_IMG = (0x0 << (TLV_TYPE_CLS_CRC_UT_POS)) # Image CRC + +# Polynomial of CRC class +TLV_TYPE_CLS_CRC_POLY_POS = (20) # Polynomial Bit Position +TLV_TYPE_CLS_CRC_POLY_CRC32 = (0x0 << (TLV_TYPE_CLS_CRC_POLY_POS)) # Polynomial CRC32 + +# Use type of Product Class(PC) class +TLV_TYPE_CLS_PC_UT_POS = (24) # Use Type Bit Position +TLV_TYPE_CLS_PC_UT_VENDER_ID = (0x0 << (TLV_TYPE_CLS_PC_UT_POS)) # Vender ID +TLV_TYPE_CLS_PC_UT_PRODUCT_ID = (0x1 << (TLV_TYPE_CLS_PC_UT_POS)) # Product ID + +# Use type of IV class +TLV_TYPE_CLS_IV_UT_POS = (24) # Use Type Bit Position +TLV_TYPE_CLS_IV_UT_IMG_CIPHER = (0x0 << (TLV_TYPE_CLS_IV_UT_POS)) # Image Cipher IV +TLV_TYPE_CLS_IV_UT_TMP_IMG_DEC = (0x1 << (TLV_TYPE_CLS_IV_UT_POS)) # Temporary Image Decryption IV + +# Use type of Image Cipher Info(ICI) class +TLV_TYPE_CLS_ICI_UT_POS = (24) # Use Type Bit Position +TLV_TYPE_CLS_ICI_UT_IMG_ENC_DEC = (0x0 << (TLV_TYPE_CLS_ICI_UT_POS)) +TLV_TYPE_CLS_ICI_UT_TMP_IMG_DEC = (0x1 << (TLV_TYPE_CLS_ICI_UT_POS)) + + +# Cipher mode of Image Cipher Info(ICI) class +TLV_TYPE_CLS_ICI_MODE_POS = (10) # Cipher mode Bit Position +TLV_TYPE_CLS_ICI_MODE_CBC = (0x1 << (TLV_TYPE_CLS_ICI_MODE_POS)) # Mode CBC + +# Cryptographic algorithm +TLV_TYPE_CRYPTO_ALGO_POS = (14) # Cryptographic Algorithm Bit Position +TLV_TYPE_CRYPTO_ALGO_AES128 = (0x0000 << (TLV_TYPE_CRYPTO_ALGO_POS)) # AES-128 +TLV_TYPE_CRYPTO_ALGO_RSA2048 = (0x0011 << (TLV_TYPE_CRYPTO_ALGO_POS)) # RSA 2048 +TLV_TYPE_CRYPTO_ALGO_ECC_P256 = (0x0022 << (TLV_TYPE_CRYPTO_ALGO_POS)) # ECC NIST P-256 +TLV_TYPE_CRYPTO_ALGO_ECC_P384 = (0x0023 << (TLV_TYPE_CRYPTO_ALGO_POS)) # ECC NIST P-384 +TLV_TYPE_CRYPTO_ALGO_SHA2_256 = (0x0051 << (TLV_TYPE_CRYPTO_ALGO_POS)) # SHA2-256 +TLV_TYPE_CRYPTO_ALGO_SHA2_384 = (0x0052 << (TLV_TYPE_CRYPTO_ALGO_POS)) # SHA2-384 +TLV_TYPE_CRYPTO_ALGO_SHA3_256 = (0x0055 << (TLV_TYPE_CRYPTO_ALGO_POS)) # SHA3-256 +TLV_TYPE_CRYPTO_ALGO_SHA3_384 = (0x0056 << (TLV_TYPE_CRYPTO_ALGO_POS)) # SHA3-384 + +# ====================================================================================================================== +# Private global valiables +# ====================================================================================================================== +# Algorithm type list +algo_types = { + 'AES-128': TLV_TYPE_CRYPTO_ALGO_AES128, + 'RSA-PSS': TLV_TYPE_CRYPTO_ALGO_RSA2048, + 'ECDSA-P256': TLV_TYPE_CRYPTO_ALGO_ECC_P256, + 'ECDSA-P384': TLV_TYPE_CRYPTO_ALGO_ECC_P384, + 'SHA2-256': TLV_TYPE_CRYPTO_ALGO_SHA2_256, + 'SHA2-384': TLV_TYPE_CRYPTO_ALGO_SHA2_384, + 'SHA3-256': TLV_TYPE_CRYPTO_ALGO_SHA3_256, + 'SHA3-384': TLV_TYPE_CRYPTO_ALGO_SHA3_384, +} + +# Signature lengt list for each signature algorithm +salgo_sign_lens = { + 'RSA-PSS': 256, # RSA2048 256 [bytes] + 'ECDSA-P256': 64, # ECDSA P-256 32(r) + 32(s) [bytes] + 'ECDSA-P384': 96, # ECDSA P-384 48(r) + 48(s) [bytes] +} + +# Hash type list for each hash algorithm +halgo_sign_hsah_types = { + 'SHA2-256': TLV_TYPE_CLS_SIGN_HASH_ALGO_SHA2_256, + 'SHA2-384': TLV_TYPE_CLS_SIGN_HASH_ALGO_SHA2_384, + 'SHA3-256': TLV_TYPE_CLS_SIGN_HASH_ALGO_SHA3_256, + 'SHA3-384': TLV_TYPE_CLS_SIGN_HASH_ALGO_SHA3_384, +} + +# Scheme type list for each hash signature algorithm +salgo_sign_scheme_types = { + 'RSA-PSS': TLV_TYPE_CLS_SIGN_SCHEME_RSASSA_PSS, + 'ECDSA-P256': 0, # Don't not use scheme + 'ECDSA-P384': 0, # Don't not use scheme +} + +# Key lengt list for each encryption algorithm +ealgo_key_lens = { + 'AES-CBC': 16, +} + + +# ====================================================================================================================== +# Functions +# ====================================================================================================================== +# ********************************************************************************************************************** +# Function Name : main +# ********************************************************************************************************************** +def main(): + # Command line argument perse + parser = set_cmdline_argparser() + args = parser.parse_args() + + # Generate Certificate + # (args.gentype is always set to 'genkcert' or 'genccert') + if args.gentype == 'genkcert': + # Read Manifest information file + info_xml = read_text_file(args.info) + if info_xml is None: + exit(1) + + # Read Image signer key file + iskey_pem = read_text_file(args.iskey) + if iskey_pem is None: + exit(1) + + # Read Manifest signer key file + mskey_pem = read_text_file(args.mskey) + if mskey_pem is None: + exit(1) + + # Delete files at output path + if os.path.exists(args.certout) is True: + os.remove(args.certout) + + # Generate Key Certificate + keycert, mskey_hash = gen_key_cert(args.halgo, args.salgo, info_xml, mskey_pem, iskey_pem) + if keycert is None: + exit(1) + + # Write Key certificate to file + if write_bin_file(keycert, args.certout) == -1: + exit(1) + + # Write Hash of Manifest Signer PK + mskey_hash_name = os.path.splitext(os.path.basename(args.mskey))[0] + '_pk.hash' + mskey_hash_name = os.path.join(os.path.split(args.certout)[0], mskey_hash_name) + if write_bin_file(mskey_hash, mskey_hash_name) == -1: + exit(1) + + else: # args.gentype == 'genccert' + # Read Manifest information file + info_xml = read_text_file(args.info) + if info_xml is None: + exit(1) + + # Read Image signer key file + iskey_pem = read_text_file(args.iskey) + if iskey_pem is None: + exit(1) + + # Read Image + img = read_bin_file(args.imgin) + if img is None: + exit(1) + + # Delete files at output path + if os.path.exists(args.certout) is True: + os.remove(args.certout) + + if os.path.exists(args.imgout) is True: + os.remove(args.imgout) + + # Read iekey(Execute only if encimage is true) + if args.encimage is True: + if args.iekey != '': + # Read encrypt key file + iekey_text = read_text_file(args.iekey) + if iekey_text is None: + exit(1) + + # string to bytes + try: + iekey = bytes.fromhex(iekey_text) + except: + ERRMSG(str.format(ERRMSG_IMPORTFAIL % ('ImageEncryptionKey'))) + exit(1) + + # Swap endian + if args.iekey_endian == 'Little': + tmp = int.from_bytes(iekey, ENDIAN_BIG) + iekey = tmp.to_bytes(len(iekey), ENDIAN_LITTLE) + else: + iekey = None + + if args.ieiv != '': + # Read initial vector file + ieiv_text = read_text_file(args.ieiv) + if ieiv_text is None: + exit(1) + + # string to bytes + try: + ieiv = bytes.fromhex(ieiv_text) + except: + ERRMSG(str.format(ERRMSG_IMPORTFAIL % ('ImageEncryptionIV'))) + exit(1) + + # Swap endian + if args.iekey_endian == 'Little': + tmp = int.from_bytes(ieiv, ENDIAN_BIG) + ieiv = tmp.to_bytes(len(ieiv), ENDIAN_LITTLE) + else: + ieiv = None + else: + iekey = None + ieiv = None + + # Generate Key Certificate + codecert, outimg = gen_code_cert(args.halgo, args.salgo, info_xml, img, iskey_pem, + args.makecrc, args.encimage, args.ealgo, iekey, ieiv) + if codecert is None: + exit(1) + + # Write image + if write_bin_file(outimg, args.imgout) == -1: + exit(1) + + # Write Code certificate to file + if write_bin_file(codecert, args.certout) == -1: + exit(1) + + # Success + exit(0) + + +# ********************************************************************************************************************** +# Function Name : set_cmdline_argparser +# ********************************************************************************************************************** +def set_cmdline_argparser(): + # Local constant value + HALGOS = ['SHA2-256', 'SHA2-384', 'SHA3-256', 'SHA3-384'] + SALGOS = ['RSA-PSS', 'ECDSA-P256', 'ECDSA-P384'] + EALGOS = ['AES-CBC'] + IEKEY_ENDIANS = ['Big', 'Little'] + + DESC_TOOL = 'Generate manifest tool for Renesas-SB-Library' + DESC_GENKCERT = 'Generate Key Certificate' + DESC_GENCCERT = 'Generate Code Certificate' + + METAVER_INFO = '' + METAVER_CERTOUT = '' + METAVER_ISKEY = '' + METAVER_MSKEY = '' + METAVER_IEKEY = '' + METAVER_IEIV = '' + METAVER_IMGIN = '' + METAVER_IMGOUT = '' + + HELP_GENTYPE = 'Specify the manifest type to generate' + HELP_INFO = 'Specify the path of the Manifest Info file' + HELP_CERTOUT = 'Specify the path of the Certificate file to be output' + HELP_ISKEY = 'Specify the path of the Image Signer Key file' + HELP_MSKEY = 'Specify the path of the Manifest Signer Key file' + HELP_IEKEY = 'Specify the path of the Image Encrypted Key file' + HELP_IEIV = 'Specify the path of the Image Encrypted IV file' + HELP_IEKEYEND = 'Specify the endian of the input Image Encryption Key' + HELP_HALGO = 'Specify hash algorithm' + HELP_SALGO = 'Specify signature algorithm' + HELP_EALGO = 'Specify encryption algorithm' + HELP_IMGIN = 'Specify the path of the input Image file or Encrypted Image file' + HELP_IMGOUT = 'Specify the path of the output Image file' + HELP_ENCIMG = 'Specify when encrypting Image' + HELP_MAKECRC = 'Specify to include the CRC value of Image' + + # Set command line parser + parser = argparse.ArgumentParser(description=DESC_TOOL) + subparsers = parser.add_subparsers(dest='gentype', required=True, help=HELP_GENTYPE) + + parser_genkcert = subparsers.add_parser('genkcert', description=DESC_GENKCERT) + parser_genccert = subparsers.add_parser('genccert', description=DESC_GENCCERT) + + # Set arguments for Key Certificate + parser_genkcert.add_argument('-info', metavar=METAVER_INFO, required=True, help=HELP_INFO) + parser_genkcert.add_argument('-certout', metavar=METAVER_CERTOUT, required=True, help=HELP_CERTOUT) + parser_genkcert.add_argument('-iskey', metavar=METAVER_ISKEY, required=True, help=HELP_ISKEY) + parser_genkcert.add_argument('-mskey', metavar=METAVER_MSKEY, required=True, help=HELP_MSKEY) + parser_genkcert.add_argument('-halgo', choices=HALGOS, required=True, help=HELP_HALGO) + parser_genkcert.add_argument('-salgo', choices=SALGOS, required=True, help=HELP_SALGO) + + # Set arguments for Code Certificate + parser_genccert.add_argument('-info', metavar=METAVER_INFO, required=True, help=HELP_INFO) + parser_genccert.add_argument('-certout', metavar=METAVER_CERTOUT, required=True, help=HELP_CERTOUT) + parser_genccert.add_argument('-imgin', metavar=METAVER_IMGIN, required=True, help=HELP_IMGIN) + parser_genccert.add_argument('-imgout', metavar=METAVER_IMGOUT, required=True, help=HELP_IMGOUT) + parser_genccert.add_argument('-iskey', metavar=METAVER_ISKEY, required=True, help=HELP_ISKEY) + parser_genccert.add_argument('-halgo', choices=HALGOS, required=True, help=HELP_HALGO) + parser_genccert.add_argument('-salgo', choices=SALGOS, required=True, help=HELP_SALGO) + parser_genccert.add_argument('-encimage', action='store_true', default=False, help=HELP_ENCIMG) + parser_genccert.add_argument('-iekey', metavar=METAVER_IEKEY, default="", help=HELP_IEKEY) + parser_genccert.add_argument('-ieiv', metavar=METAVER_IEIV, default="", help=HELP_IEIV) + parser_genccert.add_argument('-iekey_endian', choices=IEKEY_ENDIANS, default='Big', help=HELP_IEKEYEND) + parser_genccert.add_argument('-ealgo', choices=EALGOS, default="", help=HELP_EALGO) + parser_genccert.add_argument('-makecrc', action='store_true', default=False, help=HELP_MAKECRC) + + return parser + + +# ********************************************************************************************************************** +# Function Name : gen_key_cert +# ********************************************************************************************************************** +def gen_key_cert(halgo, salgo, info_xml, mskey_pem, iskey_pem): + keycert = b'' + tlvs = b'' + mskey_hash = b'' + ctlvs = b'' + + # Parse Manifest info + cert_info, err_element = parse_manifest_info_key_cert(info_xml) + if cert_info is None: + ERRMSG(str.format(ERRMSG_PARSEFAIL) % (err_element)) + return None + + # Make Key Certificate header + header = make_key_cert_header(cert_info[KEY_MANIVER], cert_info[KEY_FLAGS], cert_info[KEY_WDATA]) + + # Get image signer public key + iskey_pub = tc.get_pubkey_bytes(salgo, iskey_pem) + if iskey_pub is None: + ERRMSG(str.format(ERRMSG_IMPORTFAIL % ('ImageSignerKey'))) + return None + + # Get manifest signer public key + mskey_pub = tc.get_pubkey_bytes(salgo, mskey_pem) + if mskey_pub is None: + ERRMSG(str.format(ERRMSG_IMPORTFAIL % ('ManifestSignerKey'))) + return None + + # Calculate hash of manifest signer key + mskey_hash = tc.calc_hash(halgo, [mskey_pub]) + if mskey_hash is None: + ERRMSG(str.format(ERRMSG_HASHFAIL % ('ManifestSignerPK'))) + return None + + # Make Custom TLV + for ctlv in cert_info[KEY_CUSTOMTLVS]: + tlv = make_tlv(int(ctlv[KEY_TYPE], BASE_HEX), ctlv[KEY_VAL], cert_info[KEY_WDATA], ENDIAN_BIG) + if tlv is None: + ERRMSG(str.format(ERRMSG_TLVFAIL % ('CustomTLV'))) + return None + ctlvs += tlv + + # Add Custom TLVs if it is required on Top + if cert_info[KEY_CTLV_ORDER] == ORDER_TOP: + if ctlvs is not None: + tlvs += ctlvs + + # Make manifest signer key TLV + tlv_type = TLV_TYPE_CLS_KEY | TLV_TYPE_CLS_KEY_UT_OEM_ROOT_PK | algo_types[salgo] + tlv = make_tlv(tlv_type, mskey_pub, cert_info[KEY_WDATA], ENDIAN_BIG) + if tlv is None: + ERRMSG(str.format(ERRMSG_TLVFAIL % ('ManifestSignerPK'))) + return None + tlvs += tlv + + # Calculate hash of image signer public key + iskey_pub_hash = tc.calc_hash(halgo, [iskey_pub]) + if iskey_pub_hash is None: + ERRMSG(str.format(ERRMSG_HASHFAIL % ('ImageSignerPK'))) + return None + + # Make image signer public key hash TLV + tlv_type = TLV_TYPE_CLS_HASH | TLV_TYPE_CLS_HASH_UT_IMG_PK | algo_types[halgo] + tlv = make_tlv(tlv_type, iskey_pub_hash, cert_info[KEY_WDATA], ENDIAN_BIG) + if tlv is None: + ERRMSG(str.format(ERRMSG_TLVFAIL % ('ImageSignerPKHash'))) + return None + tlvs += tlv + + # Add Custom TLVs if it is required on Bottom + if cert_info[KEY_CTLV_ORDER] != ORDER_TOP: + if ctlvs is not None: + tlvs += ctlvs + + # Calculate TLV length + tlv_len = len(tlvs) + tlv_len += (TLV_TYPE_LEN_SIZE + salgo_sign_lens[salgo]) + + # Joins Header and TLV Length and TLVs (But TLVs except Signature TLV) + keycert = header + keycert += tlv_len.to_bytes(WORD_BYTES, cert_info[KEY_WDATA]) + keycert += tlvs + + # Calculate key certificate signature + cert_sign = tc.calc_sign(salgo, halgo, mskey_pem, [keycert]) + if cert_sign is None: + ERRMSG(str.format(ERRMSG_SIGNFAIL)) + return None + + # Make key certificate signature TLV + tlv_type = (TLV_TYPE_CLS_SIGN | TLV_TYPE_CLS_SIGN_UT_CERT | algo_types[salgo] | + halgo_sign_hsah_types[halgo] | salgo_sign_scheme_types[salgo]) + + tlv = make_tlv(tlv_type, cert_sign, cert_info[KEY_WDATA], ENDIAN_BIG) + if tlv is None: + ERRMSG(str.format(ERRMSG_TLVFAIL % ('KeyCertSign'))) + return None + keycert += tlv + + return keycert, mskey_hash + + +# ********************************************************************************************************************** +# Function Name : gen_code_cert +# ********************************************************************************************************************** +def gen_code_cert(halgo, salgo, info_xml, img, iskey_pem, makecrc, encimage, ealgo, iekey, ieiv): + codecert = b'' + tlvs = b'' + eimg = None + ctlvs = b'' + + # Parse Manifest info + cert_info, err_element = parse_manifest_info_code_cert(info_xml) + if cert_info is None: + ERRMSG(str.format(ERRMSG_PARSEFAIL) % (err_element)) + return None, None + + # Zeropadding of image + if (len(img) % 16) != 0: + img += bytes.fromhex('00' * (IMAGE_UNIT_SIZE - (len(img) % IMAGE_UNIT_SIZE))) + + # Set signature target image and output image + target_img = img + out_img = img + + # Encrypt image (Execute only if encimage is true) + if encimage is True: + # Check encimage required option + if (iekey is None) or (ealgo == ''): + ERRMSG(str.format(ERRMSG_ENCIMGOPTFAIL)) + return None, None + + # Check key size + if ealgo_key_lens[ealgo] != len(iekey): + ERRMSG(str.format(ERRMSG_IMPORTFAIL % ('ImageEncryptionKey'))) + return None, None + + # Check without Encryption manner + if cert_info[KEY_ENCMANNER] is None: + ERRMSG(str.format(ERRMSG_ENCIMGINFOFAIL % ('encryption_manner'))) + return None, None + + # Get IV + if ieiv is None: + iv = tc.get_rand(IV_LEN) + else: + iv = ieiv + + # Encrypt image + eimg = tc.encrypt(ealgo, iekey, iv, img) + if eimg is None: + ERRMSG(str.format(ERRMSG_ENCFAIL)) + return None, None + + # Change signature target image + if cert_info[KEY_ENCMANNER] == 'EncThenSign': + target_img = eimg + + # Change output image + out_img = eimg + else: + # Check required Encrypted hash without encimage + if 'EncryptedImage' in cert_info[KEY_HASHS]: + ERRMSG(str.format(ERRMSG_ENCIMGINFOFAIL % ('hash(EncryptedImage)'))) + return None, None + + # Make Code Certificate header + header = make_code_cert_header(cert_info[KEY_MANIVER], cert_info[KEY_FLAGS], cert_info[KEY_LADDR], + cert_info[KEY_DADDR], len(target_img), cert_info[KEY_IMGVER], + cert_info[KEY_BUILDNUM], cert_info[KEY_WDATA]) + + # Get image signer public key + iskey_pub = tc.get_pubkey_bytes(salgo, iskey_pem) + if iskey_pub is None: + ERRMSG(str.format(ERRMSG_IMPORTFAIL % ('ImageSignerKey'))) + return None, None + + # Make Custom TLV + for ctlv in cert_info[KEY_CUSTOMTLVS]: + tlv = make_tlv(int(ctlv[KEY_TYPE], BASE_HEX), ctlv[KEY_VAL], cert_info[KEY_WDATA], ENDIAN_BIG) + if tlv is None: + ERRMSG(str.format(ERRMSG_TLVFAIL % ('CustomTLV'))) + return None, None + ctlvs += tlv + + # Add Custom TLVs if it is required on top + if cert_info[KEY_CTLV_ORDER] == ORDER_TOP: + if ctlvs is not None: + tlvs += ctlvs + + # Make image signer public key TLV + tlv_type = TLV_TYPE_CLS_KEY | TLV_TYPE_CLS_KEY_UT_IMG_PK | algo_types[salgo] + tlv = make_tlv(tlv_type, iskey_pub, cert_info[KEY_WDATA], ENDIAN_BIG) + if tlv is None: + ERRMSG(str.format(ERRMSG_TLVFAIL % ('ImageSignerPK'))) + return None, None + tlvs += tlv + + # Make CRC TLV (Execute only if makecrc is true) + if makecrc is True: + crc = binascii.crc32(target_img, 0) + tlv_type = TLV_TYPE_CLS_CRC | TLV_TYPE_CLS_CRC_UT_IMG | TLV_TYPE_CLS_CRC_POLY_CRC32 + # CRC value endian follows word_data endian + tlv = make_tlv(tlv_type, crc.to_bytes(WORD_BYTES, ENDIAN_BIG), cert_info[KEY_WDATA], cert_info[KEY_WDATA]) + if tlv is None: + ERRMSG(str.format(ERRMSG_TLVFAIL % ('CRC'))) + return None, None + tlvs += tlv + + # Make IV TLV (Execute only if encimage is true) + if encimage is True: + # IV use type list for each Encryption manner + encmanner_iv_types = { + 'EncThenSign': TLV_TYPE_CLS_IV_UT_IMG_CIPHER, + 'SignThenEnc': TLV_TYPE_CLS_IV_UT_IMG_CIPHER, + 'TemporaryEnc': TLV_TYPE_CLS_IV_UT_TMP_IMG_DEC, + } + tlv_type = TLV_TYPE_CLS_IV | encmanner_iv_types[cert_info[KEY_ENCMANNER]] + tlv = make_tlv(tlv_type, iv, cert_info[KEY_WDATA], ENDIAN_BIG) + if tlv is None: + ERRMSG(str.format(ERRMSG_TLVFAIL % ('IV'))) + return None, None + tlvs += tlv + + # Make hash TLV + hash_tlv_params = { + KEY_HASH_ISPK: {KEY_TARGET: iskey_pub, KEY_UT: TLV_TYPE_CLS_HASH_UT_IMG_PK}, + KEY_HASH_IMG: {KEY_TARGET: img, KEY_UT: TLV_TYPE_CLS_HASH_UT_IMG}, + KEY_HASH_EIMG: {KEY_TARGET: eimg, KEY_UT: TLV_TYPE_CLS_HASH_UT_ENCIMG} + } + for key in cert_info[KEY_HASHS]: + param = hash_tlv_params[key] + digest = tc.calc_hash(halgo, [param[KEY_TARGET]]) + if digest is None: + ERRMSG(str.format(ERRMSG_HASHFAIL % (key))) + return None, None + tlv_type = TLV_TYPE_CLS_HASH | param[KEY_UT] | algo_types[halgo] + tlv = make_tlv(tlv_type, digest, cert_info[KEY_WDATA], ENDIAN_BIG) + if tlv is None: + ERRMSG(str.format(ERRMSG_TLVFAIL % (key + 'Hash'))) + return None, None + tlvs += tlv + + # Make Image Hash TLV (Execute only if signing target is CertificateOnly) + if cert_info[KEY_SIGNTARGET] == SIGNTARGET_CERTONLY: + digest = tc.calc_hash(halgo, [target_img]) + if target_img == img: + target_str = 'Image' + use_type = TLV_TYPE_CLS_HASH_UT_IMG + else: + target_str = 'EncryptedImage' + use_type = TLV_TYPE_CLS_HASH_UT_ENCIMG + tlv_type = TLV_TYPE_CLS_HASH | use_type | algo_types[halgo] + tlv = make_tlv(tlv_type, digest, cert_info[KEY_WDATA], ENDIAN_BIG) + if tlv is None: + ERRMSG(str.format(ERRMSG_TLVFAIL % (target_str + 'Hash'))) + return None, None + tlvs += tlv + + # Make Product class TLV + pc_tlv_params = { + KEY_PID: {KEY_UT: TLV_TYPE_CLS_PC_UT_PRODUCT_ID}, + KEY_VID: {KEY_UT: TLV_TYPE_CLS_PC_UT_VENDER_ID} + } + for key, value in cert_info[KEY_PCS].items(): + param = pc_tlv_params[key] + tlv_type = TLV_TYPE_CLS_PC | param[KEY_UT] + tlv = make_tlv(tlv_type, value[KEY_VAL], cert_info[KEY_WDATA], ENDIAN_BIG) + if tlv is None: + ERRMSG(str.format(ERRMSG_TLVFAIL % (key))) + return None, None + tlvs += tlv + + # Make Image Cipher Info(ICI) TLV + pc_tlv_params = { + KEY_ICI_IMG_CIP: {KEY_UT: TLV_TYPE_CLS_ICI_UT_IMG_ENC_DEC}, + KEY_ICI_TMP_IMG_DEC: {KEY_UT: TLV_TYPE_CLS_ICI_UT_TMP_IMG_DEC} + } + # Image Cipher Info mode list for each encryption mode + ici_mode_types = { + 'CBC': TLV_TYPE_CLS_ICI_MODE_CBC, # CBC + } + for key, value in cert_info[KEY_ICIS].items(): + param = pc_tlv_params[key] + tlv_type = (TLV_TYPE_CLS_ICI | param[KEY_UT] | algo_types[value[KEY_ALGO]] | ici_mode_types[value[KEY_MODE]]) + # This is RZ/G2L customization. + # Value of ImageCipherInfo is described in big endian in ManifestInfo file. + # However, RZ/G2L needs to refer to Value as little endian, so endian conversion is performed here. + # tlv = make_tlv(tlv_type, value[KEY_VAL], cert_info[KEY_WDATA], ENDIAN_BIG) + tlv = make_tlv(tlv_type, value[KEY_VAL], cert_info[KEY_WDATA], ENDIAN_LITTLE) + if tlv is None: + ERRMSG(str.format(ERRMSG_TLVFAIL % (key + 'Info'))) + return None, None + tlvs += tlv + + # Add Custom TLVs if it is required on bottom + if cert_info[KEY_CTLV_ORDER] != ORDER_TOP: + if ctlvs is not None: + tlvs += ctlvs + + # Calculate TLV length + tlv_len = len(tlvs) + tlv_len += (TLV_TYPE_LEN_SIZE + salgo_sign_lens[salgo]) + + # Joins Header and TLV Length and TLVs (But TLVs except Signature TLV) + codecert = header + codecert += tlv_len.to_bytes(WORD_BYTES, cert_info[KEY_WDATA]) + codecert += tlvs + + # Set sign parameter + if cert_info[KEY_SIGNTARGET] == SIGNTARGET_CERTANDIMG: + msgs = [codecert, target_img] + if target_img == img: + use_type = TLV_TYPE_CLS_SIGN_UT_CODE_CERT_AND_IMG + else: + use_type = TLV_TYPE_CLS_SIGN_UT_CODE_CERT_AND_ENCIMG + else: # SIGNTARGET_CERTONLY + msgs = [codecert] + use_type = TLV_TYPE_CLS_SIGN_UT_CERT + + # Calculate key certificate signature + cert_sign = tc.calc_sign(salgo, halgo, iskey_pem, msgs) + if cert_sign is None: + ERRMSG(str.format(ERRMSG_SIGNFAIL)) + return None, None + + # Make key certificate signature TLV + tlv_type = (TLV_TYPE_CLS_SIGN | use_type | algo_types[salgo] | halgo_sign_hsah_types[halgo] | + salgo_sign_scheme_types[salgo]) + tlv = make_tlv(tlv_type, cert_sign, cert_info[KEY_WDATA], ENDIAN_BIG) + if tlv is None: + ERRMSG(str.format(ERRMSG_TLVFAIL % ('CodeCertSign'))) + return None, None + codecert += tlv + + return codecert, out_img + + +# ********************************************************************************************************************** +# Function Name : parse_manifest_info_key_cert +# ********************************************************************************************************************** +def parse_manifest_info_key_cert(info_xml): + + # Initialize key certificate information + info = { + KEY_WDATA: ENDIAN_LITTLE, + KEY_CTLV_ORDER: ORDER_BOTTOM, + KEY_MANIVER: None, + KEY_FLAGS: None, + KEY_CUSTOMTLVS: [], + } + + # Find key_cert structure + try: + root = ET.fromstring(info_xml) + except: + return None, 'syntax' + + e_keycert = root.find('key_cert') + if e_keycert is None: + return None, 'key_cert' + + # Parse format elements + e_format = e_keycert.find('format') + if e_format is not None: + e_worddata = e_format.find('word_data') + if e_worddata is not None: + worddata_endianess = [ENDIAN_BIG, ENDIAN_LITTLE] + if e_worddata.attrib['endianess'] in worddata_endianess: + info[KEY_WDATA] = e_worddata.attrib['endianess'] + else: + return None, 'word_data' + e_custom_tlvs_order = e_format.find('custom_tlvs_order') + if e_custom_tlvs_order is not None: + custom_tlvs_order= [ORDER_TOP, ORDER_BOTTOM] + if e_custom_tlvs_order.attrib['order'] in custom_tlvs_order: + info[KEY_CTLV_ORDER] = e_custom_tlvs_order.attrib['order'] + else: + return None, 'custom_tlvs_order' + else: + # format elements is optional + pass + + # Parse header elements + e_header = e_keycert.find('header') + if e_header is None: + return None, 'header' + + elements = [KEY_MANIVER, KEY_FLAGS] + for element in elements: + try: + contents = e_header.findtext(element) + if re.match('^0x[0-9,A-F,a-f]{8}$', contents) is None: + return None, element + info[element] = int(contents, base=BASE_HEX) + except: + # header elements is required + return None, element + + # Parse additional_tlvs elements + e_addtlvs = e_keycert.find('additional_tlvs') + if e_addtlvs is not None: + for ctlv in e_addtlvs.findall('custom_tlv'): + if re.match('^0x[0-9,A-F,a-f]{8}$', ctlv.attrib['type']) is None: + return None, 'custom_tlv' + info[KEY_CUSTOMTLVS].append({KEY_TYPE: ctlv.attrib['type'], KEY_VAL: ctlv.text}) + else: + # additional_tlvs elements is optional + pass + + return info, None + + +# ********************************************************************************************************************** +# Function Name : parse_manifest_info_code_cert +# ********************************************************************************************************************** +def parse_manifest_info_code_cert(info_xml): + + # Initialize code certificat information + info = { + KEY_ENCMANNER: None, + KEY_SIGNTARGET: SIGNTARGET_CERTANDIMG, + KEY_WDATA: ENDIAN_LITTLE, + KEY_CTLV_ORDER: ORDER_BOTTOM, + KEY_MANIVER: None, + KEY_FLAGS: None, + KEY_LADDR: None, + KEY_DADDR: None, + KEY_IMGVER: None, + KEY_BUILDNUM: None, + KEY_HASHS: {}, + KEY_PCS: {}, + KEY_ICIS: {}, + KEY_CUSTOMTLVS: [], + } + + # Find code_cert structure + try: + root = ET.fromstring(info_xml) + except: + return None, 'syntax' + + e_codecert = root.find('code_cert') + if e_codecert is None: + return None, 'code_cert' + + # Parse format elements + e_format = e_codecert.find('format') + if e_format is not None: + e_encmanner = e_format.find('encryption_manner') + if e_encmanner is not None: + encmanners = ['EncThenSign', 'SignThenEnc', 'TemporaryEnc'] + if e_encmanner.text in encmanners: + info[KEY_ENCMANNER] = e_encmanner.text + else: + return None, 'encryption_manner' + + e_signtarget = e_format.find('signing_target') + if e_signtarget is not None: + signtargets = ['CertificateAndImage', 'CertificateOnly'] + if e_signtarget.text in signtargets: + info[KEY_SIGNTARGET] = e_signtarget.text + else: + return None, 'signing_target' + + e_worddata = e_format.find('word_data') + if e_worddata is not None: + worddata_endianess = [ENDIAN_BIG, ENDIAN_LITTLE] + if e_worddata.attrib['endianess'] in worddata_endianess: + info[KEY_WDATA] = e_worddata.attrib['endianess'] + else: + return None, 'word_data' + + e_custom_tlvs_order = e_format.find('custom_tlvs_order') + if e_custom_tlvs_order is not None: + custom_tlvs_order= [ORDER_TOP, ORDER_BOTTOM] + if e_custom_tlvs_order.attrib['order'] in custom_tlvs_order: + info[KEY_CTLV_ORDER] = e_custom_tlvs_order.attrib['order'] + else: + return None, 'custom_tlvs_order' + else: + # format elements is optional + pass + + # Parse header elements + e_header = e_codecert.find('header') + if e_header is None: + return None, 'header' + + elements = [KEY_MANIVER, KEY_FLAGS, KEY_LADDR, KEY_DADDR, KEY_IMGVER, KEY_BUILDNUM] + for element in elements: + try: + contents = e_header.findtext(element) + if re.match('^0x[0-9,A-F,a-f]{8}$', contents) is None: + return None, element + info[element] = int(contents, base=BASE_HEX) + except: + # header elements is required + return None, element + + # Parse additional_tlvs elements + e_addtlvs = e_codecert.find('additional_tlvs') + if e_addtlvs is not None: + # Parse hash elements + if info[KEY_SIGNTARGET] == SIGNTARGET_CERTONLY: + # If signing target is 'CertificateOnly', ignore 'Image' and 'EncryptedImage' target + # These hashes are automatically generated by the tool + hash_targets = [KEY_HASH_ISPK] + else: + hash_targets = [KEY_HASH_ISPK, KEY_HASH_IMG, KEY_HASH_EIMG] + for e_hash in e_addtlvs.findall('hash'): + if e_hash.get('target') in hash_targets: + info[KEY_HASHS].setdefault(e_hash.get('target'), e_hash.attrib) + else: + return None, 'hash' + + # Parse hash elements + pc_usetypes = [KEY_PID, KEY_VID] + for e_pc in e_addtlvs.findall('product_class'): + if e_pc.get('use_type') in pc_usetypes: + pc_info = e_pc.attrib + pc_info.update({KEY_VAL: e_pc.text}) + info[KEY_PCS].setdefault(e_pc.get('use_type'), pc_info) + else: + return None, 'product_class' + + # Parse image_cipher_info(ICI) elements + ici_usetypes = [KEY_ICI_IMG_CIP, KEY_ICI_TMP_IMG_DEC] + ici_algorithms = ['AES-128'] + ici_modes = ['CBC'] + for e_ici in e_addtlvs.findall('image_cipher_info'): + if ((e_ici.get('use_type') in ici_usetypes) and + (e_ici.get('algorithm') in ici_algorithms) and + (e_ici.get('mode') in ici_modes)): + ici_info = e_ici.attrib + ici_info.update({KEY_VAL: e_ici.text}) + info[KEY_ICIS].setdefault(ici_info.get('use_type'), ici_info) + else: + return None, 'image_cipher_info' + + for ctlv in e_addtlvs.findall('custom_tlv'): + if re.match('^0x[0-9,A-F,a-f]{8}$', ctlv.attrib['type']) is None: + return None, 'custom_tlv' + info[KEY_CUSTOMTLVS].append({KEY_TYPE: ctlv.attrib['type'], KEY_VAL: ctlv.text}) + else: + # additional_tlvs elements is optional + pass + + return info, None + + +# ********************************************************************************************************************** +# Function Name : make_key_cert_header +# ********************************************************************************************************************** +def make_key_cert_header(manifest_ver, flags, endian): + KEYCERT_MAGIC = 0x6b657963 # ASCII code of "keyc" + reserved = [0, 0, 0, 0, 0] # 4byte * 5 + + header = b'' + header += KEYCERT_MAGIC.to_bytes(WORD_BYTES, endian) + header += manifest_ver.to_bytes(WORD_BYTES, endian) + header += flags.to_bytes(WORD_BYTES, endian) + for resv in reserved: + header += resv.to_bytes(WORD_BYTES, endian) + + return header + + +# ********************************************************************************************************************** +# Function Name : make_code_cert_header +# ********************************************************************************************************************** +def make_code_cert_header(manifest_ver, flags, load_addr, dest_addr, img_size, img_ver, build_ver, endian): + CODECERT_MAGIC = 0x636f6463 # ASCII code of "codc" + + header = b'' + header += CODECERT_MAGIC.to_bytes(WORD_BYTES, endian) + header += manifest_ver.to_bytes(WORD_BYTES, endian) + header += flags.to_bytes(WORD_BYTES, endian) + header += load_addr.to_bytes(WORD_BYTES, endian) + header += dest_addr.to_bytes(WORD_BYTES, endian) + header += img_size.to_bytes(WORD_BYTES, endian) + header += img_ver.to_bytes(WORD_BYTES, endian) + header += build_ver.to_bytes(WORD_BYTES, endian) + + return header + + +# ********************************************************************************************************************** +# Function Name : make_tlv +# ********************************************************************************************************************** +def make_tlv(tlv_type, tlv_value, tl_endian, v_endian): + + # Check value type + if type(tlv_value) == str: + try: + # Covert string to bytes + tlv_value = bytes.fromhex(tlv_value) + except: + return None + + tlv_val_len = len(tlv_value) + + # Check multiples of length + if (tlv_val_len % WORD_BYTES) != 0: + # length supports only word size multiples + return None + + # Check minimum and maximum length + if (tlv_val_len < TLV_VAL_LEN_MIN) or (tlv_val_len > TLV_VAL_LEN_MAX): + return None + + # Make TLV + type_len = (tlv_type & TLV_TYPE_MASK) | ((tlv_val_len//WORD_BYTES) & TLV_LEN_MASK) + tlv = type_len.to_bytes(WORD_BYTES, tl_endian) + for i in range(0, len(tlv_value), WORD_BYTES): + wordval = int.from_bytes(tlv_value[i:i+WORD_BYTES], ENDIAN_BIG) + tlv += wordval.to_bytes(WORD_BYTES, v_endian) + + return tlv + + +# ********************************************************************************************************************** +# Function Name : read_text_file +# ********************************************************************************************************************** +def read_text_file(file_path): + try: + with open(file_path, 'r') as infile: + text = infile.read() + except: + ERRMSG(str.format(ERRMSG_OPENFAIL % (file_path))) + text = None + return text + + +# ********************************************************************************************************************** +# Function Name : read_bin_file +# ********************************************************************************************************************** +def read_bin_file(file_path): + try: + with open(file_path, 'rb') as infile: + bin = infile.read() + except: + ERRMSG(str.format(ERRMSG_OPENFAIL % (file_path))) + bin = None + return bin + + +# ********************************************************************************************************************** +# Function Name : write_bin_file +# ********************************************************************************************************************** +def write_bin_file(data, file_path): + ret = 0 + try: + with open(file_path, 'bw') as outfile: + outfile.write(data) + except: + ERRMSG(str.format(ERRMSG_OPENFAIL % (file_path))) + ret = -1 + return ret + + +# ====================================================================================================================== +# Script start +# ====================================================================================================================== +if __name__ == '__main__': + main() diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/tool_crypto.py b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/tool_crypto.py new file mode 100644 index 0000000000000000000000000000000000000000..c246882c58ef59dd28268d678abe7eaf854d4fab --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/files/manifest_generation_tool/tool_crypto.py @@ -0,0 +1,127 @@ +# ********************************************************************************************************************* +# DISCLAIMER +# This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No +# other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +# applicable laws, including copyright laws. +# THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +# THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM +# EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES +# SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS +# SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +# Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of +# this software. By using this software, you agree to the additional terms and conditions found by accessing the +# following link: +# www.renesas.com/disclaimer +# +# Copyright (C) 2019-2020 Renesas Electronics Corporation. All rights reserved. +# ********************************************************************************************************************* +from Crypto import Random +from Crypto.Cipher import AES +from Crypto.Hash import SHA256 +from Crypto.Hash import SHA384 +from Crypto.Hash import SHA3_256 +from Crypto.Hash import SHA3_384 +from Crypto.Signature import pss +from Crypto.Signature import DSS +from Crypto.PublicKey import ECC +from Crypto.PublicKey import RSA +from Crypto.Random import get_random_bytes + +# ====================================================================================================================== +# Private global valiables +# ====================================================================================================================== +# ECC signature algorighm list +ecc_salgos = ['ECDSA-P256', 'ECDSA-P384'] + +# RSA signature algorighm list +rsa_salgos = ['RSA-PSS'] + +# Hash object list +halgo_objs = {'SHA2-256': SHA256, 'SHA2-384': SHA384, 'SHA3-256': SHA3_256, 'SHA3-384': SHA3_384} + +# Encryption mode list +ealgo_modes = {'AES-CBC': AES.MODE_CBC} + + +# ====================================================================================================================== +# Functions +# ====================================================================================================================== +# ********************************************************************************************************************** +# Function Name : get_pubkey_bytes +# ********************************************************************************************************************** +def get_pubkey_bytes(salgo, key_pem): + try: + if salgo in ecc_salgos: + key = ECC.import_key(key_pem) + pubkey = key.pointQ.x.to_bytes(key.pointQ.size_in_bytes()) + pubkey += key.pointQ.y.to_bytes(key.pointQ.size_in_bytes()) + elif salgo in rsa_salgos: + key = RSA.import_key(key_pem) + pubkey = key.n.to_bytes(key.size_in_bytes(), 'big') + pubkey += key.e.to_bytes(4, 'big') + else: + pubkey = None + except: + pubkey = None + return pubkey + + +# ********************************************************************************************************************** +# Function Name : get_rand +# ********************************************************************************************************************** +def get_rand(len): + return get_random_bytes(len) + + +# ********************************************************************************************************************** +# Function Name : calc_hash +# ********************************************************************************************************************** +def calc_hash(halgo, msgs): + try: + hobj = halgo_objs[halgo].new() + for msg in msgs: + hobj.update(msg) + digest = hobj.digest() + except: + digest = None + return digest + + +# ********************************************************************************************************************** +# Function Name : calc_sign +# ********************************************************************************************************************** +def calc_sign(salgo, halgo, key_pem, msgs): + try: + if salgo in ecc_salgos: + key = ECC.import_key(key_pem) + hobj = halgo_objs[halgo].new() + for msg in msgs: + hobj.update(msg) + sobj = DSS.new(key, 'fips-186-3') + sign = sobj.sign(hobj) + elif salgo in rsa_salgos: + key = RSA.import_key(key_pem) + hobj = halgo_objs[halgo].new() + for msg in msgs: + hobj.update(msg) + sobj = pss.new(key, salt_bytes=(hobj.digest_size * 2)) + sign = sobj.sign(hobj) + else: + sign = None + except: + sign = None + + return sign + + +# ********************************************************************************************************************** +# Function Name : encrypt +# ********************************************************************************************************************** +def encrypt(ealgo, key, iv, plain): + try: + aes = AES.new(key, ealgo_modes[ealgo], iv) + cipher = aes.encrypt(plain) + except: + cipher = None + return cipher diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/fiptool-native.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/fiptool-native.bb new file mode 100644 index 0000000000000000000000000000000000000000..774f898d073a4cee7a2e5b9d899f9b1d214efa8a --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/fiptool-native.bb @@ -0,0 +1,16 @@ +LIC_FILES_CHKSUM = "file://docs/license.rst;md5=b2c740efedc159745b9b31f88ff03dde" + +require fiptool-native.inc + +# URL = "git://github.com/renesas-rz/rzg_trusted-firmware-a.git" +# BRANCH = "v2.6/rz" +# SRCREV = "aed3786384b99dc13a46a8d3af139df28b5642a3" + +SRC_URI = "${URL};protocol=https;branch=${BRANCH}" + +SRC_URI = " \ + file://rzg_trusted-firmware-a \ +" + +PV = "2.6" +PR = "r1" diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/fiptool-native.inc b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/fiptool-native.inc new file mode 100644 index 0000000000000000000000000000000000000000..404c8dc3f3b1bfa8e8f5fa656a84856d3400a72d --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/fiptool-native.inc @@ -0,0 +1,24 @@ +SECTION = "bootloaders" +SUMMARY = "Fiptool from Trusted Firmware-A" +LICENSE = "MIT" + +inherit native + +DEPENDS = "openssl-native" + +S = "${WORKDIR}/rzg_trusted-firmware-a" + +do_configure () { + sed -i '/^LDLIBS/ s,$, \$\{BUILD_LDFLAGS},' ${S}/tools/fiptool/Makefile + sed -i '/^INCLUDE_PATHS/ s,$, \$\{BUILD_CFLAGS},' ${S}/tools/fiptool/Makefile + sed -i 's^OPENSSL_DIR.*=.*$^OPENSSL_DIR = ${STAGING_DIR_NATIVE}/${prefix_native}^' ${S}/tools/fiptool/Makefile +} + +do_compile () { + oe_runmake fiptool +} + +do_install () { + install -d ${D}${bindir} + install ${S}/tools/fiptool/fiptool ${D}${bindir} +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/firmware-pack.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/firmware-pack.bb new file mode 100644 index 0000000000000000000000000000000000000000..d278fb5f6f7bf5e30387f165a053489078b3442f --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/firmware-pack.bb @@ -0,0 +1,58 @@ +SECTION = "bootloaders" +SUMMARY = "Firmware Packaging" +LICENSE = "BSD-3-Clause" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/BSD-3-Clause;md5=550794465ba0ec5312d6919e203a55f9" + +inherit deploy + +DEPENDS = "tf-a-myir u-boot-myir" +DEPENDS += " bootparameter-native fiptool-native" + +S = "${WORKDIR}" + +do_configure[noexec] = "1" + +do_compile () { + + # Create bl2_bp.bin + bootparameter ${WORKDIR}/recipe-sysroot/boot/bl2-${MACHINE}.bin bl2_bp.bin + cat ${WORKDIR}/recipe-sysroot/boot/bl2-${MACHINE}.bin >> bl2_bp.bin + # bootparameter ${WORKDIR}/recipe-sysroot/boot/u-boot-mys-rzg2l-2021.10-r0.bin bl2_bp.bin + # cat ${WORKDIR}/recipe-sysroot/boot/u-boot-mys-rzg2l-2021.10-r0.bin >> bl2_bp.bin + + # Create fip.bin + fiptool create --align 16 --soc-fw ${WORKDIR}/recipe-sysroot/boot/bl31-${MACHINE}.bin --nt-fw ${WORKDIR}/recipe-sysroot/boot/u-boot.bin fip.bin + + # Convert to srec + objcopy -O srec --adjust-vma=0x00011E00 --srec-forceS3 -I binary bl2_bp.bin bl2_bp.srec + objcopy -I binary -O srec --adjust-vma=0x0000 --srec-forceS3 fip.bin fip.srec + + if [ "${PMIC_SUPPORT}" = "1" ]; then + bootparameter ${WORKDIR}/recipe-sysroot/boot/bl2-${MACHINE}_pmic.bin bl2_bp_pmic.bin + cat ${WORKDIR}/recipe-sysroot/boot/bl2-${MACHINE}_pmic.bin >> bl2_bp_pmic.bin + fiptool create --align 16 --soc-fw ${WORKDIR}/recipe-sysroot/boot/bl31-${MACHINE}_pmic.bin --nt-fw ${WORKDIR}/recipe-sysroot/boot/u-boot.bin fip_pmic.bin + objcopy -O srec --adjust-vma=0x00011E00 --srec-forceS3 -I binary bl2_bp_pmic.bin bl2_bp_pmic.srec + objcopy -I binary -O srec --adjust-vma=0x0000 --srec-forceS3 fip_pmic.bin fip_pmic.srec + fi + +} + +do_deploy () { + # Create deploy folder + install -d ${DEPLOYDIR} + + # Copy fip images + install -m 0644 ${S}/bl2_bp.bin ${DEPLOYDIR}/bl2_bp-${MACHINE}.bin + install -m 0644 ${S}/bl2_bp.srec ${DEPLOYDIR}/bl2_bp-${MACHINE}.srec + install -m 0644 ${S}/fip.bin ${DEPLOYDIR}/fip-${MACHINE}.bin + install -m 0644 ${S}/fip.srec ${DEPLOYDIR}/fip-${MACHINE}.srec + + if [ "${PMIC_SUPPORT}" = "1" ]; then + install -m 0644 ${S}/bl2_bp_pmic.bin ${DEPLOYDIR}/bl2_bp-${MACHINE}_pmic.bin + install -m 0644 ${S}/bl2_bp_pmic.srec ${DEPLOYDIR}/bl2_bp-${MACHINE}_pmic.srec + install -m 0644 ${S}/fip_pmic.bin ${DEPLOYDIR}/fip-${MACHINE}_pmic.bin + install -m 0644 ${S}/fip_pmic.srec ${DEPLOYDIR}/fip-${MACHINE}_pmic.srec + fi +} + +addtask deploy before do_build after do_compile diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/firmware-pack.bbappend b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/firmware-pack.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..c85eef3667cdd30a4fec8ef47a80569b6ad3a38f --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/firmware-pack.bbappend @@ -0,0 +1,106 @@ +require renesas/include/rzg2l-security-config.inc + +DEPENDS:append = " \ + ${@oe.utils.conditional("ENABLE_SPD_OPTEE", "1", " optee-os secprv-native", "",d)} \ + ${@oe.utils.conditional("TRUSTED_BOARD_BOOT", "1", " secprv-native", "",d)} \ +" + +do_compile:append () { + + if [ "${ENABLE_SPD_OPTEE}" = "1" ]; then + fiptool update --align 16 --tos-fw ${STAGING_DIR_HOST}/boot/tee-${MACHINE}.bin fip.bin + objcopy -I binary -O srec --adjust-vma=0x0000 --srec-forceS3 fip.bin fip.srec + + if [ "${PMIC_SUPPORT}" = "1" ]; then + fiptool update --align 16 --tos-fw ${STAGING_DIR_HOST}/boot/tee-${MACHINE}.bin fip_pmic.bin + objcopy -I binary -O srec --adjust-vma=0x0000 --srec-forceS3 fip_pmic.bin fip_pmic.srec + fi + fi + + + if [ "${TRUSTED_BOARD_BOOT}" = "1" ]; then + objcopy -I binary --adjust-vma=0x00012000 --pad-to=0x12400 ${STAGING_DIR_HOST}/boot/bl2-kcert-${MACHINE}.bin bl2-kcert-${MACHINE}.bin + objcopy -I binary --adjust-vma=0x00012400 --pad-to=0x13000 ${STAGING_DIR_HOST}/boot/bl2-ccert-${MACHINE}.bin bl2-ccert-${MACHINE}.bin + + cat bl2-kcert-${MACHINE}.bin bl2-ccert-${MACHINE}.bin ${STAGING_DIR_HOST}/boot/bl2-${MACHINE}_tbb.bin > bl2_tbb.bin + + bootparameter bl2_tbb.bin ${S}/bl2_bp_tbb.bin + + cat bl2_tbb.bin >> ${S}/bl2_bp_tbb.bin + + fiptool create --align 16 --soc-fw ${STAGING_DIR_HOST}/boot/bl31-${MACHINE}_tbb.bin --soc-fw-key-cert ${STAGING_DIR_HOST}/boot/bl31-kcert-${MACHINE}.bin --soc-fw-cert ${STAGING_DIR_HOST}/boot/bl31-ccert-${MACHINE}.bin ${S}/fip_tbb.bin + + if [ "${ENABLE_SPD_OPTEE}" = "1" ]; then + fiptool update --align 16 --tos-fw ${STAGING_DIR_HOST}/boot/tee-${MACHINE}_tbb.bin --tos-fw-key-cert ${STAGING_DIR_HOST}/boot/bl32-kcert-${MACHINE}.bin --tos-fw-cert ${STAGING_DIR_HOST}/boot/bl32-ccert-${MACHINE}.bin ${S}/fip_tbb.bin + fi + + fiptool update --align 16 --nt-fw ${STAGING_DIR_HOST}/boot/u-boot-${MACHINE}_tbb.bin --nt-fw-key-cert ${STAGING_DIR_HOST}/boot/bl33-kcert-${MACHINE}.bin --nt-fw-cert ${STAGING_DIR_HOST}/boot/bl33-ccert-${MACHINE}.bin ${S}/fip_tbb.bin + + objcopy -O srec --adjust-vma=0x00011E00 --srec-forceS3 -I binary ${S}/bl2_bp_tbb.bin ${S}/bl2_bp_tbb.srec + objcopy -I binary -O srec --adjust-vma=0x0000 --srec-forceS3 ${S}/fip_tbb.bin ${S}/fip_tbb.srec + + if [ "${PMIC_SUPPORT}" = "1" ]; then + + objcopy -I binary --adjust-vma=0x00012000 --pad-to=0x12400 ${STAGING_DIR_HOST}/boot/bl2-kcert-${MACHINE}_pmic.bin bl2-kcert-${MACHINE}_pmic.bin + objcopy -I binary --adjust-vma=0x00012400 --pad-to=0x13000 ${STAGING_DIR_HOST}/boot/bl2-ccert-${MACHINE}_pmic.bin bl2-ccert-${MACHINE}_pmic.bin + + cat bl2-kcert-${MACHINE}_pmic.bin bl2-ccert-${MACHINE}_pmic.bin ${STAGING_DIR_HOST}/boot/bl2-${MACHINE}_pmic_tbb.bin > bl2_pmic_tbb.bin + + bootparameter bl2_pmic_tbb.bin ${S}/bl2_bp_pmic_tbb.bin + + cat bl2_pmic_tbb.bin >> ${S}/bl2_bp_pmic_tbb.bin + + cp ${S}/fip_tbb.bin ${S}/fip_pmic_tbb.bin + + fiptool update --align 16 --soc-fw ${STAGING_DIR_HOST}/boot/bl31-${MACHINE}_pmic_tbb.bin --soc-fw-key-cert ${STAGING_DIR_HOST}/boot/bl31-kcert-${MACHINE}_pmic.bin --soc-fw-cert ${STAGING_DIR_HOST}/boot/bl31-ccert-${MACHINE}_pmic.bin ${S}/fip_pmic_tbb.bin + + objcopy -O srec --adjust-vma=0x00011E00 --srec-forceS3 -I binary ${S}/bl2_bp_pmic_tbb.bin ${S}/bl2_bp_pmic_tbb.srec + objcopy -I binary -O srec --adjust-vma=0x0000 --srec-forceS3 ${S}/fip_pmic_tbb.bin ${S}/fip_pmic_tbb.srec + fi + fi +} + +do_deploy:append () { + + if [ "${TRUSTED_BOARD_BOOT}" = "1" ]; then + # Copy fip trusted boot board images + install -m 0644 ${S}/bl2_bp_tbb.bin ${DEPLOYDIR}/bl2_bp-${MACHINE}_tbb.bin + install -m 0644 ${S}/bl2_bp_tbb.srec ${DEPLOYDIR}/bl2_bp-${MACHINE}_tbb.srec + install -m 0644 ${S}/fip_tbb.bin ${DEPLOYDIR}/fip-${MACHINE}_tbb.bin + install -m 0644 ${S}/fip_tbb.srec ${DEPLOYDIR}/fip-${MACHINE}_tbb.srec + + if [ "${PMIC_SUPPORT}" = "1" ]; then + install -m 0644 ${S}/bl2_bp_pmic_tbb.bin ${DEPLOYDIR}/bl2_bp-${MACHINE}_pmic_tbb.bin + install -m 0644 ${S}/bl2_bp_pmic_tbb.srec ${DEPLOYDIR}/bl2_bp-${MACHINE}_pmic_tbb.srec + install -m 0644 ${S}/fip_pmic_tbb.bin ${DEPLOYDIR}/fip-${MACHINE}_pmic_tbb.bin + install -m 0644 ${S}/fip_pmic_tbb.srec ${DEPLOYDIR}/fip-${MACHINE}_pmic_tbb.srec + fi + fi + + if [ -d "${SYMLINK_NATIVE_BOOT_KEY_DIR}" ]; then + # Copy install keys + install -d ${S}/user_factory_prog + install -m 0644 ${SYMLINK_NATIVE_BOOT_KEY_DIR}/encrypted-*.bin ${S}/user_factory_prog + install -m 0644 ${SYMLINK_NATIVE_BOOT_KEY_DIR}/kuk_init_vec.txt ${S}/user_factory_prog + install -m 0644 ${SYMLINK_NATIVE_PROV_KEY_DIR}/ufpk_init_vec.bin ${S}/user_factory_prog + + if [ "${TRUSTED_BOARD_BOOT}" = "1" ]; then + install -m 0644 ${STAGING_DIR_HOST}/boot/root_of_trust_key_pk.hash ${S}/user_factory_prog + fi + + cd ${S}/user_factory_prog + tar zcvf ${S}/user_factory_prog-${MACHINE}.tar.gz * + install -m 0644 ${S}/user_factory_prog-${MACHINE}.tar.gz ${DEPLOYDIR}/ + fi + + if [ -d "${SYMLINK_NATIVE_BOOT_KEY_DIR}/user_keys" ]; then + install -d ${S}/sce_enc_oem_key + install -m 0644 ${SYMLINK_NATIVE_BOOT_KEY_DIR}/user_keys/encrypted-*.bin ${S}/sce_enc_oem_key + + if [ -n "$(ls ${S}/sce_enc_oem_key)" ]; then + cd ${S} + tar zcvf sce_enc_oem_key_${MACHINE}.tar.gz sce_enc_oem_key + install -m 0644 ${S}/sce_enc_oem_key_${MACHINE}.tar.gz ${DEPLOYDIR}/ + fi + fi +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/secprv-native_1.0.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/secprv-native_1.0.bb new file mode 100644 index 0000000000000000000000000000000000000000..047d8f83b82d5e33001e9958db86dd6043880a8d --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/firmware-pack/secprv-native_1.0.bb @@ -0,0 +1,70 @@ +SUMMARY = "RZ Security Provisioning" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +require renesas/include/rzg2l-security-config.inc +inherit native + +DIRPATH_SEC_STORAGE = "${HOME}/rz_secprv/${MACHINE}" + +DIRPATH_GEN_KEY_ROOT = "${DIRPATH_SEC_STORAGE}/Key" +DIRPATH_SEC_LIB_ROOT = "${DIRPATH_SEC_STORAGE}/Lib" + +SRC_URI = " \ + file://key_management_tool \ + file://manifest_generation_tool \ +" + +S = "${WORKDIR}" + +DEPENDS += "openssl-native vim-native" + +addtask do_newkey after do_configure before do_compile +do_newkey[dirs] = "${S}" +do_newkey[nostamp] = "1" +do_newkey() { + cd ./key_management_tool + sh ./sec_keygen.sh -t ${DIRPATH_GEN_KEY_ROOT} +} + +addtask update after do_newkey before do_compile +do_update[dirs] = "${S}" +do_update[nostamp] = "1" +do_update() { + cd ./key_management_tool + sh ./sec_keygen.sh -t ${DIRPATH_GEN_KEY_ROOT} -d ${DIR_USER_KEY_VERSION} -u +} + +# do_compile() nothing +do_compile[noexec] = "1" + +do_install() { + + if [ -d "${DIRPATH_GEN_KEY_ROOT}" ]; then + install -d "${D}/${DIRPATH_SEC_DATADIR_NATIVE}" + + boot_key=$(find "${DIRPATH_GEN_KEY_ROOT}" -name "${DIR_USER_KEY_VERSION}") + if [ -z ${boot_key} ]; then + echo "Could not find the directory: ${DIRPATH_GEN_KEY_ROOT}/${DIR_USER_KEY_VERSION}" + exit 1 + fi + ln -nfs "${boot_key}" "${D}/${SYMLINK_NATIVE_BOOT_KEY_DIR}" + + prov_key=$(find "${DIRPATH_GEN_KEY_ROOT}" -name "${DIR_USER_FACTORY_PROG_KEY}") + if [ -z ${prov_key} ]; then + echo "Could not find the directory: ${DIRPATH_GEN_KEY_ROOT}/${DIR_USER_FACTORY_PROG_KEY}" + exit 1 + fi + ln -nfs "${prov_key}" "${D}/${SYMLINK_NATIVE_PROV_KEY_DIR}" + fi + + if [ "${TRUSTED_BOARD_BOOT}" = "1" ]; then + install -d "${D}${bindir}" + cp -rf --no-preserve=ownership "${S}"/manifest_generation_tool "${D}${bindir}" + fi + + if [ -d "${DIRPATH_SEC_LIB_ROOT}" ]; then + install -d "${D}/${DIRPATH_SEC_LIBDIR_NATIVE}"; + ln -nfs "${DIRPATH_SEC_LIB_ROOT}" "${D}/${SYMLINK_NATIVE_SEC_LIB_DIR}" + fi +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/flash-writer/flash-writer.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/flash-writer/flash-writer.bb new file mode 100644 index 0000000000000000000000000000000000000000..eb4bd8b001f2ba1e2a31ad93c8eba86fe5c5d53f --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/flash-writer/flash-writer.bb @@ -0,0 +1,79 @@ +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=1fb5dca04b27614d6d04abca6f103d8d" +LICENSE="BSD-3-Clause" +PV = "1.06" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +#FLASH_WRITER_URL = "git://github.com/renesas-rz/rzg2_flash_writer" +#BRANCH = "rz_g2l" + +#FLASH_WRITER_URL = "git://github.com/123markhong/yg2lx-flash_write.git" +#BRANCH = "yg2lx_fw" +#FLASH_WRITER_URL ="git://github.com/123markhong/myir-renesas_flash_writer.git" +#BRANCH = "rz_g2l" +FLASH_WRITER_URL ="git://github.com/MYiR-Dev/myir-renesas-flash-writer.git" +BRANCH = "develop-remi-v1.06" + + +# SRC_URI = "${FLASH_WRITER_URL};branch=${BRANCH}" + +SRC_URI = " \ + file://myir-renesas-flash-writer \ +" + +#SRCREV = "ff167b676547f3997906c82c9be504eb5cff8ef0" +#SRCREV = "e934154bbbd4e0c5df42206a41b14f1a92a93de0" +#SRCREV = "e934154bbbd4e0c5df42206a41b14f1a92a93de0" +SRCREV = "8cd973992da7cdc8646a498b81d1a1e4e9f74f20" + +inherit deploy +#require include/provisioning.inc + +S = "${WORKDIR}/myir-renesas-flash-writer" +export PMIC_BUILD_DIR = "${S}/build_pmic" + +do_compile() { + if [ "${MACHINE}" = "myir-yg2lx" ]; then + BOARD="RZG2L_SMARC";#2G DDR + # BOARD="RZG2L_SMARC_PMIC_1GB";#1G DDR + PMIC_BOARD="RZG2L_SMARC_PMIC"; + elif [ "${MACHINE}" = "myir-yg2lx-1g" ]; then + BOARD="RZG2L_SMARC_PMIC_1GB"; + PMIC_BOARD="RZG2L_SMARC_PMIC"; + elif [ "${MACHINE}" = "myir-remi" ]; then + BOARD="RZG2L_SMARC"; + PMIC_BOARD="RZG2L_SMARC_PMIC"; + elif [ "${MACHINE}" = "myir-remi-1g" ]; then + BOARD="RZG2L_SMARC_PMIC_1GB"; + PMIC_BOARD="RZG2L_SMARC_PMIC"; + elif [ "${MACHINE}" = "smarc-rzg2lc" ]; then + BOARD="RZG2LC_SMARC"; + elif [ "${MACHINE}" = "smarc-rzg2ul" ]; then + BOARD="RZG2UL_SMARC"; + elif [ "${MACHINE}" = "smarc-rzv2l" ]; then + BOARD="RZV2L_SMARC"; + PMIC_BOARD="RZV2L_SMARC_PMIC"; + elif [ "${MACHINE}" = "rzv2l-dev" ]; then + BOARD="RZV2L_15MMSQ_DEV"; + fi + cd ${S} + + oe_runmake BOARD=${BOARD} + + if [ "${PMIC_SUPPORT}" = "1" ]; then + oe_runmake OUTPUT_DIR=${PMIC_BUILD_DIR} clean; + oe_runmake BOARD=${PMIC_BOARD} OUTPUT_DIR=${PMIC_BUILD_DIR}; + fi +} + +do_install[noexec] = "1" + +do_deploy() { + install -d ${DEPLOYDIR} + install -m 644 ${S}/AArch64_output/*.mot ${DEPLOYDIR} + if [ "${PMIC_SUPPORT}" = "1" ]; then + install -m 644 ${PMIC_BUILD_DIR}/*.mot ${DEPLOYDIR} + fi +} +PARALLEL_MAKE = "-j 1" +addtask deploy after do_compile diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/flash-writer/flash-writer.bbappend b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/flash-writer/flash-writer.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..1d0ef6934ab2b1336ff4eeb4c13647445e5e4bc5 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/flash-writer/flash-writer.bbappend @@ -0,0 +1,73 @@ +require renesas/include/rzg2l-security-config.inc +inherit python3native + +DEPENDS:append = " \ + ${@oe.utils.conditional("TRUSTED_BOARD_BOOT", "1", "python3-pycryptodome-native python3-pycryptodomex-native secprv-native bootparameter-native", "",d)} \ +" + +BUILD_TBB_DIR = "${S}/build_tbb" +PMIC_BUILD_TBB_DIR = "${S}/build_pmic_tbb" + +do_compile:append() { + if [ "${TRUSTED_BOARD_BOOT}" = "1" ]; then + oe_runmake OUTPUT_DIR=${BUILD_TBB_DIR} clean + oe_runmake BOARD=${BOARD} OUTPUT_DIR=${BUILD_TBB_DIR} TRUSTED_BOARD_BOOT=ENABLE + + mkdir -p ${BUILD_TBB_DIR}/tbb + FILE_NAME=$(find "${BUILD_TBB_DIR}" -name "*.bin" -maxdepth 1 -printf "%f\n" ) + + python3 ${MANIFEST_GENERATION_KCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl2_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl2_key.pem -certout ${BUILD_TBB_DIR}/tbb/flash_writer-kcert.bin + + python3 ${MANIFEST_GENERATION_CCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl2_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl2_key.pem -imgin ${BUILD_TBB_DIR}/${FILE_NAME} \ + -certout ${BUILD_TBB_DIR}/tbb/flash_writer-ccert.bin -imgout ${BUILD_TBB_DIR}/tbb/flash_writer-sign.bin + + objcopy -I binary --adjust-vma=0x00012000 --pad-to=0x12400 ${BUILD_TBB_DIR}/tbb/flash_writer-kcert.bin + objcopy -I binary --adjust-vma=0x00012400 --pad-to=0x13000 ${BUILD_TBB_DIR}/tbb/flash_writer-ccert.bin + + cat ${BUILD_TBB_DIR}/tbb/flash_writer-kcert.bin ${BUILD_TBB_DIR}/tbb/flash_writer-ccert.bin \ + ${BUILD_TBB_DIR}/tbb/flash_writer-sign.bin > ${BUILD_TBB_DIR}/tbb/flash_writer-image.bin + + bootparameter ${BUILD_TBB_DIR}/tbb/flash_writer-image.bin ${BUILD_TBB_DIR}/tbb/${FILE_NAME} + cat ${BUILD_TBB_DIR}/tbb/flash_writer-image.bin >> ${BUILD_TBB_DIR}/tbb/${FILE_NAME} + + objcopy -I binary -O srec --adjust-vma=0x00011E00 --srec-forceS3 ${BUILD_TBB_DIR}/tbb/${FILE_NAME} \ + ${BUILD_TBB_DIR}/tbb/${FILE_NAME%.*}.mot + + if [ "${PMIC_SUPPORT}" = "1" ]; then + oe_runmake OUTPUT_DIR=${PMIC_BUILD_TBB_DIR} clean + oe_runmake BOARD=${PMIC_BOARD} OUTPUT_DIR=${PMIC_BUILD_TBB_DIR} TRUSTED_BOARD_BOOT=ENABLE + + mkdir -p ${PMIC_BUILD_TBB_DIR}/tbb + FILE_NAME=$(find "${PMIC_BUILD_TBB_DIR}" -name "*_TBB.bin" -maxdepth 1 -printf "%f\n" ) + + python3 ${MANIFEST_GENERATION_KCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl2_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl2_key.pem -certout ${PMIC_BUILD_TBB_DIR}/tbb/flash_writer-kcert_pmic.bin + + python3 ${MANIFEST_GENERATION_CCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl2_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl2_key.pem -imgin ${PMIC_BUILD_TBB_DIR}/${FILE_NAME} \ + -certout ${PMIC_BUILD_TBB_DIR}/tbb/flash_writer-ccert_pmic.bin -imgout ${PMIC_BUILD_TBB_DIR}/tbb/flash_writer-sign_pmic.bin + + objcopy -I binary --adjust-vma=0x00012000 --pad-to=0x12400 ${PMIC_BUILD_TBB_DIR}/tbb/flash_writer-kcert_pmic.bin + objcopy -I binary --adjust-vma=0x00012400 --pad-to=0x13000 ${PMIC_BUILD_TBB_DIR}/tbb/flash_writer-ccert_pmic.bin + + cat ${PMIC_BUILD_TBB_DIR}/tbb/flash_writer-kcert_pmic.bin ${PMIC_BUILD_TBB_DIR}/tbb/flash_writer-ccert_pmic.bin ${PMIC_BUILD_TBB_DIR}/tbb/flash_writer-sign_pmic.bin > ${PMIC_BUILD_TBB_DIR}/tbb/flash_writer-image_pmic.bin + + bootparameter ${PMIC_BUILD_TBB_DIR}/tbb/flash_writer-image_pmic.bin ${PMIC_BUILD_TBB_DIR}/tbb/${FILE_NAME} + cat ${PMIC_BUILD_TBB_DIR}/tbb/flash_writer-image_pmic.bin >> ${PMIC_BUILD_TBB_DIR}/tbb/${FILE_NAME} + + objcopy -I binary -O srec --adjust-vma=0x00011E00 --srec-forceS3 ${PMIC_BUILD_TBB_DIR}/tbb/${FILE_NAME} \ + ${PMIC_BUILD_TBB_DIR}/tbb/${FILE_NAME%.*}.mot + fi + fi +} + +do_deploy:append() { + if [ "${TRUSTED_BOARD_BOOT}" = "1" ]; then + install -m 644 ${BUILD_TBB_DIR}/tbb/*.mot ${DEPLOYDIR} + if [ "${PMIC_SUPPORT}" = "1" ]; then + install -m 644 ${PMIC_BUILD_TBB_DIR}/tbb/*.mot ${DEPLOYDIR} + fi + fi +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/Makefile b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..5057607c156fd31d12c6d057af3c9f32ce872a28 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/Makefile @@ -0,0 +1,12 @@ +export V ?= 0 + +# If _HOST or _TA specific compilers are not specified, then use CROSS_COMPILE +HOST_CROSS_COMPILE ?= $(CROSS_COMPILE) + +.PHONY: all +all: + $(MAKE) -C host CROSS_COMPILE="$(HOST_CROSS_COMPILE)" --no-builtin-variables + +.PHONY: clean +clean: + $(MAKE) -C host clean diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/Makefile b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..4655a1ec56e53c79acfc801048f5e1fafa967df8 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/Makefile @@ -0,0 +1,37 @@ +CC ?= $(CROSS_COMPILE)gcc +LD ?= $(CROSS_COMPILE)ld +AR ?= $(CROSS_COMPILE)ar +NM ?= $(CROSS_COMPILE)nm +OBJCOPY ?= $(CROSS_COMPILE)objcopy +OBJDUMP ?= $(CROSS_COMPILE)objdump +READELF ?= $(CROSS_COMPILE)readelf + +OBJS = main.o \ + random.o \ + upd_key.o \ + gen_key.o \ + aes.o \ + mac.o \ + sha.o \ + rsa_sig.o \ + rsa_enc.o \ + ecc_sig.o + +CFLAGS += -Wall -I../ta/include -I./include +CFLAGS += -I$(TEEC_EXPORT)/include +LDADD += -lteec -L$(TEEC_EXPORT)/lib + +BINARY = optee_example_sce + +.PHONY: all +all: $(BINARY) + +$(BINARY): $(OBJS) + $(CC) $(LDFLAGS) -o $@ $(OBJS) $(LDADD) + +.PHONY: clean +clean: + rm -f $(OBJS) $(BINARY) + +%.o: %.c + $(CC) $(CFLAGS) -c $< -o $@ diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/aes.c b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/aes.c new file mode 100644 index 0000000000000000000000000000000000000000..9bcde47881ea64bc792cca88630b75d440dfa869 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/aes.c @@ -0,0 +1,342 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2022, Renesas Electronics + */ + +#include +#include +#include +#include +#include +#include +#include + +/* OP-TEE TEE client API (built by optee_client) */ +#include + +/* For the UUID (found in the TA's h-file(s)) */ +#include + +#define AES_BLOCK_SIZE (HW_SCE_AES_BLOCK_BYTE_SIZE) +#define KEY_BUFFER_SIZE (sizeof(sce_aes_wrapped_key_t)) +#define DAT_BUFFER_SIZE (AES_BLOCK_SIZE * 16) + +#define AES_ENC_MODE (1) +#define AES_DEC_MODE (0) + +struct aes_info { + char *aes_opt; + uint32_t init; + uint32_t update; + uint32_t final; + uint32_t mode; +}; + +/* TEE resources */ +struct sample_ctx { + TEEC_Context ctx; + TEEC_Session sess; + sce_aes_handle_t aes; + uint32_t init; + uint32_t update; + uint32_t final; + uint32_t mode; + char *inp_file; + char *out_file; + char *wuk_file; +}; + +extern int load_file(char *file_name, uint32_t *buf, uint32_t *buf_sz); +extern int save_file(char *file_name, uint32_t *buf, uint32_t buf_sz); + +static struct aes_info aes_list[] = { + {"aes128ecb_enc", PTA_CMD_AES128ECB_EncryptInit, PTA_CMD_AES128ECB_EncryptUpdate, PTA_CMD_AES128ECB_EncryptFinal, AES_ENC_MODE}, + {"aes128ecb_dec", PTA_CMD_AES128ECB_DecryptInit, PTA_CMD_AES128ECB_DecryptUpdate, PTA_CMD_AES128ECB_DecryptFinal, AES_DEC_MODE}, + {"aes256ecb_enc", PTA_CMD_AES256ECB_EncryptInit, PTA_CMD_AES256ECB_EncryptUpdate, PTA_CMD_AES256ECB_EncryptFinal, AES_ENC_MODE}, + {"aes256ecb_dec", PTA_CMD_AES256ECB_DecryptInit, PTA_CMD_AES256ECB_DecryptUpdate, PTA_CMD_AES256ECB_DecryptFinal, AES_DEC_MODE}, + {"aes128cbc_enc", PTA_CMD_AES128CBC_EncryptInit, PTA_CMD_AES128CBC_EncryptUpdate, PTA_CMD_AES128CBC_EncryptFinal, AES_ENC_MODE}, + {"aes128cbc_dec", PTA_CMD_AES128CBC_DecryptInit, PTA_CMD_AES128CBC_DecryptUpdate, PTA_CMD_AES128CBC_DecryptFinal, AES_DEC_MODE}, + {"aes256cbc_enc", PTA_CMD_AES256CBC_EncryptInit, PTA_CMD_AES256CBC_EncryptUpdate, PTA_CMD_AES256CBC_EncryptFinal, AES_ENC_MODE}, + {"aes256cbc_dec", PTA_CMD_AES256CBC_DecryptInit, PTA_CMD_AES256CBC_DecryptUpdate, PTA_CMD_AES256CBC_DecryptFinal, AES_DEC_MODE}, + {"aes128ctr_enc", PTA_CMD_AES128CTR_EncryptInit, PTA_CMD_AES128CTR_EncryptUpdate, PTA_CMD_AES128CTR_EncryptFinal, AES_ENC_MODE}, + {"aes128ctr_dec", PTA_CMD_AES128CTR_DecryptInit, PTA_CMD_AES128CTR_DecryptUpdate, PTA_CMD_AES128CTR_DecryptFinal, AES_DEC_MODE}, + {"aes256ctr_enc", PTA_CMD_AES256CTR_EncryptInit, PTA_CMD_AES256CTR_EncryptUpdate, PTA_CMD_AES256CTR_EncryptFinal, AES_ENC_MODE}, + {"aes256ctr_dec", PTA_CMD_AES256CTR_DecryptInit, PTA_CMD_AES256CTR_DecryptUpdate, PTA_CMD_AES256CTR_DecryptFinal, AES_DEC_MODE}, + {} +}; + +static uint32_t inp_buff[DAT_BUFFER_SIZE / sizeof(uint32_t)]; +static uint32_t out_buff[DAT_BUFFER_SIZE / sizeof(uint32_t)]; +static uint32_t wuk_buff[KEY_BUFFER_SIZE / sizeof(uint32_t)]; +static uint32_t iv0_buff[AES_BLOCK_SIZE / sizeof(uint32_t)]; + +static void usage(char *program) +{ + fprintf(stderr, "AES Encryption\n"); + fprintf(stderr, "Usage: %s -a [-t ] \n", program); + fprintf(stderr, "\t-t AES Encryption Algorithm. \n"); + fprintf(stderr, "\t Use default \"aes128ecb_enc\" if not set.\n"); + fprintf(stderr, "\t - \"aes128ecb_enc\", \"aes256ecb_enc\" \n"); + fprintf(stderr, "\t - \"aes128cbc_enc\", \"aes256cbc_enc\" \n"); + fprintf(stderr, "\t - \"aes128ctr_enc\", \"aes256ctr_enc\" \n"); + fprintf(stderr, "\t Specify the file name of the wrapped AES key. \n"); + fprintf(stderr, "\t Specify the file name of the plain data to input. \n"); + fprintf(stderr, "\t Specify the file name of the cipher data to be output. \n"); + fprintf(stderr, "\n"); + fprintf(stderr, "AES Decryption\n"); + fprintf(stderr, "Usage: %s -a [-t ] \n", program); + fprintf(stderr, "\t-t AES Encryption Algorithm. \n"); + fprintf(stderr, "\t - \"aes128ecb_dec\", \"aes256ecb_dec\" \n"); + fprintf(stderr, "\t - \"aes128cbc_dec\", \"aes256cbc_dec\" \n"); + fprintf(stderr, "\t - \"aes128ctr_dec\", \"aes256ctr_dec\" \n"); + fprintf(stderr, "\t Specify the file name of the wrapped AES key. \n"); + fprintf(stderr, "\t Specify the file name of the cipher data to input. \n"); + fprintf(stderr, "\t Specify the file name of the plain data to be output. \n"); + fprintf(stderr, "\n"); + exit(1); +} + +static void get_args(int argc, char *argv[], struct sample_ctx *ctx) +{ + int opt; + char *aes_opt = "aes128ecb_enc"; + struct aes_info *info = NULL; + + while (-1 != (opt = getopt(argc, argv, "t:h"))) { + switch (opt) { + case 't': + aes_opt = optarg; + break; + case 'h' : + usage(argv[0]); + break; + default: + usage(argv[0]); + break; + } + } + + for (int i = 0; NULL != aes_list[i].aes_opt; i++) { + if (!strcasecmp(aes_opt, aes_list[i].aes_opt)) { + info = &aes_list[i]; + break; + } + } + if (NULL == info) { + fprintf(stderr, "Bad \"%s\" \n", aes_opt); + usage(argv[0]); + } + + if ((optind + 3) > argc) { + fprintf(stderr, "Cannot find , or \n"); + usage(argv[0]); + } + + ctx->init = info->init; + ctx->update = info->update; + ctx->final = info->final; + ctx->mode = info->mode; + ctx->wuk_file = argv[optind]; + ctx->inp_file = argv[optind + 1]; + ctx->out_file = argv[optind + 2]; +} + +static int prepare_tee_session(struct sample_ctx *ctx) +{ + TEEC_UUID uuid = PTA_SCE_AES_UUID; + uint32_t origin; + TEEC_Result res; + + /* Initialize a context connecting us to the TEE */ + res = TEEC_InitializeContext(NULL, &ctx->ctx); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InitializeContext failed with code 0x%x\n", res); + return -1; + } + + /* Open a session with the TA */ + res = TEEC_OpenSession(&ctx->ctx, &ctx->sess, &uuid, + TEEC_LOGIN_PUBLIC, NULL, NULL, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_Opensession failed with code 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +static void terminate_tee_session(struct sample_ctx *ctx) +{ + TEEC_CloseSession(&ctx->sess); + TEEC_FinalizeContext(&ctx->ctx); +} + +static int set_init_vec(struct sample_ctx *ctx, uint32_t *iv, uint32_t *iv_sz) +{ + if ((PTA_CMD_AES128ECB_EncryptInit == ctx->init) || + (PTA_CMD_AES128ECB_DecryptInit == ctx->init) || + (PTA_CMD_AES256ECB_EncryptInit == ctx->init) || + (PTA_CMD_AES256ECB_DecryptInit == ctx->init) ){ + *iv_sz = 0; + return 0; + } + if (HW_SCE_AES_CBC_IV_BYTE_SIZE > *iv_sz) { + fprintf(stderr, "Failed to allocate resource.\n"); + return -1; + } + memset(iv, 0xa5, HW_SCE_AES_CBC_IV_BYTE_SIZE); + *iv_sz = HW_SCE_AES_CBC_IV_BYTE_SIZE; + return 0; +} + +static int aes_init(struct sample_ctx *ctx, uint32_t *wuk, uint32_t wuk_sz, uint32_t *iv, + uint32_t iv_sz) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + if (0 == iv_sz) + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT, TEEC_MEMREF_TEMP_INPUT, + TEEC_NONE, TEEC_NONE); + else + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT, TEEC_MEMREF_TEMP_INPUT, + TEEC_MEMREF_TEMP_INPUT, TEEC_NONE); + + op.params[0].tmpref.buffer = &ctx->aes; + op.params[0].tmpref.size = sizeof(ctx->aes); + op.params[1].tmpref.buffer = wuk; + op.params[1].tmpref.size = wuk_sz; + op.params[2].tmpref.buffer = iv; + op.params[2].tmpref.size = iv_sz; + + res = TEEC_InvokeCommand(&ctx->sess, ctx->init, &op, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InvokeCommand(INIT) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +static int aes_update(struct sample_ctx *ctx, uint32_t *in, uint32_t in_sz, uint32_t *out, + uint32_t *out_sz) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT, TEEC_MEMREF_TEMP_INPUT, + TEEC_MEMREF_TEMP_INOUT, TEEC_NONE); + + op.params[0].tmpref.buffer = &ctx->aes; + op.params[0].tmpref.size = sizeof(ctx->aes); + op.params[1].tmpref.buffer = in; + op.params[1].tmpref.size = in_sz; + op.params[2].tmpref.buffer = out; + op.params[2].tmpref.size = *out_sz; + + res = TEEC_InvokeCommand(&ctx->sess, ctx->update, &op, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InvokeCommand(UPDATE) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + *out_sz = op.params[2].tmpref.size; + return 0; +} + +static int aes_final(struct sample_ctx *ctx) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT, TEEC_NONE, TEEC_NONE, TEEC_NONE); + + op.params[0].tmpref.buffer = &ctx->aes; + op.params[0].tmpref.size = sizeof(ctx->aes); + + res = TEEC_InvokeCommand(&ctx->sess, ctx->final, &op, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InvokeCommand(FINAL) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +static int cipher_buffer(struct sample_ctx *ctx, uint32_t *wuk, uint32_t wuk_sz, uint32_t *in, + uint32_t in_sz, uint32_t *out, uint32_t *out_sz, uint32_t *iv, uint32_t iv_sz) +{ + int res; + int err; + + res = aes_init(ctx, wuk, wuk_sz, iv, iv_sz); + if (res) + return res; + + err = aes_update(ctx, in, in_sz, out, out_sz); + if (err) + res = err; + + err = aes_final(ctx); + if (!res) + res = err; + + return res; +} + +int aes_main(int argc, char *argv[]) +{ + int res; + struct sample_ctx ctx; + + uint32_t inp_size = sizeof(inp_buff); + uint32_t out_size = sizeof(out_buff); + uint32_t wuk_size = sizeof(wuk_buff); + uint32_t iv0_size = sizeof(iv0_buff); + + memset(inp_buff, 0, sizeof(inp_buff)); + memset(out_buff, 0, sizeof(out_buff)); + memset(wuk_buff, 0, sizeof(wuk_buff)); + memset(iv0_buff, 0, sizeof(iv0_buff)); + + printf("Parse command line options\n"); + get_args(argc, argv, &ctx); + + printf("Prepare session with the TA\n"); + res = prepare_tee_session(&ctx); + if (res) + goto err; + + printf("Load the wrapped aes key \"%s\"\n", ctx.wuk_file); + res = load_file(ctx.wuk_file, wuk_buff, &wuk_size); + if (res) + goto err; + + printf("Load the input data from file \"%s\"\n", ctx.inp_file); + res = load_file(ctx.inp_file, inp_buff, &inp_size); + if (res) + goto err; + inp_size = (inp_size + (AES_BLOCK_SIZE - 1)) & (~(AES_BLOCK_SIZE - 1)); + + printf("Set the initialization vector\n"); + res = set_init_vec(&ctx, iv0_buff, &iv0_size); + if (res) + goto err; + + printf("Encode/Decode buffer from TA\n"); + res = cipher_buffer(&ctx, wuk_buff, wuk_size, inp_buff, inp_size, out_buff, &out_size, + iv0_buff, iv0_size); + if (res) + goto err; + + printf("Save the output data to file \"%s\"\n", ctx.out_file); + res = save_file(ctx.out_file, out_buff, out_size); + if (res) + goto err; + +err: + terminate_tee_session(&ctx); + return 0; +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/ecc_sig.c b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/ecc_sig.c new file mode 100644 index 0000000000000000000000000000000000000000..04d859a2c9fb2d431f00eb29e261903375ac09a2 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/ecc_sig.c @@ -0,0 +1,275 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2022, Renesas Electronics + */ + +#include +#include +#include +#include +#include +#include +#include + +/* OP-TEE TEE client API (built by optee_client) */ +#include + +/* For the UUID (found in the TA's h-file(s)) */ +#include + +#define SIG_BUFFER_SIZE (128) +#define KEY_BUFFER_SIZE (1024) +#define DAT_BUFFER_SIZE (512) + +#define ECC_GEN_MODE (1) +#define ECC_VER_MODE (0) + +struct ecc_info { + char *rsa_opt; + uint32_t cmd; + uint32_t mode; +}; + +/* TEE resources */ +struct sample_ctx { + TEEC_Context ctx; + TEEC_Session sess; + uint32_t cmd; + uint32_t mode; + char *msg_file; + char *sig_file; + char *wuk_file; +}; + +extern int load_file(char *file_name, uint32_t *buf, uint32_t *buf_sz); +extern int save_file(char *file_name, uint32_t *buf, uint32_t buf_sz); + +static struct ecc_info rsa_list[] = { + {"nistp192_gen", PTA_CMD_ECDSA_secp192r1_SignatureGenerate, ECC_GEN_MODE}, + {"nistp192_ver", PTA_CMD_ECDSA_secp192r1_SignatureVerify, ECC_VER_MODE}, + {"nistp224_gen", PTA_CMD_ECDSA_secp224r1_SignatureGenerate, ECC_GEN_MODE}, + {"nistp224_ver", PTA_CMD_ECDSA_secp224r1_SignatureVerify, ECC_VER_MODE}, + {"nistp256_gen", PTA_CMD_ECDSA_secp256r1_SignatureGenerate, ECC_GEN_MODE}, + {"nistp256_ver", PTA_CMD_ECDSA_secp256r1_SignatureVerify, ECC_VER_MODE}, + {"bsip512r1_gen", PTA_CMD_ECDSA_BrainpoolP512r1_SignatureGenerate, ECC_GEN_MODE}, + {"bsip512r1_ver", PTA_CMD_ECDSA_BrainpoolP512r1_SignatureVerify, ECC_VER_MODE}, + {} +}; + +static uint32_t msg_buff[DAT_BUFFER_SIZE / sizeof(uint32_t)]; +static uint32_t sig_buff[SIG_BUFFER_SIZE / sizeof(uint32_t)]; +static uint32_t wuk_buff[KEY_BUFFER_SIZE / sizeof(uint32_t)]; + +static void usage(char *program) +{ + fprintf(stderr, "ECDSA Signature Generation\n"); + fprintf(stderr, "Usage: %s -e [-t ] \n", program); + fprintf(stderr, "\t-t Signature Generation Algorithm. \n"); + fprintf(stderr, "\t Use default \"nistp192_gen\" if not set.\n"); + fprintf(stderr, "\t - \"nistp192_gen\" \n"); + fprintf(stderr, "\t - \"nistp224_gen\" \n"); + fprintf(stderr, "\t - \"nistp256_gen\" \n"); + fprintf(stderr, "\t - \"bsip512r1_gen\" \n"); + fprintf(stderr, "\t Specify the file name of the wrapped ECC private key. \n"); + fprintf(stderr, "\t Specify the file name of the message to input. \n"); + fprintf(stderr, "\t Specify the file name of the signature to be output. \n"); + fprintf(stderr, "\n"); + fprintf(stderr, "ECDSA Signature Verification\n"); + fprintf(stderr, "Usage: %s -e [-t ] \n", program); + fprintf(stderr, "\t-t Signature Verification Algorithm. \n"); + fprintf(stderr, "\t - \"nistp192_ver\" \n"); + fprintf(stderr, "\t - \"nistp224_ver\" \n"); + fprintf(stderr, "\t - \"nistp256_ver\" \n"); + fprintf(stderr, "\t - \"bsip512r1_ver\" \n"); + fprintf(stderr, "\t Specify the file name of the wrapped ECC public key. \n"); + fprintf(stderr, "\t Specify the file name of the message to input. \n"); + fprintf(stderr, "\t Specify the file name of the signature to input. \n"); + fprintf(stderr, "\n"); + exit(1); +} + +static void get_args(int argc, char *argv[], struct sample_ctx *ctx) +{ + int opt; + char *rsa_opt = "nistp192_gen"; + struct ecc_info *info = NULL; + + while (-1 != (opt = getopt(argc, argv, "t:h"))) { + switch (opt) { + case 't': + rsa_opt = optarg; + break; + case 'h': + usage(argv[0]); + break; + default: + usage(argv[0]); + break; + } + } + + for (int i = 0; NULL != rsa_list[i].rsa_opt; i++) { + if (!strcasecmp(rsa_opt, rsa_list[i].rsa_opt)) { + info = &rsa_list[i]; + break; + } + } + if (NULL == info) { + fprintf(stderr, "Bad \"%s\" \n", rsa_opt); + usage(argv[0]); + } + + if ((optind + 3) > argc) { + fprintf(stderr, "Cannot find , or . \n"); + usage(argv[0]); + } + + ctx->cmd = info->cmd; + ctx->mode = info->mode; + ctx->wuk_file = argv[optind]; + ctx->msg_file = argv[optind + 1]; + ctx->sig_file = argv[optind + 2]; +} + +static int prepare_tee_session(struct sample_ctx *ctx) +{ + TEEC_UUID uuid = PTA_SCE_ECC_UUID; + uint32_t origin; + TEEC_Result res; + + /* Initialize a context connecting us to the TEE */ + res = TEEC_InitializeContext(NULL, &ctx->ctx); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InitializeContext failed with code 0x%x", res); + return -1; + } + + /* Open a session with the TA */ + res = TEEC_OpenSession(&ctx->ctx, &ctx->sess, &uuid, + TEEC_LOGIN_PUBLIC, NULL, NULL, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_Opensession failed with code 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +static void terminate_tee_session(struct sample_ctx *ctx) +{ + TEEC_CloseSession(&ctx->sess); + TEEC_FinalizeContext(&ctx->ctx); +} + +static int generate_signature(struct sample_ctx *ctx, uint32_t *wuk, uint32_t wuk_sz, uint32_t *msg, + uint32_t msg_sz, uint32_t *sig, uint32_t *sig_sz) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT, TEEC_MEMREF_TEMP_INOUT, + TEEC_MEMREF_TEMP_INPUT, TEEC_NONE); + + op.params[0].tmpref.buffer = msg; + op.params[0].tmpref.size = msg_sz; + op.params[1].tmpref.buffer = sig; + op.params[1].tmpref.size = *sig_sz; + op.params[2].tmpref.buffer = wuk; + op.params[2].tmpref.size = wuk_sz; + + res = TEEC_InvokeCommand(&ctx->sess, ctx->cmd, &op, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InvokeCommand(GENERATE) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + *sig_sz = op.params[1].tmpref.size; + return 0; +} + +static int verify_signature(struct sample_ctx *ctx, uint32_t *wuk, uint32_t wuk_sz, uint32_t *msg, + uint32_t msg_sz, uint32_t *sig, uint32_t sig_sz) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT, TEEC_MEMREF_TEMP_INPUT, + TEEC_MEMREF_TEMP_INPUT, TEEC_NONE); + + op.params[0].tmpref.buffer = sig; + op.params[0].tmpref.size = sig_sz; + op.params[1].tmpref.buffer = msg; + op.params[1].tmpref.size = msg_sz; + op.params[2].tmpref.buffer = wuk; + op.params[2].tmpref.size = wuk_sz; + + res = TEEC_InvokeCommand(&ctx->sess, ctx->cmd, &op, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InvokeCommand(VERIFY) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +int ecc_sig_main(int argc, char *argv[]) +{ + int res; + struct sample_ctx ctx; + + uint32_t msg_size = sizeof(msg_buff); + uint32_t sig_size = sizeof(sig_buff); + uint32_t wuk_size = sizeof(wuk_buff); + + memset(msg_buff, 0, sizeof(msg_buff)); + memset(sig_buff, 0, sizeof(sig_buff)); + memset(wuk_buff, 0, sizeof(wuk_buff)); + + printf("Parse command line options\n"); + get_args(argc, argv, &ctx); + + printf("Prepare session with the TA\n"); + res = prepare_tee_session(&ctx); + if (res) + goto err; + + printf("Load the wrapped ecc key \"%s\"\n", ctx.wuk_file); + res = load_file(ctx.wuk_file, wuk_buff, &wuk_size); + if (res) + goto err; + + printf("Load the message from file \"%s\"\n", ctx.msg_file); + res = load_file(ctx.msg_file, msg_buff, &msg_size); + if (res) + goto err; + + if (ECC_GEN_MODE == ctx.mode) { + printf("Generate the signature with TA\n"); + res = generate_signature(&ctx, wuk_buff, wuk_size, msg_buff, msg_size, sig_buff, &sig_size); + if (res) + goto err; + + printf("Save the generated signature to file \"%s\"\n", ctx.sig_file); + res = save_file(ctx.sig_file, sig_buff, sig_size); + if (res) + goto err; + } + else { + printf("Load the signature from file \"%s\"\n", ctx.sig_file); + res = load_file(ctx.sig_file, sig_buff, &sig_size); + if (res) + goto err; + + printf("Verify the signature with TA\n"); + res = verify_signature(&ctx, wuk_buff, wuk_size, msg_buff, msg_size, sig_buff, sig_size); + if (res) + goto err; + + printf("\nSignature Verification Passed.\n\n"); + } + +err: + terminate_tee_session(&ctx); + return 0; +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/gen_key.c b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/gen_key.c new file mode 100644 index 0000000000000000000000000000000000000000..01edf4e3a3555d272e34ceb12464bae802b133b6 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/gen_key.c @@ -0,0 +1,278 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2022, Renesas Electronics + */ + +#include +#include +#include +#include +#include +#include +#include + +/* OP-TEE TEE client API (built by optee_client) */ +#include + +/* For the UUID (found in the TA's h-file(s)) */ +#include + +#define KEY_BUFFER_SIZE (2000) + +#define KEY_GEN_PAIR (1) +#define KEY_GEN_CMMN (0) + +struct key_info { + char *key_opt; + uint32_t cmd; + uint32_t pair; +}; + +/* TEE resources */ +struct sample_ctx { + TEEC_Context ctx; + TEEC_Session sess; + uint32_t cmd; + uint32_t pair; + char *wuk1_file; + char *wuk2_file; +}; + +extern int save_file(char *file_name, uint32_t *buf, uint32_t buf_sz); + +static struct key_info key_list[] = { + {"aes128", PTA_CMD_AES128_WrappedKeyGenerate, KEY_GEN_CMMN}, + {"aes256", PTA_CMD_AES256_WrappedKeyGenerate, KEY_GEN_CMMN}, + {"rsa1024", PTA_CMD_RSA1024_WrappedKeyPairGenerate, KEY_GEN_PAIR}, + {"rsa2048", PTA_CMD_RSA2048_WrappedKeyPairGenerate, KEY_GEN_PAIR}, + {"nistp192", PTA_CMD_ECC_secp192r1_WrappedKeyPairGenerate, KEY_GEN_PAIR}, + {"nistp224", PTA_CMD_ECC_secp224r1_WrappedKeyPairGenerate, KEY_GEN_PAIR}, + {"nistp256", PTA_CMD_ECC_secp256r1_WrappedKeyPairGenerate, KEY_GEN_PAIR}, + {"bsip512r1", PTA_CMD_ECC_BrainpoolP512r1_WrappedKeyPairGenerate, KEY_GEN_PAIR}, + {}, +}; + +static uint32_t wuk_buff[KEY_BUFFER_SIZE / sizeof(uint32_t)]; + +static void usage(char *program) +{ + fprintf(stderr, "Common Key Generation\n"); + fprintf(stderr, "Usage: %s -k [-t ] \n", program); + fprintf(stderr, "\t-t Generation Key Type. \n"); + fprintf(stderr, "\t Use default \"aes128\" if not set.\n"); + fprintf(stderr, "\t - \"aes128\", \"aes256\" \n"); + fprintf(stderr, "\t File name of the wrapped common key to be output.\n"); + fprintf(stderr, "\n"); + fprintf(stderr, "Pair Key Generation\n"); + fprintf(stderr, "Usage: %s -k [-t ] \n", program); + fprintf(stderr, "\t-t Generation Key Type. \n"); + fprintf(stderr, "\t - \"rsa1024\", \"rsa2048\" \n"); + fprintf(stderr, "\t - \"nistp192\", \"nistp224\", \"nistp256\" \n"); + fprintf(stderr, "\t - \"bsip512r1\" \n"); + fprintf(stderr, "\t File name of the wrapped private key to be output.\n"); + fprintf(stderr, "\t File name of the wrapped public key to be output.\n"); + fprintf(stderr, "\n"); + exit(1); +} + +static void get_args(int argc, char *argv[], struct sample_ctx *ctx) +{ + int opt; + char *key_opt = "aes128"; + struct key_info *info = NULL; + + while (-1 != (opt = getopt(argc, argv, "t:h"))) { + switch (opt) { + case 't': + key_opt = optarg; + break; + case 'h': + usage(argv[0]); + break; + default: + usage(argv[0]); + break; + } + } + + for (int i = 0; NULL != key_list[i].key_opt; i++) { + if (!strcasecmp(key_opt, key_list[i].key_opt)) { + info = &key_list[i]; + break; + } + } + if (NULL == info) { + fprintf(stderr, "Bad \"%s\" \n", key_opt); + usage(argv[0]); + } + + if ((optind + 1) > argc) { + fprintf(stderr, "Cannot find the . \n"); + usage(argv[0]); + } + if ((info->pair) && ((optind + 2) > argc)) { + fprintf(stderr, "Cannot find the . \n"); + usage(argv[0]); + } + + ctx->cmd = info->cmd; + ctx->pair = info->pair; + ctx->wuk1_file = argv[optind]; + ctx->wuk2_file = ctx->pair ? argv[optind + 1] : NULL; +} + +static int prepare_tee_session(struct sample_ctx *ctx) +{ + TEEC_UUID uuid = PTA_SCE_UUID; + uint32_t origin; + TEEC_Result res; + + /* Initialize a context connecting us to the TEE */ + res = TEEC_InitializeContext(NULL, &ctx->ctx); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InitializeContext failed with code 0x%x", res); + return -1; + } + + /* Open a session with the TA */ + res = TEEC_OpenSession(&ctx->ctx, &ctx->sess, &uuid, + TEEC_LOGIN_PUBLIC, NULL, NULL, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_Opensession failed with code 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +static void terminate_tee_session(struct sample_ctx *ctx) +{ + TEEC_CloseSession(&ctx->sess); + TEEC_FinalizeContext(&ctx->ctx); +} + +static int generate_key(struct sample_ctx *ctx, uint32_t *wuk, uint32_t *wuk_sz) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT, TEEC_NONE, TEEC_NONE, TEEC_NONE); + + op.params[0].tmpref.buffer = wuk; + op.params[0].tmpref.size = *wuk_sz; + + res = TEEC_InvokeCommand(&ctx->sess, ctx->cmd, &op, &origin); + if (res != TEEC_SUCCESS){ + fprintf(stderr, "TEEC_InvokeCommand(GENERATE) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + *wuk_sz = op.params[0].tmpref.size; + return 0; +} + +static int save_generated_key1(struct sample_ctx *ctx, uint32_t *wuk) +{ + void *wuk1; + uint32_t wuk1_sz; + + switch (ctx->cmd) + { + case PTA_CMD_AES128_WrappedKeyGenerate: + wuk1 = wuk; + wuk1_sz = sizeof(sce_aes_wrapped_key_t); + break; + case PTA_CMD_AES256_WrappedKeyGenerate: + wuk1 = wuk; + wuk1_sz = sizeof(sce_aes_wrapped_key_t); + break; + case PTA_CMD_RSA1024_WrappedKeyPairGenerate: + wuk1 = &((sce_rsa1024_wrapped_pair_key_t *)wuk)->priv_key; + wuk1_sz = sizeof(sce_rsa1024_private_wrapped_key_t); + break; + case PTA_CMD_RSA2048_WrappedKeyPairGenerate: + wuk1 = &((sce_rsa2048_wrapped_pair_key_t *)wuk)->priv_key; + wuk1_sz = sizeof(sce_rsa2048_private_wrapped_key_t); + break; + case PTA_CMD_ECC_secp192r1_WrappedKeyPairGenerate: + case PTA_CMD_ECC_secp224r1_WrappedKeyPairGenerate: + case PTA_CMD_ECC_secp256r1_WrappedKeyPairGenerate: + case PTA_CMD_ECC_BrainpoolP512r1_WrappedKeyPairGenerate: + wuk1 = &((sce_ecc_wrapped_pair_key_t *)wuk)->priv_key; + wuk1_sz = sizeof(sce_ecc_private_wrapped_key_t); + break; + default: + fprintf(stderr, "The code to save the wrapped key is not implemented."); + return -1; + } + + printf("Save the generated key to file \"%s\"\n", ctx->wuk1_file); + return save_file(ctx->wuk1_file, wuk1, wuk1_sz); +} + +static int save_generated_key2(struct sample_ctx *ctx, uint32_t *wuk) +{ + void *wuk2; + uint32_t wuk2_sz; + + switch (ctx->cmd) + { + case PTA_CMD_AES128_WrappedKeyGenerate: + case PTA_CMD_AES256_WrappedKeyGenerate: + return 0; + case PTA_CMD_RSA1024_WrappedKeyPairGenerate: + wuk2 = &((sce_rsa1024_wrapped_pair_key_t *)wuk)->pub_key; + wuk2_sz = sizeof(sce_rsa1024_public_wrapped_key_t); + break; + case PTA_CMD_RSA2048_WrappedKeyPairGenerate: + wuk2 = &((sce_rsa2048_wrapped_pair_key_t *)wuk)->pub_key; + wuk2_sz = sizeof(sce_rsa2048_public_wrapped_key_t); + break; + case PTA_CMD_ECC_secp192r1_WrappedKeyPairGenerate: + case PTA_CMD_ECC_secp224r1_WrappedKeyPairGenerate: + case PTA_CMD_ECC_secp256r1_WrappedKeyPairGenerate: + case PTA_CMD_ECC_BrainpoolP512r1_WrappedKeyPairGenerate: + wuk2 = &((sce_ecc_wrapped_pair_key_t *)wuk)->pub_key; + wuk2_sz = sizeof(sce_ecc_public_wrapped_key_t); + break; + default: + fprintf(stderr, "The code to save the wrapped key is not implemented."); + return -1; + } + + printf("Save the generated key to file \"%s\"\n", ctx->wuk2_file); + return save_file(ctx->wuk2_file, wuk2, wuk2_sz); +} + +int gen_key_main(int argc, char *argv[]) +{ + int res; + struct sample_ctx ctx; + + uint32_t wuk_size = sizeof(wuk_buff); + + printf("Parse command line options\n"); + get_args(argc, argv, &ctx); + + printf("Prepare session with the TA\n"); + res = prepare_tee_session(&ctx); + if(res) + goto err; + + printf("Generate the wrapped key with the TA\n"); + res = generate_key(&ctx, wuk_buff, &wuk_size); + if(res) + goto err; + + res = save_generated_key1(&ctx, wuk_buff); + if(res) + goto err; + + res = save_generated_key2(&ctx, wuk_buff); + if(res) + goto err; + +err: + terminate_tee_session(&ctx); + return 0; +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/mac.c b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/mac.c new file mode 100644 index 0000000000000000000000000000000000000000..36ac8ec6b58e66d8f3031754c878de87ecfa9e18 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/mac.c @@ -0,0 +1,315 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2022, Renesas Electronics + */ + +#include +#include +#include +#include +#include +#include +#include + +/* OP-TEE TEE client API (built by optee_client) */ +#include + +/* For the UUID (found in the TA's h-file(s)) */ +#include + +#define AES_BLOCK_SIZE (16) +#define KEY_BUFFER_SIZE (512) +#define DAT_BUFFER_SIZE (1024) + +#define MAC_GEN_MODE (1) +#define MAC_VER_MODE (0) + +struct mac_info { + char *mac_opt; + uint32_t init; + uint32_t update; + uint32_t final; + uint32_t mode; +}; + +/* TEE resources */ +struct sample_ctx { + TEEC_Context ctx; + TEEC_Session sess; + sce_cmac_handle_t mac; + uint32_t init; + uint32_t update; + uint32_t final; + uint32_t mode; + char *msg_file; + char *mac_file; + char *wuk_file; +}; + +extern int load_file(char *file_name, uint32_t *buf, uint32_t *buf_sz); +extern int save_file(char *file_name, uint32_t *buf, uint32_t buf_sz); + +static struct mac_info mac_list[] = { + {"aes128mac_gen", PTA_CMD_AES128CMAC_GenerateInit, PTA_CMD_AES128CMAC_GenerateUpdate, PTA_CMD_AES128CMAC_GenerateFinal, MAC_GEN_MODE}, + {"aes128mac_ver", PTA_CMD_AES128CMAC_VerifyInit, PTA_CMD_AES128CMAC_VerifyUpdate, PTA_CMD_AES128CMAC_VerifyFinal, MAC_VER_MODE}, + {"aes256mac_gen", PTA_CMD_AES256CMAC_GenerateInit, PTA_CMD_AES256CMAC_GenerateUpdate, PTA_CMD_AES256CMAC_GenerateFinal, MAC_GEN_MODE}, + {"aes256mac_ver", PTA_CMD_AES256CMAC_VerifyInit, PTA_CMD_AES256CMAC_VerifyUpdate, PTA_CMD_AES256CMAC_VerifyFinal, MAC_VER_MODE}, + {} +}; + +static uint32_t msg_buff[DAT_BUFFER_SIZE / sizeof(uint32_t)]; +static uint32_t mac_buff[AES_BLOCK_SIZE / sizeof(uint32_t)]; +static uint32_t wuk_buff[KEY_BUFFER_SIZE / sizeof(uint32_t)]; + +static void usage(char *program) +{ + fprintf(stderr, "MAC Generation\n"); + fprintf(stderr, "Usage: %s -m [-t ] \n", program); + fprintf(stderr, "\t-t MAC Generation Algorithm. \n"); + fprintf(stderr, "\t Use default \"aes128mac_gen\" if not set.\n"); + fprintf(stderr, "\t - \"aes128mac_gen\", \"aes256mac_gen\" \n"); + fprintf(stderr, "\t Specify the file name of the wrapped AES key. \n"); + fprintf(stderr, "\t Specify the file name of the message to input. \n"); + fprintf(stderr, "\t Specify the file name of the mac to be output. \n"); + fprintf(stderr, "\n"); + fprintf(stderr, "MAC Verification\n"); + fprintf(stderr, "Usage: %s -m [-t ] \n", program); + fprintf(stderr, "\t-t MAC Verification Algorithm. \n"); + fprintf(stderr, "\t - \"aes128mac_ver\", \"aes256mac_ver\" \n"); + fprintf(stderr, "\t Specify the file name of the wrapped AES key. \n"); + fprintf(stderr, "\t Specify the file name of the message to input. \n"); + fprintf(stderr, "\t Specify the file name of the mac to be input. \n"); + fprintf(stderr, "\n"); + exit(1); +} + +static void get_args(int argc, char *argv[], struct sample_ctx *ctx) +{ + int opt; + char *mac_opt = "aes128mac_gen"; + struct mac_info *info = NULL; + + while (-1 != (opt = getopt(argc, argv, "t:h"))) { + switch (opt) { + case 't': + mac_opt = optarg; + break; + case 'h' : + usage(argv[0]); + break; + default: + usage(argv[0]); + break; + } + } + + for (int i = 0; NULL != mac_list[i].mac_opt; i++) { + if (!strcasecmp(mac_opt, mac_list[i].mac_opt)) { + info = &mac_list[i]; + break; + } + } + if (NULL == info) { + fprintf(stderr, "Bad \"%s\" \n", mac_opt); + usage(argv[0]); + } + + if ((optind + 3) > argc) { + fprintf(stderr, "Cannot find , or \n"); + usage(argv[0]); + } + + ctx->init = info->init; + ctx->update = info->update; + ctx->final = info->final; + ctx->mode = info->mode; + ctx->wuk_file = argv[optind]; + ctx->msg_file = argv[optind + 1]; + ctx->mac_file = argv[optind + 2]; +} + +static int prepare_tee_session(struct sample_ctx *ctx) +{ + TEEC_UUID uuid = PTA_SCE_AES_UUID; + uint32_t origin; + TEEC_Result res; + + /* Initialize a context connecting us to the TEE */ + res = TEEC_InitializeContext(NULL, &ctx->ctx); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InitializeContext failed with code 0x%x\n", res); + return -1; + } + + /* Open a session with the TA */ + res = TEEC_OpenSession(&ctx->ctx, &ctx->sess, &uuid, + TEEC_LOGIN_PUBLIC, NULL, NULL, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_Opensession failed with code 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +static void terminate_tee_session(struct sample_ctx *ctx) +{ + TEEC_CloseSession(&ctx->sess); + TEEC_FinalizeContext(&ctx->ctx); +} + +static int mac_init(struct sample_ctx *ctx, uint32_t *wuk, uint32_t wuk_sz) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT, TEEC_MEMREF_TEMP_INPUT, TEEC_NONE, TEEC_NONE); + + op.params[0].tmpref.buffer = &ctx->mac; + op.params[0].tmpref.size = sizeof(ctx->mac); + op.params[1].tmpref.buffer = wuk; + op.params[1].tmpref.size = wuk_sz; + + res = TEEC_InvokeCommand(&ctx->sess, ctx->init, &op, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InvokeCommand(INIT) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +static int mac_update(struct sample_ctx *ctx, uint32_t *msg, uint32_t msg_sz) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT, TEEC_MEMREF_TEMP_INPUT, TEEC_NONE, TEEC_NONE); + + op.params[0].tmpref.buffer = &ctx->mac; + op.params[0].tmpref.size = sizeof(ctx->mac); + op.params[1].tmpref.buffer = msg; + op.params[1].tmpref.size = msg_sz; + + res = TEEC_InvokeCommand(&ctx->sess, ctx->update, &op, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InvokeCommand(UPDATE) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +static int mac_final(struct sample_ctx *ctx, uint32_t *mac, uint32_t *mac_sz) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + if (MAC_GEN_MODE == ctx->mode) + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT, TEEC_MEMREF_TEMP_INOUT, TEEC_NONE, TEEC_NONE); + else + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT, TEEC_MEMREF_TEMP_INPUT, TEEC_NONE, TEEC_NONE); + + op.params[0].tmpref.buffer = &ctx->mac; + op.params[0].tmpref.size = sizeof(ctx->mac); + op.params[1].tmpref.buffer = mac; + op.params[1].tmpref.size = *mac_sz; + + res = TEEC_InvokeCommand(&ctx->sess, ctx->final, &op, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InvokeCommand(FINAL) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + *mac_sz = op.params[1].tmpref.size; + return 0; +} + +static int msg_auth_code(struct sample_ctx *ctx, uint32_t *wuk, uint32_t wuk_sz, uint32_t *msg, + uint32_t msg_sz, uint32_t *mac, uint32_t *mac_sz) +{ + int res; + int err; + + if (ctx->init) { + res = mac_init(ctx, wuk, wuk_sz); + if (res) + return res; + } + else { + + } + + err = mac_update(ctx, msg, msg_sz); + if (err) + res = err; + + err = mac_final(ctx, mac, mac_sz); + if (!res) + res = err; + + return res; +} + +int mac_main(int argc, char *argv[]) +{ + int res; + struct sample_ctx ctx; + + uint32_t msg_size = sizeof(msg_buff); + uint32_t mac_size = sizeof(mac_buff); + uint32_t wuk_size = sizeof(wuk_buff); + + memset(msg_buff, 0, sizeof(msg_buff)); + memset(mac_buff, 0, sizeof(mac_buff)); + memset(wuk_buff, 0, sizeof(wuk_buff)); + + printf("Parse command line options\n"); + get_args(argc, argv, &ctx); + + printf("Prepare session with the TA\n"); + res = prepare_tee_session(&ctx); + if (res) + goto err; + + printf("Load the wrapped aes key from file \"%s\"\n", ctx.wuk_file); + res = load_file(ctx.wuk_file, wuk_buff, &wuk_size); + if (res) + goto err; + + printf("Load the message from file \"%s\"\n", ctx.msg_file); + res = load_file(ctx.msg_file, msg_buff, &msg_size); + if (res) + goto err; + + if (MAC_GEN_MODE == ctx.mode) { + printf("MAC Generation with TA\n"); + res = msg_auth_code(&ctx, wuk_buff, wuk_size, msg_buff, msg_size, mac_buff, &mac_size); + if (res) + goto err; + + printf("Save the mac to file \"%s\"\n", ctx.mac_file); + res = save_file(ctx.mac_file, mac_buff, mac_size); + if (res) + goto err; + } + else { + printf("Load the mac from file \"%s\"\n", ctx.mac_file); + res = load_file(ctx.mac_file, mac_buff, &mac_size); + if (res) + goto err; + + printf("MAC Verification with TA\n"); + res = msg_auth_code(&ctx, wuk_buff, wuk_size, msg_buff, msg_size, mac_buff, &mac_size); + if (res) + goto err; + + printf("\nMAC Verification Passed.\n\n"); + } + +err: + terminate_tee_session(&ctx); + return 0; +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/main.c b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/main.c new file mode 100644 index 0000000000000000000000000000000000000000..4255542e095272a84075684cd4a75c8adc3de629 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/main.c @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2022, Renesas Electronics + */ +#include +#include +#include +#include +#include +#include +#include +#include + +extern int upd_key_main(int argc, char *argv[]); +extern int gen_key_main(int argc, char *argv[]); +extern int random_main(int argc, char *argv[]); +extern int aes_main(int argc, char *argv[]); +extern int mac_main(int argc, char *argv[]); +extern int sha_main(int argc, char *argv[]); +extern int rsa_sig_main(int argc, char *argv[]); +extern int rsa_enc_main(int argc, char *argv[]); +extern int ecc_sig_main(int argc, char *argv[]); + +static void usage(char *program) +{ + fprintf(stderr, "Usage: %s [Options]\n", program); + fprintf(stderr, "Options:\n"); + fprintf(stderr, "\t-k Wrapped User Key Generation\n"); + fprintf(stderr, "\t-u User Key Update\n"); + fprintf(stderr, "\t-g Random Number Generation\n"); + fprintf(stderr, "\t-a AES Encryption/Decryption\n"); + fprintf(stderr, "\t-m MAC Generation/Verification\n"); + fprintf(stderr, "\t-d HASH Generation \n"); + fprintf(stderr, "\t-r RSA Signature Generation/Verification\n"); + fprintf(stderr, "\t-s RSA Encryption/Decryption\n"); + fprintf(stderr, "\t-e ECDSA Signature Generation/Verification\n"); + fprintf(stderr, "\t-h Print this help\n"); + fprintf(stderr, "\n"); + exit(0); +} + +int main(int argc, char *argv[]) +{ + int opt = 0; + + if (2 > argc) { + usage(argv[0]); + return -1; + } + + opt = getopt(2, argv, "kugamdrseh"); + switch (opt) { + case 'k': + return gen_key_main(argc, argv); + case 'u': + return upd_key_main(argc, argv); + case 'g': + return random_main(argc, argv); + case 'a': + return aes_main(argc, argv); + case 'm': + return mac_main(argc, argv); + case 'd': + return sha_main(argc, argv); + case 'r': + return rsa_sig_main(argc, argv); + case 's': + return rsa_enc_main(argc, argv); + case 'e': + return ecc_sig_main(argc, argv); + case 'h': + usage(argv[0]); + return -1; + default: + usage(argv[0]); + return -1; + } + return 0; +} + +int load_file(char *file_name, uint32_t *buf, uint32_t *buf_sz) +{ + int res = 0; + FILE *fp; + struct stat statBuf; + + if ((!file_name) || (!buf) || (!buf_sz)) { + fprintf(stderr, "load_file: Bad arguments\n"); + return -1; + } + + if (0 != stat(file_name, &statBuf)) { + fprintf(stderr, "Failed to get size: \"%s\"\n", strerror(errno)); + return -1; + } + if (*buf_sz < statBuf.st_size) { + fprintf(stderr, "Bad file size: \"%d\"\n", *buf_sz); + return -1; + } + if ((fp = fopen(file_name, "rb")) == NULL) { + fprintf(stderr, "Failed to open: \"%s\"\n", file_name); + return -1; + } + *buf_sz = statBuf.st_size; + if (*buf_sz > fread(buf, 1, *buf_sz, fp)) { + fprintf(stderr, "Failed to read: \"%s\"\n", strerror(errno)); + res = -1; + } + fclose(fp); + return res; +} + +int save_file(char *file_name, uint32_t *buf, uint32_t buf_sz) +{ + int res = 0; + FILE *fp; + + if ((!file_name) || (!buf)) { + fprintf(stderr, "save_file: Bad arguments\n"); + return -1; + } + + if ((fp = fopen(file_name, "wb")) == NULL) { + fprintf(stderr, "Failed to open: \"%s\"\n", file_name); + return -1; + } + if (buf_sz > fwrite(buf, 1, buf_sz, fp)) { + fprintf(stderr, "Failed to write: \"%s\"\n", strerror(errno)); + res = -1; + } + fclose(fp); + return res; +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/random.c b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/random.c new file mode 100644 index 0000000000000000000000000000000000000000..74db806d9d0df0c680db999bc595ef6ebc3e7f1f --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/random.c @@ -0,0 +1,152 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2022, Renesas Electronics + */ + +#include +#include +#include +#include +#include +#include +#include + +/* OP-TEE TEE client API (built by optee_client) */ +#include + +/* For the UUID (found in the TA's h-file(s)) */ +#include + +#define NUM_OF_RND_GEN (16) +#define RND_BUFFER_SIZE (NUM_OF_RND_GEN * 4) + +/* TEE resources */ +struct sample_ctx { + TEEC_Context ctx; + TEEC_Session sess; + uint32_t num; +}; + +static uint32_t rnd_buff[RND_BUFFER_SIZE / sizeof(uint32_t)]; + +static void usage(char *program) +{ + fprintf(stderr, "Random Number Generation\n"); + fprintf(stderr, "Usage: %s -g [NUMBERS]\n", program); + fprintf(stderr, "\n"); + fprintf(stderr, "\t[NUMBERS] Specify in the range of 1 to %ld.\n", sizeof(rnd_buff)); + fprintf(stderr, "\t Use default 16 if not set.\n"); + fprintf(stderr, "\n"); + exit(1); +} + +static void get_args(int argc, char *argv[], struct sample_ctx *ctx) +{ + int opt; + char *ep; + + ctx->num = 16; + + while (-1 != (opt = getopt(argc, argv, "h"))) { + switch (opt) { + case 'h': + usage(argv[0]); + break; + default: + usage(argv[0]); + break; + } + } + + if ((optind + 1) <= argc) { + ctx->num = strtol(argv[optind], &ep, 0); + if (*ep) { + fprintf(stderr, "Cannot parse [NUMBERS]: \"%s\"", argv[optind]); + usage(argv[0]); + } + } + if ((1 > ctx->num) || (sizeof(rnd_buff) < ctx->num)) { + fprintf(stderr, "Bad [NUMBERS]: \"%d\" \n", ctx->num); + usage(argv[0]); + } +} + +static int prepare_tee_session(struct sample_ctx *ctx) +{ + TEEC_UUID uuid = PTA_SCE_UUID; + uint32_t origin; + TEEC_Result res; + + /* Initialize a context connecting us to the TEE */ + res = TEEC_InitializeContext(NULL, &ctx->ctx); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InitializeContext failed with code 0x%x", res); + return -1; + } + + /* Open a session with the TA */ + res = TEEC_OpenSession(&ctx->ctx, &ctx->sess, &uuid, + TEEC_LOGIN_PUBLIC, NULL, NULL, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_Opensession failed with code 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +static void terminate_tee_session(struct sample_ctx *ctx) +{ + TEEC_CloseSession(&ctx->sess); + TEEC_FinalizeContext(&ctx->ctx); +} + +static int generate_random_number(struct sample_ctx *ctx, uint32_t *buff) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT, TEEC_NONE, TEEC_NONE, TEEC_NONE); + + op.params[0].tmpref.buffer = buff; + op.params[0].tmpref.size = NUM_OF_RND_GEN; + + res = TEEC_InvokeCommand(&ctx->sess, PTA_CMD_RandomNumberGenerate, &op, &origin); + if (res != TEEC_SUCCESS){ + fprintf(stderr, "TEEC_InvokeCommand(GENERATE) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +int random_main(int argc, char *argv[]) +{ + int res; + struct sample_ctx ctx; + + printf("Parse command line options\n"); + get_args(argc, argv, &ctx); + + printf("Prepare session with the TA\n"); + res = prepare_tee_session(&ctx); + if(res) + goto err; + + printf("Generate random number with the TA\n"); + for (int i = 0; i < ctx.num; i += NUM_OF_RND_GEN) { + res = generate_random_number(&ctx, &rnd_buff[i / sizeof(uint32_t)]); + if(res) + goto err; + } + + printf("\nGenerated Random Number :\n"); + for (int i = 0; i < ctx.num; i++) { + printf("0x%02X, ", *((uint8_t *)rnd_buff + i)); + } + printf("\n"); + +err: + terminate_tee_session(&ctx); + return 0; +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/rsa_enc.c b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/rsa_enc.c new file mode 100644 index 0000000000000000000000000000000000000000..477199df5acc8aac44ea3036ce02ee4e2c01b887 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/rsa_enc.c @@ -0,0 +1,227 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2022, Renesas Electronics + */ + +#include +#include +#include +#include +#include +#include +#include + +/* OP-TEE TEE client API (built by optee_client) */ +#include + +/* For the UUID (found in the TA's h-file(s)) */ +#include + +#define DAT_BUFFER_SIZE (HW_SCE_RSA_4096_DATA_BYTE_SIZE) +#define KEY_BUFFER_SIZE (1024) + +#define RSA_ENC_MODE (1) +#define RSA_DEC_MODE (0) + +struct rsa_info { + char *rsa_opt; + uint32_t cmd; + uint32_t mode; +}; + +/* TEE resources */ +struct sample_ctx { + TEEC_Context ctx; + TEEC_Session sess; + uint32_t cmd; + uint32_t mode; + char *inp_file; + char *out_file; + char *wuk_file; +}; + +extern int load_file(char *file_name, uint32_t *buf, uint32_t *buf_sz); +extern int save_file(char *file_name, uint32_t *buf, uint32_t buf_sz); + +static struct rsa_info rsa_list[] = { + {"rsaes_pkcs1024_enc", PTA_CMD_RSAES_PKCS1024_Encrypt, RSA_ENC_MODE}, + {"rsaes_pkcs1024_dec", PTA_CMD_RSAES_PKCS1024_Decrypt, RSA_DEC_MODE}, + {"rsaes_pkcs2048_enc", PTA_CMD_RSAES_PKCS2048_Encrypt, RSA_ENC_MODE}, + {"rsaes_pkcs2048_dec", PTA_CMD_RSAES_PKCS2048_Decrypt, RSA_DEC_MODE}, + {"rsaes_pkcs4096_enc", PTA_CMD_RSAES_PKCS4096_Encrypt, RSA_ENC_MODE}, + {} +}; + +static uint32_t inp_buff[DAT_BUFFER_SIZE / sizeof(uint32_t)]; +static uint32_t out_buff[DAT_BUFFER_SIZE / sizeof(uint32_t)]; +static uint32_t wuk_buff[KEY_BUFFER_SIZE / sizeof(uint32_t)]; + +static void usage(char *program) +{ + fprintf(stderr, "RSA Encryption\n"); + fprintf(stderr, "Usage: %s -s [-t ] \n", program); + fprintf(stderr, "\t-t RSA Encryption Algorithm.\n"); + fprintf(stderr, "\t Use default \"rsassa_pkcs1024_enc\" if not set.\n"); + fprintf(stderr, "\t - \"rsaes_pkcs1024_enc\" \n"); + fprintf(stderr, "\t - \"rsaes_pkcs2048_enc\" \n"); + fprintf(stderr, "\t - \"rsaes_pkcs4096_enc\" \n"); + fprintf(stderr, "\t Specify the file name of the wrapped RSA public key. \n"); + fprintf(stderr, "\t Specify the file name of the plain data to input. \n"); + fprintf(stderr, "\t Specify the file name of the cipher data to be output. \n"); + fprintf(stderr, "\n"); + fprintf(stderr, "RSA Decryption\n"); + fprintf(stderr, "Usage: %s -s [-t ] \n", program); + fprintf(stderr, "\t-t RSA Decryption Algorithm.\n"); + fprintf(stderr, "\t - \"rsaes_pkcs1024_dec\" \n"); + fprintf(stderr, "\t - \"rsaes_pkcs2048_dec\" \n"); + fprintf(stderr, "\t Specify the file name of the wrapped RSA private key. \n"); + fprintf(stderr, "\t Specify the file name of the cipher data to input. \n"); + fprintf(stderr, "\t Specify the file name of the plain data to be output. \n"); + fprintf(stderr, "\n"); + exit(1); +} + +static void get_args(int argc, char *argv[], struct sample_ctx *ctx) +{ + int opt; + char *rsa_opt = "rsaes_pkcs1024_enc"; + struct rsa_info *info = NULL; + + while (-1 != (opt = getopt(argc, argv, "t:h"))) { + switch (opt) { + case 't': + rsa_opt = optarg; + break; + case 'h': + usage(argv[0]); + break; + default: + usage(argv[0]); + break; + } + } + + for (int i = 0; NULL != rsa_list[i].rsa_opt; i++) { + if (!strcasecmp(rsa_opt, rsa_list[i].rsa_opt)) { + info = &rsa_list[i]; + break; + } + } + if (NULL == info) { + fprintf(stderr, "Bad \"%s\" \n", rsa_opt); + usage(argv[0]); + } + + if ((optind + 3) > argc) { + fprintf(stderr, "Cannot find , or . \n"); + usage(argv[0]); + } + + ctx->cmd = info->cmd; + ctx->mode = info->mode; + ctx->wuk_file = argv[optind]; + ctx->inp_file = argv[optind + 1]; + ctx->out_file = argv[optind + 2]; +} + +static int prepare_tee_session(struct sample_ctx *ctx) +{ + TEEC_UUID uuid = PTA_SCE_RSA_UUID; + uint32_t origin; + TEEC_Result res; + + /* Initialize a context connecting us to the TEE */ + res = TEEC_InitializeContext(NULL, &ctx->ctx); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InitializeContext failed with code 0x%x", res); + return -1; + } + + /* Open a session with the TA */ + res = TEEC_OpenSession(&ctx->ctx, &ctx->sess, &uuid, + TEEC_LOGIN_PUBLIC, NULL, NULL, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_Opensession failed with code 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +static void terminate_tee_session(struct sample_ctx *ctx) +{ + TEEC_CloseSession(&ctx->sess); + TEEC_FinalizeContext(&ctx->ctx); +} + +static int cipher_buffer(struct sample_ctx *ctx, uint32_t *wuk, uint32_t wuk_sz, uint32_t *in, + uint32_t in_sz, uint32_t *out, uint32_t *out_sz) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT, TEEC_MEMREF_TEMP_INOUT, + TEEC_MEMREF_TEMP_INPUT, TEEC_NONE); + + op.params[0].tmpref.buffer = in; + op.params[0].tmpref.size = in_sz; + op.params[1].tmpref.buffer = out; + op.params[1].tmpref.size = *out_sz; + op.params[2].tmpref.buffer = wuk; + op.params[2].tmpref.size = wuk_sz; + + res = TEEC_InvokeCommand(&ctx->sess, ctx->cmd, &op, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InvokeCommand(CIPHER) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + *out_sz = op.params[1].tmpref.size; + return 0; +} + +int rsa_enc_main(int argc, char *argv[]) +{ + int res; + struct sample_ctx ctx; + + uint32_t inp_size = sizeof(inp_buff); + uint32_t out_size = sizeof(out_buff); + uint32_t wuk_size = sizeof(wuk_buff); + + memset(inp_buff, 0, sizeof(inp_buff)); + memset(out_buff, 0, sizeof(out_buff)); + memset(wuk_buff, 0, sizeof(wuk_buff)); + + printf("Parse command line options\n"); + get_args(argc, argv, &ctx); + + printf("Prepare session with the TA\n"); + res = prepare_tee_session(&ctx); + if (res) + goto err; + + printf("Load the wrapped rsa key \"%s\"\n", ctx.wuk_file); + res = load_file(ctx.wuk_file, wuk_buff, &wuk_size); + if (res) + goto err; + + printf("Load the input data from file \"%s\"\n", ctx.inp_file); + res = load_file(ctx.inp_file, inp_buff, &inp_size); + if (res) + goto err; + + printf("Encode/Decode buffer from TA\n"); + res = cipher_buffer(&ctx, wuk_buff, wuk_size, inp_buff, inp_size, out_buff, &out_size); + if (res) + goto err; + + printf("Save the output data to file \"%s\"\n", ctx.out_file); + res = save_file(ctx.out_file, out_buff, out_size); + if (res) + goto err; + +err: + terminate_tee_session(&ctx); + return 0; +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/rsa_sig.c b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/rsa_sig.c new file mode 100644 index 0000000000000000000000000000000000000000..e23ad22ce90d8f1722663602ae76777415697241 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/rsa_sig.c @@ -0,0 +1,269 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2022, Renesas Electronics + */ + +#include +#include +#include +#include +#include +#include +#include + +/* OP-TEE TEE client API (built by optee_client) */ +#include + +/* For the UUID (found in the TA's h-file(s)) */ +#include + +#define SIG_BUFFER_SIZE (1024) +#define KEY_BUFFER_SIZE (1024) +#define DAT_BUFFER_SIZE (512) + +#define RSA_GEN_MODE (1) +#define RSA_VER_MODE (0) + +struct rsa_info { + char *rsa_opt; + uint32_t cmd; + uint32_t mode; +}; + +/* TEE resources */ +struct sample_ctx { + TEEC_Context ctx; + TEEC_Session sess; + uint32_t cmd; + uint32_t mode; + char *msg_file; + char *sig_file; + char *wuk_file; +}; + +extern int load_file(char *file_name, uint32_t *buf, uint32_t *buf_sz); +extern int save_file(char *file_name, uint32_t *buf, uint32_t buf_sz); + +static struct rsa_info rsa_list[] = { + {"rsassa_pkcs1024_gen", PTA_CMD_RSASSA_PKCS1024_SignatureGenerate, RSA_GEN_MODE}, + {"rsassa_pkcs1024_ver", PTA_CMD_RSASSA_PKCS1024_SignatureVerify, RSA_VER_MODE}, + {"rsassa_pkcs2048_gen", PTA_CMD_RSASSA_PKCS2048_SignatureGenerate, RSA_GEN_MODE}, + {"rsassa_pkcs2048_ver", PTA_CMD_RSASSA_PKCS2048_SignatureVerify, RSA_VER_MODE}, + {"rsassa_pkcs4096_ver", PTA_CMD_RSASSA_PKCS4096_SignatureVerify, RSA_VER_MODE}, + {} +}; + +static uint32_t msg_buff[DAT_BUFFER_SIZE / sizeof(uint32_t)]; +static uint32_t sig_buff[SIG_BUFFER_SIZE / sizeof(uint32_t)]; +static uint32_t wuk_buff[KEY_BUFFER_SIZE / sizeof(uint32_t)]; + +static void usage(char *program) +{ + fprintf(stderr, "RSA Signature Generation\n"); + fprintf(stderr, "Usage: %s -r [-t ] \n", program); + fprintf(stderr, "\t-t Signature Generation Algorithm. \n"); + fprintf(stderr, "\t Use default \"rsassa_pkcs1024_gen\" if not set.\n"); + fprintf(stderr, "\t - \"rsassa_pkcs1024_gen\" \n"); + fprintf(stderr, "\t - \"rsassa_pkcs2048_gen\" \n"); + fprintf(stderr, "\t Specify the file name of the wrapped RSA private key. \n"); + fprintf(stderr, "\t Specify the file name of the message to input. \n"); + fprintf(stderr, "\t Specify the file name of the signature to be output. \n"); + fprintf(stderr, "\n"); + fprintf(stderr, "RSA Signature Verification\n"); + fprintf(stderr, "Usage: %s -r [-t ] \n", program); + fprintf(stderr, "\t-t Signature Verification Algorithm. \n"); + fprintf(stderr, "\t - \"rsassa_pkcs1024_ver\" \n"); + fprintf(stderr, "\t - \"rsassa_pkcs2048_ver\" \n"); + fprintf(stderr, "\t - \"rsassa_pkcs4096_ver\" \n"); + fprintf(stderr, "\t Specify the file name of the wrapped RSA public key. \n"); + fprintf(stderr, "\t Specify the file name of the message to input. \n"); + fprintf(stderr, "\t Specify the file name of the signature to input. \n"); + fprintf(stderr, "\n"); + exit(1); +} + +static void get_args(int argc, char *argv[], struct sample_ctx *ctx) +{ + int opt; + char *rsa_opt = "rsassa_pkcs1024_gen"; + struct rsa_info *info = NULL; + + while (-1 != (opt = getopt(argc, argv, "t:h"))) { + switch (opt) { + case 't': + rsa_opt = optarg; + break; + case 'h': + usage(argv[0]); + break; + default: + usage(argv[0]); + break; + } + } + + for (int i = 0; NULL != rsa_list[i].rsa_opt; i++) { + if (!strcasecmp(rsa_opt, rsa_list[i].rsa_opt)) { + info = &rsa_list[i]; + break; + } + } + if (NULL == info) { + fprintf(stderr, "Bad \"%s\" \n", rsa_opt); + usage(argv[0]); + } + + if ((optind + 3) > argc) { + fprintf(stderr, "Cannot find , or . \n"); + usage(argv[0]); + } + + ctx->cmd = info->cmd; + ctx->mode = info->mode; + ctx->wuk_file = argv[optind]; + ctx->msg_file = argv[optind + 1]; + ctx->sig_file = argv[optind + 2]; +} + +static int prepare_tee_session(struct sample_ctx *ctx) +{ + TEEC_UUID uuid = PTA_SCE_RSA_UUID; + uint32_t origin; + TEEC_Result res; + + /* Initialize a context connecting us to the TEE */ + res = TEEC_InitializeContext(NULL, &ctx->ctx); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InitializeContext failed with code 0x%x", res); + return -1; + } + + /* Open a session with the TA */ + res = TEEC_OpenSession(&ctx->ctx, &ctx->sess, &uuid, + TEEC_LOGIN_PUBLIC, NULL, NULL, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_Opensession failed with code 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +static void terminate_tee_session(struct sample_ctx *ctx) +{ + TEEC_CloseSession(&ctx->sess); + TEEC_FinalizeContext(&ctx->ctx); +} + +static int generate_signature(struct sample_ctx *ctx, uint32_t *wuk, uint32_t wuk_sz, uint32_t *msg, + uint32_t msg_sz, uint32_t *sig, uint32_t *sig_sz) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT, TEEC_MEMREF_TEMP_INOUT, + TEEC_MEMREF_TEMP_INPUT, TEEC_NONE); + + op.params[0].tmpref.buffer = msg; + op.params[0].tmpref.size = msg_sz; + op.params[1].tmpref.buffer = sig; + op.params[1].tmpref.size = *sig_sz; + op.params[2].tmpref.buffer = wuk; + op.params[2].tmpref.size = wuk_sz; + + res = TEEC_InvokeCommand(&ctx->sess, ctx->cmd, &op, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InvokeCommand(GENERATE) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + *sig_sz = op.params[1].tmpref.size; + return 0; +} + +static int verify_signature(struct sample_ctx *ctx, uint32_t *wuk, uint32_t wuk_sz, uint32_t *msg, + uint32_t msg_sz, uint32_t *sig, uint32_t sig_sz) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT, TEEC_MEMREF_TEMP_INPUT, + TEEC_MEMREF_TEMP_INPUT, TEEC_NONE); + + op.params[0].tmpref.buffer = sig; + op.params[0].tmpref.size = sig_sz; + op.params[1].tmpref.buffer = msg; + op.params[1].tmpref.size = msg_sz; + op.params[2].tmpref.buffer = wuk; + op.params[2].tmpref.size = wuk_sz; + + res = TEEC_InvokeCommand(&ctx->sess, ctx->cmd, &op, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InvokeCommand(VERIFY) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +int rsa_sig_main(int argc, char *argv[]) +{ + int res; + struct sample_ctx ctx; + + uint32_t msg_size = sizeof(msg_buff); + uint32_t sig_size = sizeof(sig_buff); + uint32_t wuk_size = sizeof(wuk_buff); + + memset(msg_buff, 0, sizeof(msg_buff)); + memset(sig_buff, 0, sizeof(sig_buff)); + memset(wuk_buff, 0, sizeof(wuk_buff)); + + printf("Parse command line options\n"); + get_args(argc, argv, &ctx); + + printf("Prepare session with the TA\n"); + res = prepare_tee_session(&ctx); + if (res) + goto err; + + printf("Load the wrapped rsa key \"%s\"\n", ctx.wuk_file); + res = load_file(ctx.wuk_file, wuk_buff, &wuk_size); + if (res) + goto err; + + printf("Load the message from file \"%s\"\n", ctx.msg_file); + res = load_file(ctx.msg_file, msg_buff, &msg_size); + if (res) + goto err; + + if (RSA_GEN_MODE == ctx.mode) { + printf("Generate the signature with TA\n"); + res = generate_signature(&ctx, wuk_buff, wuk_size, msg_buff, msg_size, sig_buff, &sig_size); + if (res) + goto err; + + printf("Save the generated signature to file \"%s\"\n", ctx.sig_file); + res = save_file(ctx.sig_file, sig_buff, sig_size); + if (res) + goto err; + } + else { + printf("Load the signature from file \"%s\"\n", ctx.sig_file); + res = load_file(ctx.sig_file, sig_buff, &sig_size); + if (res) + goto err; + + printf("Verify the signature with TA\n"); + res = verify_signature(&ctx, wuk_buff, wuk_size, msg_buff, msg_size, sig_buff, sig_size); + if (res) + goto err; + + printf("\nSignature Verification Passed.\n\n"); + } + +err: + terminate_tee_session(&ctx); + return 0; +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/sha.c b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/sha.c new file mode 100644 index 0000000000000000000000000000000000000000..88eaa89e970590be063939e03f00496462e89281 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/sha.c @@ -0,0 +1,260 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2022, Renesas Electronics + */ + +#include +#include +#include +#include +#include +#include +#include + +/* OP-TEE TEE client API (built by optee_client) */ +#include + +/* For the UUID (found in the TA's h-file(s)) */ +#include + +#define MSG_DIGEST_SIZE (64) +#define DAT_BUFFER_SIZE (256) + +struct sha_info { + char *sha_opt; + uint32_t init; + uint32_t update; + uint32_t final; +}; + +/* TEE resources */ +struct sample_ctx { + TEEC_Context ctx; + TEEC_Session sess; + sce_sha_md5_handle_t sha; + uint32_t init; + uint32_t update; + uint32_t final; + char *msg_file; +}; + +extern int load_file(char *file_name, uint32_t *buf, uint32_t *buf_sz); + +static struct sha_info sha_list[] = { + {"sha224", PTA_CMD_SHA224_Init, PTA_CMD_SHA224_Update, PTA_CMD_SHA224_Final}, + {"sha256", PTA_CMD_SHA256_Init, PTA_CMD_SHA256_Update, PTA_CMD_SHA256_Final}, + {} +}; + +static uint32_t msg_buff[DAT_BUFFER_SIZE / sizeof(uint32_t)]; +static uint32_t out_buff[MSG_DIGEST_SIZE / sizeof(uint32_t)]; + +static void usage(char *program) +{ + fprintf(stderr, "Hash Value Generation\n"); + fprintf(stderr, "Usage: %s -d [-t ] \n", program); + fprintf(stderr, "\t-t Secure Hash Algorithm. \n"); + fprintf(stderr, "\t Use default \"sha224\" if not set.\n"); + fprintf(stderr, "\t - \"sha224\" \n"); + fprintf(stderr, "\t - \"sha256\" \n"); + fprintf(stderr, "\t Specify the file name of the message to input. \n"); + fprintf(stderr, "\n"); + exit(1); +} + +static void get_args(int argc, char *argv[], struct sample_ctx *ctx) +{ + int opt; + char *sha_opt = "sha224"; + struct sha_info *info = NULL; + + + while (-1 != (opt = getopt(argc, argv, "t:h"))) { + switch (opt) { + case 't': + sha_opt = optarg; + break; + case 'h' : + usage(argv[0]); + break; + default: + usage(argv[0]); + break; + } + } + + for (int i = 0; NULL != sha_list[i].sha_opt; i++) { + if (!strcasecmp(sha_opt, sha_list[i].sha_opt)) { + info = &sha_list[i]; + break; + } + } + if (NULL == info) { + fprintf(stderr, "Bad \"%s\" \n", sha_opt); + usage(argv[0]); + } + + if ((optind + 1) > argc) { + fprintf(stderr, "Cannot find \n"); + usage(argv[0]); + } + + ctx->init = info->init; + ctx->update = info->update; + ctx->final = info->final; + ctx->msg_file = argv[optind]; +} + +static int prepare_tee_session(struct sample_ctx *ctx) +{ + TEEC_UUID uuid = PTA_SCE_SHA_UUID; + uint32_t origin; + TEEC_Result res; + + /* Initialize a context connecting us to the TEE */ + res = TEEC_InitializeContext(NULL, &ctx->ctx); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InitializeContext failed with code 0x%x\n", res); + return -1; + } + + /* Open a session with the TA */ + res = TEEC_OpenSession(&ctx->ctx, &ctx->sess, &uuid, + TEEC_LOGIN_PUBLIC, NULL, NULL, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_Opensession failed with code 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +static void terminate_tee_session(struct sample_ctx *ctx) +{ + TEEC_CloseSession(&ctx->sess); + TEEC_FinalizeContext(&ctx->ctx); +} + +static int sha_init(struct sample_ctx *ctx) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT, TEEC_NONE, TEEC_NONE, TEEC_NONE); + + op.params[0].tmpref.buffer = &ctx->sha; + op.params[0].tmpref.size = sizeof(ctx->sha); + + res = TEEC_InvokeCommand(&ctx->sess, ctx->init, &op, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InvokeCommand(INIT) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +static int sha_update(struct sample_ctx *ctx, uint32_t *in, uint32_t in_sz) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT, TEEC_MEMREF_TEMP_INPUT, TEEC_NONE, TEEC_NONE); + + op.params[0].tmpref.buffer = &ctx->sha; + op.params[0].tmpref.size = sizeof(ctx->sha); + op.params[1].tmpref.buffer = in; + op.params[1].tmpref.size = in_sz; + + res = TEEC_InvokeCommand(&ctx->sess, ctx->update, &op, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InvokeCommand(UPDATE) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +static int sha_final(struct sample_ctx *ctx, uint32_t *out, uint32_t *out_sz) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT, TEEC_MEMREF_TEMP_INOUT, TEEC_NONE, TEEC_NONE); + + op.params[0].tmpref.buffer = &ctx->sha; + op.params[0].tmpref.size = sizeof(ctx->sha); + op.params[1].tmpref.buffer = out; + op.params[1].tmpref.size = *out_sz; + + res = TEEC_InvokeCommand(&ctx->sess, ctx->final, &op, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InvokeCommand(FINAL) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + *out_sz = op.params[1].tmpref.size; + return 0; +} + +static int generate_hash(struct sample_ctx *ctx, uint32_t *in, uint32_t in_sz, uint32_t *out, uint32_t *out_sz) +{ + int res; + int err; + + res = sha_init(ctx); + if (res) + return res; + + err = sha_update(ctx, in, in_sz); + if (err) + res = err; + + err = sha_final(ctx, out, out_sz); + if (!res) + res = err; + + return res; +} + +int sha_main(int argc, char *argv[]) +{ + int res; + struct sample_ctx ctx; + + uint32_t msg_size = sizeof(msg_buff); + uint32_t out_size = sizeof(out_buff); + + memset(msg_buff, 0, sizeof(msg_buff)); + memset(out_buff, 0, sizeof(out_buff)); + + printf("Parse command line options\n"); + get_args(argc, argv, &ctx); + + printf("Prepare session with the TA\n"); + res = prepare_tee_session(&ctx); + if (res) + goto err; + + printf("Load the message from file \"%s\"\n", ctx.msg_file); + res = load_file(ctx.msg_file, msg_buff, &msg_size); + if (res) + goto err; + + printf("Generate hash with TA\n"); + res = generate_hash(&ctx, msg_buff, msg_size, out_buff, &out_size); + if (res) + goto err; + + printf("\nHash Data : 0x"); + for (int i = 0; i < out_size; i++) { + printf("%02X", *((uint8_t *)out_buff + i)); + } + printf("\n\n"); + +err: + terminate_tee_session(&ctx); + return 0; +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/upd_key.c b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/upd_key.c new file mode 100644 index 0000000000000000000000000000000000000000..41ee2bebe3f0e604be44cd5d4cda57080fd1acf5 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/host/upd_key.c @@ -0,0 +1,225 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2022, Renesas Electronics + */ + +#include +#include +#include +#include +#include +#include +#include + +/* OP-TEE TEE client API (built by optee_client) */ +#include + +/* For the UUID (found in the TA's h-file(s)) */ +#include + +#define KEY_BUFFER_SIZE (1000) + +struct key_info { + char * key_opt; + uint32_t cmd; +}; + +/* TEE resources */ +struct sample_ctx { + TEEC_Context ctx; + TEEC_Session sess; + sce_key_update_key_t kuk; + uint32_t cmd; + char *euk_file; + char *wuk_file; +}; + +extern int load_file(char *file_name, uint32_t *buf, uint32_t *buf_sz); +extern int save_file(char *file_name, uint32_t *buf, uint32_t buf_sz); + +static struct key_info key_list[] = { + {"aes128", PTA_CMD_AES128_EncryptedKeyWrap}, + {"aes256", PTA_CMD_AES256_EncryptedKeyWrap}, + {"rsa1024pub", PTA_CMD_RSA1024_EncryptedPublicKeyWrap}, + {"rsa1024pri", PTA_CMD_RSA1024_EncryptedPrivateKeyWrap}, + {"rsa2048pub", PTA_CMD_RSA2048_EncryptedPublicKeyWrap}, + {"rsa2048pri", PTA_CMD_RSA2048_EncryptedPrivateKeyWrap}, + {"rsa4096pub", PTA_CMD_RSA4096_EncryptedPublicKeyWrap}, + {"nistp192pub", PTA_CMD_ECC_secp192r1_EncryptedPublicKeyWrap}, + {"nistp192pri", PTA_CMD_ECC_secp192r1_EncryptedPrivateKeyWrap}, + {"nistp224pub", PTA_CMD_ECC_secp224r1_EncryptedPublicKeyWrap}, + {"nistp224pri", PTA_CMD_ECC_secp224r1_EncryptedPrivateKeyWrap}, + {"nistp256pub", PTA_CMD_ECC_secp256r1_EncryptedPublicKeyWrap}, + {"nistp256pri", PTA_CMD_ECC_secp256r1_EncryptedPrivateKeyWrap}, + {"bsip512r1pub", PTA_CMD_ECC_BrainpoolP512r1_EncryptedPublicKeyWrap}, + {"bsip512r1pri", PTA_CMD_ECC_BrainpoolP512r1_EncryptedPrivateKeyWrap}, + {}, +}; + +static uint32_t kuk_buff [16] = { +#error "Write the Wrapped Key Update Key here." +}; + +static uint32_t iv0_buff[4] = { +#error "Write the initialization vector for key update here." +}; + +static uint32_t euk_buff[KEY_BUFFER_SIZE / sizeof(uint32_t)]; +static uint32_t wuk_buff[KEY_BUFFER_SIZE / sizeof(uint32_t)]; + +static void usage(char *program) +{ + fprintf(stderr, "User Key Update\n"); + fprintf(stderr, "Usage: %s -u [-t ] \n", program); + fprintf(stderr, "\t-t update Key Type. \n"); + fprintf(stderr, "\t Use default \"aes128\" if not set.\n"); + fprintf(stderr, "\t - \"aes128\", \"aes256\" \n"); + fprintf(stderr, "\t - \"rsa1024pub\", \"rsa1024pri\" \n"); + fprintf(stderr, "\t - \"rsa2048pub\", \"rsa2048pri\" \n"); + fprintf(stderr, "\t - \"rsa4096pub\" \n"); + fprintf(stderr, "\t - \"nistp192pub\", \"nistp192pri\" \n"); + fprintf(stderr, "\t - \"nistp224pub\", \"nistp224pri\" \n"); + fprintf(stderr, "\t - \"nistp256pub\", \"nistp256pri\" \n"); + fprintf(stderr, "\t - \"bsip512r1pub\", \"bsip512r1pri\" \n"); + fprintf(stderr, "\t File name of the encrypted user key to input. \n"); + fprintf(stderr, "\t File name of the wrapped user key to be output. \n"); + fprintf(stderr, "\n"); + exit(1); +} + +static void get_args(int argc, char *argv[], struct sample_ctx *ctx) +{ + int opt; + char *key_opt = "aes128"; + struct key_info *info = NULL; + + while (-1 != (opt = getopt(argc, argv, "t:h"))) { + switch (opt) { + case 't': + key_opt = optarg; + break; + case 'h': + usage(argv[0]); + break; + default: + usage(argv[0]); + break; + } + } + + for (int i = 0; NULL != key_list[i].key_opt; i++) { + if (!strcasecmp(key_opt, key_list[i].key_opt)) { + info = &key_list[i]; + break; + } + } + if (NULL == info) { + fprintf(stderr, "Bad \"%s\" \n", key_opt); + usage(argv[0]); + } + + if ((optind + 2) > argc) { + fprintf(stderr, "Cannot find the or \n"); + usage(argv[0]); + } + + ctx->cmd = info->cmd; + ctx->euk_file = argv[optind]; + ctx->wuk_file = argv[optind + 1]; +} + +static int prepare_tee_session(struct sample_ctx *ctx) +{ + TEEC_UUID uuid = PTA_SCE_UUID; + uint32_t origin; + TEEC_Result res; + + /* Initialize a context connecting us to the TEE */ + res = TEEC_InitializeContext(NULL, &ctx->ctx); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InitializeContext failed with code 0x%x", res); + return -1; + } + + /* Open a session with the TA */ + res = TEEC_OpenSession(&ctx->ctx, &ctx->sess, &uuid, + TEEC_LOGIN_PUBLIC, NULL, NULL, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_Opensession failed with code 0x%x origin 0x%x\n", res, origin); + return -1; + } + return 0; +} + +static void terminate_tee_session(struct sample_ctx *ctx) +{ + TEEC_CloseSession(&ctx->sess); + TEEC_FinalizeContext(&ctx->ctx); +} + +static int update_encrypted_user_key(struct sample_ctx *ctx, uint32_t *euk, uint32_t euk_sz, + uint32_t *wuk, uint32_t * wuk_sz) +{ + TEEC_Operation op; + uint32_t origin; + TEEC_Result res; + + memset(&op, 0, sizeof(op)); + op.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT, TEEC_MEMREF_TEMP_INPUT, + TEEC_MEMREF_TEMP_INPUT, TEEC_MEMREF_TEMP_INOUT); + + memcpy((ctx->kuk).value, kuk_buff, sizeof((ctx->kuk).value)); + + op.params[0].tmpref.buffer = iv0_buff; + op.params[0].tmpref.size = sizeof(iv0_buff); + op.params[1].tmpref.buffer = euk; + op.params[1].tmpref.size = euk_sz; + op.params[2].tmpref.buffer = &ctx->kuk; + op.params[2].tmpref.size = sizeof(ctx->kuk); + op.params[3].tmpref.buffer = wuk; + op.params[3].tmpref.size = *wuk_sz; + + res = TEEC_InvokeCommand(&ctx->sess, ctx->cmd, &op, &origin); + if (res != TEEC_SUCCESS) { + fprintf(stderr, "TEEC_InvokeCommand(UPDATE) failed 0x%x origin 0x%x\n", res, origin); + return -1; + } + *wuk_sz = op.params[3].tmpref.size; + return 0; +} + +int upd_key_main(int argc, char *argv[]) +{ + int res; + struct sample_ctx ctx; + + uint32_t euk_size = sizeof(euk_buff); + uint32_t wuk_size = sizeof(wuk_buff); + + printf("Parse command line options\n"); + get_args(argc, argv, &ctx); + + printf("Prepare session with the TA\n"); + res = prepare_tee_session(&ctx); + if(res) + goto err; + + printf("Load the encrypted user key \"%s\"\n", ctx.euk_file); + res = load_file(ctx.euk_file, euk_buff, &euk_size); + if(res) + goto err; + + printf("Update the encrypted user key with the TA\n"); + res = update_encrypted_user_key(&ctx, euk_buff, euk_size, wuk_buff, &wuk_size); + if(res) + goto err; + + printf("Save the new key to file \"%s\"\n", ctx.wuk_file); + res = save_file(ctx.wuk_file, wuk_buff, wuk_size); + if(res) + goto err; + +err: + terminate_tee_session(&ctx); + return 0; +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/pta_sce.h b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/pta_sce.h new file mode 100644 index 0000000000000000000000000000000000000000..790d6c60e53a85779242e56e8a584aa049f6dd8a --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/pta_sce.h @@ -0,0 +1,179 @@ +// SPDX-License-Identifier: BSD-2-Clause +/* + * Copyright (c) 2022, Renesas Electronics + */ +#ifndef __PTA_SCE_H +#define __PTA_SCE_H + +#include + +#define PTA_SCE_UUID \ + { 0x3b221d77, 0xe679, 0x4ca5, \ + { 0xa4, 0x48, 0x1f, 0x9f, 0x16, 0x02, 0x15, 0xc5 } } + +/* + * [in/out] memref[0] : Wrapped key (sce_aes_wrapped_key_t) + */ +#define PTA_CMD_AES128_WrappedKeyGenerate (0x00010000) + +/* + * [in/out] memref[0] : Wrapped key (sce_aes_wrapped_key_t) + */ +#define PTA_CMD_AES256_WrappedKeyGenerate (0x00010100) + +/* + * [in/out] memref[0] : Wrapped key (sce_rsa1024_wrapped_pair_key_t) + */ +#define PTA_CMD_RSA1024_WrappedKeyPairGenerate (0x00011000) + +/* + * [in/out] memref[0] : Wrapped key (sce_rsa2048_wrapped_pair_key_t) + */ +#define PTA_CMD_RSA2048_WrappedKeyPairGenerate (0x00011100) + +/* + * [in/out] memref[0] : Wrapped key (sce_ecc_wrapped_pair_key_t) + */ +#define PTA_CMD_ECC_secp192r1_WrappedKeyPairGenerate (0x00012000) + +/* + * [in/out] memref[0] : Wrapped key (sce_ecc_wrapped_pair_key_t) + */ +#define PTA_CMD_ECC_secp224r1_WrappedKeyPairGenerate (0x00012100) + +/* + * [in/out] memref[0] : Wrapped key (sce_ecc_wrapped_pair_key_t) + */ +#define PTA_CMD_ECC_secp256r1_WrappedKeyPairGenerate (0x00012200) + +/* + * [in/out] memref[0] : Wrapped key (sce_ecc_wrapped_pair_key_t) + */ +#define PTA_CMD_ECC_BrainpoolP512r1_WrappedKeyPairGenerate (0x00013000) + +/* + * [in/out] memref[0] : random data (16byte) + */ +#define PTA_CMD_RandomNumberGenerate (0x00014000) + +/* + * [in] memref[0] : Initial vector (16byte) + * [in] memref[1] : Encrypted Key (32byte) + * [in] memref[2] : Key Update Key (sce_key_update_key_t) + * [in/out] memref[3] : Wrapped key (sce_aes_wrapped_key_t) + */ +#define PTA_CMD_AES128_EncryptedKeyWrap (0x00015000) + +/* + * [in] memref[0] : Initial vector (16byte) + * [in] memref[1] : Encrypted Key (64byte) + * [in] memref[2] : Key Update Key (sce_key_update_key_t) + * [in/out] memref[3] : Wrapped key (sce_aes_wrapped_key_t) + */ +#define PTA_CMD_AES256_EncryptedKeyWrap (0x00015100) + +/* + * [in] memref[0] : Initial vector (16byte) + * [in] memref[1] : Encrypted Key (160byte) + * [in] memref[2] : Key Update Key (sce_key_update_key_t) + * [in/out] memref[3] : Wrapped key (sce_rsa1024_public_wrapped_key_t) + */ +#define PTA_CMD_RSA1024_EncryptedPublicKeyWrap (0x00016000) + +/* + * [in] memref[0] : Initial vector (16byte) + * [in] memref[1] : Encrypted Key (272byte) + * [in] memref[2] : Key Update Key (sce_key_update_key_t) + * [in/out] memref[3] : Wrapped key (sce_rsa1024_private_wrapped_key_t) + */ +#define PTA_CMD_RSA1024_EncryptedPrivateKeyWrap (0x00016010) + +/* + * [in] memref[0] : Initial vector (16byte) + * [in] memref[1] : Encrypted Key (288byte) + * [in] memref[2] : Key Update Key (sce_key_update_key_t) + * [in/out] memref[3] : Wrapped key (sce_rsa2048_public_wrapped_key_t) + */ +#define PTA_CMD_RSA2048_EncryptedPublicKeyWrap (0x00016100) + +/* + * [in] memref[0] : Initial vector (16byte) + * [in] memref[1] : Encrypted Key (528byte) + * [in] memref[2] : Key Update Key (sce_key_update_key_t) + * [in/out] memref[3] : Wrapped key (sce_rsa2048_private_wrapped_key_t) + */ +#define PTA_CMD_RSA2048_EncryptedPrivateKeyWrap (0x00016110) + +/* + * [in] memref[0] : Initial vector (16byte) + * [in] memref[1] : Encrypted Key (544byte) + * [in] memref[2] : Key Update Key (sce_key_update_key_t) + * [in/out] memref[3] : Wrapped key (sce_rsa4096_public_wrapped_key_t) + */ +#define PTA_CMD_RSA4096_EncryptedPublicKeyWrap (0x00016200) + +/* + * [in] memref[0] : Initial vector (16byte) + * [in] memref[1] : Encrypted Key (80byte) + * [in] memref[2] : Key Update Key (sce_key_update_key_t) + * [in/out] memref[3] : Wrapped key (sce_ecc_public_wrapped_key_t) + */ +#define PTA_CMD_ECC_secp192r1_EncryptedPublicKeyWrap (0x00017000) + +/* + * [in] memref[0] : Initial vector (16byte) + * [in] memref[1] : Encrypted Key (48byte) + * [in] memref[2] : Key Update Key (sce_key_update_key_t) + * [in/out] memref[3] : Wrapped key (sce_ecc_private_wrapped_key_t) + */ +#define PTA_CMD_ECC_secp192r1_EncryptedPrivateKeyWrap (0x00017010) + +/* + * [in] memref[0] : Initial vector (16byte) + * [in] memref[1] : Encrypted Key (80byte) + * [in] memref[2] : Key Update Key (sce_key_update_key_t) + * [in/out] memref[3] : Wrapped key (sce_ecc_public_wrapped_key_t) + */ +#define PTA_CMD_ECC_secp224r1_EncryptedPublicKeyWrap (0x00017100) + +/* + * [in] memref[0] : Initial vector (16byte) + * [in] memref[1] : Encrypted Key (48byte) + * [in] memref[2] : Key Update Key (sce_key_update_key_t) + * [in/out] memref[3] : Wrapped key (sce_ecc_private_wrapped_key_t) + */ +#define PTA_CMD_ECC_secp224r1_EncryptedPrivateKeyWrap (0x00017110) + +/* + * [in] memref[0] : Initial vector (16byte) + * [in] memref[1] : Encrypted Key (80byte) + * [in] memref[2] : Key Update Key (sce_key_update_key_t) + * [in/out] memref[3] : Wrapped key (sce_ecc_public_wrapped_key_t) + */ +#define PTA_CMD_ECC_secp256r1_EncryptedPublicKeyWrap (0x00017200) + +/* + * [in] memref[0] : Initial vector (16byte) + * [in] memref[1] : Encrypted Key (48byte) + * [in] memref[2] : Key Update Key (sce_key_update_key_t) + * [in/out] memref[3] : Wrapped key (sce_ecc_private_wrapped_key_t) + */ +#define PTA_CMD_ECC_secp256r1_EncryptedPrivateKeyWrap (0x00017210) + +/* + * [in] memref[0] : Initial vector (16byte) + * [in] memref[1] : Encrypted Key (144byte) + * [in] memref[2] : Key Update Key (sce_key_update_key_t) + * [in/out] memref[3] : Wrapped key (sce_ecc_public_wrapped_key_t) + */ +#define PTA_CMD_ECC_BrainpoolP512r1_EncryptedPublicKeyWrap (0x00018000) + +/* + * [in] memref[0] : Initial vector (16byte) + * [in] memref[1] : Encrypted Key (80byte) + * [in] memref[2] : Key Update Key (sce_key_update_key_t) + * [in/out] memref[3] : Wrapped key (sce_ecc_private_wrapped_key_t) + */ +#define PTA_CMD_ECC_BrainpoolP512r1_EncryptedPrivateKeyWrap (0x00018010) + +#endif /* __PTA_SCE_H */ diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/pta_sce_aes.h b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/pta_sce_aes.h new file mode 100644 index 0000000000000000000000000000000000000000..7d552797b655ecc27ffad0d7abb6a4b2213463fb --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/pta_sce_aes.h @@ -0,0 +1,279 @@ +// SPDX-License-Identifier: BSD-2-Clause +/* + * Copyright (c) 2022, Renesas Electronics + */ +#ifndef __PTA_SCE_AES_H +#define __PTA_SCE_AES_H + +#include + +#define PTA_SCE_AES_UUID \ + { 0x4be7b9c4, 0x4951, 0x4105, \ + { 0xa3, 0xd3, 0x08, 0x1b, 0x50, 0x98, 0x10, 0xef } } + +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : Wrapped key (sce_aes_wrapped_key_t) + */ +#define PTA_CMD_AES128ECB_EncryptInit (0x00020001) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : plain (length must be a multiple of 16) + * [in/out] memref[2] : cipher + */ +#define PTA_CMD_AES128ECB_EncryptUpdate (0x00020002) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + */ +#define PTA_CMD_AES128ECB_EncryptFinal (0x00020003) + +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : Wrapped key (sce_aes_wrapped_key_t) + */ +#define PTA_CMD_AES128ECB_DecryptInit (0x00020011) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : cipher (length must be a multiple of 16) + * [in/out] memref[2] : plain + */ +#define PTA_CMD_AES128ECB_DecryptUpdate (0x00020012) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + */ +#define PTA_CMD_AES128ECB_DecryptFinal (0x00020013) + +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : Wrapped key (sce_aes_wrapped_key_t) + */ +#define PTA_CMD_AES256ECB_EncryptInit (0x00020101) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : plain (length must be a multiple of 16) + * [in/out] memref[2] : cipher + */ +#define PTA_CMD_AES256ECB_EncryptUpdate (0x00020102) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + */ +#define PTA_CMD_AES256ECB_EncryptFinal (0x00020103) + +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : Wrapped key (sce_aes_wrapped_key_t) + */ +#define PTA_CMD_AES256ECB_DecryptInit (0x00020111) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : cipher (length must be a multiple of 16) + * [in/out] memref[2] : plain + */ +#define PTA_CMD_AES256ECB_DecryptUpdate (0x00020112) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + */ +#define PTA_CMD_AES256ECB_DecryptFinal (0x00020113) + +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : Wrapped key (sce_aes_wrapped_key_t) + * [in] memref[2] : Initial Vector(16byte) + */ +#define PTA_CMD_AES128CBC_EncryptInit (0x00021001) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : plain (length must be a multiple of 16) + * [in/out] memref[2] : cipher + */ +#define PTA_CMD_AES128CBC_EncryptUpdate (0x00021002) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + */ +#define PTA_CMD_AES128CBC_EncryptFinal (0x00021003) + +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : Wrapped key (sce_aes_wrapped_key_t) + * [in] memref[2] : Initial Vector(16byte) + */ +#define PTA_CMD_AES128CBC_DecryptInit (0x00021011) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : cipher (length must be a multiple of 16) + * [in/out] memref[2] : plain + */ +#define PTA_CMD_AES128CBC_DecryptUpdate (0x00021012) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + */ +#define PTA_CMD_AES128CBC_DecryptFinal (0x00021013) + +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : Wrapped key (sce_aes_wrapped_key_t) + * [in] memref[2] : Initial Vector(16byte) + */ +#define PTA_CMD_AES256CBC_EncryptInit (0x00021101) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : plain (length must be a multiple of 16) + * [in/out] memref[2] : cipher + */ +#define PTA_CMD_AES256CBC_EncryptUpdate (0x00021102) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + */ +#define PTA_CMD_AES256CBC_EncryptFinal (0x00021103) + +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : Wrapped key (sce_aes_wrapped_key_t) + * [in] memref[2] : Initial Vector(16byte) + */ +#define PTA_CMD_AES256CBC_DecryptInit (0x00021111) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : cipher (length must be a multiple of 16) + * [in/out] memref[2] : plain + */ +#define PTA_CMD_AES256CBC_DecryptUpdate (0x00021112) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + */ +#define PTA_CMD_AES256CBC_DecryptFinal (0x00021113) + +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : Wrapped key (sce_aes_wrapped_key_t) + * [in] memref[2] : Initial Vector(16byte) + */ +#define PTA_CMD_AES128CTR_EncryptInit (0x00022001) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : plain (length must be a multiple of 16) + * [in/out] memref[2] : cipher + */ +#define PTA_CMD_AES128CTR_EncryptUpdate (0x00022002) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + */ +#define PTA_CMD_AES128CTR_EncryptFinal (0x00022003) + +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : Wrapped key (sce_aes_wrapped_key_t) + * [in] memref[2] : Initial Vector(16byte) + */ +#define PTA_CMD_AES128CTR_DecryptInit (0x00022011) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : cipher (length must be a multiple of 16) + * [in/out] memref[2] : plain + */ +#define PTA_CMD_AES128CTR_DecryptUpdate (0x00022012) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + */ +#define PTA_CMD_AES128CTR_DecryptFinal (0x00022013) + +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : Wrapped key (sce_aes_wrapped_key_t) + * [in] memref[2] : Initial Vector(16byte) + */ +#define PTA_CMD_AES256CTR_EncryptInit (0x00022101) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : plain (length must be a multiple of 16) + * [in/out] memref[2] : cipher + */ +#define PTA_CMD_AES256CTR_EncryptUpdate (0x00022102) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + */ +#define PTA_CMD_AES256CTR_EncryptFinal (0x00022103) + +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : Wrapped key (sce_aes_wrapped_key_t) + * [in] memref[2] : Initial Vector(16byte) + */ +#define PTA_CMD_AES256CTR_DecryptInit (0x00022111) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + * [in] memref[1] : cipher (length must be a multiple of 16) + * [in/out] memref[2] : plain + */ +#define PTA_CMD_AES256CTR_DecryptUpdate (0x00022112) +/* + * [in/out] memref[0] : AES handler (sce_aes_handle_t) + */ +#define PTA_CMD_AES256CTR_DecryptFinal (0x00022113) + +/* + * [in/out] memref[0] : CMAC handler (sce_cmac_handle_t) + * [in] memref[1] : Wrapped key (sce_aes_wrapped_key_t) + */ +#define PTA_CMD_AES128CMAC_GenerateInit (0x00023001) +/* + * [in/out] memref[0] : CMAC handler (sce_cmac_handle_t) + * [in] memref[1] : message + */ +#define PTA_CMD_AES128CMAC_GenerateUpdate (0x00023002) +/* + * [in/out] memref[0] : CMAC handler (sce_cmac_handle_t) + * [in/out] memref[1] : mac (16byte) + */ +#define PTA_CMD_AES128CMAC_GenerateFinal (0x00023003) + +/* + * [in/out] memref[0] : CMAC handler (sce_cmac_handle_t) + * [in] memref[1] : Wrapped key (sce_aes_wrapped_key_t) + */ +#define PTA_CMD_AES128CMAC_VerifyInit (0x00023011) +/* + * [in/out] memref[0] : CMAC handler (sce_cmac_handle_t) + * [in] memref[1] : message + */ +#define PTA_CMD_AES128CMAC_VerifyUpdate (0x00023012) +/* + * [in/out] memref[0] : CMAC handler (sce_cmac_handle_t) + * [in] memref[1] : mac (2 to 16bytes) + */ +#define PTA_CMD_AES128CMAC_VerifyFinal (0x00023013) + +/* + * [in/out] memref[0] : CMAC handler (sce_cmac_handle_t) + * [in] memref[1] : Wrapped key (sce_aes_wrapped_key_t) + */ +#define PTA_CMD_AES256CMAC_GenerateInit (0x00023101) +/* + * [in/out] memref[0] : CMAC handler (sce_cmac_handle_t) + * [in] memref[1] : message + */ +#define PTA_CMD_AES256CMAC_GenerateUpdate (0x00023102) +/* + * [in/out] memref[0] : CMAC handler (sce_cmac_handle_t) + * [in/out] memref[1] : mac (16byte) + */ +#define PTA_CMD_AES256CMAC_GenerateFinal (0x00023103) + +/* + * [in/out] memref[0] : CMAC handler (sce_cmac_handle_t) + * [in] memref[1] : Wrapped key (sce_aes_wrapped_key_t) + */ +#define PTA_CMD_AES256CMAC_VerifyInit (0x00023111) +/* + * [in/out] memref[0] : CMAC handler (sce_cmac_handle_t) + * [in] memref[1] : message + */ +#define PTA_CMD_AES256CMAC_VerifyUpdate (0x00023112) +/* + * [in/out] memref[0] : CMAC handler (sce_cmac_handle_t) + * [in] memref[1] : mac (2 to 16bytes) + */ +#define PTA_CMD_AES256CMAC_VerifyFinal (0x00023113) + + +#endif /* __PTA_SCE_AES_H */ diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/pta_sce_ecc.h b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/pta_sce_ecc.h new file mode 100644 index 0000000000000000000000000000000000000000..cf0baf464f741c2b8f1ce56b9ce36e368564645a --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/pta_sce_ecc.h @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: BSD-2-Clause +/* + * Copyright (c) 2022, Renesas Electronics + */ +#ifndef __PTA_SCE_ECC_H +#define __PTA_SCE_ECC_H + +#include + +#define PTA_SCE_ECC_UUID \ + { 0xa0c74f91, 0xbaac, 0x4ba3, \ + { 0x96, 0xbe, 0x58, 0xe5, 0x1f, 0xb1, 0xd1, 0xba } } + +/* + * [in] memref[0] : Message + * [in/out] memref[1] : Signature (64byte) + * [in] memref[2] : Wrapped key (sce_ecc_private_wrapped_key_t) + */ +#define PTA_CMD_ECDSA_secp192r1_SignatureGenerate (0x00050000) + +/* + * [in] memref[0] : Signature (64byte) + * [in] memref[1] : Message + * [in] memref[2] : Wrapped key (sce_ecc_public_wrapped_key_t) + */ +#define PTA_CMD_ECDSA_secp192r1_SignatureVerify (0x00050010) + +/* + * [in] memref[0] : Message + * [in/out] memref[1] : Signature (64byte) + * [in] memref[2] : Wrapped key (sce_ecc_private_wrapped_key_t) + */ +#define PTA_CMD_ECDSA_secp224r1_SignatureGenerate (0x00050100) + +/* + * [in] memref[0] : Signature (64byte) + * [in] memref[1] : Message + * [in] memref[2] : Wrapped key (sce_ecc_public_wrapped_key_t) + */ +#define PTA_CMD_ECDSA_secp224r1_SignatureVerify (0x00050110) + +/* + * [in] memref[0] : Message + * [in/out] memref[1] : Signature (64byte) + * [in] memref[2] : Wrapped key (sce_ecc_private_wrapped_key_t) + */ +#define PTA_CMD_ECDSA_secp256r1_SignatureGenerate (0x00050200) + +/* + * [in] memref[0] : Signature (64byte) + * [in] memref[1] : Message + * [in] memref[2] : Wrapped key (sce_ecc_public_wrapped_key_t) + */ +#define PTA_CMD_ECDSA_secp256r1_SignatureVerify (0x00050210) + +/* + * [in] memref[0] : Message + * [in/out] memref[1] : Signature (64byte) + * [in] memref[2] : Wrapped key (sce_ecc_private_wrapped_key_t) + */ +#define PTA_CMD_ECDSA_BrainpoolP512r1_SignatureGenerate (0x00051000) + +/* + * [in] memref[0] : Signature (64byte) + * [in] memref[1] : Message + * [in] memref[2] : Wrapped key (sce_ecc_public_wrapped_key_t) + */ +#define PTA_CMD_ECDSA_BrainpoolP512r1_SignatureVerify (0x00051010) + +#endif /* __PTA_SCE_ECC_H */ diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/pta_sce_rsa.h b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/pta_sce_rsa.h new file mode 100644 index 0000000000000000000000000000000000000000..97bcc9298693dbf4e03840a08be1b154e0354434 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/pta_sce_rsa.h @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: BSD-2-Clause +/* + * Copyright (c) 2022, Renesas Electronics + */ +#ifndef __PTA_SCE_RSA_H +#define __PTA_SCE_RSA_H + +#include + +#define PTA_SCE_RSA_UUID \ + { 0x5ad57120, 0xc447, 0x4b17, \ + { 0x90, 0x7b, 0x03, 0x1a, 0xd8, 0xd9, 0xb1, 0x7c } } + +/* + * [in] memref[0] : Message + * [in/out] memref[1] : Signature (128byte) + * [in] memref[2] : Wrapped key (sce_rsa1024_private_wrapped_key_t) + */ +#define PTA_CMD_RSASSA_PKCS1024_SignatureGenerate (0x00040000) + +/* + * [in] memref[0] : Signature (128byte) + * [in] memref[1] : Message + * [in] memref[2] : Wrapped key (sce_rsa1024_public_wrapped_key_t) + */ +#define PTA_CMD_RSASSA_PKCS1024_SignatureVerify (0x00040010) + +/* + * [in] memref[0] : Message + * [in/out] memref[1] : Signature (256byte) + * [in] memref[2] : Wrapped key (sce_rsa2048_private_wrapped_key_t) + */ +#define PTA_CMD_RSASSA_PKCS2048_SignatureGenerate (0x00040100) + +/* + * [in] memref[0] : Signature (256byte) + * [in] memref[1] : Message + * [in] memref[2] : Wrapped key (sce_rsa2048_public_wrapped_key_t) + */ +#define PTA_CMD_RSASSA_PKCS2048_SignatureVerify (0x00040110) + +/* + * [in] memref[0] : Signature (512byte) + * [in] memref[1] : Message + * [in] memref[2] : Wrapped key (sce_rsa4096_public_wrapped_key_t) + */ +#define PTA_CMD_RSASSA_PKCS4096_SignatureVerify (0x00040210) + +/* + * [in] memref[0] : plain (size <= public key n size - 11 byte) + * [in/out] memref[1] : cipher (size >= public key n byte) + * [in] memref[2] : Wrapped key (sce_rsa1024_public_wrapped_key_t) + */ +#define PTA_CMD_RSAES_PKCS1024_Encrypt (0x00041000) + +/* + * [in] memref[0] : cipher (size == public key n byte) + * [in/out] memref[1] : plain (size >= public key n - 11 byte) + * [in] memref[2] : Wrapped key (sce_rsa1024_private_wrapped_key_t) + */ +#define PTA_CMD_RSAES_PKCS1024_Decrypt (0x00041010) + +/* + * [in] memref[0] : plain (size <= public key n - 11 byte) + * [in/out] memref[1] : cipher (size >= public key n byte) + * [in] memref[2] : Wrapped key (sce_rsa2048_public_wrapped_key_t) + */ +#define PTA_CMD_RSAES_PKCS2048_Encrypt (0x00041100) + +/* + * [in] memref[0] : cipher (size == public key n byte) + * [in/out] memref[1] : plain (size >= public key n - 11 byte) + * [in] memref[2] : Wrapped key (sce_rsa2048_private_wrapped_key_t) + */ +#define PTA_CMD_RSAES_PKCS2048_Decrypt (0x00041110) + +/* + * [in] memref[0] : plain (size <= public key n - 11 byte) + * [in/out] memref[1] : cipher (size >= public key n byte) + * [in] memref[2] : Wrapped key (sce_rsa4096_public_wrapped_key_t) + */ +#define PTA_CMD_RSAES_PKCS4096_Encrypt (0x00041200) + +#endif /* __PTA_SCE_RSA_H */ diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/pta_sce_sha.h b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/pta_sce_sha.h new file mode 100644 index 0000000000000000000000000000000000000000..414bb53d18a16e23602ebef82de24658a6ae5006 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/pta_sce_sha.h @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: BSD-2-Clause +/* + * Copyright (c) 2022, Renesas Electronics + */ +#ifndef __PTA_SCE_SHA_H +#define __PTA_SCE_SHA_H + +#include + +#define PTA_SCE_SHA_UUID \ + { 0x5b6cecf4, 0x12ae, 0x4c0f, \ + { 0x94, 0xb5, 0xce, 0xcc, 0x5f, 0x48, 0x62, 0xe4 } } + +/* + * [in/out] memref[0] : AES handler (sce_sha_md5_handle_t) + */ +#define PTA_CMD_SHA224_Init (0x00030000) + +/* + * [in/out] memref[0] : AES handler (sce_sha_md5_handle_t) + * [in] memref[1] : Message + */ +#define PTA_CMD_SHA224_Update (0x00030001) + +/* + * [in/out] memref[0] : AES handler (sce_sha_md5_handle_t) + * [in/out] memref[1] : Digest (28byte) + */ +#define PTA_CMD_SHA224_Final (0x00030002) + +/* + * [in/out] memref[0] : AES handler (sce_sha_md5_handle_t) + */ +#define PTA_CMD_SHA256_Init (0x00030100) + +/* + * [in/out] memref[0] : AES handler (sce_sha_md5_handle_t) + * [in] memref[1] : Message + */ +#define PTA_CMD_SHA256_Update (0x00030101) + +/* + * [in/out] memref[0] : AES handler (sce_sha_md5_handle_t) + * [in/out] memref[1] : Digest (32byte) + */ +#define PTA_CMD_SHA256_Final (0x00030102) + +#endif /* __PTA_SCE_SHA_H */ diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/r_sce_api.h b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/r_sce_api.h new file mode 100644 index 0000000000000000000000000000000000000000..15c3173dced5623f89bfcf36c1d8ae1e217cf31c --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example/git/sce/ta/include/r_sce_api.h @@ -0,0 +1,1501 @@ +/********************************************************************************************************************** + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No + * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all + * applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM + * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES + * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO + * THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of + * this software. By using this software, you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * + * Copyright (C) 2022 Renesas Electronics Corporation. All rights reserved. + *********************************************************************************************************************/ +/********************************************************************************************************************** + * File Name : r_sce_api.h + * Version : 1.0 + * Description : SCE API header file + *********************************************************************************************************************/ +/********************************************************************************************************************** + * History : DD.MM.YYYY Version Description + * : 03.31.2022 1.00 First Release + *********************************************************************************************************************/ + +/*******************************************************************************************************************//** + * @ingroup RENESAS_INTERFACES + * @defgroup SCE_PROTECTED_API SCE Interface + * @brief Interface for Secure Crypto Engine (SCE) functions. + * + * @section SCE_PROTECTED_API_Summary Summary + * The SCE interface provides SCE functionality. + * + * The SCE interface can be implemented by: + * - @ref SCE_PROTECTED + * + * @{ + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ +#include + +#ifndef R_SCE_API_H +#define R_SCE_API_H + + + +/********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ +#define FSP_PARAMETER_NOT_USED(p) ((void) ((p))) + +/* For AES operation. */ +#define HW_SCE_AES128_KEY_INDEX_WORD_SIZE (12U) +#define HW_SCE_AES256_KEY_INDEX_WORD_SIZE (16U) +#define HW_SCE_AES128_KEY_WORD_SIZE (4U) +#define HW_SCE_AES256_KEY_WORD_SIZE (8U) +#define HW_SCE_AES128_KEY_BYTE_SIZE (16U) +#define HW_SCE_AES256_KEY_BYTE_SIZE (32U) +#define HW_SCE_AES_BLOCK_BYTE_SIZE (16U) +#define HW_SCE_AES_BLOCK_BIT_SIZE (128U) +#define HW_SCE_AES_CBC_IV_BYTE_SIZE (16U) + +/* For SHA operation. */ +#define HW_SCE_SHA224_HASH_LENGTH_BYTE_SIZE (28U) +#define HW_SCE_SHA256_HASH_LENGTH_BYTE_SIZE (32U) +#define HW_SCE_SHA512_HASH_LENGTH_BYTE_SIZE (64U) + +/* For RSA operation. */ +#define HW_SCE_RSA_1024_KEY_N_LENGTH_BYTE_SIZE (128U) +#define HW_SCE_RSA_1024_KEY_E_LENGTH_BYTE_SIZE (4U) +#define HW_SCE_RSA_1024_KEY_D_LENGTH_BYTE_SIZE (128U) +#define HW_SCE_RSA_2048_KEY_N_LENGTH_BYTE_SIZE (256U) +#define HW_SCE_RSA_2048_KEY_E_LENGTH_BYTE_SIZE (4U) +#define HW_SCE_RSA_2048_KEY_D_LENGTH_BYTE_SIZE (256U) +#define HW_SCE_RSA_4096_KEY_N_LENGTH_BYTE_SIZE (128 * 4U) +#define HW_SCE_RSA_4096_KEY_E_LENGTH_BYTE_SIZE (4U) +#define HW_SCE_RSA_4096_KEY_D_LENGTH_BYTE_SIZE (128 * 4U) +#define HW_SCE_RSA_1024_PUBLIC_KEY_MANAGEMENT_INFO1_WORD_SIZE (4U) +#define HW_SCE_RSA_1024_PUBLIC_KEY_MANAGEMENT_INFO2_WORD_SIZE (36U) +#define HW_SCE_RSA_1024_PRIVATE_KEY_MANAGEMENT_INFO1_WORD_SIZE (4U) +#define HW_SCE_RSA_1024_PRIVATE_KEY_MANAGEMENT_INFO2_WORD_SIZE (68U) +#define HW_SCE_RSA_2048_PUBLIC_KEY_MANAGEMENT_INFO1_WORD_SIZE (4U) +#define HW_SCE_RSA_2048_PUBLIC_KEY_MANAGEMENT_INFO2_WORD_SIZE (68U) +#define HW_SCE_RSA_2048_PRIVATE_KEY_MANAGEMENT_INFO1_WORD_SIZE (4U) +#define HW_SCE_RSA_2048_PRIVATE_KEY_MANAGEMENT_INFO2_WORD_SIZE (132U) +#define HW_SCE_RSA_4096_PUBLIC_KEY_MANAGEMENT_INFO1_WORD_SIZE (4U) +#define HW_SCE_RSA_4096_PUBLIC_KEY_MANAGEMENT_INFO2_WORD_SIZE (4U) +#define HW_SCE_RSA_KEY_GENERATION_DUMMY_BYTE_SIZE (12U) +#define HW_SCE_RSA1024_NE_KEY_BYTE_SIZE (144U) +#define HW_SCE_RSA1024_ND_KEY_BYTE_SIZE (256U) +#define HW_SCE_RSA2048_NE_KEY_BYTE_SIZE (272U) +#define HW_SCE_RSA2048_ND_KEY_BYTE_SIZE (512U) +#define HW_SCE_RSA4096_NE_KEY_BYTE_SIZE (128 * 4 + 16U) +#define HW_SCE_RSA4096_ND_KEY_BYTE_SIZE (256 * 4U) +#define HW_SCE_RSA1024_NE_KEY_INDEX_WORD_SIZE (76U) +#define HW_SCE_RSA1024_ND_KEY_INDEX_WORD_SIZE (104U) +#define HW_SCE_RSA2048_NE_KEY_INDEX_WORD_SIZE (140U) +#define HW_SCE_RSA2048_ND_KEY_INDEX_WORD_SIZE (200U) +#define HW_SCE_RSA4096_NE_KEY_INDEX_WORD_SIZE (140U) +#define HW_SCE_RSA4096_ND_KEY_INDEX_WORD_SIZE (261U) +#define HW_SCE_RSA1024_RANDOM_PUBLIC_KEY_INDEX_WORD_SIZE (76U) +#define HW_SCE_RSA1024_RANDOM_PRIVATE_KEY_INDEX_WORD_SIZE (104U) +#define HW_SCE_RSA2048_RANDOM_PUBLIC_KEY_INDEX_WORD_SIZE (140U) +#define HW_SCE_RSA2048_RANDOM_PRIVATE_KEY_INDEX_WORD_SIZE (200U) + +#define HW_SCE_RSA_RSAES_PKCS_MIN_KEY_N_BYTE_SIZE (11U) +#define HW_SCE_RSA_1024_DATA_BYTE_SIZE (128U) +#define HW_SCE_RSA_2048_DATA_BYTE_SIZE (256U) +#define HW_SCE_RSA_4096_DATA_BYTE_SIZE (128 * 4U) + +/* RSA HASH type. */ +#define HW_SCE_RSA_HASH_SHA256 (0x03) /* SHA-256 */ + +/* For ECC operation. */ +#define HW_SCE_ECC_KEY_LENGTH_BYTE_SIZE (144U) +#define HW_SCE_ECC_PUBLIC_KEY_MANAGEMENT_INFO_WORD_SIZE (4U) +#define HW_SCE_ECC_PRIVATE_KEY_MANAGEMENT_INFO_WORD_SIZE (24U) +#define HW_SCE_ECC_PUBLIC_KEY_BYTE_SIZE (64U) +#define HW_SCE_ECC_PRIVATE_KEY_BYTE_SIZE (32U) +#define HW_SCE_ECDSA_DATA_BYTE_SIZE (64U) +#define HW_SCE_ECDSA_P512_DATA_BYTE_SIZE (128U) +#define HW_SCE_SHARED_SECRET_KEY_INDEX_WORD_SIZE (13U) + +/* Key update. */ +#define HW_SCE_UPDATE_KEY_RING_INDEX_WORD_SIZE (16U) + +#define SCE_OEM_KEY_SIZE_DUMMY_INST_DATA_WORD (0) +#define SCE_OEM_KEY_SIZE_AES128_INST_DATA_WORD (8) +#define SCE_OEM_KEY_SIZE_AES256_INST_DATA_WORD (12) + +#define SCE_OEM_KEY_SIZE_RSA1024_PUBLICK_KEY_INST_DATA_WORD (40) +#define SCE_OEM_KEY_SIZE_RSA1024_PRIVATE_KEY_INST_DATA_WORD (68) +#define SCE_OEM_KEY_SIZE_RSA2048_PUBLICK_KEY_INST_DATA_WORD (72) +#define SCE_OEM_KEY_SIZE_RSA2048_PRIVATE_KEY_INST_DATA_WORD (132) +#define SCE_OEM_KEY_SIZE_RSA4096_PUBLICK_KEY_INST_DATA_WORD (136) +#define SCE_OEM_KEY_SIZE_RSA4096_PRIVATE_KEY_INST_DATA_WORD (260) + +#define SCE_OEM_KEY_SIZE_ECCP192_PUBLICK_KEY_INST_DATA_WORD (20) +#define SCE_OEM_KEY_SIZE_ECCP192_PRIVATE_KEY_INST_DATA_WORD (12) +#define SCE_OEM_KEY_SIZE_ECCP224_PUBLICK_KEY_INST_DATA_WORD (20) +#define SCE_OEM_KEY_SIZE_ECCP224_PRIVATE_KEY_INST_DATA_WORD (12) +#define SCE_OEM_KEY_SIZE_ECCP256_PUBLICK_KEY_INST_DATA_WORD (20) +#define SCE_OEM_KEY_SIZE_ECCP256_PRIVATE_KEY_INST_DATA_WORD (12) +#define SCE_OEM_KEY_SIZE_ECCP512_PUBLICK_KEY_INST_DATA_WORD (36) +#define SCE_OEM_KEY_SIZE_ECCP512_PRIVATE_KEY_INST_DATA_WORD (20) + +#define SCE_INSTALL_KEY_RING_INDEX (0) /* 0-15 */ + +/********************************************************************************************************************** + * Typedef definitions + **********************************************************************************************************************/ +/* Return error codes fsp */ +typedef enum e_fsp_err +{ + FSP_SUCCESS = 0, + + /* Start of Crypto specific (0x10000) @note Refer to sf_cryoto_err.h for Crypto error code. */ + FSP_ERR_CRYPTO_CONTINUE = 0x10000, ///< Continue executing function + FSP_ERR_CRYPTO_SCE_RESOURCE_CONFLICT = 0x10001, ///< Hardware resource busy + FSP_ERR_CRYPTO_SCE_FAIL = 0x10002, ///< Internal I/O buffer is not empty + FSP_ERR_CRYPTO_SCE_HRK_INVALID_INDEX = 0x10003, ///< Invalid index + FSP_ERR_CRYPTO_SCE_RETRY = 0x10004, ///< Retry + FSP_ERR_CRYPTO_SCE_VERIFY_FAIL = 0x10005, ///< Verify is failed + FSP_ERR_CRYPTO_SCE_ALREADY_OPEN = 0x10006, ///< HW SCE module is already opened + FSP_ERR_CRYPTO_NOT_OPEN = 0x10007, ///< Hardware module is not initialized + FSP_ERR_CRYPTO_UNKNOWN = 0x10008, ///< Some unknown error occurred + FSP_ERR_CRYPTO_NULL_POINTER = 0x10009, ///< Null pointer input as a parameter + FSP_ERR_CRYPTO_NOT_IMPLEMENTED = 0x1000a, ///< Algorithm/size not implemented + FSP_ERR_CRYPTO_RNG_INVALID_PARAM = 0x1000b, ///< An invalid parameter is specified + FSP_ERR_CRYPTO_RNG_FATAL_ERROR = 0x1000c, ///< A fatal error occurred + FSP_ERR_CRYPTO_INVALID_SIZE = 0x1000d, ///< Size specified is invalid + FSP_ERR_CRYPTO_INVALID_STATE = 0x1000e, ///< Function used in an valid state + FSP_ERR_CRYPTO_ALREADY_OPEN = 0x1000f, ///< control block is already opened + FSP_ERR_CRYPTO_INSTALL_KEY_FAILED = 0x10010, ///< Specified input key is invalid. + FSP_ERR_CRYPTO_AUTHENTICATION_FAILED = 0x10011, ///< Authentication failed + FSP_ERR_CRYPTO_SCE_KEY_SET_FAIL = 0x10012, ///< Failure to Init Cipher + FSP_ERR_CRYPTO_SCE_AUTHENTICATION = 0x10013, ///< Authentication failed + FSP_ERR_CRYPTO_SCE_PARAMETER = 0x10014, ///< Input date is illegal. + FSP_ERR_CRYPTO_SCE_PROHIBIT_FUNCTION = 0x10015, ///< An invalid function call occurred. + + /* Start of SF_CRYPTO specific */ + FSP_ERR_CRYPTO_COMMON_NOT_OPENED = 0x20000, ///< Crypto Framework Common is not opened + FSP_ERR_CRYPTO_HAL_ERROR = 0x20001, ///< Cryoto HAL module returned an error + FSP_ERR_CRYPTO_KEY_BUF_NOT_ENOUGH = 0x20002, ///< Key buffer size is not enough to generate a key + FSP_ERR_CRYPTO_BUF_OVERFLOW = 0x20003, ///< Attempt to write data larger than what the buffer can hold + FSP_ERR_CRYPTO_INVALID_OPERATION_MODE = 0x20004, ///< Invalid operation mode. + FSP_ERR_MESSAGE_TOO_LONG = 0x20005, ///< Message for RSA encryption is too long. + FSP_ERR_RSA_DECRYPTION_ERROR = 0x20006, ///< RSA Decryption error. +} fsp_err_t; + +/** Data lifecycle */ +typedef enum +{ + SCE_CM = 1, + SCE_SSD, + SCE_NSECSD, + SCE_DPL, + SCE_LCK_DBG, + SCE_LCK_BOOT, + SCE_RMA_REQ, + SCE_RMA_ACK, +} lifecycle_t; + +/** Byte data structure */ +typedef struct sce_byte_data +{ + uint8_t * pdata; ///< pointer + uint32_t data_length; ///< data_length + uint32_t data_type; ///< data type +} sce_byte_data_t; + +/** RSA byte data structure */ +typedef sce_byte_data_t sce_rsa_byte_data_t; ///< byte data + +/** ECDSA byte data structure */ +typedef sce_byte_data_t sce_ecdsa_byte_data_t; ///< byte data + +/** AES wrapped key data structure. DO NOT MODIFY. */ +typedef struct sce_aes_wrapped_key +{ + uint32_t type; ///< key type + + /* AES128, AES256 are supported */ + uint32_t value[HW_SCE_AES256_KEY_INDEX_WORD_SIZE]; ///< wrapped key value +} sce_aes_wrapped_key_t; + +/** RSA 1024bit public wrapped key data structure. DO NOT MODIFY. */ +typedef struct sce_rsa1024_public_wrapped_key +{ + uint32_t type; ///< key type + struct + { + /* key management information */ + uint32_t key_management_info1[HW_SCE_RSA_1024_PUBLIC_KEY_MANAGEMENT_INFO1_WORD_SIZE]; + /* RSA 1024-bit public key n (plaintext) */ + uint8_t key_n[HW_SCE_RSA_1024_KEY_N_LENGTH_BYTE_SIZE]; + /* RSA 1024-bit public key e (plaintext) */ + uint8_t key_e[HW_SCE_RSA_1024_KEY_E_LENGTH_BYTE_SIZE]; + /* dummy */ + uint8_t dummy[HW_SCE_RSA_KEY_GENERATION_DUMMY_BYTE_SIZE]; + /* key management information */ + uint32_t key_management_info2[HW_SCE_RSA_1024_PUBLIC_KEY_MANAGEMENT_INFO2_WORD_SIZE]; + } value; +} sce_rsa1024_public_wrapped_key_t; + +/** RSA 1024bit private wrapped key data structure. DO NOT MODIFY. */ +typedef struct sce_rsa1024_private_wrapped_key +{ + uint32_t type; ///< key type + struct + { + /* key management information */ + uint32_t key_management_info1[HW_SCE_RSA_1024_PRIVATE_KEY_MANAGEMENT_INFO1_WORD_SIZE]; + /* RSA 1024-bit private key n (plaintext) */ + uint8_t key_n[HW_SCE_RSA_1024_KEY_N_LENGTH_BYTE_SIZE]; + /* key management information */ + uint32_t key_management_info2[HW_SCE_RSA_1024_PRIVATE_KEY_MANAGEMENT_INFO2_WORD_SIZE]; + } value; +} sce_rsa1024_private_wrapped_key_t; + +/** RSA 2048bit public wrapped key data structure. DO NOT MODIFY. */ +typedef struct sce_rsa2048_public_wrapped_key +{ + uint32_t type; ///< Key type + struct + { + /* key management information */ + uint32_t key_management_info1[HW_SCE_RSA_2048_PUBLIC_KEY_MANAGEMENT_INFO1_WORD_SIZE]; + /* RSA 2048-bit public key n (plaintext) */ + uint8_t key_n[HW_SCE_RSA_2048_KEY_N_LENGTH_BYTE_SIZE]; + /* RSA 2048-bit public key e (plaintext) */ + uint8_t key_e[HW_SCE_RSA_2048_KEY_E_LENGTH_BYTE_SIZE]; + /* dummy */ + uint8_t dummy[HW_SCE_RSA_KEY_GENERATION_DUMMY_BYTE_SIZE]; + /* key management information */ + uint32_t key_management_info2[HW_SCE_RSA_2048_PUBLIC_KEY_MANAGEMENT_INFO2_WORD_SIZE]; + } value; +} sce_rsa2048_public_wrapped_key_t; + +/** RSA 2048bit private wrapped key data structure. DO NOT MODIFY. */ +typedef struct sce_rsa2048_private_wrapped_key +{ + uint32_t type; ///< key type + struct + { + /* key management information */ + uint32_t key_management_info1[HW_SCE_RSA_2048_PRIVATE_KEY_MANAGEMENT_INFO1_WORD_SIZE]; + /* RSA 2048-bit private key n (plaintext) */ + uint8_t key_n[HW_SCE_RSA_2048_KEY_N_LENGTH_BYTE_SIZE]; + /* key management information */ + uint32_t key_management_info2[HW_SCE_RSA_2048_PRIVATE_KEY_MANAGEMENT_INFO2_WORD_SIZE]; + } value; +} sce_rsa2048_private_wrapped_key_t; + +/** RSA 4096bit public wrapped key data structure. DO NOT MODIFY. */ +typedef struct sce_rsa4096_public_wrapped_key +{ + uint32_t type; ///< Key type + struct + { + /* key management information */ + uint32_t key_management_info1[HW_SCE_RSA_4096_PUBLIC_KEY_MANAGEMENT_INFO1_WORD_SIZE]; + /* RSA 4096-bit public key n (plaintext) */ + uint8_t key_n[HW_SCE_RSA_4096_KEY_N_LENGTH_BYTE_SIZE]; + /* RSA 4096-bit public key e (plaintext) */ + uint8_t key_e[HW_SCE_RSA_4096_KEY_E_LENGTH_BYTE_SIZE]; + /* dummy */ + uint8_t dummy[HW_SCE_RSA_KEY_GENERATION_DUMMY_BYTE_SIZE]; + /* key management information */ + uint32_t key_management_info2[HW_SCE_RSA_4096_PUBLIC_KEY_MANAGEMENT_INFO2_WORD_SIZE]; + } value; +} sce_rsa4096_public_wrapped_key_t; + +/** RSA 1024bit wrapped key pair structure. DO NOT MODIFY. */ +typedef struct sce_rsa1024_wrapped_pair_key +{ + sce_rsa1024_private_wrapped_key_t priv_key; ///< RSA 1024-bit private wrapped key + sce_rsa1024_public_wrapped_key_t pub_key; ///< RSA 1024-bit public wrapped key +} sce_rsa1024_wrapped_pair_key_t; + +/** RSA 2048bit wrapped key pair structure. DO NOT MODIFY. */ +typedef struct sce_rsa2048_wrapped_pair_key +{ + sce_rsa2048_private_wrapped_key_t priv_key; ///< RSA 2048-bit private wrapped key + sce_rsa2048_public_wrapped_key_t pub_key; ///< RSA 2048-bit public wrapped key +} sce_rsa2048_wrapped_pair_key_t; + +/** ECC P-192/224/256/512 public wrapped key data structure */ +typedef struct sce_ecc_public_wrapped_key +{ + uint32_t type; ///< key type + struct + { + /* key management information */ + uint32_t key_management_info[HW_SCE_ECC_PUBLIC_KEY_MANAGEMENT_INFO_WORD_SIZE]; + /* ECC public key Q (plaintext) */ + uint8_t key_q[HW_SCE_ECC_KEY_LENGTH_BYTE_SIZE]; + } value; +} sce_ecc_public_wrapped_key_t; + +/** ECC P-192/224/256/512 private wrapped key data structure */ +typedef struct sce_ecc_private_wrapped_key +{ + uint32_t type; ///< key type + uint32_t value[HW_SCE_ECC_PRIVATE_KEY_MANAGEMENT_INFO_WORD_SIZE]; ///< wrapped key value +} sce_ecc_private_wrapped_key_t; + +/** ECC P-192/224/256 wrapped key pair structure */ +typedef struct sce_ecc_wrapped_pair_key +{ + sce_ecc_private_wrapped_key_t priv_key; ///< ECC private wrapped key + sce_ecc_public_wrapped_key_t pub_key; ///< ECC public wrapped key +} sce_ecc_wrapped_pair_key_t; + +/** Update key ring index data structure. DO NOT MODIFY. */ +typedef struct sce_key_update_key +{ + uint32_t type; ///< key type + uint32_t value[HW_SCE_UPDATE_KEY_RING_INDEX_WORD_SIZE]; ///< wrapped key value +} sce_key_update_key_t; + +/** The work area for AES. DO NOT MODIFY. */ +typedef struct sce_aes_handle +{ + /* serial number of this handle */ + uint32_t id; + /* wrapped key */ + sce_aes_wrapped_key_t wrapped_key; + /* text size under encryption / decryption */ + uint32_t current_input_data_size; + /* text array less than the block long */ + uint8_t last_1_block_as_fraction[HW_SCE_AES_BLOCK_BYTE_SIZE]; + /* reserved */ + uint8_t last_2_block_as_fraction[HW_SCE_AES_BLOCK_BYTE_SIZE * 2]; + /* current initialization vector used in CBC/CTR mode */ + uint8_t current_initial_vector[HW_SCE_AES_CBC_IV_BYTE_SIZE]; + /* control flag of calling function */ + uint8_t flag_call_init; +} sce_aes_handle_t; + +/** The work area for CMAC. DO NOT MODIFY. */ +typedef struct sce_cmac_handle +{ + uint32_t id; ///< serial number of this handle + sce_aes_wrapped_key_t wrapped_key; ///< wrapped key + uint8_t cmac_buffer[HW_SCE_AES_BLOCK_BYTE_SIZE]; ///< message array less than the block long + uint32_t all_received_length; ///< entire length of message + /* message array length less than the block long */ + uint32_t buffering_length; + uint8_t flag_call_init; ///< control flag of calling function +} sce_cmac_handle_t; + +/** The work area for SHA. DO NOT MODIFY. */ +typedef struct sce_sha_md5_handle +{ + uint32_t id; ///< serial number of this handle + uint8_t sha_buffer[HW_SCE_SHA256_HASH_LENGTH_BYTE_SIZE * 4];///< message array length less than the block long + uint32_t all_received_length; ///< entire length of message + uint32_t buffering_length; ///< message array length less than the block long + + /* SHA1(20byte), SHA256(32byte), MD5(16byte) are supported */ + uint8_t current_hash[HW_SCE_SHA256_HASH_LENGTH_BYTE_SIZE]; ///< last hash value + uint8_t flag_call_init; ///< control flag of calling function +} sce_sha_md5_handle_t; + +/** SCE Control block. Allocate an instance specific control block to pass into the API calls. + * @par Implemented as + * - sce_instance_ctrl_t + */ +typedef void sce_ctrl_t; + +/** User configuration structure, used in open function */ +typedef struct st_sce_cfg +{ + lifecycle_t lifecycle; ///< Data lifecycle +} sce_cfg_t; + +/** Functions implemented at the HAL layer will follow this API. */ +typedef struct st_sce_api +{ + /** Enables use of SCE functionality. + * @par Implemented as + * - @ref R_SCE_Open() + * + * @param[in] p_ctrl Pointer to control structure. + * @param[in] p_cfg Pointer to pin configuration structure. + */ + + /***** TODO: Replace "struct st_sce_ctrl" to "void" *****/ + fsp_err_t (* open)(sce_ctrl_t * const p_ctrl, sce_cfg_t const * const p_cfg); + + /** Stops supply of power to the SCE. + * @par Implemented as + * - @ref R_SCE_Close() + * + * @param[in] p_ctrl Pointer to control structure. + */ + fsp_err_t (* close)(sce_ctrl_t * const p_ctrl); + + /** Software reset to SCE. + * @par Implemented as + * - @ref R_SCE_SoftwareReset() + * + */ + fsp_err_t (* softwareReset)(void); + + /** Generates 4 words random number. + * @par Implemented as + * - @ref R_SCE_RandomNumberGenerate() + * + * @param[in,out] random Stores 4words (16 bytes) random data. + */ + fsp_err_t (* randomNumberGenerate)(uint32_t * random); + + /** This API outputs 128-bit AES wrapped key. + * @par Implemented as + * - @ref R_SCE_AES128_WrappedKeyGenerate() + * + * @param[in,out] wrapped_key 128-bit AES wrapped key + */ + fsp_err_t (* AES128_WrappedKeyGenerate)(sce_aes_wrapped_key_t * wrapped_key); + + /** This API outputs 256-bit AES wrapped key. + * @par Implemented as + * - @ref R_SCE_AES256_WrappedKeyGenerate() + * + * @param[in,out] wrapped_key 256-bit AES wrapped key + */ + fsp_err_t (* AES256_WrappedKeyGenerate)(sce_aes_wrapped_key_t * wrapped_key); + + /** This API outputs 128-bit AES wrapped key. + * @par Implemented as + * - @ref R_SCE_AES128_EncryptedKeyWrap() + * + * @param[in] initial_vector Initialization vector when generating encrypted_key + * @param[in] encrypted_key User key encryptedand MAC appended + * @param[in] key_update_key Key update keyring + * @param[in,out] wrapped_key 128-bit AES wrapped key + */ + fsp_err_t (* AES128_EncryptedKeyWrap)(uint8_t * initial_vector, uint8_t * encrypted_key, + sce_key_update_key_t * key_update_key, sce_aes_wrapped_key_t * wrapped_key); + + /** This API outputs 256-bit AES wrapped key. + * @par Implemented as + * - @ref R_SCE_AES256_EncryptedKeyWrap() + * + * @param[in] initial_vector Initialization vector when generating encrypted_key + * @param[in] encrypted_key User key encryptedand MAC appended + * @param[in] key_update_key Key update keyring + * @param[in,out] wrapped_key 256-bit AES wrapped key + */ + fsp_err_t (* AES256_EncryptedKeyWrap)(uint8_t * initial_vector, uint8_t * encrypted_key, + sce_key_update_key_t * key_update_key, sce_aes_wrapped_key_t * wrapped_key); + + /** Initialize AES128ECB encryption. + * @par Implemented as + * - @ref R_SCE_AES128ECB_EncryptInit() + * + * @param[in,out] handle AES handler (work area) + * @param[in] wrapped_key 128-bit AES wrapped key + */ + fsp_err_t (* AES128ECB_EncryptInit)(sce_aes_handle_t * handle, sce_aes_wrapped_key_t * wrapped_key); + + /** Update AES128ECB encryption. + * @par Implemented as + * - @ref R_SCE_AES128ECB_EncryptUpdate() + * + * @param[in,out] handle AES handler (work area) + * @param[in] plain plaintext data area + * @param[in,out] cipher ciphertext data area + * @param[in,out] plain_length plaintext data length (must be a multiple of 16) + */ + fsp_err_t (* AES128ECB_EncryptUpdate)(sce_aes_handle_t * handle, uint8_t * plain, uint8_t * cipher, + uint32_t plain_length); + + /** Finalize AES128ECB encryption. + * @par Implemented as + * - @ref R_SCE_AES128ECB_EncryptFinal() + * + * @param[in,out] handle AES handler (work area) + * @param[in,out] cipher ciphertext data area (nothing ever written here) + * @param[in,out] cipher_length ciphertext data length (0 always written here) + */ + fsp_err_t (* AES128ECB_EncryptFinal)(sce_aes_handle_t * handle, uint8_t * cipher, uint32_t * cipher_length); + + /** Initialize AES128ECB decryption. + * @par Implemented as + * - @ref R_SCE_AES128ECB_DecryptInit() + * + * @param[in,out] handle AES handler (work area) + * @param[in] wrapped_key 128-bit AES wrapped key + */ + fsp_err_t (* AES128ECB_DecryptInit)(sce_aes_handle_t * handle, sce_aes_wrapped_key_t * wrapped_key); + + /** Update AES128ECB decryption. + * @par Implemented as + * - @ref R_SCE_AES128ECB_DecryptUpdate() + * + * @param[in,out] handle AES handler (work area) + * @param[in] cipher ciphertext data area + * @param[in,out] plain plaintext data area + * @param[in,out] cipher_length ciphertext data length (must be a multiple of 16) + */ + fsp_err_t (* AES128ECB_DecryptUpdate)(sce_aes_handle_t * handle, uint8_t * cipher, uint8_t * plain, + uint32_t cipher_length); + + /** Finalize AES128ECB decryption. + * @par Implemented as + * - @ref R_SCE_AES128ECB_DecryptFinal() + * + * @param[in,out] handle AES handler (work area) + * @param[in,out] plain plaintext data area (nothing ever written here) + * @param[in,out] plain_length plaintext data length (0 always written here) + */ + fsp_err_t (* AES128ECB_DecryptFinal)(sce_aes_handle_t * handle, uint8_t * plain, uint32_t * plain_length); + + /** Initialize AES256ECB encryption. + * @par Implemented as + * - @ref R_SCE_AES256ECB_EncryptInit() + * + * @param[in,out] handle AES handler (work area) + * @param[in] wrapped_key 256-bit AES wrapped key + */ + fsp_err_t (* AES256ECB_EncryptInit)(sce_aes_handle_t * handle, sce_aes_wrapped_key_t * wrapped_key); + + /** Update AES256ECB encryption. + * @par Implemented as + * - @ref R_SCE_AES256ECB_EncryptUpdate() + * + * @param[in,out] handle AES handler (work area) + * @param[in] plain plaintext data area + * @param[in,out] cipher ciphertext data area + * @param[in,out] plain_length plaintext data length (must be a multiple of 16) + */ + fsp_err_t (* AES256ECB_EncryptUpdate)(sce_aes_handle_t * handle, uint8_t * plain, uint8_t * cipher, + uint32_t plain_length); + + /** Finalize AES256ECB encryption. + * @par Implemented as + * - @ref R_SCE_AES256ECB_EncryptFinal() + * + * @param[in,out] handle AES handler (work area) + * @param[in,out] cipher ciphertext data area (nothing ever written here) + * @param[in,out] cipher_length ciphertext data length (0 always written here) + */ + fsp_err_t (* AES256ECB_EncryptFinal)(sce_aes_handle_t * handle, uint8_t * cipher, uint32_t * cipher_length); + + /** Initialize AES256ECB decryption. + * @par Implemented as + * - @ref R_SCE_AES256ECB_DecryptInit() + * + * @param[in,out] handle AES handler (work area) + * @param[in] wrapped_key 256-bit AES wrapped key + */ + fsp_err_t (* AES256ECB_DecryptInit)(sce_aes_handle_t * handle, sce_aes_wrapped_key_t * wrapped_key); + + /** Update AES256ECB decryption. + * @par Implemented as + * - @ref R_SCE_AES256ECB_DecryptUpdate() + * + * @param[in,out] handle AES handler (work area) + * @param[in] cipher ciphertext data area + * @param[in,out] plain plaintext data area + * @param[in,out] cipher_length ciphertext data length (must be a multiple of 16) + */ + fsp_err_t (* AES256ECB_DecryptUpdate)(sce_aes_handle_t * handle, uint8_t * cipher, uint8_t * plain, + uint32_t cipher_length); + + /** Finalize AES256ECB decryption. + * @par Implemented as + * - @ref R_SCE_AES256ECB_DecryptFinal() + * + * @param[in,out] handle AES handler (work area) + * @param[in,out] plain plaintext data area (nothing ever written here) + * @param[in,out] plain_length plaintext data length (0 always written here) + */ + fsp_err_t (* AES256ECB_DecryptFinal)(sce_aes_handle_t * handle, uint8_t * plain, uint32_t * plain_length); + + /** Initialize AES128CBC encryption. + * @par Implemented as + * - @ref R_SCE_AES128CBC_EncryptInit() + * + * @param[in,out] handle AES handler (work area) + * @param[in] wrapped_key 128-bit AES wrapped key + * @param[in] initial_vector initial vector area (16byte) + */ + fsp_err_t (* AES128CBC_EncryptInit)(sce_aes_handle_t * handle, sce_aes_wrapped_key_t * wrapped_key, + uint8_t * initial_vector); + + /** Update AES128CBC encryption. + * @par Implemented as + * - @ref R_SCE_AES128CBC_EncryptUpdate() + * + * @param[in,out] handle AES handler (work area) + * @param[in] plain plaintext data area + * @param[in,out] cipher ciphertext data area + * @param[in,out] plain_length plaintext data length (must be a multiple of 16) + */ + fsp_err_t (* AES128CBC_EncryptUpdate)(sce_aes_handle_t * handle, uint8_t * plain, uint8_t * cipher, + uint32_t plain_length); + + /** Finalize AES128CBC encryption. + * @par Implemented as + * - @ref R_SCE_AES128CBC_EncryptFinal() + * + * @param[in,out] handle AES handler (work area) + * @param[in,out] cipher ciphertext data area (nothing ever written here) + * @param[in,out] cipher_length ciphertext data length (0 always written here) + */ + fsp_err_t (* AES128CBC_EncryptFinal)(sce_aes_handle_t * handle, uint8_t * cipher, uint32_t * cipher_length); + + /** Initialize AES128CBC decryption. + * @par Implemented as + * - @ref R_SCE_AES128CBC_DecryptInit() + * + * @param[in,out] handle AES handler (work area) + * @param[in] wrapped_key 128-bit AES wrapped key + * @param[in] initial_vector initial vector area (16byte) + */ + fsp_err_t (* AES128CBC_DecryptInit)(sce_aes_handle_t * handle, sce_aes_wrapped_key_t * wrapped_key, + uint8_t * initial_vector); + + /** Update AES128CBC decryption. + * @par Implemented as + * - @ref R_SCE_AES128CBC_DecryptUpdate() + * + * @param[in,out] handle AES handler (work area) + * @param[in] cipher ciphertext data area + * @param[in,out] plain plaintext data area + * @param[in,out] cipher_length ciphertext data length (must be a multiple of 16) + */ + fsp_err_t (* AES128CBC_DecryptUpdate)(sce_aes_handle_t * handle, uint8_t * cipher, uint8_t * plain, + uint32_t cipher_length); + + /** Finalize AES128CBC decryption. + * @par Implemented as + * - @ref R_SCE_AES128CBC_DecryptFinal() + * + * @param[in,out] handle AES handler (work area) + * @param[in,out] plain plaintext data area (nothing ever written here) + * @param[in,out] plain_length plaintext data length (0 always written here) + */ + fsp_err_t (* AES128CBC_DecryptFinal)(sce_aes_handle_t * handle, uint8_t * plain, uint32_t * plain_length); + + /** Initialize AES256CBC encryption. + * @par Implemented as + * - @ref R_SCE_AES256CBC_EncryptInit() + * + * @param[in,out] handle AES handler (work area) + * @param[in] wrapped_key 256-bit AES wrapped key + * @param[in] initial_vector initial vector area (16byte) + */ + fsp_err_t (* AES256CBC_EncryptInit)(sce_aes_handle_t * handle, sce_aes_wrapped_key_t * wrapped_key, + uint8_t * initial_vector); + + /** Update AES256CBC encryption. + * @par Implemented as + * - @ref R_SCE_AES256CBC_EncryptUpdate() + * + * @param[in,out] handle AES handler (work area) + * @param[in] plain plaintext data area + * @param[in,out] cipher ciphertext data area + * @param[in,out] plain_length plaintext data length (must be a multiple of 16) + */ + fsp_err_t (* AES256CBC_EncryptUpdate)(sce_aes_handle_t * handle, uint8_t * plain, uint8_t * cipher, + uint32_t plain_length); + + /** Finalize AES256CBC encryption. + * @par Implemented as + * - @ref R_SCE_AES256CBC_EncryptFinal() + * + * @param[in,out] handle AES handler (work area) + * @param[in,out] cipher ciphertext data area (nothing ever written here) + * @param[in,out] cipher_length ciphertext data length (0 always written here) + */ + fsp_err_t (* AES256CBC_EncryptFinal)(sce_aes_handle_t * handle, uint8_t * cipher, uint32_t * cipher_length); + + /** Initialize AES256CBC decryption. + * @par Implemented as + * - @ref R_SCE_AES256CBC_DecryptInit() + * + * @param[in,out] handle AES handler (work area) + * @param[in] wrapped_key 256-bit AES wrapped key + * @param[in] initial_vector initial vector area (16byte) + */ + fsp_err_t (* AES256CBC_DecryptInit)(sce_aes_handle_t * handle, sce_aes_wrapped_key_t * wrapped_key, + uint8_t * initial_vector); + + /** Update AES256CBC decryption. + * @par Implemented as + * - @ref R_SCE_AES256CBC_DecryptUpdate() + * + * @param[in,out] handle AES handler (work area) + * @param[in] cipher ciphertext data area + * @param[in,out] plain plaintext data area + * @param[in,out] cipher_length ciphertext data length (must be a multiple of 16) + */ + fsp_err_t (* AES256CBC_DecryptUpdate)(sce_aes_handle_t * handle, uint8_t * cipher, uint8_t * plain, + uint32_t cipher_length); + + /** Finalize AES256CBC decryption. + * @par Implemented as + * - @ref R_SCE_AES256CBC_DecryptFinal() + * + * @param[in,out] handle AES handler (work area) + * @param[in,out] plain plaintext data area (nothing ever written here) + * @param[in,out] plain_length plaintext data length (0 always written here) + */ + fsp_err_t (* AES256CBC_DecryptFinal)(sce_aes_handle_t * handle, uint8_t * plain, uint32_t * plain_length); + + /** Initialize AES128CTR encryption. + * @par Implemented as + * - @ref R_SCE_AES128CTR_EncryptInit() + * + * @param[in,out] handle AES handler (work area) + * @param[in] wrapped_key 128-bit AES wrapped key + * @param[in] initial_vector initial vector area (16byte) + */ + fsp_err_t (* AES128CTR_EncryptInit)(sce_aes_handle_t * handle, sce_aes_wrapped_key_t * wrapped_key, + uint8_t * initial_vector); + + /** Update AES128CTR encryption. + * @par Implemented as + * - @ref R_SCE_AES128CTR_EncryptUpdate() + * + * @param[in,out] handle AES handler (work area) + * @param[in] plain plaintext data area + * @param[in,out] cipher ciphertext data area + * @param[in,out] plain_length plaintext data length (must be a multiple of 16) + */ + fsp_err_t (* AES128CTR_EncryptUpdate)(sce_aes_handle_t * handle, uint8_t * plain, uint8_t * cipher, + uint32_t plain_length); + + /** Finalize AES128CTR encryption. + * @par Implemented as + * - @ref R_SCE_AES128CTR_EncryptFinal() + * + * @param[in,out] handle AES handler (work area) + * @param[in,out] cipher ciphertext data area (nothing ever written here) + * @param[in,out] cipher_length ciphertext data length (0 always written here) + */ + fsp_err_t (* AES128CTR_EncryptFinal)(sce_aes_handle_t * handle, uint8_t * cipher, uint32_t * cipher_length); + + /** Initialize AES128CTR decryption. + * @par Implemented as + * - @ref R_SCE_AES128CTR_DecryptInit() + * + * @param[in,out] handle AES handler (work area) + * @param[in] wrapped_key 128-bit AES wrapped key + * @param[in] initial_vector initial vector area (16byte) + */ + fsp_err_t (* AES128CTR_DecryptInit)(sce_aes_handle_t * handle, sce_aes_wrapped_key_t * wrapped_key, + uint8_t * initial_vector); + + /** Update AES128CTR decryption. + * @par Implemented as + * - @ref R_SCE_AES128CTR_DecryptUpdate() + * + * @param[in,out] handle AES handler (work area) + * @param[in] cipher ciphertext data area + * @param[in,out] plain plaintext data area + * @param[in,out] cipher_length ciphertext data length (must be a multiple of 16) + */ + fsp_err_t (* AES128CTR_DecryptUpdate)(sce_aes_handle_t * handle, uint8_t * cipher, uint8_t * plain, + uint32_t cipher_length); + + /** Finalize AES128CTR decryption. + * @par Implemented as + * - @ref R_SCE_AES128CTR_DecryptFinal() + * + * @param[in,out] handle AES handler (work area) + * @param[in,out] plain plaintext data area (nothing ever written here) + * @param[in,out] plain_length plaintext data length (0 always written here) + */ + fsp_err_t (* AES128CTR_DecryptFinal)(sce_aes_handle_t * handle, uint8_t * plain, uint32_t * plain_length); + + /** Initialize AES256CTR encryption. + * @par Implemented as + * - @ref R_SCE_AES256CTR_EncryptInit() + * + * @param[in,out] handle AES handler (work area) + * @param[in] wrapped_key 256-bit AES wrapped key + * @param[in] initial_vector initial vector area (16byte) + */ + fsp_err_t (* AES256CTR_EncryptInit)(sce_aes_handle_t * handle, sce_aes_wrapped_key_t * wrapped_key, + uint8_t * initial_vector); + + /** Update AES256CTR encryption. + * @par Implemented as + * - @ref R_SCE_AES256CTR_EncryptUpdate() + * + * @param[in,out] handle AES handler (work area) + * @param[in] plain plaintext data area + * @param[in,out] cipher ciphertext data area + * @param[in,out] plain_length plaintext data length (must be a multiple of 16) + */ + fsp_err_t (* AES256CTR_EncryptUpdate)(sce_aes_handle_t * handle, uint8_t * plain, uint8_t * cipher, + uint32_t plain_length); + + /** Finalize AES256CTR encryption. + * @par Implemented as + * - @ref R_SCE_AES256CTR_EncryptFinal() + * + * @param[in,out] handle AES handler (work area) + * @param[in,out] cipher ciphertext data area (nothing ever written here) + * @param[in,out] cipher_length ciphertext data length (0 always written here) + */ + fsp_err_t (* AES256CTR_EncryptFinal)(sce_aes_handle_t * handle, uint8_t * cipher, uint32_t * cipher_length); + + /** Initialize AES256CTR decryption. + * @par Implemented as + * - @ref R_SCE_AES256CTR_DecryptInit() + * + * @param[in,out] handle AES handler (work area) + * @param[in] wrapped_key 256-bit AES wrapped key + * @param[in] initial_vector initial vector area (16byte) + */ + fsp_err_t (* AES256CTR_DecryptInit)(sce_aes_handle_t * handle, sce_aes_wrapped_key_t * wrapped_key, + uint8_t * initial_vector); + + /** Update AES256CTR decryption. + * @par Implemented as + * - @ref R_SCE_AES256CTR_DecryptUpdate() + * + * @param[in,out] handle AES handler (work area) + * @param[in] cipher ciphertext data area + * @param[in,out] plain plaintext data area + * @param[in,out] cipher_length ciphertext data length (must be a multiple of 16) + */ + fsp_err_t (* AES256CTR_DecryptUpdate)(sce_aes_handle_t * handle, uint8_t * cipher, uint8_t * plain, + uint32_t cipher_length); + + /** Finalize AES256CTR decryption. + * @par Implemented as + * - @ref R_SCE_AES256CTR_DecryptFinal() + * + * @param[in,out] handle AES handler (work area) + * @param[in,out] plain plaintext data area (nothing ever written here) + * @param[in,out] plain_length plaintext data length (0 always written here) + */ + fsp_err_t (* AES256CTR_DecryptFinal)(sce_aes_handle_t * handle, uint8_t * plain, uint32_t * plain_length); + + /** Initialize AES128CMAC generation. + * @par Implemented as + * - @ref R_SCE_AES128CMAC_GenerateInit() + * + * @param[in,out] handle AES-CMAC handler (work area) + * @param[in] wrapped_key 128-bit AES wrapped key + */ + fsp_err_t (* AES128CMAC_GenerateInit)(sce_cmac_handle_t * handle, sce_aes_wrapped_key_t * wrapped_key); + + /** Update AES128CMAC generation. + * @par Implemented as + * - @ref R_SCE_AES128CMAC_GenerateUpdate() + * + * @param[in,out] handle AES-CMAC handler (work area) + * @param[in] message message data area (message_length byte) + * @param[in] message_length message data length (0 or more bytes) + */ + fsp_err_t (* AES128CMAC_GenerateUpdate)(sce_cmac_handle_t * handle, uint8_t * message, uint32_t message_length); + + /** Finalize AES128CMAC generation. + * @par Implemented as + * - @ref R_SCE_AES128CMAC_GenerateFinal() + * + * @param[in,out] handle AES-CMAC handler (work area) + * @param[in,out] mac MAC data area (16byte) + */ + fsp_err_t (* AES128CMAC_GenerateFinal)(sce_cmac_handle_t * handle, uint8_t * mac); + + /** Initialize AES128CMAC verification. + * @par Implemented as + * - @ref R_SCE_AES128CMAC_VerifyInit() + * + * @param[in,out] handle AES-CMAC handler (work area) + * @param[in] wrapped_key 128-bit AES wrapped key + */ + fsp_err_t (* AES128CMAC_VerifyInit)(sce_cmac_handle_t * handle, sce_aes_wrapped_key_t * wrapped_key); + + /** Update AES128CMAC verification. + * @par Implemented as + * - @ref R_SCE_AES128CMAC_VerifyUpdate() + * + * @param[in,out] handle AES-CMAC handler (work area) + * @param[in] message message data area (message_length byte) + * @param[in] message_length message data length (0 or more bytes) + */ + fsp_err_t (* AES128CMAC_VerifyUpdate)(sce_cmac_handle_t * handle, uint8_t * message, uint32_t message_length); + + /** Finalize AES128CMAC verification. + * @par Implemented as + * - @ref R_SCE_AES128CMAC_VerifyFinal() + * + * @param[in,out] handle AES-CMAC handler (work area) + * @param[in,out] mac MAC data area (mac_length byte) + * @param[in,out] mac_length MAC data length (2 to 16 bytes) + */ + fsp_err_t (* AES128CMAC_VerifyFinal)(sce_cmac_handle_t * handle, uint8_t * mac, uint32_t mac_length); + + /** Initialize AES256CMAC generation. + * @par Implemented as + * - @ref R_SCE_AES256CMAC_GenerateInit() + * + * @param[in,out] handle AES-CMAC handler (work area) + * @param[in] wrapped_key 256-bit AES wrapped key + */ + fsp_err_t (* AES256CMAC_GenerateInit)(sce_cmac_handle_t * handle, sce_aes_wrapped_key_t * wrapped_key); + + /** Update AES256CMAC generation. + * @par Implemented as + * - @ref R_SCE_AES256CMAC_GenerateUpdate() + * + * @param[in,out] handle AES-CMAC handler (work area) + * @param[in] message message data area (message_length byte) + * @param[in] message_length message data length (0 or more bytes) + */ + fsp_err_t (* AES256CMAC_GenerateUpdate)(sce_cmac_handle_t * handle, uint8_t * message, uint32_t message_length); + + /** Finalize AES256CMAC generation. + * @par Implemented as + * - @ref R_SCE_AES256CMAC_GenerateFinal() + * + * @param[in,out] handle AES-CMAC handler (work area) + * @param[in,out] mac MAC data area (16byte) + */ + fsp_err_t (* AES256CMAC_GenerateFinal)(sce_cmac_handle_t * handle, uint8_t * mac); + + /** Initialize AES256CMAC verification. + * @par Implemented as + * - @ref R_SCE_AES256CMAC_VerifyInit() + * + * @param[in,out] handle AES-CMAC handler (work area) + * @param[in] wrapped_key 256-bit AES wrapped key + */ + fsp_err_t (* AES256CMAC_VerifyInit)(sce_cmac_handle_t * handle, sce_aes_wrapped_key_t * wrapped_key); + + /** Update AES256CMAC verification. + * @par Implemented as + * - @ref R_SCE_AES256CMAC_VerifyUpdate() + * + * @param[in,out] handle AES-CMAC handler (work area) + * @param[in] message message data area (message_length byte) + * @param[in] message_length message data length (0 or more bytes) + */ + fsp_err_t (* AES256CMAC_VerifyUpdate)(sce_cmac_handle_t * handle, uint8_t * message, uint32_t message_length); + + /** Finalize AES256CMAC verification. + * @par Implemented as + * - @ref R_SCE_AES256CMAC_VerifyFinal() + * + * @param[in,out] handle AES-CMAC handler (work area) + * @param[in,out] mac MAC data area (mac_length byte) + * @param[in,out] mac_length MAC data length (2 to 16 bytes) + */ + fsp_err_t (* AES256CMAC_VerifyFinal)(sce_cmac_handle_t * handle, uint8_t * mac, uint32_t mac_length); + + /** Initialize SHA-256 Calculation. + * @par Implemented as + * - @ref R_SCE_SHA256_Init() + * + * @param[in,out] handle SHA handler (work area) + */ + fsp_err_t (* SHA256_Init)(sce_sha_md5_handle_t * handle); + + /** Update SHA-256 Calculation. + * @par Implemented as + * - @ref R_SCE_SHA256_Update() + * + * @param[in,out] handle SHA handler (work area) + * @param[in] message message data area + * @param[in] message_length message data length + */ + fsp_err_t (* SHA256_Update)(sce_sha_md5_handle_t * handle, uint8_t * message, uint32_t message_length); + + /** Finalize SHA-256 Calculation. + * @par Implemented as + * - @ref R_SCE_SHA256_Final() + * + * @param[in,out] handle SHA handler (work area) + * @param[in,out] digest hasha data area + * @param[in,out] digest_length hash data length (32bytes) + */ + fsp_err_t (* SHA256_Final)(sce_sha_md5_handle_t * handle, uint8_t * digest, uint32_t * digest_length); + + /** Initialize SHA-224 Calculation. + * @par Implemented as + * - @ref R_SCE_SHA224_Init() + * + * @param[in,out] handle SHA handler (work area) + */ + fsp_err_t (* SHA224_Init)(sce_sha_md5_handle_t * handle); + + /** Update SHA-224 Calculation. + * @par Implemented as + * - @ref R_SCE_SHA224_Update() + * + * @param[in,out] handle SHA handler (work area) + * @param[in] message message data area + * @param[in] message_length message data length + */ + fsp_err_t (* SHA224_Update)(sce_sha_md5_handle_t * handle, uint8_t * message, uint32_t message_length); + + /** Finalize SHA-224 Calculation. + * @par Implemented as + * - @ref R_SCE_SHA224_Final() + * + * @param[in,out] handle SHA handler (work area) + * @param[in,out] digest hasha data area + * @param[in,out] digest_length hash data length (32bytes) + */ + fsp_err_t (* SHA224_Final)(sce_sha_md5_handle_t * handle, uint8_t * digest, uint32_t * digest_length); + + /** This API outputs 1024-bit RSA wrapped pair key. + * @par Implemented as + * - @ref R_SCE_RSA1024_WrappedKeyPairGenerate() + * + * @param[in,out] wrapped_key 128-bit AES wrapped key + */ + fsp_err_t (* RSA1024_WrappedKeyPairGenerate)(sce_rsa1024_wrapped_pair_key_t * wrapped_pair_key); + + /** This API outputs 2048-bit RSA wrapped pair key. + * @par Implemented as + * - @ref R_SCE_RSA2048_WrappedKeyPairGenerate() + * + * @param[in,out] wrapped_key 128-bit AES wrapped key + */ + fsp_err_t (* RSA2048_WrappedKeyPairGenerate)(sce_rsa2048_wrapped_pair_key_t * wrapped_pair_key); + + /** This API outputs 1024-bit RSA public wrapped key. + * @par Implemented as + * - @ref R_SCE_RSA1024_EncryptedPublicKeyWrap() + * + * @param[in] initial_vector Initialization vector when generating encrypted_key + * @param[in] encrypted_key User key encryptedand MAC appended + * @param[in] key_update_key Key update keyring + * @param[in,out] wrapped_key 1024-bit RSA public wrapped key + */ + fsp_err_t (* RSA1024_EncryptedPublicKeyWrap)(uint8_t * initial_vector, uint8_t * encrypted_key, + sce_key_update_key_t * key_update_key, + sce_rsa1024_public_wrapped_key_t * wrapped_key); + + /** This API outputs 1024-bit RSA private wrapped key. + * @par Implemented as + * - @ref R_SCE_RSA1024_EncryptedPrivateKeyWrap() + * + * @param[in] initial_vector Initialization vector when generating encrypted_key + * @param[in] encrypted_key User key encryptedand MAC appended + * @param[in] key_update_key Key update keyring + * @param[in,out] wrapped_key 1024-bit RSA private wrapped key + */ + fsp_err_t (* RSA1024_EncryptedPrivateKeyWrap)(uint8_t * initial_vector, uint8_t * encrypted_key, + sce_key_update_key_t * key_update_key, + sce_rsa1024_private_wrapped_key_t * wrapped_key); + + /** This API outputs 2048-bit RSA public wrapped key. + * @par Implemented as + * - @ref R_SCE_RSA2048_EncryptedPublicKeyWrap() + * + * @param[in] initial_vector Initialization vector when generating encrypted_key + * @param[in] encrypted_key User key encryptedand MAC appended + * @param[in] key_update_key Key update keyring + * @param[in,out] wrapped_key 2048-bit RSA public wrapped key + */ + fsp_err_t (* RSA2048_EncryptedPublicKeyWrap)(uint8_t * initial_vector, uint8_t * encrypted_key, + sce_key_update_key_t * key_update_key, + sce_rsa2048_public_wrapped_key_t * wrapped_key); + + /** This API outputs 2048-bit RSA private wrapped key. + * @par Implemented as + * - @ref R_SCE_RSA2048_EncryptedPrivateKeyWrap() + * + * @param[in] initial_vector Initialization vector when generating encrypted_key + * @param[in] encrypted_key User key encryptedand MAC appended + * @param[in] key_update_key Key update keyring + * @param[in,out] wrapped_key 2048-bit RSA private wrapped key + */ + fsp_err_t (* RSA2048_EncryptedPrivateKeyWrap)(uint8_t * initial_vector, uint8_t * encrypted_key, + sce_key_update_key_t * key_update_key, + sce_rsa2048_private_wrapped_key_t * wrapped_key); + + /** This API outputs 4096-bit RSA public wrapped key. + * @par Implemented as + * - @ref R_SCE_RSA4096_EncryptedPublicKeyWrap() + * + * @param[in] initial_vector Initialization vector when generating encrypted_key + * @param[in] encrypted_key User key encryptedand MAC appended + * @param[in] key_update_key Key update keyring + * @param[in,out] wrapped_key 4096-bit RSA public wrapped key + */ + fsp_err_t (* RSA4096_EncryptedPublicKeyWrap)(uint8_t * initial_vector, uint8_t * encrypted_key, + sce_key_update_key_t * key_update_key, + sce_rsa4096_public_wrapped_key_t * wrapped_key); + + /** RSASSA-PKCS1-V1_5 signature generation. + * @par Implemented as + * - @ref R_SCE_RSASSA_PKCS1024_SignatureGenerate() + * + * @param[in] message_hash Message or hash value to which to attach signature + * @param[in,out] signature Signature text storage destination information + * @param[in] wrapped_key Inputs the 1024-bit RSA private wrapped key. + * @param[in] hash_type Only HW_SCE_RSA_HASH_SHA256 is supported + */ + fsp_err_t (* RSASSA_PKCS1024_SignatureGenerate)(sce_rsa_byte_data_t * message_hash, + sce_rsa_byte_data_t * signature, sce_rsa1024_private_wrapped_key_t * wrapped_key, uint8_t hash_type); + + /** RSASSA-PKCS1-V1_5 signature generation. + * @par Implemented as + * - @ref R_SCE_RSASSA_PKCS2048_SignatureGenerate() + * + * @param[in] message_hash Message or hash value to which to attach signature + * @param[in,out] signature Signature text storage destination information + * @param[in] wrapped_key Inputs the 2048-bit RSA private wrapped key. + * @param[in] hash_type Only HW_SCE_RSA_HASH_SHA256 is supported + */ + fsp_err_t (* RSASSA_PKCS2048_SignatureGenerate)(sce_rsa_byte_data_t * message_hash, + sce_rsa_byte_data_t * signature, sce_rsa2048_private_wrapped_key_t * wrapped_key, uint8_t hash_type); + + /** RSASSA-PKCS1-V1_5 signature verification. + * @par Implemented as + * - @ref R_SCE_RSASSA_PKCS1024_SignatureVerify() + * + * @param[in] signature Signature text information to verify + * @param[in] message_hash Message text or hash value to verify + * @param[in] wrapped_key Inputs the 1024-bit RSA public wrapped key. + * @param[in] hash_type Only HW_SCE_RSA_HASH_SHA256 is supported + */ + fsp_err_t (* RSASSA_PKCS1024_SignatureVerify)(sce_rsa_byte_data_t * signature, + sce_rsa_byte_data_t * message_hash, sce_rsa1024_public_wrapped_key_t * wrapped_key, uint8_t hash_type); + + /** RSASSA-PKCS1-V1_5 signature verification. + * @par Implemented as + * - @ref R_SCE_RSASSA_PKCS2048_SignatureVerify() + * + * @param[in] signature Signature text information to verify + * @param[in] message_hash Message text or hash value to verify + * @param[in] wrapped_key Inputs the 2048-bit RSA public wrapped key. + * @param[in] hash_type Only HW_SCE_RSA_HASH_SHA256 is supported + */ + fsp_err_t (* RSASSA_PKCS2048_SignatureVerify)(sce_rsa_byte_data_t * signature, + sce_rsa_byte_data_t * message_hash, sce_rsa2048_public_wrapped_key_t * wrapped_key, uint8_t hash_type); + + /** RSASSA-PKCS1-V1_5 signature verification. + * @par Implemented as + * - @ref R_SCE_RSASSA_PKCS4096_SignatureVerify() + * + * @param[in] signature Signature text information to verify + * @param[in] message_hash Message text or hash value to verify + * @param[in] wrapped_key Inputs the 4096-bit RSA public wrapped key. + * @param[in] hash_type Only HW_SCE_RSA_HASH_SHA256 is supported + */ + fsp_err_t (* RSASSA_PKCS4096_SignatureVerify)(sce_rsa_byte_data_t * signature, + sce_rsa_byte_data_t * message_hash, sce_rsa4096_public_wrapped_key_t * wrapped_key, uint8_t hash_type); + + /** RSAES-PKCS1-V1_5 encryption. + * @par Implemented as + * - @ref R_SCE_RSAES_PKCS1024_Encrypt() + * + * @param[in] plain plaintext + * @param[in,out] cipher ciphertext + * @param[in] wrapped_key Inputs the 1024-bit RSA public wrapped key. + */ + fsp_err_t (* RSAES_PKCS1024_Encrypt)(sce_rsa_byte_data_t * plain, sce_rsa_byte_data_t * cipher, + sce_rsa1024_public_wrapped_key_t * wrapped_key); + + /** RSAES-PKCS1-V1_5 encryption. + * @par Implemented as + * - @ref R_SCE_RSAES_PKCS2048_Encrypt() + * + * @param[in] plain plaintext + * @param[in,out] cipher ciphertext + * @param[in] wrapped_key Inputs the 2048-bit RSA public wrapped key. + */ + fsp_err_t (* RSAES_PKCS2048_Encrypt)(sce_rsa_byte_data_t * plain, sce_rsa_byte_data_t * cipher, + sce_rsa2048_public_wrapped_key_t * wrapped_key); + + /** RSAES-PKCS1-V1_5 encryption. + * @par Implemented as + * - @ref R_SCE_RSAES_PKCS4096_Encrypt() + * + * @param[in] plain plaintext + * @param[in,out] cipher ciphertext + * @param[in] wrapped_key Inputs the 4096-bit RSA public wrapped key. + */ + fsp_err_t (* RSAES_PKCS4096_Encrypt)(sce_rsa_byte_data_t * plain, sce_rsa_byte_data_t * cipher, + sce_rsa4096_public_wrapped_key_t * wrapped_key); + + /** RSAES-PKCS1-V1_5 decryption. + * @par Implemented as + * - @ref R_SCE_RSAES_PKCS1024_Decrypt() + * + * @param[in] cipher ciphertext + * @param[in,out] plain plaintext + * @param[in] wrapped_key Inputs the 1024-bit RSA private wrapped key. + */ + fsp_err_t (* RSAES_PKCS1024_Decrypt)(sce_rsa_byte_data_t * cipher, sce_rsa_byte_data_t * plain, + sce_rsa1024_private_wrapped_key_t * wrapped_key); + + /** RSAES-PKCS1-V1_5 decryption. + * @par Implemented as + * - @ref R_SCE_RSAES_PKCS2048_Decrypt() + * + * @param[in] cipher ciphertext + * @param[in,out] plain plaintext + * @param[in] wrapped_key Inputs the 2048-bit RSA private wrapped key. + */ + fsp_err_t (* RSAES_PKCS2048_Decrypt)(sce_rsa_byte_data_t * cipher, sce_rsa_byte_data_t * plain, + sce_rsa2048_private_wrapped_key_t * wrapped_key); + + /** This API outputs secp192r1 wrapped pair key. + * @par Implemented as + * - @ref R_SCE_ECC_secp192r1_WrappedKeyPairGenerate() + * + * @param[in,out] wrapped_pair_key Wrapped pair key for secp192r1 public key and private key pair + */ + fsp_err_t (* ECC_secp192r1_WrappedKeyPairGenerate)(sce_ecc_wrapped_pair_key_t * wrapped_pair_key); + + /** This API outputs secp224r1 wrapped pair key. + * @par Implemented as + * - @ref R_SCE_ECC_secp224r1_WrappedKeyPairGenerate() + * + * @param[in,out] wrapped_pair_key Wrapped pair key for secp224r1 public key and private key pair + */ + fsp_err_t (* ECC_secp224r1_WrappedKeyPairGenerate)(sce_ecc_wrapped_pair_key_t * wrapped_pair_key); + + /** This API outputs secp256r1 wrapped pair key. + * @par Implemented as + * - @ref R_SCE_ECC_secp256r1_WrappedKeyPairGenerate() + * + * @param[in,out] wrapped_pair_key Wrapped pair key for secp256r1 public key and private key pair + */ + fsp_err_t (* ECC_secp256r1_WrappedKeyPairGenerate)(sce_ecc_wrapped_pair_key_t * wrapped_pair_key); + + /** This API outputs BrainpoolP512r1 wrapped pair key. + * @par Implemented as + * - @ref R_SCE_ECC_BrainpoolP512r1_WrappedKeyPairGenerate() + * + * @param[in,out] wrapped_pair_key Wrapped pair key for BrainpoolP512r1 public key and private key pair + */ + fsp_err_t (* ECC_BrainpoolP512r1_WrappedKeyPairGenerate)(sce_ecc_wrapped_pair_key_t * wrapped_pair_key); + + /** This API outputs secp192r1 public wrapped key. + * @par Implemented as + * - @ref R_SCE_ECC_secp192r1_EncryptedPublicKeyWrap() + * + * @param[in] initial_vector Initialization vector when generating encrypted_key + * @param[in] encrypted_key User key encryptedand MAC appended + * @param[in] key_update_key Key update keyring + * @param[in,out] wrapped_key secp192r1 public wrapped key + */ + fsp_err_t (* ECC_secp192r1_EncryptedPublicKeyWrap)(uint8_t * initial_vector, uint8_t * encrypted_key, + sce_key_update_key_t * key_update_key, + sce_ecc_public_wrapped_key_t * wrapped_key); + + /** This API outputs secp224r1 public wrapped key. + * @par Implemented as + * - @ref R_SCE_ECC_secp224r1_EncryptedPublicKeyWrap() + * + * @param[in] initial_vector Initialization vector when generating encrypted_key + * @param[in] encrypted_key User key encryptedand MAC appended + * @param[in] key_update_key Key update keyring + * @param[in,out] wrapped_key secp224r1 public wrapped key + */ + fsp_err_t (* ECC_secp224r1_EncryptedPublicKeyWrap)(uint8_t * initial_vector, uint8_t * encrypted_key, + sce_key_update_key_t * key_update_key, + sce_ecc_public_wrapped_key_t * wrapped_key); + + /** This API outputs secp256r1 public wrapped key. + * @par Implemented as + * - @ref R_SCE_ECC_secp256r1_EncryptedPublicKeyWrap() + * + * @param[in] initial_vector Initialization vector when generating encrypted_key + * @param[in] encrypted_key User key encryptedand MAC appended + * @param[in] key_update_key Key update keyring + * @param[in,out] wrapped_key secp256r1 public wrapped key + */ + fsp_err_t (* ECC_secp256r1_EncryptedPublicKeyWrap)(uint8_t * initial_vector, uint8_t * encrypted_key, + sce_key_update_key_t * key_update_key, + sce_ecc_public_wrapped_key_t * wrapped_key); + + /** This API outputs BrainpoolP512r1 public wrapped key. + * @par Implemented as + * - @ref R_SCE_ECC_BrainpoolP512r1_EncryptedPublicKeyWrap() + * + * @param[in] initial_vector Initialization vector when generating encrypted_key + * @param[in] encrypted_key User key encryptedand MAC appended + * @param[in] key_update_key Key update keyring + * @param[in,out] wrapped_key BrainpoolP512r1 public wrapped key + */ + fsp_err_t (* ECC_BrainpoolP512r1_EncryptedPublicKeyWrap)(uint8_t * initial_vector, uint8_t * encrypted_key, + sce_key_update_key_t * key_update_key, + sce_ecc_public_wrapped_key_t * wrapped_key); + + /** This API outputs secp192r1 private wrapped key. + * @par Implemented as + * - @ref R_SCE_ECC_secp192r1_EncryptedPrivateKeyWrap() + * + * @param[in] initial_vector Initialization vector when generating encrypted_key + * @param[in] encrypted_key User key encryptedand MAC appended + * @param[in] key_update_key Key update keyring + * @param[in,out] wrapped_key secp192r1 private wrapped key + */ + fsp_err_t (* ECC_secp192r1_EncryptedPrivateKeyWrap)(uint8_t * initial_vector, uint8_t * encrypted_key, + sce_key_update_key_t * key_update_key, + sce_ecc_private_wrapped_key_t * wrapped_key); + + /** This API outputs secp224r1 private wrapped key. + * @par Implemented as + * - @ref R_SCE_ECC_secp224r1_EncryptedPrivateKeyWrap() + * + * @param[in] initial_vector Initialization vector when generating encrypted_key + * @param[in] encrypted_key User key encryptedand MAC appended + * @param[in] key_update_key Key update keyring + * @param[in,out] wrapped_key secp224r1 private wrapped key + */ + fsp_err_t (* ECC_secp224r1_EncryptedPrivateKeyWrap)(uint8_t * initial_vector, uint8_t * encrypted_key, + sce_key_update_key_t * key_update_key, + sce_ecc_private_wrapped_key_t * wrapped_key); + + /** This API outputs secp256r1 private wrapped key. + * @par Implemented as + * - @ref R_SCE_ECC_secp256r1_EncryptedPrivateKeyWrap() + * + * @param[in] initial_vector Initialization vector when generating encrypted_key + * @param[in] encrypted_key User key encryptedand MAC appended + * @param[in] key_update_key Key update keyring + * @param[in,out] wrapped_key secp256r1 private wrapped key + */ + fsp_err_t (* ECC_secp256r1_EncryptedPrivateKeyWrap)(uint8_t * initial_vector, uint8_t * encrypted_key, + sce_key_update_key_t * key_update_key, + sce_ecc_private_wrapped_key_t * wrapped_key); + + /** This API outputs BrainpoolP512r1 private wrapped key. + * @par Implemented as + * - @ref R_SCE_ECC_BrainpoolP512r1_EncryptedPrivateKeyWrap() + * + * @param[in] initial_vector Initialization vector when generating encrypted_key + * @param[in] encrypted_key User key encryptedand MAC appended + * @param[in] key_update_key Key update keyring + * @param[in,out] wrapped_key BrainpoolP512r1 private wrapped key + */ + fsp_err_t (* ECC_BrainpoolP512r1_EncryptedPrivateKeyWrap)(uint8_t * initial_vector, uint8_t * encrypted_key, + sce_key_update_key_t * key_update_key, + sce_ecc_private_wrapped_key_t * wrapped_key); + + /** ECDSA signature generation. + * @par Implemented as + * - @ref R_SCE_ECDSA_secp192r1_SignatureGenerate() + * + * @param[in] message_hash Message or hash value to which to attach signature + * @param[in,out] signature Signature text storage destination information + * @param[in] wrapped_key Input wrapped key of secp192r1 private key. + */ + fsp_err_t (* ECDSA_secp192r1_SignatureGenerate)(sce_ecdsa_byte_data_t * message_hash, + sce_ecdsa_byte_data_t * signature, + sce_ecc_private_wrapped_key_t * wrapped_key); + + /** ECDSA signature generation. + * @par Implemented as + * - @ref R_SCE_ECDSA_secp224r1_SignatureGenerate() + * + * @param[in] message_hash Message or hash value to which to attach signature + * @param[in,out] signature Signature text storage destination information + * @param[in] wrapped_key Input wrapped key of secp224r1 private key. + */ + fsp_err_t (* ECDSA_secp224r1_SignatureGenerate)(sce_ecdsa_byte_data_t * message_hash, + sce_ecdsa_byte_data_t * signature, + sce_ecc_private_wrapped_key_t * wrapped_key); + + /** ECDSA signature generation. + * @par Implemented as + * - @ref R_SCE_ECDSA_secp256r1_SignatureGenerate() + * + * @param[in] message_hash Message or hash value to which to attach signature + * @param[in,out] signature Signature text storage destination information + * @param[in] wrapped_key Input wrapped key of secp256r1 private key. + */ + fsp_err_t (* ECDSA_secp256r1_SignatureGenerate)(sce_ecdsa_byte_data_t * message_hash, + sce_ecdsa_byte_data_t * signature, + sce_ecc_private_wrapped_key_t * wrapped_key); + + /** ECDSA signature generation. + * @par Implemented as + * - @ref R_SCE_ECDSA_BrainpoolP512r1_SignatureGenerate() + * + * @param[in] message_hash Message or hash value to which to attach signature + * @param[in,out] signature Signature text storage destination information + * @param[in] wrapped_key Input wrapped key of BrainpoolP512r1 private key. + */ + fsp_err_t (* ECDSA_BrainpoolP512r1_SignatureGenerate)(sce_ecdsa_byte_data_t * message_hash, + sce_ecdsa_byte_data_t * signature, + sce_ecc_private_wrapped_key_t * wrapped_key); + + /** ECDSA signature verification. + * @par Implemented as + * - @ref R_SCE_ECDSA_secp192r1_SignatureVerify() + * + * @param[in] signature Signature text information to be verified + * @param[in,out] message_hash Message or hash value to be verified + * @param[in] wrapped_key Input wrapped key of secp192r1 public key. + */ + fsp_err_t (* ECDSA_secp192r1_SignatureVerify)(sce_ecdsa_byte_data_t * signature, + sce_ecdsa_byte_data_t * message_hash, + sce_ecc_public_wrapped_key_t * wrapped_key); + + /** ECDSA signature verification. + * @par Implemented as + * - @ref R_SCE_ECDSA_secp224r1_SignatureVerify() + * + * @param[in] signature Signature text information to be verified + * @param[in,out] message_hash Message or hash value to be verified + * @param[in] wrapped_key Input wrapped key of secp224r1 public key. + */ + fsp_err_t (* ECDSA_secp224r1_SignatureVerify)(sce_ecdsa_byte_data_t * signature, + sce_ecdsa_byte_data_t * message_hash, + sce_ecc_public_wrapped_key_t * wrapped_key); + + /** ECDSA signature verification. + * @par Implemented as + * - @ref R_SCE_ECDSA_secp256r1_SignatureVerify() + * + * @param[in] signature Signature text information to be verified + * @param[in,out] message_hash Message or hash value to be verified + * @param[in] wrapped_key Input wrapped key of secp256r1 public key. + */ + fsp_err_t (* ECDSA_secp256r1_SignatureVerify)(sce_ecdsa_byte_data_t * signature, + sce_ecdsa_byte_data_t * message_hash, + sce_ecc_public_wrapped_key_t * wrapped_key); + + /** ECDSA signature verification. + * @par Implemented as + * - @ref R_SCE_ECDSA_BrainpoolP512r1_SignatureVerify() + * + * @param[in] signature Signature text information to be verified + * @param[in,out] message_hash Message or hash value to be verified + * @param[in] wrapped_key Input wrapped key of BrainpoolP512r1 public key. + */ + fsp_err_t (* ECDSA_BrainpoolP512r1_SignatureVerify)(sce_ecdsa_byte_data_t * signature, + sce_ecdsa_byte_data_t * message_hash, + sce_ecc_public_wrapped_key_t * wrapped_key); + +} sce_api_t; + +/** This structure encompasses everything that is needed to use an instance of this interface. */ +typedef struct st_sce_instance +{ + sce_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance + sce_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance + sce_api_t const * p_api; ///< Pointer to the API structure for this instance +} sce_instance_t; + +#endif /* R_SCE_API_H */ + +/*******************************************************************************************************************//** + * @} (end addtogroup SCE_PROTECTED_API) + **********************************************************************************************************************/ diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example_git.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example_git.bb new file mode 100644 index 0000000000000000000000000000000000000000..216ea9c3ceeaca10ebc67529136dc9c77a69c3eb --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-example_git.bb @@ -0,0 +1,62 @@ +SUMMARY = "OP-TEE example" + +PACKAGE_ARCH = "${MACHINE_ARCH}" +inherit deploy python3native + +LICENSE = "BSD & GPLv2" +LIC_FILES_CHKSUM = "file://${S}/LICENSE;md5=cd95ab417e23b94f381dafc453d70c30" + +#TAG: 3.14.0 +PV = "3.14.0" +BRANCH = "master" +SRCREV = "e9c870525af8f7e7fccf575a0ca5394ce55adcec" + +# SRC_URI = " +# git://github.com/linaro-swg/optee_examples.git;branch=${BRANCH} +# file://git +# " + +SRC_URI = " \ + file://optee_examples \ +" + +DEPENDS = "optee-os optee-client" +DEPENDS += "python3-pyelftools-native python3-pycryptodome-native python3-pycryptodomex-native" + +TEEC_EXPORT = "${STAGING_DIR_HOST}${prefix}" +TA_DEV_KIT_DIR = "${STAGING_INCDIR}/optee/export-user_ta/" + +CFLAGS:prepend = "--sysroot=${STAGING_DIR_HOST}" + +EXTRA_OEMAKE = " \ + TA_DEV_KIT_DIR=${TA_DEV_KIT_DIR} \ + TEEC_EXPORT=${TEEC_EXPORT} \ + HOST_CROSS_COMPILE=${TARGET_PREFIX} \ + PLUGIN_LDFLAGS="--sysroot=${STAGING_DIR_HOST} -shared" \ +" + +S = "${WORKDIR}/git" + +do_compile() { + oe_runmake examples +} + +do_install[noexec] = "1" + +do_deploy() { + oe_runmake prepare-for-rootfs OUTPUT_DIR=${S}/out + + install -d ${S}/deploy/bin + install -d ${S}/deploy/lib/optee_armtz + + install -m 0755 ${S}/out/ca/* ${S}/deploy/bin/ + install -m 0755 ${S}/out/ta/* ${S}/deploy/lib/optee_armtz/ + + cd ${S}/deploy + install -d ${DEPLOYDIR} + + tar -zcvf ${DEPLOYDIR}/optee-example-${MACHINE}.tar.gz ./* + tar -jcvf ${DEPLOYDIR}/optee-example-${MACHINE}.tar.bz2 ./* +} + +addtask deploy before do_build after do_compile diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-os_git.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-os_git.bb new file mode 100644 index 0000000000000000000000000000000000000000..25898e2cd965c5005605d85a6e37a038ee05f4a1 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/optee/optee-os_git.bb @@ -0,0 +1,98 @@ +DESCRIPTION = "OP-TEE OS" + +LICENSE = "BSD-2-Clause & BSD-3-Clause" +LIC_FILES_CHKSUM = " \ + file://LICENSE;md5=c1f21c4f72f372ef38a5a4aee55ec173 \ +" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +require renesas/include/rzg2l-security-config.inc +inherit deploy python3native + +PV = "3.17.0" +BRANCH = "3.17.0/rz" +#TAG: 3.17.0 +SRCREV = "c6c0c5d713b6083cc71c1d48633e97d79ecb9f21" + +# SRC_URI = " \ +# git://github.com/renesas-rz/rzg_optee-os.git;branch=${BRANCH} +# " + +SRC_URI = " \ + file://rzg_optee-os \ +" + + +# COMPATIBLE_MACHINE = "(smarc-rzg2l|smarc-rzg2lc|smarc-rzg2ul|smarc-rzv2l|rzv2l-dev)" + +PLATFORM = "rz" +PLATFORM_FLAVOR_smarc-rzg2l = "g2l_smarc_2" +PLATFORM_FLAVOR_smarc-rzg2lc = "g2lc_smarc_1" +PLATFORM_FLAVOR_smarc-rzg2ul = "g2ul_smarc" +PLATFORM_FLAVOR_smarc-rzv2l = "g2l_smarc_4" +PLATFORM_FLAVOR_rzv2l-dev = "g2l_dev15_4" + +DEPENDS = " \ + python3-pyelftools-native python3-cryptography-native python3-idna-native secprv-native \ +" + +# Let the Makefile handle setting up the flags as it is a standalone application +LD[unexport] = "1" +LDFLAGS[unexport] = "1" +export CCcore="${CC}" +export LDcore="${LD}" +libdir[unexport] = "1" + +S = "${WORKDIR}/git" + +CFLAGS:prepend = "--sysroot=${STAGING_DIR_HOST}" + +EXTRA_OEMAKE = " \ + PLATFORM=${PLATFORM} PLATFORM_FLAVOR=${PLATFORM_FLAVOR} \ + CFG_ARM64_core=y CFG_REE_FS=y CFG_RPMB_FS=n CFG_CRYPTO_WITH_CE=n \ + CFG_RZ_SCE=n CFG_RZ_SCE_LIB_DIR=${SYMLINK_NATIVE_SEC_LIB_DIR} \ + CROSS_COMPILE64=${TARGET_PREFIX} \ +" + +do_compile() { + oe_runmake + + if [ "${TRUSTED_BOARD_BOOT}" = "1" ]; then + python3 ${MANIFEST_GENERATION_KCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl32_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl32_key.pem -certout ${S}/out/arm-plat-${PLATFORM}/core/bl32-kcert.bin + + python3 ${MANIFEST_GENERATION_CCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl32_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl32_key.pem -imgin ${S}/out/arm-plat-${PLATFORM}/core/tee-raw.bin \ + -certout ${S}/out/arm-plat-${PLATFORM}/core/bl32-ccert.bin -imgout ${S}/out/arm-plat-${PLATFORM}/core/tee_tbb.bin + fi +} + +do_install() { + #install TA devkit + install -d ${D}/usr/include/optee/export-user_ta/ + + for f in ${B}/out/arm-plat-${PLATFORM}/export-ta_arm64/* ; do + cp -aR $f ${D}/usr/include/optee/export-user_ta/ + done + + # install firmware images + install -d ${D}/boot + + # Copy TEE OS to install folder + install -m 0644 ${S}/out/arm-plat-${PLATFORM}/core/tee.elf ${D}/boot/tee-${MACHINE}.elf + install -m 0644 ${S}/out/arm-plat-${PLATFORM}/core/tee-raw.bin ${D}/boot/tee-${MACHINE}.bin + + if [ "${TRUSTED_BOARD_BOOT}" = "1" ]; then + install -m 0644 ${S}/out/arm-plat-${PLATFORM}/core/bl32-kcert.bin ${D}/boot/bl32-kcert-${MACHINE}.bin + install -m 0644 ${S}/out/arm-plat-${PLATFORM}/core/bl32-ccert.bin ${D}/boot/bl32-ccert-${MACHINE}.bin + install -m 0644 ${S}/out/arm-plat-${PLATFORM}/core/tee_tbb.bin ${D}/boot/tee-${MACHINE}_tbb.bin + fi +} + +FILES:${PN} = "/boot " +SYSROOT_DIRS += "/boot" + +FILES:${PN}-dev = "/usr/include/optee" + +INSANE_SKIP:${PN}-dev = "staticdev" diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/security-configurator/security-configurator.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/security-configurator/security-configurator.bb new file mode 100644 index 0000000000000000000000000000000000000000..e498c3abd521a92c18027c8f06a37f30f8b9d7cb --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/security-configurator/security-configurator.bb @@ -0,0 +1,113 @@ +DESCRIPTION = "RZ Security Configurator" +LICENSE = "CLOSED" + +require renesas/include/rzg2l-security-config.inc +inherit deploy python3native + +PV = "v1.11" + +SRC_URI = " file://security_configurator " + +DEPENDS = " \ + ${@oe.utils.conditional("TRUSTED_BOARD_BOOT", "1", "python3-pycryptodome-native python3-pycryptodomex-native secprv-native bootparameter-native", "",d)} \ +" + +# COMPATIBLE_MACHINE = "(smarc-rzg2l|smarc-rzg2lc|smarc-rzg2ul|smarc-rzv2l)" + +BOARD_smarc-rzg2l = "RZG2L_SMARC" +BOARD_smarc-rzg2lc = "RZG2LC_SMARC" +BOARD_smarc-rzg2ul = "RZG2UL_SMARC" +BOARD_smarc-rzv2l = "RZV2L_SMARC" + +PMIC_BOARD_smarc-rzg2l = "RZG2L_SMARC_PMIC" +PMIC_BOARD_smarc-rzv2l = "RZV2L_SMARC_PMIC" + +S = "${WORKDIR}/security_configurator" + +BUILD_DIR = "${S}/build/${BOARD}" +BUILD_PMIC_DIR = "${S}/build_pmic/${BOARD}" + +BUILD_TBB_DIR = "${S}/build_tbb/${BOARD}" +BUILD_PMIC_TBB_DIR = "${S}/build_pmic_tbb/${BOARD}" + +do_compile() { + oe_runmake BOARD=${BOARD} OUTDIR=${BUILD_DIR} + + if [ "${PMIC_SUPPORT}" = "1" ]; then + oe_runmake BOARD=${PMIC_BOARD} OUTDIR=${BUILD_PMIC_DIR}; + fi + + if [ "${TRUSTED_BOARD_BOOT}" = "1" ]; then + oe_runmake BOARD=${BOARD} OUTDIR=${BUILD_TBB_DIR} TRUSTED_BOARD_BOOT=1 + + mkdir -p ${BUILD_TBB_DIR}/tmp + IMAGE_FILE=$(find "${BUILD_TBB_DIR}" -name "Security_Configurator*.bin" -maxdepth 1 -printf "%f\n" ) + + python3 ${MANIFEST_GENERATION_KCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl2_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl2_key.pem -certout ${BUILD_TBB_DIR}/tmp/sec-cfg-kcert.bin + + python3 ${MANIFEST_GENERATION_CCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl2_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl2_key.pem -imgin ${BUILD_TBB_DIR}/${IMAGE_FILE} \ + -certout ${BUILD_TBB_DIR}/tmp/sec-cfg-ccert.bin -imgout ${BUILD_TBB_DIR}/tmp/sec-cfg-image.bin + + objcopy -I binary --adjust-vma=0x00012000 --pad-to=0x12400 ${BUILD_TBB_DIR}/tmp/sec-cfg-kcert.bin + objcopy -I binary --adjust-vma=0x00012400 --pad-to=0x13000 ${BUILD_TBB_DIR}/tmp/sec-cfg-ccert.bin + + cat ${BUILD_TBB_DIR}/tmp/sec-cfg-kcert.bin ${BUILD_TBB_DIR}/tmp/sec-cfg-ccert.bin \ + ${BUILD_TBB_DIR}/tmp/sec-cfg-image.bin > ${BUILD_TBB_DIR}/tmp/${IMAGE_FILE} + + bootparameter ${BUILD_TBB_DIR}/tmp/${IMAGE_FILE} ${BUILD_TBB_DIR}/${IMAGE_FILE%.*}_TBB.bin + cat ${BUILD_TBB_DIR}/tmp/${IMAGE_FILE} >> ${BUILD_TBB_DIR}/${IMAGE_FILE%.*}_TBB.bin + + objcopy -I binary -O srec --adjust-vma=0x00011E00 --srec-forceS3 ${BUILD_TBB_DIR}/${IMAGE_FILE%.*}_TBB.bin \ + ${BUILD_TBB_DIR}/${IMAGE_FILE%.*}_TBB.srec + + if [ "${PMIC_SUPPORT}" = "1" ]; then + oe_runmake BOARD=${PMIC_BOARD} OUTDIR=${BUILD_PMIC_TBB_DIR} TRUSTED_BOARD_BOOT=1 + + mkdir -p ${BUILD_PMIC_TBB_DIR}/tmp + IMAGE_FILE=$(find "${BUILD_PMIC_TBB_DIR}" -name "Security_Configurator*.bin" -maxdepth 1 -printf "%f\n" ) + + python3 ${MANIFEST_GENERATION_KCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl2_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl2_key.pem -certout ${BUILD_PMIC_TBB_DIR}/tmp/sec-cfg-kcert.bin + + python3 ${MANIFEST_GENERATION_CCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl2_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl2_key.pem -imgin ${BUILD_PMIC_TBB_DIR}/${IMAGE_FILE} \ + -certout ${BUILD_PMIC_TBB_DIR}/tmp/sec-cfg-ccert.bin -imgout ${BUILD_PMIC_TBB_DIR}/tmp/sec-cfg-image.bin + + objcopy -I binary --adjust-vma=0x00012000 --pad-to=0x12400 ${BUILD_PMIC_TBB_DIR}/tmp/sec-cfg-kcert.bin + objcopy -I binary --adjust-vma=0x00012400 --pad-to=0x13000 ${BUILD_PMIC_TBB_DIR}/tmp/sec-cfg-ccert.bin + + cat ${BUILD_PMIC_TBB_DIR}/tmp/sec-cfg-kcert.bin ${BUILD_PMIC_TBB_DIR}/tmp/sec-cfg-ccert.bin \ + ${BUILD_PMIC_TBB_DIR}/tmp/sec-cfg-image.bin > ${BUILD_PMIC_TBB_DIR}/tmp/${IMAGE_FILE} + + bootparameter ${BUILD_PMIC_TBB_DIR}/tmp/${IMAGE_FILE} ${BUILD_PMIC_TBB_DIR}/${IMAGE_FILE%.*}_TBB.bin + cat ${BUILD_PMIC_TBB_DIR}/tmp/${IMAGE_FILE} >> ${BUILD_PMIC_TBB_DIR}/${IMAGE_FILE%.*}_TBB.bin + + objcopy -I binary -O srec --adjust-vma=0x00011E00 --srec-forceS3 ${BUILD_PMIC_TBB_DIR}/${IMAGE_FILE%.*}_TBB.bin \ + ${BUILD_PMIC_TBB_DIR}/${IMAGE_FILE%.*}_TBB.srec + fi + fi +} + +do_install[noexec] = "1" + +do_deploy() { + install -d ${DEPLOYDIR} + + install -m 644 ${BUILD_DIR}/*.srec ${DEPLOYDIR} + + if [ "${PMIC_SUPPORT}" = "1" ]; then + install -m 644 ${BUILD_PMIC_DIR}/*.srec ${DEPLOYDIR} + fi + + if [ "${TRUSTED_BOARD_BOOT}" = "1" ]; then + install -m 644 ${BUILD_TBB_DIR}/*_TBB.srec ${DEPLOYDIR} + + if [ "${PMIC_SUPPORT}" = "1" ]; then + install -m 644 ${BUILD_PMIC_TBB_DIR}/*_TBB.srec ${DEPLOYDIR} + fi + fi +} + +addtask deploy after do_compile diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/trusted-firmware-a/tf-a-myir.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/trusted-firmware-a/tf-a-myir.bb new file mode 100644 index 0000000000000000000000000000000000000000..e0d35b203711412ed1dda7a8f027e45fc2df0442 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/trusted-firmware-a/tf-a-myir.bb @@ -0,0 +1,99 @@ +require renesas/include/rzg2l-security-config.inc +inherit python3native + +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" +DEPENDS:append = " \ + ${@oe.utils.conditional("TRUSTED_BOARD_BOOT", "1", "python3-pycryptodome-native python3-pycryptodomex-native secprv-native", "",d)} \ +" + +SRC_URI = " \ + file://myir-renesas-tf-a \ + file://mbedtls \ +" + +OPENEULER_MULTI_REPOS = "myir-renesas-tf-a mbedtls" +python do_fetch() { + bb.build.exec_func("do_openeuler_fetch_multi", d) +} + +SEC_FLAGS = " \ + ${@oe.utils.conditional("ENABLE_SPD_OPTEE", "1", " SPD=opteed", "",d)} \ + ${@oe.utils.conditional("TRUSTED_BOARD_BOOT", "1", " TRUSTED_BOARD_BOOT=1 COT=tbbr", "",d)} \ +" +EXTRA_FLAGS:append = " ${SEC_FLAGS}" +PMIC_EXTRA_FLAGS:append = " ${SEC_FLAGS}" + +# SYMLINK_NATIVE_BOOT_KEY_DIR = "${HOME}/rz_secprv/myir-remi/0.0.0" + +do_compile:append() { + + if [ "${TRUSTED_BOARD_BOOT}" = "1" ]; then + mkdir -p ${S}/build/${PLATFORM}/release/ + touch ${S}/build/${PLATFORM}/release/bl2-kcert.bin + touch ${S}/build/${PLATFORM}/release/bl2.bin + python3 ${MANIFEST_GENERATION_KCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl2_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl2_key.pem -certout ${S}/build/${PLATFORM}/release/bl2-kcert.bin + + python3 ${MANIFEST_GENERATION_CCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl2_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl2_key.pem -imgin ${S}/build/${PLATFORM}/release/bl2.bin \ + -certout ${S}/build/${PLATFORM}/release/bl2-ccert.bin -imgout ${S}/build/${PLATFORM}/release/bl2_tbb.bin + + mkdir -p ${S}/build/${PLATFORM}/release/ + touch ${S}/build/${PLATFORM}/release/bl31-kcert.bin + python3 ${MANIFEST_GENERATION_KCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl31_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl31_key.pem -certout ${S}/build/${PLATFORM}/release/bl31-kcert.bin + + touch ${S}/build/${PLATFORM}/release/bl31.bin + python3 ${MANIFEST_GENERATION_CCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl31_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl31_key.pem -imgin ${S}/build/${PLATFORM}/release/bl31.bin \ + -certout ${S}/build/${PLATFORM}/release/bl31-ccert.bin -imgout ${S}/build/${PLATFORM}/release/bl31_tbb.bin + + if [ "${PMIC_SUPPORT}" = "1" ]; then + sudo touch ${PMIC_BUILD_DIR}/bl2-kcert_pmic.bin + python3 ${MANIFEST_GENERATION_KCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl2_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl2_key.pem -certout ${PMIC_BUILD_DIR}/bl2-kcert_pmic.bin + + python3 ${MANIFEST_GENERATION_CCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl2_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl2_key.pem -imgin ${PMIC_BUILD_DIR}/bl2.bin \ + -certout ${PMIC_BUILD_DIR}/bl2-ccert_pmic.bin -imgout ${PMIC_BUILD_DIR}/bl2_pmic_tbb.bin + + python3 ${MANIFEST_GENERATION_KCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl31_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl31_key.pem -certout ${PMIC_BUILD_DIR}/bl31-kcert_pmic.bin + + python3 ${MANIFEST_GENERATION_CCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl31_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl31_key.pem -imgin ${PMIC_BUILD_DIR}/bl31.bin \ + -certout ${PMIC_BUILD_DIR}/bl31-ccert_pmic.bin -imgout ${PMIC_BUILD_DIR}/bl31_pmic_tbb.bin + fi + fi +} + +FILES:${PN} += "/boot/*" + +do_install:append () { + + if [ "${TRUSTED_BOARD_BOOT}" = "1" ]; then + bbplain "=====================" + # install firmware images + mkdir -p ${D}/boot/ + install -m 0644 ${S}/build/${PLATFORM}/release/bl2.bin ${D}/boot/bl2-${MACHINE}.bin + install -m 0644 ${S}/build/${PLATFORM}/release/bl2-kcert.bin ${D}/boot/bl2-kcert-${MACHINE}.bin + install -m 0644 ${S}/build/${PLATFORM}/release/bl2-ccert.bin ${D}/boot/bl2-ccert-${MACHINE}.bin + install -m 0644 ${S}/build/${PLATFORM}/release/bl2_tbb.bin ${D}/boot/bl2-${MACHINE}_tbb.bin + install -m 0644 ${S}/build/${PLATFORM}/release/bl31.bin ${D}/boot/bl31-${MACHINE}.bin + install -m 0644 ${S}/build/${PLATFORM}/release/bl31-kcert.bin ${D}/boot/bl31-kcert-${MACHINE}.bin + install -m 0644 ${S}/build/${PLATFORM}/release/bl31-ccert.bin ${D}/boot/bl31-ccert-${MACHINE}.bin + install -m 0644 ${S}/build/${PLATFORM}/release/bl31_tbb.bin ${D}/boot/bl31-${MACHINE}_tbb.bin + + if [ "${PMIC_SUPPORT}" = "1" ]; then + install -m 0644 ${PMIC_BUILD_DIR}/bl2-kcert_pmic.bin ${D}/boot/bl2-kcert-${MACHINE}_pmic.bin + install -m 0644 ${PMIC_BUILD_DIR}/bl2-ccert_pmic.bin ${D}/boot/bl2-ccert-${MACHINE}_pmic.bin + install -m 0644 ${PMIC_BUILD_DIR}/bl2_pmic_tbb.bin ${D}/boot/bl2-${MACHINE}_pmic_tbb.bin + install -m 0644 ${PMIC_BUILD_DIR}/bl31-kcert_pmic.bin ${D}/boot/bl31-kcert-${MACHINE}_pmic.bin + install -m 0644 ${PMIC_BUILD_DIR}/bl31-ccert_pmic.bin ${D}/boot/bl31-ccert-${MACHINE}_pmic.bin + install -m 0644 ${PMIC_BUILD_DIR}/bl31_pmic_tbb.bin ${D}/boot/bl31-${MACHINE}_pmic_tbb.bin + fi + + install -m 0644 ${S}/build/${PLATFORM}/release/root_of_trust_key_pk.hash ${D}/boot/root_of_trust_key_pk.hash + fi +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0001-disable-reserved-area-check.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0001-disable-reserved-area-check.patch new file mode 100755 index 0000000000000000000000000000000000000000..4f78e0cf6c87e4d591cf98a1f55e3f8e4a24a7b8 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0001-disable-reserved-area-check.patch @@ -0,0 +1,26 @@ +From f187497c8e3418730ed54a505022956748c6c8ab Mon Sep 17 00:00:00 2001 +From: Shinji Hirai +Date: Wed, 26 May 2021 12:04:26 +0900 +Subject: [PATCH 1/5] disable reserved area check + +--- + fs/fs.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/fs/fs.c b/fs/fs.c +index 29ad4d1a69..04d4e0c452 100644 +--- a/fs/fs.c ++++ b/fs/fs.c +@@ -510,8 +510,7 @@ static int fs_read_lmb_check(const char *filename, ulong addr, loff_t offset, + if (lmb_alloc_addr(&lmb, addr, read_len) == addr) + return 0; + +- log_err("** Reading file would overwrite reserved memory **\n"); +- return -ENOSPC; ++ return 0; + } + #endif + +-- +2.17.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0001-myir-myd-g2lx-usb.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0001-myir-myd-g2lx-usb.patch new file mode 100755 index 0000000000000000000000000000000000000000..ab65701b0912f1a6cfb77caef0976299c502708e --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0001-myir-myd-g2lx-usb.patch @@ -0,0 +1,935 @@ +diff --git a/arch/arm/dts/myb-rzg2l-base.dts b/arch/arm/dts/myb-rzg2l-base.dts +index 53af915b..66bb9081 100644 +--- a/arch/arm/dts/myb-rzg2l-base.dts ++++ b/arch/arm/dts/myb-rzg2l-base.dts +@@ -53,6 +53,29 @@ + ; + }; + ++ usb0_pins: usb0 { ++ pinmux = , /* VBUS */ ++ , /* OVC */ ++ ; /* OTG_ID */ ++ }; ++ ++ usb1_pins: usb1 { ++ pinmux = , /* VBUS */ ++ ; /* OVC */ ++ }; ++ ++ usb0_pins: usb0 { ++ pinmux = , ++ , ++ ; ++ }; ++ ++ usb1_pins: usb1 { ++ pinmux = , ++ ; ++ }; ++ ++ + }; + + &xinclk { +@@ -108,3 +131,38 @@ + reg = <0x3d>; + }; + }; ++ ++&usb2_phy0 { ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&ehci0 { ++ /* pinctrl placeholder ++ * If HCD, the following pins must be defined. ++ * VBUSEN - P4_0 pin. ++ * OVERCUR - P5_0 pin. ++ */ ++ status = "okay"; ++}; ++ ++&usb2_phy1 { ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ /* pinctrl placeholder ++ * If HCD, the following pins must be defined. ++ * VBUSEN - P42_0 pin. ++ * OVERCUR - P42_1 pin. ++ */ ++ status = "okay"; ++}; ++ +diff --git a/arch/arm/dts/myb-rzg2l.dts b/arch/arm/dts/myb-rzg2l.dts +index 3d38b7c8..fc216655 100644 +--- a/arch/arm/dts/myb-rzg2l.dts ++++ b/arch/arm/dts/myb-rzg2l.dts +@@ -27,4 +27,11 @@ + reg = <0 0x48000000 0 0x78000000>; + }; + ++ vbus0_usb2: regulator-vbus0-usb2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "USB20_VBUS0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ + }; +diff --git a/arch/arm/dts/smarc-rzg2l.dts b/arch/arm/dts/smarc-rzg2l.dts +index 0f1de89a..22a63465 100644 +--- a/arch/arm/dts/smarc-rzg2l.dts ++++ b/arch/arm/dts/smarc-rzg2l.dts +@@ -29,6 +29,12 @@ + /* first 128MB is reserved for secure area. */ + reg = <0 0x48000000 0 0x78000000>; + }; ++ vbus0_usb2: regulator-vbus0-usb2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "USB20_VBUS0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; + + }; + +@@ -59,6 +65,29 @@ + pinmux = , + ; + }; ++ ++ usb0_pins: usb0 { ++ pinmux = , /* VBUS */ ++ , /* OVC */ ++ ; /* OTG_ID */ ++ }; ++ ++ usb1_pins: usb1 { ++ pinmux = , /* VBUS */ ++ ; /* OVC */ ++ }; ++ ++ usb0_pins: usb0 { ++ pinmux = , ++ , ++ ; ++ }; ++ ++ usb1_pins: usb1 { ++ pinmux = , ++ ; ++ }; ++ + + }; + +@@ -115,3 +144,37 @@ + reg = <0x3d>; + }; + }; ++ ++&usb2_phy0 { ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&ehci0 { ++ /* pinctrl placeholder ++ * If HCD, the following pins must be defined. ++ * VBUSEN - P4_0 pin. ++ * OVERCUR - P5_0 pin. ++ */ ++ status = "okay"; ++}; ++ ++&usb2_phy1 { ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ /* pinctrl placeholder ++ * If HCD, the following pins must be defined. ++ * VBUSEN - P42_0 pin. ++ * OVERCUR - P42_1 pin. ++ */ ++ status = "okay"; ++}; +diff --git a/arch/arm/dts/smarc-rzg2ul.dts b/arch/arm/dts/smarc-rzg2ul.dts +index 77c06a54..b48c7c90 100644 +--- a/arch/arm/dts/smarc-rzg2ul.dts ++++ b/arch/arm/dts/smarc-rzg2ul.dts +@@ -29,6 +29,12 @@ + /* first 128MB is reserved for secure area. */ + reg = <0 0x48000000 0 0x38000000>; + }; ++ vbus0_usb2: regulator-vbus0-usb2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "USB20_VBUS0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; + + }; + +@@ -50,6 +56,29 @@ + , + ; + }; ++ ++ usb0_pins: usb0 { ++ pinmux = , /* VBUS */ ++ , /* OVC */ ++ ; /* OTG_ID */ ++ }; ++ ++ usb1_pins: usb1 { ++ pinmux = , /* VBUS */ ++ ; /* OVC */ ++ }; ++ ++ usb0_pins: usb0 { ++ pinmux = , ++ , ++ ; ++ }; ++ ++ usb1_pins: usb1 { ++ pinmux = , ++ ; ++ }; ++ + }; + + &xinclk { +@@ -92,3 +121,37 @@ + &i2c0 { + status = "okay"; + }; ++ ++&usb2_phy0 { ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&ehci0 { ++ /* pinctrl placeholder ++ * If HCD, the following pins must be defined. ++ * VBUSEN - P4_0 pin. ++ * OVERCUR - P5_0 pin. ++ */ ++ status = "okay"; ++}; ++ ++&usb2_phy1 { ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ /* pinctrl placeholder ++ * If HCD, the following pins must be defined. ++ * VBUSEN - P42_0 pin. ++ * OVERCUR - P42_1 pin. ++ */ ++ status = "okay"; ++}; +diff --git a/board/myir/myc-rzg2l/myc-rzg2l.c b/board/myir/myc-rzg2l/myc-rzg2l.c +index a6e98719..9cb9f363 100755 +--- a/board/myir/myc-rzg2l/myc-rzg2l.c ++++ b/board/myir/myc-rzg2l/myc-rzg2l.c +@@ -36,6 +36,7 @@ DECLARE_GLOBAL_DATA_PTR; + /* CPG */ + #define CPG_BASE 0x11010000 + #define CPG_CLKON_BASE (CPG_BASE + 0x500) ++#define CPG_CLKMON_BASE (CPG_BASE + 0x680) + #define CPG_RESET_BASE (CPG_BASE + 0x800) + #define CPG_RESET_ETH (CPG_RESET_BASE + 0x7C) + #define CPG_RESET_I2C (CPG_RESET_BASE + 0x80) +@@ -61,6 +62,8 @@ DECLARE_GLOBAL_DATA_PTR; + #define PFC_PM3B (PFC_BASE + 0x176) + #define PFC_PMC3B (PFC_BASE + 0x23B) + ++static void board_usb_init(void); ++ + void s_init(void) + { + /* SD1 power control: P39_1 = 0; P39_2 = 1; */ +@@ -126,6 +129,9 @@ int board_init(void) + *(volatile u32 *)(PFC_P3B) = (*(volatile u32 *)(PFC_P3B) & 0xFFFFFFF7) | 0x0; + mdelay(13); + *(volatile u32 *)(PFC_P3B) = (*(volatile u32 *)(PFC_P3B) & 0xFFFFFFF7) | 0x08; ++ ++ /* PINCTRL, USB-PHY, USB_BLK init */ ++ board_usb_init(); + + return 0; + } + + + + ++ ++#define CPG_RESET_USB (CPG_RESET_BASE + 0x78) ++#define CPG_CLKON_USB (CPG_CLKON_BASE + 0x78) ++#define CPG_CLKMON_USB (CPG_CLKMON_BASE + 0x78) ++#define CPG_RESET_SYC (CPG_RESET_BASE + 0x28) ++#define CPG_CLKON_SYC (CPG_CLKON_BASE + 0x28) ++#define CPG_CLKMON_SYC (CPG_CLKMON_BASE + 0x28) ++#define CPG_RESET_DMAC (CPG_RESET_BASE + 0x2C) ++#define CPG_CLKON_DMAC (CPG_CLKON_BASE + 0x2C) ++#define CPG_CLKMON_DMAC (CPG_CLKMON_BASE + 0x2C) ++#define CPG_RESET_GPIO (CPG_RESET_BASE + 0x98) ++#define CPG_CLKON_GPIO (CPG_CLKON_BASE + 0x98) ++#define CPG_CLKMON_GPIO (CPG_CLKMON_BASE + 0x98) ++ ++#define PFC_PWPR (PFC_BASE + 0x3014) ++#define PFC_PMC_BASE (PFC_BASE + 0x200) ++#define PFC_PFC_BASE (PFC_BASE + 0x400) ++ ++#define PFC_PMC15 (PFC_PMC_BASE + 0x15) ++#define PFC_PMC16 (PFC_PMC_BASE + 0x16) ++#define PFC_PMC3A (PFC_PMC_BASE + 0x3A) ++#define PFC_PFC14 (PFC_PFC_BASE + 4*(0x14)) ++#define PFC_PFC15 (PFC_PFC_BASE + 4*(0x15)) ++#define PFC_PFC16 (PFC_PMC_BASE + 4*(0x16)) ++#define PFC_PFC3A (PFC_PMC_BASE + 4*(0x3A)) ++ ++ ++static void board_usb_init(void) ++{ ++ /* Enable SYC */ ++ if ((*(volatile u32 *)CPG_CLKMON_SYC) != 0x00000001) { ++ (*(volatile u32 *)CPG_RESET_SYC) = 0x00010000; ++ (*(volatile u32 *)CPG_RESET_SYC) = 0x00010001; ++ (*(volatile u32 *)CPG_CLKON_SYC) = 0x00010001; ++ } ++ /* Enable DMAC */ ++ if ((*(volatile u32 *)CPG_CLKMON_DMAC) != 0x00000003) { ++ (*(volatile u32 *)CPG_RESET_DMAC) = 0x00030000; ++ (*(volatile u32 *)CPG_RESET_DMAC) = 0x00030003; ++ (*(volatile u32 *)CPG_CLKON_DMAC) = 0x00030003; ++ } ++ ++ /* Enable GPIO */ ++ if ((*(volatile u32 *)CPG_CLKMON_GPIO) != 0x00000001) { ++ (*(volatile u32 *)CPG_RESET_GPIO) = 0x00070007; ++ (*(volatile u32 *)CPG_RESET_GPIO) = 0x00070007; ++ (*(volatile u32 *)CPG_CLKON_GPIO) = 0x00010001; ++ } ++ /* Enable USB */ ++ if ((*(volatile u32 *)CPG_CLKMON_USB) != 0x0000000f) { ++ (*(volatile u32 *)CPG_RESET_USB) = 0x000f0000; ++ (*(volatile u32 *)CPG_RESET_USB) = 0x000f000f; ++ (*(volatile u32 *)CPG_CLKON_USB) = 0x000f000f; ++ ++ } ++ ++/* Setup */ ++ /* Disable GPIO Write Protect */ ++ (*(volatile u32 *)PFC_PWPR) &= ~(0x1u << 7); /* PWPR.BOWI = 0 */ ++ (*(volatile u32 *)PFC_PWPR) |= (0x1u << 6); /* PWPR.PFCWE = 1 */ ++ (*(volatile u32 *)PFC_PWPR); /* barrier */ ++ ++ /* Enable USB0 HCD/PCD */ ++ /* DP/DM are fixed */ ++ /* set P4_0 as Func.1 for VBUSEN */ ++ /* PMC14.b0 = 1 */ ++ /* PFC14.PFC0 = 0 */ ++ ++ ++ /* set P5_0 as Func.1 for OVC */ ++ (*(volatile u8 *)PFC_PMC15) |= (0x1u << 0); ++ (*(volatile u8 *)PFC_PFC15) &= ~(0x7u << 0); ++ (*(volatile u8 *)PFC_PFC15) |= (0x1u << 0); ++ ++ /* set P5_1 as Func.1 for OTG_ID */ ++ (*(volatile u8 *)PFC_PMC15) |= (0x1u << 1); ++ (*(volatile u8 *)PFC_PFC15) &= ~(0x7u << 8); ++ (*(volatile u8 *)PFC_PFC15) |= (0x1u << 8); ++ ++/* Enable USB1 HCD */ ++ /* DP/DM are fixed */ ++ /* set P42_0 as Func.1 for VBUSEN */ ++ (*(volatile u8 *)PFC_PMC3A) |= (0x1u << 0); /* PMC15.b0 = 1 */ ++ (*(volatile u8 *)PFC_PFC3A) &= ~(0x7u << 0); /* PFC15.PFC0 = 0 */ ++ (*(volatile u8 *)PFC_PFC3A) |= (0x1u << 0); ++ ++ /* set P42_1 as Func.1 for OVC */ ++ (*(volatile u8 *)PFC_PMC3A) |= (0x1u << 1); ++ (*(volatile u8 *)PFC_PFC3A) &= ~(0x7u << 8); ++ (*(volatile u8 *)PFC_PFC3A) |= (0x1u << 8); ++ ++ /* Enable write protect */ ++ /* Enable PFC write protect */ ++ (*(volatile u32 *)PFC_PWPR) &= ~(0x1u << 6); /* PWPR.PFCWE = 0 */ ++ (*(volatile u32 *)PFC_PWPR) |= (0x1u << 7); /* PWPR.BOWI = 1 */ ++ (*(volatile u32 *)PFC_PWPR); /* barrier */ ++ ++ ++/********************************************/ ++ ++#define USBPHY_BASE (0x11c40000) ++#define USB0_BASE (0x11c50000) ++#define USBF_BASE (0x11c60000) ++#define USB1_BASE (0x11c70000) ++ ++ /* Reset USB2.0 PHY */ ++#define USBPHY_RESET (USBPHY_BASE + 0x000u) ++#define USBPHY_UDIRPD (USBPHY_BASE + 0x01cu) ++ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001133u; ++ udelay(1); ++#if 1 /* US0/USB1 use: USB0=OTG, USB1=Host */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001000u; ++#endif ++#if 0 /* USB1 unuse: USB0=OTG, USB1=USBTEST */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001011u; /* USB0 only */ ++#endif ++#if 0 /* USB0 unuse: USB0=USBTEST, USB1=OTG */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001000u; /* USB1 only */ ++#endif ++ udelay(100); ++ ++/********************************************/ ++/* USBTEST registers */ ++#define RESET (0x000) ++#define UCLKCTL (0x018) ++#define UDIRPD (0x01c) ++#define CON_CTRL (0x020) ++#define CLK_STAT (0x104) ++ ++#define HcRhDescriptorA (0x048) ++#define COMMCTRL (0x800) ++#define LPSTS (0x102) ++ ++/* Setup USB0 */ ++/* Release USB_BLK module from the standby state (in board_cpg_init) */ ++ ++ /* Overcurrent function is not supported now */ ++ (*(volatile u32 *)(USB0_BASE + HcRhDescriptorA)) |= (0x1u << 12); /* NOCP = 1 */ ++ /* Select the clock supplid to USBPHY */ ++// (*(volatile u32 *)(USBTEST_BASE + UCLKCTL)) = // TO BE FIXED ++ /* Select host / peripheral operation (USB0 only) */ ++ (*(volatile u32 *)(USB0_BASE + COMMCTRL)) = 0; /* USB0 is host mode */ ++ /* Set USBPHY normal operation (Function only) */ ++ // (*(volatile u16 *)USBF_BASE + LPSTS) |= (0x1u << 14); /* USBPHY.SUSPM = 1 (func only) */ ++ /* Select the clock supplid to USBPHY */ ++// (*(volatile u32 *)(USBCTR.PLL_RST = // TO BE FIXED ++ /* wait 100 usec */ ++ udelay(100); ++ ++ /* Setup USB1 */ ++ /* Release USB_BLK module from the standby state (in board_cpg_init) */ ++ ++ /* Overcurrent function is not supported now */ ++ (*(volatile u32 *)(USB1_BASE + HcRhDescriptorA)) |= (0x1u << 12); /* NOCP = 1 */ ++ /* Select the clock supplid to USBPHY */ ++ // (*(volatile u32 *)(USBCTR.PLL_RST = // TO BE FIXED ++ // /* wait 100 usec */ ++ udelay(100); ++} ++ ++ +diff --git a/board/renesas/rzg2l-dev/rzg2l-dev.c b/board/renesas/rzg2l-dev/rzg2l-dev.c +index 49e8d9d1..bc4d4733 100644 +--- a/board/renesas/rzg2l-dev/rzg2l-dev.c ++++ b/board/renesas/rzg2l-dev/rzg2l-dev.c +@@ -35,6 +35,7 @@ DECLARE_GLOBAL_DATA_PTR; + /* CPG */ + #define CPG_BASE 0x11010000 + #define CPG_CLKON_BASE (CPG_BASE + 0x500) ++#define CPG_CLKMON_BASE (CPG_BASE + 0x680) + #define CPG_RESET_BASE (CPG_BASE + 0x800) + #define CPG_RESET_ETH (CPG_RESET_BASE + 0x7C) + #define CPG_RESET_I2C (CPG_RESET_BASE + 0x80) +@@ -46,6 +47,8 @@ DECLARE_GLOBAL_DATA_PTR; + #define PFC_PM37 (PFC_BASE + 0x16E) + #define PFC_PMC37 (PFC_BASE + 0x237) + ++static void board_usb_init(void); ++ + void s_init(void) + { + /* SD1 power control: P39_1 = 0; P39_2 = 1; */ +@@ -86,6 +89,9 @@ int board_init(void) + /* adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; + ++ /* PINCTRL, USB-PHY, USB_BLK init */ ++ board_usb_init(); ++ + return 0; + } + +@@ -93,3 +99,161 @@ void reset_cpu(void) + { + + } ++ ++#define CPG_RESET_USB (CPG_RESET_BASE + 0x78) ++#define CPG_CLKON_USB (CPG_CLKON_BASE + 0x78) ++#define CPG_CLKMON_USB (CPG_CLKMON_BASE + 0x78) ++#define CPG_RESET_SYC (CPG_RESET_BASE + 0x28) ++#define CPG_CLKON_SYC (CPG_CLKON_BASE + 0x28) ++#define CPG_CLKMON_SYC (CPG_CLKMON_BASE + 0x28) ++#define CPG_RESET_DMAC (CPG_RESET_BASE + 0x2C) ++#define CPG_CLKON_DMAC (CPG_CLKON_BASE + 0x2C) ++#define CPG_CLKMON_DMAC (CPG_CLKMON_BASE + 0x2C) ++#define CPG_RESET_GPIO (CPG_RESET_BASE + 0x98) ++#define CPG_CLKON_GPIO (CPG_CLKON_BASE + 0x98) ++#define CPG_CLKMON_GPIO (CPG_CLKMON_BASE + 0x98) ++ ++#define PFC_PWPR (PFC_BASE + 0x3014) ++#define PFC_PMC_BASE (PFC_BASE + 0x200) ++#define PFC_PFC_BASE (PFC_BASE + 0x400) ++ ++#define PFC_PMC15 (PFC_PMC_BASE + 0x15) ++#define PFC_PMC16 (PFC_PMC_BASE + 0x16) ++#define PFC_PMC3A (PFC_PMC_BASE + 0x3A) ++#define PFC_PFC14 (PFC_PFC_BASE + 4*(0x14)) ++#define PFC_PFC15 (PFC_PFC_BASE + 4*(0x15)) ++#define PFC_PFC16 (PFC_PMC_BASE + 4*(0x16)) ++#define PFC_PFC3A (PFC_PMC_BASE + 4*(0x3A)) ++ ++static void board_usb_init(void) ++{ ++ /* Enable SYC */ ++ if ((*(volatile u32 *)CPG_CLKMON_SYC) != 0x00000001) { ++ (*(volatile u32 *)CPG_RESET_SYC) = 0x00010000; ++ (*(volatile u32 *)CPG_RESET_SYC) = 0x00010001; ++ (*(volatile u32 *)CPG_CLKON_SYC) = 0x00010001; ++ } ++ /* Enable DMAC */ ++ if ((*(volatile u32 *)CPG_CLKMON_DMAC) != 0x00000003) { ++ (*(volatile u32 *)CPG_RESET_DMAC) = 0x00030000; ++ (*(volatile u32 *)CPG_RESET_DMAC) = 0x00030003; ++ (*(volatile u32 *)CPG_CLKON_DMAC) = 0x00030003; ++ } ++ ++ /* Enable GPIO */ ++ if ((*(volatile u32 *)CPG_CLKMON_GPIO) != 0x00000001) { ++ (*(volatile u32 *)CPG_RESET_GPIO) = 0x00070007; ++ (*(volatile u32 *)CPG_RESET_GPIO) = 0x00070007; ++ (*(volatile u32 *)CPG_CLKON_GPIO) = 0x00010001; ++ } ++ /* Enable USB */ ++ if ((*(volatile u32 *)CPG_CLKMON_USB) != 0x0000000f) { ++ (*(volatile u32 *)CPG_RESET_USB) = 0x000f0000; ++ (*(volatile u32 *)CPG_RESET_USB) = 0x000f000f; ++ (*(volatile u32 *)CPG_CLKON_USB) = 0x000f000f; ++ } ++ ++/* Setup */ ++ /* Disable GPIO Write Protect */ ++ (*(volatile u32 *)PFC_PWPR) &= ~(0x1u << 7); /* PWPR.BOWI = 0 */ ++ (*(volatile u32 *)PFC_PWPR) |= (0x1u << 6); /* PWPR.PFCWE = 1 */ ++ (*(volatile u32 *)PFC_PWPR); /* barrier */ ++ ++/* Enable USB0 HCD/PCD */ ++ /* DP/DM are fixed */ ++ /* set P4_0 as Func.1 for VBUSEN */ ++ /* PMC14.b0 = 1 */ ++ /* PFC14.PFC0 = 0 */ ++ ++ ++ /* set P5_0 as Func.1 for OVC */ ++ (*(volatile u8 *)PFC_PMC15) |= (0x1u << 0); ++ (*(volatile u8 *)PFC_PFC15) &= ~(0x7u << 0); ++ (*(volatile u8 *)PFC_PFC15) |= (0x1u << 0); ++ ++ /* set P5_1 as Func.1 for OTG_ID */ ++ (*(volatile u8 *)PFC_PMC15) |= (0x1u << 1); ++ (*(volatile u8 *)PFC_PFC15) &= ~(0x7u << 8); ++ (*(volatile u8 *)PFC_PFC15) |= (0x1u << 8); ++ ++/* Enable USB1 HCD */ ++ /* DP/DM are fixed */ ++ /* set P42_0 as Func.1 for VBUSEN */ ++ (*(volatile u8 *)PFC_PMC3A) |= (0x1u << 0); /* PMC15.b0 = 1 */ ++ (*(volatile u8 *)PFC_PFC3A) &= ~(0x7u << 0); /* PFC15.PFC0 = 0 */ ++ (*(volatile u8 *)PFC_PFC3A) |= (0x1u << 0); ++ ++ /* set P42_1 as Func.1 for OVC */ ++ (*(volatile u8 *)PFC_PMC3A) |= (0x1u << 1); ++ (*(volatile u8 *)PFC_PFC3A) &= ~(0x7u << 8); ++ (*(volatile u8 *)PFC_PFC3A) |= (0x1u << 8); ++ ++/* Enable write protect */ ++ /* Enable PFC write protect */ ++ (*(volatile u32 *)PFC_PWPR) &= ~(0x1u << 6); /* PWPR.PFCWE = 0 */ ++ (*(volatile u32 *)PFC_PWPR) |= (0x1u << 7); /* PWPR.BOWI = 1 */ ++ (*(volatile u32 *)PFC_PWPR); /* barrier */ ++ ++/********************************************/ ++ ++#define USBPHY_BASE (0x11c40000) ++#define USB0_BASE (0x11c50000) ++#define USBF_BASE (0x11c60000) ++#define USB1_BASE (0x11c70000) ++ ++/* Reset USB2.0 PHY */ ++#define USBPHY_RESET (USBPHY_BASE + 0x000u) ++#define USBPHY_UDIRPD (USBPHY_BASE + 0x01cu) ++ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001133u; ++ udelay(1); ++#if 1 /* US0/USB1 use: USB0=OTG, USB1=Host */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001000u; ++#endif ++#if 0 /* USB1 unuse: USB0=OTG, USB1=USBTEST */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001011u; /* USB0 only */ ++#endif ++#if 0 /* USB0 unuse: USB0=USBTEST, USB1=OTG */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001000u; /* USB1 only */ ++#endif ++ udelay(100); ++ ++/********************************************/ ++ ++/* USBTEST registers */ ++#define RESET (0x000) ++#define UCLKCTL (0x018) ++#define UDIRPD (0x01c) ++#define CON_CTRL (0x020) ++#define CLK_STAT (0x104) ++ ++#define HcRhDescriptorA (0x048) ++#define COMMCTRL (0x800) ++#define LPSTS (0x102) ++ ++/* Setup USB0 */ ++ /* Release USB_BLK module from the standby state (in board_cpg_init) */ ++ ++ /* Overcurrent function is not supported now */ ++ (*(volatile u32 *)(USB0_BASE + HcRhDescriptorA)) |= (0x1u << 12); /* NOCP = 1 */ ++ /* Select the clock supplid to USBPHY */ ++// (*(volatile u32 *)(USBTEST_BASE + UCLKCTL)) = // TO BE FIXED ++ /* Select host / peripheral operation (USB0 only) */ ++ (*(volatile u32 *)(USB0_BASE + COMMCTRL)) = 0; /* USB0 is host mode */ ++ /* Set USBPHY normal operation (Function only) */ ++// (*(volatile u16 *)USBF_BASE + LPSTS) |= (0x1u << 14); /* USBPHY.SUSPM = 1 (func only) */ ++ /* Select the clock supplid to USBPHY */ ++// (*(volatile u32 *)(USBCTR.PLL_RST = // TO BE FIXED ++ /* wait 100 usec */ ++ udelay(100); ++ ++/* Setup USB1 */ ++ /* Release USB_BLK module from the standby state (in board_cpg_init) */ ++ ++ /* Overcurrent function is not supported now */ ++ (*(volatile u32 *)(USB1_BASE + HcRhDescriptorA)) |= (0x1u << 12); /* NOCP = 1 */ ++ /* Select the clock supplid to USBPHY */ ++// (*(volatile u32 *)(USBCTR.PLL_RST = // TO BE FIXED ++ /* wait 100 usec */ ++ udelay(100); ++} +\ No newline at end of file +diff --git a/board/renesas/rzg2ul-dev/rzg2ul-dev.c b/board/renesas/rzg2ul-dev/rzg2ul-dev.c +index 310ddcde..5f50d663 100644 +--- a/board/renesas/rzg2ul-dev/rzg2ul-dev.c ++++ b/board/renesas/rzg2ul-dev/rzg2ul-dev.c +@@ -36,6 +36,7 @@ DECLARE_GLOBAL_DATA_PTR; + /* CPG */ + #define CPG_BASE 0x11010000 + #define CPG_CLKON_BASE (CPG_BASE + 0x500) ++#define CPG_CLKMON_BASE (CPG_BASE + 0x680) + #define CPG_RESET_BASE (CPG_BASE + 0x800) + #define CPG_RESET_ETH (CPG_RESET_BASE + 0x7C) + #define CPG_RESET_I2C (CPG_RESET_BASE + 0x80) +@@ -58,6 +59,8 @@ DECLARE_GLOBAL_DATA_PTR; + #define PFC_PM1D (PFC_BASE + 0x013A) + #define PFC_PMC1D (PFC_BASE + 0x021D) + ++static void board_usb_init(void); ++ + void s_init(void) + { + #if CONFIG_TARGET_SMARC_RZG2UL +@@ -160,6 +163,9 @@ int board_init(void) + /* adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; + ++ /* PINCTRL, USB-PHY, USB_BLK init */ ++ board_usb_init(); ++ + return 0; + } + +@@ -167,3 +173,161 @@ void reset_cpu(void) + { + + } ++ ++#define CPG_RESET_USB (CPG_RESET_BASE + 0x78) ++#define CPG_CLKON_USB (CPG_CLKON_BASE + 0x78) ++#define CPG_CLKMON_USB (CPG_CLKMON_BASE + 0x78) ++#define CPG_RESET_SYC (CPG_RESET_BASE + 0x28) ++#define CPG_CLKON_SYC (CPG_CLKON_BASE + 0x28) ++#define CPG_CLKMON_SYC (CPG_CLKMON_BASE + 0x28) ++#define CPG_RESET_DMAC (CPG_RESET_BASE + 0x2C) ++#define CPG_CLKON_DMAC (CPG_CLKON_BASE + 0x2C) ++#define CPG_CLKMON_DMAC (CPG_CLKMON_BASE + 0x2C) ++#define CPG_RESET_GPIO (CPG_RESET_BASE + 0x98) ++#define CPG_CLKON_GPIO (CPG_CLKON_BASE + 0x98) ++#define CPG_CLKMON_GPIO (CPG_CLKMON_BASE + 0x98) ++ ++#define PFC_PWPR (PFC_BASE + 0x3014) ++#define PFC_PMC_BASE (PFC_BASE + 0x200) ++#define PFC_PFC_BASE (PFC_BASE + 0x400) ++ ++#define PFC_PMC15 (PFC_PMC_BASE + 0x15) ++#define PFC_PMC16 (PFC_PMC_BASE + 0x16) ++#define PFC_PMC3A (PFC_PMC_BASE + 0x3A) ++#define PFC_PFC14 (PFC_PFC_BASE + 4*(0x14)) ++#define PFC_PFC15 (PFC_PFC_BASE + 4*(0x15)) ++#define PFC_PFC16 (PFC_PMC_BASE + 4*(0x16)) ++#define PFC_PFC3A (PFC_PMC_BASE + 4*(0x3A)) ++ ++static void board_usb_init(void) ++{ ++ /* Enable SYC */ ++ if ((*(volatile u32 *)CPG_CLKMON_SYC) != 0x00000001) { ++ (*(volatile u32 *)CPG_RESET_SYC) = 0x00010000; ++ (*(volatile u32 *)CPG_RESET_SYC) = 0x00010001; ++ (*(volatile u32 *)CPG_CLKON_SYC) = 0x00010001; ++ } ++ /* Enable DMAC */ ++ if ((*(volatile u32 *)CPG_CLKMON_DMAC) != 0x00000003) { ++ (*(volatile u32 *)CPG_RESET_DMAC) = 0x00030000; ++ (*(volatile u32 *)CPG_RESET_DMAC) = 0x00030003; ++ (*(volatile u32 *)CPG_CLKON_DMAC) = 0x00030003; ++ } ++ ++ /* Enable GPIO */ ++ if ((*(volatile u32 *)CPG_CLKMON_GPIO) != 0x00000001) { ++ (*(volatile u32 *)CPG_RESET_GPIO) = 0x00070007; ++ (*(volatile u32 *)CPG_RESET_GPIO) = 0x00070007; ++ (*(volatile u32 *)CPG_CLKON_GPIO) = 0x00010001; ++ } ++ /* Enable USB */ ++ if ((*(volatile u32 *)CPG_CLKMON_USB) != 0x0000000f) { ++ (*(volatile u32 *)CPG_RESET_USB) = 0x000f0000; ++ (*(volatile u32 *)CPG_RESET_USB) = 0x000f000f; ++ (*(volatile u32 *)CPG_CLKON_USB) = 0x000f000f; ++ } ++ ++/* Setup */ ++ /* Disable GPIO Write Protect */ ++ (*(volatile u32 *)PFC_PWPR) &= ~(0x1u << 7); /* PWPR.BOWI = 0 */ ++ (*(volatile u32 *)PFC_PWPR) |= (0x1u << 6); /* PWPR.PFCWE = 1 */ ++ (*(volatile u32 *)PFC_PWPR); /* barrier */ ++ ++/* Enable USB0 HCD/PCD */ ++ /* DP/DM are fixed */ ++ /* set P4_0 as Func.1 for VBUSEN */ ++ /* PMC14.b0 = 1 */ ++ /* PFC14.PFC0 = 0 */ ++ ++ ++ /* set P5_0 as Func.1 for OVC */ ++ (*(volatile u8 *)PFC_PMC15) |= (0x1u << 0); ++ (*(volatile u8 *)PFC_PFC15) &= ~(0x7u << 0); ++ (*(volatile u8 *)PFC_PFC15) |= (0x1u << 0); ++ ++ /* set P5_1 as Func.1 for OTG_ID */ ++ (*(volatile u8 *)PFC_PMC15) |= (0x1u << 1); ++ (*(volatile u8 *)PFC_PFC15) &= ~(0x7u << 8); ++ (*(volatile u8 *)PFC_PFC15) |= (0x1u << 8); ++ ++/* Enable USB1 HCD */ ++ /* DP/DM are fixed */ ++ /* set P42_0 as Func.1 for VBUSEN */ ++ (*(volatile u8 *)PFC_PMC3A) |= (0x1u << 0); /* PMC15.b0 = 1 */ ++ (*(volatile u8 *)PFC_PFC3A) &= ~(0x7u << 0); /* PFC15.PFC0 = 0 */ ++ (*(volatile u8 *)PFC_PFC3A) |= (0x1u << 0); ++ ++ /* set P42_1 as Func.1 for OVC */ ++ (*(volatile u8 *)PFC_PMC3A) |= (0x1u << 1); ++ (*(volatile u8 *)PFC_PFC3A) &= ~(0x7u << 8); ++ (*(volatile u8 *)PFC_PFC3A) |= (0x1u << 8); ++ ++/* Enable write protect */ ++ /* Enable PFC write protect */ ++ (*(volatile u32 *)PFC_PWPR) &= ~(0x1u << 6); /* PWPR.PFCWE = 0 */ ++ (*(volatile u32 *)PFC_PWPR) |= (0x1u << 7); /* PWPR.BOWI = 1 */ ++ (*(volatile u32 *)PFC_PWPR); /* barrier */ ++ ++/********************************************/ ++ ++#define USBPHY_BASE (0x11c40000) ++#define USB0_BASE (0x11c50000) ++#define USBF_BASE (0x11c60000) ++#define USB1_BASE (0x11c70000) ++ ++/* Reset USB2.0 PHY */ ++#define USBPHY_RESET (USBPHY_BASE + 0x000u) ++#define USBPHY_UDIRPD (USBPHY_BASE + 0x01cu) ++ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001133u; ++ udelay(1); ++#if 1 /* US0/USB1 use: USB0=OTG, USB1=Host */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001000u; ++#endif ++#if 0 /* USB1 unuse: USB0=OTG, USB1=USBTEST */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001011u; /* USB0 only */ ++#endif ++#if 0 /* USB0 unuse: USB0=USBTEST, USB1=OTG */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001000u; /* USB1 only */ ++#endif ++ udelay(100); ++ ++/********************************************/ ++ ++/* USBTEST registers */ ++#define RESET (0x000) ++#define UCLKCTL (0x018) ++#define UDIRPD (0x01c) ++#define CON_CTRL (0x020) ++#define CLK_STAT (0x104) ++ ++#define HcRhDescriptorA (0x048) ++#define COMMCTRL (0x800) ++#define LPSTS (0x102) ++ ++/* Setup USB0 */ ++ /* Release USB_BLK module from the standby state (in board_cpg_init) */ ++ ++ /* Overcurrent function is not supported now */ ++ (*(volatile u32 *)(USB0_BASE + HcRhDescriptorA)) |= (0x1u << 12); /* NOCP = 1 */ ++ /* Select the clock supplid to USBPHY */ ++// (*(volatile u32 *)(USBTEST_BASE + UCLKCTL)) = // TO BE FIXED ++ /* Select host / peripheral operation (USB0 only) */ ++ (*(volatile u32 *)(USB0_BASE + COMMCTRL)) = 0; /* USB0 is host mode */ ++ /* Set USBPHY normal operation (Function only) */ ++// (*(volatile u16 *)USBF_BASE + LPSTS) |= (0x1u << 14); /* USBPHY.SUSPM = 1 (func only) */ ++ /* Select the clock supplid to USBPHY */ ++// (*(volatile u32 *)(USBCTR.PLL_RST = // TO BE FIXED ++ /* wait 100 usec */ ++ udelay(100); ++ ++/* Setup USB1 */ ++ /* Release USB_BLK module from the standby state (in board_cpg_init) */ ++ ++ /* Overcurrent function is not supported now */ ++ (*(volatile u32 *)(USB1_BASE + HcRhDescriptorA)) |= (0x1u << 12); /* NOCP = 1 */ ++ /* Select the clock supplid to USBPHY */ ++// (*(volatile u32 *)(USBCTR.PLL_RST = // TO BE FIXED ++ /* wait 100 usec */ ++ udelay(100); ++} +\ No newline at end of file +diff --git a/drivers/phy/phy-rcar-gen3.c b/drivers/phy/phy-rcar-gen3.c +index 8c596314..f54bd48d 100644 +--- a/drivers/phy/phy-rcar-gen3.c ++++ b/drivers/phy/phy-rcar-gen3.c +@@ -59,7 +59,7 @@ struct rcar_gen3_phy { + static int rcar_gen3_phy_phy_init(struct phy *phy) + { + struct rcar_gen3_phy *priv = dev_get_priv(phy->dev); +- ++#if 0 + /* Initialize USB2 part */ + writel(0, priv->regs + USB2_INT_ENABLE); + writel(USB2_SPD_RSM_TIMSET_INIT, priv->regs + USB2_SPD_RSM_TIMSET); +@@ -71,12 +71,13 @@ static int rcar_gen3_phy_phy_init(struct phy *phy) + clrbits_le32(priv->regs + USB2_COMMCTRL, USB2_COMMCTRL_OTG_PERI); + + setbits_le32(priv->regs + USB2_ADPCTRL, USB2_ADPCTRL_DRVVBUS); +- ++#endif + return 0; + } + + static int rcar_gen3_phy_phy_power_on(struct phy *phy) + { ++#if 0 + struct rcar_gen3_phy *priv = dev_get_priv(phy->dev); + int ret; + +@@ -88,18 +89,21 @@ static int rcar_gen3_phy_phy_power_on(struct phy *phy) + + setbits_le32(priv->regs + USB2_USBCTR, USB2_USBCTR_PLL_RST); + clrbits_le32(priv->regs + USB2_USBCTR, USB2_USBCTR_PLL_RST); +- ++#endif + return 0; + } + + static int rcar_gen3_phy_phy_power_off(struct phy *phy) + { ++#if 0 + struct rcar_gen3_phy *priv = dev_get_priv(phy->dev); + + if (!priv->vbus_supply) + return 0; + + return regulator_set_enable(priv->vbus_supply, false); ++#endif ++ return 0; + } + + static const struct phy_ops rcar_gen3_phy_phy_ops = { +@@ -111,12 +115,14 @@ static const struct phy_ops rcar_gen3_phy_phy_ops = { + static int rcar_gen3_phy_probe(struct udevice *dev) + { + struct rcar_gen3_phy *priv = dev_get_priv(dev); ++#if 0 + int ret; ++#endif + + priv->regs = dev_read_addr(dev); + if (priv->regs == FDT_ADDR_T_NONE) + return -EINVAL; +- ++#if 0 + ret = device_get_supply_regulator(dev, "vbus-supply", + &priv->vbus_supply); + if (ret && ret != -ENOENT) { +@@ -132,7 +138,7 @@ static int rcar_gen3_phy_probe(struct udevice *dev) + ret = clk_enable(&priv->clk); + if (ret) + return ret; +- ++#endif + return 0; + } + +diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c +index 4c28a69b..c4db3b59 100644 +--- a/drivers/usb/host/ehci-generic.c ++++ b/drivers/usb/host/ehci-generic.c +@@ -148,8 +148,9 @@ static int ehci_usb_probe(struct udevice *dev) + err = ehci_enable_vbus_supply(dev); + if (err) + goto reset_err; +- ++#if 0 + err = ehci_setup_phy(dev, &priv->phy, 0); ++#endif + if (err) + goto regulator_err; + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0002-add-CRAMFS-support.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0002-add-CRAMFS-support.patch new file mode 100755 index 0000000000000000000000000000000000000000..165b9141142e605140f522d5f78c24d544c6fadb --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0002-add-CRAMFS-support.patch @@ -0,0 +1,24 @@ +diff --git a/configs/myc-rzg2l_ddr1gb_defconfig b/configs/myc-rzg2l_ddr1gb_defconfig +index 7939a320..f9df268f 100644 +--- a/configs/myc-rzg2l_ddr1gb_defconfig ++++ b/configs/myc-rzg2l_ddr1gb_defconfig +@@ -32,6 +32,7 @@ CONFIG_CMD_EXT4=y + CONFIG_CMD_EXT4_WRITE=y + CONFIG_CMD_FAT=y + CONFIG_CMD_FS_GENERIC=y ++CONFIG_FS_CRAMFS=y + CONFIG_OF_CONTROL=y + CONFIG_OF_LIST="myc-rzg2l" + CONFIG_MULTI_DTB_FIT_LZO=y +diff --git a/configs/myc-rzg2l_defconfig b/configs/myc-rzg2l_defconfig +index ca66d2df..5c574a10 100644 +--- a/configs/myc-rzg2l_defconfig ++++ b/configs/myc-rzg2l_defconfig +@@ -32,6 +32,7 @@ CONFIG_CMD_EXT4=y + CONFIG_CMD_EXT4_WRITE=y + CONFIG_CMD_FAT=y + CONFIG_CMD_FS_GENERIC=y ++CONFIG_FS_CRAMFS=y + CONFIG_OF_CONTROL=y + CONFIG_OF_LIST="myc-rzg2l" + CONFIG_MULTI_DTB_FIT_LZO=y diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0002-cmd-Add-cm33-command.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0002-cmd-Add-cm33-command.patch new file mode 100755 index 0000000000000000000000000000000000000000..e8c0d6cec9802730e9e65598b0195615d3be0d06 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0002-cmd-Add-cm33-command.patch @@ -0,0 +1,183 @@ +From 47a881a7e2d7ca34fad905a3962245c93922b0fc Mon Sep 17 00:00:00 2001 +From: Tu Duong +Date: Wed, 30 Mar 2022 08:05:11 +0700 +Subject: [PATCH 2/5] cmd: Add cm33 command + +Signed-off-by: Tu Duong +--- + cmd/Kconfig | 8 ++++ + cmd/Makefile | 1 + + cmd/cm33.c | 131 +++++++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 140 insertions(+) + create mode 100755 cmd/cm33.c + +diff --git a/cmd/Kconfig b/cmd/Kconfig +index 0c984d735d..7d293f466f 100644 +--- a/cmd/Kconfig ++++ b/cmd/Kconfig +@@ -1,5 +1,13 @@ + menu "Command line interface" + ++menu "Renesas specific commands" ++config CMD_CM33 ++ bool "RZ/G2L CM33 commands" ++ help ++ Commands used to enable and control the embedded CM33 in the RZ/G2L. ++ ++endmenu ++ + config CMDLINE + bool "Support U-Boot commands" + default y +diff --git a/cmd/Makefile b/cmd/Makefile +index 3a9c9747c9..8b4f288187 100644 +--- a/cmd/Makefile ++++ b/cmd/Makefile +@@ -37,6 +37,7 @@ obj-$(CONFIG_CMD_BUTTON) += button.o + obj-$(CONFIG_CMD_CACHE) += cache.o + obj-$(CONFIG_CMD_CBFS) += cbfs.o + obj-$(CONFIG_CMD_CLK) += clk.o ++obj-$(CONFIG_CMD_CM33) += cm33.o + obj-$(CONFIG_CMD_CLS) += cls.o + obj-$(CONFIG_CMD_CONFIG) += config.o + obj-$(CONFIG_CMD_CONITRACE) += conitrace.o +diff --git a/cmd/cm33.c b/cmd/cm33.c +new file mode 100755 +index 0000000000..d7d6914b8f +--- /dev/null ++++ b/cmd/cm33.c +@@ -0,0 +1,131 @@ ++#include ++#include ++#include ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++#define CPG_SIPLL3_MON (*(volatile u32 *)0x1101013C) // PLL3 (SSCG) Monitor Register ++#define CPG_CLKON_CM33 (*(volatile u32 *)0x11010504) // Clock Control Register Cortex-M33 ++#define CPG_CLKMON_CM33 (*(volatile u32 *)0x11010684) // Clock Monitor Register Cortex-M33 ++#define CPG_RST_CM33 (*(volatile u32 *)0x11010804) // Reset Control Register Cortex-M33 ++#define CPG_RSTMON_CM33 (*(volatile u32 *)0x11010984) // Reset Monitor Register Cortex-M33 ++ ++#define SYS_CM33_CFG0 (*(volatile u32 *)0x11020804) // CM33 Config Register0 ++#define SYS_CM33_CFG1 (*(volatile u32 *)0x11020808) // CM33 Config Register1 ++#define SYS_CM33_CFG2 (*(volatile u32 *)0x1102080C) // CM33 Config Register2 ++#define SYS_CM33_CFG3 (*(volatile u32 *)0x11020810) // CM33 Config Register3 ++#define SYS_CM33_CTL (*(volatile u32 *)0x11020818) // CM33 Control Register ++#define SYS_LSI_MODE (*(volatile u32 *)0x11020A00) // LSI Mode Signal Register ++#define SYS_LP_CM33CTL1 (*(volatile u32 *)0x11020D28) // Lowpower Sequence CM33 Control Register1 ++ ++static void cm33_boot_normal_mode() ++{ ++ // Supply clock to CM33_CLKIN ++ CPG_CLKON_CM33 = 0x00010001; ++ ++ // Poll CPG_CLKMON_CM33 to confirm that CM33_CLKIN clock is supplied ++ while (CPG_CLKMON_CM33 != 0x1) ++ mdelay(10); ++ ++ // Stop the reset signals (released from the reset state) ++ CPG_RST_CM33 = 0x00070007; ++ ++ // Poll CPG_RSTMON_CM33 to confirm that all the reset signals are not applied ++ while(CPG_RSTMON_CM33 != 0) ++ mdelay(10); ++} ++ ++static void cm33_boot_debug_mode() ++{ ++ // Supply clock to CM33_TSCLK and CM33_CLKIN ++ CPG_CLKON_CM33 = 0x00030003; ++ ++ // Poll CPG_CLKMON_CM33 to confirm that both CM33_TSCLK and CM33_CLKIN clock are supplied ++ while (CPG_CLKMON_CM33 != 0x3) ++ mdelay(10); ++ ++ // Set DEBUGQREQn bit of SYS_LP_CM33CTL1 to 1 ++ SYS_LP_CM33CTL1 = 0x00001100; ++ ++ // Poll SYS_LP_CM33CTL1 to check if DEBUGQACCEPTn bit becomes 1 ++ // Fixme. Lacking of SYS_LP_CM33CTL1.DEBUGQACCEPTn info ++ ++ // Set FETCHCNT bit of SYS_CM33_CTL register to 1 ++ SYS_CM33_CTL = 0x00000001; ++ ++ // Stop the reset signals (released from the reset state) ++ CPG_RST_CM33 = 0x00070007; ++ ++ // Poll CPG_RSTMON_CM33 to confirm that all the reset signals are not applied ++ while (CPG_RSTMON_CM33 != 0) ++ mdelay(10); ++ ++ // Set FETCHCNT bit of SYS_CM33_CTL register to 0 ++ SYS_CM33_CTL = 0x00000000; ++} ++ ++void cm33_start(u8 debug, u32 s_addr, u32 ns_addr) ++{ ++ // Check if the SSCG PLL3 is ON or not ++ if ((CPG_SIPLL3_MON & 0x1) == 0x1) { ++ SYS_CM33_CFG0 = 0x00103CE5; ++ SYS_CM33_CFG1 = 0x00103CE5; ++ } else { ++ SYS_CM33_CFG0 = 0x00003D08; ++ SYS_CM33_CFG1 = 0x00003D08; ++ } ++ ++ // Set the secure vector address of Cortex-M33 ++ SYS_CM33_CFG2 = s_addr; ++ ++ // Set the non secure vector address of Cortex-M33 ++ SYS_CM33_CFG3 = ns_addr; ++ ++ // Start the CM33 propram in normal/debug mode ++ debug ? cm33_boot_debug_mode() : cm33_boot_normal_mode(); ++} ++ ++int do_cm33(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]) ++{ ++ u32 s_addr, ns_addr; ++ ++ /* need at least two arguments */ ++ if (argc < 2) ++ goto usage; ++ ++ if (strcmp(argv[1], "start_normal") == 0) { ++ /* two addresses are required */ ++ if (argc < 4) ++ goto usage; ++ ++ s_addr = simple_strtoul(argv[2], NULL, 16); ++ ns_addr = simple_strtoul(argv[3], NULL, 16); ++ cm33_start(0, s_addr, ns_addr); ++ } else if (strcmp(argv[1], "start_debug") == 0) { ++ /* two addresses are required */ ++ if (argc < 4) ++ goto usage; ++ ++ s_addr = simple_strtoul(argv[2], NULL, 16); ++ ns_addr = simple_strtoul(argv[3], NULL, 16); ++ cm33_start(1, s_addr, ns_addr); ++ } else ++ goto usage; ++ ++ return 0; ++ ++usage: ++ return CMD_RET_USAGE; ++} ++ ++static char cm33_help_text[] = ++ "\n\tstart_normal [s_addr] [ns_addr] - Reset and start CM33 in normal mode with firmware\n" ++ "\t\t\tlocated at address [s_addr] (secure) and [ns_addr] (non secure)\n" ++ "\tstart_debug [s_addr] [ns_addr] - Reset and start CM33 in debug mode with firmware\n" ++ "\t\t\tlocated at address [s_addr] (secure) and [ns_addr] (non secure)\n" ++ ""; ++ ++U_BOOT_CMD( ++ cm33, CONFIG_SYS_MAXARGS, 1, do_cm33, ++ "Control CM33 CPU", cm33_help_text ++); +-- +2.17.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0003-configs-smarc-rzg2l_defconfig-Enable-CM33-command.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0003-configs-smarc-rzg2l_defconfig-Enable-CM33-command.patch new file mode 100755 index 0000000000000000000000000000000000000000..860e33338218fe74215b85ae33df839df6ca9198 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0003-configs-smarc-rzg2l_defconfig-Enable-CM33-command.patch @@ -0,0 +1,21 @@ +From 92102bcc5658af8f809de99bbd5891c4e5c1556a Mon Sep 17 00:00:00 2001 +From: Canh Dao +Date: Wed, 13 Apr 2022 16:04:28 +0700 +Subject: [PATCH 1/3] configs: smarc-rzg2l_defconfig: Enable CM33 command + +--- + configs/smarc-rzg2l_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/configs/smarc-rzg2l_defconfig b/configs/smarc-rzg2l_defconfig +index 5453d9e93d..47993785ac 100644 +--- a/configs/smarc-rzg2l_defconfig ++++ b/configs/smarc-rzg2l_defconfig +@@ -76,3 +76,4 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_SYS_MMC_ENV_DEV=0 + CONFIG_SYS_MMC_ENV_PART=2 + CONFIG_SYS_I2C_RZG2L_RIIC=y ++CONFIG_CMD_CM33=y +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0003-del-eth0-zoomlion.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0003-del-eth0-zoomlion.patch new file mode 100755 index 0000000000000000000000000000000000000000..cf1a63a528a3fa81de90a890cc6b0c515178455d --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0003-del-eth0-zoomlion.patch @@ -0,0 +1,63 @@ +diff --git a/arch/arm/dts/myb-rzg2l-base.dts b/arch/arm/dts/myb-rzg2l-base.dts +index 66bb9081..3836803d 100644 +--- a/arch/arm/dts/myb-rzg2l-base.dts ++++ b/arch/arm/dts/myb-rzg2l-base.dts +@@ -27,6 +27,7 @@ + }; + + &pinctrl { ++/* + eth0_pins: eth0 { + pinmux = , + , +@@ -47,7 +48,7 @@ + , + ; + }; +- ++*/ + i2c1_pins: i2c1 { + pinmux = , + ; +@@ -108,7 +109,7 @@ + bus-width = <4>; + status = "okay"; + }; +- ++/* + ð0 { + pinctrl-names = "default"; + pinctrl-0 = <ð0_pins>; +@@ -120,7 +121,7 @@ + reg = <4>; + }; + }; +- ++*/ + &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +diff --git a/configs/myc-rzg2l_ddr1gb_defconfig b/configs/myc-rzg2l_ddr1gb_defconfig +index 7939a320..f9df268f 100644 +--- a/configs/myc-rzg2l_ddr1gb_defconfig ++++ b/configs/myc-rzg2l_ddr1gb_defconfig +@@ -32,6 +32,7 @@ CONFIG_CMD_EXT4=y + CONFIG_CMD_EXT4_WRITE=y + CONFIG_CMD_FAT=y + CONFIG_CMD_FS_GENERIC=y ++CONFIG_FS_CRAMFS=y + CONFIG_OF_CONTROL=y + CONFIG_OF_LIST="myc-rzg2l" + CONFIG_MULTI_DTB_FIT_LZO=y +diff --git a/configs/myc-rzg2l_defconfig b/configs/myc-rzg2l_defconfig +index ca66d2df..5c574a10 100644 +--- a/configs/myc-rzg2l_defconfig ++++ b/configs/myc-rzg2l_defconfig +@@ -32,6 +32,7 @@ CONFIG_CMD_EXT4=y + CONFIG_CMD_EXT4_WRITE=y + CONFIG_CMD_FAT=y + CONFIG_CMD_FS_GENERIC=y ++CONFIG_FS_CRAMFS=y + CONFIG_OF_CONTROL=y + CONFIG_OF_LIST="myc-rzg2l" + CONFIG_MULTI_DTB_FIT_LZO=y diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0004-add-set-gpio261-zoomlion.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0004-add-set-gpio261-zoomlion.patch new file mode 100755 index 0000000000000000000000000000000000000000..322dd992b878167c749e46edfc03ffdd904197ae --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0004-add-set-gpio261-zoomlion.patch @@ -0,0 +1,95 @@ +diff --git a/arch/arm/dts/myb-rzg2l-base.dts b/arch/arm/dts/myb-rzg2l-base.dts +index 66bb9081..3836803d 100644 +--- a/arch/arm/dts/myb-rzg2l-base.dts ++++ b/arch/arm/dts/myb-rzg2l-base.dts +@@ -27,6 +27,7 @@ + }; + + &pinctrl { ++/* + eth0_pins: eth0 { + pinmux = , + , +@@ -47,7 +48,7 @@ + , + ; + }; +- ++*/ + i2c1_pins: i2c1 { + pinmux = , + ; +@@ -108,7 +109,7 @@ + bus-width = <4>; + status = "okay"; + }; +- ++/* + ð0 { + pinctrl-names = "default"; + pinctrl-0 = <ð0_pins>; +@@ -120,7 +121,7 @@ + reg = <4>; + }; + }; +- ++*/ + &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +diff --git a/board/myir/myc-rzg2l/myc-rzg2l.c b/board/myir/myc-rzg2l/myc-rzg2l.c +index 9cb9f363..4c79516b 100755 +--- a/board/myir/myc-rzg2l/myc-rzg2l.c ++++ b/board/myir/myc-rzg2l/myc-rzg2l.c +@@ -62,6 +62,12 @@ DECLARE_GLOBAL_DATA_PTR; + #define PFC_PM3B (PFC_BASE + 0x176) + #define PFC_PMC3B (PFC_BASE + 0x23B) + ++/*P26_1*/ ++#define PFC_P2A (PFC_BASE + 0x02A) ++#define PFC_PM2A (PFC_BASE + 0x154) ++#define PFC_PMC2A (PFC_BASE + 0x22A) ++ ++ + static void board_usb_init(void); + + void s_init(void) +@@ -129,8 +135,14 @@ int board_init(void) + *(volatile u32 *)(PFC_P3B) = (*(volatile u32 *)(PFC_P3B) & 0xFFFFFFF7) | 0x0; + mdelay(13); + *(volatile u32 *)(PFC_P3B) = (*(volatile u32 *)(PFC_P3B) & 0xFFFFFFF7) | 0x08; ++ + + /* PINCTRL, USB-PHY, USB_BLK init */ ++ *(volatile u32 *)(PFC_PMC2A) &= 0xFFFFFFFC; /* Port func mode */ ++ *(volatile u32 *)(PFC_PM2A) = (*(volatile u32 *)(PFC_PM2A) & 0xFFFFFFCF) | 0x20; /* Port output mode 0b10 */ ++ ++ *(volatile u32 *)(PFC_P2A) = (*(volatile u32 *)(PFC_P2A) & 0xFFFFFFFD) | 0x02; ++ + board_usb_init(); + + return 0; +diff --git a/configs/myc-rzg2l_ddr1gb_defconfig b/configs/myc-rzg2l_ddr1gb_defconfig +index 7939a320..f9df268f 100644 +--- a/configs/myc-rzg2l_ddr1gb_defconfig ++++ b/configs/myc-rzg2l_ddr1gb_defconfig +@@ -32,6 +32,7 @@ CONFIG_CMD_EXT4=y + CONFIG_CMD_EXT4_WRITE=y + CONFIG_CMD_FAT=y + CONFIG_CMD_FS_GENERIC=y ++CONFIG_FS_CRAMFS=y + CONFIG_OF_CONTROL=y + CONFIG_OF_LIST="myc-rzg2l" + CONFIG_MULTI_DTB_FIT_LZO=y +diff --git a/configs/myc-rzg2l_defconfig b/configs/myc-rzg2l_defconfig +index ca66d2df..5c574a10 100644 +--- a/configs/myc-rzg2l_defconfig ++++ b/configs/myc-rzg2l_defconfig +@@ -32,6 +32,7 @@ CONFIG_CMD_EXT4=y + CONFIG_CMD_EXT4_WRITE=y + CONFIG_CMD_FAT=y + CONFIG_CMD_FS_GENERIC=y ++CONFIG_FS_CRAMFS=y + CONFIG_OF_CONTROL=y + CONFIG_OF_LIST="myc-rzg2l" + CONFIG_MULTI_DTB_FIT_LZO=y diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0004-add-usb-power-zoomlion.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0004-add-usb-power-zoomlion.patch new file mode 100755 index 0000000000000000000000000000000000000000..abd88a53e0e816a50070055743b10bd6f7e3022a --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0004-add-usb-power-zoomlion.patch @@ -0,0 +1,107 @@ +diff --git a/arch/arm/dts/myb-rzg2l-base.dts b/arch/arm/dts/myb-rzg2l-base.dts +index 66bb9081..3836803d 100644 +--- a/arch/arm/dts/myb-rzg2l-base.dts ++++ b/arch/arm/dts/myb-rzg2l-base.dts +@@ -27,6 +27,7 @@ + }; + + &pinctrl { ++/* + eth0_pins: eth0 { + pinmux = , + , +@@ -47,7 +48,7 @@ + , + ; + }; +- ++*/ + i2c1_pins: i2c1 { + pinmux = , + ; +@@ -108,7 +109,7 @@ + bus-width = <4>; + status = "okay"; + }; +- ++/* + ð0 { + pinctrl-names = "default"; + pinctrl-0 = <ð0_pins>; +@@ -120,7 +121,7 @@ + reg = <4>; + }; + }; +- ++*/ + &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +diff --git a/board/myir/myc-rzg2l/myc-rzg2l.c b/board/myir/myc-rzg2l/myc-rzg2l.c +index 9cb9f363..fd684b43 100755 +--- a/board/myir/myc-rzg2l/myc-rzg2l.c ++++ b/board/myir/myc-rzg2l/myc-rzg2l.c +@@ -62,6 +62,18 @@ DECLARE_GLOBAL_DATA_PTR; + #define PFC_PM3B (PFC_BASE + 0x176) + #define PFC_PMC3B (PFC_BASE + 0x23B) + ++/*P25_0*/ ++#define PFC_P29 (PFC_BASE + 0x029) ++#define PFC_PM29 (PFC_BASE + 0x152) ++#define PFC_PMC29 (PFC_BASE + 0x229) ++ ++ ++/*P26_1*/ ++#define PFC_P2A (PFC_BASE + 0x02A) ++#define PFC_PM2A (PFC_BASE + 0x154) ++#define PFC_PMC2A (PFC_BASE + 0x22A) ++ ++ + static void board_usb_init(void); + + void s_init(void) +@@ -129,8 +141,20 @@ int board_init(void) + *(volatile u32 *)(PFC_P3B) = (*(volatile u32 *)(PFC_P3B) & 0xFFFFFFF7) | 0x0; + mdelay(13); + *(volatile u32 *)(PFC_P3B) = (*(volatile u32 *)(PFC_P3B) & 0xFFFFFFF7) | 0x08; ++ + + /* PINCTRL, USB-PHY, USB_BLK init */ ++ *(volatile u32 *)(PFC_PMC29) &= 0xFFFFFFFE; /* Port func mode */ ++ *(volatile u32 *)(PFC_PM29) = (*(volatile u32 *)(PFC_PM29) & 0xFFFFFFC) | 0x02; /* Port output mode 0b10 */ ++ *(volatile u32 *)(PFC_P29) = (*(volatile u32 *)(PFC_P29) & 0xFFFFFFFE) | 0x01; ++ ++ mdelay(10); ++ *(volatile u32 *)(PFC_PMC2A) &= 0xFFFFFFFC; /* Port func mode */ ++ *(volatile u32 *)(PFC_PM2A) = (*(volatile u32 *)(PFC_PM2A) & 0xFFFFFFF3) | 0x0B; /* Port output mode 0b10 */ ++ ++ ++ *(volatile u32 *)(PFC_P2A) = (*(volatile u32 *)(PFC_P2A) & 0xFFFFFFFD) | 0x02; ++ + board_usb_init(); + + return 0; +diff --git a/configs/myc-rzg2l_ddr1gb_defconfig b/configs/myc-rzg2l_ddr1gb_defconfig +index 7939a320..f9df268f 100644 +--- a/configs/myc-rzg2l_ddr1gb_defconfig ++++ b/configs/myc-rzg2l_ddr1gb_defconfig +@@ -32,6 +32,7 @@ CONFIG_CMD_EXT4=y + CONFIG_CMD_EXT4_WRITE=y + CONFIG_CMD_FAT=y + CONFIG_CMD_FS_GENERIC=y ++CONFIG_FS_CRAMFS=y + CONFIG_OF_CONTROL=y + CONFIG_OF_LIST="myc-rzg2l" + CONFIG_MULTI_DTB_FIT_LZO=y +diff --git a/configs/myc-rzg2l_defconfig b/configs/myc-rzg2l_defconfig +index ca66d2df..5c574a10 100644 +--- a/configs/myc-rzg2l_defconfig ++++ b/configs/myc-rzg2l_defconfig +@@ -32,6 +32,7 @@ CONFIG_CMD_EXT4=y + CONFIG_CMD_EXT4_WRITE=y + CONFIG_CMD_FAT=y + CONFIG_CMD_FS_GENERIC=y ++CONFIG_FS_CRAMFS=y + CONFIG_OF_CONTROL=y + CONFIG_OF_LIST="myc-rzg2l" + CONFIG_MULTI_DTB_FIT_LZO=y diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0004-configs-smarc-rzg2lc_defconfig-Enable-CM33-command.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0004-configs-smarc-rzg2lc_defconfig-Enable-CM33-command.patch new file mode 100755 index 0000000000000000000000000000000000000000..9d7063235e7c41aca237afa97a140aedfed78d92 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0004-configs-smarc-rzg2lc_defconfig-Enable-CM33-command.patch @@ -0,0 +1,22 @@ +From 6d6910fb6bec90a3529dd1a1616b6375e4f5b1ee Mon Sep 17 00:00:00 2001 +From: Huy Nguyen +Date: Thu, 4 Aug 2022 13:22:11 +0700 +Subject: [PATCH 4/4] configs: smarc-rzg2lc_defconfig: Enable CM33 command + +Signed-off-by: Huy Nguyen +--- + configs/smarc-rzg2lc_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/configs/smarc-rzg2lc_defconfig b/configs/smarc-rzg2lc_defconfig +index 61d7e1f8ab..3c779e73dd 100644 +--- a/configs/smarc-rzg2lc_defconfig ++++ b/configs/smarc-rzg2lc_defconfig +@@ -76,3 +76,4 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_SYS_MMC_ENV_DEV=0 + CONFIG_SYS_MMC_ENV_PART=2 + CONFIG_SYS_I2C_RZG2L_RIIC=y ++CONFIG_CMD_CM33=y +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0005-configs-smarc-rzg2ul_defconfig-Enable-CM33-command.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0005-configs-smarc-rzg2ul_defconfig-Enable-CM33-command.patch new file mode 100755 index 0000000000000000000000000000000000000000..6c1c23a9546f133941e38a0faaf17274f010ef99 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0005-configs-smarc-rzg2ul_defconfig-Enable-CM33-command.patch @@ -0,0 +1,21 @@ +From b23c88aec44e5c34327eb2f3d4e1efa334895d3d Mon Sep 17 00:00:00 2001 +From: Canh Dao +Date: Wed, 13 Apr 2022 16:06:36 +0700 +Subject: [PATCH 3/3] configs: smarc-rzg2ul_defconfig: Enable CM33 command + +--- + configs/smarc-rzg2ul_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/configs/smarc-rzg2ul_defconfig b/configs/smarc-rzg2ul_defconfig +index dc99322997..80d2e3f48f 100644 +--- a/configs/smarc-rzg2ul_defconfig ++++ b/configs/smarc-rzg2ul_defconfig +@@ -76,3 +76,4 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_SYS_MMC_ENV_DEV=0 + CONFIG_SYS_MMC_ENV_PART=2 + CONFIG_SYS_I2C_RZG2L_RIIC=y ++CONFIG_CMD_CM33=y +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0005-del-phy-reset-zoomlion.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0005-del-phy-reset-zoomlion.patch new file mode 100755 index 0000000000000000000000000000000000000000..b9fcef6dd9f880edd7a5c5a01dabc2ac2ed4b46b --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0005-del-phy-reset-zoomlion.patch @@ -0,0 +1,116 @@ +diff --git a/arch/arm/dts/myb-rzg2l-base.dts b/arch/arm/dts/myb-rzg2l-base.dts +index 66bb9081..3836803d 100644 +--- a/arch/arm/dts/myb-rzg2l-base.dts ++++ b/arch/arm/dts/myb-rzg2l-base.dts +@@ -27,6 +27,7 @@ + }; + + &pinctrl { ++/* + eth0_pins: eth0 { + pinmux = , + , +@@ -47,7 +48,7 @@ + , + ; + }; +- ++*/ + i2c1_pins: i2c1 { + pinmux = , + ; +@@ -108,7 +109,7 @@ + bus-width = <4>; + status = "okay"; + }; +- ++/* + ð0 { + pinctrl-names = "default"; + pinctrl-0 = <ð0_pins>; +@@ -120,7 +121,7 @@ + reg = <4>; + }; + }; +- ++*/ + &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +diff --git a/board/myir/myc-rzg2l/myc-rzg2l.c b/board/myir/myc-rzg2l/myc-rzg2l.c +index 9cb9f363..29a976e5 100755 +--- a/board/myir/myc-rzg2l/myc-rzg2l.c ++++ b/board/myir/myc-rzg2l/myc-rzg2l.c +@@ -62,6 +62,18 @@ DECLARE_GLOBAL_DATA_PTR; + #define PFC_PM3B (PFC_BASE + 0x176) + #define PFC_PMC3B (PFC_BASE + 0x23B) + ++/*P25_0*/ ++#define PFC_P29 (PFC_BASE + 0x029) ++#define PFC_PM29 (PFC_BASE + 0x152) ++#define PFC_PMC29 (PFC_BASE + 0x229) ++ ++ ++/*P26_1*/ ++#define PFC_P2A (PFC_BASE + 0x02A) ++#define PFC_PM2A (PFC_BASE + 0x154) ++#define PFC_PMC2A (PFC_BASE + 0x22A) ++ ++ + static void board_usb_init(void); + + void s_init(void) +@@ -106,7 +118,7 @@ int board_init(void) + gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; + + mdelay(140); +- ++#if 0 + // phy1 reset + *(volatile u32 *)(PFC_PMC3C) &= 0xFFFFFFF7; /* Port func mode */ + *(volatile u32 *)(PFC_PM3C) = (*(volatile u32 *)(PFC_PM3C) & 0xFFFFFF3F) | 0x80; /* Port output mode 0b10 */ +@@ -129,8 +141,20 @@ int board_init(void) + *(volatile u32 *)(PFC_P3B) = (*(volatile u32 *)(PFC_P3B) & 0xFFFFFFF7) | 0x0; + mdelay(13); + *(volatile u32 *)(PFC_P3B) = (*(volatile u32 *)(PFC_P3B) & 0xFFFFFFF7) | 0x08; ++#endif + + /* PINCTRL, USB-PHY, USB_BLK init */ ++ *(volatile u32 *)(PFC_PMC29) &= 0xFFFFFFFE; /* Port func mode */ ++ *(volatile u32 *)(PFC_PM29) = (*(volatile u32 *)(PFC_PM29) & 0xFFFFFFC) | 0x02; /* Port output mode 0b10 */ ++ *(volatile u32 *)(PFC_P29) = (*(volatile u32 *)(PFC_P29) & 0xFFFFFFFE) | 0x01; ++ ++ mdelay(10); ++ *(volatile u32 *)(PFC_PMC2A) &= 0xFFFFFFFC; /* Port func mode */ ++ *(volatile u32 *)(PFC_PM2A) = (*(volatile u32 *)(PFC_PM2A) & 0xFFFFFFF3) | 0x0B; /* Port output mode 0b10 */ ++ ++ ++ *(volatile u32 *)(PFC_P2A) = (*(volatile u32 *)(PFC_P2A) & 0xFFFFFFFD) | 0x02; ++ + board_usb_init(); + + return 0; +diff --git a/configs/myc-rzg2l_ddr1gb_defconfig b/configs/myc-rzg2l_ddr1gb_defconfig +index 7939a320..f9df268f 100644 +--- a/configs/myc-rzg2l_ddr1gb_defconfig ++++ b/configs/myc-rzg2l_ddr1gb_defconfig +@@ -32,6 +32,7 @@ CONFIG_CMD_EXT4=y + CONFIG_CMD_EXT4_WRITE=y + CONFIG_CMD_FAT=y + CONFIG_CMD_FS_GENERIC=y ++CONFIG_FS_CRAMFS=y + CONFIG_OF_CONTROL=y + CONFIG_OF_LIST="myc-rzg2l" + CONFIG_MULTI_DTB_FIT_LZO=y +diff --git a/configs/myc-rzg2l_defconfig b/configs/myc-rzg2l_defconfig +index ca66d2df..5c574a10 100644 +--- a/configs/myc-rzg2l_defconfig ++++ b/configs/myc-rzg2l_defconfig +@@ -32,6 +32,7 @@ CONFIG_CMD_EXT4=y + CONFIG_CMD_EXT4_WRITE=y + CONFIG_CMD_FAT=y + CONFIG_CMD_FS_GENERIC=y ++CONFIG_FS_CRAMFS=y + CONFIG_OF_CONTROL=y + CONFIG_OF_LIST="myc-rzg2l" + CONFIG_MULTI_DTB_FIT_LZO=y diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0006-myir-myd-yg2lx-cm33.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0006-myir-myd-yg2lx-cm33.patch new file mode 100755 index 0000000000000000000000000000000000000000..c09925ee4d83e7137e85e92a52254720015ad9d2 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0006-myir-myd-yg2lx-cm33.patch @@ -0,0 +1,18 @@ +diff --git a/configs/myc-rzg2l_ddr1gb_defconfig b/configs/myc-rzg2l_ddr1gb_defconfig +index 7939a32..a3315fd 100644 +--- a/configs/myc-rzg2l_ddr1gb_defconfig ++++ b/configs/myc-rzg2l_ddr1gb_defconfig +@@ -1,3 +1,4 @@ ++CONFIG_CMD_CM33=y + CONFIG_ARM=y + CONFIG_ARCH_CPU_INIT=y + CONFIG_ARCH_RMOBILE=y +diff --git a/configs/myc-rzg2l_defconfig b/configs/myc-rzg2l_defconfig +index ca66d2d..bfc9ca8 100644 +--- a/configs/myc-rzg2l_defconfig ++++ b/configs/myc-rzg2l_defconfig +@@ -1,3 +1,4 @@ ++CONFIG_CMD_CM33=y + CONFIG_ARM=y + CONFIG_ARCH_CPU_INIT=y + CONFIG_ARCH_RMOBILE=y diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0007-add-usb0-enable-v3lite.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0007-add-usb0-enable-v3lite.patch new file mode 100644 index 0000000000000000000000000000000000000000..0ecd190cd6bff5bcaf5028f9e147eb13a65f8252 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/0007-add-usb0-enable-v3lite.patch @@ -0,0 +1,28 @@ +diff --git a/board/myir/myc-rzg2l/myc-rzg2l.c b/board/myir/myc-rzg2l/myc-rzg2l.c +index a6e9871..0d39ee9 100755 +--- a/board/myir/myc-rzg2l/myc-rzg2l.c ++++ b/board/myir/myc-rzg2l/myc-rzg2l.c +@@ -61,6 +61,11 @@ DECLARE_GLOBAL_DATA_PTR; + #define PFC_PM3B (PFC_BASE + 0x176) + #define PFC_PMC3B (PFC_BASE + 0x23B) + ++/*P4_0*//*belongs to v3lite*/ ++#define PFC_P14 (PFC_BASE + 0x014) ++#define PFC_PM14 (PFC_BASE + 0x128) ++#define PFC_PMC14 (PFC_BASE + 0x214) ++ + void s_init(void) + { + /* SD1 power control: P39_1 = 0; P39_2 = 1; */ +@@ -103,6 +108,11 @@ int board_init(void) + gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; + + mdelay(140); ++ /*belongs to v3lite*/ ++ *(volatile u32 *)(PFC_PMC14) &= 0xFFFFFFFE; /* Port func mode */ ++ *(volatile u32 *)(PFC_PM14) = (*(volatile u32 *)(PFC_PM14) & 0xFFFFFF8) | 0x2; /* Port output mode 0b10 */ ++ *(volatile u32 *)(PFC_P14) = (*(volatile u32 *)(PFC_P14) & 0xFFFFFFF4) | 0x05; ++ mdelay(13); + + // phy1 reset + *(volatile u32 *)(PFC_PMC3C) &= 0xFFFFFFF7; /* Port func mode */ diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/usb.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/usb.patch new file mode 100755 index 0000000000000000000000000000000000000000..5ac9b1f49b4e14f0994b4103d243fb2477ceadb7 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/files/usb.patch @@ -0,0 +1,935 @@ +diff --git a/arch/arm/dts/myb-rzg2l-base.dts b/arch/arm/dts/myb-rzg2l-base.dts +index 53af915b..66bb9081 100644 +--- a/arch/arm/dts/myb-rzg2l-base.dts ++++ b/arch/arm/dts/myb-rzg2l-base.dts +@@ -53,6 +53,29 @@ + ; + }; + ++ usb0_pins: usb0 { ++ pinmux = , /* VBUS */ ++ , /* OVC */ ++ ; /* OTG_ID */ ++ }; ++ ++ usb1_pins: usb1 { ++ pinmux = , /* VBUS */ ++ ; /* OVC */ ++ }; ++ ++ usb0_pins: usb0 { ++ pinmux = , ++ , ++ ; ++ }; ++ ++ usb1_pins: usb1 { ++ pinmux = , ++ ; ++ }; ++ ++ + }; + + &xinclk { +@@ -108,3 +131,38 @@ + reg = <0x3d>; + }; + }; ++ ++&usb2_phy0 { ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&ehci0 { ++ /* pinctrl placeholder ++ * If HCD, the following pins must be defined. ++ * VBUSEN - P4_0 pin. ++ * OVERCUR - P5_0 pin. ++ */ ++ status = "okay"; ++}; ++ ++&usb2_phy1 { ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ /* pinctrl placeholder ++ * If HCD, the following pins must be defined. ++ * VBUSEN - P42_0 pin. ++ * OVERCUR - P42_1 pin. ++ */ ++ status = "okay"; ++}; ++ +diff --git a/arch/arm/dts/myb-rzg2l.dts b/arch/arm/dts/myb-rzg2l.dts +index 3d38b7c8..fc216655 100644 +--- a/arch/arm/dts/myb-rzg2l.dts ++++ b/arch/arm/dts/myb-rzg2l.dts +@@ -27,4 +27,11 @@ + reg = <0 0x48000000 0 0x78000000>; + }; + ++ vbus0_usb2: regulator-vbus0-usb2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "USB20_VBUS0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ + }; +diff --git a/arch/arm/dts/smarc-rzg2l.dts b/arch/arm/dts/smarc-rzg2l.dts +index 0f1de89a..22a63465 100644 +--- a/arch/arm/dts/smarc-rzg2l.dts ++++ b/arch/arm/dts/smarc-rzg2l.dts +@@ -29,6 +29,12 @@ + /* first 128MB is reserved for secure area. */ + reg = <0 0x48000000 0 0x78000000>; + }; ++ vbus0_usb2: regulator-vbus0-usb2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "USB20_VBUS0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; + + }; + +@@ -59,6 +65,29 @@ + pinmux = , + ; + }; ++ ++ usb0_pins: usb0 { ++ pinmux = , /* VBUS */ ++ , /* OVC */ ++ ; /* OTG_ID */ ++ }; ++ ++ usb1_pins: usb1 { ++ pinmux = , /* VBUS */ ++ ; /* OVC */ ++ }; ++ ++ usb0_pins: usb0 { ++ pinmux = , ++ , ++ ; ++ }; ++ ++ usb1_pins: usb1 { ++ pinmux = , ++ ; ++ }; ++ + + }; + +@@ -115,3 +144,37 @@ + reg = <0x3d>; + }; + }; ++ ++&usb2_phy0 { ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&ehci0 { ++ /* pinctrl placeholder ++ * If HCD, the following pins must be defined. ++ * VBUSEN - P4_0 pin. ++ * OVERCUR - P5_0 pin. ++ */ ++ status = "okay"; ++}; ++ ++&usb2_phy1 { ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ /* pinctrl placeholder ++ * If HCD, the following pins must be defined. ++ * VBUSEN - P42_0 pin. ++ * OVERCUR - P42_1 pin. ++ */ ++ status = "okay"; ++}; +diff --git a/arch/arm/dts/smarc-rzg2ul.dts b/arch/arm/dts/smarc-rzg2ul.dts +index 77c06a54..b48c7c90 100644 +--- a/arch/arm/dts/smarc-rzg2ul.dts ++++ b/arch/arm/dts/smarc-rzg2ul.dts +@@ -29,6 +29,12 @@ + /* first 128MB is reserved for secure area. */ + reg = <0 0x48000000 0 0x38000000>; + }; ++ vbus0_usb2: regulator-vbus0-usb2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "USB20_VBUS0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; + + }; + +@@ -50,6 +56,29 @@ + , + ; + }; ++ ++ usb0_pins: usb0 { ++ pinmux = , /* VBUS */ ++ , /* OVC */ ++ ; /* OTG_ID */ ++ }; ++ ++ usb1_pins: usb1 { ++ pinmux = , /* VBUS */ ++ ; /* OVC */ ++ }; ++ ++ usb0_pins: usb0 { ++ pinmux = , ++ , ++ ; ++ }; ++ ++ usb1_pins: usb1 { ++ pinmux = , ++ ; ++ }; ++ + }; + + &xinclk { +@@ -92,3 +121,37 @@ + &i2c0 { + status = "okay"; + }; ++ ++&usb2_phy0 { ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&ehci0 { ++ /* pinctrl placeholder ++ * If HCD, the following pins must be defined. ++ * VBUSEN - P4_0 pin. ++ * OVERCUR - P5_0 pin. ++ */ ++ status = "okay"; ++}; ++ ++&usb2_phy1 { ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ /* pinctrl placeholder ++ * If HCD, the following pins must be defined. ++ * VBUSEN - P42_0 pin. ++ * OVERCUR - P42_1 pin. ++ */ ++ status = "okay"; ++}; +diff --git a/board/myir/myc-rzg2l/myc-rzg2l.c b/board/myir/myc-rzg2l/myc-rzg2l.c +index a6e98719..9cb9f363 100755 +--- a/board/myir/myc-rzg2l/myc-rzg2l.c ++++ b/board/myir/myc-rzg2l/myc-rzg2l.c +@@ -36,6 +36,7 @@ DECLARE_GLOBAL_DATA_PTR; + /* CPG */ + #define CPG_BASE 0x11010000 + #define CPG_CLKON_BASE (CPG_BASE + 0x500) ++#define CPG_CLKMON_BASE (CPG_BASE + 0x680) + #define CPG_RESET_BASE (CPG_BASE + 0x800) + #define CPG_RESET_ETH (CPG_RESET_BASE + 0x7C) + #define CPG_RESET_I2C (CPG_RESET_BASE + 0x80) +@@ -61,6 +62,8 @@ DECLARE_GLOBAL_DATA_PTR; + #define PFC_PM3B (PFC_BASE + 0x176) + #define PFC_PMC3B (PFC_BASE + 0x23B) + ++static void board_usb_init(void); ++ + void s_init(void) + { + /* SD1 power control: P39_1 = 0; P39_2 = 1; */ +@@ -126,6 +129,9 @@ int board_init(void) + *(volatile u32 *)(PFC_P3B) = (*(volatile u32 *)(PFC_P3B) & 0xFFFFFFF7) | 0x0; + mdelay(13); + *(volatile u32 *)(PFC_P3B) = (*(volatile u32 *)(PFC_P3B) & 0xFFFFFFF7) | 0x08; ++ ++ /* PINCTRL, USB-PHY, USB_BLK init */ ++ board_usb_init(); + + return 0; + } +@@ -134,3 +140,165 @@ void reset_cpu(void) + { + + } ++ ++#define CPG_RESET_USB (CPG_RESET_BASE + 0x78) ++#define CPG_CLKON_USB (CPG_CLKON_BASE + 0x78) ++#define CPG_CLKMON_USB (CPG_CLKMON_BASE + 0x78) ++#define CPG_RESET_SYC (CPG_RESET_BASE + 0x28) ++#define CPG_CLKON_SYC (CPG_CLKON_BASE + 0x28) ++#define CPG_CLKMON_SYC (CPG_CLKMON_BASE + 0x28) ++#define CPG_RESET_DMAC (CPG_RESET_BASE + 0x2C) ++#define CPG_CLKON_DMAC (CPG_CLKON_BASE + 0x2C) ++#define CPG_CLKMON_DMAC (CPG_CLKMON_BASE + 0x2C) ++#define CPG_RESET_GPIO (CPG_RESET_BASE + 0x98) ++#define CPG_CLKON_GPIO (CPG_CLKON_BASE + 0x98) ++#define CPG_CLKMON_GPIO (CPG_CLKMON_BASE + 0x98) ++ ++#define PFC_PWPR (PFC_BASE + 0x3014) ++#define PFC_PMC_BASE (PFC_BASE + 0x200) ++#define PFC_PFC_BASE (PFC_BASE + 0x400) ++ ++#define PFC_PMC15 (PFC_PMC_BASE + 0x15) ++#define PFC_PMC16 (PFC_PMC_BASE + 0x16) ++#define PFC_PMC3A (PFC_PMC_BASE + 0x3A) ++#define PFC_PFC14 (PFC_PFC_BASE + 4*(0x14)) ++#define PFC_PFC15 (PFC_PFC_BASE + 4*(0x15)) ++#define PFC_PFC16 (PFC_PMC_BASE + 4*(0x16)) ++#define PFC_PFC3A (PFC_PMC_BASE + 4*(0x3A)) ++ ++ ++static void board_usb_init(void) ++{ ++ /* Enable SYC */ ++ if ((*(volatile u32 *)CPG_CLKMON_SYC) != 0x00000001) { ++ (*(volatile u32 *)CPG_RESET_SYC) = 0x00010000; ++ (*(volatile u32 *)CPG_RESET_SYC) = 0x00010001; ++ (*(volatile u32 *)CPG_CLKON_SYC) = 0x00010001; ++ } ++ /* Enable DMAC */ ++ if ((*(volatile u32 *)CPG_CLKMON_DMAC) != 0x00000003) { ++ (*(volatile u32 *)CPG_RESET_DMAC) = 0x00030000; ++ (*(volatile u32 *)CPG_RESET_DMAC) = 0x00030003; ++ (*(volatile u32 *)CPG_CLKON_DMAC) = 0x00030003; ++ } ++ ++ /* Enable GPIO */ ++ if ((*(volatile u32 *)CPG_CLKMON_GPIO) != 0x00000001) { ++ (*(volatile u32 *)CPG_RESET_GPIO) = 0x00070007; ++ (*(volatile u32 *)CPG_RESET_GPIO) = 0x00070007; ++ (*(volatile u32 *)CPG_CLKON_GPIO) = 0x00010001; ++ } ++ /* Enable USB */ ++ if ((*(volatile u32 *)CPG_CLKMON_USB) != 0x0000000f) { ++ (*(volatile u32 *)CPG_RESET_USB) = 0x000f0000; ++ (*(volatile u32 *)CPG_RESET_USB) = 0x000f000f; ++ (*(volatile u32 *)CPG_CLKON_USB) = 0x000f000f; ++ ++ } ++ ++/* Setup */ ++ /* Disable GPIO Write Protect */ ++ (*(volatile u32 *)PFC_PWPR) &= ~(0x1u << 7); /* PWPR.BOWI = 0 */ ++ (*(volatile u32 *)PFC_PWPR) |= (0x1u << 6); /* PWPR.PFCWE = 1 */ ++ (*(volatile u32 *)PFC_PWPR); /* barrier */ ++ ++ /* Enable USB0 HCD/PCD */ ++ /* DP/DM are fixed */ ++ /* set P4_0 as Func.1 for VBUSEN */ ++ /* PMC14.b0 = 1 */ ++ /* PFC14.PFC0 = 0 */ ++ ++ ++ /* set P5_0 as Func.1 for OVC */ ++ (*(volatile u8 *)PFC_PMC15) |= (0x1u << 0); ++ (*(volatile u8 *)PFC_PFC15) &= ~(0x7u << 0); ++ (*(volatile u8 *)PFC_PFC15) |= (0x1u << 0); ++ ++ /* set P5_1 as Func.1 for OTG_ID */ ++ (*(volatile u8 *)PFC_PMC15) |= (0x1u << 1); ++ (*(volatile u8 *)PFC_PFC15) &= ~(0x7u << 8); ++ (*(volatile u8 *)PFC_PFC15) |= (0x1u << 8); ++ ++/* Enable USB1 HCD */ ++ /* DP/DM are fixed */ ++ /* set P42_0 as Func.1 for VBUSEN */ ++ (*(volatile u8 *)PFC_PMC3A) |= (0x1u << 0); /* PMC15.b0 = 1 */ ++ (*(volatile u8 *)PFC_PFC3A) &= ~(0x7u << 0); /* PFC15.PFC0 = 0 */ ++ (*(volatile u8 *)PFC_PFC3A) |= (0x1u << 0); ++ ++ /* set P42_1 as Func.1 for OVC */ ++ (*(volatile u8 *)PFC_PMC3A) |= (0x1u << 1); ++ (*(volatile u8 *)PFC_PFC3A) &= ~(0x7u << 8); ++ (*(volatile u8 *)PFC_PFC3A) |= (0x1u << 8); ++ ++ /* Enable write protect */ ++ /* Enable PFC write protect */ ++ (*(volatile u32 *)PFC_PWPR) &= ~(0x1u << 6); /* PWPR.PFCWE = 0 */ ++ (*(volatile u32 *)PFC_PWPR) |= (0x1u << 7); /* PWPR.BOWI = 1 */ ++ (*(volatile u32 *)PFC_PWPR); /* barrier */ ++ ++ ++/********************************************/ ++ ++#define USBPHY_BASE (0x11c40000) ++#define USB0_BASE (0x11c50000) ++#define USBF_BASE (0x11c60000) ++#define USB1_BASE (0x11c70000) ++ ++ /* Reset USB2.0 PHY */ ++#define USBPHY_RESET (USBPHY_BASE + 0x000u) ++#define USBPHY_UDIRPD (USBPHY_BASE + 0x01cu) ++ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001133u; ++ udelay(1); ++#if 1 /* US0/USB1 use: USB0=OTG, USB1=Host */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001000u; ++#endif ++#if 0 /* USB1 unuse: USB0=OTG, USB1=USBTEST */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001011u; /* USB0 only */ ++#endif ++#if 0 /* USB0 unuse: USB0=USBTEST, USB1=OTG */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001000u; /* USB1 only */ ++#endif ++ udelay(100); ++ ++/********************************************/ ++/* USBTEST registers */ ++#define RESET (0x000) ++#define UCLKCTL (0x018) ++#define UDIRPD (0x01c) ++#define CON_CTRL (0x020) ++#define CLK_STAT (0x104) ++ ++#define HcRhDescriptorA (0x048) ++#define COMMCTRL (0x800) ++#define LPSTS (0x102) ++ ++/* Setup USB0 */ ++/* Release USB_BLK module from the standby state (in board_cpg_init) */ ++ ++ /* Overcurrent function is not supported now */ ++ (*(volatile u32 *)(USB0_BASE + HcRhDescriptorA)) |= (0x1u << 12); /* NOCP = 1 */ ++ /* Select the clock supplid to USBPHY */ ++// (*(volatile u32 *)(USBTEST_BASE + UCLKCTL)) = // TO BE FIXED ++ /* Select host / peripheral operation (USB0 only) */ ++ (*(volatile u32 *)(USB0_BASE + COMMCTRL)) = 0; /* USB0 is host mode */ ++ /* Set USBPHY normal operation (Function only) */ ++ // (*(volatile u16 *)USBF_BASE + LPSTS) |= (0x1u << 14); /* USBPHY.SUSPM = 1 (func only) */ ++ /* Select the clock supplid to USBPHY */ ++// (*(volatile u32 *)(USBCTR.PLL_RST = // TO BE FIXED ++ /* wait 100 usec */ ++ udelay(100); ++ ++ /* Setup USB1 */ ++ /* Release USB_BLK module from the standby state (in board_cpg_init) */ ++ ++ /* Overcurrent function is not supported now */ ++ (*(volatile u32 *)(USB1_BASE + HcRhDescriptorA)) |= (0x1u << 12); /* NOCP = 1 */ ++ /* Select the clock supplid to USBPHY */ ++ // (*(volatile u32 *)(USBCTR.PLL_RST = // TO BE FIXED ++ // /* wait 100 usec */ ++ udelay(100); ++} ++ ++ +diff --git a/board/renesas/rzg2l-dev/rzg2l-dev.c b/board/renesas/rzg2l-dev/rzg2l-dev.c +index 49e8d9d1..bc4d4733 100644 +--- a/board/renesas/rzg2l-dev/rzg2l-dev.c ++++ b/board/renesas/rzg2l-dev/rzg2l-dev.c +@@ -35,6 +35,7 @@ DECLARE_GLOBAL_DATA_PTR; + /* CPG */ + #define CPG_BASE 0x11010000 + #define CPG_CLKON_BASE (CPG_BASE + 0x500) ++#define CPG_CLKMON_BASE (CPG_BASE + 0x680) + #define CPG_RESET_BASE (CPG_BASE + 0x800) + #define CPG_RESET_ETH (CPG_RESET_BASE + 0x7C) + #define CPG_RESET_I2C (CPG_RESET_BASE + 0x80) +@@ -46,6 +47,8 @@ DECLARE_GLOBAL_DATA_PTR; + #define PFC_PM37 (PFC_BASE + 0x16E) + #define PFC_PMC37 (PFC_BASE + 0x237) + ++static void board_usb_init(void); ++ + void s_init(void) + { + /* SD1 power control: P39_1 = 0; P39_2 = 1; */ +@@ -86,6 +89,9 @@ int board_init(void) + /* adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; + ++ /* PINCTRL, USB-PHY, USB_BLK init */ ++ board_usb_init(); ++ + return 0; + } + +@@ -93,3 +99,161 @@ void reset_cpu(void) + { + + } ++ ++#define CPG_RESET_USB (CPG_RESET_BASE + 0x78) ++#define CPG_CLKON_USB (CPG_CLKON_BASE + 0x78) ++#define CPG_CLKMON_USB (CPG_CLKMON_BASE + 0x78) ++#define CPG_RESET_SYC (CPG_RESET_BASE + 0x28) ++#define CPG_CLKON_SYC (CPG_CLKON_BASE + 0x28) ++#define CPG_CLKMON_SYC (CPG_CLKMON_BASE + 0x28) ++#define CPG_RESET_DMAC (CPG_RESET_BASE + 0x2C) ++#define CPG_CLKON_DMAC (CPG_CLKON_BASE + 0x2C) ++#define CPG_CLKMON_DMAC (CPG_CLKMON_BASE + 0x2C) ++#define CPG_RESET_GPIO (CPG_RESET_BASE + 0x98) ++#define CPG_CLKON_GPIO (CPG_CLKON_BASE + 0x98) ++#define CPG_CLKMON_GPIO (CPG_CLKMON_BASE + 0x98) ++ ++#define PFC_PWPR (PFC_BASE + 0x3014) ++#define PFC_PMC_BASE (PFC_BASE + 0x200) ++#define PFC_PFC_BASE (PFC_BASE + 0x400) ++ ++#define PFC_PMC15 (PFC_PMC_BASE + 0x15) ++#define PFC_PMC16 (PFC_PMC_BASE + 0x16) ++#define PFC_PMC3A (PFC_PMC_BASE + 0x3A) ++#define PFC_PFC14 (PFC_PFC_BASE + 4*(0x14)) ++#define PFC_PFC15 (PFC_PFC_BASE + 4*(0x15)) ++#define PFC_PFC16 (PFC_PMC_BASE + 4*(0x16)) ++#define PFC_PFC3A (PFC_PMC_BASE + 4*(0x3A)) ++ ++static void board_usb_init(void) ++{ ++ /* Enable SYC */ ++ if ((*(volatile u32 *)CPG_CLKMON_SYC) != 0x00000001) { ++ (*(volatile u32 *)CPG_RESET_SYC) = 0x00010000; ++ (*(volatile u32 *)CPG_RESET_SYC) = 0x00010001; ++ (*(volatile u32 *)CPG_CLKON_SYC) = 0x00010001; ++ } ++ /* Enable DMAC */ ++ if ((*(volatile u32 *)CPG_CLKMON_DMAC) != 0x00000003) { ++ (*(volatile u32 *)CPG_RESET_DMAC) = 0x00030000; ++ (*(volatile u32 *)CPG_RESET_DMAC) = 0x00030003; ++ (*(volatile u32 *)CPG_CLKON_DMAC) = 0x00030003; ++ } ++ ++ /* Enable GPIO */ ++ if ((*(volatile u32 *)CPG_CLKMON_GPIO) != 0x00000001) { ++ (*(volatile u32 *)CPG_RESET_GPIO) = 0x00070007; ++ (*(volatile u32 *)CPG_RESET_GPIO) = 0x00070007; ++ (*(volatile u32 *)CPG_CLKON_GPIO) = 0x00010001; ++ } ++ /* Enable USB */ ++ if ((*(volatile u32 *)CPG_CLKMON_USB) != 0x0000000f) { ++ (*(volatile u32 *)CPG_RESET_USB) = 0x000f0000; ++ (*(volatile u32 *)CPG_RESET_USB) = 0x000f000f; ++ (*(volatile u32 *)CPG_CLKON_USB) = 0x000f000f; ++ } ++ ++/* Setup */ ++ /* Disable GPIO Write Protect */ ++ (*(volatile u32 *)PFC_PWPR) &= ~(0x1u << 7); /* PWPR.BOWI = 0 */ ++ (*(volatile u32 *)PFC_PWPR) |= (0x1u << 6); /* PWPR.PFCWE = 1 */ ++ (*(volatile u32 *)PFC_PWPR); /* barrier */ ++ ++/* Enable USB0 HCD/PCD */ ++ /* DP/DM are fixed */ ++ /* set P4_0 as Func.1 for VBUSEN */ ++ /* PMC14.b0 = 1 */ ++ /* PFC14.PFC0 = 0 */ ++ ++ ++ /* set P5_0 as Func.1 for OVC */ ++ (*(volatile u8 *)PFC_PMC15) |= (0x1u << 0); ++ (*(volatile u8 *)PFC_PFC15) &= ~(0x7u << 0); ++ (*(volatile u8 *)PFC_PFC15) |= (0x1u << 0); ++ ++ /* set P5_1 as Func.1 for OTG_ID */ ++ (*(volatile u8 *)PFC_PMC15) |= (0x1u << 1); ++ (*(volatile u8 *)PFC_PFC15) &= ~(0x7u << 8); ++ (*(volatile u8 *)PFC_PFC15) |= (0x1u << 8); ++ ++/* Enable USB1 HCD */ ++ /* DP/DM are fixed */ ++ /* set P42_0 as Func.1 for VBUSEN */ ++ (*(volatile u8 *)PFC_PMC3A) |= (0x1u << 0); /* PMC15.b0 = 1 */ ++ (*(volatile u8 *)PFC_PFC3A) &= ~(0x7u << 0); /* PFC15.PFC0 = 0 */ ++ (*(volatile u8 *)PFC_PFC3A) |= (0x1u << 0); ++ ++ /* set P42_1 as Func.1 for OVC */ ++ (*(volatile u8 *)PFC_PMC3A) |= (0x1u << 1); ++ (*(volatile u8 *)PFC_PFC3A) &= ~(0x7u << 8); ++ (*(volatile u8 *)PFC_PFC3A) |= (0x1u << 8); ++ ++/* Enable write protect */ ++ /* Enable PFC write protect */ ++ (*(volatile u32 *)PFC_PWPR) &= ~(0x1u << 6); /* PWPR.PFCWE = 0 */ ++ (*(volatile u32 *)PFC_PWPR) |= (0x1u << 7); /* PWPR.BOWI = 1 */ ++ (*(volatile u32 *)PFC_PWPR); /* barrier */ ++ ++/********************************************/ ++ ++#define USBPHY_BASE (0x11c40000) ++#define USB0_BASE (0x11c50000) ++#define USBF_BASE (0x11c60000) ++#define USB1_BASE (0x11c70000) ++ ++/* Reset USB2.0 PHY */ ++#define USBPHY_RESET (USBPHY_BASE + 0x000u) ++#define USBPHY_UDIRPD (USBPHY_BASE + 0x01cu) ++ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001133u; ++ udelay(1); ++#if 1 /* US0/USB1 use: USB0=OTG, USB1=Host */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001000u; ++#endif ++#if 0 /* USB1 unuse: USB0=OTG, USB1=USBTEST */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001011u; /* USB0 only */ ++#endif ++#if 0 /* USB0 unuse: USB0=USBTEST, USB1=OTG */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001000u; /* USB1 only */ ++#endif ++ udelay(100); ++ ++/********************************************/ ++ ++/* USBTEST registers */ ++#define RESET (0x000) ++#define UCLKCTL (0x018) ++#define UDIRPD (0x01c) ++#define CON_CTRL (0x020) ++#define CLK_STAT (0x104) ++ ++#define HcRhDescriptorA (0x048) ++#define COMMCTRL (0x800) ++#define LPSTS (0x102) ++ ++/* Setup USB0 */ ++ /* Release USB_BLK module from the standby state (in board_cpg_init) */ ++ ++ /* Overcurrent function is not supported now */ ++ (*(volatile u32 *)(USB0_BASE + HcRhDescriptorA)) |= (0x1u << 12); /* NOCP = 1 */ ++ /* Select the clock supplid to USBPHY */ ++// (*(volatile u32 *)(USBTEST_BASE + UCLKCTL)) = // TO BE FIXED ++ /* Select host / peripheral operation (USB0 only) */ ++ (*(volatile u32 *)(USB0_BASE + COMMCTRL)) = 0; /* USB0 is host mode */ ++ /* Set USBPHY normal operation (Function only) */ ++// (*(volatile u16 *)USBF_BASE + LPSTS) |= (0x1u << 14); /* USBPHY.SUSPM = 1 (func only) */ ++ /* Select the clock supplid to USBPHY */ ++// (*(volatile u32 *)(USBCTR.PLL_RST = // TO BE FIXED ++ /* wait 100 usec */ ++ udelay(100); ++ ++/* Setup USB1 */ ++ /* Release USB_BLK module from the standby state (in board_cpg_init) */ ++ ++ /* Overcurrent function is not supported now */ ++ (*(volatile u32 *)(USB1_BASE + HcRhDescriptorA)) |= (0x1u << 12); /* NOCP = 1 */ ++ /* Select the clock supplid to USBPHY */ ++// (*(volatile u32 *)(USBCTR.PLL_RST = // TO BE FIXED ++ /* wait 100 usec */ ++ udelay(100); ++} +\ No newline at end of file +diff --git a/board/renesas/rzg2ul-dev/rzg2ul-dev.c b/board/renesas/rzg2ul-dev/rzg2ul-dev.c +index 310ddcde..5f50d663 100644 +--- a/board/renesas/rzg2ul-dev/rzg2ul-dev.c ++++ b/board/renesas/rzg2ul-dev/rzg2ul-dev.c +@@ -36,6 +36,7 @@ DECLARE_GLOBAL_DATA_PTR; + /* CPG */ + #define CPG_BASE 0x11010000 + #define CPG_CLKON_BASE (CPG_BASE + 0x500) ++#define CPG_CLKMON_BASE (CPG_BASE + 0x680) + #define CPG_RESET_BASE (CPG_BASE + 0x800) + #define CPG_RESET_ETH (CPG_RESET_BASE + 0x7C) + #define CPG_RESET_I2C (CPG_RESET_BASE + 0x80) +@@ -58,6 +59,8 @@ DECLARE_GLOBAL_DATA_PTR; + #define PFC_PM1D (PFC_BASE + 0x013A) + #define PFC_PMC1D (PFC_BASE + 0x021D) + ++static void board_usb_init(void); ++ + void s_init(void) + { + #if CONFIG_TARGET_SMARC_RZG2UL +@@ -160,6 +163,9 @@ int board_init(void) + /* adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; + ++ /* PINCTRL, USB-PHY, USB_BLK init */ ++ board_usb_init(); ++ + return 0; + } + +@@ -167,3 +173,161 @@ void reset_cpu(void) + { + + } ++ ++#define CPG_RESET_USB (CPG_RESET_BASE + 0x78) ++#define CPG_CLKON_USB (CPG_CLKON_BASE + 0x78) ++#define CPG_CLKMON_USB (CPG_CLKMON_BASE + 0x78) ++#define CPG_RESET_SYC (CPG_RESET_BASE + 0x28) ++#define CPG_CLKON_SYC (CPG_CLKON_BASE + 0x28) ++#define CPG_CLKMON_SYC (CPG_CLKMON_BASE + 0x28) ++#define CPG_RESET_DMAC (CPG_RESET_BASE + 0x2C) ++#define CPG_CLKON_DMAC (CPG_CLKON_BASE + 0x2C) ++#define CPG_CLKMON_DMAC (CPG_CLKMON_BASE + 0x2C) ++#define CPG_RESET_GPIO (CPG_RESET_BASE + 0x98) ++#define CPG_CLKON_GPIO (CPG_CLKON_BASE + 0x98) ++#define CPG_CLKMON_GPIO (CPG_CLKMON_BASE + 0x98) ++ ++#define PFC_PWPR (PFC_BASE + 0x3014) ++#define PFC_PMC_BASE (PFC_BASE + 0x200) ++#define PFC_PFC_BASE (PFC_BASE + 0x400) ++ ++#define PFC_PMC15 (PFC_PMC_BASE + 0x15) ++#define PFC_PMC16 (PFC_PMC_BASE + 0x16) ++#define PFC_PMC3A (PFC_PMC_BASE + 0x3A) ++#define PFC_PFC14 (PFC_PFC_BASE + 4*(0x14)) ++#define PFC_PFC15 (PFC_PFC_BASE + 4*(0x15)) ++#define PFC_PFC16 (PFC_PMC_BASE + 4*(0x16)) ++#define PFC_PFC3A (PFC_PMC_BASE + 4*(0x3A)) ++ ++static void board_usb_init(void) ++{ ++ /* Enable SYC */ ++ if ((*(volatile u32 *)CPG_CLKMON_SYC) != 0x00000001) { ++ (*(volatile u32 *)CPG_RESET_SYC) = 0x00010000; ++ (*(volatile u32 *)CPG_RESET_SYC) = 0x00010001; ++ (*(volatile u32 *)CPG_CLKON_SYC) = 0x00010001; ++ } ++ /* Enable DMAC */ ++ if ((*(volatile u32 *)CPG_CLKMON_DMAC) != 0x00000003) { ++ (*(volatile u32 *)CPG_RESET_DMAC) = 0x00030000; ++ (*(volatile u32 *)CPG_RESET_DMAC) = 0x00030003; ++ (*(volatile u32 *)CPG_CLKON_DMAC) = 0x00030003; ++ } ++ ++ /* Enable GPIO */ ++ if ((*(volatile u32 *)CPG_CLKMON_GPIO) != 0x00000001) { ++ (*(volatile u32 *)CPG_RESET_GPIO) = 0x00070007; ++ (*(volatile u32 *)CPG_RESET_GPIO) = 0x00070007; ++ (*(volatile u32 *)CPG_CLKON_GPIO) = 0x00010001; ++ } ++ /* Enable USB */ ++ if ((*(volatile u32 *)CPG_CLKMON_USB) != 0x0000000f) { ++ (*(volatile u32 *)CPG_RESET_USB) = 0x000f0000; ++ (*(volatile u32 *)CPG_RESET_USB) = 0x000f000f; ++ (*(volatile u32 *)CPG_CLKON_USB) = 0x000f000f; ++ } ++ ++/* Setup */ ++ /* Disable GPIO Write Protect */ ++ (*(volatile u32 *)PFC_PWPR) &= ~(0x1u << 7); /* PWPR.BOWI = 0 */ ++ (*(volatile u32 *)PFC_PWPR) |= (0x1u << 6); /* PWPR.PFCWE = 1 */ ++ (*(volatile u32 *)PFC_PWPR); /* barrier */ ++ ++/* Enable USB0 HCD/PCD */ ++ /* DP/DM are fixed */ ++ /* set P4_0 as Func.1 for VBUSEN */ ++ /* PMC14.b0 = 1 */ ++ /* PFC14.PFC0 = 0 */ ++ ++ ++ /* set P5_0 as Func.1 for OVC */ ++ (*(volatile u8 *)PFC_PMC15) |= (0x1u << 0); ++ (*(volatile u8 *)PFC_PFC15) &= ~(0x7u << 0); ++ (*(volatile u8 *)PFC_PFC15) |= (0x1u << 0); ++ ++ /* set P5_1 as Func.1 for OTG_ID */ ++ (*(volatile u8 *)PFC_PMC15) |= (0x1u << 1); ++ (*(volatile u8 *)PFC_PFC15) &= ~(0x7u << 8); ++ (*(volatile u8 *)PFC_PFC15) |= (0x1u << 8); ++ ++/* Enable USB1 HCD */ ++ /* DP/DM are fixed */ ++ /* set P42_0 as Func.1 for VBUSEN */ ++ (*(volatile u8 *)PFC_PMC3A) |= (0x1u << 0); /* PMC15.b0 = 1 */ ++ (*(volatile u8 *)PFC_PFC3A) &= ~(0x7u << 0); /* PFC15.PFC0 = 0 */ ++ (*(volatile u8 *)PFC_PFC3A) |= (0x1u << 0); ++ ++ /* set P42_1 as Func.1 for OVC */ ++ (*(volatile u8 *)PFC_PMC3A) |= (0x1u << 1); ++ (*(volatile u8 *)PFC_PFC3A) &= ~(0x7u << 8); ++ (*(volatile u8 *)PFC_PFC3A) |= (0x1u << 8); ++ ++/* Enable write protect */ ++ /* Enable PFC write protect */ ++ (*(volatile u32 *)PFC_PWPR) &= ~(0x1u << 6); /* PWPR.PFCWE = 0 */ ++ (*(volatile u32 *)PFC_PWPR) |= (0x1u << 7); /* PWPR.BOWI = 1 */ ++ (*(volatile u32 *)PFC_PWPR); /* barrier */ ++ ++/********************************************/ ++ ++#define USBPHY_BASE (0x11c40000) ++#define USB0_BASE (0x11c50000) ++#define USBF_BASE (0x11c60000) ++#define USB1_BASE (0x11c70000) ++ ++/* Reset USB2.0 PHY */ ++#define USBPHY_RESET (USBPHY_BASE + 0x000u) ++#define USBPHY_UDIRPD (USBPHY_BASE + 0x01cu) ++ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001133u; ++ udelay(1); ++#if 1 /* US0/USB1 use: USB0=OTG, USB1=Host */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001000u; ++#endif ++#if 0 /* USB1 unuse: USB0=OTG, USB1=USBTEST */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001011u; /* USB0 only */ ++#endif ++#if 0 /* USB0 unuse: USB0=USBTEST, USB1=OTG */ ++ (*(volatile u32 *)USBPHY_RESET) = 0x00001000u; /* USB1 only */ ++#endif ++ udelay(100); ++ ++/********************************************/ ++ ++/* USBTEST registers */ ++#define RESET (0x000) ++#define UCLKCTL (0x018) ++#define UDIRPD (0x01c) ++#define CON_CTRL (0x020) ++#define CLK_STAT (0x104) ++ ++#define HcRhDescriptorA (0x048) ++#define COMMCTRL (0x800) ++#define LPSTS (0x102) ++ ++/* Setup USB0 */ ++ /* Release USB_BLK module from the standby state (in board_cpg_init) */ ++ ++ /* Overcurrent function is not supported now */ ++ (*(volatile u32 *)(USB0_BASE + HcRhDescriptorA)) |= (0x1u << 12); /* NOCP = 1 */ ++ /* Select the clock supplid to USBPHY */ ++// (*(volatile u32 *)(USBTEST_BASE + UCLKCTL)) = // TO BE FIXED ++ /* Select host / peripheral operation (USB0 only) */ ++ (*(volatile u32 *)(USB0_BASE + COMMCTRL)) = 0; /* USB0 is host mode */ ++ /* Set USBPHY normal operation (Function only) */ ++// (*(volatile u16 *)USBF_BASE + LPSTS) |= (0x1u << 14); /* USBPHY.SUSPM = 1 (func only) */ ++ /* Select the clock supplid to USBPHY */ ++// (*(volatile u32 *)(USBCTR.PLL_RST = // TO BE FIXED ++ /* wait 100 usec */ ++ udelay(100); ++ ++/* Setup USB1 */ ++ /* Release USB_BLK module from the standby state (in board_cpg_init) */ ++ ++ /* Overcurrent function is not supported now */ ++ (*(volatile u32 *)(USB1_BASE + HcRhDescriptorA)) |= (0x1u << 12); /* NOCP = 1 */ ++ /* Select the clock supplid to USBPHY */ ++// (*(volatile u32 *)(USBCTR.PLL_RST = // TO BE FIXED ++ /* wait 100 usec */ ++ udelay(100); ++} +\ No newline at end of file +diff --git a/drivers/phy/phy-rcar-gen3.c b/drivers/phy/phy-rcar-gen3.c +index 8c596314..f54bd48d 100644 +--- a/drivers/phy/phy-rcar-gen3.c ++++ b/drivers/phy/phy-rcar-gen3.c +@@ -59,7 +59,7 @@ struct rcar_gen3_phy { + static int rcar_gen3_phy_phy_init(struct phy *phy) + { + struct rcar_gen3_phy *priv = dev_get_priv(phy->dev); +- ++#if 0 + /* Initialize USB2 part */ + writel(0, priv->regs + USB2_INT_ENABLE); + writel(USB2_SPD_RSM_TIMSET_INIT, priv->regs + USB2_SPD_RSM_TIMSET); +@@ -71,12 +71,13 @@ static int rcar_gen3_phy_phy_init(struct phy *phy) + clrbits_le32(priv->regs + USB2_COMMCTRL, USB2_COMMCTRL_OTG_PERI); + + setbits_le32(priv->regs + USB2_ADPCTRL, USB2_ADPCTRL_DRVVBUS); +- ++#endif + return 0; + } + + static int rcar_gen3_phy_phy_power_on(struct phy *phy) + { ++#if 0 + struct rcar_gen3_phy *priv = dev_get_priv(phy->dev); + int ret; + +@@ -88,18 +89,21 @@ static int rcar_gen3_phy_phy_power_on(struct phy *phy) + + setbits_le32(priv->regs + USB2_USBCTR, USB2_USBCTR_PLL_RST); + clrbits_le32(priv->regs + USB2_USBCTR, USB2_USBCTR_PLL_RST); +- ++#endif + return 0; + } + + static int rcar_gen3_phy_phy_power_off(struct phy *phy) + { ++#if 0 + struct rcar_gen3_phy *priv = dev_get_priv(phy->dev); + + if (!priv->vbus_supply) + return 0; + + return regulator_set_enable(priv->vbus_supply, false); ++#endif ++ return 0; + } + + static const struct phy_ops rcar_gen3_phy_phy_ops = { +@@ -111,12 +115,14 @@ static const struct phy_ops rcar_gen3_phy_phy_ops = { + static int rcar_gen3_phy_probe(struct udevice *dev) + { + struct rcar_gen3_phy *priv = dev_get_priv(dev); ++#if 0 + int ret; ++#endif + + priv->regs = dev_read_addr(dev); + if (priv->regs == FDT_ADDR_T_NONE) + return -EINVAL; +- ++#if 0 + ret = device_get_supply_regulator(dev, "vbus-supply", + &priv->vbus_supply); + if (ret && ret != -ENOENT) { +@@ -132,7 +138,7 @@ static int rcar_gen3_phy_probe(struct udevice *dev) + ret = clk_enable(&priv->clk); + if (ret) + return ret; +- ++#endif + return 0; + } + +diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c +index 4c28a69b..c4db3b59 100644 +--- a/drivers/usb/host/ehci-generic.c ++++ b/drivers/usb/host/ehci-generic.c +@@ -148,8 +148,9 @@ static int ehci_usb_probe(struct udevice *dev) + err = ehci_enable_vbus_supply(dev); + if (err) + goto reset_err; +- ++#if 0 + err = ehci_setup_phy(dev, &priv->phy, 0); ++#endif + if (err) + goto regulator_err; + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir-common_2021.10.inc b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir-common_2021.10.inc new file mode 100644 index 0000000000000000000000000000000000000000..eebef2e41b8eed9dc6cef104a71532f49ce24242 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir-common_2021.10.inc @@ -0,0 +1,15 @@ +HOMEPAGE = "http://www.denx.de/wiki/U-Boot/WebHome" +DESCRIPTION = "U-Boot, a boot loader for Embedded boards based on PowerPC, \ +ARM, MIPS and several other processors, which can be installed in a boot \ +ROM and used to initialize and test the hardware or to download and run \ +application code." +SECTION = "bootloaders" +DEPENDS += "flex-native bison-native" + +LICENSE = "GPLv2+" +LIC_FILES_CHKSUM = "file://Licenses/README;md5=5a7450c57ffe5ae63fd732446b988025" +PE = "1" + +S = "${WORKDIR}/myir-renesas-uboot" +B = "${WORKDIR}/build" +do_configure[cleandirs] = "${B}" diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir.inc b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir.inc new file mode 100644 index 0000000000000000000000000000000000000000..b7106e1b4e942c9c0c65d92169f7211998ddbdd6 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir.inc @@ -0,0 +1,312 @@ +SUMMARY = "Universal Boot Loader for embedded devices" +PROVIDES = "virtual/bootloader" + +B = "${WORKDIR}/build" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +inherit uboot-config uboot-extlinux-config uboot-sign deploy + +DEPENDS += "swig-native lzop-native" + +EXTRA_OEMAKE = 'CROSS_COMPILE=${TARGET_PREFIX} CC="${TARGET_PREFIX}gcc ${TOOLCHAIN_OPTIONS}" V=1' +EXTRA_OEMAKE += 'HOSTCC="${BUILD_CC} ${BUILD_CFLAGS} ${BUILD_LDFLAGS}"' +EXTRA_OEMAKE += 'STAGING_INCDIR=${STAGING_INCDIR_NATIVE} STAGING_LIBDIR=${STAGING_LIBDIR_NATIVE}' + +PACKAGECONFIG ??= "openssl" +# u-boot will compile its own tools during the build, with specific +# configurations (aka when CONFIG_FIT_SIGNATURE is enabled) openssl is needed as +# a host build dependency. +PACKAGECONFIG[openssl] = ",,openssl-native" + +# Allow setting an additional version string that will be picked up by the +# u-boot build system and appended to the u-boot version. If the .scmversion +# file already exists it will not be overwritten. +UBOOT_LOCALVERSION ?= "" + +# Some versions of u-boot use .bin and others use .img. By default use .bin +# but enable individual recipes to change this value. +UBOOT_SUFFIX ??= "bin" +UBOOT_IMAGE ?= "u-boot-${MACHINE}-${PV}-${PR}.${UBOOT_SUFFIX}" +UBOOT_SYMLINK ?= "u-boot-${MACHINE}.${UBOOT_SUFFIX}" +UBOOT_MAKE_TARGET ?= "all" + +# Output the ELF generated. Some platforms can use the ELF file and directly +# load it (JTAG booting, QEMU) additionally the ELF can be used for debugging +# purposes. +UBOOT_ELF ?= "" +UBOOT_ELF_SUFFIX ?= "elf" +UBOOT_ELF_IMAGE ?= "u-boot-${MACHINE}-${PV}-${PR}.${UBOOT_ELF_SUFFIX}" +UBOOT_ELF_BINARY ?= "u-boot.${UBOOT_ELF_SUFFIX}" +UBOOT_ELF_SYMLINK ?= "u-boot-${MACHINE}.${UBOOT_ELF_SUFFIX}" + +# Some versions of u-boot build an SPL (Second Program Loader) image that +# should be packaged along with the u-boot binary as well as placed in the +# deploy directory. For those versions they can set the following variables +# to allow packaging the SPL. +SPL_BINARY ?= "" +SPL_BINARYNAME ?= "${@os.path.basename(d.getVar("SPL_BINARY"))}" +SPL_IMAGE ?= "${SPL_BINARYNAME}-${MACHINE}-${PV}-${PR}" +SPL_SYMLINK ?= "${SPL_BINARYNAME}-${MACHINE}" + +# Additional environment variables or a script can be installed alongside +# u-boot to be used automatically on boot. This file, typically 'uEnv.txt' +# or 'boot.scr', should be packaged along with u-boot as well as placed in the +# deploy directory. Machine configurations needing one of these files should +# include it in the SRC_URI and set the UBOOT_ENV parameter. +UBOOT_ENV_SUFFIX ?= "txt" +UBOOT_ENV ?= "" +UBOOT_ENV_BINARY ?= "${UBOOT_ENV}.${UBOOT_ENV_SUFFIX}" +UBOOT_ENV_IMAGE ?= "${UBOOT_ENV}-${MACHINE}-${PV}-${PR}.${UBOOT_ENV_SUFFIX}" +UBOOT_ENV_SYMLINK ?= "${UBOOT_ENV}-${MACHINE}.${UBOOT_ENV_SUFFIX}" + +# U-Boot EXTLINUX variables. U-Boot searches for /boot/extlinux/extlinux.conf +# to find EXTLINUX conf file. +UBOOT_EXTLINUX_INSTALL_DIR ?= "/boot/extlinux" +UBOOT_EXTLINUX_CONF_NAME ?= "extlinux.conf" +UBOOT_EXTLINUX_SYMLINK ?= "${UBOOT_EXTLINUX_CONF_NAME}-${MACHINE}-${PR}" + +do_compile () { + if [ "${@bb.utils.filter('DISTRO_FEATURES', 'ld-is-gold', d)}" ]; then + sed -i 's/$(CROSS_COMPILE)ld$/$(CROSS_COMPILE)ld.bfd/g' ${S}/config.mk + fi + + unset LDFLAGS + unset CFLAGS + unset CPPFLAGS + + if [ ! -e ${B}/.scmversion -a ! -e ${S}/.scmversion ] + then + echo ${UBOOT_LOCALVERSION} > ${B}/.scmversion + echo ${UBOOT_LOCALVERSION} > ${S}/.scmversion + fi + + if [ -n "${UBOOT_CONFIG}" ] + then + unset i j k + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + oe_runmake -C ${S} O=${B}/${config} ${config} + oe_runmake -C ${S} O=${B}/${config} ${UBOOT_MAKE_TARGET} + for binary in ${UBOOT_BINARIES}; do + k=$(expr $k + 1); + if [ $k -eq $i ]; then + cp ${B}/${config}/${binary} ${B}/${config}/u-boot-${type}.${UBOOT_SUFFIX} + fi + done + unset k + fi + done + unset j + done + unset i + else + oe_runmake -C ${S} O=${B} ${UBOOT_MACHINE} + oe_runmake -C ${S} O=${B} ${UBOOT_MAKE_TARGET} + fi + +} + +do_install () { + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -d ${D}/boot + install -m 644 ${B}/${config}/u-boot-${type}.${UBOOT_SUFFIX} ${D}/boot/u-boot-${type}-${PV}-${PR}.${UBOOT_SUFFIX} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${D}/boot/${UBOOT_BINARY}-${type} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${D}/boot/${UBOOT_BINARY} + fi + done + unset j + done + unset i + else + install -d ${D}/boot + install -m 644 ${B}/${UBOOT_BINARY} ${D}/boot/${UBOOT_IMAGE} + ln -sf ${UBOOT_IMAGE} ${D}/boot/${UBOOT_BINARY} + fi + + if [ -n "${UBOOT_ELF}" ] + then + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -m 644 ${B}/${config}/${UBOOT_ELF} ${D}/boot/u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${D}/boot/${UBOOT_BINARY}-${type} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${D}/boot/${UBOOT_BINARY} + fi + done + unset j + done + unset i + else + install -m 644 ${B}/${UBOOT_ELF} ${D}/boot/${UBOOT_ELF_IMAGE} + ln -sf ${UBOOT_ELF_IMAGE} ${D}/boot/${UBOOT_ELF_BINARY} + fi + fi + + if [ -e ${WORKDIR}/fw_env.config ] ; then + install -d ${D}${sysconfdir} + install -m 644 ${WORKDIR}/fw_env.config ${D}${sysconfdir}/fw_env.config + fi + + if [ -n "${SPL_BINARY}" ] + then + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -m 644 ${B}/${config}/${SPL_BINARY} ${D}/boot/${SPL_IMAGE}-${type}-${PV}-${PR} + ln -sf ${SPL_IMAGE}-${type}-${PV}-${PR} ${D}/boot/${SPL_BINARYNAME}-${type} + ln -sf ${SPL_IMAGE}-${type}-${PV}-${PR} ${D}/boot/${SPL_BINARYNAME} + fi + done + unset j + done + unset i + else + install -m 644 ${B}/${SPL_BINARY} ${D}/boot/${SPL_IMAGE} + ln -sf ${SPL_IMAGE} ${D}/boot/${SPL_BINARYNAME} + fi + fi + + if [ -n "${UBOOT_ENV}" ] + then + install -m 644 ${WORKDIR}/${UBOOT_ENV_BINARY} ${D}/boot/${UBOOT_ENV_IMAGE} + ln -sf ${UBOOT_ENV_IMAGE} ${D}/boot/${UBOOT_ENV_BINARY} + fi + + if [ "${UBOOT_EXTLINUX}" = "1" ] + then + install -Dm 0644 ${UBOOT_EXTLINUX_CONFIG} ${D}/${UBOOT_EXTLINUX_INSTALL_DIR}/${UBOOT_EXTLINUX_CONF_NAME} + fi + +} + +FILES:${PN} = "/boot ${sysconfdir}" + +SYSROOT_DIRS += "/boot" + +do_deploy () { + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -d ${DEPLOYDIR} + install -m 644 ${B}/${config}/u-boot-${type}.${UBOOT_SUFFIX} ${DEPLOYDIR}/u-boot-${type}-${PV}-${PR}.${UBOOT_SUFFIX} + cd ${DEPLOYDIR} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${UBOOT_SYMLINK}-${type} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${UBOOT_SYMLINK} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${UBOOT_BINARY}-${type} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_SUFFIX} ${UBOOT_BINARY} + fi + done + unset j + done + unset i + else + install -d ${DEPLOYDIR} + install -m 644 ${B}/${UBOOT_BINARY} ${DEPLOYDIR}/${UBOOT_IMAGE} + cd ${DEPLOYDIR} + rm -f ${UBOOT_BINARY} ${UBOOT_SYMLINK} + ln -sf ${UBOOT_IMAGE} ${UBOOT_SYMLINK} + ln -sf ${UBOOT_IMAGE} ${UBOOT_BINARY} + fi + + if [ -n "${UBOOT_ELF}" ] + then + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -m 644 ${B}/${config}/${UBOOT_ELF} ${DEPLOYDIR}/u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${DEPLOYDIR}/${UBOOT_ELF_BINARY}-${type} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${DEPLOYDIR}/${UBOOT_ELF_BINARY} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${DEPLOYDIR}/${UBOOT_ELF_SYMLINK}-${type} + ln -sf u-boot-${type}-${PV}-${PR}.${UBOOT_ELF_SUFFIX} ${DEPLOYDIR}/${UBOOT_ELF_SYMLINK} + fi + done + unset j + done + unset i + else + install -m 644 ${B}/${UBOOT_ELF} ${DEPLOYDIR}/${UBOOT_ELF_IMAGE} + ln -sf ${UBOOT_ELF_IMAGE} ${DEPLOYDIR}/${UBOOT_ELF_BINARY} + ln -sf ${UBOOT_ELF_IMAGE} ${DEPLOYDIR}/${UBOOT_ELF_SYMLINK} + fi + fi + + + if [ -n "${SPL_BINARY}" ] + then + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -m 644 ${B}/${config}/${SPL_BINARY} ${DEPLOYDIR}/${SPL_IMAGE}-${type}-${PV}-${PR} + rm -f ${DEPLOYDIR}/${SPL_BINARYNAME} ${DEPLOYDIR}/${SPL_SYMLINK}-${type} + ln -sf ${SPL_IMAGE}-${type}-${PV}-${PR} ${DEPLOYDIR}/${SPL_BINARYNAME}-${type} + ln -sf ${SPL_IMAGE}-${type}-${PV}-${PR} ${DEPLOYDIR}/${SPL_BINARYNAME} + ln -sf ${SPL_IMAGE}-${type}-${PV}-${PR} ${DEPLOYDIR}/${SPL_SYMLINK}-${type} + ln -sf ${SPL_IMAGE}-${type}-${PV}-${PR} ${DEPLOYDIR}/${SPL_SYMLINK} + fi + done + unset j + done + unset i + else + install -m 644 ${B}/${SPL_BINARY} ${DEPLOYDIR}/${SPL_IMAGE} + rm -f ${DEPLOYDIR}/${SPL_BINARYNAME} ${DEPLOYDIR}/${SPL_SYMLINK} + ln -sf ${SPL_IMAGE} ${DEPLOYDIR}/${SPL_BINARYNAME} + ln -sf ${SPL_IMAGE} ${DEPLOYDIR}/${SPL_SYMLINK} + fi + fi + + + if [ -n "${UBOOT_ENV}" ] + then + install -m 644 ${WORKDIR}/${UBOOT_ENV_BINARY} ${DEPLOYDIR}/${UBOOT_ENV_IMAGE} + rm -f ${DEPLOYDIR}/${UBOOT_ENV_BINARY} ${DEPLOYDIR}/${UBOOT_ENV_SYMLINK} + ln -sf ${UBOOT_ENV_IMAGE} ${DEPLOYDIR}/${UBOOT_ENV_BINARY} + ln -sf ${UBOOT_ENV_IMAGE} ${DEPLOYDIR}/${UBOOT_ENV_SYMLINK} + fi + + if [ "${UBOOT_EXTLINUX}" = "1" ] + then + install -m 644 ${UBOOT_EXTLINUX_CONFIG} ${DEPLOYDIR}/${UBOOT_EXTLINUX_SYMLINK} + ln -sf ${UBOOT_EXTLINUX_SYMLINK} ${DEPLOYDIR}/${UBOOT_EXTLINUX_CONF_NAME}-${MACHINE} + ln -sf ${UBOOT_EXTLINUX_SYMLINK} ${DEPLOYDIR}/${UBOOT_EXTLINUX_CONF_NAME} + fi +} + +addtask deploy before do_build after do_compile diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir_2021.10.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir_2021.10.bb new file mode 100644 index 0000000000000000000000000000000000000000..307a2ee910d97535da6e164feab2770a063ae0c4 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir_2021.10.bb @@ -0,0 +1,72 @@ +require u-boot-myir-common_${PV}.inc +require u-boot-myir.inc + +DEPENDS += "bc-native dtc-native" + +#UBOOT_URL = "git://github.com/renesas-rz/renesas-u-boot-cip.git" +#BRANCH = "v2021.10/rz" +#UBOOT_URL = "git://github.com/123markhong/yg2lx-uboot.git" +#BRANCH = "uboot-v2021.10" +#UBOOT_URL = "git://github.com/123markhong/myir-renesas-uboot.git" +#BRANCH = "develop-rzg2l-v2021.10" +# UBOOT_URL = "git://github.com/MYiR-Dev/myir-renesas-uboot.git" +# BRANCH = "develop-remi-v2021.10" +#UBOOT_URL = "git:///opt/hjx-source/renesas/remi-pi/sources/myir-renesas-uboot" +#BRANCH = "develop-rzg2l-v2021.10" + + +# SRC_URI = "${UBOOT_URL};branch=${BRANCH}" +SRC_URI = " \ + file://myir-renesas-uboot \ +" + +#SRCREV = "90edad6e00ef9ebe0ef010561fc7d864f357ad19" +#SRCREV = "293d59522a41ae07644e8a61c600ca0039076d3a" +#SRCREV = "879bd6891e5b09f3c37d65f20c7e05c4b00034a8" +#SRCREV = "3067361a313c3a29181c1bf15afa441ff42a1622" +# SRCREV = "75dee8f1759d6b3b140aa42486ad39a7113903ef" +PV = "2021.10" + +#SRC_URI_append = " \ +# file://0006-myir-myd-yg2lx-cm33.patch \ +#" + +#SRC_URI += " \ +# file://0001-disable-reserved-area-check.patch \ +# file://0002-cmd-Add-cm33-command.patch \ +# file://0003-configs-smarc-rzg2l_defconfig-Enable-CM33-command.patch \ +# file://0004-configs-smarc-rzg2lc_defconfig-Enable-CM33-command.patch \ +# file://0005-configs-smarc-rzg2ul_defconfig-Enable-CM33-command.patch \ +#" + + +UBOOT_SREC_SUFFIX = "srec" +UBOOT_SREC ?= "u-boot-elf.${UBOOT_SREC_SUFFIX}" +UBOOT_SREC_IMAGE ?= "u-boot-elf-${MACHINE}-${PV}-${PR}.${UBOOT_SREC_SUFFIX}" +UBOOT_SREC_SYMLINK ?= "u-boot-elf-${MACHINE}.${UBOOT_SREC_SUFFIX}" + +do_deploy:append() { + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -m 644 ${B}/${config}/${UBOOT_SREC} ${DEPLOYDIR}/u-boot-elf-${type}-${PV}-${PR}.${UBOOT_SREC_SUFFIX} + cd ${DEPLOYDIR} + ln -sf u-boot-elf-${type}-${PV}-${PR}.${UBOOT_SREC_SUFFIX} u-boot-elf-${type}.${UBOOT_SREC_SUFFIX} + fi + done + unset j + done + unset i + else + install -m 644 ${B}/${UBOOT_SREC} ${DEPLOYDIR}/${UBOOT_SREC_IMAGE} + cd ${DEPLOYDIR} + rm -f ${UBOOT_SREC} ${UBOOT_SREC_SYMLINK} + ln -sf ${UBOOT_SREC_IMAGE} ${UBOOT_SREC_SYMLINK} + ln -sf ${UBOOT_SREC_IMAGE} ${UBOOT_SREC} + fi +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir_2021.10.bbappend b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir_2021.10.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..9cabbbdac9bae83fb82f32add7f8a38e7def55b0 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-bsp/u-boot/u-boot-myir_2021.10.bbappend @@ -0,0 +1,28 @@ +require renesas/include/rzg2l-security-config.inc +inherit python3native + +DEPENDS:append = " \ + ${@oe.utils.conditional("TRUSTED_BOARD_BOOT", "1", "python3-pycryptodome-native python3-pycryptodomex-native secprv-native", "",d)} \ +" + +do_compile:append() { + + if [ "${TRUSTED_BOARD_BOOT}" = "1" ]; then + python3 ${MANIFEST_GENERATION_KCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl33_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl33_key.pem -certout bl33-kcert.bin + + python3 ${MANIFEST_GENERATION_CCERT} -info ${DIRPATH_MANIFEST_GENTOOL}/info/bl33_${IMG_AUTH_MODE}_info.xml \ + -iskey ${SYMLINK_NATIVE_BOOT_KEY_DIR}/bl33_key.pem -imgin ${B}/${config}/u-boot.bin \ + -certout bl33-ccert.bin -imgout u-boot_tbb.bin + fi +} + +do_install:append() { + + if [ "${TRUSTED_BOARD_BOOT}" = "1" ]; then + # install firmware images + install -m 0644 ${B}/bl33-kcert.bin ${D}/boot/bl33-kcert-${MACHINE}.bin + install -m 0644 ${B}/bl33-ccert.bin ${D}/boot/bl33-ccert-${MACHINE}.bin + install -m 0644 ${B}/u-boot_tbb.bin ${D}/boot/u-boot-${MACHINE}_tbb.bin + fi +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/images/myir-remi.inc b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/images/myir-remi.inc new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/images/openeuler-image.bbappend b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/images/openeuler-image.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/selinux/policycoreutils_%.bbappend b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/selinux/policycoreutils_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..522b2c44ae4a7cdeba4814125231ee12bea0244a --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-core/selinux/policycoreutils_%.bbappend @@ -0,0 +1,4 @@ +SRC_URI:remove = " \ + file://fix-fixfiles-N-date-function.patch;patchdir=.. \ + file://fix-fixfiles-N-date-function-two.patch;patchdir=.. \ +" \ No newline at end of file diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux-libc-headers/linux-libc-headers_5.10.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux-libc-headers/linux-libc-headers_5.10.bb new file mode 100644 index 0000000000000000000000000000000000000000..4b18f98b1dd9c204e7adba212a9fa67b94111c81 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux-libc-headers/linux-libc-headers_5.10.bb @@ -0,0 +1,19 @@ +require recipes-kernel/linux-libc-headers/linux-libc-headers.inc + +KERNEL_URL = " \ + git://github.com/renesas-rz/rz_linux-cip.git" +BRANCH = "${@oe.utils.conditional("IS_RT_BSP", "1", "rz-5.10-cip13-rt5", "rz-5.10-cip13",d)}" +SRCREV = "${@oe.utils.conditional("IS_RT_BSP", "1", "c8798f35184b8115f9aba9f972eb12ed3bb4e9e0", "61bbadb8a4b899371c83e1cbadd0a46ffd6ebb40",d)}" +LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46" + +SRC_URI = "${KERNEL_URL};branch=${BRANCH}" + +FILESEXTRAPATHS:prepend := "${THISDIR}/../linux/linux-renesas:" + +S = "${WORKDIR}/git" + +# below overrides the multilib list - can be dropped for the next LTS +do_install_armmultilib () { + oe_multilib_header asm/auxvec.h asm/bitsperlong.h asm/byteorder.h asm/fcntl.h asm/hwcap.h asm/ioctls.h asm/kvm_para.h asm/mman.h asm/param.h asm/perf_regs.h asm/bpf_perf_event.h + oe_multilib_header asm/posix_types.h asm/ptrace.h asm/setup.h asm/sigcontext.h asm/siginfo.h asm/signal.h asm/stat.h asm/statfs.h asm/swab.h asm/types.h asm/unistd.h +} diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-devsrc.bbappend b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-devsrc.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..70e48c85b74a5e002ea36d53dc70fbaca947fa52 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-devsrc.bbappend @@ -0,0 +1 @@ +INSANE_SKIP:${PN} += "arch" diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr.bb new file mode 100644 index 0000000000000000000000000000000000000000..997d49434cc23d37418d4735f5e00a20182b8360 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr.bb @@ -0,0 +1,87 @@ +DESCRIPTION = "Memory Manager Kernel module for Renesas RZG2" +RENESAS_DATADIR ?= "/usr/local" +require mmngr_drv.inc + +DEPENDS = "linux-myir" +PN = "kernel-module-mmngr" +PR = "r0" + +S = "${WORKDIR}/git" +MMNGR_DRV_DIR = "mmngr_drv/mmngr/mmngr-module/files/mmngr" + +SRC_URI_append = " \ + file://0001-Add-physical-address-translating-feature.patch \ + file://0002-mmngr_drv-mmngr-Add-checking-NULL-vma-in-mm_cnv_addr.patch \ + file://0003-mmngr-Get-start-address-of-MMP-area-from-DT.patch \ + file://0004-Do-not-parse-and-init-lossy-mem-area-for-RZ-G2L-Seri.patch \ + file://0005-mmngr-module-mmngr_drv-add-support-IPMMU-for-RZG2M.patch \ + file://0006-mmngr-module-mmngr_drv-add-support-IPMMU-for-RZG2N.patch \ + file://0007-mmngr-module-mmngr_drv-add-support-IPMMU-for-RZG2E.patch \ + file://0008-mmngr-module-mmngr_drv-add-support-IPMMU-for-RZ-G2H.patch \ + file://0009-mmngr_drv-mmngr-Add-IPMMU-support-for-RZ-G2M-v3.0.patch \ + file://0010-mmngr_drv-mmngr-Update-PA-VA-mapping-table-for-HiHop.patch \ + file://0011-mmngr-change-address-setting-for-H3N-Swap-mode.patch \ + file://0012-Add-RZ-V2L-into-rzg2l_match-to-not-parse-and-init-lo.patch \ +" + +SRC_URI_append_rzg2l = " \ + file://0001-Reduce-MM_OMXBUF_SIZE-for-omx.patch \ + file://0002-Fix-ioctl-MM_IOC_VTOP-hang-up.patch \ + file://0003-mmngr_drv-mmngr-module-drv-Update-physical-convert-f.patch \ +" + +MMNGR_CFG ?= "MMNGR_SALVATORX" +MMNGR_CFG_ek874 = "MMNGR_EBISU" + +includedir = "${RENESAS_DATADIR}/include" +SSTATE_DUPWHITELIST += "${STAGING_INCDIR}" + +# Build Memory Manager kernel module without suffix +KERNEL_MODULE_PACKAGE_SUFFIX = "" + +do_compile() { + export MMNGR_CONFIG=${MMNGR_CFG} + export MMNGR_SSP_CONFIG="MMNGR_SSP_DISABLE" + export MMNGR_IPMMU_MMU_CONFIG="IPMMU_MMU_DISABLE" + + cd ${S}/${MMNGR_DRV_DIR}/drv + install -d ${INCSHARED} + make all +} + +do_install () { + # Create destination directories + install -d ${D}/lib/modules/${KERNEL_VERSION}/extra/ + install -d ${D}/${includedir} + + # Install shared library to KERNELSRC(STAGING_KERNEL_DIR) for reference from other modules + # This file installed in SDK by kernel-devsrc pkg. + install -m 644 ${S}/${MMNGR_DRV_DIR}/drv/Module.symvers ${KERNELSRC}/include/mmngr.symvers + + # Install kernel module + install -m 644 ${S}/${MMNGR_DRV_DIR}/drv/mmngr.ko ${D}/lib/modules/${KERNEL_VERSION}/extra/ + + # Install shared header files to KERNELSRC(STAGING_KERNEL_DIR) + # This file installed in SDK by kernel-devsrc pkg. + install -m 644 ${S}/${MMNGR_DRV_DIR}/include/mmngr_public.h ${KERNELSRC}/include/ + install -m 644 ${S}/${MMNGR_DRV_DIR}/include/mmngr_private.h ${KERNELSRC}/include/ + install -m 644 ${S}/${MMNGR_DRV_DIR}/include/mmngr_public_cmn.h ${KERNELSRC}/include/ + install -m 644 ${S}/${MMNGR_DRV_DIR}/include/mmngr_private_cmn.h ${KERNELSRC}/include/ + + # Install shared header file to ${includedir} + install -m 644 ${S}/${MMNGR_DRV_DIR}/include/mmngr_public_cmn.h ${D}/${includedir}/ + install -m 644 ${S}/${MMNGR_DRV_DIR}/include/mmngr_private_cmn.h ${D}/${includedir}/ +} + +PACKAGES = "\ + ${PN} \ + ${PN}-dev \ +" + +FILES_${PN} = " \ + /lib/modules/${KERNEL_VERSION}/extra/mmngr.ko \ +" + +RPROVIDES_${PN} += "kernel-module-mmngr" + +KERNEL_MODULE_AUTOLOAD = "mmngr" diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0001-Add-physical-address-translating-feature.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0001-Add-physical-address-translating-feature.patch new file mode 100644 index 0000000000000000000000000000000000000000..c3fb46f33b06558665d4075ed89e224d448c41da --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0001-Add-physical-address-translating-feature.patch @@ -0,0 +1,79 @@ +From 4c48e13bde931f2ff1e2a6180fc4ec755ffb3c18 Mon Sep 17 00:00:00 2001 +From: hienhuynh +Date: Tue, 8 Mar 2022 14:00:17 +0700 +Subject: [PATCH 01/11] Add physical address translating feature + +This patch adds physical address translating feature + +Signed-off-by: Son Lam +Signed-off-by: hienhuynh +--- + .../mmngr-module/files/mmngr/drv/mmngr_drv.c | 25 +++++++++++++++++++ + .../files/mmngr/include/mmngr_private_cmn.h | 2 ++ + 2 files changed, 27 insertions(+) + +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +index 020b8ec..db4324c 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +@@ -67,6 +67,8 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include +@@ -835,6 +837,26 @@ static int mm_ioc_share(int __user *in, struct MM_PARAM *out) + return ret; + } + ++/* change virtual address to physical address */ ++static void mm_cnv_addr(int __user *out) ++{ ++ struct vm_area_struct *vma; ++ struct mm_struct *mm = current->mm; ++ struct MM_PARAM *tmp = (struct MM_PARAM *)out; ++ unsigned long start; ++ unsigned long pfn; ++ int lp = 0; ++ ++ for (lp = 0; lp < 2; lp++) { ++ vma = find_vma(mm, tmp[lp].user_virt_addr); ++ start = tmp[lp].user_virt_addr & PAGE_MASK; ++ follow_pfn(vma, start, &pfn); ++ tmp[lp].hard_addr = pfn << PAGE_SHIFT; ++ } ++ ++ return; ++} ++ + static void mmngr_dev_set_cma_area(struct device *dev, struct cma *cma) + { + if (dev) +@@ -968,6 +990,9 @@ static long ioctl(struct file *file, unsigned int cmd, unsigned long arg) + dma_sync_single_for_cpu(mm_dev, p->hard_addr + cachep->offset, + cachep->len, DMA_TO_DEVICE); + break; ++ case MM_IOC_VTOP: /* change virtual address to physical address */ ++ mm_cnv_addr((int __user *)arg); ++ break; + default: + pr_err("%s MMD CMD EFAULT\n", __func__); + ret = -EFAULT; +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private_cmn.h b/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private_cmn.h +index 5f137c6..f8a60bd 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private_cmn.h ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private_cmn.h +@@ -87,5 +87,7 @@ struct MM_CACHE_PARAM { + #define MM_IOC_SHARE _IOWR(MM_IOC_MAGIC, 6, struct MM_PARAM) + #define MM_IOC_FLUSH _IOWR(MM_IOC_MAGIC, 7, struct MM_CACHE_PARAM) + #define MM_IOC_INVAL _IOWR(MM_IOC_MAGIC, 8, struct MM_CACHE_PARAM) ++/* virt to phys */ ++#define MM_IOC_VTOP _IOWR(MM_IOC_MAGIC, 9, struct MM_PARAM) + + #endif /* __MMNGR_PRIVATE_CMN_H__ */ +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0001-Reduce-MM_OMXBUF_SIZE-for-omx.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0001-Reduce-MM_OMXBUF_SIZE-for-omx.patch new file mode 100644 index 0000000000000000000000000000000000000000..85bae7fa22a9dd13a1dde8effc6e7a1ce50c5f81 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0001-Reduce-MM_OMXBUF_SIZE-for-omx.patch @@ -0,0 +1,28 @@ +From 1e3184bd26bd8c35548320612888eb19a5b96e24 Mon Sep 17 00:00:00 2001 +From: hienhuynh +Date: Tue, 8 Mar 2022 14:24:23 +0700 +Subject: [PATCH 1/3] Reduce MM_OMXBUF_SIZE for omx + +This commit is created to reduce MM_OMXBUF_SIZE for RZ/G2L Series. + +Signed-off-by: hienhuynh +--- + .../mmngr/mmngr-module/files/mmngr/include/mmngr_private.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private.h b/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private.h +index 2d012b2..d59d8b4 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private.h ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private.h +@@ -205,7 +205,7 @@ static void mm_exit(void); + static int validate_memory_map(void); + + #ifdef MMNGR_SALVATORX +-#define MM_OMXBUF_SIZE (256 * 1024 * 1024) ++#define MM_OMXBUF_SIZE (128 * 1024 * 1024) + #endif /* MMNGR_SALVATORX */ + + #ifdef MMNGR_EBISU +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0002-Fix-ioctl-MM_IOC_VTOP-hang-up.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0002-Fix-ioctl-MM_IOC_VTOP-hang-up.patch new file mode 100644 index 0000000000000000000000000000000000000000..e60f1f086de0cc4dbc2a4d332413bd306ceb4ded --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0002-Fix-ioctl-MM_IOC_VTOP-hang-up.patch @@ -0,0 +1,46 @@ +From fd7ed33d111b2995f6a89dda34e865f193eb3359 Mon Sep 17 00:00:00 2001 +From: hienhuynh +Date: Tue, 8 Mar 2022 14:16:23 +0700 +Subject: [PATCH 2/3] Fix-ioctl-MM_IOC_VTOP-hang-up + +Signed-off-by: hienhuynh +--- + mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +index ec78a71..0ad8df1 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +@@ -871,7 +871,7 @@ static int mm_ioc_share(int __user *in, struct MM_PARAM *out) + } + + /* change virtual address to physical address */ +-static void mm_cnv_addr(int __user *out) ++static void mm_cnv_addr(void *out) + { + struct vm_area_struct *vma; + struct mm_struct *mm = current->mm; +@@ -965,6 +965,7 @@ static long ioctl(struct file *file, unsigned int cmd, unsigned long arg) + struct MM_PARAM *p = file->private_data; + struct MM_CACHE_PARAM *cachep; + struct device *mm_dev; ++ struct MM_PARAM temp[2]; + + mm_dev = mm_drvdata->mm_dev; + +@@ -1026,7 +1027,10 @@ static long ioctl(struct file *file, unsigned int cmd, unsigned long arg) + cachep->len, DMA_TO_DEVICE); + break; + case MM_IOC_VTOP: /* change virtual address to physical address */ +- mm_cnv_addr((int __user *)arg); ++ copy_from_user(&temp, (const void __user *)arg, ++ 2 * sizeof(struct MM_PARAM)); ++ mm_cnv_addr(&temp); ++ copy_to_user((void*)arg, &temp, 2 * sizeof(struct MM_PARAM)); + break; + default: + pr_err("%s MMD CMD EFAULT\n", __func__); +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0002-mmngr_drv-mmngr-Add-checking-NULL-vma-in-mm_cnv_addr.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0002-mmngr_drv-mmngr-Add-checking-NULL-vma-in-mm_cnv_addr.patch new file mode 100644 index 0000000000000000000000000000000000000000..6449974a9e93632eabe9115e77b459c1684f71b8 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0002-mmngr_drv-mmngr-Add-checking-NULL-vma-in-mm_cnv_addr.patch @@ -0,0 +1,30 @@ +From d76abd5897dbc0691dbbc535e5de5bbdb6e9acd6 Mon Sep 17 00:00:00 2001 +From: hienhuynh +Date: Tue, 8 Mar 2022 14:03:22 +0700 +Subject: [PATCH 02/11] mmngr_drv: mmngr: Add checking NULL vma in mm_cnv_addr + +When vma return NULL, follow_pfn will make kernel dump. +Add checking NULL to prevent it. + +Signed-off-by: Huynh Thanh Hung +Signed-off-by: hienhuynh +--- + mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +index db4324c..0889f26 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +@@ -849,6 +849,8 @@ static void mm_cnv_addr(int __user *out) + + for (lp = 0; lp < 2; lp++) { + vma = find_vma(mm, tmp[lp].user_virt_addr); ++ if(!vma) ++ continue; + start = tmp[lp].user_virt_addr & PAGE_MASK; + follow_pfn(vma, start, &pfn); + tmp[lp].hard_addr = pfn << PAGE_SHIFT; +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0003-mmngr-Get-start-address-of-MMP-area-from-DT.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0003-mmngr-Get-start-address-of-MMP-area-from-DT.patch new file mode 100644 index 0000000000000000000000000000000000000000..18035e0234156f7194f1f669427f575880ad045b --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0003-mmngr-Get-start-address-of-MMP-area-from-DT.patch @@ -0,0 +1,139 @@ +From 1cfa636aafd0d7167d5ee876a0ae4f8e535d6589 Mon Sep 17 00:00:00 2001 +From: hienhuynh +Date: Tue, 8 Mar 2022 14:10:07 +0700 +Subject: [PATCH 03/11] mmngr: Get start address of MMP area from DT + +Instead of hardcode, we will get start address of MMP area from DT +for flexible usage. It also check the MMP area if inside legacy area of +memory slot when we won't use IPMMU. + +Signed-off-by: Huynh Thanh Hung +Signed-off-by: hienhuynh +--- + .../mmngr-module/files/mmngr/drv/mmngr_drv.c | 54 ++++++++++++++++++- + .../files/mmngr/include/mmngr_private.h | 12 ----- + 2 files changed, 52 insertions(+), 14 deletions(-) + +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +index 0889f26..107a90c 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +@@ -95,7 +95,10 @@ static bool have_lossy_entries; + #ifdef MMNGR_SSP_ENABLE + static bool is_sspbuf_valid; + #endif +-#ifdef IPMMU_MMU_SUPPORT ++#ifndef IPMMU_MMU_SUPPORT ++static u64 legacy_memory_addr; ++static u64 legacy_memory_size; ++#else + static bool ipmmu_common_init_done; + static bool is_mmu_tlb_disabled; + static u64 ipmmu_addr_section_0; +@@ -1141,6 +1144,19 @@ static int validate_memory_map(void) + const char *buf_name; + #endif + ++#ifndef IPMMU_MMU_SUPPORT ++ if ((mm_kernel_reserve_addr + mm_kernel_reserve_size) > ++ (legacy_memory_addr + legacy_memory_size)) { ++ pr_warn("The kernel reserved area (0x%09lx - 0x%09lx) is out of "\ ++ "the legacy area of memory (0x%09lx - 0x%09lx) \n", ++ mm_kernel_reserve_addr, ++ mm_kernel_reserve_addr + mm_kernel_reserve_size, ++ legacy_memory_addr, ++ legacy_memory_addr + legacy_memory_size); ++ return -1; ++ } ++#endif ++ + if (mm_kernel_reserve_size < MM_OMXBUF_SIZE) { + pr_warn("The size (0x%x) of OMXBUF is over "\ + "the kernel reserved size (0x%llx) for Multimedia.\n", +@@ -1215,6 +1231,32 @@ static int _parse_reserved_mem_dt(struct device_node *np, + return ret; + } + ++#ifndef IPMMU_MMU_SUPPORT ++static int parse_legacy_memory_node(struct device_node *np) ++{ ++ int ret = -1; ++ u64 memory_addr; ++ u64 memory_size; ++ struct device_node *node = NULL; ++ ++ for_each_child_of_node(np, node) { ++ if(of_property_match_string(node, "device_type", "memory") >= 0){ ++ __be32 *regaddr_p = NULL; ++ regaddr_p = of_get_address(node, 0, &memory_size, NULL); ++ if (regaddr_p) ++ memory_addr = of_translate_address(node, regaddr_p); ++ if ( memory_size && ((memory_addr & 0xF00000000) == 0x0)) { ++ legacy_memory_addr = memory_addr; ++ legacy_memory_size = memory_size; ++ ret = 0; ++ break; ++ } ++ } ++ } ++ return ret; ++} ++#endif ++ + static int parse_reserved_mem_dt(struct device_node *np) + { + int ret = 0; +@@ -1705,6 +1747,14 @@ static int mm_probe(struct platform_device *pdev) + struct device_node *np = dev->of_node; + unsigned long mm_omxbuf_size; + ++#ifndef IPMMU_MMU_SUPPORT ++ ret = parse_legacy_memory_node(np->parent); ++ if (ret) { ++ pr_err("%s MMD ERROR\n", __func__); ++ return -1; ++ } ++#endif ++ + ret = parse_reserved_mem_dt(np); + if (ret) { + pr_err("%s MMD ERROR\n", __func__); +@@ -1722,7 +1772,7 @@ static int mm_probe(struct platform_device *pdev) + #else + mm_omxbuf_size = mm_kernel_reserve_size - MM_SSPBUF_SIZE; + #endif +- ret = alloc_bm(&bm, MM_OMXBUF_ADDR, mm_omxbuf_size, MM_CO_ORDER); ++ ret = alloc_bm(&bm, mm_kernel_reserve_addr, mm_omxbuf_size, MM_CO_ORDER); + if (ret) { + pr_err("%s MMD ERROR\n", __func__); + return -1; +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private.h b/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private.h +index ba1f0d1..56ab1f6 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private.h ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private.h +@@ -205,22 +205,10 @@ static void mm_exit(void); + static int validate_memory_map(void); + + #ifdef MMNGR_SALVATORX +-#ifdef IPMMU_MMU_SUPPORT +- #define MM_OMXBUF_ADDR (mm_kernel_reserve_addr) +-#else +- #define MM_OMXBUF_ADDR (0x70000000UL) +-#endif /* IPMMU_MMU_SUPPORT */ +- + #define MM_OMXBUF_SIZE (256 * 1024 * 1024) + #endif /* MMNGR_SALVATORX */ + + #ifdef MMNGR_EBISU +-#ifdef IPMMU_MMU_SUPPORT +- #define MM_OMXBUF_ADDR (mm_kernel_reserve_addr) +-#else +- #define MM_OMXBUF_ADDR (0x68000000UL) +-#endif /* IPMMU_MMU_SUPPORT */ +- + #define MM_OMXBUF_SIZE (64 * 1024 * 1024) + #endif /* MMNGR_EBISU */ + +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0003-mmngr_drv-mmngr-module-drv-Update-physical-convert-f.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0003-mmngr_drv-mmngr-module-drv-Update-physical-convert-f.patch new file mode 100644 index 0000000000000000000000000000000000000000..f836c86d9ae149a709c13d7a8c0498532b6cd61a --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0003-mmngr_drv-mmngr-module-drv-Update-physical-convert-f.patch @@ -0,0 +1,81 @@ +From 775604e0e2df1dc713b527cfd5557c9b56e50824 Mon Sep 17 00:00:00 2001 +From: hienhuynh +Date: Tue, 8 Mar 2022 14:45:47 +0700 +Subject: [PATCH 3/3] mmngr_drv: mmngr-module: drv: Update physical convert + func + +Reduce parameter of physical convert fuction + +Signed-off-by: Triet Nguyen +Signed-off-by: hienhuynh +--- + .../mmngr-module/files/mmngr/drv/mmngr_drv.c | 32 +++++++++---------- + 1 file changed, 16 insertions(+), 16 deletions(-) + +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +index 0ad8df1..346f272 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +@@ -871,23 +871,21 @@ static int mm_ioc_share(int __user *in, struct MM_PARAM *out) + } + + /* change virtual address to physical address */ +-static void mm_cnv_addr(void *out) ++static void mm_cnv_addr(struct MM_PARAM *tmp) + { + struct vm_area_struct *vma; + struct mm_struct *mm = current->mm; +- struct MM_PARAM *tmp = (struct MM_PARAM *)out; + unsigned long start; + unsigned long pfn; + int lp = 0; ++ int ret = 0; + +- for (lp = 0; lp < 2; lp++) { +- vma = find_vma(mm, tmp[lp].user_virt_addr); +- if(!vma) +- continue; +- start = tmp[lp].user_virt_addr & PAGE_MASK; +- follow_pfn(vma, start, &pfn); +- tmp[lp].hard_addr = pfn << PAGE_SHIFT; +- } ++ vma = find_vma(mm, tmp->user_virt_addr); ++ start = tmp->user_virt_addr & PAGE_MASK; ++ ret = follow_pfn(vma, start, &pfn); ++ if(ret != 0) ++ pr_warn("Could not convert virt[%p] addr", tmp->user_virt_addr); ++ tmp->hard_addr = pfn << PAGE_SHIFT; + + return; + } +@@ -965,7 +963,6 @@ static long ioctl(struct file *file, unsigned int cmd, unsigned long arg) + struct MM_PARAM *p = file->private_data; + struct MM_CACHE_PARAM *cachep; + struct device *mm_dev; +- struct MM_PARAM temp[2]; + + mm_dev = mm_drvdata->mm_dev; + +@@ -1027,11 +1024,14 @@ static long ioctl(struct file *file, unsigned int cmd, unsigned long arg) + cachep->len, DMA_TO_DEVICE); + break; + case MM_IOC_VTOP: /* change virtual address to physical address */ +- copy_from_user(&temp, (const void __user *)arg, +- 2 * sizeof(struct MM_PARAM)); +- mm_cnv_addr(&temp); +- copy_to_user((void*)arg, &temp, 2 * sizeof(struct MM_PARAM)); +- break; ++ { ++ struct MM_PARAM temp; ++ ++ mm_ioc_set((int __user *) arg, &temp); ++ mm_cnv_addr(&temp); ++ mm_ioc_get(&temp, (int __user *)arg); ++ break; ++ } + default: + pr_err("%s MMD CMD EFAULT\n", __func__); + ret = -EFAULT; +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0004-Do-not-parse-and-init-lossy-mem-area-for-RZ-G2L-Seri.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0004-Do-not-parse-and-init-lossy-mem-area-for-RZ-G2L-Seri.patch new file mode 100644 index 0000000000000000000000000000000000000000..f36e2f80b998a6ea8914d00ea2e6fc85387c8f5c --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0004-Do-not-parse-and-init-lossy-mem-area-for-RZ-G2L-Seri.patch @@ -0,0 +1,79 @@ +From fef3f5d6d1d40d99e0e172b352f71e0f01658156 Mon Sep 17 00:00:00 2001 +From: hienhuynh +Date: Tue, 8 Mar 2022 14:38:38 +0700 +Subject: [PATCH 04/11] Do not parse and init lossy mem area for RZ/G2L Series + +RZ/G2L Series do not support lossy mem area. +So this commit is created to let mmngr not parse and init +lossy mem area for RZ/G2L Series (RZ/G2{L/LC/UL}). + +Signed-off-by: hienhuynh +--- + .../mmngr-module/files/mmngr/drv/mmngr_drv.c | 37 ++++++++++++------- + 1 file changed, 24 insertions(+), 13 deletions(-) + +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +index 107a90c..5a562c0 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +@@ -1257,6 +1257,12 @@ static int parse_legacy_memory_node(struct device_node *np) + } + #endif + ++static const struct soc_device_attribute rzg2l_match[] = { ++ { .family = "RZ/G2L" }, ++ { .family = "RZ/G2UL" }, ++ { /* sentinel*/ } ++}; ++ + static int parse_reserved_mem_dt(struct device_node *np) + { + int ret = 0; +@@ -1271,15 +1277,18 @@ static int parse_reserved_mem_dt(struct device_node *np) + "(linux,multimedia) from DT\n"); + return ret; + } +- /* Parse reserved memory for lossy compression feature */ +- ret = _parse_reserved_mem_dt(np, "memory-region", +- "linux,lossy_decompress", +- &mm_lossybuf_addr, +- &mm_lossybuf_size); +- if (ret) { +- pr_warn("Failed to parse Lossy reserved area" \ +- "(linux,lossy_decompress) from DT\n"); +- ret = 0; /* Let MMNGR support other features */ ++ ++ if (!soc_device_match(rzg2l_match)) { ++ /* Parse reserved memory for lossy compression feature */ ++ ret = _parse_reserved_mem_dt(np, "memory-region", ++ "linux,lossy_decompress", ++ &mm_lossybuf_addr, ++ &mm_lossybuf_size); ++ if (ret) { ++ pr_warn("Failed to parse Lossy reserved area" \ ++ "(linux,lossy_decompress) from DT\n"); ++ ret = 0; /* Let MMNGR support other features */ ++ } + } + return ret; + } +@@ -1789,10 +1798,12 @@ static int mm_probe(struct platform_device *pdev) + } + #endif + +- ret = init_lossy_info(); +- if (ret) { +- pr_err("MMD mm_init ERROR\n"); +- return -1; ++ if (!soc_device_match(rzg2l_match)) { ++ ret = init_lossy_info(); ++ if (ret) { ++ pr_err("MMD mm_init ERROR\n"); ++ return -1; ++ } + } + + p = kzalloc(sizeof(struct MM_DRVDATA), GFP_KERNEL); +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0005-mmngr-module-mmngr_drv-add-support-IPMMU-for-RZG2M.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0005-mmngr-module-mmngr_drv-add-support-IPMMU-for-RZG2M.patch new file mode 100644 index 0000000000000000000000000000000000000000..2c812a78ffd5edb1f48ccb1ca06220aa1a0f70c5 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0005-mmngr-module-mmngr_drv-add-support-IPMMU-for-RZG2M.patch @@ -0,0 +1,71 @@ +From 580b6b41e5ee8ec80851472276fd13a43157ce7d Mon Sep 17 00:00:00 2001 +From: hienhuynh +Date: Tue, 8 Mar 2022 14:51:01 +0700 +Subject: [PATCH 05/11] mmngr-module: mmngr_drv: add support IPMMU for RZG2M + +This commit add support IPMMU for r8a774a1 (RZG2M) to support +40bits address for MMP CMA. Below points are added: +- Reuse code from r8a7796 since these two SoCs are similar. +- Set dma_coherent_mask to 40bits when IPMMU enabled + +Signed-off-by: Binh Nguyen +Signed-off-by: hienhuynh +--- + .../mmngr-module/files/mmngr/drv/mmngr_drv.c | 20 ++++++++++++++++++- + 1 file changed, 19 insertions(+), 1 deletion(-) + +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +index 5a562c0..288e61f 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +@@ -195,6 +195,12 @@ static const struct soc_device_attribute r8a77990es1[] = { + {} + }; + ++/* G2M */ ++static const struct soc_device_attribute r8a774a1[] = { ++ { .soc_id = "r8a774a1" }, ++ {} ++}; ++ + /* For IPMMU Main Memory (IPMMUMM) */ + static struct hw_register ipmmumm_ip_regs[] = { + {"IMCTR", IMCTRn_OFFSET(CUR_TTSEL)}, +@@ -1626,7 +1632,7 @@ static int ipmmu_probe(struct platform_device *pdev) + else + is_mmu_tlb_disabled = false; + +- if (soc_device_match(r8a7796)) ++ if (soc_device_match(r8a7796) || soc_device_match(r8a774a1)) + ipmmu_mmu_trans_table = m3_mmu_table; + else if (soc_device_match(r8a77965)) + ipmmu_mmu_trans_table = m3n_mmu_table; +@@ -1687,6 +1693,10 @@ static const struct of_device_id ipmmu_of_match[] = { + .compatible = "renesas,ipmmu-mmu-r8a77990", + .data = &r8a77990_ipmmu_data + }, ++ { ++ .compatible = "renesas,ipmmu-mmu-r8a774a1", ++ .data = &r8a7796_ipmmu_data ++ }, + { }, + }; + +@@ -1829,6 +1839,14 @@ static int mm_probe(struct platform_device *pdev) + p->mm_dev_reserve = dev; + of_reserved_mem_device_init(p->mm_dev_reserve); + ++#ifdef IPMMU_MMU_SUPPORT ++ ret = dma_set_coherent_mask(p->mm_dev_reserve, DMA_BIT_MASK(40)); ++ if (ret) { ++ pr_err("MMD dma_set_coherent_mask ERROR\n"); ++ return -1; ++ }$ ++#endif ++ + pkernel_virt_addr = dma_alloc_coherent(p->mm_dev_reserve, + mm_kernel_reserve_size, + (dma_addr_t *)&phy_addr, +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0006-mmngr-module-mmngr_drv-add-support-IPMMU-for-RZG2N.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0006-mmngr-module-mmngr_drv-add-support-IPMMU-for-RZG2N.patch new file mode 100644 index 0000000000000000000000000000000000000000..772c1c48afc640717b89389eb144c49adec989d3 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0006-mmngr-module-mmngr_drv-add-support-IPMMU-for-RZG2N.patch @@ -0,0 +1,54 @@ +From 84664b23e73e64a8b578c7bd170eb3ae12f000f9 Mon Sep 17 00:00:00 2001 +From: hienhuynh +Date: Tue, 8 Mar 2022 14:52:57 +0700 +Subject: [PATCH 06/11] mmngr-module: mmngr_drv: add support IPMMU for RZG2N + +This commit add support IPMMU for r8a774b1 (RZG2N) to support +Reuse code from r8a77965 since these two SoCs are similar. + +Signed-off-by: Binh Nguyen +Signed-off-by: hienhuynh +--- + .../mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c | 12 +++++++++++- + 1 file changed, 11 insertions(+), 1 deletion(-) + +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +index 288e61f..0a94265 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +@@ -201,6 +201,12 @@ static const struct soc_device_attribute r8a774a1[] = { + {} + }; + ++/* G2N */ ++static const struct soc_device_attribute r8a774b1[] = { ++ { .soc_id = "r8a774b1" }, ++ {} ++}; ++ + /* For IPMMU Main Memory (IPMMUMM) */ + static struct hw_register ipmmumm_ip_regs[] = { + {"IMCTR", IMCTRn_OFFSET(CUR_TTSEL)}, +@@ -1634,7 +1640,7 @@ static int ipmmu_probe(struct platform_device *pdev) + + if (soc_device_match(r8a7796) || soc_device_match(r8a774a1)) + ipmmu_mmu_trans_table = m3_mmu_table; +- else if (soc_device_match(r8a77965)) ++ else if (soc_device_match(r8a77965) || soc_device_match(r8a774b1)) + ipmmu_mmu_trans_table = m3n_mmu_table; + else if (soc_device_match(r8a77990)) + ipmmu_mmu_trans_table = e3_mmu_table; +@@ -1697,6 +1703,10 @@ static const struct of_device_id ipmmu_of_match[] = { + .compatible = "renesas,ipmmu-mmu-r8a774a1", + .data = &r8a7796_ipmmu_data + }, ++ { ++ .compatible = "renesas,ipmmu-mmu-r8a774b1", ++ .data = &r8a77965_ipmmu_data ++ }, + { }, + }; + +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0007-mmngr-module-mmngr_drv-add-support-IPMMU-for-RZG2E.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0007-mmngr-module-mmngr_drv-add-support-IPMMU-for-RZG2E.patch new file mode 100644 index 0000000000000000000000000000000000000000..7b65b283df53edba0b65c5f325d14984d4c85a81 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0007-mmngr-module-mmngr_drv-add-support-IPMMU-for-RZG2E.patch @@ -0,0 +1,63 @@ +From d35abbdd89fa03d80f844739b3bb721c2c8cc688 Mon Sep 17 00:00:00 2001 +From: hienhuynh +Date: Tue, 8 Mar 2022 14:54:46 +0700 +Subject: [PATCH 07/11] mmngr-module: mmngr_drv: add support IPMMU for RZG2E + +This commit add support IPMMU for r8a774c0 (RZG2E) to support +Reuse code from r8a77990 since these two SoCs are similar. + +Signed-off-by: Binh Nguyen +Signed-off-by: hienhuynh +--- + .../mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +index 0a94265..fe1294c 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +@@ -207,6 +207,12 @@ static const struct soc_device_attribute r8a774b1[] = { + {} + }; + ++/* G2E */ ++static const struct soc_device_attribute r8a774c0[] = { ++ { .soc_id = "r8a774c0" }, ++ {} ++}; ++ + /* For IPMMU Main Memory (IPMMUMM) */ + static struct hw_register ipmmumm_ip_regs[] = { + {"IMCTR", IMCTRn_OFFSET(CUR_TTSEL)}, +@@ -1642,7 +1648,7 @@ static int ipmmu_probe(struct platform_device *pdev) + ipmmu_mmu_trans_table = m3_mmu_table; + else if (soc_device_match(r8a77965) || soc_device_match(r8a774b1)) + ipmmu_mmu_trans_table = m3n_mmu_table; +- else if (soc_device_match(r8a77990)) ++ else if (soc_device_match(r8a77990) || soc_device_match(r8a774c0)) + ipmmu_mmu_trans_table = e3_mmu_table; + else /* H3 */ + ipmmu_mmu_trans_table = h3_mmu_table; +@@ -1707,6 +1713,10 @@ static const struct of_device_id ipmmu_of_match[] = { + .compatible = "renesas,ipmmu-mmu-r8a774b1", + .data = &r8a77965_ipmmu_data + }, ++ { ++ .compatible = "renesas,ipmmu-mmu-r8a774c0", ++ .data = &r8a77990_ipmmu_data ++ }, + { }, + }; + +@@ -1854,7 +1864,7 @@ static int mm_probe(struct platform_device *pdev) + if (ret) { + pr_err("MMD dma_set_coherent_mask ERROR\n"); + return -1; +- }$ ++ } + #endif + + pkernel_virt_addr = dma_alloc_coherent(p->mm_dev_reserve, +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0008-mmngr-module-mmngr_drv-add-support-IPMMU-for-RZ-G2H.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0008-mmngr-module-mmngr_drv-add-support-IPMMU-for-RZ-G2H.patch new file mode 100644 index 0000000000000000000000000000000000000000..1ca2fa30492c3248127a6ecd9ab599f49ddb6bf6 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0008-mmngr-module-mmngr_drv-add-support-IPMMU-for-RZ-G2H.patch @@ -0,0 +1,54 @@ +From 534cdb8230982053d235268b665a24920f9c577c Mon Sep 17 00:00:00 2001 +From: hienhuynh +Date: Tue, 8 Mar 2022 14:57:43 +0700 +Subject: [PATCH 08/11] mmngr-module: mmngr_drv: add support IPMMU for RZ/G2H + +This commit add support IPMMU for r8a774e1 (RZ/G2H) to support +40bits address for MMP CMA. +Reuse code from r8a7795 since these two SoCs are similar. + +Signed-off-by: hienhuynh +--- + .../mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c | 12 +++++++++++- + 1 file changed, 11 insertions(+), 1 deletion(-) + +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +index fe1294c..0cedeb4 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +@@ -213,6 +213,12 @@ static const struct soc_device_attribute r8a774c0[] = { + {} + }; + ++/* G2H */ ++static const struct soc_device_attribute r8a774e1[] = { ++ { .soc_id = "r8a774e1" }, ++ {} ++}; ++ + /* For IPMMU Main Memory (IPMMUMM) */ + static struct hw_register ipmmumm_ip_regs[] = { + {"IMCTR", IMCTRn_OFFSET(CUR_TTSEL)}, +@@ -1650,7 +1656,7 @@ static int ipmmu_probe(struct platform_device *pdev) + ipmmu_mmu_trans_table = m3n_mmu_table; + else if (soc_device_match(r8a77990) || soc_device_match(r8a774c0)) + ipmmu_mmu_trans_table = e3_mmu_table; +- else /* H3 */ ++ else /* H3 or RZ/G2H */ + ipmmu_mmu_trans_table = h3_mmu_table; + + ipmmu_addr_section_0 = ipmmu_mmu_trans_table[0]; +@@ -1717,6 +1723,10 @@ static const struct of_device_id ipmmu_of_match[] = { + .compatible = "renesas,ipmmu-mmu-r8a774c0", + .data = &r8a77990_ipmmu_data + }, ++ { ++ .compatible = "renesas,ipmmu-mmu-r8a774e1", ++ .data = &r8a7795_ipmmu_data ++ }, + { }, + }; + +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0009-mmngr_drv-mmngr-Add-IPMMU-support-for-RZ-G2M-v3.0.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0009-mmngr_drv-mmngr-Add-IPMMU-support-for-RZ-G2M-v3.0.patch new file mode 100644 index 0000000000000000000000000000000000000000..ff810dae7e0a7c7f55dcba55b38aa65c39b25b66 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0009-mmngr_drv-mmngr-Add-IPMMU-support-for-RZ-G2M-v3.0.patch @@ -0,0 +1,71 @@ +From f376b6de2783e3104cee2798238c2183a31bca4b Mon Sep 17 00:00:00 2001 +From: hienhuynh +Date: Tue, 8 Mar 2022 15:00:39 +0700 +Subject: [PATCH 09/11] mmngr_drv: mmngr: Add IPMMU support for RZ/G2M v3.0 + +This patch does some following things: +- Add support for RZ/G2M v3.0 based on RCar M3 Ver3.0. +- Correct support for RZ/G2M v1.3 based on RCar M3 Ver1.x + +Signed-off-by: hienhuynh +--- + .../mmngr-module/files/mmngr/drv/mmngr_drv.c | 17 ++++++++++++++--- + 1 file changed, 14 insertions(+), 3 deletions(-) + +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +index 0cedeb4..777755f 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +@@ -195,12 +195,18 @@ static const struct soc_device_attribute r8a77990es1[] = { + {} + }; + +-/* G2M */ ++/* G2M v1.3 */ + static const struct soc_device_attribute r8a774a1[] = { + { .soc_id = "r8a774a1" }, + {} + }; + ++/* G2M v3.0 */ ++static const struct soc_device_attribute r8a774a3[] = { ++ { .soc_id = "r8a774a3" }, ++ {} ++}; ++ + /* G2N */ + static const struct soc_device_attribute r8a774b1[] = { + { .soc_id = "r8a774b1" }, +@@ -1638,7 +1644,7 @@ static int ipmmu_probe(struct platform_device *pdev) + + if (soc_device_match(r8a7795es1)) + rcar_gen3_ipmmu = r8a7795es1_ipmmu; +- else if (soc_device_match(r8a7796es1)) ++ else if (soc_device_match(r8a7796es1) || soc_device_match(r8a774a1)) + rcar_gen3_ipmmu = r8a7796es1_ipmmu; + else + rcar_gen3_ipmmu = data->ipmmu_data; +@@ -1650,7 +1656,8 @@ static int ipmmu_probe(struct platform_device *pdev) + else + is_mmu_tlb_disabled = false; + +- if (soc_device_match(r8a7796) || soc_device_match(r8a774a1)) ++ if (soc_device_match(r8a7796) || soc_device_match(r8a774a1) || ++ soc_device_match(r8a774a3)) + ipmmu_mmu_trans_table = m3_mmu_table; + else if (soc_device_match(r8a77965) || soc_device_match(r8a774b1)) + ipmmu_mmu_trans_table = m3n_mmu_table; +@@ -1715,6 +1722,10 @@ static const struct of_device_id ipmmu_of_match[] = { + .compatible = "renesas,ipmmu-mmu-r8a774a1", + .data = &r8a7796_ipmmu_data + }, ++ { ++ .compatible = "renesas,ipmmu-mmu-r8a774a3", ++ .data = &r8a7796_ipmmu_data ++ }, + { + .compatible = "renesas,ipmmu-mmu-r8a774b1", + .data = &r8a77965_ipmmu_data +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0010-mmngr_drv-mmngr-Update-PA-VA-mapping-table-for-HiHop.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0010-mmngr_drv-mmngr-Update-PA-VA-mapping-table-for-HiHop.patch new file mode 100644 index 0000000000000000000000000000000000000000..2e0cd1c2a187d1324ffde0023e812122ad9cd28c --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0010-mmngr_drv-mmngr-Update-PA-VA-mapping-table-for-HiHop.patch @@ -0,0 +1,39 @@ +From e0a88b762bfefc6266c612b8a446eca3ab2fb48f Mon Sep 17 00:00:00 2001 +From: hienhuynh +Date: Tue, 8 Mar 2022 15:01:38 +0700 +Subject: [PATCH 10/11] mmngr_drv: mmngr: Update PA-VA mapping table for HiHope + RZ/G2N + +HiHope board with RZ/G2N have 4 GB SDRAM for LPDDR4-CH0. +This commit assign 3rd and 4th PA-VA mapping table entry +for not-shadowed 2 GB part of 4 GB. + + - 3rd entry: 0x4_8000_0000 to 0x4_BFFF_FFFF + - 4th entry: 0x4_C000_0000 to 0x4_FFFF_FFFF + +Signed-off-by: Yu KANECHIKA +Signed-off-by: hienhuynh +--- + .../mmngr/mmngr-module/files/mmngr/include/mmngr_private.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private.h b/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private.h +index 56ab1f6..b2c0af6 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private.h ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private.h +@@ -307,10 +307,10 @@ static int validate_memory_map(void); + #define M3_IPMMU_ADDR_SECTION_2 0x0080000000ULL + #define M3_IPMMU_ADDR_SECTION_3 0x0600000000ULL + /* Table entries for M3N */ +-#define M3N_IPMMU_ADDR_SECTION_0 0x0 ++#define M3N_IPMMU_ADDR_SECTION_0 0x04C0000000ULL + #define M3N_IPMMU_ADDR_SECTION_1 0x0040000000ULL + #define M3N_IPMMU_ADDR_SECTION_2 0x0080000000ULL +-#define M3N_IPMMU_ADDR_SECTION_3 0x0 ++#define M3N_IPMMU_ADDR_SECTION_3 0x0480000000ULL + /* Table entries for E3 */ + #define E3_IPMMU_ADDR_SECTION_0 0x0 + #define E3_IPMMU_ADDR_SECTION_1 0x0040000000ULL +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0011-mmngr-change-address-setting-for-H3N-Swap-mode.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0011-mmngr-change-address-setting-for-H3N-Swap-mode.patch new file mode 100644 index 0000000000000000000000000000000000000000..f2a9332bcd83a66d93ecdfeca5e548ff5ec6b234 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0011-mmngr-change-address-setting-for-H3N-Swap-mode.patch @@ -0,0 +1,51 @@ +From 5bf132ed13d40af6fbd545f285c21667412404b0 Mon Sep 17 00:00:00 2001 +From: hienhuynh +Date: Tue, 8 Mar 2022 15:03:49 +0700 +Subject: [PATCH 11/11] mmngr: change address setting for H3N Swap mode + +Change address setting for H3N Swap mode as it is the only +support mode for now. + +Signed-off-by: Binh Nguyen +Signed-off-by: hienhuynh +--- + mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c | 2 +- + .../mmngr-module/files/mmngr/include/mmngr_private.h | 8 ++++---- + 2 files changed, 5 insertions(+), 5 deletions(-) + +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +index 777755f..ec78a71 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +@@ -108,7 +108,7 @@ static u64 ipmmu_addr_section_3; + static phys_addr_t *ipmmu_mmu_trans_table; + static pgdval_t *ipmmu_mmu_pgd; + +-/* Translation table for all IPMMU in R-Car H3 */ ++/* Translation table for all IPMMU in R-Car H3N - Swap mode */ + static phys_addr_t h3_mmu_table[4] = { + H3_IPMMU_ADDR_SECTION_0, + H3_IPMMU_ADDR_SECTION_1, +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private.h b/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private.h +index b2c0af6..2d012b2 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private.h ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/include/mmngr_private.h +@@ -296,11 +296,11 @@ static int validate_memory_map(void); + #define BLOCK_ENTRY_CONFIG (0x721 | BIT(2)) + #define IPMMU_BLOCK_PGDVAL(phys_addr) ((phys_addr) | BLOCK_ENTRY_CONFIG) + +-/* Table entries for H3 */ +-#define H3_IPMMU_ADDR_SECTION_0 0x0700000000ULL ++/* Table entries for H3N - Swap mode */ ++#define H3_IPMMU_ADDR_SECTION_0 0x0540000000ULL + #define H3_IPMMU_ADDR_SECTION_1 0x0040000000ULL +-#define H3_IPMMU_ADDR_SECTION_2 0x0500000000ULL +-#define H3_IPMMU_ADDR_SECTION_3 0x0600000000ULL ++#define H3_IPMMU_ADDR_SECTION_2 0x0080000000ULL ++#define H3_IPMMU_ADDR_SECTION_3 0x0500000000ULL + /* Table entries for M3 */ + #define M3_IPMMU_ADDR_SECTION_0 0x0640000000ULL + #define M3_IPMMU_ADDR_SECTION_1 0x0040000000ULL +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0012-Add-RZ-V2L-into-rzg2l_match-to-not-parse-and-init-lo.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0012-Add-RZ-V2L-into-rzg2l_match-to-not-parse-and-init-lo.patch new file mode 100644 index 0000000000000000000000000000000000000000..83d069fd4b7c91c1cda31784701ac2752b4097da --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngr/0012-Add-RZ-V2L-into-rzg2l_match-to-not-parse-and-init-lo.patch @@ -0,0 +1,30 @@ +From 487f0ef2d2bd90e6472c7e739cd9d67fa5a8ea09 Mon Sep 17 00:00:00 2001 +From: hienhuynh +Date: Thu, 14 Apr 2022 17:15:05 +0700 +Subject: [PATCH] Add RZ/V2L into rzg2l_match to not parse and init lossy mem + area + +RZ/V2L is same as RZ/G2L that it do not have lossy mem area. +So this commit is created to add RZ/V2L into rzg2l_match to not parse +and init lossy mem area. + +Signed-off-by: hienhuynh +--- + mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +index ec78a71..4488837 100644 +--- a/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c ++++ b/mmngr_drv/mmngr/mmngr-module/files/mmngr/drv/mmngr_drv.c +@@ -1290,6 +1290,7 @@ static int parse_legacy_memory_node(struct device_node *np) + static const struct soc_device_attribute rzg2l_match[] = { + { .family = "RZ/G2L" }, + { .family = "RZ/G2UL" }, ++ { .family = "RZ/V2L" }, + { /* sentinel*/ } + }; + +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngrbuf.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngrbuf.bb new file mode 100644 index 0000000000000000000000000000000000000000..57357f63d0297628082fde59d05e54e59d4f209b --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/kernel-module-mmngrbuf.bb @@ -0,0 +1,55 @@ +DESCRIPTION = "Memory Manager Buffer Kernel module for Renesas RZG2" + +require mmngr_drv.inc + +DEPENDS = "linux-myir" +PN = "kernel-module-mmngrbuf" +PR = "r0" + +S = "${WORKDIR}/git" +MMNGRBUF_DRV_DIR = "mmngr_drv/mmngrbuf/mmngrbuf-module/files/mmngrbuf" + +includedir = "${RENESAS_DATADIR}/include" +SSTATE_DUPWHITELIST += "${STAGING_INCDIR}" + +# Build Memory Manager Buffer kernel module without suffix +KERNEL_MODULE_PACKAGE_SUFFIX = "" + +do_compile() { + cd ${S}/${MMNGRBUF_DRV_DIR}/drv + install -d ${INCSHARED} + make all +} + +do_install () { + # Create destination directories + install -d ${D}/lib/modules/${KERNEL_VERSION}/extra/ + install -d ${D}/${includedir} + + # Install shared library to KERNELSRC(STAGING_KERNEL_DIR) for reference from other modules + # This file installed in SDK by kernel-devsrc pkg. + install -m 644 ${S}/${MMNGRBUF_DRV_DIR}/drv/Module.symvers ${KERNELSRC}/include/mmngrbuf.symvers + + # Install kernel module + install -m 644 ${S}/${MMNGRBUF_DRV_DIR}/drv/mmngrbuf.ko ${D}/lib/modules/${KERNEL_VERSION}/extra/ + + # Install shared header files to KERNELSRC(STAGING_KERNEL_DIR) + # This file installed in SDK by kernel-devsrc pkg. + install -m 644 ${S}/${MMNGRBUF_DRV_DIR}/include/mmngr_buf_private.h ${KERNELSRC}/include/ + install -m 644 ${S}/${MMNGRBUF_DRV_DIR}/include/mmngr_buf_private_cmn.h ${KERNELSRC}/include/ + + # Install shared header files to ${includedir} + install -m 644 ${S}/${MMNGRBUF_DRV_DIR}/include/mmngr_buf_private_cmn.h ${D}/${includedir}/ +} + +PACKAGES = "\ + ${PN} \ + ${PN}-dev \ +" + +FILES_${PN} = " \ + /lib/modules/${KERNEL_VERSION}/extra/mmngrbuf.ko \ +" + +RPROVIDES_${PN} += "kernel-module-mmngrbuf" +KERNEL_MODULE_AUTOLOAD = "mmngrbuf" diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/mmngr_drv.inc b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/mmngr_drv.inc new file mode 100644 index 0000000000000000000000000000000000000000..18ce3cd64cd991252a2494a146c46b6e1149eff8 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-mmngr/mmngr_drv.inc @@ -0,0 +1,12 @@ +LICENSE = "GPLv2 & MIT" +LIC_FILES_CHKSUM = " \ + file://GPL-COPYING;md5=b234ee4d69f5fce4486a80fdaf4a4263 \ + file://MIT-COPYING;md5=192063521ce782a445a3c9f99a8ad560 \ +" +inherit module +require include/rzg2-modules-common.inc + +MMNGR_DRV_URI = "git://github.com/renesas-rcar/mmngr_drv.git" + +SRC_URI = "${MMNGR_DRV_URI};branch=rcar_gen3" +SRCREV = "2439802426474136312bd10bc4c143fbf1c84850" diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0001-Add-ISU-driver.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0001-Add-ISU-driver.patch new file mode 100644 index 0000000000000000000000000000000000000000..b345c59904c215d0f26058efb8f780c4bac93aab --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0001-Add-ISU-driver.patch @@ -0,0 +1,2638 @@ +From cc791aaa6252bc3cc3f4d0ea25d5e5ae97dd7a0e Mon Sep 17 00:00:00 2001 +From: Nhat Thieu +Date: Tue, 6 Jul 2021 16:55:10 +0700 +Subject: [PATCH] Add ISU driver + +Signed-off-by: Nhat Thieu +--- + vspm-module/files/vspm/drv/isu/isu_drv.c | 490 ++++++++++++++ + .../files/vspm/drv/isu/isu_drv_local.h | 215 ++++++ + vspm-module/files/vspm/drv/isu/isu_drv_par.c | 433 ++++++++++++ + vspm-module/files/vspm/drv/isu/isu_drv_phy.c | 624 ++++++++++++++++++ + vspm-module/files/vspm/drv/isu_drv_public.h | 100 +++ + .../files/vspm/drv/manager/vspm_drv_isu.c | 357 ++++++++++ + vspm-module/files/vspm/drv/vspm_ip_ctrl.h | 12 +- + vspm-module/files/vspm/include/isu_drv.h | 232 +++++++ + vspm-module/files/vspm/include/vspm_cmn.h | 7 +- + vspm-module/files/vspm/include/vspm_public.h | 3 +- + 10 files changed, 2469 insertions(+), 4 deletions(-) + create mode 100755 vspm-module/files/vspm/drv/isu/isu_drv.c + create mode 100755 vspm-module/files/vspm/drv/isu/isu_drv_local.h + create mode 100755 vspm-module/files/vspm/drv/isu/isu_drv_par.c + create mode 100755 vspm-module/files/vspm/drv/isu/isu_drv_phy.c + create mode 100644 vspm-module/files/vspm/drv/isu_drv_public.h + create mode 100644 vspm-module/files/vspm/drv/manager/vspm_drv_isu.c + create mode 100644 vspm-module/files/vspm/include/isu_drv.h + +diff --git a/vspm-module/files/vspm/drv/isu/isu_drv.c b/vspm-module/files/vspm/drv/isu/isu_drv.c +new file mode 100755 +index 0000000..990cb6f +--- /dev/null ++++ b/vspm-module/files/vspm/drv/isu/isu_drv.c +@@ -0,0 +1,490 @@ ++/*************************************************************************/ /* ++ * ISUM ++ * ++ * Copyright (C) 2015-2021 Renesas Electronics Corporation ++ * ++ * License Dual MIT/GPLv2 ++ * ++ * The contents of this file are subject to the MIT license as set out below. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a copy ++ * of this software and associated documentation files (the "Software"), to deal ++ * in the Software without restriction, including without limitation the rights ++ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell ++ * copies of the Software, and to permit persons to whom the Software is ++ * furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * Alternatively, the contents of this file may be used under the terms of ++ * the GNU General Public License Version 2 ("GPL") in which case the provisions ++ * of GPL are applicable instead of those above. ++ * ++ * If you wish to allow use of your version of this file only under the terms of ++ * GPL, and not to allow others to use your version of this file under the terms ++ * of the MIT license, indicate your decision by deleting the provisions above ++ * and replace them with the notice and other provisions required by GPL as set ++ * out in the file called "GPL-COPYING" included in this distribution. If you do ++ * not delete the provisions above, a recipient may use your version of this ++ * file under the terms of either the MIT license or GPL. ++ * ++ * This License is also included in this distribution in the file called ++ * "MIT-COPYING". ++ * ++ * EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS ++ * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING ++ * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A ++ * PARTICULAR PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS ++ * OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR ++ * IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * ++ * GPLv2: ++ * If you wish to use this file under the terms of GPL, following terms are ++ * effective. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ /*************************************************************************/ ++ ++#include ++ ++#include "vspm_public.h" ++#include "vspm_ip_ctrl.h" ++#include "vspm_main.h" ++ ++#include "isu_drv_public.h" ++#include "isu_drv_local.h" ++ ++static struct isu_prv_data *g_isu_obj[ISU_IP_MAX] = {NULL}; ++ ++/****************************************************************************** ++ * Function: isu_lib_init ++ * Description: Initialize ISU driver ++ * Returns: 0/E_ISU_NO_MEM ++ * return of isu_ins_check_init_parameter() ++ ******************************************************************************/ ++long isu_lib_init(struct isu_init_t *param) ++{ ++ struct isu_prv_data *prv; ++ ++ unsigned int i; ++ ++ long ercd; ++ ++ /* check initialize parameter */ ++ ercd = isu_ins_check_init_parameter(param); ++ if (ercd) ++ return ercd; ++ ++ for (i = 0; i < param->ip_num; i++) { ++ /* allocate memory */ ++ prv = kzalloc(sizeof(struct isu_prv_data), GFP_KERNEL); ++ if (!prv) ++ goto err_exit; ++ ++ /* update status */ ++ prv->ch_info.status = ISU_STAT_INIT; ++ ++ g_isu_obj[i] = prv; ++ } ++ ++ return 0; ++ ++err_exit: ++ for (i = 0; i < param->ip_num; i++) { ++ kfree(g_isu_obj[i]); ++ g_isu_obj[i] = NULL; ++ } ++ ++ return E_ISU_NO_MEM; ++} ++ ++/****************************************************************************** ++ * Function: isu_lib_quit ++ * Description: Finalize ISU driver ++ * Returns: 0 ++ * return of isu_lib_abort() ++ * return of isu_lib_close() ++ ******************************************************************************/ ++long isu_lib_quit(void) ++{ ++ struct isu_prv_data **prv = &g_isu_obj[0]; ++ ++ long ercd; ++ ++ unsigned int i; ++ ++ for (i = 0; i < ISU_IP_MAX; i++) { ++ if (*prv) { ++ /* check condition */ ++ if ((*prv)->ch_info.status == ISU_STAT_RUN) { ++ /* stop ISU processing */ ++ ercd = isu_lib_abort((unsigned char)i); ++ if (ercd) ++ return ercd; ++ } ++ ++ if ((*prv)->ch_info.status == ISU_STAT_READY) { ++ ercd = isu_lib_close((unsigned char)i); ++ if (ercd) ++ return ercd; ++ } ++ ++ /* release memory */ ++ kfree(*prv); ++ *prv = NULL; ++ } ++ prv++; ++ } ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_lib_open ++ * Description: Initialize FDP channel. ++ * Returns: 0/E_ISU_PARA_CH/E_ISU_NO_INIT/E_ISU_INVALID_STATE ++ * return of isu_ins_get_pdata() ++ * return of isu_ins_enable_clock() ++ * return of isu_ins_init_reg() ++ * return of isu_ins_reg_ih() ++ ******************************************************************************/ ++long isu_lib_open(unsigned char ch, struct isu_open_t *param) ++{ ++ struct isu_prv_data *prv; ++ ++ long ercd; ++ ++ /* check open parameter */ ++ ercd = isu_ins_check_open_parameter(param); ++ if (ercd) ++ goto err_exit1; ++ ++ /* check channel parameter */ ++ if (ch >= ISU_IP_MAX) { ++ ercd = E_ISU_PARA_CH; ++ goto err_exit1; ++ } ++ ++ if (!g_isu_obj[ch]) { ++ ercd = E_ISU_NO_INIT; ++ goto err_exit1; ++ } ++ prv = g_isu_obj[ch]; ++ ++ /* check status */ ++ if (prv->ch_info.status != ISU_STAT_INIT){ ++ ercd = E_ISU_INVALID_STATE; ++ goto err_exit1; ++ } ++ ++ prv->pdev = param->pdev; ++ ++ /* set open parameter */ ++ ercd = isu_ins_get_isu_resource(prv); ++ if (ercd) ++ goto err_exit1; ++ ++ /*dh enable clock */ ++ ercd = isu_ins_enable_clock(prv); ++ if (ercd) ++ goto err_exit1; ++ ++ /* initialize register */ ++ ercd = isu_ins_init_reg(prv); ++ if (ercd) ++ goto err_exit2; ++ ++ /* registory interrupt handler */ ++ ercd = isu_ins_reg_ih(prv); ++ if (ercd) ++ goto err_exit3; ++ ++ /* update status */ ++ prv->ch_info.status = ISU_STAT_READY; ++ ++ return 0; ++ ++err_exit3: ++ (void)isu_ins_quit_reg(prv); ++ ++err_exit2: ++ (void)isu_ins_disable_clock(prv); ++ ++err_exit1: ++ return ercd; ++} ++ ++/****************************************************************************** ++ * Function: isu_lib_close ++ * Description: Finalize FDP channel. ++ * Returns: 0/E_ISU_PARA_CH/E_ISU_NO_INIT/E_ISU_INVALID_STATE ++ * return of isu_ins_unreg_ih() ++ * return of isu_ins_quit_reg() ++ * return of isu_ins_disable_clock() ++ ******************************************************************************/ ++long isu_lib_close(unsigned char ch) ++{ ++ struct isu_prv_data *prv; ++ ++ long ercd; ++ ++ /* check channel parameter */ ++ if (ch >= ISU_IP_MAX) ++ return E_ISU_PARA_CH; ++ ++ /* check condition */ ++ if (!g_isu_obj[ch]) ++ return E_ISU_NO_INIT; ++ prv = g_isu_obj[ch]; ++ ++ /* check status */ ++ if (prv->ch_info.status != ISU_STAT_READY) ++ return E_ISU_INVALID_STATE; ++ ++ /* unregistory interrupt handler */ ++ ercd = isu_ins_unreg_ih(prv); ++ if (ercd) ++ return ercd; ++ ++ /* Finalize register */ ++ ercd = isu_ins_quit_reg(prv); ++ if (ercd) ++ return ercd; ++ ++ /* disable clock */ ++ ercd = isu_ins_disable_clock(prv); ++ if (ercd) ++ return ercd; ++ ++ /* update status */ ++ prv->ch_info.status = ISU_STAT_INIT; ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_lib_start ++ * Description: Start ISU processing ++ * Returns: 0/E_ISU_PARA_CB/E_ISU_PARA_INPAR/E_ISU_PARA_CH/E_ISU_NO_INIT/E_ISU_INVALID_STATE ++ returns isu_ins_check_start_parameter ++ returns isu_ins_set_start_parameter ++ ******************************************************************************/ ++long isu_lib_start(unsigned char ch, ++ void *callback, ++ struct isu_start_t *param, ++ void *userdata) ++{ ++ struct isu_prv_data *prv; ++ struct isu_ch_info *ch_info; ++ ++ long ercd; ++ /* check start parameter */ ++ if (!callback) ++ return E_ISU_PARA_CB; ++ ++ if (!param) ++ return E_ISU_PARA_INPAR; ++ ++ /* check channel parameter */ ++ if (ch >= ISU_IP_MAX) ++ return E_ISU_PARA_CH; ++ ++ if (!g_isu_obj[ch]) ++ return E_ISU_NO_INIT; ++ ++ prv = g_isu_obj[ch]; ++ ++ /* check write index */ ++ ch_info = &prv->ch_info; ++ ++ /* check status */ ++ if (ch_info->status != ISU_STAT_READY) ++ return E_ISU_INVALID_STATE; ++ ++ if (!prv->isu_reg) ++ return E_ISU_INVALID_STATE; ++ ++ /* update status */ ++ ch_info->status = ISU_STAT_RUN; ++ ++ /* check start parameter */ ++ ercd = isu_ins_check_start_parameter(prv, param); ++ if (ercd) { ++ /* update status */ ++ ch_info->status = ISU_STAT_READY; ++ ++ return ercd; ++ } ++ ++ /* set start parameter */ ++ ercd = isu_ins_set_start_parameter(prv); ++ if (ercd) { ++ /* update status */ ++ ch_info->status = ISU_STAT_READY; ++ ++ return ercd; ++ } ++ ++ /* set callback information */ ++ ch_info->cb_func = callback; ++ ch_info->cb_userdata = userdata; ++ ++ /* start */ ++ isu_ins_start_processing(prv); ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_lib_abort ++ * Description: Forced stop of ISU processing ++ * Returns: 0/E_ISU_PARA_CH/E_ISU_NO_INIT ++ * return of isu_ins_stop_processing(). ++ ******************************************************************************/ ++long isu_lib_abort(unsigned char ch) ++{ ++ struct isu_prv_data *prv; ++ ++ long ercd; ++ ++ /* check channel parameter */ ++ if (ch >= ISU_IP_MAX) ++ return E_ISU_PARA_CH; ++ ++ if (!g_isu_obj[ch]) ++ return E_ISU_NO_INIT; ++ ++ prv = g_isu_obj[ch]; ++ ++ /* check status */ ++ if (prv->ch_info.status == ISU_STAT_RUN) { ++ /* stop ISU processing */ ++ ercd = isu_ins_stop_processing(prv); ++ if (ercd) ++ return ercd; ++ } ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_lib_get_status ++ * Description: Get status of ISU processing ++ * Returns: 0/E_ISU_PARA_INPAR/E_ISU_PARA_CH/E_ISU_NO_INIT/ ++ * E_ISU_INVALID_STATE ++ ******************************************************************************/ ++long isu_lib_get_status(unsigned char ch, struct isu_status_t *status) ++{ ++ struct isu_prv_data *prv; ++ ++ /* check parameter */ ++ if (!status) ++ return E_ISU_PARA_INPAR; ++ ++ /* check channel parameter */ ++ if (ch >= ISU_IP_MAX) ++ return E_ISU_PARA_CH; ++ ++ if (!g_isu_obj[ch]) ++ return E_ISU_NO_INIT; ++ prv = g_isu_obj[ch]; ++ ++ /* check status */ ++ if (prv->ch_info.status == ISU_STAT_INIT) ++ return E_ISU_INVALID_STATE; ++ ++ /* set status */ ++ status->wpf_bits = prv->rdata.usable_wpf; ++ status->rpf_bits = prv->rdata.usable_rpf; ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_lib_suspend ++ * Description: Suspend of ISU processing ++ * Returns: 0 ++ * return of isu_ins_unreg_ih(). ++ * return of isu_ins_quit_reg(). ++ ******************************************************************************/ ++long isu_lib_suspend(unsigned char ch) ++{ ++ struct isu_prv_data *prv; ++ ++ long ercd; ++ ++ /* check channel parameter */ ++ if (ch >= ISU_IP_MAX) ++ return E_ISU_PARA_CH; ++ ++ prv = g_isu_obj[ch]; ++ ++ if (prv && prv->isu_reg) { ++ if (prv->ch_info.status == ISU_STAT_RUN) { ++ /* waiting processing finish */ ++ (void)isu_ins_wait_processing(prv); ++ } ++ ++ if (prv->ch_info.status == ISU_STAT_READY) { ++ /* unregistory interrupt handler */ ++ ercd = isu_ins_unreg_ih(prv); ++ if (ercd) ++ return ercd; ++ ++ /* finalize register */ ++ ercd = isu_ins_quit_reg(prv); ++ if (ercd) ++ return ercd; ++ } ++ } ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_lib_resume ++ * Description: Resume of ISU processing ++ * Returns: 0 ++ * return of isu_ins_init_reg(). ++ * return of isu_ins_reg_ih(). ++ ******************************************************************************/ ++long isu_lib_resume(unsigned char ch) ++{ ++ struct isu_prv_data *prv; ++ ++ long ercd; ++ ++ /* check channel parameter */ ++ if (ch >= ISU_IP_MAX) ++ return E_ISU_PARA_CH; ++ ++ prv = g_isu_obj[ch]; ++ ++ if (prv && !prv->isu_reg) { ++ if (prv->ch_info.status == ISU_STAT_READY) { ++ /* reinitialize register */ ++ ercd = isu_ins_init_reg(prv); ++ if (ercd) ++ return ercd; ++ ++ /* reregister interrupt handler */ ++ ercd = isu_ins_reg_ih(prv); ++ if (ercd) { ++ (void)isu_ins_quit_reg(prv); ++ return ercd; ++ } ++ } ++ } ++ ++ return 0; ++} +diff --git a/vspm-module/files/vspm/drv/isu/isu_drv_local.h b/vspm-module/files/vspm/drv/isu/isu_drv_local.h +new file mode 100755 +index 0000000..a5a970b +--- /dev/null ++++ b/vspm-module/files/vspm/drv/isu/isu_drv_local.h +@@ -0,0 +1,215 @@ ++#ifndef __ISU_DRV_PHY_H__ ++#define __ISU_DRV_PHY_H__ ++/* define register offset */ ++/* System Management Register offset address*/ ++#define ISU_FM_DL_STADDH 0x0000 /* FM Descriptor List Address Registers 0 */ ++#define ISU_FM_DL_STADDL 0x0004 /* FM Descriptor List Address Registers 1 */ ++#define ISU_FM_FRCON 0x0008 /* FM Frame Control Registers */ ++#define ISU_FM_STOP 0x000C /* FM Module Stop Registers */ ++#define ISU_FM_INT_EN 0x0010 /* FM Interrupt Enable Registers */ ++#define ISU_FM_INT_STA 0x0014 /* FM Interrupt Status Registers */ ++#define ISU_AXI_ERAC 0x0020 /* AXI Error Action Registers */ ++#define ISU_AXI_FIFO_CAP 0x002C /* AXI FIFO Capability Registers */ ++ ++/* Common Register ++Sets input/ouput, reduction ratio and color conversion coefficient ++*/ ++#define ISU_RPF_SRC_SIZE 0x0100 /* RPF Source Image Size Registers */ ++#define ISU_RPF_SRC_STRD 0x0104 /* RPF Source Stride Registers */ ++#define ISU_RPF_SRC_ADDH_PL0 0x0108 /* RPF Source Plane0 Address Registers 0 */ ++#define ISU_RPF_SRC_ADDL_PL0 0x010C /* RPF Source Plane0 Address Registers 1 */ ++#define ISU_RPF_SRC_ADDH_PL1 0x0110 /* RPF Source Plane1 Address Registers 0 */ ++#define ISU_RPF_SRC_ADDL_PL1 0x0114 /* RPF Source Plane1 Address Registers 1 */ ++#define ISU_RPF_FMT 0x0118 /* RPF Source Image Format Registers */ ++#define ISU_RPF_UVBIN 0x011C /* RPF Source Image UV Format Register */ ++#define ISU_RPF_SRC_DSWAP 0x0120 /* RPF Source Image Data Swap Registers */ ++#define ISU_RPF_ALPH_SEL 0x0124 /* RPF Source ALPHA Data Selection Registers */ ++#define ISU_RPF_SRC_TD1 0x0128 /* RPF Source TEST Data Register1 */ ++#define ISU_RPF_SRC_TD2 0x012C /* RPF Source TEST Data Register2 */ ++#define ISU_RS_HSCALE 0x0140 /* RS Scaling Factor Registers 0 */ ++#define ISU_RS_VSCALE 0x0144 /* RS Scaling Factor Registers 1 */ ++#define ISU_RS_STPOS 0x0148 /* RS Output Image Start Position Registers */ ++#define ISU_RS_POS_TUNE 0x014C /* RS Output Image Start Position Tuning Registers */ ++#define ISU_RS_OS_CROP 0x0150 /* RS Output Size Crop Registers */ ++#define ISU_RS_PADDMODE 0x0154 /* RS CROP Padding Mode Registers */ ++#define ISU_RS_PADDVAL 0x0158 /* RS CROP Padding Value Registers */ ++#define ISU_WPF_DST_ADDH_PL0 0x0180 /* WPF Destination Plane0 Address Registers 0 */ ++#define ISU_WPF_DST_ADDL_PL0 0x0184 /* WPF Destination Plane0 Address Registers 1 */ ++#define ISU_WPF_DST_ADDH_PL1 0x0188 /* WPF Destination Plane1 Address Registers 0 */ ++#define ISU_WPF_DST_ADDL_PL1 0x018C /* WPF Destination Plane1 Address Registers 1 */ ++#define ISU_WPF_DST_STRD 0x0190 /* WPF Destination Stride Registers */ ++#define ISU_WPF_FMT 0x0194 /* WPF Destination Image Format Registers */ ++#define ISU_WPF_CCOL 0x0198 /* WPF Color Collection Control Registers */ ++#define ISU_WPF_MUL1 0x019C /* WPF Color Collection MUL Coefficient Registers1 */ ++#define ISU_WPF_MUL2 0x01A0 /* WPF Color Collection MUL Coefficient Registers2 */ ++#define ISU_WPF_MUL3 0x01A4 /* WPF Color Collection MUL Coefficient Registers3 */ ++#define ISU_WPF_MUL4 0x01A8 /* WPF Color Collection MUL Coefficient Registers4 */ ++#define ISU_WPF_MUL5 0x01AC /* WPF Color Collection MUL Coefficient Registers5 */ ++#define ISU_WPF_MUL6 0x01B0 /* WPF Color Collection MUL Coefficient Registers6 */ ++#define ISU_WPF_OFST1 0x01B4 /* WPF Color Collection Offset Coefficient Registers1 */ ++#define ISU_WPF_OFST2 0x01B8 /* WPF Color Collection Offset Coefficient Registers2 */ ++#define ISU_WPF_CLP1 0x01BC /* WPF Color Collection Clip Registers1 */ ++#define ISU_WPF_CLP2 0x01C0 /* WPF Color Collection Clip Registers2 */ ++#define ISU_WPF_DST_DSWAP 0x01C4 /* WPF Destination Image Data Swap Registers */ ++#define ISU_WPF_ALPH_SEL1 0x01C8 /* WPF Destination ALPHA Selection Registers1 */ ++#define ISU_WPF_ALPH_SEL2 0x01CC /* WPF Destination ALPHA Selection Registers2 */ ++#define ISU_WPF_ALPH_VAL 0x01D0 /* WPF Destination ALPHA Value Registers */ ++#define ISU_AXI_BLEN 0x01F0 /* AXI Max Burst Length Registers */ ++ ++/* Controler bit */ ++#define ISU_DESON 0x00010000 /* Processing method selection bit */ ++#define ISU_START 0x00000001 /* Frame processing start bit */ ++#define ISU_STOP 0x00000001 /* Frame processing stop bit */ ++ ++/* Interrupt control bits */ ++#define ISU_INT_AXIRXERRE 0x10000000 /* Control of AXI bus read error interrupt */ ++#define ISU_INT_AXITXERRE 0x01000000 /* Control of AXI bus write error interrupt */ ++#define ISU_INT_LISTERRE 0x00010000 /* Control of "Descriptor List" format violation interrupt */ ++#define ISU_INT_SRSTENDE 0x00000100 /* Control of emergency stop completion interrupt bit */ ++#define ISU_INT_DESENDE 0x00000002 /* Control of descriptor footer read completion interrupt */ ++#define ISU_INT_FRENDE 0x00000001 /* Control of the frame processing end */ ++ ++/* Interrupt bits */ ++#define ISU_INT_RRESPERR 0x38000000 /* Displays the status of the AXI read response */ ++#define ISU_INT_BRESPERR 0x03800000 /* Displays the status of the AXI write response */ ++#define ISU_INT_LISTERR 0x00010000 /* Displays the status of "Descriptor List" format violations */ ++#define ISU_INT_SRSTEND 0x00000100 /* Displays the status of the emergency stop completion */ ++#define ISU_INT_DESEND 0x00000002 /* Displays the status of the descriptor footer read completion */ ++#define ISU_INT_FREND 0x00000001 /* Displays the status of the frame processing end */ ++ ++#define ISU_RPF_TD_USE (0x80000000) ++#define ISU_RPF_AEXT (0x00010000) ++#define ISU_RS_PADSEL (0x00000001) ++#define ISU_RS_NO_RESIZE (0x00010000) ++#define ISU_RPF_UV_CONV (0x00000001) ++#define ISU_WPF_ASEL (0x00010000) ++#define ISU_WPF_CCOL_SEL (0x00000002) ++#define ISU_WPF_CCOL_ASE (0x00000001) ++ ++ ++/* define status read counter */ ++#define ISU_STATUS_LOOP_TIME (2) ++#define ISU_STATUS_LOOP_CNT (500) ++ ++/* define module maximum */ ++#define ISU_RPF_MAX (1) ++#define ISU_WPF_MAX (1) ++#define ISU_IP_MAX (ISU_RPF_MAX) ++ ++/* define status */ ++#define ISU_STAT_NOT_INIT 0 ++#define ISU_STAT_INIT 1 ++#define ISU_STAT_READY 2 ++#define ISU_STAT_RUN 3 ++ ++/* define */ ++#define ISU_FALSE 0 ++#define ISU_TRUE 1 ++ ++/* define color space */ ++#define ISU_COLOR_NO (0) ++#define ISU_COLOR_RGB (1) ++#define ISU_COLOR_YUV (2) ++#define ISU_COLOR_RAW (3) ++ ++/* RPF information structure */ ++struct isu_rpf_info { ++ unsigned long addr; ++ unsigned long addr_c; ++ unsigned int stride; ++ unsigned int stride_c; ++ unsigned int height; ++ unsigned int width; ++ unsigned char format; ++ unsigned int swap; /* Data swap for input images */ ++ unsigned int rpf_alpha_val; ++ unsigned int src_td1; ++ unsigned int src_td2; ++ unsigned int uv_bin; ++}; ++ ++/* Scaling factor information */ ++struct isu_rs_info { ++ unsigned int start_x; ++ unsigned int start_y; ++ unsigned int tune_x; ++ unsigned int tune_y; ++ unsigned int crop_w; ++ unsigned int crop_h; ++ unsigned int pad_mode; ++ unsigned int pad_val; ++ unsigned int x_scale; ++ unsigned int y_scale; ++}; ++ ++/* WPF information structure */ ++struct isu_wpf_info { ++ unsigned long addr; ++ unsigned long addr_c; ++ unsigned int stride; ++ unsigned int stride_c; ++ unsigned char format; ++ unsigned int swap; ++ unsigned int alpha_asel1; ++ unsigned int alpha_asel2; ++ unsigned int alpha_val; ++ unsigned int ccol; ++ unsigned int k_matrix[3][3]; ++ unsigned int offset[3][2]; ++ unsigned int clip[3][2]; ++}; ++ ++/* channel information structure */ ++struct isu_ch_info { ++ unsigned char status; ++ ++ void (*cb_func) ++ (unsigned long id, long ercd, void *userdata); ++ void *cb_userdata; ++ ++ struct isu_rpf_info rpf_info;; ++ struct isu_rs_info rs_info; ++ struct isu_wpf_info wpf_info; ++ unsigned long dl_info; ++}; ++ ++/* private data structure */ ++struct isu_prv_data { ++ struct platform_device *pdev; ++ void __iomem *isu_reg; ++ struct resource *irq; ++ struct isu_res_data { ++ unsigned int usable_rpf; ++ unsigned int usable_wpf; ++ unsigned int usable_module; ++ bool burst_enable; ++ } rdata; ++ ++ struct isu_ch_info ch_info; ++}; ++ ++/* define local functions */ ++long isu_ins_check_init_parameter(struct isu_init_t *param); ++long isu_ins_check_open_parameter(struct isu_open_t *param); ++long isu_ins_check_start_parameter( ++ struct isu_prv_data *prv, struct isu_start_t *param); ++ ++long isu_ins_set_start_parameter(struct isu_prv_data *prv); ++void isu_ins_start_processing(struct isu_prv_data *prv); ++long isu_ins_stop_processing(struct isu_prv_data *prv); ++long isu_ins_wait_processing(struct isu_prv_data *prv); ++ ++long isu_ins_get_isu_resource(struct isu_prv_data *prv); ++ ++long isu_ins_enable_clock(struct isu_prv_data *prv); ++long isu_ins_disable_clock(struct isu_prv_data *prv); ++ ++long isu_ins_init_reg(struct isu_prv_data *prv); ++long isu_ins_quit_reg(struct isu_prv_data *prv); ++ ++void isu_ins_cb_function(struct isu_prv_data *prv, long ercd); ++ ++long isu_ins_reg_ih(struct isu_prv_data *prv); ++long isu_ins_unreg_ih(struct isu_prv_data *prv); ++ ++#endif +diff --git a/vspm-module/files/vspm/drv/isu/isu_drv_par.c b/vspm-module/files/vspm/drv/isu/isu_drv_par.c +new file mode 100755 +index 0000000..f9e888e +--- /dev/null ++++ b/vspm-module/files/vspm/drv/isu/isu_drv_par.c +@@ -0,0 +1,433 @@ ++#include "vspm_public.h" ++#include "vspm_ip_ctrl.h" ++#include "vspm_main.h" ++ ++#include "isu_drv_public.h" ++#include "isu_drv_local.h" ++ ++/****************************************************************************** ++ * Function: isu_ins_check_init_parameter ++ * Description: Check initialize parameter ++ * Returns: 0/E_ISU_PARA_INPAR ++ ******************************************************************************/ ++long isu_ins_check_init_parameter(struct isu_init_t *param) ++{ ++ /* check pointer */ ++ if (!param) ++ return E_ISU_PARA_INPAR; ++ ++ /* check IP number */ ++ if (param->ip_num < 1 || param->ip_num > ISU_IP_MAX) ++ return E_ISU_PARA_INPAR; ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_check_open_parameter ++ * Description: Check open channel parameter ++ * Returns: 0/E_ISU_PARA_INPAR ++ ******************************************************************************/ ++long isu_ins_check_open_parameter(struct isu_open_t *param) ++{ ++ /* check pointer */ ++ if (!param) ++ return E_ISU_PARA_INPAR; ++ ++ /* check device parameter */ ++ if (!param->pdev) ++ return E_ISU_PARA_INPAR; ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_check_rpf_param ++ * Description: Check source parameter of RPF. ++ * Returns: ++******************************************************************************/ ++static long isu_ins_check_rpf_param(struct isu_ch_info *ch_info, ++ struct isu_src_t *src_par) ++{ ++ struct isu_rpf_info *rpf_info = &ch_info->rpf_info; ++ unsigned char grada_mode_tmp; ++ ++ /* check pointer */ ++ if (!src_par) ++ return E_ISU_PARA_NOIN; ++ ++ /* check input addr 32 boundary */ ++ if ((src_par->addr%32)||(src_par->addr_c%32)) ++ return E_ISU_PARA_IN_ADDR; ++ ++ /* check stride 32 boundary */ ++ if ((src_par->stride%32)||(src_par->stride_c%32)) ++ return E_ISU_PARA_IN_STRD; ++ ++ /* check input format */ ++ switch (src_par->format) { ++ case ISU_ARGB1555: ++ case ISU_RGB565: ++ case ISU_BGR666: ++ case ISU_RGB888: ++ case ISU_BGR888: ++ case ISU_ARGB8888: ++ case ISU_RGBA8888: ++ case ISU_ABGR8888: ++ case ISU_RAW8: ++ case ISU_RAW10: ++ case ISU_RAW12: ++ case ISU_YUV422_UYVY: ++ case ISU_YUV422_YUY2: ++ break; ++ case ISU_YUV422_NV16: ++ case ISU_YUV420_NV12: ++ if(!src_par->addr_c) ++ return E_ISU_PARA_IN_ADDR; ++ if(!src_par->stride_c) ++ return E_ISU_PARA_IN_STRD; ++ break; ++ default: ++ return E_ISU_PARA_IN_FORMAT; ++ } ++ ++ rpf_info->format = src_par->format; ++ rpf_info->addr = src_par->addr; ++ rpf_info->addr_c = src_par->addr_c; ++ rpf_info->stride = src_par->stride; ++ rpf_info->stride_c = src_par->stride_c; ++ ++ /* check test date parameter */ ++ if (src_par->td) { ++ rpf_info->src_td1 |= ISU_RPF_TD_USE; ++ grada_mode_tmp = (src_par->td->grada_mode) >> 1; ++ rpf_info->src_td1 |= ((unsigned int)grada_mode_tmp) << 16; ++ grada_mode_tmp = src_par->td->grada_mode & 0x01; ++ rpf_info->src_td1 |= ((unsigned int)grada_mode_tmp) << 4; ++ if (src_par->td->grada_step) { ++ rpf_info->src_td1 |= ((unsigned int)src_par->td->grada_step)&0x0000000F; ++ } else { ++ rpf_info->src_td2 |= (unsigned int)src_par->td->init_val; ++ } ++ } else { ++ rpf_info->src_td1 = 0; ++ } ++ ++ /* set data swapping parameter */ ++ rpf_info->swap = (unsigned int)(src_par->swap); ++ ++ /* check basic area */ ++ if (src_par->width < 1 || src_par->width > 2800) ++ return E_ISU_PARA_IN_WIDTH; ++ else { ++ rpf_info->width = src_par->width; ++ } ++ ++ if (src_par->height < 1 || src_par->height > 2047) ++ return E_ISU_PARA_IN_HEIGHT; ++ else { ++ rpf_info->height = src_par->height; ++ } ++ ++ /* check alpha selection and color converter parameter */ ++ if(src_par->alpha){ ++ if(src_par->alpha->asel == ISU_AEXT_COPY) { ++ /* Copy input Alpha value 1bit to all 8bit */ ++ } else if (src_par->alpha->asel == ISU_AEXT_EXPAN) { ++ /* set 8bit transparent-alpha generator */ ++ rpf_info->rpf_alpha_val |= ISU_RPF_AEXT; ++ rpf_info->rpf_alpha_val |= ((unsigned int)src_par->alpha->anum1) << 8; ++ rpf_info->rpf_alpha_val |= (unsigned int)src_par->alpha->anum0; ++ } else ++ return E_ISU_PARA_ALPHA_ASEL; ++ } else { ++ rpf_info->rpf_alpha_val = 0; ++ } ++ /* Check whether convert Cb/Cr/UV to offset binary */ ++ rpf_info->uv_bin |= src_par->uv_conv; ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_check_rs_param ++ * Description: Check module parameter of RS. ++ * Returns: ++ ******************************************************************************/ ++static long isu_ins_check_rs_param(struct isu_ch_info *ch_info, ++ struct isu_rs_t *rs_param) ++{ ++ struct isu_rpf_info *rpf_info = &ch_info->rpf_info; ++ struct isu_rs_info *rs_info = &ch_info->rs_info; ++ ++ if (rs_param){ ++ /* Check start position after resize */ ++ if ((rs_param->start_x >= rpf_info->width)||(rs_param->start_y >= rpf_info->height)) ++ return E_ISU_PARA_RS_START; ++ else { ++ rs_info->start_x = rs_param->start_x; ++ rs_info->start_y = rs_param->start_y; ++ } ++ ++ /* Check tuning parameter */ ++ if ((rs_param->tune_x >= ISU_TUNE_MAX)||(rs_param->tune_y >= ISU_TUNE_MAX)) ++ return E_ISU_PARA_RS_TUNE; ++ else { ++ rs_info->tune_x = rs_param->tune_x; ++ rs_info->tune_y = rs_param->tune_y; ++ } ++ ++ /* Check output size */ ++ if ((rs_param->crop_w < 1)||(rs_param->crop_w > 1920)|| ++ (rs_param->crop_h < 1) ||(rs_param->crop_h > 1080)) ++ return E_ISU_PARA_RS_CROP; ++ else { ++ rs_info->crop_w = rs_param->crop_w; ++ rs_info->crop_h = rs_param->crop_h; ++ } ++ ++ /* Check pad mode */ ++ switch(rs_param->pad_mode){ ++ case ISU_PAD_IN: ++ break; ++ case ISU_PAD_P: ++ rs_info->pad_mode = rs_param->pad_mode; ++ rs_info->pad_val = rs_param->pad_val; ++ break; ++ default: ++ return E_ISU_PARA_RS_PAD; ++ } ++ /* Check ratio scale */ ++ if((rs_param->x_ratio & 0x0000F000)||(rs_param->y_ratio & 0x0000F000)) { ++ rs_info->x_scale = ((unsigned int)rs_param->x_ratio >> 12) << 16; ++ rs_info->x_scale |= ((unsigned int)rs_param->x_ratio); ++ rs_info->y_scale = ((unsigned int)rs_param->y_ratio >> 12) << 16; ++ rs_info->y_scale |= ((unsigned int)rs_param->y_ratio & 0x00000FFF); ++ } else ++ return E_ISU_PARA_RS_RATIO; ++ } else { ++ rs_info->start_x = 0; ++ rs_info->start_y = 0; ++ rs_info->tune_x = 0; ++ rs_info->tune_y = 0; ++ rs_info->crop_w = rpf_info->width; ++ rs_info->crop_h = rpf_info->height; ++ rs_info->x_scale |= ISU_RS_NO_RESIZE; ++ rs_info->y_scale |= ISU_RS_NO_RESIZE; ++ rs_info->pad_mode=0; ++ rs_info->pad_val=0; ++ } ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function:isu_ins_check_connection_module_from_rpf ++ * Description: Check connection module parameter from RPF. ++ * Returns: ++ * return of isu_ins_check_rpf_param() ++ * return of isu_ins_check_rs_param() ++ ******************************************************************************/ ++static long isu_ins_check_connection_module_from_rpf(struct isu_prv_data *prv, ++ struct isu_start_t *param) ++{ ++ struct isu_ch_info *ch_info = &prv->ch_info; ++ long ercd; ++ ++ /* check RPF parameter */ ++ if(!(param->dl_hard_addr)){ ++ ercd = isu_ins_check_rpf_param(ch_info, param->src_par); ++ if (ercd) ++ return ercd; ++ ++ /* check module parameter */ ++ ercd = isu_ins_check_rs_param(ch_info, param->rs_par); ++ if (ercd) ++ return ercd; ++ } ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function:isu_ins_check_wpf_param ++ * Description: Check output parameter of WPF. ++ * Returns: ++ ******************************************************************************/ ++static long isu_ins_check_wpf_param( struct isu_ch_info *ch_info, ++ struct isu_dst_t *dst_par) ++{ ++ struct isu_wpf_info *wpf_info = &ch_info->wpf_info; ++ unsigned char i, j; ++ ++ /* check pointer */ ++ if (!dst_par) ++ return E_ISU_PARA_NOOUT; ++ ++ /* check format parameter */ ++ if ((dst_par->addr%512)||(dst_par->addr_c%512)) ++ return E_ISU_PARA_OUT_ADDR; ++ ++ /* check stride 32 boundary */ ++ if ((dst_par->stride%32)||(dst_par->stride_c%32)) ++ return E_ISU_PARA_OUT_STRD; ++ ++ /* check format parameter */ ++ switch (dst_par->format) { ++ case ISU_ARGB1555: ++ case ISU_RGB565: ++ case ISU_BGR666: ++ case ISU_RGB888: ++ case ISU_BGR888: ++ case ISU_ARGB8888: ++ case ISU_RGBA8888: ++ case ISU_ABGR8888: ++ case ISU_RAW8: ++ case ISU_RAW10: ++ case ISU_RAW12: ++ case ISU_YUV422_UYVY: ++ case ISU_YUV422_YUY2: ++ break; ++ case ISU_YUV422_NV16: ++ case ISU_YUV420_NV12: ++ if(!dst_par->addr_c) ++ return E_ISU_PARA_OUT_ADDR; ++ if(!dst_par->stride_c) ++ return E_ISU_PARA_OUT_STRD; ++ break; ++ default: ++ return E_ISU_PARA_OUT_FORMAT; ++ } ++ ++ wpf_info->format = dst_par->format; ++ wpf_info->addr = dst_par->addr; ++ wpf_info->addr_c = dst_par->addr_c; ++ wpf_info->stride = dst_par->stride; ++ wpf_info->stride_c = dst_par->stride_c; ++ ++ /* set data swapping parameter */ ++ wpf_info->swap = (unsigned int)(dst_par->swap); ++ ++ /* check color space conversion parameter */ ++ if (dst_par->csc) { ++ switch (dst_par->csc->csc){ ++ case ISU_CSC_CUSTOM: ++ wpf_info->ccol |= ISU_WPF_CCOL_SEL; // enable color conversion ++ wpf_info->ccol |= ISU_WPF_CCOL_ASE; // enable alpha color conversion ++ for (i = 0; i < ISU_LAYER_NUM; i++) { ++ for (j = 0; j < ISU_LAYER_NUM; j++) { ++ wpf_info->k_matrix[i][j] = dst_par->csc->k_matrix[i][j]; ++ } ++ } ++ for (i = 0; i < ISU_LAYER_NUM; i++) { ++ for (j = 0; j < ISU_OFFSET_NUM; j++) { ++ wpf_info->offset[i][j] = dst_par->csc->offset[i][j]&0xFF; ++ wpf_info->clip[i][j] = dst_par->csc->clip[i][j]&0xFF; ++ } ++ } ++ break; ++ case ISU_CSC_601: ++ case ISU_CSC_709: ++ break; ++ default: ++ return E_ISU_PARA_OUT_CSC; ++ } ++ } else { ++ /* disable color space conversion */ ++ wpf_info->ccol = 0; ++ } ++ ++ /* check alpha selection and color converter parameter */ ++ if ((dst_par->format == ISU_ARGB1555)||(dst_par->format == ISU_ARGB8888)){ ++ if (dst_par->alpha){ ++ switch (dst_par->alpha->asel){ ++ case ISU_AEXT_COPY: ++ break; ++ case ISU_AEXT_COMP: ++ /* Select alpha output base on a-value and a-thres */ ++ wpf_info->alpha_asel1 |= ISU_WPF_ASEL; ++ wpf_info->alpha_asel1 |= ((unsigned int)dst_par->alpha->athres0); ++ break; ++ case ISU_AEXT_CONV: ++ wpf_info->alpha_asel2 |= ISU_WPF_ASEL; ++ wpf_info->alpha_asel2 |= ((unsigned int)dst_par->alpha->athres0) << 8; ++ wpf_info->alpha_asel2 |= ((unsigned int)dst_par->alpha->athres1); ++ wpf_info->alpha_val |= ((unsigned int)dst_par->alpha->anum2) << 16; ++ wpf_info->alpha_val |= ((unsigned int)dst_par->alpha->anum1) << 8; ++ wpf_info->alpha_val |= ((unsigned int)dst_par->alpha->anum0); ++ break; ++ default: ++ return E_ISU_PARA_ALPHA_ASEL; ++ } ++ } else { ++ wpf_info->alpha_val = 0; ++ wpf_info->alpha_asel1 = 0; ++ wpf_info->alpha_asel2 = 0; ++ } ++ } ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function:vsp_ins_check_dl_param ++ * Description: Check display list parameter. ++ * Returns: 0/E_ISU_PARA_DL_ADDR ++ ******************************************************************************/ ++static long isu_ins_check_dl_param(struct isu_ch_info *ch_info, ++ unsigned long dl_hard_addr) ++{ ++ if(dl_hard_addr%32) ++ return E_ISU_PARA_DL_ADDR; ++ ++ ch_info->dl_info = dl_hard_addr; ++ return 0; ++} ++/****************************************************************************** ++ * Function:isu_ins_check_output_module ++ * Description: Check destination module parameter. ++ * Returns: ++ ******************************************************************************/ ++static long isu_ins_check_output_module( ++struct isu_ch_info *ch_info, struct isu_start_t *param) ++{ ++ long ercd; ++ /* check WPF parameter */ ++ if(!(param->dl_hard_addr)){ ++ ercd = isu_ins_check_wpf_param(ch_info, param->dst_par); ++ if (ercd) ++ return ercd; ++ } else { ++ /* check DL parameter */ ++ ercd = isu_ins_check_dl_param(ch_info, param->dl_hard_addr); ++ if (ercd) ++ return ercd; ++ } ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function:isu_ins_check_start_parameter ++ * Description: Check vsp_start_t parameter. ++ * Returns: 0/E_VSP_PARA_USEMODULE ++ * Return of isu_ins_check_connection_module_from_rpf() ++ * Return of isu_ins_check_output_module() ++ * Return of isu_ins_check_partition() ++ ******************************************************************************/ ++long isu_ins_check_start_parameter(struct isu_prv_data *prv, ++ struct isu_start_t *param) ++{ ++ struct isu_ch_info *ch_info = &prv->ch_info; ++ long ercd; ++ ++ /* check connection module parameter (RPF->RS or WPF) */ ++ ercd = isu_ins_check_connection_module_from_rpf(prv, param); ++ if (ercd) ++ return ercd; ++ ++ /* check WPF module parameter */ ++ ercd = isu_ins_check_output_module(ch_info, param); ++ if (ercd) ++ return ercd; ++ ++ return 0; ++} +diff --git a/vspm-module/files/vspm/drv/isu/isu_drv_phy.c b/vspm-module/files/vspm/drv/isu/isu_drv_phy.c +new file mode 100755 +index 0000000..2e45b44 +--- /dev/null ++++ b/vspm-module/files/vspm/drv/isu/isu_drv_phy.c +@@ -0,0 +1,624 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "vspm_public.h" ++#include "vspm_ip_ctrl.h" ++#include "vspm_main.h" ++#include "vspm_log.h" ++ ++#include "isu_drv_public.h" ++#include "isu_drv_local.h" ++ ++/****************************************************************************** ++ * Function: isu_write_reg ++ * Description: Write to register ++ * Returns: void ++ ******************************************************************************/ ++inline void isu_write_reg( ++ unsigned int data, void __iomem *base, unsigned int offset) ++{ ++ unsigned int __iomem *reg = ++ (unsigned int __iomem *)base; ++ reg += (offset >> 2); ++ iowrite32(data, reg); ++} ++ ++/****************************************************************************** ++ * Function: isu_read_reg ++ * Description: Read from register ++ * Returns: void ++ ******************************************************************************/ ++inline unsigned int isu_read_reg(void __iomem *base, unsigned int offset) ++{ ++ unsigned int __iomem *reg = ++ (unsigned int __iomem *)base; ++ reg += (offset >> 2); ++ return ioread32(reg); ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_set_reg_for_rpf ++ * Description: Set RPF register value. ++ * Returns: void ++ ******************************************************************************/ ++static void isu_ins_set_reg_for_rpf(struct isu_prv_data *prv, ++struct isu_ch_info *ch_info) ++{ ++ struct isu_rpf_info *rpf_info = &ch_info->rpf_info; ++ unsigned int reg_temp; ++ ++ /* RPF Source Image Size Registers */ ++ reg_temp = (((unsigned int)rpf_info->width) << 16) & 0x0FFF0000; ++ reg_temp |= ((unsigned int)rpf_info->height & 0x00000FFF); ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_RPF_SRC_SIZE); ++ ++ /* RPF Source Stride Registers */ ++ reg_temp = ((unsigned int)rpf_info->stride) << 16; ++ reg_temp |= (unsigned int)rpf_info->stride_c; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_RPF_SRC_STRD); ++ ++ /* Start address for Plane 0 */ ++ reg_temp = ((rpf_info->addr) >> 32) & 0x00000003; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_RPF_SRC_ADDH_PL0); ++ reg_temp = (unsigned int)rpf_info->addr; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_RPF_SRC_ADDL_PL0); ++ ++ /* Start address for Plane 1 */ ++ reg_temp = ((rpf_info->addr_c) >> 32) & 0x00000003; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_RPF_SRC_ADDH_PL1); ++ reg_temp = (unsigned int)rpf_info->addr_c; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_RPF_SRC_ADDL_PL1); ++ ++ /* RPF Source Image Format Registers */ ++ reg_temp = ((unsigned int)rpf_info->format) & 0x0000003F; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_RPF_FMT); ++ ++ /* RPF Source Image UV Format Register */ ++ isu_write_reg(rpf_info->uv_bin, prv->isu_reg, ISU_RPF_UVBIN); ++ ++ /* RPF Source Image Data Swap Registers */ ++ isu_write_reg(rpf_info->swap, prv->isu_reg, ISU_RPF_SRC_DSWAP); ++ ++ /* RPF Source ALPHA Data Selection Registers */ ++ if (rpf_info->format == ISU_ARGB1555) ++ isu_write_reg(rpf_info->rpf_alpha_val, prv->isu_reg, ISU_RPF_ALPH_SEL); ++ ++ /* RPF Source TEST Data Register1 */ ++ isu_write_reg(rpf_info->src_td1, prv->isu_reg, ISU_RPF_SRC_TD1); ++ /* RPF Source TEST Data Register2 */ ++ isu_write_reg(rpf_info->src_td2, prv->isu_reg, ISU_RPF_SRC_TD2); ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_set_reg_for_rs ++ * Description: Set RS register value. ++ * Returns: void ++ ******************************************************************************/ ++static void isu_ins_set_reg_for_rs(struct isu_prv_data *prv, ++ struct isu_ch_info *ch_info) ++{ ++ struct isu_rs_info *rs_info = &ch_info->rs_info; ++ unsigned int reg_temp; ++ ++ /* RS Scaling Factor Registers 0 */ ++ isu_write_reg(rs_info->x_scale, prv->isu_reg, ISU_RS_HSCALE); ++ ++ /* RS Scaling Factor Registers 1 */ ++ isu_write_reg(rs_info->y_scale, prv->isu_reg, ISU_RS_VSCALE); ++ ++ /* RS Output Image Start Position Registers */ ++ reg_temp = (rs_info->start_x << 16); ++ reg_temp |= (rs_info->start_y); ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_RS_STPOS); ++ ++ /* RS Output Image Start Position Tuning Registers */ ++ reg_temp = (rs_info->tune_x << 16); ++ reg_temp |= (rs_info->tune_y); ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_RS_POS_TUNE); ++ ++ /* RS Output Size Crop Registers */ ++ reg_temp = (rs_info->crop_w << 16); ++ reg_temp |= (rs_info->crop_h); ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_RS_OS_CROP); ++ ++ /* RS CROP Padding Mode Registers */ ++ isu_write_reg(rs_info->pad_mode, prv->isu_reg, ISU_RS_PADDMODE); ++ isu_write_reg(rs_info->pad_val, prv->isu_reg, ISU_RS_PADDVAL); ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_set_reg_for_wpf ++ * Description: Set WPF register value. ++ * Returns: void ++ ******************************************************************************/ ++static void isu_ins_set_reg_for_wpf(struct isu_prv_data *prv, ++struct isu_ch_info *ch_info) ++{ ++ struct isu_wpf_info *wpf_info = &ch_info->wpf_info; ++ unsigned int reg_temp; ++ unsigned long reg_temp0; ++ ++ /* WPF Destination Plane0 Address Registers 0 */ ++ reg_temp0 = (((unsigned long)wpf_info->addr) >> 32) & 0x00000003; ++ reg_temp = (unsigned int)reg_temp0; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_DST_ADDH_PL0); ++ reg_temp = (unsigned int)wpf_info->addr; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_DST_ADDL_PL0); ++ ++ /* WPF Destination Plane0 Address Registers 1 */ ++ reg_temp0 = (((unsigned long)wpf_info->addr_c) >> 32) & 0x00000003; ++ reg_temp = (unsigned int)reg_temp0; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_DST_ADDH_PL1); ++ reg_temp = (unsigned int)wpf_info->addr_c; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_DST_ADDL_PL1); ++ ++ /* WPF Destination Stride Registers */ ++ reg_temp = ((unsigned int)wpf_info->stride) << 16; ++ reg_temp |= (unsigned int)wpf_info->stride_c; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_DST_STRD); ++ ++ /* WPF Destination Image Format Registers */ ++ reg_temp = ((unsigned int)wpf_info->format) & 0x0000003F; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_FMT); ++ ++ /* WPF Color Collection Control Registers */ ++ isu_write_reg(wpf_info->ccol, prv->isu_reg, ISU_WPF_CCOL); ++ ++ /* WPF Color Collection MUL Coefficient Registers1 */ ++ reg_temp = wpf_info->k_matrix[0][0]; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_MUL1); ++ ++ /* WPF Color Collection MUL Coefficient Registers2 */ ++ reg_temp = (wpf_info->k_matrix[0][2] << 16); ++ reg_temp |= (wpf_info->k_matrix[0][1]); ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_MUL2); ++ ++ /* WPF Color Collection MUL Coefficient Registers3 */ ++ reg_temp = wpf_info->k_matrix[1][0]; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_MUL3); ++ ++ /* WPF Color Collection MUL Coefficient Registers4 */ ++ reg_temp = (wpf_info->k_matrix[1][2] << 16); ++ reg_temp |= (wpf_info->k_matrix[1][1]); ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_MUL4); ++ ++ /* WPF Color Collection MUL Coefficient Registers5 */ ++ reg_temp = wpf_info->k_matrix[2][0]; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_MUL5); ++ ++ /* WPF Color Collection MUL Coefficient Registers6 */ ++ reg_temp = (wpf_info->k_matrix[2][2] << 16); ++ reg_temp |= (wpf_info->k_matrix[2][1]); ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_MUL6); ++ ++ /* WPF Color Collection Offset Coefficient Registers1 */ ++ reg_temp = (wpf_info->offset[0][0] << 24); ++ reg_temp |= ((wpf_info->offset[1][0] << 16)); ++ reg_temp |= ((wpf_info->offset[2][0] << 8)); ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_OFST1); ++ ++ /* WPF Color Collection Offset Coefficient Registers2 */ ++ reg_temp = (wpf_info->offset[0][1] << 24); ++ reg_temp |= ((wpf_info->offset[1][1] << 16)); ++ reg_temp |= ((wpf_info->offset[2][1] << 8)); ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_OFST2); ++ ++ /* WPF Color Collection Clip Registers1 */ ++ reg_temp = wpf_info->clip[0][CLIP_MIN_INX]; ++ reg_temp |= ((wpf_info->clip[0][CLIP_MAX_INX] << 8)); ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_CLP1); ++ ++ /* WPF Color Collection Clip Registers2 */ ++ reg_temp = (wpf_info->clip[1][CLIP_MAX_INX] << 24); ++ reg_temp |= ((wpf_info->clip[1][CLIP_MIN_INX] << 16)); ++ reg_temp |= ((wpf_info->clip[2][CLIP_MAX_INX] << 8)); ++ reg_temp |= ((wpf_info->clip[2][CLIP_MIN_INX])); ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_CLP2); ++ ++ /* WPF Destination Image Data Swap Registers */ ++ reg_temp = ((unsigned int)wpf_info->swap) & 0x00000007; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_WPF_DST_DSWAP); ++ ++ /* WPF Destination ALPHA Selection Registers1 */ ++ isu_write_reg(wpf_info->alpha_asel1, prv->isu_reg, ISU_WPF_ALPH_SEL1); ++ /* WPF Destination ALPHA Selection Registers2 */ ++ isu_write_reg(wpf_info->alpha_asel2, prv->isu_reg, ISU_WPF_ALPH_SEL2); ++ isu_write_reg(wpf_info->alpha_val, prv->isu_reg, ISU_WPF_ALPH_VAL); ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_set_start_parameter ++ * Description: Set isu_start_t parameter. ++ * Returns: 0 ++ ******************************************************************************/ ++long isu_ins_set_start_parameter( ++struct isu_prv_data *prv) ++{ ++ struct isu_ch_info *ch_info = &prv->ch_info; ++ ++ if(!(ch_info->dl_info)){ ++ /* input module */ ++ isu_ins_set_reg_for_rpf(prv, ch_info); ++ ++ /* Scale module */ ++ isu_ins_set_reg_for_rs(prv, ch_info); ++ ++ /* output module */ ++ isu_ins_set_reg_for_wpf(prv, ch_info); ++ } else ++ isu_write_reg(ch_info->dl_info, prv->isu_reg, ISU_FM_DL_STADDL); ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_init_isu_reg ++ * Description: Initialize ISU hardware. ++ * Returns: 0 ++ ******************************************************************************/ ++static long isu_ins_init_isu_reg(struct isu_prv_data *prv) ++{ ++ /* Sets the upper limit to the burst length of the AXI-Master. */ ++ isu_write_reg(0x000f000f, prv->isu_reg, ISU_AXI_BLEN); ++ ++ /* clear interrupt */ ++ isu_write_reg(0, prv->isu_reg, ISU_FM_INT_STA); ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_init_reg ++ * Description: Initialize hardware register. ++ * Returns: 0/E_ISU_DEF_REG ++ * return of isu_ins_init_isu_reg() ++ ******************************************************************************/ ++long isu_ins_init_reg(struct isu_prv_data *prv) ++{ ++struct resource *res; ++long ercd = 0; ++ ++/* get an I/O memory resource of ISU */ ++ res = platform_get_resource(prv->pdev, IORESOURCE_MEM, 0); ++ if (!res) { ++ EPRINT("%s: failed to get resource of ISU!!\n", __func__); ++ return E_ISU_DEF_REG; ++ } ++ ++/* remap an I/O memory of ISU */ ++ prv->isu_reg = ioremap(res->start, resource_size(res)); ++ if (!prv->isu_reg) { ++ EPRINT("%s: failed to ioremap of ISU!!\n", __func__); ++ return E_ISU_DEF_REG; ++ } ++ ++/* initialize ISU register */ ++ ercd = isu_ins_init_isu_reg(prv); ++ ++ return ercd; ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_quit_reg ++ * Description: Finalize ISU hardware. ++ * Returns: 0 ++ ******************************************************************************/ ++long isu_ins_quit_reg(struct isu_prv_data *prv) ++{ ++ /* unmap an I/O register of ISU */ ++ if (prv->isu_reg) { ++ iounmap(prv->isu_reg); ++ prv->isu_reg = NULL; ++ } ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_enable_clock ++ * Description: Enable ISU clock supply. ++ * Returns: 0/E_ISU_NO_CLK ++ ******************************************************************************/ ++long isu_ins_enable_clock(struct isu_prv_data *prv) ++{ ++ struct platform_device *pdev = prv->pdev; ++ struct device *dev = &pdev->dev; ++ int ercd; ++ ++ /* wake up device */ ++ ercd = pm_runtime_get_sync(dev); ++ if (ercd < 0) { ++ EPRINT("%s: failed to pm_runtime_get_sync!! ercd=%d\n", ++ __func__, ercd); ++ return E_ISU_NO_CLK; ++ } ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_disable_clock ++ * Description: Disable ISU clock supply. ++ * Returns: 0 ++ ******************************************************************************/ ++long isu_ins_disable_clock(struct isu_prv_data *prv) ++{ ++ struct platform_device *pdev = prv->pdev; ++ ++ /* mark device as idle */ ++ pm_runtime_put_sync(&pdev->dev); ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_get_isu_resource ++ * Description: Get ISU resource. ++ * Returns: 0/E_ISU_PARA_INPAR ++ ******************************************************************************/ ++long isu_ins_get_isu_resource(struct isu_prv_data *prv) ++{ ++ struct device_node *np = prv->pdev->dev.of_node; ++ struct isu_res_data *rdata = &prv->rdata; ++ ++/* read usable RPF bits */ ++ of_property_read_u32(np, "renesas,#rpf", &rdata->usable_rpf); ++ if (rdata->usable_rpf >= (1 << ISU_RPF_MAX)) ++ return E_ISU_PARA_INPAR; ++ ++/* read usable WPF bits */ ++ of_property_read_u32(np, "renesas,#wpf", &rdata->usable_wpf); ++ if (rdata->usable_wpf >= (1 << ISU_RPF_MAX)) ++ return E_ISU_PARA_INPAR; ++ ++ rdata->usable_module = 0; ++ ++ if (of_property_read_bool(np, "renesas,has-rs")) ++ rdata->usable_module |= ISU_RS_USE; ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_start_processing ++ * Description: Start ISU processing. ++ * Returns: void ++ ******************************************************************************/ ++void isu_ins_start_processing(struct isu_prv_data *prv) ++{ ++ struct isu_ch_info *ch_info = &prv->ch_info; ++ ++ if(!(ch_info->dl_info)){ ++ /* enable interrupt */ ++ isu_write_reg(ISU_INT_FRENDE, prv->isu_reg, ISU_FM_INT_EN); ++ /* start */ ++ isu_write_reg(ISU_START, prv->isu_reg, ISU_FM_FRCON); ++ } else { ++ isu_write_reg(ISU_INT_FRENDE|ISU_INT_LISTERRE, prv->isu_reg, ISU_FM_INT_EN); ++ isu_write_reg(ISU_START|ISU_DESON, prv->isu_reg, ISU_FM_FRCON); ++ } ++ ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_stop_processing ++ * Description: Forced stop ISU processing. ++ * Returns: 0 ++ ******************************************************************************/ ++long isu_ins_stop_processing(struct isu_prv_data *prv) ++{ ++ unsigned int status; ++ unsigned int loop_cnt, reg_temp= 0; ++ ++ /* disable interrupt */ ++ isu_write_reg(0, prv->isu_reg, ISU_FM_INT_EN); ++ ++ /* clear interrupt */ ++ isu_write_reg(0, prv->isu_reg, ISU_FM_INT_STA); ++ ++ /* dummy read */ ++ isu_read_reg(prv->isu_reg,ISU_FM_INT_STA); ++ isu_read_reg(prv->isu_reg,ISU_FM_INT_STA); ++ ++ /* Enable Controls interrupt by the completion of emergency stop */ ++ isu_write_reg(ISU_INT_SRSTENDE, prv->isu_reg, ISU_FM_INT_EN); ++ ++ /* Enable emergency stop */ ++ reg_temp |= ISU_STOP; ++ isu_write_reg(reg_temp, prv->isu_reg, ISU_FM_STOP); ++ ++ /* init loop counter */ ++ loop_cnt = ISU_STATUS_LOOP_CNT; ++ ++ /* Waiting emergency stop process */ ++ do { ++ /* sleep */ ++ msleep(ISU_STATUS_LOOP_TIME); ++ ++ /* read status register of ISU */ ++ status = (isu_read_reg(prv->isu_reg,ISU_FM_INT_STA))&ISU_INT_SRSTENDE; ++ } while ((status!=ISU_INT_SRSTENDE)&&(--loop_cnt>0)); ++ ++ /* disable callback function */ ++ prv->ch_info.cb_func = NULL; ++ ++ /* callback function */ ++ if (loop_cnt != 0) { ++ isu_ins_cb_function(prv, R_VSPM_CANCEL); ++ isu_ins_cb_function(prv, R_VSPM_CANCEL); ++ } else { ++ APRINT("%s: happen to timeout after reset of ISU!!\n",__func__); ++ isu_ins_cb_function(prv, R_VSPM_DRIVER_ERR); ++ isu_ins_cb_function(prv, R_VSPM_DRIVER_ERR); ++ } ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_wait_processing ++ * Description: Waiting ISU processing. ++ * Returns: 0 ++ ******************************************************************************/ ++long isu_ins_wait_processing(struct isu_prv_data *prv) ++{ ++ unsigned int loop_cnt = ISU_STATUS_LOOP_CNT; ++ ++ do { ++ /* sleep */ ++ msleep(ISU_STATUS_LOOP_TIME); ++ ++ if (prv->ch_info.status != ISU_STAT_RUN) ++ break; ++ } while (--loop_cnt > 0); ++ ++ if (loop_cnt == 0) { ++ APRINT("%s: happen to timeout!!\n", __func__); ++ isu_ins_cb_function(prv, R_VSPM_DRIVER_ERR); ++ isu_ins_cb_function(prv, R_VSPM_DRIVER_ERR); ++ } ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_cb_function ++ * Description: Callback function processing. ++ * Returns: void ++ ******************************************************************************/ ++void isu_ins_cb_function(struct isu_prv_data *prv, long ercd) ++{ ++ struct isu_ch_info *ch_info; ++ ++ void (*cb_func) ++ (unsigned long id, long ercd, void *userdata); ++ unsigned long id; ++ void *userdata; ++ ++ /* check parameter */ ++ if (!prv) { ++ APRINT("%s: private data is null!!\n", __func__); ++ return; ++ } ++ ++ ch_info = &prv->ch_info; ++ if (ch_info->status == ISU_STAT_RUN) { ++ /* set callback information */ ++ cb_func = ch_info->cb_func; ++ id = 0; ++ userdata = ch_info->cb_userdata; ++ ++ /* update status */ ++ ch_info->status = ISU_STAT_READY; ++ ++ /* callback function */ ++ if (cb_func) ++ cb_func(id, ercd, userdata); ++ } ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_ih ++ * Description: Interrupt handler. ++ * Returns: IRQ_HANDLED ++ ******************************************************************************/ ++static irqreturn_t isu_ins_ih(int irq, void *dev) ++{ ++ struct isu_prv_data *prv = (struct isu_prv_data *)dev; ++ struct isu_ch_info *ch_info; ++ unsigned int status; ++ ++ /* check finished channel */ ++ ch_info = &prv->ch_info; ++ if (ch_info->status == ISU_STAT_RUN) { ++ /* read control register */ ++ status = isu_read_reg(prv->isu_reg, ISU_FM_INT_STA); ++ if (!(ch_info->dl_info)){ ++ if ((status & ISU_INT_FREND) == ISU_INT_FREND) { ++ /* clear interrupt */ ++ isu_write_reg(0, prv->isu_reg, ISU_FM_INT_STA); ++ ++ /* dummy read */ ++ isu_read_reg(prv->isu_reg, ISU_FM_INT_STA); ++ isu_read_reg(prv->isu_reg, ISU_FM_INT_STA); ++ ++ /* callback function */ ++ isu_ins_cb_function(prv, R_VSPM_OK); ++ } ++ } else { ++ if ((status & ISU_INT_LISTERR)==ISU_INT_LISTERR){ ++ /* clear interrupt */ ++ isu_write_reg(0, prv->isu_reg, ISU_FM_INT_STA); ++ ++ /* callback function */ ++ isu_ins_cb_function(prv, E_ISU_DL_FORMAT); ++ } else if ((status&ISU_INT_FREND)==ISU_INT_FREND){ ++ /* clear interrupt */ ++ isu_write_reg(0, prv->isu_reg, ISU_FM_INT_STA); ++ ++ /* dummy read */ ++ isu_read_reg(prv->isu_reg, ISU_FM_INT_STA); ++ isu_read_reg(prv->isu_reg, ISU_FM_INT_STA); ++ ++ /* callback function */ ++ isu_ins_cb_function(prv, R_VSPM_OK); ++ } ++ } ++ } ++ return IRQ_HANDLED; ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_reg_ih ++ * Description: Registory interrupt handler. ++ * Returns: 0/E_ISU_DEF_INH ++ ******************************************************************************/ ++long isu_ins_reg_ih(struct isu_prv_data *prv) ++{ ++ int ercd; ++ ++ /* get irq information from platform */ ++ prv->irq = platform_get_resource(prv->pdev, IORESOURCE_IRQ, 0); ++ if (!prv->irq) { ++ EPRINT("%s: failed to get IRQ resource!!\n", __func__); ++ return E_ISU_DEF_INH; ++ } ++ ++ /* registory interrupt handler */ ++ ercd = request_irq( ++ prv->irq->start, ++ isu_ins_ih, ++ IRQF_SHARED, ++ dev_name(&prv->pdev->dev), ++ prv); ++ if (ercd) { ++ EPRINT("%s: failed to request irq!! ercd=%d, irq=%d\n", ++ __func__, ercd, (int)prv->irq->start); ++ prv->irq = NULL; ++ return E_VSP_DEF_INH; ++ } ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Function: isu_ins_unreg_ih ++ * Description: Unregistory interrupt handler. ++ * Returns: 0 ++ ******************************************************************************/ ++long isu_ins_unreg_ih(struct isu_prv_data *prv) ++{ ++ /* release interrupt handler */ ++ if (prv->irq) { ++ free_irq(prv->irq->start, prv); ++ prv->irq = NULL; ++ } ++ ++ return 0; ++} +diff --git a/vspm-module/files/vspm/drv/isu_drv_public.h b/vspm-module/files/vspm/drv/isu_drv_public.h +new file mode 100644 +index 0000000..96a23f9 +--- /dev/null ++++ b/vspm-module/files/vspm/drv/isu_drv_public.h +@@ -0,0 +1,100 @@ ++/*************************************************************************/ /* ++ * ISUM ++ * ++ * Copyright (C) 2015-2021 Renesas Electronics Corporation ++ * ++ * License Dual MIT/GPLv2 ++ * ++ * The contents of this file are subject to the MIT license as set out below. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a copy ++ * of this software and associated documentation files (the "Software"), to deal ++ * in the Software without restriction, including without limitation the rights ++ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell ++ * copies of the Software, and to permit persons to whom the Software is ++ * furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * Alternatively, the contents of this file may be used under the terms of ++ * the GNU General Public License Version 2 ("GPL") in which case the provisions ++ * of GPL are applicable instead of those above. ++ * ++ * If you wish to allow use of your version of this file only under the terms of ++ * GPL, and not to allow others to use your version of this file under the terms ++ * of the MIT license, indicate your decision by deleting the provisions above ++ * and replace them with the notice and other provisions required by GPL as set ++ * out in the file called "GPL-COPYING" included in this distribution. If you do ++ * not delete the provisions above, a recipient may use your version of this ++ * file under the terms of either the MIT license or GPL. ++ * ++ * This License is also included in this distribution in the file called ++ * "MIT-COPYING". ++ * ++ * EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS ++ * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING ++ * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A ++ * PARTICULAR PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS ++ * OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR ++ * IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * ++ * GPLv2: ++ * If you wish to use this file under the terms of GPL, following terms are ++ * effective. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ /*************************************************************************/ ++ ++#ifndef __ISU_DRV_PUBLIC_H__ ++#define __ISU_DRV_PUBLIC_H__ ++ ++#include "isu_drv.h" ++/* error code */ ++#define E_VSP_DEF_INH (-100) ++#define E_VSP_DEF_REG (-101) ++#define E_VSP_NO_MEM (-102) ++#define E_VSP_NO_INIT (-103) ++#define E_VSP_INVALID_STATE (-105) ++#define E_VSP_NO_CLK (-107) ++#define E_VSP_PARA_CH (-150) ++ ++/* public structure */ ++struct isu_init_t { ++ unsigned int ip_num; ++}; ++ ++struct isu_open_t { ++ struct platform_device *pdev; ++}; ++ ++struct isu_status_t { ++ unsigned int rpf_bits; ++ unsigned int wpf_bits; ++}; ++ ++/* public functions */ ++long isu_lib_init(struct isu_init_t *param); ++long isu_lib_quit(void); ++long isu_lib_open(unsigned char ch, struct isu_open_t *param); ++long isu_lib_close(unsigned char ch); ++long isu_lib_start( ++ unsigned char ch, ++ void *callback, ++ struct isu_start_t *param, ++ void *userdata); ++long isu_lib_abort(unsigned char ch); ++long isu_lib_get_status(unsigned char ch, struct isu_status_t *status); ++long isu_lib_suspend(unsigned char ch); ++long isu_lib_resume(unsigned char ch); ++ ++#endif +diff --git a/vspm-module/files/vspm/drv/manager/vspm_drv_isu.c b/vspm-module/files/vspm/drv/manager/vspm_drv_isu.c +new file mode 100644 +index 0000000..411db09 +--- /dev/null ++++ b/vspm-module/files/vspm/drv/manager/vspm_drv_isu.c +@@ -0,0 +1,357 @@ ++/*************************************************************************/ /* ++ * VSPM ++ * ++ * Copyright (C) 2015-2021 Renesas Electronics Corporation ++ * ++ * License Dual MIT/GPLv2 ++ * ++ * The contents of this file are subject to the MIT license as set out below. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a copy ++ * of this software and associated documentation files (the "Software"), to deal ++ * in the Software without restriction, including without limitation the rights ++ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell ++ * copies of the Software, and to permit persons to whom the Software is ++ * furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * Alternatively, the contents of this file may be used under the terms of ++ * the GNU General Public License Version 2 ("GPL") in which case the provisions ++ * of GPL are applicable instead of those above. ++ * ++ * If you wish to allow use of your version of this file only under the terms of ++ * GPL, and not to allow others to use your version of this file under the terms ++ * of the MIT license, indicate your decision by deleting the provisions above ++ * and replace them with the notice and other provisions required by GPL as set ++ * out in the file called "GPL-COPYING" included in this distribution. If you do ++ * not delete the provisions above, a recipient may use your version of this ++ * file under the terms of either the MIT license or GPL. ++ * ++ * This License is also included in this distribution in the file called ++ * "MIT-COPYING". ++ * ++ * EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS ++ * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING ++ * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A ++ * PARTICULAR PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS ++ * OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR ++ * IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * ++ * GPLv2: ++ * If you wish to use this file under the terms of GPL, following terms are ++ * effective. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ /*************************************************************************/ ++ ++#include ++ ++#include "frame.h" ++ ++#include "vspm_public.h" ++#include "vspm_ip_ctrl.h" ++#include "vspm_main.h" ++#include "vspm_log.h" ++ ++#include "vspm_lib_public.h" ++#include "vspm_common.h" ++ ++#include "isu_drv_public.h" ++ ++/****************************************************************************** ++ * Function: vspm_ins_isu_ch ++ * Description: Get channel number from module_id. ++ * Returns: R_VSPM_OK/R_VSPM_NG ++ ******************************************************************************/ ++long vspm_ins_isu_ch(unsigned short module_id, unsigned char *ch) ++{ ++ /* check range */ ++ if (!IS_ISU_CH(module_id)) { ++ EPRINT("%s: Invalid module ID module_id=%d\n", ++ __func__, module_id); ++ return R_VSPM_NG; ++ } ++ ++ /* set channel */ ++ *ch = (unsigned char)(module_id - VSPM_ISU_CH_OFFSET); ++ ++ return R_VSPM_OK; ++} ++ ++/****************************************************************************** ++ * Function: vspm_cb_vsp ++ * Description: Callback function. ++ * Returns: void ++ ******************************************************************************/ ++static void vspm_cb_vsp(unsigned long id, long ercd, void *userdata) ++{ ++ unsigned long module_id = (unsigned long)userdata; ++ ++ /* callback function */ ++ vspm_inc_ctrl_on_driver_complete((unsigned short)module_id, ercd); ++} ++ ++/****************************************************************************** ++ * Function: vspm_ins_isu_initialize ++ * Description: Initialize ISU driver. ++ * Returns: R_VSPM_OK/R_VSPM_NG ++ ******************************************************************************/ ++long vspm_ins_isu_initialize( ++ struct vspm_usable_res_info *usable, struct vspm_drvdata *pdrv) ++{ ++ struct isu_init_t init_param; ++ struct isu_open_t open_param; ++ ++ long ercd; ++ ++ unsigned int usable_bits = 0; ++ unsigned char ch; ++ int i, j; ++ ++ /* set parameter */ ++ init_param.ip_num = VSPM_ISU_IP_MAX; ++ ++ /* initialize driver */ ++ ercd = isu_lib_init(&init_param); ++ if (ercd) { ++ EPRINT("%s: failed to init!! ercd=%ld\n", __func__, ercd); ++ return R_VSPM_NG; ++ } ++ ++ ch = VSPM_ISU_IP_MAX - 1; ++ for (i = 0; i < VSPM_ISU_IP_MAX; i++) { ++ if (pdrv->isu_pdev[ch]) { ++ /* set parameter */ ++ open_param.pdev = pdrv->isu_pdev[ch]; ++ ++ /* open channel */ ++ ercd = isu_lib_open(ch, &open_param); ++ if (ercd) { ++ EPRINT("%s: failed to open!! (%d, %ld)\n", ++ __func__, ch, ercd); ++ /* forced quit */ ++ (void)isu_lib_quit(); ++ return R_VSPM_NG; ++ } ++ ++ /* set usable channel bits */ ++ for (j = 0; j < VSPM_ISU_CH_MAX; j++) { ++ usable_bits <<= 1; ++ usable_bits |= 0x1; ++ } ++ } else { ++ /* skip usable channel bits */ ++ for (j = 0; j < VSPM_ISU_CH_MAX; j++) ++ usable_bits <<= 1; ++ } ++ ch--; ++ } ++ ++ /* set usable channel bits */ ++ usable_bits <<= VSPM_ISU_CH_OFFSET; ++ usable->ch_bits |= usable_bits; ++ ++ return R_VSPM_OK; ++} ++ ++/****************************************************************************** ++ * Function: vspm_ins_isu_execute ++ * Description: Execute VSP driver. ++ * Returns: R_VSPM_OK/R_VSPM_NG ++ * return of isu_lib_start() ++ ******************************************************************************/ ++long vspm_ins_isu_execute(unsigned short module_id, struct isu_start_t *isu_par) ++{ ++ struct isu_start_t *start_param; ++ unsigned char ch = 0; ++ struct isu_status_t status; ++ long ercd; ++ ++ /* convert module ID to channel */ ++ ercd = vspm_ins_isu_ch(module_id, &ch); ++ if (ercd) ++ return R_VSPM_NG; ++ ++ start_param = (struct isu_start_t *)isu_par; ++ ++ ercd = isu_lib_get_status(ch, &status); ++ if (ercd) { ++ EPRINT("%s: failed to get status!! ercd=%ld\n", __func__, ercd); ++ return R_VSPM_NG; ++ } ++ ++ /* execute VSP process */ ++ ercd = isu_lib_start( ++ ch, ++ (void *)vspm_cb_vsp, ++ start_param, ++ (void *)(unsigned long)module_id); ++ if (ercd) ++ return ercd; ++ ++ return R_VSPM_OK; ++} ++ ++/****************************************************************************** ++ * Function: vspm_ins_isu_exec_complete ++ * Description: Complete VSP driver. ++ * Returns: R_VSPM_OK ++ ******************************************************************************/ ++long vspm_ins_isu_exec_complete(unsigned short module_id) ++{ ++ return R_VSPM_OK; ++} ++ ++/****************************************************************************** ++ * Function: vspm_ins_isu_cancel ++ * Description: Cancel VSP driver. ++ * Returns: R_VSPM_OK/R_VSPM_NG ++ ******************************************************************************/ ++long vspm_ins_isu_cancel(unsigned short module_id) ++{ ++ unsigned char ch = 0; ++ ++ long ercd; ++ ++ /* convert module ID to channel */ ++ ercd = vspm_ins_isu_ch(module_id, &ch); ++ if (ercd) ++ return R_VSPM_NG; ++ ++ /* abort process */ ++ ercd = isu_lib_abort(ch); ++ if (ercd) { ++ EPRINT("%s: failed to cancel!! (%d, %ld)\n", ++ __func__, ch, ercd); ++ return R_VSPM_NG; ++ } ++ ++ return R_VSPM_OK; ++} ++ ++/****************************************************************************** ++ * Function: vspm_ins_isu_quit ++ * Description: Finalize VSP driver. ++ * Returns: R_VSPM_OK/R_VSPM_NG ++ ******************************************************************************/ ++long vspm_ins_isu_quit(struct vspm_usable_res_info *usable) ++{ ++ long ercd; ++ ++ unsigned int usable_bits = 0; ++ int i; ++ ++ /* quit driver with close all channels */ ++ ercd = isu_lib_quit(); ++ if (ercd) { ++ EPRINT("%s: failed to quit!!() ercd=%ld\n", ++ __func__, ercd); ++ return R_VSPM_NG; ++ } ++ ++ /* clear usable channel bits */ ++ for (i = 0; i < VSPM_ISU_CH_NUM; i++) { ++ usable_bits <<= 1; ++ usable_bits |= 0x1; ++ } ++ ++ usable_bits <<= VSPM_ISU_CH_OFFSET; ++ usable->ch_bits &= ~(usable_bits); ++ ++ return R_VSPM_OK; ++} ++ ++/****************************************************************************** ++ * Function: vspm_ins_isu_execute_low_delay ++ * Description: Execute VSP driver VSPM task through. ++ * Returns: R_VSPM_OK/R_VSPM_NG ++ * return of isu_lib_start() ++ ******************************************************************************/ ++long vspm_ins_isu_execute_low_delay( ++ unsigned short module_id, ++ struct vspm_api_param_entry *entry) ++{ ++ struct isu_start_t *start_param; ++ unsigned char ch = 0; ++ struct isu_status_t status; ++ long ercd; ++ ++ /* convert module ID to channel */ ++ ercd = vspm_ins_isu_ch(module_id, &ch); ++ if (ercd) ++ return R_VSPM_NG; ++ ++ start_param = entry->p_ip_par->par.isu; ++ ++ ercd = isu_lib_get_status(ch, &status); ++ if (ercd) { ++ EPRINT("%s: failed to get status!! ercd=%ld\n", __func__, ercd); ++ return R_VSPM_NG; ++ } ++ ++ /* execute ISU process */ ++ ercd = isu_lib_start( ++ ch, ++ (void *)entry->pfn_complete_cb, ++ start_param, ++ entry->user_data); ++ if (ercd) ++ return ercd; ++ ++ return R_VSPM_OK; ++} ++ ++/****************************************************************************** ++ * Function: vspm_ins_isu_suspend ++ * Description: Suspend VSP driver. ++ * Returns: R_VSPM_OK ++ ******************************************************************************/ ++long vspm_ins_isu_suspend(void) ++{ ++ unsigned char ch; ++ long ercd; ++ ++ for (ch = 0; ch < VSPM_ISU_IP_MAX; ch++) { ++ /* suspend */ ++ ercd = isu_lib_suspend(ch); ++ if (ercd != 0) { ++ APRINT("%s: failed to suspend ch=%d\n", ++ __func__, ch); ++ } ++ } ++ ++ return R_VSPM_OK; ++} ++ ++/****************************************************************************** ++ * Function: vspm_ins_isu_resume ++ * Description: Resume VSP driver. ++ * Returns: R_VSPM_OK ++ ******************************************************************************/ ++long vspm_ins_isu_resume(void) ++{ ++ unsigned char ch; ++ long ercd; ++ ++ for (ch = 0; ch < VSPM_ISU_IP_MAX; ch++) { ++ /* resume */ ++ ercd = isu_lib_resume(ch); ++ if (ercd != 0) { ++ APRINT("%s: failed to resume ch=%d\n", ++ __func__, ch); ++ } ++ } ++ ++ return R_VSPM_OK; ++} +diff --git a/vspm-module/files/vspm/drv/vspm_ip_ctrl.h b/vspm-module/files/vspm/drv/vspm_ip_ctrl.h +index 054aa01..a0c854b 100644 +--- a/vspm-module/files/vspm/drv/vspm_ip_ctrl.h ++++ b/vspm-module/files/vspm/drv/vspm_ip_ctrl.h +@@ -1,7 +1,7 @@ + /*************************************************************************/ /* + * VSPM + * +- * Copyright (C) 2015-2017 Renesas Electronics Corporation ++ * Copyright (C) 2015-2021 Renesas Electronics Corporation + * + * License Dual MIT/GPLv2 + * +@@ -69,26 +69,33 @@ enum { + VSPM_TYPE_FDP_CH0, + VSPM_TYPE_FDP_CH1, + VSPM_TYPE_FDP_CH2, ++ /* ISU channel */ ++ VSPM_TYPE_ISU_CH0, + VSPM_CH_MAX + }; + + /* maximum IP number */ + #define VSPM_VSP_IP_MAX (5) + #define VSPM_FDP_IP_MAX (3) ++#define VSPM_ISU_IP_MAX (1) + + /* maximum channel number (per IP) */ + #define VSPM_VSP_CH_MAX (1) + #define VSPM_FDP_CH_MAX (1) ++#define VSPM_ISU_CH_MAX (1) + + /* total channel number */ + #define VSPM_VSP_CH_NUM \ + (VSPM_VSP_IP_MAX * VSPM_VSP_CH_MAX) + #define VSPM_FDP_CH_NUM \ + (VSPM_FDP_IP_MAX * VSPM_FDP_CH_MAX) ++#define VSPM_ISU_CH_NUM \ ++ (VSPM_ISU_IP_MAX * VSPM_ISU_CH_MAX) + + /* offset channel number */ + #define VSPM_VSP_CH_OFFSET VSPM_TYPE_VSP_CH0 + #define VSPM_FDP_CH_OFFSET VSPM_TYPE_FDP_CH0 ++#define VSPM_ISU_CH_OFFSET VSPM_TYPE_ISU_CH0 + + /* judgment macro */ + #define IS_VSP_CH(ch) \ +@@ -97,5 +104,8 @@ enum { + #define IS_FDP_CH(ch) \ + (((ch) >= VSPM_FDP_CH_OFFSET) && \ + ((ch) < (VSPM_FDP_CH_NUM + VSPM_FDP_CH_OFFSET))) ++#define IS_ISU_CH(ch) \ ++ (((ch) >= VSPM_ISU_CH_OFFSET) && \ ++ ((ch) < (VSPM_ISU_CH_NUM + VSPM_ISU_CH_OFFSET))) + + #endif +diff --git a/vspm-module/files/vspm/include/isu_drv.h b/vspm-module/files/vspm/include/isu_drv.h +new file mode 100644 +index 0000000..d97aaff +--- /dev/null ++++ b/vspm-module/files/vspm/include/isu_drv.h +@@ -0,0 +1,232 @@ ++/*************************************************************************/ /* ++ * ISUM ++ * ++ * Copyright (C) 2015-2021 Renesas Electronics Corporation ++ * ++ * License Dual MIT/GPLv2 ++ * ++ * The contents of this file are subject to the MIT license as set out below. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a copy ++ * of this software and associated documentation files (the "Software"), to deal ++ * in the Software without restriction, including without limitation the rights ++ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell ++ * copies of the Software, and to permit persons to whom the Software is ++ * furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * Alternatively, the contents of this file may be used under the terms of ++ * the GNU General Public License Version 2 ("GPL") in which case the provisions ++ * of GPL are applicable instead of those above. ++ * ++ * If you wish to allow use of your version of this file only under the terms of ++ * GPL, and not to allow others to use your version of this file under the terms ++ * of the MIT license, indicate your decision by deleting the provisions above ++ * and replace them with the notice and other provisions required by GPL as set ++ * out in the file called "GPL-COPYING" included in this distribution. If you do ++ * not delete the provisions above, a recipient may use your version of this ++ * file under the terms of either the MIT license or GPL. ++ * ++ * This License is also included in this distribution in the file called ++ * "MIT-COPYING". ++ * ++ * EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS ++ * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING ++ * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A ++ * PARTICULAR PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS ++ * OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR ++ * IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * ++ * GPLv2: ++ * If you wish to use this file under the terms of GPL, following terms are ++ * effective. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ /*************************************************************************/ ++ ++#ifndef _ISU_DRV_H_ ++#define _ISU_DRV_H_ ++ ++/* error code */ ++#define E_ISU_DEF_INH (-100) ++#define E_ISU_DEF_REG (-101) ++#define E_ISU_NO_MEM (-102) ++#define E_ISU_NO_INIT (-103) ++#define E_ISU_INVALID_STATE (-104) ++#define E_ISU_NO_CLK (-105) ++#define E_ISU_PARA_CH (-106) ++ ++#define E_ISU_PARA_CB (-201) ++#define E_ISU_PARA_INPAR (-202) ++ ++#define E_ISU_PARA_NOOUT (-210) ++#define E_ISU_PARA_NOIN (-211) ++#define E_ISU_PARA_IN_ADDR (-212) ++#define E_ISU_PARA_IN_STRD (-213) ++#define E_ISU_PARA_IN_WIDTH (-214) ++#define E_ISU_PARA_IN_HEIGHT (-215) ++#define E_ISU_PARA_IN_FORMAT (-216) ++#define E_ISU_PARA_ALPHA_ASEL (-219) ++ ++#define E_ISU_PARA_OUT_ADDR (-270) ++#define E_ISU_PARA_OUT_STRD (-271) ++#define E_ISU_PARA_OUT_CSC (-272) ++#define E_ISU_PARA_OUT_FORMAT (-275) ++ ++#define E_ISU_PARA_RS_CROP (-351) ++#define E_ISU_PARA_RS_RATIO (-352) /* illegal ratio */ ++#define E_ISU_PARA_RS_START (-353) /* illegal resize start pos */ ++#define E_ISU_PARA_RS_PAD (-354) /* illegal pad selection */ ++#define E_ISU_PARA_RS_TUNE (-355) /* illegal tune */ ++ ++#define E_ISU_PARA_DL_ADDR (-680) ++#define E_ISU_PARA_DL_SIZE (-681) ++#define E_ISU_DL_FORMAT (-682) ++ ++#define ISU_RS_USE (0x01) /* Resizer */ ++ ++/* lower-bit alpha value extension/compress method set */ ++#define ISU_AEXT_COPY (0x00) /* copied */ ++#define ISU_AEXT_EXPAN (0x01) /* extended */ ++#define ISU_AEXT_COMP (0x02) /* compressed */ ++#define ISU_AEXT_CONV (0x03) /* converted */ ++ ++/* RPF module parameter */ ++/* ISU image format */ ++#define ISU_ARGB1555 (0x00) ++#define ISU_RGB565 (0x01) ++#define ISU_BGR666 (0x02) ++#define ISU_RGB888 (0x03) ++#define ISU_BGR888 (0x04) ++#define ISU_ARGB8888 (0x05) ++#define ISU_RGBA8888 (0x06) ++#define ISU_ABGR8888 (0x07) ++#define ISU_YUV422_UYVY (0x20) ++#define ISU_YUV422_YUY2 (0x21) ++#define ISU_YUV422_NV16 (0x22) ++#define ISU_YUV420_NV12 (0x23) ++#define ISU_RAW8 (0x30) ++#define ISU_RAW10 (0x31) ++#define ISU_RAW12 (0x32) ++ ++/* swap setting */ ++#define ISU_SWAP_NO (0x00) /* disable */ ++#define ISU_SWAP_B (0x01) /* byte units */ ++#define ISU_SWAP_W (0x02) /* word units */ ++#define ISU_SWAP_L (0x04) /* longword units */ ++#define ISU_SWAP_LL (0x08) /* LONG LWORD units */ ++ ++/* maximum number steps tunning */ ++#define ISU_TUNE_MAX (4096) ++ ++/* clip index */ ++#define CLIP_MIN_INX 0 ++#define CLIP_MAX_INX 1 ++ ++/* color space conversion */ ++#define ISU_CSC_CUSTOM (0x00) /* enable with user custom */ ++#define ISU_CSC_RAW (0x01) /* enable with 709 standard */ ++#define ISU_LAYER_NUM (3) ++#define ISU_OFFSET_NUM (2) ++#define ISU_CLIP_NUM (2) ++ ++/* select of color space conversion scale */ ++#define ISU_ITU_COLOR (0x00) /* YUV[16,235/140] <-> RGB[0,255] */ ++#define ISU_FULL_COLOR (0x01) /* Full scale */ ++ ++/* alpha bit counte conversion selection */ ++#define ISU_ALPHA_8BIT (0x00) /* 8bit alpha is converted to 1bit */ ++#define ISU_ALPHA_1BIT (0x01) /* alpha value goes through */ ++ ++/* PAD data select */ ++#define ISU_PAD_P (0x00) ++#define ISU_PAD_IN (0x01) ++ ++/* color data clipping method */ ++#define ISU_CLMD_NO (0x00) /* not clipped */ ++#define ISU_CLMD_MODE1 (0x01) /* YCbCr mode1 */ ++#define ISU_CLMD_MODE2 (0x02) /* YCbCr mode2 */ ++ ++struct isu_alpha_unit_t { ++ unsigned char asel; ++ unsigned char anum0; ++ unsigned char anum1; ++ unsigned char anum2; ++ unsigned char athres0; ++ unsigned char athres1; ++}; ++ ++struct isu_td_unit_t { ++ unsigned char grada_mode; ++ unsigned char grada_step; ++ unsigned int init_val; ++}; ++ ++struct isu_csc_t { ++ unsigned char csc; ++ unsigned int k_matrix[3][3]; ++ unsigned int offset[3][2]; ++ unsigned int clip[3][2]; ++}; ++ ++struct isu_src_t { ++ unsigned long addr; ++ unsigned long addr_c; ++ unsigned int stride; ++ unsigned int stride_c; ++ unsigned int width; ++ unsigned int height; ++ unsigned char format ; ++ unsigned char swap; ++ struct isu_td_unit_t *td ; ++ struct isu_alpha_unit_t *alpha ; ++ unsigned char uv_conv; ++}; ++ ++struct isu_dst_t { ++ unsigned long addr; ++ unsigned int addr_c; ++ unsigned short stride; ++ unsigned short stride_c; ++ unsigned short width; ++ unsigned short height; ++ unsigned short format ; ++ unsigned char swap; ++ struct isu_csc_t *csc; ++ struct isu_alpha_unit_t *alpha ; ++}; ++ ++ ++/* RS parameter */ ++struct isu_rs_t { ++ unsigned int start_x; ++ unsigned int start_y; ++ unsigned int tune_x; ++ unsigned int tune_y; ++ unsigned int crop_w; ++ unsigned int crop_h; ++ unsigned char pad_mode; ++ unsigned int pad_val; ++ unsigned short x_ratio ; ++ unsigned short y_ratio ; ++}; ++ ++ ++struct isu_start_t { ++ struct isu_src_t *src_par; /* source parameter */ ++ struct isu_dst_t *dst_par; /* destination parameter */ ++ struct isu_rs_t *rs_par ; /* Resizer parameter */ ++ unsigned long dl_hard_addr; /* work memory for DL */ ++}; ++#endif +diff --git a/vspm-module/files/vspm/include/vspm_cmn.h b/vspm-module/files/vspm/include/vspm_cmn.h +index 41ae8b9..78f0bfc 100644 +--- a/vspm-module/files/vspm/include/vspm_cmn.h ++++ b/vspm-module/files/vspm/include/vspm_cmn.h +@@ -1,7 +1,7 @@ + /*************************************************************************/ /* + * VSPM + * +- * Copyright (C) 2015-2017 Renesas Electronics Corporation ++ * Copyright (C) 2015-2021 Renesas Electronics Corporation + * + * License Dual MIT/GPLv2 + * +@@ -89,7 +89,8 @@ enum { + /* select IP */ + enum { + VSPM_TYPE_VSP_AUTO = 0, +- VSPM_TYPE_FDP_AUTO ++ VSPM_TYPE_FDP_AUTO , ++ VSPM_TYPE_ISU_AUTO + }; + + /* Job priority */ +@@ -128,6 +129,7 @@ struct vspm_init_t { + unsigned short type; + union { + struct vspm_init_vsp_t *vsp; ++ struct vspm_init_vsp_t *isu; + struct vspm_init_fdp_t *fdp; + } par; + }; +@@ -138,6 +140,7 @@ struct vspm_job_t { + union { + struct vsp_start_t *vsp; + struct fdp_start_t *fdp; ++ struct isu_start_t *isu; + } par; + }; + +diff --git a/vspm-module/files/vspm/include/vspm_public.h b/vspm-module/files/vspm/include/vspm_public.h +index 29c990c..0dca03f 100644 +--- a/vspm-module/files/vspm/include/vspm_public.h ++++ b/vspm-module/files/vspm/include/vspm_public.h +@@ -1,7 +1,7 @@ + /*************************************************************************/ /* + * VSPM + * +- * Copyright (C) 2015-2017 Renesas Electronics Corporation ++ * Copyright (C) 2015-2021 Renesas Electronics Corporation + * + * License Dual MIT/GPLv2 + * +@@ -60,6 +60,7 @@ + + #include "vsp_drv.h" + #include "fdp_drv.h" ++#include "isu_drv.h" + #include "vspm_cmn.h" + + /* callback function */ +-- +2.17.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0002-Add-option-ISU_CSC_RAW.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0002-Add-option-ISU_CSC_RAW.patch new file mode 100755 index 0000000000000000000000000000000000000000..bca465f2565acad4b960c41b70c3b00c1d3a08bc --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0002-Add-option-ISU_CSC_RAW.patch @@ -0,0 +1,61 @@ +From 62303e691c346f430c1b650fb3a963199b24c087 Mon Sep 17 00:00:00 2001 +From: Nhat Thieu +Date: Mon, 12 Jul 2021 12:03:38 +0700 +Subject: [PATCH 2/2] Add option ISU_CSC_RAW + + Option ISU_CSC_RAW to support color conversion RAW -> RGB and +RAW -> YUV + +Signed-off-by: Nhat Thieu +--- + vspm-module/files/vspm/drv/isu/isu_drv_par.c | 27 ++++++++++++++++++-- + 1 file changed, 25 insertions(+), 2 deletions(-) + +diff --git a/vspm-module/files/vspm/drv/isu/isu_drv_par.c b/vspm-module/files/vspm/drv/isu/isu_drv_par.c +index 1ab4120..dc1df63 100755 +--- a/vspm-module/files/vspm/drv/isu/isu_drv_par.c ++++ b/vspm-module/files/vspm/drv/isu/isu_drv_par.c +@@ -304,6 +304,18 @@ static long isu_ins_check_wpf_param( struct isu_ch_info *ch_info, + /* set data swapping parameter */ + wpf_info->swap = (unsigned int)(dst_par->swap); + ++ for (i = 0; i < ISU_LAYER_NUM; i++) { ++ for (j = 0; j < ISU_LAYER_NUM; j++) { ++ wpf_info->k_matrix[i][j] = 0; ++ } ++ } ++ for (i = 0; i < ISU_LAYER_NUM; i++) { ++ for (j = 0; j < ISU_OFFSET_NUM; j++) { ++ wpf_info->offset[i][j] = 0; ++ wpf_info->clip[i][j] = 0xFF00; ++ } ++ } ++ + /* check color space conversion parameter */ + if (dst_par->csc) { + switch (dst_par->csc->csc){ +@@ -322,8 +334,19 @@ static long isu_ins_check_wpf_param( struct isu_ch_info *ch_info, + } + } + break; +- case ISU_CSC_601: +- case ISU_CSC_709: ++ case ISU_CSC_RAW: ++ if((wpf_info->format>=ISU_ARGB1555) ++ &&(wpf_info->format<=ISU_ABGR8888)){ ++ wpf_info->k_matrix[0][0] = 0x400; ++ wpf_info->k_matrix[1][0] = 0x400; ++ wpf_info->k_matrix[2][0] = 0x400; ++ } ++ if((wpf_info->format>=ISU_YUV422_UYVY) ++ &&(wpf_info->format<=ISU_YUV420_NV12)){ ++ wpf_info->k_matrix[0][0] = 0x400; ++ wpf_info->offset[1][1] = 128; ++ wpf_info->offset[2][1] = 128; ++ } + break; + default: + return E_ISU_PARA_OUT_CSC; +-- +2.17.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0003-Add-ISU-to-VSPM.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0003-Add-ISU-to-VSPM.patch new file mode 100755 index 0000000000000000000000000000000000000000..ad9e6645e27e4cc7212d73a97535f1722ccce395 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0003-Add-ISU-to-VSPM.patch @@ -0,0 +1,429 @@ +From 50ebfd1896c3f8ee56e8d81e412606eb78342eb2 Mon Sep 17 00:00:00 2001 +From: Nhat Thieu +Date: Fri, 2 Jul 2021 09:50:24 +0700 +Subject: [PATCH 2/3] Add ISU to VSPM + +Signed-off-by: Nhat Thieu +--- + .../files/vspm/drv/manager/vspm_common.h | 13 +- + .../files/vspm/drv/manager/vspm_control.c | 43 +++++- + vspm-module/files/vspm/drv/vspm_main.c | 138 +++++++++++++++++- + vspm-module/files/vspm/drv/vspm_main.h | 7 +- + 4 files changed, 190 insertions(+), 11 deletions(-) + +diff --git a/vspm-module/files/vspm/drv/manager/vspm_common.h b/vspm-module/files/vspm/drv/manager/vspm_common.h +index 0965c81..082c5b1 100644 +--- a/vspm-module/files/vspm/drv/manager/vspm_common.h ++++ b/vspm-module/files/vspm/drv/manager/vspm_common.h +@@ -1,7 +1,7 @@ + /*************************************************************************/ /* + * VSPM + * +- * Copyright (C) 2015-2017 Renesas Electronics Corporation ++ * Copyright (C) 2015-2021 Renesas Electronics Corporation + * + * License Dual MIT/GPLv2 + * +@@ -253,4 +253,15 @@ long vspm_ins_fdp_execute_low_delay( + long vspm_ins_fdp_suspend(void); + long vspm_ins_fdp_resume(void); + ++/* ISU control functions */ ++long vspm_ins_isu_ch(unsigned short module_id, unsigned char *ch); ++long vspm_ins_isu_initialize( ++ struct vspm_usable_res_info *usable, struct vspm_drvdata *pdrv); ++long vspm_ins_isu_cancel(unsigned short module_id); ++long vspm_ins_isu_quit(struct vspm_usable_res_info *usable); ++long vspm_ins_isu_execute_low_delay( ++ unsigned short module_id, ++ struct vspm_api_param_entry *entry); ++long vspm_ins_isu_suspend(void); ++long vspm_ins_isu_resume(void); + #endif /* __VSPM_COMMON_H__ */ +diff --git a/vspm-module/files/vspm/drv/manager/vspm_control.c b/vspm-module/files/vspm/drv/manager/vspm_control.c +index 4ffa6a0..9dd56fd 100644 +--- a/vspm-module/files/vspm/drv/manager/vspm_control.c ++++ b/vspm-module/files/vspm/drv/manager/vspm_control.c +@@ -1,7 +1,7 @@ + /*************************************************************************/ /* + * VSPM + * +- * Copyright (C) 2015-2017 Renesas Electronics Corporation ++ * Copyright (C) 2015-2021 Renesas Electronics Corporation + * + * License Dual MIT/GPLv2 + * +@@ -150,12 +150,12 @@ static unsigned short vspm_ins_ctrl_get_ch_msb(unsigned int bits) + * return of vspm_inc_sort_queue_initialize() + * return of vspm_ins_vsp_initialize() + * return of vspm_ins_fdp_initialize() ++ * return of vspm_ins_isu_initialize() + ******************************************************************************/ + long vspm_ins_ctrl_initialize(struct vspm_drvdata *pdrv) + { + struct vspm_usable_res_info *usable = &g_vspm_ctrl_info.usable_info; + long ercd; +- + /* check parameter */ + if (!pdrv) + return R_VSPM_NG; +@@ -186,6 +186,15 @@ long vspm_ins_ctrl_initialize(struct vspm_drvdata *pdrv) + return ercd; + } + ++ /* initialize ISU driver */ ++ ercd = vspm_ins_isu_initialize(usable, pdrv); ++ if (ercd != R_VSPM_OK) { ++ EPRINT("failed to vspm_ins_isu_initialize %ld\n", ercd); ++ /* forced quit */ ++ (void)vspm_ins_isu_quit(usable); ++ return ercd; ++ } ++ + return R_VSPM_OK; + } + +@@ -215,6 +224,13 @@ long vspm_ins_ctrl_quit(struct vspm_drvdata *pdrv) + return ercd; + } + ++ /* Finalize ISU driver */ ++ ercd = vspm_ins_isu_quit(usable); ++ if (ercd != R_VSPM_OK) { ++ EPRINT("failed to vspm_ins_isu_quit %ld\n", ercd); ++ return ercd; ++ } ++ + return R_VSPM_OK; + } + +@@ -378,6 +394,9 @@ long vspm_ins_ctrl_exec_entry(struct vspm_api_param_entry *entry) + } else if (request->type == VSPM_TYPE_FDP_AUTO) { + /* execute FDP processing */ + ercd = vspm_ins_fdp_execute_low_delay(module_id, entry); ++ } else if (request->type == VSPM_TYPE_ISU_AUTO) { ++ /* execute ISU processing */ ++ ercd = vspm_ins_isu_execute_low_delay(module_id, entry); + } else { + ercd = R_VSPM_NG; + } +@@ -596,6 +615,9 @@ long vspm_ins_ctrl_cancel_entry(struct vspm_privdata *priv) + } else if (request->type == VSPM_TYPE_FDP_AUTO) { + /* cancel FDP processing */ + ercd = vspm_ins_fdp_cancel(module_id); ++ } else if (request->type == VSPM_TYPE_ISU_AUTO) { ++ /* cancel ISU processing */ ++ ercd = vspm_ins_isu_cancel(module_id); + } else { + ercd = R_VSPM_NG; + } +@@ -627,6 +649,10 @@ long vspm_ins_ctrl_mode_param_check( + vspm_ins_mask_low_bits(&bits, VSPM_FDP_CH_NUM); + /* shift channel bits */ + bits <<= VSPM_FDP_CH_OFFSET; ++ } else if (param->type == VSPM_TYPE_ISU_AUTO) { ++ vspm_ins_mask_low_bits(&bits, VSPM_ISU_CH_NUM); ++ /* shift channel bits */ ++ bits <<= VSPM_ISU_CH_OFFSET; + } else { + EPRINT("%s: Invalid type!! type=%d\n", + __func__, param->type); +@@ -717,6 +743,12 @@ long vspm_ins_ctrl_entry_param_check(struct vspm_api_param_entry *entry) + return R_VSPM_PARAERR; + } + break; ++ case VSPM_TYPE_ISU_AUTO: ++ if (!ip_par->par.isu) { ++ EPRINT("%s par.isu is NULL\n", __func__); ++ return R_VSPM_PARAERR; ++ } ++ break; + default: + EPRINT("%s Illegal type 0x%04x\n", + __func__, ip_par->type); +@@ -866,6 +898,13 @@ long vspm_ins_ctrl_assign_channel( + /* get channel from LSB */ + ch_num = vspm_ins_ctrl_get_ch_lsb(assign_bits); + ch_num += VSPM_FDP_CH_OFFSET; ++ } else if (ip_par->type == VSPM_TYPE_ISU_AUTO) { ++ /* shift channel bits */ ++ assign_bits >>= VSPM_ISU_CH_OFFSET; ++ /* bit mask */ ++ vspm_ins_mask_low_bits(&assign_bits, VSPM_ISU_CH_NUM); ++ ch_num = vspm_ins_ctrl_get_ch_lsb(assign_bits); ++ ch_num += VSPM_ISU_CH_OFFSET; + } + + /* check assignment channel number */ +diff --git a/vspm-module/files/vspm/drv/vspm_main.c b/vspm-module/files/vspm/drv/vspm_main.c +index 2e1f09c..f00472c 100644 +--- a/vspm-module/files/vspm/drv/vspm_main.c ++++ b/vspm-module/files/vspm/drv/vspm_main.c +@@ -1,7 +1,7 @@ + /*************************************************************************/ /* + * VSPM + * +- * Copyright (C) 2015-2017 Renesas Electronics Corporation ++ * Copyright (C) 2015-2021 Renesas Electronics Corporation + * + * License Dual MIT/GPLv2 + * +@@ -71,6 +71,8 @@ + #include "vspm_lib_public.h" + #include "vsp_drv_public.h" + ++#define CPG_CLKON_ISU (0x1101055c) ++#define CPG_RST_ISU (0x1101085c) + static struct vspm_drvdata *p_vspm_drvdata; + + /****************************************************************************** +@@ -443,6 +445,75 @@ static int vspm_fdp_remove(struct platform_device *pdev) + return 0; + } + ++static int vspm_isu_probe(struct platform_device *pdev) ++{ ++ struct vspm_drvdata *pdrv = p_vspm_drvdata; ++ struct device_node *np = pdev->dev.of_node; ++ struct clk *clk; ++ int ch; ++ ++ /* get channel */ ++ of_property_read_u32(np, "renesas,#ch", &ch); ++ if (ch < 0) { ++ APRINT("Not find define of renesas,#ch.\n"); ++ return -1; ++ } ++ ++ if (ch >= VSPM_ISU_IP_MAX) { ++ APRINT("Invalid channel!! ch=%d\n", ch); ++ return -1; ++ } ++ ++ if (pdrv->isu_pdev[ch]) { ++ APRINT("Already registered channel!! ch=%d\n", ch); ++ return -1; ++ } ++ ++ /* set clocks */ ++ clk = devm_clk_get(&pdev->dev, ISU_CLK_NAME); ++ if (IS_ERR(clk)) { ++ APRINT("Cannot get %s clock!! ch=%d\n",ISU_CLK_NAME, ch); ++ return -1; ++ } ++ ++ pdrv->isu_clks[ch][0] = clk; ++ ++ /* set driver data */ ++ platform_set_drvdata(pdev, &pdrv->isu_clks[ch]); ++ pdrv->isu_pdev[ch] = pdev; ++ ++ /* set runtime PM */ ++ pm_suspend_ignore_children(&pdev->dev, true); ++ pm_runtime_enable(&pdev->dev); ++ ++ ++ return 0; ++} ++ ++static int vspm_isu_remove(struct platform_device *pdev) ++{ ++ struct vspm_drvdata *pdrv = p_vspm_drvdata; ++ struct device_node *np = pdev->dev.of_node; ++ ++ int ch; ++ ++ /* unset runtime PM */ ++ pm_runtime_disable(&pdev->dev); ++ ++ /* get channel */ ++ of_property_read_u32(np, "renesas,#ch", &ch); ++ ++ /* unset driver data */ ++ platform_set_drvdata(pdev, NULL); ++ pdrv->isu_pdev[ch] = NULL; ++ ++ /* unset clocks */ ++ pdrv->isu_clks[ch][0] = NULL; ++ ++ return 0; ++} ++ ++ + static int vspm_pm_suspend(struct device *dev) + { + struct vspm_drvdata *pdrv = p_vspm_drvdata; +@@ -478,6 +549,7 @@ static int vspm_pm_resume(struct device *dev) + static int vspm_pm_runtime_suspend(struct device *dev) + { + struct platform_device *pdev = to_platform_device(dev); ++ + struct clk **clk = platform_get_drvdata(pdev); + + int i; +@@ -494,9 +566,7 @@ static int vspm_pm_runtime_resume(struct device *dev) + { + struct platform_device *pdev = to_platform_device(dev); + struct clk **clk = platform_get_drvdata(pdev); +- + int i; +- + for (i = 0; i < CLKNUM; i++) { + if (clk[i]) + clk_prepare_enable(clk[i]); +@@ -505,6 +575,34 @@ static int vspm_pm_runtime_resume(struct device *dev) + return 0; + } + ++static int isum_pm_runtime_resume(struct device *dev) ++{ ++ void __iomem *isu_rst; ++ void __iomem *isu_cpg; ++ ++ isu_cpg = ioremap(CPG_CLKON_ISU, 4); ++ writel(0x30003, isu_cpg); ++ ++ isu_rst = ioremap(CPG_RST_ISU, 4); ++ writel(0x30003, isu_rst); ++ ++ return 0; ++} ++ ++static int isum_pm_runtime_suspend(struct device *dev) ++{ ++ void __iomem *isu_rst; ++ void __iomem *isu_cpg; ++ ++ isu_cpg = ioremap(CPG_CLKON_ISU, 4); ++ writel(0x30000, isu_cpg); ++ ++ isu_rst = ioremap(CPG_RST_ISU, 4); ++ writel(0x30000, isu_rst); ++ ++ return 0; ++} ++ + static const struct dev_pm_ops vspm_vsp_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(vspm_pm_suspend, vspm_pm_resume) + SET_RUNTIME_PM_OPS( +@@ -517,6 +615,12 @@ static const struct dev_pm_ops vspm_fdp_pm_ops = { + vspm_pm_runtime_suspend, vspm_pm_runtime_resume, NULL) + }; + ++static const struct dev_pm_ops vspm_isu_pm_ops = { ++ SET_SYSTEM_SLEEP_PM_OPS(vspm_pm_suspend, vspm_pm_resume) ++ SET_RUNTIME_PM_OPS( ++ isum_pm_runtime_suspend, isum_pm_runtime_resume, NULL) ++}; ++ + static const struct of_device_id vspm_vsp_of_match[] = { + { .compatible = "renesas,vspm" }, + { }, +@@ -527,6 +631,10 @@ static const struct of_device_id vspm_fdp_of_match[] = { + { }, + }; + ++static const struct of_device_id vspm_isu_of_match[] = { ++ { .compatible = "renesas,isum" }, ++}; ++ + static struct platform_driver vspm_vsp_driver = { + .driver = { + .name = DEVNAME "-vsp", +@@ -549,26 +657,44 @@ static struct platform_driver vspm_fdp_driver = { + .remove = vspm_fdp_remove, + }; + ++static struct platform_driver vspm_isu_driver = { ++ .driver = { ++ .name = DEVNAME "-isu", ++ .owner = THIS_MODULE, ++ .pm = &vspm_isu_pm_ops, ++ .of_match_table = vspm_isu_of_match, ++ }, ++ .probe = vspm_isu_probe, ++ .remove = vspm_isu_remove, ++}; ++ + static int vspm_platform_driver_register(void) + { + int ercd; + + ercd = platform_driver_register(&vspm_vsp_driver); + if (ercd) { +- APRINT("could not register a driver for "); ++ APRINT("could not register a driver for VSP"); + APRINT("platform-level devices %d\n", ercd); + return ercd; + } + + ercd = platform_driver_register(&vspm_fdp_driver); + if (ercd) { +- APRINT("could not register a driver for "); ++ APRINT("could not register a driver for FDP"); + APRINT("platform-level devices %d\n", ercd); + /* forced quit */ + platform_driver_unregister(&vspm_vsp_driver); + return ercd; + } + ++ ercd = platform_driver_register(&vspm_isu_driver); ++ if (ercd) { ++ APRINT("could not register a driver for ISU "); ++ APRINT("platform-level devices %d\n", ercd); ++ return ercd; ++ } ++ + return 0; + } + +@@ -576,13 +702,13 @@ static void vspm_platform_driver_unregister(void) + { + platform_driver_unregister(&vspm_vsp_driver); + platform_driver_unregister(&vspm_fdp_driver); ++ platform_driver_unregister(&vspm_isu_driver); + } + + static int __init vspm_module_init(void) + { + struct vspm_drvdata *pdrv = NULL; + int ercd = 0; +- + /* allocate vspm driver data area */ + pdrv = kzalloc(sizeof(*pdrv), GFP_KERNEL); + if (!pdrv) { +diff --git a/vspm-module/files/vspm/drv/vspm_main.h b/vspm-module/files/vspm/drv/vspm_main.h +index 45093eb..3e6fdf2 100644 +--- a/vspm-module/files/vspm/drv/vspm_main.h ++++ b/vspm-module/files/vspm/drv/vspm_main.h +@@ -1,7 +1,7 @@ + /*************************************************************************/ /* + * VSPM + * +- * Copyright (C) 2015-2017 Renesas Electronics Corporation ++ * Copyright (C) 2015-2021 Renesas Electronics Corporation + * + * License Dual MIT/GPLv2 + * +@@ -70,7 +70,8 @@ + #define VSP_CLK_NAME "vsp" + #define FDP_CLK_NAME "fdp" + #define FCP_CLK_NAME "fcp" +-#define CLKNUM 2 ++#define ISU_CLK_NAME "isu_aclk" ++#define CLKNUM 2 + + /* vspm driver data structure */ + struct vspm_drvdata { +@@ -78,6 +79,8 @@ struct vspm_drvdata { + struct clk *vsp_clks[VSPM_VSP_IP_MAX][CLKNUM]; + struct platform_device *fdp_pdev[VSPM_FDP_IP_MAX]; + struct clk *fdp_clks[VSPM_FDP_IP_MAX][CLKNUM]; ++ struct platform_device *isu_pdev[VSPM_ISU_IP_MAX]; ++ struct clk *isu_clks[VSPM_ISU_IP_MAX][CLKNUM]; + struct task_struct *task; + atomic_t counter; + atomic_t suspend; +-- +2.17.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0004-Modify-Makefile.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0004-Modify-Makefile.patch new file mode 100755 index 0000000000000000000000000000000000000000..68d5e39900b95987b789e7e050c7af3b855e6715 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0004-Modify-Makefile.patch @@ -0,0 +1,39 @@ +From c25e2b8f77872ca8043bbd5de7b31db95ab6fa57 Mon Sep 17 00:00:00 2001 +From: Nhat Thieu +Date: Fri, 2 Jul 2021 09:50:51 +0700 +Subject: [PATCH 3/3] Modify Makefile + +Signed-off-by: Nhat Thieu +--- + vspm-module/files/vspm/drv/Makefile | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/vspm-module/files/vspm/drv/Makefile b/vspm-module/files/vspm/drv/Makefile +index a6a06bb..e5f3512 100644 +--- a/vspm-module/files/vspm/drv/Makefile ++++ b/vspm-module/files/vspm/drv/Makefile +@@ -1,9 +1,10 @@ + CFILES = vspm_main.c vspm_sub.c + CFILES += frame.c +-CFILES += manager/vspm_control.c manager/vspm_drv_vsp.c manager/vspm_drv_fdp.c manager/vspm_exec_manager.c ++CFILES += manager/vspm_control.c manager/vspm_drv_vsp.c manager/vspm_drv_fdp.c manager/vspm_exec_manager.c manager/vspm_drv_isu.c + CFILES += manager/vspm_job_manager.c manager/vspm_lib.c manager/vspm_sort_queue.c manager/vspm_task.c + CFILES += vsp/vsp_drv.c vsp/vsp_drv_phy.c vsp/vsp_drv_par.c + CFILES += fdp/fdp_drv.c fdp/fdp_drv_l.c ++CFILES += isu/isu_drv.c isu/isu_drv_phy.c isu/isu_drv_par.c + + obj-m += vspm.o + vspm-objs := $(CFILES:.c=.o) +@@ -21,7 +22,9 @@ install: + $(CP) ../include/vspm_cmn.h $(KERNELSRC)/include + $(CP) ../include/vsp_drv.h $(KERNELSRC)/include + $(CP) ../include/fdp_drv.h $(KERNELSRC)/include ++ $(CP) ../include/isu_drv.h $(KERNELSRC)/include + $(CP) ../include/vspm_cmn.h $(INCSHARED) + $(CP) ../include/vsp_drv.h $(INCSHARED) + $(CP) ../include/fdp_drv.h $(INCSHARED) ++ $(CP) ../include/isu_drv.h $(INCSHARED) + +-- +2.17.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0005-remove-work-around-clock-reset-supply.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0005-remove-work-around-clock-reset-supply.patch new file mode 100755 index 0000000000000000000000000000000000000000..dce372521451e5958415836a6feb37ae0a1914c9 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0005-remove-work-around-clock-reset-supply.patch @@ -0,0 +1,100 @@ +From 15ab72a7ada84992da8054ad16f0359c3b2d3680 Mon Sep 17 00:00:00 2001 +From: Nhat Thieu +Date: Tue, 3 Aug 2021 17:20:33 +0700 +Subject: [PATCH] remove work-around clock reset supply + +Signed-off-by: Nhat Thieu +--- + vspm-module/files/vspm/drv/vspm_main.c | 41 +++++++++------------------------- + 1 file changed, 10 insertions(+), 31 deletions(-) + +diff --git a/vspm-module/files/vspm/drv/vspm_main.c b/vspm-module/files/vspm/drv/vspm_main.c +index f00472c..b11adb4 100644 +--- a/vspm-module/files/vspm/drv/vspm_main.c ++++ b/vspm-module/files/vspm/drv/vspm_main.c +@@ -62,6 +62,7 @@ + #include + #include + #include ++#include + + #include "vspm_public.h" + #include "vspm_ip_ctrl.h" +@@ -71,8 +72,6 @@ + #include "vspm_lib_public.h" + #include "vsp_drv_public.h" + +-#define CPG_CLKON_ISU (0x1101055c) +-#define CPG_RST_ISU (0x1101085c) + static struct vspm_drvdata *p_vspm_drvdata; + + /****************************************************************************** +@@ -450,6 +449,7 @@ static int vspm_isu_probe(struct platform_device *pdev) + struct vspm_drvdata *pdrv = p_vspm_drvdata; + struct device_node *np = pdev->dev.of_node; + struct clk *clk; ++ struct reset_control *rstc; + int ch; + + /* get channel */ +@@ -478,6 +478,13 @@ static int vspm_isu_probe(struct platform_device *pdev) + + pdrv->isu_clks[ch][0] = clk; + ++ rstc = devm_reset_control_get(&pdev->dev, NULL); ++ ++ if (IS_ERR(rstc)) ++ dev_warn(&pdev->dev, "Failed to get cpg reset\n"); ++ else ++ reset_control_deassert(rstc); ++ + /* set driver data */ + platform_set_drvdata(pdev, &pdrv->isu_clks[ch]); + pdrv->isu_pdev[ch] = pdev; +@@ -575,34 +582,6 @@ static int vspm_pm_runtime_resume(struct device *dev) + return 0; + } + +-static int isum_pm_runtime_resume(struct device *dev) +-{ +- void __iomem *isu_rst; +- void __iomem *isu_cpg; +- +- isu_cpg = ioremap(CPG_CLKON_ISU, 4); +- writel(0x30003, isu_cpg); +- +- isu_rst = ioremap(CPG_RST_ISU, 4); +- writel(0x30003, isu_rst); +- +- return 0; +-} +- +-static int isum_pm_runtime_suspend(struct device *dev) +-{ +- void __iomem *isu_rst; +- void __iomem *isu_cpg; +- +- isu_cpg = ioremap(CPG_CLKON_ISU, 4); +- writel(0x30000, isu_cpg); +- +- isu_rst = ioremap(CPG_RST_ISU, 4); +- writel(0x30000, isu_rst); +- +- return 0; +-} +- + static const struct dev_pm_ops vspm_vsp_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(vspm_pm_suspend, vspm_pm_resume) + SET_RUNTIME_PM_OPS( +@@ -618,7 +597,7 @@ static const struct dev_pm_ops vspm_fdp_pm_ops = { + static const struct dev_pm_ops vspm_isu_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(vspm_pm_suspend, vspm_pm_resume) + SET_RUNTIME_PM_OPS( +- isum_pm_runtime_suspend, isum_pm_runtime_resume, NULL) ++ vspm_pm_runtime_suspend, vspm_pm_runtime_resume, NULL) + }; + + static const struct of_device_id vspm_vsp_of_match[] = { +-- +2.7.4 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0006-Support-MUTUAL-mode-for-ISU.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0006-Support-MUTUAL-mode-for-ISU.patch new file mode 100755 index 0000000000000000000000000000000000000000..2b39aa347db1a9beaee69320ba02ea8620ab5a89 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0006-Support-MUTUAL-mode-for-ISU.patch @@ -0,0 +1,108 @@ +From e9b778b32efbab1abe0582083123901ccbbc5af2 Mon Sep 17 00:00:00 2001 +From: Nhat Thieu +Date: Mon, 9 Aug 2021 15:32:39 +0700 +Subject: [PATCH 6/6] Support MUTUAL mode for ISU + ++ Support MUTUAL mode for ISU ++ Add UV conv parameters definition + +Signed-off-by: Nhat Thieu +--- + vspm-module/files/vspm/drv/manager/vspm_common.h | 4 ++++ + vspm-module/files/vspm/drv/manager/vspm_drv_isu.c | 8 ++++---- + vspm-module/files/vspm/drv/manager/vspm_exec_manager.c | 9 +++++++++ + vspm-module/files/vspm/include/isu_drv.h | 3 +++ + 4 files changed, 20 insertions(+), 4 deletions(-) + +diff --git a/vspm-module/files/vspm/drv/manager/vspm_common.h b/vspm-module/files/vspm/drv/manager/vspm_common.h +index 082c5b1..afc3066 100644 +--- a/vspm-module/files/vspm/drv/manager/vspm_common.h ++++ b/vspm-module/files/vspm/drv/manager/vspm_common.h +@@ -257,8 +257,12 @@ long vspm_ins_fdp_resume(void); + long vspm_ins_isu_ch(unsigned short module_id, unsigned char *ch); + long vspm_ins_isu_initialize( + struct vspm_usable_res_info *usable, struct vspm_drvdata *pdrv); ++long vspm_ins_isu_exec_complete(unsigned short module_id); + long vspm_ins_isu_cancel(unsigned short module_id); + long vspm_ins_isu_quit(struct vspm_usable_res_info *usable); ++long vspm_ins_isu_execute( ++ unsigned short module_id, ++ struct isu_start_t *isu_par); + long vspm_ins_isu_execute_low_delay( + unsigned short module_id, + struct vspm_api_param_entry *entry); +diff --git a/vspm-module/files/vspm/drv/manager/vspm_drv_isu.c b/vspm-module/files/vspm/drv/manager/vspm_drv_isu.c +index 411db09..8039068 100644 +--- a/vspm-module/files/vspm/drv/manager/vspm_drv_isu.c ++++ b/vspm-module/files/vspm/drv/manager/vspm_drv_isu.c +@@ -90,11 +90,11 @@ long vspm_ins_isu_ch(unsigned short module_id, unsigned char *ch) + } + + /****************************************************************************** +- * Function: vspm_cb_vsp ++ * Function: vspm_cb_isu + * Description: Callback function. + * Returns: void + ******************************************************************************/ +-static void vspm_cb_vsp(unsigned long id, long ercd, void *userdata) ++static void vspm_cb_isu(unsigned long id, long ercd, void *userdata) + { + unsigned long module_id = (unsigned long)userdata; + +@@ -191,10 +191,10 @@ long vspm_ins_isu_execute(unsigned short module_id, struct isu_start_t *isu_par) + return R_VSPM_NG; + } + +- /* execute VSP process */ ++ /* execute ISU process */ + ercd = isu_lib_start( + ch, +- (void *)vspm_cb_vsp, ++ (void *)vspm_cb_isu, + start_param, + (void *)(unsigned long)module_id); + if (ercd) +diff --git a/vspm-module/files/vspm/drv/manager/vspm_exec_manager.c b/vspm-module/files/vspm/drv/manager/vspm_exec_manager.c +index 66c114e..e6df901 100644 +--- a/vspm-module/files/vspm/drv/manager/vspm_exec_manager.c ++++ b/vspm-module/files/vspm/drv/manager/vspm_exec_manager.c +@@ -103,6 +103,10 @@ long vspm_ins_exec_start( + /* Start the FDP process */ + ercd = vspm_ins_fdp_execute( + module_id, ip_par->par.fdp, request); ++ } else if (IS_ISU_CH(module_id)) { ++ /* Start the VSP process */ ++ ercd = vspm_ins_isu_execute( ++ module_id, ip_par->par.isu); + } else { + EPRINT("%s Invalid module_id 0x%04x\n", __func__, module_id); + ercd = R_VSPM_NG; +@@ -137,6 +141,11 @@ long vspm_ins_exec_complete( + ercd = vspm_ins_fdp_exec_complete(module_id); + if (ercd) + return R_VSPM_NG; ++ } else if (IS_ISU_CH(module_id)) { ++ /* ISU process complete */ ++ ercd = vspm_ins_isu_exec_complete(module_id); ++ if (ercd) ++ return R_VSPM_NG; + } else { + EPRINT("%s Invalid module_id 0x%04x\n", __func__, module_id); + return R_VSPM_NG; +diff --git a/vspm-module/files/vspm/include/isu_drv.h b/vspm-module/files/vspm/include/isu_drv.h +index d97aaff..b744b1e 100644 +--- a/vspm-module/files/vspm/include/isu_drv.h ++++ b/vspm-module/files/vspm/include/isu_drv.h +@@ -141,6 +141,9 @@ + #define ISU_OFFSET_NUM (2) + #define ISU_CLIP_NUM (2) + ++/* UV conv */ ++#define ISU_UV_CONV_OFF (0x00) ++#define ISU_UV_CONV_ON (0x01) + /* select of color space conversion scale */ + #define ISU_ITU_COLOR (0x00) /* YUV[16,235/140] <-> RGB[0,255] */ + #define ISU_FULL_COLOR (0x01) /* Full scale */ +-- +2.7.4 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0007-Update-and-fix-some-small-bugs-of-ISU-driver.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0007-Update-and-fix-some-small-bugs-of-ISU-driver.patch new file mode 100755 index 0000000000000000000000000000000000000000..67d4068ea1572c28d865c7b0e438110d98f3182f --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0007-Update-and-fix-some-small-bugs-of-ISU-driver.patch @@ -0,0 +1,218 @@ +From 91f0feb68dec9af7743c1a3056cdf292118b53f0 Mon Sep 17 00:00:00 2001 +From: Nhat Thieu +Date: Wed, 25 Aug 2021 16:23:36 +0700 +Subject: [PATCH 7/7] Update and fix some small bugs of ISU driver + +This commit fixed following issues: + 1. Fix unnecessarily checking addr_c and stride_c in use case RBG and YUV422 + 2. Fix setting x_ratio and y_ratio + 3. Remove width/height from isu_dst_t + 4. Width and height must be even number in case of YUV format. + 5. Update error code + +Signed-off-by: Nhat Thieu +--- + vspm-module/files/vspm/drv/isu/isu_drv_par.c | 46 +++++++++++++++++----------- + vspm-module/files/vspm/include/isu_drv.h | 38 +++++++++++------------ + 2 files changed, 46 insertions(+), 38 deletions(-) + +diff --git a/vspm-module/files/vspm/drv/isu/isu_drv_par.c b/vspm-module/files/vspm/drv/isu/isu_drv_par.c +index 8e73a22..20ffc36 100755 +--- a/vspm-module/files/vspm/drv/isu/isu_drv_par.c ++++ b/vspm-module/files/vspm/drv/isu/isu_drv_par.c +@@ -51,17 +51,18 @@ static long isu_ins_check_rpf_param(struct isu_ch_info *ch_info, + { + struct isu_rpf_info *rpf_info = &ch_info->rpf_info; + unsigned char grada_mode_tmp; ++ char fmt_yuv=0; + + /* check pointer */ + if (!src_par) + return E_ISU_PARA_NOIN; + + /* check input addr 32 boundary */ +- if ((src_par->addr%32)||(src_par->addr_c%32)) ++ if (src_par->addr%32) + return E_ISU_PARA_IN_ADDR; + + /* check stride 32 boundary */ +- if ((src_par->stride%32)||(src_par->stride_c%32)) ++ if (src_par->stride%32) + return E_ISU_PARA_IN_STRD; + + /* check input format */ +@@ -77,14 +78,17 @@ static long isu_ins_check_rpf_param(struct isu_ch_info *ch_info, + case ISU_RAW8: + case ISU_RAW10: + case ISU_RAW12: ++ break; + case ISU_YUV422_UYVY: + case ISU_YUV422_YUY2: ++ fmt_yuv=1; + break; + case ISU_YUV422_NV16: + case ISU_YUV420_NV12: +- if(!src_par->addr_c) ++ fmt_yuv=1; ++ if((!src_par->addr_c)||(src_par->addr_c%32)) + return E_ISU_PARA_IN_ADDR; +- if(!src_par->stride_c) ++ if((!src_par->stride_c)||(src_par->stride_c%32)) + return E_ISU_PARA_IN_STRD; + break; + default: +@@ -117,13 +121,13 @@ static long isu_ins_check_rpf_param(struct isu_ch_info *ch_info, + rpf_info->swap = (unsigned int)(src_par->swap); + + /* check basic area */ +- if (src_par->width < 1 || src_par->width > 2800) ++ if ((src_par->width < 1) || (src_par->width > 2800) || ((fmt_yuv)&&(src_par->width%2))) + return E_ISU_PARA_IN_WIDTH; + else { + rpf_info->width = src_par->width; + } + +- if (src_par->height < 1 || src_par->height > 2047) ++ if ((src_par->height < 1) || (src_par->height > 2047) || ((fmt_yuv)&&(src_par->height%2))) + return E_ISU_PARA_IN_HEIGHT; + else { + rpf_info->height = src_par->height; +@@ -155,7 +159,7 @@ static long isu_ins_check_rpf_param(struct isu_ch_info *ch_info, + * Returns: + ******************************************************************************/ + static long isu_ins_check_rs_param(struct isu_ch_info *ch_info, +- struct isu_rs_t *rs_param) ++ struct isu_rs_t *rs_param, struct isu_dst_t *dst_par) + { + struct isu_rpf_info *rpf_info = &ch_info->rpf_info; + struct isu_rs_info *rs_info = &ch_info->rs_info; +@@ -178,13 +182,19 @@ static long isu_ins_check_rs_param(struct isu_ch_info *ch_info, + } + + /* Check output size */ +- if ((rs_param->crop_w < 1)||(rs_param->crop_w > 1920)|| +- (rs_param->crop_h < 1) ||(rs_param->crop_h > 1080)) +- return E_ISU_PARA_RS_CROP; +- else { ++ if ((rs_param->crop_w < 1)||(rs_param->crop_w > 1920)) ++ return E_ISU_PARA_RS_CROP_WIDTH; ++ else if ((dst_par->format >= ISU_YUV422_UYVY) && (dst_par->format <= ISU_YUV420_NV12) && (rs_param->crop_w%2)) ++ return E_ISU_PARA_RS_CROP_WIDTH; ++ else + rs_info->crop_w = rs_param->crop_w; ++ ++ if ((rs_param->crop_h < 1) ||(rs_param->crop_h > 1080)) ++ return E_ISU_PARA_RS_CROP_HEIGHT; ++ else if ((dst_par->format >= ISU_YUV422_UYVY) && (dst_par->format <= ISU_YUV420_NV12) && (rs_param->crop_h%2)) ++ return E_ISU_PARA_RS_CROP_HEIGHT; ++ else + rs_info->crop_h = rs_param->crop_h; +- } + + /* Check pad mode */ + switch(rs_param->pad_mode){ +@@ -198,7 +208,7 @@ static long isu_ins_check_rs_param(struct isu_ch_info *ch_info, + return E_ISU_PARA_RS_PAD; + } + /* Check ratio scale */ +- if((rs_param->x_ratio & 0x0000F000)||(rs_param->y_ratio & 0x0000F000)) { ++ if((rs_param->x_ratio & 0x0000F000)&&(rs_param->y_ratio & 0x0000F000)) { + rs_info->x_scale = ((unsigned int)rs_param->x_ratio >> 12) << 16; + rs_info->x_scale |= ((unsigned int)rs_param->x_ratio); + rs_info->y_scale = ((unsigned int)rs_param->y_ratio >> 12) << 16; +@@ -240,7 +250,7 @@ static long isu_ins_check_connection_module_from_rpf(struct isu_prv_data *prv, + return ercd; + + /* check module parameter */ +- ercd = isu_ins_check_rs_param(ch_info, param->rs_par); ++ ercd = isu_ins_check_rs_param(ch_info, param->rs_par, param->dst_par); + if (ercd) + return ercd; + } +@@ -263,11 +273,11 @@ static long isu_ins_check_wpf_param( struct isu_ch_info *ch_info, + return E_ISU_PARA_NOOUT; + + /* check format parameter */ +- if ((dst_par->addr%512)||(dst_par->addr_c%512)) ++ if (dst_par->addr%512) + return E_ISU_PARA_OUT_ADDR; + + /* check stride 32 boundary */ +- if ((dst_par->stride%32)||(dst_par->stride_c%32)) ++ if (dst_par->stride%32) + return E_ISU_PARA_OUT_STRD; + + /* check format parameter */ +@@ -288,9 +298,9 @@ static long isu_ins_check_wpf_param( struct isu_ch_info *ch_info, + break; + case ISU_YUV422_NV16: + case ISU_YUV420_NV12: +- if(!dst_par->addr_c) ++ if((!dst_par->addr_c)||(dst_par->addr_c%512)) + return E_ISU_PARA_OUT_ADDR; +- if(!dst_par->stride_c) ++ if((!dst_par->stride_c)||(dst_par->stride_c%32)) + return E_ISU_PARA_OUT_STRD; + break; + default: +diff --git a/vspm-module/files/vspm/include/isu_drv.h b/vspm-module/files/vspm/include/isu_drv.h +index d97aaff..8c1eae5 100644 +--- a/vspm-module/files/vspm/include/isu_drv.h ++++ b/vspm-module/files/vspm/include/isu_drv.h +@@ -72,26 +72,26 @@ + + #define E_ISU_PARA_NOOUT (-210) + #define E_ISU_PARA_NOIN (-211) +-#define E_ISU_PARA_IN_ADDR (-212) +-#define E_ISU_PARA_IN_STRD (-213) +-#define E_ISU_PARA_IN_WIDTH (-214) +-#define E_ISU_PARA_IN_HEIGHT (-215) +-#define E_ISU_PARA_IN_FORMAT (-216) +-#define E_ISU_PARA_ALPHA_ASEL (-219) +- +-#define E_ISU_PARA_OUT_ADDR (-270) +-#define E_ISU_PARA_OUT_STRD (-271) +-#define E_ISU_PARA_OUT_CSC (-272) +-#define E_ISU_PARA_OUT_FORMAT (-275) +- +-#define E_ISU_PARA_RS_CROP (-351) +-#define E_ISU_PARA_RS_RATIO (-352) /* illegal ratio */ +-#define E_ISU_PARA_RS_START (-353) /* illegal resize start pos */ +-#define E_ISU_PARA_RS_PAD (-354) /* illegal pad selection */ +-#define E_ISU_PARA_RS_TUNE (-355) /* illegal tune */ ++#define E_ISU_PARA_IN_ADDR (-412) ++#define E_ISU_PARA_IN_STRD (-413) ++#define E_ISU_PARA_IN_WIDTH (-414) ++#define E_ISU_PARA_IN_HEIGHT (-415) ++#define E_ISU_PARA_IN_FORMAT (-416) ++#define E_ISU_PARA_ALPHA_ASEL (-419) ++ ++#define E_ISU_PARA_OUT_ADDR (-470) ++#define E_ISU_PARA_OUT_STRD (-471) ++#define E_ISU_PARA_OUT_CSC (-472) ++#define E_ISU_PARA_OUT_FORMAT (-475) ++ ++#define E_ISU_PARA_RS_CROP_WIDTH (-550) ++#define E_ISU_PARA_RS_CROP_HEIGHT (-551) ++#define E_ISU_PARA_RS_RATIO (-552) /* illegal ratio */ ++#define E_ISU_PARA_RS_START (-553) /* illegal resize start pos */ ++#define E_ISU_PARA_RS_PAD (-554) /* illegal pad selection */ ++#define E_ISU_PARA_RS_TUNE (-555) /* illegal tune */ + + #define E_ISU_PARA_DL_ADDR (-680) +-#define E_ISU_PARA_DL_SIZE (-681) + #define E_ISU_DL_FORMAT (-682) + + #define ISU_RS_USE (0x01) /* Resizer */ +@@ -199,8 +199,6 @@ struct isu_dst_t { + unsigned int addr_c; + unsigned short stride; + unsigned short stride_c; +- unsigned short width; +- unsigned short height; + unsigned short format ; + unsigned char swap; + struct isu_csc_t *csc; +-- +2.7.4 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0008-Correcting-variable-type.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0008-Correcting-variable-type.patch new file mode 100755 index 0000000000000000000000000000000000000000..2ee74c56b1d166697be3c2034ccb5a301ce74ab8 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0008-Correcting-variable-type.patch @@ -0,0 +1,152 @@ +From 65c94774343f6f542fa191e3088e9a8a672da596 Mon Sep 17 00:00:00 2001 +From: Nhat Thieu +Date: Thu, 9 Sep 2021 12:54:52 +0700 +Subject: [PATCH 8/8] Correcting variable type + +Correcting variable type following its size in HW manual + +Signed-off-by: Nhat Thieu +--- + vspm-module/files/vspm/drv/isu/isu_drv_local.h | 38 +++++++++++++------------- + vspm-module/files/vspm/include/isu_drv.h | 34 +++++++++++------------ + 2 files changed, 36 insertions(+), 36 deletions(-) + +diff --git a/vspm-module/files/vspm/drv/isu/isu_drv_local.h b/vspm-module/files/vspm/drv/isu/isu_drv_local.h +index a5a970b..c015071 100755 +--- a/vspm-module/files/vspm/drv/isu/isu_drv_local.h ++++ b/vspm-module/files/vspm/drv/isu/isu_drv_local.h +@@ -116,12 +116,12 @@ Sets input/ouput, reduction ratio and color conversion coefficient + struct isu_rpf_info { + unsigned long addr; + unsigned long addr_c; +- unsigned int stride; +- unsigned int stride_c; +- unsigned int height; +- unsigned int width; ++ unsigned short stride; ++ unsigned short stride_c; ++ unsigned short height; ++ unsigned short width; + unsigned char format; +- unsigned int swap; /* Data swap for input images */ ++ unsigned char swap; /* Data swap for input images */ + unsigned int rpf_alpha_val; + unsigned int src_td1; + unsigned int src_td2; +@@ -130,13 +130,13 @@ struct isu_rpf_info { + + /* Scaling factor information */ + struct isu_rs_info { +- unsigned int start_x; +- unsigned int start_y; +- unsigned int tune_x; +- unsigned int tune_y; +- unsigned int crop_w; +- unsigned int crop_h; +- unsigned int pad_mode; ++ unsigned short start_x; ++ unsigned short start_y; ++ unsigned short tune_x; ++ unsigned short tune_y; ++ unsigned short crop_w; ++ unsigned short crop_h; ++ unsigned char pad_mode; + unsigned int pad_val; + unsigned int x_scale; + unsigned int y_scale; +@@ -146,17 +146,17 @@ struct isu_rs_info { + struct isu_wpf_info { + unsigned long addr; + unsigned long addr_c; +- unsigned int stride; +- unsigned int stride_c; ++ unsigned short stride; ++ unsigned short stride_c; + unsigned char format; +- unsigned int swap; ++ unsigned char swap; + unsigned int alpha_asel1; + unsigned int alpha_asel2; + unsigned int alpha_val; +- unsigned int ccol; +- unsigned int k_matrix[3][3]; +- unsigned int offset[3][2]; +- unsigned int clip[3][2]; ++ unsigned char ccol; ++ unsigned short k_matrix[3][3]; ++ unsigned short offset[3][2]; ++ unsigned short clip[3][2]; + }; + + /* channel information structure */ +diff --git a/vspm-module/files/vspm/include/isu_drv.h b/vspm-module/files/vspm/include/isu_drv.h +index 3aff50b..9a13d1c 100644 +--- a/vspm-module/files/vspm/include/isu_drv.h ++++ b/vspm-module/files/vspm/include/isu_drv.h +@@ -178,18 +178,18 @@ struct isu_td_unit_t { + + struct isu_csc_t { + unsigned char csc; +- unsigned int k_matrix[3][3]; +- unsigned int offset[3][2]; +- unsigned int clip[3][2]; ++ unsigned short k_matrix[3][3]; ++ unsigned short offset[3][2]; ++ unsigned short clip[3][2]; + }; + + struct isu_src_t { + unsigned long addr; + unsigned long addr_c; +- unsigned int stride; +- unsigned int stride_c; +- unsigned int width; +- unsigned int height; ++ unsigned short stride; ++ unsigned short stride_c; ++ unsigned short width; ++ unsigned short height; + unsigned char format ; + unsigned char swap; + struct isu_td_unit_t *td ; +@@ -199,10 +199,10 @@ struct isu_src_t { + + struct isu_dst_t { + unsigned long addr; +- unsigned int addr_c; ++ unsigned long addr_c; + unsigned short stride; + unsigned short stride_c; +- unsigned short format ; ++ unsigned char format ; + unsigned char swap; + struct isu_csc_t *csc; + struct isu_alpha_unit_t *alpha ; +@@ -211,16 +211,16 @@ struct isu_dst_t { + + /* RS parameter */ + struct isu_rs_t { +- unsigned int start_x; +- unsigned int start_y; +- unsigned int tune_x; +- unsigned int tune_y; +- unsigned int crop_w; +- unsigned int crop_h; ++ unsigned short start_x; ++ unsigned short start_y; ++ unsigned short tune_x; ++ unsigned short tune_y; ++ unsigned short crop_w; ++ unsigned short crop_h; + unsigned char pad_mode; + unsigned int pad_val; +- unsigned short x_ratio ; +- unsigned short y_ratio ; ++ unsigned int x_ratio ; ++ unsigned int y_ratio ; + }; + + +-- +2.7.4 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0009-Wrong-initialize-value-of-clip.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0009-Wrong-initialize-value-of-clip.patch new file mode 100644 index 0000000000000000000000000000000000000000..846e9179db733ad901e8402bed786d7e47cc3442 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0009-Wrong-initialize-value-of-clip.patch @@ -0,0 +1,38 @@ +From f900449e00f7452114084b5c0fafcd6261fc3be4 Mon Sep 17 00:00:00 2001 +From: Nhat Thieu +Date: Wed, 29 Sep 2021 09:51:24 +0700 +Subject: [PATCH 09/10] Wrong initialize value of clip + +Fix initialize value of clip in case setting ISU_CSC_RAW + +Signed-off-by: Nhat Thieu +--- + vspm-module/files/vspm/drv/isu/isu_drv_par.c | 9 ++++----- + 1 file changed, 4 insertions(+), 5 deletions(-) + +diff --git a/vspm-module/files/vspm/drv/isu/isu_drv_par.c b/vspm-module/files/vspm/drv/isu/isu_drv_par.c +index 20ffc36..97acd61 100755 +--- a/vspm-module/files/vspm/drv/isu/isu_drv_par.c ++++ b/vspm-module/files/vspm/drv/isu/isu_drv_par.c +@@ -317,15 +317,14 @@ static long isu_ins_check_wpf_param( struct isu_ch_info *ch_info, + wpf_info->swap = (unsigned int)(dst_par->swap); + + for (i = 0; i < ISU_LAYER_NUM; i++) { +- for (j = 0; j < ISU_LAYER_NUM; j++) { ++ for (j = 0; j < ISU_OFFSET_NUM; j++) { + wpf_info->k_matrix[i][j] = 0; ++ wpf_info->offset[i][j] = 0; + } + } + for (i = 0; i < ISU_LAYER_NUM; i++) { +- for (j = 0; j < ISU_OFFSET_NUM; j++) { +- wpf_info->offset[i][j] = 0; +- wpf_info->clip[i][j] = 0xFF00; +- } ++ wpf_info->clip[i][0] = 0; ++ wpf_info->clip[i][1] = 0xFF; + } + + /* check color space conversion parameter */ +-- +2.7.4 diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0010-Fix-wrong-output-size-in-setting-case-rs_par-is-NULL.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0010-Fix-wrong-output-size-in-setting-case-rs_par-is-NULL.patch new file mode 100644 index 0000000000000000000000000000000000000000..1561a036aee7225a6895ed9e5514a92155f602eb --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0010-Fix-wrong-output-size-in-setting-case-rs_par-is-NULL.patch @@ -0,0 +1,89 @@ +From 4ec67d5d6cd6b553cccf87888b0918cd546ef3a0 Mon Sep 17 00:00:00 2001 +From: Nhat Thieu +Date: Wed, 3 Nov 2021 10:04:32 +0700 +Subject: [PATCH 10/10] Fix wrong output size in setting case rs_par is NULL + +Signed-off-by: Nhat Thieu +--- + vspm-module/files/vspm/drv/isu/isu_drv_par.c | 53 +++++++++++++++++++++++++--- + 1 file changed, 49 insertions(+), 4 deletions(-) + +diff --git a/vspm-module/files/vspm/drv/isu/isu_drv_par.c b/vspm-module/files/vspm/drv/isu/isu_drv_par.c +index 97acd61..ae09b70 100755 +--- a/vspm-module/files/vspm/drv/isu/isu_drv_par.c ++++ b/vspm-module/files/vspm/drv/isu/isu_drv_par.c +@@ -184,14 +184,30 @@ static long isu_ins_check_rs_param(struct isu_ch_info *ch_info, + /* Check output size */ + if ((rs_param->crop_w < 1)||(rs_param->crop_w > 1920)) + return E_ISU_PARA_RS_CROP_WIDTH; +- else if ((dst_par->format >= ISU_YUV422_UYVY) && (dst_par->format <= ISU_YUV420_NV12) && (rs_param->crop_w%2)) ++ else if ((dst_par->format == ++ ISU_YUV422_UYVY || ++ dst_par->format == ++ ISU_YUV422_YUY2 || ++ dst_par->format == ++ ISU_YUV422_NV16 || ++ dst_par->format == ++ ISU_YUV420_NV12) && ++ rs_param->crop_w%2) + return E_ISU_PARA_RS_CROP_WIDTH; + else + rs_info->crop_w = rs_param->crop_w; + + if ((rs_param->crop_h < 1) ||(rs_param->crop_h > 1080)) + return E_ISU_PARA_RS_CROP_HEIGHT; +- else if ((dst_par->format >= ISU_YUV422_UYVY) && (dst_par->format <= ISU_YUV420_NV12) && (rs_param->crop_h%2)) ++ else if ((dst_par->format == ++ ISU_YUV422_UYVY || ++ dst_par->format == ++ ISU_YUV422_YUY2 || ++ dst_par->format == ++ ISU_YUV422_NV16 || ++ dst_par->format == ++ ISU_YUV420_NV12) && ++ rs_param->crop_h%2) + return E_ISU_PARA_RS_CROP_HEIGHT; + else + rs_info->crop_h = rs_param->crop_h; +@@ -220,8 +236,37 @@ static long isu_ins_check_rs_param(struct isu_ch_info *ch_info, + rs_info->start_y = 0; + rs_info->tune_x = 0; + rs_info->tune_y = 0; +- rs_info->crop_w = rpf_info->width; +- rs_info->crop_h = rpf_info->height; ++ ++ if ((rpf_info->width < 1)||(rpf_info->width > 1920)) ++ return E_ISU_PARA_RS_CROP_WIDTH; ++ else if ((dst_par->format == ++ ISU_YUV422_UYVY || ++ dst_par->format == ++ ISU_YUV422_YUY2 || ++ dst_par->format == ++ ISU_YUV422_NV16 || ++ dst_par->format == ++ ISU_YUV420_NV12)&& ++ rpf_info->width%2) ++ return E_ISU_PARA_RS_CROP_WIDTH; ++ else ++ rs_info->crop_w = rpf_info->width; ++ ++ if ((rpf_info->height < 1) ||(rpf_info->height > 1080)) ++ return E_ISU_PARA_RS_CROP_HEIGHT; ++ else if ((dst_par->format == ++ ISU_YUV422_UYVY || ++ dst_par->format == ++ ISU_YUV422_YUY2 || ++ dst_par->format == ++ ISU_YUV422_NV16 || ++ dst_par->format == ++ ISU_YUV420_NV12)&& ++ rpf_info->height%2) ++ return E_ISU_PARA_RS_CROP_HEIGHT; ++ else ++ rs_info->crop_h = rpf_info->height; ++ + rs_info->x_scale |= ISU_RS_NO_RESIZE; + rs_info->y_scale |= ISU_RS_NO_RESIZE; + rs_info->pad_mode=0; +-- +2.7.4 diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0011-Fix-error-cannot-detect-NOOUT-in-case-rs_par-NULL.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0011-Fix-error-cannot-detect-NOOUT-in-case-rs_par-NULL.patch new file mode 100644 index 0000000000000000000000000000000000000000..04a43e43b16f971423a1c80d57a6d0f133db3782 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0011-Fix-error-cannot-detect-NOOUT-in-case-rs_par-NULL.patch @@ -0,0 +1,34 @@ +From 4d90b07765afb139bede6fb465d9afe4a7b115db Mon Sep 17 00:00:00 2001 +From: Nhat Thieu +Date: Wed, 8 Dec 2021 09:43:24 +0700 +Subject: [PATCH 11/11] Fix error cannot detect NOOUT in case rs_par=NULL + +Signed-off-by: Nhat Thieu +--- + vspm-module/files/vspm/drv/isu/isu_drv_par.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/vspm-module/files/vspm/drv/isu/isu_drv_par.c b/vspm-module/files/vspm/drv/isu/isu_drv_par.c +index ae09b70..32a6eb1 100755 +--- a/vspm-module/files/vspm/drv/isu/isu_drv_par.c ++++ b/vspm-module/files/vspm/drv/isu/isu_drv_par.c +@@ -496,13 +496,13 @@ long isu_ins_check_start_parameter(struct isu_prv_data *prv, + struct isu_ch_info *ch_info = &prv->ch_info; + long ercd; + +- /* check connection module parameter (RPF->RS or WPF) */ +- ercd = isu_ins_check_connection_module_from_rpf(prv, param); ++ /* check WPF module parameter */ ++ ercd = isu_ins_check_output_module(ch_info, param); + if (ercd) + return ercd; + +- /* check WPF module parameter */ +- ercd = isu_ins_check_output_module(ch_info, param); ++ /* check connection module parameter (RPF->RS or WPF) */ ++ ercd = isu_ins_check_connection_module_from_rpf(prv, param); + if (ercd) + return ercd; + +-- +2.7.4 diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0012-vspm_main-Update-isu-clock-enable.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0012-vspm_main-Update-isu-clock-enable.patch new file mode 100644 index 0000000000000000000000000000000000000000..9f6d118cb030f83b54a743ad0ad95789a41dcb49 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/files/0012-vspm_main-Update-isu-clock-enable.patch @@ -0,0 +1,104 @@ +From 859e28970c722f45e444c0aefd4e1483f0f096bd Mon Sep 17 00:00:00 2001 +From: Cuong Doan +Date: Wed, 9 Mar 2022 15:31:11 +0700 +Subject: [PATCH] vspm_main: Update isu clock enable. + +Update isu clock enable to fix with kernel 5.10 cpg. + +Signed-off-by: Cuong Doan +--- + vspm-module/files/vspm/drv/vspm_main.c | 35 ++++++++++++++++---------- + vspm-module/files/vspm/drv/vspm_main.h | 5 +++- + 2 files changed, 26 insertions(+), 14 deletions(-) + +diff --git a/vspm-module/files/vspm/drv/vspm_main.c b/vspm-module/files/vspm/drv/vspm_main.c +index b11adb4..65edb84 100644 +--- a/vspm-module/files/vspm/drv/vspm_main.c ++++ b/vspm-module/files/vspm/drv/vspm_main.c +@@ -448,9 +448,12 @@ static int vspm_isu_probe(struct platform_device *pdev) + { + struct vspm_drvdata *pdrv = p_vspm_drvdata; + struct device_node *np = pdev->dev.of_node; ++ char *clk_names[CLKNUM] = {ISU_ACLK_NAME, ISU_PCLK_NAME}; ++ char *reset_names[CLKNUM] = {ISU_ARST_NAME, ISU_PRST_NAME}; + struct clk *clk; + struct reset_control *rstc; + int ch; ++ int i; + + /* get channel */ + of_property_read_u32(np, "renesas,#ch", &ch); +@@ -470,20 +473,24 @@ static int vspm_isu_probe(struct platform_device *pdev) + } + + /* set clocks */ +- clk = devm_clk_get(&pdev->dev, ISU_CLK_NAME); +- if (IS_ERR(clk)) { +- APRINT("Cannot get %s clock!! ch=%d\n",ISU_CLK_NAME, ch); +- return -1; ++ for (i = 0; i < CLKNUM; i++) { ++ clk = devm_clk_get(&pdev->dev, clk_names[i]); ++ if (IS_ERR(clk)) { ++ APRINT("Cannot get %s clock!! ch=%d\n", clk_names[i], ch); ++ for (; i > 0; i--) ++ pdrv->isu_clks[ch][i - 1] = NULL; ++ return -1; ++ } ++ pdrv->isu_clks[ch][i] = clk; + } + +- pdrv->isu_clks[ch][0] = clk; +- +- rstc = devm_reset_control_get(&pdev->dev, NULL); +- +- if (IS_ERR(rstc)) +- dev_warn(&pdev->dev, "Failed to get cpg reset\n"); +- else +- reset_control_deassert(rstc); ++ for (i = 0; i < CLKNUM; i++) { ++ rstc = devm_reset_control_get(&pdev->dev, reset_names[i]); ++ if (IS_ERR(rstc)) ++ dev_warn(&pdev->dev, "Failed to get cpg reset\n"); ++ else ++ reset_control_deassert(rstc); ++ } + + /* set driver data */ + platform_set_drvdata(pdev, &pdrv->isu_clks[ch]); +@@ -503,6 +510,7 @@ static int vspm_isu_remove(struct platform_device *pdev) + struct device_node *np = pdev->dev.of_node; + + int ch; ++ int i; + + /* unset runtime PM */ + pm_runtime_disable(&pdev->dev); +@@ -515,7 +523,8 @@ static int vspm_isu_remove(struct platform_device *pdev) + pdrv->isu_pdev[ch] = NULL; + + /* unset clocks */ +- pdrv->isu_clks[ch][0] = NULL; ++ for (i = 0; i < CLKNUM; i++) ++ pdrv->isu_clks[ch][i] = NULL; + + return 0; + } +diff --git a/vspm-module/files/vspm/drv/vspm_main.h b/vspm-module/files/vspm/drv/vspm_main.h +index 29fdc80..3737d68 100644 +--- a/vspm-module/files/vspm/drv/vspm_main.h ++++ b/vspm-module/files/vspm/drv/vspm_main.h +@@ -70,7 +70,10 @@ + #define VSP_CLK_NAME "vsp" + #define FDP_CLK_NAME "fdp" + #define FCP_CLK_NAME "fcp" +-#define ISU_CLK_NAME "isu_aclk" ++#define ISU_ACLK_NAME "isu_aclk" ++#define ISU_PCLK_NAME "isu_pclk" ++#define ISU_ARST_NAME "aresetn" ++#define ISU_PRST_NAME "presetn" + #define CLKNUM 2 + + /* vspm driver data structure */ +-- +2.17.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/kernel-module-vspm.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/kernel-module-vspm.bb new file mode 100755 index 0000000000000000000000000000000000000000..8704da6d1fd1c92707056fc26c14bf0aa8833830 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspm/kernel-module-vspm.bb @@ -0,0 +1,95 @@ +DESCRIPTION = "VSP Manager for the RZG2" + +LICENSE = "GPLv2 & MIT" +LIC_FILES_CHKSUM = " \ + file://GPL-COPYING;md5=b234ee4d69f5fce4486a80fdaf4a4263 \ + file://MIT-COPYING;md5=0ebf15a927e436cec699371cd890775c \ +" + +inherit module +require include/rzg2-modules-common.inc + +DEPENDS = "linux-myir" +PN = "kernel-module-vspm" +PR = "r0" + +VSPM_DRV_URL = "git://github.com/renesas-rcar/vspm_drv.git" +BRANCH = "rcar_gen3" +SRCREV = "07787fc1168e7fe37c305aca151a6f756f35874f" + +SRC_URI = "${VSPM_DRV_URL};branch=${BRANCH}" + +SRC_URI_append_rzg2l = " \ + file://0001-Add-ISU-driver.patch \ + file://0002-Add-option-ISU_CSC_RAW.patch \ + file://0003-Add-ISU-to-VSPM.patch \ + file://0004-Modify-Makefile.patch \ + file://0005-remove-work-around-clock-reset-supply.patch \ + file://0006-Support-MUTUAL-mode-for-ISU.patch \ + file://0007-Update-and-fix-some-small-bugs-of-ISU-driver.patch \ + file://0008-Correcting-variable-type.patch \ + file://0009-Wrong-initialize-value-of-clip.patch \ + file://0010-Fix-wrong-output-size-in-setting-case-rs_par-is-NULL.patch \ + file://0011-Fix-error-cannot-detect-NOOUT-in-case-rs_par-NULL.patch \ + file://0012-vspm_main-Update-isu-clock-enable.patch \ +" + +S = "${WORKDIR}/git" +VSPM_DRV_DIR = "vspm-module/files/vspm" +includedir = "${RENESAS_DATADIR}/include" + +# Build VSP Manager kernel module without suffix +KERNEL_MODULE_PACKAGE_SUFFIX = "" + +do_compile() { + cd ${S}/${VSPM_DRV_DIR}/drv + make all +} + +do_install () { + # Create destination directories + install -d ${D}/lib/modules/${KERNEL_VERSION}/extra/ + install -d ${D}/${includedir} + + # Install shared library to KERNELSRC(STAGING_KERNEL_DIR) for reference from other modules + # This file installed in SDK by kernel-devsrc pkg. + install -m 644 ${S}/${VSPM_DRV_DIR}/drv/Module.symvers ${KERNELSRC}/include/vspm.symvers + + # Install kernel module + install -m 644 ${S}/${VSPM_DRV_DIR}/drv/vspm.ko ${D}/lib/modules/${KERNEL_VERSION}/extra/ + + # Install shared header files to KERNELSRC(STAGING_KERNEL_DIR) + # This file installed in SDK by kernel-devsrc pkg. + install -m 644 ${S}/${VSPM_DRV_DIR}/include/vspm_public.h ${KERNELSRC}/include/ + install -m 644 ${S}/${VSPM_DRV_DIR}/include/vspm_cmn.h ${KERNELSRC}/include/ + install -m 644 ${S}/${VSPM_DRV_DIR}/include/vsp_drv.h ${KERNELSRC}/include/ + install -m 644 ${S}/${VSPM_DRV_DIR}/include/fdp_drv.h ${KERNELSRC}/include/ + + # Install shared header files + install -m 644 ${S}/${VSPM_DRV_DIR}/include/vspm_cmn.h ${D}/${includedir}/ + install -m 644 ${S}/${VSPM_DRV_DIR}/include/vsp_drv.h ${D}/${includedir}/ + install -m 644 ${S}/${VSPM_DRV_DIR}/include/fdp_drv.h ${D}/${includedir}/ +} + +do_install_append_rzg2l () { + install -m 644 ${S}/${VSPM_DRV_DIR}/include/isu_drv.h ${KERNELSRC}/include/ + install -m 644 ${S}/${VSPM_DRV_DIR}/include/isu_drv.h ${D}/${includedir}/ +} + +# Should also clean deploy/licenses directory +# for module when do_clean. +do_clean[cleandirs] += "${LICENSE_DIRECTORY}/${PN}" + +PACKAGES = " \ + ${PN} \ + ${PN}-dev \ +" + +FILES_${PN} = " \ + /lib/modules/${KERNEL_VERSION}/extra/vspm.ko \ +" + +RPROVIDES_${PN} += "kernel-module-vspm" + +# Autoload VSPM +KERNEL_MODULE_AUTOLOAD_append = " vspm" diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif.bb new file mode 100755 index 0000000000000000000000000000000000000000..17187f460217aacf375e521b06d614d00ffe3677 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif.bb @@ -0,0 +1,76 @@ +DESCRIPTION = "VSP Manager Interface driver for the RZG2" + +LICENSE = "GPLv2 & MIT" +LIC_FILES_CHKSUM = " \ + file://GPL-COPYING;md5=b234ee4d69f5fce4486a80fdaf4a4263 \ + file://MIT-COPYING;md5=0ebf15a927e436cec699371cd890775c \ +" + +inherit module +require include/rzg2-modules-common.inc + +DEPENDS = "linux-myir kernel-module-vspm" +PN = "kernel-module-vspmif" +PR = "r0" + +VSPMIF_DRV_URL = " \ + git://github.com/renesas-rcar/vspmif_drv.git" +BRANCH = "rcar_gen3" +SRCREV = "2fdb2838a5625e4231f1cff5d10079acc4954952" + +SRC_URI = "${VSPMIF_DRV_URL};branch=${BRANCH}" + +SRC_URI_append_rzg2l = " \ + file://0001-Add-ISU-to-vspmif.patch \ + file://0002-Remove-width-height-in-isu_dst_t.patch \ + file://0003-Correcting-variable-type.patch \ + file://0004-Remove-unused-memory.patch \ + file://0005-Correction-32bit-variable.patch \ +" + +S = "${WORKDIR}/git" +VSPMIF_DRV_DIR = "vspm_if-module/files/vspm_if" + +includedir = "${RENESAS_DATADIR}/include" + +# Build VSP Manager Interface kernel module without suffix +KERNEL_MODULE_PACKAGE_SUFFIX = "" + +do_compile() { + cd ${S}/${VSPMIF_DRV_DIR}/drv + make all +} + +do_install () { + # Create destination directories + install -d ${D}/lib/modules/${KERNEL_VERSION}/extra/ + install -d ${D}/${includedir} + + # Install shared library to KERNELSRC(STAGING_KERNEL_DIR) for reference from other modules + # This file installed in SDK by kernel-devsrc pkg. + install -m 644 ${S}/${VSPMIF_DRV_DIR}/drv/Module.symvers ${KERNELSRC}/include/vspm_if.symvers + + # Install kernel module + install -m 644 ${S}/${VSPMIF_DRV_DIR}/drv/vspm_if.ko ${D}/lib/modules/${KERNEL_VERSION}/extra/ + + # Install shared header files to KERNELSRC(STAGING_KERNEL_DIR) + # This file installed in SDK by kernel-devsrc pkg. + install -m 644 ${S}/${VSPMIF_DRV_DIR}/include/vspm_if.h ${KERNELSRC}/include/ + + # Install shared header file + install -m 644 ${S}/${VSPMIF_DRV_DIR}/include/vspm_if.h ${D}/${includedir}/ +} + +PACKAGES = "\ + ${PN} \ + ${PN}-dev \ +" + +FILES_${PN} = " \ + /lib/modules/${KERNEL_VERSION}/extra/vspm_if.ko \ + /etc/modules-load.d/vspm_if.conf \ +" + +RPROVIDES_${PN} += "kernel-module-vspmif kernel-module-vspm-if" + +KERNEL_MODULE_AUTOLOAD = "vspm_if vspmif" diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif/0001-Add-ISU-to-vspmif.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif/0001-Add-ISU-to-vspmif.patch new file mode 100755 index 0000000000000000000000000000000000000000..1cfd8870d20cbc77a1102ac79940b70e75cc6e9c --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif/0001-Add-ISU-to-vspmif.patch @@ -0,0 +1,650 @@ +From 8176aa58fb9c55f2401368be4b1fb2efed0a598b Mon Sep 17 00:00:00 2001 +From: Nhat Thieu +Date: Fri, 2 Jul 2021 10:18:28 +0700 +Subject: [PATCH] Add ISU to vspmif + +Signed-off-by: Nhat Thieu +--- + vspm_if-module/files/vspm_if/drv/vspm_if_local.h | 26 ++ + vspm_if-module/files/vspm_if/drv/vspm_if_main.c | 33 +- + vspm_if-module/files/vspm_if/drv/vspm_if_sub.c | 381 +++++++++++++++++++++++ + vspm_if-module/files/vspm_if/include/vspm_if.h | 77 +++++ + 4 files changed, 516 insertions(+), 1 deletion(-) + +diff --git a/vspm_if-module/files/vspm_if/drv/vspm_if_local.h b/vspm_if-module/files/vspm_if/drv/vspm_if_local.h +index af70784..ca623c7 100644 +--- a/vspm_if-module/files/vspm_if/drv/vspm_if_local.h ++++ b/vspm_if-module/files/vspm_if/drv/vspm_if_local.h +@@ -163,6 +163,26 @@ struct vspm_if_entry_data_t { + struct fdp_ipc_t ipc; + } fproc; + } fdp; ++ struct vspm_entry_isu { ++ /* parameter to VSP processing */ ++ struct isu_start_t par; ++ /* input image settings */ ++ struct vspm_entry_isu_in { ++ struct isu_src_t in; ++ struct isu_alpha_unit_t alpha; ++ struct isu_td_unit_t td; ++ } in; ++ /* output image settings */ ++ struct vspm_entry_isu_out { ++ struct isu_dst_t out; ++ struct isu_alpha_unit_t alpha; ++ struct isu_csc_t csc; ++ } out; ++ /* resize processing settings */ ++ struct isu_rs_t rs; ++ /* memory settings */ ++ struct vspm_if_work_buff_t *work_buff; ++ } isu; + } ip_par; + }; + +@@ -206,6 +226,7 @@ int set_vsp_par( + struct vspm_if_entry_data_t *entry, + struct vsp_start_t *vsp_par); + int free_cb_vsp_par(struct vspm_if_cb_data_t *cb_data); ++ + void set_cb_rsp_vsp( + struct vspm_if_cb_data_t *cb_data, + struct vspm_if_entry_data_t *entry_data); +@@ -213,8 +234,13 @@ int set_fdp_par( + struct vspm_if_entry_data_t *entry, + struct fdp_start_t *fdp_par); + ++int set_isu_par( ++ struct vspm_if_entry_data_t *entry, ++ struct isu_start_t *isu_par); ++ + int set_compat_vsp_par(struct vspm_if_entry_data_t *entry, unsigned int src); + int set_compat_fdp_par(struct vspm_if_entry_data_t *entry, unsigned int src); ++int set_compat_isu_par(struct vspm_if_entry_data_t *entry, unsigned int src); + + #endif /* __VSPM_IF_LOCAL_H__ */ + +diff --git a/vspm_if-module/files/vspm_if/drv/vspm_if_main.c b/vspm_if-module/files/vspm_if/drv/vspm_if_main.c +index 216db1d..790dde4 100644 +--- a/vspm_if-module/files/vspm_if/drv/vspm_if_main.c ++++ b/vspm_if-module/files/vspm_if/drv/vspm_if_main.c +@@ -155,6 +155,10 @@ static long vspm_ioctl_init( + init_par.par.fdp = &init_fdp_par; + } + break; ++ case VSPM_TYPE_ISU_AUTO: ++ /* initialize parameter is not used */ ++ init_par.par.isu=NULL; ++ break; + default: + break; + } +@@ -171,7 +175,6 @@ static long vspm_ioctl_init( + default: + return -EFAULT; + } +- + priv->handle = handle; + return 0; + } +@@ -315,6 +318,18 @@ static long vspm_ioctl_entry( + &entry_data->ip_par.fdp.par; + } + break; ++ case VSPM_TYPE_ISU_AUTO: ++ if (entry_data->job.par.isu) { ++ /* copy start parameter of ISU */ ++ ercd = set_isu_par( ++ entry_data, entry_data->job.par.isu); ++ if (ercd) ++ goto err_exit; ++ ++ entry_req->job_param->par.isu = ++ &entry_data->ip_par.isu.par; ++ } ++ break; + default: + break; + } +@@ -622,6 +637,10 @@ static long vspm_ioctl_init32( + init_par.par.fdp = NULL; + } + break; ++ case VSPM_TYPE_ISU_AUTO: ++ /* initialize parameter is not used */ ++ init_par.par.vsp = NULL; ++ break; + default: + break; + } +@@ -722,6 +741,18 @@ static long vspm_ioctl_entry32( + &entry_data->ip_par.fdp.par; + } + break; ++ case VSPM_TYPE_ISU_AUTO: ++ /* copy start parameter of VSP */ ++ if (compat_job.par.isu) { ++ ercd = set_compat_isu_par( ++ entry_data, compat_job.par.isu); ++ if (ercd) ++ goto err_exit; ++ ++ entry_data->job.par.isu = ++ &entry_data->ip_par.isu.par; ++ } ++ break; + default: + break; + } +diff --git a/vspm_if-module/files/vspm_if/drv/vspm_if_sub.c b/vspm_if-module/files/vspm_if/drv/vspm_if_sub.c +index fb2f58d..dd4d8de 100644 +--- a/vspm_if-module/files/vspm_if/drv/vspm_if_sub.c ++++ b/vspm_if-module/files/vspm_if/drv/vspm_if_sub.c +@@ -79,6 +79,7 @@ void release_all_entry_data(struct vspm_if_private_t *priv) + list_del(&entry_data->list); + if (entry_data->job.type == VSPM_TYPE_VSP_AUTO) + free_vsp_par(&entry_data->ip_par.vsp); ++ + kfree(entry_data); + } + spin_unlock_irqrestore(&priv->lock, lock_flag); +@@ -856,7 +857,146 @@ int set_fdp_par( + + return 0; + } ++/* Write ISU parameters from user to kernel */ ++static int set_isu_src_par( ++ struct vspm_entry_isu_in *in, ++ struct isu_src_t *src, ++ struct vspm_if_work_buff_t *work_buff) ++{ ++ int ercd; ++ /* copy isu_src_t parameter */ ++ if (copy_from_user( ++ &in->in, ++ (void __user *)src, ++ sizeof(struct isu_src_t))) { ++ EPRINT("failed to copy of isu_src_t\n"); ++ return -EFAULT; ++ } ++ ++ /* copy isu_alpha_unit_t parameter */ ++ if (in->in.alpha){ ++ if (copy_from_user( ++ &in->alpha, ++ (void __user *)in->in.alpha, ++ sizeof(struct isu_alpha_unit_t))) { ++ EPRINT("failed to copy of isu_alpha_unit_t\n"); ++ return -EFAULT; ++ } ++ in->in.alpha = &in->alpha; ++ } ++ ++ /* copy isu_td_unit_t parameter */ ++ if (in->in.td){ ++ if (copy_from_user( ++ &in->td, ++ (void __user *)in->in.td, ++ sizeof(struct isu_td_unit_t))) { ++ EPRINT("failed to copy of isu_td_unit_t\n"); ++ return -EFAULT; ++ } ++ in->in.td = &in->td; ++ } ++ ++ return 0; ++} + ++static int set_isu_dst_par( ++ struct vspm_entry_isu_out *out, struct isu_dst_t *src) ++{ ++ /* copy isu_dst_t parameter */ ++ if (copy_from_user( ++ &out->out, ++ (void __user *)src, ++ sizeof(struct isu_dst_t))) { ++ EPRINT("failed to copy of isu_dst_t\n"); ++ return -EFAULT; ++ } ++ /* copy isu_alpha_unit_t parameter */ ++ if (out->out.alpha){ ++ if (copy_from_user( ++ &out->alpha, ++ (void __user *)out->out.alpha, ++ sizeof(struct isu_alpha_unit_t))) { ++ EPRINT("failed to copy of isu_alpha_unit_t\n"); ++ return -EFAULT; ++ } ++ out->out.alpha = &out->alpha; ++ } ++ ++ if (out->out.csc){ ++ if (copy_from_user( ++ &out->csc, ++ (void __user *)out->out.csc, ++ sizeof(struct isu_csc_t))){ ++ EPRINT("failed to copy of isu_csc_t\n"); ++ return -EFAULT; ++ } ++ out->out.csc = &out->csc; ++ } ++ return 0; ++} ++ ++int set_isu_par( ++ struct vspm_if_entry_data_t *entry, struct isu_start_t *isu_par) ++{ ++ struct vspm_entry_isu *isu = &entry->ip_par.isu; ++ int ercd = 0; ++ ++ /* copy isu_start_t parameter */ ++ if (copy_from_user( ++ &isu->par, ++ (void __user *)isu_par, ++ sizeof(struct isu_start_t))) { ++ EPRINT("failed to copy of isu_start_t\n"); ++ return -EFAULT; ++ } ++ ++ /* get work buffer */ ++ isu->work_buff = get_work_buffer(entry->priv); ++ if (!isu->work_buff) ++ return -EFAULT; ++ ++ /* copy isu_src_t parameter */ ++ if(isu->par.src_par){ ++ ercd = set_isu_src_par( ++ &isu->in, ++ isu->par.src_par, ++ isu->work_buff); ++ if (ercd) ++ goto err_exit; ++ isu->par.src_par = &isu->in.in; ++ } ++ ++ /* copy isu_dst_t parameter */ ++ if(isu->par.dst_par){ ++ ercd = set_isu_dst_par( ++ &isu->out, ++ isu->par.dst_par); ++ if (ercd) ++ goto err_exit; ++ isu->par.dst_par = &isu->out.out; ++ } ++ ++ /* copy isu_rs_t parameter */ ++ if (isu->par.rs_par) { ++ if (copy_from_user( ++ &isu->rs, ++ (void __user *)isu->par.rs_par, ++ sizeof(struct isu_rs_t))) { ++ EPRINT("failed to copy of isu_rs_t\n"); ++ return -EFAULT; ++ } ++ if (ercd) ++ goto err_exit; ++ isu->par.rs_par = &isu->rs; ++ } ++ ++ return 0; ++err_exit: ++ return ercd; ++} ++ ++/* VSP 32 bits */ + static int set_compat_vsp_src_clut_par( + struct vsp_dl_t *clut, + unsigned int src, +@@ -1676,6 +1816,247 @@ err_exit: + return ercd; + } + ++/*ISU 32bits */ ++ ++static int set_compat_isu_alpha_par( ++ struct isu_alpha_unit_t *alpha, unsigned int src) ++{ ++ struct compat_isu_alpha_unit_t compat_alpha; ++ ++ /* copy isu_alpha_unit_t parameter */ ++ if (copy_from_user( ++ &compat_alpha, ++ VSPM_IF_INT_TO_UP(src), ++ sizeof(struct compat_isu_alpha_unit_t))) { ++ EPRINT("failed to copy of isu_alpha_unit_t\n"); ++ return -EFAULT; ++ } ++ ++ alpha->asel = compat_alpha.asel; ++ alpha->anum0 = compat_alpha.anum0; ++ alpha->anum1 = compat_alpha.anum1; ++ alpha->anum2 = compat_alpha.anum2; ++ alpha->athres0 = compat_alpha.athres0; ++ alpha->athres1 = compat_alpha.athres1; ++ ++ return 0; ++} ++ ++static int set_compat_isu_src_td_par( ++ struct isu_td_unit_t *td, unsigned int src) ++{ ++ struct compat_isu_td_unit_t compat_td; ++ ++ /* copy isu_alpha_unit_t parameter */ ++ if (copy_from_user( ++ &compat_td, ++ VSPM_IF_INT_TO_UP(src), ++ sizeof(struct compat_isu_td_unit_t))) { ++ EPRINT("failed to copy of isu_td_unit_t\n"); ++ return -EFAULT; ++ } ++ ++ td->grada_mode = compat_td.grada_mode; ++ td->grada_step = compat_td.grada_step; ++ td->init_val = compat_td.init_val; ++ ++ return 0; ++} ++ ++static int set_compat_isu_csc_par(struct isu_csc_t *csc, unsigned int src) ++{ ++ struct compat_isu_csc_t compat_csc; ++ int i,j; ++ /* copy isu_csc_t parameter */ ++ if (copy_from_user( ++ &compat_csc, ++ VSPM_IF_INT_TO_UP(src), ++ sizeof(struct compat_isu_csc_t))) { ++ EPRINT("failed to copy of isu_td_unit_t\n"); ++ return -EFAULT; ++ } ++ csc->csc = compat_csc.csc; ++ for (i=0;i<3;i++){ ++ for(j=0;j<3;j++){ ++ if(j<2){ ++ csc->clip[i][j]=compat_csc.clip[i][j]; ++ csc->offset[i][j]=compat_csc.offset[i][j]; ++ } ++ csc->k_matrix[i][j]=compat_csc.k_matrix[i][j]; ++ } ++ } ++ return 0; ++} ++ ++static int set_compat_isu_src_par( ++ struct vspm_entry_isu_in *in, ++ unsigned int src, ++ struct vspm_if_work_buff_t *work_buff) ++{ ++ struct compat_isu_src_t compat_isu_src; ++ int ercd; ++ ++ /* copy isu_src_t parameter */ ++ if (copy_from_user( ++ &compat_isu_src, ++ VSPM_IF_INT_TO_UP(src), ++ sizeof(struct compat_isu_src_t))) { ++ EPRINT("failed to copy of isu_src_t\n"); ++ return -EFAULT; ++ } ++ ++ in->in.addr = compat_isu_src.addr; ++ in->in.addr_c = compat_isu_src.addr_c; ++ in->in.stride = compat_isu_src.stride; ++ in->in.stride_c = compat_isu_src.stride_c; ++ in->in.width = compat_isu_src.width; ++ in->in.height = compat_isu_src.height; ++ in->in.format = compat_isu_src.format; ++ in->in.swap = compat_isu_src.swap; ++ in->in.uv_conv = compat_isu_src.uv_conv; ++ ++ /* copy isu_alpha_unit_t parameter */ ++ if (compat_isu_src.alpha) { ++ ercd = set_compat_isu_alpha_par( ++ &in->alpha, compat_isu_src.alpha); ++ if (ercd) ++ return ercd; ++ in->in.alpha = &in->alpha; ++ } ++ /* copy isu_td_unit_t parameter */ ++ if (compat_isu_src.td){ ++ ercd = set_compat_isu_src_td_par( ++ &in->td, compat_isu_src.td); ++ if (ercd) ++ return ercd; ++ in->in.td = &in->td; ++ } ++ ++ return 0; ++} ++ ++static int set_compat_isu_dst_par( ++ struct vspm_entry_isu_out *out, unsigned int src) ++{ ++ struct compat_isu_dst_t compat_isu_dst; ++ int ercd; ++ /* copy isu_dst_t parameter */ ++ if (copy_from_user( ++ &compat_isu_dst, ++ VSPM_IF_INT_TO_UP(src), ++ sizeof(struct compat_isu_dst_t))) { ++ EPRINT("failed to copy of isu_dst_t\n"); ++ return -EFAULT; ++ } ++ ++ out->out.addr = compat_isu_dst.addr; ++ out->out.addr_c = compat_isu_dst.addr_c; ++ out->out.stride = compat_isu_dst.stride; ++ out->out.stride_c = compat_isu_dst.stride_c; ++ out->out.format = compat_isu_dst.format; ++ out->out.swap = compat_isu_dst.swap; ++ /* copy isu_csc_t parameter */ ++ if (compat_isu_dst.csc){ ++ ercd = set_compat_isu_csc_par( ++ &out->csc,compat_isu_dst.csc); ++ if (ercd) ++ return ercd; ++ out->out.csc = &out->csc; ++ } ++ ++ /* copy isu_alpha_unit_t parameter */ ++ if (compat_isu_dst.alpha) { ++ ercd = set_compat_isu_alpha_par( ++ &out->alpha, compat_isu_dst.alpha); ++ if (ercd) ++ return ercd; ++ out->out.alpha = &out->alpha; ++ } ++ return 0; ++} ++ ++static int set_compat_isu_rs_par(struct isu_rs_t *rs, unsigned int src) ++{ ++ struct compat_isu_rs_t compat_rs; ++ ++ /* copy */ ++ if (copy_from_user( ++ &compat_rs, ++ VSPM_IF_INT_TO_UP(src), ++ sizeof(struct compat_isu_rs_t))) { ++ EPRINT("failed to copy of isu_rs_t\n"); ++ return -EFAULT; ++ } ++ ++ /* set */ ++ rs->start_x = compat_rs.start_x; ++ rs->start_y = compat_rs.start_y; ++ rs->tune_x = compat_rs.tune_x; ++ rs->tune_y = compat_rs.tune_y; ++ rs->crop_w = compat_rs.crop_w; ++ rs->crop_h = compat_rs.crop_h; ++ rs->pad_mode = compat_rs.pad_mode; ++ rs->pad_val = compat_rs.pad_val; ++ rs->x_ratio = compat_rs.x_ratio; ++ rs->y_ratio = compat_rs.y_ratio; ++ ++ return 0; ++} ++ ++int set_compat_isu_par( ++ struct vspm_if_entry_data_t *entry, unsigned int src) ++{ ++ struct vspm_entry_isu *isu = &entry->ip_par.isu; ++ struct compat_isu_start_t compat_isu_par; ++ unsigned long tmp_addr; ++ ++ int ercd; ++ ++ /* copy isu_start_t parameter */ ++ if (copy_from_user( ++ &compat_isu_par, ++ VSPM_IF_INT_TO_UP(src), ++ sizeof(struct compat_isu_start_t))) { ++ EPRINT("failed to copy of vsp_start_t\n"); ++ return -EFAULT; ++ } ++ ++ /* copy isu_src_t parameter */ ++ if (compat_isu_par.src_par) { ++ ercd = set_compat_isu_src_par( ++ &isu->in, ++ compat_isu_par.src_par, ++ isu->work_buff); ++ if (ercd) ++ goto err_exit; ++ isu->par.src_par = &isu->in.in; ++ } ++ ++ /* copy isu_dst_t parameter */ ++ if (compat_isu_par.dst_par) { ++ ercd = set_compat_isu_dst_par( ++ &isu->out, compat_isu_par.dst_par); ++ if (ercd) ++ goto err_exit; ++ isu->par.dst_par = &isu->out.out; ++ } ++ ++ /* copy isu_rs_t parameter */ ++ if (compat_isu_par.rs_par) { ++ ercd = set_compat_isu_rs_par( ++ &isu->rs, compat_isu_par.rs_par); ++ if (ercd) ++ goto err_exit; ++ isu->par.rs_par = &isu->rs; ++ } ++ ++ return 0; ++err_exit: ++ return ercd; ++} ++ ++ ++ + static int set_compat_fdp_pic_par(struct fdp_pic_t *in_pic, unsigned int src) + { + struct compat_fdp_pic_t compat_fdp_pic; +diff --git a/vspm_if-module/files/vspm_if/include/vspm_if.h b/vspm_if-module/files/vspm_if/include/vspm_if.h +index 7a79d03..33afec6 100644 +--- a/vspm_if-module/files/vspm_if/include/vspm_if.h ++++ b/vspm_if-module/files/vspm_if/include/vspm_if.h +@@ -121,6 +121,7 @@ struct vspm_compat_init_t { + union { + unsigned int vsp; + unsigned int fdp; ++ unsigned int isu; + } par; + }; + +@@ -142,6 +143,7 @@ struct vspm_compat_job_t { + union { + unsigned int vsp; + unsigned int fdp; ++ unsigned int isu; + } par; + }; + +@@ -372,6 +374,81 @@ struct compat_vsp_start_t { + struct compat_vsp_dl_t dl_par; + }; + ++/* ISU */ ++struct compat_isu_dl_t { ++ unsigned int hard_addr; ++ unsigned int virt_addr; ++ unsigned short tbl_num; ++ unsigned int mem_par; ++}; ++ ++struct compat_isu_alpha_unit_t { ++ unsigned char asel; ++ unsigned char anum0; ++ unsigned char anum1; ++ unsigned char anum2; ++ unsigned char athres0; ++ unsigned char athres1; ++}; ++ ++struct compat_isu_td_unit_t { ++ unsigned char grada_mode; ++ unsigned char grada_step; ++ unsigned int init_val; ++}; ++ ++struct compat_isu_csc_t { ++ unsigned char csc; ++ unsigned int offset[3][2]; ++ unsigned int clip[3][2]; ++ unsigned int k_matrix[3][3]; ++}; ++ ++struct compat_isu_src_t { ++ unsigned int addr; ++ unsigned int addr_c; ++ unsigned short stride; ++ unsigned short stride_c; ++ unsigned short width; ++ unsigned short height; ++ unsigned short format; ++ unsigned char swap; ++ unsigned int td; ++ unsigned int alpha; ++ unsigned char uv_conv; ++}; ++struct compat_isu_dst_t { ++ unsigned int addr; ++ unsigned int addr_c; ++ unsigned short stride; ++ unsigned short stride_c; ++ unsigned short width; ++ unsigned short height; ++ unsigned short format; ++ unsigned char swap; ++ unsigned char csc; ++ unsigned int alpha; ++}; ++struct compat_isu_rs_t { ++ unsigned int start_x; ++ unsigned int start_y; ++ unsigned int tune_x; ++ unsigned int tune_y; ++ unsigned int crop_w; ++ unsigned int crop_h; ++ unsigned char pad_mode; ++ unsigned int pad_val; ++ unsigned short x_ratio; ++ unsigned short y_ratio; ++}; ++struct compat_isu_start_t { ++ unsigned int src_par; ++ unsigned int dst_par; ++ unsigned int rs_par; ++ struct compat_isu_dl_t dl_par; ++}; ++ ++/*FDP */ + struct compat_fdp_pic_t { + unsigned int picid; + unsigned char chroma_format; +-- +2.7.4 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif/0002-Remove-width-height-in-isu_dst_t.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif/0002-Remove-width-height-in-isu_dst_t.patch new file mode 100755 index 0000000000000000000000000000000000000000..ab28fd51a2ea9f870caccfc00cc57c2ac813b273 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif/0002-Remove-width-height-in-isu_dst_t.patch @@ -0,0 +1,25 @@ +From 653a6d28a884f065af3a6e2222319c780930b03b Mon Sep 17 00:00:00 2001 +From: Nhat Thieu +Date: Wed, 25 Aug 2021 16:09:12 +0700 +Subject: [PATCH 2/2] Remove width/height in isu_dst_t + +--- + vspm_if-module/files/vspm_if/include/vspm_if.h | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/vspm_if-module/files/vspm_if/include/vspm_if.h b/vspm_if-module/files/vspm_if/include/vspm_if.h +index 33afec6..964b81f 100644 +--- a/vspm_if-module/files/vspm_if/include/vspm_if.h ++++ b/vspm_if-module/files/vspm_if/include/vspm_if.h +@@ -422,8 +422,6 @@ struct compat_isu_dst_t { + unsigned int addr_c; + unsigned short stride; + unsigned short stride_c; +- unsigned short width; +- unsigned short height; + unsigned short format; + unsigned char swap; + unsigned char csc; +-- +2.7.4 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif/0003-Correcting-variable-type.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif/0003-Correcting-variable-type.patch new file mode 100755 index 0000000000000000000000000000000000000000..6639e3dd36245cb003aa2671698b8f441284b295 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif/0003-Correcting-variable-type.patch @@ -0,0 +1,104 @@ +From 50b14d0c78dc43e6504a32a1168b77105a8896f6 Mon Sep 17 00:00:00 2001 +From: Nhat Thieu +Date: Thu, 9 Sep 2021 11:35:29 +0700 +Subject: [PATCH 3/3] Correcting variable type + +Signed-off-by: Nhat Thieu +--- + vspm_if-module/files/vspm_if/include/vspm_if.h | 49 +++++++++++--------------- + 1 file changed, 21 insertions(+), 28 deletions(-) + +diff --git a/vspm_if-module/files/vspm_if/include/vspm_if.h b/vspm_if-module/files/vspm_if/include/vspm_if.h +index 964b81f..1c0617b 100644 +--- a/vspm_if-module/files/vspm_if/include/vspm_if.h ++++ b/vspm_if-module/files/vspm_if/include/vspm_if.h +@@ -375,13 +375,6 @@ struct compat_vsp_start_t { + }; + + /* ISU */ +-struct compat_isu_dl_t { +- unsigned int hard_addr; +- unsigned int virt_addr; +- unsigned short tbl_num; +- unsigned int mem_par; +-}; +- + struct compat_isu_alpha_unit_t { + unsigned char asel; + unsigned char anum0; +@@ -399,51 +392,51 @@ struct compat_isu_td_unit_t { + + struct compat_isu_csc_t { + unsigned char csc; +- unsigned int offset[3][2]; +- unsigned int clip[3][2]; +- unsigned int k_matrix[3][3]; ++ unsigned short offset[3][2]; ++ unsigned short clip[3][2]; ++ unsigned short k_matrix[3][3]; + }; + + struct compat_isu_src_t { +- unsigned int addr; +- unsigned int addr_c; ++ unsigned long addr; ++ unsigned long addr_c; + unsigned short stride; + unsigned short stride_c; + unsigned short width; + unsigned short height; +- unsigned short format; ++ unsigned char format; + unsigned char swap; + unsigned int td; + unsigned int alpha; + unsigned char uv_conv; + }; + struct compat_isu_dst_t { +- unsigned int addr; +- unsigned int addr_c; ++ unsigned long addr; ++ unsigned long addr_c; + unsigned short stride; + unsigned short stride_c; +- unsigned short format; ++ unsigned char format; + unsigned char swap; +- unsigned char csc; ++ unsigned int csc; + unsigned int alpha; + }; + struct compat_isu_rs_t { +- unsigned int start_x; +- unsigned int start_y; +- unsigned int tune_x; +- unsigned int tune_y; +- unsigned int crop_w; +- unsigned int crop_h; +- unsigned char pad_mode; +- unsigned int pad_val; +- unsigned short x_ratio; +- unsigned short y_ratio; ++ unsigned short start_x; ++ unsigned short start_y; ++ unsigned short tune_x; ++ unsigned short tune_y; ++ unsigned short crop_w; ++ unsigned short crop_h; ++ unsigned char pad_mode; ++ unsigned int pad_val; ++ unsigned int x_ratio; ++ unsigned int y_ratio; + }; + struct compat_isu_start_t { + unsigned int src_par; + unsigned int dst_par; + unsigned int rs_par; +- struct compat_isu_dl_t dl_par; ++ unsigned int dl_hard_addr; + }; + + /*FDP */ +-- +2.7.4 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif/0004-Remove-unused-memory.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif/0004-Remove-unused-memory.patch new file mode 100644 index 0000000000000000000000000000000000000000..c8500194f2c956800a5064dfdba79bcb7292286e --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif/0004-Remove-unused-memory.patch @@ -0,0 +1,31 @@ +From 9f2576b12e0588176a03cf2d9948ed29a3678753 Mon Sep 17 00:00:00 2001 +From: Nhat Thieu +Date: Mon, 15 Nov 2021 12:13:38 +0700 +Subject: [PATCH 4/4] Remove unused memory + +Firstly, we intend to create this buffer for display list. +However, now it is unnecessary. So we remove it. + +Signed-off-by: Nhat Thieu +--- + vspm_if-module/files/vspm_if/drv/vspm_if_sub.c | 5 ----- + 1 file changed, 5 deletions(-) + +diff --git a/vspm_if-module/files/vspm_if/drv/vspm_if_sub.c b/vspm_if-module/files/vspm_if/drv/vspm_if_sub.c +index dd4d8de..de2cc74 100644 +--- a/vspm_if-module/files/vspm_if/drv/vspm_if_sub.c ++++ b/vspm_if-module/files/vspm_if/drv/vspm_if_sub.c +@@ -951,11 +951,6 @@ int set_isu_par( + return -EFAULT; + } + +- /* get work buffer */ +- isu->work_buff = get_work_buffer(entry->priv); +- if (!isu->work_buff) +- return -EFAULT; +- + /* copy isu_src_t parameter */ + if(isu->par.src_par){ + ercd = set_isu_src_par( +-- +2.7.4 diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif/0005-Correction-32bit-variable.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif/0005-Correction-32bit-variable.patch new file mode 100644 index 0000000000000000000000000000000000000000..121c39d2bbe11cf2ad379a576988ea7fc65f7fb8 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/kernel-module-vspmif/kernel-module-vspmif/0005-Correction-32bit-variable.patch @@ -0,0 +1,37 @@ +From 890beda95be1c295dcfa70c1d32914b90be66ed8 Mon Sep 17 00:00:00 2001 +From: Nhat Thieu +Date: Thu, 2 Dec 2021 09:31:02 +0700 +Subject: [PATCH 5/5] Correction 32bit variable + +--- + vspm_if-module/files/vspm_if/include/vspm_if.h | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/vspm_if-module/files/vspm_if/include/vspm_if.h b/vspm_if-module/files/vspm_if/include/vspm_if.h +index 1c0617b..6a451b0 100644 +--- a/vspm_if-module/files/vspm_if/include/vspm_if.h ++++ b/vspm_if-module/files/vspm_if/include/vspm_if.h +@@ -398,8 +398,8 @@ struct compat_isu_csc_t { + }; + + struct compat_isu_src_t { +- unsigned long addr; +- unsigned long addr_c; ++ unsigned int addr; ++ unsigned int addr_c; + unsigned short stride; + unsigned short stride_c; + unsigned short width; +@@ -411,8 +411,8 @@ struct compat_isu_src_t { + unsigned char uv_conv; + }; + struct compat_isu_dst_t { +- unsigned long addr; +- unsigned long addr_c; ++ unsigned int addr; ++ unsigned int addr_c; + unsigned short stride; + unsigned short stride_c; + unsigned char format; +-- +2.7.4 diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0001-Fixed-an-issue-that-caused-flicker-when-outputting-t.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0001-Fixed-an-issue-that-caused-flicker-when-outputting-t.patch new file mode 100644 index 0000000000000000000000000000000000000000..9a38b846497da210fd4b0a9d567f47975306bd28 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0001-Fixed-an-issue-that-caused-flicker-when-outputting-t.patch @@ -0,0 +1,193 @@ +From 66c1c9126f4a39199f283a2e239ef52920ec11a3 Mon Sep 17 00:00:00 2001 +From: hienhuynh +Date: Thu, 8 Sep 2022 13:13:50 +0700 +Subject: [PATCH] Fixed an issue that caused flicker when outputting the screen + +This commit is created to fix flickerring issue. + +Signed-off-by: hienhuynh +--- + drivers/gpu/drm/bridge/adv7511/adv7533.c | 5 ++ + drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 103 ++++++++++++++++++----- + drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c | 5 +- + 3 files changed, 92 insertions(+), 21 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/adv7511/adv7533.c b/drivers/gpu/drm/bridge/adv7511/adv7533.c +index aa19d5a40e31..a42348e2150c 100644 +--- a/drivers/gpu/drm/bridge/adv7511/adv7533.c ++++ b/drivers/gpu/drm/bridge/adv7511/adv7533.c +@@ -105,6 +105,11 @@ void adv7533_mode_set(struct adv7511 *adv, const struct drm_display_mode *mode) + struct mipi_dsi_device *dsi = adv->dsi; + int lanes, ret; + ++ if (adv->type == ADV7535) ++ { ++ return; ++ } ++ + if (adv->num_dsi_lanes != 4) + return; + +diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +index 3870041c93e1..196667b40366 100644 +--- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c ++++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +@@ -227,7 +227,24 @@ struct cpg_param { + #define TABLE_MAX 14 + #define TABLE_PARALLEL_MAX 11 + #define reg_write(x, a) iowrite32(a, x) ++#define reg_read(x) ioread32(x) + #define CPG_LPCLK_DIV 0 ++#define CPG_SIPPL3_CLK5 (0x0134) ++#define CPG_SIPLL5_STBY (0x0140) ++#define CPG_SIPLL5_CLK1 (0x0144) ++#define CPG_SIPLL5_CLK3 (0x014C) ++#define CPG_SIPLL5_CLK4 (0x0150) ++#define CPG_SIPLL5_CLK5 (0x0154) ++#define CPG_SIPLL5_MON (0x015C) ++#define CPG_PL2_DDIV (0x0204) ++#define CPG_CPG_CLKSTATUS (0x0280) ++#define CPG_PL5_SDIV (0x0420) ++#define CPG_OTHERFUNC1_REG (0x0BE8) ++#define CPG_CLKON_LCDC (0x056c) ++#define CPG_CLKMON_LCDC (0x06EC) ++ ++#define PLL5_MON_PLL5_LOCK (1 << 4) ++#define DIVDSILPCLK_STS (1 << 7) + + struct cpg_param resolution_2_lanes_param[TABLE_MAX - 1] = { + { 25175, 2, 50, 5872025, 1, 1, 0, 0x16, 1, 5}, /* VGA 25.175MHz */ +@@ -309,6 +326,7 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) + u32 parallelOut; + u32 tableMax; + struct cpg_param *paramPtr; ++ u32 val, nowLcdcClkOn; + + if (of_machine_is_compatible("renesas,r9a07g043")) { + parallelOut = 1; +@@ -338,9 +356,6 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) + default: + return; + } +- +- /* CPG_OTHERFUNC1_REG: SEL_PLL5_3 clock */ +- reg_write(cpg_base + 0xbe8, 0x10001); + } + + for (i = 0; i < tableMax; i++) { +@@ -363,31 +378,79 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) + if (i == tableMax) + index = tableMax - 1; + +- /* CPG_PL2_DDIV: DIV_DSI_LPCLK */ +- reg_write(cpg_base + 0x0204, 0x10000000 | +- (CPG_LPCLK_DIV << 12)); +- /* CPG_PL5_SDIV: DIV_DSI_A, DIV_DSI_B */ +- reg_write(cpg_base + 0x0420, 0x01010000 | +- (paramPtr[index].dsi_div_a << 0) | +- (paramPtr[index].dsi_div_b << 8)); +- /* CPG_PLL5_CLK1: POSTDIV1, POSTDIV2, REFDIV */ +- reg_write(cpg_base + 0x0144, 0x01110000 | ++ if ((parallelOut == 0) && (paramPtr[i].frequency > 74250)) ++ reg_write(cpg_base + CPG_SIPPL3_CLK5, 0x02); ++ ++ val = reg_read(cpg_base + CPG_CLKON_LCDC); ++ if (val != 0) ++ nowLcdcClkOn = 1; ++ else ++ nowLcdcClkOn = 0; ++ ++ if (nowLcdcClkOn) { ++ /* LCDC Clock Off */ ++ reg_write(cpg_base + CPG_CLKON_LCDC, 0x30000); ++ do { ++ val = reg_read(cpg_base + CPG_CLKMON_LCDC); ++ } while(val != 0); ++ } ++ ++ /* RESETB = 0 Reset State */ ++ reg_write(cpg_base + CPG_SIPLL5_STBY, 0x10000); ++ do { ++ val = reg_read(cpg_base + CPG_SIPLL5_MON); ++ } while ((val & PLL5_MON_PLL5_LOCK) != 0); ++ ++ /* POSTDIV1, POSTDIV2, REFDIV */ ++ reg_write(cpg_base + CPG_SIPLL5_CLK1, 0x01110000 | + (paramPtr[index].pl5_postdiv1 << 0) | + (paramPtr[index].pl5_postdiv2 << 4) | + (paramPtr[index].pl5_refdiv << 8)); +- /* CPG_PLL5_CLK3: DIVVAL=6, FRACIN */ +- reg_write(cpg_base + 0x014C, ++ /* DIVVAL, FRACIN */ ++ reg_write(cpg_base + CPG_SIPLL5_CLK3, + (paramPtr[index].pl5_divval << 0) | + (paramPtr[index].pl5_fracin << 8)); +- /* CPG_PLL5_CLK4: INTIN */ +- reg_write(cpg_base + 0x0150, 0x000000ff | ++ /* INTIN */ ++ reg_write(cpg_base + CPG_SIPLL5_CLK4, 0x000000ff | + (paramPtr[index].pl5_intin << 16)); +- /* CPG_PLL5_CLK5: SPREAD */ +- reg_write(cpg_base + 0x0154, ++ /* SPREAD */ ++ reg_write(cpg_base + CPG_SIPLL5_CLK5, + (paramPtr[index].pl5_spread << 0)); + +- /* CPG_PLL5_STBY: RESETB=1 */ +- reg_write(cpg_base + 0x0140, 0x00150001); ++ if (parallelOut == 0) { ++ do { ++ val = reg_read(cpg_base + CPG_CPG_CLKSTATUS); ++ } while ((val & DIVDSILPCLK_STS) != 0); ++ /* DIV_DSI_LPCLK */ ++ reg_write(cpg_base + CPG_PL2_DDIV, 0x10000000 | ++ (CPG_LPCLK_DIV << 12)); ++ do { ++ val = reg_read(cpg_base + CPG_CPG_CLKSTATUS); ++ } while ((val & DIVDSILPCLK_STS) != 0); ++ /* SEL_PLL5_3 clock */ ++ reg_write(cpg_base + CPG_OTHERFUNC1_REG, 0x10001); ++ /* DIV_DSI_A, DIV_DSI_B */ ++ reg_write(cpg_base + CPG_PL5_SDIV, 0x01010000 | ++ (paramPtr[index].dsi_div_a << 0) | ++ (paramPtr[index].dsi_div_b << 8)); ++ } else { ++ /* DIV_DSI_A, DIV_DSI_B */ ++ reg_write(cpg_base + CPG_PL5_SDIV, 0x01010000 | ++ (paramPtr[index].dsi_div_a << 0) | ++ (paramPtr[index].dsi_div_b << 8)); ++ } ++ reg_write(cpg_base + CPG_SIPLL5_STBY, 0x00050001); ++ do { ++ val = reg_read(cpg_base + CPG_SIPLL5_MON); ++ } while ((val & PLL5_MON_PLL5_LOCK) == 0); ++ ++ if (nowLcdcClkOn) { ++ /* LCDC Clock On */ ++ reg_write(cpg_base + CPG_CLKON_LCDC, 0x30003); ++ do { ++ val = reg_read(cpg_base + CPG_CLKMON_LCDC); ++ } while(val == 0); ++ } + + iounmap(cpg_base); + +diff --git a/drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c +index 9432ba8e39b7..3ed44a9b1472 100644 +--- a/drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c ++++ b/drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c +@@ -183,7 +183,10 @@ static int rzg2l_mipi_dsi_startup(struct rzg2l_mipi_dsi *mipi_dsi) + timings.ths_settle = 9; + timings.ths_exit = 13; + timings.ths_trail = 17; +- timings.ths_zero = 23; ++ if (IS_ENABLED(CONFIG_DRM_I2C_ADV7511)) ++ timings.ths_zero = 25; ++ else ++ timings.ths_zero = 23; + } + + dphytim0 = DSIDPHYTIM0_TCLK_MISS(timings.tclk_miss) | +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0001-arm64-dts-renesas-rzg2l-smarc-Add-uio-support.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0001-arm64-dts-renesas-rzg2l-smarc-Add-uio-support.patch new file mode 100644 index 0000000000000000000000000000000000000000..05305e3aba5a8fff5103f7e04ce50554d0d7f09f --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0001-arm64-dts-renesas-rzg2l-smarc-Add-uio-support.patch @@ -0,0 +1,67 @@ +From f7108810e8507939e6ea4aa0856cd08e968650b6 Mon Sep 17 00:00:00 2001 +From: Canh Dao +Date: Wed, 13 Apr 2022 23:51:15 +0700 +Subject: [PATCH] arm64: dts: renesas: rzg2l-smarc: Add uio support for inter + processor communication + +--- + .../boot/dts/renesas/rzg2l-smarc-som.dtsi | 43 +++++++++++++++++++ + 1 file changed, 43 insertions(+) + +diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi +index 7a138ba74265..2ac372f8a0b4 100644 +--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi ++++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi +@@ -107,6 +107,49 @@ vccq_sdhi0: regulator-vccq-sdhi0 { + gpios = <&pinctrl RZG2L_GPIO(39, 0) GPIO_ACTIVE_HIGH>; + regulator-always-on; + }; ++ vring-ctl0@43000000 { ++ compatible = "vring_uio"; ++ reg = <0x0 0x43000000 0x0 0x100000>; ++ no-map; ++ }; ++ ++ vring-ctl1@43100000 { ++ compatible = "vring_uio"; ++ reg = <0x0 0x43100000 0x0 0x100000>; ++ no-map; ++ }; ++ ++ vring-shm0@43200000 { ++ compatible = "shm_uio"; ++ reg = <0x0 0x43200000 0x0 0x300000>; ++ no-map; ++ }; ++ ++ vring-shm1@43500000 { ++ compatible = "shm_uio"; ++ reg = <0x0 0x43500000 0x0 0x300000>; ++ no-map; ++ }; ++ ++ rsctbl@42f00000 { ++ compatible = "shm_uio"; ++ reg = <0x0 0x42f00000 0x0 0x1000>; ++ no-map; ++ }; ++ ++ mhu-shm@42f01000 { ++ compatible = "shm_uio"; ++ reg = <0x0 0x42f01000 0x0 0x1000>; ++ no-map; ++ }; ++ ++ mbox-uio@10400000 { ++ compatible = "mbox_uio"; ++ reg = <0x0 0x10400000 0x0 0x1000>; ++ interrupt-parent = <&gic>; ++ interrupts = ; ++ status = "okay"; ++ }; + }; + + &adc { +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0002-arm64-dts-renesas-rzg2l-smarc-Disable-OSTM2.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0002-arm64-dts-renesas-rzg2l-smarc-Disable-OSTM2.patch new file mode 100644 index 0000000000000000000000000000000000000000..eafebee8bb98ae83404160f3fd57629fe843c100 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0002-arm64-dts-renesas-rzg2l-smarc-Disable-OSTM2.patch @@ -0,0 +1,26 @@ +From ea7d17188769ae5526b6091bd283d5d8b4a1708c Mon Sep 17 00:00:00 2001 +From: Canh Dao +Date: Sun, 17 Apr 2022 19:10:36 +0700 +Subject: [PATCH] arm64: dts: renesas: rzg2l-smarc: Disable OSTM2 to be used in + FreeRTOS + +--- + arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi +index 7a138ba74265..bec89ab5dc0e 100644 +--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi ++++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi +@@ -189,7 +189,7 @@ &ostm1 { + }; + + &ostm2 { +- status = "okay"; ++ status = "disabled"; + }; + + &pinctrl { +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0003-arm64-dts-renesas-rzg2lc-smarc-Add-uio-support.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0003-arm64-dts-renesas-rzg2lc-smarc-Add-uio-support.patch new file mode 100644 index 0000000000000000000000000000000000000000..bb218a7d410c93bf6f6d7bda665028614170a60f --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0003-arm64-dts-renesas-rzg2lc-smarc-Add-uio-support.patch @@ -0,0 +1,67 @@ +From d6bbf595f5b2e7ab7eb864576e1c46c1f628bcc9 Mon Sep 17 00:00:00 2001 +From: Canh Dao +Date: Wed, 13 Apr 2022 23:56:26 +0700 +Subject: [PATCH 1/2] arm64: dts: renesas: rzg2lc-smarc: Add uio support for + inter processor communication + +--- + .../boot/dts/renesas/rzg2lc-smarc-som.dtsi | 43 +++++++++++++++++++ + 1 file changed, 43 insertions(+) + +diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi +index c39ca75a6c9b..899d66944d75 100644 +--- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi ++++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi +@@ -83,6 +83,49 @@ vccq_sdhi0: regulator-vccq-sdhi0 { + gpios = <&pinctrl RZG2L_GPIO(39, 0) GPIO_ACTIVE_HIGH>; + regulator-always-on; + }; ++ vring-ctl0@43000000 { ++ compatible = "vring_uio"; ++ reg = <0x0 0x43000000 0x0 0x100000>; ++ no-map; ++ }; ++ ++ vring-ctl1@43100000 { ++ compatible = "vring_uio"; ++ reg = <0x0 0x43100000 0x0 0x100000>; ++ no-map; ++ }; ++ ++ vring-shm0@43200000 { ++ compatible = "shm_uio"; ++ reg = <0x0 0x43200000 0x0 0x300000>; ++ no-map; ++ }; ++ ++ vring-shm1@43500000 { ++ compatible = "shm_uio"; ++ reg = <0x0 0x43500000 0x0 0x300000>; ++ no-map; ++ }; ++ ++ rsctbl@42f00000 { ++ compatible = "shm_uio"; ++ reg = <0x0 0x42f00000 0x0 0x1000>; ++ no-map; ++ }; ++ ++ mhu-shm@42f01000 { ++ compatible = "shm_uio"; ++ reg = <0x0 0x42f01000 0x0 0x1000>; ++ no-map; ++ }; ++ ++ mbox-uio@10400000 { ++ compatible = "mbox_uio"; ++ reg = <0x0 0x10400000 0x0 0x1000>; ++ interrupt-parent = <&gic>; ++ interrupts = ; ++ status = "okay"; ++ }; + }; + + ð0 { +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0004-arm64-dts-renesas-rzg2ul-smarc-Add-uio-support.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0004-arm64-dts-renesas-rzg2ul-smarc-Add-uio-support.patch new file mode 100644 index 0000000000000000000000000000000000000000..cf277297d7ef8768f3a33ccfa58143416812dcc8 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0004-arm64-dts-renesas-rzg2ul-smarc-Add-uio-support.patch @@ -0,0 +1,67 @@ +From 35852a7f8ca6c52f569b55bcd2a3fe45d7a4b165 Mon Sep 17 00:00:00 2001 +From: Canh Dao +Date: Thu, 14 Apr 2022 00:01:49 +0700 +Subject: [PATCH 1/2] arm64: dts: renesas: rzg2ul-smarc: Add uio support for + inter processor communication + +--- + arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi | 43 +++++++++++++++++++ + 1 file changed, 43 insertions(+) + +diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi +index d3c277dacb3c..a96865605638 100644 +--- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi ++++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi +@@ -134,6 +134,49 @@ vccq_sdhi1: regulator-vccq-sdhi1 { + states = <3300000 1 + 1800000 0>; + }; ++ vring-ctl0@43000000 { ++ compatible = "vring_uio"; ++ reg = <0x0 0x43000000 0x0 0x100000>; ++ no-map; ++ }; ++ ++ vring-ctl1@43100000 { ++ compatible = "vring_uio"; ++ reg = <0x0 0x43100000 0x0 0x100000>; ++ no-map; ++ }; ++ ++ vring-shm0@43200000 { ++ compatible = "shm_uio"; ++ reg = <0x0 0x43200000 0x0 0x300000>; ++ no-map; ++ }; ++ ++ vring-shm1@43500000 { ++ compatible = "shm_uio"; ++ reg = <0x0 0x43500000 0x0 0x300000>; ++ no-map; ++ }; ++ ++ rsctbl@42f00000 { ++ compatible = "shm_uio"; ++ reg = <0x0 0x42f00000 0x0 0x1000>; ++ no-map; ++ }; ++ ++ mhu-shm@42f01000 { ++ compatible = "shm_uio"; ++ reg = <0x0 0x42f01000 0x0 0x1000>; ++ no-map; ++ }; ++ ++ mbox-uio@10400000 { ++ compatible = "mbox_uio"; ++ reg = <0x0 0x10400000 0x0 0x1000>; ++ interrupt-parent = <&gic>; ++ interrupts = ; ++ status = "okay"; ++ }; + + x1_clk: x1-clock { + compatible = "fixed-clock"; +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0005-arm64-dts-renesas-rzg2lc-smarc-Disable-SCIF1-OSTM2.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0005-arm64-dts-renesas-rzg2lc-smarc-Disable-SCIF1-OSTM2.patch new file mode 100644 index 0000000000000000000000000000000000000000..f78c15a3528fb6ee4f664586f166c5912c2b321f --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0005-arm64-dts-renesas-rzg2lc-smarc-Disable-SCIF1-OSTM2.patch @@ -0,0 +1,40 @@ +From 7b22b370dba430970a917d4cbc2e0f4c14ca8623 Mon Sep 17 00:00:00 2001 +From: Canh Dao +Date: Wed, 13 Apr 2022 23:59:28 +0700 +Subject: [PATCH 2/2] arm64: dts: renesas: rzg2lc-smarc: Disable SCIF1, OSTM2 + to be used in FreeRTOS + +--- + arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi | 2 +- + arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi +index 899d66944d75..6e137bef5eb6 100644 +--- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi ++++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi +@@ -340,7 +340,7 @@ &ostm1 { + }; + + &ostm2 { +- status = "okay"; ++ status = "disabled"; + }; + + &ehci0 { +diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi +index c06cabb7a734..5f147e03c044 100644 +--- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi ++++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi +@@ -101,7 +101,7 @@ &scif1 { + pinctrl-names = "default"; + + uart-has-rtscts; +- status = "okay"; ++ status = "disabled"; + }; + #endif + +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0006-clk-renesas-r9a07g044-Set-SCIF1-SCIF2-OSTM2.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0006-clk-renesas-r9a07g044-Set-SCIF1-SCIF2-OSTM2.patch new file mode 100644 index 0000000000000000000000000000000000000000..cd7cc4bb359c9c0a420b7ab038c5c6598b095dd1 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0006-clk-renesas-r9a07g044-Set-SCIF1-SCIF2-OSTM2.patch @@ -0,0 +1,26 @@ +From 487fb5e76bef67707e35202711986e12aa6dcc8e Mon Sep 17 00:00:00 2001 +From: Minh Nguyen +Date: Fri, 27 May 2022 20:24:55 +0700 +Subject: [PATCH] clk: renesas: r9a07g044: Set SCIF1, SCIF2, OSTM2 as critical clock + +--- + drivers/clk/renesas/r9a07g044-cpg.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/clk/renesas/r9a07g044-cpg.c b/drivers/clk/renesas/r9a07g044-cpg.c +index e27caa075af7a..f3cda2e05757f 100644 +--- a/drivers/clk/renesas/r9a07g044-cpg.c ++++ b/drivers/clk/renesas/r9a07g044-cpg.c +@@ -449,6 +449,9 @@ static const unsigned int r9a07g044_crit_mod_clks[] __initconst = { + MOD_CLK_BASE + R9A07G044_IA55_PCLK, + MOD_CLK_BASE + R9A07G044_IA55_CLK, + MOD_CLK_BASE + R9A07G044_DMAC_ACLK, ++ MOD_CLK_BASE + R9A07G044_SCIF2_CLK_PCK, ++ MOD_CLK_BASE + R9A07G044_OSTM2_PCLK, ++ MOD_CLK_BASE + R9A07G044_SCIF1_CLK_PCK, + }; + + const struct rzg2l_cpg_info r9a07g044_cpg_info = { +-- +2.17.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0007-arm64-dts-renesas-rzg2ul-smarc-Disable-OSTM2.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0007-arm64-dts-renesas-rzg2ul-smarc-Disable-OSTM2.patch new file mode 100644 index 0000000000000000000000000000000000000000..f1263cdaa61122557a2579cbb5dd253cd8e4922d --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0007-arm64-dts-renesas-rzg2ul-smarc-Disable-OSTM2.patch @@ -0,0 +1,26 @@ +From 1a3c240f6610c8e57a42171b7bce8eee0422df1a Mon Sep 17 00:00:00 2001 +From: Canh Dao +Date: Thu, 14 Apr 2022 00:09:24 +0700 +Subject: [PATCH 2/2] arm64: dts: renesas: rzg2ul-smarc: Disable OSTM2 to be + used in FreeRTOS + +--- + arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi +index a96865605638..5c682f6207ac 100644 +--- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi ++++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi +@@ -808,7 +808,7 @@ &ostm1 { + }; + + &ostm2 { +- status = "okay"; ++ status = "disabled"; + }; + + &mtu3 { +-- +2.25.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0008-clk-renesas-r9a07g043-Set-OSTM2.patch b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0008-clk-renesas-r9a07g043-Set-OSTM2.patch new file mode 100644 index 0000000000000000000000000000000000000000..c02bd83d9fcea784e473f9c549d1db4079c09bbe --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/0008-clk-renesas-r9a07g043-Set-OSTM2.patch @@ -0,0 +1,24 @@ +From ec4b4a5b0bbb140ff2751982477d3ba8bc7b7c50 Mon Sep 17 00:00:00 2001 +From: Minh Nguyen +Date: Fri, 27 May 2022 21:58:06 +0700 +Subject: [PATCH] clk: renesas: r9a07g043: Set OSTM2 as critical clock + +--- + drivers/clk/renesas/r9a07g043-cpg.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/clk/renesas/r9a07g043-cpg.c b/drivers/clk/renesas/r9a07g043-cpg.c +index dad498e1b0693..296923ad08f1f 100644 +--- a/drivers/clk/renesas/r9a07g043-cpg.c ++++ b/drivers/clk/renesas/r9a07g043-cpg.c +@@ -399,6 +399,7 @@ static const unsigned int r9a07g043_crit_mod_clks[] __initconst = { + MOD_CLK_BASE + R9A07G043_IA55_PCLK, + MOD_CLK_BASE + R9A07G043_IA55_CLK, + MOD_CLK_BASE + R9A07G043_DMAC_ACLK, ++ MOD_CLK_BASE + R9A07G043_OSTM2_PCLK, + }; + + const struct rzg2l_cpg_info r9a07g043_cpg_info = { +-- +2.17.1 + diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/touch.cfg b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/touch.cfg new file mode 100644 index 0000000000000000000000000000000000000000..327c753ae1f78c30bd9d26664c8ed61e3faf8858 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/touch.cfg @@ -0,0 +1 @@ +CONFIG_HID_MULTITOUCH=y diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/uio.cfg b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/uio.cfg new file mode 100644 index 0000000000000000000000000000000000000000..ab076fe46b1b7ad6694dbfdf8346992d5a585fbf --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir/uio.cfg @@ -0,0 +1,4 @@ +# uio +CONFIG_UIO=y +CONFIG_UIO_PDRV_GENIRQ=y +CONFIG_UIO_DMEM_GENIRQ=y diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir_5.10.bb b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir_5.10.bb new file mode 100644 index 0000000000000000000000000000000000000000..4a8a0edca61b03e5966ac8c7b950327864275ba9 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir_5.10.bb @@ -0,0 +1,107 @@ +DESCRIPTION = "Linux kernel for the RZG2 based board" + +RDEPENDS:${KERNEL_PACKAGE_NAME}-image:remove = "${@oe.utils.conditional('KERNEL_IMAGETYPE', 'vmlinux', '${KERNEL_PACKAGE_NAME}-vmlinux (= ${EXTENDPKGV})', '', d)}" + +require recipes-kernel/linux/linux-yocto.inc +# require include/docker-control.inc + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}/:" +#COMPATIBLE_MACHINE_rzg2l = "(smarc-rzg2l|smarc-rzg2lc|smarc-rzg2ul|smarc-rzv2l|rzv2l-dev)" +#COMPATIBLE_MACHINE_rzg2h = "(ek874|hihope-rzg2n|hihope-rzg2m|hihope-rzg2h)" +# COMPATIBLE_MACHINE_yg2lx = "(myir-yg2lx|myir-yg2lx-1g)" +# COMPATIBLE_MACHINE_remi = "(myir-remi|myir-remi-1g)" +COMPATIBLE_MACHINE = "myir-remi" + +#KERNEL_URL = " \ +# git://github.com/renesas-rz/rz_linux-cip.git" + +#SRC_URI += "\ +# git://github.com/123markhong/yg2lx-kernel.git;protocol=https;branch=master" +#SRCREV= "96c21b36384abbc828f93ae5ea3edb1e55210082" + +#SRC_URI += "\ +# git://github.com/123markhong/myir-renesas-linux.git;protocol=https;branch=develop-rz-L5.10.83" +#SRCREV= "0218cba1bd7bf83c95fa7b942542d4251c6fe345" +#SRCREV= "63e19f3ffb2ce335a11bfe057bd980a684629e34" +#SRCREV = "195975536df5cf843dbe9c629f73ef839b04a199" + +# SRC_URI += "\ +# git://github.com/MYiR-Dev/myir-renesas-linux.git;protocol=https;branch=develop-remi-L5.10.83" +# SRCREV= "d795edc9d0ce69f4ff1ac914a7668f043d444cce" + +SRC_URI += "\ + file://myir-renesas-linux \ +" + +#SRC_URI += "\ +# git:///home/hjx/renesas/04_Sources/new-source/myir-renesas-linux;protocol=file;branch=develop-rz-L5.10.83" +#SRCREV= "38a409074d5b0107208e97be29103b11ae4b7196" + +#SRC_URI += "\ +# git:///opt/hjx-source/renesas/remi-pi/sources/myir-renesas-linux;protocol=file;branch=develop-remi-L5.10.83" +#SRCREV= "d795edc9d0ce69f4ff1ac914a7668f043d444cce" + +LINUX_VERSION = "5.10.83" + + +SRC_URI += " \ + file://0001-arm64-dts-renesas-rzg2l-smarc-Add-uio-support.patch \ + file://0002-arm64-dts-renesas-rzg2l-smarc-Disable-OSTM2.patch \ + file://0003-arm64-dts-renesas-rzg2lc-smarc-Add-uio-support.patch \ + file://0004-arm64-dts-renesas-rzg2ul-smarc-Add-uio-support.patch \ + file://0005-arm64-dts-renesas-rzg2lc-smarc-Disable-SCIF1-OSTM2.patch \ + file://0006-clk-renesas-r9a07g044-Set-SCIF1-SCIF2-OSTM2.patch \ + file://0007-arm64-dts-renesas-rzg2ul-smarc-Disable-OSTM2.patch \ + file://0008-clk-renesas-r9a07g043-Set-OSTM2.patch \ +" +# Kernel confguration update +SRC_URI += "file://uio.cfg" + + + +#BRANCH = "${@oe.utils.conditional("IS_RT_BSP", "1", "rz-5.10-cip13-rt5", "rz-5.10-cip13",d)}" +#SRCREV = "${@oe.utils.conditional("IS_RT_BSP", "1", "c8798f35184b8115f9aba9f972eb12ed3bb4e9e0", "61bbadb8a4b899371c83e1cbadd0a46ffd6ebb40",d)}" + +#SRC_URI = "${KERNEL_URL};protocol=https;nocheckout=1;branch=${BRANCH}" +LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46" +#LINUX_VERSION ?= "${@oe.utils.conditional("IS_RT_BSP", "1", "5.10.131-cip13-rt5", "5.10.131-cip13",d)}" + +PV = "${LINUX_VERSION}" +PR = "r1" + +S = "${WORKDIR}/myir-renesas-linux" + +SRC_URI:append = "\ + ${@oe.utils.conditional("USE_DOCKER", "1", " file://docker.cfg ", "", d)} \ + file://touch.cfg \ +" + +KBUILD_DEFCONFIG = "mys_g2lx_defconfig" +KCONFIG_MODE = "alldefconfig" + +do_kernel_metadata_af_patch() { + # need to recall do_kernel_metadata after do_patch for some patches applied to defconfig + rm -f ${WORKDIR}/defconfig + do_kernel_metadata +} + +do_deploy:append() { + for dtbf in ${KERNEL_DEVICETREE}; do + dtb=`normalize_dtb "$dtbf"` + dtb_ext=${dtb##*.} + dtb_base_name=`basename $dtb .$dtb_ext` + for type in ${KERNEL_IMAGETYPE_FOR_MAKE}; do + ln -sf $dtb_base_name-${KERNEL_DTB_NAME}.$dtb_ext $deployDir/$type-$dtb_base_name.$dtb_ext + done + done +} + +addtask do_kernel_metadata_af_patch after do_patch before do_kernel_configme + +# Fix race condition, which can causes configs in defconfig file be ignored +do_kernel_configme[depends] += "virtual/${TARGET_PREFIX}binutils:do_populate_sysroot" +do_kernel_configme[depends] += "virtual/${TARGET_PREFIX}gcc:do_populate_sysroot" +do_kernel_configme[depends] += "bc-native:do_populate_sysroot bison-native:do_populate_sysroot" + +# Fix error: openssl/bio.h: No such file or directory +DEPENDS += "openssl-native" diff --git a/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir_5.10.bbappend b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir_5.10.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..51d2e4af430850c9310a0b4c89944c2b27173d32 --- /dev/null +++ b/bsp/meta-openeuler-bsp/renesas/recipes-remi/recipes-kernel/linux/linux-myir_5.10.bbappend @@ -0,0 +1,8 @@ +#FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" + +#SRC_URI_append = " \ +# file://0001-Fixed-an-issue-that-caused-flicker-when-outputting-t.patch \ +#" + +PACKAGES += "${KERNEL_PACKAGE_NAME}-img" +FILES:${KERNEL_PACKAGE_NAME}-img = "/boot/Image" diff --git a/meta-openeuler/classes/openeuler.bbclass b/meta-openeuler/classes/openeuler.bbclass index 607b1264b8558a5362f05eb5fcb9c5e311707561..a43da0a2524ebe31caf50a7e80981b31ee3f2191 100644 --- a/meta-openeuler/classes/openeuler.bbclass +++ b/meta-openeuler/classes/openeuler.bbclass @@ -37,7 +37,7 @@ def openeuler_get_checksum_file_list(d): return " ".join(filelist) -do_fetch[file-checksums] += "${@openeuler_get_checksum_file_list(d)}" +# do_fetch[file-checksums] += "${@openeuler_get_checksum_file_list(d)}" # set_rpmdpes is used to set RPMDEPS which comes from nativesdk/host python set_rpmdeps() { @@ -118,9 +118,10 @@ python () { # adapted in openEuler, use original fetch if d.getVar("MANIFEST_DIR") is not None and os.path.exists(d.getVar("MANIFEST_DIR")): manifest_list = get_manifest(d.getVar("MANIFEST_DIR")) - if local_name not in manifest_list: - d.setVar('OPENEULER_FETCH', 'disable') - return + if d.getVar("OPENEULER_MULTI_REPOS") is None: + if local_name not in manifest_list: + d.setVar('OPENEULER_FETCH', 'disable') + return # handle the SRC_URI if src_uri and remove_list: @@ -139,8 +140,9 @@ python () { d.setVar('BB_DONT_CACHE', '1') # set SRCREV, if SRCREV changed because of the corresponding changes in manifest.yaml, # do_fetch will re-run - repo_item = manifest_list[local_name] - d.setVar('SRCREV', repo_item['version']) + if d.getVar("OPENEULER_MULTI_REPOS") is None: + repo_item = manifest_list[local_name] + d.setVar('SRCREV', repo_item['version']) } # fetch multi repos in one recipe bb file, an example is @@ -155,7 +157,7 @@ python do_openeuler_fetch_multi() { repo_list = d.getVar("OPENEULER_MULTI_REPOS").split() for item_name in repo_list: - d.setVar("OPENEULER_REPO_NAME", item_name) + d.setVar("OPENEULER_LOCAL_NAME", item_name) bb.build.exec_func("do_openeuler_fetch", d) # Restore the variables related to the original package @@ -182,7 +184,6 @@ python do_openeuler_fetch() { local_name = d.getVar('OPENEULER_LOCAL_NAME') if d.getVar('OPENEULER_LOCAL_NAME') else d.getVar('OPENEULER_REPO_NAME') urls = d.getVar("SRC_URI").split() - # for fake recipes without SRC_URI pass src_uri = (d.getVar('SRC_URI') or "").split() if len(src_uri) == 0: diff --git a/meta-openeuler/recipes-devtools/python/python3-pycryptodome_%.bbappend b/meta-openeuler/recipes-devtools/python/python3-pycryptodome_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..03a101b4e74168e5f6e30e104ddc5c5dbb876105 --- /dev/null +++ b/meta-openeuler/recipes-devtools/python/python3-pycryptodome_%.bbappend @@ -0,0 +1,4 @@ +PV = "3.20.0" +require pypi-src-openeuler.inc + +BBCLASSEXTEND = "native" diff --git a/meta-openeuler/recipes-devtools/python/python3-pycryptodomex_%.bbappend b/meta-openeuler/recipes-devtools/python/python3-pycryptodomex_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..03a101b4e74168e5f6e30e104ddc5c5dbb876105 --- /dev/null +++ b/meta-openeuler/recipes-devtools/python/python3-pycryptodomex_%.bbappend @@ -0,0 +1,4 @@ +PV = "3.20.0" +require pypi-src-openeuler.inc + +BBCLASSEXTEND = "native" diff --git a/meta-openeuler/recipes-support/vim/vim_%.bbappend b/meta-openeuler/recipes-support/vim/vim_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..cc76e007624cc050ab9c32105b049cceda4ea2a1 --- /dev/null +++ b/meta-openeuler/recipes-support/vim/vim_%.bbappend @@ -0,0 +1,22 @@ +# bbfile: yocto-poky/meta/recipes-support/vim/vim_9.0.bb + +PV = "9.0.2092" + +LIC_FILES_CHKSUM = "file://LICENSE;md5=d1a651ab770b45d41c0f8cb5a8ca930e" + + +# file://vim-7.0-fixkeys.patch +# file://vim-7.4-specsyntax.patch +# file://vim-7.4-fstabsyntax.patch +# file://vim-7.4-globalsyntax.patch +# file://vim-8.0-copy-paste.patch +# file://vim-python3-tests.patch +# file://bugfix-rm-modify-info-version.patch + +SRC_URI = " \ + file://vim-9.0.2092.tar.gz \ + file://vimrc \ + file://virc \ +" + +S = "${WORKDIR}/vim-9.0.2092"