diff --git a/.oebuild/cross-tools/configs/config_aarch64 b/.oebuild/cross-tools/configs/config_aarch64 index 347ba1a221f152c7a986f5cbb4ae89ac7df8fc40..807d8fa97c645817f2c205a6ac65401da0754ec9 100644 --- a/.oebuild/cross-tools/configs/config_aarch64 +++ b/.oebuild/cross-tools/configs/config_aarch64 @@ -1026,7 +1026,7 @@ CT_ZLIB_PKG_NAME="zlib" # CT_ZLIB_SRC_RELEASE is not set # CT_ZLIB_SRC_DEVEL is not set CT_ZLIB_SRC_CUSTOM=y -CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.3.1" +CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.2.13" CT_ZLIB_PATCH_GLOBAL=y # CT_ZLIB_PATCH_BUNDLED is not set # CT_ZLIB_PATCH_LOCAL is not set diff --git a/.oebuild/cross-tools/configs/config_aarch64-musl b/.oebuild/cross-tools/configs/config_aarch64-musl index 7fbea9ab3c8f9f0f1838bf2c2001b6279844967f..4d93a002a067408b84f0321b45794cdb40e9f2de 100644 --- a/.oebuild/cross-tools/configs/config_aarch64-musl +++ b/.oebuild/cross-tools/configs/config_aarch64-musl @@ -922,7 +922,7 @@ CT_ZLIB_PKG_NAME="zlib" # CT_ZLIB_SRC_RELEASE is not set # CT_ZLIB_SRC_DEVEL is not set CT_ZLIB_SRC_CUSTOM=y -CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.2.11" +CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.2.13" CT_ZLIB_PATCH_GLOBAL=y # CT_ZLIB_PATCH_BUNDLED is not set # CT_ZLIB_PATCH_LOCAL is not set diff --git a/.oebuild/cross-tools/configs/config_arm32 b/.oebuild/cross-tools/configs/config_arm32 index a422d52f605cafe28c03273922a9504dee6f2c55..c5a60e5fadce7e190c9616aeb600c23b22c8e62d 100644 --- a/.oebuild/cross-tools/configs/config_arm32 +++ b/.oebuild/cross-tools/configs/config_arm32 @@ -1061,7 +1061,7 @@ CT_ZLIB_PKG_NAME="zlib" # CT_ZLIB_SRC_RELEASE is not set # CT_ZLIB_SRC_DEVEL is not set CT_ZLIB_SRC_CUSTOM=y -CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.3.1" +CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.2.13" CT_ZLIB_PATCH_GLOBAL=y # CT_ZLIB_PATCH_BUNDLED is not set # CT_ZLIB_PATCH_LOCAL is not set diff --git a/.oebuild/cross-tools/configs/config_loongarch64 b/.oebuild/cross-tools/configs/config_loongarch64 new file mode 100644 index 0000000000000000000000000000000000000000..7b8b7ea351597949890b1120c51bb36b669f5d20 --- /dev/null +++ b/.oebuild/cross-tools/configs/config_loongarch64 @@ -0,0 +1,1013 @@ +# +# Automatically generated file; DO NOT EDIT. +# crosstool-NG 1.26.0 Configuration +# +CT_CONFIGURE_has_static_link=y +CT_CONFIGURE_has_cxx11=y +CT_CONFIGURE_has_wget=y +CT_CONFIGURE_has_rsync=y +CT_CONFIGURE_has_make_3_81_or_newer=y +CT_CONFIGURE_has_make_4_0_or_newer=y +CT_CONFIGURE_has_libtool_2_4_or_newer=y +CT_CONFIGURE_has_libtoolize_2_4_or_newer=y +CT_CONFIGURE_has_autoconf_2_65_or_newer=y +CT_CONFIGURE_has_autoreconf_2_65_or_newer=y +CT_CONFIGURE_has_automake_1_15_or_newer=y +CT_CONFIGURE_has_gnu_m4_1_4_12_or_newer=y +CT_CONFIGURE_has_python_3_4_or_newer=y +CT_CONFIGURE_has_bison_2_7_or_newer=y +CT_CONFIGURE_has_bison_3_0_4_or_newer=y +CT_CONFIGURE_has_python=y +CT_CONFIGURE_has_git=y +CT_CONFIGURE_has_md5sum=y +CT_CONFIGURE_has_sha1sum=y +CT_CONFIGURE_has_sha256sum=y +CT_CONFIGURE_has_sha512sum=y +CT_CONFIGURE_has_install_with_strip_program=y +CT_VERSION="1.26.0" +CT_VCHECK="" +CT_CONFIG_VERSION_ENV="4" +CT_CONFIG_VERSION_CURRENT="4" +CT_CONFIG_VERSION="4" +CT_MODULES=y + + +OPENSOURCE_DIR="${CROSS_SOURCE}./open_source" +X_TOOLS_DIR="${HOME}/x-tools" + +# +# Paths and misc options +# + +# +# crosstool-NG behavior +# +# CT_OBSOLETE is not set +CT_EXPERIMENTAL=y +# CT_ALLOW_BUILD_AS_ROOT is not set +# CT_ENABLE_EXPERIMENTAL_BUNDLED_PATCHES is not set +# CT_DEBUG_CT is not set + +# +# Paths +# +CT_LOCAL_TARBALLS_DIR="${HOME}/src" +CT_SAVE_TARBALLS=y +# CT_TARBALLS_BUILDROOT_LAYOUT is not set +CT_WORK_DIR="${CT_TOP_DIR}/.build" +CT_BUILD_TOP_DIR="${CT_WORK_DIR:-${CT_TOP_DIR}/.build}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}" +CT_BUILD_DIR="${CT_BUILD_TOP_DIR}/build" +CT_PREFIX_DIR="${CT_PREFIX:-${X_TOOLS_DIR}}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}" +CT_RM_RF_PREFIX_DIR=y +CT_REMOVE_DOCS=y +CT_INSTALL_LICENSES=y +CT_PREFIX_DIR_RO=y +CT_STRIP_HOST_TOOLCHAIN_EXECUTABLES=y +# CT_STRIP_TARGET_TOOLCHAIN_EXECUTABLES is not set +# CT_TARBALL_RESULT is not set + +# +# Downloading +# +CT_DOWNLOAD_AGENT_WGET=y +# CT_DOWNLOAD_AGENT_NONE is not set +# CT_FORBID_DOWNLOAD is not set +# CT_FORCE_DOWNLOAD is not set +CT_CONNECT_TIMEOUT=10 +CT_DOWNLOAD_WGET_OPTIONS="--passive-ftp --tries=3 -nc --progress=dot:binary" +# CT_ONLY_DOWNLOAD is not set +# CT_USE_MIRROR is not set +CT_VERIFY_DOWNLOAD_DIGEST=y +CT_VERIFY_DOWNLOAD_DIGEST_SHA512=y +# CT_VERIFY_DOWNLOAD_DIGEST_SHA256 is not set +# CT_VERIFY_DOWNLOAD_DIGEST_SHA1 is not set +# CT_VERIFY_DOWNLOAD_DIGEST_MD5 is not set +CT_VERIFY_DOWNLOAD_DIGEST_ALG="sha512" +# CT_VERIFY_DOWNLOAD_SIGNATURE is not set + +# +# Extracting +# +# CT_FORCE_EXTRACT is not set +CT_OVERRIDE_CONFIG_GUESS_SUB=y +# CT_ONLY_EXTRACT is not set +CT_PATCH_BUNDLED=y +# CT_PATCH_LOCAL is not set +# CT_PATCH_BUNDLED_LOCAL is not set +# CT_PATCH_LOCAL_BUNDLED is not set +# CT_PATCH_NONE is not set +CT_PATCH_ORDER="bundled" + +# +# Build behavior +# +CT_PARALLEL_JOBS=0 +CT_LOAD="" +CT_USE_PIPES=y +CT_EXTRA_CFLAGS_FOR_BUILD="" +CT_EXTRA_CXXFLAGS_FOR_BUILD="" +CT_EXTRA_LDFLAGS_FOR_BUILD="" +CT_EXTRA_CFLAGS_FOR_HOST="" +CT_EXTRA_LDFLAGS_FOR_HOST="" +# CT_CONFIG_SHELL_SH is not set +# CT_CONFIG_SHELL_ASH is not set +CT_CONFIG_SHELL_BASH=y +# CT_CONFIG_SHELL_CUSTOM is not set +CT_CONFIG_SHELL="${bash}" + +# +# Logging +# +# CT_LOG_ERROR is not set +# CT_LOG_WARN is not set +# CT_LOG_INFO is not set +CT_LOG_EXTRA=y +# CT_LOG_ALL is not set +# CT_LOG_DEBUG is not set +CT_LOG_LEVEL_MAX="EXTRA" +# CT_LOG_SEE_TOOLS_WARN is not set +CT_LOG_PROGRESS_BAR=y +CT_LOG_TO_FILE=y +CT_LOG_FILE_COMPRESS=y +# end of Paths and misc options + +# +# Target options +# +# CT_ARCH_ALPHA is not set +# CT_ARCH_ARC is not set +# CT_ARCH_ARM is not set +# CT_ARCH_AVR is not set +# CT_ARCH_BPF is not set +# CT_ARCH_C6X is not set +CT_ARCH_LOONGARCH=y +# CT_ARCH_M68K is not set +# CT_ARCH_MICROBLAZE is not set +# CT_ARCH_MIPS is not set +# CT_ARCH_MOXIE is not set +# CT_ARCH_MSP430 is not set +# CT_ARCH_NIOS2 is not set +# CT_ARCH_POWERPC is not set +# CT_ARCH_PRU is not set +# CT_ARCH_RISCV is not set +# CT_ARCH_S390 is not set +# CT_ARCH_SH is not set +# CT_ARCH_SPARC is not set +# CT_ARCH_X86 is not set +# CT_ARCH_XTENSA is not set +CT_ARCH="loongarch" +CT_ARCH_CHOICE_KSYM="LOONGARCH" +CT_ARCH_TUNE="" +CT_ARCH_LOONGARCH_SHOW=y + +# +# Options for loongarch +# +CT_ARCH_LOONGARCH_PKG_KSYM="" +CT_ALL_ARCH_CHOICES="ALPHA ARC ARM AVR BPF C6X LOONGARCH M68K MICROBLAZE MIPS MOXIE MSP430 NIOS2 POWERPC PRU RISCV S390 SH SPARC X86 XTENSA" +CT_ARCH_SUFFIX="" +# CT_OMIT_TARGET_VENDOR is not set + +# +# Generic target options +# +# CT_MULTILIB is not set +# CT_DEMULTILIB is not set +CT_ARCH_SUPPORTS_BOTH_MMU=y +CT_ARCH_USE_MMU=y +CT_ARCH_SUPPORTS_64=y +CT_ARCH_DEFAULT_64=y +CT_ARCH_BITNESS=64 +CT_ARCH_64=y + +# +# Target optimisations +# +CT_ARCH_SUPPORTS_WITH_ARCH=y +CT_ARCH_SUPPORTS_WITH_ABI=y +CT_ARCH_SUPPORTS_WITH_TUNE=y +CT_ARCH_ARCH="loongarch64" +CT_ARCH_ABI="" +CT_TARGET_CFLAGS="" +CT_TARGET_LDFLAGS="" +# end of Target options + +# +# Toolchain options +# + +# +# General toolchain options +# +CT_FORCE_SYSROOT=y +CT_USE_SYSROOT=y +CT_SYSROOT_NAME="sysroot" +CT_SYSROOT_DIR_PREFIX="" +CT_WANTS_STATIC_LINK=y +CT_WANTS_STATIC_LINK_CXX=y +# CT_STATIC_TOOLCHAIN is not set +CT_SHOW_CT_VERSION=y +CT_TOOLCHAIN_PKGVERSION="" +CT_TOOLCHAIN_BUGURL="" + +# +# Tuple completion and aliasing +# +CT_TARGET_VENDOR="openeuler" +CT_TARGET_ALIAS_SED_EXPR="" +CT_TARGET_ALIAS="" + +# +# Toolchain type +# +# CT_NATIVE is not set +CT_CROSS=y +# CT_CROSS_NATIVE is not set +# CT_CANADIAN is not set +CT_TOOLCHAIN_TYPE="cross" + +# +# Build system +# +CT_BUILD="" +CT_BUILD_PREFIX="" +CT_BUILD_SUFFIX="" + +# +# Misc options +# +# CT_TOOLCHAIN_ENABLE_NLS is not set +# end of Toolchain options + +# +# Operating System +# +CT_KERNEL_SUPPORTS_SHARED_LIBS=y +# CT_KERNEL_BARE_METAL is not set +CT_KERNEL_LINUX=y +CT_KERNEL="linux" +CT_KERNEL_CHOICE_KSYM="LINUX" +CT_KERNEL_LINUX_SHOW=y + +# +# Options for linux +# +CT_KERNEL_LINUX_PKG_KSYM="LINUX" +CT_LINUX_DIR_NAME="linux" +CT_LINUX_USE_WWW_KERNEL_ORG=y +# CT_LINUX_USE_ORACLE is not set +CT_LINUX_USE="LINUX" +CT_LINUX_PKG_NAME="linux" +# CT_LINUX_SRC_RELEASE is not set +# CT_LINUX_SRC_DEVEL is not set +CT_LINUX_SRC_CUSTOM=y +CT_LINUX_CUSTOM_LOCATION="${OPENSOURCE_DIR}/kernel" +CT_LINUX_PATCH_GLOBAL=y +# CT_LINUX_PATCH_BUNDLED is not set +# CT_LINUX_PATCH_LOCAL is not set +# CT_LINUX_PATCH_BUNDLED_LOCAL is not set +# CT_LINUX_PATCH_LOCAL_BUNDLED is not set +# CT_LINUX_PATCH_NONE is not set +CT_LINUX_PATCH_ORDER="global" +CT_LINUX_VERY_NEW=y +# CT_LINUX_V_6_4 is not set +# CT_LINUX_V_6_3 is not set +# CT_LINUX_V_6_2 is not set +# CT_LINUX_V_6_1 is not set +# CT_LINUX_V_6_0 is not set +# CT_LINUX_V_5_19 is not set +CT_LINUX_VERSION="new" +CT_LINUX_MIRRORS="$(CT_Mirrors kernel.org linux ${CT_LINUX_VERSION})" +CT_LINUX_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_LINUX_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_LINUX_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_LINUX_SIGNATURE_FORMAT="unpacked/.sign" +CT_LINUX_later_than_5_19=y +CT_LINUX_5_19_or_later=y +CT_LINUX_REQUIRE_5_19_or_later=y +CT_LINUX_later_than_5_12=y +CT_LINUX_5_12_or_later=y +CT_LINUX_later_than_5_5=y +CT_LINUX_5_5_or_later=y +CT_LINUX_later_than_5_3=y +CT_LINUX_5_3_or_later=y +CT_LINUX_later_than_4_8=y +CT_LINUX_4_8_or_later=y +CT_LINUX_later_than_3_7=y +CT_LINUX_3_7_or_later=y +CT_LINUX_later_than_3_2=y +CT_LINUX_3_2_or_later=y +CT_LINUX_REQUIRE_3_2_or_later=y +CT_KERNEL_DEP_RSYNC=y +CT_KERNEL_LINUX_VERBOSITY_0=y +# CT_KERNEL_LINUX_VERBOSITY_1 is not set +# CT_KERNEL_LINUX_VERBOSITY_2 is not set +CT_KERNEL_LINUX_VERBOSE_LEVEL=0 +CT_ALL_KERNEL_CHOICES="BARE_METAL LINUX WINDOWS" + +# +# Common kernel options +# +CT_SHARED_LIBS=y +# end of Operating System + +# +# Binary utilities +# +CT_ARCH_BINFMT_ELF=y +CT_BINUTILS_BINUTILS=y +CT_BINUTILS="binutils" +CT_BINUTILS_CHOICE_KSYM="BINUTILS" +CT_BINUTILS_BINUTILS_SHOW=y + +# +# Options for binutils +# +CT_BINUTILS_BINUTILS_PKG_KSYM="BINUTILS" +CT_BINUTILS_DIR_NAME="binutils" +CT_BINUTILS_USE_GNU=y +# CT_BINUTILS_USE_LINARO is not set +# CT_BINUTILS_USE_ORACLE is not set +CT_BINUTILS_USE="BINUTILS" +CT_BINUTILS_PKG_NAME="binutils" +# CT_BINUTILS_SRC_RELEASE is not set +# CT_BINUTILS_SRC_DEVEL is not set +CT_BINUTILS_SRC_CUSTOM=y +CT_BINUTILS_CUSTOM_LOCATION="${OPENSOURCE_DIR}/binutils/binutils-2.41" +CT_BINUTILS_PATCH_GLOBAL=y +# CT_BINUTILS_PATCH_BUNDLED is not set +# CT_BINUTILS_PATCH_LOCAL is not set +# CT_BINUTILS_PATCH_BUNDLED_LOCAL is not set +# CT_BINUTILS_PATCH_LOCAL_BUNDLED is not set +# CT_BINUTILS_PATCH_NONE is not set +CT_BINUTILS_PATCH_ORDER="global" +CT_BINUTILS_VERY_NEW=y +# CT_BINUTILS_V_2_40 is not set +# CT_BINUTILS_V_2_39 is not set +CT_BINUTILS_VERSION="new" +CT_BINUTILS_MIRRORS="$(CT_Mirrors GNU binutils) $(CT_Mirrors sourceware binutils/releases)" +CT_BINUTILS_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_BINUTILS_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_BINUTILS_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_BINUTILS_SIGNATURE_FORMAT="packed/.sig" +CT_BINUTILS_later_than_2_39=y +CT_BINUTILS_2_39_or_later=y +CT_BINUTILS_REQUIRE_2_39_or_later=y +CT_BINUTILS_later_than_2_30=y +CT_BINUTILS_2_30_or_later=y +CT_BINUTILS_later_than_2_27=y +CT_BINUTILS_2_27_or_later=y +CT_BINUTILS_later_than_2_26=y +CT_BINUTILS_2_26_or_later=y + +# +# GNU binutils +# +CT_BINUTILS_FORCE_LD_BFD_DEFAULT=y +CT_BINUTILS_LINKER_LD=y +CT_BINUTILS_LINKERS_LIST="ld" +CT_BINUTILS_LINKER_DEFAULT="bfd" +# CT_BINUTILS_PLUGINS is not set +CT_BINUTILS_RELRO=m +CT_BINUTILS_DETERMINISTIC_ARCHIVES=y +CT_BINUTILS_EXTRA_CONFIG_ARRAY="" +# CT_BINUTILS_FOR_TARGET is not set +CT_ALL_BINUTILS_CHOICES="BINUTILS" +# end of Binary utilities + +# +# C-library +# +CT_LIBC_GLIBC=y +# CT_LIBC_MUSL is not set +# CT_LIBC_UCLIBC_NG is not set +CT_LIBC="glibc" +CT_LIBC_CHOICE_KSYM="GLIBC" +CT_LIBC_GLIBC_SHOW=y + +# +# Options for glibc +# +CT_LIBC_GLIBC_PKG_KSYM="GLIBC" +CT_GLIBC_DIR_NAME="glibc" +CT_GLIBC_USE_GNU=y +# CT_GLIBC_USE_ORACLE is not set +CT_GLIBC_USE="GLIBC" +CT_GLIBC_PKG_NAME="glibc" +# CT_GLIBC_SRC_RELEASE is not set +# CT_GLIBC_SRC_DEVEL is not set +CT_GLIBC_SRC_CUSTOM=y +CT_GLIBC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/glibc/glibc-2.38" +CT_GLIBC_PATCH_GLOBAL=y +# CT_GLIBC_PATCH_BUNDLED is not set +# CT_GLIBC_PATCH_LOCAL is not set +# CT_GLIBC_PATCH_BUNDLED_LOCAL is not set +# CT_GLIBC_PATCH_LOCAL_BUNDLED is not set +# CT_GLIBC_PATCH_NONE is not set +CT_GLIBC_PATCH_ORDER="global" +# CT_GLIBC_VERY_NEW is not set +CT_GLIBC_V_2_38=y +# CT_GLIBC_V_2_37 is not set +# CT_GLIBC_V_2_36 is not set +CT_GLIBC_VERSION="2.38" +CT_GLIBC_MIRRORS="$(CT_Mirrors GNU glibc)" +CT_GLIBC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GLIBC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GLIBC_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_GLIBC_SIGNATURE_FORMAT="packed/.sig" +CT_GLIBC_2_38_or_later=y +CT_GLIBC_2_38_or_older=y +CT_GLIBC_later_than_2_37=y +CT_GLIBC_2_37_or_later=y +CT_GLIBC_later_than_2_36=y +CT_GLIBC_2_36_or_later=y +CT_GLIBC_REQUIRE_2_36_or_later=y +CT_GLIBC_later_than_2_34=y +CT_GLIBC_2_34_or_later=y +CT_GLIBC_later_than_2_32=y +CT_GLIBC_2_32_or_later=y +CT_GLIBC_later_than_2_31=y +CT_GLIBC_2_31_or_later=y +CT_GLIBC_later_than_2_30=y +CT_GLIBC_2_30_or_later=y +CT_GLIBC_later_than_2_29=y +CT_GLIBC_2_29_or_later=y +CT_GLIBC_later_than_2_28=y +CT_GLIBC_2_28_or_later=y +CT_GLIBC_later_than_2_27=y +CT_GLIBC_2_27_or_later=y +CT_GLIBC_later_than_2_26=y +CT_GLIBC_2_26_or_later=y +CT_GLIBC_later_than_2_25=y +CT_GLIBC_2_25_or_later=y +CT_GLIBC_later_than_2_24=y +CT_GLIBC_2_24_or_later=y +CT_GLIBC_later_than_2_23=y +CT_GLIBC_2_23_or_later=y +CT_GLIBC_later_than_2_20=y +CT_GLIBC_2_20_or_later=y +CT_GLIBC_later_than_2_17=y +CT_GLIBC_2_17_or_later=y +CT_GLIBC_later_than_2_14=y +CT_GLIBC_2_14_or_later=y +CT_GLIBC_DEP_KERNEL_HEADERS_VERSION=y +CT_GLIBC_DEP_BINUTILS=y +CT_GLIBC_DEP_GCC=y +CT_GLIBC_DEP_PYTHON=y +CT_THREADS="nptl" +CT_GLIBC_BUILD_SSP=y +CT_GLIBC_HAS_LIBIDN_ADDON=y +# CT_GLIBC_USE_LIBIDN_ADDON is not set +CT_GLIBC_NO_SPARC_V8=y +CT_GLIBC_HAS_OBSOLETE_LIBCRYPT=y +CT_GLIBC_EXTRA_CONFIG_ARRAY="--enable-crypt" +CT_GLIBC_CONFIGPARMS="" +CT_GLIBC_ENABLE_DEBUG=y +CT_GLIBC_EXTRA_CFLAGS="" +# CT_GLIBC_ENABLE_OBSOLETE_LIBCRYPT is not set +# CT_GLIBC_ENABLE_FORTIFIED_BUILD is not set +# CT_GLIBC_DISABLE_VERSIONING is not set +CT_GLIBC_OLDEST_ABI="" +CT_GLIBC_FORCE_UNWIND=y +# CT_GLIBC_LOCALES is not set +CT_GLIBC_KERNEL_VERSION_NONE=y +# CT_GLIBC_KERNEL_VERSION_AS_HEADERS is not set +# CT_GLIBC_KERNEL_VERSION_CHOSEN is not set +CT_GLIBC_MIN_KERNEL="" +CT_GLIBC_SSP_DEFAULT=y +# CT_GLIBC_SSP_NO is not set +# CT_GLIBC_SSP_YES is not set +# CT_GLIBC_SSP_ALL is not set +# CT_GLIBC_SSP_STRONG is not set +CT_GLIBC_ENABLE_WERROR=y +# CT_GLIBC_ENABLE_COMMON_FLAG is not set +CT_ALL_LIBC_CHOICES="AVR_LIBC GLIBC MINGW_W64 MOXIEBOX MUSL NEWLIB NONE PICOLIBC UCLIBC_NG" +CT_LIBC_SUPPORT_THREADS_ANY=y +CT_LIBC_SUPPORT_THREADS_NATIVE=y + +# +# Common C library options +# +CT_THREADS_NATIVE=y +# CT_CREATE_LDSO_CONF is not set +CT_LIBC_XLDD=y +# end of C-library + +# +# C compiler +# +CT_CC_CORE_NEEDED=y +CT_CC_SUPPORT_CXX=y +CT_CC_SUPPORT_FORTRAN=y +CT_CC_SUPPORT_ADA=y +CT_CC_SUPPORT_D=y +CT_CC_SUPPORT_JIT=y +CT_CC_SUPPORT_OBJC=y +CT_CC_SUPPORT_OBJCXX=y +CT_CC_SUPPORT_GOLANG=y +CT_CC_GCC=y +CT_CC="gcc" +CT_CC_CHOICE_KSYM="GCC" +CT_CC_GCC_SHOW=y + +# +# Options for gcc +# +CT_CC_GCC_PKG_KSYM="GCC" +CT_GCC_DIR_NAME="gcc" +CT_GCC_USE_GNU=y +# CT_GCC_USE_LINARO is not set +# CT_GCC_USE_ORACLE is not set +CT_GCC_USE="GCC" +CT_GCC_PKG_NAME="gcc" +# CT_GCC_SRC_RELEASE is not set +# CT_GCC_SRC_DEVEL is not set +CT_GCC_SRC_CUSTOM=y +CT_GCC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gcc/gcc-12.3.0" +CT_GCC_PATCH_GLOBAL=y +# CT_GCC_PATCH_BUNDLED is not set +# CT_GCC_PATCH_LOCAL is not set +# CT_GCC_PATCH_BUNDLED_LOCAL is not set +# CT_GCC_PATCH_LOCAL_BUNDLED is not set +# CT_GCC_PATCH_NONE is not set +CT_GCC_PATCH_ORDER="global" +# CT_GCC_VERY_NEW is not set +# CT_GCC_V_13 is not set +CT_GCC_V_12=y +CT_GCC_VERSION="12.3.0" +CT_GCC_MIRRORS="$(CT_Mirrors GNU gcc/gcc-${CT_GCC_VERSION}) $(CT_Mirrors sourceware gcc/releases/gcc-${CT_GCC_VERSION})" +CT_GCC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GCC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GCC_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GCC_SIGNATURE_FORMAT="" +CT_GCC_13_or_older=y +CT_GCC_older_than_13=y +CT_GCC_later_than_12=y +CT_GCC_12_or_later=y +CT_GCC_REQUIRE_12_or_later=y +CT_GCC_later_than_11=y +CT_GCC_11_or_later=y +CT_GCC_later_than_10=y +CT_GCC_10_or_later=y +CT_GCC_later_than_9=y +CT_GCC_9_or_later=y +CT_GCC_later_than_8=y +CT_GCC_8_or_later=y +CT_GCC_later_than_7=y +CT_GCC_7_or_later=y +CT_GCC_later_than_6=y +CT_GCC_6_or_later=y +CT_GCC_REQUIRE_6_or_later=y +CT_GCC_later_than_5=y +CT_GCC_5_or_later=y +CT_GCC_REQUIRE_5_or_later=y +CT_GCC_later_than_4_9=y +CT_GCC_4_9_or_later=y +CT_GCC_REQUIRE_4_9_or_later=y +CT_CC_GCC_HAS_LIBMPX=y +CT_CC_GCC_ENABLE_CXX_FLAGS="" +CT_CC_GCC_CORE_EXTRA_CONFIG_ARRAY="" +CT_CC_GCC_EXTRA_CONFIG_ARRAY="--enable-gnu-indirect-function --with-stage1-ldflags='-Wl,-z,relro,-z,now' --with-boot-ldflags='-Wl,-z,relro,-z,now' --disable-multilib --with-gnu-as --with-gnu-ld --enable-shared --enable-poison-system-directories --enable-symvers=gnu --disable-bootstrap --enable-default-pie --libdir=\"${CT_PREFIX_DIR}/lib64\" --with-build-time-tools=\"${CT_PREFIX_DIR}/${CT_TARGET}/bin\"" +CT_CC_GCC_STATIC_LIBSTDCXX=y +# CT_CC_GCC_SYSTEM_ZLIB is not set +CT_CC_GCC_CONFIG_TLS=m + +# +# Optimisation features +# +CT_CC_GCC_USE_GRAPHITE=y +CT_CC_GCC_USE_LTO=y +CT_CC_GCC_LTO_ZSTD=m + +# +# Settings for libraries running on target +# +# CT_CC_GCC_ENABLE_DEFAULT_PIE is not set +CT_CC_GCC_ENABLE_TARGET_OPTSPACE=y +# CT_CC_GCC_LIBMUDFLAP is not set +CT_CC_GCC_LIBGOMP=y +# CT_CC_GCC_LIBSSP is not set +# CT_CC_GCC_LIBQUADMATH is not set +CT_CC_GCC_LIBSTDCXX_VERBOSE=m + +# +# Misc. obscure options. +# +CT_CC_CXA_ATEXIT=y +CT_CC_GCC_TM_CLONE_REGISTRY=m +# CT_CC_GCC_DISABLE_PCH is not set +CT_CC_GCC_SJLJ_EXCEPTIONS=m +CT_CC_GCC_LDBL_128=m +# CT_CC_GCC_BUILD_ID is not set +# CT_CC_GCC_LNK_HASH_STYLE_DEFAULT is not set +# CT_CC_GCC_LNK_HASH_STYLE_SYSV is not set +# CT_CC_GCC_LNK_HASH_STYLE_GNU is not set +CT_CC_GCC_LNK_HASH_STYLE_BOTH=y +CT_CC_GCC_LNK_HASH_STYLE="both" +CT_CC_GCC_DEC_FLOATS_AUTO=y +# CT_CC_GCC_DEC_FLOATS_BID is not set +# CT_CC_GCC_DEC_FLOATS_DPD is not set +# CT_CC_GCC_DEC_FLOATS_NO is not set +CT_CC_GCC_DEC_FLOATS="" +CT_ALL_CC_CHOICES="GCC" + +# +# Additional supported languages: +# +CT_CC_LANG_CXX=y +CT_CC_LANG_FORTRAN=y +# CT_CC_LANG_JIT is not set +# CT_CC_LANG_ADA is not set +# CT_CC_LANG_D is not set +# CT_CC_LANG_OBJC is not set +# CT_CC_LANG_OBJCXX is not set +# CT_CC_LANG_GOLANG is not set +CT_CC_LANG_OTHERS="" +# end of C compiler + +# +# Debug facilities +# +# CT_DEBUG_DUMA is not set +CT_DEBUG_GDB=y +CT_DEBUG_GDB_PKG_KSYM="GDB" +CT_GDB_DIR_NAME="gdb" +CT_GDB_PKG_NAME="gdb" +# CT_GDB_SRC_RELEASE is not set +# CT_GDB_SRC_DEVEL is not set +CT_GDB_SRC_CUSTOM=y +CT_GDB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gdb/gdb-14.1" +CT_GDB_PATCH_GLOBAL=y +# CT_GDB_PATCH_BUNDLED is not set +# CT_GDB_PATCH_LOCAL is not set +# CT_GDB_PATCH_BUNDLED_LOCAL is not set +# CT_GDB_PATCH_LOCAL_BUNDLED is not set +# CT_GDB_PATCH_NONE is not set +CT_GDB_PATCH_ORDER="global" +CT_GDB_VERY_NEW=y +# CT_GDB_V_13 is not set +# CT_GDB_V_12 is not set +# CT_GDB_V_11 is not set +# CT_GDB_V_10 is not set +# CT_GDB_V_9 is not set +# CT_GDB_V_8_3 is not set +CT_GDB_VERSION="new" +CT_GDB_MIRRORS="$(CT_Mirrors GNU gdb) $(CT_Mirrors sourceware gdb/releases)" +CT_GDB_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GDB_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GDB_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GDB_SIGNATURE_FORMAT="" +CT_GDB_later_than_13=y +CT_GDB_13_or_later=y +CT_GDB_later_than_12=y +CT_GDB_12_or_later=y +CT_GDB_later_than_11=y +CT_GDB_11_or_later=y +CT_GDB_later_than_10=y +CT_GDB_10_or_later=y +CT_GDB_later_than_8_3=y +CT_GDB_8_3_or_later=y +CT_GDB_CROSS=y +# CT_GDB_CROSS_STATIC is not set +# CT_GDB_CROSS_SIM is not set +CT_GDB_CROSS_PYTHON=y +CT_GDB_CROSS_PYTHON_BINARY="" +CT_GDB_CROSS_EXTRA_CONFIG_ARRAY="" +# CT_GDB_NATIVE is not set +CT_GDB_GDBSERVER=y +# CT_GDB_NATIVE_BUILD_IPA_LIB is not set +# CT_GDB_NATIVE_STATIC is not set +# CT_GDB_NATIVE_STATIC_LIBSTDCXX is not set +CT_GDB_GDBSERVER_TOPLEVEL=y +# CT_DEBUG_LTRACE is not set +# CT_DEBUG_STRACE is not set +CT_ALL_DEBUG_CHOICES="DUMA GDB LTRACE STRACE" +# end of Debug facilities + +# +# Companion libraries +# +# CT_COMPLIBS_CHECK is not set +# CT_COMP_LIBS_CLOOG is not set +CT_COMP_LIBS_EXPAT=y +CT_COMP_LIBS_EXPAT_PKG_KSYM="EXPAT" +CT_EXPAT_DIR_NAME="expat" +CT_EXPAT_PKG_NAME="expat" +# CT_EXPAT_SRC_RELEASE is not set +# CT_EXPAT_SRC_DEVEL is not set +CT_EXPAT_SRC_CUSTOM=y +CT_EXPAT_CUSTOM_LOCATION="${OPENSOURCE_DIR}/expat/expat-2.5.0" +CT_EXPAT_PATCH_GLOBAL=y +# CT_EXPAT_PATCH_BUNDLED is not set +# CT_EXPAT_PATCH_LOCAL is not set +# CT_EXPAT_PATCH_BUNDLED_LOCAL is not set +# CT_EXPAT_PATCH_LOCAL_BUNDLED is not set +# CT_EXPAT_PATCH_NONE is not set +CT_EXPAT_PATCH_ORDER="global" +# CT_EXPAT_VERY_NEW is not set +CT_EXPAT_V_2_5=y +CT_EXPAT_VERSION="2.5.0" +CT_EXPAT_MIRRORS="http://downloads.sourceforge.net/project/expat/expat/${CT_EXPAT_VERSION} https://github.com/libexpat/libexpat/releases/download/R_${CT_EXPAT_VERSION//./_}" +CT_EXPAT_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_EXPAT_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_EXPAT_ARCHIVE_FORMATS=".tar.xz .tar.lz .tar.bz2 .tar.gz" +CT_EXPAT_SIGNATURE_FORMAT="" +CT_COMP_LIBS_GETTEXT=y +CT_COMP_LIBS_GETTEXT_PKG_KSYM="GETTEXT" +CT_GETTEXT_DIR_NAME="gettext" +CT_GETTEXT_PKG_NAME="gettext" +# CT_GETTEXT_SRC_RELEASE is not set +# CT_GETTEXT_SRC_DEVEL is not set +CT_GETTEXT_SRC_CUSTOM=y +CT_GETTEXT_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gettext/gettext-0.22" +CT_GETTEXT_PATCH_GLOBAL=y +# CT_GETTEXT_PATCH_BUNDLED is not set +# CT_GETTEXT_PATCH_LOCAL is not set +# CT_GETTEXT_PATCH_BUNDLED_LOCAL is not set +# CT_GETTEXT_PATCH_LOCAL_BUNDLED is not set +# CT_GETTEXT_PATCH_NONE is not set +CT_GETTEXT_PATCH_ORDER="global" +CT_GETTEXT_VERY_NEW=y +# CT_GETTEXT_V_0_21 is not set +# CT_GETTEXT_V_0_20_1 is not set +# CT_GETTEXT_V_0_19_8_1 is not set +CT_GETTEXT_VERSION="new" +CT_GETTEXT_MIRRORS="$(CT_Mirrors GNU gettext)" +CT_GETTEXT_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GETTEXT_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GETTEXT_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GETTEXT_SIGNATURE_FORMAT="packed/.sig" +CT_GETTEXT_later_than_0_21=y +CT_GETTEXT_0_21_or_later=y +CT_GETTEXT_INCOMPATIBLE_WITH_UCLIBC_NG=y + +# +# This version of gettext is not compatible with uClibc-NG. Select +# + +# +# a different version if uClibc-NG is used on the target or (in a +# + +# +# Canadian cross build) on the host. +# +CT_COMP_LIBS_GMP=y +CT_COMP_LIBS_GMP_PKG_KSYM="GMP" +CT_GMP_DIR_NAME="gmp" +CT_GMP_PKG_NAME="gmp" +# CT_GMP_SRC_RELEASE is not set +# CT_GMP_SRC_DEVEL is not set +CT_GMP_SRC_CUSTOM=y +CT_GMP_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gmp/gmp-6.3.0" +CT_GMP_PATCH_GLOBAL=y +# CT_GMP_PATCH_BUNDLED is not set +# CT_GMP_PATCH_LOCAL is not set +# CT_GMP_PATCH_BUNDLED_LOCAL is not set +# CT_GMP_PATCH_LOCAL_BUNDLED is not set +# CT_GMP_PATCH_NONE is not set +CT_GMP_PATCH_ORDER="global" +CT_GMP_VERY_NEW=y +# CT_GMP_V_6_2 is not set +# CT_GMP_V_6_1 is not set +CT_GMP_VERSION="new" +CT_GMP_MIRRORS="https://gmplib.org/download/gmp https://gmplib.org/download/gmp/archive $(CT_Mirrors GNU gmp)" +CT_GMP_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GMP_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GMP_ARCHIVE_FORMATS=".tar.xz .tar.lz .tar.bz2" +CT_GMP_SIGNATURE_FORMAT="packed/.sig" +CT_COMP_LIBS_ISL=y +CT_COMP_LIBS_ISL_PKG_KSYM="ISL" +CT_ISL_DIR_NAME="isl" +CT_ISL_PKG_NAME="isl" +# CT_ISL_SRC_RELEASE is not set +# CT_ISL_SRC_DEVEL is not set +CT_ISL_SRC_CUSTOM=y +CT_ISL_CUSTOM_LOCATION="${OPENSOURCE_DIR}/isl/isl-0.24" +CT_ISL_PATCH_GLOBAL=y +# CT_ISL_PATCH_BUNDLED is not set +# CT_ISL_PATCH_LOCAL is not set +# CT_ISL_PATCH_BUNDLED_LOCAL is not set +# CT_ISL_PATCH_LOCAL_BUNDLED is not set +# CT_ISL_PATCH_NONE is not set +CT_ISL_PATCH_ORDER="global" +# CT_ISL_VERY_NEW is not set +# CT_ISL_V_0_26 is not set +# CT_ISL_V_0_25 is not set +CT_ISL_V_0_24=y +# CT_ISL_V_0_23 is not set +# CT_ISL_V_0_22 is not set +# CT_ISL_V_0_21 is not set +# CT_ISL_V_0_20 is not set +# CT_ISL_V_0_19 is not set +# CT_ISL_V_0_18 is not set +# CT_ISL_V_0_17 is not set +# CT_ISL_V_0_16 is not set +# CT_ISL_V_0_15 is not set +CT_ISL_VERSION="0.24" +CT_ISL_MIRRORS="https://libisl.sourceforge.io" +CT_ISL_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ISL_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ISL_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_ISL_SIGNATURE_FORMAT="" +CT_ISL_later_than_0_18=y +CT_ISL_0_18_or_later=y +CT_ISL_later_than_0_15=y +CT_ISL_0_15_or_later=y +# CT_COMP_LIBS_LIBELF is not set +CT_COMP_LIBS_LIBICONV=y +CT_COMP_LIBS_LIBICONV_PKG_KSYM="LIBICONV" +CT_LIBICONV_DIR_NAME="libiconv" +CT_LIBICONV_PKG_NAME="libiconv" +# CT_LIBICONV_SRC_RELEASE is not set +# CT_LIBICONV_SRC_DEVEL is not set +CT_LIBICONV_SRC_CUSTOM=y +CT_LIBICONV_CUSTOM_LOCATION="${OPENSOURCE_DIR}/libiconv/libiconv-1.16" +CT_LIBICONV_PATCH_GLOBAL=y +# CT_LIBICONV_PATCH_BUNDLED is not set +# CT_LIBICONV_PATCH_LOCAL is not set +# CT_LIBICONV_PATCH_BUNDLED_LOCAL is not set +# CT_LIBICONV_PATCH_LOCAL_BUNDLED is not set +# CT_LIBICONV_PATCH_NONE is not set +CT_LIBICONV_PATCH_ORDER="global" +# CT_LIBICONV_VERY_NEW is not set +CT_LIBICONV_V_1_16=y +# CT_LIBICONV_V_1_15 is not set +CT_LIBICONV_VERSION="1.16" +CT_LIBICONV_MIRRORS="$(CT_Mirrors GNU libiconv)" +CT_LIBICONV_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_LIBICONV_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_LIBICONV_ARCHIVE_FORMATS=".tar.gz" +CT_LIBICONV_SIGNATURE_FORMAT="packed/.sig" +CT_COMP_LIBS_MPC=y +CT_COMP_LIBS_MPC_PKG_KSYM="MPC" +CT_MPC_DIR_NAME="mpc" +CT_MPC_PKG_NAME="mpc" +# CT_MPC_SRC_RELEASE is not set +# CT_MPC_SRC_DEVEL is not set +CT_MPC_SRC_CUSTOM=y +CT_MPC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/libmpc/mpc-1.3.1" +CT_MPC_PATCH_GLOBAL=y +# CT_MPC_PATCH_BUNDLED is not set +# CT_MPC_PATCH_LOCAL is not set +# CT_MPC_PATCH_BUNDLED_LOCAL is not set +# CT_MPC_PATCH_LOCAL_BUNDLED is not set +# CT_MPC_PATCH_NONE is not set +CT_MPC_PATCH_ORDER="global" +CT_MPC_VERY_NEW=y +# CT_MPC_V_1_2 is not set +CT_MPC_VERSION="new" +CT_MPC_MIRRORS="https://www.multiprecision.org/downloads $(CT_Mirrors GNU mpc)" +CT_MPC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_MPC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_MPC_ARCHIVE_FORMATS=".tar.gz" +CT_MPC_SIGNATURE_FORMAT="packed/.sig" +CT_MPC_later_than_1_1_0=y +CT_MPC_1_1_0_or_later=y +CT_COMP_LIBS_MPFR=y +CT_COMP_LIBS_MPFR_PKG_KSYM="MPFR" +CT_MPFR_DIR_NAME="mpfr" +CT_MPFR_PKG_NAME="mpfr" +# CT_MPFR_SRC_RELEASE is not set +# CT_MPFR_SRC_DEVEL is not set +CT_MPFR_SRC_CUSTOM=y +CT_MPFR_CUSTOM_LOCATION="${OPENSOURCE_DIR}/mpfr/mpfr-4.2.1" +CT_MPFR_PATCH_GLOBAL=y +# CT_MPFR_PATCH_BUNDLED is not set +# CT_MPFR_PATCH_LOCAL is not set +# CT_MPFR_PATCH_BUNDLED_LOCAL is not set +# CT_MPFR_PATCH_LOCAL_BUNDLED is not set +# CT_MPFR_PATCH_NONE is not set +CT_MPFR_PATCH_ORDER="global" +# CT_MPFR_VERY_NEW is not set +CT_MPFR_V_4_2=y +CT_MPFR_VERSION="4.2.1" +CT_MPFR_MIRRORS="https://www.mpfr.org/mpfr-${CT_MPFR_VERSION} $(CT_Mirrors GNU mpfr)" +CT_MPFR_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_MPFR_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_MPFR_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz .zip" +CT_MPFR_SIGNATURE_FORMAT="packed/.asc" +CT_MPFR_later_than_4_0_0=y +CT_MPFR_4_0_0_or_later=y +CT_COMP_LIBS_NCURSES=y +CT_COMP_LIBS_NCURSES_PKG_KSYM="NCURSES" +CT_NCURSES_DIR_NAME="ncurses" +CT_NCURSES_PKG_NAME="ncurses" +# CT_NCURSES_SRC_RELEASE is not set +# CT_NCURSES_SRC_DEVEL is not set +CT_NCURSES_SRC_CUSTOM=y +CT_NCURSES_CUSTOM_LOCATION="${OPENSOURCE_DIR}/ncurses/ncurses-6.4" +CT_NCURSES_PATCH_GLOBAL=y +# CT_NCURSES_PATCH_BUNDLED is not set +# CT_NCURSES_PATCH_LOCAL is not set +# CT_NCURSES_PATCH_BUNDLED_LOCAL is not set +# CT_NCURSES_PATCH_LOCAL_BUNDLED is not set +# CT_NCURSES_PATCH_NONE is not set +CT_NCURSES_PATCH_ORDER="global" +# CT_NCURSES_VERY_NEW is not set +CT_NCURSES_V_6_4=y +# CT_NCURSES_V_6_2 is not set +# CT_NCURSES_V_6_1 is not set +# CT_NCURSES_V_6_0 is not set +CT_NCURSES_VERSION="6.4" +CT_NCURSES_MIRRORS="https://invisible-mirror.net/archives/ncurses $(CT_Mirrors GNU ncurses)" +CT_NCURSES_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_NCURSES_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_NCURSES_ARCHIVE_FORMATS=".tar.gz" +CT_NCURSES_SIGNATURE_FORMAT="packed/.sig" +CT_NCURSES_NEW_ABI=y +CT_NCURSES_HOST_CONFIG_ARGS="" +CT_NCURSES_HOST_DISABLE_DB=y +CT_NCURSES_HOST_FALLBACKS="linux,xterm,xterm-color,xterm-256color,vt100" +CT_NCURSES_TARGET_CONFIG_ARGS="" +# CT_NCURSES_TARGET_DISABLE_DB is not set +CT_NCURSES_TARGET_FALLBACKS="" +CT_COMP_LIBS_ZLIB=y +CT_COMP_LIBS_ZLIB_PKG_KSYM="ZLIB" +CT_ZLIB_DIR_NAME="zlib" +CT_ZLIB_PKG_NAME="zlib" +# CT_ZLIB_SRC_RELEASE is not set +# CT_ZLIB_SRC_DEVEL is not set +CT_ZLIB_SRC_CUSTOM=y +CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.2.13" +CT_ZLIB_PATCH_GLOBAL=y +# CT_ZLIB_PATCH_BUNDLED is not set +# CT_ZLIB_PATCH_LOCAL is not set +# CT_ZLIB_PATCH_BUNDLED_LOCAL is not set +# CT_ZLIB_PATCH_LOCAL_BUNDLED is not set +# CT_ZLIB_PATCH_NONE is not set +CT_ZLIB_PATCH_ORDER="global" +CT_ZLIB_VERY_NEW=y +# CT_ZLIB_V_1_2_13 is not set +CT_ZLIB_VERSION="new" +CT_ZLIB_MIRRORS="https://github.com/madler/zlib/releases/download/v${CT_ZLIB_VERSION} https://www.zlib.net/" +CT_ZLIB_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ZLIB_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ZLIB_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_ZLIB_SIGNATURE_FORMAT="packed/.asc" +CT_COMP_LIBS_ZSTD=y +CT_COMP_LIBS_ZSTD_PKG_KSYM="ZSTD" +CT_ZSTD_DIR_NAME="zstd" +CT_ZSTD_PKG_NAME="zstd" +# CT_ZSTD_SRC_RELEASE is not set +# CT_ZSTD_SRC_DEVEL is not set +CT_ZSTD_SRC_CUSTOM=y +CT_ZSTD_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zstd/zstd-1.5.5" +CT_ZSTD_PATCH_GLOBAL=y +# CT_ZSTD_PATCH_BUNDLED is not set +# CT_ZSTD_PATCH_LOCAL is not set +# CT_ZSTD_PATCH_BUNDLED_LOCAL is not set +# CT_ZSTD_PATCH_LOCAL_BUNDLED is not set +# CT_ZSTD_PATCH_NONE is not set +CT_ZSTD_PATCH_ORDER="global" +# CT_ZSTD_VERY_NEW is not set +CT_ZSTD_V_1_5_5=y +# CT_ZSTD_V_1_5_2 is not set +CT_ZSTD_VERSION="1.5.5" +CT_ZSTD_MIRRORS="https://github.com/facebook/zstd/releases/download/v${CT_ZSTD_VERSION} https://www.zstd.net/" +CT_ZSTD_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ZSTD_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ZSTD_ARCHIVE_FORMATS=".tar.gz" +CT_ZSTD_SIGNATURE_FORMAT="packed/.sig" +CT_ALL_COMP_LIBS_CHOICES="CLOOG EXPAT GETTEXT GMP GNUPRUMCU ISL LIBELF LIBICONV MPC MPFR NCURSES NEWLIB_NANO PICOLIBC ZLIB ZSTD" +CT_LIBICONV_NEEDED=y +CT_GETTEXT_NEEDED=y +CT_GMP_NEEDED=y +CT_MPFR_NEEDED=y +CT_ISL_NEEDED=y +CT_MPC_NEEDED=y +CT_EXPAT_NEEDED=y +CT_NCURSES_NEEDED=y +CT_ZLIB_NEEDED=y +CT_ZSTD_NEEDED=y +CT_LIBICONV=y +CT_GETTEXT=y +CT_GMP=y +CT_MPFR=y +CT_ISL=y +CT_MPC=y +CT_EXPAT=y +CT_NCURSES=y +CT_ZLIB=y +CT_ZSTD=y +# end of Companion libraries + +# +# Companion tools +# +# CT_COMP_TOOLS_FOR_HOST is not set +# CT_COMP_TOOLS_AUTOCONF is not set +# CT_COMP_TOOLS_AUTOMAKE is not set +# CT_COMP_TOOLS_BISON is not set +# CT_COMP_TOOLS_DTC is not set +# CT_COMP_TOOLS_LIBTOOL is not set +# CT_COMP_TOOLS_M4 is not set +# CT_COMP_TOOLS_MAKE is not set +CT_ALL_COMP_TOOLS_CHOICES="AUTOCONF AUTOMAKE BISON DTC LIBTOOL M4 MAKE" +# end of Companion tools + +# +# Test suite +# +# CT_TEST_SUITE_GCC is not set +# end of Test suite diff --git a/.oebuild/cross-tools/configs/config_riscv64 b/.oebuild/cross-tools/configs/config_riscv64 index 0547dcb013ad55c27f21c398dc164db9774497d8..8cc7c11146feab3d33f5bf1a9e8455d3983906bb 100644 --- a/.oebuild/cross-tools/configs/config_riscv64 +++ b/.oebuild/cross-tools/configs/config_riscv64 @@ -998,7 +998,7 @@ CT_ZLIB_PKG_NAME="zlib" # CT_ZLIB_SRC_RELEASE is not set # CT_ZLIB_SRC_DEVEL is not set CT_ZLIB_SRC_CUSTOM=y -CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.3.1" +CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.2.13" CT_ZLIB_PATCH_GLOBAL=y # CT_ZLIB_PATCH_BUNDLED is not set # CT_ZLIB_PATCH_LOCAL is not set diff --git a/.oebuild/cross-tools/configs/config_riscv64-musl b/.oebuild/cross-tools/configs/config_riscv64-musl new file mode 100644 index 0000000000000000000000000000000000000000..51767450094481e7693136ad5854b30c0265c64f --- /dev/null +++ b/.oebuild/cross-tools/configs/config_riscv64-musl @@ -0,0 +1,1052 @@ +# +# Automatically generated file; DO NOT EDIT. +# crosstool-NG 1.26.0 Configuration +# +CT_CONFIGURE_has_static_link=y +CT_CONFIGURE_has_cxx11=y +CT_CONFIGURE_has_wget=y +CT_CONFIGURE_has_curl=y +CT_CONFIGURE_has_meson=y +CT_CONFIGURE_has_ninja=y +CT_CONFIGURE_has_rsync=y +CT_CONFIGURE_has_make_3_81_or_newer=y +CT_CONFIGURE_has_make_4_0_or_newer=y +CT_CONFIGURE_has_make_4_4_or_newer=y +CT_CONFIGURE_has_libtool_2_4_or_newer=y +CT_CONFIGURE_has_libtoolize_2_4_or_newer=y +CT_CONFIGURE_has_autoconf_2_65_or_newer=y +CT_CONFIGURE_has_autoreconf_2_65_or_newer=y +CT_CONFIGURE_has_automake_1_15_or_newer=y +CT_CONFIGURE_has_gnu_m4_1_4_12_or_newer=y +CT_CONFIGURE_has_python_3_4_or_newer=y +CT_CONFIGURE_has_bison_2_7_or_newer=y +CT_CONFIGURE_has_bison_3_0_4_or_newer=y +CT_CONFIGURE_has_python=y +CT_CONFIGURE_has_git=y +CT_CONFIGURE_has_md5sum=y +CT_CONFIGURE_has_sha1sum=y +CT_CONFIGURE_has_sha256sum=y +CT_CONFIGURE_has_sha512sum=y +CT_CONFIGURE_has_install_with_strip_program=y +CT_VERSION="1.26.0" +CT_VCHECK="" +CT_CONFIG_VERSION_ENV="4" +CT_CONFIG_VERSION_CURRENT="4" +CT_CONFIG_VERSION="4" +CT_MODULES=y + +# +# set open_source dir and x-tools dir, if you set CROSS_SOURCE, you should +# set like this: /xxx/open_source/. because the CROSS_SOURCE will be finanal +# /xxx/open_source/../open_source +# +OPENSOURCE_DIR="${CROSS_SOURCE}./open_source" +X_TOOLS_DIR="${HOME}/x-tools" + +# +# Paths and misc options +# + +# +# crosstool-NG behavior +# +# CT_OBSOLETE is not set +CT_EXPERIMENTAL=y +# CT_ALLOW_BUILD_AS_ROOT is not set +# CT_ENABLE_EXPERIMENTAL_BUNDLED_PATCHES is not set +# CT_DEBUG_CT is not set + +# +# Paths +# +CT_LOCAL_TARBALLS_DIR="${HOME}/src" +CT_SAVE_TARBALLS=y +# CT_TARBALLS_BUILDROOT_LAYOUT is not set +CT_WORK_DIR="${CT_TOP_DIR}/.build" +CT_BUILD_TOP_DIR="${CT_WORK_DIR:-${CT_TOP_DIR}/.build}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}" +CT_BUILD_DIR="${CT_BUILD_TOP_DIR}/build" +CT_PREFIX_DIR="${CT_PREFIX:-${X_TOOLS_DIR}}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}" +CT_RM_RF_PREFIX_DIR=y +CT_REMOVE_DOCS=y +CT_INSTALL_LICENSES=y +CT_PREFIX_DIR_RO=y +CT_STRIP_HOST_TOOLCHAIN_EXECUTABLES=y +# CT_STRIP_TARGET_TOOLCHAIN_EXECUTABLES is not set +# CT_TARBALL_RESULT is not set + +# +# Downloading +# +# CT_DOWNLOAD_AGENT_WGET is not set +CT_DOWNLOAD_AGENT_CURL=y +# CT_DOWNLOAD_AGENT_NONE is not set +# CT_FORBID_DOWNLOAD is not set +# CT_FORCE_DOWNLOAD is not set +CT_CONNECT_TIMEOUT=10 +CT_DOWNLOAD_CURL_OPTIONS="--location --ftp-pasv --retry 3 --fail --silent" +# CT_ONLY_DOWNLOAD is not set +# CT_USE_MIRROR is not set +CT_VERIFY_DOWNLOAD_DIGEST=y +CT_VERIFY_DOWNLOAD_DIGEST_SHA512=y +# CT_VERIFY_DOWNLOAD_DIGEST_SHA256 is not set +# CT_VERIFY_DOWNLOAD_DIGEST_SHA1 is not set +# CT_VERIFY_DOWNLOAD_DIGEST_MD5 is not set +CT_VERIFY_DOWNLOAD_DIGEST_ALG="sha512" +# CT_VERIFY_DOWNLOAD_SIGNATURE is not set + +# +# Extracting +# +# CT_FORCE_EXTRACT is not set +CT_OVERRIDE_CONFIG_GUESS_SUB=y +# CT_ONLY_EXTRACT is not set +CT_PATCH_BUNDLED=y +# CT_PATCH_LOCAL is not set +# CT_PATCH_BUNDLED_LOCAL is not set +# CT_PATCH_LOCAL_BUNDLED is not set +# CT_PATCH_NONE is not set +CT_PATCH_ORDER="bundled" + +# +# Build behavior +# +CT_PARALLEL_JOBS=0 +CT_LOAD="" +CT_USE_PIPES=y +CT_EXTRA_CFLAGS_FOR_BUILD="" +CT_EXTRA_CXXFLAGS_FOR_BUILD="" +CT_EXTRA_LDFLAGS_FOR_BUILD="" +CT_EXTRA_CFLAGS_FOR_HOST="" +CT_EXTRA_LDFLAGS_FOR_HOST="" +# CT_CONFIG_SHELL_SH is not set +# CT_CONFIG_SHELL_ASH is not set +CT_CONFIG_SHELL_BASH=y +# CT_CONFIG_SHELL_CUSTOM is not set +CT_CONFIG_SHELL="${bash}" + +# +# Logging +# +# CT_LOG_ERROR is not set +# CT_LOG_WARN is not set +# CT_LOG_INFO is not set +CT_LOG_EXTRA=y +# CT_LOG_ALL is not set +# CT_LOG_DEBUG is not set +CT_LOG_LEVEL_MAX="EXTRA" +# CT_LOG_SEE_TOOLS_WARN is not set +CT_LOG_PROGRESS_BAR=y +CT_LOG_TO_FILE=y +CT_LOG_FILE_COMPRESS=y +# end of Paths and misc options + +# +# Target options +# +# CT_ARCH_ALPHA is not set +# CT_ARCH_ARC is not set +#CT_ARCH_ARM is not set +# CT_ARCH_AVR is not set +# CT_ARCH_BPF is not set +# CT_ARCH_C6X is not set +# CT_ARCH_LOONGARCH is not set +# CT_ARCH_M68K is not set +# CT_ARCH_MICROBLAZE is not set +# CT_ARCH_MIPS is not set +# CT_ARCH_MOXIE is not set +# CT_ARCH_MSP430 is not set +# CT_ARCH_NIOS2 is not set +# CT_ARCH_POWERPC is not set +# CT_ARCH_PRU is not set +CT_ARCH_RISCV=y +# CT_ARCH_S390 is not set +# CT_ARCH_SH is not set +# CT_ARCH_SPARC is not set +# CT_ARCH_X86 is not set +# CT_ARCH_XTENSA is not set +CT_ARCH="riscv" +CT_ARCH_CHOICE_KSYM="RISCV" +CT_ARCH_TUNE="" +CT_ARCH_RISCV_SHOW=y + +# +# Options for riscv +# +CT_ARCH_RISCV_PKG_KSYM="" +CT_ALL_ARCH_CHOICES="ALPHA ARC ARM AVR C6X M68K MICROBLAZE MIPS MOXIE MSP430 NIOS2 POWERPC PRU RISCV S390 SH SPARC X86 XTENSA" +CT_ARCH_SUFFIX="" +# CT_OMIT_TARGET_VENDOR is not set + +# +# Generic target options +# +# CT_MULTILIB is not set +# CT_DEMULTILIB is not set +CT_ARCH_SUPPORTS_BOTH_MMU=y +CT_ARCH_USE_MMU=y +CT_ARCH_SUPPORTS_LIBSANITIZER=y +CT_ARCH_SUPPORTS_32=y +CT_ARCH_SUPPORTS_64=y +CT_ARCH_DEFAULT_32=y +CT_ARCH_BITNESS=64 +# CT_ARCH_32 is not set +CT_ARCH_64=y + +# +# Target optimisations +# +CT_ARCH_SUPPORTS_WITH_ARCH=y +CT_ARCH_SUPPORTS_WITH_ABI=y +CT_ARCH_SUPPORTS_WITH_TUNE=y +CT_ARCH_ARCH="rv64gc" +CT_ARCH_ABI="" +CT_TARGET_CFLAGS="" +CT_TARGET_LDFLAGS="" +# end of Target options + +# +# Toolchain options +# + +# +# General toolchain options +# +CT_FORCE_SYSROOT=y +CT_USE_SYSROOT=y +CT_SYSROOT_NAME="sysroot" +CT_SYSROOT_DIR_PREFIX="" +CT_WANTS_STATIC_LINK=y +CT_WANTS_STATIC_LINK_CXX=y +# CT_STATIC_TOOLCHAIN is not set +CT_SHOW_CT_VERSION=y +CT_TOOLCHAIN_PKGVERSION="" +CT_TOOLCHAIN_BUGURL="" + +# +# Tuple completion and aliasing +# +CT_TARGET_VENDOR="openeuler" +CT_TARGET_ALIAS_SED_EXPR="" +CT_TARGET_ALIAS="" + +# +# Toolchain type +# +# CT_NATIVE is not set +CT_CROSS=y +# CT_CROSS_NATIVE is not set +# CT_CANADIAN is not set +CT_TOOLCHAIN_TYPE="cross" + +# +# Build system +# +CT_BUILD="" +CT_BUILD_PREFIX="" +CT_BUILD_SUFFIX="" + +# +# Misc options +# +# CT_TOOLCHAIN_ENABLE_NLS is not set +# end of Toolchain options + +# +# Operating System +# +CT_KERNEL_SUPPORTS_SHARED_LIBS=y +# CT_KERNEL_BARE_METAL is not set +CT_KERNEL_LINUX=y +CT_KERNEL="linux" +CT_KERNEL_CHOICE_KSYM="LINUX" +CT_KERNEL_LINUX_SHOW=y + +# +# Options for linux +# +CT_KERNEL_LINUX_PKG_KSYM="LINUX" +CT_LINUX_DIR_NAME="linux" +CT_LINUX_USE_WWW_KERNEL_ORG=y +# CT_LINUX_USE_ORACLE is not set +CT_LINUX_USE="LINUX" +CT_LINUX_PKG_NAME="linux" +# CT_LINUX_SRC_RELEASE is not set +# CT_LINUX_SRC_DEVEL is not set +CT_LINUX_SRC_CUSTOM=y +CT_LINUX_CUSTOM_LOCATION="${OPENSOURCE_DIR}/kernel" +CT_LINUX_PATCH_GLOBAL=y +# CT_LINUX_PATCH_BUNDLED is not set +# CT_LINUX_PATCH_LOCAL is not set +# CT_LINUX_PATCH_BUNDLED_LOCAL is not set +# CT_LINUX_PATCH_LOCAL_BUNDLED is not set +# CT_LINUX_PATCH_NONE is not set +CT_LINUX_PATCH_ORDER="global" +# CT_LINUX_VERY_NEW is not set +# CT_LINUX_V_6_4 is not set +# CT_LINUX_V_6_3 is not set +# CT_LINUX_V_6_2 is not set +# CT_LINUX_V_6_1 is not set +# CT_LINUX_V_6_0 is not set +# CT_LINUX_V_5_19 is not set +# CT_LINUX_V_5_18 is not set +# CT_LINUX_V_5_17 is not set +# CT_LINUX_V_5_16 is not set +# CT_LINUX_V_5_15 is not set +# CT_LINUX_V_5_14 is not set +# CT_LINUX_V_5_13 is not set +# CT_LINUX_V_5_12 is not set +# CT_LINUX_V_5_11 is not set +CT_LINUX_V_5_10=y +# CT_LINUX_V_5_9 is not set +# CT_LINUX_V_5_8 is not set +# CT_LINUX_V_5_7 is not set +# CT_LINUX_V_5_4 is not set +# CT_LINUX_V_5_3 is not set +# CT_LINUX_V_5_2 is not set +# CT_LINUX_V_5_1 is not set +# CT_LINUX_V_5_0 is not set +# CT_LINUX_V_4_20 is not set +# CT_LINUX_V_4_19 is not set +# CT_LINUX_V_4_18 is not set +# CT_LINUX_V_4_17 is not set +# CT_LINUX_V_4_16 is not set +# CT_LINUX_V_4_15 is not set +# CT_LINUX_V_4_14 is not set +# CT_LINUX_V_4_13 is not set +# CT_LINUX_V_4_12 is not set +# CT_LINUX_V_4_11 is not set +# CT_LINUX_V_4_10 is not set +# CT_LINUX_V_4_9 is not set +# CT_LINUX_V_4_4 is not set +# CT_LINUX_V_4_1 is not set +# CT_LINUX_V_3_16 is not set +# CT_LINUX_V_3_13 is not set +# CT_LINUX_V_3_12 is not set +# CT_LINUX_V_3_10 is not set +# CT_LINUX_V_3_4 is not set +# CT_LINUX_V_3_2 is not set +CT_LINUX_VERSION="5.10.185" +CT_LINUX_MIRRORS="$(CT_Mirrors kernel.org linux ${CT_LINUX_VERSION})" +CT_LINUX_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_LINUX_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_LINUX_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_LINUX_SIGNATURE_FORMAT="unpacked/.sign" +CT_LINUX_5_19_or_older=y +CT_LINUX_older_than_5_19=y +CT_LINUX_5_12_or_older=y +CT_LINUX_older_than_5_12=y +CT_LINUX_later_than_5_5=y +CT_LINUX_5_5_or_later=y +CT_LINUX_later_than_5_3=y +CT_LINUX_5_3_or_later=y +CT_LINUX_later_than_4_8=y +CT_LINUX_4_8_or_later=y +CT_LINUX_later_than_3_7=y +CT_LINUX_3_7_or_later=y +CT_LINUX_later_than_3_2=y +CT_LINUX_3_2_or_later=y +CT_LINUX_REQUIRE_3_2_or_later=y +CT_KERNEL_DEP_RSYNC=y +CT_KERNEL_LINUX_VERBOSITY_0=y +# CT_KERNEL_LINUX_VERBOSITY_1 is not set +# CT_KERNEL_LINUX_VERBOSITY_2 is not set +CT_KERNEL_LINUX_VERBOSE_LEVEL=0 +CT_ALL_KERNEL_CHOICES="BARE_METAL LINUX WINDOWS" + +# +# Common kernel options +# +CT_SHARED_LIBS=y +# end of Operating System + +# +# Binary utilities +# +CT_ARCH_BINFMT_ELF=y +CT_BINUTILS_BINUTILS=y +CT_BINUTILS="binutils" +CT_BINUTILS_CHOICE_KSYM="BINUTILS" +CT_BINUTILS_BINUTILS_SHOW=y + +# +# Options for binutils +# +CT_BINUTILS_BINUTILS_PKG_KSYM="BINUTILS" +CT_BINUTILS_DIR_NAME="binutils" +CT_BINUTILS_USE_GNU=y +# CT_BINUTILS_USE_LINARO is not set +# CT_BINUTILS_USE_ORACLE is not set +CT_BINUTILS_USE="BINUTILS" +CT_BINUTILS_PKG_NAME="binutils" +# CT_BINUTILS_SRC_RELEASE is not set +# CT_BINUTILS_SRC_DEVEL is not set +CT_BINUTILS_SRC_CUSTOM=y +CT_BINUTILS_CUSTOM_LOCATION="${OPENSOURCE_DIR}/binutils/binutils-2.41" +CT_BINUTILS_PATCH_GLOBAL=y +# CT_BINUTILS_PATCH_BUNDLED is not set +# CT_BINUTILS_PATCH_LOCAL is not set +# CT_BINUTILS_PATCH_BUNDLED_LOCAL is not set +# CT_BINUTILS_PATCH_LOCAL_BUNDLED is not set +# CT_BINUTILS_PATCH_NONE is not set +CT_BINUTILS_PATCH_ORDER="global" +CT_BINUTILS_VERY_NEW=y +# CT_BINUTILS_V_2_40 is not set +# CT_BINUTILS_V_2_39 is not set +# CT_BINUTILS_V_2_38 is not set +# CT_BINUTILS_V_2_37 is not set +# CT_BINUTILS_V_2_36 is not set +# CT_BINUTILS_V_2_35 is not set +# CT_BINUTILS_V_2_34 is not set +# CT_BINUTILS_V_2_33 is not set +# CT_BINUTILS_V_2_32 is not set +# CT_BINUTILS_V_2_31 is not set +# CT_BINUTILS_V_2_30 is not set +# CT_BINUTILS_V_2_29 is not set +# CT_BINUTILS_V_2_28 is not set +# CT_BINUTILS_V_2_27 is not set +# CT_BINUTILS_V_2_26 is not set +CT_BINUTILS_VERSION="new" +CT_BINUTILS_MIRRORS="$(CT_Mirrors GNU binutils) $(CT_Mirrors sourceware binutils/releases)" +CT_BINUTILS_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_BINUTILS_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_BINUTILS_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_BINUTILS_SIGNATURE_FORMAT="packed/.sig" +CT_BINUTILS_later_than_2_39=y +CT_BINUTILS_2_39_or_later=y +CT_BINUTILS_later_than_2_30=y +CT_BINUTILS_2_30_or_later=y +CT_BINUTILS_later_than_2_27=y +CT_BINUTILS_2_27_or_later=y +CT_BINUTILS_later_than_2_26=y +CT_BINUTILS_2_26_or_later=y + +# +# GNU binutils +# +CT_BINUTILS_FORCE_LD_BFD_DEFAULT=y +CT_BINUTILS_LINKER_LD=y +CT_BINUTILS_LINKERS_LIST="ld" +CT_BINUTILS_LINKER_DEFAULT="bfd" +# CT_BINUTILS_PLUGINS is not set +CT_BINUTILS_RELRO=m +CT_BINUTILS_DETERMINISTIC_ARCHIVES=y +CT_BINUTILS_EXTRA_CONFIG_ARRAY="" +# CT_BINUTILS_FOR_TARGET is not set +CT_ALL_BINUTILS_CHOICES="BINUTILS" +# end of Binary utilities + + +# +# C-library +# +# CT_LIBC_GLIBC is not set +CT_LIBC_MUSL=y +# CT_LIBC_UCLIBC_NG is not set +CT_LIBC="musl" +CT_LIBC_CHOICE_KSYM="MUSL" +CT_THREADS="musl" +CT_LIBC_MUSL_SHOW=y + +# +# Options for musl +# +CT_LIBC_MUSL_PKG_KSYM="MUSL" +CT_MUSL_DIR_NAME="musl" +CT_MUSL_PKG_NAME="musl" +# CT_MUSL_SRC_RELEASE is not set +# CT_MUSL_SRC_DEVEL is not set +CT_MUSL_SRC_CUSTOM=y +CT_MUSL_CUSTOM_LOCATION="${OPENSOURCE_DIR}/musl/musl-1.2.4" +CT_MUSL_PATCH_GLOBAL=y +# CT_MUSL_PATCH_BUNDLED is not set +# CT_MUSL_PATCH_LOCAL is not set +# CT_MUSL_PATCH_BUNDLED_LOCAL is not set +# CT_MUSL_PATCH_LOCAL_BUNDLED is not set +# CT_MUSL_PATCH_NONE is not set +CT_MUSL_PATCH_ORDER="global" +# CT_MUSL_VERY_NEW is not set +CT_MUSL_V_1_2_4=y +# CT_MUSL_V_1_2_2 is not set +# CT_MUSL_V_1_2_1 is not set +# CT_MUSL_V_1_1_24 is not set +# CT_MUSL_V_1_1_23 is not set +# CT_MUSL_V_1_1_22 is not set +# CT_MUSL_V_1_1_21 is not set +# CT_MUSL_V_1_1_20 is not set +# CT_MUSL_V_1_1_19 is not set +# CT_MUSL_V_1_1_18 is not set +# CT_MUSL_V_1_1_17 is not set +# CT_MUSL_V_1_1_16 is not set +CT_MUSL_VERSION="1.2.4" +CT_MUSL_MIRRORS="http://www.musl-libc.org/releases" +CT_MUSL_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_MUSL_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_MUSL_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_MUSL_SIGNATURE_FORMAT="packed/.asc" +CT_MUSL_DEP_KERNEL_HEADERS_VERSION=y +CT_MUSL_DEP_BINUTILS=y +CT_MUSL_DEP_GCC=y +CT_MUSL_DEP_PYTHON=y +CT_THREADS="nptl" +CT_MUSL_BUILD_SSP=y +CT_MUSL_HAS_LIBIDN_ADDON=y + +CT_MUSL_NO_SPARC_V8=y +CT_MUSL_HAS_OBSOLETE_LIBCRYPT=y +CT_MUSL_EXTRA_CONFIG_ARRAY="--enable-crypt" +CT_MUSL_CONFIGPARMS="rtlddir=/lib64/lp64d" +CT_MUSL_ENABLE_DEBUG=y +CT_MUSL_EXTRA_CFLAGS="" +# CT_LIBC_MUSL_DEBUG is not set + +CT_MUSL_OLDEST_ABI="" +CT_MUSL_FORCE_UNWIND=y +# CT_GLIBC_LOCALES is not set +# CT_GLIBC_KERNEL_VERSION_NONE is not set +CT_MUSL_KERNEL_VERSION_AS_HEADERS=y + +CT_MUSL_MIN_KERNEL="5.10.185" +CT_GMUSL_SSP_DEFAULT=y + +CT_MUSL_ENABLE_WERROR=y + + +# CT_LIBC_MUSL_WARNINGS is not set +# CT_LIBC_MUSL_OPTIMIZE_NONE is not set +CT_LIBC_MUSL_OPTIMIZE_AUTO=y +# CT_LIBC_MUSL_OPTIMIZE_SPEED is not set +# CT_LIBC_MUSL_OPTIMIZE_SIZE is not set +CT_LIBC_MUSL_OPTIMIZE="auto" +CT_ALL_LIBC_CHOICES="AVR_LIBC BIONIC GLIBC MINGW_W64 MOXIEBOX MUSL NEWLIB NONE UCLIBC_NG" +CT_LIBC_SUPPORT_THREADS_ANY=y +CT_LIBC_SUPPORT_THREADS_NATIVE=y + +# +# Common C library options +# +CT_THREADS_NATIVE=y +# CT_CREATE_LDSO_CONF is not set +CT_LIBC_XLDD=y +# end of C-library + +# +# C compiler +# +CT_CC_CORE_NEEDED=y +CT_CC_SUPPORT_CXX=y +CT_CC_SUPPORT_FORTRAN=y +CT_CC_SUPPORT_ADA=y +CT_CC_SUPPORT_D=y +CT_CC_SUPPORT_JIT=y +CT_CC_SUPPORT_OBJC=y +CT_CC_SUPPORT_OBJCXX=y +CT_CC_SUPPORT_GOLANG=y +CT_CC_GCC=y +CT_CC="gcc" +CT_CC_CHOICE_KSYM="GCC" +CT_CC_GCC_SHOW=y + +# +# Options for gcc +# +CT_CC_GCC_PKG_KSYM="GCC" +CT_GCC_DIR_NAME="gcc" +CT_GCC_USE_GNU=y +# CT_GCC_USE_LINARO is not set +# CT_GCC_USE_ORACLE is not set +CT_GCC_USE="GCC" +CT_GCC_PKG_NAME="gcc" +# CT_GCC_SRC_RELEASE is not set +# CT_GCC_SRC_DEVEL is not set +CT_GCC_SRC_CUSTOM=y +CT_GCC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gcc/gcc-12.3.0" +CT_GCC_PATCH_GLOBAL=y +# CT_GCC_PATCH_BUNDLED is not set +# CT_GCC_PATCH_LOCAL is not set +# CT_GCC_PATCH_BUNDLED_LOCAL is not set +# CT_GCC_PATCH_LOCAL_BUNDLED is not set +# CT_GCC_PATCH_NONE is not set +CT_GCC_PATCH_ORDER="global" +# CT_GCC_VERY_NEW is not set +# CT_GCC_V_13 is not set +CT_GCC_V_12=y +# CT_GCC_V_11 is not set +# CT_GCC_V_10 is not set +# CT_GCC_V_9 is not set +# CT_GCC_V_8 is not set +# CT_GCC_V_7 is not set +CT_GCC_VERSION="12.3.0" +CT_GCC_MIRRORS="$(CT_Mirrors GNU gcc/gcc-${CT_GCC_VERSION}) $(CT_Mirrors sourceware gcc/releases/gcc-${CT_GCC_VERSION})" +CT_GCC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GCC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GCC_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GCC_SIGNATURE_FORMAT="" +CT_GCC_13_or_older=y +CT_GCC_older_than_13=y +CT_GCC_later_than_12=y +CT_GCC_12_or_later=y +CT_GCC_later_than_11=y +CT_GCC_11_or_later=y +CT_GCC_later_than_10=y +CT_GCC_10_or_later=y +CT_GCC_later_than_9=y +CT_GCC_9_or_later=y +CT_GCC_later_than_8=y +CT_GCC_8_or_later=y +CT_GCC_later_than_7=y +CT_GCC_7_or_later=y +CT_GCC_REQUIRE_7_or_later=y +CT_GCC_later_than_6=y +CT_GCC_6_or_later=y +CT_GCC_REQUIRE_6_or_later=y +CT_GCC_later_than_5=y +CT_GCC_5_or_later=y +CT_GCC_REQUIRE_5_or_later=y +CT_GCC_later_than_4_9=y +CT_GCC_4_9_or_later=y +CT_GCC_REQUIRE_4_9_or_later=y +CT_CC_GCC_HAS_LIBMPX=y +CT_CC_GCC_ENABLE_CXX_FLAGS="" +CT_CC_GCC_CORE_EXTRA_CONFIG_ARRAY="" +CT_CC_GCC_EXTRA_CONFIG_ARRAY=" --disable-multilib --with-abi=lp64d --with-gnu-as --with-gnu-ld --enable-c99 --enable-shared --enable-poison-system-directories --enable-symvers=gnu --disable-bootstrap --disable-libstdcxx-dual-abi --enable-default-pie --with-toolexeclibdir=\"${CT_PREFIX_DIR}/${CT_TARGET}/sysroot/lib64/lp64d/\"" +CT_CC_GCC_STATIC_LIBSTDCXX=y +# CT_CC_GCC_SYSTEM_ZLIB is not set +CT_CC_GCC_CONFIG_TLS=m + +# +# Optimisation features +# +CT_CC_GCC_USE_GRAPHITE=y +CT_CC_GCC_USE_LTO=y +CT_CC_GCC_LTO_ZSTD=m + +# +# Settings for libraries running on target +# +# CT_CC_GCC_ENABLE_DEFAULT_PIE is not set +CT_CC_GCC_ENABLE_TARGET_OPTSPACE=y +# CT_CC_GCC_LIBMUDFLAP is not set +# CT_CC_GCC_LIBGOMP is not set +# CT_CC_GCC_LIBSSP is not set +# CT_CC_GCC_LIBQUADMATH is not set +# CT_CC_GCC_LIBSANITIZER is not set +CT_CC_GCC_LIBSTDCXX_VERBOSE=m + +# +# Misc. obscure options. +# +CT_CC_CXA_ATEXIT=y +CT_CC_GCC_TM_CLONE_REGISTRY=m +# CT_CC_GCC_DISABLE_PCH is not set +CT_CC_GCC_SJLJ_EXCEPTIONS=m +CT_CC_GCC_LDBL_128=m +# CT_CC_GCC_BUILD_ID is not set +CT_CC_GCC_LNK_HASH_STYLE_DEFAULT=y +# CT_CC_GCC_LNK_HASH_STYLE_SYSV is not set +# CT_CC_GCC_LNK_HASH_STYLE_GNU is not set +# CT_CC_GCC_LNK_HASH_STYLE_BOTH is not set +CT_CC_GCC_LNK_HASH_STYLE="" +CT_CC_GCC_DEC_FLOATS_AUTO=y +# CT_CC_GCC_DEC_FLOATS_BID is not set +# CT_CC_GCC_DEC_FLOATS_DPD is not set +# CT_CC_GCC_DEC_FLOATS_NO is not set +CT_CC_GCC_DEC_FLOATS="" +CT_ALL_CC_CHOICES="GCC" + +# +# Additional supported languages: +# +CT_CC_LANG_CXX=y +CT_CC_LANG_FORTRAN=y +# CT_CC_LANG_JIT is not set +# CT_CC_LANG_ADA is not set +# CT_CC_LANG_D is not set +# CT_CC_LANG_OBJC is not set +# CT_CC_LANG_OBJCXX is not set +# CT_CC_LANG_GOLANG is not set +CT_CC_LANG_OTHERS="" +# end of C compiler + +# +# Debug facilities +# +# CT_DEBUG_DUMA is not set +CT_DEBUG_GDB=y +CT_DEBUG_GDB_PKG_KSYM="GDB" +CT_GDB_DIR_NAME="gdb" +CT_GDB_PKG_NAME="gdb" +# CT_GDB_SRC_RELEASE is not set +# CT_GDB_SRC_DEVEL is not set +CT_GDB_SRC_CUSTOM=y +CT_GDB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gdb/gdb-14.1" +CT_GDB_PATCH_GLOBAL=y +# CT_GDB_PATCH_BUNDLED is not set +# CT_GDB_PATCH_LOCAL is not set +# CT_GDB_PATCH_BUNDLED_LOCAL is not set +# CT_GDB_PATCH_LOCAL_BUNDLED is not set +# CT_GDB_PATCH_NONE is not set +CT_GDB_PATCH_ORDER="global" +CT_GDB_VERY_NEW=y +# CT_GDB_V_13 is not set +# CT_GDB_V_12 is not set +# CT_GDB_V_11 is not set +# CT_GDB_V_10 is not set +# CT_GDB_V_9 is not set +# CT_GDB_V_8_3 is not set +CT_GDB_VERSION="new" +CT_GDB_MIRRORS="$(CT_Mirrors GNU gdb) $(CT_Mirrors sourceware gdb/releases)" +CT_GDB_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GDB_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GDB_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GDB_SIGNATURE_FORMAT="" +CT_GDB_later_than_13=y +CT_GDB_13_or_later=y +CT_GDB_later_than_12=y +CT_GDB_12_or_later=y +CT_GDB_later_than_11=y +CT_GDB_11_or_later=y +CT_GDB_later_than_10=y +CT_GDB_10_or_later=y +CT_GDB_later_than_8_3=y +CT_GDB_8_3_or_later=y +CT_GDB_CROSS=y +# CT_GDB_CROSS_STATIC is not set +# CT_GDB_CROSS_SIM is not set +# CT_GDB_CROSS_PYTHON is not set +CT_GDB_CROSS_EXTRA_CONFIG_ARRAY="" +# CT_GDB_NATIVE is not set +# CT_GDB_GDBSERVER is not set + +CT_GDB_GDBSERVER_TOPLEVEL=y +# CT_DEBUG_LTRACE is not set +# CT_DEBUG_STRACE is not set +CT_ALL_DEBUG_CHOICES="DUMA GDB LTRACE STRACE" +# end of Debug facilities + +# +# Companion libraries +# +# CT_COMPLIBS_CHECK is not set +# CT_COMP_LIBS_CLOOG is not set +CT_COMP_LIBS_EXPAT=y +CT_COMP_LIBS_EXPAT_PKG_KSYM="EXPAT" +CT_EXPAT_DIR_NAME="expat" +CT_EXPAT_PKG_NAME="expat" +# CT_EXPAT_SRC_RELEASE is not set +# CT_EXPAT_SRC_DEVEL is not set +CT_EXPAT_SRC_CUSTOM=y +CT_EXPAT_CUSTOM_LOCATION="${OPENSOURCE_DIR}/expat/expat-2.5.0" +CT_EXPAT_PATCH_GLOBAL=y +# CT_EXPAT_PATCH_BUNDLED is not set +# CT_EXPAT_PATCH_LOCAL is not set +# CT_EXPAT_PATCH_BUNDLED_LOCAL is not set +# CT_EXPAT_PATCH_LOCAL_BUNDLED is not set +# CT_EXPAT_PATCH_NONE is not set +CT_EXPAT_PATCH_ORDER="global" +# CT_EXPAT_VERY_NEW is not set +CT_EXPAT_V_2_5=y +CT_EXPAT_VERSION="2.5.0" +CT_EXPAT_MIRRORS="http://downloads.sourceforge.net/project/expat/expat/${CT_EXPAT_VERSION} https://github.com/libexpat/libexpat/releases/download/R_${CT_EXPAT_VERSION//./_}" +CT_EXPAT_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_EXPAT_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_EXPAT_ARCHIVE_FORMATS=".tar.xz .tar.lz .tar.bz2 .tar.gz" +CT_EXPAT_SIGNATURE_FORMAT="" +CT_COMP_LIBS_GETTEXT=y +CT_COMP_LIBS_GETTEXT_PKG_KSYM="GETTEXT" +CT_GETTEXT_DIR_NAME="gettext" +CT_GETTEXT_PKG_NAME="gettext" +# CT_GETTEXT_SRC_RELEASE is not set +# CT_GETTEXT_SRC_DEVEL is not set +CT_GETTEXT_SRC_CUSTOM=y +CT_GETTEXT_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gettext/gettext-0.22" +CT_GETTEXT_PATCH_GLOBAL=y +# CT_GETTEXT_PATCH_BUNDLED is not set +# CT_GETTEXT_PATCH_LOCAL is not set +# CT_GETTEXT_PATCH_BUNDLED_LOCAL is not set +# CT_GETTEXT_PATCH_LOCAL_BUNDLED is not set +# CT_GETTEXT_PATCH_NONE is not set +CT_GETTEXT_PATCH_ORDER="global" +CT_GETTEXT_VERY_NEW=y +# CT_GETTEXT_V_0_21 is not set +# CT_GETTEXT_V_0_20_1 is not set +# CT_GETTEXT_V_0_19_8_1 is not set +CT_GETTEXT_VERSION="new" +CT_GETTEXT_MIRRORS="$(CT_Mirrors GNU gettext)" +CT_GETTEXT_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GETTEXT_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GETTEXT_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_GETTEXT_SIGNATURE_FORMAT="packed/.sig" +CT_GETTEXT_later_than_0_21=y +CT_GETTEXT_0_21_or_later=y +CT_GETTEXT_INCOMPATIBLE_WITH_UCLIBC_NG=y + +# +# This version of gettext is not compatible with uClibc-NG. Select +# + +# +# a different version if uClibc-NG is used on the target or (in a +# + +# +# Canadian cross build) on the host. +# +CT_COMP_LIBS_GMP=y +CT_COMP_LIBS_GMP_PKG_KSYM="GMP" +CT_GMP_DIR_NAME="gmp" +CT_GMP_PKG_NAME="gmp" +# CT_GMP_SRC_RELEASE is not set +# CT_GMP_SRC_DEVEL is not set +CT_GMP_SRC_CUSTOM=y +CT_GMP_CUSTOM_LOCATION="${OPENSOURCE_DIR}/gmp/gmp-6.3.0" +CT_GMP_PATCH_GLOBAL=y +# CT_GMP_PATCH_BUNDLED is not set +# CT_GMP_PATCH_LOCAL is not set +# CT_GMP_PATCH_BUNDLED_LOCAL is not set +# CT_GMP_PATCH_LOCAL_BUNDLED is not set +# CT_GMP_PATCH_NONE is not set +CT_GMP_PATCH_ORDER="global" +# CT_GMP_VERY_NEW is not set +CT_GMP_V_6_2=y +# CT_GMP_V_6_1 is not set +CT_GMP_VERSION="6.2.1" +CT_GMP_MIRRORS="https://gmplib.org/download/gmp https://gmplib.org/download/gmp/archive $(CT_Mirrors GNU gmp)" +CT_GMP_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_GMP_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_GMP_ARCHIVE_FORMATS=".tar.xz .tar.lz .tar.bz2" +CT_GMP_SIGNATURE_FORMAT="packed/.sig" +CT_COMP_LIBS_ISL=y +CT_COMP_LIBS_ISL_PKG_KSYM="ISL" +CT_ISL_DIR_NAME="isl" +CT_ISL_PKG_NAME="isl" +# CT_ISL_SRC_RELEASE is not set +# CT_ISL_SRC_DEVEL is not set +CT_ISL_SRC_CUSTOM=y +CT_ISL_CUSTOM_LOCATION="${OPENSOURCE_DIR}/isl/isl-0.24" +CT_ISL_PATCH_GLOBAL=y +# CT_ISL_PATCH_BUNDLED is not set +# CT_ISL_PATCH_LOCAL is not set +# CT_ISL_PATCH_BUNDLED_LOCAL is not set +# CT_ISL_PATCH_LOCAL_BUNDLED is not set +# CT_ISL_PATCH_NONE is not set +CT_ISL_PATCH_ORDER="global" +# CT_ISL_VERY_NEW is not set +# CT_ISL_V_0_26 is not set +# CT_ISL_V_0_25 is not set +# CT_ISL_V_0_24 is not set +# CT_ISL_V_0_23 is not set +# CT_ISL_V_0_22 is not set +# CT_ISL_V_0_21 is not set +# CT_ISL_V_0_20 is not set +# CT_ISL_V_0_19 is not set +# CT_ISL_V_0_18 is not set +# CT_ISL_V_0_17 is not set +CT_ISL_V_0_16=y +# CT_ISL_V_0_15 is not set +CT_ISL_VERSION="0.16.1" +CT_ISL_MIRRORS="https://libisl.sourceforge.io" +CT_ISL_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ISL_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ISL_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz" +CT_ISL_SIGNATURE_FORMAT="" +CT_ISL_0_18_or_older=y +CT_ISL_older_than_0_18=y +CT_ISL_later_than_0_15=y +CT_ISL_0_15_or_later=y +# CT_COMP_LIBS_LIBELF is not set +CT_COMP_LIBS_LIBICONV=y +CT_COMP_LIBS_LIBICONV_PKG_KSYM="LIBICONV" +CT_LIBICONV_DIR_NAME="libiconv" +CT_LIBICONV_PKG_NAME="libiconv" +# CT_LIBICONV_SRC_RELEASE is not set +# CT_LIBICONV_SRC_DEVEL is not set +CT_LIBICONV_SRC_CUSTOM=y +CT_LIBICONV_CUSTOM_LOCATION="${OPENSOURCE_DIR}/libiconv/libiconv-1.16" +CT_LIBICONV_PATCH_GLOBAL=y +# CT_LIBICONV_PATCH_BUNDLED is not set +# CT_LIBICONV_PATCH_LOCAL is not set +# CT_LIBICONV_PATCH_BUNDLED_LOCAL is not set +# CT_LIBICONV_PATCH_LOCAL_BUNDLED is not set +# CT_LIBICONV_PATCH_NONE is not set +CT_LIBICONV_PATCH_ORDER="global" +# CT_LIBICONV_VERY_NEW is not set +CT_LIBICONV_V_1_16=y +# CT_LIBICONV_V_1_15 is not set +CT_LIBICONV_VERSION="1.16" +CT_LIBICONV_MIRRORS="$(CT_Mirrors GNU libiconv)" +CT_LIBICONV_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_LIBICONV_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_LIBICONV_ARCHIVE_FORMATS=".tar.gz" +CT_LIBICONV_SIGNATURE_FORMAT="packed/.sig" +CT_COMP_LIBS_MPC=y +CT_COMP_LIBS_MPC_PKG_KSYM="MPC" +CT_MPC_DIR_NAME="mpc" +CT_MPC_PKG_NAME="mpc" +# CT_MPC_SRC_RELEASE is not set +# CT_MPC_SRC_DEVEL is not set +CT_MPC_SRC_CUSTOM=y +CT_MPC_CUSTOM_LOCATION="${OPENSOURCE_DIR}/libmpc/mpc-1.3.1" +CT_MPC_PATCH_GLOBAL=y +# CT_MPC_PATCH_BUNDLED is not set +# CT_MPC_PATCH_LOCAL is not set +# CT_MPC_PATCH_BUNDLED_LOCAL is not set +# CT_MPC_PATCH_LOCAL_BUNDLED is not set +# CT_MPC_PATCH_NONE is not set +CT_MPC_PATCH_ORDER="global" +CT_MPC_VERY_NEW=y +# CT_MPC_V_1_2 is not set +CT_MPC_VERSION="new" +CT_MPC_MIRRORS="https://www.multiprecision.org/downloads $(CT_Mirrors GNU mpc)" +CT_MPC_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_MPC_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_MPC_ARCHIVE_FORMATS=".tar.gz" +CT_MPC_SIGNATURE_FORMAT="packed/.sig" +CT_MPC_later_than_1_1_0=y +CT_MPC_1_1_0_or_later=y +CT_COMP_LIBS_MPFR=y +CT_COMP_LIBS_MPFR_PKG_KSYM="MPFR" +CT_MPFR_DIR_NAME="mpfr" +CT_MPFR_PKG_NAME="mpfr" +# CT_MPFR_SRC_RELEASE is not set +# CT_MPFR_SRC_DEVEL is not set +CT_MPFR_SRC_CUSTOM=y +CT_MPFR_CUSTOM_LOCATION="${OPENSOURCE_DIR}/mpfr/mpfr-4.2.1" +CT_MPFR_PATCH_GLOBAL=y +# CT_MPFR_PATCH_BUNDLED is not set +# CT_MPFR_PATCH_LOCAL is not set +# CT_MPFR_PATCH_BUNDLED_LOCAL is not set +# CT_MPFR_PATCH_LOCAL_BUNDLED is not set +# CT_MPFR_PATCH_NONE is not set +CT_MPFR_PATCH_ORDER="global" +CT_MPFR_VERY_NEW=y +# CT_MPFR_V_4_2 is not set +CT_MPFR_VERSION="new" +CT_MPFR_MIRRORS="https://www.mpfr.org/mpfr-${CT_MPFR_VERSION} $(CT_Mirrors GNU mpfr)" +CT_MPFR_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_MPFR_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_MPFR_ARCHIVE_FORMATS=".tar.xz .tar.bz2 .tar.gz .zip" +CT_MPFR_SIGNATURE_FORMAT="packed/.asc" +CT_MPFR_later_than_4_0_0=y +CT_MPFR_4_0_0_or_later=y +CT_COMP_LIBS_NCURSES=y +CT_COMP_LIBS_NCURSES_PKG_KSYM="NCURSES" +CT_NCURSES_DIR_NAME="ncurses" +CT_NCURSES_PKG_NAME="ncurses" +# CT_NCURSES_SRC_RELEASE is not set +# CT_NCURSES_SRC_DEVEL is not set +CT_NCURSES_SRC_CUSTOM=y +CT_NCURSES_CUSTOM_LOCATION="${OPENSOURCE_DIR}/ncurses/ncurses-6.4" +CT_NCURSES_PATCH_GLOBAL=y +# CT_NCURSES_PATCH_BUNDLED is not set +# CT_NCURSES_PATCH_LOCAL is not set +# CT_NCURSES_PATCH_BUNDLED_LOCAL is not set +# CT_NCURSES_PATCH_LOCAL_BUNDLED is not set +# CT_NCURSES_PATCH_NONE is not set +CT_NCURSES_PATCH_ORDER="global" +# CT_NCURSES_VERY_NEW is not set +CT_NCURSES_V_6_4=y +# CT_NCURSES_V_6_2 is not set +# CT_NCURSES_V_6_1 is not set +# CT_NCURSES_V_6_0 is not set +CT_NCURSES_VERSION="6.4" +CT_NCURSES_MIRRORS="https://invisible-mirror.net/archives/ncurses $(CT_Mirrors GNU ncurses)" +CT_NCURSES_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_NCURSES_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_NCURSES_ARCHIVE_FORMATS=".tar.gz" +CT_NCURSES_SIGNATURE_FORMAT="packed/.sig" +CT_NCURSES_NEW_ABI=y +CT_NCURSES_HOST_CONFIG_ARGS="" +CT_NCURSES_HOST_DISABLE_DB=y +CT_NCURSES_HOST_FALLBACKS="linux,xterm,xterm-color,xterm-256color,vt100" +CT_NCURSES_TARGET_CONFIG_ARGS="" +# CT_NCURSES_TARGET_DISABLE_DB is not set +CT_NCURSES_TARGET_FALLBACKS="" +CT_COMP_LIBS_ZLIB=y +CT_COMP_LIBS_ZLIB_PKG_KSYM="ZLIB" +CT_ZLIB_DIR_NAME="zlib" +CT_ZLIB_PKG_NAME="zlib" +# CT_ZLIB_SRC_RELEASE is not set +# CT_ZLIB_SRC_DEVEL is not set +CT_ZLIB_SRC_CUSTOM=y +CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.2.13" +CT_ZLIB_PATCH_GLOBAL=y +# CT_ZLIB_PATCH_BUNDLED is not set +# CT_ZLIB_PATCH_LOCAL is not set +# CT_ZLIB_PATCH_BUNDLED_LOCAL is not set +# CT_ZLIB_PATCH_LOCAL_BUNDLED is not set +# CT_ZLIB_PATCH_NONE is not set +CT_ZLIB_PATCH_ORDER="global" +# CT_ZLIB_VERY_NEW is not set +CT_ZLIB_V_1_2_13=y +CT_ZLIB_VERSION="1.2.13" +CT_ZLIB_MIRRORS="https://github.com/madler/zlib/releases/download/v${CT_ZLIB_VERSION} https://www.zlib.net/" +CT_ZLIB_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ZLIB_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ZLIB_ARCHIVE_FORMATS=".tar.xz .tar.gz" +CT_ZLIB_SIGNATURE_FORMAT="packed/.asc" +CT_COMP_LIBS_ZSTD=y +CT_COMP_LIBS_ZSTD_PKG_KSYM="ZSTD" +CT_ZSTD_DIR_NAME="zstd" +CT_ZSTD_PKG_NAME="zstd" +# CT_ZSTD_SRC_RELEASE is not set +# CT_ZSTD_SRC_DEVEL is not set +CT_ZSTD_SRC_CUSTOM=y +CT_ZSTD_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zstd/zstd-1.5.5" +CT_ZSTD_PATCH_GLOBAL=y +# CT_ZSTD_PATCH_BUNDLED is not set +# CT_ZSTD_PATCH_LOCAL is not set +# CT_ZSTD_PATCH_BUNDLED_LOCAL is not set +# CT_ZSTD_PATCH_LOCAL_BUNDLED is not set +# CT_ZSTD_PATCH_NONE is not set +CT_ZSTD_PATCH_ORDER="global" +# CT_ZSTD_VERY_NEW is not set +CT_ZSTD_V_1_5_5=y +# CT_ZSTD_V_1_5_2 is not set +CT_ZSTD_VERSION="1.5.5" +CT_ZSTD_MIRRORS="https://github.com/facebook/zstd/releases/download/v${CT_ZSTD_VERSION} https://www.zstd.net/" +CT_ZSTD_ARCHIVE_FILENAME="@{pkg_name}-@{version}" +CT_ZSTD_ARCHIVE_DIRNAME="@{pkg_name}-@{version}" +CT_ZSTD_ARCHIVE_FORMATS=".tar.gz" +CT_ZSTD_SIGNATURE_FORMAT="packed/.sig" +CT_ALL_COMP_LIBS_CHOICES="CLOOG EXPAT GETTEXT GMP GNUPRUMCU ISL LIBELF LIBICONV MPC MPFR NCURSES NEWLIB_NANO PICOLIBC ZLIB ZSTD" +CT_LIBICONV_NEEDED=y +CT_GETTEXT_NEEDED=y +CT_GMP_NEEDED=y +CT_MPFR_NEEDED=y +CT_ISL_NEEDED=y +CT_MPC_NEEDED=y +CT_EXPAT_NEEDED=y +CT_NCURSES_NEEDED=y +CT_ZLIB_NEEDED=y +CT_ZSTD_NEEDED=y +CT_LIBICONV=y +CT_GETTEXT=y +CT_GMP=y +CT_MPFR=y +CT_ISL=y +CT_MPC=y +CT_EXPAT=y +CT_NCURSES=y +CT_ZLIB=y +CT_ZSTD=y +# end of Companion libraries + +# +# Companion tools +# +# CT_COMP_TOOLS_FOR_HOST is not set +# CT_COMP_TOOLS_AUTOCONF is not set +# CT_COMP_TOOLS_AUTOMAKE is not set +# CT_COMP_TOOLS_BISON is not set +# CT_COMP_TOOLS_DTC is not set +# CT_COMP_TOOLS_LIBTOOL is not set +# CT_COMP_TOOLS_M4 is not set +# CT_COMP_TOOLS_MAKE is not set +CT_ALL_COMP_TOOLS_CHOICES="AUTOCONF AUTOMAKE BISON DTC LIBTOOL M4 MAKE" +# end of Companion tools + +# +# Test suite +# +# CT_TEST_SUITE_GCC is not set +# end of Test suite diff --git a/.oebuild/cross-tools/configs/config_x86_64 b/.oebuild/cross-tools/configs/config_x86_64 index 8966c323af0e7d14b7afd70d1e4703ab7c34249d..568baf8a094bc35aa62e04a221a5d1272ff11d76 100644 --- a/.oebuild/cross-tools/configs/config_x86_64 +++ b/.oebuild/cross-tools/configs/config_x86_64 @@ -1020,7 +1020,7 @@ CT_ZLIB_PKG_NAME="zlib" # CT_ZLIB_SRC_RELEASE is not set # CT_ZLIB_SRC_DEVEL is not set CT_ZLIB_SRC_CUSTOM=y -CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.3.1" +CT_ZLIB_CUSTOM_LOCATION="${OPENSOURCE_DIR}/zlib/zlib-1.2.13" CT_ZLIB_PATCH_GLOBAL=y # CT_ZLIB_PATCH_BUNDLED is not set # CT_ZLIB_PATCH_LOCAL is not set diff --git a/.oebuild/cross-tools/patches/glibc-revert-reserve-relocation-information-for-sysboost.patch b/.oebuild/cross-tools/patches/glibc-revert-reserve-relocation-information-for-sysboost.patch deleted file mode 100644 index 9fd6444921557e1ffb497518f02147389dd8cc74..0000000000000000000000000000000000000000 --- a/.oebuild/cross-tools/patches/glibc-revert-reserve-relocation-information-for-sysboost.patch +++ /dev/null @@ -1,14 +0,0 @@ ---- a/Makerules -+++ b/Makerules -@@ -534,7 +534,7 @@ lib%.so: lib%_pic.a $(+preinit) $(+postinit) $(link-libc-deps) - $(call after-link,$@) - - define build-shlib-helper --$(LINK.o) -shared -static-libgcc -Wl,-O1 $(sysdep-LDFLAGS) -Wl,--emit-relocs \ -+$(LINK.o) -shared -static-libgcc -Wl,-O1 $(sysdep-LDFLAGS) \ - $(if $($(@F)-no-z-defs)$(no-z-defs),,-Wl,-z,defs) $(rtld-LDFLAGS) \ - $(if $($(@F)-no-dt-relr),$(no-dt-relr-ldflag),$(dt-relr-ldflag)) \ - $(extra-B-$(@F:lib%.so=%).so) -B$(csu-objpfx) \ --- -2.33.0 - diff --git a/.oebuild/cross-tools/prepare.sh b/.oebuild/cross-tools/prepare.sh index b949ed63ec7de80b7e1e0630cc940279d5edeebc..6792dac02beef420aa81bae1bce4727f9dd5c2c1 100755 --- a/.oebuild/cross-tools/prepare.sh +++ b/.oebuild/cross-tools/prepare.sh @@ -105,6 +105,7 @@ main() echo "'cp config_x86_64 .config && ct-ng build' for build x86_64" echo "'cp config_riscv64 .config && ct-ng build' for build riscv64" echo "'cp config_aarch64-musl .config && ct-ng build' for build muslc_aarch64" + echo "'cp config_loongarch64 .config && ct-ng build' for build loongarch64" } main "$@" diff --git a/.oebuild/cross-tools/update.sh b/.oebuild/cross-tools/update.sh index 72f565b5c084bf4ce479903c7560a1facd188550..5413eab898db643a0204c434e0dac6666d1bc657 100755 --- a/.oebuild/cross-tools/update.sh +++ b/.oebuild/cross-tools/update.sh @@ -50,6 +50,7 @@ main() echo "'cp config_x86_64 .config && ct-ng build' for build x86_64" echo "'cp config_riscv64 .config && ct-ng build' for build riscv64" echo "'cp config_aarch64-musl .config && ct-ng build' for build muslc_aarch64" + echo "'cp config_loongarch64 .config && ct-ng build' for build loongarch64" } main "$@" diff --git a/.oebuild/dockerfile/openeuler-container/Dockerfile b/.oebuild/dockerfile/openeuler-container/Dockerfile index 666bdb418b6bef79d8454f1d290f674716019f9d..9139db3ba7276de96b7ccceeb4494c4a7c7be0d3 100644 --- a/.oebuild/dockerfile/openeuler-container/Dockerfile +++ b/.oebuild/dockerfile/openeuler-container/Dockerfile @@ -12,6 +12,9 @@ gmp-devel ninja-build numactl-devel make python3 python3-pip screen glibc-locale iproute xz unzip help2man libstdc++-static gcc g++ rsync python3-devel gdisk umoci skopeo \ libxslt vim hwdata perl-XML-Parser iptables golang quilt +RUN wget https://repo.oepkgs.net/openeuler/rpm/openEuler-20.03-LTS-SP1/compatible/c7/x86_64/Packages/git-lfs-2.10.0-1.x86_64.rpm +RUN rpm -ivh git-lfs-2.10.0-1.x86_64.rpm && rm -f git-lfs-2.10.0-1.x86_64.rpm + ARG user=openeuler ARG group=openeuler ARG uid=1000 diff --git a/.oebuild/dockerfile/openeuler-container/Dockerfile_CI b/.oebuild/dockerfile/openeuler-container/Dockerfile_CI index 707c4ab607472bbe9c4cd45393b56416506ec741..554af588a23184de788eb70d33c764512cfb860c 100644 --- a/.oebuild/dockerfile/openeuler-container/Dockerfile_CI +++ b/.oebuild/dockerfile/openeuler-container/Dockerfile_CI @@ -41,7 +41,7 @@ pip install PyYaml python-git requests python-jenkins paramiko json2table \ gitlint sphinx_tabs sphinx_multiversion sphinx-rtd-theme Sphinx==5.1.1 \ pyyaml pygit gitpython -i https://pypi.tuna.tsinghua.edu.cn/simple -RUN pip install oebuild==0.1 +RUN pip install oebuild==0.1.0.8 VOLUME /home/${user}/.jenkins VOLUME ${AGENT_WORKDIR} diff --git a/.oebuild/features/openeuler-airos.yaml b/.oebuild/features/airos.yaml similarity index 100% rename from .oebuild/features/openeuler-airos.yaml rename to .oebuild/features/airos.yaml diff --git a/.oebuild/features/clang.yaml b/.oebuild/features/clang.yaml index 62595d75bff16f829021f81b992ae1b8b8d4dc51..4fe944053f6e91a11217d82edf1605e513d8af2e 100644 --- a/.oebuild/features/clang.yaml +++ b/.oebuild/features/clang.yaml @@ -1,6 +1,6 @@ type: feature -support: qemu-aarch64|raspberrypi4-64 +support: qemu-aarch64|raspberrypi4-64|x86-64 local_conf: | DISTRO_FEATURES:append = " clang ld-is-lld" diff --git a/.oebuild/features/openeuler-container.yaml b/.oebuild/features/isulad.yaml similarity index 55% rename from .oebuild/features/openeuler-container.yaml rename to .oebuild/features/isulad.yaml index 309acac718ca752ab7c1a595c21788eb2f1dbc5f..90eb53d58f99547ef73c5ad3b00d87ef73b43254 100644 --- a/.oebuild/features/openeuler-container.yaml +++ b/.oebuild/features/isulad.yaml @@ -1,6 +1,6 @@ type: feature -support: qemu-aarch64|raspberrypi4-64|hieulerpi1 +support: qemu-aarch64|raspberrypi4-64|hieulerpi1|kp920 local_conf: | DISTRO_FEATURES:append = " isulad " diff --git a/.oebuild/features/openeuler-edge.yaml b/.oebuild/features/kubeedge.yaml similarity index 100% rename from .oebuild/features/openeuler-edge.yaml rename to .oebuild/features/kubeedge.yaml diff --git a/.oebuild/features/openeuler-mcs.yaml b/.oebuild/features/mcs.yaml similarity index 80% rename from .oebuild/features/openeuler-mcs.yaml rename to .oebuild/features/mcs.yaml index 50ed92fd549b218a803d26183c84d5679ae72355..e3221c57eff3717fbbdee6fa21b6a3bb7dfcb7c3 100644 --- a/.oebuild/features/openeuler-mcs.yaml +++ b/.oebuild/features/mcs.yaml @@ -1,6 +1,6 @@ type: feature -support: qemu-aarch64|raspberrypi4-64|hi3093|ok3568|x86-64 +support: qemu-aarch64|raspberrypi4-64|hi3093|ok3568|kp920|x86-64 layers: - yocto-meta-openeuler/rtos/meta-openeuler-rtos diff --git a/.oebuild/features/openeuler-obmc.yaml b/.oebuild/features/obmc.yaml similarity index 100% rename from .oebuild/features/openeuler-obmc.yaml rename to .oebuild/features/obmc.yaml diff --git a/.oebuild/features/openeuler-qt.yaml b/.oebuild/features/qt5.yaml similarity index 100% rename from .oebuild/features/openeuler-qt.yaml rename to .oebuild/features/qt5.yaml diff --git a/.oebuild/features/openeuler-ros.yaml b/.oebuild/features/ros.yaml similarity index 100% rename from .oebuild/features/openeuler-ros.yaml rename to .oebuild/features/ros.yaml diff --git a/.oebuild/features/openeuler-rt.yaml b/.oebuild/features/rt.yaml similarity index 100% rename from .oebuild/features/openeuler-rt.yaml rename to .oebuild/features/rt.yaml diff --git a/.oebuild/features/xen.yaml b/.oebuild/features/xen.yaml new file mode 100644 index 0000000000000000000000000000000000000000..548089db5fc17710ffd89c69353467f4a770aa17 --- /dev/null +++ b/.oebuild/features/xen.yaml @@ -0,0 +1,6 @@ +type: feature + +support: qemu-aarch64|raspberrypi4-64 + +local_conf: | + DISTRO_FEATURES:append = " xen" diff --git a/.oebuild/local.conf.sample b/.oebuild/local.conf.sample index df4a9433033ec6581001aed652a8e3c40e755fa6..dd83b148226848fc47277d29a37ff95146e29ef3 100644 --- a/.oebuild/local.conf.sample +++ b/.oebuild/local.conf.sample @@ -312,11 +312,13 @@ EXTERNAL_TOOLCHAIN_GCC:arm = "/usr1/openeuler/gcc/openeuler_gcc_arm32le" EXTERNAL_TOOLCHAIN_GCC:aarch64 = "/usr1/openeuler/gcc/openeuler_gcc_arm64le" EXTERNAL_TOOLCHAIN_GCC:x86-64 = "/usr1/openeuler/gcc/openeuler_gcc_x86_64" EXTERNAL_TOOLCHAIN_GCC:riscv64 = "/usr1/openeuler/gcc/openeuler_gcc_riscv64" +EXTERNAL_TOOLCHAIN_GCC:loongarch64 = "/usr1/openeuler/gcc/openeuler_gcc_loongarch64" EXTERNAL_TOOLCHAIN_LLVM = "/usr1/openeuler/llvm" EXTERNAL_TARGET_SYS:arm = "arm-openeuler-linux-gnueabi" EXTERNAL_TARGET_SYS:aarch64 = "aarch64-openeuler-linux-gnu" EXTERNAL_TARGET_SYS:x86-64 = "x86_64-openeuler-linux-gnu" EXTERNAL_TARGET_SYS:riscv64 = "riscv64-openeuler-linux-gnu" +EXTERNAL_TARGET_SYS:loongarch64 = "loongarch64-openeuler-linux-gnu" EXTERNAL_TOOLCHAIN ?= "${EXTERNAL_TOOLCHAIN_GCC}" diff --git a/.oebuild/manifest.yaml b/.oebuild/manifest.yaml index e3fd78bb2b7dad64b65469522eb62cf81fb22c02..f1bb108a15aee8da60529f71c8da8f9fa7ee479d 100644 --- a/.oebuild/manifest.yaml +++ b/.oebuild/manifest.yaml @@ -12,6 +12,9 @@ manifest_list: BehaviorTree.CPP: remote_url: https://gitee.com/src-openeuler/BehaviorTree.CPP.git version: 7c0d3c631e66ad13a49474bf9ce7587f246fa284 + ComputeLibrary: + remote_url: https://gitee.com/src-openeuler/ComputeLibrary.git + version: 187f9e613e341afbfdd0e462ef9054a5883aebc8 Cython: remote_url: https://gitee.com/src-openeuler/Cython.git version: 76f0889b6bf7cf9aa0650675a3299c8227255119 @@ -24,36 +27,45 @@ manifest_list: GraphicsMagick: remote_url: https://gitee.com/src-openeuler/GraphicsMagick.git version: 54d35b3952d5811592370b7ee9fcb8ed0f46526e + HiEdge-driver: + remote_url: https://gitee.com/HiEuler/hiedge_driver.git + version: 0a87fac88ab30e0f5673a40440a9468fd1a97dae HiEuler-driver: remote_url: https://gitee.com/HiEuler/hardware_driver.git - version: fe390ae40d79c4932f0ead12d35a97b0c3f9c666 + version: 1bc3074c1d51011e7648243549af36223d497fe3 Jailhouse: remote_url: https://gitee.com/src-openeuler/Jailhouse.git version: 5fc52fe2d58fd3fd929d97d1f10dbf7b49cdb53e OpenAMP: remote_url: https://gitee.com/src-openeuler/OpenAMP.git - version: 0dfe540d001c193e46e73ee37e55ca4ef52ece7c + version: 5fbe563479c2c137a442659e87f603dd323a03c3 SDL2: remote_url: https://gitee.com/src-openeuler/SDL2.git version: d2ed4dad8b628d9355ceababb419b42c4b6d1866 abseil-cpp: remote_url: https://gitee.com/src-openeuler/abseil-cpp.git - version: c31e06bcaa540d08dcf61286bed9f3394f776c40 + version: ca9a18e96d10fb85a395191f31421e590ddbe39e ackermann_msgs: remote_url: https://gitee.com/src-openeuler/ackermann_msgs.git version: ada460ea14a8ddfb5de825cc398c09b252c737b8 acl: remote_url: https://gitee.com/src-openeuler/acl.git - version: 3d8d8158744824af8dffc7686596b7017ae96231 + version: 2cae66d0ae4e006a428f1a4a2d2b16925546e034 adwaita-icon-theme: remote_url: https://gitee.com/src-openeuler/adwaita-icon-theme.git - version: 309630a8cb0d1de484f025e6d7fb2b92b0d278de + version: 92ae95abc6f889f3e0da6ff2454c3b04635cfb55 allwinner-kernel: remote_url: https://gitee.com/openeuler/allwinner-kernel.git version: 76f1f708e0cdfa27d82982a21220167f9c4a610e alsa-lib: remote_url: https://gitee.com/src-openeuler/alsa-lib.git - version: 1a985ab5832c3577dd55796846b53585263435db + version: a2ec6d981440c5e11fd2f3e8d3feb811306aafcc + alsa-plugins: + remote_url: https://gitee.com/src-openeuler/alsa-plugins.git + version: ce03548a8d7b3bd6188c0caf54e193d5f22962e4 + alsa-utils: + remote_url: https://gitee.com/src-openeuler/alsa-utils.git + version: d5db7f276dde364f9af877c92088c18f54e62059 ament-cmake: remote_url: https://gitee.com/src-openeuler/ament_cmake.git version: 89fdc438f6c3b818dd77690ae96ee75e521163b3 @@ -72,30 +84,36 @@ manifest_list: angles: remote_url: https://gitee.com/src-openeuler/angles.git version: 8dbc30a4776b2e3c66714f8f22424ed97337f102 + armnn: + remote_url: https://gitee.com/src-openeuler/armnn.git + version: 64676572e789604efd056143200b6e4677fb64fc asio: remote_url: https://gitee.com/src-openeuler/asio.git version: 83ca23a30baf73865313fb81a2b1e675192bfb44 at-spi2-core: remote_url: https://gitee.com/src-openeuler/at-spi2-core.git - version: e825ee6aa498f864865bfc58bcc9a30adb461fb6 + version: 0537a22d659de62e0c4777fcd9571424732f3016 atkmm: remote_url: https://gitee.com/src-openeuler/atkmm.git version: 5bb30032e54ab8368b0d3d43f99a5873393d21d2 attr: remote_url: https://gitee.com/src-openeuler/attr.git - version: f1d4aa64be37547f443892f859df3bb09c691b0d + version: e5c71c776801c30771337ea5f42a6ebd5b959630 audit: remote_url: https://gitee.com/src-openeuler/audit.git - version: ee6bb92aed1f8c00617c55e3de22631f0c701ec9 + version: aaadf2aac197e2496cbdf21517e25dd8049cc20b autoconf: remote_url: https://gitee.com/src-openeuler/autoconf.git - version: f001f78b2ece55d839e17b9c0d3b7dfb1d78bb9f + version: 484a68397339b8652121bf868874f8ad198d3739 autoconf-archive: remote_url: https://gitee.com/src-openeuler/autoconf-archive.git version: 16af475f35761ce1b2a21d47155902030befa469 automake: remote_url: https://gitee.com/src-openeuler/automake.git - version: 9c7286657dbff4f963d4ae33ec0fed6440487aab + version: 791a3368684d4f5cdb630b07e475668115687b95 + avahi: + remote_url: https://gitee.com/src-openeuler/avahi.git + version: 3c0c3f00e9ebcb9bb2d03c926d8f4e6e8860f4c4 babeltrace: remote_url: https://gitee.com/src-openeuler/babeltrace.git version: 44a274d933947f22823df40c66551ab0e9ede8e3 @@ -104,7 +122,7 @@ manifest_list: version: 9db7a29bc7a044e26e25b918a73a3016d323be02 bash: remote_url: https://gitee.com/src-openeuler/bash.git - version: 74d9a85e78502a35190a9da88df0f1f4662ae2ef + version: 745fdeb42e3832fdcf7a4acb97719d71d577c29e bash-completion: remote_url: https://gitee.com/src-openeuler/bash-completion.git version: 96c4b4bf85c67c72902094911e7a1a27881c718b @@ -113,49 +131,64 @@ manifest_list: version: ff45e3ec2db78650cd3aa6e0a3c0456eb4587857 binutils: remote_url: https://gitee.com/src-openeuler/binutils.git - version: 46971c5d22cacb2df021586ed0be554ea7e1a7f4 + version: 3b7f67ac74e9ba81b87b49aa2bda7b534b6b6570 bison: remote_url: https://gitee.com/src-openeuler/bison.git - version: a4999cead3b3f710c7e7fde115fc2a3fbaa2e1e4 + version: 207a16a4466b1c48a0023fc4d8d9eecd297ce805 blktrace: remote_url: https://gitee.com/src-openeuler/blktrace.git - version: aa4cbaec82ec82e97de7255b60dba44f253b2200 + version: f7ec98be076dc523eeb4f61a3f95761581c321d0 bluez: remote_url: https://gitee.com/src-openeuler/bluez.git - version: 188827b67629cc8a222cf8b7e4b37515f9fbf3c3 + version: 6bdfbaa3e816b528da3c210954c655bbf1107551 + bmap-tools: + remote_url: https://gitee.com/src-oepkgs/bmap-tools.git + version: df9427eb085563d403210095870cba92f546f81b + bmcweb: + remote_url: https://github.com/openbmc/bmcweb.git + version: 3d768a165183dd8cf7e485ac67ab7270845d5f87 bond-core: remote_url: https://gitee.com/src-openeuler/bond_core.git version: 8e639c3d54467968e384d32eb9f7007d4d7a9af5 boost: remote_url: https://gitee.com/src-openeuler/boost.git - version: e7e69aa5f963759a2d6780e3ced7267f1398c7d8 + version: f9130e1c5acdc94e3812af69ed737a794d79b4bb + boost-obmc: + remote_url: https://gitee.com/src-openeuler/boost.git + version: 8ab4fe722e8136317f6f9b370ff20af44f61c78d bridge-utils: remote_url: https://gitee.com/src-openeuler/bridge-utils.git - version: 3d4a8dac115e0e6754db1a8bdb527c079775bc79 + version: eb502bfc638629f2d72cc5caf9a467cb1625a4cb + brotli: + remote_url: https://gitee.com/src-openeuler/brotli.git + version: da3d8f7b09210944de4c7bc27c3de0d5a629465d btrfs-progs: remote_url: https://gitee.com/src-openeuler/btrfs-progs.git - version: e46e497c5d5a8b5c9972cf9f28e5140e43f6bbce + version: 5397fe7c665e5d1ba2f445e5ae60ed23dcc1c697 bullet: remote_url: https://gitee.com/src-openeuler/bullet.git version: 0bcdf88fed7a69ade17d89e7d118db1afe767751 busybox: remote_url: https://gitee.com/src-openeuler/busybox.git - version: c1846db8b6adff15cc0aadf11a995cc0e9c8fb01 + version: 0ce2fe7c876e1f52624e17e742dfaedbfae63944 bzip2: remote_url: https://gitee.com/src-openeuler/bzip2.git - version: 69c2fe406f2db08bab0810424262ad88498b7c8a + version: ab243e17823ba48b5d3461ff5056fb85f6b36bd4 c-ares: remote_url: https://gitee.com/src-openeuler/c-ares.git - version: aeb5692f80cda6f835273a8373b09169d2341e06 + version: 658d236f0fdf98bbf413f0af5fcb07506485b23a ca-certificates: remote_url: https://gitee.com/src-openeuler/ca-certificates.git - version: 165874040784b1a882d8fc3397556e84a5854547 + version: ad94ea9127a06f000c138c6e2a79802f7f4d8676 cairo: remote_url: https://gitee.com/src-openeuler/cairo.git version: 5b1697d8147da3d2dbea1a2759abcf8652012b9f cairomm: remote_url: https://gitee.com/src-openeuler/cairomm.git version: 8e910c33e01601817860eea1dd25490a9e0b6eea + can-utils: + remote_url: https://gitee.com/src-openeuler/can-utils.git + version: 606c2b89cda6afa38cf7f247d1857acd63995c25 cartographer: remote_url: https://gitee.com/src-openeuler/cartographer.git version: 735db435e750e7eff215a3c95786cd3a91b1dd5f @@ -170,49 +203,58 @@ manifest_list: version: f00ad1717543b62c440bc7d57dc88be048b0ef44 ceres-solver: remote_url: https://gitee.com/src-openeuler/ceres-solver.git - version: fc7bb918c95655fc2f32275dc346247f83d63a98 + version: e2be91e02fea4eb746420a788d047b0aec3c5167 check: remote_url: https://gitee.com/src-openeuler/check.git - version: 70db8903e4466296c8b5d5d9303671e85ade5594 + version: a54d694f2cb5c1a0a5b8214c92d1902ec88eea44 chrpath: remote_url: https://gitee.com/src-openeuler/chrpath.git - version: bc91cd18702c17200ef8f7d4c7acba26f65fe7b4 + version: e1a853b2d9474c4ccd6d6789bcddd5378b3d1254 cifs-utils: remote_url: https://gitee.com/src-openeuler/cifs-utils.git - version: 1deaa53eab302b3e09a531d43a24dd80dfb2c500 + version: 54cc29ebcf9f404f234628f8ced458bc601ef152 cjson: remote_url: https://gitee.com/src-openeuler/cjson.git - version: a561a6bf3107b740460ca2fe34a99e85d717de5b + version: 34491e8794049468ecb363b31f881c0451a376c4 class-loader: remote_url: https://gitee.com/src-openeuler/class_loader.git version: b1fc3bcb36b3500a92928a1dbe427d864ba40ed9 cmake: remote_url: https://gitee.com/src-openeuler/cmake.git - version: 2e6d9fe88b0a8e771e6cbb06e60d1addecf77fde + version: 622b8e7b0a0b39a6da9bbc5c17961097297317bf + cni: + remote_url: https://gitee.com/src-openeuler/containernetworking-plugins.git + version: 294fe8e1a59733d52e4d40e7a764adc9d7067fc8 common-interfaces: remote_url: https://gitee.com/src-openeuler/common_interfaces.git version: bb60551495b12a4667b92e98e61d8043223f8ee5 commonlibrary_c_utils: remote_url: https://gitee.com/src-openeuler/commonlibrary_c_utils.git - version: 58a9594d729757e39b34a60a759d0d63b68597d7 + version: 52667b44ab8a6e20b5b8a28c09b3f747c1f3088c communication_dsoftbus: remote_url: https://gitee.com/src-openeuler/dsoftbus.git - version: 957407147b736aff977bf2a82cb84161f5534b5f + version: 9260f94024ff7f93dc435650e7aa58b925a04057 communication_ipc: remote_url: https://gitee.com/src-openeuler/communication_ipc.git - version: 432601cd79c185d501a51d2ec777f00c886b80ca + version: 73973423aad68eea3ab1d0189510d02b9b83b30a communication_ipc_kernel510: remote_url: https://gitee.com/src-openeuler/communication_ipc.git - version: 00f9bedc6e106801724f572418d49f47dff9880e + version: 73973423aad68eea3ab1d0189510d02b9b83b30a + concurrencykit: + remote_url: https://gitee.com/src-openeuler/ck.git + version: b7c694d5de6abb7058149e383a1bb37b42e83592 console-bridge: remote_url: https://gitee.com/src-openeuler/console_bridge.git version: 84731d81f62be875e0902f205a46e044824d225b console-bridge-vendor: remote_url: https://gitee.com/src-openeuler/console_bridge_vendor.git version: 868d21c5ec4bc10c5abb2145f04e9347df2f70a9 + core-secdev-k3: + remote_url: https://git.ti.com/git/security-development-tools/core-secdev-k3.git + version: ed6951fd3877c6cac7f1237311f7278ac21634f3 coreutils: remote_url: https://gitee.com/src-openeuler/coreutils.git - version: 370f0f479ffd10c8a37204b1543b81676eaef7c5 + version: bbdd3ae330b860cd4651803cb98d555af9b0b626 cpio: remote_url: https://gitee.com/src-openeuler/cpio.git version: 1bc7aba047c36abb53c5e0961384708c4f8cd4fa @@ -224,28 +266,37 @@ manifest_list: version: 455f917dd1ace72a46c339715013ad5f4d7909e5 createrepo-c: remote_url: https://gitee.com/src-openeuler/createrepo_c.git - version: 4cdeb7edcef9d37baa13f3f527cd100aea19de03 + version: 62eca99a77b97288d2c39d771df6f76bceaf9335 + cri-tools: + remote_url: https://gitee.com/src-openeuler/cri-tools.git + version: 2f1263c9e02bdd4287d3062f8b16f67bfbb35e4d cronie: remote_url: https://gitee.com/src-openeuler/cronie.git version: 840de45f563e75c1c945789eb79cab360c01c807 curl: remote_url: https://gitee.com/src-openeuler/curl.git - version: de55ffc96540a5e5c02736529484f79c4af38911 + version: 1c0874b674c299ffc16befacb4d8161e4d06c82b cyclonedds: remote_url: https://gitee.com/src-openeuler/cyclonedds.git version: f27e645561d9f09569cc06be645b99f5d60a476c dbus: remote_url: https://gitee.com/src-openeuler/dbus.git - version: 5e79758b2c7acab38e9e78deeda68420efa0314f + version: 5ba60914b1f18e27511b889020a41f0afce33ebb + dbus-glib: + remote_url: https://gitee.com/src-openeuler/dbus-glib.git + version: 7cab46164e5c0398ae28a71de50eef4c427eebf8 debugedit: remote_url: https://gitee.com/src-openeuler/debugedit.git - version: c110f5e42ffe588b3bd1c0699a5326c8fe3c3966 + version: a68327ce246c8c6dca05bbbda1b0c6725c14d166 demos: remote_url: https://gitee.com/src-openeuler/demos.git version: 5fa8de46c1a01b39d2964f77641b58f7527b0335 + desktop-file-utils: + remote_url: https://gitee.com/src-openeuler/desktop-file-utils.git + version: 58285f451c80a5d9e4c8ea4d69dbaa77446b76fa dhcp: remote_url: https://gitee.com/src-openeuler/dhcp.git - version: 6b80e70032c07dee899a724006816ef5fb828511 + version: 40cae76e59c41ad41c255e6bb647178417ed63b7 diagnostics: remote_url: https://gitee.com/src-openeuler/diagnostics.git version: 09f0fa3d874a278bff6f3df60a4bf634d9b7ed9d @@ -257,16 +308,16 @@ manifest_list: version: 40e556c1c06c20bc6edbe021cdf5849b3c5de606 distributed-beget: remote_url: https://gitee.com/src-openeuler/distributed-beget.git - version: f44bbf33be8ad38b877ad6db64419751cab5b42d + version: 103c761af3aa2d810a11763d963cb76473cefea8 distributed-build: remote_url: https://gitee.com/src-openeuler/distributed-build.git - version: 53795a2583546f46fabe5b599d24a75cd4e737db + version: 1da8fd9043f9ce373522d8683d8712ed039e52f4 distributed-build_lite: remote_url: https://gitee.com/src-openeuler/distributed-build_lite.git - version: 508a2221e1dbac5ade594c7af7c803eaaf9df69d + version: b37c8e53bfd636e803fd03d750c723626a6d4fb3 dnf: remote_url: https://gitee.com/src-openeuler/dnf.git - version: 76a2bab20a86ccc6e99659681f2940d3e4839101 + version: 58a40d649acc08882a9b0974ce582c2148e1d420 docbook-dtds: remote_url: https://gitee.com/src-openeuler/docbook-dtds.git version: 1d6138ed1971899ed8e63bc80f34bd70778b0d43 @@ -275,10 +326,10 @@ manifest_list: version: fefaec31b897212833f12b45d982b8e12413b40c docker: remote_url: https://gitee.com/src-openeuler/docker.git - version: 24a013689963a13c2235162cdeb7c8d7f04d8229 + version: e1f82024485da3f09f4f39bcfc6eba4cb570f2ee dosfstools: remote_url: https://gitee.com/src-openeuler/dosfstools.git - version: 09e7b7c3c56a8173fc192b094a7da4ecaa88506a + version: 25e6d67a02b98ded2f52b765e27fdae9d582edd1 dsoftbus: remote_url: https://gitee.com/src-openeuler/dsoftbus.git version: 861c7ba7e6906aa4c6059c362fd326bda640b0ea @@ -287,10 +338,16 @@ manifest_list: version: e2669305d57d3874d8b14d3c439f974cd1f4258a dtc: remote_url: https://gitee.com/src-openeuler/dtc.git - version: 6228946dca68ac42dbfb32ce6d66f97626d6973a + version: 882d8949c3d318c6bdb048b4f66ce57c366d614f e2fsprogs: remote_url: https://gitee.com/src-openeuler/e2fsprogs.git - version: 64d0e59dbda6fd2a672defe52787de7b84df056d + version: a37390d3e539125c466ca62c2ab8271f8ffabe2e + efibootmgr: + remote_url: https://gitee.com/src-openeuler/efibootmgr.git + version: bb9532bb4154f8fc01e205eebed81d7aecc78613 + efivar: + remote_url: https://gitee.com/src-openeuler/efivar.git + version: 08ab9250f76998bb1026130524bac293553678be eigen: remote_url: https://gitee.com/src-openeuler/eigen.git version: 6784f7f0ac02f51749168935f31c4f8302ff2cc2 @@ -299,40 +356,64 @@ manifest_list: version: 110f9252640b50adf49d2e8825d13905782151e5 elfutils: remote_url: https://gitee.com/src-openeuler/elfutils.git - version: 301b3ab4e1e5a281b2fd7837f1586c33696e8556 + version: 4682e18c66b686e66599cf5a3e0f33e58b2209db embedded-ipc: remote_url: https://gitee.com/openeuler/embedded-ipc.git version: 1e05e78e3d82fb2ef39e08a9e6fb3ca1cd918fcc + entity-manager: + remote_url: https://github.com/openbmc/entity-manager.git + version: b0c7bd18c20983a565c21e1921d647132329f789 ethercat-igh: remote_url: https://gitee.com/src-openeuler/ethercat-igh.git version: d117d0caba507895d0a8be5ade71f1b43fa470cb ethtool: remote_url: https://gitee.com/src-openeuler/ethtool.git - version: 9327e774a9897d94502470da7ad2c1f20cb91ef9 + version: 1df020430a8a354dd4a7f95dbb3c355b58268a93 + eulercar: + remote_url: https://gitee.com/HiEuler/eulercar.git + version: f2082f092f934004c589a5ca97814f85f831ee98 + evtest: + remote_url: https://gitee.com/src-openeuler/evtest.git + version: 5a8f258cc4d65805faf38523d30773fb861ba18a example-interfaces: remote_url: https://gitee.com/src-openeuler/example_interfaces.git version: 440bb2d5a42cb5287310bb1abeced370bb46cb52 expat: remote_url: https://gitee.com/src-openeuler/expat.git - version: fbd79d907d6fb20531b1b5609c3c1cfe0b5f5e14 + version: bc9921d24c5828e143079bf1827754d8405c3d98 expect: remote_url: https://gitee.com/src-openeuler/expect.git - version: b7b3ccafe43f87dacd94b4115ee9684f4d1e7fa0 + version: ccfedc2f07c598f74668b8a41163657bc97fbb40 externed_device_sample: remote_url: https://gitee.com/HiEuler/externed_device_sample.git version: 214b141012a550d8ba2ed5d92bcdaad71e124a2b + ffmpeg: + remote_url: https://gitee.com/src-openeuler/ffmpeg.git + version: 320490bce475847ce95658127c33800e52339eb8 + fgl297-fw: + remote_url: https://github.com/MYiR-Dev/myir-firmware.git + version: 65cbd809d32906c17c55ece3591be60e8c878735 file: remote_url: https://gitee.com/src-openeuler/file.git version: 438915eda3a73438efdaadceee8aa6bf8fe84f76 findutils: remote_url: https://gitee.com/src-openeuler/findutils.git version: 67a6e3bc8505206cd379cd625cf7224faf75ed1d + fiptool: + remote_url: https://github.com/renesas-rz/rzg_trusted-firmware-a.git + version: aed3786384b99dc13a46a8d3af139df28b5642a3 + flac: + remote_url: https://gitee.com/src-openeuler/flac.git + version: 5f11ed0d08fe03b1792000de70ebfaf015f42268 flann: remote_url: https://gitee.com/src-openeuler/flann.git version: f313e9dd5cf2fcfe6898ae2d41e1e15452c6b807 + flatbuffers: + remote_url: https://gitee.com/src-openeuler/flatbuffers.git + version: 482e2ea3dc95339111ce48e1f4ae1ac646ad07b3 flex: remote_url: https://gitee.com/src-openeuler/flex.git - version: ced324939696f2ff79dfad768ecf4f00a265fa31 + version: feb003bbcc8e0b47669ae5d2aa26c142b433dd36 fmt: remote_url: https://gitee.com/src-openeuler/fmt.git version: f006cf1ac9ed241947c44deda0e408f203b960b2 @@ -359,14 +440,14 @@ manifest_list: version: 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https://gitee.com/src-openeuler/gnome-themes-standard.git + version: 582d717ff65e3b13219019f5def4e9a73e039ac6 gnu-efi: remote_url: https://gitee.com/src-openeuler/gnu-efi.git - version: 51e73aed4f750fb8af13f577865b02e567fa7d08 + version: b574829474d2cdae7404e49dfcd19e6a56056e8f gnupg2: remote_url: https://gitee.com/src-openeuler/gnupg2.git - version: bc0a18eb30f92c3435551ec2a48e2706f730d1c8 + version: 8e100984ef99db540e6114049b71e43539c4ec52 gnutls: remote_url: https://gitee.com/src-openeuler/gnutls.git - version: b933a7630cde399e8b3541ec74605c7a04e93130 + version: 133781f2d2d25c627588de0ecf3ec494709171b0 gobject-introspection: remote_url: https://gitee.com/src-openeuler/gobject-introspection.git version: f5f15680edc6b3edf75e2fe64a9cf40874d13327 @@ -420,48 +504,54 @@ manifest_list: gperf: remote_url: https://gitee.com/src-openeuler/gperf.git version: e799fea4206121bc1d670c028e370b7eeee503c6 + gpgme: + remote_url: https://gitee.com/src-openeuler/gpgme.git + version: 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gsettings-desktop-schemas: + remote_url: https://gitee.com/src-openeuler/gsettings-desktop-schemas.git + version: 18864c8de8bb05085ea26ce0e182c9ef0b5c11cb gstreamer1: remote_url: https://gitee.com/src-openeuler/gstreamer1.git version: 32f35eee65c402a8b206e7716f5a50ee6fd7a1b3 gstreamer1-plugins-base: remote_url: https://gitee.com/src-openeuler/gstreamer1-plugins-base.git version: b0b81a3c0f0b20080937856faca561b57c29017a - wqy-zenhei-fonts: - remote_url: https://gitee.com/src-openeuler/wqy-zenhei-fonts.git - version: d7370cdb445562ea66214e3816e36426d0ab6bfb + gstreamer1.0-plugins-bad: + remote_url: https://gitee.com/src-openeuler/gstreamer1-plugins-bad-free.git + version: 968e951ab23be576485605038b74c174fcb711cf gtest: remote_url: https://gitee.com/src-openeuler/gtest.git - version: f8102d6e33bb3437652b612e0c9dcd178cf0e4f8 + version: 214f7894576a54cb8b00e83f20d37ce2aea0326b gtk+3: remote_url: https://gitee.com/src-openeuler/gtk3.git - version: edba6fa0fab56a21cf1bed35b7b8a5aa6a963b83 + version: 40f2da2876faaffaa8320079baccdeb015467530 gtk-doc: remote_url: https://gitee.com/src-openeuler/gtk-doc.git - version: f96ea737e2e6d6a6059ebda921f905ec0fa3272e + version: d3650c4543e5a64cfc68a1736010a001942f85e0 gtkmm30: remote_url: https://gitee.com/src-openeuler/gtkmm30.git version: d1e749193ddcbad38de84a528afc8b9cf3c79491 gzip: remote_url: https://gitee.com/src-openeuler/gzip.git - version: 3e9b07936f607848af1fb4ebf4de2bf572fbb943 + version: 3af3feaa00e037b10b4b3c7138973834c6a29411 harfbuzz: remote_url: https://gitee.com/src-openeuler/harfbuzz.git version: 54f90bf4e76e8747aeb859181e73f7c302b7f8c9 @@ -473,7 +563,7 @@ manifest_list: version: b7b045f6c916385216bd12f53fe2ae7ac5d9bbc0 hicolor-icon-theme: remote_url: https://gitee.com/src-openeuler/hicolor-icon-theme.git - version: 0632b52bf2b11381dabd58c65511a92fafe90272 + version: 120bef2ad03f6cdd5417383d9de0bb6ff8d6a79d hieuler_3rdparty_sensors: remote_url: https://gitee.com/HiEuler/hieuler_3rdparty_sensors.git version: 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https://gitee.com/src-openeuler/hwdata.git - version: 138c55c5851cc05fd2801b4d2aa3bc808d80d949 + version: 90b4f0aef05c2ff8cfe4db5d1cf2736484db89ac + i2c-tools: + remote_url: https://gitee.com/src-openeuler/i2c-tools.git + version: 7bd44caa2557da2ac039f1819015f78b4c8571d8 iSulad: remote_url: https://gitee.com/src-openeuler/iSulad.git - version: 14b36aab80159d1671a9e0302fd80b215efe8f45 + version: 8fb10803b7da72d4c1b54bf023672cb9114d9ff5 iceoryx: remote_url: https://gitee.com/src-openeuler/iceoryx.git version: f266b0c491e9409455b467483f405ce16c15b6ee icu: remote_url: https://gitee.com/src-openeuler/icu.git - version: 14be2935b972b9dfd754f1e64ecdf763db232ba3 + version: 9d9128853e7f545bbcb6a6fcee28d61987f1ecb6 image-transport-plugins: remote_url: https://gitee.com/src-openeuler/image_transport_plugins.git version: 0104c9d73f07f2d1459f690612cc8decc93b9852 @@ -540,12 +630,18 @@ manifest_list: intltool: remote_url: https://gitee.com/src-openeuler/intltool.git version: 31f92e4f2a8031e585faf75afce0a157feb694b6 + iozone3: + remote_url: https://gitee.com/src-openeuler/iozone.git + version: 8a4f9ba59fd00b7a737df5b37fd43ecc19784d8e + iperf3: + remote_url: https://gitee.com/src-openeuler/iperf3.git + version: 593392e1333e09635dc769590d7b63773bc0da05 iproute: remote_url: https://gitee.com/src-openeuler/iproute.git - version: c8f6f13e1f9fa221732c8d3cf19e71a49660583d + version: d56da07c80afd33c1e5a630c711ac615f8101f94 iptables: remote_url: https://gitee.com/src-openeuler/iptables.git - version: e9d47d9c1f7dee5f0d1f2a4ea941814973750d16 + version: c4a6a13233d7eef46b0e2ff3e4744bf9eb41d4c1 iso-codes: remote_url: https://gitee.com/src-openeuler/iso-codes.git version: 53957185b56c3395450c7780856d8288181d4822 @@ -558,24 +654,36 @@ manifest_list: joint_state_publisher: remote_url: https://gitee.com/src-openeuler/joint_state_publisher.git version: 71b57b4bf4ba8ae50e0e28b7f5c63d2bc74c0fe3 + jsnbd: + remote_url: https://github.com/openbmc/jsnbd.git + version: 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d8e3bcbbecf8a817454c3bc203c03372108d38dd kernel-5.10-tag3093: remote_url: https://gitee.com/openeuler/kernel.git version: db10ed58a16829ef170657df0abb7d6ef6f69c5e + kernel-5.10-tag626: + remote_url: https://gitee.com/openeuler/kernel.git + version: d8e3bcbbecf8a817454c3bc203c03372108d38dd kernel-5.10-tag928: remote_url: https://gitee.com/openeuler/kernel.git version: b88a0de017d1685cc7e2c623d6ccccde546d8405 @@ -587,7 +695,13 @@ manifest_list: version: 9e23d217271f05919ca26d3e6677dac075c3ab1e kmod: remote_url: https://gitee.com/src-openeuler/kmod.git - version: 0ca540a2079a7ebc9b1ef57e5ccebbe15540a56f + version: b663f34259f5dd732b48638e4d3ae86c6227c0d9 + krb5: + remote_url: https://gitee.com/src-openeuler/krb5.git + version: 79a8cf0f3c2c0e9262f6c7c2b1e0a2105b166c0e + kubeedge: + remote_url: https://gitee.com/src-openeuler/kubeedge.git + version: 8ee6a2fb2d5d9b740a74dba965337bb5668a3bb8 lapack: remote_url: https://gitee.com/src-openeuler/lapack.git version: 42dccb0264b74cbca044be413e7df2fc2f1c2700 @@ -602,13 +716,13 @@ manifest_list: version: 2bd59ef02cca6cf750ee84cefaa3ed86d31c55e2 lcr: remote_url: https://gitee.com/src-openeuler/lcr.git - version: b2b90f41c3f9c75a0246f63b34d938c3aec418c3 + version: 93ae5ec8240ca95743e6210461d2f2500d9968b9 less: remote_url: https://gitee.com/src-openeuler/less.git - version: a48f6c96a9b5e511f7dce9382abf3383131d81d5 + version: 2ff8d8a32629d508797c5e9a9c24c516abd88ed0 lib-shim-v2: remote_url: https://gitee.com/src-openeuler/lib-shim-v2.git - version: bfb577fcea3eea8bc1953341f50e296d234ff579 + version: 9ac0a3345303ab6dd7e0fd032841312ee4c03302 libICE: remote_url: https://gitee.com/src-openeuler/libICE.git version: 74380d84ba63919092558ab2f1cd5efd1b3cc168 @@ -626,7 +740,7 @@ manifest_list: version: baf5ddee9205d792e0a6462d00da65fb0d3c5d5c libXcursor: remote_url: https://gitee.com/src-openeuler/libXcursor.git - version: b18c9901885503bcc870680246c92ebb5dd9a2de + version: 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https://gitee.com/src-openeuler/libcomps.git - version: ba528fe723a61dbccc67f557b7566318c3e4193d + version: 4b75dce7c2a9207bf66bca50470fad0b5f9908fa + libdaemon: + remote_url: https://gitee.com/src-openeuler/libdaemon.git + version: c966cd39b1dfa7c5f67791ddf1547a2a2f9352e5 libdb: remote_url: https://gitee.com/src-openeuler/libdb.git - version: 165753341b2edd118d1f4710796ee4764cc84526 + version: a6ded58230012e08e147ffe13066ed627afb4a31 libdnf: remote_url: https://gitee.com/src-openeuler/libdnf.git - version: dbdd44d32b0afe228ccbdefad1582681cbefa066 + version: 5d90b8b2bc69be335f0d6a679a3deb018ed0f302 libdrm: remote_url: https://gitee.com/src-openeuler/libdrm.git version: 0ab4c2c0087f19ebe312972480b7955cceb32241 + libedit: + remote_url: https://gitee.com/src-openeuler/libedit.git + version: 3b16fb128c1d1afce6bb6e71eeb8a94c77140e00 libepoxy: remote_url: https://gitee.com/src-openeuler/libepoxy.git - version: e6fdb31b3ae0d256e9237f34706f2d27b60b4e42 + version: 957209a8d94001a5f056cc8ef8048151fc8063be libestr: remote_url: https://gitee.com/src-openeuler/libestr.git version: 57a0491cddae78af79c93af543153d2e147a8b08 @@ -710,10 +833,13 @@ manifest_list: version: 53f70c04a682100257b6e96434f7df62c479d79b libevent: remote_url: https://gitee.com/src-openeuler/libevent.git - version: dcbcfe5000cdf0de8cc02ebf8815a6932fbdfbc6 + version: ea1e99444d0739a0c1a8e23e4efeb54f3a64fd0c libevhtp: remote_url: https://gitee.com/src-openeuler/libevhtp.git version: 3650a108166e68545165a8180e5779d8df4b36ec + libexif: + remote_url: https://gitee.com/src-openeuler/libexif.git + version: 911ea625291a47339454ee5ecd6b3d4a255c79b0 libfastjson: remote_url: https://gitee.com/src-openeuler/libfastjson.git version: 41ebc2ca827fedd1335c72cea7b520c4aa4b8cd2 @@ -731,7 +857,7 @@ manifest_list: version: 450ab6d51f0eb8ccd5e86b3ffec4b1f6a164423f libgcrypt: remote_url: https://gitee.com/src-openeuler/libgcrypt.git - version: b91aad889ade1355ce805e6fd082bcd2c51f6ab3 + version: aa31f9c7eb7f7dbe75f0a0e6871af15a4d897434 libglu: remote_url: https://gitee.com/src-openeuler/mesa-libGLU.git version: 3cd50132c28c1b19dd4d6a76e03d31c0827bc9cf @@ -741,9 +867,12 @@ manifest_list: libgphoto2: remote_url: https://gitee.com/src-openeuler/libgphoto2.git version: 6f5dfa9ea13cbe1e5ffc393950c434d1c1e2c067 + libgudev: + remote_url: https://gitee.com/src-openeuler/libgudev.git + version: 6df6707a279bb54b42468fc3b40b44d151329991 libical: remote_url: https://gitee.com/src-openeuler/libical.git - version: 405eda4174df465070a4dc371ea366dd35d5fb98 + version: e67978ee4d3ceb62d5054fd0014d9aa37503fc57 libidn2: remote_url: https://gitee.com/src-openeuler/libidn2.git version: 8b1e9bcc5a601a00665d30f28b08f44ba2790de5 @@ -752,13 +881,16 @@ manifest_list: version: e1e1f9d7ae17a65ddd4bb5bb87645e2a3624730f libjpeg-turbo: remote_url: https://gitee.com/src-openeuler/libjpeg-turbo.git - version: 29d704a7f16c463915948135a19746549281998f + version: 0383f7bf8ca707b48efce284b36f2c5f9377df9a libksba: remote_url: https://gitee.com/src-openeuler/libksba.git - version: 6c7097cf0337d973d686cdba0ad549472c83dcec + version: fc6915999915a72b656a30ff33eeada59ceaad25 + libmd: + remote_url: https://gitee.com/src-openeuler/libmd.git + version: ce0d328fbfbbbb1157f919eddb7a49c93a2c9719 libmetal: remote_url: https://gitee.com/src-openeuler/libmetal.git - version: 67eca7e36e674a647b317c341afdbe11557b7fad + version: 69e96d9620652df428ec7f4faca92f70cce111d3 libmicrohttpd: remote_url: https://gitee.com/src-openeuler/libmicrohttpd.git version: d565a146f6efe6a7799154478a8fd990d79e5865 @@ -776,7 +908,7 @@ manifest_list: version: dcf4a81785d42aa8b64de50dceb21b7e9211fb5a libnl: remote_url: https://gitee.com/src-openeuler/libnl3.git - version: c33045b9b66c20f25f4cff932e522b9df2d53e6b + version: d70c47398d6caba6961de570cd542731544b2ec9 libnotify: remote_url: https://gitee.com/src-openeuler/libnotify.git version: ed89889617327c5dafe6b1058269119cd8ea3bfe @@ -785,10 +917,13 @@ manifest_list: version: 9a8b85c3bbd12f92b2f60bce78e90e0704fc7921 libogg: remote_url: https://gitee.com/src-openeuler/libogg.git - version: 4541713ab2d7f47f75ed21c42914a12e144bf853 + version: d5ba46c6c5ef0506389e504877164b150c7b55e8 + libopus: + remote_url: https://gitee.com/src-openeuler/opus.git + version: 0ce92ca5d1b514da1d138d1242b45f3fb1384ae1 libpcap: remote_url: https://gitee.com/src-openeuler/libpcap.git - version: 7f96009de3da35064f32b4648bb1d0d4cb505357 + version: b525058841ece5f34174c70078440267f6460f83 libpciaccess: remote_url: https://gitee.com/src-openeuler/libpciaccess.git version: a3c7f279cde8f65e808e0fc3b2fb05b96e318557 @@ -797,37 +932,40 @@ manifest_list: version: 894443bf11fd9361e63f154d92d6c01bb22093f2 libpwquality: remote_url: https://gitee.com/src-openeuler/libpwquality.git - version: 659e1cac750cf45f5cdfc4afe231eb3e96dd65a7 + version: c2af6ddfb4e574ba74a552372f6a036f26e4f9d6 librepo: remote_url: https://gitee.com/src-openeuler/librepo.git - version: dee4679beafbabc573a0543bb85d45d27d15aa03 + version: 6cac0468029e348d7e6c020538f7d4862765023b librsvg2: remote_url: https://gitee.com/src-openeuler/librsvg2.git - version: cd956459b96e405dff4a4155f92d1944f130a673 + version: 93f05e6ae5276dcc700eae68c67fad8a0f269a96 + libsamplerate: + remote_url: https://gitee.com/src-openeuler/libsamplerate.git + version: bf87e0292caa945e6b3d08148904c21877a56daf libseccomp: remote_url: https://gitee.com/src-openeuler/libseccomp.git - version: 14ac05d08e028a8769e78dc5b6c56552eaa43a80 + version: 0662086c0b75ae354f0c3488b12fc008b1cbcb18 libselinux: remote_url: https://gitee.com/src-openeuler/libselinux.git - version: 2348cc687f87fb933be48a91b7127c75874d5aa5 + version: ec69384c70807cd21b4f08ba11f1765abecbc276 libsemanage: remote_url: https://gitee.com/src-openeuler/libsemanage.git version: ac87612eeff0fbf90c5f0bdfb8f9c3abc5fc524e libsepol: remote_url: https://gitee.com/src-openeuler/libsepol.git - version: e8259bdf0567894fbb4bde791da0e92e4d7bfebc + version: 69dd5a4b41ad9c95018775a84fb806f4e138db9f libsigcpp20: remote_url: https://gitee.com/src-openeuler/libsigcpp20.git version: d01c42208d06000f2c6cc419a5fa0147230d384b libsndfile: remote_url: https://gitee.com/src-openeuler/libsndfile.git - version: f9bbe42a33d8a7113ebcd061a9d95482cd045a27 + version: a0413ce31134aa16dcf4b87eec7d382ef2523a36 libsodium: remote_url: https://gitee.com/src-openeuler/libsodium.git version: a746caf380ff3561ea0b10ee1aec7387e6ed47bc libsolv: remote_url: https://gitee.com/src-openeuler/libsolv.git - version: 5332e19c34fbdfcf89a4f8de3a884968fa90cb59 + version: 7217e80a450c56e549c5c38594083f0e1b091efe libstatistics-collector: remote_url: https://gitee.com/src-openeuler/libstatistics_collector.git version: 29c561743c9985756494385f56e94fcf9f8e7745 @@ -839,7 +977,7 @@ manifest_list: version: 09519f6d0a7017a132dd212c311bee3201b386e3 libtirpc: remote_url: https://gitee.com/src-openeuler/libtirpc.git - version: e2b90a69bae13777edd446094de2e1ba4e4a5f5a + version: 9e9abd356a350e6646cfba4c82984f434a23e4ed libtool: remote_url: https://gitee.com/src-openeuler/libtool.git version: 5363da05081f04e46c52d11a6f33bb4b29f0222d @@ -848,7 +986,7 @@ manifest_list: version: d68e5a14a0ac44bf02b5dd2041e21f0fff849a47 libunwind: remote_url: https://gitee.com/src-openeuler/libunwind.git - version: bb7cafedfe47bc6197a79d4392633d327998df8a + version: 8c23922d2944eeabd16e610bab76bb479ad7244e libusb: remote_url: https://gitee.com/src-openeuler/libusb.git version: c478c9968d122f4d6456fbfd62d2f6444b8023f4 @@ -860,22 +998,28 @@ manifest_list: version: d73ec168ed651ca0943846b9ce9e5d7e20d20166 libuvc: remote_url: https://gitee.com/src-openeuler/libuvc.git - version: 3b41da89cf8730beebe7160810637295bf167d94 + version: b7380f6336cc0737e69e759fca9806ddc73b144e + libvarlink: + remote_url: https://gitee.com/src-openeuler/libvarlink.git + version: 4e8682d0644a4d9c08dd4b35bc7028d6c3a71a9a libvorbis: remote_url: https://gitee.com/src-openeuler/libvorbis.git - version: 3c57b6bdec7b52ef1048f5fda9db28bc8f7fbb89 + version: 2647a4ecc2acd233f3a0233c0f7919ce1fa66c71 + libvpx: + remote_url: https://gitee.com/src-openeuler/libvpx.git + version: fb1c548fbdf9e8731aa4d3907ad73f9aec8da97f libwebp: remote_url: https://gitee.com/src-openeuler/libwebp.git - version: e6d496bd520947cdae7e8677b7c4186952a6f899 + version: 87d14559fe55fddd99020456ec44e675bc87d59d libwebsockets: remote_url: https://gitee.com/src-openeuler/libwebsockets.git - version: b6bb23cb9cc8c091d8569f7aefa9dee9f6562fc3 + version: ac5a62f7cfd750ef9a25db9abf5cc928410f33de libxcb: remote_url: https://gitee.com/src-openeuler/libxcb.git version: fd63b258b0d892f556e67e770dbfecc498647360 libxcrypt: remote_url: https://gitee.com/src-openeuler/libxcrypt.git - version: 10169398b3de189413c57672320ec8c3812904b2 + version: 5ab42945e82f759d2ed114453c33ced5b8581a76 libxcvt: remote_url: https://gitee.com/src-openeuler/libxcvt.git version: 0c4a236f854f9de32b244fee90e6a4abefa32370 @@ -893,16 +1037,19 @@ manifest_list: version: dd76c83b28cc18cb237fbbb9d5e82e38dd2a7cbc libxslt: remote_url: https://gitee.com/src-openeuler/libxslt.git - version: db42532c157193cbfca526e4479b32a06d64b6a1 + version: 2839c0df41ddd3201f3d428d578e88945ed1076b libyaml: remote_url: https://gitee.com/src-openeuler/libyaml.git - version: 1a480cfae91f34f27c37515a2a6505259edd4fe5 + version: 2ea62abe5c4fc030316fa519f719b8ba6f676a2d libyaml-vendor: remote_url: https://gitee.com/src-openeuler/libyaml_vendor.git version: 46a70933aacf88b21c2e8b580ec341e5e3e70ff7 linuxptp: remote_url: https://gitee.com/src-openeuler/linuxptp.git version: 6a8996e8a8dfc38bfe3ad0538784d915c38cfd50 + linux-firmware: + remote_url: https://gitee.com/src-openeuler/linux-firmware.git + version: d81b61811a2d8d15c33df4f895e5377a008ebd92 logrotate: remote_url: https://gitee.com/src-openeuler/logrotate.git version: 13407db945b491e79d49dd62c41c5bc8cd4bdf02 @@ -914,10 +1061,13 @@ manifest_list: version: 408157072df6247803dc33800d2e1177085d276c lua: remote_url: https://gitee.com/src-openeuler/lua.git - version: 37f5c7182704871d7a288ee4652acdd7f31c4844 + version: 3f54e146b7bea9a622b18f91b40ecde41d54e3d6 + luajit: + remote_url: https://gitee.com/src-openeuler/luajit.git + version: 495b12677282ca2a472eaaac05527eafafe2137a lvm2: remote_url: https://gitee.com/src-openeuler/lvm2.git - version: 8340149fcb0a0cd07e6f06664eaa02d61cc6a803 + version: 91ab636d6619e1fda0ac835eddea3df2b23698c8 lxc: remote_url: https://gitee.com/src-openeuler/lxc.git version: 00993408ce91ee4903a36bf5f6acb914cd5ab414 @@ -935,13 +1085,13 @@ manifest_list: version: 8e40d78a055154422a09db2f57283e01234c0d70 lzo: remote_url: https://gitee.com/src-openeuler/lzo.git - version: 3b29688d8d4d7375118ccf78acd7c6e6f1f0cbda + version: dab2017ec120543ee27bea93d19cfaefe0309723 lzop: remote_url: https://gitee.com/src-openeuler/lzop.git - version: f843fa70fb62d1c8589a31bc13bfefb66798899b + version: c08bc178d4c1bd805bea37e2aa5b18e8ed63c9d5 m4: remote_url: https://gitee.com/src-openeuler/m4.git - version: 6d99588db478ab56965bd2d8eba574e607353596 + version: 5c8f6179f1d1fd4765d0dc4b3b309c4fd3c61618 magic_enum: remote_url: https://gitee.com/src-openeuler/magic_enum.git version: 0910a1c3f045dc69c1e84afd99e94493a9a7e166 @@ -981,6 +1131,9 @@ manifest_list: mm-common: remote_url: https://gitee.com/src-openeuler/mm-common.git version: abdd168a786f299ed4655baa7227c8b4b90dddaa + mosquitto: + remote_url: https://gitee.com/src-openeuler/mosquitto.git + version: dbc7c87118e8a20306ee28fe7b13f7315bc2a124 mpfr: remote_url: https://gitee.com/src-openeuler/mpfr.git version: 69aed19ee2f65a401a5fc2a151f0a57721bf9326 @@ -993,6 +1146,24 @@ manifest_list: mtools: remote_url: https://gitee.com/src-openeuler/mtools.git version: 48992f21a953d8c0720b93ed98fb5f2ea40f84a5 + myir-renesas-flash-writer: + remote_url: https://github.com/MYiR-Dev/myir-renesas-flash-writer.git + version: 8cd973992da7cdc8646a498b81d1a1e4e9f74f20 + myir-renesas-linux: + remote_url: https://github.com/MYiR-Dev/myir-renesas-linux.git + version: d795edc9d0ce69f4ff1ac914a7668f043d444cce + myir-renesas-tf-a: + remote_url: https://github.com/MYiR-Dev/myir-renesas-tf-a.git + version: 1308cc5eb85aa67f5e29241e99c21d7e1b27c913 + myir-renesas-uboot: + remote_url: https://github.com/MYiR-Dev/myir-renesas-uboot.git + version: 75dee8f1759d6b3b140aa42486ad39a7113903ef + myir-ti-linux: + remote_url: https://github.com/MYIR-TI/myir-ti-linux.git + version: 491c4beebcb1bac77be5954016a190ffceed0cb6 + myir-ti-uboot: + remote_url: https://github.com/MYIR-TI/myir-ti-uboot.git + version: f4e7b03f15da6cd88d31d29a2b9b7e0812534554 nasm: remote_url: https://gitee.com/src-openeuler/nasm.git version: e8f11304d13859972ca586f66e1fc8e132c15a7b @@ -1007,52 +1178,88 @@ manifest_list: version: 2752b605a689c8c9fd4b4a84fceddb493cb4ae71 net-tools: remote_url: https://gitee.com/src-openeuler/net-tools.git - version: cfc169b5e1eb70d6d2e438f930dafb31a751989d + version: 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016883081c4dcf4a2040af8c5713c686db0adb81 notification_eventhandler: remote_url: https://gitee.com/src-openeuler/notification_eventhandler.git - version: 79ab1aa495e5762f0e2b4efa6a15b80fad443808 + version: ecdbe4ae008d6d2b04be853df518f058016127f4 npth: remote_url: https://gitee.com/src-openeuler/npth.git version: 2b2a6b8090fa2a9a48f06594ace5070205d782de + nspr: + remote_url: https://gitee.com/src-openeuler/nspr.git + version: 50e24a6fab126e0426475b7cc1922a661e2871d2 + nss: + remote_url: https://gitee.com/src-openeuler/nss.git + version: 55b0f21a75fbe0b30b7f5addc5d8ef41b66b4061 + nss-mdns: + remote_url: https://gitee.com/src-openeuler/nss-mdns.git + version: 2e4d9ca8fb050b340bd06c04681a7adf42ea32fb + ntp: + remote_url: https://gitee.com/src-openeuler/ntp.git + version: 98a08ae8b050fd45830e6c6b3cb677f9b623f165 + numactl: + remote_url: https://gitee.com/src-openeuler/numactl.git + version: 43324c95441a7c701fc9dd7f004522fb2b44f034 numpy: remote_url: https://gitee.com/src-openeuler/numpy.git version: fd352a1771a247950a1df6abe72caa14f388b8c1 nxp-wlan-sdk: remote_url: https://github.com/MYIR-TI/wlan_src.git version: 42e783e24b0a018f81bb6c838ca7532862528a07 + obmc-console: + remote_url: http://github.com/openbmc/obmc-console.git + version: 397fd035e3adda2f3d36bfc5f2268372847778e7 + obmc-ikvm: + remote_url: https://github.com/openbmc/obmc-ikvm.git + version: a4f63b38f1e72a3c34c54e275803d945b949483b + obmc-phosphor-power: + remote_url: https://github.com/openbmc/phosphor-power-control.git + version: ca9aa00180423b548369a7485bbca641581cc1ab oee_archive: remote_url: https://gitee.com/openeuler/oee_archive.git - version: 6ddce35662576b12266aedc9c9f92fffaa7c7622 + version: 590fc58dde5ea174ec687850d46732b032aaa6c3 ompl: remote_url: https://gitee.com/src-openeuler/ompl.git version: 42759f06c9a8d712a5ba86f1f3b22a569ec81232 + open62541: + remote_url: https://gitee.com/src-openeuler/open62541.git + version: 6564947947abe265d86aaf10fe6fdc1a03fb89b9 opencv: remote_url: https://gitee.com/src-openeuler/opencv.git version: fc708b2571cce5e56554567b6e502fc6687170f7 openssh: remote_url: https://gitee.com/src-openeuler/openssh.git - version: fd34c4ef7f35f8451d3203132d8f13400be2b87a + version: 7bf431dcb12a2cdac5194b214c6fe54618da71c0 openssl: remote_url: https://gitee.com/src-openeuler/openssl.git - version: fe3837c2cfc7e4b63a0a9310dd29cbf1fc4afeee + version: 4a4c057500324ac29289b8bbd259201157063d4c + optee-os: + remote_url: https://github.com/OP-TEE/optee_os.git + version: 9b1d1cf0d63381c6d6a4d95ca2ac040834ad39e5 orc: remote_url: https://gitee.com/src-openeuler/orc.git - version: 10791eb57d0b51ceffe434d9947f32efc827e22a + version: a68514a55c0fce9fc0dd2a5f9702fd8fcd03edf1 originbot-v1.0.2: remote_url: https://gitee.com/guyuehome/originbot.git version: 131243414bedef367aeb21ffc89726f832c4f1fb @@ -1065,15 +1272,12 @@ manifest_list: osrf-pycommon: remote_url: https://gitee.com/src-openeuler/osrf_pycommon.git version: bb08858e213e6d5f278fdff847468af72a2c6eab - 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pciutils: remote_url: https://gitee.com/src-openeuler/pciutils.git - version: 1fab56ebf1e985ace041bd33d1359b856c832ea8 + version: 1faf62f4f755e484e03fb373dc39401319e48e12 pcl: remote_url: https://gitee.com/src-openeuler/pcl.git version: 17450c281a5da6a82bd560f469885f6b0cfbcce9 @@ -1103,25 +1310,82 @@ manifest_list: version: 6dc9453636c85242e9934a966229f62c03727ff2 pcre: remote_url: https://gitee.com/src-openeuler/pcre.git - version: b95755ab36823f62079d2c16df1f7d8de166a436 + version: 7a49d7de860d9fc3cedea1447267680d43c26ae8 pcre2: remote_url: https://gitee.com/src-openeuler/pcre2.git - version: efe48159ac9c005d8e680b0f29f745dccb98e3b6 + version: a206291df36849e289dd913e9187c961a7a5b88d perception-pcl: remote_url: https://gitee.com/src-openeuler/perception_pcl.git version: 8a82f8d7b0d66e4a88df8e582237672ccd2728f0 perl: remote_url: https://gitee.com/src-openeuler/perl.git - version: 8eb4a2f5a61842e236dc3d456ed68729054ed36c + version: 4403164af8f0cf35be0f672cd348195c68c2d53d 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586082f0fe18defe84ea3cc4aabf41368cc84cd0 + version: 51229322b2ebc86f3fa02200c7f6c4574486a8f4 + proj: + remote_url: https://gitee.com/src-openeuler/proj.git + version: 20cb0336176586dd2bc26bd9ff5a50b9b2521204 protobuf: remote_url: https://gitee.com/src-openeuler/protobuf.git version: 6b52811f580d75cf69ab4f64bfd766a89a11207a @@ -1157,7 +1424,7 @@ manifest_list: version: 12ec2ab73b3c990e5718224d86d1798a9c0dba42 pybind11: remote_url: https://gitee.com/src-openeuler/pybind11.git - version: c8e29afe1c64409c739925f6aae819a988f6f1f6 + version: 5698df62e3c3a3a111e057402aa30afe4935d0bd pybind11-vendor: remote_url: https://gitee.com/src-openeuler/pybind11_vendor.git version: b4c81cede7f1f551e9c0ad3da64ebed7166d334f @@ -1176,6 +1443,12 @@ manifest_list: python-argcomplete: remote_url: https://gitee.com/src-openeuler/python-argcomplete.git version: be39a75063bc7d135ffe220ab55409269117fd8b + python-atomicwrites: + remote_url: https://gitee.com/src-openeuler/python-atomicwrites.git + version: 11c4347339cb998201af161ea3146014a508c47f + python-attrs: + remote_url: https://gitee.com/src-openeuler/python-attrs.git + version: 4f3b44809131fca392bc1daedda76a21ebc66944 python-blinker: remote_url: https://gitee.com/src-openeuler/python-blinker.git version: ea4f9c448825469f94824af1ec9e0a575d3073b5 @@ -1188,9 +1461,15 @@ manifest_list: python-cmd2: remote_url: https://gitee.com/src-openeuler/python-cmd2.git version: 25157cd4e8525a74c0f41f9e5c05704858f95e79 + python-coloredlogs: + remote_url: https://gitee.com/src-openeuler/python-coloredlogs.git + version: 8526e9308cf764225090ef1ed9f333d30a7815cb python-dateutil: remote_url: https://gitee.com/src-openeuler/python-dateutil.git version: 80e646f088b5e3ef3333aa4c09b7b740c0c06763 + python-distlib: + remote_url: https://gitee.com/src-openeuler/python-distlib.git + version: 49f95e6713a820826986503ae3e03e52685c822a python-docopt: remote_url: https://gitee.com/src-openeuler/python-docopt.git version: 6de180c379485aa23cdb01054e27c0852ad0ec43 @@ -1209,6 +1488,9 @@ manifest_list: python-humanfriendly: remote_url: https://gitee.com/src-openeuler/python-humanfriendly.git version: 08a6f88833ba4f41057974c8fb7221ce2b1973bc + python-idna: + remote_url: https://gitee.com/src-openeuler/python-idna.git + version: b67cac8c9aecd4c0cf762d9935b643853a3242e5 python-ifcfg: remote_url: https://gitee.com/src-openeuler/python-ifcfg.git version: df7e953678ea5767a50f454923c78096dd6ccaf9 @@ -1217,16 +1499,16 @@ manifest_list: version: 840b49a1fa7d20225f9cc55ca641be635a68ada2 python-iniparse: remote_url: https://gitee.com/src-openeuler/python-iniparse.git - version: 7f933373d44b7df49933236aa77939542e95ce39 + version: c0d88e30a6aa064dd821d1887891cff8b3b93c7e python-jinja2: remote_url: https://gitee.com/src-openeuler/python-jinja2.git - version: 058d08c490cabb442bbabee6625c8b3053cc5686 + version: 8bbf17a9d8261fe4c98cbb406e6d83dca965f2bb python-lark-parser: remote_url: https://gitee.com/src-openeuler/python-lark-parser.git version: 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70c3c14161654bb60a2117cc70e15f072dbe3d83 + version: a5fcc1c0f9c6e586a799e800e6ddfebff1d5d692 python-pygments: remote_url: https://gitee.com/src-openeuler/python-pygments.git version: 24e1f8e4f26a729bdcdbb7d5299b704f658f0b60 python-pyperclip: remote_url: https://gitee.com/src-openeuler/python-pyperclip.git version: cb041fe487585defd152683ca01d5cbc4823b3b1 + python-pyproj: + remote_url: https://gitee.com/src-openeuler/python-pyproj.git + version: ac0f1c30beb590e1b042c5d8d3065cd011698576 + python-pyrsistent: + remote_url: https://gitee.com/src-openeuler/python-pyrsistent.git + version: 70c3c14161654bb60a2117cc70e15f072dbe3d83 python-setuptools: remote_url: https://gitee.com/src-openeuler/python-setuptools.git - version: a041fc69f9de97aa412e78c2ba861bda3c28e312 + version: 9c17deddb0fe6eef47ab9f25ef635a03643dff92 python-setuptools_scm: remote_url: https://gitee.com/src-openeuler/python-setuptools_scm.git version: 27aab7c17915d7351642b5dadd589ea835461d96 - python-typing-extensions: - remote_url: https://gitee.com/src-openeuler/python-typing-extensions.git - version: f6f3841a51608783cfdd61135abaa75999ca8126 python-six: remote_url: https://gitee.com/src-openeuler/python-six.git version: 4dce1378930ca6dca3440c0dd0349811eeadf22e python-smmap: remote_url: https://gitee.com/src-openeuler/python-smmap.git - version: 07946c93f0e32c048238db5d72603e8eee0c262f + version: 5ad55e764e52c732b287295abd3cda330ee39a1a python-testtools: remote_url: https://gitee.com/src-openeuler/python-testtools.git version: abd5fd03668461e4a65296969f00fb8cd336e9b1 @@ -1305,24 +1593,18 @@ manifest_list: python-tomli: remote_url: https://gitee.com/src-openeuler/python-tomli.git version: b6f38e4209a930cfce87d2a7a0afaa4116fcf8d4 + python-typing-extensions: + remote_url: https://gitee.com/src-openeuler/python-typing-extensions.git + version: f6f3841a51608783cfdd61135abaa75999ca8126 + python-wcwidth: + remote_url: https://gitee.com/src-openeuler/python-wcwidth.git + version: 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https://gitee.com/src-openeuler/qt5-qtquickcontrols2.git + version: 75c87aaea63928a03504d81a9d5aadd4665b6fb1 qtsensors: remote_url: https://gitee.com/src-openeuler/qt5-qtsensors.git version: d441b19fc208e4fb8cb8435682a9cfb246652aa6 + qtsvg: + remote_url: https://gitee.com/src-openeuler/qt5-qtsvg.git + version: 3a5eb5cac3d3c2ff9b8cb80c646a63deb3d7b28c qttools: remote_url: https://gitee.com/src-openeuler/qt5-qttools.git - version: 3e7d6a146e0abd5a1c1f05af21404a95b37a48a8 + version: ae6ecb6462bc9ac2d795e3885b0d6610c0a19d3d + qtvirtualkeyboard: + remote_url: https://gitee.com/src-openeuler/qt5-qtvirtualkeyboard.git + version: 9acb447ef4fd803d28df7cb26fc56e36c7817db7 qtwayland: remote_url: https://gitee.com/src-openeuler/qt5-qtwayland.git version: 8621767c323727c18a2dde4588b9b11de6882d96 - qtxmlpatterns: - remote_url: https://gitee.com/src-openeuler/qt5-qtxmlpatterns.git - version: d203186ba7d93ae7dced52ff4ffb8f7dc9cdf8c4 - qtwebsockets: - remote_url: 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4308b03cc0467b6d96feac3b9be8b213e93a9f05 + version: b79265fffcf2edfe99630e07e69aa7f77a731aaa + robot-brain: + remote_url: https://gitee.com/openeuler/RobotBrain.git + version: f560c5a9297574708a3c626145c26610e11e1c17 robot-state-publisher: remote_url: https://gitee.com/src-openeuler/robot_state_publisher.git version: 60365ee86ce78a1217983c76f8bcd5b9a1667a81 @@ -1538,43 +1814,52 @@ manifest_list: version: 30d4b6d37d5eb19d658bef47ba4265a031c842d2 rpm: remote_url: https://gitee.com/src-openeuler/rpm.git - version: 8f3418f9dd30553a7688039715cf710412352c7d + version: c4890fde7c48210346790df4bab08225b885b4a0 rpyutils: remote_url: https://gitee.com/src-openeuler/rpyutils.git version: 4dd1f7bdd05b9ba4be01554d9c6aa8cbdb810633 rsync: remote_url: https://gitee.com/src-openeuler/rsync.git - version: 1ea9bd5be715d62232a934eda5ea28047d4ad52b + version: 971261784ff3281ab94f251ca7d15cfea0ce711d rsyslog: remote_url: https://gitee.com/src-openeuler/rsyslog.git - version: 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src-kernel-5.10-tag3093: remote_url: https://gitee.com/src-openeuler/kernel.git version: f28f174921358232ee9ed2934ba16d1600a6a75f + src-kernel-5.10-tag626: + remote_url: https://gitee.com/src-openeuler/kernel.git + version: 2b551a79823e85abfb57b79fd3a1a286a5399e5c src-kernel-5.10-tag928: remote_url: https://gitee.com/src-openeuler/kernel.git version: df4bedc9b7a3ae34a31276342a0a7bdd6196d24d - src-kernel-5.10-tag-rockchip: - remote_url: https://gitee.com/src-openeuler/kernel.git - version: 27403d59696af85f0720587473da610cace11187 - src-kernel-5.10-tag-phytium: - remote_url: https://gitee.com/src-openeuler/kernel.git - version: e69a59c3dc3781bda0f23defc87e9dc6682123b3 src-kernel-6.6: remote_url: https://gitee.com/src-openeuler/kernel.git version: dc6a8d5811cf90ddfd98d8d1cc0b1bb40c927943 + src-kernel-6.6-tag-phytium: + remote_url: https://gitee.com/src-openeuler/kernel.git + version: dc6a8d5811cf90ddfd98d8d1cc0b1bb40c927943 sros2: remote_url: https://gitee.com/src-openeuler/sros2.git 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remote_url: https://github.com/openbmc/telemetry.git + version: b7b7e1b603fd9df56a72547c8048d182a001d647 teleop-twist-joy: remote_url: https://gitee.com/src-openeuler/teleop_twist_joy.git version: 0a2819ffa0e2199b4f0ca0407bc358aff36f7c84 teleop-twist-keyboard: remote_url: https://gitee.com/src-openeuler/teleop_twist_keyboard.git version: d91f7079286d16ccaaa4650cc8ff221b1f545160 + tensorflow: + remote_url: https://gitee.com/src-openeuler/tensorflow.git + version: 887c706f000886f4e44f5855474ef2b24ccd1596 test-interface-files: remote_url: https://gitee.com/src-openeuler/test_interface_files.git version: 93c4fe54d78f06c6458a8b994e0936aa6d30c1ef texinfo: remote_url: https://gitee.com/src-openeuler/texinfo.git version: 9ba2eb163228342de2725a2d5b01627cc74e3e42 + third_party_openh264: + remote_url: https://gitee.com/openharmony/third_party_openh264.git + version: c6aa372c16fddab4203dce3c67a81fb8f7b6eb94 + ti-linux-firmware: + remote_url: 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9567f62064be22562e7544c6c0053371df103aed + webui-vue: + remote_url: https://github.com/openbmc/webui-vue.git + version: 78372d6345cf5f1e04d6a8d56c416a7aec70b998 weston: remote_url: https://gitee.com/src-openeuler/weston.git version: 5f7b4f6a87545382ce5eb517971c9f28f4a40dc8 wget: remote_url: https://gitee.com/src-openeuler/wget.git - version: 1b555c2956ac0616bbface00eebe29a335e1bd33 + version: db43900061758d615b39e8a5e0cc1ac50e845c0e + wireless-regdb: + remote_url: https://gitee.com/src-openeuler/wireless-regdb.git + version: 6d0f3d17e03062646ff6014698f529958cb04953 wpa-supplicant: remote_url: https://gitee.com/src-openeuler/wpa_supplicant.git version: 847c7f73e682599c0d52ab6aac34b7b10261b1ec + wqy-zenhei-fonts: + remote_url: https://gitee.com/src-openeuler/wqy-zenhei-fonts.git + version: d96453d9bee63e52b8e59ae4dbc48b46e2d714f7 wxwidgets: remote_url: https://gitee.com/src-openeuler/wxGTK3.git version: e55a1b55c254077413cfd3e5962662408697830d + x264: + remote_url: https://gitee.com/src-openeuler/x264.git + version: 4ab4efdb770584277d46bc43a8b8a29d2c36fd88 xcb-proto: remote_url: https://gitee.com/src-openeuler/xcb-proto.git version: fbf4b05ad96e4654945187222bd91a0f879bee3f @@ -1778,28 +2096,31 @@ manifest_list: version: c88a2b9fd519adbb7d3f183e9b319536ea80080b xcb-util-renderutil: remote_url: https://gitee.com/src-openeuler/xcb-util-renderutil.git - version: 0c46a480cae40aa4c99747dfc7b1a241a986fa8f + version: d6b2ac9be755a93e73ca5c19c4d99af6010466b5 xcb-util-wm: remote_url: https://gitee.com/src-openeuler/xcb-util-wm.git version: 510a0590e1f7b6d109d8db58bb65ad18fdf360d5 + xen: + remote_url: https://gitee.com/src-openeuler/Xen.git + version: 82ac86330f369e4eab8ba47c45a1c737d7520ddb xerces-c: remote_url: https://gitee.com/src-openeuler/xerces-c.git version: ec2aab0a2ce4b1b3358ff908e2b4ac509424f2ef xkeyboard-config: remote_url: https://gitee.com/src-openeuler/xkeyboard-config.git - version: 46322088964cfc4752fe88edafb2373d8760d0dc + version: 0339c3c99b2b160cd6253e4083d72e84c4faff2c xmlto: remote_url: https://gitee.com/src-openeuler/xmlto.git version: 14765cdabdbf5bf4434baac96376fb88426f8447 xorg-x11-font-utils: remote_url: https://gitee.com/src-openeuler/xorg-x11-font-utils.git - version: 580a65814ad29cb922172dbcbba19d5cb399ab0d + version: f09601da7ec8211c7ea56c2cb8afd329fc815e4f xorg-x11-fonts: remote_url: https://gitee.com/src-openeuler/xorg-x11-fonts.git - version: bb239a873259954dc57443acfd43830ec638642a + version: d539a5d86cba0058a01897d53eb28ff35395a6ce xorg-x11-server-utils: remote_url: https://gitee.com/src-openeuler/xorg-x11-server-utils.git - version: 14eb499f94cbdb4646431481f0e7bcd9488ab88a + version: c6caf89cf994e28d3228717b7a87c0e9fe49914e xorg-x11-xtrans-devel: remote_url: https://gitee.com/src-openeuler/xorg-x11-xtrans-devel.git version: 613fda30446efd90a4ae318b264b0c239bcfdabc @@ -1808,7 +2129,7 @@ manifest_list: version: 0dcbe9755aa526eaa48eb6b8f616ed0aa96f7765 xwayland: remote_url: https://gitee.com/src-openeuler/xorg-x11-server-xwayland.git - version: 7981cd8098774ac85ad49950f32f456724a5c9b0 + version: 84687183d492e01ee8d128dfeb42541c448d5f43 xz: remote_url: https://gitee.com/src-openeuler/xz.git version: deb5a867806e3141a125ecdbb6c7c0cd58d0e8d6 @@ -1833,21 +2154,27 @@ manifest_list: yocto-meta-openembedded: remote_url: https://gitee.com/openeuler/yocto-meta-openembedded.git version: a82d92c8a6525da01524bf8f4a60bf6b35dcbb3d + yocto-meta-phosphor: + remote_url: https://gitee.com/openeuler/yocto-meta-phosphor.git + version: ab20103918e68151d01de65eadd8cfb00b70ed68 yocto-meta-qt5: remote_url: https://gitee.com/openeuler/yocto-meta-qt5.git version: 9c4488313e0aa9a6f42f57013462aa2433a78fcb yocto-meta-raspberrypi: remote_url: https://gitee.com/openeuler/yocto-meta-raspberrypi.git - version: b34851bc95bfac6b37ea786e819916de2ed0ae14 + version: cc46dfc478a8776a47bb4f6e54c9c8205c5ea076 + yocto-meta-renesas: + remote_url: https://gitee.com/openeuler/yocto-meta-renesas.git + version: f91a6717d73c9a7a714cf37f60b4faa700621353 yocto-meta-rockchip: remote_url: https://gitee.com/openeuler/yocto-meta-rockchip.git version: 19bc409c4626185382d22b72d6deeb1b1d3896eb - yocto-meta-sunxi: - remote_url: https://github.com/linux-sunxi/meta-sunxi.git - version: c475a1851a877bf700d6d9748be7336b2eadd3b2 yocto-meta-ros: remote_url: https://gitee.com/openeuler/yocto-meta-ros.git version: 7c7a4e6bb6ffdd06b19b2f5f81843506d57895f0 + yocto-meta-sunxi: + remote_url: https://github.com/linux-sunxi/meta-sunxi.git + version: c475a1851a877bf700d6d9748be7336b2eadd3b2 yocto-opkg-utils: remote_url: https://gitee.com/src-openeuler/yocto-opkg-utils.git version: 1d04472046d0225e013dd7e18c62dddf82025969 @@ -1866,261 +2193,3 @@ manifest_list: zstd: remote_url: https://gitee.com/src-openeuler/zstd.git version: 1bd03ae8e15c88c9bad864c65fa6b3998f3fa07f - python-idna: - remote_url: https://gitee.com/src-openeuler/python-idna.git - version: edd476b391e1a7e6ff6efa6ea1f2dce241ecce6f - sdbusplus: - remote_url: https://github.com/openbmc/sdbusplus.git - version: b7329a90eef04a24c03a2afef43c2145a0033ae6 - phosphor-bmc-code-mgmt: - remote_url: https://github.com/openbmc/phosphor-bmc-code-mgmt.git - version: 119e5a2c07b2e87ec2e75c98c06522c76bd59832 - phosphor-led-manager: - remote_url: https://github.com/openbmc/phosphor-led-manager.git - version: 6d08ccecd9d98bbe207f9307ad45578cd7d5b995 - phosphor-led-sysfs: - remote_url: https://github.com/openbmc/phosphor-led-sysfs.git - version: 97db22fd8fc5abad784aa662407e05d1f11893ae - phosphor-dbus-interfaces: - remote_url: https://github.com/openbmc/phosphor-dbus-interfaces.git - version: 56936f52f25667f233f981e5aacc52981b003b39 - phosphor-logging: - remote_url: https://github.com/openbmc/phosphor-logging.git - version: c0cc7ec707ac95dcd784a103f4e3face6395e3ea - sdeventplus: - remote_url: https://github.com/openbmc/sdeventplus.git - version: 02316409089ce12fa7c188f316469be8681b850b - stdplus: - remote_url: https://github.com/openbmc/stdplus.git - version: 68975b90a5e98f90fbcd779b59870c1cbf81bf49 - phosphor-dbus-monitor: - remote_url: https://github.com/openbmc/phosphor-dbus-monitor.git - version: 2beffa634d4e899745510af4e8fa2c387ec5d3ad - phosphor-snmp: - remote_url: https://github.com/openbmc/phosphor-snmp.git - version: 0357dffb8da86240c7fb1a45a391dbf39dcc3938 - phosphor-objmgr: - remote_url: https://github.com/openbmc/phosphor-objmgr.git - version: af3d797b011f3f0dfc6ad7eae44e5b312f5a3d6e - phosphor-debug-collector: - remote_url: https://github.com/openbmc/phosphor-debug-collector.git - version: 124d31f09cbb0eebd0f14aceade5c2fd290520fe - phosphor-networkd: - remote_url: http://github.com/openbmc/phosphor-networkd.git - version: dd1e592f692ed4dbd073ddc23566f837546bdce6 - gpioplus: - remote_url: http://github.com/openbmc/gpioplus.git - version: 8944f2e24ad8152793af010906faf06607f0e04b - jsnbd: - remote_url: https://github.com/openbmc/jsnbd.git - version: 7b7c29369cfeb267efa7f45b271aca6910687461 - obmc-ikvm: - remote_url: https://github.com/openbmc/obmc-ikvm.git - version: a4f63b38f1e72a3c34c54e275803d945b949483b - slpd-lite: - remote_url: https://github.com/openbmc/slpd-lite.git - version: ef078cd0d560b8c49061f0b855f0cb4450e69b3a - phosphor-health-monitor: - remote_url: https://github.com/openbmc/phosphor-health-monitor.git - version: a1ed140b5351e1b264471b0462cc4eab753fbda6 - obmc-console: - remote_url: http://github.com/openbmc/obmc-console.git - version: 397fd035e3adda2f3d36bfc5f2268372847778e7 - telemetry: - remote_url: https://github.com/openbmc/telemetry.git - version: b7b7e1b603fd9df56a72547c8048d182a001d647 - obmc-phosphor-power: - remote_url: https://github.com/openbmc/phosphor-power-control.git - version: ca9aa00180423b548369a7485bbca641581cc1ab - phosphor-hwmon: - remote_url: https://github.com/openbmc/phosphor-hwmon.git - version: 0bbd07c008404ed701b336d8a2b398407b908fe6 - phosphor-inventory-manager: - remote_url: https://github.com/openbmc/phosphor-inventory-manager.git - version: 69ddaad8dfd1102e9bdd6437149e2a8397a1b558 - phosphor-settingsd: - remote_url: https://github.com/openbmc/phosphor-settingsd.git - version: 75a710ca87f6033419d856d965f6100aa4348196 - phosphor-fan-presence: - remote_url: https://github.com/openbmc/phosphor-fan-presence.git - version: 0461bd2fdc3d57fa33d933ac9d9fd9452ed39bbb - phosphor-certificate-manager: - remote_url: https://github.com/openbmc/phosphor-certificate-manager.git - version: ebd21ba4fc36577a70cad207e42d66594b73ed13 - phosphor-state-manager: - remote_url: https://github.com/openbmc/phosphor-state-manager.git - version: aaa8d3466b931b9cf5a64e3a972cd23c2b5b90c6 - entity-manager: - remote_url: https://github.com/openbmc/entity-manager.git - version: b0c7bd18c20983a565c21e1921d647132329f789 - phosphor-user-manager: - remote_url: http://github.com/openbmc/phosphor-user-manager.git - version: 6dc7ed95c5bf07e8273d6fad79018f5f19a9b77e - krb5: - remote_url: https://gitee.com/src-openeuler/krb5.git - version: 86362d91f8702bb9f8c0bb13f1223b1e05f080a7 - bmap-tools: - remote_url: https://gitee.com/src-oepkgs/bmap-tools.git - version: df9427eb085563d403210095870cba92f546f81b - bmcweb: - remote_url: https://github.com/openbmc/bmcweb.git - version: 3d768a165183dd8cf7e485ac67ab7270845d5f87 - nghttp2: - remote_url: https://gitee.com/src-openeuler/nghttp2.git - version: 5411992a063c66652694b84d0b4e83fd29862e29 - boost-obmc: - remote_url: https://gitee.com/src-openeuler/boost.git - version: 8ab4fe722e8136317f6f9b370ff20af44f61c78d - webui-vue: - remote_url: https://github.com/openbmc/webui-vue.git - version: 78372d6345cf5f1e04d6a8d56c416a7aec70b998 - yocto-meta-phosphor: - remote_url: https://gitee.com/openeuler/yocto-meta-phosphor.git - version: ab20103918e68151d01de65eadd8cfb00b70ed68 - i2c-tools: - remote_url: https://gitee.com/src-openeuler/i2c-tools.git - version: 0c606d9fef419621fee2cbb3ff7e78ec080ceca6 - iperf3: - remote_url: https://gitee.com/src-openeuler/iperf3.git - version: 29fa616d92988c6fce2efd10d76ffd5bda02053e - sysbench: - remote_url: https://gitee.com/src-openeuler/sysbench.git - version: a4ac5f853999d66d060ca28f47d2781041722c0a - iozone3: - remote_url: https://gitee.com/src-openeuler/iozone.git - version: 8a4f9ba59fd00b7a737df5b37fd43ecc19784d8e - can-utils: - remote_url: https://gitee.com/src-openeuler/can-utils.git - version: 606c2b89cda6afa38cf7f247d1857acd63995c25 - evtest: - remote_url: https://gitee.com/src-openeuler/evtest.git - version: 5a8f258cc4d65805faf38523d30773fb861ba18a - kubeedge: - remote_url: https://gitee.com/src-openeuler/kubeedge.git - version: 8ee6a2fb2d5d9b740a74dba965337bb5668a3bb8 - mosquitto: - remote_url: https://gitee.com/src-openeuler/mosquitto.git - version: dbc7c87118e8a20306ee28fe7b13f7315bc2a124 - uthash: - remote_url: https://gitee.com/src-openeuler/uthash.git - version: 237f02daea02bcd2a85046a88597c919bdb153f5 - open62541: - remote_url: https://gitee.com/src-openeuler/open62541.git - version: 6564947947abe265d86aaf10fe6fdc1a03fb89b9 - avahi: - remote_url: https://gitee.com/src-openeuler/avahi.git - version: 62ac6d985a25f7f21a777b232bee0e3977cf5c71 - flac: - remote_url: https://gitee.com/src-openeuler/flac.git - version: 07d406d8dc0513fd3abc1053831f37ff017a16a4 - fgl297-fw: - remote_url: https://github.com/MYiR-Dev/myir-firmware.git - version: 65cbd809d32906c17c55ece3591be60e8c878735 - json-glib: - remote_url: https://gitee.com/src-openeuler/json-glib.git - version: 1c0a6556df3ab8201dec64f9aaca5884f8411b87 - libsamplerate: - remote_url: https://gitee.com/src-openeuler/libsamplerate.git - version: e0b0e3949d7234b28ff1da4542af3886ad02edfb - alsa-utils: - remote_url: https://gitee.com/src-openeuler/alsa-utils.git - version: 3ff1d56d73d8459d9f887576398c28c172b9b7bc - alsa-plugins: - remote_url: https://gitee.com/src-openeuler/alsa-plugins.git - version: 422280a2b12be36d34b64ca8a12270419d3abd4c - dbus-glib: - remote_url: https://gitee.com/src-openeuler/dbus-glib.git - version: 5f30239ed5ea096b40a1644ac721c0f60f486ed8 - desktop-file-utils: - remote_url: https://gitee.com/src-openeuler/desktop-file-utils.git - version: 308d8e20c4fdc945e6b1e55dd596cfdca98599b5 - gnome-themes-standard: - remote_url: https://gitee.com/src-openeuler/gnome-themes-standard.git - version: d404958fe124ff4fc2e2b2aaa84eeb63aa261905 - nss-mdns: - remote_url: https://gitee.com/src-openeuler/nss-mdns.git - version: ddb35bcc7a7bb6bcfecb61005696b977ed7b3350 - nss: - remote_url: https://gitee.com/src-openeuler/nss.git - version: 4f46b274351b69b92161c56cf77d48c28bf30eea - libdaemon: - remote_url: https://gitee.com/src-openeuler/libdaemon.git - version: 9f0df90d1bd47de2d8a983f526af2e229dc7a7da - libedit: - remote_url: https://gitee.com/src-openeuler/libedit.git - version: 3e86ca3dbd5493acae2f7d6f0601c9d474517e42 - libmd: - remote_url: https://gitee.com/src-openeuler/libmd.git - version: e8a5e3f80cfff5dd5334a41b845f68569894db54 - fiptool: - remote_url: https://github.com/renesas-rz/rzg_trusted-firmware-a.git - version: aed3786384b99dc13a46a8d3af139df28b5642a3 - myir-renesas-flash-writer: - remote_url: https://github.com/MYiR-Dev/myir-renesas-flash-writer.git - version: 8cd973992da7cdc8646a498b81d1a1e4e9f74f20 - myir-renesas-tf-a: - remote_url: https://github.com/MYiR-Dev/myir-renesas-tf-a.git - version: 1308cc5eb85aa67f5e29241e99c21d7e1b27c913 - myir-renesas-uboot: - remote_url: https://github.com/MYiR-Dev/myir-renesas-uboot.git - version: 75dee8f1759d6b3b140aa42486ad39a7113903ef - myir-renesas-linux: - remote_url: https://github.com/MYiR-Dev/myir-renesas-linux.git - version: d795edc9d0ce69f4ff1ac914a7668f043d444cce - myir-ti-uboot: - remote_url: https://github.com/MYIR-TI/myir-ti-uboot.git - version: f4e7b03f15da6cd88d31d29a2b9b7e0812534554 - myir-ti-linux: - remote_url: https://github.com/MYIR-TI/myir-ti-linux.git - version: 491c4beebcb1bac77be5954016a190ffceed0cb6 - yocto-meta-renesas: - remote_url: https://gitee.com/openeuler/yocto-meta-renesas.git - version: f91a6717d73c9a7a714cf37f60b4faa700621353 - pbzip2: - remote_url: https://gitee.com/src-openeuler/pbzip2.git - version: dbe672dc7776b9af9c5432c8d8afaf8fe2d00bca - proj: - remote_url: https://gitee.com/src-openeuler/proj.git - version: 20cb0336176586dd2bc26bd9ff5a50b9b2521204 - python-pyproj: - remote_url: https://gitee.com/src-openeuler/python-pyproj.git - version: ac0f1c30beb590e1b042c5d8d3065cd011698576 - luajit: - remote_url: https://gitee.com/src-openeuler/luajit.git - version: c61d032140fe1b9c089eacacae0834f1e19afad6 - concurrencykit: - remote_url: https://gitee.com/src-openeuler/ck.git - version: b7c694d5de6abb7058149e383a1bb37b42e83592 - nspr: - remote_url: https://gitee.com/src-openeuler/nspr.git - version: d2efb0fbb05497fb57c19cc09fded278e8df5a87 - nodejs: - remote_url: https://gitee.com/src-openeuler/nodejs.git - version: 1b1b5fa99dba73dcc702894e140d29b1e04a9bd0 - brotli: - remote_url: https://gitee.com/src-openeuler/brotli.git - version: 93e3a7f570663aa9952f4609a52c5d5a42e6cb80 - wireless-regdb: - remote_url: https://gitee.com/src-openeuler/wireless-regdb.git - version: fbd0acbee5e63015a73d4fe30e5bd56fa27d5dd8 - ffmpeg: - remote_url: https://gitee.com/src-openeuler/ffmpeg.git - version: 884a853b7555e693a799d16d11f77452f873f88f - x264: - remote_url: https://gitee.com/src-openeuler/x264.git - version: 34381f79087ebec941fb935edf009b45e49c99f9 - robot-brain: - remote_url: https://gitee.com/openeuler/RobotBrain.git - version: f560c5a9297574708a3c626145c26610e11e1c17 - ntp: - remote_url: https://gitee.com/src-openeuler/ntp.git - version: 9b7f1fb05e2387970c7a611d8110dbce22ed6c70 - cri-tools: - remote_url: https://gitee.com/src-openeuler/cri-tools.git - version: 48d0fda4cf601e34f2d557544332fbcfb10a596b - cni: - remote_url: https://gitee.com/src-openeuler/containernetworking-plugins.git - version: b1ac29e26d64e4887def7d29b22d47e8687e9191 - libvpx: - remote_url: https://gitee.com/src-openeuler/libvpx.git - version: 0ac414f4f38419207a874f79ce6075335eb19b6d diff --git a/.oebuild/maplist.yaml b/.oebuild/maplist.yaml index 5bb7aa6999d67afaea5b403b04c4ab0ad260cf85..a1f66abafa6fd19c12d4fed35a2da7b5ba7fae1b 100644 --- a/.oebuild/maplist.yaml +++ b/.oebuild/maplist.yaml @@ -1077,11 +1077,6 @@ localname_list: localname: BehaviorTree.CPP workspace_tarball: - 'git ros-humble-behaviortree-cpp-v3_3.8.3.orig.tar.gz' - cppzmq: - PV: v4.9.0 - localname: cppzmq - workspace_tarball: - - 'git v4.9.0.tar.gz' diagnostic-aggregator: PV: 3.1.2 localname: diagnostics @@ -1130,15 +1125,6 @@ localname_list: localname: qpoases-vendor workspace_tarball: - 'git ros-humble-qpoases-vendor_3.2.3.orig.tar.gz' - libexif: - PV: 0.6.24 - localname: oee_archive - workspace_tarball: - - 'libexif libexif/libexif-0.6.24.tar.bz2' - libuvc: - localname: libuvc - workspace_tarball: - - 'git v0.0.7.tar.gz' camera-calibration-parsers: PV: 3.1.5 localname: image_common @@ -1317,7 +1303,7 @@ localname_list: geographiclib: localname: oee_archive workspace_tarball: - - 'GeographicLib-1.48 geographiclib/GeographicLib-1.48.tar.gz' + - 'GeographicLib-1.48 GeographicLib-1.48.tar.gz' geographic-msgs: PV: 1.0.5 localname: geographic_info @@ -1326,4 +1312,4 @@ localname_list: robot-localization: localname: oee_archive workspace_tarball: - - 'git robot-localization/robot_localization-release-release-humble-robot_localization-3.3.1-2.tar.gz' + - 'git robot_localization-release-release-humble-robot_localization-3.3.1-2.tar.gz' diff --git a/.oebuild/platform/alientek.yaml b/.oebuild/platform/alientek.yaml new file mode 100644 index 0000000000000000000000000000000000000000..db12e41a63cc85958c93973cecc7616e7d271426 --- /dev/null +++ b/.oebuild/platform/alientek.yaml @@ -0,0 +1,8 @@ +type: platform + +machine: alientek + +toolchain_type: EXTERNAL_TOOLCHAIN:loongarch64 + +layers: + - yocto-meta-openeuler/bsp/meta-loongson diff --git a/.oebuild/platform/hiedge1.yaml b/.oebuild/platform/hiedge1.yaml new file mode 100644 index 0000000000000000000000000000000000000000..82df0e9610348e5a5336a809fa0b2d4722b041cd --- /dev/null +++ b/.oebuild/platform/hiedge1.yaml @@ -0,0 +1,10 @@ +type: platform + +machine: hiedge1 + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +layers: + - yocto-meta-openeuler/bsp/meta-hisilicon + - yocto-meta-openembedded/meta-multimedia + diff --git a/.oebuild/platform/kp920.yaml b/.oebuild/platform/kp920.yaml new file mode 100644 index 0000000000000000000000000000000000000000..fb9b1e5e293a490c84fea269187dde166811107c --- /dev/null +++ b/.oebuild/platform/kp920.yaml @@ -0,0 +1,8 @@ +type: platform + +machine: kp920 + +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 + +layers: + - yocto-meta-openeuler/bsp/meta-kunpeng diff --git a/.oebuild/samples/aarch64/hieulerpi1-ros.yaml b/.oebuild/samples/aarch64/hieulerpi1-ros.yaml new file mode 100644 index 0000000000000000000000000000000000000000..cfd2ad0f3da0691f1d08b1c7fa81a30de7c9715d --- /dev/null +++ b/.oebuild/samples/aarch64/hieulerpi1-ros.yaml @@ -0,0 +1,27 @@ +build_in: docker +machine: hieulerpi1 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- yocto-meta-ros +local_conf: |+ + DISTRO_FEATURES:append = " ros " + +layers: +- yocto-meta-openeuler/bsp/meta-hisilicon +- yocto-meta-openembedded/meta-multimedia +- yocto-meta-ros/meta-ros-common +- yocto-meta-ros/meta-ros2 +- yocto-meta-ros/meta-ros2-humble +- yocto-meta-openembedded/meta-multimedia +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/aarch64/hieulerpi1-tiny.yaml b/.oebuild/samples/aarch64/hieulerpi1-tiny.yaml new file mode 100644 index 0000000000000000000000000000000000000000..f8309c4907275d74b6e0f6d03e04cd7e190791e8 --- /dev/null +++ b/.oebuild/samples/aarch64/hieulerpi1-tiny.yaml @@ -0,0 +1,19 @@ +build_in: docker +machine: hieulerpi1 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +local_conf: | +layers: +- yocto-meta-openeuler/bsp/meta-hisilicon +- yocto-meta-openembedded/meta-multimedia +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image-tiny diff --git a/.oebuild/samples/aarch64/hieulerpi1.yaml b/.oebuild/samples/aarch64/hieulerpi1.yaml new file mode 100644 index 0000000000000000000000000000000000000000..4257ce7f762b19bb500dd728fba35a97fd153701 --- /dev/null +++ b/.oebuild/samples/aarch64/hieulerpi1.yaml @@ -0,0 +1,20 @@ +build_in: docker +machine: hieulerpi1 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +local_conf: | +layers: +- yocto-meta-openeuler/bsp/meta-hisilicon +- yocto-meta-openembedded/meta-multimedia +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/aarch64/kp920-mcs-rt.yaml b/.oebuild/samples/aarch64/kp920-mcs-rt.yaml new file mode 100644 index 0000000000000000000000000000000000000000..4b0f13abbf519a214792882ca9454d3990d4411f --- /dev/null +++ b/.oebuild/samples/aarch64/kp920-mcs-rt.yaml @@ -0,0 +1,27 @@ +build_in: docker +machine: kp920 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- Jailhouse +local_conf: |+ + PREFERRED_PROVIDER_virtual/kernel = "linux-openeuler-rt" + DISTRO_FEATURES:append = " preempt-rt " + + MCS_FEATURES ?= "openamp" + DISTRO_FEATURES:append = " mcs" + +layers: +- yocto-meta-openeuler/bsp/meta-kunpeng +- yocto-meta-openeuler/rtos/meta-openeuler-rtos +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/aarch64/kp920-mcs.yaml b/.oebuild/samples/aarch64/kp920-mcs.yaml new file mode 100644 index 0000000000000000000000000000000000000000..b364d3cf00d4c744c6c519be2482d497d034b7b1 --- /dev/null +++ b/.oebuild/samples/aarch64/kp920-mcs.yaml @@ -0,0 +1,24 @@ +build_in: docker +machine: kp920 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- Jailhouse +local_conf: |+ + MCS_FEATURES ?= "openamp" + DISTRO_FEATURES:append = " mcs" + +layers: +- yocto-meta-openeuler/bsp/meta-kunpeng +- yocto-meta-openeuler/rtos/meta-openeuler-rtos +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/aarch64/oee-docker-image.yaml b/.oebuild/samples/aarch64/oee-docker-image.yaml new file mode 100644 index 0000000000000000000000000000000000000000..5f20eb89a7b98a75ea318fc733d6189d0277fad7 --- /dev/null +++ b/.oebuild/samples/aarch64/oee-docker-image.yaml @@ -0,0 +1,19 @@ +build_in: docker +machine: qemu-aarch64 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +local_conf: |+ + DISTRO_FEATURES:append = " isulad " + +layers: [] +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-docker-image diff --git a/.oebuild/samples/aarch64/ok3568.yaml b/.oebuild/samples/aarch64/ok3568.yaml new file mode 100644 index 0000000000000000000000000000000000000000..f3c683029cddebd8b5dd481afb99eb52843f909e --- /dev/null +++ b/.oebuild/samples/aarch64/ok3568.yaml @@ -0,0 +1,21 @@ +build_in: docker +machine: ok3568 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- yocto-meta-rockchip +local_conf: | + PREFERRED_PROVIDER_virtual/kernel ?= "linux-openeuler" +layers: +- yocto-meta-rockchip +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/aarch64/ok3588.yaml b/.oebuild/samples/aarch64/ok3588.yaml new file mode 100644 index 0000000000000000000000000000000000000000..bc51de138a0655b894c9b156910141697c3704b3 --- /dev/null +++ b/.oebuild/samples/aarch64/ok3588.yaml @@ -0,0 +1,21 @@ +build_in: docker +machine: ok3588 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- yocto-meta-rockchip +local_conf: | + PREFERRED_PROVIDER_virtual/kernel ?= "linux-openeuler" +layers: +- yocto-meta-rockchip +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/aarch64/qemu-aarch64-clang-kernel6.yaml b/.oebuild/samples/aarch64/qemu-aarch64-clang-kernel6.yaml new file mode 100644 index 0000000000000000000000000000000000000000..d4d839a4397acadef6b9f3a962709db275823cc7 --- /dev/null +++ b/.oebuild/samples/aarch64/qemu-aarch64-clang-kernel6.yaml @@ -0,0 +1,27 @@ +build_in: docker +machine: qemu-aarch64 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +local_conf: |+ + DISTRO_FEATURES:append = " kernel6 " + PREFERRED_VERSION_linux-openeuler ?= "6.6%" + PREFERRED_VERSION_linux-openeuler-rt ?= "6.6%" + + DISTRO_FEATURES:append = " clang ld-is-lld" + DISTRO_FEATURES_NATIVE:append = " clang " + EXTERNAL_TOOLCHAIN_CLANG_BIN = "${EXTERNAL_TOOLCHAIN_LLVM}/bin" + +layers: +- yocto-meta-openeuler/meta-clang +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host --cap-add NET_ADMIN + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/aarch64/qemu-aarch64-clang.yaml b/.oebuild/samples/aarch64/qemu-aarch64-clang.yaml new file mode 100644 index 0000000000000000000000000000000000000000..aac8aac7e2f185e58a6ae52f9270a259c83d5138 --- /dev/null +++ b/.oebuild/samples/aarch64/qemu-aarch64-clang.yaml @@ -0,0 +1,23 @@ +build_in: docker +machine: qemu-aarch64 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +local_conf: |+ + DISTRO_FEATURES:append = " clang ld-is-lld" + DISTRO_FEATURES_NATIVE:append = " clang " + EXTERNAL_TOOLCHAIN_CLANG_BIN = "${EXTERNAL_TOOLCHAIN_LLVM}/bin" + +layers: +- yocto-meta-openeuler/meta-clang +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host --cap-add NET_ADMIN + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/aarch64/qemu-aarch64-kernel6.yaml b/.oebuild/samples/aarch64/qemu-aarch64-kernel6.yaml new file mode 100644 index 0000000000000000000000000000000000000000..d39dbba4c4ca59f43b2c48856a369d4d3175f2a0 --- /dev/null +++ b/.oebuild/samples/aarch64/qemu-aarch64-kernel6.yaml @@ -0,0 +1,22 @@ +build_in: docker +machine: qemu-aarch64 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +local_conf: |+ + DISTRO_FEATURES:append = " kernel6 " + PREFERRED_VERSION_linux-openeuler ?= "6.6%" + PREFERRED_VERSION_linux-openeuler-rt ?= "6.6%" + +layers: [] +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host --cap-add NET_ADMIN + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/aarch64/qemu-aarch64-mcs-ros.yaml b/.oebuild/samples/aarch64/qemu-aarch64-mcs-ros.yaml new file mode 100644 index 0000000000000000000000000000000000000000..ec4d1835e361eb0f683af7beec651bd13237bf35 --- /dev/null +++ b/.oebuild/samples/aarch64/qemu-aarch64-mcs-ros.yaml @@ -0,0 +1,30 @@ +build_in: docker +machine: qemu-aarch64 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- yocto-meta-ros +- Jailhouse +local_conf: |+ + MCS_FEATURES ?= "openamp" + DISTRO_FEATURES:append = " mcs" + + DISTRO_FEATURES:append = " ros " + +layers: +- yocto-meta-ros/meta-ros-common +- yocto-meta-ros/meta-ros2 +- yocto-meta-ros/meta-ros2-humble +- yocto-meta-openembedded/meta-multimedia +- yocto-meta-openeuler/rtos/meta-openeuler-rtos +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host --cap-add NET_ADMIN + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/aarch64/qemu-aarch64.yaml b/.oebuild/samples/aarch64/qemu-aarch64.yaml new file mode 100644 index 0000000000000000000000000000000000000000..5087f2424fb91c6561d151cf7668e078466fccf1 --- /dev/null +++ b/.oebuild/samples/aarch64/qemu-aarch64.yaml @@ -0,0 +1,18 @@ +build_in: docker +machine: qemu-aarch64 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +local_conf: | +layers: [] +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host --cap-add NET_ADMIN + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/aarch64/raspberrypi4-64-clang-kernel6.yaml b/.oebuild/samples/aarch64/raspberrypi4-64-clang-kernel6.yaml new file mode 100644 index 0000000000000000000000000000000000000000..01297e341b5d9cfd0b49aa627146a360c24dfe72 --- /dev/null +++ b/.oebuild/samples/aarch64/raspberrypi4-64-clang-kernel6.yaml @@ -0,0 +1,29 @@ +build_in: docker +machine: raspberrypi4-64 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- yocto-meta-raspberrypi +local_conf: |+ + DISTRO_FEATURES:append = " kernel6 " + PREFERRED_VERSION_linux-openeuler ?= "6.6%" + PREFERRED_VERSION_linux-openeuler-rt ?= "6.6%" + + DISTRO_FEATURES:append = " clang ld-is-lld" + DISTRO_FEATURES_NATIVE:append = " clang " + EXTERNAL_TOOLCHAIN_CLANG_BIN = "${EXTERNAL_TOOLCHAIN_LLVM}/bin" + +layers: +- yocto-meta-raspberrypi +- yocto-meta-openeuler/meta-clang +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/aarch64/raspberrypi4-64-clang.yaml b/.oebuild/samples/aarch64/raspberrypi4-64-clang.yaml new file mode 100644 index 0000000000000000000000000000000000000000..8338afea6a826eb16bbe235e0d83b24d29d36e76 --- /dev/null +++ b/.oebuild/samples/aarch64/raspberrypi4-64-clang.yaml @@ -0,0 +1,25 @@ +build_in: docker +machine: raspberrypi4-64 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- yocto-meta-raspberrypi +local_conf: |+ + DISTRO_FEATURES:append = " clang ld-is-lld" + DISTRO_FEATURES_NATIVE:append = " clang " + EXTERNAL_TOOLCHAIN_CLANG_BIN = "${EXTERNAL_TOOLCHAIN_LLVM}/bin" + +layers: +- yocto-meta-raspberrypi +- yocto-meta-openeuler/meta-clang +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/aarch64/raspberrypi4-64-hmi-kernel6-rt.yaml b/.oebuild/samples/aarch64/raspberrypi4-64-hmi-kernel6-rt.yaml new file mode 100644 index 0000000000000000000000000000000000000000..52276a652446b8e62c6f4e36d6ece494478a10a1 --- /dev/null +++ b/.oebuild/samples/aarch64/raspberrypi4-64-hmi-kernel6-rt.yaml @@ -0,0 +1,37 @@ +build_in: docker +machine: raspberrypi4-64 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- yocto-meta-raspberrypi +- yocto-meta-qt5 +local_conf: |+ + PREFERRED_PROVIDER_virtual/kernel = "linux-openeuler-rt" + DISTRO_FEATURES:append = " preempt-rt " + + DISTRO_FEATURES:append = " hmi " + DISTRO_FEATURES:append = " opengl" + OPENEULER_DEFAULT_DISTRO_FEATURES:append = " x11" + DISTRO_FEATURES:append = " wayland" + IMAGE_FEATURES:append = " weston" + GLIBC_GENERATE_LOCALES:append = "en_US.UTF-8 zh_CN.UTF-8 " + + DISTRO_FEATURES:append = " kernel6 " + PREFERRED_VERSION_linux-openeuler ?= "6.6%" + PREFERRED_VERSION_linux-openeuler-rt ?= "6.6%" + +layers: +- yocto-meta-raspberrypi +- yocto-meta-openembedded/meta-oe +- yocto-meta-qt5 +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/aarch64/raspberrypi4-64-hmi-mcs-rt.yaml b/.oebuild/samples/aarch64/raspberrypi4-64-hmi-mcs-rt.yaml new file mode 100644 index 0000000000000000000000000000000000000000..6c57870b29b4e46dd79825dbbf3505639b6db30c --- /dev/null +++ b/.oebuild/samples/aarch64/raspberrypi4-64-hmi-mcs-rt.yaml @@ -0,0 +1,38 @@ +build_in: docker +machine: raspberrypi4-64 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- yocto-meta-raspberrypi +- Jailhouse +- yocto-meta-qt5 +local_conf: |+ + PREFERRED_PROVIDER_virtual/kernel = "linux-openeuler-rt" + DISTRO_FEATURES:append = " preempt-rt " + + DISTRO_FEATURES:append = " hmi " + DISTRO_FEATURES:append = " opengl" + OPENEULER_DEFAULT_DISTRO_FEATURES:append = " x11" + DISTRO_FEATURES:append = " wayland" + IMAGE_FEATURES:append = " weston" + GLIBC_GENERATE_LOCALES:append = "en_US.UTF-8 zh_CN.UTF-8 " + + MCS_FEATURES ?= "openamp lopper-devicetree" + DISTRO_FEATURES:append = " mcs" + +layers: +- yocto-meta-raspberrypi +- yocto-meta-openeuler/rtos/meta-openeuler-rtos +- yocto-meta-openembedded/meta-oe +- yocto-meta-qt5 +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/aarch64/raspberrypi4-64-kernel6.yaml b/.oebuild/samples/aarch64/raspberrypi4-64-kernel6.yaml new file mode 100644 index 0000000000000000000000000000000000000000..abe72eaa46d3d3375884deae8392313d4e8593b5 --- /dev/null +++ b/.oebuild/samples/aarch64/raspberrypi4-64-kernel6.yaml @@ -0,0 +1,24 @@ +build_in: docker +machine: raspberrypi4-64 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- yocto-meta-raspberrypi +local_conf: |+ + DISTRO_FEATURES:append = " kernel6 " + PREFERRED_VERSION_linux-openeuler ?= "6.6%" + PREFERRED_VERSION_linux-openeuler-rt ?= "6.6%" + +layers: +- yocto-meta-raspberrypi +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/aarch64/raspberrypi4-64.yaml b/.oebuild/samples/aarch64/raspberrypi4-64.yaml new file mode 100644 index 0000000000000000000000000000000000000000..c9a6ab89278f943cc6e4cc4bd06f941ac1e84ec8 --- /dev/null +++ b/.oebuild/samples/aarch64/raspberrypi4-64.yaml @@ -0,0 +1,20 @@ +build_in: docker +machine: raspberrypi4-64 +toolchain_type: EXTERNAL_TOOLCHAIN:aarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- yocto-meta-raspberrypi +local_conf: | +layers: +- yocto-meta-raspberrypi +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/rpi4_jailhouse_hmi_img.yaml b/.oebuild/samples/aarch64/rpi4_jailhouse_hmi_img.yaml similarity index 100% rename from .oebuild/samples/rpi4_jailhouse_hmi_img.yaml rename to .oebuild/samples/aarch64/rpi4_jailhouse_hmi_img.yaml diff --git a/.oebuild/samples/rpi4_jailhouse_tiny_img.yaml b/.oebuild/samples/aarch64/rpi4_jailhouse_tiny_img.yaml similarity index 100% rename from .oebuild/samples/rpi4_jailhouse_tiny_img.yaml rename to .oebuild/samples/aarch64/rpi4_jailhouse_tiny_img.yaml diff --git a/.oebuild/samples/arm32/ok-a40i.yaml b/.oebuild/samples/arm32/ok-a40i.yaml new file mode 100644 index 0000000000000000000000000000000000000000..54fdf5c452df1ce356712996ea6d9a120ecf18b2 --- /dev/null +++ b/.oebuild/samples/arm32/ok-a40i.yaml @@ -0,0 +1,24 @@ +build_in: docker +machine: ok-a40i +toolchain_type: EXTERNAL_TOOLCHAIN:arm +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- yocto-meta-sunxi +- yocto-meta-arm +local_conf: | + PREFERRED_PROVIDER_virtual/kernel ?= "linux-openeuler" +layers: +- yocto-meta-arm/meta-arm +- yocto-meta-arm/meta-arm-toolchain +- yocto-meta-sunxi +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/arm32/qemu-arm32.yaml b/.oebuild/samples/arm32/qemu-arm32.yaml new file mode 100644 index 0000000000000000000000000000000000000000..5671910e52a515c949b040946bee6fcb7a4aca53 --- /dev/null +++ b/.oebuild/samples/arm32/qemu-arm32.yaml @@ -0,0 +1,18 @@ +build_in: docker +machine: qemu-arm +toolchain_type: EXTERNAL_TOOLCHAIN:arm +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +local_conf: | +layers: [] +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host --cap-add NET_ADMIN + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/loongarch64/loongarch64.yaml b/.oebuild/samples/loongarch64/loongarch64.yaml new file mode 100644 index 0000000000000000000000000000000000000000..679b517d62918e489e97791923b608e36a0a044e --- /dev/null +++ b/.oebuild/samples/loongarch64/loongarch64.yaml @@ -0,0 +1,22 @@ +build_in: docker +machine: generic-loongarch64 +toolchain_type: EXTERNAL_TOOLCHAIN:loongarch64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +local_conf: |+ + DISTRO_FEATURES:append = " kernel6 " + PREFERRED_VERSION_linux-openeuler ?= "6.6%" + PREFERRED_VERSION_linux-openeuler-rt ?= "6.6%" + +layers: [] +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host --cap-add NET_ADMIN + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/riscv64/qemu-riscv64.yaml b/.oebuild/samples/riscv64/qemu-riscv64.yaml new file mode 100644 index 0000000000000000000000000000000000000000..b88c43238f03f828204b669bde424b03699a8aac --- /dev/null +++ b/.oebuild/samples/riscv64/qemu-riscv64.yaml @@ -0,0 +1,18 @@ +build_in: docker +machine: qemu-riscv64 +toolchain_type: EXTERNAL_TOOLCHAIN:riscv64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +local_conf: | +layers: [] +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host --cap-add NET_ADMIN + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/prebuilt_tool.yaml b/.oebuild/samples/x86-64/prebuilt_tool.yaml similarity index 81% rename from .oebuild/samples/prebuilt_tool.yaml rename to .oebuild/samples/x86-64/prebuilt_tool.yaml index eefddc100933348d351b275b02ce8acc3558eea2..84323045c8ff2ceef752bd75e0d32f1281abeb5d 100644 --- a/.oebuild/samples/prebuilt_tool.yaml +++ b/.oebuild/samples/x86-64/prebuilt_tool.yaml @@ -7,6 +7,10 @@ repos: local_conf: |+ # TCMODE = "external-openeuler" OPENEULER_PREBUILT_TOOLS_ENABLE = "no" + GCCVERSION = "12.%" + GLIBCVERSION = "2.38" + LINUXLIBCVERSION = "5.10%" + BINUVERSION = "2.41%" docker_param: image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest diff --git a/.oebuild/samples/x86-64/x86-64-hmi-kernel6-ros-rt.yaml b/.oebuild/samples/x86-64/x86-64-hmi-kernel6-ros-rt.yaml new file mode 100644 index 0000000000000000000000000000000000000000..d32e5aa892a66e92ed10b451c22d4f5989d5f254 --- /dev/null +++ b/.oebuild/samples/x86-64/x86-64-hmi-kernel6-ros-rt.yaml @@ -0,0 +1,42 @@ +build_in: docker +machine: generic-x86-64 +toolchain_type: EXTERNAL_TOOLCHAIN:x86-64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- yocto-meta-ros +- yocto-meta-qt5 +local_conf: |+ + PREFERRED_PROVIDER_virtual/kernel = "linux-openeuler-rt" + DISTRO_FEATURES:append = " preempt-rt " + + DISTRO_FEATURES:append = " hmi " + DISTRO_FEATURES:append = " opengl" + OPENEULER_DEFAULT_DISTRO_FEATURES:append = " x11" + DISTRO_FEATURES:append = " wayland" + IMAGE_FEATURES:append = " weston" + GLIBC_GENERATE_LOCALES:append = "en_US.UTF-8 zh_CN.UTF-8 " + + DISTRO_FEATURES:append = " kernel6 " + PREFERRED_VERSION_linux-openeuler ?= "6.6%" + PREFERRED_VERSION_linux-openeuler-rt ?= "6.6%" + + DISTRO_FEATURES:append = " ros " + +layers: +- yocto-meta-ros/meta-ros-common +- yocto-meta-ros/meta-ros2 +- yocto-meta-ros/meta-ros2-humble +- yocto-meta-openembedded/meta-multimedia +- yocto-meta-openembedded/meta-oe +- yocto-meta-qt5 +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host --cap-add NET_ADMIN + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/x86-64/x86-64-hmi-mcs-ros-rt.yaml b/.oebuild/samples/x86-64/x86-64-hmi-mcs-ros-rt.yaml new file mode 100644 index 0000000000000000000000000000000000000000..30d85362daea64b0be6dbf643f71d667d9aad8b9 --- /dev/null +++ b/.oebuild/samples/x86-64/x86-64-hmi-mcs-ros-rt.yaml @@ -0,0 +1,43 @@ +build_in: docker +machine: generic-x86-64 +toolchain_type: EXTERNAL_TOOLCHAIN:x86-64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +- yocto-meta-ros +- Jailhouse +- yocto-meta-qt5 +local_conf: |+ + PREFERRED_PROVIDER_virtual/kernel = "linux-openeuler-rt" + DISTRO_FEATURES:append = " preempt-rt " + + DISTRO_FEATURES:append = " hmi " + DISTRO_FEATURES:append = " opengl" + OPENEULER_DEFAULT_DISTRO_FEATURES:append = " x11" + DISTRO_FEATURES:append = " wayland" + IMAGE_FEATURES:append = " weston" + GLIBC_GENERATE_LOCALES:append = "en_US.UTF-8 zh_CN.UTF-8 " + + MCS_FEATURES ?= "openamp" + DISTRO_FEATURES:append = " mcs" + + DISTRO_FEATURES:append = " ros " + +layers: +- yocto-meta-ros/meta-ros-common +- yocto-meta-ros/meta-ros2 +- yocto-meta-ros/meta-ros2-humble +- yocto-meta-openembedded/meta-multimedia +- yocto-meta-openeuler/rtos/meta-openeuler-rtos +- yocto-meta-openembedded/meta-oe +- yocto-meta-qt5 +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host --cap-add NET_ADMIN + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/samples/x86-64/x86-64.yaml b/.oebuild/samples/x86-64/x86-64.yaml new file mode 100644 index 0000000000000000000000000000000000000000..d893314b051fda0b300a8dc86783c89688420ce2 --- /dev/null +++ b/.oebuild/samples/x86-64/x86-64.yaml @@ -0,0 +1,18 @@ +build_in: docker +machine: generic-x86-64 +toolchain_type: EXTERNAL_TOOLCHAIN:x86-64 +no_layer: false +repos: +- yocto-poky +- yocto-meta-openembedded +local_conf: | +layers: [] +docker_param: + image: swr.cn-north-4.myhuaweicloud.com/openeuler-embedded/openeuler-container:latest + parameters: -itd --network host --cap-add NET_ADMIN + volumns: + - /dev/net/tun:/dev/net/tun + command: bash +bitbake_cmds: +- bitbake openeuler-image +- bitbake openeuler-image -c do_populate_sdk diff --git a/.oebuild/workflows/build_common.groovy b/.oebuild/workflows/build_common.groovy index 8710e98d043d8f0d7362c87ebec4e01f83b4a201..3d56fa153d3bc98afdd53bda16c59a95a89418e5 100644 --- a/.oebuild/workflows/build_common.groovy +++ b/.oebuild/workflows/build_common.groovy @@ -1,32 +1,64 @@ STAGES_RES = [] +OEBUILD_DIR = "/home/jenkins/oebuild_workspace" +AGENT = "/home/jenkins/agent" +LOG_DIR = "openeuler/logs" +YOCTO_NAME = "yocto-meta-openeuler" def downloadEmbeddedCI(String remote_url, String branch){ sh 'rm -rf embedded-ci' sh "git clone ${remote_url} -b ${branch} -v embedded-ci --depth=1" } -def downloadYoctoWithBranch(String workspace, String namespace, String repo, String branch, Integer deepth){ - sh """ - python3 main.py clone_repo \ - -w ${workspace} \ - -r https://gitee.com/${namespace}/${repo} \ - -p ${repo} \ - -v ${branch} \ - -dp ${deepth} - """ +def downloadYoctoWithBranch(String workspace, String repo_remote, String branch, Integer deepth){ + dir(workspace){ + sh 'rm -rf yocto-meta-openeuler' + sh "git clone ${repo_remote} -b ${branch} --depth=${deepth}" + } } -def downloadYoctoWithPr(String workspace, String namespace, String repo, Integer prnum, Integer deepth){ +def downloadYoctoWithPr(String workspace, String repo_remote, Integer prnum, Integer deepth){ + dir(workspace){ + sh 'rm -rf yocto-meta-openeuler' + } sh """ python3 main.py clone_repo \ -w ${workspace} \ - -r https://gitee.com/${namespace}/${repo} \ - -p ${repo} \ + -r ${repo_remote} \ + -p ${YOCTO_NAME} \ -pr ${prnum} \ -dp ${deepth} """ } +def split_build(String build_images, String parallel_str_num){ + def build_list = [:] + def parallel_num = parallel_str_num.toInteger() + def image_list = build_images.replace("\n", " ").split(" ") + // note: It is not possible to directly obtain an integer from dividing two numbers + // here because a safety plugin is required. Therefore, we convert it to a string + // and then split the string to obtain the integer. + def int_num_str = (image_list.size() / parallel_num).toString() + def int_num = int_num_str.split("\\.")[0].toInteger() + int_num = int_num + (image_list.size() % parallel_num > 0 ? 1 : 0) + def build_index = 0 + def build_item = "" + def tmp_num = 0 + for(int i = 0; i < image_list.size(); i++){ + build_item = build_item + " " + image_list[i] + tmp_num = tmp_num + 1 + if(tmp_num >= int_num){ + build_list[build_index] = build_item.trim() + build_index = build_index + 1 + build_item = "" + tmp_num = 0 + } + } + if(build_item != ""){ + build_list[build_index] = build_item.trim() + } + return build_list +} + def formatRes(String name, String action, String check_res, String log_path){ return sh (script: """ python3 main.py serial \ @@ -50,9 +82,16 @@ def getRandomStr(){ } def mkdirOpeneulerLog(){ - def logdir = "openeuler/log" - sh "mkdir -p ${logdir}" - return logdir + dir(AGENT){ + sh "mkdir -p ${LOG_DIR}" + } +} + +def artifactsLogs(){ + dir(AGENT){ + sh "ls -al ${LOG_DIR}" + archiveArtifacts artifacts: "${LOG_DIR}/*.log", fingerprint: true + } } def getNowDatetime(){ @@ -61,15 +100,26 @@ def getNowDatetime(){ """, returnStdout: true).trim() } +def uploadTarImageWithKey(String remote_ip, String remote_dir, String username, String remote_key, String local_dir){ + sh """ + timestamp=`basename ${local_dir}` + dir_name=`dirname ${local_dir}` + cd \${dir_name} + tar zcf \${timestamp}.tar.gz \${timestamp} + ssh -i ${remote_key} -o 'StrictHostKeyChecking no' ${username}@${remote_ip} "mkdir -p ${remote_dir}" + scp -i ${remote_key} -o 'StrictHostKeyChecking no' \${timestamp}.tar.gz ${username}@${remote_ip}:${remote_dir} + """ +} + def uploadImageWithKey(String remote_ip, String remote_dir, String username, String remote_key, String local_dir){ sh """ python3 main.py put_to_dst \ -t 0 \ - -ld ${local_dir} \ - -dd ${remote_dir} \ - -i ${remote_ip} \ - -u ${username} \ - -k ${remote_key} \ + -ld $local_dir \ + -dd $remote_dir \ + -i $remote_ip \ + -u $username \ + -k $remote_key \ -sign \ -d """ @@ -84,531 +134,284 @@ def putSStateCacheToDst(String local_dir, String dst_dir){ """ } -def handleAfterBuildImage(String stage_name, String arch, Integer build_res_code, String log_dir, String random_str, String image_date){ +def uploadLogWithKey(String remote_ip, String remote_dir, String username, String remote_key, String local_path){ + sh """ + scp -i ${remote_key} -o 'StrictHostKeyChecking no' ${local_path} ${username}@${remote_ip}:${remote_dir} + """ +} + +def handleLog(String log_file){ + log_path = "${LOG_DIR}/${log_file}" + if (env.isUploadLog != null && env.isUploadLog == "true"){ + withCredentials([ + file(credentialsId: openEulerLogRemoteKey, variable: 'openEulerLogKey') + ]){ + def local_log_path = "${AGENT}/${log_path}" + uploadLogWithKey(openEulerLogRemoteIP, + openEulerLogRemoteDir, + openEulerLogRemoteUser, + openEulerLogKey, + local_log_path) + } + log_path = "${openEulerLogRemoteUrl}/${log_file}" + }else{ + log_path = "artifact/${log_path}" + } + return log_path +} + +def handleAfterBuildImage(String image_name, + String arch, + Integer build_res_code, + String random_str, + String image_date){ def build_res = "failed" def test_res = "failed" def test_res_code = 1 if (build_res_code == 0){ build_res = "success" - if (putToRemote == true){ + if (env.isUploadImg != null && env.isUploadImg == "true"){ // put the image to remote server - def remote_dir = remoteDir+"/${arch}/${stage_name}" - def local_dir = "${oebuildDir}/build/${stage_name}/output/${image_date}/" - uploadImageWithKey(remoteIP, remote_dir, remoteUname, remoteKey, local_dir) + def remote_dir = openEulerImgRemoteDir+"/${arch}/${image_name}" + def local_dir = "${OEBUILD_DIR}/build/${image_name}/output/${image_date}/" + withCredentials([ + file(credentialsId: env.openEulerImgRemoteKey, variable: 'openEulerImgKey') + ]){ + uploadTarImageWithKey(openEulerImgRemoteIP, + remote_dir, + openEulerImgRemoteUser, + openEulerImgKey, + local_dir) + } } - if (saveSstateCache == true){ + if (env.isSaveCache != null && env.isSaveCache == "true"){ // put sstate-cache to share disk // Due to the current sstate-cache containing soft links pointing to files in // sstate_origin_dir, we first copy it to a temporary folder (during copying, // soft links are defaulted to copy the actual files they point to), then delete // the source folder, and finally perform an mv operation. - def sstate_local_dir = "${oebuildDir}/build/${stage_name}/sstate-cache" - def sstate_dst_dir = "${shareDir}/${ciBranch}/sstate-cache/${stage_name}-temp" + def sstate_local_dir = "${OEBUILD_DIR}/build/${image_name}/sstate-cache" + def sstate_dst_dir = "${shareDir}/${ciBranch}/sstate-cache/${image_name}-temp" putSStateCacheToDst(sstate_local_dir, sstate_dst_dir) - def sstate_origin_dir = "${shareDir}/${ciBranch}/sstate-cache/${stage_name}" - sh (script: """ + def sstate_origin_dir = "${shareDir}/${ciBranch}/sstate-cache/${image_name}" + sh """ rm -rf ${sstate_origin_dir} mv ${sstate_dst_dir} ${sstate_origin_dir} """ - ) } - // Test the build artifacts of the QEMU image and x86 image. - if(stage_name.contains("qemu") && stage_name.contains("x86-64") && !stage_name.contains("riscv")){ - test_res_code = sh (script: """ - python3 main.py utest \ - -target openeuler_image \ - -a ${arch} \ - -td ${oebuildDir}/build/${stage_name} \ - -tm ${mugenRemote} \ - -tb ${mugenBranch} > ${log_dir}/Test-${stage_name}-${random_str}.log - """, returnStatus: true) - if (test_res_code == 0){ - test_res = "success" + if (env.isTest != null && env.isTest == "true"){ + // Test the build artifacts of the QEMU image and x86 image. + if(image_name.contains("qemu") && image_name.contains("x86-64") && !image_name.contains("riscv")){ + test_res_code = sh (script: """ + python3 main.py utest \ + -target openeuler_image \ + -a ${arch} \ + -td ${OEBUILD_DIR}/build/${image_name} \ + -tm ${mugenRemote} \ + -tb ${mugenBranch} > ${AGENT}/${LOG_DIR}/Test-${image_name}-${random_str}.log + """, returnStatus: true) + if (test_res_code == 0){ + test_res = "success" + } + log_file = "Test-${image_name}-${random_str}.log" + log_path = handleLog(log_file) + STAGES_RES.push(formatRes(image_name, "test", test_res, log_path)) } } } - // Check the assignment - archiveArtifacts "${log_dir}/*.log" - STAGES_RES.push(formatRes(stage_name, "build", build_res, "artifact/${log_dir}/Build-${stage_name}-${random_str}.log")) - if (build_res_code == 0 && (stage_name.contains("qemu") && stage_name.contains("x86-64") && !stage_name.contains("riscv"))){ - STAGES_RES.push(formatRes(stage_name, "test", test_res, "artifact/${log_dir}/Test-${stage_name}-${random_str}.log")) - } -} -def prepareSrcCode(workspace){ - sh """ - if [[ -f "${shareDir}/${ciBranch}/src.tar.gz" ]]; then - pushd ${workspace} - oebuild init oebuild_workspace - cd oebuild_workspace - rm -rf build - cp -f ${shareDir}/${ciBranch}/src.tar.gz . - tar zxf src.tar.gz - popd - fi - """ + // if need to upload log to remote + log_file = "Build-${image_name}-${random_str}.log" + log_path = handleLog(log_file) + STAGES_RES.push(formatRes(image_name, "build", build_res, log_path)) +} + +def translateCompileToHost(String yocto_dir, + String arch, + String image_name, + String image_date, + String cache_src_dir){ + def read_image_yaml = "${yocto_dir}/.oebuild/samples/${arch}/${image_name}.yaml" + def samples_dir = "/home/jenkins/agent/samples/${arch}" + sh "mkdir -p ${samples_dir}" + def write_image_yaml = "${samples_dir}/${image_name}.yaml" + def code = """ +import subprocess +try: + from ruamel.yaml import YAML +except ModuleNotFoundError: + subprocess.call(args="pip install ruamel.yaml -i https://pypi.tuna.tsinghua.edu.cn/simple", + stdout=subprocess.DEVNULL, + stderr=subprocess.DEVNULL, + shell=True) + from ruamel.yaml import YAML + +with open("$read_image_yaml", "r", encoding="utf-8") as file: + yaml = YAML() + data = yaml.load(file.read()) + +data["build_in"] = "host" +data["cache_src_dir"] = "$cache_src_dir" +data["local_conf"] += '\\nDATETIME = "$image_date"\\nINHERIT += "rm_work"' + +with open("$write_image_yaml", "w", encoding="utf-8") as file: + yaml = YAML() + yaml.dump(data, file) +""" + def file_name = getRandomStr() + writeFile file: file_name, text: code, encoding: "UTF-8" + sh "python3 ${file_name}" + return write_image_yaml } // dynamic invoke build image function -def dynamicBuild(image_name, image_date, log_dir, random_str){ - image_name = image_name.replace("-", "_") - "build_${image_name}"(image_date, log_dir, random_str) -} - -// Perform the compilation check for the ok3588 image. -def build_ok3588(image_date, log_dir, random_str){ - def stage_name = "ok3588" - def arch = "aarch64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p ok3588 \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) -} - -//Perform the compilation check for the ok3568 image. -def build_ok3568(image_date, log_dir, random_str){ - def stage_name = "ok3568" - def arch = "aarch64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p ok3568 \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) -} - -//Perform the compilation check for the qemu-aarch64-ros-mcs image. -def build_qemu_aarch64_ros_mcs(image_date, log_dir, random_str){ - def stage_name = "qemu-aarch64-ros-mcs" - def arch = "aarch64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p qemu-aarch64 \ - -f "openeuler-ros;openeuler-mcs;openeuler-container" \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) -} - -//Perform the compilation check for the qemu-aarch64-llvm image. -def build_qemu_aarch64_llvm(image_date, log_dir, random_str){ - def stage_name = "qemu-aarch64-llvm" - def arch = "aarch64" +def dynamicBuild(String yocto_dir, + String arch, + String image_name, + String image_date, + String random_str, + String cache_src_dir){ + compile_path = translateCompileToHost(yocto_dir, arch, image_name, image_date, cache_src_dir) + // prepare oebuild build environment def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p qemu-aarch64 \ - -f "clang" \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log + oebuild init ${OEBUILD_DIR} + cd ${OEBUILD_DIR} + mkdir -p build + ln -sf ${yocto_dir} src/yocto-meta-openeuler + oebuild ${compile_path} > ${AGENT}/${LOG_DIR}/Build-${image_name}-${random_str}.log """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) + handleAfterBuildImage(image_name, arch, task_res_code, random_str, image_date) // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) -} - -//Perform the compilation check for the raspberrypi4-64-llvm image. -def build_raspberrypi4_64_llvm(image_date, log_dir, random_str){ - def stage_name = "raspberrypi4-64-llvm" - def arch = "aarch64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p raspberrypi4-64 \ - -f "clang;openeuler-container" \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) -} - -//Perform the compilation check for the qemu-aarch64-kernel6 image. -def build_qemu_aarch64_kernel6(image_date, log_dir, random_str){ - def stage_name = "qemu-aarch64-kernel6" - def arch = "aarch64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p qemu-aarch64 \ - -f "kernel6;openeuler-container" \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) + deleteBuildDir(OEBUILD_DIR + "/build/" + image_name) } -//Perform the compilation check for the raspberrypi4-64 image. -def build_raspberrypi4_64(image_date, log_dir, random_str){ - def stage_name = "raspberrypi4-64" - def arch = "aarch64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p raspberrypi4-64 \ - -f "openeuler-container" \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) -} - -//Perform the compilation check for the raspberrypi4-64-kernel6 image. -def build_raspberrypi4_64_kernel6(image_date, log_dir, random_str){ - def stage_name = "raspberrypi4-64-kernel6" - def arch = "aarch64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p raspberrypi4-64 \ - -f "kernel6;openeuler-container" \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) -} - -//Perform the compilation check for the qemu-aarch64-kernel6-llvm image. -def build_qemu_aarch64_kernel6_llvm(image_date, log_dir, random_str){ - def stage_name = "qemu-aarch64-kernel6-llvm" - def arch = "aarch64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p qemu-aarch64 \ - -f "kernel6;clang;openeuler-container" \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d $stage_name > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) -} - -//Perform the compilation check for the raspberrypi4-64-kernel6-llvm image. -def build_raspberrypi4_64_kernel6_llvm(image_date, log_dir, random_str){ - def stage_name = "raspberrypi4-64-kernel6-llvm" - def arch = "aarch64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p raspberrypi4-64 \ - -f "kernel6;clang;openeuler-container" \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) -} - -//Perform the compilation check for the raspberrypi4-64-rt-hmi image. -def build_raspberrypi4_64_rt_hmi(image_date, log_dir, random_str){ - def stage_name = "raspberrypi4-64-rt-hmi" - def arch = "aarch64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p raspberrypi4-64 \ - -f "openeuler-rt;hmi;openeuler-container" \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) -} - -//Perform the compilation check for the raspberrypi4-64-kernel6-rt-hmi image. -def build_raspberrypi4_64_kernel6_rt_hmi(image_date, log_dir, random_str){ - def stage_name = "raspberrypi4-64-kernel6-rt-hmi" - def arch = "aarch64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p raspberrypi4-64 \ - -f "openeuler-rt;hmi;kernel6;openeuler-container" \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) -} - -//Perform the compilation check for the hieulerpi1 image. -def build_hieulerpi1(image_date, log_dir, random_str){ - def stage_name = "hieulerpi1" - def arch = "aarch64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p hieulerpi1 \ - -f "openeuler-container" \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date}} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) -} - -//Perform the compilation check for the hieulerpi1-tiny image. -def build_hieulerpi1_tiny(image_date, log_dir, random_str){ - def stage_name = "hieulerpi1-tiny" - def arch = "aarch64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p hieulerpi1 \ - -i "openeuler-image-tiny" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) -} - -//Perform the compilation check for the hieulerpi1-ros image. -def build_hieulerpi1_ros(image_date, log_dir, random_str){ - def stage_name = "hieulerpi1-ros" - def arch = "aarch64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p hieulerpi1 \ - -f "openeuler-ros;openeuler-container" \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) -} - -//Perform the compilation check for the qemu-arm image. -def build_qemu_arm(image_date, log_dir, random_str){ - def stage_name = "qemu-arm" - def arch = "arm" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm32le \ - -p qemu-arm \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) -} - -//Perform the compilation check for the qemu-riscv64 image. -def build_qemu_riscv64(image_date, log_dir, random_str){ - def stage_name = "qemu-riscv64" - def arch = "riscv64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_riscv64 \ - -p qemu-riscv64 \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) -} - -//Perform the compilation check for the x86-64-rt-hmi-ros-mcs image. -def build_x86_64_rt_hmi_ros_mcs(image_date, log_dir, random_str){ - def stage_name = "x86-64-rt-hmi-ros-mcs" - def arch = "x86-64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_x86_64 \ - -p x86-64 \ - -f "openeuler-rt;hmi;openeuler-ros;openeuler-mcs" \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) +def stashRepo(String workdir,String stash_name){ + dir(workdir+"/"+stash_name){ + sh """ + if [ -d .git ];then + mv .git .git_bak + fi + """ + stash(stash_name) + // the stash will not include .git, so mv .git to .git_bak + sh """ + if [ -d .git_bak ];then + mv .git_bak .git + fi + """ + } } -//Perform the compilation check for the x86-64-kernel6-rt-hmi-ros-mcs image. -def build_x86_64_kernel6_rt_hmi_ros_mcs(image_date, log_dir, random_str){ - def stage_name = "x86-64-kernel6-rt-hmi-ros-mcs" - def arch = "x86-64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_x86_64 \ - -p x86-64 \ - -f "kernel6;openeuler-rt;hmi;openeuler-ros;openeuler-mcs" \ - -i "openeuler-image;openeuler-image -c do_populate_sdk" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) +def unstashRepo(String workdir,String stash_name){ + dir(workdir){ + sh "rm -rf $stash_name" + sh "mkdir -p $stash_name" + } + dir(workdir+"/"+stash_name){ + unstash(name: stash_name) + sh """ + if [ -d .git_bak ] && [ ! -d .git ];then + mv .git_bak .git + fi + """ + } } -//Perform the compilation check for the qemu-aarch64 image. -def build_qemu_aarch64(image_date, log_dir, random_str){ - def stage_name = "qemu-aarch64" - def arch = "aarch64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p qemu-aarch64 \ - -f "openeuler-container" \ - -i "openeuler-image" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) +def buildTask(String build_imgs, String image_date){ + unstashRepo('/home/jenkins/agent', 'embedded-ci') + unstashRepo('/home/jenkins/agent', 'yocto-meta-openeuler') + dir('/home/jenkins/agent/embedded-ci'){ + def randomStr = getRandomStr() + mkdirOpeneulerLog() + cacheSrcDir = "$shareDir/$ciBranch/oebuild_workspace/src" + for (imageName in build_imgs.split()){ + println "build ${imageName} ..." + imageSplit = imageName.split("/") + yoctoDir = "/home/jenkins/agent/yocto-meta-openeuler" + dynamicBuild(yoctoDir, + imageSplit[0], + imageSplit[1], + image_date, + randomStr, + cacheSrcDir) + } + artifactsLogs() + } } -//Perform the compilation check for the x86-64 image. -def build_x86_64(image_date, log_dir, random_str){ - def stage_name = "x86-64" - def arch = "x86-64" - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a ${arch} \ - -t /usr1/openeuler/gcc/openeuler_gcc_x86_64 \ - -p x86-64 \ - -i "openeuler-image" \ - -oe "\\-\\-no_layer" \ - -dt ${image_date} \ - -d ${stage_name} > ${log_dir}/Build-${stage_name}-${random_str}.log - """, returnStatus: true) - handleAfterBuildImage(stage_name, arch, task_res_code, log_dir, random_str, image_date) - // delete build directory - deleteBuildDir(oebuildDir + "/build/" + stage_name) +def get_remote_images(String base_url) { + def code = """ +import requests +import subprocess +try: + from bs4 import BeautifulSoup +except ModuleNotFoundError: + subprocess.call(args="pip install bs4 -i https://pypi.tuna.tsinghua.edu.cn/simple", + stdout=subprocess.DEVNULL, + stderr=subprocess.DEVNULL, + shell=True) + subprocess.call(args="pip install lxml -i https://pypi.tuna.tsinghua.edu.cn/simple", + stdout=subprocess.DEVNULL, + stderr=subprocess.DEVNULL, + shell=True) + from bs4 import BeautifulSoup +import re + +def get_pre_text(url, typ): + res = [] + content = requests.get(url) + resHTML = content.text + soup = BeautifulSoup(resHTML, 'lxml') + for item in soup.pre.children: + for dir_name in item.text.split(" "): + if typ == "dir" and dir_name.endswith("/") and not dir_name.startswith("."): + res.append(dir_name) + continue + if typ == "gz" and dir_name.endswith(".tar.gz") and not dir_name.startswith("."): + res.append(dir_name) + return res + +# get image list +base_url = "$base_url" +image_list = get_pre_text(base_url, "dir") +target_list = [] +for image in image_list: + time_list = get_pre_text(base_url + "/" + image, "gz") + tmp_times = [] + for time_name in time_list: + match = re.search("^[0-9]{14}(.tar.gz)\$", time_name) + if match: + tmp_times.append(time_name.replace(".tar.gz", "")) + tmp_times.sort(reverse=True) + if len(tmp_times) > 0: + target_list.append(image + tmp_times[0]) + +print(" ".join(target_list)) +""" + +file_name = getRandomStr() +writeFile file: file_name, text: code, encoding: "UTF-8" +return sh (script: """ + python3 ${file_name} +""", returnStdout: true).trim() +} + +def remote_address_exists(String base_url){ + def code = """ +import requests + +content = requests.get("$base_url") +if content.status_code == 200: + print("yes") +else: + print("no") +""" + +file_name = getRandomStr() +writeFile file: file_name, text: code, encoding: "UTF-8" +return sh (script: """ + python3 ${file_name} +""", returnStdout: true).trim() } return this diff --git a/.oebuild/workflows/init_env.groovy b/.oebuild/workflows/init_env.groovy new file mode 100644 index 0000000000000000000000000000000000000000..ff60333d90d7b26e539ca6cfe56b01cb026da3f3 --- /dev/null +++ b/.oebuild/workflows/init_env.groovy @@ -0,0 +1,106 @@ +def init_environment(){ + // set embedded + if (env.embeddedRemote == null || env.embeddedRemote == ""){ + env.embeddedRemote = "https://gitee.com/openeuler/embedded-ci.git" + } + if (env.embeddedBranch == null || env.embeddedBranch == ""){ + env.embeddedBranch = "master" + } + // set build repo + if (env.yoctoRemote == null || env.yoctoRemote == ""){ + env.yoctoRemote = "https://gitee.com/openeuler/yocto-meta-openeuler.git" + } + if (env.yoctoBranch == null || env.yoctoBranch == ""){ + env.yoctoBranch = "openEuler-24.03-LTS" + } + // set test mugen + if (env.isTest == null || env.isTest == ""){ + env.isTest = "false" + } + if (env.mugenRemote == null || env.mugenRemote == ""){ + env.mugenRemote = "https://gitee.com/openeuler/mugen.git" + } + if (env.mugenBranch == null || env.mugenBranch == ""){ + env.mugenBranch = "master" + } + // set remote log + if (env.isUploadLog == null || env.isUploadLog == ""){ + env.isUploadLog = "false" + } + if (env.openEulerLogRemoteIP == null || env.openEulerLogRemoteIP == ""){ + env.openEulerLogRemoteIP = "43.136.114.130" + } + if (env.openEulerLogRemoteUser == null || env.openEulerLogRemoteUser == ""){ + env.openEulerLogRemoteUser = "openeuler" + } + if (env.openEulerLogRemoteKey == null || env.openEulerLogRemoteKey == ""){ + env.openEulerLogRemoteKey = "openEulerEmbeddedRemoteKey" + } + if (env.openEulerLogRemoteDir == null || env.openEulerLogRemoteDir == ""){ + env.openEulerLogRemoteDir = "/var/www/html/openeuler-log" + } + if (env.openEulerLogRemoteUrl == null || env.openEulerLogRemoteUrl == ""){ + env.openEulerLogRemoteUrl = "http://43.136.114.130/openeuler-log" + } + // set remote image + if (env.isUploadImg == null || env.isUploadImg == ""){ + env.isUploadImg = "false" + } + if (env.openEulerImgRemoteIP == null || env.openEulerImgRemoteIP == ""){ + env.openEulerImgRemoteIP = "43.136.114.130" + } + if (env.openEulerImgRemoteUser == null || env.openEulerImgRemoteUser == ""){ + env.openEulerImgRemoteUser = "openeuler" + } + if (env.openEulerImgRemoteKey == null || env.openEulerImgRemoteKey == ""){ + env.openEulerImgRemoteKey = "openEulerEmbeddedRemoteKey" + } + if (env.openEulerImgRemoteDir == null || env.openEulerImgRemoteDir == ""){ + env.openEulerImgRemoteDir = "/var/www/html/openeuler-ci/openEuler-24.03-LTS" + } + // set comment + if (env.isComment == null || env.isComment == ""){ + env.isComment = "false" + } + if (env.giteeId == null || env.giteeId == ""){ + env.giteeId = "gitee-api-token" + } + if (env.commentNameSpace == null || env.commentNameSpace == ""){ + env.commentNameSpace = "openeuler" + } + if (env.commentRepo == null || env.commentRepo == ""){ + env.commentRepo = "yocto-embedded-tools" + } + // set other + if (env.isSaveCache == null || env.isSaveCache == ""){ + env.isSaveCache = "false" + } + if (env.shareDir == null || env.shareDir == ""){ + env.shareDir = "/home/jenkins/ccache" + } + if (env.ciBranch == null || env.ciBranch == ""){ + env.ciBranch = "openEuler-24.03-LTS" + } + if (env.parallelNum == null || env.parallelNum == ""){ + env.parallelNum = "5" + } + if (env.buildImages == null || env.buildImages == ""){ + env.buildImages = "aarch64/qemu-aarch64 aarch64/hieulerpi1 arm32/qemu-arm riscv/qemu-riscv54 x86-64/x86-64" + } + if (env.baseImgUrl == null || env.baseImgUrl == ""){ + env.baseImgUrl = "http://43.136.114.130/openeuler-ci/openEuler-24.03-LTS" + } + if (env.targetImgUrl == null || env.targetImgUrl == ""){ + env.targetImgUrl = "http://121.36.84.172/dailybuild/EBS-openEuler-24.03-LTS/EBS-openEuler-24.03-LTS/embedded_img" + } + if (env.archList == null || env.archList == ""){ + env.archList = "aarch64 arm32 x86-64 riscv64" + } + + // gate environment param + if (env.jenkinsId == null || env.jenkinsId == ""){ + + } +} + +return this diff --git a/.oebuild/workflows/jenkinsfile_ci b/.oebuild/workflows/jenkinsfile_ci index 43bdb213092aef403720d703bb9f89c2d5716788..e569ab532320755ca7b4ac8c1f7fc75e8460ed84 100644 --- a/.oebuild/workflows/jenkinsfile_ci +++ b/.oebuild/workflows/jenkinsfile_ci @@ -1,190 +1,121 @@ def BUILD_COM def IMAGE_DATE = "" +def BUILD_IMGS pipeline { - agent { node "${node}" } + agent any environment { PATH = "/home/jenkins/.local/bin:${env.PATH}" } stages { stage("init task"){ steps{ - script{ - BUILD_COM = load '.oebuild/workflows/build_common.groovy' + dir("${env.WORKSPACE}"){ + stash(name: "scm") } - dir('/home/jenkins/agent'){ - script{ - BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) - IMAGE_DATE = BUILD_COM.getNowDatetime() + script{ + node("${node}"){ + dir("/home/jenkins/agent/scm"){ + unstash(name: "scm") + BUILD_COM = load '.oebuild/workflows/build_common.groovy' + IMAGE_DATE = BUILD_COM.getNowDatetime() + INIT_ENV = load '.oebuild/workflows/init_env.groovy' + INIT_ENV.init_environment() + BUILD_IMGS = BUILD_COM.split_build(env.buildImages, env.parallelNum) + } + dir('/home/jenkins/agent'){ + BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) + } + dir('/home/jenkins/agent/embedded-ci'){ + BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", yoctoRemote, yoctoBranch, 1) + } + BUILD_COM.stashRepo('/home/jenkins/agent', 'embedded-ci') + BUILD_COM.stashRepo('/home/jenkins/agent', 'yocto-meta-openeuler') } } } } stage("build task"){ - parallel { + parallel{ stage("group1"){ - agent { node "${node}" } + when { expression { BUILD_IMGS.size() >= 1 } } steps { - dir('/home/jenkins/agent'){ - script{ - BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) - } - } - dir('/home/jenkins/agent/embedded-ci'){ - script{ - withCredentials([ - file(credentialsId: remoteID, variable: 'remoteKey') - ]){ - //下载yocto-meta-openeuler代码 - BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", repoNamespace, repoName, ciBranch, 1) - BUILD_COM.prepareSrcCode("/home/jenkins") - def random_str = BUILD_COM.getRandomStr() - def log_dir = BUILD_COM.mkdirOpeneulerLog() - - for (image_name in group1.split()){ - println "build ${image_name} ..." - BUILD_COM.dynamicBuild(image_name, IMAGE_DATE, log_dir, random_str) - } - } + script{ + node("${node}") { + BUILD_COM.buildTask(BUILD_IMGS[0], IMAGE_DATE) } } } } stage("group2"){ - agent { node "${node}" } + when { expression { BUILD_IMGS.size() >= 2 } } steps { - dir('/home/jenkins/agent'){ - script{ - BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) - } - } - dir('/home/jenkins/agent/embedded-ci'){ - script{ - withCredentials([ - file(credentialsId: remoteID, variable: 'remoteKey') - ]){ - //下载yocto-meta-openeuler代码 - BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", repoNamespace, repoName, ciBranch, 1) - BUILD_COM.prepareSrcCode("/home/jenkins") - def random_str = BUILD_COM.getRandomStr() - def log_dir = BUILD_COM.mkdirOpeneulerLog() - - for (image_name in group2.split()){ - println "build ${image_name} ..." - BUILD_COM.dynamicBuild(image_name, IMAGE_DATE, log_dir, random_str) - } - } + script{ + node("${node}"){ + BUILD_COM.buildTask(BUILD_IMGS[1], IMAGE_DATE) } } } } stage("group3"){ - agent { node "${node}" } + when { expression { BUILD_IMGS.size() >= 3 } } steps { - dir('/home/jenkins/agent'){ - script{ - BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) - } - } - dir('/home/jenkins/agent/embedded-ci'){ - script{ - withCredentials([ - file(credentialsId: remoteID, variable: 'remoteKey') - ]){ - //下载yocto-meta-openeuler代码 - BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", repoNamespace, repoName, ciBranch, 1) - BUILD_COM.prepareSrcCode("/home/jenkins") - def random_str = BUILD_COM.getRandomStr() - def log_dir = BUILD_COM.mkdirOpeneulerLog() - - for (image_name in group3.split()){ - println "build ${image_name} ..." - BUILD_COM.dynamicBuild(image_name, IMAGE_DATE, log_dir, random_str) - } - } + script{ + node("${node}"){ + BUILD_COM.buildTask(BUILD_IMGS[2], IMAGE_DATE) } } } } stage("group4"){ - agent { node "${node}" } + when { expression { BUILD_IMGS.size() >= 4 } } steps { - dir('/home/jenkins/agent'){ - script{ - BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) - } - } - dir('/home/jenkins/agent/embedded-ci'){ - script{ - withCredentials([ - file(credentialsId: remoteID, variable: 'remoteKey') - ]){ - //下载yocto-meta-openeuler代码 - BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", repoNamespace, repoName, ciBranch, 1) - BUILD_COM.prepareSrcCode("/home/jenkins") - def random_str = BUILD_COM.getRandomStr() - def log_dir = BUILD_COM.mkdirOpeneulerLog() - - for (image_name in group4.split()){ - println "build ${image_name} ..." - BUILD_COM.dynamicBuild(image_name, IMAGE_DATE, log_dir, random_str) - } - } + script{ + node("${node}"){ + BUILD_COM.buildTask(BUILD_IMGS[3], IMAGE_DATE) } } } } stage("group5"){ - agent { node "${node}" } + when { expression { BUILD_IMGS.size() >= 5 } } steps { - dir('/home/jenkins/agent'){ - script{ - BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) - } - } - dir('/home/jenkins/agent/embedded-ci'){ - script{ - withCredentials([ - file(credentialsId: remoteID, variable: 'remoteKey') - ]){ - //下载yocto-meta-openeuler代码 - BUILD_COM.downloadYoctoWithBranch("/home/jenkins/agent", repoNamespace, repoName, ciBranch, 1) - BUILD_COM.prepareSrcCode("/home/jenkins") - def random_str = BUILD_COM.getRandomStr() - def log_dir = BUILD_COM.mkdirOpeneulerLog() - - for (image_name in group5.split()){ - println "build ${image_name} ..." - BUILD_COM.dynamicBuild(image_name, IMAGE_DATE, log_dir, random_str) - } - } + script{ + node("${node}"){ + BUILD_COM.buildTask(BUILD_IMGS[4], IMAGE_DATE) } } } } } } - } - post { - always { - dir('/home/jenkins/agent/embedded-ci'){ + stage("comment"){ + when { + expression { env.isComment != null && env.isComment == "true" } + } + steps { script{ - withCredentials([ - string(credentialsId: "${giteeId}", variable: 'GITEETOKEN') - ]){ - def chks = "" - for (int i = 0; i < BUILD_COM.STAGES_RES.size(); ++i) { - chks = "${chks} -chk ${BUILD_COM.STAGES_RES[i]}" + node("${node}"){ + BUILD_COM.unstashRepo('/home/jenkins/agent', 'embedded-ci') + dir('/home/jenkins/agent/embedded-ci'){ + withCredentials([ + string(credentialsId: "${giteeId}", variable: 'GITEETOKEN') + ]){ + def chks = "" + for (int i = 0; i < BUILD_COM.STAGES_RES.size(); ++i) { + chks = "${chks} -chk ${BUILD_COM.STAGES_RES[i]}" + } + sh """ + python3 main.py comment \ + -m ci \ + -o ${commentNameSpace} \ + -p ${commentRepo} \ + -b ${ciBranch} \ + -gt ${GITEETOKEN} \ + ${chks} + """ + } } - sh """ - python3 main.py comment \ - -m ci \ - -o ${repoNamespace} \ - -p ${commentRepoName} \ - -b ${ciBranch} \ - -gt ${GITEETOKEN} \ - ${chks} - """ } } } diff --git a/.oebuild/workflows/jenkinsfile_gate b/.oebuild/workflows/jenkinsfile_gate index cee9a7dc45051e06846aad9d64bc607fa21269ba..48f7e9942d07515581f851bbfd7d5d9ab4ce44b9 100644 --- a/.oebuild/workflows/jenkinsfile_gate +++ b/.oebuild/workflows/jenkinsfile_gate @@ -1,98 +1,72 @@ -def downloadEmbeddedCI(){ - sh 'rm -rf embedded-ci' - sh "git clone ${embeddedRemote} -b ${embeddedBranch} -v embedded-ci --depth=1" -} - -def downloadYoctoWithPr(String workspace, String namespace, String repo, Integer prnum, Integer deepth){ - sh """ - python3 main.py clone_repo \ - -w ${workspace} \ - -r https://gitee.com/${namespace}/${repo} \ - -p ${repo} \ - -pr ${prnum} \ - -dp ${deepth} - """ -} - -def formatRes(String name, String action, String check_res, String log_path){ - return sh (script: """ - python3 main.py serial \ - -c name=$name \ - -c action=$action \ - -c result=$check_res \ - -c log_path=$log_path - """, returnStdout: true).trim() -} - -def getRandomStr(){ - return sh(script: """ - cat /proc/sys/kernel/random/uuid - """, returnStdout: true).trim() -} - -def mkdirOpeneulerLog(){ - def logdir = "openeuler/log" - sh "mkdir -p $logdir" - return logdir -} - -def prepare_srccode(workspace){ - sh """ - if [[ -f "$SHARE_DIR/$giteeTargetBranch/src.tar.gz" ]]; then - pushd ${workspace} - oebuild init oebuild_workspace - cd oebuild_workspace - rm -rf build - cp -f $SHARE_DIR/$giteeTargetBranch/src.tar.gz . - tar zxf src.tar.gz - popd - fi - """ -} - -def STAGES_RES = [] +def BUILD_COM +def IMAGE_DATE = "" pipeline { - agent { node "${node}" } + agent any environment { PATH = "/home/jenkins/.local/bin:${env.PATH}" } stages { - stage("clone embedded-ci"){ + stage("init task"){ steps{ - dir('/home/jenkins/agent'){ - script{ - downloadEmbeddedCI() + dir("${env.WORKSPACE}"){ + stash(name: "scm") + } + script{ + node("${node}"){ + dir("/home/jenkins/agent/scm"){ + unstash(name: "scm") + BUILD_COM = load '.oebuild/workflows/build_common.groovy' + IMAGE_DATE = BUILD_COM.getNowDatetime() + INIT_ENV = load '.oebuild/workflows/init_env.groovy' + INIT_ENV.init_environment() + } + dir('/home/jenkins/agent'){ + BUILD_COM.downloadEmbeddedCI(embeddedRemote, embeddedBranch) + } + dir('/home/jenkins/agent/embedded-ci'){ + def repoRemote = "https://gitee.com/$giteeTargetNamespace/$giteeRepoName" + BUILD_COM.downloadYoctoWithPr( + "/home/jenkins/agent", + repoRemote, + Integer.parseInt(giteePullRequestid), + Integer.parseInt(commitCount)) + } + BUILD_COM.stashRepo('/home/jenkins/agent', 'embedded-ci') + BUILD_COM.stashRepo('/home/jenkins/agent', 'yocto-meta-openeuler') } } } } stage("pre") { steps { - dir('/home/jenkins/agent/embedded-ci'){ - script{ - withCredentials([ - string(credentialsId: "${giteeId}", variable: 'GITEETOKEN'), - usernamePassword(credentialsId: "${jenkinsId}", usernameVariable: 'JUSER',passwordVariable: 'JPASSWD')]){ - // 执行pre - sh """ - python3 main.py pre \ - -s $SHARE_DIR \ - -o $giteeTargetNamespace \ - -p $giteeRepoName \ - -pr $giteePullRequestid \ - -juser $JUSER \ - -jpwd $JPASSWD \ - -gt $GITEETOKEN - """ - // 执行pr_check - env.pr_check_result = sh (script: """ - python3 main.py pr_check \ - -o $giteeTargetNamespace \ - -p $giteeRepoName \ - -pr $giteePullRequestid \ - -gt $GITEETOKEN - """, returnStdout: true).trim() + script{ + node("${node}"){ + BUILD_COM.unstashRepo('/home/jenkins/agent', 'embedded-ci') + dir('/home/jenkins/agent/embedded-ci'){ + withCredentials([ + string(credentialsId: "${giteeId}", variable: 'GITEETOKEN'), + usernamePassword(credentialsId: "${jenkinsId}", usernameVariable: 'JUSER',passwordVariable: 'JPASSWD')]){ + // 执行pre + sh """ + python3 main.py pre \ + -s $shareDir \ + -o $giteeTargetNamespace \ + -p $giteeRepoName \ + -pr $giteePullRequestid \ + -juser $JUSER \ + -jpwd $JPASSWD \ + -gt $GITEETOKEN + """ + // 执行pr_check + env.pr_check_result = sh (script: """ + python3 main.py pr_check \ + -o $giteeTargetNamespace \ + -p $giteeRepoName \ + -pr $giteePullRequestid \ + -gt $GITEETOKEN + """, returnStdout: true).trim() + } } } } @@ -100,69 +74,80 @@ pipeline { } stage("code check"){ steps { - dir('/home/jenkins/agent/embedded-ci'){ - script{ - withCredentials([string(credentialsId: "${giteeId}", variable: 'GITEETOKEN')]){ - // 下载yocto源码 - downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), Integer.parseInt(commitCount)) - def randomStr = getRandomStr() - def logDir = mkdirOpeneulerLog() - // 执行commit检查 - def task_res_code = sh (script: """ - python3 main.py codecheck \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target commit_msg \ - -o $giteeTargetNamespace \ - -p $giteeRepoName \ - -gt $GITEETOKEN \ - -pr $giteePullRequestid > ${logDir}/${randomStr}.log - """, returnStatus: true) - def check_res = "" - if (task_res_code == 0){ - check_res = "success" - }else{ - check_res = "failed" - env.code_check_result = "failed" + script{ + node("${node}"){ + BUILD_COM.unstashRepo('/home/jenkins/agent', 'embedded-ci') + BUILD_COM.unstashRepo('/home/jenkins/agent', 'yocto-meta-openeuler') + def logDir = BUILD_COM.AGENT+"/"+BUILD_COM.LOG_DIR + dir('/home/jenkins/agent/embedded-ci'){ + // check commit_msg + withCredentials([string(credentialsId: "${giteeId}", variable: 'GITEETOKEN')]){ + def randomStr = BUILD_COM.getRandomStr() + BUILD_COM.mkdirOpeneulerLog() + // 执行commit检查 + def taskResCode = sh (script: """ + python3 main.py codecheck \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target commit_msg \ + -o $giteeTargetNamespace \ + -p $giteeRepoName \ + -gt $GITEETOKEN \ + -pr $giteePullRequestid > ${logDir}/${randomStr}.log + """, returnStatus: true) + def checkRes = "" + if (taskResCode == 0){ + checkRes = "success" + }else{ + checkRes = "failed" + env.code_check_result = "failed" + } + // 对检查赋值 + // env.task_check_commit = formatRes("check", "commit_check", check_res, "xxx") + BUILD_COM.artifactsLogs() + BUILD_COM.STAGES_RES.push( + BUILD_COM.formatRes( + "check", + "commit_check", + checkRes, + "artifact/${BUILD_COM.LOG_DIR}/${randomStr}.log")) } - // 对检查赋值 - // env.task_check_commit = formatRes("check", "commit_check", check_res, "xxx") - archiveArtifacts "${logDir}/*.log" - STAGES_RES.push(formatRes("check", "commit_check", check_res, "artifact/${logDir}/${randomStr}.log")) - } - } - } - dir('/home/jenkins/agent/embedded-ci'){ - script{ - withCredentials([string(credentialsId: "${giteeId}", variable: 'GITEETOKEN')]){ - // 执行scope检查 - def randomStr = getRandomStr() - def logDir = mkdirOpeneulerLog() - // 执行commit检查 - def task_res_code = sh (script: """ - python3 main.py codecheck \ - -target commit_scope \ - -o $giteeTargetNamespace \ - -p $giteeRepoName \ - -gt $GITEETOKEN \ - -pr $giteePullRequestid > ${logDir}/${randomStr}.log - """, returnStatus: true) - def check_res = "" - if (task_res_code == 0){ - check_res = "success" - }else{ - check_res = "failed" - env.code_check_result = "failed" + // check commit_scope + withCredentials([string(credentialsId: "${giteeId}", variable: 'GITEETOKEN')]){ + // 执行scope检查 + def randomStr = BUILD_COM.getRandomStr() + BUILD_COM.mkdirOpeneulerLog() + // 执行commit检查 + def taskResCode = sh (script: """ + python3 main.py codecheck \ + -target commit_scope \ + -o $giteeTargetNamespace \ + -p $giteeRepoName \ + -gt $GITEETOKEN \ + -pr $giteePullRequestid > ${logDir}/${randomStr}.log + """, returnStatus: true) + def checkRes = "" + if (taskResCode == 0){ + checkRes = "success" + }else{ + checkRes = "failed" + env.code_check_result = "failed" + } + // 对检查赋值 + // env.task_check_scope = formatRes("check", "scope_check", check_res, "xxx") + BUILD_COM.artifactsLogs() + BUILD_COM.STAGES_RES.push( + BUILD_COM.formatRes( + "check", + "scope_check", + checkRes, + "artifact/${BUILD_COM.LOG_DIR}/${randomStr}.log")) } - // 对检查赋值 - // env.task_check_scope = formatRes("check", "scope_check", check_res, "xxx") - archiveArtifacts "${logDir}/*.log" - STAGES_RES.push(formatRes("check", "scope_check", check_res, "artifact/${logDir}/${randomStr}.log")) } } } } } - stage("check task"){ + stage("build check"){ when { expression { return env.code_check_result != "failed" @@ -170,276 +155,159 @@ pipeline { } parallel { stage("docs"){ - agent { node "${node}" } when { expression { return env.pr_check_result.contains("docs") } } steps{ - dir('/home/jenkins/agent'){ - script{ - downloadEmbeddedCI() - } - } - dir('/home/jenkins/agent/embedded-ci'){ - script{ - // 执行docs编译 - // 下载yocto源码 - downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), 1) - def randomStr = getRandomStr() - def logDir = mkdirOpeneulerLog() - // 执行文档编译检查 - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_doc > ${logDir}/${randomStr}.log - """, returnStatus: true) - def check_res = "" - if (task_res_code == 0){ - check_res = "success" - }else{ - check_res = "failed" + script{ + node("${node}"){ + BUILD_COM.unstash('/home/jenkins/agent', 'embedded-ci') + BUILD_COM.unstash('/home/jenkins/agent', 'yocto-meta-openeuler') + def logDir = BUILD_COM.AGENT+"/"+BUILD_COM.LOG_DIR + dir('/home/jenkins/agent/embedded-ci'){ + // 执行docs编译 + def randomStr = BUILD_COM.getRandomStr() + BUILD_COM.mkdirOpeneulerLog() + // 执行文档编译检查 + def taskResCode = sh (script: """ + python3 main.py build \ + -c /home/jenkins/agent/yocto-meta-openeuler \ + -target openeuler_doc > ${logDir}/${randomStr}.log + """, returnStatus: true) + def checkRes = "" + if (taskResCode == 0){ + checkRes = "success" + }else{ + checkRes = "failed" + } + // 对检查赋值 + // env.task_build_docs = formatRes("docs", "build", check_res, "xxx") + BUILD_COM.artifactsLogs() + BUILD_COM.STAGES_RES.push( + BUILD_COM.formatRes( + "docs", + "build", + checkRes, + "artifact/${BUILD_COM.LOG_DIR}/${randomStr}.log")) } - // 对检查赋值 - // env.task_build_docs = formatRes("docs", "build", check_res, "xxx") - archiveArtifacts "${logDir}/*.log" - STAGES_RES.push(formatRes("docs", "build", check_res, "artifact/${logDir}/${randomStr}.log")) } } } } stage("qemu-aarch64"){ - agent { node "${node}" } when { expression { return env.pr_check_result.contains("code") } } steps { - dir('/home/jenkins/agent'){ - script{ - downloadEmbeddedCI() - } - } - dir('/home/jenkins/agent/embedded-ci'){ - script{ - // 执行qemu_aarch64编译 - // 下载yocto源码 - downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), 1) - prepare_srccode("/home/jenkins") - def randomStr = getRandomStr() - def logDir = mkdirOpeneulerLog() - // 执行镜像编译检查 - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a aarch64 \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p qemu-aarch64 \ - -i openeuler-image \ - -s_in "$SHARE_DIR/${giteeTargetBranch}/sstate-cache/qemu-aarch64" \ - -d qemu-aarch64 > ${logDir}/${randomStr}.log - """, returnStatus: true) - - def check_res = "" - if (task_res_code == 0){ - check_res = "success" - }else{ - check_res = "failed" - } - // 对检查赋值 - archiveArtifacts "${logDir}/*.log" - STAGES_RES.push(formatRes("qemu-aarch64", "build", check_res, "artifact/${logDir}/${randomStr}.log")) - } - } - } - } - stage("qemu-aarch64-tiny"){ - agent { node "${node}" } - when { - expression { - return env.pr_check_result.contains("code") - } - } - steps { - dir('/home/jenkins/agent'){ - script{ - downloadEmbeddedCI() - } - } - dir('/home/jenkins/agent/embedded-ci'){ - script{ - // 执行qemu_aarch64编译 - // 下载yocto源码 - downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), 1) - prepare_srccode("/home/jenkins") - def randomStr = getRandomStr() - def logDir = mkdirOpeneulerLog() - // 执行镜像编译检查 - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a aarch64 \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p qemu-aarch64 \ - -i openeuler-image-tiny \ - -s_in "$SHARE_DIR/${giteeTargetBranch}/sstate-cache/qemu-aarch64" \ - -d qemu-aarch64-tiny > ${logDir}/${randomStr}.log - """, returnStatus: true) - - def check_res = "" - if (task_res_code == 0){ - check_res = "success" - }else{ - check_res = "failed" + script{ + node("${node}"){ + BUILD_COM.unstashRepo('/home/jenkins/agent', 'embedded-ci') + BUILD_COM.unstashRepo('/home/jenkins/agent', 'yocto-meta-openeuler') + dir('/home/jenkins/agent/embedded-ci'){ + // 执行qemu-aarch64编译 + def randomStr = BUILD_COM.getRandomStr() + def cacheSrcDir = "$shareDir/$giteeTargetBranch/oebuild_workspace/src" + def yoctoDir = "/home/jenkins/agent/yocto-meta-openeuler" + BUILD_COM.mkdirOpeneulerLog() + // 执行镜像编译检查 + BUILD_COM.dynamicBuild(yoctoDir, + "aarch64", + "qemu-aarch64", + IMAGE_DATE, + randomStr, + cacheSrcDir) } - // 对检查赋值 - archiveArtifacts "${logDir}/*.log" - STAGES_RES.push(formatRes("qemu-aarch64-tiny", "build", check_res, "artifact/${logDir}/${randomStr}.log")) } } } } - stage("qemu-arm"){ - agent { node "${node}" } + stage("qemu-arm32"){ when { expression { return env.pr_check_result.contains("code") } } steps { - dir('/home/jenkins/agent'){ - script{ - downloadEmbeddedCI() - } - } - dir('/home/jenkins/agent/embedded-ci'){ - script{ - // 执行qemu_arm编译 - // 下载yocto源码 - downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), 1) - prepare_srccode("/home/jenkins") - def randomStr = getRandomStr() - def logDir = mkdirOpeneulerLog() - // 执行镜像编译检查 - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a arm \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm32le \ - -p qemu-arm \ - -i openeuler-image \ - -s_in "$SHARE_DIR/${giteeTargetBranch}/sstate-cache/qemu-arm" \ - -d qemu-arm32 > ${logDir}/${randomStr}.log - """, returnStatus: true) - - def check_res = "" - if (task_res_code == 0){ - check_res = "success" - }else{ - check_res = "failed" + script{ + node("${node}"){ + BUILD_COM.unstashRepo('/home/jenkins/agent', 'embedded-ci') + BUILD_COM.unstashRepo('/home/jenkins/agent', 'yocto-meta-openeuler') + dir('/home/jenkins/agent/embedded-ci'){ + // 执行qemu-arm32编译 + def randomStr = BUILD_COM.getRandomStr() + def cacheSrcDir = "$shareDir/$giteeTargetBranch/oebuild_workspace/src" + def yoctoDir = "/home/jenkins/agent/yocto-meta-openeuler" + BUILD_COM.mkdirOpeneulerLog() + // 执行镜像编译检查 + BUILD_COM.dynamicBuild(yoctoDir, + "arm32", + "qemu-arm32", + IMAGE_DATE, + randomStr, + cacheSrcDir) } - // 对检查赋值 - archiveArtifacts "${logDir}/*.log" - STAGES_RES.push(formatRes("qemu-arm", "build", check_res, "artifact/${logDir}/${randomStr}.log")) } } } } stage("x86-64"){ - agent { node "${node}" } when { expression { return env.pr_check_result.contains("code") } } steps { - dir('/home/jenkins/agent'){ - script{ - downloadEmbeddedCI() - } - } - dir('/home/jenkins/agent/embedded-ci'){ - script{ - // 执行qemu_arm编译 - // 下载yocto源码 - def randomStr = getRandomStr() - def logDir = mkdirOpeneulerLog() - downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), 1) - prepare_srccode("/home/jenkins") - // 执行镜像编译检查 - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a x86_64 \ - -t /usr1/openeuler/gcc/openeuler_gcc_x86_64 \ - -p x86-64 \ - -i openeuler-image \ - -s_in "$SHARE_DIR/${giteeTargetBranch}/sstate-cache/x86-64" \ - -d qemu-x86-64 > ${logDir}/${randomStr}.log - """, returnStatus: true) - - def check_res = "" - if (task_res_code == 0){ - check_res = "success" - }else{ - check_res = "failed" + script{ + node("${node}"){ + BUILD_COM.unstashRepo('/home/jenkins/agent', 'embedded-ci') + BUILD_COM.unstashRepo('/home/jenkins/agent', 'yocto-meta-openeuler') + dir('/home/jenkins/agent/embedded-ci'){ + // 执行qemu-arm32编译 + def randomStr = BUILD_COM.getRandomStr() + def cacheSrcDir = "$shareDir/$giteeTargetBranch/oebuild_workspace/src" + def yoctoDir = "/home/jenkins/agent/yocto-meta-openeuler" + BUILD_COM.mkdirOpeneulerLog() + // 执行镜像编译检查 + BUILD_COM.dynamicBuild(yoctoDir, + "x86-64", + "x86-64", + IMAGE_DATE, + randomStr, + cacheSrcDir) } - // 对检查赋值 - archiveArtifacts "${logDir}/*.log" - STAGES_RES.push(formatRes("qemu-x86", "build", check_res, "artifact/${logDir}/${randomStr}.log")) } } } } stage("hieulerpi1"){ - agent { node "${node}" } when { expression { return env.pr_check_result.contains("code") } } steps { - dir('/home/jenkins/agent'){ - script{ - downloadEmbeddedCI() - } - } - dir('/home/jenkins/agent/embedded-ci'){ - script{ - // 执行hieulerpi1编译 - // 下载yocto源码 - downloadYoctoWithPr("/home/jenkins/agent", giteeTargetNamespace, giteeRepoName, Integer.parseInt(giteePullRequestid), 1) - prepare_srccode("/home/jenkins") - def randomStr = getRandomStr() - def logDir = mkdirOpeneulerLog() - // 执行镜像编译检查 - def task_res_code = sh (script: """ - python3 main.py build \ - -c /home/jenkins/agent/yocto-meta-openeuler \ - -target openeuler_image \ - -a aarch64 \ - -t /usr1/openeuler/gcc/openeuler_gcc_arm64le \ - -p hieulerpi1 \ - -i openeuler-image \ - -s_in "$SHARE_DIR/${giteeTargetBranch}/sstate-cache/hieulerpi1" \ - -d hieulerpi1 > ${logDir}/${randomStr}.log - """, returnStatus: true) - - def check_res = "" - if (task_res_code == 0){ - check_res = "success" - }else{ - check_res = "failed" + script{ + node("${node}"){ + BUILD_COM.unstashRepo('/home/jenkins/agent', 'embedded-ci') + BUILD_COM.unstashRepo('/home/jenkins/agent', 'yocto-meta-openeuler') + dir('/home/jenkins/agent/embedded-ci'){ + // 执行qemu-arm32编译 + def randomStr = BUILD_COM.getRandomStr() + def cacheSrcDir = "$shareDir/$giteeTargetBranch/oebuild_workspace/src" + def yoctoDir = "/home/jenkins/agent/yocto-meta-openeuler" + BUILD_COM.mkdirOpeneulerLog() + // 执行镜像编译检查 + BUILD_COM.dynamicBuild(yoctoDir, + "aarch64", + "hieulerpi1", + IMAGE_DATE, + randomStr, + cacheSrcDir) } - // 对检查赋值 - archiveArtifacts "${logDir}/*.log" - STAGES_RES.push(formatRes("hieulerpi1", "build", check_res, "artifact/${logDir}/${randomStr}.log")) } } } @@ -449,29 +317,32 @@ pipeline { } post { always { - dir('/home/jenkins/agent/embedded-ci'){ - script{ - withCredentials([ - string(credentialsId: "${giteeId}", variable: 'GITEETOKEN'), - usernamePassword(credentialsId: "${jenkinsId}", usernameVariable: 'JUSER',passwordVariable: 'JPASSWD')]){ - if (currentBuild.result != 'ABORTED') { - def chks = "" - for (int i = 0; i < STAGES_RES.size(); ++i) { - chks = "${chks} -chk ${STAGES_RES[i]}" - } + script{ + node("${node}"){ + BUILD_COM.unstashRepo('/home/jenkins/agent', 'embedded-ci') + dir('/home/jenkins/agent/embedded-ci'){ + withCredentials([ + string(credentialsId: "${giteeId}", variable: 'GITEETOKEN'), + usernamePassword(credentialsId: "${jenkinsId}", usernameVariable: 'JUSER',passwordVariable: 'JPASSWD')]){ + if (currentBuild.result != 'ABORTED') { + def chks = "" + for (int i = 0; i < BUILD_COM.STAGES_RES.size(); ++i) { + chks = "${chks} -chk ${BUILD_COM.STAGES_RES[i]}" + } - def duration_time = System.currentTimeMillis() - currentBuild.startTimeInMillis - sh """ - python3 main.py comment \ - -m gate \ - -o $giteeTargetNamespace \ - -p $giteeRepoName \ - -pr $giteePullRequestid \ - -gt $GITEETOKEN \ - -dt $duration_time \ - $chks - """ - } + def durationTime = System.currentTimeMillis() - currentBuild.startTimeInMillis + sh """ + python3 main.py comment \ + -m gate \ + -o $giteeTargetNamespace \ + -p $giteeRepoName \ + -pr $giteePullRequestid \ + -gt $GITEETOKEN \ + -dt $durationTime \ + $chks + """ + } + } } } } diff --git a/.oebuild/workflows/jenkinsfile_src_update b/.oebuild/workflows/jenkinsfile_src_update index 68da5001387928bded41b871e98f91e1a9c9f4dc..3320d9f76dcd6bf27e38c27610afe0aac9121c4c 100644 --- a/.oebuild/workflows/jenkinsfile_src_update +++ b/.oebuild/workflows/jenkinsfile_src_update @@ -8,7 +8,7 @@ pipeline { stages { stage("update src"){ steps{ - dir(SHARE_DIR + "/" + ciBranch){ + dir(shareDir + "/" + ciBranch){ script{ sh """ oebuild init oebuild_workspace @@ -16,15 +16,14 @@ pipeline { pushd src if [ -d "yocto-meta-openeuler" ];then cd yocto-meta-openeuler - git checkout master + git fetch origin + git checkout $ciBranch git pull else - git clone https://gitee.com/openeuler/yocto-meta-openeuler + git clone https://gitee.com/openeuler/yocto-meta-openeuler -b $ciBranch fi popd oebuild manifest download - tar zcf src.tar.gz --exclude="src/yocto-meta-openeuler" src - mv src.tar.gz $SHARE_DIR/$ciBranch/src.tar.gz """ } } diff --git a/.oebuild/workflows/jenkinsfile_sync_image b/.oebuild/workflows/jenkinsfile_sync_image new file mode 100644 index 0000000000000000000000000000000000000000..9e981d44a389b2634ce41d81fb337112ebab6a40 --- /dev/null +++ b/.oebuild/workflows/jenkinsfile_sync_image @@ -0,0 +1,63 @@ +pipeline { + agent { node "${node}" } + environment { + PATH = "/home/jenkins/.local/bin:${env.PATH}" + } + stages { + stage("sync image"){ + steps{ + script{ + BUILD_COM = load '.oebuild/workflows/build_common.groovy' + INIT_ENV = load '.oebuild/workflows/init_env.groovy' + INIT_ENV.init_environment() + } + dir('/home/jenkins/agent'){ + script{ + BUILD_COM.downloadEmbeddedCI(env.embeddedRemote, env.embeddedBranch) + } + } + dir('/home/jenkins/agent/embedded-ci'){ + script{ + for (arch in env.archList.split(" ")) { + def image_list = BUILD_COM.get_remote_images(env.baseImgUrl+"/"+arch) + println(image_list) + for (image in image_list.split(" ")) { + if(image.contains("/") == false){ + continue + } + println("now sync ${image} ") + // 检查远程目录是否存在 + if (BUILD_COM.remote_address_exists(env.targetImgUrl+"/"+arch+"/"+image) == "no"){ + withCredentials([ + file(credentialsId: env.openEulerImgRemoteKey, variable: 'openEulerImgKey') + ]){ + def file_link = env.baseImgUrl+"/"+arch+"/"+image+".tar.gz" + //下载压缩包 + sh """ + mkdir -p /home/jenkins/agent/upload + cd /home/jenkins/agent/upload + wget $file_link -q + tar_file=`basename $file_link` + tar zxf \$tar_file + rm -f \$tar_file + """ + def image_name = image.split("/")[0] + def remote_dir = env.openEulerImgRemoteDir+"/${arch}/${image_name}" + def local_dir = "/home/jenkins/agent/upload" + BUILD_COM.uploadImageWithKey( + openEulerImgRemoteIP, + remote_dir, + openEulerImgRemoteUser, + openEulerImgKey, + local_dir) + sh "rm -rf /home/jenkins/agent/upload" + } + } + } + } + } + } + } + } + } +} \ No newline at end of file diff --git a/.oebuild/workflows/jenkinsfile_toolchain_release b/.oebuild/workflows/jenkinsfile_toolchain_release index 2d99ec56d8796f4582c1dc2e04a46ec580ac6531..b7c86792a5c6cc0c4b51308d8b01d54a2cb42ee4 100644 --- a/.oebuild/workflows/jenkinsfile_toolchain_release +++ b/.oebuild/workflows/jenkinsfile_toolchain_release @@ -107,6 +107,11 @@ pipeline { cp config_riscv64 .config ct-ng build """ + // 构建loongarch64-toolchain + sh """ + cp config_loongarch64 .config + ct-ng build + """ } } } @@ -143,6 +148,12 @@ pipeline { tar czf openeuler_gcc_riscv64.tar.gz openeuler_gcc_riscv64 sudo rm -rf openeuler_gcc_riscv64 """ + // 打包loongarch64-toolchain + sh """ + mv loongarch64-openeuler-linux-gnu openeuler_gcc_loongarch64 + tar czf openeuler_gcc_loongarch64.tar.gz openeuler_gcc_loongarch64 + sudo rm -rf openeuler_gcc_loongarch64 + """ } } } @@ -165,4 +176,4 @@ pipeline { } } } -} \ No newline at end of file +} diff --git a/LICENSE b/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..4e461012962ad856654a3dca2618d4a6094f90f1 --- /dev/null +++ b/LICENSE @@ -0,0 +1,131 @@ + +木兰宽松许可证, 第2版 + +木兰宽松许可证, 第2版 + +2020年1月 http://license.coscl.org.cn/MulanPSL2 + +您对“软件”的复制、使用、修改及分发受木兰宽松许可证,第2版(“本许可证”)的如下条款的约束: + +0. 定义 + +“软件” 是指由“贡献”构成的许可在“本许可证”下的程序和相关文档的集合。 + +“贡献” 是指由任一“贡献者”许可在“本许可证”下的受版权法保护的作品。 + +“贡献者” 是指将受版权法保护的作品许可在“本许可证”下的自然人或“法人实体”。 + +“法人实体” 是指提交贡献的机构及其“关联实体”。 + +“关联实体” 是指,对“本许可证”下的行为方而言,控制、受控制或与其共同受控制的机构,此处的控制是指有受控方或共同受控方至少50%直接或间接的投票权、资金或其他有价证券。 + +1. 授予版权许可 + +每个“贡献者”根据“本许可证”授予您永久性的、全球性的、免费的、非独占的、不可撤销的版权许可,您可以复制、使用、修改、分发其“贡献”,不论修改与否。 + +2. 授予专利许可 + +每个“贡献者”根据“本许可证”授予您永久性的、全球性的、免费的、非独占的、不可撤销的(根据本条规定撤销除外)专利许可,供您制造、委托制造、使用、许诺销售、销售、进口其“贡献”或以其他方式转移其“贡献”。前述专利许可仅限于“贡献者”现在或将来拥有或控制的其“贡献”本身或其“贡献”与许可“贡献”时的“软件”结合而将必然会侵犯的专利权利要求,不包括对“贡献”的修改或包含“贡献”的其他结合。如果您或您的“关联实体”直接或间接地,就“软件”或其中的“贡献”对任何人发起专利侵权诉讼(包括反诉或交叉诉讼)或其他专利维权行动,指控其侵犯专利权,则“本许可证”授予您对“软件”的专利许可自您提起诉讼或发起维权行动之日终止。 + +3. 无商标许可 + +“本许可证”不提供对“贡献者”的商品名称、商标、服务标志或产品名称的商标许可,但您为满足第4条规定的声明义务而必须使用除外。 + +4. 分发限制 + +您可以在任何媒介中将“软件”以源程序形式或可执行形式重新分发,不论修改与否,但您必须向接收者提供“本许可证”的副本,并保留“软件”中的版权、商标、专利及免责声明。 + +5. 免责声明与责任限制 + +“软件”及其中的“贡献”在提供时不带任何明示或默示的担保。在任何情况下,“贡献者”或版权所有者不对任何人因使用“软件”或其中的“贡献”而引发的任何直接或间接损失承担责任,不论因何种原因导致或者基于何种法律理论,即使其曾被建议有此种损失的可能性。 + +6. 语言 + +“本许可证”以中英文双语表述,中英文版本具有同等法律效力。如果中英文版本存在任何冲突不一致,以中文版为准。 + +条款结束 + +如何将木兰宽松许可证,第2版,应用到您的软件 + +如果您希望将木兰宽松许可证,第2版,应用到您的新软件,为了方便接收者查阅,建议您完成如下三步: + +1, 请您补充如下声明中的空白,包括软件名、软件的首次发表年份以及您作为版权人的名字; + +2, 请您在软件包的一级目录下创建以“LICENSE”为名的文件,将整个许可证文本放入该文件中; + +3, 请将如下声明文本放入每个源文件的头部注释中。 + +Copyright (c) [Year] [name of copyright holder] +[Software Name] is licensed under Mulan PSL v2. +You can use this software according to the terms and conditions of the Mulan PSL v2. +You may obtain a copy of Mulan PSL v2 at: + http://license.coscl.org.cn/MulanPSL2 +THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +See the Mulan PSL v2 for more details. + +Mulan Permissive Software License,Version 2 + +Mulan Permissive Software License,Version 2 (Mulan PSL v2) + +January 2020 http://license.coscl.org.cn/MulanPSL2 + +Your reproduction, use, modification and distribution of the Software shall be subject to Mulan PSL v2 (this License) with the following terms and conditions: + +0. Definition + +Software means the program and related documents which are licensed under this License and comprise all Contribution(s). + +Contribution means the copyrightable work licensed by a particular Contributor under this License. + +Contributor means the Individual or Legal Entity who licenses its copyrightable work under this License. + +Legal Entity means the entity making a Contribution and all its Affiliates. + +Affiliates means entities that control, are controlled by, or are under common control with the acting entity under this License, ‘control’ means direct or indirect ownership of at least fifty percent (50%) of the voting power, capital or other securities of controlled or commonly controlled entity. + +1. Grant of Copyright License + +Subject to the terms and conditions of this License, each Contributor hereby grants to you a perpetual, worldwide, royalty-free, non-exclusive, irrevocable copyright license to reproduce, use, modify, or distribute its Contribution, with modification or not. + +2. Grant of Patent License + +Subject to the terms and conditions of this License, each Contributor hereby grants to you a perpetual, worldwide, royalty-free, non-exclusive, irrevocable (except for revocation under this Section) patent license to make, have made, use, offer for sale, sell, import or otherwise transfer its Contribution, where such patent license is only limited to the patent claims owned or controlled by such Contributor now or in future which will be necessarily infringed by its Contribution alone, or by combination of the Contribution with the Software to which the Contribution was contributed. The patent license shall not apply to any modification of the Contribution, and any other combination which includes the Contribution. If you or your Affiliates directly or indirectly institute patent litigation (including a cross claim or counterclaim in a litigation) or other patent enforcement activities against any individual or entity by alleging that the Software or any Contribution in it infringes patents, then any patent license granted to you under this License for the Software shall terminate as of the date such litigation or activity is filed or taken. + +3. No Trademark License + +No trademark license is granted to use the trade names, trademarks, service marks, or product names of Contributor, except as required to fulfill notice requirements in section 4. + +4. Distribution Restriction + +You may distribute the Software in any medium with or without modification, whether in source or executable forms, provided that you provide recipients with a copy of this License and retain copyright, patent, trademark and disclaimer statements in the Software. + +5. Disclaimer of Warranty and Limitation of Liability + +THE SOFTWARE AND CONTRIBUTION IN IT ARE PROVIDED WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED. IN NO EVENT SHALL ANY CONTRIBUTOR OR COPYRIGHT HOLDER BE LIABLE TO YOU FOR ANY DAMAGES, INCLUDING, BUT NOT LIMITED TO ANY DIRECT, OR INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM YOUR USE OR INABILITY TO USE THE SOFTWARE OR THE CONTRIBUTION IN IT, NO MATTER HOW IT’S CAUSED OR BASED ON WHICH LEGAL THEORY, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + +6. Language + +THIS LICENSE IS WRITTEN IN BOTH CHINESE AND ENGLISH, AND THE CHINESE VERSION AND ENGLISH VERSION SHALL HAVE THE SAME LEGAL EFFECT. IN THE CASE OF DIVERGENCE BETWEEN THE CHINESE AND ENGLISH VERSIONS, THE CHINESE VERSION SHALL PREVAIL. + +END OF THE TERMS AND CONDITIONS + +How to Apply the Mulan Permissive Software License,Version 2 (Mulan PSL v2) to Your Software + +To apply the Mulan PSL v2 to your work, for easy identification by recipients, you are suggested to complete following three steps: + +i. Fill in the blanks in following statement, including insert your software name, the year of the first publication of your software, and your name identified as the copyright owner; +ii. Create a file named "LICENSE" which contains the whole context of this License in the first directory of your software package; +iii. Attach the statement to the appropriate annotated syntax at the beginning of each source file. + +Copyright (c) [Year] [name of copyright holder] +[Software Name] is licensed under Mulan PSL v2. +You can use this software according to the terms and conditions of the Mulan PSL v2. +You may obtain a copy of Mulan PSL v2 at: + http://license.coscl.org.cn/MulanPSL2 +THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +See the Mulan PSL v2 for more details. + diff --git a/LICENSE.txt b/LICENSE.txt new file mode 100644 index 0000000000000000000000000000000000000000..19265fd9638c04ecc69fbe6a8d61f35447c0be67 --- /dev/null +++ b/LICENSE.txt @@ -0,0 +1,9 @@ +Copyright (c) 2024 openEuler Embedded +yocto-meta-openeuler is licensed under Mulan PSL v2. +You can use this software according to the terms and conditions of the Mulan PSL v2. +You may obtain a copy of Mulan PSL v2 at: + http://license.coscl.org.cn/MulanPSL2 +THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +See the Mulan PSL v2 for more details. diff --git a/bsp/meta-hisilicon/conf/machine/hiedge1.conf b/bsp/meta-hisilicon/conf/machine/hiedge1.conf new file mode 100644 index 0000000000000000000000000000000000000000..be37487b8dbb518d58d49683a7d16454a6012f77 --- /dev/null +++ b/bsp/meta-hisilicon/conf/machine/hiedge1.conf @@ -0,0 +1,29 @@ +require conf/machine/include/arm/armv8-2a/tune-cortexa55.inc +MACHINE_FEATURES += "efi pci" +MACHINEOVERRIDES =. "hiedge1:march64le:" +DEFAULTTUNE = "aarch64" + +require conf/multilib.conf +# currently, don't support 32 bit libs +MULTILIBS = "" + +ROOTFS_PACKAGE_ARCH = "aarch64" + +# set IMAGETYPE and dtb +KERNEL_IMAGETYPE = "Image" +# choose dtb file +KERNEL_DEVICETREE = "" +ENABLE_UART = "1" +# serial port enabled in hiedge1 +CMDLINE_SERIAL = "ttyAMA0,115200" +SERIAL_CONSOLES = "115200;ttyAMA0" + +# arm and arm64 both support -mlittle-endian so no +# need to consider compat32. +TUNE_CCARGS .= " -mlittle-endian" +IMAGE_INSTALL:append = " kernel-modules" + +# auto load module during startup +KERNEL_MODULE_AUTOLOAD = "" +USE_VT ?= "0" + diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/astra-camera-msgs_1.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/astra-camera-msgs_1.0.1.bb index 2ccdf65c5efe2c678633be4c8e4188e575971b79..41b7f017d6f9a031fa77e86328f9ee0ac5666699 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/astra-camera-msgs_1.0.1.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/astra-camera-msgs_1.0.1.bb @@ -74,4 +74,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/astra-camera-raw_1.1.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/astra-camera-raw_1.1.0.bb index 599e9b00c9bf4bdb20c87b3055665361ec096cde..0634989b30ad8846fccb64522b50ea0e1d8a98d8 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/astra-camera-raw_1.1.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/astra-camera-raw_1.1.0.bb @@ -132,4 +132,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/depth-image_0.1.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/depth-image_0.1.0.bb index 869691369f9a38c65d3ca158bdc4a4653f8e3576..e3bc52ccd8e9d3537af6a63a577846e840aa1174 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/depth-image_0.1.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/depth-image_0.1.0.bb @@ -85,4 +85,3 @@ FILES:${PN} += "${datadir} ${libdir}/depth_image/depth" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/fitxxx_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/fitxxx_0.0.1.bb index c90ae7ce246b7013930860ab54edfae04210cc85..8ef1477fdd8239dba661c56255bc41d782656b01 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/fitxxx_0.0.1.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/fitxxx_0.0.1.bb @@ -65,4 +65,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/imu-calib_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/imu-calib_0.0.0.bb index 8636da000a92279046e35fbe394f398bb9c60e4a..7cc7571553c9d33a918b238c95bf1cdf3235a423 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/imu-calib_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/imu-calib_0.0.0.bb @@ -65,4 +65,3 @@ FILES:${PN} += "${datadir} ${libdir}/imu_calib/*" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/lsm10-v2_2.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/lsm10-v2_2.0.0.bb index e16596c40df2b471eb48cd0f808c155586edd1cc..1dd0fab05bb4f29896185c89e49610cc10dc1f31 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/lsm10-v2_2.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/lsm10-v2_2.0.0.bb @@ -83,4 +83,3 @@ FILES:${PN} += "${datadir} ${libdir}/lsm10_v2/*" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/serial-imu_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/serial-imu_0.0.0.bb index 90cd57a71c486d63746278e3930e8fd4b9dc807d..f715b7b20e9b313063f489151f958046baac60b6 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/serial-imu_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/serial-imu_0.0.0.bb @@ -67,4 +67,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/sllidar-ros2_1.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/sllidar-ros2_1.0.1.bb index f813a40d960839e9c07da3c92edd55732e3001c2..1c57aa9542cc77ff49b4f2c6fad5168340504f5b 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/sllidar-ros2_1.0.1.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/sllidar-ros2_1.0.1.bb @@ -61,4 +61,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/wr-ls-udp_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/wr-ls-udp_0.0.0.bb index 5ff02128c6ccb6cc9d2d6ee6bfe98de8e27c728f..4a4261dc82a52aafe27d14d693094de2291550ce 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/wr-ls-udp_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/wr-ls-udp_0.0.0.bb @@ -67,4 +67,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/ydlidar-ros2-driver_%.bbappend b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/ydlidar-ros2-driver_%.bbappend index 7bad44427b42c67f7f9c3de51818fdf7ff520b3a..6065ec156901b560ed896dcf13ece4cb8ec5cbc9 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/ydlidar-ros2-driver_%.bbappend +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_sensors/ydlidar-ros2-driver_%.bbappend @@ -8,4 +8,3 @@ S = "${WORKDIR}/hieuler_3rdparty_sensors/lidar/eai_lidar" SRC_URI:remove = " \ file://00-ydlidar-ros2-driver-fix-error.patch \ " - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/costmap-converter-msgs_0.1.2.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/costmap-converter-msgs_0.1.2.bb index 1f7d08fe187bcc1d6c29288002fb4caa1fced847..1b5e02baa34c9a4833d1673e8c6f72b619d1ca54 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/costmap-converter-msgs_0.1.2.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/costmap-converter-msgs_0.1.2.bb @@ -56,13 +56,13 @@ DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" -OPENEULER_LOCAL_NAME = "oee_archive" -OEE_ARCHIVE_SUBDIR = "costmap_converter" +inherit oee-archive +OEE_ARCHIVE_SUB_DIR = "costmap-converter" DISABLE_OPENEULER_SOURCE_MAP = "1" SRC_URI = " \ - file://${OPENEULER_LOCAL_NAME}/costmap_converter/costmap_converter-9565858.tar.gz \ + file://costmap_converter-9565858.tar.gz \ " S = "${WORKDIR}/costmap_converter/costmap_converter_msgs" @@ -72,4 +72,3 @@ FILES:${PN} += "${datadir}" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/costmap-converter_0.1.2.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/costmap-converter_0.1.2.bb index 14d000c089e5da6697120cc836e81515af96c978..2e64954db40065f42ced01cec148f05fdad5f009 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/costmap-converter_0.1.2.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/costmap-converter_0.1.2.bb @@ -69,12 +69,12 @@ DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" -OPENEULER_LOCAL_NAME = "oee_archive" +inherit oee-archive DISABLE_OPENEULER_SOURCE_MAP = "1" SRC_URI = " \ - file://${OPENEULER_LOCAL_NAME}/costmap_converter/costmap_converter-9565858.tar.gz \ + file://costmap_converter-9565858.tar.gz \ " S = "${WORKDIR}/costmap_converter/costmap_converter" @@ -84,4 +84,3 @@ FILES:${PN} += "${datadir}" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/teb-local-planner_0.9.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/teb-local-planner_0.9.1.bb index b6daab0f510a6487cf4bbdfb073189e06a17cfc9..8ab86cc92f1c5b39cc3957eec77fe3e433389d4c 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/teb-local-planner_0.9.1.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/teb-local-planner_0.9.1.bb @@ -105,13 +105,12 @@ DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" -OPENEULER_LOCAL_NAME = "oee_archive" -OEE_ARCHIVE_SUBDIR = "teb_local_planner" +inherit oee-archive DISABLE_OPENEULER_SOURCE_MAP = "1" SRC_URI = " \ - file://${OPENEULER_LOCAL_NAME}/teb_local_planner/teb_local_planner-630a22e.tar.gz \ + file://teb_local_planner-630a22e.tar.gz \ " S = "${WORKDIR}/teb_local_planner/teb_local_planner" @@ -125,4 +124,3 @@ CXXFLAGS += " -Wno-error=deprecated -Wno-error=maybe-uninitialized -Wno-error=de ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/teb-msgs_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/teb-msgs_0.0.1.bb index 43406a48b168b1ead3d32e552da4a07d079b2c3c..53c7e584693e21083c4dd8781902792576ffcccc 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/teb-msgs_0.0.1.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/3rdparty_teb/teb-msgs_0.0.1.bb @@ -59,13 +59,13 @@ DEPENDS += "${ROS_EXPORT_DEPENDS} ${ROS_BUILDTOOL_EXPORT_DEPENDS}" RDEPENDS:${PN} += "${ROS_EXEC_DEPENDS}" -OPENEULER_LOCAL_NAME = "oee_archive" -OEE_ARCHIVE_SUBDIR = "teb_local_planner" +inherit oee-archive +OEE_ARCHIVE_SUB_DIR = "teb-local-planner" DISABLE_OPENEULER_SOURCE_MAP = "1" SRC_URI = " \ - file://${OPENEULER_LOCAL_NAME}/teb_local_planner/teb_local_planner-630a22e.tar.gz \ + file://teb_local_planner-630a22e.tar.gz \ " S = "${WORKDIR}/teb_local_planner/teb_msgs" @@ -75,4 +75,3 @@ FILES:${PN} += "${datadir}" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/barcode-interface_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/barcode-interface_0.0.0.bb index 7e958d26aa31758bd25c4b3449a27c6ebdcbca59..c9474305ee0d84699af15ba3593f58062b2afe3b 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/barcode-interface_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/barcode-interface_0.0.0.bb @@ -63,4 +63,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/barcode-node_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/barcode-node_0.0.0.bb index c9cde9211cdb4cb8b4bc36de2c12b048364fecb9..450150a1c9d9b10a367701b7b87d93834432a69f 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/barcode-node_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/barcode-node_0.0.0.bb @@ -103,4 +103,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/camera_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/camera_0.0.0.bb index e78b313e4cebdd65c1db8847fbdcf074e3b11e56..3fe0b510bc25dff3e83fcb03aac39ed3e827b3ac 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/camera_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/camera_0.0.0.bb @@ -59,4 +59,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/gst-node_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/gst-node_0.0.0.bb index b377261b6b542a254f8f471d9a5298b4763a71e9..af6c15201db16bf9d518fcfee2310d336b4d2e46 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/gst-node_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/gst-node_0.0.0.bb @@ -70,4 +70,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/mipi-camera_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/mipi-camera_0.0.0.bb index 1f51159ae1c375bcff7840cf5b201804ea6d2c6f..4f0a3c5e52b5c24fd04c1db56146f23545c14bd1 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/mipi-camera_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/mipi-camera_0.0.0.bb @@ -60,4 +60,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/object-node_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/object-node_0.0.0.bb index a5b2365a8c8df6cfcf76f8d40dcbce8e6be60452..445e86a7c512c1498e651e6c7de8916548d2f326 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/object-node_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/object-node_0.0.0.bb @@ -81,4 +81,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/pose-srv-node_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/pose-srv-node_0.0.0.bb index f97d44183087b61b5aad2396cd547523aa109a57..0f969125c47a4cdbce661134eb87e033f02bcbc6 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/pose-srv-node_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/pose-srv-node_0.0.0.bb @@ -80,4 +80,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/robot-det-node_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/robot-det-node_0.0.0.bb index 10738ee28ae01a7e0858001b868b2924302d9109..18afd6c6ca98516c81308784ecaf2f9fe3082c9a 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/robot-det-node_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/robot-det-node_0.0.0.bb @@ -92,4 +92,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/zxing_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/zxing_0.0.0.bb index bcca1475afe70f2b473341ee5ba860072e817576..9fc74a8567796a635b4dcb467c0879dc7329eec9 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/zxing_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_ai/zxing_0.0.0.bb @@ -52,4 +52,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/robot-bringup_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/robot-bringup_0.0.0.bb index 8b59a6a0130b8f86f5253ffcff6a941091382df9..2c7a5599abf5e599d66c9096a33a0430538ebff9 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/robot-bringup_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/robot-bringup_0.0.0.bb @@ -59,4 +59,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/ros2-hieuler-robot_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/ros2-hieuler-robot_0.0.0.bb index 0350cc9b89b8f999f3298d974330d4f1dfe75203..51a0d3071d1b054c43200238d42cd60d1ef58d12 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/ros2-hieuler-robot_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_chassis/ros2-hieuler-robot_0.0.0.bb @@ -104,4 +104,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/depth-image-proc_%.bbappend b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/depth-image-proc_%.bbappend index 7ae710f30584b127a175a2b5a77853917e2896b7..ed1b442786951795227dd1fedb422ae1cc167d44 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/depth-image-proc_%.bbappend +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/depth-image-proc_%.bbappend @@ -7,4 +7,3 @@ SRC_URI = " \ S = "${WORKDIR}/hirobot_component_dtof/dtof_ros_demo/src/depth_image/depth_image_to_point_cloud" DISABLE_OPENEULER_SOURCE_MAP = "1" - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/depthimage-to-laserscan_%.bbappend b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/depthimage-to-laserscan_%.bbappend index bcc6388a3faf42a1d310b55e696c623c6636f5d8..e3bc571fcbe07d5092eabdecfb06137feb633fae 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/depthimage-to-laserscan_%.bbappend +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/depthimage-to-laserscan_%.bbappend @@ -9,4 +9,3 @@ SRC_URI = " \ S = "${WORKDIR}/hirobot_component_dtof/dtof_ros_demo/src/depth_image/depthimage_to_laserscan" DISABLE_OPENEULER_SOURCE_MAP = "1" - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/dtof-node_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/dtof-node_0.0.0.bb index 65fc579070daed18a4bffb49230ae12783759a92..b755b516ba04301d5c2dcd7c96fc2c9df9bfbf6b 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/dtof-node_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/dtof-node_0.0.0.bb @@ -61,4 +61,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/hirobot-description_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/hirobot-description_0.0.1.bb index 1f45b8fe8b25548d8725560abd2d583a3f8f3004..05dc210b371ab42b3edda602bea2615142c36307 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/hirobot-description_0.0.1.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_dtof/hirobot-description_0.0.1.bb @@ -55,4 +55,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/depth-mini-seg_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/depth-mini-seg_0.0.0.bb index ce7fb1277ee2969e2e0df0af1e0ee75ffcc872be..1013203949075da5e9f010bc980b245f052e109d 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/depth-mini-seg_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/depth-mini-seg_0.0.0.bb @@ -71,4 +71,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/get-pose-msg_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/get-pose-msg_0.0.0.bb index 8c32674dcb2f489a23db9ba21cb00aa87cdd0edf..48f170de3ff30cccb0facf2b46ebc78c939ae045 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/get-pose-msg_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/get-pose-msg_0.0.0.bb @@ -70,4 +70,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-base_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-base_0.0.1.bb index b5bd563fa6acdffbee4b9bc4d0958a8c935364d9..615b3ff1bc08f27f3358cd535c5ea2bf6ab52492 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-base_0.0.1.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-base_0.0.1.bb @@ -86,4 +86,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-bringup_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-bringup_0.0.1.bb index 02bef86ce29ecdbc71c45024378a4ef5438e0aad..741594a81a6be79c6898e6c28a0fabb7fa63d6b0 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-bringup_0.0.1.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-bringup_0.0.1.bb @@ -64,4 +64,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-depth-camera_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-depth-camera_0.0.0.bb index 995d14595fe65da0580b0086bc66ef306d444fb7..bca649392a97936add8bd5493289a5934293841d 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-depth-camera_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-depth-camera_0.0.0.bb @@ -67,4 +67,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-description_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-description_0.0.1.bb index a629e3ece071737713eee4f3319f238515461e03..33efbae8df27e42b0c86698e1b2a1ea0832ac344 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-description_0.0.1.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-description_0.0.1.bb @@ -55,4 +55,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-get-goal-clear_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-get-goal-clear_0.0.0.bb index 44912e51892cffbde4b539b826a03d5ca273ab06..6f9d890ed554dab74268b29a4a5ba2943958e4ce 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-get-goal-clear_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-get-goal-clear_0.0.0.bb @@ -72,4 +72,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-goal-process_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-goal-process_0.0.0.bb index 13bee7f7ea6a8eae92f74b7d3b5e77053677da83..1a8e4cb607062ecf99234ac4eeddd3d8eb461aeb 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-goal-process_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-goal-process_0.0.0.bb @@ -67,4 +67,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-msgs_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-msgs_0.0.1.bb index ad96f8b19a03f57b7505e41171c066a141160683..a7c7fb000a62eb492a205312366b70679ebb756d 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-msgs_0.0.1.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-msgs_0.0.1.bb @@ -62,4 +62,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-navigation2-teb_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-navigation2-teb_0.0.1.bb index 597d29a44c91cbeabc8cf5c720a1a033473bf1cf..a517aa8b34e1e5552f528056cf24f9668564095a 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-navigation2-teb_0.0.1.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-navigation2-teb_0.0.1.bb @@ -55,4 +55,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-tof-plane-seg_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-tof-plane-seg_0.0.0.bb index a60fd62d9aab3a77e595ea8b22d3f80dc9c9618e..ed970818c2f4be8c817868306e63c337c5bc6a37 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-tof-plane-seg_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/hirobot-tof-plane-seg_0.0.0.bb @@ -68,4 +68,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/person-position-ack_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/person-position-ack_0.0.0.bb index ca03af15b6e23649fc7adaffda3466963f9311d2..151206ab0447085c5dc8da2c83188a521d238132 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/person-position-ack_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/person-position-ack_0.0.0.bb @@ -70,4 +70,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/robot-charge-control_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/robot-charge-control_0.0.0.bb index 468e225f520c25bca15552f45da4d8334d05b69a..8086ab3afe9cfc73366e275dd4a29db05cdd829c 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/robot-charge-control_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/robot-charge-control_0.0.0.bb @@ -77,4 +77,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/robot-init-pose_0.0.0.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/robot-init-pose_0.0.0.bb index bf6772239b4628e1fbc9fd0be11e9b6cf7f62d44..0653f4e8118d7a0a000ec78ab404183e94bcc9be 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/robot-init-pose_0.0.0.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_navigation/robot-init-pose_0.0.0.bb @@ -75,4 +75,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_python" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_slam/frame-relationship_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_slam/frame-relationship_0.0.1.bb index 71c6a6b8a0b386571ced0b2bc01aad91ed8d5645..ddf0ccbc8fdc2c087064d2a95e247ac6f7824c49 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_slam/frame-relationship_0.0.1.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_slam/frame-relationship_0.0.1.bb @@ -64,4 +64,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_slam/hirobot-cartographer_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_slam/hirobot-cartographer_0.0.1.bb index 73a55ad75b2f2908b9360c969cd9652b7989ab42..124cd3234dcea9a55eb905a1d3673e03248c947e 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_slam/hirobot-cartographer_0.0.1.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/component_slam/hirobot-cartographer_0.0.1.bb @@ -55,4 +55,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/astra-camera_1.0.2.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/astra-camera_1.0.2.bb index f730c6666a84098b4bc5c40799a9f8bd16ab52b1..d171e78a6f5cf776801b916caf5a4d48a89c806e 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/astra-camera_1.0.2.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/astra-camera_1.0.2.bb @@ -140,4 +140,3 @@ DISABLE_OPENEULER_SOURCE_MAP = "1" ROS_BUILD_TYPE = "ament_cmake" inherit ros_${ROS_BUILD_TYPE} - diff --git a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/dsp-bin_0.0.1.bb b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/dsp-bin_0.0.1.bb index 5c5713147d65ffd028f052886ecc44ee7d2f780f..11743c0370e8509eee665017cd67b105a4556559 100644 --- a/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/dsp-bin_0.0.1.bb +++ b/bsp/meta-hisilicon/dynamic-layers/ros2-layer/recipes-hipirobot/dsp_sample/dsp-bin_0.0.1.bb @@ -21,4 +21,3 @@ FILES:${PN} = " \ " INSANE_SKIP:${PN} += "already-stripped dev-deps" - diff --git a/bsp/meta-hisilicon/recipes-bsp/ss626/files/hiedge1-user-driver.pc.in b/bsp/meta-hisilicon/recipes-bsp/ss626/files/hiedge1-user-driver.pc.in new file mode 100644 index 0000000000000000000000000000000000000000..5aa1e6d227621c0e17944791733aae8751e2564d --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss626/files/hiedge1-user-driver.pc.in @@ -0,0 +1,12 @@ +prefix=@prefix@ +exec_prefix=@exec_prefix@ +libdir=@libdir@ +includedir=@includedir@ + +Name: hiedge1-user-driver +Description: library from SS626V100_SDK +Version: @VERSION@ +Requires: +Requires.private: +Libs: -L${libdir} +Cflags: -I${includedir} -I${includedir}/npu -I${includedir}/svp_npu diff --git a/bsp/meta-hisilicon/recipes-bsp/ss626/hiedge1-bsp-pkg.bb b/bsp/meta-hisilicon/recipes-bsp/ss626/hiedge1-bsp-pkg.bb new file mode 100644 index 0000000000000000000000000000000000000000..846d048e0771b2851e73561ec4abf92a2a19e7a0 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss626/hiedge1-bsp-pkg.bb @@ -0,0 +1,26 @@ +DESCRIPTION = "Some pre-compiled ko and initscripts for hiedge1" +SECTION = "base" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +DEPENDS = "update-rc.d-native" + +OPENEULER_LOCAL_NAME = "HiEdge-driver" + +RT_SUFFIX = "${@bb.utils.contains('DISTRO_FEATURES', 'preempt-rt', '-rt', '', d)}" + +SRC_URI = " \ + file://HiEdge-driver/drivers/ko.tar.gz \ +" + +S = "${WORKDIR}/HiEuler-driver/drivers" + +INSANE_SKIP:${PN} += "already-stripped" +FILES:${PN} = "${sysconfdir} ${systemd_system_unitdir} /usr/bin /ko /vendor /usr/sbin /firmware ${libdir}" + +do_install () { + cp -r ${WORKDIR}/ko ${D}/ +} + +INHIBIT_PACKAGE_STRIP = "1" +INHIBIT_SYSROOT_STRIP = "1" diff --git a/bsp/meta-hisilicon/recipes-bsp/ss626/hiedge1-user-driver_spc003.bb b/bsp/meta-hisilicon/recipes-bsp/ss626/hiedge1-user-driver_spc003.bb new file mode 100644 index 0000000000000000000000000000000000000000..9259b1e4c7055393226d853a232ec9e77cbdad5a --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss626/hiedge1-user-driver_spc003.bb @@ -0,0 +1,75 @@ +SUMMARY = "hiedge1 user driver bin package" +DESCRIPTION = "user lib and headers repack from SS626V100_SDK" +HOMEPAGE = "https://gitee.com/HiEuler/hardware_driver" +LICENSE = "CLOSED" + +inherit pkgconfig + +# This driver library is depended by many ROS packages, +# using the "lib" directory instead of the "lib64" directory +# for ros feature +python roslike_libdir_set() { + if bb.utils.contains('DISTRO_FEATURES', 'ros', True, False, d): + old_pkg_config = d.getVar("PKG_CONFIG_SYSROOT_DIR") + d.getVar('libdir') + "/pkgconfig" + pn = e.data.getVar("PN") + if pn.endswith("-native"): + return + d.setVar('libdir', d.getVar('libdir').replace('64', '')) + d.setVar('baselib', d.getVar('baselib').replace('64', '')) + d.appendVar("PKG_CONFIG_PATH", old_pkg_config) +} + +addhandler roslike_libdir_set +roslike_libdir_set[eventmask] = "bb.event.RecipePreFinalise" + +OPENEULER_LOCAL_NAME = "HiEdge-driver" + +SRC_URI = " \ + file://HiEdge-driver/drivers/lib.tar.gz \ + file://HiEdge-driver/drivers/include.tar.gz \ + file://hiedge1-user-driver.pc.in \ +" + +S = "${WORKDIR}" + +do_install:append() { + install -d ${D}${libdir} + install -d ${D}/usr/include + cp -rf -P ${WORKDIR}/lib/* ${D}${libdir} + cp -rf -P ${WORKDIR}/include/* ${D}/usr/include/ + cd ${D}${libdir} + cd - + sed \ + -e s#@VERSION@#${PV}# \ + -e s#@prefix@#${prefix}# \ + -e s#@exec_prefix@#${exec_prefix}# \ + -e s#@libdir@#${libdir}# \ + -e s#@includedir@#${includedir}# \ + ${WORKDIR}/hiedge1-user-driver.pc.in > ${WORKDIR}/hiedge1-user-driver.pc + + install -d ${D}${libdir}/pkgconfig + install -m 0644 ${WORKDIR}/hiedge1-user-driver.pc ${D}${libdir}/pkgconfig/ + +} + +FILES:${PN} += " \ + ${libdir}/*so* \ + ${libdir}/svp_npu/*so* \ +" + +FILES:${PN}-dev = " \ + ${includedir} \ + ${libdir}/pkgconfig \ +" + +FILES:${PN}-staticdev += " \ + ${libdir}/svp_npu/*a \ +" + +# hiedge1-user-driver package provides library with the same name but located in different paths, +# which will lead to the following dependency issues when detecting the shlib: +# do_package: hiedge1-user-driver: Multiple shlib providers for libascendcl.so: hiedge1-user-driver, hiedge1-user-driver ... +# set these as private libraries, don't try to search provider for it +# PRIVATE_LIBS = "libgraph.so libascendcl.so " + +INSANE_SKIP:${PN} += "already-stripped dev-so" diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/ch343_0.1.bb b/bsp/meta-hisilicon/recipes-bsp/ss928/ch343_0.1.bb new file mode 100644 index 0000000000000000000000000000000000000000..f178fce3be44f50f866d26dd7c43c534d80fd685 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss928/ch343_0.1.bb @@ -0,0 +1,26 @@ +SUMMARY = "ch343 driver" +LICENSE = "GPL-2.0-only" +LIC_FILES_CHKSUM = "file://ch343.c;beginline=2469;endline=2469;md5=787eb329e3eac3e58f47744d2cf33699" + +SRC_URI = " \ + file://ch343/ch343.h \ + file://ch343/ch343.c \ + file://ch343/Makefile \ +" + +S = "${WORKDIR}/ch343" + +inherit module + +do_compile() { + oe_runmake +} + +do_install() { + install -d ${D}/ko + install -m 644 ${S}/ch343.ko ${D}/ko +} + +FILES:${PN} = " /ko/ch343.ko " + +INHIBIT_PACKAGE_STRIP = "1" diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/files/S90autorun b/bsp/meta-hisilicon/recipes-bsp/ss928/files/S90autorun deleted file mode 100755 index 67f4b54167fee8f40a025381f00f16670da86a10..0000000000000000000000000000000000000000 --- a/bsp/meta-hisilicon/recipes-bsp/ss928/files/S90autorun +++ /dev/null @@ -1,121 +0,0 @@ -#!/bin/sh - -cp /lib64/ld-linux-aarch64.so.1 /lib/ - -#Before loading the wifi driver, the relevant pins must be set first -#UART5 -bspmm 0x102F0100 0x1204 -bspmm 0x102F0104 0x1204 -bspmm 0x102F0108 0x1204 -bspmm 0x102F010C 0x1204 -#SDIO1 -bspmm 0x102F0054 0x1101 -bspmm 0x102F0050 0x1101 -bspmm 0x102F0040 0x1101 -bspmm 0x102F0044 0x1101 -bspmm 0x102F0048 0x1101 -bspmm 0x102F004C 0x1101 -#GPIO -bspmm 0x10230048 0x1200 -bspmm 0x10230044 0x1200 -bspmm 0x10230040 0x1200 -bspmm 0x1023003C 0x1200 -bspmm 0x102F00F4 0x1201 - -cd /ko - -bash ./load_ss928v100 -i -total 8192 -osmem 4096 - - -echo 47 > /sys/class/gpio/export -echo out >/sys/class/gpio/gpio47/direction -echo 1 > /sys/class/gpio/gpio47/value - -#echo 72 > /sys/class/gpio/export -#echo out >/sys/class/gpio/gpio72/direction -#echo 0 > /sys/class/gpio/gpio72/value - - -bspmm 0x0102F00F0 0x1201 #GPIO9_5 -bspmm 0x0102F0110 0x1201 #GPIO10_5 - - -#SDIO LEVEL TO 3.3v -bspmm 0x102e0010 0x11 - - -#GPIO7_1 GPIO7_2 GPIO6_6 -bspmm 0x0102F0094 0x1201 -bspmm 0x0102F0098 0x1201 -bspmm 0x0102F0088 0x1201 -bspmm 0x0102F0084 0x1201 -bspmm 0x0102F0080 0x1201 - -echo 57 > /sys/class/gpio/export -echo out >/sys/class/gpio/gpio57/direction -echo 1 > /sys/class/gpio/gpio57/value - -echo 58 > /sys/class/gpio/export -echo out >/sys/class/gpio/gpio58/direction -echo 1 > /sys/class/gpio/gpio58/value - -echo 54 > /sys/class/gpio/export -echo out >/sys/class/gpio/gpio54/direction -echo 1 > /sys/class/gpio/gpio54/value - -#GPIO6_2 1-> 928 HDMIout 0->loop hdmiout -echo 50 > /sys/class/gpio/export -echo out >/sys/class/gpio/gpio50/direction -echo 1 > /sys/class/gpio/gpio50/value - -#UART2 MUX -bspmm 0x0102F0070 0x1201 -bspmm 0x0102F0074 0x1201 -bspmm 0x0102F0078 0x1200 #RS232 -bspmm 0x0102F007C 0x1200 #RS232 - -#UART1 MUX -bspmm 0x0102F0060 0x1201 -bspmm 0x0102F0064 0x1201 -bspmm 0x0102F006C 0x1200 #RS232 -bspmm 0x0102F0068 0x1200 #RS232 - -#UART3 MUX -bspmm 0x0102f012c 0x00001201 -bspmm 0x0102f0130 0x00001201 -bspmm 0x0102f00D0 0x00001200 #RS485 - -#UART4 MUX -bspmm 0x0102f0134 0x00001201 -bspmm 0x0102f0138 0x00001201 - -#RTC 生成1秒脉冲 -i2c_write 0 0x64 0xd 0x44 - -#mipi GPIO config -bspmm 0x102f0150 0x1100 -bspmm 0x102f0160 0x1100 - -echo 97 > /sys/class/gpio/export -echo out > /sys/class/gpio/gpio97/direction -echo 1 > /sys/class/gpio/gpio97/value - -echo 101 > /sys/class/gpio/export -echo out > /sys/class/gpio/gpio101/direction -echo 1 > /sys/class/gpio/gpio101/value - -#wait for chip to start and complete -sleep 1 -res=`i2c_read 4 0xd0 0xa9 0xa9 1 1 |grep error` -if [ -z "$res" ]; then - echo "start config rohm" - bash /etc/init.d/rohm_400M.sh > /dev/null - echo "config rohm success" -fi - -echo 46 > /sys/class/gpio/export -echo out >/sys/class/gpio/gpio46/direction -echo 0 > /sys/class/gpio/gpio46/value -echo 'nameserver 8.8.8.8' >> /etc/resolv.conf -# ifconfig eth0 192.168.0.22 netmask 255.255.255.0 -# route -n add default gw 192.168.0.1 diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/files/ch343/Makefile b/bsp/meta-hisilicon/recipes-bsp/ss928/files/ch343/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..f1124378bbef8838120ec4092c7faf61295087e0 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss928/files/ch343/Makefile @@ -0,0 +1,9 @@ +KERNEL_DIR := $(KERNEL_SRC) +PWD := $(shell pwd) +obj-m := ch343.o + +default: + $(MAKE) -C $(KERNEL_DIR) M=$(PWD) modules + +clean: + $(MAKE) -C $(KERNEL_DIR) M=$(PWD) clean diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/files/ch343/ch343.c b/bsp/meta-hisilicon/recipes-bsp/ss928/files/ch343/ch343.c new file mode 100644 index 0000000000000000000000000000000000000000..51e07b9209bd0731c6bd131864ee0ddbad083eb4 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss928/files/ch343/ch343.c @@ -0,0 +1,2470 @@ +#define DEBUG +#define VERBOSE_DEBUG + +#undef DEBUG +#undef VERBOSE_DEBUG + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0)) +#include +#endif + +#include "ch343.h" + +#define DRIVER_AUTHOR "TECH39" +#define DRIVER_DESC "USB serial driver for ch342/ch343/ch344/ch9101/ch9102/ch9103, etc." +#define VERSION_DESC "V1.1" + +#define IOCTL_MAGIC 'W' +#define IOCTL_CMD_GPIOENABLE _IOW(IOCTL_MAGIC, 0x80, u16) +#define IOCTL_CMD_GPIOSET _IOW(IOCTL_MAGIC, 0x81, u16) +#define IOCTL_CMD_GPIOGET _IOWR(IOCTL_MAGIC, 0x82, u16) +#define IOCTL_CMD_GPIOINFO _IOWR(IOCTL_MAGIC, 0x83, u16) +#define IOCTL_CMD_GETCHIPTYPE _IOR(IOCTL_MAGIC, 0x84, u16) + +static struct usb_driver ch343_driver; +static struct tty_driver *ch343_tty_driver; + +static DEFINE_IDR(ch343_minors); +static DEFINE_MUTEX(ch343_minors_lock); + +static void ch343_tty_set_termios(struct tty_struct *tty, + struct ktermios *termios_old); + +/* + * Look up an ch343 structure by minor. If found and not disconnected, increment + * its refcount and return it with its mutex held. + */ +static struct ch343 *ch343_get_by_minor(unsigned int minor) +{ + struct ch343 *ch343; + + mutex_lock(&ch343_minors_lock); + ch343 = idr_find(&ch343_minors, minor); + if (ch343) { + mutex_lock(&ch343->mutex); + if (ch343->disconnected) { + mutex_unlock(&ch343->mutex); + ch343 = NULL; + } else { + tty_port_get(&ch343->port); + mutex_unlock(&ch343->mutex); + } + } + mutex_unlock(&ch343_minors_lock); + return ch343; +} + +/* + * Try to find an available minor number and if found, associate it with 'ch343'. + */ +static int ch343_alloc_minor(struct ch343 *ch343) +{ + int minor; + + mutex_lock(&ch343_minors_lock); + minor = idr_alloc(&ch343_minors, ch343, 0, CH343_TTY_MINORS, GFP_KERNEL); + mutex_unlock(&ch343_minors_lock); + + return minor; +} + +/* Release the minor number associated with 'ch343'. */ +static void ch343_release_minor(struct ch343 *ch343) +{ + mutex_lock(&ch343_minors_lock); + idr_remove(&ch343_minors, ch343->minor); + mutex_unlock(&ch343_minors_lock); +} + +/* + * Functions for CH343 control messages. + */ +static int ch343_control_out(struct ch343 *ch343, u8 request, + u16 value, u16 index) +{ + int retval; + + retval = usb_autopm_get_interface(ch343->control); + if (retval) + return retval; + + retval = usb_control_msg(ch343->dev, usb_sndctrlpipe(ch343->dev, 0), + request, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT, + value, index, NULL, 0, DEFAULT_TIMEOUT); + + dev_vdbg(&ch343->control->dev, + "ch343_control_out(%02x,%02x,%04x,%04x)\n", + USB_DIR_OUT|0x40, request, value, index); + + usb_autopm_put_interface(ch343->control); + + return retval < 0 ? retval : 0; +} + +static int ch343_control_in(struct ch343 *ch343, + u8 request, u16 value, u16 index, + char *buf, unsigned bufsize) +{ + int retval; + int i; + + retval = usb_autopm_get_interface(ch343->control); + if (retval) + return retval; + + retval = usb_control_msg(ch343->dev, usb_rcvctrlpipe(ch343->dev, 0), request, + USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN, + value, index, buf, bufsize, DEFAULT_TIMEOUT); + + dev_vdbg(&ch343->control->dev, + "ch343_control_in(%02x,%02x,%04x,%04x,%p,%u)\n", + USB_DIR_IN | 0x40, (u8)request, (u16)value, (u16)index, buf, + (int)bufsize); + + dev_vdbg(&ch343->control->dev, + "ch343_control_in result:"); + for (i = 0; i < retval; i++) { + dev_vdbg(&ch343->control->dev, + "0x%.2x ", (u8)buf[i]); + } + + usb_autopm_put_interface(ch343->control); + + return retval < 0 ? retval : 0; +} + +static inline int ch343_set_control(struct ch343 *ch343, int control) +{ + if (ch343->iface <= 1) + return ch343_control_out(ch343, CMD_C2 + ch343->iface, + ~control, 0x0000); + else if (ch343->iface <= 3) + return ch343_control_out(ch343, CMD_C2 + 0x10 + (ch343->iface - 2), + ~control, 0x0000); + else + return -1; +} + +static inline int ch343_set_line(struct ch343 *ch343, struct usb_cdc_line_coding *line) +{ + return 0; +} + +static int ch343_get_status(struct ch343 *ch343) +{ + char *buffer; + int retval; + const unsigned size = 2; + unsigned long flags; + + buffer = kmalloc(size, GFP_KERNEL); + if (!buffer) + return -ENOMEM; + + retval = ch343_control_in(ch343, CMD_R, CMD_C3 + ch343->iface, + 0, buffer, size); + if (retval <= 0) + goto out; + + /* setup the private status if available */ + spin_lock_irqsave(&ch343->read_lock, flags); + ch343->ctrlin = (~(*buffer)) & CH343_CTI_ST; + spin_unlock_irqrestore(&ch343->read_lock, flags); + +out: + kfree(buffer); + return retval; +} + +/* -------------------------------------------------------------------------- */ + +static int ch343_configure(struct ch343 *ch343) +{ + char *buffer; + int r; + const unsigned size = 2; + u8 chiptype; + + buffer = kmalloc(size, GFP_KERNEL); + if (!buffer) + return -ENOMEM; + + r = ch343_control_in(ch343, CMD_C6, 0, 0, buffer, size); + if (r < 0) + goto out; + + chiptype = buffer[1]; + + switch (ch343->idProduct) { + case 0x55D2: + if (chiptype == 0x48) + ch343->chiptype = CHIP_CH342F; + else if (chiptype == 0x41) + ch343->chiptype = CHIP_CH342GJK; + break; + case 0x55D3: + if (chiptype == 0x08) + ch343->chiptype = CHIP_CH343GP; + else if (chiptype == 0x02) + ch343->chiptype = CHIP_CH343J; + else if (chiptype == 0x01) + ch343->chiptype = CHIP_CH343K; + else if (chiptype == 0x18) + ch343->chiptype = CHIP_CH343G_AUTOBAUD; + break; + case 0x55D4: + if (chiptype == 0x08) + ch343->chiptype = CHIP_CH9102F; + else if (chiptype == 0x09) + ch343->chiptype = CHIP_CH9102X; + break; + case 0x55D5: + if (chiptype == 0xC0) + ch343->chiptype = CHIP_CH344L; + break; + case 0x55D7: + if (chiptype == 0x4B) + ch343->chiptype = CHIP_CH9103M; + break; + case 0x55D8: + if (chiptype == 0x08) + ch343->chiptype = CHIP_CH9101UH; + break; + default: + break; + } + + if (ch343->chiptype != CHIP_CH344L) { + r = ch343_get_status(ch343); + if (r < 0) + goto out; + } + + dev_info(&ch343->data->dev, + "%s - chip hver : 0x%2x, sver : 0x%2x, chip : %d\n", + __func__, buffer[0], buffer[1], ch343->chiptype); +out: + kfree(buffer); + return r < 0 ? r : 0; +} + +/* + * Write buffer management. + * All of these assume proper locks taken by the caller. + */ +static int ch343_wb_alloc(struct ch343 *ch343) +{ + int i, wbn; + struct ch343_wb *wb; + + wbn = 0; + i = 0; + for (;;) { + wb = &ch343->wb[wbn]; + if (!wb->use) { + wb->use = 1; + return wbn; + } + wbn = (wbn + 1) % CH343_NW; + if (++i >= CH343_NW) + return -1; + } +} + +static int ch343_wb_is_avail(struct ch343 *ch343) +{ + int i, n; + unsigned long flags; + + n = CH343_NW; + spin_lock_irqsave(&ch343->write_lock, flags); + for (i = 0; i < CH343_NW; i++) + n -= ch343->wb[i].use; + spin_unlock_irqrestore(&ch343->write_lock, flags); + return n; +} + +/* + * Finish write. Caller must hold ch343->write_lock + */ +static void ch343_write_done(struct ch343 *ch343, struct ch343_wb *wb) +{ + wb->use = 0; + ch343->transmitting--; + usb_autopm_put_interface_async(ch343->control); +} + +/* + * Poke write. + * + * the caller is responsible for locking + */ +static int ch343_start_wb(struct ch343 *ch343, struct ch343_wb *wb) +{ + int rc; + + ch343->transmitting++; + + wb->urb->transfer_buffer = wb->buf; + wb->urb->transfer_dma = wb->dmah; + wb->urb->transfer_buffer_length = wb->len; + wb->urb->dev = ch343->dev; + + rc = usb_submit_urb(wb->urb, GFP_ATOMIC); + if (rc < 0) { + dev_err(&ch343->data->dev, + "%s - usb_submit_urb(write bulk) failed: %d\n", + __func__, rc); + ch343_write_done(ch343, wb); + } + return rc; +} + +static void ch343_update_status(struct ch343 *ch343, + unsigned char *data, size_t len) +{ + unsigned long flags; + u8 status; + u8 difference; + u8 type = data[0]; + + if (len < 4) + return; + + if (ch343->chiptype == CHIP_CH344L) { + if (data[0] != 0x00) + return; + type = data[1]; + } + + switch (type) { + case CH343_CTT_M: + status = ~data[len - 1] & CH343_CTI_ST; + if (ch343->chiptype == CHIP_CH344L) + status &= CH343_CTI_C; + + if (!ch343->clocal && (ch343->ctrlin & status & CH343_CTI_DC)) { + tty_port_tty_hangup(&ch343->port, false); + } + + spin_lock_irqsave(&ch343->read_lock, flags); + difference = status ^ ch343->ctrlin; + ch343->ctrlin = status; + ch343->oldcount = ch343->iocount; + + if (!difference) { + spin_unlock_irqrestore(&ch343->read_lock, flags); + return; + } + if (difference & CH343_CTI_C) { + ch343->iocount.cts++; + } + if (difference & CH343_CTI_DS) { + ch343->iocount.dsr++; + } + if (difference & CH343_CTI_R) { + ch343->iocount.rng++; + } + if (difference & CH343_CTI_DC) { + ch343->iocount.dcd++; + } + spin_unlock_irqrestore(&ch343->read_lock, flags); + + wake_up_interruptible(&ch343->wioctl); + break; + case CH343_CTT_O: + spin_lock_irqsave(&ch343->read_lock, flags); + ch343->oldcount = ch343->iocount; + ch343->iocount.overrun++; + spin_unlock_irqrestore(&ch343->read_lock, flags); + break; + case CH343_CTT_P: + spin_lock_irqsave(&ch343->read_lock, flags); + ch343->oldcount = ch343->iocount; + ch343->iocount.parity++; + spin_unlock_irqrestore(&ch343->read_lock, flags); + break; + case CH343_CTT_F: + spin_lock_irqsave(&ch343->read_lock, flags); + ch343->oldcount = ch343->iocount; + ch343->iocount.frame++; + spin_unlock_irqrestore(&ch343->read_lock, flags); + break; + default: + dev_err(&ch343->control->dev, + "%s - unknown status received:" + "len:%d, data0:0x%x, data1:0x%x\n", + __func__, + (int)len, data[0], data[1]); + break; + } +} + +/* Reports status changes with "interrupt" transfers */ +static void ch343_ctrl_irq(struct urb *urb) +{ + struct ch343 *ch343 = urb->context; + unsigned char *data = urb->transfer_buffer; + unsigned int len = urb->actual_length; + int status = urb->status; + int retval; + + switch (status) { + case 0: + /* success */ + break; + case -ECONNRESET: + case -ENOENT: + case -ESHUTDOWN: + /* this urb is terminated, clean up */ + dev_dbg(&ch343->control->dev, + "%s - urb shutting down with status: %d\n", + __func__, status); + return; + default: + dev_dbg(&ch343->control->dev, + "%s - nonzero urb status received: %d\n", + __func__, status); + goto exit; + } + + usb_mark_last_busy(ch343->dev); + //ch343_update_status(ch343, data, len); +exit: + retval = usb_submit_urb(urb, GFP_ATOMIC); + if (retval && retval != -EPERM) + dev_err(&ch343->control->dev, "%s - usb_submit_urb failed: %d\n", + __func__, retval); +} + +static int ch343_submit_read_urb(struct ch343 *ch343, int index, gfp_t mem_flags) +{ + int res; + + if (!test_and_clear_bit(index, &ch343->read_urbs_free)) + return 0; + + dev_vdbg(&ch343->data->dev, "%s - urb %d\n", __func__, index); + + res = usb_submit_urb(ch343->read_urbs[index], mem_flags); + if (res) { + if (res != -EPERM) { + dev_err(&ch343->data->dev, + "%s - usb_submit_urb failed: %d\n", + __func__, res); + } + set_bit(index, &ch343->read_urbs_free); + return res; + } + + return 0; +} + +static int ch343_submit_read_urbs(struct ch343 *ch343, gfp_t mem_flags) +{ + int res; + int i; + + for (i = 0; i < ch343->rx_buflimit; ++i) { + res = ch343_submit_read_urb(ch343, i, mem_flags); + if (res) + return res; + } + + return 0; +} + +static void ch343_process_read_urb(struct ch343 *ch343, struct urb *urb) +{ + if (!urb->actual_length) + return; + + tty_insert_flip_string(&ch343->port, urb->transfer_buffer, + urb->actual_length); + tty_flip_buffer_push(&ch343->port); +} + +static void ch343_read_bulk_callback(struct urb *urb) +{ + struct ch343_rb *rb = urb->context; + struct ch343 *ch343 = rb->instance; + int status = urb->status; + + dev_vdbg(&ch343->data->dev, "%s - urb %d, len %d\n", __func__, + rb->index, urb->actual_length); + + if (!ch343->dev) { + set_bit(rb->index, &ch343->read_urbs_free); + dev_dbg(&ch343->data->dev, "%s - disconnected\n", __func__); + return; + } + + if (status) { + set_bit(rb->index, &ch343->read_urbs_free); + dev_dbg(&ch343->data->dev, "%s - non-zero urb status: %d\n", + __func__, status); + return; + } + + usb_mark_last_busy(ch343->dev); + ch343_process_read_urb(ch343, urb); + set_bit(rb->index, &ch343->read_urbs_free); + ch343_submit_read_urb(ch343, rb->index, GFP_ATOMIC); +} + +/* data interface wrote those outgoing bytes */ +static void ch343_write_bulk(struct urb *urb) +{ + struct ch343_wb *wb = urb->context; + struct ch343 *ch343 = wb->instance; + unsigned long flags; + int status = urb->status; + + dev_vdbg(&ch343->data->dev, "%s, len %d\n", __func__, urb->actual_length); + if (status || (urb->actual_length != urb->transfer_buffer_length)) + dev_vdbg(&ch343->data->dev, "%s - len %d/%d, status %d\n", + __func__, + urb->actual_length, + urb->transfer_buffer_length, + status); + + spin_lock_irqsave(&ch343->write_lock, flags); + ch343_write_done(ch343, wb); + spin_unlock_irqrestore(&ch343->write_lock, flags); + schedule_work(&ch343->work); +} + +static void ch343_softint(struct work_struct *work) +{ + struct ch343 *ch343 = container_of(work, struct ch343, work); + + dev_dbg(&ch343->data->dev, "%s\n", __func__); + + tty_port_tty_wakeup(&ch343->port); +} + +/* + * TTY handlers + */ +static int ch343_tty_install(struct tty_driver *driver, struct tty_struct *tty) +{ + struct ch343 *ch343; + int retval; + + dev_dbg(tty->dev, "%s\n", __func__); + + ch343 = ch343_get_by_minor(tty->index); + if (!ch343) + return -ENODEV; + + retval = tty_standard_install(driver, tty); + if (retval) + goto error_init_termios; + + tty->driver_data = ch343; + + return 0; + +error_init_termios: + tty_port_put(&ch343->port); + return retval; +} + +static int ch343_tty_open(struct tty_struct *tty, struct file *filp) +{ + struct ch343 *ch343 = tty->driver_data; + + dev_dbg(tty->dev, "%s\n", __func__); + + return tty_port_open(&ch343->port, tty, filp); +} + +static void ch343_port_dtr_rts(struct tty_port *port, int raise) +{ + struct ch343 *ch343 = container_of(port, struct ch343, port); + int res; + + dev_dbg(&ch343->data->dev, "%s, raise:%d\n", __func__, raise); + + if (raise) + ch343->ctrlout |= CH343_CTO_D | CH343_CTO_R; + else + ch343->ctrlout &= ~(CH343_CTO_D | CH343_CTO_R); + + res = ch343_set_control(ch343, ch343->ctrlout); + if (res) + dev_err(&ch343->control->dev, "failed to set dtr/rts\n"); +} + +static int ch343_port_activate(struct tty_port *port, struct tty_struct *tty) +{ + struct ch343 *ch343 = container_of(port, struct ch343, port); + int retval = -ENODEV; + + dev_dbg(&ch343->control->dev, "%s\n", __func__); + + mutex_lock(&ch343->mutex); + if (ch343->disconnected) + goto disconnected; + + retval = usb_autopm_get_interface(ch343->control); + if (retval) + goto error_get_interface; + + /* + * FIXME: Why do we need this? Allocating 64K of physically contiguous + * memory is really nasty... + */ + set_bit(TTY_NO_WRITE_SPLIT, &tty->flags); + ch343->control->needs_remote_wakeup = 1; + + retval = ch343_configure(ch343); + if (retval) + goto error_configure; + + ch343_tty_set_termios(tty, NULL); + + usb_autopm_put_interface(ch343->control); + + mutex_unlock(&ch343->mutex); + + return 0; + +error_configure: + usb_autopm_put_interface(ch343->control); +error_get_interface: +disconnected: + mutex_unlock(&ch343->mutex); + + return usb_translate_errors(retval); +} + +static void ch343_port_destruct(struct tty_port *port) +{ + struct ch343 *ch343 = container_of(port, struct ch343, port); + + dev_dbg(&ch343->control->dev, "%s\n", __func__); + + ch343_release_minor(ch343); + usb_put_intf(ch343->control); + kfree(ch343); +} + +static void ch343_port_shutdown(struct tty_port *port) +{ + struct ch343 *ch343 = container_of(port, struct ch343, port); + + dev_dbg(&ch343->control->dev, "%s\n", __func__); + +} + +static void ch343_tty_cleanup(struct tty_struct *tty) +{ + struct ch343 *ch343 = tty->driver_data; + dev_dbg(&ch343->control->dev, "%s\n", __func__); + tty_port_put(&ch343->port); +} + +static void ch343_tty_hangup(struct tty_struct *tty) +{ + struct ch343 *ch343 = tty->driver_data; + dev_dbg(&ch343->control->dev, "%s\n", __func__); + tty_port_hangup(&ch343->port); +} + +static void ch343_tty_close(struct tty_struct *tty, struct file *filp) +{ + struct ch343 *ch343 = tty->driver_data; + dev_dbg(&ch343->control->dev, "%s\n", __func__); + tty_port_close(&ch343->port, tty, filp); +} + +static int ch343_tty_write(struct tty_struct *tty, + const unsigned char *buf, int count) +{ + struct ch343 *ch343 = tty->driver_data; + int stat; + unsigned long flags; + int wbn; + struct ch343_wb *wb; + + if (!count) + return 0; + + dev_vdbg(&ch343->data->dev, "%s - count %d\n", __func__, count); + + spin_lock_irqsave(&ch343->write_lock, flags); + wbn = ch343_wb_alloc(ch343); + if (wbn < 0) { + spin_unlock_irqrestore(&ch343->write_lock, flags); + return 0; + } + wb = &ch343->wb[wbn]; + + if (!ch343->dev) { + wb->use = 0; + spin_unlock_irqrestore(&ch343->write_lock, flags); + return -ENODEV; + } + + count = (count > ch343->writesize) ? ch343->writesize : count; + + memcpy(wb->buf, buf, count); + wb->len = count; + + stat = usb_autopm_get_interface_async(ch343->control); + if (stat) { + wb->use = 0; + spin_unlock_irqrestore(&ch343->write_lock, flags); + return stat; + } + + if (ch343->susp_count) { + usb_anchor_urb(wb->urb, &ch343->delayed); + spin_unlock_irqrestore(&ch343->write_lock, flags); + return count; + } + + stat = ch343_start_wb(ch343, wb); + spin_unlock_irqrestore(&ch343->write_lock, flags); + + if (stat < 0) + return stat; + return count; +} + +static int ch343_tty_write_room(struct tty_struct *tty) +{ + struct ch343 *ch343 = tty->driver_data; + /* + * Do not let the line discipline to know that we have a reserve, + * or it might get too enthusiastic. + */ + return ch343_wb_is_avail(ch343) ? ch343->writesize : 0; +} + +static int ch343_tty_chars_in_buffer(struct tty_struct *tty) +{ + struct ch343 *ch343 = tty->driver_data; + /* + * if the device was unplugged then any remaining characters fell out + * of the connector ;) + */ + if (ch343->disconnected) + return 0; + /* + * This is inaccurate (overcounts), but it works. + */ + return (CH343_NW - ch343_wb_is_avail(ch343)) * ch343->writesize; +} + +static int ch343_tty_break_ctl(struct tty_struct *tty, int state) +{ + struct ch343 *ch343 = tty->driver_data; + int retval; + uint16_t reg_contents; + uint8_t *regbuf; + + dev_dbg(&ch343->control->dev, "%s\n", __func__); + + regbuf = kmalloc(2, GFP_KERNEL); + if (!regbuf) + return -1; + + if (state != 0) { + regbuf[0] = CH343_N_B; + regbuf[1] = 0x00; + } else { + regbuf[0] = CH343_N_B | CH343_N_AB; + regbuf[1] = 0x00; + } + reg_contents = get_unaligned_le16(regbuf); + + if (ch343->iface) + retval = ch343_control_out(ch343, CMD_C4, 0x00, + reg_contents); + else + retval = ch343_control_out(ch343, CMD_C4, reg_contents, + 0x00); + + if (retval < 0) + dev_err(&ch343->control->dev, "%s - USB control write error (%d)\n", + __func__, retval); + + kfree(regbuf); + + return retval; +} + +static int ch343_tty_tiocmget(struct tty_struct *tty) +{ + struct ch343 *ch343 = tty->driver_data; + unsigned long flags; + unsigned int result; + + dev_dbg(&ch343->control->dev, "%s\n", __func__); + + spin_lock_irqsave(&ch343->read_lock, flags); + result = (ch343->ctrlout & CH343_CTO_D ? TIOCM_DTR : 0) | + (ch343->ctrlout & CH343_CTO_R ? TIOCM_RTS : 0) | + (ch343->ctrlin & CH343_CTI_C ? TIOCM_CTS : 0) | + (ch343->ctrlin & CH343_CTI_DS ? TIOCM_DSR : 0) | + (ch343->ctrlin & CH343_CTI_R ? TIOCM_RI : 0) | + (ch343->ctrlin & CH343_CTI_DC ? TIOCM_CD : 0); + spin_unlock_irqrestore(&ch343->read_lock, flags); + + return result; +} + +static int ch343_tty_tiocmset(struct tty_struct *tty, + unsigned int set, unsigned int clear) +{ + struct ch343 *ch343 = tty->driver_data; + unsigned int newctrl; + + dev_dbg(&ch343->control->dev, "%s\n", __func__); + + newctrl = ch343->ctrlout; + set = (set & TIOCM_DTR ? CH343_CTO_D : 0) | + (set & TIOCM_RTS ? CH343_CTO_R : 0); + clear = (clear & TIOCM_DTR ? CH343_CTO_D : 0) | + (clear & TIOCM_RTS ? CH343_CTO_R : 0); + + newctrl = (newctrl & ~clear) | set; + + if (ch343->ctrlout == newctrl) + return 0; + return ch343_set_control(ch343, ch343->ctrlout = newctrl); +} + +static int ch343_tty_ioctl(struct tty_struct *tty, + unsigned int cmd, unsigned long arg) +{ + struct ch343 *ch343 = tty->driver_data; + int rv = 0; + + unsigned long arg1; + unsigned long arg2; + unsigned long arg3; + u32 inarg; + u16 inargH, inargL; + u32 __user *argval = (u32 __user *)arg; + + u8 gbit1, gbit2, gbit3; + u8 gen1, gd1, gen2, gd2, gen3, gd3; + u8 gv1, gv2, gv3; + + u16 gev, gdv, gv; + u16 value, index; + u8 *buffer; + + dev_dbg(&ch343->control->dev, "%s\n", __func__); + + buffer = kmalloc(8, GFP_KERNEL); + if (!buffer) + return -ENOMEM; + + switch (cmd) { + case TIOCGSERIAL: /* gets serial port data */ + break; + case TIOCSSERIAL: + break; + case TIOCMIWAIT: + break; + case TIOCGICOUNT: + break; + case IOCTL_CMD_GETCHIPTYPE: + if (put_user(ch343->chiptype, argval)) { + rv = -EFAULT; + goto out; + } + break; + case IOCTL_CMD_GPIOINFO: + get_user(arg1, (long __user *)arg); + get_user(arg2, ((long __user *)arg + 1)); + get_user(arg3, ((long __user *)arg + 2)); + + rv = ch343_control_in(ch343, CMD_C11, 0x00, + 0x00, buffer, 0x08); + if (rv < 0) + goto out; + + gen1 = buffer[0]; + gen2 = buffer[1]; + gen3 = buffer[2]; + rv = ch343_control_in(ch343, CMD_C10, 0x00, + 0x00, buffer, 0x08); + if (rv < 0) + goto out; + + gd1 = buffer[0]; + gd2 = buffer[1]; + gd3 = buffer[2]; + gv1 = buffer[3]; + gv2 = buffer[4]; + gv3 = buffer[5]; + gev = gdv = gv = 0x00; + + if (ch343->chiptype == CHIP_CH9102X) { + if (gen2 & BIT(3)) + gev |= BIT(0); + if (gen2 & BIT(5)) + gev |= BIT(1); + if (gen2 & BIT(1)) + gev |= BIT(2); + if (gen2 & BIT(7)) + gev |= BIT(3); + if (gen3 & BIT(0)) + gev |= BIT(5); + if (gen2 & BIT(2)) + gev |= BIT(6); + + if (gd2 & BIT(3)) + gdv |= BIT(0); + if (gd2 & BIT(5)) + gdv |= BIT(1); + if (gd2 & BIT(1)) + gdv |= BIT(2); + if (gd2 & BIT(7)) + gdv |= BIT(3); + if (gd3 & BIT(0)) + gdv |= BIT(5); + if (gd2 & BIT(2)) + gdv |= BIT(6); + + if (gv2 & BIT(3)) + gv |= BIT(0); + if (gv2 & BIT(5)) + gv |= BIT(1); + if (gv2 & BIT(1)) + gv |= BIT(2); + if (gv2 & BIT(7)) + gv |= BIT(3); + if (gv3 & BIT(0)) + gv |= BIT(5); + if (gv2 & BIT(2)) + gv |= BIT(6); + } else if (ch343->chiptype == CHIP_CH9102F) { + if (gen2 & BIT(1)) + gev |= BIT(0); + if (gen2 & BIT(7)) + gev |= BIT(1); + if (gen2 & BIT(4)) + gev |= BIT(2); + if (gen2 & BIT(6)) + gev |= BIT(3); + if (gen2 & BIT(3)) + gev |= BIT(4); + + if (gd2 & BIT(1)) + gdv |= BIT(0); + if (gd2 & BIT(7)) + gdv |= BIT(1); + if (gd2 & BIT(4)) + gdv |= BIT(2); + if (gd2 & BIT(6)) + gdv |= BIT(3); + if (gd2 & BIT(3)) + gdv |= BIT(4); + + if (gv2 & BIT(1)) + gv |= BIT(0); + if (gv2 & BIT(7)) + gv |= BIT(1); + if (gv2 & BIT(4)) + gv |= BIT(2); + if (gv2 & BIT(6)) + gv |= BIT(3); + if (gv2 & BIT(3)) + gv |= BIT(4); + } else if (ch343->chiptype == CHIP_CH9103M) { + if (gen1 & BIT(3)) + gev |= BIT(0); + if (gen1 & BIT(2)) + gev |= BIT(1); + if (gen3 & BIT(2)) + gev |= BIT(2); + if (gen2 & BIT(6)) + gev |= BIT(3); + if (gen1 & BIT(0)) + gev |= BIT(4); + if (gen1 & BIT(6)) + gev |= BIT(5); + if (gen2 & BIT(3)) + gev |= BIT(6); + if (gen2 & BIT(5)) + gev |= BIT(7); + if (gen3 & BIT(0)) + gev |= BIT(8); + if (gen2 & BIT(2)) + gev |= BIT(9); + if (gen1 & BIT(5)) + gev |= BIT(10); + if (gen2 & BIT(4)) + gev |= BIT(11); + + if (gd1 & BIT(3)) + gdv |= BIT(0); + if (gd1 & BIT(2)) + gdv |= BIT(1); + if (gd3 & BIT(2)) + gdv |= BIT(2); + if (gd2 & BIT(6)) + gdv |= BIT(3); + if (gd1 & BIT(0)) + gdv |= BIT(4); + if (gd1 & BIT(6)) + gdv |= BIT(5); + if (gd2 & BIT(3)) + gdv |= BIT(6); + if (gd2 & BIT(5)) + gdv |= BIT(7); + if (gd3 & BIT(0)) + gdv |= BIT(8); + if (gd2 & BIT(2)) + gdv |= BIT(9); + if (gd1 & BIT(5)) + gdv |= BIT(10); + if (gd2 & BIT(4)) + gdv |= BIT(11); + + if (gv1 & BIT(3)) + gv |= BIT(0); + if (gv1 & BIT(2)) + gv |= BIT(1); + if (gv3 & BIT(2)) + gv |= BIT(2); + if (gv2 & BIT(6)) + gv |= BIT(3); + if (gv1 & BIT(0)) + gv |= BIT(4); + if (gv1 & BIT(6)) + gv |= BIT(5); + if (gv2 & BIT(3)) + gv |= BIT(6); + if (gv2 & BIT(5)) + gv |= BIT(7); + if (gv3 & BIT(0)) + gv |= BIT(8); + if (gv2 & BIT(2)) + gv |= BIT(9); + if (gv1 & BIT(5)) + gv |= BIT(10); + if (gv2 & BIT(4)) + gv |= BIT(11); + } else if (ch343->chiptype == CHIP_CH9101UH) { + + } + + put_user(gev, (u16 __user *)arg1); + put_user(gdv, (u16 __user *)arg2); + put_user(gv, (u16 __user *)arg3); + + break; + case IOCTL_CMD_GPIOENABLE: + if (get_user(inarg, argval)) { + rv = -EFAULT; + goto out; + } + rv = ch343_control_in(ch343, CMD_C11, 0x00, + 0x00, buffer, 0x08); + if (rv < 0) + goto out; + + gen1 = buffer[0]; + gen2 = buffer[1]; + gen3 = buffer[2]; + + rv = ch343_control_in(ch343, CMD_C10, 0x00, + 0x00, buffer, 0x08); + if (rv < 0) + goto out; + + gd1 = buffer[0]; + gd2 = buffer[1]; + gd3 = buffer[2]; + gv1 = buffer[3]; + gv2 = buffer[4]; + gv3 = buffer[5]; + + inargH = inarg >> 16; + inargL = inarg; + + if (ch343->chiptype == CHIP_CH9102X) { + if (inargH & BIT(0)) { + gen2 |= BIT(3); + if (inargL & BIT(0)) + gd2 |= BIT(3); + else + gd2 &= ~BIT(3); + } else { + gen2 &= ~BIT(3); + } + if (inargH & BIT(1)) { + gen2 |= BIT(5); + if (inargL & BIT(1)) + gd2 |= BIT(5); + else + gd2 &= ~BIT(5); + } else + gen2 &= ~BIT(5); + if (inargH & BIT(2)) { + gen2 |= BIT(1); + if (inargL & BIT(2)) + gd2 |= BIT(1); + else + gd2 &= ~BIT(1); + } else + gen2 &= ~BIT(1); + if (inargH & BIT(3)) { + gen2 |= BIT(7); + if (inargL & BIT(3)) + gd2 |= BIT(7); + else + gd2 &= ~BIT(7); + } else + gen2 &= ~BIT(7); + if (inargH & BIT(5)) { + gen3 |= BIT(0); + if (inargL & BIT(5)) + gd3 |= BIT(0); + else + gd3 &= ~BIT(0); + } else + gen2 &= ~BIT(7); + if (inargH & BIT(6)) { + gen2 |= BIT(2); + if (inargL & BIT(6)) + gd2 |= BIT(2); + else + gd2 &= ~BIT(2); + } else + gen2 &= ~BIT(2); + } else if (ch343->chiptype == CHIP_CH9102F) { + if (inargH & BIT(0)) { + gen2 |= BIT(1); + if (inargL & BIT(0)) + gd2 |= BIT(1); + else + gd2 &= ~BIT(1); + } else + gen2 &= ~BIT(1); + if (inargH & BIT(1)) { + gen2 |= BIT(7); + if (inargL & BIT(1)) + gd2 |= BIT(7); + else + gd2 &= ~BIT(7); + } else + gen2 &= ~BIT(7); + if (inargH & BIT(2)) { + gen2 |= BIT(4); + if (inargL & BIT(2)) + gd2 |= BIT(4); + else + gd2 &= ~BIT(4); + } else + gen2 &= ~BIT(4); + if (inargH & BIT(3)) { + gen2 |= BIT(6); + if (inargL & BIT(3)) + gd2 |= BIT(6); + else + gd2 &= ~BIT(6); + } else + gen2 &= ~BIT(6); + if (inargH & BIT(4)) { + gen2 |= BIT(3); + if (inargL & BIT(4)) + gd2 |= BIT(3); + else + gd2 &= ~BIT(3); + } else + gen2 &= ~BIT(3); + } else if (ch343->chiptype == CHIP_CH9103M) { + if (inargH & BIT(0)) { + gen1 |= BIT(3); + if (inargL & BIT(0)) + gd1 |= BIT(3); + else + gd1 &= ~BIT(3); + } else + gen1 &= ~BIT(3); + if (inargH & BIT(1)) { + gen1 |= BIT(2); + if (inargL & BIT(1)) + gd1 |= BIT(2); + else + gd1 &= ~BIT(2); + } else + gen1 &= ~BIT(2); + if (inargH & BIT(2)) { + gen3 |= BIT(2); + if (inargL & BIT(2)) + gd3 |= BIT(2); + else + gd3 &= ~BIT(2); + } else + gen3 &= ~BIT(2); + if (inargH & BIT(3)) { + gen2 |= BIT(6); + if (inargL & BIT(3)) + gd2 |= BIT(6); + else + gd2 &= ~BIT(6); + } else + gen2 &= ~BIT(6); + if (inargH & BIT(4)) { + gen1 |= BIT(0); + if (inargL & BIT(4)) + gd1 |= BIT(0); + else + gd1 &= ~BIT(0); + } else + gen1 &= ~BIT(0); + if (inargH & BIT(5)) { + gen1 |= BIT(6); + if (inargL & BIT(5)) + gd1 |= BIT(6); + else + gd1 &= ~BIT(6); + } else + gen1 &= ~BIT(6); + if (inargH & BIT(6)) { + gen2 |= BIT(3); + if (inargL & BIT(6)) + gd2 |= BIT(3); + else + gd2 &= ~BIT(3); + } else + gen2 &= ~BIT(3); + if (inargH & BIT(7)) { + gen2 |= BIT(5); + if (inargL & BIT(7)) + gd2 |= BIT(5); + else + gd2 &= ~BIT(5); + } else + gen2 &= ~BIT(5); + if (inargH & BIT(8)) { + gen3 |= BIT(0); + if (inargL & BIT(8)) + gd3 |= BIT(0); + else + gd3 &= ~BIT(0); + } else + gen3 &= ~BIT(0); + if (inargH & BIT(9)) { + gen2 |= BIT(2); + if (inargL & BIT(9)) + gd2 |= BIT(2); + else + gd2 &= ~BIT(2); + } else + gen2 &= ~BIT(2); + if (inargH & BIT(10)) { + gen1 |= BIT(5); + if (inargL & BIT(10)) + gd1 |= BIT(5); + else + gd1 &= ~BIT(5); + } else + gen1 &= ~BIT(5); + if (inargH & BIT(11)) { + gen2 |= BIT(4); + if (inargL & BIT(11)) + gd2 |= BIT(4); + else + gd2 &= ~BIT(4); + } else + gen2 &= ~BIT(4); + } else if (ch343->chiptype == CHIP_CH9101UH) { + if (inargH & BIT(0)) { + gen2 |= BIT(6); + if (inargL & BIT(0)) + gd2 |= BIT(6); + else + gd2 &= ~BIT(6); + } else + gen2 &= ~BIT(6); + if (inargH & BIT(1)) { + gen2 |= BIT(0); + if (inargL & BIT(1)) + gd2 |= BIT(0); + else + gd2 &= ~BIT(0); + } else + gen2 &= ~BIT(0); + if (inargH & BIT(2)) { + gen1 |= BIT(2); + if (inargL & BIT(2)) + gd1 |= BIT(2); + else + gd1 &= ~BIT(2); + } else + gen1 &= ~BIT(2); + if (inargH & BIT(3)) { + gen2 |= BIT(2); + if (inargL & BIT(3)) + gd2 |= BIT(2); + else + gd2 &= ~BIT(2); + } else + gen2 &= ~BIT(2); + if (inargH & BIT(4)) { + gen1 |= BIT(5); + if (inargL & BIT(4)) + gd1 |= BIT(5); + else + gd1 &= ~BIT(5); + } else + gen1 &= ~BIT(5); + if (inargH & BIT(5)) { + gen1 |= BIT(4); + if (inargL & BIT(5)) + gd1 |= BIT(4); + else + gd1 &= ~BIT(4); + } else + gen1 &= ~BIT(4); + if (inargH & BIT(6)) { + gen2 |= BIT(4); + if (inargL & BIT(6)) + gd2 |= BIT(4); + else + gd2 &= ~BIT(4); + } else + gen2 &= ~BIT(4); + } + value = gen1 + ((u16)gd1 << 8); + index = gen2 + ((u16)gd2 << 8); + rv = ch343_control_out(ch343, CMD_C7, value, index); + if (rv < 0) + goto out; + value = gd3 + ((u16)gv3 << 8); + index = gen3; + rv = ch343_control_out(ch343, CMD_C8, value, index); + if (rv < 0) + goto out; + + break; + case IOCTL_CMD_GPIOSET: + if (get_user(inarg, argval)) { + rv = -EFAULT; + goto out; + } + + rv = ch343_control_in(ch343, CMD_C11, 0x00, + 0x00, buffer, 0x08); + if (rv < 0) + goto out; + + gen1 = buffer[0]; + gen2 = buffer[1]; + gen3 = buffer[2]; + + rv = ch343_control_in(ch343, CMD_C10, 0x00, + 0x00, buffer, 0x08); + if (rv < 0) + goto out; + + gd1 = buffer[0]; + gd2 = buffer[1]; + gd3 = buffer[2]; + gv1 = buffer[3]; + gv2 = buffer[4]; + gv3 = buffer[5]; + + inargH = inarg >> 16; + inargL = inarg; + + gbit1 = gbit2 = gbit3 = 0x00; + + if (ch343->chiptype == CHIP_CH9102X) { + if ((inargH & BIT(0)) && (gen2 & BIT(3)) && (gd2 & BIT(3))) { + gbit2 |= BIT(3); + if (inargL & BIT(0)) + gv2 |= BIT(3); + else + gv2 &= ~BIT(3); + } + if ((inargH & BIT(1)) && (gen2 & BIT(5)) && (gd2 & BIT(5))) { + gbit2 |= BIT(5); + if (inargL & BIT(1)) + gv2 |= BIT(5); + else + gv2 &= ~BIT(5); + } + if ((inargH & BIT(2)) && (gen2 & BIT(1)) && (gd2 & BIT(1))) { + gbit2 |= BIT(1); + if (inargL & BIT(2)) + gv2 |= BIT(1); + else + gv2 &= ~BIT(1); + } + if ((inargH & BIT(3)) && (gen2 & BIT(7)) && (gd2 & BIT(7))) { + gbit2 |= BIT(7); + if (inargL & BIT(3)) + gv2 |= BIT(7); + else + gv2 &= ~BIT(7); + } + if ((inargH & BIT(5)) && (gen3 & BIT(0)) && (gd3 & BIT(0))) { + gbit3 |= BIT(0); + if (inargL & BIT(5)) + gv3 |= BIT(0); + else + gv3 &= ~BIT(0); + } + if ((inargH & BIT(6)) && (gen2 & BIT(2)) && (gd2 & BIT(2))) { + gbit2 |= BIT(2); + if (inargL & BIT(6)) + gv2 |= BIT(2); + else + gv2 &= ~BIT(2); + } + } else if (ch343->chiptype == CHIP_CH9102F) { + if ((inargH & BIT(0)) && (gen2 & BIT(1)) && (gd2 & BIT(1))) { + gbit2 |= BIT(1); + if (inargL & BIT(0)) + gv2 |= BIT(1); + else + gv2 &= ~BIT(1); + } + if ((inargH & BIT(1)) && (gen2 & BIT(7)) && (gd2 & BIT(7))) { + gbit2 |= BIT(7); + if (inargL & BIT(1)) + gv2 |= BIT(7); + else + gv2 &= ~BIT(7); + } + if ((inargH & BIT(2)) && (gen2 & BIT(4)) && (gd2 & BIT(4))) { + gbit2 |= BIT(4); + if (inargL & BIT(2)) + gv2 |= BIT(4); + else + gv2 &= ~BIT(4); + } + if ((inargH & BIT(3)) && (gen2 & BIT(6)) && (gd2 & BIT(6))) { + gbit2 |= BIT(6); + if (inargL & BIT(3)) + gv2 |= BIT(6); + else + gv2 &= ~BIT(6); + } + if ((inargH & BIT(4)) && (gen2 & BIT(3)) && (gd2 & BIT(3))) { + gbit2 |= BIT(3); + if (inargL & BIT(4)) + gv2 |= BIT(3); + else + gv2 &= ~BIT(3); + } + } else if (ch343->chiptype == CHIP_CH9103M) { + if ((inargH & BIT(0)) && (gen1 & BIT(3)) && (gd1 & BIT(3))) { + gbit1 |= BIT(3); + if (inargL & BIT(0)) + gv1 |= BIT(3); + else + gv1 &= ~BIT(3); + } + if ((inargH & BIT(1)) && (gen1 & BIT(2)) && (gd1 & BIT(2))) { + gbit1 |= BIT(2); + if (inargL & BIT(1)) + gv1 |= BIT(2); + else + gv1 &= ~BIT(2); + } + if ((inargH & BIT(2)) && (gen3 & BIT(2)) && (gd3 & BIT(2))) { + gbit3 |= BIT(2); + if (inargL & BIT(2)) + gv3 |= BIT(2); + else + gv3 &= ~BIT(2); + } + if ((inargH & BIT(3)) && (gen2 & BIT(6)) && (gd2 & BIT(6))) { + gbit2 |= BIT(6); + if (inargL & BIT(3)) + gv2 |= BIT(6); + else + gv2 &= ~BIT(6); + } + if ((inargH & BIT(4)) && (gen1 & BIT(0)) && (gd1 & BIT(0))) { + gbit1 |= BIT(0); + if (inargL & BIT(4)) + gv1 |= BIT(0); + else + gv1 &= ~BIT(0); + } + if ((inargH & BIT(5)) && (gen1 & BIT(6)) && (gd1 & BIT(6))) { + gbit1 |= BIT(6); + if (inargL & BIT(5)) + gv1 |= BIT(6); + else + gv1 &= ~BIT(6); + } + if ((inargH & BIT(6)) && (gen2 & BIT(3)) && (gd2 & BIT(3))) { + gbit2 |= BIT(3); + if (inargL & BIT(6)) + gv2 |= BIT(3); + else + gv2 &= ~BIT(3); + } + if ((inargH & BIT(7)) && (gen2 & BIT(5)) && (gd2 & BIT(5))) { + gbit2 |= BIT(5); + if (inargL & BIT(7)) + gv2 |= BIT(5); + else + gv2 &= ~BIT(5); + } + if ((inargH & BIT(8)) && (gen3 & BIT(0)) && (gd3 & BIT(0))) { + gbit3 |= BIT(0); + if (inargL & BIT(8)) + gv3 |= BIT(0); + else + gv3 &= ~BIT(0); + } + if ((inargH & BIT(9)) && (gen2 & BIT(2)) && (gd2 & BIT(2))) { + gbit2 |= BIT(2); + if (inargL & BIT(9)) + gv2 |= BIT(2); + else + gv2 &= ~BIT(2); + } + if ((inargH & BIT(10)) && (gen1 & BIT(5)) && (gd1 & BIT(5))) { + gbit1 |= BIT(5); + if (inargL & BIT(10)) + gv1 |= BIT(5); + else + gv1 &= ~BIT(5); + } + if ((inargH & BIT(11)) && (gen2 & BIT(4)) && (gd2 & BIT(4))) { + gbit2 |= BIT(4); + if (inargL & BIT(11)) + gv2 |= BIT(4); + else + gv2 &= ~BIT(4); + } + } else if (ch343->chiptype == CHIP_CH9101UH) { + if ((inargH & BIT(0)) && (gen2 & BIT(6)) && (gd2 & BIT(6))) { + gbit2 |= BIT(6); + if (inargL & BIT(0)) + gv2 |= BIT(6); + else + gv2 &= ~BIT(6); + } + if ((inargH & BIT(1)) && (gen2 & BIT(0)) && (gd2 & BIT(0))) { + gbit2 |= BIT(0); + if (inargL & BIT(1)) + gv2 |= BIT(0); + else + gv2 &= ~BIT(0); + } + if ((inargH & BIT(2)) && (gen1 & BIT(2)) && (gd1 & BIT(2))) { + gbit1 |= BIT(2); + if (inargL & BIT(2)) + gv1 |= BIT(2); + else + gv1 &= ~BIT(2); + } + if ((inargH & BIT(3)) && (gen2 & BIT(2)) && (gd2 & BIT(2))) { + gbit2 |= BIT(2); + if (inargL & BIT(3)) + gv2 |= BIT(2); + else + gv2 &= ~BIT(2); + } + if ((inargH & BIT(4)) && (gen1 & BIT(5)) && (gd1 & BIT(5))) { + gbit1 |= BIT(5); + if (inargL & BIT(4)) + gv1 |= BIT(5); + else + gv1 &= ~BIT(5); + } + if ((inargH & BIT(5)) && (gen1 & BIT(4)) && (gd1 & BIT(4))) { + gbit1 |= BIT(4); + if (inargL & BIT(5)) + gv1 |= BIT(4); + else + gv1 &= ~BIT(4); + } + if ((inargH & BIT(6)) && (gen2 & BIT(4)) && (gd2 & BIT(4))) { + gbit2 |= BIT(4); + if (inargL & BIT(6)) + gv2 |= BIT(4); + else + gv2 &= ~BIT(4); + } + + } + + value = gbit1 + ((u16)gv1 << 8); + index = gbit2 + ((u16)gv2 << 8); + rv = ch343_control_out(ch343, CMD_C9, value, index); + if (rv < 0) + goto out; + + value = gd3 + ((u16)gv3 << 8); + index = gen3; + rv = ch343_control_out(ch343, CMD_C8, value, index); + if (rv < 0) + goto out; + + break; + case IOCTL_CMD_GPIOGET: + if (get_user(inarg, argval)) { + rv = -EFAULT; + goto out; + } + + rv = ch343_control_in(ch343, CMD_C10, 0x00, + 0x00, buffer, 0x08); + if (rv < 0) + goto out; + + gd1 = buffer[0]; + gd2 = buffer[1]; + gd3 = buffer[2]; + gv1 = buffer[3]; + gv2 = buffer[4]; + gv3 = buffer[5]; + + if (ch343->chiptype == CHIP_CH9102X) { + if (gv2 & BIT(3)) + gv |= BIT(0); + if (gv2 & BIT(5)) + gv |= BIT(1); + if (gv2 & BIT(1)) + gv |= BIT(2); + if (gv2 & BIT(7)) + gv |= BIT(3); + if (gv3 & BIT(0)) + gv |= BIT(5); + if (gv2 & BIT(2)) + gv |= BIT(6); + } else if (ch343->chiptype == CHIP_CH9102F) { + if (gv2 & BIT(1)) + gv |= BIT(0); + if (gv2 & BIT(7)) + gv |= BIT(1); + if (gv2 & BIT(4)) + gv |= BIT(2); + if (gv2 & BIT(6)) + gv |= BIT(3); + if (gv2 & BIT(3)) + gv |= BIT(4); + } else if (ch343->chiptype == CHIP_CH9103M) { + if (gv1 & BIT(3)) + gv |= BIT(0); + if (gv1 & BIT(2)) + gv |= BIT(1); + if (gv3 & BIT(2)) + gv |= BIT(2); + if (gv2 & BIT(6)) + gv |= BIT(3); + if (gv1 & BIT(0)) + gv |= BIT(4); + if (gv1 & BIT(6)) + gv |= BIT(5); + if (gv2 & BIT(3)) + gv |= BIT(6); + if (gv2 & BIT(5)) + gv |= BIT(7); + if (gv3 & BIT(0)) + gv |= BIT(8); + if (gv2 & BIT(2)) + gv |= BIT(9); + if (gv1 & BIT(5)) + gv |= BIT(10); + if (gv2 & BIT(4)) + gv |= BIT(11); + } else if (ch343->chiptype == CHIP_CH9101UH) { + if (gv2 & BIT(6)) + gv |= BIT(0); + if (gv2 & BIT(0)) + gv |= BIT(1); + if (gv1 & BIT(2)) + gv |= BIT(2); + if (gv2 & BIT(2)) + gv |= BIT(3); + if (gv1 & BIT(5)) + gv |= BIT(4); + if (gv1 & BIT(4)) + gv |= BIT(5); + if (gv2 & BIT(4)) + gv |= BIT(6); + } + + if (put_user(gv, argval)) { + rv = -EFAULT; + goto out; + } + break; + default: + rv = -ENOIOCTLCMD; + break; + } + +out: + kfree(buffer); + return rv; +} + +static int ch343_get(unsigned int bval, + unsigned char *fct, unsigned char *dvs) +{ + unsigned char a; + unsigned char b; + unsigned long c; + + switch (bval) { + case 6000000: + case 4000000: + case 2400000: + case 921600: + case 307200: + case 256000: + b = 7; + c = 12000000; + break; + default: + if (bval > 6000000/255) { + b = 3; + c = 6000000; + } else if (bval > 750000/255) { + b = 2; + c = 750000; + } else if (bval > 93750/255) { + b = 1; + c = 93750; + } else { + b = 0; + c = 11719; + } + break; + } + a = (unsigned char)(c / bval); + if (a == 0 || a == 0xFF) + return -EINVAL; + if ((c / a - bval) > (bval - c / (a + 1))) + a ++; + a = 256 - a; + + *fct = a; + *dvs = b; + + return 0; +} + +static void ch343_tty_set_termios(struct tty_struct *tty, + struct ktermios *termios_old) +{ + struct ch343 *ch343 = tty->driver_data; + struct ktermios *termios = &tty->termios; + struct usb_ch343_line_coding newline; + int newctrl = ch343->ctrlout; + + unsigned char dvs = 0; + unsigned char reg_count = 0; + unsigned char fct = 0; + unsigned char reg_value = 0; + unsigned short value = 0; + unsigned short index = 0; + + dev_dbg(tty->dev, "%s\n", __func__); + + if (termios_old && + !tty_termios_hw_change(&tty->termios, termios_old)) { + return; + } + + newline.dwDTERate = tty_get_baud_rate(tty); + + if (newline.dwDTERate == 0) + newline.dwDTERate = 9600; + ch343_get(newline.dwDTERate, &fct, &dvs); + + newline.bCharFormat = termios->c_cflag & CSTOPB ? 2 : 1; + if (newline.bCharFormat == 2) + reg_value |= CH343_L_SB; + + newline.bParityType = termios->c_cflag & PARENB ? + (termios->c_cflag & PARODD ? 1 : 2) + + (termios->c_cflag & CMSPAR ? 2 : 0) : 0; + + switch (newline.bParityType) { + case 0x01: + reg_value |= CH343_L_P_O; + break; + case 0x02: + reg_value |= CH343_L_P_E; + break; + case 0x03: + reg_value |= CH343_L_P_M; + break; + case 0x04: + reg_value |= CH343_L_P_S; + break; + default: + break; + } + + switch (termios->c_cflag & CSIZE) { + case CS5: + newline.bDataBits = 5; + reg_value |= CH343_L_C5; + break; + case CS6: + newline.bDataBits = 6; + reg_value |= CH343_L_C6; + break; + case CS7: + newline.bDataBits = 7; + reg_value |= CH343_L_C7; + break; + case CS8: + default: + newline.bDataBits = 8; + reg_value |= CH343_L_C8; + break; + } + + /* FIXME: Needs to clear unsupported bits in the termios */ + ch343->clocal = ((termios->c_cflag & CLOCAL) != 0); + + if (C_BAUD(tty) == B0) { + newline.dwDTERate = ch343->line.dwDTERate; + newctrl &= ~CH343_CTO_D; + } else if (termios_old && (termios_old->c_cflag & CBAUD) == B0) { + newctrl |= CH343_CTO_D; + } + + reg_value |= CH343_L_E_R | CH343_L_E_T; + reg_count |= CH343_L_R_CT | CH343_L_R_CL | CH343_L_R_T; + + value |= reg_count; + value |= (unsigned short)reg_value << 8; + + index |= 0x00 | dvs; + index |= (unsigned short)fct << 8; + if (ch343->iface <= 1) + ch343_control_out(ch343, CMD_C1 + ch343->iface, value, index); + else if (ch343->iface <= 3) + ch343_control_out(ch343, CMD_C1 + 0x10 + (ch343->iface - 2), value, index); + + if (memcmp(&ch343->line, &newline, sizeof newline)) { + memcpy(&ch343->line, &newline, sizeof newline); + dev_dbg(&ch343->control->dev, "%s - set line: %d %d %d %d\n", + __func__, + newline.dwDTERate, + newline.bCharFormat, newline.bParityType, + newline.bDataBits); + } + + if (C_CRTSCTS(tty)) { + newctrl |= CH343_CTO_A | CH343_CTO_R; + } else + newctrl &= ~CH343_CTO_A; + + if (newctrl != ch343->ctrlout) + ch343_set_control(ch343, ch343->ctrlout = newctrl); +} + +static const struct tty_port_operations ch343_port_ops = { + .dtr_rts = ch343_port_dtr_rts, + .shutdown = ch343_port_shutdown, + .activate = ch343_port_activate, + .destruct = ch343_port_destruct, +}; + +/* Little helpers: write/read buffers free */ +static void ch343_write_buffers_free(struct ch343 *ch343) +{ + int i; + struct ch343_wb *wb; + struct usb_device *usb_dev = interface_to_usbdev(ch343->control); + + for (wb = &ch343->wb[0], i = 0; i < CH343_NW; i++, wb++) + usb_free_coherent(usb_dev, ch343->writesize, wb->buf, wb->dmah); +} + +static void ch343_read_buffers_free(struct ch343 *ch343) +{ + struct usb_device *usb_dev = interface_to_usbdev(ch343->control); + int i; + + for (i = 0; i < ch343->rx_buflimit; i++) + usb_free_coherent(usb_dev, ch343->readsize, + ch343->read_buffers[i].base, ch343->read_buffers[i].dma); +} + +/* Little helper: write buffers allocate */ +static int ch343_write_buffers_alloc(struct ch343 *ch343) +{ + int i; + struct ch343_wb *wb; + + for (wb = &ch343->wb[0], i = 0; i < CH343_NW; i++, wb++) { + wb->buf = usb_alloc_coherent(ch343->dev, ch343->writesize, GFP_KERNEL, + &wb->dmah); + if (!wb->buf) { + while (i != 0) { + --i; + --wb; + usb_free_coherent(ch343->dev, ch343->writesize, + wb->buf, wb->dmah); + } + return -ENOMEM; + } + } + return 0; +} + +/* + * USB probe and disconnect routines. + */ +static int ch343_probe(struct usb_interface *intf, + const struct usb_device_id *id) +{ + struct usb_cdc_union_desc *union_header = NULL; + unsigned char *buffer = intf->altsetting->extra; + int buflen = intf->altsetting->extralen; + struct usb_interface *control_interface; + struct usb_interface *data_interface; + struct usb_endpoint_descriptor *epctrl = NULL; + struct usb_endpoint_descriptor *epread = NULL; + struct usb_endpoint_descriptor *epwrite = NULL; + struct usb_device *usb_dev = interface_to_usbdev(intf); + struct ch343 *ch343; + int minor; + int ctrlsize, readsize; + u8 *buf; + unsigned long quirks; + int num_rx_buf = CH343_NR; + int i; + unsigned int elength = 0; + struct device *tty_dev; + int rv = -ENOMEM; + + /* normal quirks */ + quirks = (unsigned long)id->driver_info; + if (!buffer) { + dev_err(&intf->dev, "Weird descriptor references\n"); + return -EINVAL; + } + + while (buflen > 0) { + elength = buffer[0]; + if (!elength) { + dev_err(&intf->dev, "skipping garbage byte\n"); + elength = 1; + goto next_desc; + } + if (buffer[1] != USB_DT_CS_INTERFACE) { + dev_err(&intf->dev, "skipping garbage\n"); + goto next_desc; + } + + switch (buffer[2]) { + case USB_CDC_UNION_TYPE: /* we've found it */ + if (elength < sizeof(struct usb_cdc_union_desc)) + goto next_desc; + if (union_header) { + dev_err(&intf->dev, "More than one " + "union descriptor, skipping ...\n"); + goto next_desc; + } + union_header = (struct usb_cdc_union_desc *)buffer; + break; + default: + /* + * there are LOTS more CDC descriptors that + * could legitimately be found here. + */ + break; + } +next_desc: + buflen -= elength; + buffer += elength; + } + + control_interface = usb_ifnum_to_if(usb_dev, union_header->bMasterInterface0); + data_interface = usb_ifnum_to_if(usb_dev, union_header->bSlaveInterface0); + + if (intf != control_interface) + return -ENODEV; + + if (usb_interface_claimed(data_interface)) { + dev_dbg(&intf->dev, "The data interface isn't available\n"); + return -EBUSY; + } + + if (data_interface->cur_altsetting->desc.bNumEndpoints < 2 || + control_interface->cur_altsetting->desc.bNumEndpoints == 0) + return -EINVAL; + + epctrl = &control_interface->cur_altsetting->endpoint[0].desc; + epwrite = &data_interface->cur_altsetting->endpoint[0].desc; + epread = &data_interface->cur_altsetting->endpoint[1].desc; + + /* workaround for switched endpoints */ + if (!usb_endpoint_dir_in(epread)) { + /* descriptors are swapped */ + dev_dbg(&intf->dev, + "The data interface has switched endpoints\n"); + swap(epread, epwrite); + } + + ch343 = kzalloc(sizeof(struct ch343), GFP_KERNEL); + if (ch343 == NULL) + goto alloc_fail; + + ch343->idVendor = id->idVendor; + ch343->idProduct = id->idProduct; + ch343->iface = control_interface->cur_altsetting->desc.bInterfaceNumber / 2; + + dev_dbg(&intf->dev, "interface %d is valid\n", ch343->iface); + + minor = ch343_alloc_minor(ch343); + if (minor < 0) { + dev_err(&intf->dev, "no more free ch343 devices\n"); + kfree(ch343); + return -ENODEV; + } + + ctrlsize = usb_endpoint_maxp(epctrl); + readsize = usb_endpoint_maxp(epread) * + (quirks == SINGLE_RX_URB ? 1 : 2); + ch343->writesize = usb_endpoint_maxp(epwrite) * 20; + ch343->control = control_interface; + ch343->data = data_interface; + ch343->minor = minor; + ch343->dev = usb_dev; + ch343->ctrlsize = ctrlsize; + ch343->readsize = readsize; + ch343->rx_buflimit = num_rx_buf; + + dev_dbg(&intf->dev, "ep%d ctrl: %d, ep%d read: %d, ep%d write: %d\n", + usb_endpoint_num(epctrl), usb_endpoint_maxp(epctrl), + usb_endpoint_num(epread), usb_endpoint_maxp(epread), + usb_endpoint_num(epwrite), usb_endpoint_maxp(epwrite)); + + INIT_WORK(&ch343->work, ch343_softint); + init_waitqueue_head(&ch343->wioctl); + spin_lock_init(&ch343->write_lock); + spin_lock_init(&ch343->read_lock); + mutex_init(&ch343->mutex); + ch343->rx_endpoint = usb_rcvbulkpipe(usb_dev, epread->bEndpointAddress); + tty_port_init(&ch343->port); + ch343->port.ops = &ch343_port_ops; + init_usb_anchor(&ch343->delayed); + ch343->quirks = quirks; + + buf = usb_alloc_coherent(usb_dev, ctrlsize, GFP_KERNEL, &ch343->ctrl_dma); + if (!buf) + goto alloc_fail2; + ch343->ctrl_buffer = buf; + + if (ch343_write_buffers_alloc(ch343) < 0) + goto alloc_fail4; + + ch343->ctrlurb = usb_alloc_urb(0, GFP_KERNEL); + if (!ch343->ctrlurb) + goto alloc_fail5; + + for (i = 0; i < num_rx_buf; i++) { + struct ch343_rb *rb = &(ch343->read_buffers[i]); + struct urb *urb; + + rb->base = usb_alloc_coherent(ch343->dev, readsize, GFP_KERNEL, + &rb->dma); + if (!rb->base) + goto alloc_fail6; + rb->index = i; + rb->instance = ch343; + + urb = usb_alloc_urb(0, GFP_KERNEL); + if (!urb) + goto alloc_fail6; + + urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; + urb->transfer_dma = rb->dma; + usb_fill_bulk_urb(urb, ch343->dev, + ch343->rx_endpoint, + rb->base, + ch343->readsize, + ch343_read_bulk_callback, rb); + + ch343->read_urbs[i] = urb; + __set_bit(i, &ch343->read_urbs_free); + } + for (i = 0; i < CH343_NW; i++) { + struct ch343_wb *snd = &(ch343->wb[i]); + + snd->urb = usb_alloc_urb(0, GFP_KERNEL); + if (snd->urb == NULL) + goto alloc_fail7; + + usb_fill_bulk_urb(snd->urb, usb_dev, + usb_sndbulkpipe(usb_dev, epwrite->bEndpointAddress), + NULL, ch343->writesize, ch343_write_bulk, snd); + snd->urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; + snd->instance = ch343; + } + + usb_set_intfdata(intf, ch343); + + usb_fill_int_urb(ch343->ctrlurb, usb_dev, + usb_rcvintpipe(usb_dev, epctrl->bEndpointAddress), + ch343->ctrl_buffer, ctrlsize, ch343_ctrl_irq, ch343, + epctrl->bInterval ? epctrl->bInterval : 16); + ch343->ctrlurb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; + ch343->ctrlurb->transfer_dma = ch343->ctrl_dma; + + dev_info(&intf->dev, "ttyCH343USB%d: usb to uart device\n", minor); + + usb_driver_claim_interface(&ch343_driver, data_interface, ch343); + usb_set_intfdata(data_interface, ch343); + + usb_get_intf(control_interface); + tty_dev = tty_port_register_device(&ch343->port, ch343_tty_driver, minor, + &control_interface->dev); + if (IS_ERR(tty_dev)) { + rv = PTR_ERR(tty_dev); + goto alloc_fail7; + } + + if (quirks & CLEAR_HALT_CONDITIONS) { + usb_clear_halt(usb_dev, usb_rcvbulkpipe(usb_dev, epread->bEndpointAddress)); + usb_clear_halt(usb_dev, usb_sndbulkpipe(usb_dev, epwrite->bEndpointAddress)); + } + + /* deal with urb when usb plugged in */ + rv = usb_submit_urb(ch343->ctrlurb, GFP_KERNEL); + if (rv) { + dev_err(&ch343->control->dev, + "%s - usb_submit_urb(ctrl cmd) failed\n", __func__); + goto error_submit_urb; + } + + rv = ch343_submit_read_urbs(ch343, GFP_KERNEL); + if (rv) + goto error_submit_read_urbs; + + dev_dbg(&intf->dev, "ch343_probe finished!\n"); + + return 0; + +error_submit_read_urbs: + for (i = 0; i < ch343->rx_buflimit; i++) + usb_kill_urb(ch343->read_urbs[i]); +error_submit_urb: + usb_kill_urb(ch343->ctrlurb); +alloc_fail7: + usb_set_intfdata(intf, NULL); + for (i = 0; i < CH343_NW; i++) + usb_free_urb(ch343->wb[i].urb); +alloc_fail6: + for (i = 0; i < num_rx_buf; i++) + usb_free_urb(ch343->read_urbs[i]); + ch343_read_buffers_free(ch343); + usb_free_urb(ch343->ctrlurb); +alloc_fail5: + ch343_write_buffers_free(ch343); +alloc_fail4: + usb_free_coherent(usb_dev, ctrlsize, ch343->ctrl_buffer, ch343->ctrl_dma); +alloc_fail2: + ch343_release_minor(ch343); + kfree(ch343); +alloc_fail: + return rv; +} + +static void stop_data_traffic(struct ch343 *ch343) +{ + int i; + struct urb *urb; + struct ch343_wb *wb; + + dev_dbg(&ch343->control->dev, "%s\n", __func__); + + usb_autopm_get_interface_no_resume(ch343->control); + ch343->control->needs_remote_wakeup = 0; + usb_autopm_put_interface(ch343->control); + + for (;;) { + urb = usb_get_from_anchor(&ch343->delayed); + if (!urb) + break; + wb = urb->context; + wb->use = 0; + usb_autopm_put_interface_async(ch343->control); + } + + usb_kill_urb(ch343->ctrlurb); + for (i = 0; i < CH343_NW; i++) + usb_kill_urb(ch343->wb[i].urb); + for (i = 0; i < ch343->rx_buflimit; i++) + usb_kill_urb(ch343->read_urbs[i]); + cancel_work_sync(&ch343->work); +} + +static void ch343_disconnect(struct usb_interface *intf) +{ + struct ch343 *ch343 = usb_get_intfdata(intf); + struct usb_device *usb_dev = interface_to_usbdev(intf); + struct tty_struct *tty; + int i; + + dev_dbg(&intf->dev, "%s\n", __func__); + + /* sibling interface is already cleaning up */ + if (!ch343) + return; + + mutex_lock(&ch343->mutex); + ch343->disconnected = true; + wake_up_all(&ch343->wioctl); + usb_set_intfdata(ch343->control, NULL); + usb_set_intfdata(ch343->data, NULL); + mutex_unlock(&ch343->mutex); + + tty = tty_port_tty_get(&ch343->port); + if (tty) { + tty_vhangup(tty); + tty_kref_put(tty); + } + + stop_data_traffic(ch343); + + tty_unregister_device(ch343_tty_driver, ch343->minor); + + usb_free_urb(ch343->ctrlurb); + for (i = 0; i < CH343_NW; i++) + usb_free_urb(ch343->wb[i].urb); + for (i = 0; i < ch343->rx_buflimit; i++) + usb_free_urb(ch343->read_urbs[i]); + ch343_write_buffers_free(ch343); + usb_free_coherent(usb_dev, ch343->ctrlsize, ch343->ctrl_buffer, ch343->ctrl_dma); + ch343_read_buffers_free(ch343); + + usb_driver_release_interface(&ch343_driver, intf == ch343->control ? + ch343->data : ch343->control); + + tty_port_put(&ch343->port); + dev_info(&intf->dev, "%s\n", "ch343 usb device disconnect."); +} + +#ifdef CONFIG_PM +static int ch343_suspend(struct usb_interface *intf, pm_message_t message) +{ + struct ch343 *ch343 = usb_get_intfdata(intf); + int cnt; + + dev_dbg(&intf->dev, "%s\n", __func__); + spin_lock_irq(&ch343->write_lock); + if (PMSG_IS_AUTO(message)) { + if (ch343->transmitting) { + spin_unlock_irq(&ch343->write_lock); + return -EBUSY; + } + } + cnt = ch343->susp_count++; + spin_unlock_irq(&ch343->write_lock); + + if (cnt) + return 0; + + stop_data_traffic(ch343); + + return 0; +} + +static int ch343_resume(struct usb_interface *intf) +{ + struct ch343 *ch343 = usb_get_intfdata(intf); + struct urb *urb; + int rv = 0; + + dev_dbg(&intf->dev, "%s\n", __func__); + spin_lock_irq(&ch343->write_lock); + + if (--ch343->susp_count) + goto out; + + if (test_bit(ASYNCB_INITIALIZED, &ch343->port.flags)) { + rv = usb_submit_urb(ch343->ctrlurb, GFP_ATOMIC); + + for (;;) { + urb = usb_get_from_anchor(&ch343->delayed); + if (!urb) + break; + + ch343_start_wb(ch343, urb->context); + } + + /* + * delayed error checking because we must + * do the write path at all cost + */ + if (rv < 0) + goto out; + + rv = ch343_submit_read_urbs(ch343, GFP_ATOMIC); + } +out: + spin_unlock_irq(&ch343->write_lock); + + return rv; +} + +static int ch343_reset_resume(struct usb_interface *intf) +{ + struct ch343 *ch343 = usb_get_intfdata(intf); + + dev_dbg(&intf->dev, "%s\n", __func__); + if (test_bit(ASYNCB_INITIALIZED, &ch343->port.flags)) + tty_port_tty_hangup(&ch343->port, false); + + return ch343_resume(intf); +} + +#endif /* CONFIG_PM */ + +/* + * USB driver structure. + */ + +static const struct usb_device_id ch343_ids[] = { + { USB_DEVICE_INTERFACE_PROTOCOL(0x1a86, 0x55D2, /* ch342 chip */ + USB_CDC_ACM_PROTO_AT_V25TER) }, + + { USB_DEVICE_INTERFACE_PROTOCOL(0x1a86, 0x55D3, /* ch343 chip */ + USB_CDC_ACM_PROTO_AT_V25TER) }, + + { USB_DEVICE_INTERFACE_PROTOCOL(0x1a86, 0x55D5, /* ch344 chip */ + USB_CDC_ACM_PROTO_AT_V25TER) }, + + { USB_DEVICE_INTERFACE_PROTOCOL(0x1a86, 0x55D8, /* ch9101 chip */ + USB_CDC_ACM_PROTO_AT_V25TER) }, + + { USB_DEVICE_INTERFACE_PROTOCOL(0x1a86, 0x55D4, /* ch9102 chip */ + USB_CDC_ACM_PROTO_AT_V25TER) }, + + { USB_DEVICE_INTERFACE_PROTOCOL(0x1a86, 0x55D7, /* ch9103 chip */ + USB_CDC_ACM_PROTO_AT_V25TER) }, + + { } +}; + +MODULE_DEVICE_TABLE(usb, ch343_ids); + +static struct usb_driver ch343_driver = { + .name = "usb_ch343", + .probe = ch343_probe, + .disconnect = ch343_disconnect, +#ifdef CONFIG_PM + .suspend = ch343_suspend, + .resume = ch343_resume, + .reset_resume = ch343_reset_resume, +#endif + .id_table = ch343_ids, +#ifdef CONFIG_PM + .supports_autosuspend = 1, +#endif + .disable_hub_initiated_lpm = 1, +}; + +/* + * TTY driver structures. + */ +static const struct tty_operations ch343_ops = { + .install = ch343_tty_install, + .open = ch343_tty_open, + .close = ch343_tty_close, + .cleanup = ch343_tty_cleanup, + .hangup = ch343_tty_hangup, + .write = ch343_tty_write, + .write_room = ch343_tty_write_room, + .ioctl = ch343_tty_ioctl, + .chars_in_buffer = ch343_tty_chars_in_buffer, + .break_ctl = ch343_tty_break_ctl, + .set_termios = ch343_tty_set_termios, + .tiocmget = ch343_tty_tiocmget, + .tiocmset = ch343_tty_tiocmset, +}; + +/* + * Init / exit. + */ +static int __init ch343_init(void) +{ + int retval; + ch343_tty_driver = alloc_tty_driver(CH343_TTY_MINORS); + if (!ch343_tty_driver) + return -ENOMEM; + ch343_tty_driver->driver_name = "usbch343", + ch343_tty_driver->name = "ttyCH343USB", + ch343_tty_driver->major = CH343_TTY_MAJOR, + ch343_tty_driver->minor_start = 0, + ch343_tty_driver->type = TTY_DRIVER_TYPE_SERIAL, + ch343_tty_driver->subtype = SERIAL_TYPE_NORMAL, + ch343_tty_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV; + ch343_tty_driver->init_termios = tty_std_termios; + ch343_tty_driver->init_termios.c_cflag = B9600 | CS8 | CREAD | + HUPCL | CLOCAL; + tty_set_operations(ch343_tty_driver, &ch343_ops); + + retval = tty_register_driver(ch343_tty_driver); + if (retval) { + put_tty_driver(ch343_tty_driver); + return retval; + } + + retval = usb_register(&ch343_driver); + if (retval) { + tty_unregister_driver(ch343_tty_driver); + put_tty_driver(ch343_tty_driver); + return retval; + } + + printk(KERN_INFO KBUILD_MODNAME ": " DRIVER_DESC "\n"); + printk(KERN_INFO KBUILD_MODNAME ": " VERSION_DESC "\n"); + + return 0; +} + +static void __exit ch343_exit(void) +{ + usb_deregister(&ch343_driver); + tty_unregister_driver(ch343_tty_driver); + put_tty_driver(ch343_tty_driver); + idr_destroy(&ch343_minors); + printk(KERN_INFO KBUILD_MODNAME ": " "ch343 driver exit.\n"); +} + +module_init(ch343_init); +module_exit(ch343_exit); + +MODULE_AUTHOR(DRIVER_AUTHOR); +MODULE_DESCRIPTION(DRIVER_DESC); +MODULE_LICENSE("GPL"); +MODULE_ALIAS_CHARDEV_MAJOR(CH343_TTY_MAJOR); diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/files/ch343/ch343.h b/bsp/meta-hisilicon/recipes-bsp/ss928/files/ch343/ch343.h new file mode 100644 index 0000000000000000000000000000000000000000..b0fca3eccfbad0676d42c18d4f65d79b9a7f7e84 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss928/files/ch343/ch343.h @@ -0,0 +1,216 @@ +#ifndef _CH343_H +#define _CH343_H + +/* + * Baud rate and default timeout + */ +#define DEFAULT_BAUD_RATE 9600 +#define DEFAULT_TIMEOUT 2000 + +/* Internal flags used only by kernel */ +#define ASYNCB_INITIALIZED 31 /* Serial port was initialized */ +#define ASYNCB_SUSPENDED 30 /* Serial port is suspended */ +#define ASYNCB_NORMAL_ACTIVE 29 /* Normal device is active */ +#define ASYNCB_BOOT_AUTOCONF 28 /* Autoconfigure port on bootup */ +#define ASYNCB_CLOSING 27 /* Serial port is closing */ +#define ASYNCB_CTS_FLOW 26 /* Do CTS flow control */ +#define ASYNCB_CHECK_CD 25 /* i.e., CLOCAL */ +#define ASYNCB_SHARE_IRQ 24 /* for multifunction cards, no longer used */ +#define ASYNCB_CONS_FLOW 23 /* flow control for console */ +#define ASYNCB_BOOT_ONLYMCA 22 /* Probe only if MCA bus */ +#define ASYNCB_FIRST_KERNEL 22 + +/* + * CMSPAR, some architectures can't have space and mark parity. + */ + +#ifndef CMSPAR +#define CMSPAR 0 +#endif + +/* + * Major and minor numbers. + */ + +#define CH343_TTY_MAJOR 170 +#define CH343_TTY_MINORS 256 + +/* + * Requests. + */ + +#define USB_RT_CH343 (USB_TYPE_CLASS | USB_RECIP_INTERFACE) + +#define CMD_R 0x95 +#define CMD_W 0x9A +#define CMD_C1 0xA1 +#define CMD_C2 0xA4 +#define CMD_C3 0x05 +#define CMD_C4 0xA8 +#define CMD_C5 0x5E +#define CMD_C6 0x5F +#define CMD_C7 0xAA +#define CMD_C8 0xAC +#define CMD_C9 0xAB +#define CMD_C10 0xA9 +#define CMD_C11 0xAD + + +#define CH343_CTO_O 0x10 +#define CH343_CTO_D 0x20 +#define CH343_CTO_R 0x40 +#define CH343_CTO_A 0x80 +#define CH343_CTI_C 0x01 +#define CH343_CTI_DS 0x02 +#define CH343_CTI_R 0x04 +#define CH343_CTI_DC 0x08 +#define CH343_CTI_ST 0x0f + +#define CH343_CTT_M 0x08 +#define CH343_CTT_F 0x44 +#define CH343_CTT_P 0x04 +#define CH343_CTT_O 0x02 + +#define CH343_LO 0x02 +#define CH343_LE 0x04 +#define CH343_LB +#define CH343_LP 0x00 +#define CH343_LF 0x40 +#define CH343_LM 0x08 + +#define CH343_L_R_CT 0x80 +#define CH343_L_R_CL 0x04 +#define CH343_L_R_T 0x08 + +#define CH343_L_E_R 0x80 +#define CH343_L_E_T 0x40 +#define CH343_L_P_S 0x38 +#define CH343_L_P_M 0x28 +#define CH343_L_P_E 0x18 +#define CH343_L_P_O 0x08 +#define CH343_L_SB 0x04 +#define CH343_L_C8 0x03 +#define CH343_L_C7 0x02 +#define CH343_L_C6 0x01 +#define CH343_L_C5 0x00 + +#define CH343_N_B 0x80 +#define CH343_N_AB 0x10 + +/* + * Internal driver structures. + */ + +/* + * The only reason to have several buffers is to accommodate assumptions + * in line disciplines. They ask for empty space amount, receive our URB size, + * and proceed to issue several 1-character writes, assuming they will fit. + * The very first write takes a complete URB. Fortunately, this only happens + * when processing onlcr, so we only need 2 buffers. These values must be + * powers of 2. + */ +#define CH343_NW 16 +#define CH343_NR 16 + +struct ch343_wb { + unsigned char *buf; + dma_addr_t dmah; + int len; + int use; + struct urb *urb; + struct ch343 *instance; +}; + +struct ch343_rb { + int size; + unsigned char *base; + dma_addr_t dma; + int index; + struct ch343 *instance; +}; + +struct usb_ch343_line_coding { + __u32 dwDTERate; + __u8 bCharFormat; +#define USB_CH343_1_STOP_BITS 0 +#define USB_CH343_1_5_STOP_BITS 1 +#define USB_CH343_2_STOP_BITS 2 + + __u8 bParityType; +#define USB_CH343_NO_PARITY 0 +#define USB_CH343_ODD_PARITY 1 +#define USB_CH343_EVEN_PARITY 2 +#define USB_CH343_MARK_PARITY 3 +#define USB_CH343_SPACE_PARITY 4 + + __u8 bDataBits; +} __attribute__ ((packed)); + +typedef enum { + CHIP_CH342F = 0x00, + CHIP_CH342GJK, + CHIP_CH343GP, + CHIP_CH343G_AUTOBAUD, + CHIP_CH343K, + CHIP_CH343J, + CHIP_CH344L, + CHIP_CH9101UH, + CHIP_CH9102F, + CHIP_CH9102X, + CHIP_CH9103M, +} CHIPTYPE; + +struct ch343 { + struct usb_device *dev; /* the corresponding usb device */ + struct usb_interface *control; /* control interface */ + struct usb_interface *data; /* data interface */ + struct tty_port port; /* our tty port data */ + struct urb *ctrlurb; /* urbs */ + u8 *ctrl_buffer; /* buffers of urbs */ + dma_addr_t ctrl_dma; /* dma handles of buffers */ + struct ch343_wb wb[CH343_NW]; + unsigned long read_urbs_free; + struct urb *read_urbs[CH343_NR]; + struct ch343_rb read_buffers[CH343_NR]; + int rx_buflimit; + int rx_endpoint; + spinlock_t read_lock; + int write_used; /* number of non-empty write buffers */ + int transmitting; + spinlock_t write_lock; + struct mutex mutex; + bool disconnected; + struct usb_ch343_line_coding line; /* bits, stop, parity */ + struct work_struct work; /* work queue entry for line discipline waking up */ + unsigned int ctrlin; /* input control lines (DCD, DSR, RI, break, overruns) */ + unsigned int ctrlout; /* output control lines (DTR, RTS) */ + struct async_icount iocount; /* counters for control line changes */ + struct async_icount oldcount; /* for comparison of counter */ + wait_queue_head_t wioctl; /* for ioctl */ + unsigned int writesize; /* max packet size for the output bulk endpoint */ + unsigned int readsize,ctrlsize; /* buffer sizes for freeing */ + unsigned int minor; /* ch343 minor number */ + unsigned char clocal; /* termios CLOCAL */ + unsigned int susp_count; /* number of suspended interfaces */ + u8 bInterval; + struct usb_anchor delayed; /* writes queued for a device about to be woken */ + unsigned long quirks; + u8 iface; + CHIPTYPE chiptype; + u16 idVendor; + u16 idProduct; + u8 gpio5dir; +}; + +#define CDC_DATA_INTERFACE_TYPE 0x0a + +/* constants describing various quirks and errors */ +#define NO_UNION_NORMAL BIT(0) +#define SINGLE_RX_URB BIT(1) +#define NO_CAP_LINE BIT(2) +#define NO_DATA_INTERFACE BIT(4) +#define IGNORE_DEVICE BIT(5) +#define QUIRK_CONTROL_LINE_STATE BIT(6) +#define CLEAR_HALT_CONDITIONS BIT(7) + +#endif diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/files/hieulerpi1-bsp.service b/bsp/meta-hisilicon/recipes-bsp/ss928/files/hieulerpi1-bsp.service new file mode 100644 index 0000000000000000000000000000000000000000..82f1a634e8502ecdd734a490727947330e2dba35 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-bsp/ss928/files/hieulerpi1-bsp.service @@ -0,0 +1,13 @@ +[Unit] +Description=Init Hieuler1 BSP Drivers/Modules +After=systemd-modules-load.service + +[Service] +Type=oneshot +RemainAfterExit=yes +ExecStart=/etc/init.d/S90AutoRun +ExecStart=/etc/init.d/pinmux.sh +TimeoutSec=90s + +[Install] +WantedBy=multi-user.target diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/files/mcu_tool/mcu_tool.c b/bsp/meta-hisilicon/recipes-bsp/ss928/files/mcu_tool/mcu_tool.c index 821b8bb40d56fe23c7520c3a1b6d74060e9c1c0d..980be0b9319d48efd7f66fddbf1cd292d0068fa1 100644 --- a/bsp/meta-hisilicon/recipes-bsp/ss928/files/mcu_tool/mcu_tool.c +++ b/bsp/meta-hisilicon/recipes-bsp/ss928/files/mcu_tool/mcu_tool.c @@ -142,7 +142,7 @@ int main(int argc,char*argv[]) return 0; } int i2c_addr = atoi_auto(argv[ARGS_I2C_ADDR]); - int ret; + int ret = 0; struct i2c_rdwr_ioctl_data ioctl_data; int i2c_dev = open(argv[ARGS_I2C_DEV], O_RDWR); @@ -161,6 +161,8 @@ int main(int argc,char*argv[]) if(!strcmp(argv[ARGS_OPT+1],"off")) buffer[3] = 0x00; if(send_msg(i2c_dev,&msg,1)) + ret = -1; + printf("Failed to send LED message\n"); goto error; } else if( @@ -175,6 +177,8 @@ int main(int argc,char*argv[]) if(!strcmp(argv[ARGS_OPT+1],"off")) buffer[3] = 0x00; if(send_msg(i2c_dev,&msg,1)) + ret = -2; + printf("Failed to send Nearlink message\n"); goto error; } else if( @@ -191,6 +195,8 @@ int main(int argc,char*argv[]) msgs[1].flags = I2C_M_RD; msgs[1].len = 4; if(send_msg(i2c_dev,msgs,2)) + ret = -3; + printf("Failed to read temperature data\n"); goto error; float* data = (float*)(msgs[1].buf); printf("%f\n",*data); @@ -209,6 +215,8 @@ int main(int argc,char*argv[]) msgs[1].flags = I2C_M_RD; msgs[1].len = 4; if(send_msg(i2c_dev,msgs,2)) + ret = -4; + printf("Failed to read voltage data\n"); goto error; float* data = (float*)(msgs[1].buf); printf("%f\n",*data); @@ -221,4 +229,4 @@ error: printf("ERROR:%d\n",ret); close(i2c_dev); return -1; -} \ No newline at end of file +} diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/files/rohm_400M.sh b/bsp/meta-hisilicon/recipes-bsp/ss928/files/rohm_400M.sh deleted file mode 100644 index 62fda4f8b2a2b47c73e6d677cfe288f219dfaf1b..0000000000000000000000000000000000000000 --- a/bsp/meta-hisilicon/recipes-bsp/ss928/files/rohm_400M.sh +++ /dev/null @@ -1,536 +0,0 @@ -#!/bin/sh -# init SOC mipi rx -pre_vo - -# ROHM RM84 TM41 512M config -i2c_write 4 0xd0 0x0007 0x00 1 1 -i2c_write 4 0xd0 0x000E 0x80 1 1 -usleep 5000 -i2c_write 4 0xd0 0x0005 0x03 1 1 -i2c_write 4 0xd0 0x000F 0x01 1 1 -i2c_write 4 0xd0 0x0010 0x00 1 1 -i2c_write 4 0xd0 0x0011 0x00 1 1 -i2c_write 4 0xd0 0x0012 0x00 1 1 -i2c_write 4 0xd0 0x0013 0x00 1 1 - -i2c_write 4 0xd0 0x0007 0x04 1 1 -i2c_write 4 0xd0 0x040F 0x01 1 1 -i2c_write 4 0xd0 0x0410 0x50 1 1 -i2c_write 4 0xd0 0x0411 0xB6 1 1 -i2c_write 4 0xd0 0x0412 0x00 1 1 -i2c_write 4 0xd0 0x0413 0x00 1 1 -i2c_write 4 0xd0 0x0414 0xD0 1 1 -i2c_write 4 0xd0 0x0415 0xA0 1 1 -i2c_write 4 0xd0 0x0416 0x00 1 1 -i2c_write 4 0xd0 0x0417 0x00 1 1 -i2c_write 4 0xd0 0x0420 0x20 1 1 -i2c_write 4 0xd0 0x0422 0x22 1 1 -i2c_write 4 0xd0 0x0424 0x07 1 1 -i2c_write 4 0xd0 0x0426 0x00 1 1 -i2c_write 4 0xd0 0x0427 0x01 1 1 -i2c_write 4 0xd0 0x0428 0x02 1 1 -i2c_write 4 0xd0 0x0429 0x03 1 1 -i2c_write 4 0xd0 0x042A 0x04 1 1 -i2c_write 4 0xd0 0x0430 0x20 1 1 -i2c_write 4 0xd0 0x0431 0x80 1 1 -i2c_write 4 0xd0 0x0436 0x05 1 1 -i2c_write 4 0xd0 0x043A 0x84 1 1 -i2c_write 4 0xd0 0x043B 0x00 1 1 -i2c_write 4 0xd0 0x043C 0x3A 1 1 -i2c_write 4 0xd0 0x043D 0x08 1 1 - -i2c_write 4 0xd0 0x0007 0x05 1 1 -i2c_write 4 0xd0 0x050F 0x01 1 1 -i2c_write 4 0xd0 0x0510 0x50 1 1 -i2c_write 4 0xd0 0x0511 0xB6 1 1 -i2c_write 4 0xd0 0x0512 0x00 1 1 -i2c_write 4 0xd0 0x0513 0x00 1 1 -i2c_write 4 0xd0 0x0514 0xD1 1 1 -i2c_write 4 0xd0 0x0515 0xA1 1 1 -i2c_write 4 0xd0 0x0516 0x00 1 1 -i2c_write 4 0xd0 0x0517 0x00 1 1 -i2c_write 4 0xd0 0x0520 0x20 1 1 -i2c_write 4 0xd0 0x0522 0x22 1 1 -i2c_write 4 0xd0 0x0524 0x07 1 1 -i2c_write 4 0xd0 0x0526 0x00 1 1 -i2c_write 4 0xd0 0x0527 0x01 1 1 -i2c_write 4 0xd0 0x0528 0x02 1 1 -i2c_write 4 0xd0 0x0529 0x03 1 1 -i2c_write 4 0xd0 0x052A 0x04 1 1 -i2c_write 4 0xd0 0x0530 0x20 1 1 -i2c_write 4 0xd0 0x0531 0x80 1 1 -i2c_write 4 0xd0 0x0536 0x05 1 1 -i2c_write 4 0xd0 0x053A 0x84 1 1 -i2c_write 4 0xd0 0x053B 0x00 1 1 -i2c_write 4 0xd0 0x053C 0x3A 1 1 -i2c_write 4 0xd0 0x053D 0x08 1 1 - -i2c_write 4 0xd0 0x0007 0x06 1 1 -i2c_write 4 0xd0 0x060F 0x01 1 1 -i2c_write 4 0xd0 0x0610 0x50 1 1 -i2c_write 4 0xd0 0x0611 0xB6 1 1 -i2c_write 4 0xd0 0x0612 0x00 1 1 -i2c_write 4 0xd0 0x0613 0x00 1 1 -i2c_write 4 0xd0 0x0614 0xD2 1 1 -i2c_write 4 0xd0 0x0615 0xA2 1 1 -i2c_write 4 0xd0 0x0616 0x00 1 1 -i2c_write 4 0xd0 0x0617 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0x0047 0x20 1 1 -i2c_write 4 0xa2 0x0048 0x00 1 1 -i2c_write 4 0xa2 0x0049 0x00 1 1 -i2c_write 4 0xa2 0x004A 0x00 1 1 -i2c_write 4 0xa4 0x004E 0x00 1 1 -i2c_write 4 0xa4 0x004F 0x11 1 1 -i2c_write 4 0xa4 0x0050 0x22 1 1 -i2c_write 4 0xa4 0x0051 0x33 1 1 -i2c_write 4 0xa4 0x0052 0x44 1 1 -i2c_write 4 0xa4 0x0046 0x00 1 1 -i2c_write 4 0xa4 0x0047 0x20 1 1 -i2c_write 4 0xa4 0x0048 0x00 1 1 -i2c_write 4 0xa4 0x0049 0x00 1 1 -i2c_write 4 0xa4 0x004A 0x00 1 1 -i2c_write 4 0xa6 0x004E 0x00 1 1 -i2c_write 4 0xa6 0x004F 0x11 1 1 -i2c_write 4 0xa6 0x0050 0x22 1 1 -i2c_write 4 0xa6 0x0051 0x33 1 1 -i2c_write 4 0xa6 0x0052 0x44 1 1 -i2c_write 4 0xa6 0x0046 0x00 1 1 -i2c_write 4 0xa6 0x0047 0x20 1 1 -i2c_write 4 0xa6 0x0048 0x00 1 1 -i2c_write 4 0xa6 0x0049 0x00 1 1 -i2c_write 4 0xa6 0x004A 0x00 1 1 - -i2c_write 4 0xd0 0x0007 0x00 1 1 -i2c_write 4 0xd0 0x0055 0x02 1 1 -i2c_write 4 0xd0 0x0056 0x00 1 1 -i2c_write 4 0xd0 0x0058 0x05 1 1 -i2c_write 4 0xd0 0x0059 0x00 1 1 -i2c_write 4 0xd0 0x005B 0x00 1 1 -i2c_write 4 0xd0 0x005C 0x00 1 1 -i2c_write 4 0xd0 0x005E 0x00 1 1 -i2c_write 4 0xd0 0x005F 0x00 1 1 -i2c_write 4 0xd0 0x0061 0x00 1 1 -i2c_write 4 0xd0 0x0062 0x00 1 1 -i2c_write 4 0xd0 0x0064 0x00 1 1 -i2c_write 4 0xd0 0x0065 0x00 1 1 -i2c_write 4 0xd0 0x0067 0x00 1 1 -i2c_write 4 0xd0 0x0068 0x00 1 1 -i2c_write 4 0xd0 0x006A 0x00 1 1 -i2c_write 4 0xd0 0x006B 0x00 1 1 -i2c_write 4 0xd0 0x0054 0x08 1 1 -i2c_write 4 0xd0 0x0057 0x18 1 1 -i2c_write 4 0xd0 0x005A 0x18 1 1 -i2c_write 4 0xd0 0x005D 0x18 1 1 -i2c_write 4 0xd0 0x0060 0x18 1 1 -i2c_write 4 0xd0 0x0063 0x18 1 1 -i2c_write 4 0xd0 0x0066 0x18 1 1 -i2c_write 4 0xd0 0x0069 0x18 1 1 - -i2c_write 4 0xa0 0x0043 0x01 1 1 -i2c_write 4 0xa0 0x0044 0x01 1 1 -i2c_write 4 0xa0 0x00A3 0x03 1 1 -i2c_write 4 0xa2 0x0043 0x01 1 1 -i2c_write 4 0xa2 0x0044 0x01 1 1 -i2c_write 4 0xa2 0x00A3 0x03 1 1 -i2c_write 4 0xa4 0x0043 0x01 1 1 -i2c_write 4 0xa4 0x0044 0x01 1 1 -i2c_write 4 0xa4 0x00A3 0x03 1 1 -i2c_write 4 0xa6 0x0043 0x01 1 1 -i2c_write 4 0xa6 0x0044 0x01 1 1 -i2c_write 4 0xa6 0x00A3 0x03 1 1 - -i2c_write 4 0xd0 0x0007 0x04 1 1 -i2c_write 4 0xd0 0x041F 0x0D 1 1 -i2c_write 4 0xd0 0x0007 0x05 1 1 -i2c_write 4 0xd0 0x051F 0x0D 1 1 -i2c_write 4 0xd0 0x0007 0x06 1 1 -i2c_write 4 0xd0 0x061F 0x0D 1 1 -i2c_write 4 0xd0 0x0007 0x07 1 1 -i2c_write 4 0xd0 0x071F 0x0D 1 1 -i2c_write 4 0xd0 0x0007 0x02 1 1 -i2c_write 4 0xd0 0x024A 0x40 1 1 -usleep 5000 -i2c_write 4 0xd0 0x0007 0x03 1 1 -i2c_write 4 0xd0 0x034A 0x40 1 1 -usleep 5000 - -i2c_write 4 0xa0 0x0097 0x42 1 1 -i2c_write 4 0xa2 0x0097 0x42 1 1 -i2c_write 4 0xa4 0x0097 0x42 1 1 -i2c_write 4 0xa6 0x0097 0x42 1 1 - -i2c_write 4 0xd0 0x0007 0x02 1 1 -i2c_write 4 0xd0 0x0230 0x40 1 1 -i2c_write 4 0xd0 0x0007 0x03 1 1 -i2c_write 4 0xd0 0x0330 0x40 1 1 -i2c_write 4 0xd0 0x0007 0x04 1 1 -i2c_write 4 0xd0 0x0436 0x25 1 1 -i2c_write 4 0xd0 0x0007 0x05 1 1 -i2c_write 4 0xd0 0x0536 0x25 1 1 -i2c_write 4 0xd0 0x0007 0x06 1 1 -i2c_write 4 0xd0 0x0636 0x26 1 1 -i2c_write 4 0xd0 0x0007 0x07 1 1 -i2c_write 4 0xd0 0x0736 0x26 1 1 -i2c_write 4 0xd0 0x0007 0x00 1 1 -i2c_write 4 0xd0 0x00E0 0x01 1 1 -i2c_write 4 0xd0 0x0007 0x00 1 1 - -i2c_write 4 0xd0 0x0007 0x00 1 1 -i2c_write 4 0xd0 0x0082 0x1F 1 1 -i2c_write 4 0xd0 0x0083 0x1F 1 1 -i2c_write 4 0xd0 0x0084 0x1F 1 1 -i2c_write 4 0xd0 0x0085 0x1F 1 1 -i2c_write 4 0xd0 0x0086 0x22 1 1 -i2c_write 4 0xd0 0x0087 0x22 1 1 -i2c_write 4 0xd0 0x0088 0x0F 1 1 -i2c_write 4 0xd0 0x0089 0x0F 1 1 -i2c_write 4 0xd0 0x008A 0xF3 1 1 -i2c_write 4 0xd0 0x008B 0xF3 1 1 -i2c_write 4 0xd0 0x008C 0xF3 1 1 -i2c_write 4 0xd0 0x008D 0xF3 1 1 -i2c_write 4 0xd0 0x008E 0xC2 1 1 -i2c_write 4 0xd0 0x008F 0xC2 1 1 -i2c_write 4 0xd0 0x0090 0xC2 1 1 -i2c_write 4 0xd0 0x0091 0xC2 1 1 -i2c_write 4 0xd0 0x0092 0xFF 1 1 -i2c_write 4 0xd0 0x0093 0x82 1 1 -i2c_write 4 0xd0 0x0094 0x03 1 1 -i2c_write 4 0xd0 0x0095 0x03 1 1 -i2c_write 4 0xd0 0x0096 0xDB 1 1 -i2c_write 4 0xd0 0x0097 0x83 1 1 -i2c_write 4 0xd0 0x0098 0x83 1 1 -i2c_write 4 0xd0 0x0099 0x83 1 1 -i2c_write 4 0xd0 0x009A 0x83 1 1 -i2c_write 4 0xd0 0x009B 0x83 1 1 -i2c_write 4 0xd0 0x009C 0x83 1 1 -i2c_write 4 0xd0 0x009D 0x00 1 1 -i2c_write 4 0xd0 0x009E 0xFD 1 1 -i2c_write 4 0xd0 0x009F 0x04 1 1 -i2c_write 4 0xd0 0x00A0 0x00 1 1 -i2c_write 4 0xd0 0x00A1 0xFD 1 1 -i2c_write 4 0xd0 0x00A2 0x04 1 1 -i2c_write 4 0xd0 0x00A3 0x00 1 1 -i2c_write 4 0xd0 0x00A4 0xFD 1 1 -i2c_write 4 0xd0 0x00A5 0x04 1 1 -i2c_write 4 0xd0 0x00A6 0x00 1 1 -i2c_write 4 0xd0 0x00A7 0xFD 1 1 - -i2c_write 4 0xa0 0x0048 0x91 1 1 -i2c_write 4 0xa2 0x0048 0x91 1 1 -i2c_write 4 0xa4 0x0048 0x91 1 1 -i2c_write 4 0xa6 0x0048 0x91 1 1 diff --git a/bsp/meta-hisilicon/recipes-bsp/ss928/hieulerpi1-bsp-pkg.bb b/bsp/meta-hisilicon/recipes-bsp/ss928/hieulerpi1-bsp-pkg.bb index f59945e80d67b1755ed10f51d32d3337ef7b9649..13ab1340f4de5df237888f618d56ff9c8bd4025a 100644 --- a/bsp/meta-hisilicon/recipes-bsp/ss928/hieulerpi1-bsp-pkg.bb +++ b/bsp/meta-hisilicon/recipes-bsp/ss928/hieulerpi1-bsp-pkg.bb @@ -17,62 +17,68 @@ SRC_URI = " \ file://HiEuler-driver/drivers/pinmux.sh \ file://HiEuler-driver/drivers/env.tar.gz \ file://HiEuler-driver/drivers/can-tools.tar.gz \ - file://HiEuler-driver/drivers/ws73.tar.gz \ + file://HiEuler-driver/drivers/ws73.tar.gz \ file://HiEuler-driver/mcu \ + ${@bb.utils.contains('DISTRO_FEATURES', 'systemd', ' file://hieulerpi1-bsp.service ', '', d)} \ " S = "${WORKDIR}/HiEuler-driver/drivers" INSANE_SKIP:${PN} += "already-stripped" -FILES:${PN} = "${sysconfdir} /usr/bin /ko /vendor /usr/sbin /firmware ${libdir}" +FILES:${PN} = "${sysconfdir} ${systemd_system_unitdir} /usr/bin /ko /vendor /usr/sbin /firmware ${libdir}" do_install () { - install -d ${D}/usr/bin - install -d ${D}${libdir} - install -d ${D}/firmware - install -d ${D}${sysconfdir}/init.d - install -d ${D}${sysconfdir}/rc5.d - - install -m 0755 ${WORKDIR}/HiEuler-driver/drivers/btools ${D}/usr/bin/ - ln -s /usr/bin/btools ${D}/usr/bin/bspmm - ln -s /usr/bin/btools ${D}/usr/bin/i2c_read - ln -s /usr/bin/btools ${D}/usr/bin/i2c_write - install -m 0755 ${WORKDIR}/ko-extra/pre_vo ${D}/usr/bin/ - - cp -r ${WORKDIR}/ko ${D}/ - cp -f ${WORKDIR}/ko-extra/ch343.ko ${D}/ko - - #for mipi, use load_ss928v100 from ko-extra - cp -f ${WORKDIR}/ko-extra/load_ss928v100 ${D}/ko - - # install wifi-1102a firmware - # cp -f ${WORKDIR}/wifi-1102a-tools/plat.ko ${D}/ko - # cp -f ${WORKDIR}/wifi-1102a-tools/wifi.ko ${D}/ko - # install -m 0755 ${WORKDIR}/wifi-1102a-tools/start_wifi ${D}/usr/bin/ - # install -d ${D}/vendor - # cp -rf ${WORKDIR}/wifi-1102a-tools/vendor/* ${D}/vendor - - install -m 0755 ${S}/S90AutoRun ${D}${sysconfdir}/init.d/ - install -m 0755 ${S}/pinmux.sh ${D}${sysconfdir}/init.d/ + install -d ${D}/usr/bin + install -d ${D}${libdir} + install -d ${D}/firmware + install -d ${D}${sysconfdir}/init.d + install -d ${D}${sysconfdir}/rc5.d + + install -m 0755 ${WORKDIR}/HiEuler-driver/drivers/btools ${D}/usr/bin/ + ln -s /usr/bin/btools ${D}/usr/bin/bspmm + ln -s /usr/bin/btools ${D}/usr/bin/i2c_read + ln -s /usr/bin/btools ${D}/usr/bin/i2c_write + install -m 0755 ${WORKDIR}/ko-extra/pre_vo ${D}/usr/bin/ + + cp -r ${WORKDIR}/ko ${D}/ + # cp -f ${WORKDIR}/ko-extra/ch343.ko ${D}/ko + + #for mipi, use load_ss928v100 from ko-extra + cp -f ${WORKDIR}/ko-extra/load_ss928v100 ${D}/ko + + # install wifi-1102a firmware + # cp -f ${WORKDIR}/wifi-1102a-tools/plat.ko ${D}/ko + # cp -f ${WORKDIR}/wifi-1102a-tools/wifi.ko ${D}/ko + # install -m 0755 ${WORKDIR}/wifi-1102a-tools/start_wifi ${D}/usr/bin/ + # install -d ${D}/vendor + # cp -rf ${WORKDIR}/wifi-1102a-tools/vendor/* ${D}/vendor + + install -m 0755 ${S}/S90AutoRun ${D}${sysconfdir}/init.d/ + install -m 0755 ${S}/pinmux.sh ${D}${sysconfdir}/init.d/ + if ${@bb.utils.contains('DISTRO_FEATURES', 'systemd', 'true', 'false', d)}; then + install -d ${D}${systemd_system_unitdir} + install -m 0644 ${WORKDIR}/hieulerpi1-bsp.service ${D}${systemd_system_unitdir} + else update-rc.d -r ${D} S90AutoRun start 90 5 . update-rc.d -r ${D} pinmux.sh start 90 5 . + fi - install -m 0755 ${WORKDIR}/env/fw_env.config ${D}/etc/ - install -m 0755 ${WORKDIR}/env/fw_printenv ${D}/usr/bin/ - install -m 0755 ${WORKDIR}/env/fw_setenv ${D}/usr/bin/ + install -m 0755 ${WORKDIR}/env/fw_env.config ${D}/etc/ + install -m 0755 ${WORKDIR}/env/fw_printenv ${D}/usr/bin/ + install -m 0755 ${WORKDIR}/env/fw_setenv ${D}/usr/bin/ - cp -r ${WORKDIR}/can-tools/canutils/sbin ${D}/usr/ - cp -r ${WORKDIR}/can-tools/canutils/bin/* ${D}/usr/bin/ - cp -r ${WORKDIR}/can-tools/libsocketcan/lib/* ${D}${libdir} + cp -r ${WORKDIR}/can-tools/canutils/sbin ${D}/usr/ + cp -r ${WORKDIR}/can-tools/canutils/bin/* ${D}/usr/bin/ + cp -r ${WORKDIR}/can-tools/libsocketcan/lib/* ${D}${libdir} - install -m 0755 ${WORKDIR}/HiEuler-driver/mcu/load_riscv ${D}/usr/sbin - install -m 0755 ${WORKDIR}/HiEuler-driver/mcu/virt-tty ${D}/usr/sbin - install -m 0755 ${WORKDIR}/HiEuler-driver/mcu/LiteOS.bin ${D}/firmware + install -m 0755 ${WORKDIR}/HiEuler-driver/mcu/load_riscv ${D}/usr/sbin + install -m 0755 ${WORKDIR}/HiEuler-driver/mcu/virt-tty ${D}/usr/sbin + install -m 0755 ${WORKDIR}/HiEuler-driver/mcu/LiteOS.bin ${D}/firmware - install -d ${D}${sysconfdir}/ws73 - cp ${WORKDIR}/ws73/firmware/* ${D}${sysconfdir}/ws73/ - cp ${WORKDIR}/ws73/ko/* ${D}/ko/ - cp ${WORKDIR}/ws73/config/* ${D}${sysconfdir}/ + install -d ${D}${sysconfdir}/ws73 + cp ${WORKDIR}/ws73/firmware/* ${D}${sysconfdir}/ws73/ + cp ${WORKDIR}/ws73/ko/* ${D}/ko/ + cp ${WORKDIR}/ws73/config/* ${D}${sysconfdir}/ } INHIBIT_PACKAGE_STRIP = "1" diff --git a/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot-emmc_2022.07.bb b/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot-emmc_2022.07.bb index 6e68cc45579cc700fafa87894a4cea8eb459df95..83337e7f77f278a6572e6a70bc7e8546dd51989b 100644 --- a/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot-emmc_2022.07.bb +++ b/bsp/meta-hisilicon/recipes-bsp/u-boot/u-boot-emmc_2022.07.bb @@ -14,6 +14,7 @@ SRC_URI = " \ file://mpu_solution/src/real_time/baremetal/common/hi309x_baremetal.h \ file://mpu_solution/build/build_sign \ file://mpu_solution/build/version_5.10 \ + file://mpu_solution/src/patches/uboot/uboot-mtd-spi.patch \ " S = "${WORKDIR}/mpu_solution/open_source/u-boot/u-boot" diff --git a/bsp/meta-hisilicon/recipes-connectivity/hostapd/hostapd_%.bbappend b/bsp/meta-hisilicon/recipes-connectivity/hostapd/hostapd_%.bbappend index 07d0e6cd33da10b1cadfadae4d333e9d658ecbbf..bd0335eb242c9bf6e1bc560beec7f0ae6937999e 100644 --- a/bsp/meta-hisilicon/recipes-connectivity/hostapd/hostapd_%.bbappend +++ b/bsp/meta-hisilicon/recipes-connectivity/hostapd/hostapd_%.bbappend @@ -19,4 +19,3 @@ do_configure:append() { popd echo "DRV_OBJS += ../src/drivers/driver_nl80211_android.o" >> ${S}/src/drivers/drivers.mak } - diff --git a/bsp/meta-hisilicon/recipes-connectivity/wpa-supplicant/wpa-supplicant_%.bbappend b/bsp/meta-hisilicon/recipes-connectivity/wpa-supplicant/wpa-supplicant_%.bbappend index ceca3e9df147d4f6e64ecc07d5eb6f221bc8dc55..38d5b162513d90bdcc56cfb2952d7fabbf4057cb 100644 --- a/bsp/meta-hisilicon/recipes-connectivity/wpa-supplicant/wpa-supplicant_%.bbappend +++ b/bsp/meta-hisilicon/recipes-connectivity/wpa-supplicant/wpa-supplicant_%.bbappend @@ -22,4 +22,3 @@ do_configure:append() { sed -i "s/#CONFIG_ROAM_EXTRA_SUPPORT=y/CONFIG_ROAM_EXTRA_SUPPORT=y/g" .config popd } - diff --git a/bsp/meta-hisilicon/recipes-core/device_sample/device-sample_0.0.0.bb b/bsp/meta-hisilicon/recipes-core/device_sample/device-sample_0.0.0.bb index 50b10ec4cec97d13728f2270a22c3c6337fe62de..664554e3bda6378ad06653fd170d5dc458c89b0b 100755 --- a/bsp/meta-hisilicon/recipes-core/device_sample/device-sample_0.0.0.bb +++ b/bsp/meta-hisilicon/recipes-core/device_sample/device-sample_0.0.0.bb @@ -24,6 +24,15 @@ do_compile:prepend () { cp -r -P ${WORKDIR}/include ${S}/externed_device_sample/mpp/out/ } +TARGET_CC_ARCH += "${LDFLAGS}" +# Makefile does not support the use of the CC environment variable, +# so use make CC="${CC}" +EXTRA_OEMAKE += 'CC="${CC}"' + +# workaround to fix error: +# `undefined reference to `vtable for __cxxabiv1::__class_type_info'` +LDFLAGS:remove = "-Wl,--as-needed" + do_compile () { pushd externed_device_sample oe_runmake diff --git a/bsp/meta-hisilicon/recipes-core/images/bsp-hiedge1.inc b/bsp/meta-hisilicon/recipes-core/images/bsp-hiedge1.inc new file mode 100644 index 0000000000000000000000000000000000000000..b7cf09d11232eb66a4c395f35a447de343656d20 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/bsp-hiedge1.inc @@ -0,0 +1,6 @@ +# add bsp depends here, should use for all images(tiny, standard, etc) + +IMAGE_INSTALL:append = " \ +hiedge1-tf-a \ +hiedge1-bsp-pkg \ +" diff --git a/bsp/meta-hisilicon/recipes-core/images/bsp-hieulerpi1.inc b/bsp/meta-hisilicon/recipes-core/images/bsp-hieulerpi1.inc index a2c05ac3a2b0fa14f5aa4dd99a6d2b546564402b..1768f349e0bc08bac8bfdcf285ca3f632a5d55b6 100644 --- a/bsp/meta-hisilicon/recipes-core/images/bsp-hieulerpi1.inc +++ b/bsp/meta-hisilicon/recipes-core/images/bsp-hieulerpi1.inc @@ -4,5 +4,6 @@ IMAGE_INSTALL:append = " \ hieulerpi1-tf-a \ hieulerpi1-bsp-pkg \ i2c-soft \ +ch343 \ mcu-tool \ " diff --git a/bsp/meta-hisilicon/recipes-core/images/hiedge1.inc b/bsp/meta-hisilicon/recipes-core/images/hiedge1.inc new file mode 100644 index 0000000000000000000000000000000000000000..ce9e96a25e341ae3cf17b0c982b54e65ac15cc72 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/hiedge1.inc @@ -0,0 +1,25 @@ +delete_unneeded_from_rootfs() { + set -x + test -d "${OUTPUT_DIR}" || mkdir -p "${OUTPUT_DIR}" + rm -rf "${OUTPUT_DIR}"/* + cd "${IMAGE_ROOTFS}" + if [ "$(ls boot)" ]; then + cp -r boot/* "${OUTPUT_DIR}" + # just need the boot dir, others in boot are not needed to reduce the size of image. + rm -rf ./boot/* + fi + cd - + set +x +} +IMAGE_PREPROCESS_COMMAND += "delete_unneeded_from_rootfs;" + +copy_626_distro() { + set -x + for IMAGETYPE in ${IMAGE_FSTYPES} + do + rm -f "${OUTPUT_DIR}"/${IMAGE_NAME}${IMAGE_NAME_SUFFIX%.rootfs}.*${IMAGETYPE} + cp -fp ${IMGDEPLOYDIR}/${IMAGE_NAME}${IMAGE_NAME_SUFFIX%.rootfs}.*${IMAGETYPE} ${OUTPUT_DIR}/ + done + set +x +} +IMAGE_POSTPROCESS_COMMAND += "copy_626_distro;" diff --git a/bsp/meta-hisilicon/recipes-core/images/hieulerpi1.inc b/bsp/meta-hisilicon/recipes-core/images/hieulerpi1.inc index 930506c150151668f417bcda0cf5f572c084342f..0738f5b1c94e709128876e6e3c20e542e0c45565 100644 --- a/bsp/meta-hisilicon/recipes-core/images/hieulerpi1.inc +++ b/bsp/meta-hisilicon/recipes-core/images/hieulerpi1.inc @@ -3,9 +3,11 @@ delete_unneeded_from_rootfs() { test -d "${OUTPUT_DIR}" || mkdir -p "${OUTPUT_DIR}" rm -rf "${OUTPUT_DIR}"/* cd "${IMAGE_ROOTFS}" - cp -r boot/* "${OUTPUT_DIR}" - # just need the boot dir, others in boot are not needed to reduce the size of image. - rm -rf ./boot/* + if [ "$(ls boot)" ]; then + cp -r boot/* "${OUTPUT_DIR}" + # just need the boot dir, others in boot are not needed to reduce the size of image. + rm -rf ./boot/* + fi cd - set +x } diff --git a/bsp/meta-hisilicon/recipes-core/images/image-early-config-hiedge1.inc b/bsp/meta-hisilicon/recipes-core/images/image-early-config-hiedge1.inc new file mode 100644 index 0000000000000000000000000000000000000000..2448cc6736d4ae0c7ec8a876bba6df1baa6432be --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/image-early-config-hiedge1.inc @@ -0,0 +1,8 @@ +# This file should only be referenced by openeuler-image for customizing early configuration at the image level +# ref: meta-openeuler/recipes-core/images/openeuler-image.bb: +# line 0 | include recipes-core/images/image-early-config-${MACHINE}.inc +# line 1 | require openeuler-image-common.inc + +IMAGE_FSTYPES = "ext4" +IMAGE_FSTYPES:remove = "iso" +IMAGE_FSTYPES_DEBUGFS = "cpio.gz" diff --git a/bsp/meta-hisilicon/recipes-core/images/image-hi3093.inc b/bsp/meta-hisilicon/recipes-core/images/image-hi3093.inc index 469ce4f80db54edd2960cc8fd922b204c83c7e0f..f52a2eca0d63dfbe418e4de492df683756bd4e3a 100644 --- a/bsp/meta-hisilicon/recipes-core/images/image-hi3093.inc +++ b/bsp/meta-hisilicon/recipes-core/images/image-hi3093.inc @@ -1,5 +1,5 @@ # This file should be included in openeuler-image.bbappend, openeuler-image-ros.bbappend, etc. -# diff from ${MACHINE}.inc, it shoud not include by live image +# diff from ${MACHINE}.inc, it should not be included by live image require ${@bb.utils.contains("DISTRO_FEATURES", "mpu_solution", "pack-hi3093.inc", "recipes-core/images/qemu.inc", d)} require recipes-core/images/bsp-${MACHINE}.inc @@ -52,7 +52,7 @@ ${@bb.utils.contains("DISTRO_FEATURES", "mpu_solution", " \ kernel-module-ksecurec \ kernel-module-msg-scm3-drv \ kernel-module-localbus-drv \ - kernel-module-spi-drv \ + kernel-module-spi-hi309x-drv \ kernel-module-uartconnect-drv \ kernel-module-trng-drv \ kernel-module-pci-fix-drv \ @@ -73,3 +73,9 @@ ${@bb.utils.contains("DISTRO_FEATURES", "mpu_solution", " \ kernel-module-dwc3 \ kernel-module-usb-common \ ", "", d)}" + +IMAGE_INSTALL:remove = "${@bb.utils.contains("DISTRO_FEATURES", "preempt-rt", " \ + kernel-module-i2c-drv \ + kernel-module-udc-core \ + kernel-module-usb-drv \ +", "", d)}" \ No newline at end of file diff --git a/bsp/meta-hisilicon/recipes-core/images/image-hiedge1.inc b/bsp/meta-hisilicon/recipes-core/images/image-hiedge1.inc new file mode 100644 index 0000000000000000000000000000000000000000..f0288c3ecaa343d0dbfae5bb7224d0ae510d5bb1 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-core/images/image-hiedge1.inc @@ -0,0 +1,18 @@ +# This file should be included in openeuler-image.bbappend, openeuler-image-ros.bbappend, etc. +# diff from ${MACHINE}.inc, it should not be included in live image + +require recipes-core/images/bsp-${MACHINE}.inc + +# all app and tools +IMAGE_INSTALL += " \ +hiedge1-user-driver \ +" + + +# 1. dsoftbus is not adpated to hieulerpi1 +# 2. user-driver may provides libsecurec.so, +# it conflicts with libboundscheck, especially in SDK +# so, remove dsoftbus from IMAGE_INSTALL +IMAGE_INSTALL:remove = " \ + packagegroup-dsoftbus \ +" diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/modules-hi3093.inc b/bsp/meta-hisilicon/recipes-kernel/hi3093/modules-hi3093.inc index a3b0f18ac42b6970abc8e809e1695039b8b8f936..93e06ddf7cd36d869184c9e2c406c779761efce6 100644 --- a/bsp/meta-hisilicon/recipes-kernel/hi3093/modules-hi3093.inc +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/modules-hi3093.inc @@ -39,4 +39,3 @@ do_install() { cat ${S}/Module.symvers >> ${STAGING_KERNEL_BUILDDIR}/Module.symvers fi } - diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/packagegroup-bsp-deps.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/packagegroup-bsp-deps.bb index 90097a593a5fbf580c28e3fb5d03c0103c1c7081..19dc9ee67af24ddd6fa53a3fb71a8f9a55f0ec11 100644 --- a/bsp/meta-hisilicon/recipes-kernel/hi3093/packagegroup-bsp-deps.bb +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/packagegroup-bsp-deps.bb @@ -13,4 +13,3 @@ RDEPENDS:${PN} += " \ kernel-module-map-funcs \ kernel-module-can-dev \ " - diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/sdio-sfc-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/sdio-sfc-hi3093_16.1.10.2.bb index 8379c99ba0222108147d90b7c417253bdb3825c6..8a19dbb208104b4b53bfbc2fbc04fbe43c89077a 100644 --- a/bsp/meta-hisilicon/recipes-kernel/hi3093/sdio-sfc-hi3093_16.1.10.2.bb +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/sdio-sfc-hi3093_16.1.10.2.bb @@ -16,4 +16,3 @@ RPROVIDES:${PN} += "kernel-module-mmc-block " RPROVIDES:${PN} += "kernel-module-mmc-core " RPROVIDES:${PN} += "kernel-module-emmc-drv " RPROVIDES:${PN} += "kernel-module-sdio-drv " - diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/sfc0-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/sfc0-hi3093_16.1.10.2.bb index 23669170966027a6d903ff729220c02d4c3c8176..e4a5dca31c932a4f0e1d809f2972aef22e136ab1 100644 --- a/bsp/meta-hisilicon/recipes-kernel/hi3093/sfc0-hi3093_16.1.10.2.bb +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/sfc0-hi3093_16.1.10.2.bb @@ -11,4 +11,3 @@ require modules-hi3093.inc do_configure:append() { sed -i '/sfc1/d' ${S}/Makefile } - diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/sfc1-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/sfc1-hi3093_16.1.10.2.bb index ab51bf050030eacbd3b87942b3688a7bd633b2e6..c3d20b11ac5b89f798a34fbc369cb56299cb35ed 100644 --- a/bsp/meta-hisilicon/recipes-kernel/hi3093/sfc1-hi3093_16.1.10.2.bb +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/sfc1-hi3093_16.1.10.2.bb @@ -10,4 +10,3 @@ require modules-hi3093.inc do_configure:append() { sed -i '/sfc0/d' ${S}/Makefile } - diff --git a/bsp/meta-hisilicon/recipes-kernel/hi3093/spi-hi3093_16.1.10.2.bb b/bsp/meta-hisilicon/recipes-kernel/hi3093/spi-hi3093_16.1.10.2.bb index 18ff5f7a302df0244d5747d6c4f319b13abacb92..66cc209467293bfc4df5a18662ca4426687f7eb0 100644 --- a/bsp/meta-hisilicon/recipes-kernel/hi3093/spi-hi3093_16.1.10.2.bb +++ b/bsp/meta-hisilicon/recipes-kernel/hi3093/spi-hi3093_16.1.10.2.bb @@ -1,6 +1,6 @@ KO_DIR_NAME = "spi" -KO_NAME = "spi_drv.ko" +KO_NAME = "spi_hi309x_drv.ko" PREV_DEPEND += " log-hi3093 comm-hi3093 ksecurec " -RPROVIDES:${PN} += "kernel-module-spi-drv" +RPROVIDES:${PN} += "kernel-module-spi-hi309x-drv" require modules-hi3093.inc diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093.dts b/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093.dts index a5e2950e2db4ac624f28d61e9ec5024fb2a0cea1..3d0d12b9f46d1d76482ac76dde2720d250e86263 100644 --- a/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093.dts +++ b/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093.dts @@ -290,44 +290,163 @@ <0x0 153 0x4>; }; - i2c@2000d000 { - compatible = "hisilicon,hi1711-i2c"; - reg = <0x0 0x08707000 0x0 0x1000>, - <0x0 0x08708000 0x0 0x1000>, - <0x0 0x08709000 0x0 0x1000>, - <0x0 0x0870a000 0x0 0x1000>, - <0x0 0x0870b000 0x0 0x1000>, - <0x0 0x0870c000 0x0 0x1000>, - <0x0 0x0870d000 0x0 0x1000>, - <0x0 0x0870e000 0x0 0x1000>, - <0x0 0x08750000 0x0 0x1000>, - <0x0 0x08751000 0x0 0x1000>, - <0x0 0x08752000 0x0 0x1000>, - <0x0 0x08753000 0x0 0x1000>, - <0x0 0x08754000 0x0 0x1000>, - <0x0 0x08755000 0x0 0x1000>, - <0x0 0x08756000 0x0 0x1000>, - <0x0 0x08757000 0x0 0x1000>, - <0x0 0x08745000 0x0 0x1000>, - <0x0 0x0876e000 0x0 0x1000>;/*0-15 i2creg ,16 ioconfig-T,17 ioconfig-R*/ - interrupts = <0x0 72 0x4>, - <0x0 73 0x4>, - <0x0 74 0x4>, - <0x0 75 0x4>, - <0x0 76 0x4>, - <0x0 77 0x4>, - <0x0 78 0x4>, - <0x0 79 0x4>, - <0x0 80 0x4>, - <0x0 81 0x4>, - <0x0 82 0x4>, - <0x0 83 0x4>, - <0x0 84 0x4>, - <0x0 85 0x4>, - <0x0 86 0x4>, - <0x0 87 0x4>;/*0-15*/ + i2c_bus0: i2c@8707000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08707000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 72 0x4>; + }; + + i2c_bus1: i2c@8708000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08708000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 73 0x4>; + }; + + i2c_bus2: i2c@8709000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08709000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 74 0x4>; }; + i2c_bus3: i2c@870a000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x0870a000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 75 0x4>; + }; + + i2c_bus4: i2c@870b000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x0870b000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 76 0x4>; + }; + + i2c_bus5: i2c@870c000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x0870c000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 77 0x4>; + }; + + i2c_bus6: i2c@870d000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x0870d000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 78 0x4>; + }; + + i2c_bus7: i2c@870e000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x0870e000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 79 0x4>; + }; + + i2c_bus8: i2c@8750000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08750000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 80 0x4>; + }; + + i2c_bus9: i2c@8751000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08751000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 81 0x4>; + }; + + i2c_bus10: i2c@8752000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08752000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 82 0x4>; + }; + + i2c_bus11: i2c@8753000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08753000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 83 0x4>; + }; + + i2c_bus12: i2c@8754000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08754000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 84 0x4>; + }; + + i2c_bus13: i2c@8755000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08755000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 85 0x4>; + }; + + i2c_bus14: i2c@8756000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08756000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 86 0x4>; + }; + + i2c_bus15: i2c@8757000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08757000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 87 0x4>; + }; + + /* + * The i2c@2000d000 node is used to implement the method in the src/non_real_time/drivers/i2c directory. + * This method does not use the Linux kernel framework. + * If you need to use this driver, delete i2c_bus0 to i2c_bus15 and use the i2c@2000d000 node. + */ + /* + * i2c@2000d000 { + * compatible = "hisilicon,hi1711-i2c"; + * reg = <0x0 0x08707000 0x0 0x1000>, + * <0x0 0x08708000 0x0 0x1000>, + * <0x0 0x08709000 0x0 0x1000>, + * <0x0 0x0870a000 0x0 0x1000>, + * <0x0 0x0870b000 0x0 0x1000>, + * <0x0 0x0870c000 0x0 0x1000>, + * <0x0 0x0870d000 0x0 0x1000>, + * <0x0 0x0870e000 0x0 0x1000>, + * <0x0 0x08750000 0x0 0x1000>, + * <0x0 0x08751000 0x0 0x1000>, + * <0x0 0x08752000 0x0 0x1000>, + * <0x0 0x08753000 0x0 0x1000>, + * <0x0 0x08754000 0x0 0x1000>, + * <0x0 0x08755000 0x0 0x1000>, + * <0x0 0x08756000 0x0 0x1000>, + * <0x0 0x08757000 0x0 0x1000>, + * <0x0 0x08745000 0x0 0x1000>, + * <0x0 0x0876e000 0x0 0x1000>;//0-15 i2creg ,16 ioconfig-T,17 ioconfig-R + * interrupts = <0x0 72 0x4>, + * <0x0 73 0x4>, + * <0x0 74 0x4>, + * <0x0 75 0x4>, + * <0x0 76 0x4>, + * <0x0 77 0x4>, + * <0x0 78 0x4>, + * <0x0 79 0x4>, + * <0x0 80 0x4>, + * <0x0 81 0x4>, + * <0x0 82 0x4>, + * <0x0 83 0x4>, + * <0x0 84 0x4>, + * <0x0 85 0x4>, + * <0x0 86 0x4>, + * <0x0 87 0x4>;//0-15 + * }; + */ + smbus@0x08707000 { compatible = "hisilicon,hi1711-smbus"; reg = <0x0 0x08707000 0x0 0x1000>, @@ -747,6 +866,13 @@ compatible = "hisilicon, hi1711-msg_scm3"; interrupts = <0 225 4>;/*inter core communication from secure M3*/ }; + + gpu@18000000 { + compatible = "hisilicon, hi1711-gpu"; + reg = <0x0 0x18000000 0x0 0x200000>, + <0x0 0x80000000 0x0 0x2000000>; + interrupts = <0x0 47 0x4>; + }; }; }; diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093_mcs_2with2.dts b/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093_mcs_2with2.dts index 5e293a0e78e0a29586c18cf4d71e6a420788e60d..473d0e25957f3f36b2b70320a53ad681c37ebed1 100644 --- a/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093_mcs_2with2.dts +++ b/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093_mcs_2with2.dts @@ -35,15 +35,15 @@ #size-cells = <0x2>; ranges; - client_os_reserved: client_os_reserved@93000000 { - reg = <0x00 0x93000000 0x00 0x4000000>; - no-map; + client_os_reserved: client_os_reserved@93000000 { + reg = <0x00 0x93000000 0x00 0x4000000>; + no-map; }; client_os_dma_memory_region: client_os-dma-memory@90000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0x90000000 0x00 0x3000000>; - no-map; + compatible = "shared-dma-pool"; + reg = <0x00 0x90000000 0x00 0x3000000>; + no-map; }; }; @@ -327,45 +327,163 @@ domain=<0x1 0x1 0x1 0x1 0x0>; }; - i2c@2000d000 { - compatible = "hisilicon,hi1711-i2c"; - reg = <0x0 0x08707000 0x0 0x1000>, - <0x0 0x08708000 0x0 0x1000>, - <0x0 0x08709000 0x0 0x1000>, - <0x0 0x0870a000 0x0 0x1000>, - <0x0 0x0870b000 0x0 0x1000>, - <0x0 0x0870c000 0x0 0x1000>, - <0x0 0x0870d000 0x0 0x1000>, - <0x0 0x0870e000 0x0 0x1000>, - <0x0 0x08750000 0x0 0x1000>, - <0x0 0x08751000 0x0 0x1000>, - <0x0 0x08752000 0x0 0x1000>, - <0x0 0x08753000 0x0 0x1000>, - <0x0 0x08754000 0x0 0x1000>, - <0x0 0x08755000 0x0 0x1000>, - <0x0 0x08756000 0x0 0x1000>, - <0x0 0x08757000 0x0 0x1000>, - <0x0 0x08745000 0x0 0x1000>, - <0x0 0x0876e000 0x0 0x1000>;/*0-15 i2creg ,16 ioconfig-T,17 ioconfig-R*/ - interrupts = <0x0 72 0x4>, - <0x0 73 0x4>, - <0x0 74 0x4>, - <0x0 75 0x4>, - <0x0 76 0x4>, - <0x0 77 0x4>, - <0x0 78 0x4>, - <0x0 79 0x4>, - <0x0 80 0x4>, - <0x0 81 0x4>, - <0x0 82 0x4>, - <0x0 83 0x4>, - <0x0 84 0x4>, - <0x0 85 0x4>, - <0x0 86 0x4>, - <0x0 87 0x4>;/*0-15*/ - domain=<0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1>; + i2c_bus0: i2c@8707000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08707000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 72 0x4>; }; + i2c_bus1: i2c@8708000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08708000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 73 0x4>; + }; + + i2c_bus2: i2c@8709000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08709000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 74 0x4>; + }; + + i2c_bus3: i2c@870a000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x0870a000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 75 0x4>; + }; + + i2c_bus4: i2c@870b000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x0870b000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 76 0x4>; + }; + + i2c_bus5: i2c@870c000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x0870c000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 77 0x4>; + }; + + i2c_bus6: i2c@870d000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x0870d000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 78 0x4>; + }; + + i2c_bus7: i2c@870e000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x0870e000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 79 0x4>; + }; + + i2c_bus8: i2c@8750000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08750000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 80 0x4>; + }; + + i2c_bus9: i2c@8751000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08751000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 81 0x4>; + }; + + i2c_bus10: i2c@8752000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08752000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 82 0x4>; + }; + + i2c_bus11: i2c@8753000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08753000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 83 0x4>; + }; + + i2c_bus12: i2c@8754000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08754000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 84 0x4>; + }; + + i2c_bus13: i2c@8755000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08755000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 85 0x4>; + }; + + i2c_bus14: i2c@8756000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08756000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 86 0x4>; + }; + + i2c_bus15: i2c@8757000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08757000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 87 0x4>; + }; + + /* + * The i2c@2000d000 node is used to implement the method in the src/non_real_time/drivers/i2c directory. + * This method does not use the Linux kernel framework. + * If you need to use this driver, delete i2c_bus0 to i2c_bus15 and use the i2c@2000d000 node. + */ + /* + * i2c@2000d000 { + * compatible = "hisilicon,hi1711-i2c"; + * reg = <0x0 0x08707000 0x0 0x1000>, + * <0x0 0x08708000 0x0 0x1000>, + * <0x0 0x08709000 0x0 0x1000>, + * <0x0 0x0870a000 0x0 0x1000>, + * <0x0 0x0870b000 0x0 0x1000>, + * <0x0 0x0870c000 0x0 0x1000>, + * <0x0 0x0870d000 0x0 0x1000>, + * <0x0 0x0870e000 0x0 0x1000>, + * <0x0 0x08750000 0x0 0x1000>, + * <0x0 0x08751000 0x0 0x1000>, + * <0x0 0x08752000 0x0 0x1000>, + * <0x0 0x08753000 0x0 0x1000>, + * <0x0 0x08754000 0x0 0x1000>, + * <0x0 0x08755000 0x0 0x1000>, + * <0x0 0x08756000 0x0 0x1000>, + * <0x0 0x08757000 0x0 0x1000>, + * <0x0 0x08745000 0x0 0x1000>, + * <0x0 0x0876e000 0x0 0x1000>;//0-15 i2creg ,16 ioconfig-T,17 ioconfig-R + * interrupts = <0x0 72 0x4>, + * <0x0 73 0x4>, + * <0x0 74 0x4>, + * <0x0 75 0x4>, + * <0x0 76 0x4>, + * <0x0 77 0x4>, + * <0x0 78 0x4>, + * <0x0 79 0x4>, + * <0x0 80 0x4>, + * <0x0 81 0x4>, + * <0x0 82 0x4>, + * <0x0 83 0x4>, + * <0x0 84 0x4>, + * <0x0 85 0x4>, + * <0x0 86 0x4>, + * <0x0 87 0x4>;//0-15 + * }; + */ + smbus@0x08707000 { compatible = "hisilicon,hi1711-smbus"; reg = <0x0 0x08707000 0x0 0x1000>, @@ -791,6 +909,13 @@ compatible = "hisilicon, hi1711-msg_scm3"; interrupts = <0 225 4>;/*inter core communication from secure M3*/ }; + + gpu@18000000 { + compatible = "hisilicon, hi1711-gpu"; + reg = <0x0 0x18000000 0x0 0x200000>, + <0x0 0x80000000 0x0 0x2000000>; + interrupts = <0x0 47 0x4>; + }; }; }; diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093_mcs_3with1.dts b/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093_mcs_3with1.dts index 05f384f15b8e9e6d89bc96b6a21aacf6c3925d75..77f97ca545af76e41e3bd831911aa5f23190a0e6 100644 --- a/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093_mcs_3with1.dts +++ b/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/hi3093_mcs_3with1.dts @@ -35,15 +35,15 @@ #size-cells = <0x2>; ranges; - client_os_reserved: client_os_reserved@93000000 { - reg = <0x00 0x93000000 0x00 0x4000000>; - no-map; + client_os_reserved: client_os_reserved@93000000 { + reg = <0x00 0x93000000 0x00 0x4000000>; + no-map; }; client_os_dma_memory_region: client_os-dma-memory@90000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0x90000000 0x00 0x3000000>; - no-map; + compatible = "shared-dma-pool"; + reg = <0x00 0x90000000 0x00 0x3000000>; + no-map; }; }; @@ -327,45 +327,163 @@ domain=<0x1 0x1 0x1 0x1 0x0>; }; - i2c@2000d000 { - compatible = "hisilicon,hi1711-i2c"; - reg = <0x0 0x08707000 0x0 0x1000>, - <0x0 0x08708000 0x0 0x1000>, - <0x0 0x08709000 0x0 0x1000>, - <0x0 0x0870a000 0x0 0x1000>, - <0x0 0x0870b000 0x0 0x1000>, - <0x0 0x0870c000 0x0 0x1000>, - <0x0 0x0870d000 0x0 0x1000>, - <0x0 0x0870e000 0x0 0x1000>, - <0x0 0x08750000 0x0 0x1000>, - <0x0 0x08751000 0x0 0x1000>, - <0x0 0x08752000 0x0 0x1000>, - <0x0 0x08753000 0x0 0x1000>, - <0x0 0x08754000 0x0 0x1000>, - <0x0 0x08755000 0x0 0x1000>, - <0x0 0x08756000 0x0 0x1000>, - <0x0 0x08757000 0x0 0x1000>, - <0x0 0x08745000 0x0 0x1000>, - <0x0 0x0876e000 0x0 0x1000>;/*0-15 i2creg ,16 ioconfig-T,17 ioconfig-R*/ - interrupts = <0x0 72 0x4>, - <0x0 73 0x4>, - <0x0 74 0x4>, - <0x0 75 0x4>, - <0x0 76 0x4>, - <0x0 77 0x4>, - <0x0 78 0x4>, - <0x0 79 0x4>, - <0x0 80 0x4>, - <0x0 81 0x4>, - <0x0 82 0x4>, - <0x0 83 0x4>, - <0x0 84 0x4>, - <0x0 85 0x4>, - <0x0 86 0x4>, - <0x0 87 0x4>;/*0-15*/ - domain=<0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1>; + i2c_bus0: i2c@8707000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08707000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 72 0x4>; }; + i2c_bus1: i2c@8708000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08708000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 73 0x4>; + }; + + i2c_bus2: i2c@8709000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08709000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 74 0x4>; + }; + + i2c_bus3: i2c@870a000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x0870a000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 75 0x4>; + }; + + i2c_bus4: i2c@870b000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x0870b000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 76 0x4>; + }; + + i2c_bus5: i2c@870c000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x0870c000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 77 0x4>; + }; + + i2c_bus6: i2c@870d000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x0870d000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 78 0x4>; + }; + + i2c_bus7: i2c@870e000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x0870e000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 79 0x4>; + }; + + i2c_bus8: i2c@8750000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08750000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 80 0x4>; + }; + + i2c_bus9: i2c@8751000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08751000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 81 0x4>; + }; + + i2c_bus10: i2c@8752000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08752000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 82 0x4>; + }; + + i2c_bus11: i2c@8753000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08753000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 83 0x4>; + }; + + i2c_bus12: i2c@8754000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08754000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 84 0x4>; + }; + + i2c_bus13: i2c@8755000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08755000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 85 0x4>; + }; + + i2c_bus14: i2c@8756000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08756000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 86 0x4>; + }; + + i2c_bus15: i2c@8757000 { + compatible = "hisilicon,hi309x-i2c"; + reg = <0x0 0x08757000 0x0 0x1000>; + clock-frequency = <100000>; + interrupts = <0x0 87 0x4>; + }; + + /* + * The i2c@2000d000 node is used to implement the method in the src/non_real_time/drivers/i2c directory. + * This method does not use the Linux kernel framework. + * If you need to use this driver, delete i2c_bus0 to i2c_bus15 and use the i2c@2000d000 node. + */ + /* + * i2c@2000d000 { + * compatible = "hisilicon,hi1711-i2c"; + * reg = <0x0 0x08707000 0x0 0x1000>, + * <0x0 0x08708000 0x0 0x1000>, + * <0x0 0x08709000 0x0 0x1000>, + * <0x0 0x0870a000 0x0 0x1000>, + * <0x0 0x0870b000 0x0 0x1000>, + * <0x0 0x0870c000 0x0 0x1000>, + * <0x0 0x0870d000 0x0 0x1000>, + * <0x0 0x0870e000 0x0 0x1000>, + * <0x0 0x08750000 0x0 0x1000>, + * <0x0 0x08751000 0x0 0x1000>, + * <0x0 0x08752000 0x0 0x1000>, + * <0x0 0x08753000 0x0 0x1000>, + * <0x0 0x08754000 0x0 0x1000>, + * <0x0 0x08755000 0x0 0x1000>, + * <0x0 0x08756000 0x0 0x1000>, + * <0x0 0x08757000 0x0 0x1000>, + * <0x0 0x08745000 0x0 0x1000>, + * <0x0 0x0876e000 0x0 0x1000>;//0-15 i2creg ,16 ioconfig-T,17 ioconfig-R + * interrupts = <0x0 72 0x4>, + * <0x0 73 0x4>, + * <0x0 74 0x4>, + * <0x0 75 0x4>, + * <0x0 76 0x4>, + * <0x0 77 0x4>, + * <0x0 78 0x4>, + * <0x0 79 0x4>, + * <0x0 80 0x4>, + * <0x0 81 0x4>, + * <0x0 82 0x4>, + * <0x0 83 0x4>, + * <0x0 84 0x4>, + * <0x0 85 0x4>, + * <0x0 86 0x4>, + * <0x0 87 0x4>;//0-15 + * }; + */ + smbus@0x08707000 { compatible = "hisilicon,hi1711-smbus"; reg = <0x0 0x08707000 0x0 0x1000>, @@ -791,6 +909,13 @@ compatible = "hisilicon, hi1711-msg_scm3"; interrupts = <0 225 4>;/*inter core communication from secure M3*/ }; + + gpu@18000000 { + compatible = "hisilicon, hi1711-gpu"; + reg = <0x0 0x18000000 0x0 0x200000>, + <0x0 0x80000000 0x0 0x2000000>; + interrupts = <0x0 47 0x4>; + }; }; }; diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/ss626v100-demb-emmc.dts b/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/ss626v100-demb-emmc.dts new file mode 100644 index 0000000000000000000000000000000000000000..2aa6ed41a6adc0b23177d584fa9929468fcffaa0 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/files/dtbs/ss626v100-demb-emmc.dts @@ -0,0 +1,979 @@ +/dts-v1/; + +/memreserve/ 0x0000000046fff000 0x0000000001a02000; +/ { + #address-cells = <0x02>; + #size-cells = <0x02>; + interrupt-parent = <0x01>; + model = "Vendor SS626V100 DEMO Board"; + compatible = "vendor,ss626v100"; + + interrupt-controller@12400000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <0x03>; + #address-cells = <0x00>; + interrupt-controller; + reg = <0x00 0x12400000 0x00 0x10000 0x00 0x12440000 0x00 0x140000>; + phandle = <0x01>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <0x01 0x17 0xf04>; + }; + + clock0 { + compatible = "vendor,ss626v100_clock\0syscon"; + #clock-cells = <0x01>; + #reset-cells = <0x02>; + #address-cells = <0x01>; + #size-cells = <0x01>; + reg = <0x00 0x11010000 0x00 0x4600>; + phandle = <0x04>; + }; + + smmu_npu@14410000 { + compatible = "arm,smmu-v3"; + reg = <0x00 0x14410000 0x00 0x40000>; + interrupts = <0x00 0xbe 0x04>; + interrupt-names = "combined"; + #iommu-cells = <0x01>; + vendor,broken-prefetch-cmd; + phandle = <0x02>; + }; + + svm_npu@14400000 { + compatible = "vendor,svm"; + crg-base = <0x11010000>; + crg-size = <0x10000>; + npu_crg_6560 = <0x6680>; + ranges; + #size-cells = <0x02>; + #address-cells = <0x02>; + + svm_aicore { + reg = <0x00 0xdbba00 0x00 0x10000>; + iommus = <0x02 0x01>; + dma-can-stall; + pasid-num-bits = <0x10>; + }; + + svm_hwts { + iommus = <0x02 0x02>; + dma-can-stall; + pasid-bits = <0x10>; + vendor,smmu_bypass; + }; + }; + + firmware { + + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + + ipcm@1301c000 { + compatible = "vendor,ipcm-interrupt"; + interrupt-parent = <0x01>; + interrupts = <0x00 0x22 0x04>; + reg = <0x00 0x1301c000 0x00 0x1000>; + status = "okay"; + }; + + soc { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "simple-bus"; + device_type = "soc"; + ranges = <0x00 0x00 0x00 0xffffffff>; + + clk_3m { + compatible = "fixed-clock"; + #clock-cells = <0x00>; + clock-frequency = <0x2dc6c0>; + phandle = <0x03>; + }; + + amba { + compatible = "arm,amba-bus"; + #address-cells = <0x01>; + #size-cells = <0x01>; + ranges; + + arm-timer { + compatible = "arm,armv8-timer"; + interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04>; + clock-frequency = <0x16e3600>; + always-on; + }; + + timer@11000000 { + compatible = "vendor,bsp_sp804"; + reg = <0x11000000 0x1000 0x11001000 0x1000 0x11002000 0x1000 0x11003000 0x1000 0x11004000 0x1000>; + interrupts = <0x00 0x08 0x04 0x00 0x09 0x04 0x00 0x0a 0x04 0x00 0x0b 0x04 0x00 0x0c 0x04>; + clocks = <0x03>; + clock-names = "apb_pclk"; + }; + + uart@11040000 { + compatible = "arm,pl011\0arm,primecell"; + reg = <0x11040000 0x1000>; + interrupts = <0x00 0x28 0x04>; + clocks = <0x04 0x53>; + clock-names = "apb_pclk"; + resets = <0x04 0x4180 0x00>; + reset-names = "bsp_uart_rst"; + status = "okay"; + }; + + uart@11041000 { + compatible = "arm,pl011\0arm,primecell"; + reg = <0x11041000 0x1000>; + interrupts = <0x00 0x29 0x04>; + clocks = <0x04 0x54>; + clock-names = "apb_pclk"; + resets = <0x04 0x4188 0x00>; + reset-names = "bsp_uart_rst"; + status = "disabled"; + }; + + uart@11042000 { + compatible = "arm,pl011\0arm,primecell"; + reg = <0x11042000 0x1000>; + interrupts = <0x00 0x2a 0x04>; + clocks = <0x04 0x55>; + clock-names = "apb_pclk"; + resets = <0x04 0x4190 0x00>; + reset-names = "bsp_uart_rst"; + status = "disabled"; + }; + + uart@11043000 { + compatible = "arm,pl011\0arm,primecell"; + reg = <0x11043000 0x1000>; + interrupts = <0x00 0x2b 0x04>; + clocks = <0x04 0x56>; + clock-names = "apb_pclk"; + resets = <0x04 0x4198 0x00>; + reset-names = "bsp_uart_rst"; + status = "disabled"; + }; + + uart@11044000 { + compatible = "arm,pl011\0arm,primecell"; + reg = <0x11044000 0x1000>; + interrupts = <0x00 0x2c 0x04>; + clocks = <0x04 0x57>; + clock-names = "apb_pclk"; + resets = <0x04 0x41a0 0x00>; + reset-names = "bsp_uart_rst"; + status = "disabled"; + }; + + uart@11045000 { + compatible = "arm,pl011\0arm,primecell"; + reg = <0x11045000 0x1000>; + interrupts = <0x00 0x2d 0x04>; + clocks = <0x04 0x58>; + clock-names = "apb_pclk"; + resets = <0x04 0x41a8 0x00>; + reset-names = "bsp_uart_rst"; + status = "disabled"; + }; + + uart@11046000 { + compatible = "arm,pl011\0arm,primecell"; + reg = <0x11046000 0x1000>; + interrupts = <0x00 0x2e 0x04>; + clocks = <0x04 0x59>; + clock-names = "apb_pclk"; + resets = <0x04 0x41b0 0x00>; + reset-names = "bsp_uart_rst"; + status = "disabled"; + }; + + uart@11047000 { + compatible = "arm,pl011\0arm,primecell"; + reg = <0x11047000 0x1000>; + interrupts = <0x00 0x2f 0x04>; + clocks = <0x04 0x5a>; + clock-names = "apb_pclk"; + resets = <0x04 0x41b8 0x00>; + reset-names = "bsp_uart_rst"; + status = "disabled"; + }; + + i2c@11060000 { + compatible = "vendor,i2c"; + reg = <0x11060000 0x1000>; + clocks = <0x04 0x5f>; + clock-rate = <0x5f5e100>; + clock-frequency = <0x186a0>; + resets = <0x04 0x4280 0x00>; + reset-names = "i2c_reset"; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "okay"; + }; + + i2c@11061000 { + compatible = "vendor,i2c"; + reg = <0x11061000 0x1000>; + clocks = <0x04 0x60>; + clock-rate = <0x5f5e100>; + clock-frequency = <0x186a0>; + resets = <0x04 0x4288 0x00>; + reset-names = "i2c_reset"; + status = "okay"; + }; + + spi@11070000 { + compatible = "arm,pl022\0arm,primecell"; + arm,primecell-periphid = <0x800022>; + reg = <0x11070000 0x1000>; + interrupts = <0x00 0x38 0x04>; + clocks = <0x04 0x61>; + clock-names = "apb_pclk"; + resets = <0x04 0x4480 0x00>; + reset-names = "bsp_spi_rst"; + #address-cells = <0x01>; + spi,slave_mode = <0x00>; + #size-cells = <0x00>; + status = "okay"; + num-cs = <0x01>; + + spidev@0 { + compatible = "rohm,dh2228fv"; + reg = <0x00>; + pl022,interface = <0x00>; + pl022,com-mode = <0x00>; + spi-max-frequency = <0x17d7840>; + }; + }; + + spi@11071000 { + compatible = "arm,pl022\0arm,primecell"; + arm,primecell-periphid = <0x800022>; + reg = <0x11071000 0x1000>; + interrupts = <0x00 0x39 0x04>; + clocks = <0x04 0x62>; + clock-names = "apb_pclk"; + resets = <0x04 0x4488 0x00>; + reset-names = "bsp_spi_rst"; + #address-cells = <0x01>; + spi,slave_mode = <0x00>; + #size-cells = <0x00>; + status = "okay"; + num-cs = <0x01>; + + spidev@0 { + compatible = "rohm,dh2228fv"; + reg = <0x00>; + pl022,interface = <0x00>; + pl022,com-mode = <0x00>; + spi-max-frequency = <0x17d7840>; + }; + }; + + gpio_chip@11090000 { + compatible = "arm,pl061\0arm,primecell"; + reg = <0x11090000 0x1000>; + interrupts = <0x00 0x3e 0x04>; + #gpio-cells = <0x02>; + clocks = <0x04 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@11091000 { + compatible = "arm,pl061\0arm,primecell"; + reg = <0x11091000 0x1000>; + interrupts = <0x00 0x3f 0x04>; + #gpio-cells = <0x02>; + clocks = <0x04 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@11092000 { + compatible = "arm,pl061\0arm,primecell"; + reg = <0x11092000 0x1000>; + interrupts = <0x00 0x40 0x04>; + #gpio-cells = <0x02>; + clocks = <0x04 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@11093000 { + compatible = "arm,pl061\0arm,primecell"; + reg = <0x11093000 0x1000>; + interrupts = <0x00 0x41 0x04>; + #gpio-cells = <0x02>; + clocks = <0x04 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@11094000 { + compatible = "arm,pl061\0arm,primecell"; + reg = <0x11094000 0x1000>; + interrupts = <0x00 0x42 0x04>; + #gpio-cells = <0x02>; + clocks = <0x04 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@11095000 { + compatible = "arm,pl061\0arm,primecell"; + reg = <0x11095000 0x1000>; + interrupts = <0x00 0x43 0x04>; + #gpio-cells = <0x02>; + clocks = <0x04 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@11096000 { + compatible = "arm,pl061\0arm,primecell"; + reg = <0x11096000 0x1000>; + interrupts = <0x00 0x44 0x04>; + #gpio-cells = <0x02>; + clocks = <0x04 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@11097000 { + compatible = "arm,pl061\0arm,primecell"; + reg = <0x11097000 0x1000>; + interrupts = <0x00 0x45 0x04>; + #gpio-cells = <0x02>; + clocks = <0x04 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@11098000 { + compatible = "arm,pl061\0arm,primecell"; + reg = <0x11098000 0x1000>; + interrupts = <0x00 0x46 0x04>; + #gpio-cells = <0x02>; + clocks = <0x04 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@11099000 { + compatible = "arm,pl061\0arm,primecell"; + reg = <0x11099000 0x1000>; + interrupts = <0x00 0x47 0x04>; + #gpio-cells = <0x02>; + clocks = <0x04 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@1109A000 { + compatible = "arm,pl061\0arm,primecell"; + reg = <0x1109a000 0x1000>; + interrupts = <0x00 0x48 0x04>; + #gpio-cells = <0x02>; + clocks = <0x04 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@1109B000 { + compatible = "arm,pl061\0arm,primecell"; + reg = <0x1109b000 0x1000>; + interrupts = <0x00 0x49 0x04>; + #gpio-cells = <0x02>; + clocks = <0x04 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@1109C000 { + compatible = "arm,pl061\0arm,primecell"; + reg = <0x1109c000 0x1000>; + interrupts = <0x00 0x4a 0x04>; + #gpio-cells = <0x02>; + clocks = <0x04 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@1109D000 { + compatible = "arm,pl061\0arm,primecell"; + reg = <0x1109d000 0x1000>; + interrupts = <0x00 0x4b 0x04>; + #gpio-cells = <0x02>; + clocks = <0x04 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + + gpio_chip@1109E000 { + compatible = "arm,pl061\0arm,primecell"; + reg = <0x1109e000 0x1000>; + interrupts = <0x00 0x4c 0x04>; + #gpio-cells = <0x02>; + clocks = <0x04 0x23>; + clock-names = "apb_pclk"; + status = "okay"; + }; + }; + + sys@11010000 { + compatible = "vendor,sys"; + reg = <0x11014600 0xba00 0x11020000 0x4000 0x11130000 0x10000 0x11024000 0x5000>; + reg-names = "crg\0sys\0ddr\0misc"; + }; + + misc-controller@11024000 { + compatible = "vendor,miscctrl\0syscon"; + reg = <0x11024000 0x5000>; + }; + + ioconfig0@10ff0000 { + compatible = "vendor,ioconfig\0syscon"; + reg = <0x10ff0000 0x10000>; + phandle = <0x07>; + }; + + ioconfig1@17ca0000 { + compatible = "vendor,ioconfig\0syscon"; + reg = <0x17ca0000 0x10000>; + phandle = <0x08>; + }; + + flash-memory-controller@10000000 { + compatible = "vendor,fmc"; + reg = <0x10000000 0x1000 0xf000000 0x1000000>; + reg-names = "control\0memory"; + clocks = <0x04 0x50>; + max-dma-size = <0x2000>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + spi_nor_controller { + compatible = "vendor,fmc-spi-nor"; + assigned-clocks = <0x04 0x50>; + assigned-clock-rates = <0x16e3600>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + sfc@0 { + compatible = "jedec,spi-nor"; + reg = <0x00>; + spi-max-frequency = <0x9896800>; + m25p,fast-read; + }; + }; + + spi_nand_controller { + compatible = "vendor,fmc-spi-nand"; + assigned-clocks = <0x04 0x50>; + assigned-clock-rates = <0x16e3600>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + nand@0 { + compatible = "jedec,spi-nand"; + reg = <0x00>; + spi-max-frequency = <0x9896800>; + }; + }; + }; + + mdio@102903c0 { + compatible = "vendor,gemac-mdio"; + reg = <0x102903c0 0x20>; + clocks = <0x04 0x5b>; + resets = <0x04 0x37cc 0x00>; + reset-names = "phy_reset"; + #address-cells = <0x01>; + #size-cells = <0x00>; + + ethernet-phy@1 { + reg = <0x01>; + phandle = <0x05>; + }; + }; + + mdio@102a03c0 { + compatible = "vendor,gemac-mdio"; + reg = <0x102a03c0 0x20>; + clocks = <0x04 0x5d>; + resets = <0x04 0x380c 0x00>; + reset-names = "phy_reset"; + #address-cells = <0x01>; + #size-cells = <0x00>; + + ethernet-phy@3 { + reg = <0x03>; + phandle = <0x06>; + }; + }; + + ethernet@10290000 { + compatible = "vendor,gmac-v5"; + reg = <0x10290000 0x1000 0x1029300c 0x04>; + interrupts = <0x00 0x68 0x04 0x00 0x69 0x04 0x00 0x6a 0x04 0x00 0x6b 0x04 0x00 0x6c 0x04 0x00 0x6d 0x04 0x00 0x6e 0x04 0x00 0x6f 0x04>; + clocks = <0x04 0x5b 0x04 0x5c>; + clock-names = "gmac_clk\0macif_clk"; + resets = <0x04 0x37c4 0x00 0x04 0x37c0 0x00>; + reset-names = "port_reset\0macif_reset"; + rss-cpu = <0x01 0x02 0x03 0x04>; + mac-address = [00 00 00 00 00 00]; + lro-enable; + phy-handle = <0x05>; + phy-mode = "rgmii-id"; + }; + + ethernet@102a0000 { + compatible = "vendor,gmac-v5"; + reg = <0x102a0000 0x1000 0x102a300c 0x04>; + interrupts = <0x00 0x70 0x04 0x00 0x71 0x04 0x00 0x72 0x04 0x00 0x73 0x04 0x00 0x74 0x04 0x00 0x75 0x04 0x00 0x76 0x04 0x00 0x77 0x04>; + clocks = <0x04 0x5d 0x04 0x5e>; + clock-names = "gmac_clk\0macif_clk"; + resets = <0x04 0x3804 0x00 0x04 0x3800 0x00>; + reset-names = "port_reset\0macif_reset"; + rss-cpu = <0x01 0x02 0x03 0x04>; + mac-address = [00 00 00 00 00 00]; + lro-enable; + phy-handle = <0x06>; + phy-mode = "rgmii-id"; + }; + + phy { + compatible = "vendor,usb-phy"; + reg = <0x11010000 0x10000>; + phyid = <0x00>; + }; + + xhci_0@0x10300000 { + compatible = "generic-xhci"; + reg = <0x10300000 0x10000>; + interrupts = <0x00 0x90 0x04>; + usb2-lpm-disable; + }; + + xhci_1@0x10340000 { + compatible = "generic-xhci"; + reg = <0x10340000 0x10000>; + interrupts = <0x00 0x91 0x04>; + usb2-lpm-disable; + }; + + eMMC@0x10020000 { + compatible = "vendor,sdhci"; + reg = <0x10020000 0x1000>; + interrupts = <0x00 0x63 0x04>; + clocks = <0x04 0x51>; + clock-names = "mmc_clk"; + resets = <0x04 0x34c0 0x10 0x04 0x34c0 0x11 0x04 0x34c0 0x12 0x04 0x34c0 0x01 0x04 0x34c0 0x00 0x04 0x34c4 0x01>; + reset-names = "crg_reset\0crg_tx_reset\0crg_rx_reset\0crg_ahb_clk_enable\0crg_clk_enable\0dll_reset"; + max-frequency = <0xbb65a20>; + crg_regmap = <0x04>; + non-removable; + iocfg_regmap = <0x07>; + bus-width = <0x08>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + cap-mmc-hw-reset; + no-sdio; + no-sd; + devid = <0x00>; + status = "okay"; + }; + + SDIO@0x10030000 { + compatible = "vendor,sdhci"; + reg = <0x10030000 0x1000>; + interrupts = <0x00 0x60 0x04>; + clocks = <0x04 0x52>; + clock-names = "mmc_clk"; + resets = <0x04 0x35c0 0x10 0x04 0x35c0 0x11 0x04 0x35c0 0x12 0x04 0x35c0 0x01 0x04 0x35c0 0x00 0x04 0x35c4 0x01>; + reset-names = "crg_reset\0crg_tx_reset\0crg_rx_reset\0crg_ahb_clk_enable\0crg_clk_enable\0dll_reset"; + max-frequency = <0xbb65a20>; + crg_regmap = <0x04>; + iocfg_regmap = <0x08>; + bus-width = <0x04>; + cap-sd-highspeed; + full-pwr-cycle; + disable-wp; + no-emmc; + no-sd; + devid = <0x01>; + status = "okay"; + }; + + pcie0@0x103d0000 { + device_type = "pcie"; + compatible = "vendor,pcie"; + #size-cells = <0x02>; + #address-cells = <0x03>; + #interrupt-cells = <0x01>; + bus-range = <0x00 0xff>; + reg = <0x00 0x103d0000 0x00 0x2000>; + ranges = <0x2000000 0x00 0x28000000 0x28000000 0x00 0x8000000>; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x7c 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x7d 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x7e 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x7f 0x04>; + interrupts = <0x00 0x81 0x04>; + interrupt-names = "msi"; + pcie_controller = <0x00>; + dev_mem_size = <0x8000000>; + dev_conf_size = <0x8000000>; + sys_ctrl_base = <0x11020000>; + pcie_dbi_base = <0x103d0000>; + ep_conf_base = <0x20000000>; + pcie_clk_rest_reg = <0x3a40>; + status = "okay"; + }; + + pcie1@0x103e0000 { + device_type = "pcie"; + compatible = "vendor,pcie"; + #size-cells = <0x02>; + #address-cells = <0x03>; + #interrupt-cells = <0x01>; + bus-range = <0x00 0xff>; + reg = <0x00 0x103e0000 0x00 0x2000>; + ranges = <0x2000000 0x00 0x38000000 0x38000000 0x00 0x8000000>; + interrupt-map-mask = <0x00 0x00 0x00 0x07>; + interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x87 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x88 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x89 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x8a 0x04>; + interrupts = <0x00 0x8c 0x04>; + interrupt-names = "msi"; + pcie_controller = <0x01>; + dev_mem_size = <0x8000000>; + dev_conf_size = <0x8000000>; + sys_ctrl_base = <0x11020000>; + pcie_dbi_base = <0x103e0000>; + ep_conf_base = <0x30000000>; + pcie_clk_rest_reg = <0x3a60>; + status = "okay"; + }; + + pcie_mcc@0x0 { + compatible = "vendor,pcie_mcc"; + interrupts = <0x00 0x7c 0x04 0x00 0x7d 0x04 0x00 0x7e 0x04 0x00 0x7f 0x04 0x00 0x80 0x04 0x00 0x00 0x04 0x00 0x87 0x04 0x00 0x88 0x04 0x00 0x89 0x04 0x00 0x8a 0x04 0x00 0x8b 0x04>; + }; + + phy@0x10390000 { + compatible = "vendor,sata-phy"; + reg = <0x10390000 0x10000>; + ports_num_max = <0x04>; + #phy-cells = <0x00>; + phandle = <0x09>; + }; + + sata@0x10390000 { + compatible = "vendor,ahci"; + reg = <0x10390000 0x1000>; + interrupts = <0x00 0x94 0x04>; + phys = <0x09>; + phy-names = "sata-phy"; + #address-cells = <0x01>; + #size-cells = <0x00>; + }; + + edma-controller@10280000 { + compatible = "vendor,edmacv310"; + reg = <0x10280000 0x1000>; + interrupts = <0x00 0x64 0x04>; + clocks = <0x04 0x63 0x04 0x64>; + clock-names = "apb_pclk\0axi_aclk"; + #clock-cells = <0x02>; + resets = <0x04 0x2a80 0x00>; + reset-names = "dma-reset"; + dma-requests = <0x20>; + dma-channels = <0x08>; + devid = <0x00>; + #dma-cells = <0x02>; + status = "disabled"; + }; + + vi@0x17400000 { + compatible = "vendor,vi"; + reg = <0x17400000 0x40000 0x11003020 0x20>; + reg-names = "VI_CAP\0vi_timer"; + interrupts = <0x00 0xbb 0x04 0x00 0x0b 0x04>; + interrupt-names = "VI_CAP\0vi_timer"; + }; + + vpss@0x17900000 { + compatible = "vendor,vpss"; + reg = <0x17900000 0x10000 0x17910000 0x10000 0x17920000 0x10000>; + reg-names = "vpss0\0vpss1\0vpss2"; + interrupts = <0x00 0xac 0x04 0x00 0xad 0x04 0x00 0xae 0x04>; + interrupt-names = "vpss0\0vpss1\0vpss2"; + }; + + vgs@0x17240000 { + compatible = "vendor,vgs"; + reg = <0x17240000 0x10000 0x17250000 0x10000>; + reg-names = "vgs0\0vgs1"; + interrupts = <0x00 0xa8 0x04 0x00 0xaa 0x04>; + interrupt-names = "vgs0\0vgs1"; + }; + + gdc@0x172c0000 { + compatible = "vendor,gdc"; + reg = <0x172c0000 0x10000>; + reg-names = "gdc"; + interrupts = <0x00 0xba 0x04>; + interrupt-names = "gdc"; + }; + + vo@0x17A00000 { + compatible = "vendor,vo"; + reg = <0x17a00000 0x40000>; + reg-names = "vo"; + interrupts = <0x00 0x9f 0x04 0x00 0xa0 0x04>; + interrupt-names = "vo"; + }; + + hdmi@0x17B40000 { + compatible = "vendor,hdmi"; + reg = <0x17b40000 0x20000 0x17bc0000 0x10000 0x17b60000 0x20000 0x17bd0000 0x10000>; + reg-names = "hdmi0\0phy0\0hdmi1\0phy1"; + interrupts = <0x00 0xa2 0x04 0x00 0xa3 0x04 0x00 0xa4 0x04 0x00 0xa5 0x04 0x00 0xa6 0x04 0x00 0xa7 0x04>; + interrupt-names = "tx0_aon\0tx0_pwd\0tx0_sec\0tx1_aon\0tx1_pwd\0tx1_sec"; + }; + + venc@0x17140000 { + compatible = "vendor,vedu"; + reg = <0x17140000 0x10000 0x171c0000 0x10000>; + reg-names = "vedu0\0jpge"; + interrupts = <0x00 0xb5 0x04 0x00 0xb0 0x04>; + interrupt-names = "vedu0\0jpge"; + }; + + vdh@0x17100000 { + compatible = "vendor,vdh"; + reg = <0x17100000 0x10000 0x17110000 0x10000>; + reg-names = "vdh0_scd\0vdh1_scd"; + interrupts = <0x00 0xd0 0x04 0x00 0xd1 0x04 0x00 0xd2 0x04 0x00 0xd4 0x04 0x00 0xd5 0x04 0x00 0xd6 0x04 0x00 0xd7 0x04 0x00 0xd8 0x04 0x00 0xda 0x04 0x00 0xdb 0x04>; + interrupt-names = "vdh0_bsp\0vdh0_pxp\0vdh0_pxp1\0scd0\0mdma0\0vdh1_bsp\0vdh1_pxp\0vdh1_pxp1\0scd1\0mdma1"; + }; + + jpegd@0x17180000 { + compatible = "vendor,jpegd"; + reg = <0x17180000 0x10000 0x17190000 0x10000>; + reg-names = "jpegd0\0jpegd1"; + interrupts = <0x00 0xb1 0x04 0x00 0xb2 0x04>; + interrupt-names = "jpegd0\0jpegd1"; + }; + + vda@0x170c0000 { + compatible = "vendor,vda"; + reg = <0x170c0000 0x10000>; + reg-names = "vda"; + interrupts = <0x00 0xb4 0x04>; + interrupt-names = "vda"; + }; + + npu@0x14000000 { + compatible = "vendor,npu"; + reg = <0x14000000 0x10000>; + reg-names = "npu"; + interrupts = <0x00 0xcb 0x04 0x00 0xca 0x04>; + interrupt-names = "npu_ns\0npu_s"; + }; + + ive@0x17000000 { + compatible = "vendor,ive"; + reg = <0x17000000 0x10000 0x17010000 0x10000 0x17020000 0x10000>; + reg-names = "ive\0kcf0\0kcf1"; + interrupts = <0x00 0xb7 0x04 0x00 0xb8 0x04 0x00 0xb9 0x04>; + interrupt-names = "ive\0kcf0\0kcf1"; + }; + + mau@0x170E0000 { + compatible = "vendor,mau"; + reg = <0x170e0000 0x10000>; + reg-names = "mau0"; + interrupts = <0x00 0xb3 0x04>; + interrupt-names = "mau0"; + }; + + aiao@17c00000 { + compatible = "vendor,aiao"; + reg = <0x17c40000 0x10000 0x17c00000 0x10000>; + reg-names = "acodec\0aiao"; + interrupts = <0x00 0xa1 0x04>; + interrupt-names = "AIO"; + }; + + tde@0x17280000 { + compatible = "vendor,tde"; + reg = <0x17280000 0x10000>; + reg-names = "tde"; + interrupts = <0x00 0xaf 0x04>; + interrupt-names = "tde_osr_isr"; + }; + + cipher@0x10100000 { + compatible = "vendor,cipher"; + reg = <0x10100000 0x10000>; + reg-names = "cipher"; + interrupts = <0x00 0x4f 0x04 0x00 0x50 0x04 0x00 0x52 0x04 0x00 0x53 0x04>; + interrupt-names = "nsec_spacc\0sec_spacc\0nsec_pke\0sec_pke"; + }; + + klad@0x10110000 { + compatible = "vendor,klad"; + reg = <0x10110000 0x1000>; + reg-names = "klad"; + interrupts = <0x00 0x55 0x04 0x00 0x56 0x04 0x00 0x57 0x04 0x00 0x58 0x04>; + interrupt-names = "nsec_rkp\0sec_rkp\0nsec_klad\0sec_klad"; + }; + + otp@0x10120000 { + compatible = "vendor,otp"; + reg = <0x10120000 0x1000>; + reg-names = "otp"; + }; + + ir@0x110F0000 { + compatible = "vendor,ir"; + reg = <0x110f0000 0x10000>; + reg-names = "ir"; + interrupts = <0x00 0x02 0x04>; + interrupt-names = "ir"; + }; + + wdg@0x11030000 { + compatible = "vendor,wdg"; + reg = <0x11030000 0x1000>; + reg-names = "wdg0"; + interrupts = <0x00 0x04 0x04>; + interrupt-names = "wdg"; + }; + + pwm@0x11080000 { + compatible = "vendor,pwm"; + reg = <0x11080000 0x1000>; + reg-names = "pwm0"; + clocks = <0x04 0x67>; + clock-names = "pwm0"; + resets = <0x04 0x4584 0x00>; + reset-names = "pwm0"; + status = "okay"; + }; + }; + + aliases { + serial0 = "/soc/amba/uart@11040000"; + serial1 = "/soc/amba/uart@11041000"; + serial2 = "/soc/amba/uart@11042000"; + serial3 = "/soc/amba/uart@11043000"; + serial4 = "/soc/amba/uart@11044000"; + serial5 = "/soc/amba/uart@11045000"; + serial6 = "/soc/amba/uart@11046000"; + serial7 = "/soc/amba/uart@11047000"; + i2c0 = "/soc/amba/i2c@11060000"; + i2c1 = "/soc/amba/i2c@11061000"; + spi0 = "/soc/amba/spi@11070000"; + spi1 = "/soc/amba/spi@11071000"; + gpio0 = "/soc/amba/gpio_chip@11090000"; + gpio1 = "/soc/amba/gpio_chip@11091000"; + gpio2 = "/soc/amba/gpio_chip@11092000"; + gpio3 = "/soc/amba/gpio_chip@11093000"; + gpio4 = "/soc/amba/gpio_chip@11094000"; + gpio5 = "/soc/amba/gpio_chip@11095000"; + gpio6 = "/soc/amba/gpio_chip@11096000"; + gpio7 = "/soc/amba/gpio_chip@11097000"; + gpio8 = "/soc/amba/gpio_chip@11098000"; + gpio9 = "/soc/amba/gpio_chip@11099000"; + gpio10 = "/soc/amba/gpio_chip@1109A000"; + gpio11 = "/soc/amba/gpio_chip@1109B000"; + gpio12 = "/soc/amba/gpio_chip@1109C000"; + gpio13 = "/soc/amba/gpio_chip@1109D000"; + gpio14 = "/soc/amba/gpio_chip@1109E000"; + }; + + chosen { + bootargs = "earlycon=pl011,0x11040000 mem=512M console=ttyAMA0,115200 clk_ignore_unused root=/dev/mtdblock2 rootfstype=yaffs2 rw mtdparts=nand:1M(boot),9M(kernel),32M(rootfs),1M(this_bootargs_string_is_reserved_for_bootargs_form_uboot!!!_it_must_be_longer_than_bootargs_form_uboot!!!_this_bootargs_string_is_reserved_for_bootargs_form_uboot!!!_it_must_be_longer_than_bootargs_form_uboot!!!_this_bootargs_string_is_reserved_for_bootargs_form_uboot!!!_it_must_be_longer_than_bootargs_form_uboot!!!_this_bootargs_string_is_reserved_for_bootargs_form_uboot!!!_it_must_be_longer_than_bootargs_form_uboot!!!_this_bootargs_string_is_reserved_for_bootargs_form_uboot!!!_it_must_be_longer_than_bootargs_form_uboot!!!)"; + linux,initrd-start = <0x60000040>; + linux,initrd-end = <0x61000000>; + }; + + cpus { + #address-cells = <0x02>; + #size-cells = <0x00>; + + cpu@0 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x00 0x00>; + enable-method = "psci"; + }; + + cpu@1 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x00 0x100>; + enable-method = "psci"; + }; + + cpu@2 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x00 0x200>; + enable-method = "psci"; + }; + + cpu@3 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x00 0x300>; + enable-method = "psci"; + }; + + cpu@4 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x00 0x400>; + enable-method = "psci"; + }; + + cpu@5 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x00 0x500>; + enable-method = "psci"; + }; + + cpu@6 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x00 0x600>; + enable-method = "psci"; + }; + + cpu@7 { + compatible = "arm,cortex-a55"; + device_type = "cpu"; + reg = <0x00 0x700>; + enable-method = "psci"; + }; + }; + + memory { + device_type = "memory"; + reg = <0x00 0x44000000 0x01 0xf0000000>; + }; +}; diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/files/tf-a/0001-fix-compilation-errors-atf-asm.patch b/bsp/meta-hisilicon/recipes-kernel/linux/files/tf-a/0001-fix-compilation-errors-atf-asm.patch new file mode 100644 index 0000000000000000000000000000000000000000..21d83a1abbc2ee942df5c6d90b0879fd08471f0d --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/files/tf-a/0001-fix-compilation-errors-atf-asm.patch @@ -0,0 +1,13 @@ +--- a/bl31/aarch64/bl31_entrypoint.S 2024-07-31 08:43:14.814966080 +0000 ++++ b/bl31/aarch64/bl31_entrypoint.S 2024-07-31 08:56:12.780141461 +0000 +@@ -27,8 +27,8 @@ func bl31_entrypoint + * Stash the previous bootloader arguments x0 - x3 for later use. + * --------------------------------------------------------------- + */ +- ldr x0, =OS_SYS_CTRL_REG2 +- ldr x1, =OS_SYS_CTRL_REG4 ++ ldr x0, =0x11020308 ++ ldr x1, =0x11020310 + ldr x20, [x0] + ldr x21, [x1] + mov x22, #0 diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/hiedge1-tf-a.bb b/bsp/meta-hisilicon/recipes-kernel/linux/hiedge1-tf-a.bb new file mode 100644 index 0000000000000000000000000000000000000000..07d0b2fea34b93bceef5b31e083afca93ce7ca28 --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/hiedge1-tf-a.bb @@ -0,0 +1,44 @@ +SUMMARY = "ARM Trusted Firmware for hiedge1" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +BPN = "arm-trusted-firmware" +PV = "2.5" + +OPENEULER_LOCAL_NAME = "HiEdge-driver" + +# 0001-fix-compilation-errors-atf-asm.patch is a workaround to fix ld err: +# undefined reference to `OS_SYS_CTRL_REG2' +# undefined reference to `OS_SYS_CTRL_REG4' +SRC_URI = "file://HiEdge-driver/firmware/${BP}.tar.gz \ + file://HiEdge-driver/firmware/${BP}.patch \ + file://tf-a/0001-add-LDFLAGS-to-fix-compilation-errors.patch \ + file://tf-a/0001-fix-compilation-errors-atf-asm.patch \ + " + +SRC_URI[md5sum] = "23d7f30f393a20dcced3df1284ba0daa" +SRC_URI[sha256sum] = "f178c722374b0cdf2d7ca3ab986d494e02c49b4690dd8b1cf2d1c9a5388b374e" + +# override LDFLAGS to fix compilation error: "aarch64-openeuler-linux-gnu-ld.bfd: unrecognized option '-Wl,-O1'" +# add --no-warn-rwx-segments to avoid: warning: has a LOAD segment with RWX permissions +export LDFLAGS=" --no-warn-rwx-segments " + +# tf-a requires dtc native +DEPENDS += "dtc-native" + +# uImage as BL33 +DEPENDS += "virtual/kernel" + +EXTRA_OEMAKE="CROSS_COMPILE=${TARGET_PREFIX} " + +do_compile:append() { + oe_runmake PLAT=ss626v100 SPD=none BL33=${WORKDIR}/recipe-sysroot/linux-img/uImage-edge CCI_UP=0 DEBUG=0 BL33_SEC=0 fip + cp ${B}/build/ss626v100/release/fip.bin ${B}/build/ss626v100/release/fip-edge.bin +} + +do_install:append() { + install -d ${D}/boot/ + install ${B}/build/ss626v100/release/fip-edge.bin ${D}/boot/kernel-edge +} + +FILES:${PN} += " /boot/kernel-edge " diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/linux-hi3093-mpu.inc b/bsp/meta-hisilicon/recipes-kernel/linux/linux-hi3093-mpu.inc index 5ce52464d7bb97b4cc189b91931782e3673e28ee..97aed5bd1228238b12a9a7b958b27d2b5b77865a 100644 --- a/bsp/meta-hisilicon/recipes-kernel/linux/linux-hi3093-mpu.inc +++ b/bsp/meta-hisilicon/recipes-kernel/linux/linux-hi3093-mpu.inc @@ -6,11 +6,12 @@ DEPENDS += "u-boot-tools-native dtc-native" OPENEULER_REPO_NAMES = "kernel-5.10-tag3093 src-kernel-5.10-tag3093" +PV = "5.10-tag3093" +OPENEULER_KERNEL_CONFIG = "file://config/hi3093/defconfig" + # add prebuild tools to make uImage -SRC_URI = " \ - file://kernel-5.10-tag3093 \ +SRC_URI:append = " \ file://tools \ - file://config/hi3093/defconfig \ file://mpu_solution/src/non_real_time/adapter_for_hi3093/include/kbox \ file://mpu_solution/platform/securec/include \ file://mpu_solution/src/patches/openEuler \ @@ -19,8 +20,6 @@ SRC_URI = " \ file://dtbs/hi3093.dts \ " -S = "${WORKDIR}/kernel-5.10-tag3093" - # add patch tool to solve patch apply PATCHTOOL = "git" @@ -52,7 +51,8 @@ do_copy_headers() { # Due to the large number of patch hunks, # yocto's built-in patch mechanism has abnormal failure issues. # Here is a solution to avoid this issue - grep "Missing single sector read for large sector size" ${S}/drivers/mmc/core/block.c || patch -p1 < ${WORKDIR}/mpu_solution/src/patches/openEuler/kernel-22.03-lts-sp1-mmc.patch + grep "int disable_multi," ${S}/drivers/mmc/core/block.c || patch -p1 < ${WORKDIR}/mpu_solution/src/patches/openEuler/kernel-22.03-lts-sp3-mmc.patch + grep "#include " ${S}/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c || patch -p1 < ${WORKDIR}/mpu_solution/src/patches/openEuler/kernel-gpu-drm-hisilicon-hibmc.patch cd - cp -rf ${WORKDIR}/mpu_solution/platform/securec/include/* ${S}/include/linux mkdir -p ${S}/include/linux/kbox diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/linux-hi3093.inc b/bsp/meta-hisilicon/recipes-kernel/linux/linux-hi3093.inc index 0f15c5834761bb62643e202a85dfc2dbfe7f6923..c2709b8bcffab50247b1c7d7e345d4b0b2fe9ad6 100644 --- a/bsp/meta-hisilicon/recipes-kernel/linux/linux-hi3093.inc +++ b/bsp/meta-hisilicon/recipes-kernel/linux/linux-hi3093.inc @@ -3,9 +3,5 @@ OPENEULER_REPO_NAMES = "kernel-5.10-tag3093 src-kernel-5.10-tag3093" # add recipes-kernel path to find patch and defconfig FILESEXTRAPATHS:append := "${THISDIR}/files/:" -SRC_URI = " \ - file://kernel-5.10-tag3093 \ - file://config/hi3093/defconfig \ -" - -S = "${WORKDIR}/kernel-5.10-tag3093" +PV = "5.10-tag3093" +OPENEULER_KERNEL_CONFIG = "file://config/hi3093/defconfig" diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/linux-hiedge1.inc b/bsp/meta-hisilicon/recipes-kernel/linux/linux-hiedge1.inc new file mode 100644 index 0000000000000000000000000000000000000000..6c370ced7c0744781d4d422e55ba509e0547aaab --- /dev/null +++ b/bsp/meta-hisilicon/recipes-kernel/linux/linux-hiedge1.inc @@ -0,0 +1,51 @@ +# add recipes-kernel path to find patch and defconfig +FILESEXTRAPATHS:append := "${THISDIR}/files/:" + +# for mkimage +DEPENDS += "u-boot-tools-native dtc-native" + +OPENEULER_REPO_NAMES = "kernel-5.10-tag626 src-kernel-5.10-tag626 HiEdge-driver" + +PV = "5.10-tag626" + +SRC_URI:append = " \ + file://HiEdge-driver/linux/ss626v100-eulerkernel-d8e3bcbbecf.patch \ + file://dtbs/ss626v100-demb-emmc.dts \ +" + +# remove default patch +SRC_URI:remove = " \ + file://patches/${ARCH}/0001-arm64-add-zImage-support-for-arm64.patch \ +" + +# add BL31 +SRC_URI:append = " file://HiEdge-driver/firmware/arm-trusted-firmware-2.5.tar.gz " + +# no external defconfig +OPENEULER_KERNEL_CONFIG = "" +# use in-tree defconfig, the defconfig is in src tree +# after patches are unpatched +KBUILD_DEFCONFIG = "ss626v100_emmc_defconfig" + +# add method to do_compile task to produce bootable Image +do_compile:append(){ + mkimage -A arm64 -O linux -T kernel -C none -a 0x000000 -e 0x000000 -n "Linux-5.10.0" -d ${KERNEL_OUTPUT_DIR}/Image uImage-tmp + oe_runmake dtbs + dtc -I dts -O dtb ${WORKDIR}/dtbs/ss626v100-demb-emmc.dts -o ${WORKDIR}/ss626.dtb + cat uImage-tmp ${WORKDIR}/ss626.dtb > ${KERNEL_OUTPUT_DIR}/uImage-edge +} + +# uImage as bl33, we need to use it to build the fip.bin. So add uImage to SYSROOT_DIR +# Since sysroot_stage_all() is rewritten as empty in meta/classes/kernel.bbclass, +# we can't use "SYSROOT_DIRS" directly, here we write a SYSROOT_PREPROCESS_FUNCS to add uImage +SYSROOT_DIRS += "/linux-img" +FILES:${KERNEL_PACKAGE_NAME} += "/linux-img" +do_install:append() { + install -d ${D}/linux-img + install -m 0644 ${KERNEL_OUTPUT_DIR}/uImage-edge ${D}/linux-img/uImage-edge +} + +SYSROOT_PREPROCESS_FUNCS += "additional_populate_sysroot" +additional_populate_sysroot() { + sysroot_stage_dir ${D}/linux-img ${SYSROOT_DESTDIR}/linux-img +} diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/linux-hieulerpi1.inc b/bsp/meta-hisilicon/recipes-kernel/linux/linux-hieulerpi1.inc index 1c59495103f8de58fb88ff6b7d79c84ae965736e..dae21d6616080759db3986f659298cb6682d94af 100644 --- a/bsp/meta-hisilicon/recipes-kernel/linux/linux-hieulerpi1.inc +++ b/bsp/meta-hisilicon/recipes-kernel/linux/linux-hieulerpi1.inc @@ -1,5 +1,3 @@ -inherit kernel-yocto - # add recipes-kernel path to find patch and defconfig FILESEXTRAPATHS:append := "${THISDIR}/files/:" @@ -8,10 +6,11 @@ DEPENDS += "u-boot-tools-native dtc-native" OPENEULER_REPO_NAMES = "kernel-5.10-tag928 src-kernel-5.10-tag928 HiEuler-driver" -SRC_URI = "file://kernel-5.10-tag928 \ +PV = "5.10-tag928" + +SRC_URI:append = " \ file://HiEuler-driver/linux/5.10.0-153.28.0.patch \ file://dtbs/ss928-pi.dts \ - file://meta-data;type=kmeta;destsuffix=meta-data \ " # remove default patch @@ -22,40 +21,6 @@ SRC_URI:remove = " \ # add BL31 SRC_URI:append = " file://HiEuler-driver/firmware/trusted-firmware-a-2.2.tar.gz " -S = "${WORKDIR}/kernel-5.10-tag928" - -## handling for kernel meta data -# the original get_dirs_with_fragments will include OPENEULER_SP_DIR -# so that all the files under OPENEULER_SP_DIR will be in the file-checksums -# of do_kernel_metadata, which is not necessary -def get_dirs_with_metadata(d): - extrapaths = [] - extrafiles = [] - extrapathsvalue = (d.getVar("FILESEXTRAPATHS") or "") - - # Remove global openeuler src dir - openeuler_src_dir = d.getVar("OPENEULER_SP_DIR") - extrapathsvalue = extrapathsvalue.replace(openeuler_src_dir, "") - - # Remove default flag which was used for checking - extrapathsvalue = extrapathsvalue.replace("__default:", "") - extrapaths = extrapathsvalue.split(":") - - # add scc files - extrapaths += find_sccs(d) - - # add patches - extrapaths += find_patches(d, '') - for path in extrapaths: - if path and path + ":True" not in extrafiles: - extrafiles.append(path + ":" + str(os.path.exists(path))) - - return " ".join(extrafiles) - -# override the original get_dirs_with_fragments in kernel-yocto.bbclass -do_kernel_metadata[file-checksums] = "${@get_dirs_with_metadata(d)}" - - # no external defconfig OPENEULER_KERNEL_CONFIG = "" # use in-tree defconfig, the defconfig is in src tree @@ -84,4 +49,3 @@ SYSROOT_PREPROCESS_FUNCS += "additional_populate_sysroot" additional_populate_sysroot() { sysroot_stage_dir ${D}/linux-img ${SYSROOT_DESTDIR}/linux-img } - diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/linux-openeuler-rt.bbappend b/bsp/meta-hisilicon/recipes-kernel/linux/linux-openeuler-rt.bbappend index 04c690de1d3b465a7b5a5e79d8753cd1eb3c0500..dfe6cf7263bc7e2ac1a9b961f346a185005c3fbc 100644 --- a/bsp/meta-hisilicon/recipes-kernel/linux/linux-openeuler-rt.bbappend +++ b/bsp/meta-hisilicon/recipes-kernel/linux/linux-openeuler-rt.bbappend @@ -3,12 +3,9 @@ COMPATIBLE_MACHINE = "hi3093|hieulerpi1" require recipes-kernel/linux/${@bb.utils.contains('DISTRO_FEATURES', 'mpu_solution', 'linux-hi3093-mpu.inc', 'linux-${MACHINE}.inc', d)} -SRC_URI:remove = " \ - file://src-kernel-5.10/0001-apply-preempt-RT-patch.patch \ - file://src-kernel-5.10/0001-modify-openeuler_defconfig-for-rt62.patch \ +SRC_URI:remove:hieulerpi1 = " \ + file://src-kernel-${PV}/0001-apply-preempt-RT-patch.patch \ " - -SRC_URI:append:hieulerpi1 = " \ +SRC_URI:prepend:hieulerpi1 = " \ file://patch/0001-apply-preempt-RT-patch-b88a0de01.patch \ - file://src-kernel-5.10-tag928/0001-modify-openeuler_defconfig-for-rt62.patch \ " diff --git a/bsp/meta-hisilicon/recipes-kernel/linux/linux-openeuler.bbappend b/bsp/meta-hisilicon/recipes-kernel/linux/linux-openeuler.bbappend index e79121ce137fd1ad2679d73186119979635861c8..87721b69fb8d8051b42c106237fc941e29c67b9f 100644 --- a/bsp/meta-hisilicon/recipes-kernel/linux/linux-openeuler.bbappend +++ b/bsp/meta-hisilicon/recipes-kernel/linux/linux-openeuler.bbappend @@ -1,4 +1,4 @@ # add COMPATIBLE_MACHINE -COMPATIBLE_MACHINE = "hi3093|hieulerpi1" +COMPATIBLE_MACHINE = "hi3093|hieulerpi1|hiedge1" require recipes-kernel/linux/${@bb.utils.contains('DISTRO_FEATURES', 'mpu_solution', 'linux-hi3093-mpu.inc', 'linux-${MACHINE}.inc', d)} diff --git a/bsp/meta-kunpeng/conf/layer.conf b/bsp/meta-kunpeng/conf/layer.conf new file mode 100644 index 0000000000000000000000000000000000000000..c34f1774c0528b35444bbb1bcfa7ed337990dd66 --- /dev/null +++ b/bsp/meta-kunpeng/conf/layer.conf @@ -0,0 +1,14 @@ +# We have a conf and classes directory, add to BBPATH +BBPATH .= ":${LAYERDIR}" + +# We have recipes-* directories, add to BBFILES +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "meta-kunpeng" +BBFILE_PATTERN_meta-kunpeng := "^${LAYERDIR}/" +BBFILE_PRIORITY_meta-kunpeng = "7" + +LAYERVERSION_meta-kunpeng = "1" +LAYERDEPENDS_meta-kunpeng = "core" +LAYERSERIES_COMPAT_meta-kunpeng = "kirkstone" diff --git a/bsp/meta-kunpeng/conf/machine/kp920.conf b/bsp/meta-kunpeng/conf/machine/kp920.conf new file mode 100644 index 0000000000000000000000000000000000000000..705459ecc1e33513b48672b20b26e6c3dc4494b2 --- /dev/null +++ b/bsp/meta-kunpeng/conf/machine/kp920.conf @@ -0,0 +1,41 @@ +require conf/machine/include/arm/arch-armv8a.inc + +MACHINE_FEATURES += "efi pci vc4graphics" +MACHINEOVERRIDES =. "kp920:march64le:" +DEFAULTTUNE = "aarch64" + +require conf/multilib.conf +# currently, don't support 32 bit libs +MULTILIBS = "" + +ROOTFS_PACKAGE_ARCH = "aarch64" + +# set IMAGETYPE and dtb +KERNEL_IMAGETYPE = "zImage" +# choose dtb file +KERNEL_DEVICETREE = "" +ENABLE_UART = "1" +# serial port enabled in kp920 +CMDLINE_SERIAL = "ttyAMA0,115200" +SERIAL_CONSOLES = "115200;ttyAMA0" + +# arm and arm64 both support -mlittle-endian so no +# need to consider compat32. +TUNE_CCARGS .= " -mlittle-endian" +IMAGE_INSTALL:append = " kernel-modules" + +# the final sd image is in iso format +IMAGE_FSTYPES += "iso" + +# auto load module during startup +KERNEL_MODULE_AUTOLOAD = "" +USE_VT ?= "1" + +# set MCS_FEATURES +# kp920 only supports the "openamp" mechanism, +# and client os only supports uniproton +MCS_FEATURES = "openamp" +MCS_FEATURES := "${@bb.utils.contains('DISTRO_FEATURES', 'mcs', '${MCS_FEATURES}', '', d)}" + +# auto load module during startup +KERNEL_MODULE_AUTOLOAD = " ${@bb.utils.contains('MCS_FEATURES', 'openamp', 'mcs_km', '', d)} " diff --git a/bsp/meta-kunpeng/recipes-core/initrdscripts/initramfs-module-install-efi_1.0.bbappend b/bsp/meta-kunpeng/recipes-core/initrdscripts/initramfs-module-install-efi_1.0.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..68bffa6b9635a35c686bf7a1fcc20345ff75efe3 --- /dev/null +++ b/bsp/meta-kunpeng/recipes-core/initrdscripts/initramfs-module-install-efi_1.0.bbappend @@ -0,0 +1,6 @@ +do_install:append() { + if [ ! -d "/boot/EFI/euleros" ]; then + sed -i '/umount \/boot/i\cp -rf /boot/EFI/BOOT /boot/EFI/euleros;cp /boot/EFI/euleros/bootaa64.efi /boot/EFI/euleros/grubaa64.efi' ${WORKDIR}/init-install-efi-openeuler.sh + sed -i '/umount \/boot/i\cp -rf /boot/EFI/BOOT /boot/EFI/euleros;cp /boot/EFI/euleros/bootaa64.efi /boot/EFI/euleros/grubaa64.efi' ${D}/init.d/install-efi.sh + fi +} diff --git a/bsp/meta-kunpeng/recipes-kernel/linux/files/config/kp920/defconfig b/bsp/meta-kunpeng/recipes-kernel/linux/files/config/kp920/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..13c34ef0215ab810b5bff1dd231e5817eef5632e --- /dev/null +++ b/bsp/meta-kunpeng/recipes-kernel/linux/files/config/kp920/defconfig @@ -0,0 +1,4913 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 5.10.0 Kernel Configuration +# +CONFIG_CC_VERSION_TEXT="aarch64-openeuler-linux-gnu-gcc (crosstool-NG 1.26.0) 12.3.1" +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=120301 +CONFIG_LD_VERSION=241000000 +CONFIG_CLANG_VERSION=0 +CONFIG_AS_IS_GNU=y +CONFIG_AS_VERSION=24100 +CONFIG_LLD_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y +CONFIG_CC_HAS_ASM_GOTO=y +CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y +CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y +CONFIG_CC_HAS_ASM_INLINE=y +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_TABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="-openeuler" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_BUILD_SALT="" +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_LZ4=y +CONFIG_HAVE_KERNEL_ZSTD=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_XZ is not set +# CONFIG_KERNEL_LZO is not set +# CONFIG_KERNEL_LZ4 is not set +# CONFIG_KERNEL_ZSTD is not set +CONFIG_DEFAULT_INIT="" +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_USELIB is not set +CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_IRQ_IPI=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +# CONFIG_NO_HZ_IDLE is not set +CONFIG_NO_HZ_FULL=y +CONFIG_CONTEXT_TRACKING=y +# CONFIG_CONTEXT_TRACKING_FORCE is not set +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +# CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE is not set +# end of Timers subsystem + +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_PREEMPT_COUNT=y + +# +# CPU/Task time and stats accounting +# +CONFIG_VIRT_CPU_ACCOUNTING=y +CONFIG_VIRT_CPU_ACCOUNTING_GEN=y +# CONFIG_IRQ_TIME_ACCOUNTING is not set +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +CONFIG_RCU_EXPERT=y +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_RCU_FANOUT=64 +CONFIG_RCU_FANOUT_LEAF=16 +# CONFIG_RCU_FAST_NO_HZ is not set +CONFIG_RCU_NOCB_CPU=y +# CONFIG_TASKS_TRACE_RCU_READ_MB is not set +# end of RCU Subsystem + +# CONFIG_IKCONFIG is not set +# CONFIG_IKHEADERS is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=12 +CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y +CONFIG_CC_HAS_INT128=y +CONFIG_ARCH_SUPPORTS_INT128=y +# CONFIG_NUMA_BALANCING is not set +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +CONFIG_MEMCG_SWAP=y +CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_MEMFS_INFO is not set +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_WRITEBACK=y +# CONFIG_CGROUP_V1_WRITEBACK is not set +CONFIG_CGROUP_SCHED=y +# CONFIG_QOS_SCHED is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +# CONFIG_RT_GROUP_SCHED is not set +# CONFIG_QOS_SCHED_DYNAMIC_AFFINITY is not set +# CONFIG_CGROUP_PIDS is not set +# CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_FREEZER is not set +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +CONFIG_CGROUP_DEBUG=y +# CONFIG_CGROUP_FILES is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +# CONFIG_TIME_NS is not set +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_STEAL is not set +# CONFIG_CHECKPOINT_RESTORE is not set +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +# CONFIG_RD_LZO is not set +# CONFIG_RD_LZ4 is not set +# CONFIG_RD_ZSTD is not set +CONFIG_INITRAMFS_FILE_METADATA="" +# CONFIG_BOOT_CONFIG is not set +# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_LD_ORPHAN_WARN=y +CONFIG_SYSCTL=y +CONFIG_HAVE_UID16=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_UID16=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_HAVE_FUTEX_CMPXCHG=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +# CONFIG_IO_URING is not set +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y +# CONFIG_USERFAULTFD is not set +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_KCMP=y +# CONFIG_RSEQ is not set +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +CONFIG_DEBUG_PERF_USE_VMALLOC=y +# end of Kernel Performance Events And Counters + +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_MEMCG_SYSFS_ON is not set +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_SLAB_MERGE_DEFAULT is not set +CONFIG_SLAB_FREELIST_RANDOM=y +CONFIG_SLAB_FREELIST_HARDENED=y +CONFIG_SHUFFLE_PAGE_ALLOCATOR=y +CONFIG_SLUB_CPU_PARTIAL=y +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +CONFIG_KABI_RESERVE=y +CONFIG_KABI_SIZE_ALIGN_CHECKS=y +# end of General setup + +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_PTE_SHIFT=4 +CONFIG_ARM64_CONT_PMD_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +# CONFIG_ZONE_DMA is not set +CONFIG_ZONE_DMA32=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_SMP=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_HAS_CPU_RELAX=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AGILEX is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_SPARX5 is not set +# CONFIG_ARCH_K3 is not set +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_LG1K is not set +CONFIG_ARCH_HISI=y +# CONFIG_ARCH_KEEMBAY is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_PHYTIUM is not set +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_S32 is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_SYNQUACER is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_VISCONTI is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQMP is not set +# end of Platform selection + +CONFIG_HAVE_LIVEPATCH_WO_FTRACE=y + +# +# Enable Livepatch +# +CONFIG_LIVEPATCH=y +CONFIG_LIVEPATCH_WO_FTRACE=y +CONFIG_LIVEPATCH_STOP_MACHINE_CONSISTENCY=y +# CONFIG_LIVEPATCH_STACK is not set +CONFIG_LIVEPATCH_RESTRICT_KPROBE=y +# end of Enable Livepatch + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +CONFIG_ARM64_ERRATUM_832075=y +CONFIG_ARM64_ERRATUM_1742098=y +CONFIG_ARM64_ERRATUM_845719=y +# CONFIG_ARM64_ERRATUM_843419 is not set +CONFIG_ARM64_ERRATUM_1024718=y +CONFIG_ARM64_ERRATUM_1418040=y +CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y +CONFIG_ARM64_ERRATUM_1165522=y +CONFIG_ARM64_ERRATUM_1319367=y +CONFIG_ARM64_ERRATUM_1530923=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_ERRATUM_1286807=y +CONFIG_ARM64_ERRATUM_1463225=y +CONFIG_ARM64_ERRATUM_1542419=y +CONFIG_ARM64_ERRATUM_1508412=y +# CONFIG_CAVIUM_ERRATUM_22375 is not set +CONFIG_CAVIUM_ERRATUM_23144=y +# CONFIG_CAVIUM_ERRATUM_23154 is not set +# CONFIG_CAVIUM_ERRATUM_27456 is not set +# CONFIG_CAVIUM_ERRATUM_30115 is not set +# CONFIG_CAVIUM_TX2_ERRATUM_219 is not set +# CONFIG_FUJITSU_ERRATUM_010001 is not set +CONFIG_HISILICON_ERRATUM_161600802=y +# CONFIG_HISILICON_ERRATUM_1980005 is not set +CONFIG_HISILICON_ERRATUM_162100801=y +CONFIG_HISILICON_ERRATUM_162100125=y +# CONFIG_HISILICON_ERRATUM_162102203 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set +# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y +CONFIG_HISILICON_ERRATUM_HIP08_RU_PREFETCH=y +# CONFIG_HISILICON_HIP08_RU_PREFETCH_DEFAULT_OFF is not set +# end of ARM errata workarounds via the alternatives framework + +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +CONFIG_ARM64_VA_BITS_39=y +# CONFIG_ARM64_VA_BITS_48 is not set +CONFIG_ARM64_VA_BITS=39 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_SCHED_MC is not set +# CONFIG_SCHED_CLUSTER is not set +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=64 +CONFIG_HOTPLUG_CPU=y +# CONFIG_ARM64_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_MPAM is not set +CONFIG_NUMA=y +CONFIG_NODES_SHIFT=4 +CONFIG_USE_PERCPU_NUMA_NODE_ID=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +# CONFIG_HZ_100 is not set +# CONFIG_HZ_250 is not set +# CONFIG_HZ_300 is not set +CONFIG_HZ_1000=y +CONFIG_HZ=1000 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_LLC_128_LINE_SIZE=y +CONFIG_ARCH_HAS_FILTER_PGPROT=y +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_CC_HAVE_SHADOW_CALL_STACK=y +# CONFIG_PARAVIRT is not set +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +CONFIG_KEXEC=y +CONFIG_KEXEC_FILE=y +# CONFIG_KEXEC_SIG is not set +CONFIG_CRASH_DUMP=y +# CONFIG_ARM64_CPU_PARK is not set +# CONFIG_XEN is not set +CONFIG_FORCE_MAX_ZONEORDER=11 +# CONFIG_UNMAP_KERNEL_AT_EL0 is not set +CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y +# CONFIG_RODATA_FULL_DEFAULT_ENABLED is not set +# CONFIG_ARM64_PMEM_LEGACY is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set +# CONFIG_ARM64_TAGGED_ADDR_ABI is not set +CONFIG_AARCH32_EL0=y +CONFIG_KUSER_HELPERS=y +# CONFIG_ARMV8_DEPRECATED is not set + +# +# ARMv8.1 architectural features +# +# CONFIG_ARM64_HW_AFDBM is not set +# CONFIG_ARM64_PAN is not set +CONFIG_AS_HAS_LSE_ATOMICS=y +# CONFIG_ARM64_USE_LSE_ATOMICS is not set +# CONFIG_ARM64_VHE is not set +# end of ARMv8.1 architectural features + +# +# ARMv8.2 architectural features +# +# CONFIG_ARM64_PMEM is not set +# CONFIG_ARM64_RAS_EXTN is not set +# CONFIG_ARM64_CNP is not set +# CONFIG_ARM64_PBHA is not set +# end of ARMv8.2 architectural features + +# +# ARMv8.3 architectural features +# +CONFIG_ARM64_PTR_AUTH=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y +CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y +CONFIG_AS_HAS_PAC=y +CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y +CONFIG_AS_HAS_LDAPR=y +# end of ARMv8.3 architectural features + +# +# ARMv8.4 architectural features +# +# CONFIG_ARM64_AMU_EXTN is not set +CONFIG_AS_HAS_ARMV8_4=y +CONFIG_ARM64_TLB_RANGE=y +# end of ARMv8.4 architectural features + +# +# ARMv8.5 architectural features +# +# CONFIG_ARM64_BTI is not set +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y +CONFIG_ARM64_E0PD=y +# CONFIG_ARCH_RANDOM is not set +CONFIG_ARM64_AS_HAS_MTE=y +# end of ARMv8.5 architectural features + +# +# ARMv8.6 architectural features +# +CONFIG_ARM64_TWED=y +# end of ARMv8.6 architectural features + +# +# ARMv8.7 architectural features +# +# end of ARMv8.7 architectural features + +CONFIG_ARM64_SVE=y +CONFIG_ARM64_SME=y +# CONFIG_ARM64_MODULE_PLTS is not set +# CONFIG_ARM64_PSEUDO_NMI is not set +# CONFIG_RELOCATABLE is not set +# CONFIG_RANDOMIZE_BASE is not set +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_STACKPROTECTOR_PER_TASK=y +# CONFIG_ARCH_CUSTOM_NUMA_DISTANCE is not set +# CONFIG_ASCEND_FEATURES is not set +# end of Kernel Features + +# +# Boot options +# +# CONFIG_ARM64_ACPI_PARKING_PROTOCOL is not set +CONFIG_CMDLINE="" +CONFIG_EFI_STUB=y +CONFIG_EFI=y +CONFIG_DMI=y +# end of Boot options + +CONFIG_COMPAT=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +# CONFIG_HIBERNATION is not set +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_PM_SLEEP_SMP_NONZERO_CPU=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_SUSPEND_NONZERO_CPU=y +# end of Power management options + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set +# CONFIG_CPU_IDLE_GOV_HALTPOLL is not set + +# +# ARM CPU Idle Drivers +# +# CONFIG_ARM_CPUIDLE is not set +# CONFIG_ARM_PSCI_CPUIDLE is not set +# end of ARM CPU Idle Drivers + +CONFIG_HALTPOLL_CPUIDLE=y +# end of CPU Idle + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set +# end of CPU Frequency scaling +# end of CPU Power Management + +# +# Firmware Drivers +# +# CONFIG_ARM_SCMI_PROTOCOL is not set +# CONFIG_FIRMWARE_MEMMAP is not set +# CONFIG_DMIID is not set +# CONFIG_DMI_SYSFS is not set +# CONFIG_ISCSI_IBFT is not set +# CONFIG_FW_CFG_SYSFS is not set +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +CONFIG_EFI_ESRT=y +# CONFIG_EFI_FAKE_MEMMAP is not set +CONFIG_EFI_PARAMS_FROM_FDT=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_GENERIC_STUB=y +CONFIG_EFI_ZBOOT=y +# CONFIG_EFI_ZBOOT_SIGNED is not set +CONFIG_EFI_ARMSTUB_DTB_LOADER=y +# CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER is not set +# CONFIG_EFI_BOOTLOADER_CONTROL is not set +# CONFIG_EFI_CAPSULE_LOADER is not set +# CONFIG_EFI_TEST is not set +# CONFIG_RESET_ATTACK_MITIGATION is not set +# CONFIG_EFI_DISABLE_PCI_DMA is not set +# end of EFI (Extensible Firmware Interface) Support + +CONFIG_EFI_EARLYCON=y +CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y +# CONFIG_ARM_SMCCC_SOC_ID is not set + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +CONFIG_ARCH_SUPPORTS_ACPI=y +CONFIG_ACPI=y +CONFIG_ACPI_GENERIC_GSI=y +CONFIG_ACPI_CCA_REQUIRED=y +# CONFIG_ACPI_DEBUGGER is not set +CONFIG_ACPI_SPCR_TABLE=y +# CONFIG_ACPI_EC_DEBUGFS is not set +CONFIG_ACPI_AC=y +CONFIG_ACPI_BATTERY=y +CONFIG_ACPI_BUTTON=y +CONFIG_ACPI_FAN=y +# CONFIG_ACPI_TAD is not set +# CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_PROCESSOR_IDLE=y +CONFIG_ACPI_MCFG=y +CONFIG_ACPI_PROCESSOR=y +CONFIG_ACPI_HOTPLUG_CPU=y +CONFIG_ACPI_THERMAL=y +CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y +CONFIG_ACPI_TABLE_UPGRADE=y +# CONFIG_ACPI_DEBUG is not set +# CONFIG_ACPI_PCI_SLOT is not set +CONFIG_ACPI_CONTAINER=y +# CONFIG_ACPI_HOTPLUG_MEMORY is not set +# CONFIG_ACPI_HED is not set +# CONFIG_ACPI_CUSTOM_METHOD is not set +# CONFIG_ACPI_BGRT is not set +CONFIG_ACPI_REDUCED_HARDWARE_ONLY=y +CONFIG_ACPI_NUMA=y +# CONFIG_ACPI_HMAT is not set +CONFIG_HAVE_ACPI_APEI=y +# CONFIG_ACPI_APEI is not set +# CONFIG_ACPI_CONFIGFS is not set +CONFIG_ACPI_IORT=y +CONFIG_ACPI_GTDT=y +CONFIG_ACPI_PPTT=y +# CONFIG_PMIC_OPREGION is not set +CONFIG_VIRTUALIZATION=y +# CONFIG_KVM is not set +# CONFIG_ARM64_CRYPTO is not set +CONFIG_SELFDECOMPRESS_ZIMAGE=y + +# +# zImage support selfdecompre features +# +# CONFIG_SELFDECOMPRESS_ZIMAGE_GZIP is not set +CONFIG_SELFDECOMPRESS_ZIMAGE_XZ=y +# CONFIG_SELFDECOMPRESS_ZIMAGE_LZ4 is not set +# CONFIG_SELFDECOMPRESS_ZIMAGE_LZMA is not set +# CONFIG_SELFDECOMPRESS_ZIMAGE_LZO is not set +# CONFIG_ZIMAGE_2M_TEXT_OFFSET is not set +# end of zImage support selfdecompre features + +# +# General architecture-dependent options +# +CONFIG_CRASH_CORE=y +CONFIG_KEXEC_CORE=y +# CONFIG_QUICK_KEXEC is not set +CONFIG_ARCH_WANT_RESERVE_CRASH_KERNEL=y +CONFIG_KPROBES=y +CONFIG_JUMP_LABEL=y +# CONFIG_STATIC_KEYS_SELFTEST is not set +CONFIG_UPROBES=y +# CONFIG_UPROBES_SUPPORT_PC_ALTER is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_KRETPROBES=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_KEEPINITRD=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_MMU_GATHER_TABLE_FREE=y +CONFIG_MMU_GATHER_RCU_TABLE_FREE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +# CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_ARCH_STACKLEAK=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_ARCH_SUPPORTS_SHADOW_CALL_STACK=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOVE_PUD=y +CONFIG_HAVE_MOVE_PMD=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_ARCH_HUGE_VMALLOC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_COMPAT_OLD_SIGACTION=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y +CONFIG_RANDOMIZE_KSTACK_OFFSET=y +# CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT is not set +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_HAVE_ARCH_COMPILER_H=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y +CONFIG_ARCH_USE_MEMREMAP_PROT=y +# CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_GCC_PLUGINS=y +# CONFIG_GCC_PLUGIN_CYC_COMPLEXITY is not set +# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set +# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +CONFIG_ASM_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_INTEGRITY_T10=y +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_DEV_THROTTLING is not set +# CONFIG_BLK_CMDLINE_PARSER is not set +# CONFIG_BLK_WBT is not set +# CONFIG_BLK_CGROUP_IOLATENCY is not set +# CONFIG_BLK_CGROUP_IOCOST is not set +# CONFIG_BLK_DEBUG_FS is not set +# CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set +# CONFIG_BLK_DEV_DUMPINFO is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_EFI_PARTITION=y +# end of Partition Types + +CONFIG_BLOCK_COMPAT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=m +# CONFIG_MQ_IOSCHED_KYBER is not set +# CONFIG_IOSCHED_BFQ is not set +# end of IO Schedulers + +CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK=y +CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_READ_LOCK=y +CONFIG_ARCH_INLINE_READ_LOCK_BH=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_READ_UNLOCK=y +CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_WRITE_LOCK=y +CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_SPIN_TRYLOCK=y +CONFIG_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_INLINE_SPIN_LOCK=y +CONFIG_INLINE_SPIN_LOCK_BH=y +CONFIG_INLINE_SPIN_LOCK_IRQ=y +CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_INLINE_SPIN_UNLOCK_BH=y +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_READ_LOCK=y +CONFIG_INLINE_READ_LOCK_BH=y +CONFIG_INLINE_READ_LOCK_IRQ=y +CONFIG_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_INLINE_READ_UNLOCK=y +CONFIG_INLINE_READ_UNLOCK_BH=y +CONFIG_INLINE_READ_UNLOCK_IRQ=y +CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_WRITE_LOCK=y +CONFIG_INLINE_WRITE_LOCK_BH=y +CONFIG_INLINE_WRITE_LOCK_IRQ=y +CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_INLINE_WRITE_UNLOCK=y +CONFIG_INLINE_WRITE_UNLOCK_BH=y +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_HAVE_ELF_PROT=y +CONFIG_ARCH_USE_GNU_PROPERTY=y +CONFIG_ELFCORE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_NEED_MULTIPLE_NODES=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +# CONFIG_SPARSEMEM_VMEMMAP is not set +CONFIG_HAVE_FAST_GUP=y +CONFIG_HOLES_IN_ZONE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_NUMA_KEEP_MEMINFO=y +CONFIG_MEMORY_ISOLATION=y +# CONFIG_COHERENT_DEVICE is not set +CONFIG_MEMORY_HOTPLUG=y +CONFIG_MEMORY_HOTPLUG_SPARSE=y +# CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE is not set +# CONFIG_MEMORY_HOTREMOVE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_COMPACTION=y +# CONFIG_PAGE_REPORTING is not set +CONFIG_MIGRATION=y +# CONFIG_HUGE_VMALLOC_DEFAULT_ENABLED is not set +CONFIG_CONTIG_ALLOC=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_MMU_NOTIFIER=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +CONFIG_MEMORY_FAILURE=y +# CONFIG_HWPOISON_INJECT is not set +# CONFIG_TRANSPARENT_HUGEPAGE is not set +CONFIG_ARCH_WANTS_THP_SWAP=y +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +CONFIG_MEMCG_QOS=y +# CONFIG_MEMCG_SWAP_QOS is not set +# CONFIG_ETMEM is not set +# CONFIG_PAGE_CACHE_LIMIT is not set +# CONFIG_CMA is not set +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +CONFIG_ZSMALLOC=m +# CONFIG_ZSMALLOC_STAT is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_PTE_DEVMAP=y +CONFIG_HMM_MIRROR=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +# CONFIG_PIN_MEMORY is not set +# CONFIG_MEMORY_RELIABLE is not set +# CONFIG_CLEAR_FREELIST_PAGE is not set +# CONFIG_EXTEND_HUGEPAGE_MAPPING is not set + +# +# Data Access Monitoring +# +# CONFIG_DAMON is not set +# end of Data Access Monitoring +# end of Memory Management options + +CONFIG_NET=y +CONFIG_COMPAT_NETLINK_MESSAGES=y +CONFIG_NET_INGRESS=y +CONFIG_SKB_EXTENSIONS=y + +# +# Networking options +# +CONFIG_PACKET=m +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +CONFIG_XFRM=y +CONFIG_XFRM_ALGO=m +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_INTERFACE is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_NET_KEY=m +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +# CONFIG_IP_FIB_TRIE_STATS is not set +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +# CONFIG_IP_PNP is not set +CONFIG_NET_IPIP=m +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=m +# CONFIG_IP_MROUTE is not set +CONFIG_SYN_COOKIES=y +# CONFIG_NET_IPVTI is not set +CONFIG_NET_UDP_TUNNEL=m +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +CONFIG_INET_TABLE_PERTURB_ORDER=16 +CONFIG_INET_TUNNEL=m +CONFIG_INET_DIAG=m +CONFIG_INET_TCP_DIAG=m +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_IPV6_VTI is not set +# CONFIG_IPV6_SIT is not set +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_IPV6_RPL_LWTUNNEL is not set +CONFIG_NETLABEL=y +# CONFIG_MPTCP is not set +CONFIG_NETWORK_SECMARK=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NETFILTER_NETLINK_OSF is not set +CONFIG_NF_CONNTRACK=m +# CONFIG_NF_LOG_NETDEV is not set +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_SECMARK is not set +# CONFIG_NF_CONNTRACK_ZONES is not set +CONFIG_NF_CONNTRACK_PROCFS=y +# CONFIG_NF_CONNTRACK_EVENTS is not set +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CONNTRACK_LABELS is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +# CONFIG_NF_CONNTRACK_FTP is not set +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +CONFIG_NF_NAT=m +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=m + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LOG is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=m +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +# CONFIG_NETFILTER_XT_TARGET_MASQUERADE is not set +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_SECMARK is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set + +# +# Xtables matches +# +# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +# CONFIG_NETFILTER_XT_MATCH_STATE is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# end of Core Netfilter Configuration + +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +# CONFIG_NF_SOCKET_IPV4 is not set +# CONFIG_NF_TPROXY_IPV4 is not set +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +# CONFIG_NF_LOG_IPV4 is not set +CONFIG_NF_REJECT_IPV4=m +CONFIG_IP_NF_IPTABLES=m +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=m +# CONFIG_IP_NF_TARGET_MASQUERADE is not set +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +# CONFIG_IP_NF_MANGLE is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_SECURITY is not set +# CONFIG_IP_NF_ARPTABLES is not set +# end of IP: Netfilter Configuration + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_SOCKET_IPV6 is not set +# CONFIG_NF_TPROXY_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=m +# CONFIG_NF_LOG_IPV6 is not set +CONFIG_IP6_NF_IPTABLES=m +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_EUI64 is not set +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_MH is not set +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_MATCH_SRH is not set +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +# CONFIG_IP6_NF_TARGET_SYNPROXY is not set +# CONFIG_IP6_NF_MANGLE is not set +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IP6_NF_SECURITY is not set +CONFIG_IP6_NF_NAT=m +# CONFIG_IP6_NF_TARGET_MASQUERADE is not set +# CONFIG_IP6_NF_TARGET_NPT is not set +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=m +# CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +CONFIG_TIPC=m +CONFIG_TIPC_MEDIA_UDP=y +# CONFIG_TIPC_CRYPTO is not set +# CONFIG_TIPC_DIAG is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_GARP=m +# CONFIG_BRIDGE is not set +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +# CONFIG_VLAN_8021Q_MVRP is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +CONFIG_DCB=y +CONFIG_DNS_RESOLVER=m +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_L3_MASTER_DEV is not set +# CONFIG_QRTR is not set +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +# CONFIG_BPF_JIT is not set +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_DROP_MONITOR is not set +# end of Network testing +# end of Networking options + +# CONFIG_HAMRADIO is not set +CONFIG_CAN=m +CONFIG_CAN_RAW=m +CONFIG_CAN_BCM=m +CONFIG_CAN_GW=m +# CONFIG_CAN_J1939 is not set +# CONFIG_CAN_ISOTP is not set + +# +# CAN Device Drivers +# +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_VXCAN is not set +# CONFIG_CAN_SLCAN is not set +CONFIG_CAN_DEV=m +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_FLEXCAN is not set +# CONFIG_CAN_GRCAN is not set +# CONFIG_CAN_KVASER_PCIEFD is not set +# CONFIG_CAN_XILINXCAN is not set +# CONFIG_CAN_C_CAN is not set +# CONFIG_CAN_CC770 is not set +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_PEAK_PCIEFD is not set +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_SOFTING is not set + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set +# CONFIG_CAN_MCP251XFD is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +# CONFIG_CAN_8DEV_USB is not set +# CONFIG_CAN_EMS_USB is not set +# CONFIG_CAN_ESD_USB2 is not set +# CONFIG_CAN_GS_USB is not set +# CONFIG_CAN_KVASER_USB is not set +# CONFIG_CAN_MCBA_USB is not set +# CONFIG_CAN_PEAK_USB is not set +# CONFIG_CAN_UCAN is not set +# end of CAN USB interfaces + +# CONFIG_CAN_DEBUG_DEVICES is not set +# end of CAN Device Drivers + +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_FIB_RULES=y +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_SPY=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +CONFIG_CFG80211_CERTIFICATION_ONUS=y +# CONFIG_CFG80211_REQUIRE_SIGNED_REGDB is not set +# CONFIG_CFG80211_REG_CELLULAR_HINTS is not set +# CONFIG_CFG80211_REG_RELAX_NO_IR is not set +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +# CONFIG_CFG80211_CRDA_SUPPORT is not set +CONFIG_CFG80211_WEXT=y +CONFIG_LIB80211=m +CONFIG_LIB80211_CRYPT_WEP=m +CONFIG_LIB80211_CRYPT_CCMP=m +CONFIG_LIB80211_CRYPT_TKIP=m +# CONFIG_LIB80211_DEBUG is not set +# CONFIG_MAC80211 is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +CONFIG_NET_9P=y +CONFIG_NET_9P_VIRTIO=y +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +CONFIG_NET_DEVLINK=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_POOL_STATS=y +CONFIG_FAILOVER=y +# CONFIG_ETHTOOL_NETLINK is not set +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +CONFIG_HAVE_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCIEPORTBUS=y +CONFIG_HOTPLUG_PCI_PCIE=y +CONFIG_PCIEAER=y +# CONFIG_PCIEAER_INJECT is not set +# CONFIG_PCIE_ECRC is not set +CONFIG_PCIEASPM=y +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_PCIE_DPC is not set +# CONFIG_PCIE_PTM is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_PF_STUB is not set +CONFIG_PCI_ATS=y +CONFIG_PCI_ECAM=y +CONFIG_PCI_IOV=y +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +CONFIG_PCI_LABEL=y +# CONFIG_PCIE_BUS_TUNE_OFF is not set +CONFIG_PCIE_BUS_DEFAULT=y +# CONFIG_PCIE_BUS_SAFE is not set +# CONFIG_PCIE_BUS_PERFORMANCE is not set +# CONFIG_PCIE_BUS_PEER2PEER is not set +CONFIG_HOTPLUG_PCI=y +# CONFIG_HOTPLUG_PCI_ACPI is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set + +# +# PCI controller drivers +# +# CONFIG_PCI_FTPCI100 is not set +CONFIG_PCI_HOST_COMMON=y +CONFIG_PCI_HOST_GENERIC=y +# CONFIG_PCIE_XILINX is not set +# CONFIG_PCI_XGENE is not set +# CONFIG_PCIE_ALTERA is not set +# CONFIG_PCI_HOST_THUNDER_PEM is not set +# CONFIG_PCI_HOST_THUNDER_ECAM is not set + +# +# DesignWare PCI Core Support +# +# CONFIG_PCIE_DW_PLAT_HOST is not set +# CONFIG_PCI_HISI is not set +# CONFIG_PCIE_KIRIN is not set +# CONFIG_PCIE_HISI_STB is not set +# CONFIG_PCI_MESON is not set +# CONFIG_PCIE_AL is not set +# end of DesignWare PCI Core Support + +# +# Mobiveil PCIe Core Support +# +# CONFIG_PCIE_LAYERSCAPE_GEN4 is not set +# end of Mobiveil PCIe Core Support + +# +# Cadence PCIe controllers support +# +# CONFIG_PCIE_CADENCE_PLAT_HOST is not set +# CONFIG_PCI_J721E_HOST is not set +# end of Cadence PCIe controllers support +# end of PCI controller drivers + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +# CONFIG_PCCARD is not set +# CONFIG_RAPIDIO is not set + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +# CONFIG_PREVENT_FIRMWARE_BUILD is not set + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER is not set +# CONFIG_FW_LOADER_COMPRESS is not set +# CONFIG_FW_CACHE is not set +# end of Firmware loader + +CONFIG_ALLOW_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_GENERIC_ARCH_TOPOLOGY=y +# end of Generic Driver Options + +# +# Bus devices +# +CONFIG_ARM_CCI=y +CONFIG_ARM_CCI400_COMMON=y +# CONFIG_BRCMSTB_GISB_ARB is not set +# CONFIG_MOXTET is not set +# CONFIG_HISILICON_LPC is not set +# CONFIG_SIMPLE_PM_BUS is not set +# CONFIG_VEXPRESS_CONFIG is not set +# CONFIG_MHI_BUS is not set +# end of Bus devices + +# CONFIG_CONNECTOR is not set +# CONFIG_GNSS is not set +CONFIG_MTD=m +# CONFIG_MTD_TESTS is not set + +# +# Partition parsers +# +# CONFIG_MTD_AR7_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=m +CONFIG_MTD_OF_PARTS=m +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=m +CONFIG_MTD_BLOCK=m +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=m +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=m +CONFIG_MTD_CFI_ADV_OPTIONS=y +# CONFIG_MTD_CFI_NOSWAP is not set +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +CONFIG_MTD_CFI_LE_BYTE_SWAP=y +CONFIG_MTD_CFI_GEOMETRY=y +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +CONFIG_MTD_MAP_BANK_WIDTH_16=y +CONFIG_MTD_MAP_BANK_WIDTH_32=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=m +CONFIG_MTD_CFI_AMDSTD=m +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=m +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_PHYSMAP=m +# CONFIG_MTD_PHYSMAP_COMPAT is not set +CONFIG_MTD_PHYSMAP_OF=y +# CONFIG_MTD_PHYSMAP_VERSATILE is not set +# CONFIG_MTD_PHYSMAP_GEMINI is not set +# CONFIG_MTD_PHYSMAP_GPIO_ADDR is not set +# CONFIG_MTD_PCI is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +CONFIG_MTD_PHRAM=m +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +# +# NAND +# +CONFIG_MTD_NAND_CORE=m +# CONFIG_MTD_ONENAND is not set +CONFIG_MTD_NAND_ECC_SW_HAMMING=m +# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set +CONFIG_MTD_RAW_NAND=m +# CONFIG_MTD_NAND_ECC_SW_BCH is not set + +# +# Raw/parallel NAND flash controllers +# +# CONFIG_MTD_NAND_DENALI_PCI is not set +# CONFIG_MTD_NAND_DENALI_DT is not set +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_BRCMNAND is not set +# CONFIG_MTD_NAND_HISI504 is not set +# CONFIG_MTD_NAND_MXIC is not set +# CONFIG_MTD_NAND_GPIO is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_NAND_CADENCE is not set +# CONFIG_MTD_NAND_ARASAN is not set + +# +# Misc +# +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_RICOH is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# ECC engine support +# +CONFIG_MTD_NAND_ECC=y +# end of ECC engine support +# end of NAND + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + +# CONFIG_MTD_SPI_NOR is not set +CONFIG_MTD_UBI=m +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_FASTMAP=y +# CONFIG_MTD_UBI_GLUEBI is not set +# CONFIG_MTD_UBI_BLOCK is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +CONFIG_OF_NUMA=y +# CONFIG_PARPORT is not set +CONFIG_PNP=y +CONFIG_PNP_DEBUG_MESSAGES=y + +# +# Protocols +# +CONFIG_PNPACPI=y +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +CONFIG_CDROM=y +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +CONFIG_ZRAM=m +# CONFIG_ZRAM_WRITEBACK is not set +# CONFIG_ZRAM_MEMORY_TRACKING is not set +# CONFIG_ZRAM_MULTI_COMP is not set +# CONFIG_BLK_DEV_UMEM is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SKD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=30720 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_VIRTIO_BLK=y +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set + +# +# NVME Support +# +CONFIG_NVME_CORE=y +CONFIG_BLK_DEV_NVME=y +CONFIG_NVME_MULTIPATH=y +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TCP is not set +# end of NVME Support + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +# CONFIG_SRAM is not set +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_XILINX_SDFEC is not set +# CONFIG_PVPANIC is not set +# CONFIG_HISI_HIKEY_USB is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +# end of EEPROM support + +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_ALCOR_PCI is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set +# CONFIG_HABANA_AI is not set +# end of Misc devices + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +CONFIG_RAID_ATTRS=y +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +CONFIG_BLK_DEV_SR=y +CONFIG_CHR_DEV_SG=m +# CONFIG_CHR_DEV_SCH is not set +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +CONFIG_SCSI_ISCSI_ATTRS=y +CONFIG_SCSI_SAS_ATTRS=y +CONFIG_SCSI_SAS_LIBSAS=y +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_HOST_SMP=y +# CONFIG_SCSI_SRP_ATTRS is not set +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +CONFIG_SCSI_HISI_SAS=y +CONFIG_SCSI_HISI_SAS_PCI=y +# CONFIG_SCSI_HISI_SAS_DEBUGFS_DEFAULT_ENABLE is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +CONFIG_MEGARAID_SAS=y +# CONFIG_SCSI_3SNIC_SSSRAID is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +# CONFIG_SCSI_HISI_RAID is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_MYRB is not set +# CONFIG_SCSI_MYRS is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FDOMAIN_PCI is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +CONFIG_SCSI_VIRTIO=m +CONFIG_SCSI_DH=y +CONFIG_SCSI_DH_RDAC=m +CONFIG_SCSI_DH_HP_SW=m +CONFIG_SCSI_DH_EMC=m +CONFIG_SCSI_DH_ALUA=m +# end of SCSI device support + +CONFIG_HAVE_PATA_PLATFORM=y +CONFIG_ATA=y +CONFIG_SATA_HOST=y +CONFIG_PATA_TIMINGS=y +CONFIG_ATA_VERBOSE_ERROR=y +# CONFIG_ATA_FORCE is not set +CONFIG_ATA_ACPI=y +# CONFIG_SATA_ZPODD is not set +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=y +CONFIG_SATA_MOBILE_LPM_POLICY=0 +CONFIG_SATA_AHCI_PLATFORM=m +# CONFIG_AHCI_CEVA is not set +# CONFIG_AHCI_QORIQ is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_ZHAOXIN is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_PATA_ACPI is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +CONFIG_MD_AUTODETECT=y +# CONFIG_MD_LINEAR is not set +CONFIG_MD_RAID0=y +CONFIG_MD_RAID1=y +CONFIG_MD_RAID10=y +CONFIG_MD_RAID456=y +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set +# CONFIG_BCACHE is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +# CONFIG_DM_UNSTRIPED is not set +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_THIN_PROVISIONING is not set +# CONFIG_DM_CACHE is not set +# CONFIG_DM_WRITECACHE is not set +# CONFIG_DM_EBS is not set +# CONFIG_DM_ERA is not set +# CONFIG_DM_CLONE is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_RAID is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_DUST is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_DM_LOG_WRITES is not set +# CONFIG_DM_INTEGRITY is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + +CONFIG_NETDEVICES=y +CONFIG_MII=m +CONFIG_NET_CORE=y +CONFIG_BONDING=m +# CONFIG_DUMMY is not set +# CONFIG_WIREGUARD is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set +# CONFIG_MACVLAN is not set +# CONFIG_IPVLAN is not set +# CONFIG_VXLAN is not set +# CONFIG_GENEVE is not set +# CONFIG_BAREUDP is not set +# CONFIG_GTP is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +CONFIG_TUN=m +# CONFIG_TUN_VNET_CROSS_LE is not set +# CONFIG_VETH is not set +CONFIG_VIRTIO_NET=y +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# Distributed Switch Architecture drivers +# +# end of Distributed Switch Architecture drivers + +CONFIG_ETHERNET=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_3SNIC is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set +# CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_ALTERA_TSE is not set +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_BROCADE is not set +CONFIG_NET_VENDOR_CADENCE=y +# CONFIG_MACB is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_NET_VENDOR_CORTINA is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_GOOGLE is not set +CONFIG_NET_VENDOR_HISILICON=y +# CONFIG_HIX5HD2_GMAC is not set +# CONFIG_HISI_FEMAC is not set +# CONFIG_HIP04_ETH is not set +CONFIG_HNS_MDIO=y +CONFIG_HNS=y +CONFIG_HNS_DSAF=y +CONFIG_HNS_ENET=y +CONFIG_HNS3=y +CONFIG_HNS3_HCLGE=y +CONFIG_HNS3_DCB=y +CONFIG_HNS3_HCLGEVF=y +CONFIG_HNS3_ENET=y +CONFIG_NET_VENDOR_HUAWEI=y +CONFIG_HINIC=y +# CONFIG_HINIC3 is not set +# CONFIG_BMA is not set +CONFIG_NET_VENDOR_I825XX=y +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +# CONFIG_E1000 is not set +# CONFIG_E1000E is not set +CONFIG_IGB=y +CONFIG_IGB_HWMON=y +# CONFIG_IGBVF is not set +# CONFIG_IXGB is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGBEVF is not set +# CONFIG_I40E is not set +# CONFIG_I40EVF is not set +# CONFIG_ICE is not set +# CONFIG_FM10K is not set +# CONFIG_IGC is not set +CONFIG_NET_VENDOR_MUCSE=y +# CONFIG_MXGBE is not set +# CONFIG_MXGBEVF is not set +# CONFIG_MXGBEM is not set +# CONFIG_MGBE is not set +# CONFIG_MGBEVF is not set +CONFIG_NET_VENDOR_NETSWIFT=y +# CONFIG_NGBE is not set +# CONFIG_TXGBE is not set +# CONFIG_JME is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MICROSEMI is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETERION is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_NI is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_ETHOC is not set +# CONFIG_NET_VENDOR_PACKET_ENGINES is not set +# CONFIG_NET_VENDOR_PENSANDO is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_SOCIONEXT is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_XILINX is not set +# CONFIG_NET_VENDOR_NEBULA_MATRIX is not set +CONFIG_NET_VENDOR_YUNSILICON=y +# CONFIG_YUNSILICON_XSC_PCI is not set +# CONFIG_NET_VENDOR_YUSUR is not set +CONFIG_NET_VENDOR_BZWX=y +# CONFIG_NCE is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_UBL is not set +# CONFIG_NET_SB1000 is not set +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +CONFIG_FIXED_PHY=y + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_ADIN_PHY is not set +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AX88796B_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM54140_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM84881_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_MARVELL_10G_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_MICROCHIP_T1_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_QSEMI_PHY is not set +CONFIG_REALTEK_PHY=y +# CONFIG_RENESAS_PHY is not set +# CONFIG_ROCKCHIP_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_DP83869_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +CONFIG_OF_MDIO=y +CONFIG_MDIO_DEVRES=y +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MVUSB is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_IPQ4019 is not set +# CONFIG_MDIO_IPQ8064 is not set +# CONFIG_MDIO_THUNDER is not set + +# +# MDIO Multiplexers +# +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set + +# +# PCS device drivers +# +# CONFIG_PCS_XPCS is not set +# end of PCS device drivers + +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +CONFIG_USB_NET_DRIVERS=m +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_RTL8152 is not set +# CONFIG_USB_LAN78XX is not set +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_AX88179_178A=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=m +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_NET_CDC_SUBSET_ENABLE=m +CONFIG_USB_NET_CDC_SUBSET=m +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +# CONFIG_USB_NET_AQC111 is not set +CONFIG_WLAN=y +# CONFIG_WIRELESS_WDS is not set +# CONFIG_WLAN_VENDOR_ADMTEK is not set +# CONFIG_WLAN_VENDOR_ATH is not set +# CONFIG_WLAN_VENDOR_ATMEL is not set +# CONFIG_WLAN_VENDOR_BROADCOM is not set +# CONFIG_WLAN_VENDOR_CISCO is not set +# CONFIG_WLAN_VENDOR_INTEL is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +CONFIG_HOSTAP=m +# CONFIG_HOSTAP_FIRMWARE is not set +# CONFIG_HOSTAP_PLX is not set +# CONFIG_HOSTAP_PCI is not set +# CONFIG_HERMES is not set +# CONFIG_PRISM54 is not set +# CONFIG_WLAN_VENDOR_MARVELL is not set +# CONFIG_WLAN_VENDOR_MEDIATEK is not set +# CONFIG_WLAN_VENDOR_MICROCHIP is not set +# CONFIG_WLAN_VENDOR_RALINK is not set +# CONFIG_WLAN_VENDOR_REALTEK is not set +# CONFIG_WLAN_VENDOR_RSI is not set +# CONFIG_WLAN_VENDOR_ST is not set +# CONFIG_WLAN_VENDOR_TI is not set +# CONFIG_WLAN_VENDOR_ZYDAS is not set +# CONFIG_WLAN_VENDOR_QUANTENNA is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_VIRT_WIFI is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set +# CONFIG_FUJITSU_ES is not set +# CONFIG_NETDEVSIM is not set +CONFIG_NET_FAILOVER=y +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set +# CONFIG_INPUT_MATRIXKMAP is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_EVBUG=y + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1050 is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_SMBUS=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +CONFIG_INPUT_JOYSTICK=y +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +CONFIG_INPUT_MISC=y +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_AMBAKMI is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_LDISC_AUTOLOAD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_PNP=y +# CONFIG_SERIAL_8250_16550A_VARIANTS is not set +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PCI=y +# CONFIG_SERIAL_8250_EXAR is not set +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SIFIVE is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_FSL_LINFLEXUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_SPRD is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +# CONFIG_NOZOMI is not set +# CONFIG_NULL_TTY is not set +# CONFIG_TRACE_SINK is not set +CONFIG_HVC_DRIVER=y +# CONFIG_HVC_DCC is not set +# CONFIG_SERIAL_DEV_BUS is not set +# CONFIG_TTY_PRINTK is not set +CONFIG_VIRTIO_CONSOLE=m +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=m +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_BA431 is not set +# CONFIG_HW_RANDOM_VIRTIO is not set +# CONFIG_HW_RANDOM_HISI is not set +CONFIG_HW_RANDOM_HISI_GM=m +# CONFIG_HW_RANDOM_CCTRNG is not set +# CONFIG_HW_RANDOM_XIPHERA is not set +# CONFIG_APPLICOM is not set +CONFIG_DEVMEM=y +# CONFIG_RAW_DRIVER is not set +CONFIG_DEVPORT=y +# CONFIG_TCG_TPM is not set +# CONFIG_XILLYBUS is not set +# CONFIG_RANDOM_TRUST_BOOTLOADER is not set +# end of Character devices + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_ACPI_I2C_OPREGION=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=m +# CONFIG_I2C_MUX is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_AMD_MP2 is not set +# CONFIG_I2C_HIX5HD2 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# ACPI drivers +# +# CONFIG_I2C_SCMI is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_HISI is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_RK3X is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# end of I2C Hardware Bus support + +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +# CONFIG_I3C is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +# CONFIG_SPI_MEM is not set + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_CADENCE_QUADSPI is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_HISI_KUNPENG is not set +# CONFIG_SPI_HISI_SFC_V3XX is not set +# CONFIG_SPI_NXP_FLEXSPI is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_ROCKCHIP is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_AMD is not set + +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_DYNAMIC=y +# CONFIG_SPMI is not set +# CONFIG_HSI is not set +# CONFIG_PPS is not set + +# +# PTP clock support +# +# CONFIG_PTP_1588_CLOCK is not set + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +# CONFIG_PTP_HISI is not set +# end of PTP clock support + +CONFIG_PINCTRL=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_MCP23S08 is not set +# CONFIG_PINCTRL_SINGLE is not set +# CONFIG_PINCTRL_SX150X is not set +# CONFIG_PINCTRL_STMFX is not set +# CONFIG_PINCTRL_OCELOT is not set + +# +# Renesas pinctrl drivers +# +# end of Renesas pinctrl drivers + +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIO_ACPI=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_CDEV=y +# CONFIG_GPIO_CDEV_V1 is not set +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_AMDPT is not set +# CONFIG_GPIO_CADENCE is not set +CONFIG_GPIO_DWAPB=y +# CONFIG_GPIO_FTGPIO010 is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HISI is not set +# CONFIG_GPIO_HLWD is not set +# CONFIG_GPIO_LOGICVC is not set +# CONFIG_GPIO_MB86S7X is not set +CONFIG_GPIO_PL061=y +# CONFIG_GPIO_SAMA5D2_PIOBU is not set +# CONFIG_GPIO_SIFIVE is not set +# CONFIG_GPIO_SYSCON is not set +CONFIG_GPIO_XGENE=y +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_AMD_FCH is not set +# end of Memory mapped GPIO drivers + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_GW_PLD is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCA9570 is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +# end of MFD GPIO expanders + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +# end of USB GPIO expanders + +# CONFIG_GPIO_AGGREGATOR is not set +# CONFIG_GPIO_MOCKUP is not set +# CONFIG_W1 is not set +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_BRCMSTB is not set +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_HISI is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_XGENE is not set +# CONFIG_POWER_RESET_SYSCON is not set +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +# CONFIG_SYSCON_REBOOT_MODE is not set +# CONFIG_NVMEM_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_POWER_SUPPLY_HWMON=y +# CONFIG_PDA_POWER is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_SBS is not set +# CONFIG_CHARGER_SBS is not set +# CONFIG_BATTERY_BQ27XXX is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ2515X is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_BQ25980 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_RT5033 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_BD99954 is not set +CONFIG_HWMON=y +CONFIG_THERMAL=y +# CONFIG_THERMAL_NETLINK is not set +# CONFIG_THERMAL_STATISTICS is not set +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +# CONFIG_CPU_THERMAL is not set +# CONFIG_THERMAL_EMULATION is not set +# CONFIG_THERMAL_MMIO is not set +CONFIG_HISI_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +# CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED is not set +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +# CONFIG_WATCHDOG_SYSFS is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_WDAT_WDT is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +# CONFIG_ARM_SP805_WATCHDOG is not set +# CONFIG_ARM_SBSA_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +# CONFIG_DW_WATCHDOG is not set +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_ARM_SMC_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=m +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_BD9571MWV is not set +# CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_MADERA is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_MFD_HI655X_PMIC is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_IQS62X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77620 is not set +# CONFIG_MFD_MAX77650 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_RK808 is not set +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_LOCHNAGAR is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_ROHM_BD718XX is not set +# CONFIG_MFD_ROHM_BD70528 is not set +# CONFIG_MFD_ROHM_BD71828 is not set +# CONFIG_MFD_STPMIC1 is not set +# CONFIG_MFD_STMFX is not set +# CONFIG_MFD_INTEL_M10_BMC is not set +# end of Multifunction device drivers + +# CONFIG_REGULATOR is not set +# CONFIG_RC_CORE is not set +CONFIG_MEDIA_CEC_SUPPORT=y +# CONFIG_CEC_CH7322 is not set +# CONFIG_USB_PULSE8_CEC is not set +# CONFIG_USB_RAINSHADOW_CEC is not set +# CONFIG_MEDIA_SUPPORT is not set + +# +# Graphics support +# +# CONFIG_VGA_ARB is not set +CONFIG_DRM=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +# CONFIG_DRM_DEBUG_MM is not set +# CONFIG_DRM_DEBUG_SELFTEST is not set +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_TTM=y +CONFIG_DRM_TTM_DMA_PAGE_POOL=y +CONFIG_DRM_VRAM_HELPER=y +CONFIG_DRM_TTM_HELPER=y +CONFIG_DRM_SCHED=m + +# +# I2C encoder or helper chips +# +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# end of I2C encoder or helper chips + +# +# ARM devices +# +# CONFIG_DRM_HDLCD is not set +# CONFIG_DRM_MALI_DISPLAY is not set +# CONFIG_DRM_KOMEDA is not set +# end of ARM devices + +CONFIG_DRM_RADEON=m +CONFIG_DRM_RADEON_USERPTR=y +CONFIG_DRM_AMDGPU=m +CONFIG_DRM_AMDGPU_SI=y +CONFIG_DRM_AMDGPU_CIK=y +CONFIG_DRM_AMDGPU_USERPTR=y +CONFIG_DRM_AMDGPU_GART_DEBUGFS=y + +# +# ACP (Audio CoProcessor) Configuration +# +CONFIG_DRM_AMD_ACP=y +# end of ACP (Audio CoProcessor) Configuration + +# +# Display Engine Configuration +# +CONFIG_DRM_AMD_DC=y +CONFIG_DRM_AMD_DC_HDCP=y +CONFIG_DRM_AMD_DC_SI=y +# end of Display Engine Configuration + +CONFIG_HSA_AMD=y +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_VKMS is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_INSPUR is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_RCAR_DW_HDMI is not set +# CONFIG_DRM_RCAR_LVDS is not set +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +# CONFIG_DRM_VIRTIO_GPU is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LB035Q02 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# end of Display Panels + +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set +# CONFIG_DRM_DISPLAY_CONNECTOR is not set +# CONFIG_DRM_LONTIUM_LT9611 is not set +# CONFIG_DRM_LVDS_CODEC is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_PARADE_PS8640 is not set +# CONFIG_DRM_SIL_SII8620 is not set +# CONFIG_DRM_SII902X is not set +# CONFIG_DRM_SII9234 is not set +# CONFIG_DRM_SIMPLE_BRIDGE is not set +# CONFIG_DRM_THINE_THC63LVD1024 is not set +# CONFIG_DRM_TOSHIBA_TC358762 is not set +# CONFIG_DRM_TOSHIBA_TC358764 is not set +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TOSHIBA_TC358768 is not set +# CONFIG_DRM_TOSHIBA_TC358775 is not set +# CONFIG_DRM_TI_TFP410 is not set +# CONFIG_DRM_TI_SN65DSI86 is not set +# CONFIG_DRM_TI_TPD12S015 is not set +# CONFIG_DRM_ANALOGIX_ANX6345 is not set +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_CDNS_MHDP8546 is not set +# end of Display Interface Bridges + +# CONFIG_DRM_ETNAVIV is not set +# CONFIG_DRM_ARCPGU is not set +CONFIG_DRM_HISI_HIBMC=y +# CONFIG_DRM_HISI_KIRIN is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_GM12U320 is not set +# CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9225 is not set +# CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_ILI9486 is not set +# CONFIG_TINYDRM_MI0283QT is not set +# CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_ST7586 is not set +# CONFIG_TINYDRM_ST7735R is not set +# CONFIG_DRM_PL111 is not set +# CONFIG_DRM_LIMA is not set +# CONFIG_DRM_PANFROST is not set +# CONFIG_DRM_TIDSS is not set +# CONFIG_DRM_LEGACY is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y + +# +# Frame buffer Devices +# +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_MODE_HELPERS is not set +CONFIG_FB_TILEBLITTING=y + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +CONFIG_FB_EFI=y +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +# CONFIG_FB_LS2K500 is not set +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# end of Backlight & LCD device support + +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +# end of Console display driver support + +# CONFIG_LOGO is not set +# end of Graphics support + +# CONFIG_SOUND is not set + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_MACALLY is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CREATIVE_SB0540 is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_GLORIOUS is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_VIVALDI is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_ITE is not set +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MALTRON is not set +# CONFIG_HID_MAYFLASH is not set +# CONFIG_HID_REDRAGON is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set +# CONFIG_HID_MCP2221 is not set +# end of Special HID drivers + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +CONFIG_USB_HIDDEV=y +# end of USB HID support + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set +# end of I2C HID support +# end of HID support + +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +# CONFIG_USB_ULPI_BUS is not set +# CONFIG_USB_CONN_GPIO is not set +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_PCI=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_FEW_INIT_RETRIES is not set +CONFIG_USB_DYNAMIC_MINORS=y +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_PRODUCTLIST is not set +# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set +CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_MON=y + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=y +# CONFIG_USB_XHCI_PCI_RENESAS is not set +CONFIG_USB_XHCI_PLATFORM=m +# CONFIG_USB_XHCI_HISTB is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +# CONFIG_USB_EHCI_FSL is not set +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PCI=y +CONFIG_USB_OHCI_HCD_PLATFORM=m +CONFIG_USB_UHCI_HCD=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_CDNS3 is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_DWC3 is not set +# CONFIG_USB_DWC2 is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP210X is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_F8153X is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +CONFIG_USB_SERIAL_MOS7720=y +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +CONFIG_USB_SERIAL_SAFE=y +# CONFIG_USB_SERIAL_SAFE_PADDED is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +# CONFIG_USB_SERIAL_OPTION is not set +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_UPD78F0730 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_ULPI is not set +# end of USB Physical Layer drivers + +# CONFIG_USB_GADGET is not set +# CONFIG_TYPEC is not set +CONFIG_USB_ROLE_SWITCH=y +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=8 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_ARMMMCI is not set +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MMC_DW is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +# CONFIG_MMC_CQHCI is not set +# CONFIG_MMC_HSQ is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_HCTOSYS is not set +# CONFIG_RTC_SYSTOHC is not set +# CONFIG_RTC_DEBUG is not set +# CONFIG_RTC_NVMEM is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF85363 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV3032 is not set +# CONFIG_RTC_DRV_RV8803 is not set +# CONFIG_RTC_DRV_SD3078 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +CONFIG_RTC_DRV_EFI=y +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +# CONFIG_RTC_DRV_PL031 is not set +# CONFIG_RTC_DRV_CADENCE is not set +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_DMADEVICES is not set + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_MOVE_NOTIFY is not set +# CONFIG_DMABUF_SELFTESTS is not set +# CONFIG_DMABUF_HEAPS is not set +# end of DMABUF options + +# CONFIG_AUXDISPLAY is not set +CONFIG_UIO=m +# CONFIG_UIO_CIF is not set +# CONFIG_UIO_PDRV_GENIRQ is not set +# CONFIG_UIO_DMEM_GENIRQ is not set +# CONFIG_UIO_AEC is not set +# CONFIG_UIO_SERCOS3 is not set +# CONFIG_UIO_PCI_GENERIC is not set +# CONFIG_UIO_NETX is not set +# CONFIG_UIO_PRUSS is not set +# CONFIG_UIO_MF624 is not set +# CONFIG_VFIO is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO=y +CONFIG_VIRTIO_PCI_LIB=y +CONFIG_VIRTIO_MENU=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +# CONFIG_VIRTIO_BALLOON is not set +# CONFIG_VIRTIO_INPUT is not set +CONFIG_VIRTIO_MMIO=y +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VDPA is not set +# CONFIG_VHOST_MENU is not set + +# +# Microsoft Hyper-V guest support +# +# end of Microsoft Hyper-V guest support + +# CONFIG_GREYBUS is not set +# CONFIG_STAGING is not set +# CONFIG_GOLDFISH is not set +# CONFIG_CHROME_PLATFORMS is not set +# CONFIG_MELLANOX_PLATFORM is not set +CONFIG_LOONGARCH_PLATFORM_DEVICES=y +CONFIG_HAVE_CLK=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y +# CONFIG_COMMON_CLK_MAX9485 is not set +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_COMMON_CLK_CS2000_CP is not set +# CONFIG_CLK_QORIQ is not set +# CONFIG_COMMON_CLK_XGENE is not set +# CONFIG_COMMON_CLK_VC5 is not set +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +# CONFIG_COMMON_CLK_HI3516CV300 is not set +# CONFIG_COMMON_CLK_HI3519 is not set +# CONFIG_COMMON_CLK_HI3660 is not set +# CONFIG_COMMON_CLK_HI3670 is not set +# CONFIG_COMMON_CLK_HI3798CV200 is not set +CONFIG_COMMON_CLK_HI6220=y +# CONFIG_RESET_HISI is not set +# CONFIG_HWSPINLOCK is not set + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_ACPI=y +CONFIG_TIMER_PROBE=y +CONFIG_CLKSRC_MMIO=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y +CONFIG_ARM_TIMER_SP804=y +# CONFIG_MICROCHIP_PIT64B is not set +# end of Clock Source drivers + +# CONFIG_MAILBOX is not set +CONFIG_IOMMU_IOVA=y +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# end of Generic IOMMU Pagetable Support + +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +# CONFIG_ARM_SMMU is not set +# CONFIG_ARM_SMMU_V3 is not set +# CONFIG_VIRTIO_IOMMU is not set + +# +# Remoteproc drivers +# +# CONFIG_REMOTEPROC is not set +# end of Remoteproc drivers + +# +# Rpmsg drivers +# +# CONFIG_RPMSG_VIRTIO is not set +# end of Rpmsg drivers + +# CONFIG_SOUNDWIRE is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +# end of Amlogic SoC drivers + +# +# Aspeed SoC drivers +# +# end of Aspeed SoC drivers + +# +# Broadcom SoC drivers +# +# CONFIG_SOC_BRCMSTB is not set +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# CONFIG_QUICC_ENGINE is not set +# CONFIG_FSL_RCPM is not set +# end of NXP/Freescale QorIQ SoC drivers + +# +# i.MX SoC drivers +# +# end of i.MX SoC drivers + +# +# Qualcomm SoC drivers +# +# end of Qualcomm SoC drivers + +# CONFIG_SOC_TI is not set + +# +# Xilinx SoC drivers +# +# CONFIG_XILINX_VCU is not set +# end of Xilinx SoC drivers + +# +# Hisilicon SoC drivers +# +# CONFIG_HISI_HBMCACHE is not set +# CONFIG_HISI_L3T is not set +# end of Hisilicon SoC drivers +# end of SOC (System On Chip) specific Drivers + +# CONFIG_PM_DEVFREQ is not set +# CONFIG_EXTCON is not set +# CONFIG_MEMORY is not set +# CONFIG_IIO is not set +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +# CONFIG_PWM is not set + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +# CONFIG_AL_FIC is not set +CONFIG_HISILICON_IRQ_MBIGEN=y +CONFIG_PARTITION_PERCPU=y +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_TI_SYSCON is not set +CONFIG_COMMON_RESET_HI3660=y +CONFIG_COMMON_RESET_HI6220=y + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +# CONFIG_PHY_XGENE is not set +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_CADENCE_TORRENT is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set +# CONFIG_PHY_FSL_IMX8MQ_USB is not set +# CONFIG_PHY_MIXEL_MIPI_DPHY is not set +# CONFIG_PHY_HI6220_USB is not set +# CONFIG_PHY_HI3660_USB is not set +# CONFIG_PHY_HISTB_COMBPHY is not set +# CONFIG_PHY_HISI_INNO_USB2 is not set +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set +# end of PHY Subsystem + +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +CONFIG_ARM_CCI_PMU=y +CONFIG_ARM_CCI400_PMU=y +# CONFIG_ARM_CCI5xx_PMU is not set +CONFIG_ARM_CCN=y +# CONFIG_ARM_CMN is not set +CONFIG_ARM_PMU=y +CONFIG_ARM_PMU_ACPI=y +# CONFIG_ARM_SMMU_V3_PMU is not set +# CONFIG_ARM_DSU_PMU is not set +# CONFIG_ARM_SPE_PMU is not set +# CONFIG_ARM64_BRBE is not set +# CONFIG_HISI_PMU is not set +# CONFIG_HISI_PCIE_PMU is not set +# CONFIG_HNS3_PMU is not set +# end of Performance monitor support + +CONFIG_RAS=y +CONFIG_PAGE_EJECT=m +# CONFIG_USB4 is not set + +# +# Android +# +# CONFIG_ANDROID is not set +# end of Android + +# +# Vendor Hooks +# +# CONFIG_VENDOR_HOOKS is not set +# end of Vendor Hooks + +# CONFIG_LIBNVDIMM is not set +CONFIG_DAX=y +# CONFIG_NVMEM is not set + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# CONFIG_HISI_PTT is not set +# end of HW tracing support + +# CONFIG_FPGA is not set +# CONFIG_FSI is not set +# CONFIG_TEE is not set +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set +# CONFIG_INTERCONNECT is not set +# CONFIG_COUNTER is not set +# CONFIG_ROH is not set +# CONFIG_UB is not set + +# +# CPU Inspect +# +# CONFIG_CPU_INSPECT is not set +# end of CPU Inspect + +# CONFIG_ARM_SPE_MEM_SAMPLING is not set +# end of Device Drivers + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y +CONFIG_EXT2_FS=m +CONFIG_EXT2_FS_XATTR=y +# CONFIG_EXT2_FS_POSIX_ACL is not set +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=m +# CONFIG_EXT3_FS_POSIX_ACL is not set +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +# CONFIG_EXT4_FS_POSIX_ACL is not set +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_DEBUG is not set +# CONFIG_EXT4_ERROR_REPORT is not set +# CONFIG_EXT4_MITIGATION_FALSE_SHARING is not set +# CONFIG_EXT4_DIOREAD_NOLOCK_PARAM is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +CONFIG_FS_DAX=y +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +# CONFIG_MANDATORY_FILE_LOCKING is not set +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +# CONFIG_FANOTIFY_ACCESS_PERMISSIONS is not set +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +CONFIG_QUOTA_TREE=m +CONFIG_QFMT_V1=m +CONFIG_QFMT_V2=m +CONFIG_QUOTACTL=y +CONFIG_AUTOFS4_FS=m +CONFIG_AUTOFS_FS=m +CONFIG_FUSE_FS=y +CONFIG_CUSE=m +CONFIG_VIRTIO_FS=y +CONFIG_OVERLAY_FS=m +# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +# CONFIG_OVERLAY_FS_INDEX is not set +# CONFIG_OVERLAY_FS_XINO_AUTO is not set +# CONFIG_OVERLAY_FS_METACOPY is not set + +# +# Caches +# +CONFIG_FSCACHE=m +# CONFIG_FSCACHE_STATS is not set +# CONFIG_FSCACHE_HISTOGRAM is not set +# CONFIG_FSCACHE_DEBUG is not set +# CONFIG_FSCACHE_OBJECT_LIST is not set +# CONFIG_CACHEFILES is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/EXFAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_EXFAT_FS is not set +# CONFIG_NTFS_FS is not set +# CONFIG_NTFS3_FS is not set +# end of DOS/FAT/EXFAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_VMCORE=y +# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_DIRTY_PAGES=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_TMPFS_INODE64 is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +# CONFIG_DYNAMIC_HUGETLB is not set +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +# CONFIG_CONFIGFS_FS is not set +CONFIG_EFIVAR_FS=y +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=m +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_SUMMARY=y +CONFIG_JFFS2_FS_XATTR=y +CONFIG_JFFS2_FS_POSIX_ACL=y +CONFIG_JFFS2_FS_SECURITY=y +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_JFFS2_CMODE_NONE is not set +CONFIG_JFFS2_CMODE_PRIORITY=y +# CONFIG_JFFS2_CMODE_SIZE is not set +# CONFIG_JFFS2_CMODE_FAVOURLZO is not set +CONFIG_UBIFS_FS=m +CONFIG_UBIFS_FS_ADVANCED_COMPR=y +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +# CONFIG_UBIFS_FS_ZSTD is not set +# CONFIG_UBIFS_ATIME_SUPPORT is not set +CONFIG_UBIFS_FS_XATTR=y +CONFIG_UBIFS_FS_SECURITY=y +# CONFIG_UBIFS_FS_AUTHENTICATION is not set +CONFIG_CRAMFS=m +# CONFIG_CRAMFS_BLOCKDEV is not set +# CONFIG_CRAMFS_MTD is not set +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_ZLIB=y +# CONFIG_SQUASHFS_LZ4 is not set +# CONFIG_SQUASHFS_LZO is not set +CONFIG_SQUASHFS_XZ=y +# CONFIG_SQUASHFS_ZSTD is not set +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_EROFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=m +# CONFIG_NFS_V2 is not set +CONFIG_NFS_V3=m +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=m +# CONFIG_NFS_SWAP is not set +CONFIG_NFS_V4_1=y +# CONFIG_NFS_V4_2 is not set +CONFIG_PNFS_FILE_LAYOUT=m +CONFIG_PNFS_BLOCK=m +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +# CONFIG_NFS_FSCACHE is not set +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +CONFIG_NFS_DISABLE_UDP_SUPPORT=y +CONFIG_NFSD=m +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +# CONFIG_NFSD_BLOCKLAYOUT is not set +# CONFIG_NFSD_SCSILAYOUT is not set +# CONFIG_NFSD_FLEXFILELAYOUT is not set +# CONFIG_NFSD_V4_SECURITY_LABEL is not set +CONFIG_GRACE_PERIOD=m +CONFIG_LOCKD=m +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=m +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=m +CONFIG_SUNRPC_GSS=m +CONFIG_SUNRPC_BACKCHANNEL=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS2 is not set +CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y +# CONFIG_CIFS_WEAK_PW_HASH is not set +# CONFIG_CIFS_UPCALL is not set +# CONFIG_CIFS_XATTR is not set +CONFIG_CIFS_DEBUG=y +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG_DUMP_KEYS is not set +# CONFIG_CIFS_DFS_UPCALL is not set +# CONFIG_CIFS_FSCACHE is not set +# CONFIG_SMB_SERVER is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_9P_FS=y +CONFIG_9P_FS_POSIX_ACL=y +# CONFIG_9P_FS_SECURITY is not set +# CONFIG_EULER_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +CONFIG_NLS_UTF8=m +# CONFIG_UNICODE is not set +# CONFIG_FILE_MITIGATION_FALSE_SHARING is not set +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_REQUEST_CACHE is not set +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +CONFIG_SECURITY_DMESG_RESTRICT=y +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +CONFIG_SECURITY_NETWORK=y +# CONFIG_SECURITY_NETWORK_XFRM is not set +# CONFIG_SECURITY_PATH is not set +CONFIG_LSM_MMAP_MIN_ADDR=32768 +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +CONFIG_HARDENED_USERCOPY=y +CONFIG_HARDENED_USERCOPY_FALLBACK=y +# CONFIG_HARDENED_USERCOPY_PAGESPAN is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +# CONFIG_SECURITY_SELINUX_DISABLE is not set +CONFIG_SECURITY_SELINUX_DEVELOP=y +CONFIG_SECURITY_SELINUX_AVC_STATS=y +CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 +CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS=9 +CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE=256 +CONFIG_SECURITY_SMACK=y +# CONFIG_SECURITY_SMACK_BRINGUP is not set +# CONFIG_SECURITY_SMACK_NETFILTER is not set +# CONFIG_SECURITY_SMACK_APPEND_SIGNALS is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_SECURITY_APPARMOR is not set +# CONFIG_SECURITY_LOADPIN is not set +CONFIG_SECURITY_YAMA=y +# CONFIG_SECURITY_SAFESETID is not set +# CONFIG_SECURITY_LOCKDOWN_LSM is not set +# CONFIG_SECURITY_LANDLOCK is not set +# CONFIG_INTEGRITY is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity,bpf" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_CC_HAS_AUTO_VAR_INIT_PATTERN=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO_BARE=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y +CONFIG_INIT_STACK_NONE=y +# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set +# CONFIG_INIT_STACK_ALL_PATTERN is not set +# CONFIG_INIT_STACK_ALL_ZERO is not set +# CONFIG_GCC_PLUGIN_STACKLEAK is not set +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +# end of Memory initialization +# end of Kernel hardening options + +CONFIG_SECURITY_BOOT_INIT=y +# end of Security options + +CONFIG_XOR_BLOCKS=y +CONFIG_ASYNC_CORE=y +CONFIG_ASYNC_MEMCPY=y +CONFIG_ASYNC_XOR=y +CONFIG_ASYNC_PQ=y +CONFIG_ASYNC_RAID6_RECOV=y +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SKCIPHER=y +CONFIG_CRYPTO_SKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=m +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=m +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Public-key cryptography +# +# CONFIG_CRYPTO_RSA is not set +# CONFIG_CRYPTO_DH is not set +# CONFIG_CRYPTO_ECDH is not set +# CONFIG_CRYPTO_ECDSA is not set +# CONFIG_CRYPTO_ECRDSA is not set +# CONFIG_CRYPTO_SM2 is not set +# CONFIG_CRYPTO_CURVE25519 is not set + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +# CONFIG_CRYPTO_AEGIS128 is not set +# CONFIG_CRYPTO_SEQIV is not set +CONFIG_CRYPTO_ECHAINIV=m + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=m +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_ADIANTUM is not set +# CONFIG_CRYPTO_ESSIV is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_HMAC=m +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +# CONFIG_CRYPTO_XXHASH is not set +# CONFIG_CRYPTO_BLAKE2B is not set +# CONFIG_CRYPTO_BLAKE2S is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=m +# CONFIG_CRYPTO_POLY1305 is not set +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=m +CONFIG_CRYPTO_MICHAEL_MIC=m +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +# CONFIG_CRYPTO_SHA3 is not set +# CONFIG_CRYPTO_SM3_GENERIC is not set +# CONFIG_CRYPTO_STREEBOG is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=m +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SM4_GENERIC is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_LZO=m +# CONFIG_CRYPTO_842 is not set +CONFIG_CRYPTO_LZ4=m +# CONFIG_CRYPTO_LZ4HC is not set +# CONFIG_CRYPTO_ZSTD is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_DRBG_MENU=m +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=m +CONFIG_CRYPTO_JITTERENTROPY=m +CONFIG_CRYPTO_USER_API=y +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +# CONFIG_CRYPTO_USER_API_RNG is not set +CONFIG_CRYPTO_USER_API_AEAD=y +CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y +CONFIG_CRYPTO_HASH_INFO=y +# CONFIG_CRYPTO_HW is not set +# CONFIG_ASYMMETRIC_KEY_TYPE is not set + +# +# Certificates for signature checking +# +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +# CONFIG_PGP_PRELOAD_PUBLIC_KEYS is not set +# end of Certificates for signature checking + +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_RAID6_PQ=y +CONFIG_RAID6_PQ_BENCHMARK=y +# CONFIG_PACKING is not set +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +# CONFIG_CORDIC is not set +# CONFIG_PRIME_NUMBERS is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y +# CONFIG_INDIRECT_PIO is not set + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_AES=m +CONFIG_CRYPTO_LIB_ARC4=m +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +# CONFIG_CRYPTO_LIB_CHACHA is not set +# CONFIG_CRYPTO_LIB_CURVE25519 is not set +CONFIG_CRYPTO_LIB_DES=m +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 +# CONFIG_CRYPTO_LIB_POLY1305 is not set +# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_LIB_SHA256=m +# end of Crypto library routines + +CONFIG_LIB_MEMNEQ=y +CONFIG_CRC_CCITT=m +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC64 is not set +# CONFIG_CRC4 is not set +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=y +# CONFIG_CRC8 is not set +CONFIG_XXHASH=y +CONFIG_AUDIT_GENERIC=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_AUDIT_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=m +CONFIG_LZO_COMPRESS=m +CONFIG_LZO_DECOMPRESS=m +CONFIG_LZ4_COMPRESS=m +CONFIG_LZ4_DECOMPRESS=m +CONFIG_XZ_DEC=y +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_SPARC is not set +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_INTERVAL_TREE=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_DMA_OPS=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_ARCH_HAS_SETUP_DMA_OPS=y +CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_SWIOTLB=y +# CONFIG_DMA_RESTRICTED_POOL is not set +CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_DMA_COHERENT_POOL=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_DIRECT_REMAP=y +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_DMA_MAP_BENCHMARK is not set +CONFIG_SGL_ALLOC=y +# CONFIG_FORCE_NR_CPUS is not set +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_IRQ_POLL=y +CONFIG_DIMLIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=m +CONFIG_UCS2_STRING=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_SG_POOL=y +CONFIG_ARCH_STACKWALK=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set +# end of Library routines + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_DYNAMIC_DEBUG_CORE is not set +# CONFIG_SYMBOLIC_ERRNAME is not set +CONFIG_DEBUG_BUGVERBOSE=y +# end of printk and dmesg options + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_COMPRESSED is not set +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_DEBUG_INFO_BTF is not set +# CONFIG_GDB_SCRIPTS is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_HEADERS_INSTALL is not set +# CONFIG_OPTIMIZE_INLINING is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_PGO_KERNEL is not set +# end of Compile-time checks and compiler options + +# +# Generic Kernel Debugging Instruments +# +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +# CONFIG_MAGIC_SYSRQ_SERIAL is not set +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_FS_ALLOW_ALL=y +# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set +# CONFIG_DEBUG_FS_ALLOW_NONE is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +CONFIG_HAVE_KCSAN_COMPILER=y +# end of Generic Kernel Debugging Instruments + +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_MISC is not set + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_PAGE_OWNER is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_PAGE_REF is not set +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set +CONFIG_GENERIC_PTDUMP=y +# CONFIG_PTDUMP_DEBUGFS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_DEBUG_KMEMLEAK=y +CONFIG_DEBUG_KMEMLEAK_MEM_POOL_SIZE=2000 +# CONFIG_DEBUG_KMEMLEAK_TEST is not set +CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF=y +# CONFIG_DEBUG_KMEMLEAK_AUTO_SCAN is not set +CONFIG_DEBUG_STACK_USAGE=y +CONFIG_SCHED_STACK_END_CHECK=y +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y +CONFIG_HAVE_ARCH_KASAN_VMALLOC=y +CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_KASAN_SW_TAGS=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y +# CONFIG_KASAN is not set +CONFIG_HAVE_ARCH_KFENCE=y +# CONFIG_KFENCE is not set +# end of Memory Debugging + +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Oops, Lockups and Hangs +# +CONFIG_PANIC_ON_OOPS=y +CONFIG_PANIC_ON_OOPS_VALUE=1 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_LOCKUP_DETECTOR=y +CONFIG_SOFTLOCKUP_DETECTOR=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 + +# +# ARM64 NMI watchdog configuration +# +# end of ARM64 NMI watchdog configuration + +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 +CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=1 +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_TEST_LOCKUP is not set +# end of Debug Oops, Lockups and Hangs + +# +# Scheduler Debugging +# +CONFIG_SCHED_DEBUG=y +CONFIG_SCHED_INFO=y +# CONFIG_SCHEDSTATS is not set +# end of Scheduler Debugging + +# CONFIG_DEBUG_TIMEKEEPING is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +CONFIG_DEBUG_ATOMIC_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_SCF_TORTURE_TEST is not set +# CONFIG_CSD_LOCK_WAIT_DEBUG is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +CONFIG_STACKTRACE=y +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y + +# +# Debug kernel data structures +# +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PLIST is not set +CONFIG_DEBUG_SG=y +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# end of Debug kernel data structures + +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_RCU_SCALE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_REF_SCALE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=65 +# CONFIG_RCU_CPU_STALL_CPUTIME is not set +# CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set +# CONFIG_RCU_STRICT_GRACE_PERIOD is not set +# end of RCU Debugging + +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_LATENCYTOP is not set +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACER_MAX_TRACE=y +CONFIG_TRACE_CLOCK=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_TRACING=y +CONFIG_GENERIC_TRACER=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +# CONFIG_BOOTTIME_TRACING is not set +# CONFIG_FUNCTION_TRACER is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_IRQSOFF_TRACER is not set +CONFIG_SCHED_TRACER=y +# CONFIG_HWLAT_TRACER is not set +# CONFIG_OSNOISE_TRACER is not set +# CONFIG_TIMERLAT_TRACER is not set +# CONFIG_FTRACE_SYSCALLS is not set +CONFIG_TRACER_SNAPSHOT=y +# CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +CONFIG_KPROBE_EVENTS=y +CONFIG_UPROBE_EVENTS=y +CONFIG_DYNAMIC_EVENTS=y +CONFIG_PROBE_EVENTS=y +# CONFIG_SYNTH_EVENTS is not set +# CONFIG_HIST_TRIGGERS is not set +# CONFIG_TRACE_EVENT_INJECT is not set +# CONFIG_TRACEPOINT_BENCHMARK is not set +# CONFIG_RING_BUFFER_BENCHMARK is not set +# CONFIG_TRACE_EVAL_MAP_FILE is not set +# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_RING_BUFFER_STARTUP_TEST is not set +# CONFIG_PREEMPTIRQ_DELAY_TEST is not set +# CONFIG_KPROBE_EVENT_GEN_TEST is not set +# CONFIG_SAMPLES is not set +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +CONFIG_STRICT_DEVMEM=y +CONFIG_IO_STRICT_DEVMEM=y + +# +# arm64 Debugging +# +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_DEBUG_EFI is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set +# end of arm64 Debugging + +# +# Kernel Testing and Coverage +# +# CONFIG_KUNIT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +CONFIG_FUNCTION_ERROR_INJECTION=y +# CONFIG_FAULT_INJECTION is not set +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set +# CONFIG_RUNTIME_TESTING_MENU is not set +# CONFIG_MEMTEST is not set +# end of Kernel Testing and Coverage +# end of Kernel hacking diff --git a/bsp/meta-kunpeng/recipes-kernel/linux/files/kernel6-config/kp920/defconfig b/bsp/meta-kunpeng/recipes-kernel/linux/files/kernel6-config/kp920/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..1f2f50c999dd7bf431d9293fd2a92be66b0d516b --- /dev/null +++ b/bsp/meta-kunpeng/recipes-kernel/linux/files/kernel6-config/kp920/defconfig @@ -0,0 +1,5287 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 6.6.0 Kernel Configuration +# +CONFIG_CC_VERSION_TEXT="aarch64-openeuler-linux-gnu-gcc (crosstool-NG 1.26.0) 12.3.1" +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=120301 +CONFIG_CLANG_VERSION=0 +CONFIG_AS_IS_GNU=y +CONFIG_AS_VERSION=24100 +CONFIG_LD_IS_BFD=y +CONFIG_LD_VERSION=24100 +CONFIG_LLD_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y +CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y +CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y +CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_CC_HAS_ASM_INLINE=y +CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y +CONFIG_PAHOLE_VERSION=0 +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_TABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +# CONFIG_WERROR is not set +CONFIG_LOCALVERSION="-openeuler" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_BUILD_SALT="" +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_LZ4=y +CONFIG_HAVE_KERNEL_ZSTD=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_XZ is not set +# CONFIG_KERNEL_LZO is not set +# CONFIG_KERNEL_LZ4 is not set +# CONFIG_KERNEL_ZSTD is not set +CONFIG_DEFAULT_INIT="" +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_USELIB is not set +CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_IRQ_IPI=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y +CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +# CONFIG_NO_HZ_IDLE is not set +CONFIG_NO_HZ_FULL=y +CONFIG_CONTEXT_TRACKING_USER=y +# CONFIG_CONTEXT_TRACKING_USER_FORCE is not set +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +# CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE is not set +# end of Timers subsystem + +CONFIG_BPF=y +CONFIG_HAVE_EBPF_JIT=y +CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y + +# +# BPF subsystem +# +# CONFIG_BPF_SYSCALL is not set +# CONFIG_BPF_JIT is not set +# end of BPF subsystem + +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_PREEMPT_COUNT=y +# CONFIG_PREEMPT_DYNAMIC is not set + +# +# CPU/Task time and stats accounting +# +CONFIG_VIRT_CPU_ACCOUNTING=y +CONFIG_VIRT_CPU_ACCOUNTING_GEN=y +# CONFIG_IRQ_TIME_ACCOUNTING is not set +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +CONFIG_RCU_EXPERT=y +CONFIG_TREE_SRCU=y +# CONFIG_FORCE_TASKS_RCU is not set +# CONFIG_FORCE_TASKS_RUDE_RCU is not set +# CONFIG_FORCE_TASKS_TRACE_RCU is not set +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_RCU_FANOUT=64 +CONFIG_RCU_FANOUT_LEAF=16 +CONFIG_RCU_NOCB_CPU=y +# CONFIG_RCU_NOCB_CPU_DEFAULT_ALL is not set +# CONFIG_RCU_LAZY is not set +# CONFIG_RCU_DOUBLE_CHECK_CB_TIME is not set +# end of RCU Subsystem + +# CONFIG_IKCONFIG is not set +# CONFIG_IKHEADERS is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +# CONFIG_PRINTK_INDEX is not set +CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y +CONFIG_CC_HAS_INT128=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_GCC10_NO_ARRAY_BOUNDS=y +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_ARCH_SUPPORTS_INT128=y +# CONFIG_NUMA_BALANCING is not set +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +# CONFIG_CGROUP_FAVOR_DYNMODS is not set +CONFIG_MEMCG=y +# CONFIG_MEMCG_V1_RECLAIM is not set +# CONFIG_MEMCG_MEMFS_INFO is not set +# CONFIG_MEMCG_OOM_PRIORITY is not set +# CONFIG_MEMCG_SWAP_QOS is not set +CONFIG_MEMCG_KMEM=y +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_WRITEBACK=y +# CONFIG_CGROUP_V1_WRITEBACK is not set +CONFIG_CGROUP_SCHED=y +# CONFIG_QOS_SCHED is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +# CONFIG_RT_GROUP_SCHED is not set +# CONFIG_QOS_SCHED_DYNAMIC_AFFINITY is not set +# CONFIG_CGROUP_PIDS is not set +# CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_FREEZER is not set +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +# CONFIG_CGROUP_MISC is not set +CONFIG_CGROUP_DEBUG=y +# CONFIG_CGROUP_V1_KILL is not set +# CONFIG_CGROUP_V1_STAT is not set +# CONFIG_CGROUP_FILES is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +# CONFIG_TIME_NS is not set +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_STEAL is not set +# CONFIG_CHECKPOINT_RESTORE is not set +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +# CONFIG_RD_LZO is not set +# CONFIG_RD_LZ4 is not set +# CONFIG_RD_ZSTD is not set +CONFIG_INITRAMFS_FILE_METADATA="" +# CONFIG_BOOT_CONFIG is not set +CONFIG_INITRAMFS_PRESERVE_MTIME=y +# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_LD_ORPHAN_WARN=y +CONFIG_LD_ORPHAN_WARN_LEVEL="warn" +CONFIG_SYSCTL=y +CONFIG_HAVE_UID16=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_EXPERT=y +CONFIG_UID16=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +# CONFIG_IO_URING is not set +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_SELFTEST is not set +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_KCMP=y +# CONFIG_RSEQ is not set +CONFIG_CACHESTAT_SYSCALL=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +CONFIG_DEBUG_PERF_USE_VMALLOC=y +# end of Kernel Performance Events And Counters + +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +CONFIG_KABI_RESERVE=y +CONFIG_KABI_SIZE_ALIGN_CHECKS=y + +# +# Kexec and crash features +# +CONFIG_CRASH_CORE=y +CONFIG_KEXEC_CORE=y +CONFIG_KEXEC=y +CONFIG_KEXEC_FILE=y +# CONFIG_KEXEC_SIG is not set +CONFIG_CRASH_DUMP=y +# end of Kexec and crash features +# end of General setup + +CONFIG_ARM64=y +CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y +CONFIG_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_PTE_SHIFT=4 +CONFIG_ARM64_CONT_PMD_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_SMP=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_APPLE is not set +# CONFIG_ARCH_BCM is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_SPARX5 is not set +# CONFIG_ARCH_K3 is not set +# CONFIG_ARCH_LG1K is not set +CONFIG_ARCH_HISI=y +# CONFIG_ARCH_KEEMBAY is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_NXP is not set +# CONFIG_ARCH_MA35 is not set +# CONFIG_ARCH_NPCM is not set +# CONFIG_ARCH_PHYTIUM is not set +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_INTEL_SOCFPGA is not set +# CONFIG_ARCH_STM32 is not set +# CONFIG_ARCH_SYNQUACER is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_VISCONTI is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZYNQMP is not set +# end of Platform selection + +CONFIG_HAVE_LIVEPATCH_WO_FTRACE=y + +# +# Enable Livepatch +# +# end of Enable Livepatch + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +CONFIG_AMPERE_ERRATUM_AC03_CPU_38=y +CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +CONFIG_ARM64_ERRATUM_832075=y +CONFIG_ARM64_ERRATUM_1742098=y +CONFIG_ARM64_ERRATUM_845719=y +# CONFIG_ARM64_ERRATUM_843419 is not set +CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_1024718=y +CONFIG_ARM64_ERRATUM_1418040=y +CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y +CONFIG_ARM64_ERRATUM_1165522=y +CONFIG_ARM64_ERRATUM_1319367=y +CONFIG_ARM64_ERRATUM_1530923=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_ERRATUM_2441007=y +CONFIG_ARM64_ERRATUM_1286807=y +CONFIG_ARM64_ERRATUM_1463225=y +CONFIG_ARM64_ERRATUM_1542419=y +CONFIG_ARM64_ERRATUM_1508412=y +CONFIG_ARM64_ERRATUM_2051678=y +CONFIG_ARM64_ERRATUM_2077057=y +CONFIG_ARM64_ERRATUM_2658417=y +CONFIG_ARM64_WORKAROUND_TSB_FLUSH_FAILURE=y +CONFIG_ARM64_ERRATUM_2054223=y +CONFIG_ARM64_ERRATUM_2067961=y +CONFIG_ARM64_ERRATUM_2441009=y +CONFIG_ARM64_ERRATUM_2645198=y +CONFIG_ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD=y +CONFIG_ARM64_ERRATUM_2966298=y +CONFIG_ARM64_ERRATUM_3117295=y +# CONFIG_CAVIUM_ERRATUM_22375 is not set +CONFIG_CAVIUM_ERRATUM_23144=y +# CONFIG_CAVIUM_ERRATUM_23154 is not set +# CONFIG_CAVIUM_ERRATUM_27456 is not set +# CONFIG_CAVIUM_ERRATUM_30115 is not set +# CONFIG_CAVIUM_TX2_ERRATUM_219 is not set +# CONFIG_FUJITSU_ERRATUM_010001 is not set +CONFIG_HISILICON_ERRATUM_161600802=y +CONFIG_HISILICON_ERRATUM_162100125=y +# CONFIG_HISILICON_ERRATUM_1980005 is not set +CONFIG_HISILICON_ERRATUM_162100801=y +# CONFIG_HISILICON_ERRATUM_162102203 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set +# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set +CONFIG_NVIDIA_CARMEL_CNP_ERRATUM=y +CONFIG_ROCKCHIP_ERRATUM_3588001=y +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y +CONFIG_HISILICON_ERRATUM_HIP08_RU_PREFETCH=y +# CONFIG_HISILICON_HIP08_RU_PREFETCH_DEFAULT_OFF is not set +# end of ARM errata workarounds via the alternatives framework + +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +CONFIG_ARM64_VA_BITS_39=y +# CONFIG_ARM64_VA_BITS_48 is not set +CONFIG_ARM64_VA_BITS=39 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_SCHED_MC is not set +# CONFIG_SCHED_CLUSTER is not set +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=64 +CONFIG_HOTPLUG_CPU=y +# CONFIG_ARM64_BOOTPARAM_HOTPLUG_CPU0 is not set +CONFIG_NUMA=y +CONFIG_NODES_SHIFT=4 +# CONFIG_NUMA_AWARE_SPINLOCKS is not set +# CONFIG_ARCH_CUSTOM_NUMA_DISTANCE is not set +# CONFIG_HZ_100 is not set +# CONFIG_HZ_250 is not set +# CONFIG_HZ_300 is not set +CONFIG_HZ_1000=y +CONFIG_HZ=1000 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_ARCH_LLC_128_LINE_SIZE=y +CONFIG_CC_HAVE_SHADOW_CALL_STACK=y +# CONFIG_PARAVIRT is not set +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +CONFIG_ARCH_SUPPORTS_KEXEC=y +CONFIG_ARCH_SUPPORTS_KEXEC_FILE=y +CONFIG_ARCH_SELECTS_KEXEC_FILE=y +CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y +CONFIG_ARCH_SUPPORTS_KEXEC_IMAGE_VERIFY_SIG=y +CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y +CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_TRANS_TABLE=y +# CONFIG_XEN is not set +CONFIG_ARCH_FORCE_MAX_ORDER=10 +# CONFIG_UNMAP_KERNEL_AT_EL0 is not set +CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y +# CONFIG_RODATA_FULL_DEFAULT_ENABLED is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set +# CONFIG_ARM64_TAGGED_ADDR_ABI is not set +CONFIG_AARCH32_EL0=y +CONFIG_KUSER_HELPERS=y +# CONFIG_COMPAT_ALIGNMENT_FIXUPS is not set +# CONFIG_COMPAT_TASK_SIZE is not set +# CONFIG_ARMV8_DEPRECATED is not set + +# +# ARMv8.1 architectural features +# +# CONFIG_ARM64_HW_AFDBM is not set +# CONFIG_ARM64_PAN is not set +CONFIG_AS_HAS_LSE_ATOMICS=y +# CONFIG_ARM64_USE_LSE_ATOMICS is not set +# end of ARMv8.1 architectural features + +# +# ARMv8.2 architectural features +# +CONFIG_AS_HAS_ARMV8_2=y +CONFIG_AS_HAS_SHA3=y +# CONFIG_ARM64_PMEM is not set +# CONFIG_ARM64_RAS_EXTN is not set +# CONFIG_ARM64_CNP is not set +# end of ARMv8.2 architectural features + +# +# ARMv8.3 architectural features +# +CONFIG_ARM64_PTR_AUTH=y +CONFIG_ARM64_PTR_AUTH_KERNEL=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y +CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y +CONFIG_AS_HAS_ARMV8_3=y +CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y +CONFIG_AS_HAS_LDAPR=y +# end of ARMv8.3 architectural features + +# +# ARMv8.4 architectural features +# +# CONFIG_ARM64_AMU_EXTN is not set +CONFIG_AS_HAS_ARMV8_4=y +CONFIG_ARM64_TLB_RANGE=y +# CONFIG_ARM64_MPAM is not set +# end of ARMv8.4 architectural features + +# +# ARMv8.5 architectural features +# +CONFIG_AS_HAS_ARMV8_5=y +# CONFIG_ARM64_BTI is not set +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y +CONFIG_ARM64_E0PD=y +CONFIG_ARM64_AS_HAS_MTE=y +# end of ARMv8.5 architectural features + +# +# ARMv8.6 architectural features +# +CONFIG_ARM64_TWED=y +# end of ARMv8.6 architectural features + +# +# ARMv8.7 architectural features +# +# end of ARMv8.7 architectural features + +# +# ARMv8.8 architectural features +# +CONFIG_ARM64_NMI=y +# end of ARMv8.8 architectural features + +CONFIG_ARM64_SVE=y +CONFIG_ARM64_SME=y +# CONFIG_ARM64_PSEUDO_NMI is not set +# CONFIG_RELOCATABLE is not set +# CONFIG_RANDOMIZE_BASE is not set +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_STACKPROTECTOR_PER_TASK=y +# CONFIG_CLEAR_USER_WORKAROUND is not set +# end of Kernel Features + +# +# Boot options +# +# CONFIG_ARM64_ACPI_PARKING_PROTOCOL is not set +CONFIG_CMDLINE="" +CONFIG_EFI_STUB=y +CONFIG_EFI=y +CONFIG_DMI=y +# end of Boot options + +CONFIG_COMPAT=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +# CONFIG_HIBERNATION is not set +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_USERSPACE_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# end of Power management options + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set + +# +# ARM CPU Idle Drivers +# +# CONFIG_ARM_PSCI_CPUIDLE is not set +# end of ARM CPU Idle Drivers +# end of CPU Idle + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set +# end of CPU Frequency scaling +# end of CPU Power Management + +CONFIG_ARCH_SUPPORTS_ACPI=y +CONFIG_ACPI=y +CONFIG_ACPI_GENERIC_GSI=y +CONFIG_ACPI_CCA_REQUIRED=y +# CONFIG_ACPI_DEBUGGER is not set +CONFIG_ACPI_SPCR_TABLE=y +# CONFIG_ACPI_FPDT is not set +# CONFIG_ACPI_EC_DEBUGFS is not set +CONFIG_ACPI_AC=y +CONFIG_ACPI_BATTERY=y +CONFIG_ACPI_BUTTON=y +CONFIG_ACPI_VIDEO=m +CONFIG_ACPI_FAN=y +# CONFIG_ACPI_TAD is not set +# CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_PROCESSOR_IDLE=y +CONFIG_ACPI_MCFG=y +CONFIG_ACPI_PROCESSOR=y +CONFIG_ACPI_THERMAL=y +CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y +CONFIG_ACPI_TABLE_UPGRADE=y +# CONFIG_ACPI_DEBUG is not set +# CONFIG_ACPI_PCI_SLOT is not set +CONFIG_ACPI_CONTAINER=y +# CONFIG_ACPI_HOTPLUG_MEMORY is not set +# CONFIG_ACPI_HED is not set +# CONFIG_ACPI_CUSTOM_METHOD is not set +# CONFIG_ACPI_BGRT is not set +CONFIG_ACPI_REDUCED_HARDWARE_ONLY=y +CONFIG_ACPI_NUMA=y +# CONFIG_ACPI_HMAT is not set +CONFIG_HAVE_ACPI_APEI=y +# CONFIG_ACPI_APEI is not set +# CONFIG_ACPI_CONFIGFS is not set +# CONFIG_ACPI_PFRUT is not set +CONFIG_ACPI_IORT=y +CONFIG_ACPI_GTDT=y +CONFIG_ACPI_APMT=y +CONFIG_ACPI_PPTT=y +# CONFIG_ACPI_FFH is not set +# CONFIG_PMIC_OPREGION is not set +CONFIG_ACPI_PRMT=y +CONFIG_HAVE_KVM=y +# CONFIG_KVM_HISI_VIRT is not set +CONFIG_VIRTUALIZATION=y +# CONFIG_KVM is not set +# CONFIG_KVM_ARM_MULTI_LPI_TRANSLATE_CACHE is not set +CONFIG_SELFDECOMPRESS_ZIMAGE=y + +# +# zImage support selfdecompre features +# +# CONFIG_SELFDECOMPRESS_ZIMAGE_GZIP is not set +CONFIG_SELFDECOMPRESS_ZIMAGE_XZ=y +# CONFIG_SELFDECOMPRESS_ZIMAGE_LZ4 is not set +# CONFIG_SELFDECOMPRESS_ZIMAGE_LZMA is not set +# CONFIG_SELFDECOMPRESS_ZIMAGE_LZO is not set +# CONFIG_ZIMAGE_2M_TEXT_OFFSET is not set +# end of zImage support selfdecompre features + +CONFIG_CPU_MITIGATIONS=y + +# +# General architecture-dependent options +# +CONFIG_HOTPLUG_SMT=y +CONFIG_HOTPLUG_CORE_SYNC=y +CONFIG_HOTPLUG_CORE_SYNC_DEAD=y +CONFIG_KPROBES=y +CONFIG_JUMP_LABEL=y +# CONFIG_STATIC_KEYS_SELFTEST is not set +CONFIG_UPROBES=y +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_KRETPROBES=y +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_KEEPINITRD=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_ARCH_WANTS_NO_INSTR=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_EVENTS_NMI=y +CONFIG_HAVE_HARDLOCKUP_DETECTOR_PERF=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_MMU_GATHER_TABLE_FREE=y +CONFIG_MMU_GATHER_RCU_TABLE_FREE=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_ARCH_HAS_NMI_SAFE_THIS_CPU_OPS=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +# CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_ARCH_STACKLEAK=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_ARCH_SUPPORTS_SHADOW_CALL_STACK=y +# CONFIG_SHADOW_CALL_STACK is not set +CONFIG_ARCH_SUPPORTS_LTO_CLANG=y +CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y +CONFIG_LTO_NONE=y +CONFIG_ARCH_SUPPORTS_CFI_CLANG=y +CONFIG_HAVE_CONTEXT_TRACKING_USER=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOVE_PUD=y +CONFIG_HAVE_MOVE_PMD=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_ARCH_HUGE_VMALLOC=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y +CONFIG_SOFTIRQ_ON_OWN_STACK=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_COMPAT_OLD_SIGACTION=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y +CONFIG_RANDOMIZE_KSTACK_OFFSET=y +# CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT is not set +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_HAVE_ARCH_COMPILER_H=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y +CONFIG_ARCH_USE_MEMREMAP_PROT=y +# CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_HAVE_PREEMPT_DYNAMIC=y +CONFIG_HAVE_PREEMPT_DYNAMIC_KEY=y +CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y +CONFIG_ARCH_HAVE_TRACE_MMIO_ACCESS=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +# +# Profile Guided Optimization (PGO) +# +CONFIG_ARCH_SUPPORTS_PGO_CLANG=y +# end of Profile Guided Optimization (PGO) + +CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_GCC_PLUGINS=y +# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set +CONFIG_FUNCTION_ALIGNMENT_4B=y +CONFIG_FUNCTION_ALIGNMENT=4 +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_DEBUG is not set +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODULE_UNLOAD_TAINT_TRACKING is not set +CONFIG_MODVERSIONS=y +CONFIG_ASM_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +CONFIG_MODULE_COMPRESS_NONE=y +# CONFIG_MODULE_COMPRESS_GZIP is not set +# CONFIG_MODULE_COMPRESS_XZ is not set +# CONFIG_MODULE_COMPRESS_ZSTD is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +CONFIG_MODPROBE_PATH="/sbin/modprobe" +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLOCK_LEGACY_AUTOLOAD=y +CONFIG_BLK_DEV_BSG_COMMON=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_INTEGRITY_T10=y +CONFIG_BLK_DEV_WRITE_MOUNTED=y +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_DEV_THROTTLING is not set +# CONFIG_BLK_WBT is not set +# CONFIG_BLK_CGROUP_IOLATENCY is not set +# CONFIG_BLK_CGROUP_IOCOST is not set +# CONFIG_BLK_CGROUP_IOPRIO is not set +# CONFIG_BLK_DEBUG_FS is not set +# CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set +# CONFIG_BLK_DEV_DETECT_WRITING_PART0 is not set +# CONFIG_BLK_DEV_WRITE_MOUNTED_DUMP is not set +CONFIG_BLK_IO_HUNG_TASK_CHECK=y + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_EFI_PARTITION=y +# end of Partition Types + +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y +CONFIG_BLOCK_HOLDER_DEPRECATED=y +CONFIG_BLK_MQ_STACKING=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=m +# CONFIG_MQ_IOSCHED_KYBER is not set +# CONFIG_IOSCHED_BFQ is not set +# end of IO Schedulers + +CONFIG_ASN1=m +CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK=y +CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_READ_LOCK=y +CONFIG_ARCH_INLINE_READ_LOCK_BH=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_READ_UNLOCK=y +CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_WRITE_LOCK=y +CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_SPIN_TRYLOCK=y +CONFIG_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_INLINE_SPIN_LOCK=y +CONFIG_INLINE_SPIN_LOCK_BH=y +CONFIG_INLINE_SPIN_LOCK_IRQ=y +CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_INLINE_SPIN_UNLOCK_BH=y +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_READ_LOCK=y +CONFIG_INLINE_READ_LOCK_BH=y +CONFIG_INLINE_READ_LOCK_IRQ=y +CONFIG_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_INLINE_READ_UNLOCK=y +CONFIG_INLINE_READ_UNLOCK_BH=y +CONFIG_INLINE_READ_UNLOCK_IRQ=y +CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_WRITE_LOCK=y +CONFIG_INLINE_WRITE_LOCK_BH=y +CONFIG_INLINE_WRITE_LOCK_IRQ=y +CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_INLINE_WRITE_UNLOCK=y +CONFIG_INLINE_WRITE_UNLOCK_BH=y +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +# CONFIG_PID_MAX_PER_NAMESPACE is not set +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y +CONFIG_ARCH_HAVE_ELF_PROT=y +CONFIG_ARCH_USE_GNU_PROPERTY=y +CONFIG_ELFCORE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_SWAP=y +# CONFIG_ZSWAP is not set +CONFIG_ZSMALLOC=m +# CONFIG_ZSMALLOC_STAT is not set +CONFIG_ZSMALLOC_CHAIN_SIZE=8 + +# +# SLAB allocator options +# +# CONFIG_SLAB_DEPRECATED is not set +CONFIG_SLUB=y +# CONFIG_SLUB_TINY is not set +# CONFIG_SLAB_MERGE_DEFAULT is not set +CONFIG_SLAB_FREELIST_RANDOM=y +CONFIG_SLAB_FREELIST_HARDENED=y +# CONFIG_SLUB_STATS is not set +CONFIG_SLUB_CPU_PARTIAL=y +# CONFIG_RANDOM_KMALLOC_CACHES is not set +# end of SLAB allocator options + +CONFIG_SHUFFLE_PAGE_ALLOCATOR=y +# CONFIG_COMPAT_BRK is not set +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP=y +CONFIG_HAVE_FAST_GUP=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_NUMA_KEEP_MEMINFO=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_MEMORY_HOTPLUG=y +# CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE is not set +# CONFIG_MEMORY_HOTREMOVE is not set +CONFIG_MHP_MEMMAP_ON_MEMORY=y +CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_COMPACTION=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +# CONFIG_PAGE_REPORTING is not set +CONFIG_MIGRATION=y +CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y +CONFIG_CONTIG_ALLOC=y +CONFIG_PCP_BATCH_SCALE_MAX=5 +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_MMU_NOTIFIER=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +CONFIG_MEMORY_FAILURE=y +# CONFIG_HWPOISON_INJECT is not set +CONFIG_ARCH_WANTS_THP_SWAP=y +# CONFIG_TRANSPARENT_HUGEPAGE is not set +CONFIG_PGTABLE_HAS_HUGE_LEAVES=y +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y +CONFIG_USE_PERCPU_NUMA_NODE_ID=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +# CONFIG_CMA is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y +CONFIG_ARCH_HAS_PTE_DEVMAP=y +CONFIG_ARCH_HAS_ZONE_DMA_SET=y +# CONFIG_ZONE_DMA is not set +CONFIG_ZONE_DMA32=y +CONFIG_HMM_MIRROR=y +CONFIG_VM_EVENT_COUNTERS=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_TEST is not set +# CONFIG_DMAPOOL_TEST is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +CONFIG_MEMFD_CREATE=y +CONFIG_SECRETMEM=y +# CONFIG_ANON_VMA_NAME is not set +# CONFIG_USERFAULTFD is not set +# CONFIG_LRU_GEN is not set +CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y +CONFIG_PER_VMA_LOCK=y +CONFIG_LOCK_MM_AND_FIND_VMA=y +# CONFIG_ASCEND_FEATURES is not set +# CONFIG_PAGE_CACHE_LIMIT is not set +# CONFIG_CLEAR_FREELIST_PAGE is not set +# CONFIG_MEMORY_RELIABLE is not set +# CONFIG_DYNAMIC_POOL is not set +# CONFIG_ETMEM is not set +# CONFIG_BPF_READAHEAD is not set + +# +# Data Access Monitoring +# +# CONFIG_DAMON is not set +# end of Data Access Monitoring +# end of Memory Management options + +CONFIG_NET=y +CONFIG_COMPAT_NETLINK_MESSAGES=y +CONFIG_NET_INGRESS=y +CONFIG_NET_EGRESS=y +CONFIG_SKB_EXTENSIONS=y + +# +# Networking options +# +CONFIG_PACKET=m +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +CONFIG_AF_UNIX_OOB=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +CONFIG_XFRM=y +CONFIG_XFRM_ALGO=m +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_INTERFACE is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_NET_KEY=m +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_NET_HANDSHAKE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +# CONFIG_IP_FIB_TRIE_STATS is not set +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +# CONFIG_IP_PNP is not set +CONFIG_NET_IPIP=m +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=m +# CONFIG_IP_MROUTE is not set +CONFIG_SYN_COOKIES=y +# CONFIG_NET_IPVTI is not set +CONFIG_NET_UDP_TUNNEL=m +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +CONFIG_INET_TABLE_PERTURB_ORDER=16 +CONFIG_INET_TUNNEL=m +CONFIG_INET_DIAG=m +CONFIG_INET_TCP_DIAG=m +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_IPV6_VTI is not set +# CONFIG_IPV6_SIT is not set +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_IPV6_RPL_LWTUNNEL is not set +# CONFIG_IPV6_IOAM6_LWTUNNEL is not set +CONFIG_NETLABEL=y +# CONFIG_MPTCP is not set +CONFIG_NETWORK_SECMARK=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_EGRESS=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NETFILTER_NETLINK_OSF is not set +CONFIG_NF_CONNTRACK=m +# CONFIG_NF_LOG_SYSLOG is not set +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_SECMARK is not set +# CONFIG_NF_CONNTRACK_ZONES is not set +CONFIG_NF_CONNTRACK_PROCFS=y +# CONFIG_NF_CONNTRACK_EVENTS is not set +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CONNTRACK_LABELS is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +# CONFIG_NF_CONNTRACK_FTP is not set +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +CONFIG_NF_NAT=m +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=m +# CONFIG_NETFILTER_XTABLES_COMPAT is not set + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LOG is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=m +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +# CONFIG_NETFILTER_XT_TARGET_MASQUERADE is not set +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_SECMARK is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set + +# +# Xtables matches +# +# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +# CONFIG_NETFILTER_XT_MATCH_STATE is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# end of Core Netfilter Configuration + +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +# CONFIG_NF_SOCKET_IPV4 is not set +# CONFIG_NF_TPROXY_IPV4 is not set +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +# CONFIG_NF_LOG_IPV4 is not set +CONFIG_NF_REJECT_IPV4=m +CONFIG_IP_NF_IPTABLES=m +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=m +# CONFIG_IP_NF_TARGET_MASQUERADE is not set +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +# CONFIG_IP_NF_MANGLE is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_SECURITY is not set +# CONFIG_IP_NF_ARPTABLES is not set +# end of IP: Netfilter Configuration + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_SOCKET_IPV6 is not set +# CONFIG_NF_TPROXY_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=m +# CONFIG_NF_LOG_IPV6 is not set +CONFIG_IP6_NF_IPTABLES=m +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_EUI64 is not set +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_MH is not set +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_MATCH_SRH is not set +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +# CONFIG_IP6_NF_TARGET_SYNPROXY is not set +# CONFIG_IP6_NF_MANGLE is not set +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IP6_NF_SECURITY is not set +CONFIG_IP6_NF_NAT=m +# CONFIG_IP6_NF_TARGET_MASQUERADE is not set +# CONFIG_IP6_NF_TARGET_NPT is not set +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=m +# CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +CONFIG_TIPC=m +CONFIG_TIPC_MEDIA_UDP=y +# CONFIG_TIPC_CRYPTO is not set +# CONFIG_TIPC_DIAG is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_GARP=m +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +# CONFIG_VLAN_8021Q_MVRP is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +CONFIG_DCB=y +CONFIG_DNS_RESOLVER=m +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_L3_MASTER_DEV is not set +# CONFIG_QRTR is not set +# CONFIG_NET_NCSI is not set +CONFIG_PCPU_DEV_REFCNT=y +CONFIG_MAX_SKB_FRAGS=17 +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_DROP_MONITOR is not set +# end of Network testing +# end of Networking options + +# CONFIG_HAMRADIO is not set +CONFIG_CAN=m +CONFIG_CAN_RAW=m +CONFIG_CAN_BCM=m +CONFIG_CAN_GW=m +# CONFIG_CAN_J1939 is not set +# CONFIG_CAN_ISOTP is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +# CONFIG_MCTP is not set +CONFIG_FIB_RULES=y +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_SPY=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +CONFIG_CFG80211_CERTIFICATION_ONUS=y +# CONFIG_CFG80211_REQUIRE_SIGNED_REGDB is not set +# CONFIG_CFG80211_REG_CELLULAR_HINTS is not set +# CONFIG_CFG80211_REG_RELAX_NO_IR is not set +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +# CONFIG_CFG80211_CRDA_SUPPORT is not set +CONFIG_CFG80211_WEXT=y +CONFIG_LIB80211=m +CONFIG_LIB80211_CRYPT_WEP=m +CONFIG_LIB80211_CRYPT_CCMP=m +CONFIG_LIB80211_CRYPT_TKIP=m +# CONFIG_LIB80211_DEBUG is not set +# CONFIG_MAC80211 is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_RFKILL is not set +CONFIG_NET_9P=y +CONFIG_NET_9P_FD=y +CONFIG_NET_9P_VIRTIO=y +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_DEVLINK=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_POOL_STATS=y +CONFIG_FAILOVER=y +# CONFIG_ETHTOOL_NETLINK is not set +CONFIG_NETACC_BPF=y +CONFIG_NETACC_TERRACE=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +CONFIG_HAVE_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCIEPORTBUS=y +CONFIG_HOTPLUG_PCI_PCIE=y +CONFIG_PCIEAER=y +# CONFIG_PCIEAER_INJECT is not set +# CONFIG_PCIE_ECRC is not set +CONFIG_PCIEASPM=y +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_PCIE_DPC is not set +# CONFIG_PCIE_PTM is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_PF_STUB is not set +CONFIG_PCI_ATS=y +CONFIG_PCI_ECAM=y +CONFIG_PCI_IOV=y +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +CONFIG_PCI_LABEL=y +# CONFIG_PCI_DYNAMIC_OF_NODES is not set +# CONFIG_PCIE_BUS_TUNE_OFF is not set +CONFIG_PCIE_BUS_DEFAULT=y +# CONFIG_PCIE_BUS_SAFE is not set +# CONFIG_PCIE_BUS_PERFORMANCE is not set +# CONFIG_PCIE_BUS_PEER2PEER is not set +# CONFIG_VGA_ARB is not set +CONFIG_HOTPLUG_PCI=y +# CONFIG_HOTPLUG_PCI_ACPI is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set + +# +# PCI controller drivers +# +# CONFIG_PCIE_ALTERA is not set +# CONFIG_PCI_HOST_THUNDER_PEM is not set +# CONFIG_PCI_HOST_THUNDER_ECAM is not set +# CONFIG_PCI_FTPCI100 is not set +CONFIG_PCI_HOST_COMMON=y +CONFIG_PCI_HOST_GENERIC=y +# CONFIG_PCIE_MICROCHIP_HOST is not set +# CONFIG_PCI_XGENE is not set +# CONFIG_PCIE_XILINX is not set + +# +# Cadence-based PCIe controllers +# +# CONFIG_PCIE_CADENCE_PLAT_HOST is not set +# CONFIG_PCI_J721E_HOST is not set +# end of Cadence-based PCIe controllers + +# +# DesignWare-based PCIe controllers +# +# CONFIG_PCIE_AL is not set +# CONFIG_PCI_MESON is not set +# CONFIG_PCI_HISI is not set +# CONFIG_PCIE_KIRIN is not set +# CONFIG_PCIE_HISI_STB is not set +# CONFIG_PCIE_DW_PLAT_HOST is not set +# end of DesignWare-based PCIe controllers + +# +# Mobiveil-based PCIe controllers +# +# end of Mobiveil-based PCIe controllers +# end of PCI controller drivers + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +# CONFIG_CXL_BUS is not set +# CONFIG_PCCARD is not set +# CONFIG_RAPIDIO is not set + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_DEVTMPFS_SAFE is not set +CONFIG_STANDALONE=y +# CONFIG_PREVENT_FIRMWARE_BUILD is not set + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER is not set +# CONFIG_FW_LOADER_COMPRESS is not set +# CONFIG_FW_CACHE is not set +# CONFIG_FW_UPLOAD is not set +# end of Firmware loader + +CONFIG_ALLOW_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_DEVICES=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_ARCH_NUMA=y +# CONFIG_FW_DEVLINK_SYNC_STATE_TIMEOUT is not set +# end of Generic Driver Options + +# +# Bus devices +# +CONFIG_ARM_CCI=y +CONFIG_ARM_CCI400_COMMON=y +# CONFIG_BRCMSTB_GISB_ARB is not set +# CONFIG_MOXTET is not set +# CONFIG_HISILICON_LPC is not set +# CONFIG_VEXPRESS_CONFIG is not set +# CONFIG_MHI_BUS is not set +# CONFIG_MHI_BUS_EP is not set +# end of Bus devices + +# +# Cache Drivers +# +# end of Cache Drivers + +# CONFIG_CONNECTOR is not set + +# +# Firmware Drivers +# + +# +# ARM System Control and Management Interface Protocol +# +# CONFIG_ARM_SCMI_PROTOCOL is not set +# end of ARM System Control and Management Interface Protocol + +# CONFIG_FIRMWARE_MEMMAP is not set +# CONFIG_DMIID is not set +# CONFIG_DMI_SYSFS is not set +# CONFIG_ISCSI_IBFT is not set +# CONFIG_FW_CFG_SYSFS is not set +CONFIG_SYSFB=y +# CONFIG_SYSFB_SIMPLEFB is not set +# CONFIG_ARM_FFA_TRANSPORT is not set +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +CONFIG_EFI_ESRT=y +CONFIG_EFI_PARAMS_FROM_FDT=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_GENERIC_STUB=y +CONFIG_EFI_ZBOOT=y +CONFIG_EFI_ARMSTUB_DTB_LOADER=y +# CONFIG_EFI_BOOTLOADER_CONTROL is not set +# CONFIG_EFI_CAPSULE_LOADER is not set +# CONFIG_EFI_TEST is not set +# CONFIG_RESET_ATTACK_MITIGATION is not set +# CONFIG_EFI_DISABLE_PCI_DMA is not set +CONFIG_EFI_EARLYCON=y +CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y +# CONFIG_EFI_DISABLE_RUNTIME is not set +# CONFIG_EFI_COCO_SECRET is not set +# end of EFI (Extensible Firmware Interface) Support + +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y +# CONFIG_ARM_SMCCC_SOC_ID is not set + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +# CONFIG_GNSS is not set +CONFIG_MTD=m +# CONFIG_MTD_TESTS is not set + +# +# Partition parsers +# +# CONFIG_MTD_AR7_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=m +CONFIG_MTD_OF_PARTS=m +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=m +CONFIG_MTD_BLOCK=m +# CONFIG_MTD_BLOCK_RO is not set + +# +# Note that in some cases UBI block is preferred. See MTD_UBI_BLOCK. +# +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=m +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=m +CONFIG_MTD_CFI_ADV_OPTIONS=y +# CONFIG_MTD_CFI_NOSWAP is not set +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +CONFIG_MTD_CFI_LE_BYTE_SWAP=y +CONFIG_MTD_CFI_GEOMETRY=y +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +CONFIG_MTD_MAP_BANK_WIDTH_16=y +CONFIG_MTD_MAP_BANK_WIDTH_32=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=m +CONFIG_MTD_CFI_AMDSTD=m +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=m +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_PHYSMAP=m +# CONFIG_MTD_PHYSMAP_COMPAT is not set +CONFIG_MTD_PHYSMAP_OF=y +# CONFIG_MTD_PHYSMAP_VERSATILE is not set +# CONFIG_MTD_PHYSMAP_GEMINI is not set +# CONFIG_MTD_PHYSMAP_GPIO_ADDR is not set +# CONFIG_MTD_PCI is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_MCHP48L640 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +CONFIG_MTD_PHRAM=m +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +# +# NAND +# +CONFIG_MTD_NAND_CORE=m +# CONFIG_MTD_ONENAND is not set +CONFIG_MTD_RAW_NAND=m + +# +# Raw/parallel NAND flash controllers +# +# CONFIG_MTD_NAND_DENALI_PCI is not set +# CONFIG_MTD_NAND_DENALI_DT is not set +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_BRCMNAND is not set +# CONFIG_MTD_NAND_HISI504 is not set +# CONFIG_MTD_NAND_MXIC is not set +# CONFIG_MTD_NAND_GPIO is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_NAND_CADENCE is not set +# CONFIG_MTD_NAND_ARASAN is not set +# CONFIG_MTD_NAND_INTEL_LGM is not set + +# +# Misc +# +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_RICOH is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# ECC engine support +# +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set +# CONFIG_MTD_NAND_ECC_SW_BCH is not set +# CONFIG_MTD_NAND_ECC_MXIC is not set +# end of ECC engine support +# end of NAND + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + +# CONFIG_MTD_SPI_NOR is not set +CONFIG_MTD_UBI=m +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_FASTMAP=y +# CONFIG_MTD_UBI_GLUEBI is not set +# CONFIG_MTD_UBI_BLOCK is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +CONFIG_OF_NUMA=y +# CONFIG_PARPORT is not set +CONFIG_PNP=y +CONFIG_PNP_DEBUG_MESSAGES=y + +# +# Protocols +# +CONFIG_PNPACPI=y +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +CONFIG_CDROM=y +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +CONFIG_ZRAM=m +CONFIG_ZRAM_DEF_COMP_LZORLE=y +# CONFIG_ZRAM_DEF_COMP_LZ4 is not set +# CONFIG_ZRAM_DEF_COMP_LZO is not set +CONFIG_ZRAM_DEF_COMP="lzo-rle" +# CONFIG_ZRAM_WRITEBACK is not set +# CONFIG_ZRAM_MEMORY_TRACKING is not set +# CONFIG_ZRAM_MULTI_COMP is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=30720 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_VIRTIO_BLK=y +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_UBLK is not set + +# +# NVME Support +# +CONFIG_NVME_CORE=y +CONFIG_BLK_DEV_NVME=y +CONFIG_NVME_MULTIPATH=y +CONFIG_NVME_VERBOSE_ERRORS=y +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TCP is not set +# end of NVME Support + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +# CONFIG_SRAM is not set +# CONFIG_DW_XDATA_PCIE is not set +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_XILINX_SDFEC is not set +# CONFIG_HISI_HIKEY_USB is not set +# CONFIG_OPEN_DICE is not set +# CONFIG_VCPU_STALL_DETECTOR is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +# end of EEPROM support + +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set +# CONFIG_VMWARE_VMCI is not set +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_BCM_VK is not set +# CONFIG_MISC_ALCOR_PCI is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set +# CONFIG_PVPANIC is not set +# end of Misc devices + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +CONFIG_RAID_ATTRS=y +CONFIG_SCSI_COMMON=y +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +CONFIG_BLK_DEV_SR=y +CONFIG_CHR_DEV_SG=m +CONFIG_BLK_DEV_BSG=y +# CONFIG_CHR_DEV_SCH is not set +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +CONFIG_SCSI_ISCSI_ATTRS=y +CONFIG_SCSI_SAS_ATTRS=y +CONFIG_SCSI_SAS_LIBSAS=y +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_HOST_SMP=y +# CONFIG_SCSI_SRP_ATTRS is not set +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +CONFIG_SCSI_HISI_SAS=y +CONFIG_SCSI_HISI_SAS_PCI=y +# CONFIG_SCSI_HISI_SAS_DEBUGFS_DEFAULT_ENABLE is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +CONFIG_MEGARAID_SAS=y +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPI3MR is not set +# CONFIG_SCSI_3SNIC_SSSRAID is not set +# CONFIG_SCSI_SMARTPQI is not set +# CONFIG_SCSI_HISI_RAID is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_BUSLOGIC is not set +# CONFIG_SCSI_MYRB is not set +# CONFIG_SCSI_MYRS is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FDOMAIN_PCI is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +CONFIG_SCSI_VIRTIO=m +CONFIG_SCSI_DH=y +CONFIG_SCSI_DH_RDAC=m +CONFIG_SCSI_DH_HP_SW=m +CONFIG_SCSI_DH_EMC=m +CONFIG_SCSI_DH_ALUA=m +# end of SCSI device support + +CONFIG_ATA=y +CONFIG_SATA_HOST=y +CONFIG_PATA_TIMINGS=y +CONFIG_ATA_VERBOSE_ERROR=y +# CONFIG_ATA_FORCE is not set +CONFIG_ATA_ACPI=y +# CONFIG_SATA_ZPODD is not set +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=y +CONFIG_SATA_MOBILE_LPM_POLICY=0 +CONFIG_SATA_AHCI_PLATFORM=m +# CONFIG_AHCI_DWC is not set +# CONFIG_AHCI_CEVA is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_ZHAOXIN is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_OF_PLATFORM is not set +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_PATA_ACPI is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +CONFIG_MD_AUTODETECT=y +CONFIG_MD_BITMAP_FILE=y +# CONFIG_MD_LINEAR is not set +CONFIG_MD_RAID0=y +CONFIG_MD_RAID1=y +CONFIG_MD_RAID10=y +CONFIG_MD_RAID456=y +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set +# CONFIG_BCACHE is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +# CONFIG_DM_UNSTRIPED is not set +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_THIN_PROVISIONING is not set +# CONFIG_DM_CACHE is not set +# CONFIG_DM_WRITECACHE is not set +# CONFIG_DM_EBS is not set +# CONFIG_DM_ERA is not set +# CONFIG_DM_CLONE is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_RAID is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_DUST is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_DM_LOG_WRITES is not set +# CONFIG_DM_INTEGRITY is not set +# CONFIG_DM_AUDIT is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + +CONFIG_NETDEVICES=y +CONFIG_MII=m +CONFIG_NET_CORE=y +CONFIG_BONDING=m +# CONFIG_DUMMY is not set +# CONFIG_WIREGUARD is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set +# CONFIG_MACVLAN is not set +# CONFIG_IPVLAN is not set +# CONFIG_VXLAN is not set +# CONFIG_GENEVE is not set +# CONFIG_BAREUDP is not set +# CONFIG_GTP is not set +# CONFIG_AMT is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +CONFIG_TUN=m +# CONFIG_TUN_VNET_CROSS_LE is not set +# CONFIG_VETH is not set +CONFIG_VIRTIO_NET=y +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set +CONFIG_ETHERNET=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_3SNIC is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set +# CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_ALTERA_TSE is not set +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_ARC is not set +CONFIG_NET_VENDOR_ASIX=y +# CONFIG_SPI_AX88796C is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +CONFIG_NET_VENDOR_CADENCE=y +# CONFIG_MACB is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_NET_VENDOR_CORTINA is not set +CONFIG_NET_VENDOR_DAVICOM=y +# CONFIG_DM9051 is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +CONFIG_NET_VENDOR_ENGLEDER=y +# CONFIG_TSNEP is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +CONFIG_NET_VENDOR_FUNGIBLE=y +# CONFIG_FUN_ETH is not set +# CONFIG_NET_VENDOR_GOOGLE is not set +CONFIG_NET_VENDOR_HISILICON=y +# CONFIG_HIX5HD2_GMAC is not set +# CONFIG_HISI_FEMAC is not set +# CONFIG_HIP04_ETH is not set +CONFIG_HNS_MDIO=y +CONFIG_HNS=y +CONFIG_HNS_DSAF=y +CONFIG_HNS_ENET=y +CONFIG_HNS3=y +CONFIG_HNS3_HCLGE=y +CONFIG_HNS3_DCB=y +CONFIG_HNS3_HCLGEVF=y +CONFIG_HNS3_ENET=y +CONFIG_NET_VENDOR_HUAWEI=y +CONFIG_HINIC=y +# CONFIG_HINIC3 is not set +# CONFIG_BMA is not set +CONFIG_NET_VENDOR_I825XX=y +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +# CONFIG_E1000 is not set +# CONFIG_E1000E is not set +CONFIG_IGB=y +# CONFIG_IGBVF is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGBEVF is not set +# CONFIG_I40E is not set +# CONFIG_I40EVF is not set +# CONFIG_ICE is not set +# CONFIG_FM10K is not set +# CONFIG_IGC is not set +CONFIG_NET_VENDOR_MUCSE=y +# CONFIG_MXGBE is not set +# CONFIG_MXGBEVF is not set +# CONFIG_MXGBEM is not set +# CONFIG_MGBE is not set +# CONFIG_MGBEVF is not set +CONFIG_NET_VENDOR_YUNSILICON=y +# CONFIG_YUNSILICON_XSC_PCI is not set +# CONFIG_JME is not set +CONFIG_NET_VENDOR_ADI=y +CONFIG_NET_VENDOR_LITEX=y +# CONFIG_LITEX_LITEETH is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MICROSEMI is not set +CONFIG_NET_VENDOR_MICROSOFT=y +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NI is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETERION is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_ETHOC is not set +# CONFIG_NET_VENDOR_PACKET_ENGINES is not set +# CONFIG_NET_VENDOR_PENSANDO is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_BROCADE is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_SOCIONEXT is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +CONFIG_NET_VENDOR_VERTEXCOM=y +# CONFIG_MSE102X is not set +# CONFIG_NET_VENDOR_VIA is not set +CONFIG_NET_VENDOR_WANGXUN=y +# CONFIG_NGBE is not set +# CONFIG_TXGBE is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_XILINX is not set +CONFIG_NET_VENDOR_BZWX=y +# CONFIG_NCE is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_NET_SB1000 is not set +CONFIG_PHYLINK=m +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +CONFIG_FIXED_PHY=y +# CONFIG_SFP is not set + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_ADIN_PHY is not set +# CONFIG_ADIN1100_PHY is not set +# CONFIG_AQUANTIA_PHY is not set +CONFIG_AX88796B_PHY=m +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM54140_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM84881_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_MARVELL_10G_PHY is not set +# CONFIG_MARVELL_88Q2XXX_PHY is not set +# CONFIG_MARVELL_88X2222_PHY is not set +# CONFIG_MAXLINEAR_GPHY is not set +# CONFIG_MEDIATEK_GE_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_MICROCHIP_T1S_PHY is not set +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_MICROCHIP_T1_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +# CONFIG_MOTORCOMM_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_NXP_CBTX_PHY is not set +# CONFIG_NXP_C45_TJA11XX_PHY is not set +# CONFIG_NCN26000_PHY is not set +# CONFIG_QSEMI_PHY is not set +CONFIG_REALTEK_PHY=y +# CONFIG_RENESAS_PHY is not set +# CONFIG_ROCKCHIP_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_DP83869_PHY is not set +# CONFIG_DP83TD510_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PSE_CONTROLLER is not set +CONFIG_CAN_DEV=m +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_VXCAN is not set +CONFIG_CAN_NETLINK=y +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_CAN327 is not set +# CONFIG_CAN_FLEXCAN is not set +# CONFIG_CAN_GRCAN is not set +# CONFIG_CAN_KVASER_PCIEFD is not set +# CONFIG_CAN_SLCAN is not set +# CONFIG_CAN_XILINXCAN is not set +# CONFIG_CAN_C_CAN is not set +# CONFIG_CAN_CC770 is not set +# CONFIG_CAN_CTUCANFD_PCI is not set +# CONFIG_CAN_CTUCANFD_PLATFORM is not set +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_PEAK_PCIEFD is not set +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_SOFTING is not set + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set +# CONFIG_CAN_MCP251XFD is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +# CONFIG_CAN_8DEV_USB is not set +# CONFIG_CAN_EMS_USB is not set +# CONFIG_CAN_ESD_USB is not set +# CONFIG_CAN_ETAS_ES58X is not set +# CONFIG_CAN_F81604 is not set +# CONFIG_CAN_GS_USB is not set +# CONFIG_CAN_KVASER_USB is not set +# CONFIG_CAN_MCBA_USB is not set +# CONFIG_CAN_PEAK_USB is not set +# CONFIG_CAN_UCAN is not set +# end of CAN USB interfaces + +# CONFIG_CAN_DEBUG_DEVICES is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +CONFIG_FWNODE_MDIO=y +CONFIG_OF_MDIO=y +CONFIG_ACPI_MDIO=y +CONFIG_MDIO_DEVRES=y +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MVUSB is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_IPQ4019 is not set +# CONFIG_MDIO_IPQ8064 is not set +# CONFIG_MDIO_THUNDER is not set + +# +# MDIO Multiplexers +# +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set + +# +# PCS device drivers +# +# end of PCS device drivers + +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +CONFIG_USB_NET_DRIVERS=m +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_RTL8152 is not set +# CONFIG_USB_LAN78XX is not set +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_AX88179_178A=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=m +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_NET_CDC_SUBSET_ENABLE=m +CONFIG_USB_NET_CDC_SUBSET=m +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +# CONFIG_USB_NET_AQC111 is not set +CONFIG_USB_RTL8153_ECM=m +CONFIG_WLAN=y +# CONFIG_WLAN_VENDOR_ADMTEK is not set +# CONFIG_WLAN_VENDOR_ATH is not set +# CONFIG_WLAN_VENDOR_ATMEL is not set +# CONFIG_WLAN_VENDOR_BROADCOM is not set +# CONFIG_WLAN_VENDOR_CISCO is not set +# CONFIG_WLAN_VENDOR_INTEL is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +CONFIG_HOSTAP=m +# CONFIG_HOSTAP_FIRMWARE is not set +# CONFIG_HOSTAP_PLX is not set +# CONFIG_HOSTAP_PCI is not set +# CONFIG_HERMES is not set +# CONFIG_WLAN_VENDOR_MARVELL is not set +# CONFIG_WLAN_VENDOR_MEDIATEK is not set +# CONFIG_WLAN_VENDOR_MICROCHIP is not set +CONFIG_WLAN_VENDOR_PURELIFI=y +# CONFIG_WLAN_VENDOR_RALINK is not set +# CONFIG_WLAN_VENDOR_REALTEK is not set +# CONFIG_WLAN_VENDOR_RSI is not set +CONFIG_WLAN_VENDOR_SILABS=y +# CONFIG_WLAN_VENDOR_ST is not set +# CONFIG_WLAN_VENDOR_TI is not set +# CONFIG_WLAN_VENDOR_ZYDAS is not set +# CONFIG_WLAN_VENDOR_QUANTENNA is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_VIRT_WIFI is not set +# CONFIG_WAN is not set + +# +# Wireless WAN +# +# CONFIG_WWAN is not set +# end of Wireless WAN + +# CONFIG_VMXNET3 is not set +# CONFIG_FUJITSU_ES is not set +# CONFIG_NETDEVSIM is not set +CONFIG_NET_FAILOVER=y +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_SPARSEKMAP is not set +# CONFIG_INPUT_MATRIXKMAP is not set +CONFIG_INPUT_VIVALDIFMAP=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1050 is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +# CONFIG_KEYBOARD_CYPRESS_SF is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_SMBUS=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +CONFIG_INPUT_JOYSTICK=y +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_INPUT_MISC=y +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_AMBAKMI is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +CONFIG_LEGACY_TIOCSTI=y +# CONFIG_LDISC_AUTOLOAD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_PNP=y +# CONFIG_SERIAL_8250_16550A_VARIANTS is not set +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PCILIB=y +CONFIG_SERIAL_8250_PCI=y +# CONFIG_SERIAL_8250_EXAR is not set +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set +# CONFIG_SERIAL_8250_PCI1XXXX is not set +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_8250_PERICOM=y +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +# CONFIG_SERIAL_EARLYCON_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SIFIVE is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_FSL_LINFLEXUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_SPRD is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +# CONFIG_NOZOMI is not set +# CONFIG_NULL_TTY is not set +CONFIG_HVC_DRIVER=y +# CONFIG_HVC_DCC is not set +# CONFIG_SERIAL_DEV_BUS is not set +# CONFIG_TTY_PRINTK is not set +CONFIG_VIRTIO_CONSOLE=m +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=m +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_BA431 is not set +# CONFIG_HW_RANDOM_VIRTIO is not set +# CONFIG_HW_RANDOM_HISI is not set +CONFIG_HW_RANDOM_HISTB=m +# CONFIG_HW_RANDOM_CCTRNG is not set +# CONFIG_HW_RANDOM_XIPHERA is not set +CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=m +CONFIG_HW_RANDOM_CN10K=m +# CONFIG_APPLICOM is not set +CONFIG_DEVMEM=y +CONFIG_DEVPORT=y +# CONFIG_TCG_TPM is not set +# CONFIG_XILLYBUS is not set +# CONFIG_XILLYUSB is not set +# end of Character devices + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_ACPI_I2C_OPREGION=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=m +# CONFIG_I2C_MUX is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_AMD_MP2 is not set +# CONFIG_I2C_HIX5HD2 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# ACPI drivers +# +# CONFIG_I2C_SCMI is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_HISI is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_RK3X is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_CP2615 is not set +# CONFIG_I2C_PCI1XXXX is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_MLXCPLD is not set +# CONFIG_I2C_VIRTIO is not set +# end of I2C Hardware Bus support + +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +# CONFIG_I3C is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +# CONFIG_SPI_MEM is not set + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_CADENCE_QUADSPI is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_HISI_KUNPENG is not set +# CONFIG_SPI_HISI_SFC_V3XX is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_MICROCHIP_CORE is not set +# CONFIG_SPI_MICROCHIP_CORE_QSPI is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PCI1XXXX is not set +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_AMD is not set + +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_DYNAMIC=y +# CONFIG_SPMI is not set +# CONFIG_HSI is not set +# CONFIG_PPS is not set + +# +# PTP clock support +# +# CONFIG_PTP_1588_CLOCK is not set +CONFIG_PTP_1588_CLOCK_OPTIONAL=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +# CONFIG_PTP_HISI is not set +# end of PTP clock support + +CONFIG_PINCTRL=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_CY8C95X0 is not set +# CONFIG_PINCTRL_MCP23S08 is not set +# CONFIG_PINCTRL_MICROCHIP_SGPIO is not set +# CONFIG_PINCTRL_OCELOT is not set +# CONFIG_PINCTRL_SINGLE is not set +# CONFIG_PINCTRL_STMFX is not set +# CONFIG_PINCTRL_SX150X is not set + +# +# Renesas pinctrl drivers +# +# end of Renesas pinctrl drivers + +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIO_ACPI=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_CDEV=y +# CONFIG_GPIO_CDEV_V1 is not set +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_AMDPT is not set +# CONFIG_GPIO_CADENCE is not set +CONFIG_GPIO_DWAPB=y +# CONFIG_GPIO_FTGPIO010 is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HISI is not set +# CONFIG_GPIO_HLWD is not set +# CONFIG_GPIO_LOGICVC is not set +# CONFIG_GPIO_MB86S7X is not set +CONFIG_GPIO_PL061=y +# CONFIG_GPIO_SIFIVE is not set +# CONFIG_GPIO_SYSCON is not set +CONFIG_GPIO_XGENE=y +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_AMD_FCH is not set +# end of Memory mapped GPIO drivers + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_FXL6408 is not set +# CONFIG_GPIO_DS4520 is not set +# CONFIG_GPIO_GW_PLD is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCA9570 is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +# end of MFD GPIO expanders + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +# end of USB GPIO expanders + +# +# Virtual GPIO drivers +# +# CONFIG_GPIO_AGGREGATOR is not set +# CONFIG_GPIO_LATCH is not set +# CONFIG_GPIO_MOCKUP is not set +# CONFIG_GPIO_VIRTIO is not set +# CONFIG_GPIO_SIM is not set +# end of Virtual GPIO drivers + +# CONFIG_W1 is not set +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_BRCMSTB is not set +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_HISI is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_XGENE is not set +# CONFIG_POWER_RESET_SYSCON is not set +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +# CONFIG_SYSCON_REBOOT_MODE is not set +# CONFIG_NVMEM_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_IP5XXX_POWER is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_SAMSUNG_SDI is not set +# CONFIG_BATTERY_SBS is not set +# CONFIG_CHARGER_SBS is not set +# CONFIG_BATTERY_BQ27XXX is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_LTC4162L is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_MAX77976 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ2515X is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_BQ25980 is not set +# CONFIG_CHARGER_BQ256XX is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_GOLDFISH is not set +# CONFIG_BATTERY_RT5033 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_BD99954 is not set +# CONFIG_BATTERY_UG3105 is not set +CONFIG_HWMON=m +CONFIG_THERMAL=y +# CONFIG_THERMAL_NETLINK is not set +# CONFIG_THERMAL_STATISTICS is not set +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_OF=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +# CONFIG_CPU_THERMAL is not set +# CONFIG_THERMAL_EMULATION is not set +# CONFIG_THERMAL_MMIO is not set +CONFIG_HISI_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +# CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED is not set +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +# CONFIG_WATCHDOG_SYSFS is not set +# CONFIG_WATCHDOG_HRTIMER_PRETIMEOUT is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_WDAT_WDT is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_XILINX_WINDOW_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +# CONFIG_ARM_SP805_WATCHDOG is not set +# CONFIG_ARM_SBSA_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +# CONFIG_DW_WATCHDOG is not set +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_ARM_SMC_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_HP_WATCHDOG is not set +# CONFIG_MEN_A21_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=m +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_SMPRO is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_BD9571MWV is not set +# CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_CS42L43_I2C is not set +# CONFIG_MFD_MADERA is not set +# CONFIG_MFD_MAX5970 is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_MFD_HI655X_PMIC is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_IQS62X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77541 is not set +# CONFIG_MFD_MAX77620 is not set +# CONFIG_MFD_MAX77650 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77714 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set +# CONFIG_MFD_MT6370 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_MFD_OCELOT is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_NTXEC is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_SY7636A is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT4831 is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RT5120 is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_RK8XX_I2C is not set +# CONFIG_MFD_RK8XX_SPI is not set +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS65219 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS6594_I2C is not set +# CONFIG_MFD_TPS6594_SPI is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_LOCHNAGAR is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_ROHM_BD718XX is not set +# CONFIG_MFD_ROHM_BD71828 is not set +# CONFIG_MFD_ROHM_BD957XMUF is not set +# CONFIG_MFD_STPMIC1 is not set +# CONFIG_MFD_STMFX is not set +# CONFIG_MFD_ATC260X_I2C is not set +# CONFIG_MFD_QCOM_PM8008 is not set +# CONFIG_MFD_INTEL_M10_BMC_SPI is not set +# CONFIG_MFD_RSMU_I2C is not set +# CONFIG_MFD_RSMU_SPI is not set +# end of Multifunction device drivers + +# CONFIG_REGULATOR is not set +# CONFIG_RC_CORE is not set + +# +# CEC support +# +CONFIG_MEDIA_CEC_SUPPORT=y +# CONFIG_CEC_CH7322 is not set +# CONFIG_USB_PULSE8_CEC is not set +# CONFIG_USB_RAINSHADOW_CEC is not set +# end of CEC support + +# CONFIG_MEDIA_SUPPORT is not set + +# +# Graphics support +# +CONFIG_APERTURE_HELPERS=y +CONFIG_SCREEN_INFO=y +CONFIG_VIDEO_CMDLINE=y +CONFIG_VIDEO_NOMODESET=y +# CONFIG_AUXDISPLAY is not set +CONFIG_DRM=y +# CONFIG_DRM_DEBUG_MM is not set +CONFIG_DRM_KMS_HELPER=y +# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set +# CONFIG_DRM_DEBUG_MODESET_LOCK is not set +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +CONFIG_DRM_DISPLAY_HELPER=m +CONFIG_DRM_DISPLAY_DP_HELPER=y +CONFIG_DRM_DISPLAY_HDCP_HELPER=y +CONFIG_DRM_DISPLAY_HDMI_HELPER=y +CONFIG_DRM_TTM=y +CONFIG_DRM_EXEC=m +CONFIG_DRM_BUDDY=m +CONFIG_DRM_VRAM_HELPER=y +CONFIG_DRM_TTM_HELPER=y +CONFIG_DRM_SUBALLOC_HELPER=m +CONFIG_DRM_SCHED=m + +# +# I2C encoder or helper chips +# +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# end of I2C encoder or helper chips + +# +# ARM devices +# +# CONFIG_DRM_HDLCD is not set +# CONFIG_DRM_MALI_DISPLAY is not set +# CONFIG_DRM_KOMEDA is not set +# end of ARM devices + +CONFIG_DRM_RADEON=m +CONFIG_DRM_RADEON_USERPTR=y +CONFIG_DRM_AMDGPU=m +CONFIG_DRM_AMDGPU_SI=y +CONFIG_DRM_AMDGPU_CIK=y +CONFIG_DRM_AMDGPU_USERPTR=y +CONFIG_DRM_AMDGPU_WERROR=y + +# +# ACP (Audio CoProcessor) Configuration +# +CONFIG_DRM_AMD_ACP=y +# end of ACP (Audio CoProcessor) Configuration + +# +# Display Engine Configuration +# +CONFIG_DRM_AMD_DC=y +CONFIG_DRM_AMD_DC_FP=y +CONFIG_DRM_AMD_DC_SI=y +CONFIG_DRM_AMD_SECURE_DISPLAY=y +# end of Display Engine Configuration + +CONFIG_HSA_AMD=y +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_VKMS is not set +# CONFIG_DRM_VMWGFX is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_VIRTIO_GPU is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_ABT_Y030XX067A is not set +# CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_AUO_A030JTN01 is not set +# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set +# CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set +# CONFIG_DRM_PANEL_LG_LB035Q02 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# end of Display Panels + +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_CHIPONE_ICN6211 is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set +# CONFIG_DRM_DISPLAY_CONNECTOR is not set +# CONFIG_DRM_ITE_IT6505 is not set +# CONFIG_DRM_LONTIUM_LT8912B is not set +# CONFIG_DRM_LONTIUM_LT9211 is not set +# CONFIG_DRM_LONTIUM_LT9611 is not set +# CONFIG_DRM_LONTIUM_LT9611UXC is not set +# CONFIG_DRM_ITE_IT66121 is not set +# CONFIG_DRM_LVDS_CODEC is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_PARADE_PS8640 is not set +# CONFIG_DRM_SAMSUNG_DSIM is not set +# CONFIG_DRM_SIL_SII8620 is not set +# CONFIG_DRM_SII902X is not set +# CONFIG_DRM_SII9234 is not set +# CONFIG_DRM_SIMPLE_BRIDGE is not set +# CONFIG_DRM_THINE_THC63LVD1024 is not set +# CONFIG_DRM_TOSHIBA_TC358762 is not set +# CONFIG_DRM_TOSHIBA_TC358764 is not set +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TOSHIBA_TC358768 is not set +# CONFIG_DRM_TOSHIBA_TC358775 is not set +# CONFIG_DRM_TI_DLPC3433 is not set +# CONFIG_DRM_TI_TFP410 is not set +# CONFIG_DRM_TI_SN65DSI83 is not set +# CONFIG_DRM_TI_SN65DSI86 is not set +# CONFIG_DRM_TI_TPD12S015 is not set +# CONFIG_DRM_ANALOGIX_ANX6345 is not set +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +# CONFIG_DRM_ANALOGIX_ANX7625 is not set +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CDNS_MHDP8546 is not set +# end of Display Interface Bridges + +# CONFIG_DRM_LOONGSON is not set +# CONFIG_DRM_ETNAVIV is not set +CONFIG_DRM_HISI_HIBMC=y +# CONFIG_DRM_HISI_KIRIN is not set +# CONFIG_DRM_LOGICVC is not set +# CONFIG_DRM_ARCPGU is not set +# CONFIG_DRM_BOCHS is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_GM12U320 is not set +# CONFIG_DRM_PANEL_MIPI_DBI is not set +# CONFIG_DRM_SIMPLEDRM is not set +# CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9163 is not set +# CONFIG_TINYDRM_ILI9225 is not set +# CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_ILI9486 is not set +# CONFIG_TINYDRM_MI0283QT is not set +# CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_ST7586 is not set +# CONFIG_TINYDRM_ST7735R is not set +# CONFIG_DRM_PL111 is not set +# CONFIG_DRM_LIMA is not set +# CONFIG_DRM_PANFROST is not set +# CONFIG_DRM_TIDSS is not set +# CONFIG_DRM_GUD is not set +# CONFIG_DRM_SSD130X is not set +# CONFIG_DRM_LEGACY is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y + +# +# Frame buffer Devices +# +CONFIG_FB=y +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +CONFIG_FB_EFI=y +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +# CONFIG_FB_LS2K500 is not set +CONFIG_FB_CORE=y +CONFIG_FB_NOTIFY=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_DEVICE=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_IOMEM_FOPS=y +CONFIG_FB_IOMEM_HELPERS=y +CONFIG_FB_SYSMEM_HELPERS=y +CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y +# CONFIG_FB_MODE_HELPERS is not set +CONFIG_FB_TILEBLITTING=y +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=m +# end of Backlight & LCD device support + +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +# end of Console display driver support + +# CONFIG_LOGO is not set +# end of Graphics support + +# CONFIG_DRM_ACCEL is not set +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_MACALLY is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CREATIVE_SB0540 is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EVISION is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_GLORIOUS is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOOGLE_STADIA_FF is not set +# CONFIG_HID_VIVALDI is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_VRC2 is not set +# CONFIG_HID_XIAOMI is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_ITE is not set +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_LETSKETCH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MALTRON is not set +# CONFIG_HID_MAYFLASH is not set +# CONFIG_HID_MEGAWORLD_FF is not set +# CONFIG_HID_REDRAGON is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PXRC is not set +# CONFIG_HID_RAZER is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SEMITEK is not set +# CONFIG_HID_SIGMAMICRO is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_TOPRE is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set +# CONFIG_HID_MCP2221 is not set +# end of Special HID drivers + +# +# HID-BPF support +# +# end of HID-BPF support + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +CONFIG_USB_HIDDEV=y +# end of USB HID support + +# CONFIG_I2C_HID is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +# CONFIG_USB_ULPI_BUS is not set +# CONFIG_USB_CONN_GPIO is not set +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_PCI=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_FEW_INIT_RETRIES is not set +CONFIG_USB_DYNAMIC_MINORS=y +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_PRODUCTLIST is not set +# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set +CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_MON=y + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=y +# CONFIG_USB_XHCI_PCI_RENESAS is not set +CONFIG_USB_XHCI_PLATFORM=m +# CONFIG_USB_XHCI_HISTB is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +# CONFIG_USB_EHCI_FSL is not set +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PCI=y +CONFIG_USB_OHCI_HCD_PLATFORM=m +CONFIG_USB_UHCI_HCD=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set + +# +# USB dual-mode controller drivers +# +# CONFIG_USB_CDNS_SUPPORT is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_DWC3 is not set +# CONFIG_USB_DWC2 is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP210X is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_F8153X is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +CONFIG_USB_SERIAL_MOS7720=y +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +CONFIG_USB_SERIAL_SAFE=y +# CONFIG_USB_SERIAL_SAFE_PADDED is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_OPTION is not set +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_UPD78F0730 is not set +# CONFIG_USB_SERIAL_XR is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set +# CONFIG_USB_ONBOARD_HUB is not set + +# +# USB Physical Layer drivers +# +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_ULPI is not set +# end of USB Physical Layer drivers + +# CONFIG_USB_GADGET is not set +# CONFIG_TYPEC is not set +CONFIG_USB_ROLE_SWITCH=y +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=8 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_ARMMMCI is not set +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MMC_DW is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +# CONFIG_MMC_CQHCI is not set +# CONFIG_MMC_HSQ is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_HCTOSYS is not set +# CONFIG_RTC_SYSTOHC is not set +# CONFIG_RTC_DEBUG is not set +# CONFIG_RTC_NVMEM is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_NCT3018Y is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF85363 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV3032 is not set +# CONFIG_RTC_DRV_RV8803 is not set +# CONFIG_RTC_DRV_SD3078 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set +# CONFIG_RTC_DRV_RX6110 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +CONFIG_RTC_DRV_EFI=y +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +# CONFIG_RTC_DRV_PL031 is not set +# CONFIG_RTC_DRV_CADENCE is not set +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_GOLDFISH is not set +# CONFIG_DMADEVICES is not set + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_MOVE_NOTIFY is not set +# CONFIG_DMABUF_DEBUG is not set +# CONFIG_DMABUF_SELFTESTS is not set +# CONFIG_DMABUF_HEAPS is not set +# CONFIG_DMABUF_SYSFS_STATS is not set +# end of DMABUF options + +CONFIG_UIO=m +# CONFIG_UIO_CIF is not set +# CONFIG_UIO_PDRV_GENIRQ is not set +# CONFIG_UIO_DMEM_GENIRQ is not set +# CONFIG_UIO_AEC is not set +# CONFIG_UIO_SERCOS3 is not set +# CONFIG_UIO_PCI_GENERIC is not set +# CONFIG_UIO_NETX is not set +# CONFIG_UIO_PRUSS is not set +# CONFIG_UIO_MF624 is not set +# CONFIG_VFIO is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO_ANCHOR=y +CONFIG_VIRTIO=y +CONFIG_VIRTIO_PCI_LIB=y +CONFIG_VIRTIO_PCI_LIB_LEGACY=y +CONFIG_VIRTIO_MENU=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +# CONFIG_VIRTIO_BALLOON is not set +# CONFIG_VIRTIO_INPUT is not set +CONFIG_VIRTIO_MMIO=y +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VDPA is not set +# CONFIG_VHOST_MENU is not set + +# +# Microsoft Hyper-V guest support +# +# CONFIG_HYPERV is not set +# end of Microsoft Hyper-V guest support + +# CONFIG_GREYBUS is not set +# CONFIG_COMEDI is not set +# CONFIG_STAGING is not set +# CONFIG_GOLDFISH is not set +# CONFIG_CHROME_PLATFORMS is not set +# CONFIG_MELLANOX_PLATFORM is not set +CONFIG_SURFACE_PLATFORMS=y +# CONFIG_SURFACE_3_POWER_OPREGION is not set +# CONFIG_SURFACE_GPE is not set +# CONFIG_SURFACE_HOTPLUG is not set +# CONFIG_SURFACE_PRO3_BUTTON is not set +CONFIG_HAVE_CLK=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Clock driver for ARM Reference designs +# +# CONFIG_CLK_ICST is not set +# CONFIG_CLK_SP810 is not set +# end of Clock driver for ARM Reference designs + +# CONFIG_LMK04832 is not set +# CONFIG_COMMON_CLK_MAX9485 is not set +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_COMMON_CLK_CS2000_CP is not set +# CONFIG_COMMON_CLK_AXI_CLKGEN is not set +# CONFIG_COMMON_CLK_XGENE is not set +# CONFIG_COMMON_CLK_RS9_PCIE is not set +# CONFIG_COMMON_CLK_SI521XX is not set +# CONFIG_COMMON_CLK_VC3 is not set +# CONFIG_COMMON_CLK_VC5 is not set +# CONFIG_COMMON_CLK_VC7 is not set +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +# CONFIG_COMMON_CLK_HI3516CV300 is not set +# CONFIG_COMMON_CLK_HI3519 is not set +CONFIG_COMMON_CLK_HI3559A=y +# CONFIG_COMMON_CLK_HI3660 is not set +# CONFIG_COMMON_CLK_HI3670 is not set +# CONFIG_COMMON_CLK_HI3798CV200 is not set +CONFIG_COMMON_CLK_HI6220=y +CONFIG_RESET_HISI=y +# CONFIG_XILINX_VCU is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_HWSPINLOCK is not set + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_ACPI=y +CONFIG_TIMER_PROBE=y +CONFIG_CLKSRC_MMIO=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y +CONFIG_ARM_TIMER_SP804=y +CONFIG_ARM_ARCH_TIMER_WORKAROUND_IN_USERSPACE=y +# end of Clock Source drivers + +# CONFIG_MAILBOX is not set +CONFIG_IOMMU_IOVA=y +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y +CONFIG_IOMMU_DEFAULT_DMA_STRICT=y +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y + +# +# Remoteproc drivers +# +# CONFIG_REMOTEPROC is not set +# end of Remoteproc drivers + +# +# Rpmsg drivers +# +# CONFIG_RPMSG_VIRTIO is not set +# end of Rpmsg drivers + +# CONFIG_SOUNDWIRE is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +# end of Amlogic SoC drivers + +# +# Broadcom SoC drivers +# +# CONFIG_SOC_BRCMSTB is not set +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# CONFIG_QUICC_ENGINE is not set +# CONFIG_FSL_RCPM is not set +# end of NXP/Freescale QorIQ SoC drivers + +# +# fujitsu SoC drivers +# +# CONFIG_A64FX_DIAG is not set +# end of fujitsu SoC drivers + +# +# Hisilicon SoC drivers +# +# CONFIG_HISI_HBMCACHE is not set +# end of Hisilicon SoC drivers + +# +# i.MX SoC drivers +# +# end of i.MX SoC drivers + +# +# Enable LiteX SoC Builder specific drivers +# +# CONFIG_LITEX_SOC_CONTROLLER is not set +# end of Enable LiteX SoC Builder specific drivers + +# CONFIG_WPCM450_SOC is not set + +# +# Qualcomm SoC drivers +# +# end of Qualcomm SoC drivers + +# CONFIG_SOC_TI is not set + +# +# Xilinx SoC drivers +# +# end of Xilinx SoC drivers +# end of SOC (System On Chip) specific Drivers + +# CONFIG_PM_DEVFREQ is not set +# CONFIG_EXTCON is not set +# CONFIG_MEMORY is not set +# CONFIG_IIO is not set +# CONFIG_NTB is not set +# CONFIG_PWM is not set + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +# CONFIG_AL_FIC is not set +CONFIG_HISILICON_IRQ_MBIGEN=y +# CONFIG_IRQ_MBIGEN_ENABLE_SPI is not set +# CONFIG_XILINX_INTC is not set +CONFIG_PARTITION_PERCPU=y +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_SIMPLE is not set +# CONFIG_RESET_TI_SYSCON is not set +# CONFIG_RESET_TI_TPS380X is not set +CONFIG_COMMON_RESET_HI3660=y +CONFIG_COMMON_RESET_HI6220=y + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +# CONFIG_PHY_CAN_TRANSCEIVER is not set + +# +# PHY drivers for Broadcom platforms +# +# CONFIG_BCM_KONA_USB2_PHY is not set +# end of PHY drivers for Broadcom platforms + +# CONFIG_PHY_CADENCE_TORRENT is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_CADENCE_DPHY_RX is not set +# CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set +# CONFIG_PHY_HI6220_USB is not set +# CONFIG_PHY_HI3660_USB is not set +# CONFIG_PHY_HI3670_USB is not set +# CONFIG_PHY_HI3670_PCIE is not set +# CONFIG_PHY_HISTB_COMBPHY is not set +# CONFIG_PHY_HISI_INNO_USB2 is not set +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_LAN966X_SERDES is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set +# end of PHY Subsystem + +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +CONFIG_ARM_CCI_PMU=y +CONFIG_ARM_CCI400_PMU=y +# CONFIG_ARM_CCI5xx_PMU is not set +CONFIG_ARM_CCN=y +# CONFIG_ARM_CMN is not set +CONFIG_ARM_PMU=y +CONFIG_ARM_PMU_ACPI=y +# CONFIG_ARM_SMMU_V3_PMU is not set +CONFIG_ARM_PMUV3=y +# CONFIG_ARM_DSU_PMU is not set +# CONFIG_ARM_SPE_PMU is not set +# CONFIG_ARM_DMC620_PMU is not set +# CONFIG_ALIBABA_UNCORE_DRW_PMU is not set +# CONFIG_HISI_PMU is not set +# CONFIG_HISI_PCIE_PMU is not set +# CONFIG_HNS3_PMU is not set +# CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU is not set +# end of Performance monitor support + +CONFIG_RAS=y +CONFIG_RAS_ARM_EVENT_INFO=y +CONFIG_PAGE_EJECT=m +# CONFIG_USB4 is not set + +# +# Android +# +# CONFIG_ANDROID_BINDER_IPC is not set +# end of Android + +# +# Vendor Hooks +# +# CONFIG_VENDOR_HOOKS is not set +# end of Vendor Hooks + +# CONFIG_LIBNVDIMM is not set +CONFIG_DAX=y +# CONFIG_NVMEM is not set + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# CONFIG_HISI_PTT is not set +# end of HW tracing support + +# CONFIG_FPGA is not set +# CONFIG_FSI is not set +# CONFIG_TEE is not set +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set +# CONFIG_INTERCONNECT is not set +# CONFIG_COUNTER is not set +# CONFIG_PECI is not set +# CONFIG_HTE is not set +# CONFIG_CDX_BUS is not set + +# +# CPU Inspect +# +# CONFIG_CPU_INSPECT is not set +# end of CPU Inspect + +# CONFIG_ROH is not set +# end of Device Drivers + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y +CONFIG_BUFFER_HEAD=y +CONFIG_LEGACY_DIRECT_IO=y +CONFIG_EXT2_FS=m +CONFIG_EXT2_FS_XATTR=y +# CONFIG_EXT2_FS_POSIX_ACL is not set +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=m +# CONFIG_EXT3_FS_POSIX_ACL is not set +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +# CONFIG_EXT4_FS_POSIX_ACL is not set +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_DEBUG is not set +# CONFIG_EXT4_ERROR_REPORT is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +# CONFIG_FANOTIFY_ACCESS_PERMISSIONS is not set +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +# CONFIG_QUOTA_DEBUG is not set +CONFIG_QUOTA_TREE=m +CONFIG_QFMT_V1=m +CONFIG_QFMT_V2=m +CONFIG_QUOTACTL=y +CONFIG_AUTOFS_FS=m +CONFIG_FUSE_FS=y +CONFIG_CUSE=m +CONFIG_VIRTIO_FS=y +CONFIG_OVERLAY_FS=m +# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +# CONFIG_OVERLAY_FS_INDEX is not set +# CONFIG_OVERLAY_FS_XINO_AUTO is not set +# CONFIG_OVERLAY_FS_METACOPY is not set +# CONFIG_OVERLAY_FS_DEBUG is not set + +# +# Caches +# +CONFIG_NETFS_SUPPORT=y +# CONFIG_NETFS_STATS is not set +CONFIG_FSCACHE=m +# CONFIG_FSCACHE_STATS is not set +# CONFIG_FSCACHE_DEBUG is not set +# CONFIG_CACHEFILES is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/EXFAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_EXFAT_FS is not set +# CONFIG_NTFS_FS is not set +# CONFIG_NTFS3_FS is not set +# end of DOS/FAT/EXFAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_VMCORE=y +# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_DIRTY_PAGES=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_TMPFS_INODE64 is not set +# CONFIG_TMPFS_QUOTA is not set +CONFIG_ARCH_SUPPORTS_HUGETLBFS=y +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +# CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP_DEFAULT_ON is not set +# CONFIG_HUGETLB_ALLOC_LIMIT is not set +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +# CONFIG_CONFIGFS_FS is not set +# CONFIG_EFIVAR_FS is not set +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=m +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_SUMMARY=y +CONFIG_JFFS2_FS_XATTR=y +CONFIG_JFFS2_FS_POSIX_ACL=y +CONFIG_JFFS2_FS_SECURITY=y +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_JFFS2_CMODE_NONE is not set +CONFIG_JFFS2_CMODE_PRIORITY=y +# CONFIG_JFFS2_CMODE_SIZE is not set +# CONFIG_JFFS2_CMODE_FAVOURLZO is not set +CONFIG_UBIFS_FS=m +CONFIG_UBIFS_FS_ADVANCED_COMPR=y +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +# CONFIG_UBIFS_FS_ZSTD is not set +# CONFIG_UBIFS_ATIME_SUPPORT is not set +CONFIG_UBIFS_FS_XATTR=y +CONFIG_UBIFS_FS_SECURITY=y +# CONFIG_UBIFS_FS_AUTHENTICATION is not set +CONFIG_CRAMFS=m +# CONFIG_CRAMFS_BLOCKDEV is not set +# CONFIG_CRAMFS_MTD is not set +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_CHOICE_DECOMP_BY_MOUNT is not set +CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_ZLIB=y +# CONFIG_SQUASHFS_LZ4 is not set +# CONFIG_SQUASHFS_LZO is not set +CONFIG_SQUASHFS_XZ=y +# CONFIG_SQUASHFS_ZSTD is not set +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_EROFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=m +# CONFIG_NFS_V2 is not set +CONFIG_NFS_V3=m +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=m +# CONFIG_NFS_SWAP is not set +CONFIG_NFS_V4_1=y +# CONFIG_NFS_V4_2 is not set +CONFIG_PNFS_FILE_LAYOUT=m +CONFIG_PNFS_BLOCK=m +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +# CONFIG_NFS_FSCACHE is not set +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +CONFIG_NFS_DISABLE_UDP_SUPPORT=y +CONFIG_NFSD=m +# CONFIG_NFSD_V2 is not set +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +# CONFIG_NFSD_BLOCKLAYOUT is not set +# CONFIG_NFSD_SCSILAYOUT is not set +# CONFIG_NFSD_FLEXFILELAYOUT is not set +# CONFIG_NFSD_V4_SECURITY_LABEL is not set +CONFIG_GRACE_PERIOD=m +CONFIG_LOCKD=m +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=m +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=m +CONFIG_SUNRPC_GSS=m +CONFIG_SUNRPC_BACKCHANNEL=y +CONFIG_RPCSEC_GSS_KRB5=m +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS2 is not set +CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y +# CONFIG_CIFS_UPCALL is not set +# CONFIG_CIFS_XATTR is not set +CONFIG_CIFS_DEBUG=y +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG_DUMP_KEYS is not set +# CONFIG_CIFS_DFS_UPCALL is not set +# CONFIG_CIFS_SWN_UPCALL is not set +# CONFIG_CIFS_FSCACHE is not set +# CONFIG_SMB_SERVER is not set +CONFIG_SMBFS=m +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_9P_FS=y +CONFIG_9P_FS_POSIX_ACL=y +# CONFIG_9P_FS_SECURITY is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +CONFIG_NLS_UTF8=m +CONFIG_NLS_UCS2_UTILS=m +# CONFIG_UNICODE is not set +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_REQUEST_CACHE is not set +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +CONFIG_SECURITY_DMESG_RESTRICT=y +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +CONFIG_SECURITY_NETWORK=y +# CONFIG_SECURITY_NETWORK_XFRM is not set +# CONFIG_SECURITY_PATH is not set +CONFIG_LSM_MMAP_MIN_ADDR=32768 +CONFIG_HARDENED_USERCOPY=y +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_SECURITY_SELINUX_DEVELOP=y +CONFIG_SECURITY_SELINUX_AVC_STATS=y +CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS=9 +CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE=256 +# CONFIG_SECURITY_SELINUX_DEBUG is not set +CONFIG_SECURITY_SMACK=y +# CONFIG_SECURITY_SMACK_BRINGUP is not set +# CONFIG_SECURITY_SMACK_NETFILTER is not set +# CONFIG_SECURITY_SMACK_APPEND_SIGNALS is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_SECURITY_APPARMOR is not set +# CONFIG_SECURITY_LOADPIN is not set +CONFIG_SECURITY_YAMA=y +# CONFIG_SECURITY_SAFESETID is not set +# CONFIG_SECURITY_LOCKDOWN_LSM is not set +# CONFIG_SECURITY_LANDLOCK is not set +# CONFIG_INTEGRITY is not set +# CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity,bpf" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_CC_HAS_AUTO_VAR_INIT_PATTERN=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO_BARE=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y +CONFIG_INIT_STACK_NONE=y +# CONFIG_INIT_STACK_ALL_PATTERN is not set +# CONFIG_INIT_STACK_ALL_ZERO is not set +# CONFIG_GCC_PLUGIN_STACKLEAK is not set +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y +# CONFIG_ZERO_CALL_USED_REGS is not set +# end of Memory initialization + +# +# Hardening of kernel data structures +# +# CONFIG_LIST_HARDENED is not set +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# end of Hardening of kernel data structures + +CONFIG_RANDSTRUCT_NONE=y +# CONFIG_RANDSTRUCT_FULL is not set +# CONFIG_RANDSTRUCT_PERFORMANCE is not set +# end of Kernel hardening options +# end of Security options + +CONFIG_XOR_BLOCKS=y +CONFIG_ASYNC_CORE=y +CONFIG_ASYNC_MEMCPY=y +CONFIG_ASYNC_XOR=y +CONFIG_ASYNC_PQ=y +CONFIG_ASYNC_RAID6_RECOV=y +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SIG2=y +CONFIG_CRYPTO_SKCIPHER=y +CONFIG_CRYPTO_SKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=m +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=m +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set +# end of Crypto core or helper + +# +# Public-key cryptography +# +# CONFIG_CRYPTO_RSA is not set +# CONFIG_CRYPTO_DH is not set +# CONFIG_CRYPTO_ECDH is not set +# CONFIG_CRYPTO_ECDSA is not set +# CONFIG_CRYPTO_ECRDSA is not set +# CONFIG_CRYPTO_SM2 is not set +# CONFIG_CRYPTO_CURVE25519 is not set +# end of Public-key cryptography + +# +# Block ciphers +# +CONFIG_CRYPTO_AES=m +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARIA is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SM4_GENERIC is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set +# end of Block ciphers + +# +# Length-preserving ciphers and modes +# +# CONFIG_CRYPTO_ADIANTUM is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_CHACHA20 is not set +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=m +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_HCTR2 is not set +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# end of Length-preserving ciphers and modes + +# +# AEAD (authenticated encryption with associated data) ciphers +# +# CONFIG_CRYPTO_AEGIS128 is not set +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_GENIV=m +# CONFIG_CRYPTO_SEQIV is not set +CONFIG_CRYPTO_ECHAINIV=m +# CONFIG_CRYPTO_ESSIV is not set +# end of AEAD (authenticated encryption with associated data) ciphers + +# +# Hashes, digests, and MACs +# +# CONFIG_CRYPTO_BLAKE2B is not set +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_GHASH=m +CONFIG_CRYPTO_HMAC=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=m +CONFIG_CRYPTO_MICHAEL_MIC=m +# CONFIG_CRYPTO_POLY1305 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_SHA1 is not set +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_SHA3=m +# CONFIG_CRYPTO_SM3_GENERIC is not set +# CONFIG_CRYPTO_STREEBOG is not set +# CONFIG_CRYPTO_VMAC is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_XXHASH is not set +# end of Hashes, digests, and MACs + +# +# CRCs (cyclic redundancy checks) +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_CRC64_ROCKSOFT=y +# end of CRCs (cyclic redundancy checks) + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_LZO=m +# CONFIG_CRYPTO_842 is not set +CONFIG_CRYPTO_LZ4=m +# CONFIG_CRYPTO_LZ4HC is not set +# CONFIG_CRYPTO_ZSTD is not set +# end of Compression + +# +# Random number generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_DRBG_MENU=m +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=m +CONFIG_CRYPTO_JITTERENTROPY=m +# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set +# end of Random number generation + +# +# Userspace interface +# +CONFIG_CRYPTO_USER_API=y +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +# CONFIG_CRYPTO_USER_API_RNG is not set +CONFIG_CRYPTO_USER_API_AEAD=y +CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y +# end of Userspace interface + +CONFIG_CRYPTO_HASH_INFO=y +# CONFIG_CRYPTO_NHPOLY1305_NEON is not set +# CONFIG_CRYPTO_CHACHA20_NEON is not set + +# +# Accelerated Cryptographic Algorithms for CPU (arm64) +# +# CONFIG_CRYPTO_GHASH_ARM64_CE is not set +# CONFIG_CRYPTO_POLY1305_NEON is not set +# CONFIG_CRYPTO_SHA1_ARM64_CE is not set +# CONFIG_CRYPTO_SHA256_ARM64 is not set +# CONFIG_CRYPTO_SHA2_ARM64_CE is not set +# CONFIG_CRYPTO_SHA512_ARM64 is not set +# CONFIG_CRYPTO_SHA512_ARM64_CE is not set +# CONFIG_CRYPTO_SHA3_ARM64 is not set +# CONFIG_CRYPTO_SM3_NEON is not set +# CONFIG_CRYPTO_SM3_ARM64_CE is not set +# CONFIG_CRYPTO_POLYVAL_ARM64_CE is not set +# CONFIG_CRYPTO_AES_ARM64 is not set +# CONFIG_CRYPTO_AES_ARM64_CE is not set +# CONFIG_CRYPTO_AES_ARM64_CE_BLK is not set +# CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set +# CONFIG_CRYPTO_AES_ARM64_BS is not set +# CONFIG_CRYPTO_SM4_ARM64_CE is not set +# CONFIG_CRYPTO_SM4_ARM64_CE_BLK is not set +# CONFIG_CRYPTO_SM4_ARM64_NEON_BLK is not set +# CONFIG_CRYPTO_AES_ARM64_CE_CCM is not set +# CONFIG_CRYPTO_SM4_ARM64_CE_CCM is not set +# CONFIG_CRYPTO_SM4_ARM64_CE_GCM is not set +# CONFIG_CRYPTO_CRCT10DIF_ARM64_CE is not set +# end of Accelerated Cryptographic Algorithms for CPU (arm64) + +# CONFIG_CRYPTO_HW is not set +# CONFIG_ASYMMETRIC_KEY_TYPE is not set + +# +# Certificates for signature checking +# +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +# CONFIG_PGP_PRELOAD_PUBLIC_KEYS is not set +# end of Certificates for signature checking + +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_RAID6_PQ=y +CONFIG_RAID6_PQ_BENCHMARK=y +# CONFIG_PACKING is not set +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +# CONFIG_CORDIC is not set +# CONFIG_PRIME_NUMBERS is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y +# CONFIG_INDIRECT_PIO is not set +# CONFIG_TRACE_MMIO_ACCESS is not set + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LIB_AES=m +CONFIG_CRYPTO_LIB_ARC4=m +CONFIG_CRYPTO_LIB_GF128MUL=m +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +# CONFIG_CRYPTO_LIB_CHACHA is not set +# CONFIG_CRYPTO_LIB_CURVE25519 is not set +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 +# CONFIG_CRYPTO_LIB_POLY1305 is not set +# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_SHA256=y +# end of Crypto library routines + +CONFIG_CRC_CCITT=m +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC64_ROCKSOFT=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +CONFIG_CRC64=y +# CONFIG_CRC4 is not set +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=y +# CONFIG_CRC8 is not set +CONFIG_XXHASH=y +CONFIG_AUDIT_GENERIC=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_AUDIT_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=m +CONFIG_LZO_COMPRESS=m +CONFIG_LZO_DECOMPRESS=m +CONFIG_LZ4_COMPRESS=m +CONFIG_LZ4_DECOMPRESS=m +CONFIG_XZ_DEC=y +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_SPARC is not set +# CONFIG_XZ_DEC_MICROLZMA is not set +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_INTERVAL_TREE=y +CONFIG_XARRAY_MULTI=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_DMA_OPS=y +CONFIG_NEED_SG_DMA_FLAGS=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_ARCH_HAS_SETUP_DMA_OPS=y +CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_SWIOTLB=y +# CONFIG_SWIOTLB_DYNAMIC is not set +CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y +# CONFIG_DMA_RESTRICTED_POOL is not set +CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_DMA_COHERENT_POOL=y +CONFIG_DMA_DIRECT_REMAP=y +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_DMA_MAP_BENCHMARK is not set +CONFIG_SGL_ALLOC=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_IRQ_POLL=y +CONFIG_DIMLIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=m +CONFIG_UCS2_STRING=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_SG_POOL=y +CONFIG_ARCH_STACKWALK=y +CONFIG_STACKDEPOT=y +CONFIG_SBITMAP=y +# end of Library routines + +CONFIG_GENERIC_IOREMAP=y +CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +# CONFIG_STACKTRACE_BUILD_ID is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_DYNAMIC_DEBUG_CORE is not set +# CONFIG_SYMBOLIC_ERRNAME is not set +CONFIG_DEBUG_BUGVERBOSE=y +# end of printk and dmesg options + +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_MISC is not set + +# +# Compile-time checks and compiler options +# +CONFIG_AS_HAS_NON_CONST_LEB128=y +CONFIG_DEBUG_INFO_NONE=y +# CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_DEBUG_INFO_DWARF5 is not set +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_HEADERS_INSTALL is not set +# CONFIG_OPTIMIZE_INLINING is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B is not set +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_VMLINUX_MAP is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# end of Compile-time checks and compiler options + +# +# Generic Kernel Debugging Instruments +# +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +# CONFIG_MAGIC_SYSRQ_SERIAL is not set +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_FS_ALLOW_ALL=y +# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set +# CONFIG_DEBUG_FS_ALLOW_NONE is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +CONFIG_HAVE_ARCH_KCSAN=y +CONFIG_HAVE_KCSAN_COMPILER=y +# CONFIG_KCSAN is not set +# end of Generic Kernel Debugging Instruments + +# +# Networking Debugging +# +# CONFIG_NET_DEV_REFCNT_TRACKER is not set +# CONFIG_NET_NS_REFCNT_TRACKER is not set +# CONFIG_DEBUG_NET is not set +# end of Networking Debugging + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_PAGE_OWNER is not set +# CONFIG_PAGE_TABLE_CHECK is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_PAGE_REF is not set +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set +CONFIG_GENERIC_PTDUMP=y +# CONFIG_PTDUMP_DEBUGFS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_DEBUG_KMEMLEAK=y +CONFIG_DEBUG_KMEMLEAK_MEM_POOL_SIZE=2000 +CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF=y +# CONFIG_DEBUG_KMEMLEAK_AUTO_SCAN is not set +# CONFIG_PER_VMA_LOCK_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SHRINKER_DEBUG is not set +CONFIG_DEBUG_STACK_USAGE=y +CONFIG_SCHED_STACK_END_CHECK=y +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y +CONFIG_HAVE_ARCH_KASAN_VMALLOC=y +CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_KASAN_SW_TAGS=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y +# CONFIG_KASAN is not set +CONFIG_HAVE_ARCH_KFENCE=y +# CONFIG_KFENCE is not set +# end of Memory Debugging + +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Oops, Lockups and Hangs +# +CONFIG_PANIC_ON_OOPS=y +CONFIG_PANIC_ON_OOPS_VALUE=1 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_LOCKUP_DETECTOR=y +CONFIG_SOFTLOCKUP_DETECTOR=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y +# CONFIG_HARDLOCKUP_DETECTOR is not set +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 +CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_WQ_CPU_INTENSIVE_REPORT is not set +# CONFIG_TEST_LOCKUP is not set +# end of Debug Oops, Lockups and Hangs + +# +# Scheduler Debugging +# +CONFIG_SCHED_DEBUG=y +CONFIG_SCHED_INFO=y +# CONFIG_SCHEDSTATS is not set +# end of Scheduler Debugging + +# CONFIG_DEBUG_TIMEKEEPING is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +CONFIG_DEBUG_ATOMIC_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_SCF_TORTURE_TEST is not set +# CONFIG_CSD_LOCK_WAIT_DEBUG is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +# CONFIG_DEBUG_IRQFLAGS is not set +CONFIG_STACKTRACE=y +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set + +# +# Debug kernel data structures +# +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PLIST is not set +CONFIG_DEBUG_SG=y +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_MAPLE_TREE is not set +# end of Debug kernel data structures + +# +# RCU Debugging +# +# CONFIG_RCU_SCALE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_REF_SCALE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=65 +CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 +# CONFIG_RCU_CPU_STALL_CPUTIME is not set +# CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set +# end of RCU Debugging + +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_LATENCYTOP is not set +# CONFIG_DEBUG_CGROUP_REF is not set +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACER_MAX_TRACE=y +CONFIG_TRACE_CLOCK=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_TRACING=y +CONFIG_GENERIC_TRACER=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +# CONFIG_BOOTTIME_TRACING is not set +# CONFIG_FUNCTION_TRACER is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_IRQSOFF_TRACER is not set +CONFIG_SCHED_TRACER=y +# CONFIG_HWLAT_TRACER is not set +# CONFIG_OSNOISE_TRACER is not set +# CONFIG_TIMERLAT_TRACER is not set +# CONFIG_FTRACE_SYSCALLS is not set +CONFIG_TRACER_SNAPSHOT=y +# CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +CONFIG_KPROBE_EVENTS=y +CONFIG_UPROBE_EVENTS=y +CONFIG_DYNAMIC_EVENTS=y +CONFIG_PROBE_EVENTS=y +# CONFIG_SYNTH_EVENTS is not set +# CONFIG_USER_EVENTS is not set +# CONFIG_HIST_TRIGGERS is not set +# CONFIG_TRACE_EVENT_INJECT is not set +# CONFIG_TRACEPOINT_BENCHMARK is not set +# CONFIG_RING_BUFFER_BENCHMARK is not set +# CONFIG_TRACE_EVAL_MAP_FILE is not set +# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_RING_BUFFER_STARTUP_TEST is not set +# CONFIG_RING_BUFFER_VALIDATE_TIME_DELTAS is not set +# CONFIG_PREEMPTIRQ_DELAY_TEST is not set +# CONFIG_KPROBE_EVENT_GEN_TEST is not set +# CONFIG_RV is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_SAMPLE_FTRACE_DIRECT=y +CONFIG_HAVE_SAMPLE_FTRACE_DIRECT_MULTI=y +CONFIG_STRICT_DEVMEM=y +CONFIG_IO_STRICT_DEVMEM=y + +# +# arm64 Debugging +# +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set +# end of arm64 Debugging + +# +# Kernel Testing and Coverage +# +# CONFIG_KUNIT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +CONFIG_FUNCTION_ERROR_INJECTION=y +# CONFIG_FAULT_INJECTION is not set +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set +# CONFIG_RUNTIME_TESTING_MENU is not set +CONFIG_ARCH_USE_MEMTEST=y +# CONFIG_MEMTEST is not set +# end of Kernel Testing and Coverage + +# +# Rust hacking +# +# end of Rust hacking +# end of Kernel hacking + +# CONFIG_KWORKER_NUMA_AFFINITY is not set diff --git a/bsp/meta-kunpeng/recipes-kernel/linux/linux-kp920.inc b/bsp/meta-kunpeng/recipes-kernel/linux/linux-kp920.inc new file mode 100644 index 0000000000000000000000000000000000000000..99e9020873897b108218c61680d3d9bf955ae21b --- /dev/null +++ b/bsp/meta-kunpeng/recipes-kernel/linux/linux-kp920.inc @@ -0,0 +1,8 @@ +# add recipes-kernel path to find patch and defconfig +FILESEXTRAPATHS:append := "${THISDIR}/files/:" + +CONFIGVERSION="${@bb.utils.contains('DISTRO_FEATURES', 'kernel6', 'kernel6-', '', d)}" +OPENEULER_KERNEL_CONFIG = "file://${CONFIGVERSION}config/kp920/defconfig" + +# add COMPATIBLE_MACHINE +COMPATIBLE_MACHINE = "kp920" diff --git a/bsp/meta-kunpeng/recipes-kernel/linux/linux-openeuler-rt.bbappend b/bsp/meta-kunpeng/recipes-kernel/linux/linux-openeuler-rt.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..b09bcc7227d3d7eb9f48dd5650589766e2682c94 --- /dev/null +++ b/bsp/meta-kunpeng/recipes-kernel/linux/linux-openeuler-rt.bbappend @@ -0,0 +1 @@ +require recipes-kernel/linux/linux-kp920.inc diff --git a/bsp/meta-kunpeng/recipes-kernel/linux/linux-openeuler.bbappend b/bsp/meta-kunpeng/recipes-kernel/linux/linux-openeuler.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..b09bcc7227d3d7eb9f48dd5650589766e2682c94 --- /dev/null +++ b/bsp/meta-kunpeng/recipes-kernel/linux/linux-openeuler.bbappend @@ -0,0 +1 @@ +require recipes-kernel/linux/linux-kp920.inc diff --git a/bsp/meta-kunpeng/recipes-wlroots/wlroots/wlroots_%.bbappend b/bsp/meta-kunpeng/recipes-wlroots/wlroots/wlroots_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..b3045e792217f185f945d9ec648f9767a3a61aa8 --- /dev/null +++ b/bsp/meta-kunpeng/recipes-wlroots/wlroots/wlroots_%.bbappend @@ -0,0 +1,2 @@ +# for amd libdrm driver +RDEPENDS:${PN} += " libdrm-radeon linux-firmware-radeon " diff --git a/bsp/meta-loongson/conf/layer.conf b/bsp/meta-loongson/conf/layer.conf new file mode 100644 index 0000000000000000000000000000000000000000..fad03f5b0b1b7f123a078d9542c969fbf90caede --- /dev/null +++ b/bsp/meta-loongson/conf/layer.conf @@ -0,0 +1,13 @@ +# We have a conf and classes directory, add to BBPATH +BBPATH .= ":${LAYERDIR}" + +# We have recipes-* directories, add to BBFILES +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "loongson" +BBFILE_PATTERN_loongson := "^${LAYERDIR}/" +BBFILE_PRIORITY_loongson = "6" + +LAYERDEPENDS_loongson = "core" +LAYERSERIES_COMPAT_loongson = "kirkstone" diff --git a/bsp/meta-loongson/conf/machine/alientek.conf b/bsp/meta-loongson/conf/machine/alientek.conf new file mode 100644 index 0000000000000000000000000000000000000000..ae486bfb1f4e5331a0aae6bc6df6cd2a65da9b26 --- /dev/null +++ b/bsp/meta-loongson/conf/machine/alientek.conf @@ -0,0 +1,21 @@ +require conf/machine/include/loongarch/tune-ls2k.inc + +MACHINEOVERRIDES =. "alientek:mloongarch64:" +MACHINE_FEATURES = "screen ext2 ext3 serial alsa pci usbhost" +DEFAULTTUNE = "loongarch64" + +KERNEL_IMAGETYPE = "vmlinux" + +require conf/multilib.conf +MULTILIBS = "" + +ROOTFS_PACKAGE_ARCH = "loongarch64" + +SERIAL_CONSOLES = "115200;ttyS0" + +HOSTTOOLS_NONFATAL += "qemu-loongarch64" + +IMAGE_INSTALL:append = " kernel-modules" + +#loongarch not support gold +DISTRO_FEATURES:remove = "ld-is-gold" diff --git a/bsp/meta-loongson/recipes-core/images/alientek.inc b/bsp/meta-loongson/recipes-core/images/alientek.inc new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/bsp/meta-loongson/recipes-core/packagegroups/packagegroup-core-boot.bbappend b/bsp/meta-loongson/recipes-core/packagegroups/packagegroup-core-boot.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..0dd962e0443a9a77609f7e11b41cbd5c39c01d66 --- /dev/null +++ b/bsp/meta-loongson/recipes-core/packagegroups/packagegroup-core-boot.bbappend @@ -0,0 +1,2 @@ +# No rule to make target "Image" for loongarch64, remove it +RDEPENDS:${PN}:remove:loongarch64 = "kernel-img" diff --git a/bsp/meta-loongson/recipes-devtools/binutils/binutils_%.bbappend b/bsp/meta-loongson/recipes-devtools/binutils/binutils_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..a66770e2a73fddef85ae4a217ba5b6e8be188139 --- /dev/null +++ b/bsp/meta-loongson/recipes-devtools/binutils/binutils_%.bbappend @@ -0,0 +1 @@ +LDGOLD:loongarch64 = "" diff --git a/bsp/meta-loongson/recipes-devtools/strace/files/0001-add-loongarch-support.patch b/bsp/meta-loongson/recipes-devtools/strace/files/0001-add-loongarch-support.patch new file mode 100644 index 0000000000000000000000000000000000000000..951073fd59d8b0d06e98823d479942e7dda94d66 --- /dev/null +++ b/bsp/meta-loongson/recipes-devtools/strace/files/0001-add-loongarch-support.patch @@ -0,0 +1,237 @@ +diff -Nuar strace-5.14_hm/configure.ac strace-5.14/configure.ac +--- strace-5.14_hm/configure.ac 2025-04-22 02:34:46.222938672 +0000 ++++ strace-5.14/configure.ac 2025-04-23 02:57:26.625810837 +0000 +@@ -110,6 +110,11 @@ + arch=ia64 + AC_DEFINE([IA64], 1, [Define for the IA64 architecture.]) + ;; ++loongarch64) ++ arch=loongarch64 ++ karch=loongarch ++ AC_DEFINE([LOONGARCH64], 1, [Define for the 64-bit LoongArch architecture.]) ++ ;; + m68k) + arch=m68k + AC_DEFINE([M68K], 1, [Define for the m68k architecture.]) +diff -Nuar strace-5.14_hm/src/linux/loongarch64/arch_defs_.h strace-5.14/src/linux/loongarch64/arch_defs_.h +--- strace-5.14_hm/src/linux/loongarch64/arch_defs_.h 1970-01-01 00:00:00.000000000 +0000 ++++ strace-5.14/src/linux/loongarch64/arch_defs_.h 2025-04-23 02:58:41.488800720 +0000 +@@ -0,0 +1,8 @@ ++/* ++ * Copyright (c) 2021-2022 The strace developers. ++ * All rights reserved. ++ * ++ * SPDX-License-Identifier: LGPL-2.1-or-later ++ */ ++ ++#define PERSONALITY0_AUDIT_ARCH { AUDIT_ARCH_LOONGARCH64, 0 } +diff -Nuar strace-5.14_hm/src/linux/loongarch64/arch_regs.c strace-5.14/src/linux/loongarch64/arch_regs.c +--- strace-5.14_hm/src/linux/loongarch64/arch_regs.c 1970-01-01 00:00:00.000000000 +0000 ++++ strace-5.14/src/linux/loongarch64/arch_regs.c 2025-04-23 02:59:03.355753115 +0000 +@@ -0,0 +1,11 @@ ++/* ++ * Copyright (c) 2021-2022 The strace developers. ++ * All rights reserved. ++ * ++ * SPDX-License-Identifier: LGPL-2.1-or-later ++ */ ++ ++static struct user_pt_regs loongarch_regs; ++#define ARCH_REGS_FOR_GETREGSET loongarch_regs ++#define ARCH_PC_REG loongarch_regs.csr_era ++#define ARCH_SP_REG loongarch_regs.regs[3] +diff -Nuar strace-5.14_hm/src/linux/loongarch64/get_error.c strace-5.14/src/linux/loongarch64/get_error.c +--- strace-5.14_hm/src/linux/loongarch64/get_error.c 1970-01-01 00:00:00.000000000 +0000 ++++ strace-5.14/src/linux/loongarch64/get_error.c 2025-04-23 02:59:17.618417569 +0000 +@@ -0,0 +1,19 @@ ++/* ++ * Copyright (c) 2021-2022 The strace developers. ++ * All rights reserved. ++ * ++ * SPDX-License-Identifier: LGPL-2.1-or-later ++ */ ++ ++#include "negated_errno.h" ++ ++static void ++arch_get_error(struct tcb *tcp, const bool check_errno) ++{ ++ if (check_errno && is_negated_errno(loongarch_regs.regs[4])) { ++ tcp->u_rval = -1; ++ tcp->u_error = -loongarch_regs.regs[4]; ++ } else { ++ tcp->u_rval = loongarch_regs.regs[4]; ++ } ++} +diff -Nuar strace-5.14_hm/src/linux/loongarch64/get_scno.c strace-5.14/src/linux/loongarch64/get_scno.c +--- strace-5.14_hm/src/linux/loongarch64/get_scno.c 1970-01-01 00:00:00.000000000 +0000 ++++ strace-5.14/src/linux/loongarch64/get_scno.c 2025-04-23 02:59:34.819806843 +0000 +@@ -0,0 +1,15 @@ ++ ++/* ++ * Copyright (c) 2021-2022 The strace developers. ++ * All rights reserved. ++ * ++ * SPDX-License-Identifier: LGPL-2.1-or-later ++ */ ++ ++/* Return codes: 1 - ok, 0 - ignore, other - error. */ ++static int ++arch_get_scno(struct tcb *tcp) ++{ ++ tcp->scno = loongarch_regs.regs[11]; ++ return 1; ++} +diff -Nuar strace-5.14_hm/src/linux/loongarch64/get_syscall_args.c strace-5.14/src/linux/loongarch64/get_syscall_args.c +--- strace-5.14_hm/src/linux/loongarch64/get_syscall_args.c 1970-01-01 00:00:00.000000000 +0000 ++++ strace-5.14/src/linux/loongarch64/get_syscall_args.c 2025-04-23 02:59:51.102282164 +0000 +@@ -0,0 +1,19 @@ ++/* ++ * Copyright (c) 2021-2022 The strace developers. ++ * All rights reserved. ++ * ++ * SPDX-License-Identifier: LGPL-2.1-or-later ++ */ ++ ++/* Return -1 on error or 1 on success (never 0!). */ ++static int ++arch_get_syscall_args(struct tcb *tcp) ++{ ++ tcp->u_arg[0] = loongarch_regs.regs[4]; ++ tcp->u_arg[1] = loongarch_regs.regs[5]; ++ tcp->u_arg[2] = loongarch_regs.regs[6]; ++ tcp->u_arg[3] = loongarch_regs.regs[7]; ++ tcp->u_arg[4] = loongarch_regs.regs[8]; ++ tcp->u_arg[5] = loongarch_regs.regs[9]; ++ return 1; ++} +diff -Nuar strace-5.14_hm/src/linux/loongarch64/ioctls_arch0.h strace-5.14/src/linux/loongarch64/ioctls_arch0.h +--- strace-5.14_hm/src/linux/loongarch64/ioctls_arch0.h 1970-01-01 00:00:00.000000000 +0000 ++++ strace-5.14/src/linux/loongarch64/ioctls_arch0.h 2025-04-23 03:00:11.655357588 +0000 +@@ -0,0 +1 @@ ++/* Generated by ioctls_gen.sh from definitions found in $linux/arch/loongarch/include/ tree. */ +diff -Nuar strace-5.14_hm/src/linux/loongarch64/ioctls_inc0.h strace-5.14/src/linux/loongarch64/ioctls_inc0.h +--- strace-5.14_hm/src/linux/loongarch64/ioctls_inc0.h 1970-01-01 00:00:00.000000000 +0000 ++++ strace-5.14/src/linux/loongarch64/ioctls_inc0.h 2025-04-23 03:00:26.025012024 +0000 +@@ -0,0 +1 @@ ++#include "../64/ioctls_inc.h" +diff -Nuar strace-5.14_hm/src/linux/loongarch64/raw_syscall.h strace-5.14/src/linux/loongarch64/raw_syscall.h +--- strace-5.14_hm/src/linux/loongarch64/raw_syscall.h 1970-01-01 00:00:00.000000000 +0000 ++++ strace-5.14/src/linux/loongarch64/raw_syscall.h 2025-04-23 03:00:44.209309260 +0000 +@@ -0,0 +1,29 @@ ++/* ++ * Raw syscalls. ++ * ++ * Copyright (c) 2021-2022 The strace developers. ++ * All rights reserved. ++ * ++ * SPDX-License-Identifier: LGPL-2.1-or-later ++ */ ++ ++#ifndef STRACE_RAW_SYSCALL_H ++# define STRACE_RAW_SYSCALL_H ++ ++# include "kernel_types.h" ++ ++static inline kernel_ulong_t ++raw_syscall_0(const kernel_ulong_t nr, kernel_ulong_t *err) ++{ ++ *err = 0; ++ register kernel_ulong_t a7 __asm__("a7") = nr; ++ register kernel_ulong_t a0 __asm__("a0"); ++ __asm__ __volatile__("syscall 0" ++ : "=r"(a0) ++ : "r"(a7) ++ : "memory"); ++ return a0; ++} ++# define raw_syscall_0 raw_syscall_0 ++ ++#endif /* !STRACE_RAW_SYSCALL_H */ +diff -Nuar strace-5.14_hm/src/linux/loongarch64/set_error.c strace-5.14/src/linux/loongarch64/set_error.c +--- strace-5.14_hm/src/linux/loongarch64/set_error.c 1970-01-01 00:00:00.000000000 +0000 ++++ strace-5.14/src/linux/loongarch64/set_error.c 2025-04-23 03:01:00.685766416 +0000 +@@ -0,0 +1,20 @@ ++/* ++ * Copyright (c) 2021-2022 The strace developers. ++ * All rights reserved. ++ * ++ * SPDX-License-Identifier: LGPL-2.1-or-later ++ */ ++ ++static int ++arch_set_error(struct tcb *tcp) ++{ ++ loongarch_regs.regs[4] = -tcp->u_error; ++ return set_regs(tcp->pid); ++} ++ ++static int ++arch_set_success(struct tcb *tcp) ++{ ++ loongarch_regs.regs[4] = tcp->u_rval; ++ return set_regs(tcp->pid); ++} +diff -Nuar strace-5.14_hm/src/linux/loongarch64/set_scno.c strace-5.14/src/linux/loongarch64/set_scno.c +--- strace-5.14_hm/src/linux/loongarch64/set_scno.c 1970-01-01 00:00:00.000000000 +0000 ++++ strace-5.14/src/linux/loongarch64/set_scno.c 2025-04-23 03:01:23.047672463 +0000 +@@ -0,0 +1,15 @@ ++/* ++ * Copyright (c) 2021-2022 The strace developers. ++ * All rights reserved. ++ * ++ * SPDX-License-Identifier: LGPL-2.1-or-later ++ */ ++ ++static int ++arch_set_scno(struct tcb *tcp, kernel_ulong_t scno) ++{ ++ if (ptrace_syscall_info_is_valid() && get_regs(tcp) < 0) ++ return -1; ++ loongarch_regs.regs[11] = scno; ++ return set_regs(tcp->pid); ++} +diff -Nuar strace-5.14_hm/src/linux/loongarch64/syscallent.h strace-5.14/src/linux/loongarch64/syscallent.h +--- strace-5.14_hm/src/linux/loongarch64/syscallent.h 1970-01-01 00:00:00.000000000 +0000 ++++ strace-5.14/src/linux/loongarch64/syscallent.h 2025-04-23 03:01:39.931091512 +0000 +@@ -0,0 +1,8 @@ ++/* ++ * Copyright (c) 2021-2022 The strace developers. ++ * All rights reserved. ++ * ++ * SPDX-License-Identifier: LGPL-2.1-or-later ++ */ ++ ++#include "../64/syscallent.h" +diff -Nuar strace-5.14_hm/src/Makefile.am strace-5.14/src/Makefile.am +--- strace-5.14_hm/src/Makefile.am 2025-04-22 02:34:47.265840606 +0000 ++++ strace-5.14/src/Makefile.am 2025-04-23 02:58:02.590443135 +0000 +@@ -634,6 +634,17 @@ + linux/ia64/syscallent.h \ + linux/ia64/syscallent_base_nr.h \ + linux/ia64/userent.h \ ++ linux/loongarch64/arch_defs_.h \ ++ linux/loongarch64/arch_regs.c \ ++ linux/loongarch64/get_error.c \ ++ linux/loongarch64/get_scno.c \ ++ linux/loongarch64/get_syscall_args.c \ ++ linux/loongarch64/ioctls_arch0.h \ ++ linux/loongarch64/ioctls_inc0.h \ ++ linux/loongarch64/raw_syscall.h \ ++ linux/loongarch64/set_error.c \ ++ linux/loongarch64/set_scno.c \ ++ linux/loongarch64/syscallent.h \ + linux/m68k/arch_defs_.h \ + linux/m68k/arch_regs.c \ + linux/m68k/arch_rt_sigframe.c \ +diff -Nuar strace-5.14_hm/src/xlat/elf_em.in strace-5.14/src/xlat/elf_em.in +--- strace-5.14_hm/src/xlat/elf_em.in 2025-04-22 02:34:47.724797450 +0000 ++++ strace-5.14/src/xlat/elf_em.in 2025-04-23 03:02:06.483605154 +0000 +@@ -190,6 +190,7 @@ + EM_RISCV 243 /* RISC-V */ + EM_BPF 247 /* Linux BPF - in-kernel virtual machine */ + EM_CSKY 252 /* C-SKY */ ++EM_LOONGARCH 258 /* LoongArch */ + EM_AVR32 0x18ad /* Atmel AVR32, removed in v4.12-rc1~159^2~5 */ + EM_FRV 0x5441 /* Fujitsu FR-V */ + EM_OR32 0x8472 /* arch/openrisc/include/uapi/asm/elf.h */ diff --git a/bsp/meta-loongson/recipes-devtools/strace/strace_%.bbappend b/bsp/meta-loongson/recipes-devtools/strace/strace_%.bbappend new file mode 100644 index 0000000000000000000000000000000000000000..02a2ac5c50e930de8b7701caabc8493e5bc3ae71 --- /dev/null +++ b/bsp/meta-loongson/recipes-devtools/strace/strace_%.bbappend @@ -0,0 +1,5 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/files/:" + +SRC_URI:append = " \ + file://0001-add-loongarch-support.patch \ +" diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/kernel5-config/defconfig b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/kernel5-config/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..2341da8af9eefdefa655a60cd3ebdecb1e4b7102 --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/kernel5-config/defconfig @@ -0,0 +1,8604 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/x86 5.10.0 Kernel Configuration +# +CONFIG_CC_VERSION_TEXT="gcc (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0" +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=110400 +CONFIG_LD_VERSION=238000000 +CONFIG_CLANG_VERSION=0 +CONFIG_AS_IS_GNU=y +CONFIG_AS_VERSION=23800 +CONFIG_LLD_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y +CONFIG_CC_HAS_ASM_GOTO=y +CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y +CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y +CONFIG_CC_HAS_ASM_INLINE=y +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_TABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_BUILD_SALT="" +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_BZIP2=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_LZ4=y +CONFIG_HAVE_KERNEL_ZSTD=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_BZIP2 is not set +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_XZ is not set +# CONFIG_KERNEL_LZO is not set +# CONFIG_KERNEL_LZ4 is not set +# CONFIG_KERNEL_ZSTD is not set +CONFIG_DEFAULT_INIT="" +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_USELIB is not set +CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_PENDING_IRQ=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_GENERIC_IRQ_INJECTION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y +CONFIG_GENERIC_IRQ_RESERVATION_MODE=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_CLOCKSOURCE_WATCHDOG=y +CONFIG_ARCH_CLOCKSOURCE_INIT=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y +CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y +# end of Timers subsystem + +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +# CONFIG_PREEMPT is not set +# CONFIG_SCHED_CORE is not set + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_SCHED_AVG_IRQ=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU_GENERIC=y +CONFIG_TASKS_TRACE_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +# end of RCU Subsystem + +# CONFIG_IKCONFIG is not set +# CONFIG_IKHEADERS is not set +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y + +# +# Scheduler features +# +# CONFIG_UCLAMP_TASK is not set +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y +CONFIG_CC_HAS_INT128=y +CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_NUMA_BALANCING=y +CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +# CONFIG_MEMCG_V1_THRESHOLD_QOS is not set +CONFIG_MEMCG_SWAP=y +CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_MEMFS_INFO is not set +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_WRITEBACK=y +# CONFIG_CGROUP_V1_WRITEBACK is not set +CONFIG_CGROUP_SCHED=y +# CONFIG_QOS_SCHED is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_RT_GROUP_SCHED=y +# CONFIG_TASK_PLACEMENT_BY_CPU_RANGE is not set +# CONFIG_QOS_SCHED_DYNAMIC_AFFINITY is not set +# CONFIG_SCHED_TASK_RELATIONSHIP is not set +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_RDMA=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +CONFIG_CGROUP_BPF=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_SOCK_CGROUP_DATA=y +# CONFIG_CGROUP_FILES is not set +# CONFIG_CGROUP_V1_KILL is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_TIME_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_STEAL is not set +# CONFIG_SCHED_KEEP_ON_CORE is not set +CONFIG_CHECKPOINT_RESTORE=y +CONFIG_SCHED_AUTOGROUP=y +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_SYSFS_DEPRECATED_V2 is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_RD_ZSTD=y +CONFIG_INITRAMFS_FILE_METADATA="" +# CONFIG_BOOT_CONFIG is not set +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_LD_ORPHAN_WARN=y +CONFIG_SYSCTL=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_HAVE_PCSPKR_PLATFORM=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_PCSPKR_PLATFORM=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_IO_URING=y +CONFIG_ADVISE_SYSCALLS=y +CONFIG_HAVE_ARCH_USERFAULTFD_WP=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_KALLSYMS_ABSOLUTE_PERCPU=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +# CONFIG_BPF_SCHED is not set +CONFIG_BPF_SYSCALL=y +CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y +# CONFIG_BPF_UNPRIV_DEFAULT_OFF is not set +CONFIG_USERMODE_DRIVER=y +# CONFIG_BPF_PRELOAD is not set +CONFIG_USERFAULTFD=y +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +# CONFIG_EMBEDDED is not set +CONFIG_HAVE_PERF_EVENTS=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +# end of Kernel Performance Events And Counters + +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_MEMCG_SYSFS_ON is not set +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_SLAB_MERGE_DEFAULT=y +CONFIG_SLAB_FREELIST_RANDOM=y +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set +CONFIG_SLUB_CPU_PARTIAL=y +# CONFIG_RANDOM_KMALLOC_CACHES is not set +CONFIG_SYSTEM_DATA_VERIFICATION=y +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +CONFIG_KABI_RESERVE=y +CONFIG_KABI_SIZE_ALIGN_CHECKS=y +# end of General setup + +CONFIG_64BIT=y +CONFIG_X86_64=y +CONFIG_X86=y +CONFIG_INSTRUCTION_DECODER=y +CONFIG_OUTPUT_FORMAT="elf64-x86-64" +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_MMU=y +CONFIG_ARCH_MMAP_RND_BITS_MIN=28 +CONFIG_ARCH_MMAP_RND_BITS_MAX=32 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_GENERIC_ISA_DMA=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_HAS_CPU_RELAX=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_HAS_FILTER_PGPROT=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_ZONE_DMA32=y +CONFIG_AUDIT_ARCH=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_X86_64_SMP=y +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=5 +CONFIG_CC_HAS_SANE_STACKPROTECTOR=y + +# +# Processor type and features +# +CONFIG_ZONE_DMA=y +CONFIG_SMP=y +CONFIG_X86_FEATURE_NAMES=y +CONFIG_X86_MPPARSE=y +# CONFIG_GOLDFISH is not set +# CONFIG_X86_CPU_RESCTRL is not set +CONFIG_X86_EXTENDED_PLATFORM=y +# CONFIG_X86_VSMP is not set +# CONFIG_X86_GOLDFISH is not set +# CONFIG_X86_INTEL_MID is not set +# CONFIG_X86_INTEL_LPSS is not set +# CONFIG_X86_AMD_PLATFORM_DEVICE is not set +CONFIG_IOSF_MBI=m +# CONFIG_IOSF_MBI_DEBUG is not set +CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y +CONFIG_SCHED_OMIT_FRAME_POINTER=y +# CONFIG_HYPERVISOR_GUEST is not set +# CONFIG_MK8 is not set +# CONFIG_MPSC is not set +# CONFIG_MCORE2 is not set +# CONFIG_MATOM is not set +CONFIG_GENERIC_CPU=y +CONFIG_X86_INTERNODE_CACHE_SHIFT=6 +CONFIG_X86_L1_CACHE_SHIFT=6 +CONFIG_X86_TSC=y +CONFIG_X86_CMPXCHG64=y +CONFIG_X86_CMOV=y +CONFIG_X86_MINIMUM_CPU_FAMILY=64 +CONFIG_X86_DEBUGCTLMSR=y +CONFIG_IA32_FEAT_CTL=y +CONFIG_X86_VMX_FEATURE_NAMES=y +# CONFIG_PROCESSOR_SELECT is not set +CONFIG_CPU_SUP_INTEL=y +CONFIG_CPU_SUP_AMD=y +CONFIG_CPU_SUP_HYGON=y +CONFIG_CPU_SUP_CENTAUR=y +CONFIG_CPU_SUP_ZHAOXIN=y +CONFIG_HPET_TIMER=y +CONFIG_HPET_EMULATE_RTC=y +CONFIG_DMI=y +# CONFIG_GART_IOMMU is not set +# CONFIG_MAXSMP is not set +CONFIG_NR_CPUS_RANGE_BEGIN=2 +CONFIG_NR_CPUS_RANGE_END=512 +CONFIG_NR_CPUS_DEFAULT=64 +CONFIG_NR_CPUS=256 +CONFIG_SCHED_CLUSTER=y +CONFIG_SCHED_SMT=y +CONFIG_SCHED_MC=y +CONFIG_SCHED_MC_PRIO=y +CONFIG_X86_LOCAL_APIC=y +CONFIG_X86_IO_APIC=y +# CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set +CONFIG_X86_MCE=y +# CONFIG_X86_MCELOG_LEGACY is not set +CONFIG_X86_MCE_INTEL=y +CONFIG_X86_MCE_AMD=y +CONFIG_X86_MCE_THRESHOLD=y +# CONFIG_X86_MCE_INJECT is not set + +# +# Performance monitoring +# +CONFIG_PERF_EVENTS_INTEL_UNCORE=y +CONFIG_PERF_EVENTS_INTEL_RAPL=y +CONFIG_PERF_EVENTS_INTEL_CSTATE=y +# CONFIG_PERF_EVENTS_AMD_POWER is not set +CONFIG_PERF_EVENTS_AMD_UNCORE=y +# CONFIG_PERF_EVENTS_AMD_BRS is not set +# end of Performance monitoring + +CONFIG_X86_16BIT=y +CONFIG_X86_ESPFIX64=y +CONFIG_X86_VSYSCALL_EMULATION=y +CONFIG_X86_IOPL_IOPERM=y +# CONFIG_I8K is not set +CONFIG_MICROCODE=y +CONFIG_MICROCODE_INTEL=y +CONFIG_MICROCODE_AMD=y +CONFIG_MICROCODE_HYGON=y +# CONFIG_MICROCODE_OLD_INTERFACE is not set +# CONFIG_MICROCODE_LATE_LOADING is not set +# CONFIG_X86_MSR is not set +# CONFIG_X86_CPUID is not set +CONFIG_X86_5LEVEL=y +CONFIG_X86_DIRECT_GBPAGES=y +# CONFIG_X86_CPA_STATISTICS is not set +# CONFIG_AMD_MEM_ENCRYPT is not set +CONFIG_NUMA=y +CONFIG_AMD_NUMA=y +CONFIG_X86_64_ACPI_NUMA=y +# CONFIG_NUMA_EMU is not set +CONFIG_NODES_SHIFT=6 +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_MEMORY_PROBE=y +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +# CONFIG_X86_PMEM_LEGACY is not set +# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set +CONFIG_X86_RESERVE_LOW=64 +CONFIG_MTRR=y +CONFIG_MTRR_SANITIZER=y +CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=0 +CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1 +CONFIG_X86_PAT=y +CONFIG_ARCH_USES_PG_UNCACHED=y +CONFIG_ARCH_RANDOM=y +CONFIG_X86_SMAP=y +CONFIG_X86_UMIP=y +CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS=y +CONFIG_X86_INTEL_TSX_MODE_OFF=y +# CONFIG_X86_INTEL_TSX_MODE_ON is not set +# CONFIG_X86_INTEL_TSX_MODE_AUTO is not set +# CONFIG_X86_SGX is not set +CONFIG_EFI=y +CONFIG_EFI_STUB=y +# CONFIG_EFI_MIXED is not set +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_SCHED_HRTICK=y +CONFIG_KEXEC=y +# CONFIG_KEXEC_FILE is not set +CONFIG_CRASH_DUMP=y +# CONFIG_KEXEC_JUMP is not set +CONFIG_PHYSICAL_START=0x1000000 +CONFIG_RELOCATABLE=y +# CONFIG_RANDOMIZE_BASE is not set +CONFIG_PHYSICAL_ALIGN=0x200000 +CONFIG_DYNAMIC_MEMORY_LAYOUT=y +CONFIG_HOTPLUG_CPU=y +# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_DEBUG_HOTPLUG_CPU0 is not set +# CONFIG_LEGACY_VSYSCALL_EMULATE is not set +CONFIG_LEGACY_VSYSCALL_XONLY=y +# CONFIG_LEGACY_VSYSCALL_NONE is not set +# CONFIG_CMDLINE_BOOL is not set +CONFIG_MODIFY_LDT_SYSCALL=y +# CONFIG_STRICT_SIGALTSTACK_SIZE is not set +CONFIG_HAVE_LIVEPATCH_FTRACE=y +CONFIG_HAVE_LIVEPATCH_WO_FTRACE=y + +# +# Enable Livepatch +# +# end of Enable Livepatch +# end of Processor type and features + +CONFIG_CC_HAS_SLS=y +CONFIG_CC_HAS_RETURN_THUNK=y +CONFIG_SPECULATION_MITIGATIONS=y +CONFIG_PAGE_TABLE_ISOLATION=y +CONFIG_RETPOLINE=y +CONFIG_RETHUNK=y +CONFIG_CPU_UNRET_ENTRY=y +CONFIG_CPU_IBPB_ENTRY=y +CONFIG_CPU_IBRS_ENTRY=y +CONFIG_CPU_SRSO=y +# CONFIG_SLS is not set +# CONFIG_GDS_FORCE_MITIGATION is not set +CONFIG_ARCH_HAS_ADD_PAGES=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_USE_PERCPU_NUMA_NODE_ID=y +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y +CONFIG_ARCH_ENABLE_THP_MIGRATION=y + +# +# Power management and ACPI options +# +CONFIG_ARCH_HIBERNATION_HEADER=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +CONFIG_HIBERNATE_CALLBACKS=y +CONFIG_HIBERNATION=y +CONFIG_HIBERNATION_SNAPSHOT_DEV=y +CONFIG_PM_STD_PARTITION="" +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_CLK=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +# CONFIG_ENERGY_MODEL is not set +CONFIG_ARCH_SUPPORTS_ACPI=y +CONFIG_ACPI=y +CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y +CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y +CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y +# CONFIG_ACPI_DEBUGGER is not set +CONFIG_ACPI_SPCR_TABLE=y +CONFIG_ACPI_LPIT=y +CONFIG_ACPI_SLEEP=y +CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y +# CONFIG_ACPI_EC_DEBUGFS is not set +CONFIG_ACPI_AC=y +CONFIG_ACPI_BATTERY=y +CONFIG_ACPI_BUTTON=y +CONFIG_ACPI_VIDEO=m +CONFIG_ACPI_FAN=y +# CONFIG_ACPI_TAD is not set +CONFIG_ACPI_DOCK=y +CONFIG_ACPI_CPU_FREQ_PSS=y +CONFIG_ACPI_PROCESSOR_CSTATE=y +CONFIG_ACPI_PROCESSOR_IDLE=y +CONFIG_ACPI_CPPC_LIB=y +CONFIG_ACPI_PROCESSOR=y +CONFIG_ACPI_IPMI=m +CONFIG_ACPI_HOTPLUG_CPU=y +# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set +CONFIG_ACPI_THERMAL=y +CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y +CONFIG_ACPI_TABLE_UPGRADE=y +# CONFIG_ACPI_DEBUG is not set +CONFIG_ACPI_PCI_SLOT=y +CONFIG_ACPI_CONTAINER=y +CONFIG_ACPI_HOTPLUG_MEMORY=y +CONFIG_ACPI_HOTPLUG_IOAPIC=y +# CONFIG_ACPI_SBS is not set +# CONFIG_ACPI_HED is not set +# CONFIG_ACPI_CUSTOM_METHOD is not set +# CONFIG_ACPI_BGRT is not set +# CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set +# CONFIG_ACPI_NFIT is not set +CONFIG_ACPI_NUMA=y +# CONFIG_ACPI_HMAT is not set +CONFIG_HAVE_ACPI_APEI=y +CONFIG_HAVE_ACPI_APEI_NMI=y +# CONFIG_ACPI_APEI is not set +# CONFIG_ACPI_DPTF is not set +CONFIG_ACPI_WATCHDOG=y +# CONFIG_ACPI_CONFIGFS is not set +CONFIG_ACPI_PCC=y +# CONFIG_PMIC_OPREGION is not set +CONFIG_X86_PM_TIMER=y +CONFIG_ACPI_PRMT=y +# CONFIG_SFI is not set + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +# CONFIG_CPU_FREQ_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +# CONFIG_CPUFREQ_DT is not set +CONFIG_X86_INTEL_PSTATE=y +# CONFIG_X86_PCC_CPUFREQ is not set +# CONFIG_X86_ACPI_CPUFREQ is not set +# CONFIG_X86_SPEEDSTEP_CENTRINO is not set +# CONFIG_X86_P4_CLOCKMOD is not set + +# +# shared options +# +# end of CPU Frequency scaling + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set +# end of CPU Idle + +# CONFIG_INTEL_IDLE is not set +# end of Power management and ACPI options + +# +# Bus options (PCI etc.) +# +CONFIG_PCI_DIRECT=y +CONFIG_PCI_MMCONFIG=y +CONFIG_MMCONF_FAM10H=y +# CONFIG_PCI_CNB20LE_QUIRK is not set +# CONFIG_ISA_BUS is not set +CONFIG_ISA_DMA_API=y +CONFIG_AMD_NB=y +# CONFIG_X86_SYSFB is not set +# end of Bus options (PCI etc.) + +# +# Binary Emulations +# +# CONFIG_IA32_EMULATION is not set +# CONFIG_X86_X32 is not set +# end of Binary Emulations + +# +# Firmware Drivers +# +# CONFIG_EDD is not set +# CONFIG_FIRMWARE_MEMMAP is not set +CONFIG_DMIID=y +CONFIG_DMI_SYSFS=y +CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y +CONFIG_ISCSI_IBFT_FIND=y +CONFIG_ISCSI_IBFT=m +# CONFIG_FW_CFG_SYSFS is not set +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +# CONFIG_EFI_VARS is not set +CONFIG_EFI_ESRT=y +CONFIG_EFI_RUNTIME_MAP=y +# CONFIG_EFI_FAKE_MEMMAP is not set +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y +# CONFIG_EFI_BOOTLOADER_CONTROL is not set +CONFIG_EFI_CAPSULE_LOADER=m +CONFIG_EFI_TEST=m +CONFIG_APPLE_PROPERTIES=y +# CONFIG_RESET_ATTACK_MITIGATION is not set +# CONFIG_EFI_RCI2_TABLE is not set +# CONFIG_EFI_DISABLE_PCI_DMA is not set +# end of EFI (Extensible Firmware Interface) Support + +CONFIG_EFI_DEV_PATH_PARSER=y +CONFIG_EFI_EARLYCON=y +CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +CONFIG_HAVE_KVM=y +# CONFIG_VIRTUALIZATION is not set +CONFIG_AS_AVX512=y +CONFIG_AS_SHA1_NI=y +CONFIG_AS_SHA256_NI=y +CONFIG_AS_TPAUSE=y + +# +# General architecture-dependent options +# +CONFIG_CRASH_CORE=y +CONFIG_KEXEC_CORE=y +# CONFIG_QUICK_KEXEC is not set +CONFIG_ARCH_WANT_RESERVE_CRASH_KERNEL=y +CONFIG_HOTPLUG_SMT=y +CONFIG_GENERIC_ENTRY=y +# CONFIG_OPROFILE is not set +CONFIG_HAVE_OPROFILE=y +CONFIG_OPROFILE_NMI_TIMER=y +# CONFIG_KPROBES is not set +# CONFIG_JUMP_LABEL is not set +# CONFIG_STATIC_CALL_SELFTEST is not set +CONFIG_UPROBES=y +# CONFIG_UPROBES_SUPPORT_PC_ALTER is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_OPTPROBES=y +CONFIG_HAVE_KPROBES_ON_FTRACE=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_ARCH_HAS_CPU_FINALIZE_INIT=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y +CONFIG_HAVE_USER_RETURN_NOTIFIER=y +CONFIG_HAVE_PERF_EVENTS_NMI=y +CONFIG_HAVE_HARDLOCKUP_DETECTOR_PERF=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_HAVE_ARCH_SECCOMP=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +# CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_ARCH_STACKLEAK=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOVE_PUD=y +CONFIG_HAVE_MOVE_PMD=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_ARCH_HUGE_VMALLOC=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_HAVE_ARCH_SOFT_DIRTY=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_HAVE_EXIT_THREAD=y +CONFIG_ARCH_MMAP_RND_BITS=28 +CONFIG_HAVE_STACK_VALIDATION=y +CONFIG_HAVE_RELIABLE_STACKTRACE=y +# CONFIG_COMPAT_32BIT_TIME is not set +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y +CONFIG_RANDOMIZE_KSTACK_OFFSET=y +# CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT is not set +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y +CONFIG_ARCH_USE_MEMREMAP_PROT=y +# CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_HAS_MEM_ENCRYPT=y +CONFIG_HAVE_STATIC_CALL=y +CONFIG_HAVE_STATIC_CALL_INLINE=y +CONFIG_HAVE_PREEMPT_DYNAMIC=y +CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y +CONFIG_DYNAMIC_SIGFRAME=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_HAVE_GCC_PLUGINS=y +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_ASM_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_CGROUP_RWSTAT=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_INTEGRITY_T10=m +CONFIG_BLK_DEV_ZONED=y +CONFIG_BLK_DEV_THROTTLING=y +# CONFIG_BLK_DEV_THROTTLING_LOW is not set +# CONFIG_BLK_CMDLINE_PARSER is not set +CONFIG_BLK_WBT=y +# CONFIG_BLK_CGROUP_IOLATENCY is not set +# CONFIG_BLK_CGROUP_IOCOST is not set +CONFIG_BLK_WBT_MQ=y +CONFIG_BLK_DEBUG_FS=y +CONFIG_BLK_DEBUG_FS_ZONED=y +# CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set +# CONFIG_BLK_DEV_DUMPINFO is not set +# CONFIG_BLK_BIO_DISPATCH_ASYNC is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIX_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +# CONFIG_CMDLINE_PARTITION is not set +# end of Partition Types + +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_MQ_RDMA=y +CONFIG_BLK_PM=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +CONFIG_IOSCHED_BFQ=y +CONFIG_BFQ_GROUP_IOSCHED=y +# CONFIG_BFQ_CGROUP_DEBUG is not set +# end of IO Schedulers + +CONFIG_PADATA=y +CONFIG_ASN1=y +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_INLINE_READ_UNLOCK=y +CONFIG_INLINE_READ_UNLOCK_IRQ=y +CONFIG_INLINE_WRITE_UNLOCK=y +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y +CONFIG_ARCH_HAS_SYNC_CORE_BEFORE_USERMODE=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +# CONFIG_NOKASLR_MEM_RANGE is not set +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ELFCORE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +CONFIG_BINFMT_MISC=m +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_NEED_MULTIPLE_NODES=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_FAST_GUP=y +CONFIG_NUMA_KEEP_MEMINFO=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_HAVE_BOOTMEM_INFO_NODE=y +CONFIG_MEMORY_HOTPLUG=y +CONFIG_MEMORY_HOTPLUG_SPARSE=y +CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y +CONFIG_MEMORY_HOTREMOVE=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_MEMORY_BALLOON=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_COMPACTION=y +CONFIG_PAGE_REPORTING=y +CONFIG_MIGRATION=y +# CONFIG_HUGE_VMALLOC_DEFAULT_ENABLED is not set +CONFIG_CONTIG_ALLOC=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_MMU_NOTIFIER=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +# CONFIG_MEMORY_FAILURE is not set +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y +# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +CONFIG_ARCH_WANTS_THP_SWAP=y +CONFIG_THP_SWAP=y +CONFIG_CLEANCACHE=y +CONFIG_FRONTSWAP=y +CONFIG_MEMCG_QOS=y +# CONFIG_MEMCG_SWAP_QOS is not set +# CONFIG_ETMEM is not set +# CONFIG_USERSWAP is not set +# CONFIG_PAGE_CACHE_LIMIT is not set +# CONFIG_SWAP_EXTENSION is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_AREAS=19 +# CONFIG_MEM_SOFT_DIRTY is not set +CONFIG_ZSWAP=y +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set +CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO=y +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD is not set +CONFIG_ZSWAP_COMPRESSOR_DEFAULT="lzo" +CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y +# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set +# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set +CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud" +# CONFIG_ZSWAP_DEFAULT_ON is not set +CONFIG_ZPOOL=y +CONFIG_ZBUD=y +CONFIG_Z3FOLD=y +CONFIG_ZSMALLOC=y +CONFIG_ZSMALLOC_STAT=y +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +CONFIG_PAGE_IDLE_FLAG=y +CONFIG_IDLE_PAGE_TRACKING=y +CONFIG_ARCH_HAS_PTE_DEVMAP=y +# CONFIG_ZONE_DEVICE is not set +CONFIG_HMM_MIRROR=y +CONFIG_FRAME_VECTOR=y +CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y +CONFIG_ARCH_HAS_PKEYS=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +# CONFIG_READ_ONLY_THP_FOR_FS is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +# CONFIG_MEMORY_RELIABLE is not set +# CONFIG_CLEAR_FREELIST_PAGE is not set +# CONFIG_THP_NUMA_CONTROL is not set + +# +# Data Access Monitoring +# +# CONFIG_DAMON is not set +# end of Data Access Monitoring +# end of Memory Management options + +CONFIG_NET=y +CONFIG_NET_INGRESS=y +CONFIG_NET_EGRESS=y +CONFIG_NET_REDIRECT=y +CONFIG_SKB_EXTENSIONS=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_DIAG=m +CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +CONFIG_UNIX_DIAG=m +CONFIG_TLS=m +CONFIG_TLS_DEVICE=y +CONFIG_TLS_TOE=y +CONFIG_XFRM=y +CONFIG_XFRM_OFFLOAD=y +CONFIG_XFRM_ALGO=y +CONFIG_XFRM_USER=y +CONFIG_XFRM_INTERFACE=m +CONFIG_XFRM_SUB_POLICY=y +CONFIG_XFRM_MIGRATE=y +CONFIG_XFRM_STATISTICS=y +CONFIG_XFRM_AH=m +CONFIG_XFRM_ESP=m +CONFIG_XFRM_IPCOMP=m +CONFIG_NET_KEY=m +CONFIG_NET_KEY_MIGRATE=y +CONFIG_XFRM_ESPINTCP=y +CONFIG_SMC=m +CONFIG_SMC_DIAG=m +CONFIG_XDP_SOCKETS=y +CONFIG_XDP_SOCKETS_DIAG=m +# CONFIG_XSK_MULTI_BUF is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_FIB_TRIE_STATS=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_ROUTE_CLASSID=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE_DEMUX=m +CONFIG_NET_IP_TUNNEL=m +CONFIG_NET_IPGRE=m +CONFIG_NET_IPGRE_BROADCAST=y +CONFIG_IP_MROUTE_COMMON=y +CONFIG_IP_MROUTE=y +CONFIG_IP_MROUTE_MULTIPLE_TABLES=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +CONFIG_SYN_COOKIES=y +CONFIG_NET_IPVTI=m +CONFIG_NET_UDP_TUNNEL=m +CONFIG_NET_FOU=m +CONFIG_NET_FOU_IP_TUNNELS=y +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +CONFIG_INET_ESP_OFFLOAD=m +CONFIG_INET_ESPINTCP=y +CONFIG_INET_IPCOMP=m +CONFIG_INET_TABLE_PERTURB_ORDER=16 +CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INET_TUNNEL=m +CONFIG_INET_DIAG=m +CONFIG_INET_TCP_DIAG=m +CONFIG_INET_UDP_DIAG=m +CONFIG_INET_RAW_DIAG=m +CONFIG_INET_DIAG_DESTROY=y +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_BIC=m +CONFIG_TCP_CONG_CUBIC=m +CONFIG_TCP_CONG_WESTWOOD=m +CONFIG_TCP_CONG_HTCP=m +CONFIG_TCP_CONG_HSTCP=m +CONFIG_TCP_CONG_HYBLA=m +CONFIG_TCP_CONG_VEGAS=m +CONFIG_TCP_CONG_NV=m +CONFIG_TCP_CONG_SCALABLE=m +CONFIG_TCP_CONG_LP=m +CONFIG_TCP_CONG_VENO=m +CONFIG_TCP_CONG_YEAH=m +CONFIG_TCP_CONG_ILLINOIS=m +CONFIG_TCP_CONG_DCTCP=m +CONFIG_TCP_CONG_CDG=m +CONFIG_TCP_CONG_BBR=m +CONFIG_DEFAULT_RENO=y +CONFIG_DEFAULT_TCP_CONG="reno" +CONFIG_TCP_MD5SIG=y +# CONFIG_TCP_COMP is not set +CONFIG_IPV6=m +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_ESP_OFFLOAD=m +CONFIG_INET6_ESPINTCP=y +CONFIG_INET6_IPCOMP=m +CONFIG_IPV6_MIP6=m +CONFIG_IPV6_ILA=m +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET6_TUNNEL=m +CONFIG_IPV6_VTI=m +CONFIG_IPV6_SIT=m +CONFIG_IPV6_SIT_6RD=y +CONFIG_IPV6_NDISC_NODETYPE=y +CONFIG_IPV6_TUNNEL=m +CONFIG_IPV6_GRE=m +CONFIG_IPV6_FOU=m +CONFIG_IPV6_FOU_TUNNEL=m +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_IPV6_MROUTE=y +CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y +CONFIG_IPV6_PIMSM_V2=y +CONFIG_IPV6_SEG6_LWTUNNEL=y +CONFIG_IPV6_SEG6_HMAC=y +CONFIG_IPV6_RPL_LWTUNNEL=y +CONFIG_MPTCP=y +CONFIG_INET_MPTCP_DIAG=m +CONFIG_NETWORK_SECMARK=y +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_NETWORK_PHY_TIMESTAMPING=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=m + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_FAMILY_BRIDGE=y +CONFIG_NETFILTER_FAMILY_ARP=y +CONFIG_NETFILTER_NETLINK_ACCT=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NETFILTER_NETLINK_OSF=m +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_COMMON=m +CONFIG_NF_LOG_NETDEV=m +CONFIG_NETFILTER_CONNCOUNT=m +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_ZONES=y +# CONFIG_NF_CONNTRACK_PROCFS is not set +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CONNTRACK_TIMEOUT=y +CONFIG_NF_CONNTRACK_TIMESTAMP=y +CONFIG_NF_CONNTRACK_LABELS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_GRE=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=m +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_BROADCAST=m +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_SNMP=m +CONFIG_NF_CONNTRACK_PPTP=m +CONFIG_NF_CONNTRACK_SANE=m +CONFIG_NF_CONNTRACK_SIP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_NETLINK=m +CONFIG_NF_CT_NETLINK_TIMEOUT=m +CONFIG_NF_CT_NETLINK_HELPER=m +CONFIG_NETFILTER_NETLINK_GLUE_CT=y +CONFIG_NF_NAT=m +CONFIG_NF_NAT_AMANDA=m +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_IRC=m +CONFIG_NF_NAT_SIP=m +CONFIG_NF_NAT_TFTP=m +CONFIG_NF_NAT_REDIRECT=y +CONFIG_NF_NAT_MASQUERADE=y +CONFIG_NETFILTER_SYNPROXY=m +CONFIG_NF_TABLES=m +CONFIG_NF_TABLES_INET=y +CONFIG_NF_TABLES_NETDEV=y +CONFIG_NFT_NUMGEN=m +CONFIG_NFT_CT=m +CONFIG_NFT_FLOW_OFFLOAD=m +CONFIG_NFT_COUNTER=m +CONFIG_NFT_CONNLIMIT=m +CONFIG_NFT_LOG=m +CONFIG_NFT_LIMIT=m +CONFIG_NFT_MASQ=m +CONFIG_NFT_REDIR=m +CONFIG_NFT_NAT=m +CONFIG_NFT_TUNNEL=m +CONFIG_NFT_OBJREF=m +CONFIG_NFT_QUEUE=m +CONFIG_NFT_QUOTA=m +CONFIG_NFT_REJECT=m +CONFIG_NFT_REJECT_INET=m +CONFIG_NFT_COMPAT=m +CONFIG_NFT_HASH=m +CONFIG_NFT_FIB=m +CONFIG_NFT_FIB_INET=m +CONFIG_NFT_XFRM=m +CONFIG_NFT_SOCKET=m +CONFIG_NFT_OSF=m +CONFIG_NFT_TPROXY=m +CONFIG_NFT_SYNPROXY=m +CONFIG_NF_DUP_NETDEV=m +CONFIG_NFT_DUP_NETDEV=m +CONFIG_NFT_FWD_NETDEV=m +CONFIG_NFT_FIB_NETDEV=m +CONFIG_NF_FLOW_TABLE_INET=m +CONFIG_NF_FLOW_TABLE=m +CONFIG_NETFILTER_XTABLES=y + +# +# Xtables combined modules +# +CONFIG_NETFILTER_XT_MARK=m +CONFIG_NETFILTER_XT_CONNMARK=m +CONFIG_NETFILTER_XT_SET=m + +# +# Xtables targets +# +CONFIG_NETFILTER_XT_TARGET_AUDIT=m +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m +CONFIG_NETFILTER_XT_TARGET_CT=m +CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_HL=m +CONFIG_NETFILTER_XT_TARGET_HMARK=m +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m +CONFIG_NETFILTER_XT_TARGET_LED=m +CONFIG_NETFILTER_XT_TARGET_LOG=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_NAT=m +CONFIG_NETFILTER_XT_TARGET_NETMAP=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +CONFIG_NETFILTER_XT_TARGET_NOTRACK=m +CONFIG_NETFILTER_XT_TARGET_RATEEST=m +CONFIG_NETFILTER_XT_TARGET_REDIRECT=m +CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m +CONFIG_NETFILTER_XT_TARGET_TEE=m +CONFIG_NETFILTER_XT_TARGET_TPROXY=m +CONFIG_NETFILTER_XT_TARGET_TRACE=m +CONFIG_NETFILTER_XT_TARGET_SECMARK=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +CONFIG_NETFILTER_XT_MATCH_BPF=m +CONFIG_NETFILTER_XT_MATCH_CGROUP=m +CONFIG_NETFILTER_XT_MATCH_CLUSTER=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_CPU=m +CONFIG_NETFILTER_XT_MATCH_DCCP=m +CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ECN=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_HL=m +CONFIG_NETFILTER_XT_MATCH_IPCOMP=m +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +CONFIG_NETFILTER_XT_MATCH_IPVS=m +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_NFACCT=m +CONFIG_NETFILTER_XT_MATCH_OSF=m +CONFIG_NETFILTER_XT_MATCH_OWNER=m +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_RATEEST=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_RECENT=m +CONFIG_NETFILTER_XT_MATCH_SCTP=m +CONFIG_NETFILTER_XT_MATCH_SOCKET=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_MATCH_U32=m +# end of Core Netfilter Configuration + +CONFIG_IP_SET=m +CONFIG_IP_SET_MAX=256 +CONFIG_IP_SET_BITMAP_IP=m +CONFIG_IP_SET_BITMAP_IPMAC=m +CONFIG_IP_SET_BITMAP_PORT=m +CONFIG_IP_SET_HASH_IP=m +CONFIG_IP_SET_HASH_IPMARK=m +CONFIG_IP_SET_HASH_IPPORT=m +CONFIG_IP_SET_HASH_IPPORTIP=m +CONFIG_IP_SET_HASH_IPPORTNET=m +CONFIG_IP_SET_HASH_IPMAC=m +CONFIG_IP_SET_HASH_MAC=m +CONFIG_IP_SET_HASH_NETPORTNET=m +CONFIG_IP_SET_HASH_NET=m +CONFIG_IP_SET_HASH_NETNET=m +CONFIG_IP_SET_HASH_NETPORT=m +CONFIG_IP_SET_HASH_NETIFACE=m +CONFIG_IP_SET_LIST_SET=m +CONFIG_IP_VS=m +CONFIG_IP_VS_IPV6=y +CONFIG_IP_VS_DEBUG=y +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_PROTO_AH_ESP=y +CONFIG_IP_VS_PROTO_ESP=y +CONFIG_IP_VS_PROTO_AH=y +CONFIG_IP_VS_PROTO_SCTP=y + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_WRR=m +CONFIG_IP_VS_LC=m +CONFIG_IP_VS_WLC=m +CONFIG_IP_VS_FO=m +CONFIG_IP_VS_OVF=m +CONFIG_IP_VS_LBLC=m +CONFIG_IP_VS_LBLCR=m +CONFIG_IP_VS_DH=m +CONFIG_IP_VS_SH=m +CONFIG_IP_VS_MH=m +CONFIG_IP_VS_SED=m +CONFIG_IP_VS_NQ=m + +# +# IPVS SH scheduler +# +CONFIG_IP_VS_SH_TAB_BITS=8 + +# +# IPVS MH scheduler +# +CONFIG_IP_VS_MH_TAB_INDEX=12 + +# +# IPVS application helper +# +CONFIG_IP_VS_FTP=m +CONFIG_IP_VS_NFCT=y +CONFIG_IP_VS_PE_SIP=m + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_SOCKET_IPV4=m +CONFIG_NF_TPROXY_IPV4=m +CONFIG_NF_TABLES_IPV4=y +CONFIG_NFT_REJECT_IPV4=m +CONFIG_NFT_DUP_IPV4=m +CONFIG_NFT_FIB_IPV4=m +CONFIG_NF_TABLES_ARP=y +CONFIG_NF_FLOW_TABLE_IPV4=m +CONFIG_NF_DUP_IPV4=m +CONFIG_NF_LOG_ARP=m +CONFIG_NF_LOG_IPV4=m +CONFIG_NF_REJECT_IPV4=m +CONFIG_NF_NAT_SNMP_BASIC=m +CONFIG_NF_NAT_PPTP=m +CONFIG_NF_NAT_H323=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_RPFILTER=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_SYNPROXY=m +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_CLUSTERIP=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m +# end of IP: Netfilter Configuration + +# +# IPv6: Netfilter Configuration +# +CONFIG_NF_SOCKET_IPV6=m +CONFIG_NF_TPROXY_IPV6=m +CONFIG_NF_TABLES_IPV6=y +CONFIG_NFT_REJECT_IPV6=m +CONFIG_NFT_DUP_IPV6=m +CONFIG_NFT_FIB_IPV6=m +CONFIG_NF_FLOW_TABLE_IPV6=m +CONFIG_NF_DUP_IPV6=m +CONFIG_NF_REJECT_IPV6=m +CONFIG_NF_LOG_IPV6=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_RPFILTER=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_MATCH_SRH=m +CONFIG_IP6_NF_TARGET_HL=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_TARGET_SYNPROXY=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_RAW=m +CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +CONFIG_IP6_NF_TARGET_NPT=m +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=m +CONFIG_NF_TABLES_BRIDGE=m +CONFIG_NFT_BRIDGE_META=m +CONFIG_NFT_BRIDGE_REJECT=m +CONFIG_NF_LOG_BRIDGE=m +CONFIG_NF_CONNTRACK_BRIDGE=m +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_IP6=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_LOG=m +CONFIG_BRIDGE_EBT_NFLOG=m +CONFIG_BPFILTER=y +CONFIG_BPFILTER_UMH=m +CONFIG_IP_DCCP=m +CONFIG_INET_DCCP_DIAG=m + +# +# DCCP CCIDs Configuration +# +CONFIG_IP_DCCP_CCID2_DEBUG=y +CONFIG_IP_DCCP_CCID3=y +CONFIG_IP_DCCP_CCID3_DEBUG=y +CONFIG_IP_DCCP_TFRC_LIB=y +CONFIG_IP_DCCP_TFRC_DEBUG=y +# end of DCCP CCIDs Configuration + +# +# DCCP Kernel Hacking +# +CONFIG_IP_DCCP_DEBUG=y +# end of DCCP Kernel Hacking + +CONFIG_IP_SCTP=m +CONFIG_SCTP_DBG_OBJCNT=y +# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5 is not set +CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1=y +# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_NONE is not set +CONFIG_SCTP_COOKIE_HMAC_MD5=y +CONFIG_SCTP_COOKIE_HMAC_SHA1=y +CONFIG_INET_SCTP_DIAG=m +CONFIG_RDS=m +CONFIG_RDS_RDMA=m +CONFIG_RDS_TCP=m +CONFIG_RDS_DEBUG=y +CONFIG_TIPC=m +CONFIG_TIPC_MEDIA_IB=y +CONFIG_TIPC_MEDIA_UDP=y +CONFIG_TIPC_CRYPTO=y +CONFIG_TIPC_DIAG=m +CONFIG_ATM=m +CONFIG_ATM_CLIP=m +CONFIG_ATM_CLIP_NO_ICMP=y +CONFIG_ATM_LANE=m +CONFIG_ATM_MPOA=m +CONFIG_ATM_BR2684=m +CONFIG_ATM_BR2684_IPFILTER=y +CONFIG_L2TP=m +# CONFIG_L2TP_DEBUGFS is not set +CONFIG_L2TP_V3=y +CONFIG_L2TP_IP=m +CONFIG_L2TP_ETH=m +CONFIG_STP=m +CONFIG_GARP=m +CONFIG_MRP=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_BRIDGE_MRP=y +CONFIG_HAVE_NET_DSA=y +CONFIG_NET_DSA=m +CONFIG_NET_DSA_TAG_8021Q=m +CONFIG_NET_DSA_TAG_AR9331=m +CONFIG_NET_DSA_TAG_BRCM_COMMON=m +CONFIG_NET_DSA_TAG_BRCM=m +CONFIG_NET_DSA_TAG_BRCM_PREPEND=m +CONFIG_NET_DSA_TAG_GSWIP=m +CONFIG_NET_DSA_TAG_DSA=m +CONFIG_NET_DSA_TAG_EDSA=m +CONFIG_NET_DSA_TAG_MTK=m +CONFIG_NET_DSA_TAG_KSZ=m +CONFIG_NET_DSA_TAG_RTL4_A=m +CONFIG_NET_DSA_TAG_OCELOT=m +CONFIG_NET_DSA_TAG_QCA=m +CONFIG_NET_DSA_TAG_LAN9303=m +CONFIG_NET_DSA_TAG_SJA1105=m +CONFIG_NET_DSA_TAG_TRAILER=m +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLAN_8021Q_MVRP=y +CONFIG_LLC=m +CONFIG_LLC2=m +CONFIG_ATALK=m +CONFIG_DEV_APPLETALK=m +CONFIG_IPDDP=m +CONFIG_IPDDP_ENCAP=y +CONFIG_X25=m +CONFIG_LAPB=m +CONFIG_PHONET=m +CONFIG_6LOWPAN=m +# CONFIG_6LOWPAN_DEBUGFS is not set +# CONFIG_6LOWPAN_NHC is not set +CONFIG_IEEE802154=m +CONFIG_IEEE802154_NL802154_EXPERIMENTAL=y +CONFIG_IEEE802154_SOCKET=m +CONFIG_IEEE802154_6LOWPAN=m +CONFIG_MAC802154=m +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_MULTIQ=m +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFB=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_SCH_TBF=m +CONFIG_NET_SCH_CBS=m +CONFIG_NET_SCH_ETF=m +CONFIG_NET_SCH_TAPRIO=m +CONFIG_NET_SCH_GRED=m +CONFIG_NET_SCH_NETEM=m +CONFIG_NET_SCH_DRR=m +CONFIG_NET_SCH_MQPRIO=m +CONFIG_NET_SCH_SKBPRIO=m +CONFIG_NET_SCH_CHOKE=m +CONFIG_NET_SCH_QFQ=m +CONFIG_NET_SCH_CODEL=m +CONFIG_NET_SCH_FQ_CODEL=y +CONFIG_NET_SCH_CAKE=m +CONFIG_NET_SCH_FQ=m +CONFIG_NET_SCH_HHF=m +CONFIG_NET_SCH_PIE=m +CONFIG_NET_SCH_FQ_PIE=m +CONFIG_NET_SCH_INGRESS=m +CONFIG_NET_SCH_PLUG=m +CONFIG_NET_SCH_ETS=m +CONFIG_NET_SCH_DEFAULT=y +# CONFIG_DEFAULT_FQ is not set +# CONFIG_DEFAULT_CODEL is not set +CONFIG_DEFAULT_FQ_CODEL=y +# CONFIG_DEFAULT_FQ_PIE is not set +# CONFIG_DEFAULT_SFQ is not set +# CONFIG_DEFAULT_PFIFO_FAST is not set +CONFIG_DEFAULT_NET_SCH="fq_codel" + +# +# Classification +# +CONFIG_NET_CLS=y +CONFIG_NET_CLS_BASIC=m +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_FW=m +CONFIG_NET_CLS_U32=m +CONFIG_CLS_U32_PERF=y +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_FLOW=m +CONFIG_NET_CLS_CGROUP=y +CONFIG_NET_CLS_BPF=m +CONFIG_NET_CLS_FLOWER=m +CONFIG_NET_CLS_MATCHALL=m +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_STACK=32 +CONFIG_NET_EMATCH_CMP=m +CONFIG_NET_EMATCH_NBYTE=m +CONFIG_NET_EMATCH_U32=m +CONFIG_NET_EMATCH_META=m +CONFIG_NET_EMATCH_TEXT=m +# CONFIG_NET_EMATCH_CANID is not set +CONFIG_NET_EMATCH_IPSET=m +CONFIG_NET_EMATCH_IPT=m +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_POLICE=m +CONFIG_NET_ACT_GACT=m +CONFIG_GACT_PROB=y +CONFIG_NET_ACT_MIRRED=m +CONFIG_NET_ACT_SAMPLE=m +CONFIG_NET_ACT_IPT=m +CONFIG_NET_ACT_NAT=m +CONFIG_NET_ACT_PEDIT=m +CONFIG_NET_ACT_SIMP=m +CONFIG_NET_ACT_SKBEDIT=m +CONFIG_NET_ACT_CSUM=m +CONFIG_NET_ACT_MPLS=m +CONFIG_NET_ACT_VLAN=m +CONFIG_NET_ACT_BPF=m +CONFIG_NET_ACT_CONNMARK=m +CONFIG_NET_ACT_CTINFO=m +CONFIG_NET_ACT_SKBMOD=m +CONFIG_NET_ACT_IFE=m +CONFIG_NET_ACT_TUNNEL_KEY=m +CONFIG_NET_ACT_CT=m +CONFIG_NET_ACT_GATE=m +CONFIG_NET_IFE_SKBMARK=m +CONFIG_NET_IFE_SKBPRIO=m +CONFIG_NET_IFE_SKBTCINDEX=m +CONFIG_NET_TC_SKB_EXT=y +CONFIG_NET_SCH_FIFO=y +CONFIG_DCB=y +CONFIG_DNS_RESOLVER=y +CONFIG_BATMAN_ADV=m +CONFIG_BATMAN_ADV_BATMAN_V=y +CONFIG_BATMAN_ADV_BLA=y +CONFIG_BATMAN_ADV_DAT=y +CONFIG_BATMAN_ADV_NC=y +CONFIG_BATMAN_ADV_MCAST=y +# CONFIG_BATMAN_ADV_DEBUGFS is not set +CONFIG_BATMAN_ADV_DEBUG=y +CONFIG_BATMAN_ADV_SYSFS=y +# CONFIG_BATMAN_ADV_TRACING is not set +CONFIG_OPENVSWITCH=m +CONFIG_OPENVSWITCH_GRE=m +CONFIG_OPENVSWITCH_VXLAN=m +CONFIG_OPENVSWITCH_GENEVE=m +CONFIG_VSOCKETS=m +CONFIG_VSOCKETS_DIAG=m +CONFIG_VSOCKETS_LOOPBACK=m +CONFIG_VIRTIO_VSOCKETS=m +CONFIG_VIRTIO_VSOCKETS_COMMON=m +CONFIG_NETLINK_DIAG=m +CONFIG_MPLS=y +CONFIG_NET_MPLS_GSO=y +CONFIG_MPLS_ROUTING=m +CONFIG_MPLS_IPTUNNEL=m +CONFIG_NET_NSH=y +CONFIG_HSR=m +CONFIG_NET_SWITCHDEV=y +CONFIG_NET_L3_MASTER_DEV=y +CONFIG_QRTR=m +CONFIG_QRTR_TUN=m +CONFIG_NET_NCSI=y +CONFIG_NCSI_OEM_CMD_GET_MAC=y +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +CONFIG_CGROUP_NET_PRIO=y +CONFIG_CGROUP_NET_CLASSID=y +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +# CONFIG_BPF_JIT is not set +CONFIG_BPF_STREAM_PARSER=y +# CONFIG_EULER_SOCKETMAP is not set +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +CONFIG_NET_PKTGEN=m +# CONFIG_NET_DROP_MONITOR is not set +# end of Network testing +# end of Networking options + +# CONFIG_HAMRADIO is not set +CONFIG_CAN=m +CONFIG_CAN_RAW=m +CONFIG_CAN_BCM=m +CONFIG_CAN_GW=m +# CONFIG_CAN_J1939 is not set +# CONFIG_CAN_ISOTP is not set + +# +# CAN Device Drivers +# +CONFIG_CAN_VCAN=m +# CONFIG_CAN_VXCAN is not set +CONFIG_CAN_SLCAN=m +CONFIG_CAN_DEV=m +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_FLEXCAN is not set +# CONFIG_CAN_GRCAN is not set +# CONFIG_CAN_KVASER_PCIEFD is not set +CONFIG_CAN_C_CAN=m +CONFIG_CAN_C_CAN_PLATFORM=m +CONFIG_CAN_C_CAN_PCI=m +CONFIG_CAN_CC770=m +# CONFIG_CAN_CC770_ISA is not set +CONFIG_CAN_CC770_PLATFORM=m +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_PEAK_PCIEFD is not set +CONFIG_CAN_SJA1000=m +CONFIG_CAN_EMS_PCI=m +# CONFIG_CAN_F81601 is not set +CONFIG_CAN_KVASER_PCI=m +CONFIG_CAN_PEAK_PCI=m +CONFIG_CAN_PEAK_PCIEC=y +CONFIG_CAN_PLX_PCI=m +# CONFIG_CAN_SJA1000_ISA is not set +CONFIG_CAN_SJA1000_PLATFORM=m +CONFIG_CAN_SOFTING=m + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set +# CONFIG_CAN_MCP251XFD is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +CONFIG_CAN_8DEV_USB=m +CONFIG_CAN_EMS_USB=m +CONFIG_CAN_ESD_USB2=m +# CONFIG_CAN_GS_USB is not set +CONFIG_CAN_KVASER_USB=m +# CONFIG_CAN_MCBA_USB is not set +CONFIG_CAN_PEAK_USB=m +# CONFIG_CAN_UCAN is not set +# end of CAN USB interfaces + +# CONFIG_CAN_DEBUG_DEVICES is not set +# end of CAN Device Drivers + +CONFIG_BT=m +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_CMTP=m +CONFIG_BT_HIDP=m +CONFIG_BT_HS=y +CONFIG_BT_LE=y +# CONFIG_BT_6LOWPAN is not set +# CONFIG_BT_LEDS is not set +# CONFIG_BT_MSFTEXT is not set +CONFIG_BT_DEBUGFS=y +# CONFIG_BT_SELFTEST is not set + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=m +CONFIG_BT_RTL=m +CONFIG_BT_HCIBTUSB=m +CONFIG_BT_HCIBTUSB_AUTOSUSPEND=y +# CONFIG_BT_HCIBTUSB_BCM is not set +# CONFIG_BT_HCIBTUSB_MTK is not set +CONFIG_BT_HCIBTUSB_RTL=y +CONFIG_BT_HCIBTSDIO=m +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_ATH3K=y +# CONFIG_BT_HCIUART_INTEL is not set +# CONFIG_BT_HCIUART_AG6XX is not set +CONFIG_BT_HCIBCM203X=m +CONFIG_BT_HCIBPA10X=m +CONFIG_BT_HCIBFUSB=m +CONFIG_BT_HCIVHCI=m +CONFIG_BT_MRVL=m +CONFIG_BT_MRVL_SDIO=m +CONFIG_BT_ATH3K=m +# CONFIG_BT_MTKSDIO is not set +# end of Bluetooth device drivers + +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_STREAM_PARSER=y +CONFIG_FIB_RULES=y +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +CONFIG_CFG80211_CRDA_SUPPORT=y +CONFIG_CFG80211_WEXT=y +CONFIG_LIB80211=m +CONFIG_LIB80211_CRYPT_WEP=m +CONFIG_LIB80211_CRYPT_CCMP=m +# CONFIG_LIB80211_DEBUG is not set +CONFIG_MAC80211=m +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=m +CONFIG_RFKILL_LEDS=y +CONFIG_RFKILL_INPUT=y +# CONFIG_RFKILL_GPIO is not set +CONFIG_NET_9P=y +CONFIG_NET_9P_VIRTIO=y +# CONFIG_NET_9P_RDMA is not set +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +CONFIG_CEPH_LIB=m +# CONFIG_CEPH_LIB_PRETTYDEBUG is not set +CONFIG_CEPH_LIB_USE_DNS_RESOLVER=y +# CONFIG_NFC is not set +CONFIG_PSAMPLE=m +CONFIG_NET_IFE=m +CONFIG_LWTUNNEL=y +CONFIG_LWTUNNEL_BPF=y +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +CONFIG_SOCK_VALIDATE_XMIT=y +CONFIG_NET_SOCK_MSG=y +CONFIG_NET_DEVLINK=y +CONFIG_PAGE_POOL=y +# CONFIG_PAGE_POOL_STATS is not set +CONFIG_FAILOVER=m +CONFIG_ETHTOOL_NETLINK=y +# CONFIG_BPF_NET_GLOBAL_PROG is not set +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_HAVE_EISA=y +# CONFIG_EISA is not set +CONFIG_HAVE_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCIEPORTBUS=y +CONFIG_HOTPLUG_PCI_PCIE=y +CONFIG_PCIEAER=y +CONFIG_PCIEAER_INJECT=m +CONFIG_PCIE_ECRC=y +CONFIG_PCIEASPM=y +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +CONFIG_PCIE_DPC=y +# CONFIG_PCIE_PTM is not set +# CONFIG_PCIE_EDR is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +CONFIG_PCI_STUB=y +CONFIG_PCI_PF_STUB=m +CONFIG_PCI_ATS=y +CONFIG_PCI_LOCKLESS_CONFIG=y +CONFIG_PCI_IOV=y +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +CONFIG_PCI_LABEL=y +# CONFIG_PCIE_BUS_TUNE_OFF is not set +CONFIG_PCIE_BUS_DEFAULT=y +# CONFIG_PCIE_BUS_SAFE is not set +# CONFIG_PCIE_BUS_PERFORMANCE is not set +# CONFIG_PCIE_BUS_PEER2PEER is not set +CONFIG_HOTPLUG_PCI=y +CONFIG_HOTPLUG_PCI_ACPI=y +# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +CONFIG_HOTPLUG_PCI_SHPC=y + +# +# PCI controller drivers +# +# CONFIG_PCI_FTPCI100 is not set +# CONFIG_PCI_HOST_GENERIC is not set +# CONFIG_PCIE_XILINX is not set +# CONFIG_VMD is not set + +# +# DesignWare PCI Core Support +# +# CONFIG_PCIE_DW_PLAT_HOST is not set +# CONFIG_PCIE_INTEL_GW is not set +# CONFIG_PCI_MESON is not set +# end of DesignWare PCI Core Support + +# +# Mobiveil PCIe Core Support +# +# end of Mobiveil PCIe Core Support + +# +# Cadence PCIe controllers support +# +# CONFIG_PCIE_CADENCE_PLAT_HOST is not set +# CONFIG_PCI_J721E_HOST is not set +# end of Cadence PCIe controllers support +# end of PCI controller drivers + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +CONFIG_PCCARD=m +# CONFIG_PCMCIA is not set +CONFIG_CARDBUS=y + +# +# PC-card bridges +# +CONFIG_YENTA=m +CONFIG_YENTA_O2=y +CONFIG_YENTA_RICOH=y +CONFIG_YENTA_TI=y +CONFIG_YENTA_ENE_TUNE=y +CONFIG_YENTA_TOSHIBA=y +CONFIG_RAPIDIO=y +CONFIG_RAPIDIO_TSI721=y +CONFIG_RAPIDIO_DISC_TIMEOUT=30 +CONFIG_RAPIDIO_ENABLE_RX_TX_PORTS=y +# CONFIG_RAPIDIO_DMA_ENGINE is not set +# CONFIG_RAPIDIO_DEBUG is not set +CONFIG_RAPIDIO_ENUM_BASIC=m +CONFIG_RAPIDIO_CHMAN=m +CONFIG_RAPIDIO_MPORT_CDEV=m + +# +# RapidIO Switch drivers +# +# CONFIG_RAPIDIO_TSI57X is not set +# CONFIG_RAPIDIO_CPS_XX is not set +# CONFIG_RAPIDIO_TSI568 is not set +# CONFIG_RAPIDIO_CPS_GEN2 is not set +# CONFIG_RAPIDIO_RXS_GEN3 is not set +# end of RapidIO Switch drivers + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER is not set +CONFIG_FW_LOADER_COMPRESS=y +CONFIG_FW_CACHE=y +# end of Firmware loader + +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=m +CONFIG_REGMAP_SPI=m +CONFIG_REGMAP_MMIO=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +# end of Generic Driver Options + +# +# Bus devices +# +# CONFIG_MOXTET is not set +# CONFIG_SIMPLE_PM_BUS is not set +# CONFIG_MHI_BUS is not set +# end of Bus devices + +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +# CONFIG_GNSS is not set +CONFIG_MTD=m +# CONFIG_MTD_TESTS is not set + +# +# Partition parsers +# +# CONFIG_MTD_AR7_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +CONFIG_MTD_OF_PARTS=m +# CONFIG_MTD_REDBOOT_PARTS is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=m +CONFIG_MTD_BLOCK=m +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=m +CONFIG_MTD_JEDECPROBE=m +CONFIG_MTD_GEN_PROBE=m +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +CONFIG_MTD_CFI_INTELEXT=m +CONFIG_MTD_CFI_AMDSTD=m +CONFIG_MTD_CFI_STAA=m +CONFIG_MTD_CFI_UTIL=m +CONFIG_MTD_RAM=m +CONFIG_MTD_ROM=m +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_AMD76XROM is not set +# CONFIG_MTD_ICHXROM is not set +# CONFIG_MTD_ESB2ROM is not set +# CONFIG_MTD_CK804XROM is not set +# CONFIG_MTD_SCB2_FLASH is not set +# CONFIG_MTD_NETtel is not set +# CONFIG_MTD_L440GX is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +CONFIG_MTD_BLOCK2MTD=m + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +# +# NAND +# +# CONFIG_MTD_ONENAND is not set +# CONFIG_MTD_RAW_NAND is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# ECC engine support +# +# end of ECC engine support +# end of NAND + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + +CONFIG_MTD_SPI_NOR=m +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +# CONFIG_SPI_INTEL_SPI_PCI is not set +# CONFIG_SPI_INTEL_SPI_PLATFORM is not set +CONFIG_MTD_UBI=m +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_LIMIT=20 +# CONFIG_MTD_UBI_FASTMAP is not set +CONFIG_MTD_UBI_GLUEBI=m +# CONFIG_MTD_UBI_BLOCK is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_KOBJ=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +# CONFIG_OF_OVERLAY is not set +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_PARPORT=m +CONFIG_PARPORT_PC=m +CONFIG_PARPORT_SERIAL=m +CONFIG_PARPORT_PC_FIFO=y +# CONFIG_PARPORT_PC_SUPERIO is not set +# CONFIG_PARPORT_AX88796 is not set +CONFIG_PARPORT_1284=y +CONFIG_PARPORT_NOT_PC=y +CONFIG_PNP=y +# CONFIG_PNP_DEBUG_MESSAGES is not set + +# +# Protocols +# +CONFIG_PNPACPI=y +CONFIG_BLK_DEV=y +CONFIG_BLK_DEV_NULL_BLK=m +# CONFIG_BLK_DEV_FD is not set +CONFIG_CDROM=m +# CONFIG_PARIDE is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +CONFIG_ZRAM=m +CONFIG_ZRAM_WRITEBACK=y +# CONFIG_ZRAM_MEMORY_TRACKING is not set +# CONFIG_ZRAM_MULTI_COMP is not set +# CONFIG_BLK_DEV_UMEM is not set +CONFIG_BLK_DEV_LOOP=m +CONFIG_BLK_DEV_LOOP_MIN_COUNT=0 +CONFIG_BLK_DEV_CRYPTOLOOP=m +# CONFIG_BLK_DEV_DRBD is not set +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_SKD is not set +CONFIG_BLK_DEV_RAM=m +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_CDROM_PKTCDVD=m +CONFIG_CDROM_PKTCDVD_BUFFERS=8 +# CONFIG_CDROM_PKTCDVD_WCACHE is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_VIRTIO_BLK=m +CONFIG_BLK_DEV_RBD=m +# CONFIG_BLK_DEV_RSXX is not set + +# +# NVME Support +# +CONFIG_NVME_CORE=m +CONFIG_BLK_DEV_NVME=m +CONFIG_NVME_MULTIPATH=y +# CONFIG_NVME_HWMON is not set +CONFIG_NVME_FABRICS=m +CONFIG_NVME_RDMA=m +CONFIG_NVME_FC=m +CONFIG_NVME_TCP=m +CONFIG_NVME_TARGET=m +CONFIG_NVME_TARGET_PASSTHRU=y +CONFIG_NVME_TARGET_LOOP=m +CONFIG_NVME_TARGET_RDMA=m +CONFIG_NVME_TARGET_FC=m +CONFIG_NVME_TARGET_FCLOOP=m +CONFIG_NVME_TARGET_TCP=m +# end of NVME Support + +# +# Misc devices +# +CONFIG_SENSORS_LIS3LV02D=m +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_IBM_ASM is not set +# CONFIG_PHANTOM is not set +CONFIG_TIFM_CORE=m +CONFIG_TIFM_7XX1=m +# CONFIG_ICS932S401 is not set +CONFIG_ENCLOSURE_SERVICES=m +# CONFIG_HP_ILO is not set +CONFIG_APDS9802ALS=m +CONFIG_ISL29003=m +CONFIG_ISL29020=m +CONFIG_SENSORS_TSL2550=m +CONFIG_SENSORS_BH1770=m +CONFIG_SENSORS_APDS990X=m +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +# CONFIG_SRAM is not set +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_XILINX_SDFEC is not set +CONFIG_MISC_RTSX=m +CONFIG_PVPANIC=y +# CONFIG_HISI_HIKEY_USB is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=m +# CONFIG_EEPROM_AT25 is not set +CONFIG_EEPROM_LEGACY=m +CONFIG_EEPROM_MAX6875=m +CONFIG_EEPROM_93CX6=m +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +# end of EEPROM support + +CONFIG_CB710_CORE=m +# CONFIG_CB710_DEBUG is not set +CONFIG_CB710_DEBUG_ASSUMPTIONS=y + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +CONFIG_SENSORS_LIS3_I2C=m +CONFIG_ALTERA_STAPL=m +# CONFIG_INTEL_MEI is not set +# CONFIG_INTEL_MEI_ME is not set +# CONFIG_INTEL_MEI_TXE is not set +# CONFIG_VMWARE_VMCI is not set +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_ALCOR_PCI is not set +CONFIG_MISC_RTSX_PCI=m +CONFIG_MISC_RTSX_USB=m +# CONFIG_HABANA_AI is not set +CONFIG_UACCE=m +# end of Misc devices + +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +CONFIG_RAID_ATTRS=y +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_SCSI_NETLINK=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=m +CONFIG_CHR_DEV_ST=m +CONFIG_BLK_DEV_SR=m +CONFIG_CHR_DEV_SG=m +CONFIG_CHR_DEV_SCH=m +CONFIG_SCSI_ENCLOSURE=m +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y + +# +# SCSI Transports +# +CONFIG_SCSI_SPI_ATTRS=m +CONFIG_SCSI_FC_ATTRS=m +CONFIG_SCSI_ISCSI_ATTRS=m +CONFIG_SCSI_SAS_ATTRS=y +CONFIG_SCSI_SAS_LIBSAS=y +# CONFIG_SCSI_SAS_ATA is not set +CONFIG_SCSI_SAS_HOST_SMP=y +CONFIG_SCSI_SRP_ATTRS=m +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +CONFIG_ISCSI_TCP=m +CONFIG_ISCSI_BOOT_SYSFS=m +# CONFIG_SCSI_CXGB3_ISCSI is not set +CONFIG_SCSI_CXGB4_ISCSI=m +CONFIG_SCSI_BNX2_ISCSI=m +CONFIG_SCSI_BNX2X_FCOE=m +CONFIG_BE2ISCSI=m +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +CONFIG_SCSI_HPSA=m +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +CONFIG_SCSI_AACRAID=m +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +CONFIG_SCSI_MVSAS=y +# CONFIG_SCSI_MVSAS_DEBUG is not set +CONFIG_SCSI_MVSAS_TASKLET=y +CONFIG_SCSI_MVUMI=y +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +CONFIG_MEGARAID_NEWGEN=y +CONFIG_MEGARAID_MM=y +CONFIG_MEGARAID_MAILBOX=y +CONFIG_MEGARAID_LEGACY=y +CONFIG_MEGARAID_SAS=m +# CONFIG_SCSI_3SNIC_SSSRAID is not set +CONFIG_SCSI_MPT3SAS=y +CONFIG_SCSI_MPT2SAS_MAX_SGE=128 +CONFIG_SCSI_MPT3SAS_MAX_SGE=128 +CONFIG_SCSI_MPT2SAS=m +CONFIG_SCSI_SMARTPQI=m +# CONFIG_SCSI_HISI_RAID is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_BUSLOGIC is not set +# CONFIG_SCSI_MYRB is not set +# CONFIG_SCSI_MYRS is not set +# CONFIG_VMWARE_PVSCSI is not set +CONFIG_LIBFC=m +CONFIG_LIBFCOE=m +CONFIG_FCOE=m +# CONFIG_FCOE_FNIC is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FDOMAIN_PCI is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_ISCI is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_PPA is not set +# CONFIG_SCSI_IMM is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +CONFIG_SCSI_QLOGIC_1280=m +CONFIG_SCSI_QLA_FC=m +CONFIG_TCM_QLA2XXX=m +# CONFIG_TCM_QLA2XXX_DEBUG is not set +CONFIG_SCSI_QLA_ISCSI=m +CONFIG_SCSI_HUAWEI_FC=m +CONFIG_SCSI_FC_HIFC=m +CONFIG_SCSI_LPFC=m +# CONFIG_SCSI_LPFC_DEBUG_FS is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_BFA_FC is not set +CONFIG_SCSI_VIRTIO=m +CONFIG_SCSI_CHELSIO_FCOE=m +CONFIG_SCSI_DH=y +CONFIG_SCSI_DH_RDAC=y +CONFIG_SCSI_DH_HP_SW=y +CONFIG_SCSI_DH_EMC=y +CONFIG_SCSI_DH_ALUA=y +# end of SCSI device support + +CONFIG_ATA=y +CONFIG_SATA_HOST=y +CONFIG_PATA_TIMINGS=y +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_ATA_FORCE=y +CONFIG_ATA_ACPI=y +# CONFIG_SATA_ZPODD is not set +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=y +CONFIG_SATA_MOBILE_LPM_POLICY=0 +CONFIG_SATA_AHCI_PLATFORM=y +# CONFIG_AHCI_CEVA is not set +# CONFIG_AHCI_QORIQ is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +CONFIG_ATA_PIIX=m +# CONFIG_SATA_DWC is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_ZHAOXIN is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +CONFIG_PATA_ATIIXP=y +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_PATA_ACPI is not set +CONFIG_ATA_GENERIC=m +# CONFIG_PATA_LEGACY is not set +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +CONFIG_MD_AUTODETECT=y +CONFIG_MD_LINEAR=m +CONFIG_MD_RAID0=m +CONFIG_MD_RAID1=m +CONFIG_MD_RAID10=m +CONFIG_MD_RAID456=m +CONFIG_MD_MULTIPATH=m +CONFIG_MD_FAULTY=m +# CONFIG_MD_CLUSTER is not set +CONFIG_BCACHE=m +# CONFIG_BCACHE_DEBUG is not set +# CONFIG_BCACHE_CLOSURES_DEBUG is not set +# CONFIG_BCACHE_ASYNC_REGISTRATION is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +CONFIG_DM_BUFIO=m +# CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set +CONFIG_DM_BIO_PRISON=m +CONFIG_DM_PERSISTENT_DATA=m +# CONFIG_DM_UNSTRIPED is not set +CONFIG_DM_CRYPT=m +CONFIG_DM_SNAPSHOT=m +CONFIG_DM_THIN_PROVISIONING=m +CONFIG_DM_CACHE=m +CONFIG_DM_CACHE_SMQ=m +CONFIG_DM_WRITECACHE=m +# CONFIG_DM_EBS is not set +CONFIG_DM_ERA=m +# CONFIG_DM_CLONE is not set +CONFIG_DM_MIRROR=m +CONFIG_DM_LOG_USERSPACE=m +CONFIG_DM_RAID=m +CONFIG_DM_ZERO=m +CONFIG_DM_MULTIPATH=m +CONFIG_DM_MULTIPATH_QL=m +CONFIG_DM_MULTIPATH_ST=m +# CONFIG_DM_MULTIPATH_HST is not set +CONFIG_DM_DELAY=m +# CONFIG_DM_DUST is not set +CONFIG_DM_UEVENT=y +CONFIG_DM_FLAKEY=m +CONFIG_DM_VERITY=m +# CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG is not set +# CONFIG_DM_VERITY_FEC is not set +CONFIG_DM_SWITCH=m +CONFIG_DM_LOG_WRITES=m +CONFIG_DM_INTEGRITY=m +# CONFIG_DM_ZONED is not set +CONFIG_TARGET_CORE=m +CONFIG_TCM_IBLOCK=m +CONFIG_TCM_FILEIO=m +CONFIG_TCM_PSCSI=m +CONFIG_TCM_USER2=m +CONFIG_LOOPBACK_TARGET=m +# CONFIG_TCM_FC is not set +CONFIG_ISCSI_TARGET=m +CONFIG_ISCSI_TARGET_CXGB4=m +# CONFIG_SBP_TARGET is not set +CONFIG_FUSION=y +CONFIG_FUSION_SPI=m +# CONFIG_FUSION_FC is not set +CONFIG_FUSION_SAS=m +CONFIG_FUSION_MAX_SGE=128 +CONFIG_FUSION_CTL=m +CONFIG_FUSION_LOGGING=y + +# +# IEEE 1394 (FireWire) support +# +CONFIG_FIREWIRE=m +CONFIG_FIREWIRE_OHCI=m +CONFIG_FIREWIRE_SBP2=m +CONFIG_FIREWIRE_NET=m +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + +# CONFIG_MACINTOSH_DRIVERS is not set +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +CONFIG_BONDING=m +CONFIG_DUMMY=m +CONFIG_WIREGUARD=m +# CONFIG_WIREGUARD_DEBUG is not set +# CONFIG_EQUALIZER is not set +CONFIG_NET_FC=y +CONFIG_IFB=m +CONFIG_NET_TEAM=m +CONFIG_NET_TEAM_MODE_BROADCAST=m +CONFIG_NET_TEAM_MODE_ROUNDROBIN=m +CONFIG_NET_TEAM_MODE_RANDOM=m +CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m +CONFIG_NET_TEAM_MODE_LOADBALANCE=m +CONFIG_MACVLAN=m +CONFIG_MACVTAP=m +CONFIG_IPVLAN_L3S=y +CONFIG_IPVLAN=m +CONFIG_IPVTAP=m +CONFIG_VXLAN=m +CONFIG_GENEVE=m +# CONFIG_BAREUDP is not set +# CONFIG_GTP is not set +CONFIG_MACSEC=m +CONFIG_NETCONSOLE=m +CONFIG_NETCONSOLE_DYNAMIC=y +CONFIG_NETPOLL=y +CONFIG_NET_POLL_CONTROLLER=y +CONFIG_NTB_NETDEV=m +CONFIG_RIONET=m +CONFIG_RIONET_TX_SIZE=128 +CONFIG_RIONET_RX_SIZE=128 +CONFIG_TUN=m +CONFIG_TAP=m +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=m +CONFIG_VIRTIO_NET=m +CONFIG_NLMON=m +CONFIG_NET_VRF=m +CONFIG_VSOCKMON=m +# CONFIG_ARCNET is not set +# CONFIG_ATM_DRIVERS is not set + +# +# Distributed Switch Architecture drivers +# +# CONFIG_B53 is not set +# CONFIG_NET_DSA_BCM_SF2 is not set +# CONFIG_NET_DSA_LOOP is not set +# CONFIG_NET_DSA_LANTIQ_GSWIP is not set +# CONFIG_NET_DSA_MT7530 is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MICROCHIP_KSZ9477 is not set +# CONFIG_NET_DSA_MICROCHIP_KSZ8795 is not set +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_AR9331 is not set +# CONFIG_NET_DSA_SJA1105 is not set +# CONFIG_NET_DSA_QCA8K is not set +# CONFIG_NET_DSA_REALTEK_SMI is not set +# CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set +# CONFIG_NET_DSA_SMSC_LAN9303_MDIO is not set +# CONFIG_NET_DSA_VITESSE_VSC73XX_SPI is not set +# CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM is not set +# end of Distributed Switch Architecture drivers + +CONFIG_ETHERNET=y +CONFIG_MDIO=m +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_3SNIC is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set +# CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_ALTERA_TSE is not set +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_VENDOR_AURORA is not set +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +# CONFIG_BCMGENET is not set +CONFIG_BNX2=y +CONFIG_CNIC=m +CONFIG_TIGON3=m +CONFIG_TIGON3_HWMON=y +CONFIG_BNX2X=m +CONFIG_BNX2X_SRIOV=y +# CONFIG_SYSTEMPORT is not set +CONFIG_BNXT=m +CONFIG_BNXT_SRIOV=y +CONFIG_BNXT_FLOWER_OFFLOAD=y +CONFIG_BNXT_DCB=y +CONFIG_BNXT_HWMON=y +# CONFIG_NET_VENDOR_BROCADE is not set +CONFIG_NET_VENDOR_CADENCE=y +# CONFIG_MACB is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +CONFIG_NET_VENDOR_CHELSIO=y +CONFIG_CHELSIO_T1=m +CONFIG_CHELSIO_T1_1G=y +CONFIG_CHELSIO_T3=m +CONFIG_CHELSIO_T4=m +# CONFIG_CHELSIO_T4_DCB is not set +CONFIG_CHELSIO_T4VF=m +CONFIG_CHELSIO_LIB=m +CONFIG_CHELSIO_INLINE_CRYPTO=y +# CONFIG_CRYPTO_DEV_CHELSIO_TLS is not set +CONFIG_CHELSIO_IPSEC_INLINE=m +# CONFIG_CHELSIO_TLS_DEVICE is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_NET_VENDOR_CORTINA is not set +# CONFIG_CX_ECAT is not set +CONFIG_DNET=m +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +CONFIG_NET_VENDOR_GOOGLE=y +# CONFIG_GVE is not set +CONFIG_NET_VENDOR_HUAWEI=y +# CONFIG_HINIC is not set +# CONFIG_HINIC3 is not set +# CONFIG_BMA is not set +# CONFIG_NET_VENDOR_I825XX is not set +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +CONFIG_E1000=m +CONFIG_E1000E=m +CONFIG_E1000E_HWTS=y +CONFIG_IGB=m +CONFIG_IGB_HWMON=y +CONFIG_IGBVF=m +CONFIG_IXGB=y +CONFIG_IXGBE=m +CONFIG_IXGBE_HWMON=y +CONFIG_IXGBE_DCB=y +CONFIG_IXGBE_IPSEC=y +CONFIG_IXGBEVF=m +CONFIG_IXGBEVF_IPSEC=y +CONFIG_I40E=m +CONFIG_I40E_DCB=y +CONFIG_IAVF=m +CONFIG_I40EVF=m +CONFIG_ICE=m +CONFIG_FM10K=m +# CONFIG_IGC is not set +CONFIG_NET_VENDOR_MUCSE=y +# CONFIG_MXGBE is not set +# CONFIG_MXGBEVF is not set +# CONFIG_MXGBEM is not set +# CONFIG_MGBE is not set +# CONFIG_MGBEVF is not set +CONFIG_NET_VENDOR_NETSWIFT=y +# CONFIG_NGBE is not set +CONFIG_TXGBE=m +# CONFIG_TXGBE_HWMON is not set +# CONFIG_TXGBE_DEBUG_FS is not set +# CONFIG_TXGBE_POLL_LINK_STATUS is not set +# CONFIG_TXGBE_SYSFS is not set +# CONFIG_JME is not set +# CONFIG_NET_VENDOR_MARVELL is not set +CONFIG_NET_VENDOR_MELLANOX=y +CONFIG_MLX4_EN=m +CONFIG_MLX4_EN_DCB=y +CONFIG_MLX4_CORE=m +CONFIG_MLX4_DEBUG=y +# CONFIG_MLX4_CORE_GEN2 is not set +CONFIG_MLX5_CORE=m +CONFIG_MLX5_ACCEL=y +CONFIG_MLX5_FPGA=y +CONFIG_MLX5_CORE_EN=y +CONFIG_MLX5_EN_ARFS=y +CONFIG_MLX5_EN_RXNFC=y +CONFIG_MLX5_MPFS=y +CONFIG_MLX5_ESWITCH=y +CONFIG_MLX5_CLS_ACT=y +CONFIG_MLX5_TC_CT=y +CONFIG_MLX5_CORE_EN_DCB=y +CONFIG_MLX5_CORE_IPOIB=y +# CONFIG_MLX5_FPGA_IPSEC is not set +# CONFIG_MLX5_IPSEC is not set +# CONFIG_MLX5_FPGA_TLS is not set +# CONFIG_MLX5_TLS is not set +CONFIG_MLX5_SW_STEERING=y +CONFIG_MLXSW_CORE=m +CONFIG_MLXSW_CORE_HWMON=y +CONFIG_MLXSW_CORE_THERMAL=y +CONFIG_MLXSW_PCI=m +CONFIG_MLXSW_I2C=m +CONFIG_MLXSW_SWITCHIB=m +CONFIG_MLXSW_SWITCHX2=m +CONFIG_MLXSW_SPECTRUM=m +CONFIG_MLXSW_SPECTRUM_DCB=y +CONFIG_MLXSW_MINIMAL=m +CONFIG_MLXFW=m +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MICROSEMI is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +CONFIG_NET_VENDOR_NETERION=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_NI is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +CONFIG_ETHOC=m +CONFIG_NET_VENDOR_PACKET_ENGINES=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_NET_VENDOR_PENSANDO=y +# CONFIG_IONIC is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RDC is not set +CONFIG_NET_VENDOR_REALTEK=y +# CONFIG_ATP is not set +CONFIG_8139CP=m +CONFIG_8139TOO=m +# CONFIG_8139TOO_PIO is not set +# CONFIG_8139TOO_TUNE_TWISTER is not set +CONFIG_8139TOO_8129=y +# CONFIG_8139_OLD_RX_RESET is not set +CONFIG_R8169=m +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_SOCIONEXT is not set +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=y +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_STMMAC_PLATFORM=y +# CONFIG_DWMAC_DWC_QOS_ETH is not set +CONFIG_DWMAC_GENERIC=y +# CONFIG_DWMAC_INTEL_PLAT is not set +CONFIG_DWMAC_INTEL=y +CONFIG_DWMAC_LOONGSON=y +# CONFIG_STMMAC_PCI is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_XILINX is not set +# CONFIG_NET_VENDOR_NEBULA_MATRIX is not set +CONFIG_NET_VENDOR_YUNSILICON=y +# CONFIG_YUNSILICON_XSC_PCI is not set +# CONFIG_NET_VENDOR_YUSUR is not set +CONFIG_NET_VENDOR_BZWX=y +# CONFIG_NCE is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_UBL is not set +# CONFIG_NET_SB1000 is not set +CONFIG_PHYLINK=y +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +CONFIG_LED_TRIGGER_PHY=y +CONFIG_FIXED_PHY=y +# CONFIG_SFP is not set + +# +# MII PHY device drivers +# +CONFIG_AMD_PHY=m +# CONFIG_ADIN_PHY is not set +CONFIG_AQUANTIA_PHY=m +# CONFIG_AX88796B_PHY is not set +CONFIG_BROADCOM_PHY=m +# CONFIG_BCM54140_PHY is not set +CONFIG_BCM7XXX_PHY=m +# CONFIG_BCM84881_PHY is not set +CONFIG_BCM87XX_PHY=m +CONFIG_BCM_NET_PHYLIB=m +CONFIG_CICADA_PHY=m +CONFIG_CORTINA_PHY=m +CONFIG_DAVICOM_PHY=m +CONFIG_ICPLUS_PHY=m +CONFIG_LXT_PHY=m +CONFIG_INTEL_XWAY_PHY=m +CONFIG_LSI_ET1011C_PHY=m +CONFIG_MARVELL_PHY=m +CONFIG_MARVELL_10G_PHY=m +CONFIG_MICREL_PHY=m +CONFIG_MICROCHIP_PHY=m +CONFIG_MICROCHIP_T1_PHY=m +CONFIG_MICROSEMI_PHY=m +CONFIG_NATIONAL_PHY=m +# CONFIG_NXP_TJA11XX_PHY is not set +CONFIG_QSEMI_PHY=m +CONFIG_REALTEK_PHY=m +CONFIG_RENESAS_PHY=m +CONFIG_ROCKCHIP_PHY=m +CONFIG_SMSC_PHY=m +CONFIG_STE10XP=m +CONFIG_TERANETICS_PHY=m +CONFIG_DP83822_PHY=m +CONFIG_DP83TC811_PHY=m +CONFIG_DP83848_PHY=m +CONFIG_DP83867_PHY=m +# CONFIG_DP83869_PHY is not set +CONFIG_VITESSE_PHY=m +CONFIG_XILINX_GMII2RGMII=m +CONFIG_MICREL_KS8995MA=m +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +CONFIG_OF_MDIO=y +CONFIG_MDIO_DEVRES=y +CONFIG_MDIO_BITBANG=m +# CONFIG_MDIO_BCM_UNIMAC is not set +CONFIG_MDIO_CAVIUM=m +# CONFIG_MDIO_GPIO is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MVUSB is not set +CONFIG_MDIO_MSCC_MIIM=m +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_IPQ4019 is not set +# CONFIG_MDIO_IPQ8064 is not set +CONFIG_MDIO_THUNDER=m + +# +# MDIO Multiplexers +# +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set + +# +# PCS device drivers +# +CONFIG_PCS_XPCS=y +# end of PCS device drivers + +# CONFIG_PLIP is not set +CONFIG_PPP=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y +CONFIG_PPP_MPPE=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPPOATM=m +CONFIG_PPPOE=m +CONFIG_PPTP=m +CONFIG_PPPOL2TP=m +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_SLIP=m +CONFIG_SLHC=m +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLIP_SMART=y +# CONFIG_SLIP_MODE_SLIP6 is not set +CONFIG_USB_NET_DRIVERS=y +CONFIG_USB_CATC=m +CONFIG_USB_KAWETH=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_LAN78XX=m +CONFIG_USB_USBNET=m +# CONFIG_USB_NET_AX8817X is not set +# CONFIG_USB_NET_AX88179_178A is not set +CONFIG_USB_NET_CDCETHER=m +CONFIG_USB_NET_CDC_EEM=m +CONFIG_USB_NET_CDC_NCM=m +CONFIG_USB_NET_HUAWEI_CDC_NCM=m +CONFIG_USB_NET_CDC_MBIM=m +CONFIG_USB_NET_DM9601=m +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +CONFIG_USB_NET_SMSC75XX=m +CONFIG_USB_NET_SMSC95XX=m +CONFIG_USB_NET_GL620A=m +# CONFIG_USB_NET_NET1080 is not set +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_NET_CDC_SUBSET_ENABLE=m +CONFIG_USB_NET_CDC_SUBSET=m +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +# CONFIG_USB_BELKIN is not set +# CONFIG_USB_ARMLINUX is not set +CONFIG_USB_EPSON2888=y +CONFIG_USB_KC2190=y +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_USB_NET_CX82310_ETH=m +CONFIG_USB_NET_KALMIA=m +CONFIG_USB_NET_QMI_WWAN=m +CONFIG_USB_HSO=m +CONFIG_USB_NET_INT51X1=m +# CONFIG_USB_CDC_PHONET is not set +CONFIG_USB_IPHETH=m +CONFIG_USB_SIERRA_NET=m +CONFIG_USB_VL600=m +CONFIG_USB_NET_CH9200=m +# CONFIG_USB_NET_AQC111 is not set +CONFIG_WLAN=y +# CONFIG_WIRELESS_WDS is not set +# CONFIG_WLAN_VENDOR_ADMTEK is not set +CONFIG_ATH_COMMON=m +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +CONFIG_ATH9K_HW=m +CONFIG_ATH9K_COMMON=m +CONFIG_ATH9K_BTCOEX_SUPPORT=y +CONFIG_ATH9K=m +CONFIG_ATH9K_PCI=y +CONFIG_ATH9K_AHB=y +# CONFIG_ATH9K_DEBUGFS is not set +# CONFIG_ATH9K_DYNACK is not set +CONFIG_ATH9K_WOW=y +CONFIG_ATH9K_RFKILL=y +# CONFIG_ATH9K_CHANNEL_CONTEXT is not set +CONFIG_ATH9K_PCOEM=y +# CONFIG_ATH9K_PCI_NO_EEPROM is not set +CONFIG_ATH9K_HTC=m +# CONFIG_ATH9K_HTC_DEBUGFS is not set +# CONFIG_ATH9K_HWRNG is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +CONFIG_ATH10K=m +CONFIG_ATH10K_CE=y +CONFIG_ATH10K_PCI=m +# CONFIG_ATH10K_AHB is not set +# CONFIG_ATH10K_SDIO is not set +# CONFIG_ATH10K_USB is not set +# CONFIG_ATH10K_DEBUG is not set +# CONFIG_ATH10K_DEBUGFS is not set +# CONFIG_ATH10K_TRACING is not set +# CONFIG_WCN36XX is not set +# CONFIG_ATH11K is not set +# CONFIG_WLAN_VENDOR_ATMEL is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +CONFIG_BRCMUTIL=m +CONFIG_BRCMSMAC=m +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_PROTO_BCDC=y +CONFIG_BRCMFMAC_PROTO_MSGBUF=y +CONFIG_BRCMFMAC_SDIO=y +CONFIG_BRCMFMAC_USB=y +CONFIG_BRCMFMAC_PCIE=y +# CONFIG_BRCM_TRACING is not set +# CONFIG_BRCMDBG is not set +# CONFIG_WLAN_VENDOR_CISCO is not set +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +CONFIG_IWLWIFI=m +CONFIG_IWLWIFI_LEDS=y +CONFIG_IWLDVM=m +CONFIG_IWLMVM=m +CONFIG_IWLWIFI_OPMODE_MODULAR=y +CONFIG_IWLWIFI_BCAST_FILTERING=y + +# +# Debugging Options +# +# CONFIG_IWLWIFI_DEBUG is not set +CONFIG_IWLWIFI_DEVICE_TRACING=y +# end of Debugging Options + +# CONFIG_WLAN_VENDOR_INTERSIL is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +CONFIG_MWIFIEX=m +CONFIG_MWIFIEX_SDIO=m +CONFIG_MWIFIEX_PCIE=m +CONFIG_MWIFIEX_USB=m +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +CONFIG_MT7601U=m +CONFIG_MT76_CORE=m +CONFIG_MT76_LEDS=y +CONFIG_MT76_USB=m +CONFIG_MT76x02_LIB=m +CONFIG_MT76x02_USB=m +CONFIG_MT76x0_COMMON=m +CONFIG_MT76x0U=m +# CONFIG_MT76x0E is not set +CONFIG_MT76x2_COMMON=m +# CONFIG_MT76x2E is not set +CONFIG_MT76x2U=m +# CONFIG_MT7603E is not set +# CONFIG_MT7615E is not set +# CONFIG_MT7663U is not set +# CONFIG_MT7663S is not set +# CONFIG_MT7915E is not set +CONFIG_WLAN_VENDOR_MICROCHIP=y +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +CONFIG_WLAN_VENDOR_RALINK=y +CONFIG_RT2X00=m +# CONFIG_RT2400PCI is not set +# CONFIG_RT2500PCI is not set +# CONFIG_RT61PCI is not set +CONFIG_RT2800PCI=m +CONFIG_RT2800PCI_RT33XX=y +CONFIG_RT2800PCI_RT35XX=y +CONFIG_RT2800PCI_RT53XX=y +CONFIG_RT2800PCI_RT3290=y +# CONFIG_RT2500USB is not set +# CONFIG_RT73USB is not set +CONFIG_RT2800USB=m +CONFIG_RT2800USB_RT33XX=y +CONFIG_RT2800USB_RT35XX=y +CONFIG_RT2800USB_RT3573=y +CONFIG_RT2800USB_RT53XX=y +CONFIG_RT2800USB_RT55XX=y +CONFIG_RT2800USB_UNKNOWN=y +CONFIG_RT2800_LIB=m +CONFIG_RT2800_LIB_MMIO=m +CONFIG_RT2X00_LIB_MMIO=m +CONFIG_RT2X00_LIB_PCI=m +CONFIG_RT2X00_LIB_USB=m +CONFIG_RT2X00_LIB=m +CONFIG_RT2X00_LIB_FIRMWARE=y +CONFIG_RT2X00_LIB_CRYPTO=y +CONFIG_RT2X00_LIB_LEDS=y +# CONFIG_RT2X00_DEBUG is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +CONFIG_RTL_CARDS=m +CONFIG_RTL8192CE=m +CONFIG_RTL8192SE=m +CONFIG_RTL8192DE=m +CONFIG_RTL8723AE=m +CONFIG_RTL8723BE=m +CONFIG_RTL8188EE=m +CONFIG_RTL8192EE=m +CONFIG_RTL8821AE=m +CONFIG_RTL8192CU=m +CONFIG_RTLWIFI=m +CONFIG_RTLWIFI_PCI=m +CONFIG_RTLWIFI_USB=m +# CONFIG_RTLWIFI_DEBUG is not set +CONFIG_RTL8192C_COMMON=m +CONFIG_RTL8723_COMMON=m +CONFIG_RTLBTCOEXIST=m +CONFIG_RTL8XXXU=m +# CONFIG_RTL8XXXU_UNTESTED is not set +# CONFIG_RTW88 is not set +# CONFIG_WLAN_VENDOR_RSI is not set +# CONFIG_WLAN_VENDOR_ST is not set +# CONFIG_WLAN_VENDOR_TI is not set +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +CONFIG_ZD1211RW=m +# CONFIG_ZD1211RW_DEBUG is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PCIE is not set +CONFIG_MAC80211_HWSIM=m +CONFIG_USB_NET_RNDIS_WLAN=m +# CONFIG_VIRT_WIFI is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +CONFIG_WAN=y +# CONFIG_LANMEDIA is not set +CONFIG_HDLC=m +CONFIG_HDLC_RAW=m +# CONFIG_HDLC_RAW_ETH is not set +CONFIG_HDLC_CISCO=m +CONFIG_HDLC_FR=m +CONFIG_HDLC_PPP=m +# CONFIG_HDLC_X25 is not set +# CONFIG_PCI200SYN is not set +# CONFIG_WANXL is not set +# CONFIG_PC300TOO is not set +# CONFIG_FARSYNC is not set +CONFIG_DLCI=m +CONFIG_DLCI_MAX=8 +# CONFIG_LAPBETHER is not set +# CONFIG_X25_ASY is not set +# CONFIG_SBNI is not set +CONFIG_IEEE802154_DRIVERS=m +CONFIG_IEEE802154_FAKELB=m +# CONFIG_IEEE802154_AT86RF230 is not set +# CONFIG_IEEE802154_MRF24J40 is not set +# CONFIG_IEEE802154_CC2520 is not set +# CONFIG_IEEE802154_ATUSB is not set +# CONFIG_IEEE802154_ADF7242 is not set +# CONFIG_IEEE802154_CA8210 is not set +# CONFIG_IEEE802154_MCR20A is not set +# CONFIG_IEEE802154_HWSIM is not set +CONFIG_VMXNET3=m +CONFIG_FUJITSU_ES=m +CONFIG_USB4_NET=m +CONFIG_NETDEVSIM=m +CONFIG_NET_FAILOVER=m +CONFIG_ISDN=y +CONFIG_ISDN_CAPI=y +CONFIG_CAPI_TRACE=y +CONFIG_ISDN_CAPI_MIDDLEWARE=y +CONFIG_MISDN=m +CONFIG_MISDN_DSP=m +CONFIG_MISDN_L1OIP=m + +# +# mISDN hardware drivers +# +CONFIG_MISDN_HFCPCI=m +CONFIG_MISDN_HFCMULTI=m +CONFIG_MISDN_HFCUSB=m +CONFIG_MISDN_AVMFRITZ=m +CONFIG_MISDN_SPEEDFAX=m +CONFIG_MISDN_INFINEON=m +CONFIG_MISDN_W6692=m +CONFIG_MISDN_NETJET=m +CONFIG_MISDN_HDLC=m +CONFIG_MISDN_IPAC=m +CONFIG_MISDN_ISAR=m + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +CONFIG_INPUT_FF_MEMLESS=m +CONFIG_INPUT_POLLDEV=m +CONFIG_INPUT_SPARSEKMAP=y +# CONFIG_INPUT_MATRIXKMAP is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +CONFIG_INPUT_JOYDEV=m +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADC is not set +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +# CONFIG_KEYBOARD_APPLESPI is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1050 is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set +CONFIG_KEYBOARD_XTKBD=m +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_LIFEBOOK=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +CONFIG_MOUSE_PS2_ELANTECH=y +CONFIG_MOUSE_PS2_ELANTECH_SMBUS=y +CONFIG_MOUSE_PS2_SENTELIC=y +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_SMBUS=y +CONFIG_MOUSE_SERIAL=m +CONFIG_MOUSE_APPLETOUCH=m +CONFIG_MOUSE_BCM5974=m +CONFIG_MOUSE_CYAPA=m +CONFIG_MOUSE_ELAN_I2C=m +CONFIG_MOUSE_ELAN_I2C_I2C=y +CONFIG_MOUSE_ELAN_I2C_SMBUS=y +CONFIG_MOUSE_VSXXXAA=m +# CONFIG_MOUSE_GPIO is not set +CONFIG_MOUSE_SYNAPTICS_I2C=m +CONFIG_MOUSE_SYNAPTICS_USB=m +# CONFIG_INPUT_JOYSTICK is not set +CONFIG_INPUT_TABLET=y +CONFIG_TABLET_USB_ACECAD=m +CONFIG_TABLET_USB_AIPTEK=m +CONFIG_TABLET_USB_GTCO=m +# CONFIG_TABLET_USB_HANWANG is not set +CONFIG_TABLET_USB_KBTAB=m +# CONFIG_TABLET_USB_PEGASUS is not set +CONFIG_TABLET_SERIAL_WACOM4=m +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_ADC is not set +# CONFIG_TOUCHSCREEN_AR1021_I2C is not set +# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_BU21029 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set +# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set +# CONFIG_TOUCHSCREEN_EXC3000 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_HIDEEP is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_S6SY761 is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_EKTF2127 is not set +# CONFIG_TOUCHSCREEN_ELAN is not set +CONFIG_TOUCHSCREEN_ELO=m +CONFIG_TOUCHSCREEN_WACOM_W8001=m +CONFIG_TOUCHSCREEN_WACOM_I2C=m +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +# CONFIG_TOUCHSCREEN_WM97XX is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_RM_TS is not set +# CONFIG_TOUCHSCREEN_SILEAD is not set +# CONFIG_TOUCHSCREEN_SIS_I2C is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_STMFTS is not set +# CONFIG_TOUCHSCREEN_SUR40 is not set +# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZET6223 is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +# CONFIG_TOUCHSCREEN_IQS5XX is not set +# CONFIG_TOUCHSCREEN_ZINITIX is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_PCSPKR is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_APANEL is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_DECODER is not set +# CONFIG_INPUT_GPIO_VIBRA is not set +# CONFIG_INPUT_ATLAS_BTNS is not set +CONFIG_INPUT_ATI_REMOTE2=m +CONFIG_INPUT_KEYSPAN_REMOTE=m +# CONFIG_INPUT_KXTJ9 is not set +CONFIG_INPUT_POWERMATE=m +CONFIG_INPUT_YEALINK=m +CONFIG_INPUT_CM109=m +CONFIG_INPUT_UINPUT=m +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_PWM_VIBRA is not set +CONFIG_INPUT_GPIO_ROTARY_ENCODER=m +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_IQS269A is not set +# CONFIG_INPUT_CMA3000 is not set +# CONFIG_INPUT_IDEAPAD_SLIDEBAR is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +CONFIG_RMI4_CORE=m +CONFIG_RMI4_I2C=m +CONFIG_RMI4_SPI=m +CONFIG_RMI4_SMB=m +CONFIG_RMI4_F03=y +CONFIG_RMI4_F03_SERIO=m +CONFIG_RMI4_2D_SENSOR=y +CONFIG_RMI4_F11=y +CONFIG_RMI4_F12=y +CONFIG_RMI4_F30=y +CONFIG_RMI4_F34=y +# CONFIG_RMI4_F3A is not set +# CONFIG_RMI4_F54 is not set +CONFIG_RMI4_F55=y + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y +CONFIG_SERIO_I8042=y +CONFIG_SERIO_SERPORT=m +# CONFIG_SERIO_CT82C710 is not set +# CONFIG_SERIO_PARKBD is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +CONFIG_SERIO_RAW=m +CONFIG_SERIO_ALTERA_PS2=m +# CONFIG_SERIO_PS2MULT is not set +CONFIG_SERIO_ARC_PS2=m +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +CONFIG_LDISC_AUTOLOAD=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set +CONFIG_SERIAL_8250_PNP=y +CONFIG_SERIAL_8250_16550A_VARIANTS=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_EXAR=y +CONFIG_SERIAL_8250_NR_UARTS=16 +CONFIG_SERIAL_8250_RUNTIME_UARTS=16 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +CONFIG_SERIAL_8250_RSA=y +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_8250_LPSS=y +CONFIG_SERIAL_8250_MID=y +# CONFIG_SERIAL_OF_PLATFORM is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_SERIAL_JSM=m +# CONFIG_SERIAL_SIFIVE is not set +# CONFIG_SERIAL_LANTIQ is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +CONFIG_SERIAL_ARC=m +CONFIG_SERIAL_ARC_NR_PORTS=1 +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_FSL_LINFLEXUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_SPRD is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_NONSTANDARD=y +# CONFIG_ROCKETPORT is not set +CONFIG_CYCLADES=m +# CONFIG_CYZ_INTR is not set +# CONFIG_MOXA_INTELLIO is not set +# CONFIG_MOXA_SMARTIO is not set +# CONFIG_SYNCLINK is not set +CONFIG_SYNCLINKMP=m +CONFIG_SYNCLINK_GT=m +# CONFIG_ISI is not set +CONFIG_N_HDLC=m +CONFIG_N_GSM=m +CONFIG_NOZOMI=m +# CONFIG_NULL_TTY is not set +# CONFIG_TRACE_SINK is not set +CONFIG_HVC_DRIVER=y +# CONFIG_SERIAL_DEV_BUS is not set +# CONFIG_TTY_PRINTK is not set +CONFIG_PRINTER=m +# CONFIG_LP_CONSOLE is not set +CONFIG_PPDEV=m +CONFIG_VIRTIO_CONSOLE=y +CONFIG_IPMI_HANDLER=m +CONFIG_IPMI_DMI_DECODE=y +CONFIG_IPMI_PLAT_DATA=y +CONFIG_IPMI_PANIC_EVENT=y +CONFIG_IPMI_PANIC_STRING=y +CONFIG_IPMI_DEVICE_INTERFACE=m +CONFIG_IPMI_SI=m +CONFIG_IPMI_SSIF=m +CONFIG_IPMI_WATCHDOG=m +CONFIG_IPMI_POWEROFF=m +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_TIMERIOMEM=m +CONFIG_HW_RANDOM_INTEL=y +CONFIG_HW_RANDOM_AMD=y +# CONFIG_HW_RANDOM_BA431 is not set +CONFIG_HW_RANDOM_ZHAOXIN=y +CONFIG_HW_RANDOM_VIA=y +CONFIG_HW_RANDOM_VIRTIO=m +# CONFIG_HW_RANDOM_CCTRNG is not set +# CONFIG_HW_RANDOM_XIPHERA is not set +# CONFIG_APPLICOM is not set +# CONFIG_MWAVE is not set +CONFIG_DEVMEM=y +# CONFIG_DEVKMEM is not set +# CONFIG_NVRAM is not set +CONFIG_RAW_DRIVER=y +CONFIG_MAX_RAW_DEVS=8192 +CONFIG_DEVPORT=y +# CONFIG_HPET is not set +# CONFIG_HANGCHECK_TIMER is not set +CONFIG_TCG_TPM=y +CONFIG_HW_RANDOM_TPM=y +CONFIG_TCG_TIS_CORE=m +CONFIG_TCG_TIS=m +CONFIG_TCG_TIS_SPI=m +# CONFIG_TCG_TIS_SPI_CR50 is not set +CONFIG_TCG_TIS_I2C_ATMEL=m +CONFIG_TCG_TIS_I2C_INFINEON=m +CONFIG_TCG_TIS_I2C_NUVOTON=m +# CONFIG_TCG_NSC is not set +CONFIG_TCG_ATMEL=m +CONFIG_TCG_INFINEON=m +CONFIG_TCG_CRB=y +# CONFIG_TCG_VTPM_PROXY is not set +CONFIG_TCG_TIS_ST33ZP24=m +CONFIG_TCG_TIS_ST33ZP24_I2C=m +CONFIG_TCG_TIS_ST33ZP24_SPI=m +# CONFIG_TELCLOCK is not set +# CONFIG_XILLYBUS is not set +CONFIG_RANDOM_TRUST_CPU=y +# CONFIG_RANDOM_TRUST_BOOTLOADER is not set +# end of Character devices + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_ACPI_I2C_OPREGION=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_MUX is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_SMBUS=m +CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_ALGOPCA=m + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +CONFIG_I2C_AMD756=m +# CONFIG_I2C_AMD756_S4882 is not set +CONFIG_I2C_AMD8111=m +# CONFIG_I2C_AMD_MP2 is not set +# CONFIG_I2C_I801 is not set +CONFIG_I2C_ISCH=m +# CONFIG_I2C_ISMT is not set +CONFIG_I2C_PIIX4=y +CONFIG_I2C_NFORCE2=m +# CONFIG_I2C_NFORCE2_S4985 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +CONFIG_I2C_SIS96X=m +CONFIG_I2C_VIA=m +CONFIG_I2C_VIAPRO=m + +# +# ACPI drivers +# +CONFIG_I2C_SCMI=m + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CBUS_GPIO is not set +CONFIG_I2C_DESIGNWARE_CORE=m +# CONFIG_I2C_DESIGNWARE_SLAVE is not set +CONFIG_I2C_DESIGNWARE_PLATFORM=m +# CONFIG_I2C_DESIGNWARE_BAYTRAIL is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +CONFIG_I2C_GPIO=y +# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set +# CONFIG_I2C_OCORES is not set +CONFIG_I2C_PCA_PLATFORM=m +# CONFIG_I2C_RK3X is not set +CONFIG_I2C_SIMTEC=m +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +CONFIG_I2C_DIOLAN_U2C=m +CONFIG_I2C_PARPORT=m +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +CONFIG_I2C_TINY_USB=m +CONFIG_I2C_VIPERBOARD=m + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_MLXCPLD is not set +# end of I2C Hardware Bus support + +CONFIG_I2C_STUB=m +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +# CONFIG_I3C is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_BUTTERFLY is not set +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_NXP_FLEXSPI is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_LM70_LLP is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_LANTIQ_SSC is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_ROCKCHIP is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set + +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_DYNAMIC=y +# CONFIG_SPMI is not set +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +CONFIG_PPS_CLIENT_LDISC=m +CONFIG_PPS_CLIENT_PARPORT=m +CONFIG_PPS_CLIENT_GPIO=m + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y +CONFIG_DP83640_PHY=m +# CONFIG_PTP_1588_CLOCK_INES is not set +# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set +# CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_HISI is not set +# end of PTP clock support + +# CONFIG_PINCTRL is not set +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIO_ACPI=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_CDEV_V1=y +CONFIG_GPIO_GENERIC=m + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +CONFIG_GPIO_AMDPT=m +# CONFIG_GPIO_CADENCE is not set +# CONFIG_GPIO_DWAPB is not set +# CONFIG_GPIO_EXAR is not set +# CONFIG_GPIO_FTGPIO010 is not set +# CONFIG_GPIO_GENERIC_PLATFORM is not set +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HLWD is not set +# CONFIG_GPIO_ICH is not set +# CONFIG_GPIO_LOGICVC is not set +# CONFIG_GPIO_MB86S7X is not set +# CONFIG_GPIO_SAMA5D2_PIOBU is not set +# CONFIG_GPIO_SIFIVE is not set +# CONFIG_GPIO_SYSCON is not set +# CONFIG_GPIO_VX855 is not set +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_AMD_FCH is not set +# end of Memory mapped GPIO drivers + +# +# Port-mapped I/O GPIO drivers +# +# CONFIG_GPIO_F7188X is not set +# CONFIG_GPIO_IT87 is not set +# CONFIG_GPIO_SCH is not set +# CONFIG_GPIO_SCH311X is not set +# CONFIG_GPIO_WINBOND is not set +# CONFIG_GPIO_WS16C48 is not set +# end of Port-mapped I/O GPIO drivers + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_GW_PLD is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCA9570 is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +# end of MFD GPIO expanders + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_AMD8111 is not set +# CONFIG_GPIO_ML_IOH is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# CONFIG_GPIO_SODAVILLE is not set +# end of PCI GPIO expanders + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +CONFIG_GPIO_VIPERBOARD=m +# end of USB GPIO expanders + +# CONFIG_GPIO_AGGREGATOR is not set +# CONFIG_GPIO_MOCKUP is not set +# CONFIG_W1 is not set +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_SYSCON is not set +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +# CONFIG_SYSCON_REBOOT_MODE is not set +# CONFIG_NVMEM_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_POWER_SUPPLY_HWMON=y +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_SBS is not set +# CONFIG_CHARGER_SBS is not set +# CONFIG_BATTERY_BQ27XXX is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ2515X is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_BQ25980 is not set +CONFIG_CHARGER_SMB347=m +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_RT5033 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_BD99954 is not set +CONFIG_HWMON=y +CONFIG_HWMON_VID=m +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_ABITUGURU is not set +# CONFIG_SENSORS_ABITUGURU3 is not set +# CONFIG_SENSORS_AD7314 is not set +CONFIG_SENSORS_AD7414=m +CONFIG_SENSORS_AD7418=m +CONFIG_SENSORS_ADM1021=m +CONFIG_SENSORS_ADM1025=m +CONFIG_SENSORS_ADM1026=m +CONFIG_SENSORS_ADM1029=m +CONFIG_SENSORS_ADM1031=m +# CONFIG_SENSORS_ADM1177 is not set +CONFIG_SENSORS_ADM9240=m +CONFIG_SENSORS_ADT7X10=m +# CONFIG_SENSORS_ADT7310 is not set +CONFIG_SENSORS_ADT7410=m +CONFIG_SENSORS_ADT7411=m +CONFIG_SENSORS_ADT7462=m +CONFIG_SENSORS_ADT7470=m +CONFIG_SENSORS_ADT7475=m +# CONFIG_SENSORS_AS370 is not set +CONFIG_SENSORS_ASC7621=m +# CONFIG_SENSORS_AXI_FAN_CONTROL is not set +# CONFIG_SENSORS_K8TEMP is not set +# CONFIG_SENSORS_K10TEMP is not set +# CONFIG_SENSORS_FAM15H_POWER is not set +# CONFIG_SENSORS_AMD_ENERGY is not set +# CONFIG_SENSORS_APPLESMC is not set +# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_ASPEED is not set +CONFIG_SENSORS_ATXP1=m +# CONFIG_SENSORS_CORSAIR_CPRO is not set +# CONFIG_SENSORS_DRIVETEMP is not set +CONFIG_SENSORS_DS620=m +CONFIG_SENSORS_DS1621=m +# CONFIG_SENSORS_DELL_SMM is not set +CONFIG_SENSORS_I5K_AMB=m +CONFIG_SENSORS_F71805F=m +CONFIG_SENSORS_F71882FG=m +CONFIG_SENSORS_F75375S=m +# CONFIG_SENSORS_FSCHMD is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +CONFIG_SENSORS_GL518SM=m +CONFIG_SENSORS_GL520SM=m +CONFIG_SENSORS_G760A=m +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +CONFIG_SENSORS_IBMAEM=m +CONFIG_SENSORS_IBMPEX=m +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_I5500 is not set +# CONFIG_SENSORS_CORETEMP is not set +CONFIG_SENSORS_IT87=m +CONFIG_SENSORS_JC42=m +# CONFIG_SENSORS_POWR1220 is not set +CONFIG_SENSORS_LINEAGE=m +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2947_I2C is not set +# CONFIG_SENSORS_LTC2947_SPI is not set +# CONFIG_SENSORS_LTC2990 is not set +CONFIG_SENSORS_LTC4151=m +CONFIG_SENSORS_LTC4215=m +# CONFIG_SENSORS_LTC4222 is not set +CONFIG_SENSORS_LTC4245=m +# CONFIG_SENSORS_LTC4260 is not set +CONFIG_SENSORS_LTC4261=m +# CONFIG_SENSORS_MAX1111 is not set +CONFIG_SENSORS_MAX16065=m +CONFIG_SENSORS_MAX1619=m +CONFIG_SENSORS_MAX1668=m +CONFIG_SENSORS_MAX197=m +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX31730 is not set +# CONFIG_SENSORS_MAX6621 is not set +CONFIG_SENSORS_MAX6639=m +CONFIG_SENSORS_MAX6642=m +CONFIG_SENSORS_MAX6650=m +CONFIG_SENSORS_MAX6697=m +# CONFIG_SENSORS_MAX31790 is not set +CONFIG_SENSORS_MCP3021=m +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_MR75203 is not set +# CONFIG_SENSORS_ADCXX is not set +CONFIG_SENSORS_LM63=m +# CONFIG_SENSORS_LM70 is not set +CONFIG_SENSORS_LM73=m +CONFIG_SENSORS_LM75=m +CONFIG_SENSORS_LM77=m +CONFIG_SENSORS_LM78=m +CONFIG_SENSORS_LM80=m +CONFIG_SENSORS_LM83=m +CONFIG_SENSORS_LM85=m +CONFIG_SENSORS_LM87=m +CONFIG_SENSORS_LM90=m +CONFIG_SENSORS_LM92=m +CONFIG_SENSORS_LM93=m +CONFIG_SENSORS_LM95234=m +CONFIG_SENSORS_LM95241=m +CONFIG_SENSORS_LM95245=m +CONFIG_SENSORS_PC87360=m +CONFIG_SENSORS_PC87427=m +CONFIG_SENSORS_NTC_THERMISTOR=m +# CONFIG_SENSORS_NCT6683 is not set +CONFIG_SENSORS_NCT6775=m +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_NPCM7XX is not set +CONFIG_SENSORS_PCF8591=m +CONFIG_PMBUS=m +CONFIG_SENSORS_PMBUS=m +# CONFIG_SENSORS_ADM1266 is not set +CONFIG_SENSORS_ADM1275=m +# CONFIG_SENSORS_BEL_PFE is not set +# CONFIG_SENSORS_IBM_CFFPS is not set +# CONFIG_SENSORS_INSPUR_IPSPS is not set +# CONFIG_SENSORS_IR35221 is not set +# CONFIG_SENSORS_IR38064 is not set +# CONFIG_SENSORS_IRPS5401 is not set +# CONFIG_SENSORS_ISL68137 is not set +CONFIG_SENSORS_LM25066=m +CONFIG_SENSORS_LTC2978=m +# CONFIG_SENSORS_LTC3815 is not set +CONFIG_SENSORS_MAX16064=m +# CONFIG_SENSORS_MAX16601 is not set +# CONFIG_SENSORS_MAX20730 is not set +# CONFIG_SENSORS_MAX20751 is not set +# CONFIG_SENSORS_MAX31785 is not set +CONFIG_SENSORS_MAX34440=m +CONFIG_SENSORS_MAX8688=m +# CONFIG_SENSORS_MP2975 is not set +# CONFIG_SENSORS_PXE1610 is not set +# CONFIG_SENSORS_TPS40422 is not set +# CONFIG_SENSORS_TPS53679 is not set +CONFIG_SENSORS_UCD9000=m +CONFIG_SENSORS_UCD9200=m +# CONFIG_SENSORS_XDPE122 is not set +CONFIG_SENSORS_ZL6100=m +# CONFIG_SENSORS_PWM_FAN is not set +CONFIG_SENSORS_SHT15=m +CONFIG_SENSORS_SHT21=m +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +CONFIG_SENSORS_SIS5595=m +CONFIG_SENSORS_DME1737=m +CONFIG_SENSORS_EMC1403=m +# CONFIG_SENSORS_EMC2103 is not set +CONFIG_SENSORS_EMC6W201=m +CONFIG_SENSORS_SMSC47M1=m +CONFIG_SENSORS_SMSC47M192=m +CONFIG_SENSORS_SMSC47B397=m +CONFIG_SENSORS_SCH56XX_COMMON=m +CONFIG_SENSORS_SCH5627=m +CONFIG_SENSORS_SCH5636=m +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +CONFIG_SENSORS_ADS7828=m +# CONFIG_SENSORS_ADS7871 is not set +CONFIG_SENSORS_AMC6821=m +CONFIG_SENSORS_INA209=m +CONFIG_SENSORS_INA2XX=m +# CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_TC74 is not set +CONFIG_SENSORS_THMC50=m +CONFIG_SENSORS_TMP102=m +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +CONFIG_SENSORS_TMP401=m +CONFIG_SENSORS_TMP421=m +# CONFIG_SENSORS_TMP513 is not set +# CONFIG_SENSORS_VIA_CPUTEMP is not set +# CONFIG_SENSORS_ZHAOXIN_CPUTEMP is not set +CONFIG_SENSORS_VIA686A=m +CONFIG_SENSORS_VT1211=m +CONFIG_SENSORS_VT8231=m +# CONFIG_SENSORS_W83773G is not set +CONFIG_SENSORS_W83781D=m +CONFIG_SENSORS_W83791D=m +CONFIG_SENSORS_W83792D=m +CONFIG_SENSORS_W83793=m +CONFIG_SENSORS_W83795=m +# CONFIG_SENSORS_W83795_FANCTRL is not set +CONFIG_SENSORS_W83L785TS=m +CONFIG_SENSORS_W83L786NG=m +CONFIG_SENSORS_W83627HF=m +CONFIG_SENSORS_W83627EHF=m +# CONFIG_SENSORS_XGENE is not set + +# +# ACPI drivers +# +CONFIG_SENSORS_ACPI_POWER=m +# CONFIG_SENSORS_ATK0110 is not set +CONFIG_THERMAL=y +# CONFIG_THERMAL_NETLINK is not set +# CONFIG_THERMAL_STATISTICS is not set +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +# CONFIG_THERMAL_HWMON is not set +# CONFIG_THERMAL_OF is not set +CONFIG_THERMAL_WRITABLE_TRIPS=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +CONFIG_THERMAL_GOV_USER_SPACE=y +# CONFIG_DEVFREQ_THERMAL is not set +# CONFIG_THERMAL_EMULATION is not set +# CONFIG_THERMAL_MMIO is not set + +# +# Intel thermal drivers +# +# CONFIG_INTEL_POWERCLAMP is not set +CONFIG_X86_THERMAL_VECTOR=y +CONFIG_X86_PKG_TEMP_THERMAL=m +# CONFIG_INTEL_SOC_DTS_THERMAL is not set + +# +# ACPI INT340X thermal drivers +# +# CONFIG_INT340X_THERMAL is not set +# end of ACPI INT340X thermal drivers + +# CONFIG_INTEL_PCH_THERMAL is not set +# CONFIG_INTEL_HFI_THERMAL is not set +# end of Intel thermal drivers + +# CONFIG_GENERIC_ADC_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +CONFIG_WATCHDOG_SYSFS=y + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + +# +# Watchdog Device Drivers +# +CONFIG_SOFT_WATCHDOG=m +CONFIG_GPIO_WATCHDOG=m +CONFIG_WDAT_WDT=m +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +# CONFIG_DW_WATCHDOG is not set +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_ACQUIRE_WDT is not set +# CONFIG_ADVANTECH_WDT is not set +# CONFIG_ALIM1535_WDT is not set +CONFIG_ALIM7101_WDT=m +# CONFIG_EBC_C384_WDT is not set +# CONFIG_F71808E_WDT is not set +# CONFIG_SP5100_TCO is not set +# CONFIG_SBC_FITPC2_WATCHDOG is not set +# CONFIG_EUROTECH_WDT is not set +# CONFIG_IB700_WDT is not set +# CONFIG_IBMASR is not set +# CONFIG_WAFER_WDT is not set +CONFIG_I6300ESB_WDT=m +# CONFIG_IE6XX_WDT is not set +# CONFIG_ITCO_WDT is not set +# CONFIG_IT8712F_WDT is not set +# CONFIG_IT87_WDT is not set +# CONFIG_HP_WATCHDOG is not set +# CONFIG_SC1200_WDT is not set +# CONFIG_PC87413_WDT is not set +# CONFIG_NV_TCO is not set +# CONFIG_60XX_WDT is not set +# CONFIG_CPU5_WDT is not set +# CONFIG_SMSC_SCH311X_WDT is not set +# CONFIG_SMSC37B787_WDT is not set +# CONFIG_TQMX86_WDT is not set +# CONFIG_VIA_WDT is not set +# CONFIG_W83627HF_WDT is not set +# CONFIG_W83877F_WDT is not set +# CONFIG_W83977F_WDT is not set +# CONFIG_MACHZ_WDT is not set +# CONFIG_SBC_EPX_C3_WATCHDOG is not set +# CONFIG_NI903X_WDT is not set +# CONFIG_NIC7018_WDT is not set +# CONFIG_MEN_A21_WDT is not set + +# +# PCI-based Watchdog Cards +# +CONFIG_PCIPCWATCHDOG=m +CONFIG_WDTPCI=m + +# +# USB-based Watchdog Cards +# +CONFIG_USBPCWATCHDOG=m +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +CONFIG_BCMA=m +CONFIG_BCMA_HOST_PCI_POSSIBLE=y +CONFIG_BCMA_HOST_PCI=y +# CONFIG_BCMA_HOST_SOC is not set +CONFIG_BCMA_DRIVER_PCI=y +CONFIG_BCMA_DRIVER_GMAC_CMN=y +CONFIG_BCMA_DRIVER_GPIO=y +# CONFIG_BCMA_DEBUG is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_BD9571MWV is not set +# CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_MADERA is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set +# CONFIG_LPC_ICH is not set +CONFIG_LPC_SCH=m +# CONFIG_INTEL_SOC_PMIC_CHTDC_TI is not set +# CONFIG_MFD_INTEL_LPSS_ACPI is not set +# CONFIG_MFD_INTEL_LPSS_PCI is not set +# CONFIG_MFD_INTEL_PMC_BXT is not set +# CONFIG_MFD_IQS62X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77620 is not set +# CONFIG_MFD_MAX77650 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +CONFIG_MFD_VIPERBOARD=m +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_UCB1400_CORE is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_RK808 is not set +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +CONFIG_MFD_SM501=m +CONFIG_MFD_SM501_GPIO=y +# CONFIG_MFD_SKY81452 is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TQMX86 is not set +CONFIG_MFD_VX855=m +# CONFIG_MFD_LOCHNAGAR is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_ROHM_BD718XX is not set +# CONFIG_MFD_ROHM_BD70528 is not set +# CONFIG_MFD_ROHM_BD71828 is not set +# CONFIG_MFD_STPMIC1 is not set +# CONFIG_MFD_STMFX is not set +# CONFIG_MFD_INTEL_M10_BMC is not set +# end of Multifunction device drivers + +# CONFIG_REGULATOR is not set +CONFIG_RC_CORE=m +CONFIG_RC_MAP=m +CONFIG_LIRC=y +CONFIG_RC_DECODERS=y +CONFIG_IR_NEC_DECODER=m +CONFIG_IR_RC5_DECODER=m +CONFIG_IR_RC6_DECODER=m +CONFIG_IR_JVC_DECODER=m +CONFIG_IR_SONY_DECODER=m +CONFIG_IR_SANYO_DECODER=m +CONFIG_IR_SHARP_DECODER=m +CONFIG_IR_MCE_KBD_DECODER=m +CONFIG_IR_XMP_DECODER=m +CONFIG_IR_IMON_DECODER=m +# CONFIG_IR_RCMM_DECODER is not set +CONFIG_RC_DEVICES=y +CONFIG_RC_ATI_REMOTE=m +CONFIG_IR_ENE=m +# CONFIG_IR_HIX5HD2 is not set +CONFIG_IR_IMON=m +CONFIG_IR_IMON_RAW=m +CONFIG_IR_MCEUSB=m +CONFIG_IR_ITE_CIR=m +CONFIG_IR_FINTEK=m +CONFIG_IR_NUVOTON=m +CONFIG_IR_REDRAT3=m +# CONFIG_IR_SPI is not set +CONFIG_IR_STREAMZAP=m +# CONFIG_IR_WINBOND_CIR is not set +# CONFIG_IR_IGORPLUGUSB is not set +CONFIG_IR_IGUANA=m +CONFIG_IR_TTUSBIR=m +# CONFIG_RC_LOOPBACK is not set +# CONFIG_IR_GPIO_CIR is not set +# CONFIG_IR_GPIO_TX is not set +# CONFIG_IR_PWM_TX is not set +CONFIG_IR_SERIAL=m +CONFIG_IR_SERIAL_TRANSMITTER=y +CONFIG_IR_SIR=m +# CONFIG_RC_XBOX_DVD is not set +# CONFIG_IR_TOY is not set +CONFIG_CEC_CORE=y +CONFIG_MEDIA_CEC_SUPPORT=y +# CONFIG_CEC_CH7322 is not set +# CONFIG_CEC_SECO is not set +CONFIG_USB_PULSE8_CEC=m +CONFIG_USB_RAINSHADOW_CEC=m +CONFIG_MEDIA_SUPPORT=m +# CONFIG_MEDIA_SUPPORT_FILTER is not set +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set + +# +# Media device types +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +CONFIG_MEDIA_TEST_SUPPORT=y +# end of Media device types + +# +# Media core support +# +CONFIG_VIDEO_DEV=m +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=m +# end of Media core support + +# +# Video4Linux options +# +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L2_I2C=y +# CONFIG_VIDEO_V4L2_SUBDEV_API is not set +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_VIDEO_TUNER=m +CONFIG_VIDEOBUF_GEN=m +CONFIG_VIDEOBUF_DMA_SG=m +CONFIG_VIDEOBUF_VMALLOC=m +# end of Video4Linux options + +# +# Media controller options +# +CONFIG_MEDIA_CONTROLLER_DVB=y +# end of Media controller options + +# +# Digital TV options +# +# CONFIG_DVB_MMAP is not set +CONFIG_DVB_NET=y +CONFIG_DVB_MAX_ADAPTERS=8 +CONFIG_DVB_DYNAMIC_MINORS=y +# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set +# CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options + +# +# Media drivers +# +CONFIG_TTPCI_EEPROM=m +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +CONFIG_USB_M5602=m +CONFIG_USB_STV06XX=m +CONFIG_USB_GL860=m +CONFIG_USB_GSPCA_BENQ=m +CONFIG_USB_GSPCA_CONEX=m +CONFIG_USB_GSPCA_CPIA1=m +# CONFIG_USB_GSPCA_DTCS033 is not set +CONFIG_USB_GSPCA_ETOMS=m +CONFIG_USB_GSPCA_FINEPIX=m +CONFIG_USB_GSPCA_JEILINJ=m +CONFIG_USB_GSPCA_JL2005BCD=m +# CONFIG_USB_GSPCA_KINECT is not set +CONFIG_USB_GSPCA_KONICA=m +CONFIG_USB_GSPCA_MARS=m +CONFIG_USB_GSPCA_MR97310A=m +CONFIG_USB_GSPCA_NW80X=m +CONFIG_USB_GSPCA_OV519=m +CONFIG_USB_GSPCA_OV534=m +CONFIG_USB_GSPCA_OV534_9=m +CONFIG_USB_GSPCA_PAC207=m +CONFIG_USB_GSPCA_PAC7302=m +CONFIG_USB_GSPCA_PAC7311=m +CONFIG_USB_GSPCA_SE401=m +CONFIG_USB_GSPCA_SN9C2028=m +CONFIG_USB_GSPCA_SN9C20X=m +CONFIG_USB_GSPCA_SONIXB=m +CONFIG_USB_GSPCA_SONIXJ=m +CONFIG_USB_GSPCA_SPCA500=m +CONFIG_USB_GSPCA_SPCA501=m +CONFIG_USB_GSPCA_SPCA505=m +CONFIG_USB_GSPCA_SPCA506=m +CONFIG_USB_GSPCA_SPCA508=m +CONFIG_USB_GSPCA_SPCA561=m +CONFIG_USB_GSPCA_SPCA1528=m +CONFIG_USB_GSPCA_SQ905=m +CONFIG_USB_GSPCA_SQ905C=m +CONFIG_USB_GSPCA_SQ930X=m +CONFIG_USB_GSPCA_STK014=m +# CONFIG_USB_GSPCA_STK1135 is not set +CONFIG_USB_GSPCA_STV0680=m +CONFIG_USB_GSPCA_SUNPLUS=m +CONFIG_USB_GSPCA_T613=m +CONFIG_USB_GSPCA_TOPRO=m +# CONFIG_USB_GSPCA_TOUPTEK is not set +CONFIG_USB_GSPCA_TV8532=m +CONFIG_USB_GSPCA_VC032X=m +CONFIG_USB_GSPCA_VICAM=m +CONFIG_USB_GSPCA_XIRLINK_CIT=m +CONFIG_USB_GSPCA_ZC3XX=m +CONFIG_USB_PWC=m +# CONFIG_USB_PWC_DEBUG is not set +CONFIG_USB_PWC_INPUT_EVDEV=y +# CONFIG_VIDEO_CPIA2 is not set +CONFIG_USB_ZR364XX=m +CONFIG_USB_STKWEBCAM=m +CONFIG_USB_S2255=m +# CONFIG_VIDEO_USBTV is not set + +# +# Analog TV USB devices +# +CONFIG_VIDEO_PVRUSB2=m +CONFIG_VIDEO_PVRUSB2_SYSFS=y +CONFIG_VIDEO_PVRUSB2_DVB=y +# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set +CONFIG_VIDEO_HDPVR=m +# CONFIG_VIDEO_STK1160_COMMON is not set +# CONFIG_VIDEO_GO7007 is not set + +# +# Analog/digital TV USB devices +# +CONFIG_VIDEO_AU0828=m +CONFIG_VIDEO_AU0828_V4L2=y +# CONFIG_VIDEO_AU0828_RC is not set +CONFIG_VIDEO_TM6000=m +CONFIG_VIDEO_TM6000_ALSA=m +CONFIG_VIDEO_TM6000_DVB=m + +# +# Digital TV USB devices +# +CONFIG_DVB_USB=m +# CONFIG_DVB_USB_DEBUG is not set +CONFIG_DVB_USB_DIB3000MC=m +CONFIG_DVB_USB_A800=m +CONFIG_DVB_USB_DIBUSB_MB=m +# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set +CONFIG_DVB_USB_DIBUSB_MC=m +CONFIG_DVB_USB_DIB0700=m +CONFIG_DVB_USB_UMT_010=m +CONFIG_DVB_USB_CXUSB=m +# CONFIG_DVB_USB_CXUSB_ANALOG is not set +CONFIG_DVB_USB_M920X=m +CONFIG_DVB_USB_DIGITV=m +CONFIG_DVB_USB_VP7045=m +CONFIG_DVB_USB_VP702X=m +CONFIG_DVB_USB_GP8PSK=m +CONFIG_DVB_USB_NOVA_T_USB2=m +CONFIG_DVB_USB_TTUSB2=m +CONFIG_DVB_USB_DTT200U=m +CONFIG_DVB_USB_OPERA1=m +CONFIG_DVB_USB_AF9005=m +CONFIG_DVB_USB_AF9005_REMOTE=m +CONFIG_DVB_USB_PCTV452E=m +CONFIG_DVB_USB_DW2102=m +CONFIG_DVB_USB_CINERGY_T2=m +CONFIG_DVB_USB_DTV5100=m +CONFIG_DVB_USB_AZ6027=m +CONFIG_DVB_USB_TECHNISAT_USB2=m +CONFIG_DVB_USB_V2=m +CONFIG_DVB_USB_AF9035=m +CONFIG_DVB_USB_ANYSEE=m +CONFIG_DVB_USB_AU6610=m +CONFIG_DVB_USB_AZ6007=m +CONFIG_DVB_USB_CE6230=m +CONFIG_DVB_USB_EC168=m +CONFIG_DVB_USB_GL861=m +CONFIG_DVB_USB_LME2510=m +CONFIG_DVB_USB_MXL111SF=m +# CONFIG_DVB_USB_DVBSKY is not set +# CONFIG_DVB_USB_ZD1301 is not set +CONFIG_DVB_TTUSB_BUDGET=m +CONFIG_DVB_TTUSB_DEC=m +CONFIG_SMS_USB_DRV=m +CONFIG_DVB_B2C2_FLEXCOP_USB=m +# CONFIG_DVB_B2C2_FLEXCOP_USB_DEBUG is not set +# CONFIG_DVB_AS102 is not set + +# +# Webcam, TV (analog/digital) USB devices +# +CONFIG_VIDEO_EM28XX=m +# CONFIG_VIDEO_EM28XX_V4L2 is not set +CONFIG_VIDEO_EM28XX_ALSA=m +CONFIG_VIDEO_EM28XX_DVB=m +CONFIG_VIDEO_EM28XX_RC=m + +# +# Software defined radio USB devices +# +# CONFIG_USB_AIRSPY is not set +# CONFIG_USB_HACKRF is not set +# CONFIG_USB_MSI2500 is not set +CONFIG_MEDIA_PCI_SUPPORT=y + +# +# Media capture support +# +# CONFIG_VIDEO_SOLO6X10 is not set +# CONFIG_VIDEO_TW5864 is not set +# CONFIG_VIDEO_TW68 is not set +# CONFIG_VIDEO_TW686X is not set + +# +# Media capture/analog TV support +# +CONFIG_VIDEO_IVTV=m +# CONFIG_VIDEO_IVTV_DEPRECATED_IOCTLS is not set +# CONFIG_VIDEO_IVTV_ALSA is not set +CONFIG_VIDEO_FB_IVTV=m +# CONFIG_VIDEO_FB_IVTV_FORCE_PAT is not set +# CONFIG_VIDEO_HEXIUM_GEMINI is not set +# CONFIG_VIDEO_HEXIUM_ORION is not set +# CONFIG_VIDEO_MXB is not set +# CONFIG_VIDEO_DT3155 is not set + +# +# Media capture/analog/hybrid TV support +# +CONFIG_VIDEO_CX18=m +# CONFIG_VIDEO_CX18_ALSA is not set +CONFIG_VIDEO_CX23885=m +CONFIG_MEDIA_ALTERA_CI=m +# CONFIG_VIDEO_CX25821 is not set +CONFIG_VIDEO_CX88=m +CONFIG_VIDEO_CX88_ALSA=m +CONFIG_VIDEO_CX88_BLACKBIRD=m +CONFIG_VIDEO_CX88_DVB=m +# CONFIG_VIDEO_CX88_ENABLE_VP3054 is not set +CONFIG_VIDEO_CX88_MPEG=m +CONFIG_VIDEO_BT848=m +CONFIG_DVB_BT8XX=m +CONFIG_VIDEO_SAA7134=m +CONFIG_VIDEO_SAA7134_ALSA=m +CONFIG_VIDEO_SAA7134_RC=y +CONFIG_VIDEO_SAA7134_DVB=m +CONFIG_VIDEO_SAA7164=m + +# +# Media digital TV PCI Adapters +# +CONFIG_DVB_AV7110_IR=y +CONFIG_DVB_AV7110=m +CONFIG_DVB_AV7110_OSD=y +CONFIG_DVB_BUDGET_CORE=m +CONFIG_DVB_BUDGET=m +CONFIG_DVB_BUDGET_CI=m +CONFIG_DVB_BUDGET_AV=m +CONFIG_DVB_BUDGET_PATCH=m +CONFIG_DVB_B2C2_FLEXCOP_PCI=m +# CONFIG_DVB_B2C2_FLEXCOP_PCI_DEBUG is not set +CONFIG_DVB_PLUTO2=m +CONFIG_DVB_DM1105=m +CONFIG_DVB_PT1=m +# CONFIG_DVB_PT3 is not set +CONFIG_MANTIS_CORE=m +CONFIG_DVB_MANTIS=m +CONFIG_DVB_HOPPER=m +CONFIG_DVB_NGENE=m +CONFIG_DVB_DDBRIDGE=m +# CONFIG_DVB_DDBRIDGE_MSIENABLE is not set +# CONFIG_DVB_SMIPCIE is not set +# CONFIG_DVB_NETUP_UNIDVB is not set +# CONFIG_VIDEO_IPU3_CIO2 is not set +CONFIG_RADIO_ADAPTERS=y +CONFIG_RADIO_TEA575X=m +# CONFIG_RADIO_SI470X is not set +# CONFIG_RADIO_SI4713 is not set +# CONFIG_USB_MR800 is not set +# CONFIG_USB_DSBR is not set +# CONFIG_RADIO_MAXIRADIO is not set +# CONFIG_RADIO_SHARK is not set +# CONFIG_RADIO_SHARK2 is not set +# CONFIG_USB_KEENE is not set +# CONFIG_USB_RAREMONO is not set +# CONFIG_USB_MA901 is not set +# CONFIG_RADIO_TEA5764 is not set +# CONFIG_RADIO_SAA7706H is not set +# CONFIG_RADIO_TEF6862 is not set +# CONFIG_RADIO_WL1273 is not set +CONFIG_MEDIA_COMMON_OPTIONS=y + +# +# common driver options +# +CONFIG_VIDEO_CX2341X=m +CONFIG_VIDEO_TVEEPROM=m +CONFIG_CYPRESS_FIRMWARE=m +CONFIG_VIDEOBUF2_CORE=m +CONFIG_VIDEOBUF2_V4L2=m +CONFIG_VIDEOBUF2_MEMOPS=m +CONFIG_VIDEOBUF2_VMALLOC=m +CONFIG_VIDEOBUF2_DMA_SG=m +CONFIG_VIDEOBUF2_DVB=m +CONFIG_DVB_B2C2_FLEXCOP=m +CONFIG_VIDEO_SAA7146=m +CONFIG_VIDEO_SAA7146_VV=m +CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_SIANO_RC=y +# CONFIG_SMS_SIANO_DEBUGFS is not set +# CONFIG_V4L_PLATFORM_DRIVERS is not set +# CONFIG_V4L_MEM2MEM_DRIVERS is not set +# CONFIG_DVB_PLATFORM_DRIVERS is not set +# CONFIG_SDR_PLATFORM_DRIVERS is not set + +# +# MMC/SDIO DVB adapters +# +CONFIG_SMS_SDIO_DRV=m +# CONFIG_V4L_TEST_DRIVERS is not set +# CONFIG_DVB_TEST_DRIVERS is not set + +# +# FireWire (IEEE 1394) Adapters +# +CONFIG_DVB_FIREDTV=m +CONFIG_DVB_FIREDTV_INPUT=y +# end of Media drivers + +# +# Media ancillary drivers +# +CONFIG_MEDIA_ATTACH=y +CONFIG_VIDEO_IR_I2C=m + +# +# Audio decoders, processors and mixers +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA1997X is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +CONFIG_VIDEO_MSP3400=m +CONFIG_VIDEO_CS3308=m +CONFIG_VIDEO_CS5345=m +CONFIG_VIDEO_CS53L32A=m +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_UDA1342 is not set +CONFIG_VIDEO_WM8775=m +CONFIG_VIDEO_WM8739=m +CONFIG_VIDEO_VP27SMPX=m +# CONFIG_VIDEO_SONY_BTF_MPX is not set +# end of Audio decoders, processors and mixers + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set +# end of RDS decoders + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_ADV748X is not set +# CONFIG_VIDEO_ADV7604 is not set +# CONFIG_VIDEO_ADV7842 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_ML86V7667 is not set +# CONFIG_VIDEO_SAA7110 is not set +CONFIG_VIDEO_SAA711X=m +# CONFIG_VIDEO_TC358743 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9903 is not set +# CONFIG_VIDEO_TW9906 is not set +# CONFIG_VIDEO_TW9910 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +CONFIG_VIDEO_SAA717X=m +CONFIG_VIDEO_CX25840=m +# end of Video decoders + +# +# Video encoders +# +CONFIG_VIDEO_SAA7127=m +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_ADV7511 is not set +# CONFIG_VIDEO_AD9389B is not set +# CONFIG_VIDEO_AK881X is not set +# CONFIG_VIDEO_THS8200 is not set +# end of Video encoders + +# +# Video improvement chips +# +CONFIG_VIDEO_UPD64031A=m +CONFIG_VIDEO_UPD64083=m +# end of Video improvement chips + +# +# Audio/Video compression chips +# +# CONFIG_VIDEO_SAA6752HS is not set +# end of Audio/Video compression chips + +# +# SDR tuner chips +# +# CONFIG_SDR_MAX2175 is not set +# end of SDR tuner chips + +# +# Miscellaneous helper chips +# +# CONFIG_VIDEO_THS7303 is not set +CONFIG_VIDEO_M52790=m +# CONFIG_VIDEO_I2C is not set +# CONFIG_VIDEO_ST_MIPID02 is not set +# end of Miscellaneous helper chips + +# +# Camera sensor devices +# +# CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_IMX214 is not set +# CONFIG_VIDEO_IMX219 is not set +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX290 is not set +# CONFIG_VIDEO_IMX319 is not set +# CONFIG_VIDEO_IMX355 is not set +# CONFIG_VIDEO_OV2640 is not set +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV2740 is not set +# CONFIG_VIDEO_OV5640 is not set +# CONFIG_VIDEO_OV5645 is not set +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5675 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV772X is not set +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV8856 is not set +# CONFIG_VIDEO_OV9640 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M001 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9T112 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_RDACM20 is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# CONFIG_VIDEO_S5C73M3 is not set +# end of Camera sensor devices + +# +# Lens drivers +# +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9768 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices + +# +# SPI helper chips +# +# CONFIG_VIDEO_GS1662 is not set +# end of SPI helper chips + +# +# Media SPI Adapters +# +CONFIG_CXD2880_SPI_DRV=m +# end of Media SPI Adapters + +CONFIG_MEDIA_TUNER=m + +# +# Customize TV tuners +# +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA18250=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MSI001=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT2063=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_MT2131=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_XC4000=m +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_MEDIA_TUNER_MXL5007T=m +CONFIG_MEDIA_TUNER_MC44S803=m +CONFIG_MEDIA_TUNER_MAX2165=m +CONFIG_MEDIA_TUNER_TDA18218=m +CONFIG_MEDIA_TUNER_FC0011=m +CONFIG_MEDIA_TUNER_FC0012=m +CONFIG_MEDIA_TUNER_FC0013=m +CONFIG_MEDIA_TUNER_TDA18212=m +CONFIG_MEDIA_TUNER_E4000=m +CONFIG_MEDIA_TUNER_FC2580=m +CONFIG_MEDIA_TUNER_M88RS6000T=m +CONFIG_MEDIA_TUNER_TUA9001=m +CONFIG_MEDIA_TUNER_SI2157=m +CONFIG_MEDIA_TUNER_IT913X=m +CONFIG_MEDIA_TUNER_R820T=m +CONFIG_MEDIA_TUNER_MXL301RF=m +CONFIG_MEDIA_TUNER_QM1D1C0042=m +CONFIG_MEDIA_TUNER_QM1D1B0004=m +# end of Customize TV tuners + +# +# Customise DVB Frontends +# + +# +# Multistandard (satellite) frontends +# +CONFIG_DVB_STB0899=m +CONFIG_DVB_STB6100=m +CONFIG_DVB_STV090x=m +CONFIG_DVB_STV0910=m +CONFIG_DVB_STV6110x=m +CONFIG_DVB_STV6111=m +CONFIG_DVB_MXL5XX=m + +# +# Multistandard (cable + terrestrial) frontends +# +CONFIG_DVB_DRXK=m +CONFIG_DVB_TDA18271C2DD=m +CONFIG_DVB_SI2165=m +CONFIG_DVB_MN88472=m +CONFIG_DVB_MN88473=m + +# +# DVB-S (satellite) frontends +# +CONFIG_DVB_CX24110=m +CONFIG_DVB_CX24123=m +CONFIG_DVB_MT312=m +CONFIG_DVB_ZL10036=m +CONFIG_DVB_ZL10039=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_STV0288=m +CONFIG_DVB_STB6000=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_STV6110=m +CONFIG_DVB_STV0900=m +CONFIG_DVB_TDA8083=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_TDA8261=m +CONFIG_DVB_VES1X93=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_TUNER_CX24113=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_TUA6100=m +CONFIG_DVB_CX24116=m +CONFIG_DVB_CX24117=m +CONFIG_DVB_CX24120=m +CONFIG_DVB_SI21XX=m +CONFIG_DVB_TS2020=m +CONFIG_DVB_DS3000=m +CONFIG_DVB_MB86A16=m +CONFIG_DVB_TDA10071=m + +# +# DVB-T (terrestrial) frontends +# +CONFIG_DVB_SP8870=m +CONFIG_DVB_SP887X=m +CONFIG_DVB_CX22700=m +CONFIG_DVB_CX22702=m +CONFIG_DVB_S5H1432=m +CONFIG_DVB_DRXD=m +CONFIG_DVB_L64781=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_MT352=m +CONFIG_DVB_ZL10353=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +CONFIG_DVB_DIB9000=m +CONFIG_DVB_TDA10048=m +CONFIG_DVB_EC100=m +CONFIG_DVB_STV0367=m +CONFIG_DVB_CXD2820R=m +CONFIG_DVB_CXD2841ER=m +CONFIG_DVB_ZD1301_DEMOD=m +CONFIG_DVB_GP8PSK_FE=m +CONFIG_DVB_CXD2880=m + +# +# DVB-C (cable) frontends +# +CONFIG_DVB_VES1820=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_TDA10023=m +CONFIG_DVB_STV0297=m + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +CONFIG_DVB_NXT200X=m +CONFIG_DVB_OR51211=m +CONFIG_DVB_OR51132=m +CONFIG_DVB_BCM3510=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_LGDT3305=m +CONFIG_DVB_LG2160=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_AU8522=m +CONFIG_DVB_AU8522_DTV=m +CONFIG_DVB_AU8522_V4L=m +CONFIG_DVB_S5H1411=m + +# +# ISDB-T (terrestrial) frontends +# +CONFIG_DVB_S921=m +CONFIG_DVB_DIB8000=m +CONFIG_DVB_MB86A20S=m + +# +# ISDB-S (satellite) & ISDB-T (terrestrial) frontends +# +CONFIG_DVB_TC90522=m +CONFIG_DVB_MN88443X=m + +# +# Digital terrestrial only tuners/PLL +# +CONFIG_DVB_PLL=m +CONFIG_DVB_TUNER_DIB0070=m +CONFIG_DVB_TUNER_DIB0090=m + +# +# SEC control devices for DVB-S +# +CONFIG_DVB_DRX39XYJ=m +CONFIG_DVB_LNBH25=m +CONFIG_DVB_LNBH29=m +CONFIG_DVB_LNBP21=m +CONFIG_DVB_LNBP22=m +CONFIG_DVB_ISL6405=m +CONFIG_DVB_ISL6421=m +CONFIG_DVB_ISL6423=m +CONFIG_DVB_A8293=m +CONFIG_DVB_LGS8GL5=m +CONFIG_DVB_LGS8GXX=m +CONFIG_DVB_ATBM8830=m +CONFIG_DVB_TDA665x=m +CONFIG_DVB_IX2505V=m +CONFIG_DVB_M88RS2000=m +CONFIG_DVB_AF9033=m +CONFIG_DVB_HORUS3A=m +CONFIG_DVB_ASCOT2E=m +CONFIG_DVB_HELENE=m + +# +# Common Interface (EN50221) controller drivers +# +CONFIG_DVB_CXD2099=m +CONFIG_DVB_SP2=m +# end of Customise DVB Frontends + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set +# end of Media ancillary drivers + +# +# Graphics support +# +# CONFIG_AGP is not set +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=64 +# CONFIG_VGA_SWITCHEROO is not set +CONFIG_DRM=y +CONFIG_DRM_DP_AUX_CHARDEV=y +# CONFIG_DRM_DEBUG_MM is not set +# CONFIG_DRM_DEBUG_SELFTEST is not set +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +CONFIG_DRM_LOAD_EDID_FIRMWARE=y +CONFIG_DRM_DP_CEC=y +CONFIG_DRM_TTM=y +CONFIG_DRM_TTM_DMA_PAGE_POOL=y +CONFIG_DRM_VRAM_HELPER=y +CONFIG_DRM_TTM_HELPER=y +CONFIG_DRM_GEM_SHMEM_HELPER=y +CONFIG_DRM_SCHED=m + +# +# I2C encoder or helper chips +# +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# end of I2C encoder or helper chips + +# +# ARM devices +# +# CONFIG_DRM_KOMEDA is not set +# end of ARM devices + +CONFIG_DRM_RADEON=m +CONFIG_DRM_RADEON_USERPTR=y +CONFIG_DRM_AMDGPU=m +CONFIG_DRM_AMDGPU_SI=y +CONFIG_DRM_AMDGPU_CIK=y +CONFIG_DRM_AMDGPU_USERPTR=y +# CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set + +# +# ACP (Audio CoProcessor) Configuration +# +# CONFIG_DRM_AMD_ACP is not set +# end of ACP (Audio CoProcessor) Configuration + +# +# Display Engine Configuration +# +CONFIG_DRM_AMD_DC=y +CONFIG_DRM_AMD_DC_DCN=y +# CONFIG_DRM_AMD_DC_DCN3_0 is not set +# CONFIG_DRM_AMD_DC_HDCP is not set +# CONFIG_DRM_AMD_DC_SI is not set +# end of Display Engine Configuration + +# CONFIG_HSA_AMD is not set +CONFIG_DRM_NOUVEAU=m +# CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT is not set +CONFIG_NOUVEAU_DEBUG=5 +CONFIG_NOUVEAU_DEBUG_DEFAULT=3 +# CONFIG_NOUVEAU_DEBUG_MMU is not set +# CONFIG_NOUVEAU_DEBUG_PUSH is not set +CONFIG_DRM_NOUVEAU_BACKLIGHT=y +# CONFIG_DRM_I915 is not set +# CONFIG_DRM_VGEM is not set +CONFIG_DRM_VKMS=m +# CONFIG_DRM_VMWGFX is not set +# CONFIG_DRM_GMA500 is not set +CONFIG_DRM_UDL=m +CONFIG_DRM_AST=y +CONFIG_DRM_INSPUR=m +CONFIG_DRM_MGAG200=m +# CONFIG_DRM_RCAR_DW_HDMI is not set +# CONFIG_DRM_RCAR_LVDS is not set +CONFIG_DRM_QXL=m +CONFIG_DRM_BOCHS=m +CONFIG_DRM_VIRTIO_GPU=m +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_LVDS is not set +# CONFIG_DRM_PANEL_SIMPLE is not set +# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LB035Q02 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set +# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set +# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set +# CONFIG_DRM_PANEL_TPO_TPG110 is not set +# end of Display Panels + +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set +# CONFIG_DRM_DISPLAY_CONNECTOR is not set +# CONFIG_DRM_LONTIUM_LT9611 is not set +# CONFIG_DRM_LVDS_CODEC is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_PARADE_PS8640 is not set +# CONFIG_DRM_SIL_SII8620 is not set +# CONFIG_DRM_SII902X is not set +# CONFIG_DRM_SII9234 is not set +# CONFIG_DRM_SIMPLE_BRIDGE is not set +# CONFIG_DRM_THINE_THC63LVD1024 is not set +# CONFIG_DRM_TOSHIBA_TC358762 is not set +# CONFIG_DRM_TOSHIBA_TC358764 is not set +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TOSHIBA_TC358768 is not set +# CONFIG_DRM_TOSHIBA_TC358775 is not set +# CONFIG_DRM_TI_TFP410 is not set +# CONFIG_DRM_TI_SN65DSI86 is not set +# CONFIG_DRM_TI_TPD12S015 is not set +# CONFIG_DRM_ANALOGIX_ANX6345 is not set +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_CDNS_MHDP8546 is not set +# end of Display Interface Bridges + +# CONFIG_DRM_ETNAVIV is not set +# CONFIG_DRM_ARCPGU is not set +CONFIG_DRM_CIRRUS_QEMU=m +# CONFIG_DRM_GM12U320 is not set +# CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9225 is not set +# CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_ILI9486 is not set +# CONFIG_TINYDRM_MI0283QT is not set +# CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_ST7586 is not set +# CONFIG_TINYDRM_ST7735R is not set +# CONFIG_DRM_VBOXVIDEO is not set +# CONFIG_DRM_LEGACY is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y + +# +# Frame buffer Devices +# +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_DDC=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_BACKLIGHT=y +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_TILEBLITTING=y + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ARC is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_VGA16 is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_VESA is not set +CONFIG_FB_EFI=y +# CONFIG_FB_N411 is not set +# CONFIG_FB_HGA is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_LE80578 is not set +# CONFIG_FB_MATROX is not set +CONFIG_FB_RADEON=y +CONFIG_FB_RADEON_I2C=y +CONFIG_FB_RADEON_BACKLIGHT=y +# CONFIG_FB_RADEON_DEBUG is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_VIA is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SM501 is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +CONFIG_FB_SIMPLE=y +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +CONFIG_FB_LS2K500=m +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_PWM is not set +# CONFIG_BACKLIGHT_APPLE is not set +# CONFIG_BACKLIGHT_QCOM_WLED is not set +# CONFIG_BACKLIGHT_SAHARA is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +# CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +# CONFIG_BACKLIGHT_LED is not set +# end of Backlight & LCD device support + +CONFIG_HDMI=y + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +# end of Console display driver support + +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +# end of Graphics support + +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +CONFIG_SOUND_OSS_CORE_PRECLAIM=y +CONFIG_SND=y +CONFIG_SND_TIMER=m +CONFIG_SND_PCM=m +CONFIG_SND_HWDEP=m +CONFIG_SND_SEQ_DEVICE=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_COMPRESS_OFFLOAD=m +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +CONFIG_SND_OSSEMUL=y +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_PCM_TIMER=y +CONFIG_SND_HRTIMER=m +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_MAX_CARDS=32 +# CONFIG_SND_SUPPORT_OLD_API is not set +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_VMASTER=y +CONFIG_SND_DMA_SGBUF=y +CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQ_DUMMY=m +CONFIG_SND_SEQUENCER_OSS=m +CONFIG_SND_SEQ_HRTIMER_DEFAULT=y +CONFIG_SND_SEQ_MIDI_EVENT=m +CONFIG_SND_SEQ_MIDI=m +CONFIG_SND_SEQ_MIDI_EMUL=m +CONFIG_SND_SEQ_VIRMIDI=m +CONFIG_SND_MPU401_UART=m +CONFIG_SND_OPL3_LIB=m +CONFIG_SND_OPL3_LIB_SEQ=m +CONFIG_SND_VX_LIB=m +CONFIG_SND_AC97_CODEC=m +CONFIG_SND_DRIVERS=y +# CONFIG_SND_PCSP is not set +CONFIG_SND_DUMMY=m +CONFIG_SND_ALOOP=m +CONFIG_SND_VIRMIDI=m +CONFIG_SND_MTPAV=m +# CONFIG_SND_MTS64 is not set +# CONFIG_SND_SERIAL_U16550 is not set +CONFIG_SND_MPU401=m +# CONFIG_SND_PORTMAN2X4 is not set +CONFIG_SND_AC97_POWER_SAVE=y +CONFIG_SND_AC97_POWER_SAVE_DEFAULT=5 +CONFIG_SND_PCI=y +CONFIG_SND_AD1889=m +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALS4000 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ASIHPI is not set +CONFIG_SND_ATIIXP=m +CONFIG_SND_ATIIXP_MODEM=m +CONFIG_SND_AU8810=m +CONFIG_SND_AU8820=m +CONFIG_SND_AU8830=m +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +CONFIG_SND_BT87X=m +CONFIG_SND_BT87X_OVERCLOCK=y +CONFIG_SND_CA0106=m +CONFIG_SND_CMIPCI=m +CONFIG_SND_OXYGEN_LIB=m +CONFIG_SND_OXYGEN=m +# CONFIG_SND_CS4281 is not set +CONFIG_SND_CS46XX=m +CONFIG_SND_CS46XX_NEW_DSP=y +CONFIG_SND_CTXFI=m +CONFIG_SND_DARLA20=m +CONFIG_SND_GINA20=m +CONFIG_SND_LAYLA20=m +CONFIG_SND_DARLA24=m +CONFIG_SND_GINA24=m +CONFIG_SND_LAYLA24=m +CONFIG_SND_MONA=m +CONFIG_SND_MIA=m +CONFIG_SND_ECHO3G=m +CONFIG_SND_INDIGO=m +CONFIG_SND_INDIGOIO=m +CONFIG_SND_INDIGODJ=m +CONFIG_SND_INDIGOIOX=m +CONFIG_SND_INDIGODJX=m +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +CONFIG_SND_ENS1370=m +CONFIG_SND_ENS1371=m +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +CONFIG_SND_HDSP=m +CONFIG_SND_HDSPM=m +# CONFIG_SND_ICE1712 is not set +CONFIG_SND_ICE1724=m +CONFIG_SND_INTEL8X0=m +CONFIG_SND_INTEL8X0M=m +CONFIG_SND_KORG1212=m +CONFIG_SND_LOLA=m +CONFIG_SND_LX6464ES=m +# CONFIG_SND_MAESTRO3 is not set +CONFIG_SND_MIXART=m +# CONFIG_SND_NM256 is not set +CONFIG_SND_PCXHR=m +# CONFIG_SND_RIPTIDE is not set +CONFIG_SND_RME32=m +CONFIG_SND_RME96=m +CONFIG_SND_RME9652=m +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +CONFIG_SND_VIA82XX=m +CONFIG_SND_VIA82XX_MODEM=m +CONFIG_SND_VIRTUOSO=m +CONFIG_SND_VX222=m +# CONFIG_SND_YMFPCI is not set + +# +# HD-Audio +# +CONFIG_SND_HDA=m +CONFIG_SND_HDA_GENERIC_LEDS=y +CONFIG_SND_HDA_INTEL=m +CONFIG_SND_HDA_HWDEP=y +CONFIG_SND_HDA_RECONFIG=y +CONFIG_SND_HDA_INPUT_BEEP=y +CONFIG_SND_HDA_INPUT_BEEP_MODE=0 +CONFIG_SND_HDA_PATCH_LOADER=y +CONFIG_SND_HDA_CODEC_REALTEK=m +CONFIG_SND_HDA_CODEC_ANALOG=m +CONFIG_SND_HDA_CODEC_SIGMATEL=m +CONFIG_SND_HDA_CODEC_VIA=m +CONFIG_SND_HDA_CODEC_HDMI=m +CONFIG_SND_HDA_CODEC_CIRRUS=m +CONFIG_SND_HDA_CODEC_CONEXANT=m +CONFIG_SND_HDA_CODEC_CA0110=m +CONFIG_SND_HDA_CODEC_CA0132=m +CONFIG_SND_HDA_CODEC_CA0132_DSP=y +CONFIG_SND_HDA_CODEC_CMEDIA=m +CONFIG_SND_HDA_CODEC_SI3054=m +CONFIG_SND_HDA_GENERIC=m +CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 +# CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM is not set +# end of HD-Audio + +CONFIG_SND_HDA_CORE=m +CONFIG_SND_HDA_DSP_LOADER=y +CONFIG_SND_HDA_COMPONENT=y +CONFIG_SND_HDA_PREALLOC_SIZE=512 +CONFIG_SND_INTEL_NHLT=y +CONFIG_SND_INTEL_DSP_CONFIG=m +# CONFIG_SND_SPI is not set +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y +CONFIG_SND_USB_UA101=m +# CONFIG_SND_USB_USX2Y is not set +CONFIG_SND_USB_CAIAQ=m +CONFIG_SND_USB_CAIAQ_INPUT=y +# CONFIG_SND_USB_US122L is not set +CONFIG_SND_USB_6FIRE=m +CONFIG_SND_USB_HIFACE=m +CONFIG_SND_BCD2000=m +CONFIG_SND_USB_LINE6=m +CONFIG_SND_USB_POD=m +CONFIG_SND_USB_PODHD=m +CONFIG_SND_USB_TONEPORT=m +CONFIG_SND_USB_VARIAX=m +CONFIG_SND_FIREWIRE=y +CONFIG_SND_FIREWIRE_LIB=m +CONFIG_SND_DICE=m +CONFIG_SND_OXFW=m +CONFIG_SND_ISIGHT=m +CONFIG_SND_FIREWORKS=m +CONFIG_SND_BEBOB=m +CONFIG_SND_FIREWIRE_DIGI00X=m +CONFIG_SND_FIREWIRE_TASCAM=m +CONFIG_SND_FIREWIRE_MOTU=m +CONFIG_SND_FIREFACE=m +CONFIG_SND_SOC=m +CONFIG_SND_SOC_COMPRESS=y +CONFIG_SND_SOC_ACPI=m +# CONFIG_SND_SOC_AMD_ACP is not set +# CONFIG_SND_SOC_AMD_ACP3x is not set +# CONFIG_SND_SOC_AMD_RENOIR is not set +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_AUDMIX is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_FSL_MICFIL is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# end of SoC Audio for Freescale CPUs + +# CONFIG_SND_I2S_HI6210_I2S is not set +# CONFIG_SND_SOC_IMG is not set +CONFIG_SND_SOC_INTEL_SST_TOPLEVEL=y +# CONFIG_SND_SOC_INTEL_CATPT is not set +CONFIG_SND_SST_ATOM_HIFI2_PLATFORM=m +# CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_PCI is not set +CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_ACPI=m +# CONFIG_SND_SOC_INTEL_SKYLAKE is not set +# CONFIG_SND_SOC_INTEL_SKL is not set +# CONFIG_SND_SOC_INTEL_APL is not set +# CONFIG_SND_SOC_INTEL_KBL is not set +# CONFIG_SND_SOC_INTEL_GLK is not set +# CONFIG_SND_SOC_INTEL_CNL is not set +# CONFIG_SND_SOC_INTEL_CFL is not set +# CONFIG_SND_SOC_INTEL_CML_H is not set +# CONFIG_SND_SOC_INTEL_CML_LP is not set +CONFIG_SND_SOC_ACPI_INTEL_MATCH=m +CONFIG_SND_SOC_INTEL_MACH=y +# CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES is not set +# CONFIG_SND_SOC_MTK_BTCVSD is not set +# CONFIG_SND_SOC_SOF_TOPLEVEL is not set + +# +# STMicroelectronics STM32 SOC audio support +# +# end of STMicroelectronics STM32 SOC audio support + +# CONFIG_SND_SOC_XILINX_I2S is not set +# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set +# CONFIG_SND_SOC_XILINX_SPDIF is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +# CONFIG_ZX_TDM is not set +CONFIG_SND_SOC_I2C_AND_SPI=m + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU1761_I2C is not set +# CONFIG_SND_SOC_ADAU1761_SPI is not set +# CONFIG_SND_SOC_ADAU7002 is not set +# CONFIG_SND_SOC_ADAU7118_HW is not set +# CONFIG_SND_SOC_ADAU7118_I2C is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4118 is not set +# CONFIG_SND_SOC_AK4458 is not set +# CONFIG_SND_SOC_AK4554 is not set +# CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_AK5558 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_BD28623 is not set +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS35L34 is not set +# CONFIG_SND_SOC_CS35L35 is not set +# CONFIG_SND_SOC_CS35L36 is not set +# CONFIG_SND_SOC_CS42L42 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4234 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS43130 is not set +# CONFIG_SND_SOC_CS4341 is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CX2072X is not set +# CONFIG_SND_SOC_DA7213 is not set +# CONFIG_SND_SOC_DMIC is not set +# CONFIG_SND_SOC_ES7134 is not set +# CONFIG_SND_SOC_ES7241 is not set +# CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_MAX98088 is not set +# CONFIG_SND_SOC_MAX98357A is not set +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX9867 is not set +# CONFIG_SND_SOC_MAX98927 is not set +# CONFIG_SND_SOC_MAX98373_I2C is not set +# CONFIG_SND_SOC_MAX98390 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1789_I2C is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +# CONFIG_SND_SOC_PCM186X_I2C is not set +# CONFIG_SND_SOC_PCM186X_SPI is not set +# CONFIG_SND_SOC_PCM3060_I2C is not set +# CONFIG_SND_SOC_PCM3060_SPI is not set +# CONFIG_SND_SOC_PCM3168A_I2C is not set +# CONFIG_SND_SOC_PCM3168A_SPI is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_RK3328 is not set +# CONFIG_SND_SOC_RT5616 is not set +# CONFIG_SND_SOC_RT5631 is not set +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +# CONFIG_SND_SOC_SPDIF is not set +# CONFIG_SND_SOC_SSM2305 is not set +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS2562 is not set +# CONFIG_SND_SOC_TAS2764 is not set +# CONFIG_SND_SOC_TAS2770 is not set +# CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set +# CONFIG_SND_SOC_TAS5720 is not set +# CONFIG_SND_SOC_TAS6424 is not set +# CONFIG_SND_SOC_TDA7419 is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set +# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set +# CONFIG_SND_SOC_TLV320AIC3X is not set +# CONFIG_SND_SOC_TLV320ADCX140 is not set +# CONFIG_SND_SOC_TS3A227E is not set +# CONFIG_SND_SOC_TSCS42XX is not set +# CONFIG_SND_SOC_TSCS454 is not set +# CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8524 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8782 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8904 is not set +# CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZL38060 is not set +# CONFIG_SND_SOC_ZX_AUD96P22 is not set +# CONFIG_SND_SOC_MAX9759 is not set +# CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6358 is not set +# CONFIG_SND_SOC_MT6660 is not set +# CONFIG_SND_SOC_NAU8540 is not set +# CONFIG_SND_SOC_NAU8810 is not set +# CONFIG_SND_SOC_NAU8822 is not set +# CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +# end of CODEC drivers + +# CONFIG_SND_SIMPLE_CARD is not set +# CONFIG_SND_AUDIO_GRAPH_CARD is not set +CONFIG_SND_X86=y +CONFIG_AC97_BUS=m + +# +# HID support +# +CONFIG_HID=y +CONFIG_HID_BATTERY_STRENGTH=y +CONFIG_HIDRAW=y +CONFIG_UHID=m +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=m +# CONFIG_HID_ACCUTOUCH is not set +CONFIG_HID_ACRUX=m +# CONFIG_HID_ACRUX_FF is not set +CONFIG_HID_APPLE=m +CONFIG_HID_APPLEIR=m +CONFIG_HID_ASUS=m +CONFIG_HID_AUREAL=m +CONFIG_HID_BELKIN=m +CONFIG_HID_BETOP_FF=m +# CONFIG_HID_BIGBEN_FF is not set +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CORSAIR=m +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_MACALLY is not set +CONFIG_HID_PRODIKEYS=m +CONFIG_HID_CMEDIA=m +# CONFIG_HID_CP2112 is not set +# CONFIG_HID_CREATIVE_SB0540 is not set +CONFIG_HID_CYPRESS=m +CONFIG_HID_DRAGONRISE=m +# CONFIG_DRAGONRISE_FF is not set +# CONFIG_HID_EMS_FF is not set +CONFIG_HID_ELAN=m +CONFIG_HID_ELECOM=m +CONFIG_HID_ELO=m +CONFIG_HID_EZKEY=m +CONFIG_HID_GEMBIRD=m +CONFIG_HID_GFRM=m +# CONFIG_HID_GLORIOUS is not set +CONFIG_HID_HOLTEK=m +# CONFIG_HOLTEK_FF is not set +# CONFIG_HID_VIVALDI is not set +CONFIG_HID_GT683R=m +CONFIG_HID_KEYTOUCH=m +CONFIG_HID_KYE=m +CONFIG_HID_UCLOGIC=m +CONFIG_HID_WALTOP=m +# CONFIG_HID_VIEWSONIC is not set +CONFIG_HID_GYRATION=m +CONFIG_HID_ICADE=m +CONFIG_HID_ITE=m +CONFIG_HID_JABRA=m +CONFIG_HID_TWINHAN=m +CONFIG_HID_KENSINGTON=m +CONFIG_HID_LCPOWER=m +CONFIG_HID_LED=m +CONFIG_HID_LENOVO=m +CONFIG_HID_LOGITECH=m +CONFIG_HID_LOGITECH_DJ=m +CONFIG_HID_LOGITECH_HIDPP=m +CONFIG_LOGITECH_FF=y +CONFIG_LOGIRUMBLEPAD2_FF=y +CONFIG_LOGIG940_FF=y +CONFIG_LOGIWHEELS_FF=y +CONFIG_HID_MAGICMOUSE=y +# CONFIG_HID_MALTRON is not set +# CONFIG_HID_MAYFLASH is not set +# CONFIG_HID_REDRAGON is not set +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +CONFIG_HID_MULTITOUCH=m +CONFIG_HID_NTI=m +CONFIG_HID_NTRIG=y +CONFIG_HID_ORTEK=m +CONFIG_HID_PANTHERLORD=m +# CONFIG_PANTHERLORD_FF is not set +CONFIG_HID_PENMOUNT=m +CONFIG_HID_PETALYNX=m +CONFIG_HID_PICOLCD=m +# CONFIG_HID_PICOLCD_FB is not set +# CONFIG_HID_PICOLCD_BACKLIGHT is not set +# CONFIG_HID_PICOLCD_LEDS is not set +# CONFIG_HID_PICOLCD_CIR is not set +CONFIG_HID_PLANTRONICS=m +CONFIG_HID_PRIMAX=m +# CONFIG_HID_RETRODE is not set +CONFIG_HID_ROCCAT=m +CONFIG_HID_SAITEK=m +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SONY=m +CONFIG_SONY_FF=y +CONFIG_HID_SPEEDLINK=m +# CONFIG_HID_STEAM is not set +CONFIG_HID_STEELSERIES=m +CONFIG_HID_SUNPLUS=m +CONFIG_HID_RMI=m +CONFIG_HID_GREENASIA=m +# CONFIG_GREENASIA_FF is not set +CONFIG_HID_SMARTJOYPLUS=m +# CONFIG_SMARTJOYPLUS_FF is not set +CONFIG_HID_TIVO=m +CONFIG_HID_TOPSEED=m +CONFIG_HID_THINGM=m +CONFIG_HID_THRUSTMASTER=m +# CONFIG_THRUSTMASTER_FF is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_U2FZERO is not set +CONFIG_HID_WACOM=m +CONFIG_HID_WIIMOTE=m +CONFIG_HID_XINMO=m +CONFIG_HID_ZEROPLUS=m +# CONFIG_ZEROPLUS_FF is not set +CONFIG_HID_ZYDACRON=m +CONFIG_HID_SENSOR_HUB=y +CONFIG_HID_SENSOR_CUSTOM_SENSOR=m +CONFIG_HID_ALPS=m +# CONFIG_HID_MCP2221 is not set +# end of Special HID drivers + +# +# USB HID support +# +CONFIG_USB_HID=y +CONFIG_HID_PID=y +CONFIG_USB_HIDDEV=y +# end of USB HID support + +# +# I2C HID support +# +CONFIG_I2C_HID=m +# end of I2C HID support + +# +# Intel ISH HID support +# +# CONFIG_INTEL_ISH_HID is not set +# end of Intel ISH HID support +# end of HID support + +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_LED_TRIG=y +# CONFIG_USB_ULPI_BUS is not set +# CONFIG_USB_CONN_GPIO is not set +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_PCI=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_FEW_INIT_RETRIES is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_PRODUCTLIST is not set +# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set +CONFIG_USB_LEDS_TRIGGER_USBPORT=m +CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_MON=y + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DBGCAP=y +CONFIG_USB_XHCI_PCI=y +# CONFIG_USB_XHCI_PCI_RENESAS is not set +CONFIG_USB_XHCI_PLATFORM=m +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +# CONFIG_USB_EHCI_FSL is not set +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PCI=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_UHCI_HCD=y +# CONFIG_USB_U132_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_BCMA is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m +CONFIG_USB_WDM=m +CONFIG_USB_TMC=m + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_REALTEK=m +CONFIG_REALTEK_AUTOPM=y +CONFIG_USB_STORAGE_DATAFAB=m +CONFIG_USB_STORAGE_FREECOM=m +CONFIG_USB_STORAGE_ISD200=m +CONFIG_USB_STORAGE_USBAT=m +CONFIG_USB_STORAGE_SDDR09=m +CONFIG_USB_STORAGE_SDDR55=m +CONFIG_USB_STORAGE_JUMPSHOT=m +CONFIG_USB_STORAGE_ALAUDA=m +CONFIG_USB_STORAGE_ONETOUCH=m +CONFIG_USB_STORAGE_KARMA=m +CONFIG_USB_STORAGE_CYPRESS_ATACB=m +CONFIG_USB_STORAGE_ENE_UB6250=m +CONFIG_USB_UAS=m + +# +# USB Imaging devices +# +CONFIG_USB_MDC800=m +CONFIG_USB_MICROTEK=m +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_CDNS3 is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_DWC3 is not set +CONFIG_USB_DWC2=y +CONFIG_USB_DWC2_HOST=y + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +# CONFIG_USB_DWC2_DUAL_ROLE is not set +# CONFIG_USB_DWC2_PCI is not set +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +CONFIG_USB_USS720=m +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_GENERIC=y +# CONFIG_USB_SERIAL_SIMPLE is not set +CONFIG_USB_SERIAL_AIRCABLE=m +CONFIG_USB_SERIAL_ARK3116=m +CONFIG_USB_SERIAL_BELKIN=m +CONFIG_USB_SERIAL_CH341=m +CONFIG_USB_SERIAL_WHITEHEAT=m +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m +CONFIG_USB_SERIAL_CP210X=m +CONFIG_USB_SERIAL_CYPRESS_M8=m +CONFIG_USB_SERIAL_EMPEG=m +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_VISOR=m +CONFIG_USB_SERIAL_IPAQ=m +CONFIG_USB_SERIAL_IR=m +CONFIG_USB_SERIAL_EDGEPORT=m +CONFIG_USB_SERIAL_EDGEPORT_TI=m +# CONFIG_USB_SERIAL_F81232 is not set +CONFIG_USB_SERIAL_F8153X=m +CONFIG_USB_SERIAL_GARMIN=m +CONFIG_USB_SERIAL_IPW=m +CONFIG_USB_SERIAL_IUU=m +CONFIG_USB_SERIAL_KEYSPAN_PDA=m +CONFIG_USB_SERIAL_KEYSPAN=m +CONFIG_USB_SERIAL_KLSI=m +CONFIG_USB_SERIAL_KOBIL_SCT=m +CONFIG_USB_SERIAL_MCT_U232=m +# CONFIG_USB_SERIAL_METRO is not set +CONFIG_USB_SERIAL_MOS7720=m +CONFIG_USB_SERIAL_MOS7715_PARPORT=y +CONFIG_USB_SERIAL_MOS7840=m +CONFIG_USB_SERIAL_MXUPORT=m +CONFIG_USB_SERIAL_NAVMAN=m +CONFIG_USB_SERIAL_PL2303=m +CONFIG_USB_SERIAL_OTI6858=m +CONFIG_USB_SERIAL_QCAUX=m +CONFIG_USB_SERIAL_QUALCOMM=m +CONFIG_USB_SERIAL_SPCP8X5=m +CONFIG_USB_SERIAL_SAFE=m +CONFIG_USB_SERIAL_SAFE_PADDED=y +CONFIG_USB_SERIAL_SIERRAWIRELESS=m +CONFIG_USB_SERIAL_SYMBOL=m +CONFIG_USB_SERIAL_TI=m +CONFIG_USB_SERIAL_CYBERJACK=m +CONFIG_USB_SERIAL_XIRCOM=m +CONFIG_USB_SERIAL_WWAN=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_SERIAL_OMNINET=m +CONFIG_USB_SERIAL_OPTICON=m +CONFIG_USB_SERIAL_XSENS_MT=m +# CONFIG_USB_SERIAL_WISHBONE is not set +CONFIG_USB_SERIAL_SSU100=m +CONFIG_USB_SERIAL_QT2=m +CONFIG_USB_SERIAL_UPD78F0730=m +CONFIG_USB_SERIAL_DEBUG=m + +# +# USB Miscellaneous drivers +# +CONFIG_USB_EMI62=m +CONFIG_USB_EMI26=m +CONFIG_USB_ADUTUX=m +CONFIG_USB_SEVSEG=m +CONFIG_USB_LEGOTOWER=m +CONFIG_USB_LCD=m +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +CONFIG_USB_IDMOUSE=m +CONFIG_USB_FTDI_ELAN=m +CONFIG_USB_APPLEDISPLAY=m +# CONFIG_APPLE_MFI_FASTCHARGE is not set +CONFIG_USB_SISUSBVGA=m +CONFIG_USB_LD=m +# CONFIG_USB_TRANCEVIBRATOR is not set +CONFIG_USB_IOWARRIOR=m +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +CONFIG_USB_ISIGHTFW=m +# CONFIG_USB_YUREX is not set +CONFIG_USB_EZUSB_FX2=m +# CONFIG_USB_HUB_USB251XB is not set +CONFIG_USB_HSIC_USB3503=m +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set +CONFIG_USB_ATM=m +CONFIG_USB_SPEEDTOUCH=m +CONFIG_USB_CXACRU=m +CONFIG_USB_UEAGLEATM=m +CONFIG_USB_XUSBATM=m + +# +# USB Physical Layer drivers +# +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# end of USB Physical Layer drivers + +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_SNP_UDC_PLAT is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_MAX3420_UDC is not set +# CONFIG_USB_DUMMY_HCD is not set +# end of USB Peripheral Controller + +# CONFIG_USB_CONFIGFS is not set + +# +# USB Gadget precomposed configurations +# +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_GADGET_TARGET is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_NOKIA is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set +# CONFIG_USB_RAW_GADGET is not set +# end of USB Gadget precomposed configurations + +CONFIG_TYPEC=m +CONFIG_TYPEC_TCPM=m +CONFIG_TYPEC_TCPCI=m +CONFIG_TYPEC_RT1711H=m +# CONFIG_TYPEC_TCPCI_MAXIM is not set +CONFIG_TYPEC_FUSB302=m +CONFIG_TYPEC_UCSI=m +# CONFIG_UCSI_CCG is not set +CONFIG_UCSI_ACPI=m +# CONFIG_TYPEC_HD3SS3220 is not set +CONFIG_TYPEC_TPS6598X=m +# CONFIG_TYPEC_STUSB160X is not set + +# +# USB Type-C Multiplexer/DeMultiplexer Switch support +# +CONFIG_TYPEC_MUX_PI3USB30532=m +# end of USB Type-C Multiplexer/DeMultiplexer Switch support + +# +# USB Type-C Alternate Mode drivers +# +CONFIG_TYPEC_DP_ALTMODE=m +# CONFIG_TYPEC_NVIDIA_ALTMODE is not set +# end of USB Type-C Alternate Mode drivers + +CONFIG_USB_ROLE_SWITCH=y +# CONFIG_USB_ROLES_INTEL_XHCI is not set +CONFIG_MMC=m +CONFIG_PWRSEQ_EMMC=m +# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SIMPLE=m +CONFIG_MMC_BLOCK=m +CONFIG_MMC_BLOCK_MINORS=8 +CONFIG_SDIO_UART=m +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_SDHCI=m +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +CONFIG_MMC_SDHCI_PCI=m +CONFIG_MMC_RICOH_MMC=y +CONFIG_MMC_SDHCI_ACPI=m +CONFIG_MMC_SDHCI_PLTFM=m +# CONFIG_MMC_SDHCI_OF_ARASAN is not set +# CONFIG_MMC_SDHCI_OF_ASPEED is not set +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set +# CONFIG_MMC_SDHCI_CADENCE is not set +# CONFIG_MMC_SDHCI_F_SDH30 is not set +# CONFIG_MMC_SDHCI_MILBEAUT is not set +# CONFIG_MMC_WBSD is not set +CONFIG_MMC_TIFM_SD=m +# CONFIG_MMC_SPI is not set +CONFIG_MMC_CB710=m +CONFIG_MMC_VIA_SDMMC=m +CONFIG_MMC_VUB300=m +CONFIG_MMC_USHC=m +# CONFIG_MMC_USDHI6ROL0 is not set +CONFIG_MMC_REALTEK_PCI=m +CONFIG_MMC_REALTEK_USB=m +CONFIG_MMC_CQHCI=m +# CONFIG_MMC_HSQ is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +CONFIG_MMC_SDHCI_XENON=m +CONFIG_MEMSTICK=m +# CONFIG_MEMSTICK_DEBUG is not set + +# +# MemoryStick drivers +# +# CONFIG_MEMSTICK_UNSAFE_RESUME is not set +CONFIG_MSPRO_BLOCK=m +# CONFIG_MS_BLOCK is not set + +# +# MemoryStick Host Controller Drivers +# +CONFIG_MEMSTICK_TIFM_MS=m +CONFIG_MEMSTICK_JMICRON_38X=m +CONFIG_MEMSTICK_R592=m +CONFIG_MEMSTICK_REALTEK_PCI=m +CONFIG_MEMSTICK_REALTEK_USB=m +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_CLASS_MULTICOLOR is not set +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set + +# +# LED drivers +# +# CONFIG_LEDS_AN30259A is not set +# CONFIG_LEDS_APU is not set +# CONFIG_LEDS_AW2013 is not set +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_CR0014114 is not set +# CONFIG_LEDS_EL15203000 is not set +CONFIG_LEDS_LM3530=m +# CONFIG_LEDS_LM3532 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_LM3692X is not set +# CONFIG_LEDS_PCA9532 is not set +# CONFIG_LEDS_GPIO is not set +CONFIG_LEDS_LP3944=m +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP50XX is not set +# CONFIG_LEDS_LP55XX_COMMON is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_CLEVO_MAIL is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_PWM is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_INTEL_SS4200 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set +# CONFIG_LEDS_IS31FL32XX is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +CONFIG_LEDS_BLINKM=m +# CONFIG_LEDS_SYSCON is not set +# CONFIG_LEDS_MLXCPLD is not set +# CONFIG_LEDS_MLXREG is not set +# CONFIG_LEDS_USER is not set +# CONFIG_LEDS_NIC78BX is not set +# CONFIG_LEDS_SPI_BYTE is not set +# CONFIG_LEDS_TI_LMU_COMMON is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=m +CONFIG_LEDS_TRIGGER_ONESHOT=m +CONFIG_LEDS_TRIGGER_DISK=y +# CONFIG_LEDS_TRIGGER_MTD is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=m +CONFIG_LEDS_TRIGGER_BACKLIGHT=m +# CONFIG_LEDS_TRIGGER_CPU is not set +# CONFIG_LEDS_TRIGGER_ACTIVITY is not set +CONFIG_LEDS_TRIGGER_GPIO=m +CONFIG_LEDS_TRIGGER_DEFAULT_ON=m + +# +# iptables trigger is under Netfilter config (LED target) +# +CONFIG_LEDS_TRIGGER_TRANSIENT=m +CONFIG_LEDS_TRIGGER_CAMERA=m +# CONFIG_LEDS_TRIGGER_PANIC is not set +# CONFIG_LEDS_TRIGGER_NETDEV is not set +# CONFIG_LEDS_TRIGGER_PATTERN is not set +CONFIG_LEDS_TRIGGER_AUDIO=y +# CONFIG_ACCESSIBILITY is not set +CONFIG_INFINIBAND=m +CONFIG_INFINIBAND_USER_MAD=m +CONFIG_INFINIBAND_USER_ACCESS=m +CONFIG_INFINIBAND_USER_MEM=y +CONFIG_INFINIBAND_ON_DEMAND_PAGING=y +CONFIG_INFINIBAND_ADDR_TRANS=y +CONFIG_INFINIBAND_ADDR_TRANS_CONFIGFS=y +# CONFIG_INFINIBAND_PEER_MEMORY is not set +CONFIG_INFINIBAND_VIRT_DMA=y +# CONFIG_INFINIBAND_MTHCA is not set +CONFIG_INFINIBAND_CXGB4=m +# CONFIG_INFINIBAND_EFA is not set +CONFIG_INFINIBAND_I40IW=m +CONFIG_MLX4_INFINIBAND=m +CONFIG_MLX5_INFINIBAND=m +# CONFIG_INFINIBAND_OCRDMA is not set +CONFIG_INFINIBAND_VMWARE_PVRDMA=m +CONFIG_INFINIBAND_BNXT_RE=m +# CONFIG_INFINIBAND_RDMAVT is not set +CONFIG_RDMA_RXE=m +# CONFIG_RDMA_SIW is not set +CONFIG_INFINIBAND_IPOIB=m +CONFIG_INFINIBAND_IPOIB_CM=y +CONFIG_INFINIBAND_IPOIB_DEBUG=y +# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set +CONFIG_INFINIBAND_SRP=m +CONFIG_INFINIBAND_SRPT=m +CONFIG_INFINIBAND_ISER=m +CONFIG_INFINIBAND_ISERT=m +# CONFIG_INFINIBAND_RTRS_CLIENT is not set +# CONFIG_INFINIBAND_RTRS_SERVER is not set +# CONFIG_INFINIBAND_OPA_VNIC is not set +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_MC146818_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_SYSTOHC is not set +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set +# CONFIG_RTC_DRV_ABX80X is not set +CONFIG_RTC_DRV_DS1307=m +# CONFIG_RTC_DRV_DS1307_CENTURY is not set +CONFIG_RTC_DRV_DS1374=m +# CONFIG_RTC_DRV_DS1374_WDT is not set +CONFIG_RTC_DRV_DS1672=m +# CONFIG_RTC_DRV_HYM8563 is not set +CONFIG_RTC_DRV_MAX6900=m +CONFIG_RTC_DRV_RS5C372=m +CONFIG_RTC_DRV_ISL1208=m +CONFIG_RTC_DRV_ISL12022=m +# CONFIG_RTC_DRV_ISL12026 is not set +CONFIG_RTC_DRV_X1205=m +CONFIG_RTC_DRV_PCF8523=m +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF85363 is not set +CONFIG_RTC_DRV_PCF8563=m +CONFIG_RTC_DRV_PCF8583=m +CONFIG_RTC_DRV_M41T80=m +CONFIG_RTC_DRV_M41T80_WDT=y +CONFIG_RTC_DRV_BQ32K=m +# CONFIG_RTC_DRV_S35390A is not set +CONFIG_RTC_DRV_FM3130=m +# CONFIG_RTC_DRV_RX8010 is not set +CONFIG_RTC_DRV_RX8581=m +CONFIG_RTC_DRV_RX8025=m +CONFIG_RTC_DRV_EM3027=m +# CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV3032 is not set +CONFIG_RTC_DRV_RV8803=m +# CONFIG_RTC_DRV_SD3078 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +CONFIG_RTC_DRV_RX4581=m +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +CONFIG_RTC_DRV_DS3232=m +CONFIG_RTC_DRV_DS3232_HWMON=y +# CONFIG_RTC_DRV_PCF2127 is not set +CONFIG_RTC_DRV_RV3029C2=m +# CONFIG_RTC_DRV_RV3029_HWMON is not set + +# +# Platform RTC drivers +# +CONFIG_RTC_DRV_CMOS=y +CONFIG_RTC_DRV_DS1286=m +CONFIG_RTC_DRV_DS1511=m +CONFIG_RTC_DRV_DS1553=m +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +CONFIG_RTC_DRV_DS1742=m +CONFIG_RTC_DRV_DS2404=m +CONFIG_RTC_DRV_STK17TA8=m +# CONFIG_RTC_DRV_M48T86 is not set +CONFIG_RTC_DRV_M48T35=m +CONFIG_RTC_DRV_M48T59=m +CONFIG_RTC_DRV_MSM6242=m +CONFIG_RTC_DRV_BQ4802=m +CONFIG_RTC_DRV_RP5C01=m +CONFIG_RTC_DRV_V3020=m +# CONFIG_RTC_DRV_ZYNQMP is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_CADENCE is not set +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_ACPI=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +# CONFIG_DW_AXI_DMAC is not set +# CONFIG_FSL_EDMA is not set +# CONFIG_INTEL_IDMA64 is not set +# CONFIG_INTEL_IDXD_COMPAT is not set +# CONFIG_INTEL_IOATDMA is not set +# CONFIG_PLX_DMA is not set +# CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_QCOM_HIDMA_MGMT is not set +# CONFIG_QCOM_HIDMA is not set +CONFIG_DW_DMAC_CORE=y +CONFIG_DW_DMAC=m +# CONFIG_DW_DMAC_PCI is not set +# CONFIG_DW_EDMA is not set +# CONFIG_DW_EDMA_PCIE is not set +CONFIG_HSU_DMA=y +# CONFIG_SF_PDMA is not set + +# +# DMA Clients +# +CONFIG_ASYNC_TX_DMA=y +# CONFIG_DMATEST is not set + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_MOVE_NOTIFY is not set +# CONFIG_DMABUF_SELFTESTS is not set +# CONFIG_DMABUF_HEAPS is not set +# end of DMABUF options + +# CONFIG_AUXDISPLAY is not set +# CONFIG_PANEL is not set +CONFIG_UIO=m +CONFIG_UIO_CIF=m +CONFIG_UIO_PDRV_GENIRQ=m +CONFIG_UIO_DMEM_GENIRQ=m +CONFIG_UIO_AEC=m +CONFIG_UIO_SERCOS3=m +CONFIG_UIO_PCI_GENERIC=m +# CONFIG_UIO_NETX is not set +# CONFIG_UIO_PRUSS is not set +# CONFIG_UIO_MF624 is not set +CONFIG_VFIO_IOMMU_TYPE1=m +CONFIG_VFIO_VIRQFD=m +CONFIG_VFIO=m +CONFIG_VFIO_NOIOMMU=y +CONFIG_VFIO_PCI=m +# CONFIG_VFIO_PCI_VGA is not set +CONFIG_VFIO_PCI_MMAP=y +CONFIG_VFIO_PCI_INTX=y +CONFIG_VFIO_PCI_IGD=y +CONFIG_VFIO_MDEV=m +CONFIG_VFIO_MDEV_DEVICE=m +CONFIG_IRQ_BYPASS_MANAGER=m +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO=y +CONFIG_VIRTIO_PCI_LIB=y +CONFIG_VIRTIO_MENU=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +CONFIG_VIRTIO_BALLOON=m +CONFIG_VIRTIO_MEM=m +CONFIG_VIRTIO_INPUT=m +CONFIG_VIRTIO_MMIO=m +CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y +CONFIG_VIRTIO_DMA_SHARED_BUFFER=m +# CONFIG_VDPA is not set +CONFIG_VHOST_IOTLB=m +CONFIG_VHOST=m +CONFIG_VHOST_MENU=y +CONFIG_VHOST_NET=m +CONFIG_VHOST_SCSI=m +CONFIG_VHOST_VSOCK=m +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set + +# +# Microsoft Hyper-V guest support +# +# end of Microsoft Hyper-V guest support + +# CONFIG_GREYBUS is not set +CONFIG_STAGING=y +# CONFIG_PRISM2_USB is not set +CONFIG_COMEDI=m +# CONFIG_COMEDI_DEBUG is not set +CONFIG_COMEDI_DEFAULT_BUF_SIZE_KB=2048 +CONFIG_COMEDI_DEFAULT_BUF_MAXSIZE_KB=20480 +# CONFIG_COMEDI_MISC_DRIVERS is not set +# CONFIG_COMEDI_ISA_DRIVERS is not set +CONFIG_COMEDI_PCI_DRIVERS=m +CONFIG_COMEDI_8255_PCI=m +# CONFIG_COMEDI_ADDI_APCI_1032 is not set +# CONFIG_COMEDI_ADDI_APCI_1500 is not set +# CONFIG_COMEDI_ADDI_APCI_1516 is not set +# CONFIG_COMEDI_ADDI_APCI_1564 is not set +# CONFIG_COMEDI_ADDI_APCI_16XX is not set +# CONFIG_COMEDI_ADDI_APCI_2032 is not set +# CONFIG_COMEDI_ADDI_APCI_2200 is not set +# CONFIG_COMEDI_ADDI_APCI_3120 is not set +# CONFIG_COMEDI_ADDI_APCI_3501 is not set +# CONFIG_COMEDI_ADDI_APCI_3XXX is not set +CONFIG_COMEDI_ADL_PCI6208=m +CONFIG_COMEDI_ADL_PCI7X3X=m +CONFIG_COMEDI_ADL_PCI8164=m +CONFIG_COMEDI_ADL_PCI9111=m +CONFIG_COMEDI_ADL_PCI9118=m +CONFIG_COMEDI_ADV_PCI1710=m +CONFIG_COMEDI_ADV_PCI1720=m +CONFIG_COMEDI_ADV_PCI1723=m +CONFIG_COMEDI_ADV_PCI1724=m +CONFIG_COMEDI_ADV_PCI1760=m +CONFIG_COMEDI_ADV_PCI_DIO=m +# CONFIG_COMEDI_AMPLC_DIO200_PCI is not set +# CONFIG_COMEDI_AMPLC_PC236_PCI is not set +# CONFIG_COMEDI_AMPLC_PC263_PCI is not set +# CONFIG_COMEDI_AMPLC_PCI224 is not set +# CONFIG_COMEDI_AMPLC_PCI230 is not set +# CONFIG_COMEDI_CONTEC_PCI_DIO is not set +# CONFIG_COMEDI_DAS08_PCI is not set +# CONFIG_COMEDI_DT3000 is not set +# CONFIG_COMEDI_DYNA_PCI10XX is not set +# CONFIG_COMEDI_GSC_HPDI is not set +# CONFIG_COMEDI_MF6X4 is not set +# CONFIG_COMEDI_ICP_MULTI is not set +# CONFIG_COMEDI_DAQBOARD2000 is not set +# CONFIG_COMEDI_JR3_PCI is not set +# CONFIG_COMEDI_KE_COUNTER is not set +# CONFIG_COMEDI_CB_PCIDAS64 is not set +# CONFIG_COMEDI_CB_PCIDAS is not set +# CONFIG_COMEDI_CB_PCIDDA is not set +# CONFIG_COMEDI_CB_PCIMDAS is not set +# CONFIG_COMEDI_CB_PCIMDDA is not set +# CONFIG_COMEDI_ME4000 is not set +# CONFIG_COMEDI_ME_DAQ is not set +# CONFIG_COMEDI_NI_6527 is not set +# CONFIG_COMEDI_NI_65XX is not set +# CONFIG_COMEDI_NI_660X is not set +# CONFIG_COMEDI_NI_670X is not set +CONFIG_COMEDI_NI_LABPC_PCI=m +CONFIG_COMEDI_NI_PCIDIO=m +CONFIG_COMEDI_NI_PCIMIO=m +# CONFIG_COMEDI_RTD520 is not set +# CONFIG_COMEDI_S626 is not set +CONFIG_COMEDI_MITE=m +CONFIG_COMEDI_NI_TIOCMD=m +# CONFIG_COMEDI_USB_DRIVERS is not set +CONFIG_COMEDI_8254=m +CONFIG_COMEDI_8255=m +# CONFIG_COMEDI_8255_SA is not set +# CONFIG_COMEDI_KCOMEDILIB is not set +CONFIG_COMEDI_NI_LABPC=m +CONFIG_COMEDI_NI_TIO=m +CONFIG_COMEDI_NI_ROUTING=m +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_RTL8723BS is not set +# CONFIG_R8712U is not set +CONFIG_R8188EU=m +# CONFIG_88EU_AP_MODE is not set +# CONFIG_RTS5208 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16240 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7816 is not set +# CONFIG_AD7280 is not set +# end of Analog to digital converters + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set +# end of Analog digital bi-direction converters + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7746 is not set +# end of Capacitance to digital converters + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set +# end of Direct Digital Synthesis + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set +# end of Network Analyzer, Impedance Converters + +# +# Active energy metering IC +# +# CONFIG_ADE7854 is not set +# end of Active energy metering IC + +# +# Resolver to digital converters +# +# CONFIG_AD2S1210 is not set +# end of Resolver to digital converters +# end of IIO staging drivers + +# CONFIG_FB_SM750 is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +# end of Android + +# CONFIG_STAGING_BOARD is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_FIREWIRE_SERIAL is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_UNISYSSPAR is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_FB_TFT is not set +# CONFIG_KS7010 is not set +# CONFIG_PI433 is not set + +# +# Gasket devices +# +# CONFIG_STAGING_GASKET_FRAMEWORK is not set +# end of Gasket devices + +# CONFIG_XIL_AXIS_FIFO is not set +# CONFIG_FIELDBUS_DEV is not set +# CONFIG_KPC2000 is not set +# CONFIG_QLGE is not set +# CONFIG_WFX is not set +CONFIG_X86_PLATFORM_DEVICES=y +# CONFIG_INTEL_IFS is not set +CONFIG_ACPI_WMI=m +CONFIG_WMI_BMOF=m +# CONFIG_ALIENWARE_WMI is not set +# CONFIG_HUAWEI_WMI is not set +# CONFIG_INTEL_WMI_SBL_FW_UPDATE is not set +# CONFIG_INTEL_WMI_THUNDERBOLT is not set +CONFIG_MXM_WMI=m +# CONFIG_PEAQ_WMI is not set +# CONFIG_XIAOMI_WMI is not set +# CONFIG_ACERHDF is not set +# CONFIG_ACER_WIRELESS is not set +# CONFIG_ACER_WMI is not set +# CONFIG_AMD_HSMP is not set +# CONFIG_APPLE_GMUX is not set +# CONFIG_ASUS_LAPTOP is not set +# CONFIG_ASUS_WIRELESS is not set +# CONFIG_ASUS_WMI is not set +# CONFIG_EEEPC_LAPTOP is not set +# CONFIG_DCDBAS is not set +# CONFIG_DELL_SMBIOS is not set +# CONFIG_DELL_RBTN is not set +# CONFIG_DELL_RBU is not set +# CONFIG_DELL_SMO8800 is not set +# CONFIG_DELL_WMI_AIO is not set +# CONFIG_DELL_WMI_LED is not set +# CONFIG_AMILO_RFKILL is not set +# CONFIG_FUJITSU_LAPTOP is not set +# CONFIG_FUJITSU_TABLET is not set +# CONFIG_GPD_POCKET_FAN is not set +# CONFIG_HP_ACCEL is not set +# CONFIG_HP_WIRELESS is not set +# CONFIG_HP_WMI is not set +# CONFIG_IBM_RTL is not set +# CONFIG_IDEAPAD_LAPTOP is not set +# CONFIG_SENSORS_HDAPS is not set +# CONFIG_THINKPAD_ACPI is not set +# CONFIG_INTEL_ATOMISP2_PM is not set +# CONFIG_INTEL_HID_EVENT is not set +# CONFIG_INTEL_INT0002_VGPIO is not set +# CONFIG_INTEL_MENLOW is not set +# CONFIG_INTEL_OAKTRAIL is not set +# CONFIG_INTEL_VBTN is not set +# CONFIG_SURFACE3_WMI is not set +# CONFIG_SURFACE_3_POWER_OPREGION is not set +# CONFIG_SURFACE_PRO3_BUTTON is not set +# CONFIG_MSI_LAPTOP is not set +# CONFIG_MSI_WMI is not set +# CONFIG_PCENGINES_APU2 is not set +# CONFIG_SAMSUNG_LAPTOP is not set +# CONFIG_SAMSUNG_Q10 is not set +# CONFIG_ACPI_TOSHIBA is not set +# CONFIG_TOSHIBA_BT_RFKILL is not set +# CONFIG_TOSHIBA_HAPS is not set +# CONFIG_TOSHIBA_WMI is not set +# CONFIG_ACPI_CMPC is not set +# CONFIG_COMPAL_LAPTOP is not set +# CONFIG_LG_LAPTOP is not set +# CONFIG_PANASONIC_LAPTOP is not set +# CONFIG_SONY_LAPTOP is not set +# CONFIG_SYSTEM76_ACPI is not set +# CONFIG_TOPSTAR_LAPTOP is not set +# CONFIG_I2C_MULTI_INSTANTIATE is not set +# CONFIG_MLX_PLATFORM is not set +# CONFIG_INTEL_IPS is not set +# CONFIG_INTEL_RST is not set +# CONFIG_INTEL_SMARTCONNECT is not set + +# +# Intel Speed Select Technology interface support +# +# CONFIG_INTEL_SPEED_SELECT_INTERFACE is not set +# end of Intel Speed Select Technology interface support + +# CONFIG_INTEL_TURBO_MAX_3 is not set +# CONFIG_INTEL_UNCORE_FREQ_CONTROL is not set +# CONFIG_INTEL_VSEC is not set +# CONFIG_INTEL_PMC_CORE is not set +# CONFIG_INTEL_PUNIT_IPC is not set +# CONFIG_INTEL_SCU_PCI is not set +# CONFIG_INTEL_SCU_PLATFORM is not set +CONFIG_PMC_ATOM=y +# CONFIG_CHROME_PLATFORMS is not set +# CONFIG_MELLANOX_PLATFORM is not set +# CONFIG_LOONGARCH_PLATFORM_DEVICES is not set +CONFIG_HAVE_CLK=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y +# CONFIG_COMMON_CLK_MAX9485 is not set +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_COMMON_CLK_CS2000_CP is not set +# CONFIG_COMMON_CLK_PWM is not set +# CONFIG_COMMON_CLK_VC5 is not set +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +# CONFIG_CLK_LGM_CGU is not set +# CONFIG_HWSPINLOCK is not set + +# +# Clock Source drivers +# +CONFIG_CLKEVT_I8253=y +CONFIG_I8253_LOCK=y +CONFIG_CLKBLD_I8253=y +# CONFIG_MICROCHIP_PIT64B is not set +# end of Clock Source drivers + +CONFIG_MAILBOX=y +# CONFIG_PLATFORM_MHU is not set +CONFIG_PCC=y +# CONFIG_ALTERA_MBOX is not set +# CONFIG_MAILBOX_TEST is not set +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +# end of Generic IOMMU Pagetable Support + +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_OF_IOMMU=y +# CONFIG_AMD_IOMMU is not set +# CONFIG_INTEL_IOMMU is not set +# CONFIG_IRQ_REMAP is not set + +# +# Remoteproc drivers +# +# CONFIG_REMOTEPROC is not set +# end of Remoteproc drivers + +# +# Rpmsg drivers +# +# CONFIG_RPMSG_QCOM_GLINK_RPM is not set +# CONFIG_RPMSG_VIRTIO is not set +# end of Rpmsg drivers + +# CONFIG_SOUNDWIRE is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +# end of Amlogic SoC drivers + +# +# Aspeed SoC drivers +# +# end of Aspeed SoC drivers + +# +# Broadcom SoC drivers +# +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# end of NXP/Freescale QorIQ SoC drivers + +# +# i.MX SoC drivers +# +# end of i.MX SoC drivers + +# +# Qualcomm SoC drivers +# +# end of Qualcomm SoC drivers + +# CONFIG_SOC_TI is not set + +# +# Xilinx SoC drivers +# +# CONFIG_XILINX_VCU is not set +# end of Xilinx SoC drivers +# end of SOC (System On Chip) specific Drivers + +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y +# CONFIG_DEVFREQ_GOV_PASSIVE is not set + +# +# DEVFREQ Drivers +# +# CONFIG_PM_DEVFREQ_EVENT is not set +# CONFIG_EXTCON is not set +# CONFIG_MEMORY is not set +CONFIG_IIO=m +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +# CONFIG_IIO_BUFFER_DMA is not set +# CONFIG_IIO_BUFFER_DMAENGINE is not set +# CONFIG_IIO_BUFFER_HW_CONSUMER is not set +CONFIG_IIO_KFIFO_BUF=m +CONFIG_IIO_TRIGGERED_BUFFER=m +# CONFIG_IIO_CONFIGFS is not set +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +# CONFIG_IIO_SW_DEVICE is not set +# CONFIG_IIO_SW_TRIGGER is not set +# CONFIG_IIO_TRIGGERED_EVENT is not set + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADXL345_I2C is not set +# CONFIG_ADXL345_SPI is not set +# CONFIG_ADXL372_SPI is not set +# CONFIG_ADXL372_I2C is not set +# CONFIG_BMA180 is not set +# CONFIG_BMA220 is not set +# CONFIG_BMA400 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_DA280 is not set +# CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set +# CONFIG_DMARD09 is not set +# CONFIG_DMARD10 is not set +CONFIG_HID_SENSOR_ACCEL_3D=m +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MC3230 is not set +# CONFIG_MMA7455_I2C is not set +# CONFIG_MMA7455_SPI is not set +# CONFIG_MMA7660 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_SCA3000 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7091R5 is not set +# CONFIG_AD7124 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7292 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7606_IFACE_PARALLEL is not set +# CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7766 is not set +# CONFIG_AD7768_1 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD7949 is not set +# CONFIG_AD799X is not set +# CONFIG_ADI_AXI_ADC is not set +# CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_HI8435 is not set +# CONFIG_HX711 is not set +# CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2471 is not set +# CONFIG_LTC2485 is not set +# CONFIG_LTC2496 is not set +# CONFIG_LTC2497 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX11100 is not set +# CONFIG_MAX1118 is not set +# CONFIG_MAX1241 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MAX9611 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_MCP3911 is not set +# CONFIG_NAU7802 is not set +# CONFIG_SD_ADC_MODULATOR is not set +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADC084S021 is not set +# CONFIG_TI_ADC12138 is not set +# CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_TI_ADC161S626 is not set +# CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8344 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS124S08 is not set +# CONFIG_TI_TLC4541 is not set +# CONFIG_VF610_ADC is not set +# CONFIG_VIPERBOARD_ADC is not set +# CONFIG_XILINX_XADC is not set +# end of Analog to digital converters + +# +# Analog to digital and digital to analog converters +# + +# +# Analog Front Ends +# +# CONFIG_IIO_RESCALE is not set +# end of Analog Front Ends + +# +# Amplifiers +# +# CONFIG_AD8366 is not set +# CONFIG_HMC425 is not set +# end of Amplifiers + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set +# CONFIG_BME680 is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_SCD30_CORE is not set +# CONFIG_SENSIRION_SGP30 is not set +# CONFIG_SPS30 is not set +# CONFIG_VZ89X is not set +# end of Chemical Sensors + +# +# Hid Sensor IIO Common +# +CONFIG_HID_SENSOR_IIO_COMMON=m +CONFIG_HID_SENSOR_IIO_TRIGGER=m +# end of Hid Sensor IIO Common + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set +# end of SSP Sensor Common + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5592R is not set +# CONFIG_AD5593R is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_AD5686_SPI is not set +# CONFIG_AD5696_I2C is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5758 is not set +# CONFIG_AD5761 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5770R is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set +# CONFIG_DS4424 is not set +# CONFIG_LTC1660 is not set +# CONFIG_LTC2632 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set +# CONFIG_TI_DAC082S085 is not set +# CONFIG_TI_DAC5571 is not set +# CONFIG_TI_DAC7311 is not set +# CONFIG_TI_DAC7612 is not set +# CONFIG_VF610_DAC is not set +# end of Digital to analog converters + +# +# IIO dummy driver +# +# end of IIO dummy driver + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set +# end of Clock Generator/Distribution + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set +# CONFIG_ADF4371 is not set +# end of Phase-Locked Loop (PLL) frequency synthesizers +# end of Frequency Synthesizers DDS/PLL + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS290 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_FXAS21002C is not set +CONFIG_HID_SENSOR_GYRO_3D=m +# CONFIG_MPU3050_I2C is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set +# end of Digital gyroscope sensors + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set +# end of Heart Rate Monitors +# end of Health Sensors + +# +# Humidity sensors +# +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HDC2010 is not set +CONFIG_HID_SENSOR_HUMIDITY=m +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set +# end of Humidity sensors + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16460 is not set +# CONFIG_ADIS16475 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +# CONFIG_FXOS8700_I2C is not set +# CONFIG_FXOS8700_SPI is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_ICM42600_I2C is not set +# CONFIG_INV_ICM42600_SPI is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set +# end of Inertial measurement units + +# +# Light sensors +# +# CONFIG_ACPI_ALS is not set +# CONFIG_ADJD_S311 is not set +# CONFIG_ADUX1020 is not set +# CONFIG_AL3010 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_AS73211 is not set +# CONFIG_BH1750 is not set +# CONFIG_BH1780 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set +# CONFIG_CM36651 is not set +# CONFIG_GP2AP002 is not set +# CONFIG_GP2AP020A00F is not set +# CONFIG_SENSORS_ISL29018 is not set +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_ISL29125 is not set +CONFIG_HID_SENSOR_ALS=m +CONFIG_HID_SENSOR_PROX=m +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_LV0104CS is not set +# CONFIG_MAX44000 is not set +# CONFIG_MAX44009 is not set +# CONFIG_NOA1305 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_SI1133 is not set +# CONFIG_SI1145 is not set +# CONFIG_STK3310 is not set +# CONFIG_ST_UVIS25 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +# CONFIG_SENSORS_TSL2563 is not set +# CONFIG_TSL2583 is not set +# CONFIG_TSL2772 is not set +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set +# CONFIG_VCNL4035 is not set +# CONFIG_VEML6030 is not set +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set +# CONFIG_ZOPT2201 is not set +# end of Light sensors + +# +# Magnetometer sensors +# +# CONFIG_AK8974 is not set +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN_I2C is not set +# CONFIG_BMC150_MAGN_SPI is not set +# CONFIG_MAG3110 is not set +CONFIG_HID_SENSOR_MAGNETOMETER_3D=m +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set +# CONFIG_SENSORS_RM3100_I2C is not set +# CONFIG_SENSORS_RM3100_SPI is not set +# end of Magnetometer sensors + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set +# end of Multiplexers + +# +# Inclinometer sensors +# +CONFIG_HID_SENSOR_INCLINOMETER_3D=m +CONFIG_HID_SENSOR_DEVICE_ROTATION=m +# end of Inclinometer sensors + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +# CONFIG_IIO_SYSFS_TRIGGER is not set +# end of Triggers - standalone + +# +# Linear and angular position sensors +# +# end of Linear and angular position sensors + +# +# Digital potentiometers +# +# CONFIG_AD5272 is not set +# CONFIG_DS1803 is not set +# CONFIG_MAX5432 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4018 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_MCP41010 is not set +# CONFIG_TPL0102 is not set +# end of Digital potentiometers + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set +# end of Digital potentiostats + +# +# Pressure sensors +# +# CONFIG_ABP060MG is not set +# CONFIG_BMP280 is not set +# CONFIG_DLHL60D is not set +# CONFIG_DPS310 is not set +CONFIG_HID_SENSOR_PRESS=m +# CONFIG_HP03 is not set +# CONFIG_ICP10100 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +# CONFIG_MPL3115 is not set +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set +# end of Pressure sensors + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set +# end of Lightning sensors + +# +# Proximity and distance sensors +# +# CONFIG_ISL29501 is not set +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_MB1232 is not set +# CONFIG_PING is not set +# CONFIG_RFD77402 is not set +# CONFIG_SRF04 is not set +# CONFIG_SX9310 is not set +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set +# CONFIG_VL53L0X_I2C is not set +# end of Proximity and distance sensors + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# end of Resolver to digital converters + +# +# Temperature sensors +# +# CONFIG_LTC2983 is not set +# CONFIG_MAXIM_THERMOCOUPLE is not set +CONFIG_HID_SENSOR_TEMP=m +# CONFIG_MLX90614 is not set +# CONFIG_MLX90632 is not set +# CONFIG_TMP006 is not set +# CONFIG_TMP007 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_MAX31856 is not set +# end of Temperature sensors + +CONFIG_NTB=m +# CONFIG_NTB_MSI is not set +# CONFIG_NTB_AMD is not set +# CONFIG_NTB_IDT is not set +# CONFIG_NTB_INTEL is not set +# CONFIG_NTB_SWITCHTEC is not set +CONFIG_NTB_PINGPONG=m +CONFIG_NTB_TOOL=m +CONFIG_NTB_PERF=m +CONFIG_NTB_TRANSPORT=m +# CONFIG_VME_BUS is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_DEBUG is not set +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_LPSS_PCI is not set +# CONFIG_PWM_LPSS_PLATFORM is not set +# CONFIG_PWM_PCA9685 is not set + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +# CONFIG_AL_FIC is not set +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_INTEL_GW is not set +# CONFIG_RESET_TI_SYSCON is not set + +# +# PHY Subsystem +# +# CONFIG_GENERIC_PHY is not set +# CONFIG_USB_LGM_PHY is not set +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_CADENCE_TORRENT is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set +# CONFIG_PHY_FSL_IMX8MQ_USB is not set +# CONFIG_PHY_MIXEL_MIPI_DPHY is not set +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_CPCAP_USB is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set +# CONFIG_PHY_SAMSUNG_USB2 is not set +# CONFIG_PHY_INTEL_LGM_COMBO is not set +# CONFIG_PHY_INTEL_LGM_EMMC is not set +# end of PHY Subsystem + +CONFIG_POWERCAP=y +# CONFIG_INTEL_RAPL is not set +# CONFIG_IDLE_INJECT is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +# end of Performance monitor support + +CONFIG_RAS=y +CONFIG_USB4=m +# CONFIG_USB4_DEBUGFS_WRITE is not set + +# +# Android +# +# CONFIG_ANDROID is not set +# end of Android + +# +# Vendor Hooks +# +# CONFIG_VENDOR_HOOKS is not set +# end of Vendor Hooks + +# CONFIG_LIBNVDIMM is not set +CONFIG_DAX=y +CONFIG_DEV_DAX=m +CONFIG_DEV_DAX_KMEM=m +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# end of HW tracing support + +# CONFIG_FPGA is not set +# CONFIG_FSI is not set +# CONFIG_TEE is not set +CONFIG_PM_OPP=y +# CONFIG_UNISYS_VISORBUS is not set +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set +# CONFIG_INTERCONNECT is not set +# CONFIG_COUNTER is not set +# CONFIG_MOST is not set +# CONFIG_ROH is not set +# CONFIG_UB is not set + +# +# CPU Inspect +# +# CONFIG_CPU_INSPECT is not set +# end of CPU Inspect +# end of Device Drivers + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_DEBUG is not set +# CONFIG_EXT4_ERROR_REPORT is not set +# CONFIG_EXT4_MITIGATION_FALSE_SHARING is not set +# CONFIG_EXT4_DIOREAD_NOLOCK_PARAM is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_XFS_FS=y +CONFIG_XFS_SUPPORT_V4=y +CONFIG_XFS_QUOTA=y +CONFIG_XFS_POSIX_ACL=y +# CONFIG_XFS_RT is not set +# CONFIG_XFS_ONLINE_SCRUB is not set +# CONFIG_XFS_WARN is not set +# CONFIG_XFS_DEBUG is not set +CONFIG_GFS2_FS=m +CONFIG_GFS2_FS_LOCKING_DLM=y +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=y +CONFIG_BTRFS_FS_POSIX_ACL=y +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_FS_REF_VERIFY is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_ZONEFS_FS is not set +CONFIG_FS_DAX=y +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +CONFIG_EXPORTFS_BLOCK_OPS=y +CONFIG_FILE_LOCKING=y +# CONFIG_MANDATORY_FILE_LOCKING is not set +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +# CONFIG_PRINT_QUOTA_WARNING is not set +# CONFIG_QUOTA_DEBUG is not set +CONFIG_QUOTA_TREE=y +CONFIG_QFMT_V1=m +CONFIG_QFMT_V2=y +CONFIG_QUOTACTL=y +CONFIG_AUTOFS4_FS=y +CONFIG_AUTOFS_FS=y +CONFIG_FUSE_FS=m +CONFIG_CUSE=m +CONFIG_VIRTIO_FS=m +CONFIG_OVERLAY_FS=y +CONFIG_OVERLAY_FS_REDIRECT_DIR=y +# CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW is not set +CONFIG_OVERLAY_FS_INDEX=y +CONFIG_OVERLAY_FS_XINO_AUTO=y +CONFIG_OVERLAY_FS_METACOPY=y + +# +# Caches +# +CONFIG_FSCACHE=m +CONFIG_FSCACHE_STATS=y +# CONFIG_FSCACHE_HISTOGRAM is not set +# CONFIG_FSCACHE_DEBUG is not set +# CONFIG_FSCACHE_OBJECT_LIST is not set +CONFIG_CACHEFILES=m +# CONFIG_CACHEFILES_DEBUG is not set +# CONFIG_CACHEFILES_HISTOGRAM is not set +# CONFIG_CACHEFILES_ONDEMAND is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/EXFAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=936 +CONFIG_FAT_DEFAULT_IOCHARSET="gb2312" +# CONFIG_FAT_DEFAULT_UTF8 is not set +CONFIG_EXFAT_FS=m +CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" +CONFIG_NTFS_FS=m +# CONFIG_NTFS_DEBUG is not set +# CONFIG_NTFS_RW is not set +# CONFIG_NTFS3_FS is not set +# end of DOS/FAT/EXFAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_VMCORE=y +CONFIG_PROC_VMCORE_DEVICE_DUMP=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_PROC_CHILDREN=y +CONFIG_PROC_PID_ARCH_STATUS=y +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_DIRTY_PAGES=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_TMPFS_INODE64 is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +# CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP_DEFAULT_ON is not set +# CONFIG_DYNAMIC_HUGETLB is not set +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y +CONFIG_EFIVAR_FS=y +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +CONFIG_HFS_FS=m +CONFIG_HFSPLUS_FS=m +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_UBIFS_FS is not set +CONFIG_CRAMFS=m +CONFIG_CRAMFS_BLOCKDEV=y +# CONFIG_CRAMFS_MTD is not set +CONFIG_SQUASHFS=m +# CONFIG_SQUASHFS_FILE_CACHE is not set +CONFIG_SQUASHFS_FILE_DIRECT=y +# CONFIG_SQUASHFS_DECOMP_SINGLE is not set +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_ZLIB=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +# CONFIG_SQUASHFS_ZSTD is not set +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_EROFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +# CONFIG_NFS_V2 is not set +CONFIG_NFS_V3=m +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=m +# CONFIG_NFS_SWAP is not set +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=m +CONFIG_PNFS_BLOCK=m +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +# CONFIG_ROOT_NFS is not set +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +CONFIG_NFS_DEBUG=y +# CONFIG_NFS_DISABLE_UDP_SUPPORT is not set +# CONFIG_NFS_V4_2_READ_PLUS is not set +CONFIG_NFSD=y +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +CONFIG_NFSD_PNFS=y +CONFIG_NFSD_BLOCKLAYOUT=y +CONFIG_NFSD_SCSILAYOUT=y +CONFIG_NFSD_FLEXFILELAYOUT=y +CONFIG_NFSD_V4_2_INTER_SSC=y +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +CONFIG_RPCSEC_GSS_KRB5=m +# CONFIG_SUNRPC_DISABLE_INSECURE_ENCTYPES is not set +CONFIG_SUNRPC_DEBUG=y +CONFIG_SUNRPC_XPRT_RDMA=m +CONFIG_CEPH_FS=m +# CONFIG_CEPH_FSCACHE is not set +CONFIG_CEPH_FS_POSIX_ACL=y +CONFIG_CIFS=m +# CONFIG_CIFS_STATS2 is not set +CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y +CONFIG_CIFS_WEAK_PW_HASH=y +CONFIG_CIFS_UPCALL=y +CONFIG_CIFS_XATTR=y +CONFIG_CIFS_POSIX=y +# CONFIG_CIFS_DEBUG is not set +CONFIG_CIFS_DFS_UPCALL=y +# CONFIG_CIFS_SMB_DIRECT is not set +# CONFIG_CIFS_FSCACHE is not set +# CONFIG_SMB_SERVER is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_9P_FS=y +# CONFIG_9P_FS_POSIX_ACL is not set +# CONFIG_9P_FS_SECURITY is not set +# CONFIG_EULER_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_MAC_ROMAN=m +CONFIG_NLS_MAC_CELTIC=m +CONFIG_NLS_MAC_CENTEURO=m +CONFIG_NLS_MAC_CROATIAN=m +CONFIG_NLS_MAC_CYRILLIC=m +CONFIG_NLS_MAC_GAELIC=m +CONFIG_NLS_MAC_GREEK=m +CONFIG_NLS_MAC_ICELAND=m +CONFIG_NLS_MAC_INUIT=m +CONFIG_NLS_MAC_ROMANIAN=m +CONFIG_NLS_MAC_TURKISH=m +CONFIG_NLS_UTF8=y +CONFIG_DLM=m +CONFIG_DLM_DEBUG=y +# CONFIG_UNICODE is not set +CONFIG_IO_WQ=y +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_REQUEST_CACHE is not set +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +CONFIG_HARDENED_USERCOPY=y +CONFIG_HARDENED_USERCOPY_FALLBACK=y +# CONFIG_HARDENED_USERCOPY_PAGESPAN is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +# CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,integrity,bpf" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_INIT_STACK_NONE=y +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +# end of Memory initialization +# end of Kernel hardening options + +# CONFIG_SECURITY_BOOT_INIT is not set +# end of Security options + +CONFIG_XOR_BLOCKS=y +CONFIG_ASYNC_CORE=m +CONFIG_ASYNC_MEMCPY=m +CONFIG_ASYNC_XOR=m +CONFIG_ASYNC_PQ=m +CONFIG_ASYNC_RAID6_RECOV=m +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SKCIPHER=y +CONFIG_CRYPTO_SKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_USER=m +# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set +# CONFIG_CRYPTO_MANAGER_EXTRA_TESTS is not set +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_PCRYPT=m +CONFIG_CRYPTO_CRYPTD=m +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_ENGINE=m + +# +# Public-key cryptography +# +CONFIG_CRYPTO_RSA=y +CONFIG_CRYPTO_DH=y +CONFIG_CRYPTO_ECC=m +CONFIG_CRYPTO_ECDH=m +# CONFIG_CRYPTO_ECDSA is not set +# CONFIG_CRYPTO_ECRDSA is not set +CONFIG_CRYPTO_SM2=y +# CONFIG_CRYPTO_CURVE25519 is not set +CONFIG_CRYPTO_CURVE25519_X86=m + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_CHACHA20POLY1305=m +# CONFIG_CRYPTO_AEGIS128 is not set +# CONFIG_CRYPTO_AEGIS128_AESNI_SSE2 is not set +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_ECHAINIV=m + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CFB=y +CONFIG_CRYPTO_CTR=y +CONFIG_CRYPTO_CTS=m +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_LRW=m +# CONFIG_CRYPTO_OFB is not set +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_NHPOLY1305_SSE2 is not set +# CONFIG_CRYPTO_NHPOLY1305_AVX2 is not set +# CONFIG_CRYPTO_ADIANTUM is not set +CONFIG_CRYPTO_ESSIV=m + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_XCBC=m +CONFIG_CRYPTO_VMAC=m + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRC32C_INTEL=m +CONFIG_CRYPTO_CRC32=m +# CONFIG_CRYPTO_CRC32_PCLMUL is not set +CONFIG_CRYPTO_XXHASH=y +CONFIG_CRYPTO_BLAKE2B=y +# CONFIG_CRYPTO_BLAKE2S is not set +CONFIG_CRYPTO_BLAKE2S_X86=m +CONFIG_CRYPTO_CRCT10DIF=y +# CONFIG_CRYPTO_CRCT10DIF_PCLMUL is not set +CONFIG_CRYPTO_GHASH=y +CONFIG_CRYPTO_POLY1305=m +CONFIG_CRYPTO_POLY1305_X86_64=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_RMD128=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_RMD256=m +CONFIG_CRYPTO_RMD320=m +CONFIG_CRYPTO_SHA1=y +# CONFIG_CRYPTO_SHA1_SSSE3 is not set +# CONFIG_CRYPTO_SHA256_SSSE3 is not set +# CONFIG_CRYPTO_SHA512_SSSE3 is not set +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_SHA3=m +CONFIG_CRYPTO_SM3=y +# CONFIG_CRYPTO_SM3_GENERIC is not set +# CONFIG_CRYPTO_SM3_AVX_X86_64 is not set +# CONFIG_CRYPTO_STREEBOG is not set +CONFIG_CRYPTO_TGR192=m +CONFIG_CRYPTO_WP512=m +# CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_AES_NI_INTEL is not set +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_BLOWFISH_COMMON=m +# CONFIG_CRYPTO_BLOWFISH_X86_64 is not set +CONFIG_CRYPTO_CAMELLIA=m +# CONFIG_CRYPTO_CAMELLIA_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64 is not set +CONFIG_CRYPTO_CAST_COMMON=m +CONFIG_CRYPTO_CAST5=m +# CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set +CONFIG_CRYPTO_CAST6=m +# CONFIG_CRYPTO_CAST6_AVX_X86_64 is not set +CONFIG_CRYPTO_DES=m +# CONFIG_CRYPTO_DES3_EDE_X86_64 is not set +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_SALSA20=m +CONFIG_CRYPTO_CHACHA20=m +CONFIG_CRYPTO_CHACHA20_X86_64=m +CONFIG_CRYPTO_SEED=m +CONFIG_CRYPTO_SERPENT=m +# CONFIG_CRYPTO_SERPENT_SSE2_X86_64 is not set +# CONFIG_CRYPTO_SERPENT_AVX_X86_64 is not set +# CONFIG_CRYPTO_SERPENT_AVX2_X86_64 is not set +# CONFIG_CRYPTO_SM4_GENERIC is not set +# CONFIG_CRYPTO_SM4_AESNI_AVX_X86_64 is not set +# CONFIG_CRYPTO_SM4_AESNI_AVX2_X86_64 is not set +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m +# CONFIG_CRYPTO_TWOFISH_X86_64 is not set +# CONFIG_CRYPTO_TWOFISH_X86_64_3WAY is not set +# CONFIG_CRYPTO_TWOFISH_AVX_X86_64 is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_842=m +CONFIG_CRYPTO_LZ4=m +CONFIG_CRYPTO_LZ4HC=m +CONFIG_CRYPTO_ZSTD=y + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=m +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_HASH=y +CONFIG_CRYPTO_DRBG_CTR=y +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_USER_API=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y +CONFIG_CRYPTO_USER_API_RNG=y +# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set +CONFIG_CRYPTO_USER_API_AEAD=y +CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y +# CONFIG_CRYPTO_STATS is not set +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_PADLOCK is not set +# CONFIG_CRYPTO_DEV_ZHAOXIN is not set +# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set +# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set +# CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CRYPTO_DEV_QAT_DH895xCC is not set +# CONFIG_CRYPTO_DEV_QAT_C3XXX is not set +# CONFIG_CRYPTO_DEV_QAT_C62X is not set +# CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set +# CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set +# CONFIG_CRYPTO_DEV_QAT_C62XVF is not set +CONFIG_CRYPTO_DEV_NITROX=m +CONFIG_CRYPTO_DEV_NITROX_CNN55XX=m +CONFIG_CRYPTO_DEV_CHELSIO=m +CONFIG_CRYPTO_DEV_VIRTIO=m +# CONFIG_CRYPTO_DEV_SAFEXCEL is not set +# CONFIG_CRYPTO_DEV_CCREE is not set +# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set +# CONFIG_CRYPTO_DEV_TSSE is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +CONFIG_SIGNED_PE_FILE_VERIFICATION=y +# CONFIG_PGP_LIBRARY is not set +# CONFIG_PGP_KEY_PARSER is not set +# CONFIG_PGP_PRELOAD is not set + +# +# Certificates for signature checking +# +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +CONFIG_SECONDARY_TRUSTED_KEYRING=y +CONFIG_SYSTEM_BLACKLIST_KEYRING=y +CONFIG_SYSTEM_BLACKLIST_HASH_LIST="" +CONFIG_SYSTEM_REVOCATION_LIST=y +CONFIG_SYSTEM_REVOCATION_KEYS="" +# CONFIG_PGP_PRELOAD_PUBLIC_KEYS is not set +# end of Certificates for signature checking + +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_RAID6_PQ=y +CONFIG_RAID6_PQ_BENCHMARK=y +CONFIG_PACKING=y +CONFIG_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_CORDIC=m +# CONFIG_PRIME_NUMBERS is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_LIB_ARC4=m +CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m +CONFIG_CRYPTO_LIB_CHACHA=m +CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519=m +CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519=m +CONFIG_CRYPTO_LIB_DES=m +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 +CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=m +CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m +CONFIG_CRYPTO_LIB_POLY1305=m +CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m +CONFIG_CRYPTO_LIB_SHA256=y +# end of Crypto library routines + +CONFIG_LIB_MEMNEQ=y +CONFIG_CRC_CCITT=m +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +CONFIG_CRC64=m +# CONFIG_CRC4 is not set +CONFIG_CRC7=m +CONFIG_LIBCRC32C=y +# CONFIG_CRC8 is not set +CONFIG_XXHASH=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_842_COMPRESS=m +CONFIG_842_DECOMPRESS=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_COMPRESS=m +CONFIG_LZ4HC_COMPRESS=m +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +CONFIG_XZ_DEC_POWERPC=y +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_DECOMPRESS_ZSTD=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=m +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_BTREE=y +CONFIG_INTERVAL_TREE=y +CONFIG_XARRAY_MULTI=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_SWIOTLB=y +CONFIG_DMA_CMA=y +# CONFIG_DMA_PERNUMA_CMA is not set + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=16 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_DMA_MAP_BENCHMARK is not set +CONFIG_SGL_ALLOC=y +CONFIG_CHECK_SIGNATURE=y +# CONFIG_FORCE_NR_CPUS is not set +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_CLZ_TAB=y +CONFIG_IRQ_POLL=y +CONFIG_MPILIB=y +CONFIG_DIMLIB=y +CONFIG_OID_REGISTRY=y +CONFIG_UCS2_STRING=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_SG_POOL=y +CONFIG_ARCH_HAS_PMEM_API=y +CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y +CONFIG_ARCH_HAS_COPY_MC=y +CONFIG_ARCH_STACKWALK=y +CONFIG_SBITMAP=y +CONFIG_PARMAN=m +CONFIG_OBJAGG=m +# CONFIG_STRING_SELFTEST is not set +# end of Library routines + +CONFIG_PLDMFW=y + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +CONFIG_PRINTK_CALLER=y +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +CONFIG_BOOT_PRINTK_DELAY=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_DYNAMIC_DEBUG_CORE=y +CONFIG_SYMBOLIC_ERRNAME=y +CONFIG_DEBUG_BUGVERBOSE=y +# end of printk and dmesg options + +# +# Compile-time checks and compiler options +# +# CONFIG_DEBUG_INFO is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=4096 +CONFIG_STRIP_ASM_SYMS=y +# CONFIG_READABLE_ASM is not set +# CONFIG_HEADERS_INSTALL is not set +# CONFIG_OPTIMIZE_INLINING is not set +CONFIG_DEBUG_SECTION_MISMATCH=y +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set +CONFIG_STACK_VALIDATION=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_PGO_KERNEL is not set +# end of Compile-time checks and compiler options + +# +# Generic Kernel Debugging Instruments +# +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_FS_ALLOW_ALL=y +# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set +# CONFIG_DEBUG_FS_ALLOW_NONE is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +CONFIG_HAVE_ARCH_KCSAN=y +CONFIG_HAVE_KCSAN_COMPILER=y +# CONFIG_KCSAN is not set +# end of Generic Kernel Debugging Instruments + +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_MISC=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_PAGE_OWNER is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_PAGE_REF is not set +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set +CONFIG_GENERIC_PTDUMP=y +# CONFIG_PTDUMP_DEBUGFS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_SCHED_STACK_END_CHECK is not set +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KASAN_VMALLOC=y +CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y +# CONFIG_KASAN is not set +CONFIG_HAVE_ARCH_KFENCE=y +# CONFIG_KFENCE is not set +# end of Memory Debugging + +CONFIG_DEBUG_SHIRQ=y + +# +# Debug Oops, Lockups and Hangs +# +CONFIG_PANIC_ON_OOPS=y +CONFIG_PANIC_ON_OOPS_VALUE=1 +CONFIG_PANIC_TIMEOUT=0 +# CONFIG_SOFTLOCKUP_DETECTOR is not set +CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y +# CONFIG_HARDLOCKUP_DETECTOR is not set +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_TEST_LOCKUP is not set +# end of Debug Oops, Lockups and Hangs + +# +# Scheduler Debugging +# +# CONFIG_SCHED_DEBUG is not set +CONFIG_SCHED_INFO=y +CONFIG_SCHEDSTATS=y +# end of Scheduler Debugging + +# CONFIG_DEBUG_TIMEKEEPING is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_SCF_TORTURE_TEST is not set +# CONFIG_CSD_LOCK_WAIT_DEBUG is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +CONFIG_STACKTRACE=y +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set + +# +# Debug kernel data structures +# +CONFIG_DEBUG_LIST=y +# CONFIG_DEBUG_PLIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# end of Debug kernel data structures + +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_RCU_SCALE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_REF_SCALE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +# CONFIG_RCU_CPU_STALL_CPUTIME is not set +# CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set +# end of RCU Debugging + +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_LATENCYTOP is not set +CONFIG_USER_STACKTRACE_SUPPORT=y +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_FENTRY=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACE_CLOCK=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_TRACING=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +# CONFIG_BOOTTIME_TRACING is not set +# CONFIG_FUNCTION_TRACER is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_HWLAT_TRACER is not set +# CONFIG_OSNOISE_TRACER is not set +# CONFIG_TIMERLAT_TRACER is not set +# CONFIG_MMIOTRACE is not set +# CONFIG_ENABLE_DEFAULT_TRACERS is not set +# CONFIG_FTRACE_SYSCALLS is not set +# CONFIG_TRACER_SNAPSHOT is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +CONFIG_UPROBE_EVENTS=y +CONFIG_BPF_EVENTS=y +CONFIG_DYNAMIC_EVENTS=y +CONFIG_PROBE_EVENTS=y +# CONFIG_SYNTH_EVENTS is not set +# CONFIG_HIST_TRIGGERS is not set +# CONFIG_TRACE_EVENT_INJECT is not set +# CONFIG_TRACEPOINT_BENCHMARK is not set +# CONFIG_RING_BUFFER_BENCHMARK is not set +# CONFIG_TRACE_EVAL_MAP_FILE is not set +# CONFIG_RING_BUFFER_STARTUP_TEST is not set +# CONFIG_PREEMPTIRQ_DELAY_TEST is not set +# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set +# CONFIG_SAMPLES is not set +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +# CONFIG_STRICT_DEVMEM is not set + +# +# x86 Debugging +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y +CONFIG_X86_VERBOSE_BOOTUP=y +CONFIG_EARLY_PRINTK=y +# CONFIG_EARLY_PRINTK_DBGP is not set +# CONFIG_EARLY_PRINTK_USB_XDBC is not set +# CONFIG_EFI_PGT_DUMP is not set +# CONFIG_DEBUG_TLBFLUSH is not set +CONFIG_HAVE_MMIOTRACE_SUPPORT=y +# CONFIG_X86_DECODER_SELFTEST is not set +CONFIG_IO_DELAY_0X80=y +# CONFIG_IO_DELAY_0XED is not set +# CONFIG_IO_DELAY_UDELAY is not set +# CONFIG_IO_DELAY_NONE is not set +# CONFIG_DEBUG_BOOT_PARAMS is not set +# CONFIG_CPA_DEBUG is not set +# CONFIG_DEBUG_ENTRY is not set +# CONFIG_DEBUG_NMI_SELFTEST is not set +CONFIG_X86_DEBUG_FPU=y +# CONFIG_PUNIT_ATOM_DEBUG is not set +CONFIG_UNWINDER_ORC=y +# CONFIG_UNWINDER_FRAME_POINTER is not set +# CONFIG_UNWINDER_GUESS is not set +# end of x86 Debugging + +# +# Kernel Testing and Coverage +# +# CONFIG_KUNIT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set +# CONFIG_RUNTIME_TESTING_MENU is not set +# CONFIG_MEMTEST is not set +# end of Kernel Testing and Coverage +# end of Kernel hacking diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/kernel6-config/defconfig b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/kernel6-config/defconfig new file mode 100644 index 0000000000000000000000000000000000000000..bf4139d550f36ea07187e54718816feee3050762 --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/kernel6-config/defconfig @@ -0,0 +1,6865 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/loongarch 6.6.0 Kernel Configuration +# +CONFIG_CC_VERSION_TEXT="gcc (GCC) 14.2.0 20240801 (AOSC OS, Core)" +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=140200 +CONFIG_CLANG_VERSION=0 +CONFIG_AS_IS_GNU=y +CONFIG_AS_VERSION=24301 +CONFIG_LD_IS_BFD=y +CONFIG_LD_VERSION=24301 +CONFIG_LLD_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y +CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y +CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y +CONFIG_TOOLS_SUPPORT_RELR=y +CONFIG_CC_HAS_ASM_INLINE=y +CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y +CONFIG_PAHOLE_VERSION=0 +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_TABLE_SORT=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +# CONFIG_WERROR is not set +CONFIG_LOCALVERSION=".lsgd" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_BUILD_SALT="" +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_LZ4=y +CONFIG_HAVE_KERNEL_ZSTD=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_XZ is not set +# CONFIG_KERNEL_LZO is not set +# CONFIG_KERNEL_LZ4 is not set +# CONFIG_KERNEL_ZSTD is not set +CONFIG_DEFAULT_INIT="" +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_USELIB is not set +CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_DEPRECATED_IRQ_CPU_ONOFFLINE=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +# CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE is not set +# end of Timers subsystem + +CONFIG_BPF=y +CONFIG_HAVE_EBPF_JIT=y + +# +# BPF subsystem +# +CONFIG_BPF_SYSCALL=y +CONFIG_BPF_JIT=y +# CONFIG_BPF_JIT_ALWAYS_ON is not set +CONFIG_BPF_UNPRIV_DEFAULT_OFF=y +# CONFIG_BPF_PRELOAD is not set +# end of BPF subsystem + +CONFIG_PREEMPT_BUILD=y +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_PREEMPT_COUNT=y +CONFIG_PREEMPTION=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +# CONFIG_IRQ_TIME_ACCOUNTING is not set +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +CONFIG_PREEMPT_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU_GENERIC=y +CONFIG_TASKS_RCU=y +CONFIG_TASKS_TRACE_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +# end of RCU Subsystem + +# CONFIG_IKCONFIG is not set +# CONFIG_IKHEADERS is not set +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +# CONFIG_PRINTK_INDEX is not set +CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_CC_HAS_INT128=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_GCC10_NO_ARRAY_BOUNDS=y +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +# CONFIG_CGROUP_FAVOR_DYNMODS is not set +CONFIG_MEMCG=y +# CONFIG_MEMCG_V1_RECLAIM is not set +# CONFIG_MEMCG_MEMFS_INFO is not set +CONFIG_MEMCG_KMEM=y +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_WRITEBACK=y +# CONFIG_CGROUP_V1_WRITEBACK is not set +CONFIG_CGROUP_SCHED=y +# CONFIG_QOS_SCHED is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_SCHED_MM_CID=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_RDMA=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_HUGETLB=y +# CONFIG_CPUSETS is not set +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +CONFIG_CGROUP_BPF=y +CONFIG_CGROUP_MISC=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_SOCK_CGROUP_DATA=y +# CONFIG_CGROUP_V1_KILL is not set +# CONFIG_CGROUP_V1_STAT is not set +# CONFIG_CGROUP_FILES is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_TIME_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_STEAL is not set +CONFIG_CHECKPOINT_RESTORE=y +CONFIG_SCHED_AUTOGROUP=y +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_INITRAMFS_FORCE is not set +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_RD_ZSTD=y +CONFIG_INITRAMFS_FILE_METADATA="" +# CONFIG_BOOT_CONFIG is not set +CONFIG_INITRAMFS_PRESERVE_MTIME=y +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_LD_ORPHAN_WARN=y +CONFIG_LD_ORPHAN_WARN_LEVEL="warn" +CONFIG_SYSCTL=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYSCTL_ARCH_UNALIGN_NO_WARN=y +CONFIG_SYSCTL_ARCH_UNALIGN_ALLOW=y +CONFIG_EXPERT=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_IO_URING=y +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_SELFTEST is not set +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +CONFIG_CACHESTAT_SYSCALL=y +# CONFIG_DEBUG_RSEQ is not set +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +# end of Kernel Performance Events And Counters + +CONFIG_SYSTEM_DATA_VERIFICATION=y +# CONFIG_PROFILING is not set +CONFIG_KABI_RESERVE=y +CONFIG_KABI_SIZE_ALIGN_CHECKS=y + +# +# Kexec and crash features +# +CONFIG_CRASH_CORE=y +CONFIG_KEXEC_CORE=y +CONFIG_KEXEC=y +# CONFIG_CRASH_DUMP is not set +# end of Kexec and crash features +# end of General setup + +CONFIG_LOONGARCH=y +CONFIG_64BIT=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_L1_CACHE_SHIFT=6 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_MACH_LOONGSON64=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PAGE_SIZE_4KB=y +CONFIG_PGTABLE_3LEVEL=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_SCHED_OMIT_FRAME_POINTER=y +CONFIG_AS_HAS_EXPLICIT_RELOCS=y +CONFIG_AS_HAS_FCSR_CLASS=y +CONFIG_AS_HAS_LSX_EXTENSION=y +CONFIG_AS_HAS_LASX_EXTENSION=y +CONFIG_AS_HAS_LBT_EXTENSION=y +CONFIG_AS_HAS_LVZ_EXTENSION=y +CONFIG_LOONGSON_2K300=y + +# +# Kernel type and options +# +# CONFIG_HZ_100 is not set +# CONFIG_HZ_250 is not set +# CONFIG_HZ_300 is not set +CONFIG_HZ_1000=y +CONFIG_HZ=1000 +CONFIG_SCHED_HRTICK=y +CONFIG_4KB_3LEVEL=y +# CONFIG_4KB_4LEVEL is not set +# CONFIG_16KB_2LEVEL is not set +# CONFIG_16KB_3LEVEL is not set +# CONFIG_64KB_2LEVEL is not set +# CONFIG_64KB_3LEVEL is not set +CONFIG_CMDLINE="fbcon=logo-pos:center fbcon=logo-count:1" +# CONFIG_CMDLINE_BOOTLOADER is not set +CONFIG_CMDLINE_EXTEND=y +# CONFIG_CMDLINE_FORCE is not set +CONFIG_BUILTIN_DTB=y +CONFIG_BUILTIN_DTB_NAME="ls2k300_alientek" +CONFIG_DMI=y +CONFIG_EFI=y +CONFIG_EFI_STUB=y +# CONFIG_SCHED_SMT is not set +CONFIG_SMP=y +# CONFIG_HOTPLUG_CPU is not set +CONFIG_NR_CPUS=64 +# CONFIG_NUMA is not set +CONFIG_ARCH_FORCE_MAX_ORDER=11 +# CONFIG_ARCH_IOREMAP is not set +# CONFIG_ARCH_WRITECOMBINE is not set +CONFIG_ARCH_STRICT_ALIGN=y +CONFIG_CPU_HAS_FPU=y +# CONFIG_CPU_HAS_LSX is not set +# CONFIG_CPU_HAS_LBT is not set +CONFIG_CPU_HAS_PREFETCH=y +# CONFIG_PARAVIRT is not set +CONFIG_ARCH_SUPPORTS_KEXEC=y +CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +# CONFIG_RELOCATABLE is not set +# end of Kernel type and options + +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_MMU=y +CONFIG_ARCH_MMAP_RND_BITS_MIN=12 +CONFIG_ARCH_MMAP_RND_BITS_MAX=18 +CONFIG_ARCH_SUPPORTS_UPROBES=y + +# +# Power management options +# +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set +# end of CPU Frequency scaling + +# CONFIG_SUSPEND is not set +# CONFIG_HIBERNATION is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_CLK=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_CPU_PM=y +CONFIG_ARCH_SUPPORTS_ACPI=y +CONFIG_ACPI=y +CONFIG_ACPI_GENERIC_GSI=y +CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y +# CONFIG_ACPI_DEBUGGER is not set +# CONFIG_ACPI_SPCR_TABLE is not set +# CONFIG_ACPI_EC_DEBUGFS is not set +# CONFIG_ACPI_AC is not set +# CONFIG_ACPI_BATTERY is not set +# CONFIG_ACPI_BUTTON is not set +# CONFIG_ACPI_TINY_POWER_BUTTON is not set +# CONFIG_ACPI_VIDEO is not set +# CONFIG_ACPI_FAN is not set +# CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_MCFG=y +# CONFIG_ACPI_PROCESSOR is not set +# CONFIG_ACPI_IPMI is not set +CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y +# CONFIG_ACPI_TABLE_UPGRADE is not set +# CONFIG_ACPI_DEBUG is not set +# CONFIG_ACPI_PCI_SLOT is not set +# CONFIG_ACPI_CONTAINER is not set +# CONFIG_ACPI_HED is not set +# CONFIG_ACPI_CUSTOM_METHOD is not set +# CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set +# CONFIG_ACPI_CONFIGFS is not set +# CONFIG_ACPI_PFRUT is not set +CONFIG_ACPI_PPTT=y +# CONFIG_ACPI_FFH is not set +# CONFIG_PMIC_OPREGION is not set +# end of Power management options + +CONFIG_HAVE_KVM=y +# CONFIG_VIRTUALIZATION is not set +CONFIG_CPU_MITIGATIONS=y + +# +# General architecture-dependent options +# +CONFIG_GENERIC_ENTRY=y +# CONFIG_KPROBES is not set +CONFIG_JUMP_LABEL=y +# CONFIG_STATIC_KEYS_SELFTEST is not set +CONFIG_HAVE_64BIT_ALIGNED_ACCESS=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_KPROBES_ON_FTRACE=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_CPU_FINALIZE_INIT=y +CONFIG_ARCH_WANTS_NO_INSTR=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_MMU_GATHER_MERGE_VMAS=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_ARCH_HAS_NMI_SAFE_THIS_CPU_OPS=y +CONFIG_HAVE_ARCH_SECCOMP=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +# CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_ARCH_SUPPORTS_LTO_CLANG=y +CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y +CONFIG_LTO_NONE=y +CONFIG_HAVE_CONTEXT_TRACKING_USER=y +CONFIG_HAVE_TIF_NOHZ=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_ARCH_WANT_PMD_MKWRITE=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_HAVE_EXIT_THREAD=y +CONFIG_ARCH_MMAP_RND_BITS=12 +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +# CONFIG_COMPAT_32BIT_TIME is not set +CONFIG_ARCH_HAS_PHYS_TO_DMA=y +CONFIG_ARCH_USE_MEMREMAP_PROT=y +# CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +# end of GCOV-based kernel profiling + +CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_GCC_PLUGINS=y +# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set +CONFIG_FUNCTION_ALIGNMENT=0 +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_DEBUG is not set +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODULE_UNLOAD_TAINT_TRACKING is not set +CONFIG_MODVERSIONS=y +CONFIG_ASM_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +CONFIG_MODULE_COMPRESS_NONE=y +# CONFIG_MODULE_COMPRESS_GZIP is not set +# CONFIG_MODULE_COMPRESS_XZ is not set +# CONFIG_MODULE_COMPRESS_ZSTD is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +CONFIG_MODPROBE_PATH="/sbin/modprobe" +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLOCK_LEGACY_AUTOLOAD=y +CONFIG_BLK_RQ_ALLOC_TIME=y +CONFIG_BLK_CGROUP_RWSTAT=y +CONFIG_BLK_ICQ=y +# CONFIG_BLK_DEV_BSGLIB is not set +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_INTEGRITY_T10=y +CONFIG_BLK_DEV_WRITE_MOUNTED=y +CONFIG_BLK_DEV_ZONED=y +CONFIG_BLK_DEV_THROTTLING=y +# CONFIG_BLK_DEV_THROTTLING_LOW is not set +# CONFIG_BLK_DEV_SUPPORT_LEGACY_GLOBAL_LIMIT is not set +CONFIG_BLK_WBT=y +CONFIG_BLK_WBT_MQ=y +CONFIG_BLK_CGROUP_IOLATENCY=y +CONFIG_BLK_CGROUP_IOCOST=y +# CONFIG_BLK_CGROUP_LEGACY_IOCOST is not set +CONFIG_BLK_CGROUP_IOPRIO=y +CONFIG_BLK_DEBUG_FS=y +CONFIG_BLK_DEBUG_FS_ZONED=y +# CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set +# CONFIG_BLK_DEV_DETECT_WRITING_PART0 is not set +# CONFIG_BLK_DEV_WRITE_MOUNTED_DUMP is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIX_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +CONFIG_UNIXWARE_DISKLABEL=y +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +CONFIG_CMDLINE_PARTITION=y +# end of Partition Types + +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +CONFIG_IOSCHED_BFQ=y +CONFIG_BFQ_GROUP_IOSCHED=y +# CONFIG_BFQ_CGROUP_DEBUG is not set +# end of IO Schedulers + +CONFIG_ASN1=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y +# CONFIG_PID_MAX_PER_NAMESPACE is not set +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ELFCORE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_ZPOOL=y +CONFIG_SWAP=y +CONFIG_ZSWAP=y +# CONFIG_ZSWAP_DEFAULT_ON is not set +# CONFIG_ZSWAP_EXCLUSIVE_LOADS_DEFAULT_ON is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set +CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD=y +CONFIG_ZSWAP_COMPRESSOR_DEFAULT="zstd" +# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD is not set +# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set +CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC=y +CONFIG_ZSWAP_ZPOOL_DEFAULT="zsmalloc" +CONFIG_ZBUD=y +# CONFIG_Z3FOLD is not set +CONFIG_ZSMALLOC=y +# CONFIG_ZSMALLOC_STAT is not set +CONFIG_ZSMALLOC_CHAIN_SIZE=8 + +# +# SLAB allocator options +# +# CONFIG_SLAB_DEPRECATED is not set +CONFIG_SLUB=y +# CONFIG_SLUB_TINY is not set +CONFIG_SLAB_MERGE_DEFAULT=y +CONFIG_SLAB_FREELIST_RANDOM=y +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SLUB_STATS is not set +CONFIG_SLUB_CPU_PARTIAL=y +# CONFIG_RANDOM_KMALLOC_CACHES is not set +# end of SLAB allocator options + +# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP=y +CONFIG_HAVE_FAST_GUP=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +# CONFIG_MEMORY_HOTPLUG is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_COMPACTION=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_PAGE_REPORTING=y +CONFIG_MIGRATION=y +CONFIG_ARCH_ENABLE_THP_MIGRATION=y +CONFIG_CONTIG_ALLOC=y +CONFIG_PCP_BATCH_SCALE_MAX=5 +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y +# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +# CONFIG_READ_ONLY_THP_FOR_FS is not set +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y +CONFIG_USE_PERCPU_NUMA_NODE_ID=y +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_SYSFS=y +CONFIG_CMA_AREAS=20 +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ZONE_DMA32=y +CONFIG_VM_EVENT_COUNTERS=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_TEST is not set +# CONFIG_DMAPOOL_TEST is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +CONFIG_MEMFD_CREATE=y +# CONFIG_ANON_VMA_NAME is not set +CONFIG_USERFAULTFD=y +# CONFIG_LRU_GEN is not set +CONFIG_LOCK_MM_AND_FIND_VMA=y +# CONFIG_PAGE_CACHE_LIMIT is not set +# CONFIG_BPF_READAHEAD is not set + +# +# Data Access Monitoring +# +# CONFIG_DAMON is not set +# end of Data Access Monitoring +# end of Memory Management options + +CONFIG_NET=y +CONFIG_NET_INGRESS=y +CONFIG_NET_EGRESS=y +CONFIG_NET_XGRESS=y +CONFIG_SKB_EXTENSIONS=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +CONFIG_AF_UNIX_OOB=y +# CONFIG_UNIX_DIAG is not set +CONFIG_TLS=m +CONFIG_TLS_DEVICE=y +# CONFIG_TLS_TOE is not set +CONFIG_XFRM=y +CONFIG_XFRM_OFFLOAD=y +CONFIG_XFRM_ALGO=y +CONFIG_XFRM_USER=y +# CONFIG_XFRM_INTERFACE is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_AH=y +CONFIG_XFRM_ESP=y +CONFIG_XFRM_IPCOMP=y +CONFIG_NET_KEY=y +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_XFRM_ESPINTCP=y +CONFIG_XDP_SOCKETS=y +# CONFIG_XDP_SOCKETS_DIAG is not set +CONFIG_NET_HANDSHAKE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +# CONFIG_IP_FIB_TRIE_STATS is not set +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_ROUTE_CLASSID=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE_DEMUX=m +CONFIG_NET_IP_TUNNEL=y +CONFIG_NET_IPGRE=m +CONFIG_NET_IPGRE_BROADCAST=y +CONFIG_IP_MROUTE_COMMON=y +CONFIG_IP_MROUTE=y +CONFIG_IP_MROUTE_MULTIPLE_TABLES=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +CONFIG_SYN_COOKIES=y +# CONFIG_NET_IPVTI is not set +CONFIG_NET_UDP_TUNNEL=y +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +CONFIG_INET_ESP_OFFLOAD=m +CONFIG_INET_ESPINTCP=y +CONFIG_INET_IPCOMP=m +CONFIG_INET_TABLE_PERTURB_ORDER=16 +CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INET_TUNNEL=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +CONFIG_INET_UDP_DIAG=y +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_BIC=m +CONFIG_TCP_CONG_CUBIC=y +CONFIG_TCP_CONG_WESTWOOD=m +CONFIG_TCP_CONG_HTCP=m +# CONFIG_TCP_CONG_HSTCP is not set +# CONFIG_TCP_CONG_HYBLA is not set +# CONFIG_TCP_CONG_VEGAS is not set +# CONFIG_TCP_CONG_NV is not set +# CONFIG_TCP_CONG_SCALABLE is not set +# CONFIG_TCP_CONG_LP is not set +# CONFIG_TCP_CONG_VENO is not set +# CONFIG_TCP_CONG_YEAH is not set +# CONFIG_TCP_CONG_ILLINOIS is not set +# CONFIG_TCP_CONG_DCTCP is not set +# CONFIG_TCP_CONG_CDG is not set +CONFIG_TCP_CONG_BBR=m +CONFIG_DEFAULT_CUBIC=y +# CONFIG_DEFAULT_RENO is not set +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_TCP_COMP is not set +CONFIG_IPV6=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y +CONFIG_INET6_ESP_OFFLOAD=y +CONFIG_INET6_ESPINTCP=y +CONFIG_INET6_IPCOMP=y +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +CONFIG_INET6_XFRM_TUNNEL=y +CONFIG_INET6_TUNNEL=y +# CONFIG_IPV6_VTI is not set +CONFIG_IPV6_SIT=y +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_GRE is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +# CONFIG_IPV6_SUBTREES is not set +CONFIG_IPV6_MROUTE=y +# CONFIG_IPV6_MROUTE_MULTIPLE_TABLES is not set +# CONFIG_IPV6_PIMSM_V2 is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_IPV6_RPL_LWTUNNEL is not set +# CONFIG_IPV6_IOAM6_LWTUNNEL is not set +# CONFIG_NETLABEL is not set +CONFIG_MPTCP=y +CONFIG_INET_MPTCP_DIAG=y +CONFIG_MPTCP_IPV6=y +CONFIG_NETWORK_SECMARK=y +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_NETWORK_PHY_TIMESTAMPING=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=m + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_EGRESS=y +CONFIG_NETFILTER_SKIP_EGRESS=y +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_FAMILY_BRIDGE=y +CONFIG_NETFILTER_FAMILY_ARP=y +CONFIG_NETFILTER_BPF_LINK=y +# CONFIG_NETFILTER_NETLINK_HOOK is not set +CONFIG_NETFILTER_NETLINK_ACCT=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NETFILTER_NETLINK_OSF=m +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_SYSLOG=m +CONFIG_NETFILTER_CONNCOUNT=m +CONFIG_NF_CONNTRACK_MARK=y +# CONFIG_NF_CONNTRACK_SECMARK is not set +# CONFIG_NF_CONNTRACK_ZONES is not set +# CONFIG_NF_CONNTRACK_PROCFS is not set +# CONFIG_NF_CONNTRACK_EVENTS is not set +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +CONFIG_NF_CONNTRACK_LABELS=y +CONFIG_NF_CONNTRACK_OVS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_GRE=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=m +CONFIG_NF_CONNTRACK_FTP=m +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +CONFIG_NF_CONNTRACK_BROADCAST=m +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_SNMP=m +CONFIG_NF_CONNTRACK_PPTP=m +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_NETLINK=m +# CONFIG_NETFILTER_NETLINK_GLUE_CT is not set +CONFIG_NF_NAT=m +CONFIG_NF_NAT_AMANDA=m +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_TFTP=m +CONFIG_NF_NAT_REDIRECT=y +CONFIG_NF_NAT_MASQUERADE=y +CONFIG_NF_NAT_OVS=y +CONFIG_NETFILTER_SYNPROXY=m +CONFIG_NF_TABLES=m +CONFIG_NF_TABLES_INET=y +# CONFIG_NF_TABLES_NETDEV is not set +# CONFIG_NFT_NUMGEN is not set +CONFIG_NFT_CT=m +CONFIG_NFT_CONNLIMIT=m +CONFIG_NFT_LOG=m +CONFIG_NFT_LIMIT=m +CONFIG_NFT_MASQ=m +CONFIG_NFT_REDIR=m +CONFIG_NFT_NAT=m +CONFIG_NFT_TUNNEL=m +CONFIG_NFT_QUEUE=m +CONFIG_NFT_QUOTA=m +CONFIG_NFT_REJECT=m +CONFIG_NFT_REJECT_INET=m +CONFIG_NFT_COMPAT=m +CONFIG_NFT_HASH=m +CONFIG_NFT_FIB=m +CONFIG_NFT_FIB_INET=m +# CONFIG_NFT_XFRM is not set +CONFIG_NFT_SOCKET=m +CONFIG_NFT_OSF=m +CONFIG_NFT_TPROXY=m +# CONFIG_NFT_SYNPROXY is not set +# CONFIG_NF_FLOW_TABLE is not set +CONFIG_NETFILTER_XTABLES=y + +# +# Xtables combined modules +# +CONFIG_NETFILTER_XT_MARK=m +CONFIG_NETFILTER_XT_CONNMARK=m +CONFIG_NETFILTER_XT_SET=m + +# +# Xtables targets +# +CONFIG_NETFILTER_XT_TARGET_AUDIT=m +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_CT=m +CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_HL=m +CONFIG_NETFILTER_XT_TARGET_HMARK=m +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m +CONFIG_NETFILTER_XT_TARGET_LED=m +CONFIG_NETFILTER_XT_TARGET_LOG=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_NAT=m +CONFIG_NETFILTER_XT_TARGET_NETMAP=m +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set +CONFIG_NETFILTER_XT_TARGET_RATEEST=m +CONFIG_NETFILTER_XT_TARGET_REDIRECT=m +CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +CONFIG_NETFILTER_XT_TARGET_TRACE=m +CONFIG_NETFILTER_XT_TARGET_SECMARK=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +CONFIG_NETFILTER_XT_MATCH_BPF=m +CONFIG_NETFILTER_XT_MATCH_CGROUP=m +CONFIG_NETFILTER_XT_MATCH_CLUSTER=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_CPU=m +CONFIG_NETFILTER_XT_MATCH_DCCP=m +CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ECN=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_HL=m +CONFIG_NETFILTER_XT_MATCH_IPCOMP=m +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +CONFIG_NETFILTER_XT_MATCH_IPVS=m +CONFIG_NETFILTER_XT_MATCH_L2TP=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_NFACCT=m +CONFIG_NETFILTER_XT_MATCH_OSF=m +CONFIG_NETFILTER_XT_MATCH_OWNER=m +CONFIG_NETFILTER_XT_MATCH_POLICY=m +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_RATEEST=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +CONFIG_NETFILTER_XT_MATCH_SCTP=m +CONFIG_NETFILTER_XT_MATCH_SOCKET=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_MATCH_U32=m +# end of Core Netfilter Configuration + +CONFIG_IP_SET=m +CONFIG_IP_SET_MAX=256 +# CONFIG_IP_SET_BITMAP_IP is not set +# CONFIG_IP_SET_BITMAP_IPMAC is not set +# CONFIG_IP_SET_BITMAP_PORT is not set +# CONFIG_IP_SET_HASH_IP is not set +# CONFIG_IP_SET_HASH_IPMARK is not set +# CONFIG_IP_SET_HASH_IPPORT is not set +# CONFIG_IP_SET_HASH_IPPORTIP is not set +# CONFIG_IP_SET_HASH_IPPORTNET is not set +# CONFIG_IP_SET_HASH_IPMAC is not set +# CONFIG_IP_SET_HASH_MAC is not set +# CONFIG_IP_SET_HASH_NETPORTNET is not set +# CONFIG_IP_SET_HASH_NET is not set +# CONFIG_IP_SET_HASH_NETNET is not set +# CONFIG_IP_SET_HASH_NETPORT is not set +# CONFIG_IP_SET_HASH_NETIFACE is not set +# CONFIG_IP_SET_LIST_SET is not set +CONFIG_IP_VS=m +CONFIG_IP_VS_IPV6=y +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_PROTO_AH_ESP=y +CONFIG_IP_VS_PROTO_ESP=y +CONFIG_IP_VS_PROTO_AH=y +CONFIG_IP_VS_PROTO_SCTP=y + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_WRR=m +# CONFIG_IP_VS_LC is not set +# CONFIG_IP_VS_WLC is not set +# CONFIG_IP_VS_FO is not set +# CONFIG_IP_VS_OVF is not set +# CONFIG_IP_VS_LBLC is not set +# CONFIG_IP_VS_LBLCR is not set +# CONFIG_IP_VS_DH is not set +# CONFIG_IP_VS_SH is not set +# CONFIG_IP_VS_MH is not set +# CONFIG_IP_VS_SED is not set +# CONFIG_IP_VS_NQ is not set +# CONFIG_IP_VS_TWOS is not set + +# +# IPVS SH scheduler +# +CONFIG_IP_VS_SH_TAB_BITS=8 + +# +# IPVS MH scheduler +# +CONFIG_IP_VS_MH_TAB_INDEX=12 + +# +# IPVS application helper +# +# CONFIG_IP_VS_FTP is not set +CONFIG_IP_VS_NFCT=y + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_SOCKET_IPV4=m +CONFIG_NF_TPROXY_IPV4=m +CONFIG_NF_TABLES_IPV4=y +CONFIG_NFT_REJECT_IPV4=m +CONFIG_NFT_DUP_IPV4=m +CONFIG_NFT_FIB_IPV4=m +CONFIG_NF_TABLES_ARP=y +CONFIG_NF_DUP_IPV4=m +# CONFIG_NF_LOG_ARP is not set +# CONFIG_NF_LOG_IPV4 is not set +CONFIG_NF_REJECT_IPV4=m +CONFIG_NF_NAT_SNMP_BASIC=m +CONFIG_NF_NAT_PPTP=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_RPFILTER=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_SYNPROXY=m +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_SECURITY=m +# CONFIG_IP_NF_ARPTABLES is not set +# end of IP: Netfilter Configuration + +# +# IPv6: Netfilter Configuration +# +CONFIG_NF_SOCKET_IPV6=m +CONFIG_NF_TPROXY_IPV6=m +CONFIG_NF_TABLES_IPV6=y +CONFIG_NFT_REJECT_IPV6=m +# CONFIG_NFT_DUP_IPV6 is not set +CONFIG_NFT_FIB_IPV6=m +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=m +CONFIG_NF_LOG_IPV6=m +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_OPTS=m +# CONFIG_IP6_NF_MATCH_HL is not set +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_RPFILTER=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_MATCH_SRH=m +# CONFIG_IP6_NF_TARGET_HL is not set +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_TARGET_SYNPROXY=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_RAW=m +CONFIG_IP6_NF_SECURITY=m +CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +CONFIG_IP6_NF_TARGET_NPT=m +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=m +CONFIG_NF_TABLES_BRIDGE=m +# CONFIG_NFT_BRIDGE_META is not set +# CONFIG_NFT_BRIDGE_REJECT is not set +CONFIG_NF_CONNTRACK_BRIDGE=m +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +# CONFIG_BRIDGE_EBT_802_3 is not set +# CONFIG_BRIDGE_EBT_AMONG is not set +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_IP6=m +# CONFIG_BRIDGE_EBT_LIMIT is not set +# CONFIG_BRIDGE_EBT_MARK is not set +# CONFIG_BRIDGE_EBT_PKTTYPE is not set +# CONFIG_BRIDGE_EBT_STP is not set +# CONFIG_BRIDGE_EBT_VLAN is not set +# CONFIG_BRIDGE_EBT_ARPREPLY is not set +# CONFIG_BRIDGE_EBT_DNAT is not set +# CONFIG_BRIDGE_EBT_MARK_T is not set +# CONFIG_BRIDGE_EBT_REDIRECT is not set +# CONFIG_BRIDGE_EBT_SNAT is not set +# CONFIG_BRIDGE_EBT_LOG is not set +# CONFIG_BRIDGE_EBT_NFLOG is not set +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +CONFIG_IP_SCTP=m +# CONFIG_SCTP_DBG_OBJCNT is not set +CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5=y +# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1 is not set +# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_NONE is not set +CONFIG_SCTP_COOKIE_HMAC_MD5=y +# CONFIG_SCTP_COOKIE_HMAC_SHA1 is not set +CONFIG_INET_SCTP_DIAG=m +CONFIG_RDS=y +# CONFIG_RDS_TCP is not set +# CONFIG_RDS_DEBUG is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +CONFIG_L2TP=m +# CONFIG_L2TP_DEBUGFS is not set +CONFIG_L2TP_V3=y +CONFIG_L2TP_IP=m +CONFIG_L2TP_ETH=m +CONFIG_STP=m +CONFIG_GARP=m +CONFIG_MRP=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +# CONFIG_BRIDGE_VLAN_FILTERING is not set +# CONFIG_BRIDGE_MRP is not set +# CONFIG_BRIDGE_CFM is not set +# CONFIG_NET_DSA is not set +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLAN_8021Q_MVRP=y +CONFIG_LLC=m +CONFIG_LLC2=m +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +CONFIG_NET_SCH_HTB=m +# CONFIG_NET_SCH_HFSC is not set +CONFIG_NET_SCH_PRIO=m +# CONFIG_NET_SCH_MULTIQ is not set +# CONFIG_NET_SCH_RED is not set +# CONFIG_NET_SCH_SFB is not set +CONFIG_NET_SCH_SFQ=m +# CONFIG_NET_SCH_TEQL is not set +CONFIG_NET_SCH_TBF=m +# CONFIG_NET_SCH_CBS is not set +# CONFIG_NET_SCH_ETF is not set +# CONFIG_NET_SCH_TAPRIO is not set +# CONFIG_NET_SCH_GRED is not set +CONFIG_NET_SCH_NETEM=m +# CONFIG_NET_SCH_DRR is not set +# CONFIG_NET_SCH_MQPRIO is not set +# CONFIG_NET_SCH_SKBPRIO is not set +# CONFIG_NET_SCH_CHOKE is not set +# CONFIG_NET_SCH_QFQ is not set +# CONFIG_NET_SCH_CODEL is not set +# CONFIG_NET_SCH_FQ_CODEL is not set +# CONFIG_NET_SCH_CAKE is not set +# CONFIG_NET_SCH_FQ is not set +# CONFIG_NET_SCH_HHF is not set +# CONFIG_NET_SCH_PIE is not set +CONFIG_NET_SCH_INGRESS=m +# CONFIG_NET_SCH_PLUG is not set +# CONFIG_NET_SCH_ETS is not set +# CONFIG_NET_SCH_DEFAULT is not set + +# +# Classification +# +CONFIG_NET_CLS=y +CONFIG_NET_CLS_BASIC=m +# CONFIG_NET_CLS_ROUTE4 is not set +CONFIG_NET_CLS_FW=m +CONFIG_NET_CLS_U32=m +# CONFIG_CLS_U32_PERF is not set +# CONFIG_CLS_U32_MARK is not set +# CONFIG_NET_CLS_FLOW is not set +CONFIG_NET_CLS_CGROUP=m +CONFIG_NET_CLS_BPF=m +# CONFIG_NET_CLS_FLOWER is not set +# CONFIG_NET_CLS_MATCHALL is not set +# CONFIG_NET_EMATCH is not set +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_POLICE=m +CONFIG_NET_ACT_GACT=m +# CONFIG_GACT_PROB is not set +CONFIG_NET_ACT_MIRRED=m +# CONFIG_NET_ACT_SAMPLE is not set +# CONFIG_NET_ACT_IPT is not set +CONFIG_NET_ACT_NAT=m +# CONFIG_NET_ACT_PEDIT is not set +# CONFIG_NET_ACT_SIMP is not set +# CONFIG_NET_ACT_SKBEDIT is not set +# CONFIG_NET_ACT_CSUM is not set +# CONFIG_NET_ACT_MPLS is not set +# CONFIG_NET_ACT_VLAN is not set +CONFIG_NET_ACT_BPF=m +# CONFIG_NET_ACT_CONNMARK is not set +# CONFIG_NET_ACT_CTINFO is not set +# CONFIG_NET_ACT_SKBMOD is not set +# CONFIG_NET_ACT_IFE is not set +# CONFIG_NET_ACT_TUNNEL_KEY is not set +# CONFIG_NET_ACT_GATE is not set +# CONFIG_NET_TC_SKB_EXT is not set +CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +CONFIG_OPENVSWITCH=m +CONFIG_OPENVSWITCH_GRE=m +CONFIG_OPENVSWITCH_VXLAN=m +CONFIG_VSOCKETS=m +CONFIG_VSOCKETS_DIAG=m +CONFIG_VSOCKETS_LOOPBACK=m +CONFIG_VIRTIO_VSOCKETS=m +CONFIG_VIRTIO_VSOCKETS_COMMON=m +CONFIG_NETLINK_DIAG=y +CONFIG_MPLS=y +CONFIG_NET_MPLS_GSO=m +# CONFIG_MPLS_ROUTING is not set +CONFIG_NET_NSH=m +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +CONFIG_NET_L3_MASTER_DEV=y +# CONFIG_QRTR is not set +# CONFIG_NET_NCSI is not set +CONFIG_PCPU_DEV_REFCNT=y +CONFIG_MAX_SKB_FRAGS=17 +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_XPS=y +CONFIG_CGROUP_NET_PRIO=y +CONFIG_CGROUP_NET_CLASSID=y +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +CONFIG_BPF_STREAM_PARSER=y +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# end of Network testing +# end of Networking options + +# CONFIG_HAMRADIO is not set +CONFIG_CAN=y +CONFIG_CAN_RAW=y +CONFIG_CAN_BCM=y +CONFIG_CAN_GW=y +# CONFIG_CAN_J1939 is not set +# CONFIG_CAN_ISOTP is not set +CONFIG_BT=y +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_LE=y +CONFIG_BT_LE_L2CAP_ECRED=y +# CONFIG_BT_LEDS is not set +# CONFIG_BT_MSFTEXT is not set +# CONFIG_BT_AOSPEXT is not set +CONFIG_BT_DEBUGFS=y +# CONFIG_BT_SELFTEST is not set + +# +# Bluetooth device drivers +# +# CONFIG_BT_HCIBTUSB is not set +# CONFIG_BT_HCIBTSDIO is not set +# CONFIG_BT_HCIUART is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBCM4377 is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_BT_MRVL is not set +# CONFIG_BT_MTKSDIO is not set +# CONFIG_BT_VIRTIO is not set +# end of Bluetooth device drivers + +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_STREAM_PARSER=y +# CONFIG_MCTP is not set +CONFIG_FIB_RULES=y +CONFIG_WIRELESS=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_CFG80211=y +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +CONFIG_CFG80211_CRDA_SUPPORT=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=y +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +CONFIG_SOCK_VALIDATE_XMIT=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SOCK_MSG=y +CONFIG_PAGE_POOL=y +# CONFIG_PAGE_POOL_STATS is not set +CONFIG_FAILOVER=m +CONFIG_ETHTOOL_NETLINK=y +CONFIG_NETACC_BPF=y +CONFIG_NETACC_TERRACE=y + +# +# Device Drivers +# +CONFIG_HAVE_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +# CONFIG_PCIEPORTBUS is not set +# CONFIG_PCIEASPM is not set +# CONFIG_PCIE_PTM is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_ARCH_FALLBACKS=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_STUB is not set +CONFIG_PCI_ECAM=y +# CONFIG_PCI_IOV is not set +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +CONFIG_PCI_LABEL=y +# CONFIG_PCI_DYNAMIC_OF_NODES is not set +# CONFIG_PCIE_BUS_TUNE_OFF is not set +CONFIG_PCIE_BUS_DEFAULT=y +# CONFIG_PCIE_BUS_SAFE is not set +# CONFIG_PCIE_BUS_PERFORMANCE is not set +# CONFIG_PCIE_BUS_PEER2PEER is not set +# CONFIG_VGA_ARB is not set +# CONFIG_HOTPLUG_PCI is not set + +# +# PCI controller drivers +# +# CONFIG_PCI_FTPCI100 is not set +CONFIG_PCI_HOST_COMMON=y +CONFIG_PCI_HOST_GENERIC=y +CONFIG_PCI_LOONGSON=y +# CONFIG_PCIE_MICROCHIP_HOST is not set +# CONFIG_PCIE_XILINX is not set + +# +# Cadence-based PCIe controllers +# +# CONFIG_PCIE_CADENCE_PLAT_HOST is not set +# CONFIG_PCI_J721E_HOST is not set +# end of Cadence-based PCIe controllers + +# +# DesignWare-based PCIe controllers +# +# CONFIG_PCI_MESON is not set +# CONFIG_PCIE_DW_PLAT_HOST is not set +# end of DesignWare-based PCIe controllers + +# +# Mobiveil-based PCIe controllers +# +# end of Mobiveil-based PCIe controllers +# end of PCI controller drivers + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +CONFIG_PCI_SW_SWITCHTEC=m +# end of PCI switch controller drivers + +# CONFIG_CXL_BUS is not set +# CONFIG_PCCARD is not set +# CONFIG_RAPIDIO is not set + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_DEVTMPFS_SAFE is not set +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_FW_LOADER_DEBUG=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER is not set +CONFIG_FW_LOADER_COMPRESS=y +CONFIG_FW_LOADER_COMPRESS_XZ=y +CONFIG_FW_LOADER_COMPRESS_ZSTD=y +# CONFIG_FW_UPLOAD is not set +# end of Firmware loader + +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_DEVICES=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_SOC_BUS=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +# CONFIG_FW_DEVLINK_SYNC_STATE_TIMEOUT is not set +# end of Generic Driver Options + +# +# Bus devices +# +# CONFIG_MOXTET is not set +# CONFIG_MHI_BUS is not set +# CONFIG_MHI_BUS_EP is not set +# end of Bus devices + +# +# Cache Drivers +# +# end of Cache Drivers + +# CONFIG_CONNECTOR is not set + +# +# Firmware Drivers +# + +# +# ARM System Control and Management Interface Protocol +# +# end of ARM System Control and Management Interface Protocol + +# CONFIG_FIRMWARE_MEMMAP is not set +CONFIG_DMIID=y +# CONFIG_DMI_SYSFS is not set +CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y +# CONFIG_ISCSI_IBFT is not set +CONFIG_SYSFB=y +# CONFIG_SYSFB_SIMPLEFB is not set +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +CONFIG_EFI_ESRT=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_GENERIC_STUB=y +CONFIG_EFI_ZBOOT=y +CONFIG_EFI_BOOTLOADER_CONTROL=m +CONFIG_EFI_CAPSULE_LOADER=m +CONFIG_EFI_TEST=m +# CONFIG_RESET_ATTACK_MITIGATION is not set +# CONFIG_EFI_DISABLE_PCI_DMA is not set +CONFIG_EFI_EARLYCON=y +# CONFIG_EFI_CUSTOM_SSDT_OVERLAYS is not set +# CONFIG_EFI_DISABLE_RUNTIME is not set +# CONFIG_EFI_COCO_SECRET is not set +# end of EFI (Extensible Firmware Interface) Support + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +# CONFIG_GNSS is not set +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set + +# +# Partition parsers +# +# CONFIG_MTD_AR7_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y + +# +# Note that in some cases UBI block is preferred. See MTD_UBI_BLOCK. +# +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_MCHP48L640 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +CONFIG_MTD_BLOCK2MTD=y + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +# +# NAND +# +# CONFIG_MTD_ONENAND is not set +# CONFIG_MTD_RAW_NAND is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# ECC engine support +# +# CONFIG_MTD_NAND_ECC_SW_HAMMING is not set +# CONFIG_MTD_NAND_ECC_SW_BCH is not set +# CONFIG_MTD_NAND_ECC_MXIC is not set +# end of ECC engine support +# end of NAND + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +# CONFIG_MTD_SPI_NOR_SWP_DISABLE is not set +CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y +# CONFIG_MTD_SPI_NOR_SWP_KEEP is not set +# CONFIG_MTD_UBI is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +# CONFIG_PARPORT is not set +CONFIG_PNP=y +CONFIG_PNP_DEBUG_MESSAGES=y + +# +# Protocols +# +CONFIG_PNPACPI=y +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_ZRAM is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=32768 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_VIRTIO_BLK=y +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_UBLK is not set + +# +# NVME Support +# +# CONFIG_BLK_DEV_NVME is not set +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TCP is not set +# CONFIG_NVME_TARGET is not set +# end of NVME Support + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +# CONFIG_SRAM is not set +# CONFIG_DW_XDATA_PCIE is not set +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_XILINX_SDFEC is not set +# CONFIG_HISI_HIKEY_USB is not set +# CONFIG_OPEN_DICE is not set +# CONFIG_VCPU_STALL_DETECTOR is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=m +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +CONFIG_EEPROM_93CX6=m +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +# end of EEPROM support + +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_BCM_VK is not set +# CONFIG_MISC_ALCOR_PCI is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set +# CONFIG_PVPANIC is not set +# CONFIG_GP_PCI1XXXX is not set +# end of Misc devices + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI_COMMON=y +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPI3MR is not set +# CONFIG_SCSI_SMARTPQI is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_BUSLOGIC is not set +# CONFIG_SCSI_MYRB is not set +# CONFIG_SCSI_MYRS is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FDOMAIN_PCI is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_VIRTIO is not set +# CONFIG_SCSI_DH is not set +# end of SCSI device support + +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +CONFIG_BONDING=m +CONFIG_DUMMY=y +CONFIG_WIREGUARD=m +# CONFIG_WIREGUARD_DEBUG is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_IFB is not set +# CONFIG_NET_TEAM is not set +CONFIG_MACVLAN=m +CONFIG_MACVTAP=m +# CONFIG_IPVLAN_L2E is not set +CONFIG_IPVLAN_L3S=y +CONFIG_IPVLAN=m +# CONFIG_IPVTAP is not set +CONFIG_VXLAN=y +# CONFIG_GENEVE is not set +# CONFIG_BAREUDP is not set +# CONFIG_GTP is not set +# CONFIG_AMT is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +CONFIG_TUN=m +CONFIG_TAP=m +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=m +CONFIG_VIRTIO_NET=m +# CONFIG_NLMON is not set +# CONFIG_NET_VRF is not set +# CONFIG_ARCNET is not set +CONFIG_ETHERNET=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_3SNIC is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set +# CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_ALTERA_TSE is not set +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ASIX is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CADENCE is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_NET_VENDOR_CORTINA is not set +# CONFIG_NET_VENDOR_DAVICOM is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_ENGLEDER is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_FUNGIBLE is not set +# CONFIG_NET_VENDOR_GOOGLE is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +# CONFIG_NET_VENDOR_INTEL is not set +CONFIG_NET_VENDOR_MUCSE=y +# CONFIG_MXGBE is not set +# CONFIG_MXGBEVF is not set +# CONFIG_MXGBEM is not set +# CONFIG_MGBE is not set +# CONFIG_MGBEVF is not set +# CONFIG_JME is not set +# CONFIG_NET_VENDOR_ADI is not set +# CONFIG_NET_VENDOR_LITEX is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MICROSEMI is not set +# CONFIG_NET_VENDOR_MICROSOFT is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NI is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETERION is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_ETHOC is not set +CONFIG_NET_VENDOR_PACKET_ENGINES=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_NET_VENDOR_PENSANDO is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_BROCADE is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_SOCIONEXT is not set +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=y +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_STMMAC_PLATFORM=y +# CONFIG_DWMAC_DWC_QOS_ETH is not set +CONFIG_DWMAC_GENERIC=y +# CONFIG_DWMAC_INTEL_PLAT is not set +# CONFIG_DWMAC_LOONGSON is not set +# CONFIG_STMMAC_PCI is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VERTEXCOM is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WANGXUN is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_XILINX is not set +CONFIG_NET_VENDOR_BZWX=y +# CONFIG_NCE is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_NET_SB1000 is not set +CONFIG_PHYLINK=y +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +# CONFIG_LED_TRIGGER_PHY is not set +CONFIG_PHYLIB_LEDS=y +CONFIG_FIXED_PHY=y +# CONFIG_SFP is not set + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_ADIN_PHY is not set +# CONFIG_ADIN1100_PHY is not set +# CONFIG_AQUANTIA_PHY is not set +CONFIG_AX88796B_PHY=y +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM54140_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM84881_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_MARVELL_10G_PHY is not set +# CONFIG_MARVELL_88Q2XXX_PHY is not set +# CONFIG_MARVELL_88X2222_PHY is not set +# CONFIG_MAXLINEAR_GPHY is not set +# CONFIG_MEDIATEK_GE_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_MICROCHIP_T1S_PHY is not set +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_MICROCHIP_T1_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +CONFIG_MOTORCOMM_PHY=y +# CONFIG_NATIONAL_PHY is not set +# CONFIG_NXP_CBTX_PHY is not set +# CONFIG_NXP_C45_TJA11XX_PHY is not set +# CONFIG_NXP_TJA11XX_PHY is not set +# CONFIG_NCN26000_PHY is not set +# CONFIG_QSEMI_PHY is not set +CONFIG_REALTEK_PHY=m +# CONFIG_RENESAS_PHY is not set +# CONFIG_ROCKCHIP_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_DP83869_PHY is not set +# CONFIG_DP83TD510_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PSE_CONTROLLER is not set +CONFIG_CAN_DEV=y +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_VXCAN is not set +CONFIG_CAN_NETLINK=y +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_CAN327 is not set +# CONFIG_CAN_FLEXCAN is not set +# CONFIG_CAN_GRCAN is not set +# CONFIG_CAN_KVASER_PCIEFD is not set +# CONFIG_CAN_SLCAN is not set +# CONFIG_CAN_C_CAN is not set +# CONFIG_CAN_CC770 is not set +# CONFIG_CAN_CTUCANFD_PCI is not set +# CONFIG_CAN_CTUCANFD_PLATFORM is not set +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_PEAK_PCIEFD is not set +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_SOFTING is not set + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set +# CONFIG_CAN_MCP251XFD is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +# CONFIG_CAN_8DEV_USB is not set +# CONFIG_CAN_EMS_USB is not set +# CONFIG_CAN_ESD_USB is not set +# CONFIG_CAN_ETAS_ES58X is not set +# CONFIG_CAN_F81604 is not set +# CONFIG_CAN_GS_USB is not set +# CONFIG_CAN_KVASER_USB is not set +# CONFIG_CAN_MCBA_USB is not set +# CONFIG_CAN_PEAK_USB is not set +# CONFIG_CAN_UCAN is not set +# end of CAN USB interfaces + +# CONFIG_CAN_DEBUG_DEVICES is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +CONFIG_FWNODE_MDIO=y +CONFIG_OF_MDIO=y +CONFIG_ACPI_MDIO=y +CONFIG_MDIO_DEVRES=y +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MVUSB is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_IPQ4019 is not set +# CONFIG_MDIO_IPQ8064 is not set +# CONFIG_MDIO_THUNDER is not set + +# +# MDIO Multiplexers +# +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set + +# +# PCS device drivers +# +CONFIG_PCS_XPCS=y +# end of PCS device drivers + +CONFIG_PPP=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y +CONFIG_PPP_MPPE=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPPOE=m +# CONFIG_PPPOE_HASH_BITS_1 is not set +# CONFIG_PPPOE_HASH_BITS_2 is not set +CONFIG_PPPOE_HASH_BITS_4=y +# CONFIG_PPPOE_HASH_BITS_8 is not set +CONFIG_PPPOE_HASH_BITS=4 +CONFIG_PPTP=m +CONFIG_PPPOL2TP=m +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +# CONFIG_SLIP is not set +CONFIG_SLHC=m +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +# CONFIG_USB_LAN78XX is not set +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_AX88179_178A=y +CONFIG_USB_NET_CDCETHER=y +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=y +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=y +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET_ENABLE=y +CONFIG_USB_NET_CDC_SUBSET=y +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=y +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +CONFIG_USB_NET_QMI_WWAN=y +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +# CONFIG_USB_NET_AQC111 is not set +CONFIG_USB_RTL8153_ECM=m +CONFIG_WLAN=y +CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_ADM8211 is not set +CONFIG_ATH_COMMON=m +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +CONFIG_ATH9K_HW=m +CONFIG_ATH9K_COMMON=m +CONFIG_ATH9K_BTCOEX_SUPPORT=y +CONFIG_ATH9K=m +CONFIG_ATH9K_PCI=y +# CONFIG_ATH9K_AHB is not set +# CONFIG_ATH9K_DEBUGFS is not set +# CONFIG_ATH9K_DYNACK is not set +# CONFIG_ATH9K_WOW is not set +# CONFIG_ATH9K_CHANNEL_CONTEXT is not set +CONFIG_ATH9K_PCOEM=y +# CONFIG_ATH9K_PCI_NO_EEPROM is not set +CONFIG_ATH9K_HTC=m +# CONFIG_ATH9K_HTC_DEBUGFS is not set +# CONFIG_ATH9K_HWRNG is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +# CONFIG_ATH10K is not set +# CONFIG_WCN36XX is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_BRCMSMAC is not set +# CONFIG_BRCMFMAC is not set +CONFIG_WLAN_VENDOR_CISCO=y +# CONFIG_AIRO is not set +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +CONFIG_IWLWIFI=m +CONFIG_IWLWIFI_LEDS=y +CONFIG_IWLDVM=m +CONFIG_IWLMVM=m +CONFIG_IWLWIFI_OPMODE_MODULAR=y + +# +# Debugging Options +# +# CONFIG_IWLWIFI_DEBUG is not set +# end of Debugging Options + +CONFIG_WLAN_VENDOR_INTERSIL=y +# CONFIG_HOSTAP is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +# CONFIG_MWIFIEX is not set +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +CONFIG_MT7601U=m +# CONFIG_MT76x0U is not set +# CONFIG_MT76x0E is not set +# CONFIG_MT76x2E is not set +# CONFIG_MT76x2U is not set +# CONFIG_MT7603E is not set +# CONFIG_MT7615E is not set +# CONFIG_MT7663U is not set +# CONFIG_MT7663S is not set +# CONFIG_MT7915E is not set +# CONFIG_MT7921E is not set +# CONFIG_MT7921S is not set +# CONFIG_MT7921U is not set +# CONFIG_MT7996E is not set +CONFIG_WLAN_VENDOR_MICROCHIP=y +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +CONFIG_WLAN_VENDOR_PURELIFI=y +# CONFIG_PLFXLC is not set +CONFIG_WLAN_VENDOR_RALINK=y +CONFIG_RT2X00=m +# CONFIG_RT2400PCI is not set +# CONFIG_RT2500PCI is not set +# CONFIG_RT61PCI is not set +# CONFIG_RT2800PCI is not set +# CONFIG_RT2500USB is not set +# CONFIG_RT73USB is not set +CONFIG_RT2800USB=m +# CONFIG_RT2800USB_RT33XX is not set +# CONFIG_RT2800USB_RT35XX is not set +# CONFIG_RT2800USB_RT3573 is not set +# CONFIG_RT2800USB_RT53XX is not set +# CONFIG_RT2800USB_RT55XX is not set +# CONFIG_RT2800USB_UNKNOWN is not set +CONFIG_RT2800_LIB=m +CONFIG_RT2X00_LIB_USB=m +CONFIG_RT2X00_LIB=m +CONFIG_RT2X00_LIB_FIRMWARE=y +CONFIG_RT2X00_LIB_CRYPTO=y +CONFIG_RT2X00_LIB_LEDS=y +# CONFIG_RT2X00_DEBUG is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +CONFIG_RTL8187=m +CONFIG_RTL8187_LEDS=y +CONFIG_RTL_CARDS=m +CONFIG_RTL8192CE=m +CONFIG_RTL8192SE=m +CONFIG_RTL8192DE=m +CONFIG_RTL8723AE=m +CONFIG_RTL8723BE=m +CONFIG_RTL8188EE=m +CONFIG_RTL8192EE=m +CONFIG_RTL8821AE=m +CONFIG_RTL8192CU=m +CONFIG_RTLWIFI=m +CONFIG_RTLWIFI_PCI=m +CONFIG_RTLWIFI_USB=m +# CONFIG_RTLWIFI_DEBUG is not set +CONFIG_RTL8192C_COMMON=m +CONFIG_RTL8723_COMMON=m +CONFIG_RTLBTCOEXIST=m +CONFIG_RTL8XXXU=m +# CONFIG_RTL8XXXU_UNTESTED is not set +CONFIG_RTW88=m +CONFIG_RTW88_CORE=m +CONFIG_RTW88_USB=m +CONFIG_RTW88_8822B=m +CONFIG_RTW88_8822C=m +CONFIG_RTW88_8723D=m +CONFIG_RTW88_8821C=m +# CONFIG_RTW88_8822BE is not set +# CONFIG_RTW88_8822BS is not set +CONFIG_RTW88_8822BU=m +# CONFIG_RTW88_8822CE is not set +# CONFIG_RTW88_8822CS is not set +CONFIG_RTW88_8822CU=m +# CONFIG_RTW88_8723DE is not set +# CONFIG_RTW88_8723DS is not set +CONFIG_RTW88_8723DU=m +# CONFIG_RTW88_8821CE is not set +# CONFIG_RTW88_8821CS is not set +CONFIG_RTW88_8821CU=m +# CONFIG_RTW88_DEBUG is not set +# CONFIG_RTW88_DEBUGFS is not set +# CONFIG_RTW89 is not set +# CONFIG_WLAN_VENDOR_RSI is not set +# CONFIG_WLAN_VENDOR_SILABS is not set +# CONFIG_WLAN_VENDOR_ST is not set +# CONFIG_WLAN_VENDOR_TI is not set +# CONFIG_WLAN_VENDOR_ZYDAS is not set +# CONFIG_WLAN_VENDOR_QUANTENNA is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_VIRT_WIFI is not set +# CONFIG_WAN is not set + +# +# Wireless WAN +# +# CONFIG_WWAN is not set +# end of Wireless WAN + +# CONFIG_VMXNET3 is not set +# CONFIG_FUJITSU_ES is not set +# CONFIG_NETDEVSIM is not set +CONFIG_NET_FAILOVER=m +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +CONFIG_INPUT_FF_MEMLESS=m +CONFIG_INPUT_SPARSEKMAP=y +# CONFIG_INPUT_MATRIXKMAP is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADC is not set +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_QT1050 is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set +CONFIG_KEYBOARD_XTKBD=m +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +# CONFIG_KEYBOARD_CYPRESS_SF is not set +CONFIG_INPUT_MOUSE=y +# CONFIG_MOUSE_PS2 is not set +CONFIG_MOUSE_SERIAL=m +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_ADC is not set +# CONFIG_TOUCHSCREEN_AR1021_I2C is not set +# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_BU21029 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set +# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP5 is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set +# CONFIG_TOUCHSCREEN_EXC3000 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +CONFIG_TOUCHSCREEN_GOODIX=y +# CONFIG_TOUCHSCREEN_HIDEEP is not set +# CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set +# CONFIG_TOUCHSCREEN_HYNITRON_CSTXXX is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_ILITEK is not set +# CONFIG_TOUCHSCREEN_S6SY761 is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_EKTF2127 is not set +# CONFIG_TOUCHSCREEN_ELAN is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set +# CONFIG_TOUCHSCREEN_MSG2638 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_NOVATEK_NVT_TS is not set +# CONFIG_TOUCHSCREEN_IMAGIS is not set +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_RM_TS is not set +# CONFIG_TOUCHSCREEN_SILEAD is not set +# CONFIG_TOUCHSCREEN_SIS_I2C is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_STMFTS is not set +# CONFIG_TOUCHSCREEN_SUR40 is not set +# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZET6223 is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_COLIBRI_VF50 is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +# CONFIG_TOUCHSCREEN_IQS5XX is not set +# CONFIG_TOUCHSCREEN_IQS7211 is not set +# CONFIG_TOUCHSCREEN_ZINITIX is not set +# CONFIG_TOUCHSCREEN_HIMAX_HX83112B is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_DECODER is not set +# CONFIG_INPUT_GPIO_VIBRA is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +CONFIG_INPUT_UINPUT=m +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_PWM_VIBRA is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_DA7280_HAPTICS is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_IQS269A is not set +# CONFIG_INPUT_IQS626A is not set +# CONFIG_INPUT_IQS7222 is not set +# CONFIG_INPUT_CMA3000 is not set +# CONFIG_INPUT_IDEAPAD_SLIDEBAR is not set +# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=m +CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y +CONFIG_SERIO_I8042=m +CONFIG_SERIO_SERPORT=m +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=m +CONFIG_SERIO_RAW=m +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +CONFIG_LEGACY_TIOCSTI=y +CONFIG_LDISC_AUTOLOAD=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_PNP=y +CONFIG_SERIAL_8250_16550A_VARIANTS=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCILIB=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_EXAR=y +CONFIG_SERIAL_8250_NR_UARTS=16 +CONFIG_SERIAL_8250_RUNTIME_UARTS=16 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +# CONFIG_SERIAL_8250_PCI1XXXX is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +CONFIG_SERIAL_8250_RSA=y +# CONFIG_SERIAL_8250_DW is not set +# CONFIG_SERIAL_8250_RT288X is not set +# CONFIG_SERIAL_8250_PERICOM is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SIFIVE is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_FSL_LINFLEXUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_SPRD is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_NONSTANDARD=y +# CONFIG_MOXA_INTELLIO is not set +# CONFIG_MOXA_SMARTIO is not set +# CONFIG_N_HDLC is not set +# CONFIG_N_GSM is not set +# CONFIG_NOZOMI is not set +# CONFIG_NULL_TTY is not set +CONFIG_HVC_DRIVER=y +# CONFIG_SERIAL_DEV_BUS is not set +# CONFIG_TTY_PRINTK is not set +CONFIG_VIRTIO_CONSOLE=y +CONFIG_IPMI_HANDLER=m +CONFIG_IPMI_DMI_DECODE=y +CONFIG_IPMI_PLAT_DATA=y +# CONFIG_IPMI_PANIC_EVENT is not set +CONFIG_IPMI_DEVICE_INTERFACE=m +CONFIG_IPMI_SI=m +# CONFIG_IPMI_SSIF is not set +# CONFIG_IPMI_WATCHDOG is not set +# CONFIG_IPMI_POWEROFF is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_BA431 is not set +CONFIG_HW_RANDOM_VIRTIO=m +# CONFIG_HW_RANDOM_CCTRNG is not set +# CONFIG_HW_RANDOM_XIPHERA is not set +# CONFIG_APPLICOM is not set +CONFIG_DEVMEM=y +CONFIG_DEVPORT=y +# CONFIG_TCG_TPM is not set +# CONFIG_XILLYBUS is not set +# CONFIG_XILLYUSB is not set +# end of Character devices + +# +# I2C support +# +CONFIG_I2C=y +# CONFIG_ACPI_I2C_OPREGION is not set +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_MUX is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_AMD_MP2 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# ACPI drivers +# +# CONFIG_I2C_SCMI is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +CONFIG_I2C_GPIO=y +# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set +# CONFIG_I2C_LS2X is not set +CONFIG_I2C_LSFS=y +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_RK3X is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_CP2615 is not set +# CONFIG_I2C_PCI1XXXX is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_VIRTIO is not set +# end of I2C Hardware Bus support + +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +# CONFIG_I3C is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_CADENCE_XSPI is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_LOONGSON_PCI is not set +# CONFIG_SPI_LOONGSON_PLATFORM is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_MICROCHIP_CORE is not set +# CONFIG_SPI_MICROCHIP_CORE_QSPI is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PCI1XXXX is not set +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_SN_F_OSPI is not set +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set + +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_SPI_LS=y +CONFIG_SPI_LS_IO=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_DYNAMIC=y +# CONFIG_SPMI is not set +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +# CONFIG_DP83640_PHY is not set +# CONFIG_PTP_1588_CLOCK_INES is not set +# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set +# CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_1588_CLOCK_MOCK is not set +# CONFIG_PTP_1588_CLOCK_OCP is not set +# end of PTP clock support + +CONFIG_PINCTRL=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_PINMUX=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_CY8C95X0 is not set +# CONFIG_PINCTRL_LOONGSON2 is not set +# CONFIG_PINCTRL_MCP23S08 is not set +# CONFIG_PINCTRL_MICROCHIP_SGPIO is not set +# CONFIG_PINCTRL_OCELOT is not set +CONFIG_PINCTRL_SINGLE=y +# CONFIG_PINCTRL_STMFX is not set +# CONFIG_PINCTRL_SX150X is not set + +# +# Renesas pinctrl drivers +# +# end of Renesas pinctrl drivers + +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIO_ACPI=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_CDEV_V1=y +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_AMDPT is not set +# CONFIG_GPIO_CADENCE is not set +# CONFIG_GPIO_DWAPB is not set +# CONFIG_GPIO_EXAR is not set +# CONFIG_GPIO_FTGPIO010 is not set +# CONFIG_GPIO_GENERIC_PLATFORM is not set +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HLWD is not set +# CONFIG_GPIO_LOGICVC is not set +CONFIG_GPIO_LOONGSON_IRQCHIP=y +CONFIG_GPIO_LOONGSON_64BIT=y +# CONFIG_GPIO_MB86S7X is not set +# CONFIG_GPIO_SIFIVE is not set +# CONFIG_GPIO_SYSCON is not set +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_AMD_FCH is not set +# end of Memory mapped GPIO drivers + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_FXL6408 is not set +# CONFIG_GPIO_DS4520 is not set +# CONFIG_GPIO_GW_PLD is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +# CONFIG_GPIO_PCA9570 is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +# end of MFD GPIO expanders + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +# end of USB GPIO expanders + +# +# Virtual GPIO drivers +# +# CONFIG_GPIO_AGGREGATOR is not set +# CONFIG_GPIO_LATCH is not set +# CONFIG_GPIO_MOCKUP is not set +# CONFIG_GPIO_VIRTIO is not set +# CONFIG_GPIO_SIM is not set +# end of Virtual GPIO drivers + +# CONFIG_W1 is not set +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_LTC2952 is not set +CONFIG_POWER_RESET_RESTART=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_RESET_SYSCON_POWEROFF=y +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y +# CONFIG_NVMEM_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_POWER_SUPPLY_HWMON=y +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_IP5XXX_POWER is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_SAMSUNG_SDI is not set +# CONFIG_BATTERY_SBS is not set +# CONFIG_CHARGER_SBS is not set +# CONFIG_BATTERY_BQ27XXX is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_LTC4162L is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_MAX77976 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ2515X is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_BQ25980 is not set +# CONFIG_CHARGER_BQ256XX is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_GOLDFISH is not set +# CONFIG_BATTERY_RT5033 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_BD99954 is not set +# CONFIG_BATTERY_UG3105 is not set +CONFIG_HWMON=y +CONFIG_HWMON_VID=m +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM1177 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_AHT10 is not set +# CONFIG_SENSORS_AQUACOMPUTER_D5NEXT is not set +# CONFIG_SENSORS_AS370 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_AXI_FAN_CONTROL is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CORSAIR_CPRO is not set +# CONFIG_SENSORS_CORSAIR_PSU is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_HS3001 is not set +# CONFIG_SENSORS_IBMAEM is not set +# CONFIG_SENSORS_IBMPEX is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2947_I2C is not set +# CONFIG_SENSORS_LTC2947_SPI is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC2992 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX127 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX31730 is not set +# CONFIG_SENSORS_MAX31760 is not set +# CONFIG_MAX31827 is not set +# CONFIG_SENSORS_MAX6620 is not set +# CONFIG_SENSORS_MAX6621 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MC34VR500 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_TPS23861 is not set +# CONFIG_SENSORS_MR75203 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT6775_I2C is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_NZXT_KRAKEN2 is not set +# CONFIG_SENSORS_NZXT_SMART2 is not set +# CONFIG_SENSORS_OCC_P8_I2C is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_PWM_FAN is not set +# CONFIG_SENSORS_SBTSI is not set +# CONFIG_SENSORS_SBRMI is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHT4x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC2305 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +# CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_INA238 is not set +# CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_TMP464 is not set +# CONFIG_SENSORS_TMP513 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83773G is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +CONFIG_SENSORS_W83795=m +# CONFIG_SENSORS_W83795_FANCTRL is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +CONFIG_SENSORS_W83627HF=m +# CONFIG_SENSORS_W83627EHF is not set + +# +# ACPI drivers +# +# CONFIG_SENSORS_ACPI_POWER is not set +CONFIG_THERMAL=y +# CONFIG_THERMAL_NETLINK is not set +# CONFIG_THERMAL_STATISTICS is not set +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +# CONFIG_CPU_THERMAL is not set +# CONFIG_THERMAL_EMULATION is not set +# CONFIG_THERMAL_MMIO is not set +# CONFIG_GENERIC_ADC_THERMAL is not set +CONFIG_LOONGSON2_THERMAL=y +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_SMPRO is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_BD9571MWV is not set +# CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_CS42L43_I2C is not set +# CONFIG_MFD_MADERA is not set +# CONFIG_MFD_MAX5970 is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_IQS62X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77541 is not set +# CONFIG_MFD_MAX77620 is not set +# CONFIG_MFD_MAX77650 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77714 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set +# CONFIG_MFD_MT6370 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_MFD_OCELOT is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_NTXEC is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_SY7636A is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT4831 is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RT5120 is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_RK8XX_I2C is not set +# CONFIG_MFD_RK8XX_SPI is not set +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS65219 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS6594_I2C is not set +# CONFIG_MFD_TPS6594_SPI is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_LOCHNAGAR is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_ROHM_BD718XX is not set +# CONFIG_MFD_ROHM_BD71828 is not set +# CONFIG_MFD_ROHM_BD957XMUF is not set +# CONFIG_MFD_LS_TIMERS is not set +# CONFIG_MFD_STPMIC1 is not set +# CONFIG_MFD_STMFX is not set +# CONFIG_MFD_ATC260X_I2C is not set +# CONFIG_MFD_QCOM_PM8008 is not set +# CONFIG_MFD_INTEL_M10_BMC_SPI is not set +# CONFIG_MFD_RSMU_I2C is not set +# CONFIG_MFD_RSMU_SPI is not set +# end of Multifunction device drivers + +# CONFIG_REGULATOR is not set +# CONFIG_RC_CORE is not set + +# +# CEC support +# +# CONFIG_MEDIA_CEC_SUPPORT is not set +# end of CEC support + +CONFIG_MEDIA_SUPPORT=y +# CONFIG_MEDIA_SUPPORT_FILTER is not set +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set + +# +# Media device types +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +CONFIG_MEDIA_TEST_SUPPORT=y +# end of Media device types + +# +# Media core support +# +CONFIG_VIDEO_DEV=y +CONFIG_MEDIA_CONTROLLER=y +# CONFIG_DVB_CORE is not set +# end of Media core support + +# +# Video4Linux options +# +CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_V4L2_FWNODE=y +CONFIG_V4L2_ASYNC=y +# end of Video4Linux options + +# +# Media controller options +# +# end of Media controller options + +# +# Media drivers +# + +# +# Media drivers +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +# CONFIG_USB_GSPCA is not set +# CONFIG_USB_PWC is not set +# CONFIG_USB_S2255 is not set +# CONFIG_VIDEO_USBTV is not set +CONFIG_USB_VIDEO_CLASS=y +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y + +# +# Analog TV USB devices +# +# CONFIG_VIDEO_GO7007 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_STK1160 is not set + +# +# Analog/digital TV USB devices +# + +# +# Digital TV USB devices +# + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set + +# +# Software defined radio USB devices +# +# CONFIG_USB_AIRSPY is not set +# CONFIG_USB_HACKRF is not set +# CONFIG_USB_MSI2500 is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +# CONFIG_RADIO_ADAPTERS is not set +CONFIG_MEDIA_PLATFORM_DRIVERS=y +# CONFIG_V4L_PLATFORM_DRIVERS is not set +# CONFIG_SDR_PLATFORM_DRIVERS is not set +# CONFIG_DVB_PLATFORM_DRIVERS is not set +# CONFIG_V4L_MEM2MEM_DRIVERS is not set + +# +# Allegro DVT media platform drivers +# + +# +# Amlogic media platform drivers +# + +# +# Amphion drivers +# + +# +# Aspeed media platform drivers +# + +# +# Atmel media platform drivers +# + +# +# Cadence media platform drivers +# +# CONFIG_VIDEO_CADENCE_CSI2RX is not set +# CONFIG_VIDEO_CADENCE_CSI2TX is not set + +# +# Chips&Media media platform drivers +# + +# +# Intel media platform drivers +# + +# +# Marvell media platform drivers +# + +# +# Mediatek media platform drivers +# + +# +# Microchip Technology, Inc. media platform drivers +# + +# +# NVidia media platform drivers +# + +# +# NXP media platform drivers +# + +# +# Qualcomm media platform drivers +# + +# +# Renesas media platform drivers +# + +# +# Rockchip media platform drivers +# + +# +# Samsung media platform drivers +# + +# +# STMicroelectronics media platform drivers +# + +# +# Sunxi media platform drivers +# + +# +# Texas Instruments drivers +# + +# +# Verisilicon media platform drivers +# + +# +# VIA media platform drivers +# + +# +# Xilinx media platform drivers +# +# CONFIG_V4L_TEST_DRIVERS is not set +CONFIG_UVC_COMMON=y +CONFIG_VIDEOBUF2_CORE=y +CONFIG_VIDEOBUF2_V4L2=y +CONFIG_VIDEOBUF2_MEMOPS=y +CONFIG_VIDEOBUF2_VMALLOC=y +# end of Media drivers + +# +# Media ancillary drivers +# +CONFIG_MEDIA_ATTACH=y +CONFIG_VIDEO_CAMERA_SENSOR=y +# CONFIG_VIDEO_AR0521 is not set +# CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_HI846 is not set +# CONFIG_VIDEO_HI847 is not set +# CONFIG_VIDEO_IMX208 is not set +# CONFIG_VIDEO_IMX214 is not set +# CONFIG_VIDEO_IMX219 is not set +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX290 is not set +# CONFIG_VIDEO_IMX296 is not set +# CONFIG_VIDEO_IMX319 is not set +# CONFIG_VIDEO_IMX334 is not set +# CONFIG_VIDEO_IMX335 is not set +# CONFIG_VIDEO_IMX355 is not set +# CONFIG_VIDEO_IMX412 is not set +# CONFIG_VIDEO_IMX415 is not set +# CONFIG_VIDEO_MT9M001 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T112 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +# CONFIG_VIDEO_OG01A1B is not set +# CONFIG_VIDEO_OV01A10 is not set +# CONFIG_VIDEO_OV02A10 is not set +# CONFIG_VIDEO_OV08D10 is not set +# CONFIG_VIDEO_OV08X40 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_OV13B10 is not set +# CONFIG_VIDEO_OV2640 is not set +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV2740 is not set +# CONFIG_VIDEO_OV4689 is not set +# CONFIG_VIDEO_OV5640 is not set +# CONFIG_VIDEO_OV5645 is not set +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV5648 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5675 is not set +# CONFIG_VIDEO_OV5693 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV772X is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV8856 is not set +# CONFIG_VIDEO_OV8858 is not set +# CONFIG_VIDEO_OV8865 is not set +# CONFIG_VIDEO_OV9282 is not set +# CONFIG_VIDEO_OV9640 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV9734 is not set +# CONFIG_VIDEO_RDACM20 is not set +# CONFIG_VIDEO_RDACM21 is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5C73M3 is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_ST_VGXY61 is not set +# CONFIG_VIDEO_CCS is not set +# CONFIG_VIDEO_ET8EK8 is not set + +# +# Lens drivers +# +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9719 is not set +# CONFIG_VIDEO_DW9768 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices + +# +# Audio decoders, processors and mixers +# +# CONFIG_VIDEO_CS3308 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_SONY_BTF_MPX is not set +# CONFIG_VIDEO_TDA1997X is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_UDA1342 is not set +# CONFIG_VIDEO_VP27SMPX is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_WM8775 is not set +# end of Audio decoders, processors and mixers + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set +# end of RDS decoders + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_ADV748X is not set +# CONFIG_VIDEO_ADV7604 is not set +# CONFIG_VIDEO_ADV7842 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_ISL7998X is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_ML86V7667 is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_TC358743 is not set +# CONFIG_VIDEO_TC358746 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9903 is not set +# CONFIG_VIDEO_TW9906 is not set +# CONFIG_VIDEO_TW9910 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_CX25840 is not set +# end of Video decoders + +# +# Video encoders +# +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_ADV7511 is not set +# CONFIG_VIDEO_AK881X is not set +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_THS8200 is not set +# end of Video encoders + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# end of Video improvement chips + +# +# Audio/Video compression chips +# +# CONFIG_VIDEO_SAA6752HS is not set +# end of Audio/Video compression chips + +# +# SDR tuner chips +# +# CONFIG_SDR_MAX2175 is not set +# end of SDR tuner chips + +# +# Miscellaneous helper chips +# +# CONFIG_VIDEO_I2C is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_ST_MIPID02 is not set +# CONFIG_VIDEO_THS7303 is not set +# end of Miscellaneous helper chips + +# +# Video serializers and deserializers +# +# CONFIG_VIDEO_DS90UB913 is not set +# CONFIG_VIDEO_DS90UB953 is not set +# CONFIG_VIDEO_DS90UB960 is not set +# end of Video serializers and deserializers + +# +# Media SPI Adapters +# +# CONFIG_VIDEO_GS1662 is not set +# end of Media SPI Adapters + +CONFIG_MEDIA_TUNER=y + +# +# Customize TV tuners +# +# CONFIG_MEDIA_TUNER_E4000 is not set +# CONFIG_MEDIA_TUNER_FC0011 is not set +# CONFIG_MEDIA_TUNER_FC0012 is not set +# CONFIG_MEDIA_TUNER_FC0013 is not set +# CONFIG_MEDIA_TUNER_FC2580 is not set +# CONFIG_MEDIA_TUNER_IT913X is not set +# CONFIG_MEDIA_TUNER_M88RS6000T is not set +# CONFIG_MEDIA_TUNER_MAX2165 is not set +# CONFIG_MEDIA_TUNER_MC44S803 is not set +# CONFIG_MEDIA_TUNER_MSI001 is not set +# CONFIG_MEDIA_TUNER_MT2060 is not set +# CONFIG_MEDIA_TUNER_MT2063 is not set +# CONFIG_MEDIA_TUNER_MT20XX is not set +# CONFIG_MEDIA_TUNER_MT2131 is not set +# CONFIG_MEDIA_TUNER_MT2266 is not set +# CONFIG_MEDIA_TUNER_MXL301RF is not set +# CONFIG_MEDIA_TUNER_MXL5005S is not set +# CONFIG_MEDIA_TUNER_MXL5007T is not set +# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set +# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set +# CONFIG_MEDIA_TUNER_QT1010 is not set +# CONFIG_MEDIA_TUNER_R820T is not set +# CONFIG_MEDIA_TUNER_SI2157 is not set +# CONFIG_MEDIA_TUNER_SIMPLE is not set +# CONFIG_MEDIA_TUNER_TDA18212 is not set +# CONFIG_MEDIA_TUNER_TDA18218 is not set +# CONFIG_MEDIA_TUNER_TDA18250 is not set +# CONFIG_MEDIA_TUNER_TDA18271 is not set +# CONFIG_MEDIA_TUNER_TDA827X is not set +# CONFIG_MEDIA_TUNER_TDA8290 is not set +# CONFIG_MEDIA_TUNER_TDA9887 is not set +# CONFIG_MEDIA_TUNER_TEA5761 is not set +# CONFIG_MEDIA_TUNER_TEA5767 is not set +# CONFIG_MEDIA_TUNER_TUA9001 is not set +# CONFIG_MEDIA_TUNER_XC2028 is not set +# CONFIG_MEDIA_TUNER_XC4000 is not set +# CONFIG_MEDIA_TUNER_XC5000 is not set +# end of Customize TV tuners + +# +# Customise DVB Frontends +# +# end of Customise DVB Frontends + +# +# Tools to develop new frontends +# +# end of Media ancillary drivers + +# +# Graphics support +# +CONFIG_APERTURE_HELPERS=y +CONFIG_VIDEO_CMDLINE=y +CONFIG_VIDEO_NOMODESET=y +# CONFIG_AUXDISPLAY is not set +CONFIG_DRM=y +# CONFIG_DRM_DEBUG_MM is not set +CONFIG_DRM_KMS_HELPER=y +# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set +# CONFIG_DRM_DEBUG_MODESET_LOCK is not set +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +CONFIG_DRM_DISPLAY_HELPER=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_TTM=y +CONFIG_DRM_TTM_HELPER=y +CONFIG_DRM_GEM_SHMEM_HELPER=y + +# +# I2C encoder or helper chips +# +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# end of I2C encoder or helper chips + +# +# ARM devices +# +# CONFIG_DRM_KOMEDA is not set +# end of ARM devices + +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_VKMS is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_QXL is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_ABT_Y030XX067A is not set +# CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_AUO_A030JTN01 is not set +CONFIG_DRM_PANEL_LVDS=y +# CONFIG_DRM_PANEL_SIMPLE is not set +# CONFIG_DRM_PANEL_EDP is not set +# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set +# CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LB035Q02 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set +# CONFIG_DRM_PANEL_NEWVISION_NV3052C is not set +# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set +# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set +# CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set +# CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set +# CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set +# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set +# CONFIG_DRM_PANEL_TPO_TPG110 is not set +# CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set +# end of Display Panels + +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_CHIPONE_ICN6211 is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set +CONFIG_DRM_DISPLAY_CONNECTOR=y +# CONFIG_DRM_ITE_IT6505 is not set +# CONFIG_DRM_LONTIUM_LT8912B is not set +# CONFIG_DRM_LONTIUM_LT9211 is not set +# CONFIG_DRM_LONTIUM_LT9611 is not set +# CONFIG_DRM_LONTIUM_LT9611UXC is not set +# CONFIG_DRM_ITE_IT66121 is not set +# CONFIG_DRM_LVDS_CODEC is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_PARADE_PS8640 is not set +# CONFIG_DRM_SAMSUNG_DSIM is not set +# CONFIG_DRM_SIL_SII8620 is not set +# CONFIG_DRM_SII902X is not set +# CONFIG_DRM_SII9234 is not set +CONFIG_DRM_SIMPLE_BRIDGE=y +# CONFIG_DRM_THINE_THC63LVD1024 is not set +# CONFIG_DRM_TOSHIBA_TC358762 is not set +# CONFIG_DRM_TOSHIBA_TC358764 is not set +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TOSHIBA_TC358768 is not set +# CONFIG_DRM_TOSHIBA_TC358775 is not set +# CONFIG_DRM_TI_DLPC3433 is not set +# CONFIG_DRM_TI_TFP410 is not set +# CONFIG_DRM_TI_SN65DSI83 is not set +# CONFIG_DRM_TI_SN65DSI86 is not set +# CONFIG_DRM_TI_TPD12S015 is not set +# CONFIG_DRM_ANALOGIX_ANX6345 is not set +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +# CONFIG_DRM_ANALOGIX_ANX7625 is not set +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CDNS_MHDP8546 is not set +# end of Display Interface Bridges + +CONFIG_DRM_LOONGSON=y +# CONFIG_DRM_ETNAVIV is not set +# CONFIG_DRM_LOGICVC is not set +# CONFIG_DRM_ARCPGU is not set +# CONFIG_DRM_BOCHS is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_GM12U320 is not set +# CONFIG_DRM_PANEL_MIPI_DBI is not set +CONFIG_DRM_SIMPLEDRM=y +# CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9163 is not set +# CONFIG_TINYDRM_ILI9225 is not set +# CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_ILI9486 is not set +# CONFIG_TINYDRM_MI0283QT is not set +# CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_ST7586 is not set +# CONFIG_TINYDRM_ST7735R is not set +# CONFIG_DRM_GUD is not set +# CONFIG_DRM_SSD130X is not set +# CONFIG_DRM_LEGACY is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y + +# +# Frame buffer Devices +# +CONFIG_FB=y +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +CONFIG_FB_EFI=y +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +# CONFIG_FB_LS2K500 is not set +CONFIG_FB_CORE=y +CONFIG_FB_NOTIFY=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_DEVICE=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_IOMEM_HELPERS=y +CONFIG_FB_SYSMEM_HELPERS=y +CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +CONFIG_LCD_CLASS_DEVICE=y +# CONFIG_LCD_L4F00242T03 is not set +# CONFIG_LCD_LMS283GF05 is not set +# CONFIG_LCD_LTV350QV is not set +# CONFIG_LCD_ILI922X is not set +# CONFIG_LCD_ILI9320 is not set +# CONFIG_LCD_TDO24M is not set +# CONFIG_LCD_VGG2432A4 is not set +CONFIG_LCD_PLATFORM=y +# CONFIG_LCD_AMS369FG06 is not set +# CONFIG_LCD_LMS501KF03 is not set +# CONFIG_LCD_HX8357 is not set +# CONFIG_LCD_OTM3225A is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_KTZ8866 is not set +CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_QCOM_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +# CONFIG_BACKLIGHT_LP855X is not set +CONFIG_BACKLIGHT_GPIO=y +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +CONFIG_BACKLIGHT_LED=y +# end of Backlight & LCD device support + +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_VGA_CONSOLE=y +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +# end of Console display driver support + +# CONFIG_LOGO is not set +# end of Graphics support + +# CONFIG_DRM_ACCEL is not set +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_HWDEP=y +CONFIG_SND_SEQ_DEVICE=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +# CONFIG_SND_OSSEMUL is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_HRTIMER is not set +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_MAX_CARDS=32 +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +CONFIG_SND_CTL_FAST_LOOKUP=y +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_CTL_INPUT_VALIDATION is not set +CONFIG_SND_VMASTER=y +CONFIG_SND_CTL_LED=y +CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQ_DUMMY=m +CONFIG_SND_SEQ_MIDI_EVENT=m +CONFIG_SND_SEQ_MIDI=m +# CONFIG_SND_SEQ_UMP is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_PCMTEST is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +CONFIG_SND_BT87X=m +CONFIG_SND_BT87X_OVERCLOCK=y +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LOLA is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SE6X is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set + +# +# HD-Audio +# +CONFIG_SND_HDA=y +CONFIG_SND_HDA_GENERIC_LEDS=y +CONFIG_SND_HDA_INTEL=y +CONFIG_SND_HDA_HWDEP=y +CONFIG_SND_HDA_RECONFIG=y +CONFIG_SND_HDA_INPUT_BEEP=y +CONFIG_SND_HDA_INPUT_BEEP_MODE=1 +CONFIG_SND_HDA_PATCH_LOADER=y +# CONFIG_SND_HDA_SCODEC_CS35L41_I2C is not set +# CONFIG_SND_HDA_SCODEC_CS35L41_SPI is not set +# CONFIG_SND_HDA_SCODEC_CS35L56_I2C is not set +# CONFIG_SND_HDA_SCODEC_CS35L56_SPI is not set +# CONFIG_SND_HDA_SCODEC_TAS2781_I2C is not set +CONFIG_SND_HDA_CODEC_REALTEK=y +# CONFIG_SND_HDA_CODEC_ANALOG is not set +CONFIG_SND_HDA_CODEC_SIGMATEL=y +# CONFIG_SND_HDA_CODEC_VIA is not set +CONFIG_SND_HDA_CODEC_HDMI=y +# CONFIG_SND_HDA_CODEC_CIRRUS is not set +# CONFIG_SND_HDA_CODEC_CS8409 is not set +CONFIG_SND_HDA_CODEC_CONEXANT=y +# CONFIG_SND_HDA_CODEC_CA0110 is not set +# CONFIG_SND_HDA_CODEC_CA0132 is not set +# CONFIG_SND_HDA_CODEC_CMEDIA is not set +# CONFIG_SND_HDA_CODEC_SI3054 is not set +CONFIG_SND_HDA_GENERIC=y +CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 +# CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM is not set +# CONFIG_SND_HDA_CTL_DEV_ID is not set +# end of HD-Audio + +CONFIG_SND_HDA_CORE=y +CONFIG_SND_HDA_PREALLOC_SIZE=64 +CONFIG_SND_INTEL_NHLT=y +CONFIG_SND_INTEL_DSP_CONFIG=y +CONFIG_SND_INTEL_SOUNDWIRE_ACPI=y +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +# CONFIG_SND_USB_AUDIO_MIDI_V2 is not set +CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +# CONFIG_SND_SOC_ADI is not set +# CONFIG_SND_SOC_AMD_ACP is not set +# CONFIG_SND_AMD_ACP_CONFIG is not set +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_AUDMIX is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_FSL_MICFIL is not set +# CONFIG_SND_SOC_FSL_XCVR is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# end of SoC Audio for Freescale CPUs + +# CONFIG_SND_SOC_CHV3_I2S is not set +# CONFIG_SND_I2S_HI6210_I2S is not set +CONFIG_SND_SOC_LOONGSON=y +CONFIG_SND_LS=y +CONFIG_SND_LS_PCM=y +CONFIG_SND_LS_PCM_GENERIC_DMA=y +CONFIG_SND_LS_DAILINK=y + +# +# SoC Audio for Loongson CPUs +# +# CONFIG_SND_SOC_LOONGSON_I2S_PCI is not set +# CONFIG_SND_SOC_LOONGSON_CARD is not set +# end of SoC Audio for Loongson CPUs + +# CONFIG_SND_SOC_IMG is not set +# CONFIG_SND_SOC_MTK_BTCVSD is not set +# CONFIG_SND_SOC_SOF_TOPLEVEL is not set + +# +# STMicroelectronics STM32 SOC audio support +# +# end of STMicroelectronics STM32 SOC audio support + +# CONFIG_SND_SOC_XILINX_I2S is not set +# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set +# CONFIG_SND_SOC_XILINX_SPDIF is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1372_I2C is not set +# CONFIG_SND_SOC_ADAU1372_SPI is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU1761_I2C is not set +# CONFIG_SND_SOC_ADAU1761_SPI is not set +# CONFIG_SND_SOC_ADAU7002 is not set +# CONFIG_SND_SOC_ADAU7118_HW is not set +# CONFIG_SND_SOC_ADAU7118_I2C is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4118 is not set +# CONFIG_SND_SOC_AK4375 is not set +# CONFIG_SND_SOC_AK4458 is not set +# CONFIG_SND_SOC_AK4554 is not set +# CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_AK5558 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_AUDIO_IIO_AUX is not set +# CONFIG_SND_SOC_AW8738 is not set +# CONFIG_SND_SOC_AW88395 is not set +# CONFIG_SND_SOC_AW88261 is not set +# CONFIG_SND_SOC_BD28623 is not set +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_CHV3_CODEC is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS35L34 is not set +# CONFIG_SND_SOC_CS35L35 is not set +# CONFIG_SND_SOC_CS35L36 is not set +# CONFIG_SND_SOC_CS35L41_SPI is not set +# CONFIG_SND_SOC_CS35L41_I2C is not set +# CONFIG_SND_SOC_CS35L45_SPI is not set +# CONFIG_SND_SOC_CS35L45_I2C is not set +# CONFIG_SND_SOC_CS35L56_I2C is not set +# CONFIG_SND_SOC_CS35L56_SPI is not set +# CONFIG_SND_SOC_CS42L42 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS42L83 is not set +# CONFIG_SND_SOC_CS4234 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS43130 is not set +# CONFIG_SND_SOC_CS4341 is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CX2072X is not set +# CONFIG_SND_SOC_DA7213 is not set +# CONFIG_SND_SOC_DMIC is not set +# CONFIG_SND_SOC_ES7134 is not set +# CONFIG_SND_SOC_ES7241 is not set +# CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8326 is not set +CONFIG_SND_SOC_ES8328=y +CONFIG_SND_SOC_ES8328_I2C=y +# CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_HDA is not set +# CONFIG_SND_SOC_ICS43432 is not set +# CONFIG_SND_SOC_IDT821034 is not set +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_MAX98088 is not set +# CONFIG_SND_SOC_MAX98090 is not set +# CONFIG_SND_SOC_MAX98357A is not set +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX9867 is not set +# CONFIG_SND_SOC_MAX98927 is not set +# CONFIG_SND_SOC_MAX98520 is not set +# CONFIG_SND_SOC_MAX98373_I2C is not set +# CONFIG_SND_SOC_MAX98388 is not set +# CONFIG_SND_SOC_MAX98390 is not set +# CONFIG_SND_SOC_MAX98396 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1789_I2C is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +# CONFIG_SND_SOC_PCM186X_I2C is not set +# CONFIG_SND_SOC_PCM186X_SPI is not set +# CONFIG_SND_SOC_PCM3060_I2C is not set +# CONFIG_SND_SOC_PCM3060_SPI is not set +# CONFIG_SND_SOC_PCM3168A_I2C is not set +# CONFIG_SND_SOC_PCM3168A_SPI is not set +# CONFIG_SND_SOC_PCM5102A is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_PEB2466 is not set +# CONFIG_SND_SOC_RK3328 is not set +# CONFIG_SND_SOC_RT5616 is not set +# CONFIG_SND_SOC_RT5631 is not set +# CONFIG_SND_SOC_RT5640 is not set +# CONFIG_SND_SOC_RT5659 is not set +# CONFIG_SND_SOC_RT9120 is not set +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set +# CONFIG_SND_SOC_SIMPLE_MUX is not set +# CONFIG_SND_SOC_SMA1303 is not set +# CONFIG_SND_SOC_SPDIF is not set +# CONFIG_SND_SOC_SRC4XXX_I2C is not set +# CONFIG_SND_SOC_SSM2305 is not set +# CONFIG_SND_SOC_SSM2518 is not set +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM3515 is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS2562 is not set +# CONFIG_SND_SOC_TAS2764 is not set +# CONFIG_SND_SOC_TAS2770 is not set +# CONFIG_SND_SOC_TAS2780 is not set +# CONFIG_SND_SOC_TAS2781_I2C is not set +# CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set +# CONFIG_SND_SOC_TAS5720 is not set +# CONFIG_SND_SOC_TAS5805M is not set +# CONFIG_SND_SOC_TAS6424 is not set +# CONFIG_SND_SOC_TDA7419 is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TFA989X is not set +# CONFIG_SND_SOC_TLV320ADC3XXX is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set +# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set +# CONFIG_SND_SOC_TLV320AIC3X_I2C is not set +# CONFIG_SND_SOC_TLV320AIC3X_SPI is not set +# CONFIG_SND_SOC_TLV320ADCX140 is not set +# CONFIG_SND_SOC_TS3A227E is not set +# CONFIG_SND_SOC_TSCS42XX is not set +# CONFIG_SND_SOC_TSCS454 is not set +# CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8524 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731_I2C is not set +# CONFIG_SND_SOC_WM8731_SPI is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8782 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8904 is not set +# CONFIG_SND_SOC_WM8940 is not set +# CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_WM8961 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZL38060 is not set +# CONFIG_SND_SOC_MAX9759 is not set +# CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6358 is not set +# CONFIG_SND_SOC_MT6660 is not set +# CONFIG_SND_SOC_NAU8315 is not set +# CONFIG_SND_SOC_NAU8540 is not set +# CONFIG_SND_SOC_NAU8810 is not set +# CONFIG_SND_SOC_NAU8821 is not set +# CONFIG_SND_SOC_NAU8822 is not set +# CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +# CONFIG_SND_SOC_LPASS_WSA_MACRO is not set +# CONFIG_SND_SOC_LPASS_VA_MACRO is not set +# CONFIG_SND_SOC_LPASS_RX_MACRO is not set +# CONFIG_SND_SOC_LPASS_TX_MACRO is not set +# end of CODEC drivers + +# CONFIG_SND_SIMPLE_CARD is not set +# CONFIG_SND_AUDIO_GRAPH_CARD is not set +# CONFIG_SND_AUDIO_GRAPH_CARD2 is not set +# CONFIG_SND_TEST_COMPONENT is not set +CONFIG_SND_VIRTIO=m +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +CONFIG_HIDRAW=y +CONFIG_UHID=m +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=m +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_ASUS is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_BIGBEN_FF is not set +CONFIG_HID_CHERRY=m +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_MACALLY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CP2112 is not set +# CONFIG_HID_CREATIVE_SB0540 is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELAN is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EVISION is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_FT260 is not set +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_GLORIOUS is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOOGLE_STADIA_FF is not set +# CONFIG_HID_VIVALDI is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_VRC2 is not set +# CONFIG_HID_XIAOMI is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_ITE is not set +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LED is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_LETSKETCH is not set +CONFIG_HID_LOGITECH=m +CONFIG_HID_LOGITECH_DJ=m +CONFIG_HID_LOGITECH_HIDPP=m +CONFIG_LOGITECH_FF=y +CONFIG_LOGIRUMBLEPAD2_FF=y +CONFIG_LOGIG940_FF=y +CONFIG_LOGIWHEELS_FF=y +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MALTRON is not set +# CONFIG_HID_MAYFLASH is not set +# CONFIG_HID_MEGAWORLD_FF is not set +# CONFIG_HID_REDRAGON is not set +CONFIG_HID_MICROSOFT=m +# CONFIG_HID_MONTEREY is not set +CONFIG_HID_MULTITOUCH=m +# CONFIG_HID_NINTENDO is not set +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_NVIDIA_SHIELD is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PXRC is not set +# CONFIG_HID_RAZER is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SEMITEK is not set +# CONFIG_HID_SIGMAMICRO is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +CONFIG_HID_SUNPLUS=m +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_TOPRE is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_U2FZERO is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set +# CONFIG_HID_MCP2221 is not set +# end of Special HID drivers + +# +# HID-BPF support +# +# end of HID-BPF support + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +CONFIG_USB_HIDDEV=y +# end of USB HID support + +CONFIG_I2C_HID=y +# CONFIG_I2C_HID_ACPI is not set +# CONFIG_I2C_HID_OF is not set +# CONFIG_I2C_HID_OF_ELAN is not set +# CONFIG_I2C_HID_OF_GOODIX is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +# CONFIG_USB_LED_TRIG is not set +CONFIG_USB_ULPI_BUS=y +# CONFIG_USB_CONN_GPIO is not set +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +# CONFIG_USB_PCI is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_FEW_INIT_RETRIES is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_PRODUCTLIST is not set +# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set +# CONFIG_USB_OTG_FSM is not set +# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set +CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_MON=y + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_XHCI_HCD is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +# CONFIG_USB_EHCI_FSL is not set +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m +CONFIG_USB_WDM=y +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +CONFIG_USB_UAS=y + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set + +# +# USB dual-mode controller drivers +# +# CONFIG_USB_CDNS_SUPPORT is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_DWC3 is not set +CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_IMX=y +CONFIG_USB_CHIPIDEA_GENERIC=y +CONFIG_USB_CHIPIDEA_TEGRA=y +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP210X is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_F8153X is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +CONFIG_USB_SERIAL_WWAN=y +CONFIG_USB_SERIAL_OPTION=y +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_UPD78F0730 is not set +# CONFIG_USB_SERIAL_XR is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +CONFIG_USB_LEGOTOWER=y +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set +# CONFIG_USB_ONBOARD_HUB is not set + +# +# USB Physical Layer drivers +# +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# end of USB Physical Layer drivers + +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 + +# +# USB Peripheral Controller +# +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_SNP_UDC_PLAT is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_MAX3420_UDC is not set +# CONFIG_USB_DUMMY_HCD is not set +# end of USB Peripheral Controller + +CONFIG_USB_LIBCOMPOSITE=y +CONFIG_USB_U_ETHER=y +CONFIG_USB_F_ECM=y +CONFIG_USB_F_EEM=y +CONFIG_USB_F_SUBSET=y +CONFIG_USB_F_RNDIS=y +# CONFIG_USB_CONFIGFS is not set + +# +# USB Gadget precomposed configurations +# +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +CONFIG_USB_ETH=y +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_ETH_EEM=y +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set +# CONFIG_USB_RAW_GADGET is not set +# end of USB Gadget precomposed configurations + +# CONFIG_TYPEC is not set +CONFIG_USB_ROLE_SWITCH=y +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=8 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +# CONFIG_MMC_CQHCI is not set +# CONFIG_MMC_HSQ is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +CONFIG_MMC_LS2K=y +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_CLASS_MULTICOLOR is not set +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set + +# +# LED drivers +# +# CONFIG_LEDS_AN30259A is not set +# CONFIG_LEDS_AW200XX is not set +# CONFIG_LEDS_AW2013 is not set +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_CR0014114 is not set +# CONFIG_LEDS_EL15203000 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3532 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_LM3692X is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP50XX is not set +# CONFIG_LEDS_LP55XX_COMMON is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_PCA995X is not set +# CONFIG_LEDS_DAC124S085 is not set +CONFIG_LEDS_PWM=y +# CONFIG_LEDS_BD2606MVV is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set +# CONFIG_LEDS_IS31FL32XX is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +# CONFIG_LEDS_SYSCON is not set +# CONFIG_LEDS_MLXREG is not set +# CONFIG_LEDS_USER is not set +# CONFIG_LEDS_SPI_BYTE is not set +# CONFIG_LEDS_LM3697 is not set + +# +# Flash and Torch LED drivers +# + +# +# RGB LED drivers +# + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_ONESHOT is not set +# CONFIG_LEDS_TRIGGER_MTD is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +# CONFIG_LEDS_TRIGGER_CPU is not set +# CONFIG_LEDS_TRIGGER_ACTIVITY is not set +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set +# CONFIG_LEDS_TRIGGER_PANIC is not set +# CONFIG_LEDS_TRIGGER_NETDEV is not set +# CONFIG_LEDS_TRIGGER_PATTERN is not set +CONFIG_LEDS_TRIGGER_AUDIO=y +# CONFIG_LEDS_TRIGGER_TTY is not set + +# +# Simple LED drivers +# +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set +# CONFIG_RTC_DRV_ABX80X is not set +CONFIG_RTC_DRV_DS1307=y +# CONFIG_RTC_DRV_DS1307_CENTURY is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_NCT3018Y is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF85363 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV3032 is not set +# CONFIG_RTC_DRV_RV8803 is not set +# CONFIG_RTC_DRV_SD3078 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set +# CONFIG_RTC_DRV_RX6110 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +CONFIG_RTC_DRV_EFI=y +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_CADENCE is not set +# CONFIG_RTC_DRV_FTRTC010 is not set +CONFIG_RTC_DRV_LOONGSON=y +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_GOLDFISH is not set +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_ACPI=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +# CONFIG_DW_AXI_DMAC is not set +# CONFIG_FSL_EDMA is not set +# CONFIG_INTEL_IDMA64 is not set +CONFIG_LOONGSON2_APB_DMA=y +# CONFIG_PLX_DMA is not set +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_XDMA is not set +# CONFIG_XILINX_ZYNQMP_DPDMA is not set +CONFIG_LSIA_DMA=y +# CONFIG_QCOM_HIDMA_MGMT is not set +# CONFIG_QCOM_HIDMA is not set +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set +# CONFIG_DW_EDMA is not set +# CONFIG_SF_PDMA is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +CONFIG_UDMABUF=y +# CONFIG_DMABUF_MOVE_NOTIFY is not set +# CONFIG_DMABUF_DEBUG is not set +# CONFIG_DMABUF_SELFTESTS is not set +CONFIG_DMABUF_HEAPS=y +# CONFIG_DMABUF_SYSFS_STATS is not set +CONFIG_DMABUF_HEAPS_SYSTEM=y +CONFIG_DMABUF_HEAPS_CMA=y +# end of DMABUF options + +CONFIG_UIO=y +# CONFIG_UIO_CIF is not set +CONFIG_UIO_PDRV_GENIRQ=y +CONFIG_UIO_DMEM_GENIRQ=y +# CONFIG_UIO_AEC is not set +# CONFIG_UIO_SERCOS3 is not set +# CONFIG_UIO_PCI_GENERIC is not set +# CONFIG_UIO_NETX is not set +# CONFIG_UIO_PRUSS is not set +# CONFIG_UIO_MF624 is not set +# CONFIG_VFIO is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO_ANCHOR=y +CONFIG_VIRTIO=y +# CONFIG_VIRTIO_MENU is not set +# CONFIG_VDPA is not set +# CONFIG_VHOST_MENU is not set + +# +# Microsoft Hyper-V guest support +# +# end of Microsoft Hyper-V guest support + +# CONFIG_GREYBUS is not set +# CONFIG_COMEDI is not set +# CONFIG_STAGING is not set +# CONFIG_LOONGARCH_PLATFORM_DEVICES is not set +# CONFIG_GOLDFISH is not set +CONFIG_HAVE_CLK=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y +# CONFIG_LMK04832 is not set +# CONFIG_COMMON_CLK_MAX9485 is not set +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_COMMON_CLK_CS2000_CP is not set +# CONFIG_COMMON_CLK_AXI_CLKGEN is not set +CONFIG_COMMON_CLK_LOONGSON2=y +# CONFIG_COMMON_CLK_PWM is not set +# CONFIG_COMMON_CLK_RS9_PCIE is not set +# CONFIG_COMMON_CLK_SI521XX is not set +# CONFIG_COMMON_CLK_VC3 is not set +# CONFIG_COMMON_CLK_VC5 is not set +# CONFIG_COMMON_CLK_VC7 is not set +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +CONFIG_COMMON_CLK_LOONGSON2X=y +# CONFIG_LOONGSON2_SYSCLK_HW_LOWFREQ is not set +# CONFIG_LOONGSON2_SYSCLK_HW_HIGFREQ is not set +CONFIG_LOONGSON2_SYSCLK_SOFT=y +# CONFIG_LOONGSON2_SYSCLK_HW_BYPASS is not set +# CONFIG_XILINX_VCU is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_HWSPINLOCK is not set + +# +# Clock Source drivers +# +# end of Clock Source drivers + +# CONFIG_MAILBOX is not set +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +# end of Generic IOMMU Pagetable Support + +CONFIG_IOMMU_DEBUGFS=y +# CONFIG_IOMMUFD is not set + +# +# Remoteproc drivers +# +# CONFIG_REMOTEPROC is not set +# end of Remoteproc drivers + +# +# Rpmsg drivers +# +# CONFIG_RPMSG_VIRTIO is not set +# end of Rpmsg drivers + +# CONFIG_SOUNDWIRE is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +# end of Amlogic SoC drivers + +# +# Broadcom SoC drivers +# +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# end of NXP/Freescale QorIQ SoC drivers + +# +# fujitsu SoC drivers +# +# end of fujitsu SoC drivers + +# +# i.MX SoC drivers +# +# end of i.MX SoC drivers + +# +# Enable LiteX SoC Builder specific drivers +# +# CONFIG_LITEX_SOC_CONTROLLER is not set +# end of Enable LiteX SoC Builder specific drivers + +CONFIG_LOONGSON2_GUTS=y +CONFIG_LOONGSON2_PM=y +# CONFIG_WPCM450_SOC is not set + +# +# Qualcomm SoC drivers +# +# end of Qualcomm SoC drivers + +# CONFIG_SOC_TI is not set + +# +# Xilinx SoC drivers +# +# end of Xilinx SoC drivers +# end of SOC (System On Chip) specific Drivers + +# CONFIG_PM_DEVFREQ is not set +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_FSA9480 is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_MAX3355 is not set +# CONFIG_EXTCON_PTN5150 is not set +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +# CONFIG_EXTCON_USB_GPIO is not set +# CONFIG_MEMORY is not set +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +# CONFIG_IIO_BUFFER_DMA is not set +# CONFIG_IIO_BUFFER_DMAENGINE is not set +# CONFIG_IIO_BUFFER_HW_CONSUMER is not set +CONFIG_IIO_KFIFO_BUF=y +CONFIG_IIO_TRIGGERED_BUFFER=y +# CONFIG_IIO_CONFIGFS is not set +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +# CONFIG_IIO_SW_DEVICE is not set +# CONFIG_IIO_SW_TRIGGER is not set +# CONFIG_IIO_TRIGGERED_EVENT is not set + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADXL313_I2C is not set +# CONFIG_ADXL313_SPI is not set +# CONFIG_ADXL345_I2C is not set +# CONFIG_ADXL345_SPI is not set +# CONFIG_ADXL355_I2C is not set +# CONFIG_ADXL355_SPI is not set +# CONFIG_ADXL367_SPI is not set +# CONFIG_ADXL367_I2C is not set +# CONFIG_ADXL372_SPI is not set +# CONFIG_ADXL372_I2C is not set +# CONFIG_BMA180 is not set +# CONFIG_BMA220 is not set +# CONFIG_BMA400 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_BMI088_ACCEL is not set +# CONFIG_DA280 is not set +# CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set +# CONFIG_DMARD09 is not set +# CONFIG_DMARD10 is not set +# CONFIG_FXLS8962AF_I2C is not set +# CONFIG_FXLS8962AF_SPI is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_IIO_KX022A_SPI is not set +# CONFIG_IIO_KX022A_I2C is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MC3230 is not set +# CONFIG_MMA7455_I2C is not set +# CONFIG_MMA7455_SPI is not set +# CONFIG_MMA7660 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MSA311 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_SCA3000 is not set +# CONFIG_SCA3300 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD4130 is not set +# CONFIG_AD7091R5 is not set +# CONFIG_AD7124 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7266 is not set +# CONFIG_AD7280 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7292 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7606_IFACE_PARALLEL is not set +# CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7766 is not set +# CONFIG_AD7768_1 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD7949 is not set +# CONFIG_AD799X is not set +# CONFIG_ADI_AXI_ADC is not set +# CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_HI8435 is not set +# CONFIG_HX711 is not set +# CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2471 is not set +# CONFIG_LTC2485 is not set +# CONFIG_LTC2496 is not set +# CONFIG_LTC2497 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX11100 is not set +# CONFIG_MAX1118 is not set +# CONFIG_MAX11205 is not set +# CONFIG_MAX11410 is not set +# CONFIG_MAX1241 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MAX9611 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_MCP3911 is not set +# CONFIG_NAU7802 is not set +# CONFIG_RICHTEK_RTQ6056 is not set +# CONFIG_SD_ADC_MODULATOR is not set +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADC084S021 is not set +# CONFIG_TI_ADC12138 is not set +# CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_TI_ADC161S626 is not set +# CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS7924 is not set +# CONFIG_TI_ADS1100 is not set +# CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8344 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS124S08 is not set +# CONFIG_TI_ADS131E08 is not set +# CONFIG_TI_LMP92064 is not set +# CONFIG_TI_TLC4541 is not set +# CONFIG_TI_TSC2046 is not set +# CONFIG_VF610_ADC is not set +# CONFIG_XILINX_XADC is not set +CONFIG_LS_2K300_ADC=y +# end of Analog to digital converters + +# +# Analog to digital and digital to analog converters +# +# CONFIG_AD74115 is not set +# CONFIG_AD74413R is not set +# end of Analog to digital and digital to analog converters + +# +# Analog Front Ends +# +# CONFIG_IIO_RESCALE is not set +# end of Analog Front Ends + +# +# Amplifiers +# +# CONFIG_AD8366 is not set +# CONFIG_ADA4250 is not set +# CONFIG_HMC425 is not set +# end of Amplifiers + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7746 is not set +# end of Capacitance to digital converters + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set +# CONFIG_BME680 is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_SCD30_CORE is not set +# CONFIG_SCD4X is not set +# CONFIG_SENSIRION_SGP30 is not set +# CONFIG_SENSIRION_SGP40 is not set +# CONFIG_SPS30_I2C is not set +# CONFIG_SENSEAIR_SUNRISE_CO2 is not set +# CONFIG_VZ89X is not set +# end of Chemical Sensors + +# +# Hid Sensor IIO Common +# +# end of Hid Sensor IIO Common + +# +# IIO SCMI Sensors +# +# end of IIO SCMI Sensors + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set +# end of SSP Sensor Common + +# +# Digital to analog converters +# +# CONFIG_AD3552R is not set +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5592R is not set +# CONFIG_AD5593R is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_LTC2688 is not set +# CONFIG_AD5686_SPI is not set +# CONFIG_AD5696_I2C is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5758 is not set +# CONFIG_AD5761 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5766 is not set +# CONFIG_AD5770R is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7293 is not set +# CONFIG_AD7303 is not set +# CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set +# CONFIG_DS4424 is not set +# CONFIG_LTC1660 is not set +# CONFIG_LTC2632 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5522 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4728 is not set +# CONFIG_MCP4922 is not set +# CONFIG_TI_DAC082S085 is not set +# CONFIG_TI_DAC5571 is not set +# CONFIG_TI_DAC7311 is not set +# CONFIG_TI_DAC7612 is not set +# CONFIG_VF610_DAC is not set +# end of Digital to analog converters + +# +# IIO dummy driver +# +# end of IIO dummy driver + +# +# Filters +# +# CONFIG_ADMV8818 is not set +# end of Filters + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set +# end of Clock Generator/Distribution + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set +# CONFIG_ADF4371 is not set +# CONFIG_ADF4377 is not set +# CONFIG_ADMV1013 is not set +# CONFIG_ADMV1014 is not set +# CONFIG_ADMV4420 is not set +# CONFIG_ADRF6780 is not set +# end of Phase-Locked Loop (PLL) frequency synthesizers +# end of Frequency Synthesizers DDS/PLL + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS290 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_FXAS21002C is not set +# CONFIG_MPU3050_I2C is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set +# end of Digital gyroscope sensors + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set +# end of Heart Rate Monitors +# end of Health Sensors + +# +# Humidity sensors +# +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HDC2010 is not set +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set +# end of Humidity sensors + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16460 is not set +# CONFIG_ADIS16475 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +# CONFIG_BOSCH_BNO055_I2C is not set +# CONFIG_FXOS8700_I2C is not set +# CONFIG_FXOS8700_SPI is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_ICM42600_I2C is not set +# CONFIG_INV_ICM42600_SPI is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set +# CONFIG_IIO_ST_LSM9DS0 is not set +# end of Inertial measurement units + +# +# Light sensors +# +# CONFIG_ACPI_ALS is not set +# CONFIG_ADJD_S311 is not set +# CONFIG_ADUX1020 is not set +# CONFIG_AL3010 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_AS73211 is not set +# CONFIG_BH1750 is not set +# CONFIG_BH1780 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set +# CONFIG_CM36651 is not set +# CONFIG_GP2AP002 is not set +# CONFIG_GP2AP020A00F is not set +# CONFIG_SENSORS_ISL29018 is not set +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_ROHM_BU27008 is not set +# CONFIG_ROHM_BU27034 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_LTRF216A is not set +# CONFIG_LV0104CS is not set +# CONFIG_MAX44000 is not set +# CONFIG_MAX44009 is not set +# CONFIG_NOA1305 is not set +# CONFIG_OPT3001 is not set +# CONFIG_OPT4001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_SI1133 is not set +# CONFIG_SI1145 is not set +# CONFIG_STK3310 is not set +# CONFIG_ST_UVIS25 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +# CONFIG_SENSORS_TSL2563 is not set +# CONFIG_TSL2583 is not set +# CONFIG_TSL2591 is not set +# CONFIG_TSL2772 is not set +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set +# CONFIG_VCNL4035 is not set +# CONFIG_VEML6030 is not set +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set +# CONFIG_ZOPT2201 is not set +# end of Light sensors + +# +# Magnetometer sensors +# +# CONFIG_AK8974 is not set +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN_I2C is not set +# CONFIG_BMC150_MAGN_SPI is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set +# CONFIG_SENSORS_RM3100_I2C is not set +# CONFIG_SENSORS_RM3100_SPI is not set +# CONFIG_TI_TMAG5273 is not set +# CONFIG_YAMAHA_YAS530 is not set +# end of Magnetometer sensors + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set +# end of Multiplexers + +# +# Inclinometer sensors +# +# end of Inclinometer sensors + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +# CONFIG_IIO_SYSFS_TRIGGER is not set +# end of Triggers - standalone + +# +# Linear and angular position sensors +# +# end of Linear and angular position sensors + +# +# Digital potentiometers +# +# CONFIG_AD5110 is not set +# CONFIG_AD5272 is not set +# CONFIG_DS1803 is not set +# CONFIG_MAX5432 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4018 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_MCP41010 is not set +# CONFIG_TPL0102 is not set +# CONFIG_X9250 is not set +# end of Digital potentiometers + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set +# end of Digital potentiostats + +# +# Pressure sensors +# +# CONFIG_ABP060MG is not set +# CONFIG_BMP280 is not set +# CONFIG_DLHL60D is not set +# CONFIG_DPS310 is not set +# CONFIG_HP03 is not set +# CONFIG_ICP10100 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +# CONFIG_MPL3115 is not set +# CONFIG_MPRLS0025PA is not set +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set +# end of Pressure sensors + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set +# end of Lightning sensors + +# +# Proximity and distance sensors +# +# CONFIG_IRSD200 is not set +# CONFIG_ISL29501 is not set +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_MB1232 is not set +# CONFIG_PING is not set +# CONFIG_RFD77402 is not set +# CONFIG_SRF04 is not set +# CONFIG_SX9310 is not set +# CONFIG_SX9324 is not set +# CONFIG_SX9360 is not set +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set +# CONFIG_VL53L0X_I2C is not set +# end of Proximity and distance sensors + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# end of Resolver to digital converters + +# +# Temperature sensors +# +# CONFIG_LTC2983 is not set +# CONFIG_MAXIM_THERMOCOUPLE is not set +# CONFIG_MLX90614 is not set +# CONFIG_MLX90632 is not set +# CONFIG_TMP006 is not set +# CONFIG_TMP007 is not set +# CONFIG_TMP117 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_MAX30208 is not set +# CONFIG_MAX31856 is not set +# CONFIG_MAX31865 is not set +# end of Temperature sensors + +# CONFIG_NTB is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_DEBUG is not set +# CONFIG_PWM_ATMEL_TCB is not set +# CONFIG_PWM_CLK is not set +# CONFIG_PWM_DWC is not set +# CONFIG_PWM_FSL_FTM is not set +CONFIG_PWM_LOONGSON=y +# CONFIG_PWM_PCA9685 is not set +# CONFIG_PWM_XILINX is not set + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +# CONFIG_AL_FIC is not set +# CONFIG_XILINX_INTC is not set +CONFIG_IRQ_LOONGARCH_CPU=y +CONFIG_LOONGSON_LIOINTC=y +CONFIG_LOONGSON_EIOINTC=y +CONFIG_LOONGSON_HTVEC=y +CONFIG_LOONGSON_PCH_PIC=y +CONFIG_LOONGSON_PCH_MSI=y +CONFIG_LOONGSON_PCH_LPC=y +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_SIMPLE is not set +# CONFIG_RESET_TI_SYSCON is not set +# CONFIG_RESET_TI_TPS380X is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +# CONFIG_PHY_CAN_TRANSCEIVER is not set + +# +# PHY drivers for Broadcom platforms +# +# CONFIG_BCM_KONA_USB2_PHY is not set +# end of PHY drivers for Broadcom platforms + +# CONFIG_PHY_CADENCE_TORRENT is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_CADENCE_DPHY_RX is not set +# CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_LAN966X_SERDES is not set +# CONFIG_PHY_CPCAP_USB is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set +# CONFIG_PHY_QCOM_USB_HS is not set +# CONFIG_PHY_QCOM_USB_HSIC is not set +# CONFIG_PHY_SAMSUNG_USB2 is not set +# CONFIG_PHY_TUSB1210 is not set +# end of PHY Subsystem + +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +# end of Performance monitor support + +# CONFIG_RAS is not set +# CONFIG_USB4 is not set + +# +# Android +# +# CONFIG_ANDROID_BINDER_IPC is not set +# end of Android + +# +# Vendor Hooks +# +# end of Vendor Hooks + +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y + +# +# Layout Types +# +# CONFIG_NVMEM_LAYOUT_SL28_VPD is not set +# CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set +# end of Layout Types + +# CONFIG_NVMEM_RMEM is not set +# CONFIG_NVMEM_U_BOOT_ENV is not set + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# end of HW tracing support + +# CONFIG_FPGA is not set +# CONFIG_FSI is not set +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set +# CONFIG_INTERCONNECT is not set +# CONFIG_COUNTER is not set +# CONFIG_MOST is not set +# CONFIG_PECI is not set +# CONFIG_HTE is not set + +# +# CPU Inspect +# +# CONFIG_CPU_INSPECT is not set +# end of CPU Inspect +# end of Device Drivers + +# +# File systems +# +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y +CONFIG_BUFFER_HEAD=y +CONFIG_LEGACY_DIRECT_IO=y +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_DEBUG is not set +# CONFIG_EXT4_ERROR_REPORT is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_ZONEFS_FS is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +CONFIG_EXPORTFS_BLOCK_OPS=y +CONFIG_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +# CONFIG_QUOTA_DEBUG is not set +# CONFIG_QFMT_V1 is not set +# CONFIG_QFMT_V2 is not set +CONFIG_QUOTACTL=y +CONFIG_AUTOFS_FS=y +# CONFIG_FUSE_FS is not set +CONFIG_OVERLAY_FS=y +CONFIG_OVERLAY_FS_REDIRECT_DIR=y +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +CONFIG_OVERLAY_FS_INDEX=y +CONFIG_OVERLAY_FS_XINO_AUTO=y +CONFIG_OVERLAY_FS_METACOPY=y +# CONFIG_OVERLAY_FS_DEBUG is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +# CONFIG_UDF_FS is not set +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/EXFAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=936 +CONFIG_FAT_DEFAULT_IOCHARSET="gb2312" +# CONFIG_FAT_DEFAULT_UTF8 is not set +CONFIG_EXFAT_FS=y +CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" +# CONFIG_NTFS_FS is not set +CONFIG_NTFS3_FS=y +CONFIG_NTFS3_64BIT_CLUSTER=y +CONFIG_NTFS3_LZX_XPRESS=y +# CONFIG_NTFS3_FS_POSIX_ACL is not set +# end of DOS/FAT/EXFAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_PROC_CHILDREN=y +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_DIRTY_PAGES=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_TMPFS_INODE64 is not set +# CONFIG_TMPFS_QUOTA is not set +CONFIG_ARCH_SUPPORTS_HUGETLBFS=y +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +# CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP_DEFAULT_ON is not set +# CONFIG_HUGETLB_ALLOC_LIMIT is not set +CONFIG_CONFIGFS_FS=y +CONFIG_EFIVAR_FS=m +# end of Pseudo filesystems + +# CONFIG_MISC_FILESYSTEMS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +# CONFIG_NFS_SWAP is not set +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_FLEXFILE_LAYOUT=y +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +CONFIG_NFS_V4_SECURITY_LABEL=y +CONFIG_ROOT_NFS=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFS_DISABLE_UDP_SUPPORT is not set +CONFIG_NFS_V4_2_READ_PLUS=y +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_NFS_V4_2_SSC_HELPER=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_SMB_SERVER is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +CONFIG_NLS_CODEPAGE_936=y +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set +# CONFIG_UNICODE is not set +CONFIG_IO_WQ=y +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_REQUEST_CACHE is not set +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +CONFIG_KEY_DH_OPERATIONS=y +# CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +CONFIG_SECURITY_NETWORK=y +# CONFIG_SECURITY_NETWORK_XFRM is not set +CONFIG_SECURITY_PATH=y +CONFIG_LSM_MMAP_MIN_ADDR=65536 +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_SECURITY_SELINUX_DEVELOP=y +CONFIG_SECURITY_SELINUX_AVC_STATS=y +CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS=9 +CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE=256 +# CONFIG_SECURITY_SELINUX_DEBUG is not set +# CONFIG_SECURITY_SMACK is not set +# CONFIG_SECURITY_TOMOYO is not set +CONFIG_SECURITY_APPARMOR=y +# CONFIG_SECURITY_APPARMOR_DEBUG is not set +CONFIG_SECURITY_APPARMOR_INTROSPECT_POLICY=y +CONFIG_SECURITY_APPARMOR_HASH=y +CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y +CONFIG_SECURITY_APPARMOR_EXPORT_BINARY=y +CONFIG_SECURITY_APPARMOR_PARANOID_LOAD=y +# CONFIG_SECURITY_LOADPIN is not set +CONFIG_SECURITY_YAMA=y +# CONFIG_SECURITY_SAFESETID is not set +# CONFIG_SECURITY_LOCKDOWN_LSM is not set +# CONFIG_SECURITY_LANDLOCK is not set +CONFIG_INTEGRITY=y +# CONFIG_INTEGRITY_SIGNATURE is not set +CONFIG_INTEGRITY_AUDIT=y +# CONFIG_IMA is not set +# CONFIG_EVM is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_APPARMOR is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,bpf" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_CC_HAS_AUTO_VAR_INIT_PATTERN=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO_BARE=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y +# CONFIG_INIT_STACK_NONE is not set +# CONFIG_INIT_STACK_ALL_PATTERN is not set +CONFIG_INIT_STACK_ALL_ZERO=y +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y +# CONFIG_ZERO_CALL_USED_REGS is not set +# end of Memory initialization + +# +# Hardening of kernel data structures +# +# CONFIG_LIST_HARDENED is not set +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# end of Hardening of kernel data structures + +CONFIG_RANDSTRUCT_NONE=y +# CONFIG_RANDSTRUCT_FULL is not set +# CONFIG_RANDSTRUCT_PERFORMANCE is not set +# end of Kernel hardening options + +# CONFIG_SECURITY_BOOT_INIT is not set +# end of Security options + +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SIG2=y +CONFIG_CRYPTO_SKCIPHER=y +CONFIG_CRYPTO_SKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_USER=m +# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set +# CONFIG_CRYPTO_MANAGER_EXTRA_TESTS is not set +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_CRYPTD=m +CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_ENGINE=m +# end of Crypto core or helper + +# +# Public-key cryptography +# +CONFIG_CRYPTO_RSA=y +CONFIG_CRYPTO_DH=y +# CONFIG_CRYPTO_DH_RFC7919_GROUPS is not set +CONFIG_CRYPTO_ECC=y +CONFIG_CRYPTO_ECDH=y +# CONFIG_CRYPTO_ECDSA is not set +# CONFIG_CRYPTO_ECRDSA is not set +# CONFIG_CRYPTO_SM2 is not set +# CONFIG_CRYPTO_CURVE25519 is not set +# end of Public-key cryptography + +# +# Block ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +CONFIG_CRYPTO_ANUBIS=m +# CONFIG_CRYPTO_ARIA is not set +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_BLOWFISH_COMMON=m +# CONFIG_CRYPTO_CAMELLIA is not set +CONFIG_CRYPTO_CAST_COMMON=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_SEED=m +CONFIG_CRYPTO_SERPENT=m +# CONFIG_CRYPTO_SM4_GENERIC is not set +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m +# end of Block ciphers + +# +# Length-preserving ciphers and modes +# +# CONFIG_CRYPTO_ADIANTUM is not set +# CONFIG_CRYPTO_ARC4 is not set +CONFIG_CRYPTO_CHACHA20=m +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_HCTR2 is not set +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# end of Length-preserving ciphers and modes + +# +# AEAD (authenticated encryption with associated data) ciphers +# +# CONFIG_CRYPTO_AEGIS128 is not set +CONFIG_CRYPTO_CHACHA20POLY1305=m +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_GENIV=y +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_ECHAINIV=y +CONFIG_CRYPTO_ESSIV=m +# end of AEAD (authenticated encryption with associated data) ciphers + +# +# Hashes, digests, and MACs +# +CONFIG_CRYPTO_BLAKE2B=m +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_GHASH=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=m +# CONFIG_CRYPTO_MICHAEL_MIC is not set +CONFIG_CRYPTO_POLY1305=m +# CONFIG_CRYPTO_RMD160 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_SHA3=y +# CONFIG_CRYPTO_SM3_GENERIC is not set +# CONFIG_CRYPTO_STREEBOG is not set +CONFIG_CRYPTO_VMAC=m +CONFIG_CRYPTO_WP512=m +# CONFIG_CRYPTO_XCBC is not set +CONFIG_CRYPTO_XXHASH=y +# end of Hashes, digests, and MACs + +# +# CRCs (cyclic redundancy checks) +# +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRC32=m +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_CRC64_ROCKSOFT=y +# end of CRCs (cyclic redundancy checks) + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=m +CONFIG_CRYPTO_842=m +CONFIG_CRYPTO_LZ4=m +CONFIG_CRYPTO_LZ4HC=m +CONFIG_CRYPTO_ZSTD=y +# end of Compression + +# +# Random number generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set +CONFIG_CRYPTO_KDF800108_CTR=y +# end of Random number generation + +# +# Userspace interface +# +CONFIG_CRYPTO_USER_API=m +CONFIG_CRYPTO_USER_API_HASH=m +CONFIG_CRYPTO_USER_API_SKCIPHER=m +CONFIG_CRYPTO_USER_API_RNG=m +# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set +CONFIG_CRYPTO_USER_API_AEAD=m +CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y +# CONFIG_CRYPTO_STATS is not set +# end of Userspace interface + +CONFIG_CRYPTO_HASH_INFO=y + +# +# Accelerated Cryptographic Algorithms for CPU (loongarch) +# +# CONFIG_CRYPTO_CRC32_LOONGARCH is not set +# end of Accelerated Cryptographic Algorithms for CPU (loongarch) + +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set +# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +# CONFIG_CRYPTO_DEV_QAT_DH895xCC is not set +# CONFIG_CRYPTO_DEV_QAT_C3XXX is not set +# CONFIG_CRYPTO_DEV_QAT_C62X is not set +# CONFIG_CRYPTO_DEV_QAT_4XXX is not set +# CONFIG_CRYPTO_DEV_QAT_420XX is not set +# CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set +# CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set +# CONFIG_CRYPTO_DEV_QAT_C62XVF is not set +CONFIG_CRYPTO_DEV_VIRTIO=m +# CONFIG_CRYPTO_DEV_SAFEXCEL is not set +# CONFIG_CRYPTO_DEV_CCREE is not set +# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set +# CONFIG_FIPS_SIGNATURE_SELFTEST is not set +# CONFIG_PGP_LIBRARY is not set +# CONFIG_PGP_KEY_PARSER is not set +# CONFIG_PGP_PRELOAD is not set + +# +# Certificates for signature checking +# +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +# CONFIG_SECONDARY_TRUSTED_KEYRING is not set +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +# CONFIG_PGP_PRELOAD_PUBLIC_KEYS is not set +# end of Certificates for signature checking + +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +# CONFIG_PACKING is not set +CONFIG_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +# CONFIG_CORDIC is not set +# CONFIG_PRIME_NUMBERS is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_LIB_ARC4=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m +CONFIG_CRYPTO_LIB_CHACHA=m +CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519=m +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 +CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m +CONFIG_CRYPTO_LIB_POLY1305=m +CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_SHA256=y +# end of Crypto library routines + +CONFIG_CRC_CCITT=m +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC64_ROCKSOFT=y +CONFIG_CRC_ITU_T=m +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +CONFIG_CRC64=y +# CONFIG_CRC4 is not set +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=m +# CONFIG_CRC8 is not set +CONFIG_XXHASH=y +CONFIG_AUDIT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_842_COMPRESS=m +CONFIG_842_DECOMPRESS=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=m +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_COMPRESS=m +CONFIG_LZ4HC_COMPRESS=m +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +# CONFIG_XZ_DEC_POWERPC is not set +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_SPARC is not set +# CONFIG_XZ_DEC_MICROLZMA is not set +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_DECOMPRESS_ZSTD=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=m +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_XARRAY_MULTI=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_SWIOTLB=y +# CONFIG_SWIOTLB_DYNAMIC is not set +# CONFIG_DMA_RESTRICTED_POOL is not set +CONFIG_DMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=0 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_DMA_MAP_BENCHMARK is not set +CONFIG_SGL_ALLOC=y +# CONFIG_FORCE_NR_CPUS is not set +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_CLZ_TAB=y +CONFIG_IRQ_POLL=y +CONFIG_MPILIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_UCS2_STRING=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_SG_POOL=y +CONFIG_ARCH_STACKWALK=y +CONFIG_STACKDEPOT=y +CONFIG_SBITMAP=y +# end of Library routines + +CONFIG_GENERIC_IOREMAP=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +# CONFIG_STACKTRACE_BUILD_ID is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +CONFIG_DYNAMIC_DEBUG=y +CONFIG_DYNAMIC_DEBUG_CORE=y +CONFIG_SYMBOLIC_ERRNAME=y +CONFIG_DEBUG_BUGVERBOSE=y +# end of printk and dmesg options + +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_MISC=y + +# +# Compile-time checks and compiler options +# +CONFIG_AS_HAS_NON_CONST_LEB128=y +CONFIG_DEBUG_INFO_NONE=y +# CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_DEBUG_INFO_DWARF5 is not set +CONFIG_FRAME_WARN=2048 +CONFIG_STRIP_ASM_SYMS=y +# CONFIG_READABLE_ASM is not set +# CONFIG_HEADERS_INSTALL is not set +# CONFIG_OPTIMIZE_INLINING is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +# CONFIG_VMLINUX_MAP is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# end of Compile-time checks and compiler options + +# +# Generic Kernel Debugging Instruments +# +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_FS_ALLOW_ALL=y +# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set +# CONFIG_DEBUG_FS_ALLOW_NONE is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_KCSAN_COMPILER=y +# end of Generic Kernel Debugging Instruments + +# +# Networking Debugging +# +# CONFIG_NET_DEV_REFCNT_TRACKER is not set +# CONFIG_NET_NS_REFCNT_TRACKER is not set +# CONFIG_DEBUG_NET is not set +# end of Networking Debugging + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_PAGE_OWNER is not set +# CONFIG_PAGE_POISONING is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SHRINKER_DEBUG is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_DEBUG_STACKOVERFLOW=y +# CONFIG_DEBUG_STACKOVERFLOW is not set +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_ARCH_DISABLE_KASAN_INLINE=y +CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y +# CONFIG_KASAN is not set +CONFIG_HAVE_ARCH_KFENCE=y +# CONFIG_KFENCE is not set +# end of Memory Debugging + +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Oops, Lockups and Hangs +# +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +# CONFIG_SOFTLOCKUP_DETECTOR is not set +CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y +# CONFIG_HARDLOCKUP_DETECTOR is not set +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_WQ_CPU_INTENSIVE_REPORT is not set +# CONFIG_TEST_LOCKUP is not set +# end of Debug Oops, Lockups and Hangs + +# +# Scheduler Debugging +# +# CONFIG_SCHED_DEBUG is not set +CONFIG_SCHED_INFO=y +CONFIG_SCHEDSTATS=y +# end of Scheduler Debugging + +# CONFIG_DEBUG_TIMEKEEPING is not set +# CONFIG_DEBUG_PREEMPT is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_SCF_TORTURE_TEST is not set +# CONFIG_CSD_LOCK_WAIT_DEBUG is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +# CONFIG_DEBUG_IRQFLAGS is not set +CONFIG_STACKTRACE=y +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set + +# +# Debug kernel data structures +# +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PLIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_MAPLE_TREE is not set +# end of Debug kernel data structures + +# +# RCU Debugging +# +# CONFIG_RCU_SCALE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_REF_SCALE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 +# CONFIG_RCU_CPU_STALL_CPUTIME is not set +CONFIG_RCU_TRACE=y +# CONFIG_RCU_EQS_DEBUG is not set +# end of RCU Debugging + +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +CONFIG_USER_STACKTRACE_SUPPORT=y +CONFIG_HAVE_RETHOOK=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACE_CLOCK=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_SAMPLE_FTRACE_DIRECT=y +CONFIG_HAVE_SAMPLE_FTRACE_DIRECT_MULTI=y +# CONFIG_STRICT_DEVMEM is not set + +# +# loongarch Debugging +# +# CONFIG_UNWINDER_GUESS is not set +CONFIG_UNWINDER_PROLOGUE=y +# end of loongarch Debugging + +# +# Kernel Testing and Coverage +# +# CONFIG_KUNIT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set +CONFIG_RUNTIME_TESTING_MENU=y +# CONFIG_TEST_DHRY is not set +# CONFIG_LKDTM is not set +# CONFIG_TEST_MIN_HEAP is not set +# CONFIG_TEST_DIV64 is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_TEST_REF_TRACKER is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_REED_SOLOMON_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_STRING_SELFTEST is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_SCANF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_XARRAY is not set +# CONFIG_TEST_MAPLE_TREE is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_IDA is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_BITOPS is not set +# CONFIG_TEST_VMALLOC is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_BLACKHOLE_DEV is not set +# CONFIG_FIND_BIT_BENCHMARK is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_DYNAMIC_DEBUG is not set +# CONFIG_TEST_KMOD is not set +# CONFIG_TEST_MEMCAT_P is not set +# CONFIG_TEST_MEMINIT is not set +# CONFIG_TEST_FREE_PAGES is not set +# end of Kernel Testing and Coverage + +# +# Rust hacking +# +# end of Rust hacking +# end of Kernel hacking + +# CONFIG_KWORKER_NUMA_AFFINITY is not set diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/loongson-2k0300.dtsi b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/loongson-2k0300.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..88a3bca218c8e770da66f16fefe48766de375bdb --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/loongson-2k0300.dtsi @@ -0,0 +1,1068 @@ +/dts-v1/; +#include +#include +#include +#include +#include +#include + +/ { + model = "loongson,generic"; + compatible = "loongson,loongson3"; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; + serial6 = &uart6; + serial7 = &uart7; + serial8 = &uart8; + serial9 = &uart9; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + spi3 = &spi3; + ethernet0 = &gmac0; + ethernet1 = &gmac1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + }; + }; + + cpu0: cpu@10000 { + device_type = "cpu"; + compatible = "loongarch"; + reg=<0>; + numa-node-id = <0>; + }; + + }; + + cpuintc: interrupt-controller { + compatible = "loongson,cpu-interrupt-controller"; + interrupt-controller; + #interrupt-cells = <1>; + }; + + liointc0: icu0 { + compatible = "loongson,liointc-2.0"; + reg = <0 0x16001400 0 0x40>, + <0 0x16001040 0 0x8>; + reg-names = "main", "isr0"; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&cpuintc>; + interrupts = <2>; + interrupt-names = "int0"; + + loongson,parent_int_map = <0xffffffff>, /* int0 */ + <0x00000000>, /* int1 */ + <0x00000000>, /* int2 */ + <0x00000000>; /* int3 */ + }; + + liointc1: icu1 { + compatible = "loongson,liointc-2.0"; + reg = <0 0x16001440 0 0x40>, + <0 0x16001048 0 0x8>; + reg-names = "main", "isr0"; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&cpuintc>; + interrupts = <4>; + interrupt-names = "int2"; + + loongson,parent_int_map = <0x00000000>, /* int0 */ + <0x00000000>, /* int1 */ + <0xffffffff>, /* int2 */ + <0x00000000>; /* int3 */ + }; + + // icu: interrupt-controller@16001400 { + // compatible = "loongson,2k500-icu"; + // interrupt-controller; + // #interrupt-cells = <1>; + // reg = <0 0x16001400 0 0x40 + // 0 0x16001040 0 16>; + // interrupt-parent = <&cpuic>; + // interrupt-names = "cascade"; + // interrupts = <4>; + // }; + + // extioiic: interrupt-controller@16000100 { + // compatible = "loongson,extioi-interrupt-controller"; + // interrupt-controller; + // #interrupt-cells = <1>; + // interrupt-parent = <&cpuic>; + // interrupts = <3>; + // interrupt-names = "cascade"; + // vec_count=<128>; + // misc_func=<0x100>; + // eio_en_off=<27>; + // default-irq-domain; + // }; + + pinmux: pinmux@16000490 { + compatible = "pinctrl-single"; + reg = <0 0x16000490 0 0x20>; + #address-cells = <1>; + #size-cells = <0>; + #pinctrl-cells = <2>; + pinctrl-single,bit-per-mux; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x3>; + + uart1_pins: pinmux_G42_G43_as_uart1 { + pinctrl-single,bits = <0x8 0x00f00000 0x00f00000>; + }; + + uart2_pins: pinmux_G44_G45_as_uart2 { + pinctrl-single,bits = <0x8 0x0f000000 0x0f000000>; + }; + + uart3_pins: pinmux_G46_G47_as_uart3 { + pinctrl-single,bits = <0x8 0xf0000000 0xf0000000>; + }; + + uart4_pins: pinmux_G62_G63_as_uart4 { + pinctrl-single,bits = <0xc 0xa0000000 0xf0000000>; + }; + + uart5_pins: pinmux_G64_G65_as_uart5 { + pinctrl-single,bits = <0x10 0x0000000a 0x0000000f>; + }; + + uart6_pins: pinmux_G60_G61_as_uart6 { + pinctrl-single,bits = <0xc 0x0a000000 0x0f000000>; + }; + + uart7_pins: pinmux_G68_G69_as_uart7 { + pinctrl-single,bits = <0x10 0x00000a00 0x00000f00>; + }; + + uart8_pins: pinmux_G70_G71_as_uart8 { + pinctrl-single,bits = <0x10 0x0000a000 0x0000f000>; + }; + + uart9_pins: pinmux_G66_G67_as_uart9 { + pinctrl-single,bits = <0x10 0x000000a0 0x000000f0>; + }; + + gmac1_pins: pinmux_G44_G55_as_gmac1 { + pinctrl-single,bits = <0x8 0x55000000 0xff000000 + 0xc 0x00005555 0x0000ffff>; + }; + i2c0_pins: pinmux_G48_G49_as_i2c0 { + pinctrl-single,bits = <0xc 0x0000000f 0x0000000f>; + }; + + i2c1_pins: pinmux_G50_G51_as_i2c1 { + pinctrl-single,bits = <0xc 0x000000f0 0x000000f0>; + }; + + i2c1_as_gpio: pinmux_G50_G51_as_gpio { + pinctrl-single,bits = <0xc 0x00000000 0x000000f0>; + }; + + i2c2_pins: pinmux_G52_G53_as_i2c2 { + pinctrl-single,bits = <0xc 0x00000f00 0x00000f00>; + }; + + i2c2_G82_G83_pins: pinmux_G82_G83_as_i2c2 { + pinctrl-single,bits = <0x14 0x000000a0 0x000000f0>; + }; + + i2c3_pins: pinmux_G54_G55_as_i2c3 { + pinctrl-single,bits = <0xc 0x0000f000 0x0000f000>; + }; + + i2c3_G84_G85_pins: pinmux_G84_G85_as_i2c3 { + pinctrl-single,bits = <0x14 0x00000a00 0x000000f00>; + }; + + spi1_pins: pinmux_G60_G63_as_spi1 { + pinctrl-single,bits = <0xc 0xff000000 0xff000000>; + }; + + spi2_pins: pinmux_G64_G67_as_spi2 { + pinctrl-single,bits = <0x10 0x000000ff 0x000000ff>; + }; + + spi2_cs_as_gpio: pinmux_G64_G66_as_spi2 { + pinctrl-single,bits = <0x10 0x0000003f 0x000000ff>; + }; + + can0_pins: pinmux_G68_G69_as_can0 { + pinctrl-single,bits = <0x10 0x00000f00 0x00000f00>; + }; + + can0_as_gpio_pins: pinmux_G68_G69_as_gpio { + pinctrl-single,bits = <0x10 0x00000000 0x00000f00>; + }; + + can1_pins: pinmux_G70_G71_as_can1 { + pinctrl-single,bits = <0x10 0x0000f000 0x0000f000>; + }; + + can1_as_gpio_pins: pinmux_G70_G71_as_gpio { + pinctrl-single,bits = <0x10 0x00000000 0x0000f000>; + }; + + can2_pins: pinmux_G72_G73_as_can2 { + pinctrl-single,bits = <0x10 0x000f0000 0x000f0000>; + }; + + can2_as_gpio_pins: pinmux_G72_G73_as_gpio { + pinctrl-single,bits = <0x10 0x00000000 0x000f0000>; + }; + + can3_pins: pinmux_G74_G75_as_can3 { + pinctrl-single,bits = <0x10 0x00f00000 0x00f00000>; + }; + + can3_as_gpio_pins: pinmux_G74_G75_as_gpio { + pinctrl-single,bits = <0x10 0x00000000 0x00f00000>; + }; + + i2s_pins: pinmux_G76_G80_as_i2s { + pinctrl-single,bits = <0x10 0xff000000 0xff000000 + 0x14 0x00000003 0x00000003>; + }; + + atim1_pin: atim1-pin { + atim1_pin_m0: pinmux_G28_as_atim1 { + pinctrl-single,bits = <0x4 0x02000000 0x03000000>; + }; + atim1_pin_m1: pinmux_G81_as_atim1 { + pinctrl-single,bits = <0x14 0x0000000c 0x0000000c>; + }; + }; + + atim2_pin: atim2-pin { + atim2_pin_m0: pinmux_G29_as_atim1 { + pinctrl-single,bits = <0x4 0x08000000 0x0c000000>; + }; + atim2_pin_m1: pinmux_G82_as_atim1 { + pinctrl-single,bits = <0x14 0x00000030 0x00000030>; + }; + }; + + atim3_pin: atim3-pin { + atim3_pin_m0: pinmux_G30_as_atim3 { + pinctrl-single,bits = <0x4 0x20000000 0x30000000>; + }; + atim3_pin_m1: pinmux_G83_as_atim3 { + pinctrl-single,bits = <0x14 0x000000c0 0x000000c0>; + }; + }; + + atim1n_pin: atim1n-pin { + atim1n_pin_m0: pinmux_G31_as_atim1n { + pinctrl-single,bits = <0x4 0x80000000 0xc0000000>; + }; + atim1n_pin_m1: pinmux_G84_as_atim1n { + pinctrl-single,bits = <0x14 0x00000300 0x00000300>; + }; + }; + + atim2n_pin: atim2n-pin { + atim2n_pin_m0: pinmux_G32_as_atim1n { + pinctrl-single,bits = <0x8 0x00000002 0x00000003>; + }; + atim2n_pin_m1: pinmux_G85_as_atim1n { + pinctrl-single,bits = <0x14 0x00000c00 0x00000c00>; + }; + }; + + atim3n_pin: atim3n-pin { + atim3n_pin_m0: pinmux_G33_as_atim1n { + pinctrl-single,bits = <0x8 0x00000008 0x0000000c>; + }; + atim3n_pin_m1: pinmux_G86_as_atim1n { + pinctrl-single,bits = <0x14 0x00003000 0x00003000>; + }; + }; + + atim4_pin: atim4-pin { + atim4_pin_m0: pinmux_G76_as_atim4 { + pinctrl-single,bits = <0x10 0x01000000 0x03000000>; + }; + atim4_pin_m1: pinmux_G101_as_atim4 { + pinctrl-single,bits = <0x18 0x00000400 0x00000c00>; + }; + }; + + gtim1_pin: gtim1-pin { + gtim1_pin_m0: pinmux_G34_as_gtim1 { + pinctrl-single,bits = <0x8 0x00000020 0x00000030>; + }; + gtim1_pin_m1: pinmux_G87_as_gtim1 { + pinctrl-single,bits = <0x14 0x0000c000 0x0000c000>; + }; + }; + + gtim2_pin: gtim2-pin { + gtim2_pin_m0: pinmux_G35_as_gtim1 { + pinctrl-single,bits = <0x8 0x00000080 0x000000c0>; + }; + gtim2_pin_m1: pinmux_G88_as_gtim1 { + pinctrl-single,bits = <0x14 0x00030000 0x00030000>; + }; + }; + + gtim3_pin: gtim3-pin { + gtim3_pin_m0: pinmux_G36_as_gtim3 { + pinctrl-single,bits = <0x8 0x00000200 0x00000300>; + }; + gtim3_pin_m1: pinmux_G89_as_gtim3 { + pinctrl-single,bits = <0x14 0x000c0000 0x000c0000>; + }; + }; + + gtim4_pin: gtim4-pin { + gtim4_pin_m0: pinmux_G77_as_gtim4 { + pinctrl-single,bits = <0x10 0x04000000 0x0c000000>; + }; + gtim4_pin_m1: pinmux_G102_as_gtim4 { + pinctrl-single,bits = <0x18 0x00001000 0x00003000>; + }; + }; + + pwm0_pins: pinmux_G86_as_pwm0 { + pinctrl-single,bits = <0x14 0x00002000 0x00003000>; + }; + + pwm1_pins: pinmux_G87_as_pwm1 { + pinctrl-single,bits = <0x14 0x00008000 0x0000c000>; + }; + + pwm2_pins: pinmux_G88_as_pwm2 { + pinctrl-single,bits = <0x14 0x00020000 0x00030000>; + }; + + pwm3_pins: pinmux_G89_as_pwm3 { + pinctrl-single,bits = <0x14 0x00080000 0x000c0000>; + }; + + tim1_ch1:pinmux_G81_as_tim1_ch1 { + pinctrl-single,bits = <0x14 0x0000000c 0x0000000c>; + }; + + tim1_ch1n:pinmux_G84_as_tim1_ch1n { + pinctrl-single,bits = <0x14 0x00000300 0x000000300>; + }; + + tim1_ch2n:pinmux_G85_as_tim1_ch2n { + pinctrl-single,bits = <0x14 0x00000c00 0x000000c00>; + }; + + tim1_ch3n:pinmux_G86_as_tim1_ch3n { + pinctrl-single,bits = <0x14 0x00003000 0x000003000>; + }; + + tim2_ch1:pinmux_G87_as_tim2_ch1 { + pinctrl-single,bits = <0x14 0x0000c000 0x00000c000>; + }; + + tim2_ch2:pinmux_G88_as_tim2_ch2 { + pinctrl-single,bits = <0x14 0x00030000 0x00030000>; + }; + + sdio0_pins: pinmux_G90_G99_as_sdio { + pinctrl-single,bits = <0x14 0xfff00000 0xfff00000 + 0x18 0x000000ff 0x000000ff>; + }; + + sdio1_pins: pinmux_G100_G105_as_sdio { + pinctrl-single,bits = <0x18 0x000fff00 0x000fff00>; + }; + }; + + soc: 2k300-soc { + compatible = "ls,nbus", "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0 0x10000000 0 0x10000000 0 0x10000000 + 0 0x2000000 0 0x2000000 0 0x4000000 + 0 0x40000000 0 0x40000000 0 0x40000000 + 0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>; + + osc_clk: osc-clock { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <120000000>; + clock-output-names = "ref_clk"; + }; + + clocks:clock-controller@0x16000400{ + compatible = "loongson,ls2k300-clk"; + reg = <0 0x16000400 0 0x28>; + clocks = <&osc_clk>; + clock-names = "ref_clk"; + #clock-cells = <1>; + }; + + isa@16400000 { + compatible = "isa"; + #size-cells = <1>; + #address-cells = <2>; + ranges = <1 0 0 0x16400000 0x4000>; + }; + + uart0: serial@0x16100000 { + compatible = "ns16550a"; + reg = <0 0x16100000 0 0x10>; + clock-frequency = <200000000>; + interrupt-parent = <&liointc0>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + }; + + uart1: serial@0x16100400 { + compatible = "ns16550a"; + reg = <0 0x16100400 0 0x10>; + clock-frequency = <200000000>; + interrupt-parent = <&liointc0>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + pinctrl-0 = <&uart1_pins>; + pinctrl-names = "default"; + status = "disabled"; + }; + + uart2: serial@0x16100800 { + compatible = "ns16550a"; + reg = <0 0x16100800 0 0x10>; + clock-frequency = <200000000>; + interrupt-parent = <&liointc0>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + pinctrl-0 = <&uart2_pins>; + pinctrl-names = "default"; + status = "disabled"; + }; + + uart3: serial@0x16100c00 { + compatible = "ns16550a"; + reg = <0 0x16100c00 0 0x10>; + clock-frequency = <200000000>; + interrupt-parent = <&liointc0>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + pinctrl-0 = <&uart3_pins>; + pinctrl-names = "default"; + status = "disabled"; + }; + + uart4: serial@0x16101000 { + compatible = "ns16550a"; + reg = <0 0x16101000 0 0x10>; + clock-frequency = <200000000>; + interrupt-parent = <&liointc0>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&uart4_pins>; + pinctrl-names = "default"; + no-loopback-test; + status = "disabled"; + }; + + uart5: serial@0x16101400 { + compatible = "ns16550a"; + reg = <0 0x16101400 0 0x10>; + clock-frequency = <200000000>; + interrupt-parent = <&liointc0>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + pinctrl-0 = <&uart5_pins>; + pinctrl-names = "default"; + status = "disabled"; + }; + + uart6: serial@0x16101800 { + compatible = "ns16550a"; + reg = <0 0x16101800 0 0x10>; + clock-frequency = <200000000>; + interrupt-parent = <&liointc0>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + pinctrl-0 = <&uart6_pins>; + pinctrl-names = "default"; + status = "disabled"; + }; + + uart7: serial@0x16101c00 { + compatible = "ns16550a"; + reg = <0 0x16101c00 0 0x10>; + clock-frequency = <200000000>; + interrupt-parent = <&liointc0>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + pinctrl-0 = <&uart7_pins>; + pinctrl-names = "default"; + status = "disabled"; + }; + + uart8: serial@0x16102000 { + compatible = "ns16550a"; + reg = <0 0x16102000 0 0x10>; + clock-frequency = <200000000>; + interrupt-parent = <&liointc0>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + pinctrl-0 = <&uart8_pins>; + pinctrl-names = "default"; + status = "disabled"; + }; + + uart9: serial@0x16102400 { + compatible = "ns16550a"; + reg = <0 0x16102400 0 0x10>; + clock-frequency = <200000000>; + interrupt-parent = <&liointc0>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + pinctrl-0 = <&uart9_pins>; + pinctrl-names = "default"; + status = "disabled"; + }; + + + dc: dc@0x16090000 { + compatible = "loongson,ls2k0300-dc"; + reg = <0 0x16090000 0 0x00010000>; + interrupt-parent = <&liointc1>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; // 51 - 32 = 19 + dma-mask = <0x00000000 0xffffffff>; + + #address-cells = <1>; + #size-cells = <0>; + + lsdc,relax_alignment; + + status = "disabled"; + + dvo0: dvo@0 { + compatible = "lsdc,dvo"; + /* 0 for connector 0 (DVO0) */ + reg = <0>; + connector = "panel"; + }; + }; + + wdt: syscon@0x16124000 { + compatible = "loongson,ls2x-wdt", "syscon"; + reg = <0 0x16124000 0 0xC>; + clocks = <&clocks CLK_APB>; + clock-names = "wdt-clk"; + status = "okay"; + }; + + reboot { + compatible ="syscon-reboot"; + regmap = <&wdt>; + offset = <0x00>; + mask = <0x1>; + }; + + adc: adc@0x1611c000 { + compatible = "ls2k300-adc"; + reg = <0 0x1611c000 0 0x50>; + status = "disabled"; + }; + + gmac0: ethernet@0x16020000 { + compatible = "snps,dwmac-3.70a"; + reg = <0 0x16020000 0 0x7fff>; + interrupt-parent = <&liointc1>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; // 49 - 32 = 17 + interrupt-names = "macirq"; + dma-mask = <0xffffffff 0xffffffff>; + phy-mode = "rgmii-id"; + // pinctrl-0 = <&gmac0_pins>; + // pinctrl-names = "default"; + snps,pbl = <32>; + status = "disabled"; + }; + + gmac1: ethernet@0x16030000 { + compatible = "snps,dwmac-3.70a"; + reg = <0 0x16030000 0 0x7fff>; + interrupt-parent = <&liointc1>; + interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; // 50 - 32 = 18 + interrupt-names = "macirq"; + dma-mask = <0xffffffff 0xffffffff>; + phy-mode = "rgmii-id"; + pinctrl-0 = <&gmac1_pins>; + pinctrl-names = "default"; + snps,pbl = <32>; + status = "disabled"; + }; + + gpio: gpio@0x16104000 { + compatible = "loongson,ls2k0300-gpio"; + reg = <0 0x16104000 0 0x1000>; + ngpios = <106>; + gpio_base = <0>; + gpio-controller; + #gpio-cells = <2>; + loongson,vhwirq-base = <128>; + interrupt-controller; + #interrupt-cells = <2>; + // 可选传统中断与扩展中断 + #if 1 + interrupt-parent =<&liointc1>; + interrupts = + <21 IRQ_TYPE_LEVEL_HIGH>, <22 IRQ_TYPE_LEVEL_HIGH>, <23 IRQ_TYPE_LEVEL_HIGH>, <24 IRQ_TYPE_LEVEL_HIGH>, + <25 IRQ_TYPE_LEVEL_HIGH>, <26 IRQ_TYPE_LEVEL_HIGH>, <27 IRQ_TYPE_LEVEL_HIGH>; + // base 32 x - 32 + loongson,irqpin-group = + <0 16>, <16 16>, <32 16>, <48 16>, + <64 16>, <80 16>, <96 11>; + #else + interrupt-parent =<&extioiic>; + interrupts = + <79>, <80>, <81>, <82>, + <83>, <84>, <85>, <86>, + <87>, <88>, <89>, <90>, + <91>, <92>, <93>, <94>, + <95>, <96>, <97>, <98>, + <99>, <100>, <101>, <102>, + <103>, <104>, <105>; + loongson,irqpin-group = + <0 4>, <4 4>, <8 4>, <12 4>, + <16 4>, <20 4>, <24 4>, <28 4>, + <32 4>, <36 5>, <40 4>, <44 4>, + <48 4>, <52 4>, <56 4>, <60 4>, + <64 4>, <68 4>, <72 4>, <76 4>, + <80 4>, <84 4>, <88 4>, <92 4>, + <96 4>, <100 4>, <104 2>; + #endif + }; + + can0: can@0x16110000 { + compatible = "loongson,ls-canfd"; + reg = <0 0x16110000 0 0x400>; + ls,clock-frequency = <200000000>; + ls,canfd-dmarx; + interrupt-parent = <&liointc0>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&can0_pins>; + pinctrl-1 = <&can0_as_gpio_pins>; + pinctrl-names = "default", "isolate"; + ls,canfd-tx-gpio = <&gpio 69 GPIO_ACTIVE_HIGH>; + dmas = <&dma 0 0xaae>; + dma-names = "rx"; + status = "disabled"; + }; + + can1: can@0x16111000 { + compatible = "loongson,ls-canfd"; + reg = <0 0x16110400 0 0x400>; + ls,clock-frequency = <200000000>; + ls,canfd-dmarx; + interrupt-parent = <&liointc0>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&can1_pins>; + pinctrl-1 = <&can1_as_gpio_pins>; + pinctrl-names = "default", "isolate"; + ls,canfd-tx-gpio = <&gpio 71 GPIO_ACTIVE_HIGH>; + dmas = <&dma 1 0xaae>; + dma-names = "rx"; + status = "disabled"; + }; + + can2: can@0x16112000 { + compatible = "loongson,ls-canfd"; + reg = <0 0x16110800 0 0x400>; + ls,clock-frequency = <200000000>; + ls,canfd-dmarx; + interrupt-parent = <&liointc0>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&can2_pins>; + pinctrl-1 = <&can2_as_gpio_pins>; + pinctrl-names = "default", "isolate"; + ls,canfd-tx-gpio = <&gpio 73 GPIO_ACTIVE_HIGH>; + dmas = <&dma 2 0xaae>; + dma-names = "rx"; + status = "disabled"; + }; + + can3: can@0x16113000 { + compatible = "loongson,ls-canfd"; + reg = <0 0x16110c00 0 0x400>; + ls,clock-frequency = <200000000>; + ls,canfd-dmarx; + interrupt-parent = <&liointc0>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&can3_pins>; + pinctrl-1 = <&can3_as_gpio_pins>; + pinctrl-names = "default", "isolate"; + ls,canfd-tx-gpio = <&gpio 75 GPIO_ACTIVE_HIGH>; + dmas = <&dma 3 0xaae>; + dma-names = "rx"; + status = "disabled"; + }; + + spi0: spi@0x16010000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "loongson,ls-spi"; + reg = <0 0x16010000 0 0x10>; + interrupt-parent = <&liointc1>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; // 44 - 32 = 12 + clock-frequency = <200000000>; + status = "disabled"; + }; + + spi1: spi@0x16018000 { + compatible = "loongson,ls-spi"; + reg = <0 0x16018000 0 0x10>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&liointc1>; + interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; // 45 - 32 = 13 + clock-frequency = <200000000>; + pinctrl-0 = <&spi1_pins>; + pinctrl-names = "default"; + status = "disabled"; + }; + + spi2: spi@0x1610c000 { + compatible = "loongson,ls-spi-io"; + reg = <0 0x1610c000 0 0x2000>; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <200000000>; + pinctrl-0 = <&spi2_pins>; + pinctrl-names = "default"; + status = "disabled"; + }; + + spi3: spi@0x1610e000 { + compatible = "loongson,ls-spi-io"; + reg = <0 0x1610e000 0 0x2000>; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <200000000>; + status = "disabled"; + }; + + i2c0: i2c0@0x16108000 { + compatible = "loongson,lsfs-i2c"; + reg = <0 0x16108000 0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&liointc0>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + clock-frequency = <200000000>; + status = "disabled"; + }; + + i2c1: i2c1@0x16109000 { + compatible = "loongson,lsfs-i2c"; + reg = <0 0x16109000 0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&liointc0>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + clock-frequency = <200000000>; + status = "disabled"; + }; + + i2c2: i2c2@0x1610a000 { + compatible = "loongson,lsfs-i2c"; + reg = <0 0x1610a000 0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&liointc0>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; + clock-frequency = <200000000>; + status = "disabled"; + }; + + i2c3: i2c3@0x1610b000 { + compatible = "loongson,lsfs-i2c"; + reg = <0 0x1610b000 0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&liointc0>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; + clock-frequency = <200000000>; + status = "disabled"; + }; + + dma: dma@0x1612c000{ + compatible = "loongson,lsia-dma"; + reg = <0 0x1612c000 0 0x100>; + #config-nr = <2>; + interrupt-parent = <&liointc0>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH>, <24 IRQ_TYPE_LEVEL_HIGH>, + <25 IRQ_TYPE_LEVEL_HIGH>, <26 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, <28 IRQ_TYPE_LEVEL_HIGH>, + <29 IRQ_TYPE_LEVEL_HIGH>, <30 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <2>; + dma-channels = <8>; + }; + + emmc: sdio@0x16140000 { + #address-cells = <2>; + compatible = "loongson,ls2k_sdio_1.2"; + reg = <0 0x16140000 0 0x1000>; + interrupt-parent = <&liointc0>; + interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; + //interrupt-parent = <&icu>; + //interrupts = <53>; + interrupt-names = "ls2k_mci_irq"; + dma-mask = <0xffffffff 0xffffffff>; + clock-frequency = <0 200000000>; + bus-width = <8>; + cap-mmc-highspeed; + no-sd; + no-sdio; + non-removable; + }; + + sdio1: sdio@0x16148000 { + #address-cells = <2>; + compatible = "loongson,ls2k_sdio_1.2"; + reg = <0 0x16148000 0 0x8000>; + interrupt-parent = <&liointc1>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; // 32 - 32 = 0 + interrupt-names = "ls2k_mci_irq"; + dma-mask = <0xffffffff 0xffffffff>; + clock-frequency = <0 200000000>; + pinctrl-0 = <&sdio1_pins>; + pinctrl-names = "default"; + cap-sd-highspeed; + cap-mmc-highspeed; + bus-width = <4>; + status = "disabled"; + }; + + ohci@0x16088000 { + compatible = "generic-ohci"; + reg = <0 0x16088000 0 0x8000>; + interrupt-parent = <&liointc1>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH>; // 47 - 32 = 15 + dma-mask = <0x0 0xffffffff>; + }; + + ehci@0x16080000 { + compatible = "generic-ehci"; + reg = <0 0x16080000 0 0x8000>; + interrupt-parent = <&liointc1>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; // 46 - 32 = 14 + dma-mask = <0x0 0xffffffff>; + }; + + otg: otg@0x16040000 { + compatible = "loongson,loongson2-dwc2"; + reg = <0 0x16040000 0 0x40000>; + interrupt-parent = <&liointc1>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; // 48 - 32 = 16 + dma-mask = <0x0 0xffffffff>; + loongson,dwc2-fix = ; + //dr_mode = "peripheral"; + /* Optional for that dr_mode = "host" or dr_mode = "peripheral" */ + }; + + pwm0: pwm@0x1611b000 { + compatible = "loongson,ls2k-pwm"; + reg = <0 0x1611b000 0 0xf>; + interrupt-parent = <&liointc0>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; + #pwm-cells = <2>; + pinctrl-0 = <&pwm0_pins>; + pinctrl-names = "default"; + clock-frequency = <200000000>; + status = "disabled"; + }; + + pwm1: pwm@0x1611b010 { + compatible = "loongson,ls2k-pwm"; + reg = <0 0x1611b010 0 0xf>; + interrupt-parent = <&liointc0>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; + #pwm-cells = <2>; + pinctrl-0 = <&pwm1_pins>; + pinctrl-names = "default"; + clock-frequency = <200000000>; + status = "disabled"; + }; + + pwm2: pwm@0x1611b020 { + compatible = "loongson,ls2k-pwm"; + reg = <0 0x1611b020 0 0xf>; + interrupt-parent = <&liointc0>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; + #pwm-cells = <2>; + pinctrl-0 = <&pwm2_pins>; + pinctrl-names = "default"; + clock-frequency = <200000000>; + status = "disabled"; + }; + + pwm3: pwm@0x1611b030 { + compatible = "loongson,ls2k-pwm"; + reg = <0 0x1611b030 0 0xf>; + interrupt-parent = <&liointc0>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; + #pwm-cells = <2>; + pinctrl-0 = <&pwm3_pins>; + pinctrl-names = "default"; + clock-frequency = <200000000>; + status = "disabled"; + }; + + rtc0: rtc@0x16128000{ + compatible = "loongson,ls2k-rtc"; + reg = <0 0x16128000 0 0x100>; + interrupt-parent = <&liointc1>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; // 41 - 32 = 9 + status = "disabled"; + }; + + timers1: timer@16118000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "loongson,loongson-timers"; + reg = <0 0x16118000 0 0x1000>; + interrupt-parent = <&liointc0>; + interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clocks CLK_APB>; + clock-names = "int"; + dmas = <&dma 0 0x400>, + <&dma 1 0x400>, + <&dma 2 0x400>, + <&dma 3 0x400>, + <&dma 4 0x400>, + <&dma 5 0x400>, + <&dma 6 0x400>; + dma-names = "ch1", "ch2", "ch3", "ch4", "com", "up", "trig"; + pinctrl-0 = <&atim3_pin_m1>, <&atim3n_pin_m1>; + pinctrl-names = "default"; + clock-frequency = <200000000>; + status = "disabled"; + + pwm { + compatible = "loongson,ls2k-pwm-timer"; + #pwm-cells = <2>; + status = "disabled"; + }; + }; + + timers2: timer@16119000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "loongson,loongson-timers"; + reg = <0 0x16119000 0 0x1000>; + interrupt-parent = <&liointc0>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clocks CLK_APB>; + clock-names = "int"; + dmas = <&dma 0 0x400>, + <&dma 1 0x400>, + <&dma 2 0x400>, + <&dma 3 0x400>, + <&dma 5 0x400>, + <&dma 6 0x400>; + dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig"; + pinctrl-0 = <>im2_pin_m1>, <>im3_pin_m1>; + pinctrl-names = "default"; + clock-frequency = <200000000>; + status = "disabled"; + + pwm { + compatible = "loongson,ls2k-pwm-timer"; + #pwm-cells = <2>; + status = "disabled"; + }; + }; + + tsensor: tsensor@0x16001500 { + compatible = "loongson,ls2k300-thermal"; + reg = <0 0x16001500 0 0x30>; + id = <0>; + interrupt-parent = <&liointc1>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; // 52 - 32 = 20 + #thermal-sensor-cells = <1>; + }; + + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tsensor 0>; + + trips { + cpu_alert: cpu-alert { + temperature = <55000>; + hysteresis = <5000>; + type = "active"; + }; + + cpu_crit: cpu-crit { + temperature = <125000>; + hysteresis = <5000>; + type = "critical"; + }; + }; + }; + }; + + i2s: i2s@0x16114000{ + compatible = "loongson,ls2k0300-i2s"; + reg = <0 0x16114000 0 0x4000>; + interrupt-parent = <&liointc0>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; + clock-frequency = <100000000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins>; + status = "disabled"; + }; + + audio: audio@0x16114000 { + compatible = "loongson,ls-pcm-generic-audio"; + reg = <0 0x16114000 0 0x4000>; + dmas = <&dma 0 0xaf + &dma 1 0xbf>; + dma-names = "i2s_record", "i2s_play"; + dma-mask = <0xffffffff 0xffffffff>; + status = "disabled"; + }; + + sound: sound{ + compatible = "loongson,ls-sound"; + loongson,i2s-controller = <&i2s>; + status = "disabled"; + }; + }; +}; diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/loongson_panel_param.dtsi b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/loongson_panel_param.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..7f4fbc81d4cbb930b55c6b92d5df2fe05fa4f72c --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/loongson_panel_param.dtsi @@ -0,0 +1,98 @@ +/ { + panel_param: panel_param_set { + #address-cells = <1>; + #size-cells = <0>; + + panel-BP101WX1-206 { + width-mm = <223>; + height-mm = <125>; + label = "BP101WX1-206"; + data-mapping = "jeida-24"; + + panel-timing { + clock-frequency = <71000000>; + hactive = <1280>; + vactive = <800>; + hsync-len = <32>; + hfront-porch = <8>; + hback-porch = <10>; + vfront-porch = <3>; + vback-porch = <3>; + vsync-len = <6>; + de-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + pixelclk-active = <0>; + }; + }; + + panel-ATK-MD0430R-800x480 { + width-mm = <223>; + height-mm = <125>; + label = "ATK-MD0430R-800x480"; + data-mapping = "jeida-24"; + + panel-timing { + clock-frequency = <27000000>; + hactive = <800>; + vactive = <480>; + hsync-len = <40>; + hfront-porch = <48>; + hback-porch = <40>; + vfront-porch = <13>; + vback-porch = <32>; + vsync-len = <0>; + de-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + pixelclk-active = <0>; + }; + }; + + panel-ATK-MD0700R-1024x600 { + width-mm = <223>; + height-mm = <125>; + label = "ATK-MD0700R-1024x600"; + data-mapping = "jeida-24"; + + panel-timing { + clock-frequency = <51200000>; + hactive = <1024>; + vactive = <600>; + hsync-len = <20>; + hfront-porch = <160>; + hback-porch = <140>; + vfront-porch = <12>; + vback-porch = <20>; + vsync-len = <3>; + de-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + pixelclk-active = <0>; + }; + }; + + panel-ATK-MD1010R-1280x800{ + width-mm = <229>; + height-mm = <149>; + label = "ATK-MD1010R-1280x800"; + data-mapping = "jeida-24"; + + panel-timing { + clock-frequency = <71100000>; + hactive = <1280>; + vactive = <800>; + hsync-len = <10>; + hfront-porch = <70>; + hback-porch = <80>; + vfront-porch = <10>; + vback-porch = <10>; + vsync-len = <3>; + de-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + pixelclk-active = <0>; + }; + }; + }; +}; \ No newline at end of file diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/ls2k300_alientek.dts b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/ls2k300_alientek.dts new file mode 100644 index 0000000000000000000000000000000000000000..ff3473619ea16214c230833f7cb161caf917ce1a --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/ls2k300_alientek.dts @@ -0,0 +1,267 @@ +#include "ls2k300_g2k03z0_core_v10.dtsi" +#include "loongson_panel_param.dtsi" + +/ { + model = "LS2K300-ALIENTEK"; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_leds>; + //板载DSO灯 + led0 { + label = "sys-led"; + gpios = <&gpio 89 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + default-state = "on"; + status = "okay"; + }; + //板载DS1灯 + led1 { + label = "user-led"; + gpios = <&gpio 70 GPIO_ACTIVE_LOW>; + linux,default-trigger = "none"; + default-state = "on"; + status = "okay"; + }; + }; + + gpio_keys: gpio_keys@0 { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_keys>; + #address-cells = <1>; + #size-cells = <0>; + autorepeat; + //板载KEY2按键 + key { + label = "USER-KEY"; + linux,code = <114>; + gpios = <&gpio 71 GPIO_ACTIVE_LOW>; + gpio-key,wakeup; + }; + }; + + lcd_backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm2 0 5000000 0>; + brightness-levels = < + 0 1 2 3 4 5 6 7>; + default-brightness-level = <6>; + status = "okay"; + }; + + panel: dvo-connector@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "panel-lvds", "auo,b101ean01"; + backlight = <&lcd_backlight>; + width-mm = <223>; + height-mm = <125>; + label = "ATK-MD0700R-1024x600"; + data-mapping = "jeida-24"; + + panel-timing { + clock-frequency = <51200000>; + hactive = <1024>; + vactive = <600>; + hsync-len = <20>; + hfront-porch = <160>; + hback-porch = <140>; + vfront-porch = <12>; + vback-porch = <20>; + vsync-len = <3>; + de-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + pixelclk-active = <0>; + }; + + port@0 { + reg = <0>; + + #address-cells = <1>; + #size-cells = <0>; + + dvo_connector_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&dc_out_rgb0>; + }; + }; + }; + + vccio_codec: 3_3V{ + compatible = "regulator-fixed"; + regulator-name = "VCC_IO"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + // 虽然这个时钟在从模式下没用,但 es8388 驱动必须指定这个时钟 + es8388_clk: es8388-clock { + compatible = "fixed-clock"; + clock-frequency = <12288000>; + #clock-cells = <1>; + }; + +}; + +&dc { + status = "ok"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dc_out_rgb0: endpoint { + remote-endpoint = <&dvo_connector_in>; + }; + }; + }; +}; + +&gmac0 { + status = "okay"; + phy-handle = <&yt8511h0>; + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + yt8511h0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + motorcomm,led0_cfg = <0x40>; //千兆常亮 + motorcomm,led1_cfg = <0x30>; //百兆 十兆常亮 + motorcomm,led2_cfg = <0x2600>; //有数据时闪烁 + }; + }; +}; + +&gmac1 { + status = "okay"; + phy-handle = <&yt8511h1>; + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + yt8511h1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + motorcomm,led0_cfg = <0x40>; //千兆常亮 + motorcomm,led1_cfg = <0x30>; //百兆 十兆常亮 + motorcomm,led2_cfg = <0x2600>; //有数据时闪烁 + }; + }; +}; + +&i2c2 { + status = "ok"; + + touchpad: gt911@14 { + compatible = "goodix,gt911"; + reg = <0x14>; + // 2K300 GPIO 支持中断控制 + // GPIO 中断号为 vhwirq-base + pinnum (170 = 128 + 42) + interrupt-parent = <&gpio>; + interrupts = <202 IRQ_TYPE_EDGE_FALLING>; + irq-gpios = <&gpio 74 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio 75 GPIO_ACTIVE_HIGH>; + }; +}; + +&i2c3 { + status = "ok"; + //8388音频芯片 + codec: es8388@11{ + compatible = "everest,es8388"; + reg = <0x11>; + hp-det-gpio = <&gpio 81 GPIO_ACTIVE_HIGH>; + spk-con-gpio = <&gpio 86 GPIO_ACTIVE_HIGH>; + hp-con-gpio = <&gpio 87 GPIO_ACTIVE_HIGH>; + AVDD-supply = <&vccio_codec>; + DVDD-supply = <&vccio_codec>; + HPVDD-supply = <&vccio_codec>; + PVDD-supply = <&vccio_codec>; + clocks = <&es8388_clk 0>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&can0 { + ls,canfd-stb-gpio = <&gpio 62 GPIO_ACTIVE_HIGH>; + status = "okay"; + //status = "disabled"; +}; + + +&adc { + status = "okay"; +}; + +&rtc0 { + status = "okay"; +}; + +&sdio1 { + pinctrl-0 = <&sdio1_pins>; + pinctrl-names = "default"; + cap-sd-highspeed; + cap-mmc-highspeed; + bus-width = <4>; + cd-gpios = <&gpio 63 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&i2s { + status = "okay"; +}; + +&audio { + status = "okay"; +}; + +&sound { + status = "okay"; + loongson,audio-codec = <&codec>; + // Easy Compatible for asound.state Configure + loongson,sound-card-name = "ES8388"; +}; + +&pinmux{ + /*/驱动GPIO子系统实验 + pinctrl_gpio_62: pinmux_G62_as_gpio { + pinctrl-single,bits = <0xc 0x00000000 0x30000000>; + }; + */ + + //DS0和DS1复用为GPIO + pinctrl_gpio_leds: pinmux_G70-G89_as_gpio { + pinctrl-single,bits = <0x10 0x00000000 0x00003000 + 0x14 0x00000000 0x000c0000>; + }; + + //KEY2复用为GPIO + pinctrl_gpio_keys: pinmux_G71_as_gpio { + pinctrl-single,bits = <0x10 0x00000000 0x0000c000>; + }; +}; + +&otg { + dr_mode = "otg"; +}; \ No newline at end of file diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/ls2k300_g2k03z0_core_v10.dtsi b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/ls2k300_g2k03z0_core_v10.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..a345ad37156c9fed2cd9ada2bca994d4c580a21f --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/ls2k300_g2k03z0_core_v10.dtsi @@ -0,0 +1,65 @@ +#include "loongson-2k0300.dtsi" + +/ { + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "earlycon"; + }; + + /* not need memory node, we get memory info from boot params. */ + //memory { + // name = "memory"; + // device_type = "memory"; + // reg = <0 0x00200000 0 0x0ee00000 + // 0 0x90000000 0 0x10000000>; + //}; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0 0x02000000>; + linux,cma-default; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + + spi-flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <25000000>; + reg = <0>; + }; +}; + +&gmac0 { + status = "okay"; + phy-handle = <&yt8511h0>; + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + yt8511h0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + motorcomm,led0_cfg = <0x40>; //千兆常亮 + motorcomm,led1_cfg = <0x30>; //百兆 十兆常亮 + motorcomm,led2_cfg = <0x2600>; //有数据时闪烁 + }; + }; +}; + +// &emmc { +// mmc-hs200-1_8v; +// }; diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-5.10/0001-kernel-5.10.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-5.10/0001-kernel-5.10.patch new file mode 100644 index 0000000000000000000000000000000000000000..4d74c736106ee217df89c177acec1be22ebd31cb --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-5.10/0001-kernel-5.10.patch @@ -0,0 +1,40 @@ +From 4662de4b4a800f285ddad2cf1b4b5369f76d9de3 Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Tue, 22 Apr 2025 07:30:26 +0000 +Subject: [PATCH] patch + +--- + arch/loongarch/kernel/legacy_boot.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/loongarch/kernel/legacy_boot.c b/arch/loongarch/kernel/legacy_boot.c +index c46303a7b..6835696f2 100644 +--- a/arch/loongarch/kernel/legacy_boot.c ++++ b/arch/loongarch/kernel/legacy_boot.c +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + #include "legacy_boot.h" + + #define MAX_CORE_PIC 256 +@@ -434,6 +435,7 @@ unsigned int bpi_init(void) + return list_find(efi_bp); + } + ++/* + static void register_addrs_set(u64 *registers, const u64 addr, int num) + { + u64 i; +@@ -443,6 +445,7 @@ static void register_addrs_set(u64 *registers, const u64 addr, int num) + registers++; + } + } ++*/ + + static int get_bpi_version(u64 *signature) + { +-- +2.34.1 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0001-fix-loongarch-setup-and-add-base-env-code.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0001-fix-loongarch-setup-and-add-base-env-code.patch new file mode 100644 index 0000000000000000000000000000000000000000..5831704b94ba2f38d828d0c0b74c5a79fa64bdc4 --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0001-fix-loongarch-setup-and-add-base-env-code.patch @@ -0,0 +1,2249 @@ +From 4095442b004c742d96e61ee66b0829ff67b88833 Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:03:53 +0800 +Subject: [PATCH 01/17] fix loongarch setup and add base env code + +--- + arch/loongarch/Kbuild | 1 + + arch/loongarch/Kconfig | 56 +- + arch/loongarch/Makefile | 9 +- + arch/loongarch/boot/Makefile | 60 ++ + arch/loongarch/boot/dts/Makefile | 3 +- + arch/loongarch/include/asm/mach/boot_param.h | 123 +++ + arch/loongarch/include/asm/mach/loongson-2k.h | 742 ++++++++++++++++++ + .../include/asm/mach/loongson-2k300.h | 123 +++ + arch/loongarch/kernel/Makefile | 2 +- + arch/loongarch/kernel/acpi.c | 4 +- + arch/loongarch/kernel/efi.c | 21 +- + arch/loongarch/kernel/env.c | 6 +- + arch/loongarch/kernel/head.S | 12 + + arch/loongarch/kernel/irq.c | 9 +- + arch/loongarch/kernel/mem.c | 14 +- + arch/loongarch/kernel/numa.c | 2 +- + arch/loongarch/kernel/relocate.c | 6 +- + arch/loongarch/kernel/setup.c | 174 +++- + arch/loongarch/kernel/smp.c | 7 +- + arch/loongarch/kernel/time.c | 23 + + include/drm/drm_client.h | 3 + + include/drm/drm_fbdev_ttm.h | 15 + + include/drm/drm_gem.h | 3 + + .../dt-bindings/clock/loongson2k300-clock.h | 38 + + include/dt-bindings/usb/dwc2-loongson-fix.h | 9 + + include/linux/clk.h | 12 + + include/linux/mfd/loongson-timers.h | 185 +++++ + 27 files changed, 1634 insertions(+), 28 deletions(-) + create mode 100644 arch/loongarch/include/asm/mach/boot_param.h + create mode 100644 arch/loongarch/include/asm/mach/loongson-2k.h + create mode 100644 arch/loongarch/include/asm/mach/loongson-2k300.h + create mode 100644 include/drm/drm_fbdev_ttm.h + create mode 100644 include/dt-bindings/clock/loongson2k300-clock.h + create mode 100644 include/dt-bindings/usb/dwc2-loongson-fix.h + create mode 100644 include/linux/mfd/loongson-timers.h + +diff --git a/arch/loongarch/Kbuild b/arch/loongarch/Kbuild +index beb8499dd..bfa21465d 100644 +--- a/arch/loongarch/Kbuild ++++ b/arch/loongarch/Kbuild +@@ -4,6 +4,7 @@ obj-y += net/ + obj-y += vdso/ + + obj-$(CONFIG_KVM) += kvm/ ++obj-$(CONFIG_BUILTIN_DTB) += boot/dts/ + + # for cleaning + subdir- += boot +diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig +index edbbf03d2..8ceb61357 100644 +--- a/arch/loongarch/Kconfig ++++ b/arch/loongarch/Kconfig +@@ -168,7 +168,7 @@ config LOONGARCH + select PCI_QUIRKS + select PERF_USE_VMALLOC + select RTC_LIB +- select SMP ++ select SMP + select SPARSE_IRQ + select SYSCTL_ARCH_UNALIGN_ALLOW + select SYSCTL_ARCH_UNALIGN_NO_WARN +@@ -224,7 +224,7 @@ config MACH_LOONGSON64 + def_bool 64BIT + + config FIX_EARLYCON_MEM +- def_bool y ++ def_bool !ARCH_IOREMAP + + config PAGE_SIZE_4KB + bool +@@ -272,6 +272,37 @@ config AS_HAS_LBT_EXTENSION + config AS_HAS_LVZ_EXTENSION + def_bool $(as-instr,hvcl 0) + ++if LOONGARCH ++ ++endif # LOONGARCH Machine Type ++choice ++ prompt "Machine Type" ++ default LOONGSON_2K300 ++ ++config LOONGSON_2K300 ++ bool "Loongson 2K300 family SoC" ++ select ARCH_SPARSEMEM_ENABLE ++ select ARCH_MIGHT_HAVE_PC_PARPORT ++ select BOOT_ELF32 ++ select BOARD_SCACHE ++ select CPU_HAS_WB ++ select ISA ++ select IRQ_LOONGARCH_CPU ++ select NR_CPUS_DEFAULT_4 ++ select SPARSE_IRQ ++ select SYS_HAS_CPU_LOONGSON64 ++ select SYS_SUPPORTS_HOTPLUG_CPU ++ select SYS_SUPPORTS_64BIT_KERNEL ++ select SYS_SUPPORTS_HIGHMEM ++ select SYS_SUPPORTS_LITTLE_ENDIAN ++ select ZONE_DMA32 ++ select USE_OF ++ select COMMON_CLK ++ help ++ Loongson 2K300 family SoC. ++ ++endchoice ++ + menu "Kernel type and options" + + source "kernel/Kconfig.hz" +@@ -378,6 +409,27 @@ config CMDLINE_FORCE + + endchoice + ++ ++ ++ ++config BUILTIN_DTB ++ bool "Enable built-in dtb in kernel" ++ depends on OF ++ help ++ Some existing systems do not provide a canonical device tree to ++ the kernel at boot time. Let's provide a device tree table in the ++ kernel, keyed by the dts filename, containing the relevant DTBs. ++ ++ Built-in DTBs are generic enough and can be used as references. ++ ++config BUILTIN_DTB_NAME ++ string "Source file for built-in dtb" ++ depends on BUILTIN_DTB ++ help ++ Base name (without suffix, relative to arch/loongarch/boot/dts/) ++ for the DTS file that will be used to produce the DTB linked into ++ the kernel. ++ + config DMI + bool "Enable DMI scanning" + select DMI_SCAN_MACHINE_NON_EFI_FALLBACK +diff --git a/arch/loongarch/Makefile b/arch/loongarch/Makefile +index d423fba7c..ed43ccd9b 100644 +--- a/arch/loongarch/Makefile ++++ b/arch/loongarch/Makefile +@@ -6,6 +6,7 @@ + boot := arch/loongarch/boot + + KBUILD_DEFCONFIG := loongson3_defconfig ++KBUILD_DTBS := dtbs + + image-name-y := vmlinux + image-name-$(CONFIG_EFI_ZBOOT) := vmlinuz +@@ -83,14 +84,16 @@ KBUILD_CFLAGS_KERNEL += -fPIE + LDFLAGS_vmlinux += -static -pie --no-dynamic-linker -z notext $(call ld-option, --apply-dynamic-relocs) + endif + ++entry-y = $(shell LC_ALL=C readelf -e vmlinux | grep 'Entry point address:'|grep -o '0x[0-9a-f]\{16\}') + cflags-y += $(call cc-option, -mno-check-zero-division) ++cflags-y += -I$(srctree)/arch/loongarch/include/asm/mach + + ifndef CONFIG_KASAN + cflags-y += -fno-builtin-memcpy -fno-builtin-memmove -fno-builtin-memset + endif + + load-y = 0x9000000000200000 +-bootvars-y = VMLINUX_LOAD_ADDRESS=$(load-y) ++bootvars-y = VMLINUX_LOAD_ADDRESS=$(load-y) VMLINUX_ENTRY_ADDRESS=$(entry-y) + + drivers-$(CONFIG_PCI) += arch/loongarch/pci/ + +@@ -140,11 +143,11 @@ PHONY += vdso_install + vdso_install: + $(Q)$(MAKE) $(build)=arch/loongarch/vdso $@ + +-all: $(notdir $(KBUILD_IMAGE)) ++all: $(notdir $(KBUILD_IMAGE)) $(KBUILD_DTBS) + + vmlinuz.efi: vmlinux.efi + +-vmlinux.elf vmlinux.efi vmlinuz.efi: vmlinux ++vmlinux.elf vmlinux.efi vmlinuz.efi uImage: vmlinux + $(Q)$(MAKE) $(build)=$(boot) $(bootvars-y) $(boot)/$@ + + install: +diff --git a/arch/loongarch/boot/Makefile b/arch/loongarch/boot/Makefile +index 4e1c374c5..756c018e5 100644 +--- a/arch/loongarch/boot/Makefile ++++ b/arch/loongarch/boot/Makefile +@@ -23,4 +23,64 @@ EFI_ZBOOT_PAYLOAD := vmlinux.efi + EFI_ZBOOT_BFD_TARGET := elf64-loongarch + EFI_ZBOOT_MACH_TYPE := LOONGARCH64 + ++suffix-y := bin ++suffix-$(CONFIG_KERNEL_BZIP2) := bz2 ++suffix-$(CONFIG_KERNEL_GZIP) := gz ++suffix-$(CONFIG_KERNEL_LZMA) := lzma ++suffix-$(CONFIG_KERNEL_LZO) := lzo ++ ++targets += uImage ++targets += uImage.bin ++targets += uImage.bz2 ++targets += uImage.gz ++targets += uImage.lzma ++targets += uImage.lzo ++ ++# ++# Compressed vmlinux images ++# ++ ++extra-y += vmlinux.bin.bz2 ++extra-y += vmlinux.bin.gz ++extra-y += vmlinux.bin.lzma ++extra-y += vmlinux.bin.lzo ++ ++$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE ++ $(call if_changed,bzip2) ++ ++$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE ++ $(call if_changed,gzip) ++ ++$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE ++ $(call if_changed,lzma) ++ ++$(obj)/vmlinux.bin.lzo: $(obj)/vmlinux.bin FORCE ++ $(call if_changed,lzo) ++ ++ ++UIMAGE_LOADADDR = $(VMLINUX_LOAD_ADDRESS) ++UIMAGE_ENTRYADDR = $(VMLINUX_ENTRY_ADDRESS) ++# ++# Compressed u-boot images ++# ++ ++$(obj)/uImage.bin: $(obj)/vmlinux.bin FORCE ++ $(call if_changed,uimage,none) ++ ++$(obj)/uImage.bz2: $(obj)/vmlinux.bin.bz2 FORCE ++ $(call if_changed,uimage,bzip2) ++ ++$(obj)/uImage.gz: $(obj)/vmlinux.bin.gz FORCE ++ $(call if_changed,uimage,gzip) ++ ++$(obj)/uImage.lzma: $(obj)/vmlinux.bin.lzma FORCE ++ $(call if_changed,uimage,lzma) ++ ++$(obj)/uImage.lzo: $(obj)/vmlinux.bin.lzo FORCE ++ $(call if_changed,uimage,lzo) ++ ++$(obj)/uImage: $(obj)/uImage.$(suffix-y) ++ @ln -sf $(notdir $<) $@ ++ @echo ' Image $@ is ready' ++ + include $(srctree)/drivers/firmware/efi/libstub/Makefile.zboot +diff --git a/arch/loongarch/boot/dts/Makefile b/arch/loongarch/boot/dts/Makefile +index 5f1f55e91..1e24cdb51 100644 +--- a/arch/loongarch/boot/dts/Makefile ++++ b/arch/loongarch/boot/dts/Makefile +@@ -1,4 +1,3 @@ + # SPDX-License-Identifier: GPL-2.0-only +-dtstree := $(srctree)/$(src) + +-dtb-y := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts)) ++obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME)) +diff --git a/arch/loongarch/include/asm/mach/boot_param.h b/arch/loongarch/include/asm/mach/boot_param.h +new file mode 100644 +index 000000000..071fca3ce +--- /dev/null ++++ b/arch/loongarch/include/asm/mach/boot_param.h +@@ -0,0 +1,123 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++#ifndef __ASM_MACH_LOONGSON64_BOOT_PARAM_H_ ++#define __ASM_MACH_LOONGSON64_BOOT_PARAM_H_ ++ ++#ifdef CONFIG_VT ++#include ++#endif ++ ++#define ADDRESS_TYPE_SYSRAM 1 ++#define ADDRESS_TYPE_RESERVED 2 ++#define ADDRESS_TYPE_ACPI 3 ++#define ADDRESS_TYPE_NVS 4 ++#define ADDRESS_TYPE_PMEM 5 ++ ++#define EFI_RUNTIME_MAP_START 100 ++#define LOONGSON3_BOOT_MEM_MAP_MAX 128 ++ ++#define LOONGSON_EFIBOOT_SIGNATURE "BPI" ++#define LOONGSON_MEM_SIGNATURE "MEM" ++#define LOONGSON_VBIOS_SIGNATURE "VBIOS" ++#define LOONGSON_SCREENINFO_SIGNATURE "SINFO" ++ ++/* Values for Version BPI */ ++enum bpi_version { ++ BPI_VERSION_V1 = 1000, /* Signature="BPI01000" */ ++ BPI_VERSION_V2 = 1001, /* Signature="BPI01001" */ ++ BPI_VERSION_V3 = 1002, /* Signature="BPI01002" */ ++}; ++ ++/* Flags in bootparamsinterface */ ++#define BPI_FLAGS_UEFI_SUPPORTED BIT(0) ++#define BPI_FLAGS_SOC_CPU BIT(1) ++ ++struct _extention_list_hdr { ++ u64 signature; ++ u32 length; ++ u8 revision; ++ u8 checksum; ++ u64 next_offset; ++} __packed; ++ ++struct boot_params { ++ u64 signature; /* {"B", "P", "I", "0", "1", ... } */ ++ void *systemtable; ++ u64 extlist_offset; ++ u64 flags; ++} __packed; ++ ++struct loongsonlist_mem_map_legacy { ++ struct _extention_list_hdr header; /* {"M", "E", "M"} */ ++ u8 map_count; ++ struct loongson_mem_map { ++ u32 mem_type; ++ u64 mem_start; ++ u64 mem_size; ++ } __packed map[LOONGSON3_BOOT_MEM_MAP_MAX]; ++} __packed; ++ ++struct loongsonlist_mem_map { ++ struct _extention_list_hdr header; /* {"M", "E", "M"} */ ++ u8 map_count; ++ u32 desc_version; ++ struct efi_mmap { ++ u32 mem_type; ++ u32 padding; ++ u64 mem_start; ++ u64 mem_vaddr; ++ u64 mem_size; ++ u64 attribute; ++ } __packed map[LOONGSON3_BOOT_MEM_MAP_MAX]; ++} __packed; ++ ++struct loongsonlist_vbios { ++ struct _extention_list_hdr header; /* {"V", "B", "I", "O", "S"} */ ++ u64 vbios_addr; ++} __packed; ++ ++struct loongsonlist_screeninfo{ ++ struct _extention_list_hdr header; /* {"S", "I", "N", "F", "O"} */ ++ struct screen_info si; ++} __packed; ++ ++// struct loongson_board_info { ++// int bios_size; ++// char *bios_vendor; ++// char *bios_version; ++// char *bios_release_date; ++// char *board_name; ++// char *board_vendor; ++// }; ++ ++// struct loongson_system_configuration { ++// int bpi_ver; ++// int nr_cpus; ++// int nr_nodes; ++// int nr_io_pics; ++// int boot_cpu_id; ++// int cores_per_node; ++// int cores_per_package; ++// char *cpuname; ++// u64 suspend_addr; ++// u64 vgabios_addr; ++// int is_soc_cpu; ++// }; ++ ++extern void *loongson_fdt_blob; ++extern u32 __dtb_loongson3_ls7a_begin[]; ++extern u32 __dtb_ls2k500_mini_dp_begin[]; ++extern u32 __dtb_ls2k500_dayu400_mb_begin[]; ++extern u32 __dtb_ls2k1000_jl_mb_begin[]; ++extern u32 __dtb_ls2k1000_dp_begin[]; ++extern u32 __dtb_ls2k1000_dp_i2s_begin[]; ++extern u32 __dtb_ls2p500_gbkpjm0_v10_begin[]; ++extern u32 __dtb_ls2k300_mini_dp_begin[]; ++extern u32 __dtb_ls2k300_vanguard_pi_begin[]; ++extern u32 __dtb_ls2k300_gongkong_gbkpgk0_begin[]; ++extern u32 __dtb_ls2k300_alientek_begin[]; ++extern char __dtb_start[]; ++extern struct boot_params *efi_bp; ++extern struct loongson_board_info b_info; ++extern struct loongsonlist_mem_map *loongson_mem_map; ++extern struct loongson_system_configuration loongson_sysconf; ++#endif +diff --git a/arch/loongarch/include/asm/mach/loongson-2k.h b/arch/loongarch/include/asm/mach/loongson-2k.h +new file mode 100644 +index 000000000..40ddfd3b9 +--- /dev/null ++++ b/arch/loongarch/include/asm/mach/loongson-2k.h +@@ -0,0 +1,742 @@ ++/* ++ * Copyright (C) 2020, Loongson Technology Corporation Limited, Inc. ++ * ++ * This program is free software; you can distribute it and/or modify it ++ * under the terms of the GNU General Public License (Version 2) as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * for more details. ++ * ++*/ ++ ++#ifndef __ASM_MACH_LOONGSON_2K_H_ ++#define __ASM_MACH_LOONGSON_2K_H_ ++ ++#include ++#include ++#include ++//#include ++ ++/* we need to read back to ensure the write is accepted by conf bus */ ++#define CONF_BASE 0x1fe10000 ++ ++#define CPU_WBASE0_OFF 0x0 ++#define CPU_WBASE1_OFF 0x8 ++#define CPU_WBASE2_OFF 0x10 ++#define CPU_WBASE3_OFF 0x18 ++#define CPU_WBASE4_OFF 0x20 ++#define CPU_WBASE5_OFF 0x28 ++#define CPU_WBASE6_OFF 0x30 ++#define CPU_WBASE7_OFF 0x38 ++ ++#define CPU_WMASK0_OFF 0x40 ++#define CPU_WMASK1_OFF 0x48 ++#define CPU_WMASK2_OFF 0x50 ++#define CPU_WMASK3_OFF 0x58 ++#define CPU_WMASK4_OFF 0x60 ++#define CPU_WMASK5_OFF 0x68 ++#define CPU_WMASK6_OFF 0x70 ++#define CPU_WMASK7_OFF 0x78 ++ ++#define CPU_WMMAP0_OFF 0x80 ++#define CPU_WMMAP1_OFF 0x88 ++#define CPU_WMMAP2_OFF 0x90 ++#define CPU_WMMAP3_OFF 0x98 ++#define CPU_WMMAP4_OFF 0xa0 ++#define CPU_WMMAP5_OFF 0xa8 ++#define CPU_WMMAP6_OFF 0xb0 ++#define CPU_WMMAP7_OFF 0xb8 ++ ++#define SCACHE_LA0_OFF 0x200 ++#define SCACHE_LA1_OFF 0x208 ++#define SCACHE_LA2_OFF 0x210 ++#define SCACHE_LA3_OFF 0x218 ++ ++#define SCACHE_LM0_OFF 0x240 ++#define SCACHE_LM1_OFF 0x248 ++#define SCACHE_LM2_OFF 0x250 ++#define SCACHE_LM3_OFF 0x258 ++ ++#define SIGNAL_OFF 0x400 ++ ++#define GMAC_OFF 0x420 ++#define UART_OFF 0x428 ++#define GPU_OFF 0x430 ++#define APBDMA_OFF 0x438 ++#define USB_PHY01_OFF 0x440 ++#define USB_PHY23_OFF 0x448 ++#define SATA_OFF 0x450 ++#define SATA_PHY_OFF 0x458 ++#define MON_WRDMA_OFF 0x460 ++ ++/* ++ * about clk manager (PLL) ++ */ ++#if defined(CONFIG_LOONGSON_2K500) ++#define PLL_NODE_0_OFFSET 0x0 ++#define PLL_NODE_1_OFFSET 0x4 ++#define PLL_DDR_0_OFFSET 0x8 ++#define PLL_DDR_1_OFFSET 0xc ++#define PLL_SOC_0_OFFSET 0x10 ++#define PLL_SOC_1_OFFSET 0x14 ++#define PLL_PIX0_0_OFFSET 0x18 ++#define PLL_PIX0_1_OFFSET 0x1c ++#define PLL_PIX1_0_OFFSET 0x20 ++#define PLL_PIX1_1_OFFSET 0x24 ++#define PLL_FREQ_SC 0x28 ++#elif defined(CONFIG_LOONGSON_2K1000) ++#define PLL_SYS0_OFF 0x480 ++#define PLL_SYS1_OFF 0x488 ++#define PLL_DLL0_OFF 0x490 ++#define PLL_DLL1_OFF 0x498 ++#define PLL_DC0_OFF 0x4a0 ++#define PLL_DC1_OFF 0x4a8 ++#define PLL_PIX00_OFF 0x4b0 ++#define PLL_PIX01_OFF 0x4b8 ++#define PLL_PIX10_OFF 0x4c0 ++#define PLL_PIX11_OFF 0x4c8 ++#define PLL_FREQ_SC 0x4d0 ++#endif ++ ++//6 bit [29:24] odiv ++#define PLL_GENERIC_0_ODIV_SHIFT 24 ++#define PLL_GENERIC_0_ODIV_MASK 0x3f ++ ++//8 bit [23:16] loopc ++#define PLL_GENERIC_0_LOOPC_SHIFT 16 ++#define PLL_GENERIC_0_LOOPC_MASK 0xff ++ ++//6 bit [13:8] refc ++#define PLL_GENERIC_0_REFC_SHIFT 8 ++#define PLL_GENERIC_0_REFC_MASK 0x3f ++ ++//6 bit [13:8] ++#define PLL_GENERIC_1_ODIV_1_SHIFT 8 ++#define PLL_GENERIC_1_ODIV_1_MASK 0x3f ++ ++//6 bit [5:0] ++#define PLL_GENERIC_1_ODIV_0_SHIFT 0 ++#define PLL_GENERIC_1_ODIV_0_MASK 0x3f ++ ++//////////////////////////////////////// ++ ++#define PLL_NODE_0_REFC_SHIFT PLL_GENERIC_0_REFC_SHIFT ++#define PLL_NODE_0_REFC_MASK PLL_GENERIC_0_REFC_MASK ++ ++#define PLL_NODE_0_LOOPC_SHIFT PLL_GENERIC_0_LOOPC_SHIFT ++#define PLL_NODE_0_LOOPC_MASK PLL_GENERIC_0_LOOPC_MASK ++ ++#define PLL_NODE_0_ODIV_SHIFT PLL_GENERIC_0_ODIV_SHIFT ++#define PLL_NODE_0_ODIV_MASK PLL_GENERIC_0_ODIV_MASK ++ ++#define PLL_DDR_0_REFC_SHIFT PLL_GENERIC_0_REFC_SHIFT ++#define PLL_DDR_0_REFC_MASK PLL_GENERIC_0_REFC_MASK ++ ++#define PLL_DDR_0_LOOPC_SHIFT PLL_GENERIC_0_LOOPC_SHIFT ++#define PLL_DDR_0_LOOPC_MASK PLL_GENERIC_0_LOOPC_MASK ++ ++#define PLL_DDR_0_ODIV_SHIFT PLL_GENERIC_0_ODIV_SHIFT ++#define PLL_DDR_0_ODIV_MASK PLL_GENERIC_0_ODIV_MASK ++ ++#define PLL_DDR_1_ODIV_HDA_SHIFT PLL_GENERIC_1_ODIV_1_SHIFT ++#define PLL_DDR_1_ODIV_HDA_MASK PLL_GENERIC_1_ODIV_1_MASK ++ ++#define PLL_DDR_1_ODIV_NET_SHIFT PLL_GENERIC_1_ODIV_0_SHIFT ++#define PLL_DDR_1_ODIV_NET_MASK PLL_GENERIC_1_ODIV_0_MASK ++ ++#define PLL_SOC_0_REFC_SHIFT PLL_GENERIC_0_REFC_SHIFT ++#define PLL_SOC_0_REFC_MASK PLL_GENERIC_0_REFC_MASK ++ ++#define PLL_SOC_0_LOOPC_SHIFT PLL_GENERIC_0_LOOPC_SHIFT ++#define PLL_SOC_0_LOOPC_MASK PLL_GENERIC_0_LOOPC_MASK ++ ++#define PLL_SOC_0_ODIV_SHIFT PLL_GENERIC_0_ODIV_SHIFT ++#define PLL_SOC_0_ODIV_MASK PLL_GENERIC_0_ODIV_MASK ++ ++#define PLL_SOC_1_ODIV_GMAC_SHIFT PLL_GENERIC_1_ODIV_1_SHIFT ++#define PLL_SOC_1_ODIV_GMAC_MASK PLL_GENERIC_1_ODIV_1_MASK ++ ++#define PLL_SOC_1_ODIV_SB_SHIFT PLL_GENERIC_1_ODIV_0_SHIFT ++#define PLL_SOC_1_ODIV_SB_MASK PLL_GENERIC_1_ODIV_0_MASK ++ ++#define PLL_PIX0_0_REFC_SHIFT PLL_GENERIC_0_REFC_SHIFT ++#define PLL_PIX0_0_REFC_MASK PLL_GENERIC_0_REFC_MASK ++ ++#define PLL_PIX0_0_LOOPC_SHIFT PLL_GENERIC_0_LOOPC_SHIFT ++#define PLL_PIX0_0_LOOPC_MASK PLL_GENERIC_0_LOOPC_MASK ++ ++#define PLL_PIX0_0_ODIV_SHIFT PLL_GENERIC_0_ODIV_SHIFT ++#define PLL_PIX0_0_ODIV_MASK PLL_GENERIC_0_ODIV_MASK ++ ++#define PLL_PIX1_0_REFC_SHIFT PLL_GENERIC_0_REFC_SHIFT ++#define PLL_PIX1_0_REFC_MASK PLL_GENERIC_0_REFC_MASK ++ ++#define PLL_PIX1_0_LOOPC_SHIFT PLL_GENERIC_0_LOOPC_SHIFT ++#define PLL_PIX1_0_LOOPC_MASK PLL_GENERIC_0_LOOPC_MASK ++ ++#define PLL_PIX1_0_ODIV_SHIFT PLL_GENERIC_0_ODIV_SHIFT ++#define PLL_PIX1_0_ODIV_MASK PLL_GENERIC_0_ODIV_MASK ++ ++#define PLL_FREQSCALE_LSU_SHIFT 27 ++#define PLL_FREQSCALE_LSU_MASK 0x1f ++ ++#define PLL_FREQSCALE_PRINT_SHIFT 24 ++#define PLL_FREQSCALE_PRINT_MASK 0x7 ++ ++#define PLL_FREQSCALE_APB_SHIFT 20 ++#define PLL_FREQSCALE_APB_MASK 0x7 ++ ++#define PLL_FREQSCALE_USB_SHIFT 16 ++#define PLL_FREQSCALE_USB_MASK 0x7 ++ ++#define PLL_FREQSCALE_SATA_SHIFT 12 ++#define PLL_FREQSCALE_SATA_MASK 0x7 ++ ++#define PLL_FREQSCALE_SB_SHIFT 8 ++#define PLL_FREQSCALE_SB_MASK 0x7 ++ ++#define PLL_FREQSCALE_GPU_SHIFT 4 ++#define PLL_FREQSCALE_GPU_MASK 0x7 ++ ++#define PLL_FREQSCALE_NODE_SHIFT 0 ++#define PLL_FREQSCALE_NODE_MASK 0x7 ++/* ++ * about clk manager (PLL) ++ */ ++ ++#define GPIO0_OEN_OFF 0x500 ++#define GPIO1_OEN_OFF 0x508 ++#define GPIO0_O_OFF 0x510 ++#define GPIO1_O_OFF 0x518 ++#define GPIO0_I_OFF 0x520 ++#define GPIO1_I_OFF 0x528 ++#define GPIO0_INT_OFF 0x528 ++#define GPIO1_INT_OFF 0x530 ++ ++#define CONF_DMA0_OFF 0xc00 ++ ++#define CONF_DMA1_OFF 0xc10 ++ ++#define CONF_DMA2_OFF 0xc20 ++ ++#define CONF_DMA3_OFF 0xc30 ++ ++#define CONF_DMA4_OFF 0xc40 ++ ++#define C0_IPISR_OFF 0x1000 ++#define C0_IPIEN_OFF 0x1004 ++#define C0_IPISET_OFF 0x1008 ++#define C0_IPICLR_OFF 0x100c ++ ++#define C0_MAIL0_OFF 0x1020 ++#define C0_MAIL1_OFF 0x1028 ++#define C0_MAIL2_OFF 0x1030 ++#define C0_MAIL3_OFF 0x1038 ++ ++#define INTSR0_OFF 0x1040 ++#define INTSR1_OFF 0x1048 ++ ++#define C1_IPISR_OFF 0x1100 ++#define C1_IPIEN_OFF 0x1104 ++#define C1_IPISET_OFF 0x1108 ++#define C1_IPICLR_OFF 0x110c ++ ++#define C1_MAIL0_OFF 0x1120 ++#define C1_MAIL1_OFF 0x1128 ++#define C1_MAIL2_OFF 0x1130 ++#define C1_MAIL3_OFF 0x1138 ++ ++#define INT_LO_OFF 0x1400 ++#define INT_HI_OFF 0x1440 ++ ++#define INT_RTEBASE_OFF 0x0 ++#define INT_SR_OFF 0x20 ++#define INT_EN_OFF 0x24 ++#define INT_SET_OFF 0x28 ++#define INT_CLR_OFF 0x2c ++#define INT_PLE_OFF 0x30 ++#define INT_EDG_OFF 0x34 ++#define INT_BCE_OFF 0x38 ++#define INT_AUTO_OFF 0x3c ++ ++#define THSENS_INT_CTL_HI_OFF 0x1500 ++#define THSENS_INT_CTL_LO_OFF 0x1508 ++#define THSENS_INT_CTL_SR_CLR_OFF 0x1510 ++ ++#define THSENS_SCAL_OFF 0x1520 ++ ++#define W4_BASE0_OFF 0x2400 ++#define W4_BASE1_OFF 0x2408 ++#define W4_BASE2_OFF 0x2410 ++#define W4_BASE3_OFF 0x2418 ++#define W4_BASE4_OFF 0x2420 ++#define W4_BASE5_OFF 0x2428 ++#define W4_BASE6_OFF 0x2430 ++#define W4_BASE7_OFF 0x2438 ++ ++#define W4_MASK0_OFF 0x2440 ++#define W4_MASK1_OFF 0x2448 ++#define W4_MASK2_OFF 0x2450 ++#define W4_MASK3_OFF 0x2458 ++#define W4_MASK4_OFF 0x2460 ++#define W4_MASK5_OFF 0x2468 ++#define W4_MASK6_OFF 0x2470 ++#define W4_MASK7_OFF 0x2478 ++ ++#define W4_MMAP0_OFF 0x2480 ++#define W4_MMAP1_OFF 0x2488 ++#define W4_MMAP2_OFF 0x2490 ++#define W4_MMAP3_OFF 0x2498 ++#define W4_MMAP4_OFF 0x24a0 ++#define W4_MMAP5_OFF 0x24a8 ++#define W4_MMAP6_OFF 0x24b0 ++#define W4_MMAP7_OFF 0x24b8 ++ ++#define w5_BASE0_OFF 0x2500 ++#define w5_BASE1_OFF 0x2508 ++#define w5_BASE2_OFF 0x2510 ++#define w5_BASE3_OFF 0x2518 ++#define w5_BASE4_OFF 0x2520 ++#define w5_BASE5_OFF 0x2528 ++#define w5_BASE6_OFF 0x2530 ++#define w5_BASE7_OFF 0x2538 ++ ++#define w5_MASK0_OFF 0x2540 ++#define w5_MASK1_OFF 0x2548 ++#define w5_MASK2_OFF 0x2550 ++#define w5_MASK3_OFF 0x2558 ++#define w5_MASK4_OFF 0x2560 ++#define w5_MASK5_OFF 0x2568 ++#define w5_MASK6_OFF 0x2570 ++#define w5_MASK7_OFF 0x2578 ++ ++#define w5_MMAP0_OFF 0x2580 ++#define w5_MMAP1_OFF 0x2588 ++#define w5_MMAP2_OFF 0x2590 ++#define w5_MMAP3_OFF 0x2598 ++#define w5_MMAP4_OFF 0x25a0 ++#define w5_MMAP5_OFF 0x25a8 ++#define w5_MMAP6_OFF 0x25b0 ++#define w5_MMAP7_OFF 0x25b8 ++ ++#define PCI_HEAD20_OFF 0x3000 ++ ++#define PCI_HEAD30_OFF 0x3040 ++ ++#define PCI_HEAD31_OFF 0x3080 ++ ++#define PCI_HEAD40_OFF 0x30c0 ++ ++#define PCI_HEAD41_OFF 0x3100 ++ ++#define PCI_HEAD42_OFF 0x3140 ++ ++#define PCI_HEAD50_OFF 0x3180 ++ ++#define PCI_HEAD60_OFF 0x31c0 ++ ++#define PCI_HEAD70_OFF 0x3200 ++ ++#define PCI_HEAD80_OFF 0x3240 ++ ++#define PCI_HEADF0_OFF 0x32c0 ++ ++#define PCI_CFG20_OFF 0x3800 ++#define PCI_CFG30_OFF 0x3808 ++#define PCI_CFG31_OFF 0x3810 ++#define PCI_CFG40_OFF 0x3818 ++#define PCI_CFG41_OFF 0x3820 ++#define PCI_CFG42_OFF 0x3828 ++#define PCI_CFG50_OFF 0x3830 ++#define PCI_CFG60_OFF 0x3838 ++#define PCI_CFG70_OFF 0x3840 ++#define PCI_CFG80_OFF 0x3848 ++#define PCI_CFGF0_OFF 0x3850 ++ ++#define CHIP_ID_OFF 0x3ff8 ++/* end of conf bus */ ++ ++#if defined(CONFIG_LOONGSON_2K500) ++#define APB_BASE 0x1ff00000 ++#elif defined(CONFIG_LOONGSON_2K1000) ++#define APB_BASE 0x1fe00000 ++#endif ++ ++#define UART0_OFF 0x0 ++#define UART1_OFF 0x100 ++#define UART2_OFF 0x200 ++#define UART3_OFF 0x300 ++#define UART4_OFF 0x400 ++#define UART5_OFF 0x500 ++#define UART6_OFF 0x600 ++#define UART7_OFF 0x700 ++#define UART8_OFF 0x800 ++#define UART9_OFF 0x900 ++#define UARTA_OFF 0xa00 ++#define UARTB_OFF 0xb00 ++ ++#define I2C0_OFF 0x1000 ++#define I2C1_OFF 0x1800 ++ ++#define PWM_OFF 0x2000 ++ ++#define HPET_OFF 0x4000 ++#define AC97_OFF 0x5000 ++#define NAND_OFF 0x6000 ++ ++#define ACPI_OFF 0x7000 ++ ++#define RTC_OFF 0x7800 ++ ++#define DES_OFF 0x8000 ++#define AES_OFF 0x9000 ++#define RSA_OFF 0xa000 ++#define RNG_OFF 0xb000 ++#define SDIO_OFF 0xc000 ++#define I2S_OFF 0xd000 ++ ++#define IPI_BASE_OF(i) CKSEG1ADDR((CONF_BASE+0x100*i)) ++ ++#define IPI_OFF_STATUS 0x1000 ++#define IPI_OFF_ENABLE 0x1004 ++#define IPI_OFF_SET 0x1008 ++#define IPI_OFF_CLEAR 0x100c ++#define IPI_OFF_MAILBOX0 0x1020 ++#define IPI_OFF_MAILBOX1 0x1028 ++#define IPI_OFF_MAILBOX2 0x1030 ++#define IPI_OFF_MAILBOX3 0x1038 ++ ++#define VRAM_TYPE_SP 0 ++#define VRAM_TYPE_UMA 1 ++#define VRAM_TYPE_SP 0 /*GPU use his private memory with special address space*/ ++#define VRAM_TYPE_UMA_SP 1 /*GPU use his private memory with unified address space*/ ++#define VRAM_TYPE_UMA_LOW 2 /*GPU use low address syetem memory with unified address space*/ ++#define VRAM_TYPE_UMA_HIGH 3 /*GPU use high address syetem memory with unified address space*/ ++#define VRAM_TYPE_SP_LOW 4 /*GPU use low address syetem memory with special address space*/ ++#define VRAM_TYPE_SP_HIGH 5 /*GPU use high address syetem memory with special address space*/ ++ ++#define LS2K_IO_REG_BASE 0x1f000000 ++ ++/* CHIP CONFIG regs */ ++#define LS2K_CHIP_CFG_REG_BASE (LS2K_IO_REG_BASE + 0x00e10000) ++#define LS2K_APBDMA_CONFIG_REG (LS2K_CHIP_CFG_REG_BASE + 0x438) ++#define LS2K_GEN_CONFIG0_REG (LS2K_CHIP_CFG_REG_BASE + 0x420) ++#define LS2K_GEN_CONFIG1_REG (LS2K_CHIP_CFG_REG_BASE + 0x428) ++ ++#define LS2K_PIX0_PLL (LS2K_CHIP_CFG_REG_BASE + 0x4b0) ++#define LS2K_PIX1_PLL (LS2K_CHIP_CFG_REG_BASE + 0x4c0) ++ ++#define LS2K_INT_REG_BASE (LS2K_CHIP_CFG_REG_BASE + 0x1420) ++ ++#define LS2K_INT_ISR0_REG (LS2K_CHIP_CFG_REG_BASE + 0x1420) ++#define LS2K_INT_IEN0_REG (LS2K_CHIP_CFG_REG_BASE + 0x1424) ++#define LS2K_INT_SET0_REG (LS2K_CHIP_CFG_REG_BASE + 0x1428) ++#define LS2K_INT_CLR0_REG (LS2K_CHIP_CFG_REG_BASE + 0x142c) ++#define LS2K_INT_POL0_REG (LS2K_CHIP_CFG_REG_BASE + 0x1430) ++#define LS2K_INT_EDGE0_REG (LS2K_CHIP_CFG_REG_BASE + 0x1434) ++#define LS2K_INT_BOUNCE_REG (LS2K_CHIP_CFG_REG_BASE + 0x1438) ++#define LS2K_INT_AUTO_REG (LS2K_CHIP_CFG_REG_BASE + 0x143c) ++ ++#define LS2K_GPIO0_OEN_REG (LS2K_CHIP_CFG_REG_BASE + 0x0500) ++#define LS2K_GPIO1_OEN_REG (LS2K_CHIP_CFG_REG_BASE + 0x0508) ++#define LS2K_GPIO0_O_REG (LS2K_CHIP_CFG_REG_BASE + 0x0510) ++#define LS2K_GPIO1_O_REG (LS2K_CHIP_CFG_REG_BASE + 0x0518) ++#define LS2K_GPIO0_I_REG (LS2K_CHIP_CFG_REG_BASE + 0x0520) ++#define LS2K_GPIO1_I_REG (LS2K_CHIP_CFG_REG_BASE + 0x0528) ++#define LS2K_GPIO0_INT_REG (LS2K_CHIP_CFG_REG_BASE + 0x0530) ++#define LS2K_GPIO1_INT_REG (LS2K_CHIP_CFG_REG_BASE + 0x0538) ++ ++#define LS2K_DMA_ORDER_REG (LS2K_CHIP_CFG_REG_BASE + 0x0c00) ++#define LS2K_CHIP_CFG0_REG (LS2K_CHIP_CFG_REG_BASE + 0x0200) ++#define LS2K_CHIP_CFG1_REG (LS2K_CHIP_CFG_REG_BASE + 0x0204) ++#define LS2K_CHIP_CFG2_REG (LS2K_CHIP_CFG_REG_BASE + 0x0208) ++#define LS2K_CHIP_CFG3_REG (LS2K_CHIP_CFG_REG_BASE + 0x020c) ++#define LS2K_CHIP_SAMP0_REG (LS2K_CHIP_CFG_REG_BASE + 0x0210) ++#define LS2K_CHIP_SAMP1_REG (LS2K_CHIP_CFG_REG_BASE + 0x0214) ++#define LS2K_CHIP_SAMP2_REG (LS2K_CHIP_CFG_REG_BASE + 0x0218) ++#define LS2K_CHIP_SAMP3_REG (LS2K_CHIP_CFG_REG_BASE + 0x021c) ++#define LS2K_CLK_CTRL0_REG (LS2K_CHIP_CFG_REG_BASE + 0x0220) ++#define LS2K_CLK_CTRL1_REG (LS2K_CHIP_CFG_REG_BASE + 0x0224) ++#define LS2K_CLK_CTRL2_REG (LS2K_CHIP_CFG_REG_BASE + 0x0228) ++#define LS2K_CLK_CTRL3_REG (LS2K_CHIP_CFG_REG_BASE + 0x022c) ++#define LS2K_PIXCLK0_CTRL0_REG (LS2K_CHIP_CFG_REG_BASE + 0x0230) ++#define LS2K_PIXCLK0_CTRL1_REG (LS2K_CHIP_CFG_REG_BASE + 0x0234) ++#define LS2K_PIXCLK1_CTRL0_REG (LS2K_CHIP_CFG_REG_BASE + 0x0238) ++#define LS2K_PIXCLK1_CTRL1_REG (LS2K_CHIP_CFG_REG_BASE + 0x023c) ++ ++#define LS2K_WIN_CFG_BASE (LS2K_CHIP_CFG_REG_BASE + 0x80000) ++#define LS2K_M4_WIN0_BASE_REG (LS2K_WIN_CFG_BASE + 0x0400) ++#define LS2K_M4_WIN0_MASK_REG (LS2K_WIN_CFG_BASE + 0x0440) ++#define LS2K_M4_WIN0_MMAP_REG (LS2K_WIN_CFG_BASE + 0x0480) ++ ++/* USB regs */ ++#define LS2K_EHCI_REG_BASE (LS2K_IO_REG_BASE + 0x00e00000) ++#define LS2K_OHCI_REG_BASE (LS2K_IO_REG_BASE + 0x00e08000) ++ ++/* GMAC regs */ ++#define LS2K_GMAC0_REG_BASE (LS2K_IO_REG_BASE + 0x00e10000) ++#define LS2K_GMAC1_REG_BASE (LS2K_IO_REG_BASE + 0x00e18000) ++ ++/* HDA regs */ ++#define LS2K_HDA_REG_BASE (LS2K_IO_REG_BASE + 0x00e20000) ++ ++/* SATAregs */ ++#define LS2K_SATA_REG_BASE (LS2K_IO_REG_BASE + 0x00e30000) ++ ++/* OTG regs */ ++#define LS2K_OTG_REG_BASE (LS2K_IO_REG_BASE + 0x00e60000) ++ ++/* UART regs */ ++#define LS2K_UART0_REG_BASE (LS2K_IO_REG_BASE + 0x00e00000) ++#define LS2K_UART1_REG_BASE (LS2K_IO_REG_BASE + 0x00e00100) ++#define LS2K_UART2_REG_BASE (LS2K_IO_REG_BASE + 0x00e00200) ++#define LS2K_UART3_REG_BASE (LS2K_IO_REG_BASE + 0x00e00300) ++#define LS2K_UART4_REG_BASE (LS2K_IO_REG_BASE + 0x00e00400) ++#define LS2K_UART5_REG_BASE (LS2K_IO_REG_BASE + 0x00e00500) ++#define LS2K_UART6_REG_BASE (LS2K_IO_REG_BASE + 0x00e00600) ++#define LS2K_UART7_REG_BASE (LS2K_IO_REG_BASE + 0x00e00700) ++#define LS2K_UART8_REG_BASE (LS2K_IO_REG_BASE + 0x00e00800) ++#define LS2K_UART9_REG_BASE (LS2K_IO_REG_BASE + 0x00e00900) ++#define LS2K_UART10_REG_BASE (LS2K_IO_REG_BASE + 0x00e00a00) ++#define LS2K_UART11_REG_BASE (LS2K_IO_REG_BASE + 0x00e00b00) ++ ++#define LS2K_CAN0_REG_BASE (LS2K_IO_REG_BASE + 0x00e00c00) ++#define LS2K_CAN1_REG_BASE (LS2K_IO_REG_BASE + 0x00e00d00) ++ ++/* I2C regs */ ++#define LS2K_I2C0_REG_BASE (LS2K_IO_REG_BASE + 0x00e01000) ++#define LS2K_I2C0_PRER_LO_REG (LS2K_I2C0_REG_BASE + 0x0) ++#define LS2K_I2C0_PRER_HI_REG (LS2K_I2C0_REG_BASE + 0x1) ++#define LS2K_I2C0_CTR_REG (LS2K_I2C0_REG_BASE + 0x2) ++#define LS2K_I2C0_TXR_REG (LS2K_I2C0_REG_BASE + 0x3) ++#define LS2K_I2C0_RXR_REG (LS2K_I2C0_REG_BASE + 0x3) ++#define LS2K_I2C0_CR_REG (LS2K_I2C0_REG_BASE + 0x4) ++#define LS2K_I2C0_SR_REG (LS2K_I2C0_REG_BASE + 0x4) ++ ++#define LS2K_I2C1_REG_BASE (LS2K_IO_REG_BASE + 0x00e01800) ++#define LS2K_I2C1_PRER_LO_REG (LS2K_I2C1_REG_BASE + 0x0) ++#define LS2K_I2C1_PRER_HI_REG (LS2K_I2C1_REG_BASE + 0x1) ++#define LS2K_I2C1_CTR_REG (LS2K_I2C1_REG_BASE + 0x2) ++#define LS2K_I2C1_TXR_REG (LS2K_I2C1_REG_BASE + 0x3) ++#define LS2K_I2C1_RXR_REG (LS2K_I2C1_REG_BASE + 0x3) ++#define LS2K_I2C1_CR_REG (LS2K_I2C1_REG_BASE + 0x4) ++#define LS2K_I2C1_SR_REG (LS2K_I2C1_REG_BASE + 0x4) ++ ++/* RTC regs */ ++#define LS2K_RTC_REG_BASE (LS2K_IO_REG_BASE + 0x00e07800) ++#define LS2K_TOY_TRIM_REG (LS2K_RTC_REG_BASE + 0x0020) ++#define LS2K_TOY_WRITE0_REG (LS2K_RTC_REG_BASE + 0x0024) ++#define LS2K_TOY_WRITE1_REG (LS2K_RTC_REG_BASE + 0x0028) ++#define LS2K_TOY_READ0_REG (LS2K_RTC_REG_BASE + 0x002c) ++#define LS2K_TOY_READ1_REG (LS2K_RTC_REG_BASE + 0x0030) ++#define LS2K_TOY_MATCH0_REG (LS2K_RTC_REG_BASE + 0x0034) ++#define LS2K_TOY_MATCH1_REG (LS2K_RTC_REG_BASE + 0x0038) ++#define LS2K_TOY_MATCH2_REG (LS2K_RTC_REG_BASE + 0x003c) ++#define LS2K_RTC_CTRL_REG (LS2K_RTC_REG_BASE + 0x0040) ++#define LS2K_RTC_TRIM_REG (LS2K_RTC_REG_BASE + 0x0060) ++#define LS2K_RTC_WRITE0_REG (LS2K_RTC_REG_BASE + 0x0064) ++#define LS2K_RTC_READ0_REG (LS2K_RTC_REG_BASE + 0x0068) ++#define LS2K_RTC_MATCH0_REG (LS2K_RTC_REG_BASE + 0x006c) ++#define LS2K_RTC_MATCH1_REG (LS2K_RTC_REG_BASE + 0x0070) ++#define LS2K_RTC_MATCH2_REG (LS2K_RTC_REG_BASE + 0x0074) ++ ++#define LS2K_SDIO_REG_BASE (LS2K_IO_REG_BASE + 0x00e0c000) ++#define LS2K_I2S_REG_BASE (LS2K_IO_REG_BASE + 0x00e0d000) ++ ++ ++#define LS2K_IOINTC_HWIRQ_BASE 8 /* should keep consistent with dts */ ++#define LS2K_INT_MSI_TRIGGER_0 (LS2K_CHIP_CFG_REG_BASE + 0x14b0) ++#define LS2K_INT_MSI_TRIGGER_EN_0 (LS2K_CHIP_CFG_REG_BASE + 0x14b4) ++#define LS2K_INT_MSI_TRIGGER_1 (LS2K_CHIP_CFG_REG_BASE + 0x14f0) ++#define LS2K_INT_MSI_TRIGGER_EN_1 (LS2K_CHIP_CFG_REG_BASE + 0x14f4) ++#define LS2K_IRQ_MASK 0xffffff3fbffff3ff ++ ++#define LS2K_INTISR_REG(i) TO_UNCAC(0x1fe11420 | (((i) > 31) ? 0x40 : 0)) ++#define LS2K_INTEN_REG(i) TO_UNCAC(0x1fe11424 | (((i) > 31) ? 0x40 : 0)) ++#define LS2K_INTENSET_REG(i) TO_UNCAC(0x1fe11428 | (((i) > 31) ? 0x40 : 0)) ++#define LS2K_INTENCLR_REG(i) TO_UNCAC(0x1fe1142c | (((i) > 31) ? 0x40 : 0)) ++#define LS2K_INTPOL_REG(i) TO_UNCAC(0x1fe11430 | (((i) > 31) ? 0x40 : 0)) ++#define LS2K_INTEDGE_REG(i) TO_UNCAC(0x1fe11434 | (((i) > 31) ? 0x40 : 0)) ++#define LS2K_INTBOUNCE_REG(i) TO_UNCAC(0x1fe11438 | (((i) > 31) ? 0x40 : 0)) ++#define LS2K_INTAUTO_REG(i) TO_UNCAC(0x1fe1143c | (((i) > 31) ? 0x40 : 0)) ++#define LS2K_COREx_INTISR0_REG(x) TO_UNCAC(0x1fe11040 + (x)*0x100) ++#define LS2K_COREx_INTISR1_REG(x) TO_UNCAC(0x1fe11048 + (x)*0x100) ++#define LS2K_IRQ_ROUTE_REG(i) TO_UNCAC((0x1fe11400 | (((i) > 31) ? 0x40 : 0))\ ++ + ((i) % 32)) ++#define LS2K_IOINTC_IRQ_LINE 1 /* IP3 */ ++ ++/* REG ACCESS*/ ++#define ls2k_readb(addr) (*(volatile unsigned char *)TO_UNCAC(addr)) ++#define ls2k_readw(addr) (*(volatile unsigned short *)TO_UNCAC(addr)) ++#define ls2k_readl(addr) (*(volatile unsigned int *)TO_UNCAC(addr)) ++#define ls2k_readq(addr) (*(volatile unsigned long *)TO_UNCAC(addr)) ++#define ls2k_writeb(val, addr) (*(volatile unsigned char *)TO_UNCAC(addr) = (val)) ++#define ls2k_writew(val, addr) (*(volatile unsigned short *)TO_UNCAC(addr) = (val)) ++#define ls2k_writel(val, addr) (*(volatile unsigned int *)TO_UNCAC(addr) = (val)) ++#define ls2k_writeq(val, addr) (*(volatile unsigned long *)TO_UNCAC(addr) = (val)) ++ ++#define LS2K_VER3 3 ++ ++struct ls2k_nand_plat_data { ++ int enable_arbiter; ++ u32 nr_parts; ++ u32 chip_ver; ++ struct mtd_partition *parts; ++ int cs; ++ u32 csrdy; ++ int chip_cap; ++}; ++ ++enum ACPI_Sx { ++ ACPI_S3 = 5, ++ ACPI_S4 = 6, ++ ACPI_S5 = 7, ++}; ++ ++#define ACPI_BASE (APB_BASE + ACPI_OFF) ++#define S_GPMCR 0 ++#define R_GPMCR 0x4 ++#define RTC_GPMCR 0x8 ++#define PM1_STS 0xc ++#define PM1_SR 0x10 ++#define PM1_CTR 0x14 ++#define PM1_TIMER 0x18 ++#define PM_PCTR 0x1c ++ ++#define GPE0_STS 0x28 ++#define GPE0_SR 0x2c ++#define RST_CTR 0x00 ++#define WD_CR 0x04 ++#define WD_TIMER 0x08 ++ ++#define THER_SCR 0x4c ++#define G_RTC_1 0x50 ++#define G_RTC_2 0x54 ++ ++#define DPM_CfG 0x400 ++#define DPM_STS 0x404 ++#define DPM_CTR 0x408 ++ ++#define DVFS_CFG 0x410 ++#define DVFS_STS 0x414 ++#define DVFS_CNT 0x418 ++ ++#define MIN_FREQ_LEVEL 1 ++#define DVFS_STS_STATUS_MASK (0x01) ++ ++#define DVFS_CNT_START (0x01) ++#define DVFS_CNT_UPDATE_EN (0x01 << 22) ++#define DVFS_CNT_DIV(div) (div << 16) ++#define DVFS_CNT_POL (0x01 << 2) ++#define DVFS_CNT_VID_EN (0x01 << 1) ++#define DVFS_CNT_POL_UP (0x01 << 3) ++#define DVFS_CNT_POL_DOWN (~(0x01 << 3)) ++#define DVFS_CNT_VID(vid) (vid << 4) ++ ++#define DVFS_CFG_DVFS_EN (0x01) ++#define DVFS_CFG_BACKUP_CLOCK (0x01 << 4) ++#define DVFS_CFG_PROTECT_FULL (0x03 << 6) ++ ++#define DVFS_STS_FEQ_STS_OFFSET 16 ++#define DVFS_STS_FEQ_STS_MASK GENMASK(21, 16) ++ ++/* ACPI ACCESS */ ++#define acpi_readb(offset) ls2k_readb((ACPI_BASE + offset)) ++#define acpi_readw(offset) ls2k_readw((ACPI_BASE + offset)) ++#define acpi_readl(offset) ls2k_readl((ACPI_BASE + offset)) ++#define acpi_readq(offset) ls2k_readq((ACPI_BASE + offset)) ++#define acpi_writeb(val, offset) ls2k_writeb((val), (ACPI_BASE + offset)) ++#define acpi_writew(val, offset) ls2k_writew((val), (ACPI_BASE + offset)) ++#define acpi_writel(val, offset) ls2k_writel((val), (ACPI_BASE + offset)) ++#define acpi_writeq(val, offset) ls2k_writeq((val), (ACPI_BASE + offset)) ++ ++ ++/*clk */ ++#define NODE_L2DIV_OUT_SHIFT 0 ++#define NODE_L1DIV_OUT_SHIFT 42 ++#define NODE_L1DIV_LOOPC_SHIFT 32 ++#define NODE_L1DIV_REF_SHIFT 26 ++ ++#define NODE_L2DIV_OUT_WIDTH 6 ++#define NODE_L1DIV_OUT_WIDTH 6 ++#define NODE_L1DIV_LOOPC_WIDTH 10 ++#define NODE_L1DIV_REF_WIDTH 6 ++ ++#define NODE_L2DIV_OUT_MARK 0x3f ++#define NODE_L1DIV_OUT_MARK 0x3f ++#define NODE_L1DIV_LOOPC_MARK 0x3ff ++#define NODE_L1DIV_REF_MARK 0x3f ++ ++#define DDR_L2DIV_OUT_HDA_SHIFT 44 ++#define DDR_L2DIV_OUT_GPU_SHIFT 22 ++#define DDR_L2DIV_OUT_DDR_SHIFT 0 ++#define DDR_L1DIV_OUT_SHIFT 42 ++#define DDR_L1DIV_LOOPC_SHIFT 32 ++#define DDR_L1DIV_REF_SHIFT 26 ++ ++#define DDR_L2DIV_OUT_HDA_WIDTH 7 ++#define DDR_L2DIV_OUT_GPU_WIDTH 6 ++#define DDR_L2DIV_OUT_DDR_WIDTH 6 ++#define DDR_L1DIV_OUT_WIDTH 6 ++#define DDR_L1DIV_LOOPC_WIDTH 10 ++#define DDR_L1DIV_REF_WIDTH 6 ++ ++#define DDR_L2DIV_OUT_HDA_MARK 0x7f ++#define DDR_L2DIV_OUT_GPU_MARK 0x3f ++#define DDR_L2DIV_OUT_DDR_MARK 0x3f ++#define DDR_L1DIV_OUT_MARK 0x3f ++#define DDR_L1DIV_LOOPC_MARK 0x3ff ++#define DDR_L1DIV_REF_MARK 0x3f ++ ++ ++#define DC_L2DIV_OUT_GMAC_SHIFT 22 ++#define DC_L2DIV_OUT_DC_SHIFT 0 ++#define DC_L1DIV_OUT_SHIFT 42 ++#define DC_L1DIV_LOOPC_SHIFT 32 ++#define DC_L1DIV_REF_SHIFT 26 ++ ++#define DC_L2DIV_OUT_GMAC_WIDTH 6 ++#define DC_L2DIV_OUT_DC_WIDTH 6 ++#define DC_L1DIV_OUT_WIDTH 6 ++#define DC_L1DIV_LOOPC_WIDTH 10 ++#define DC_L1DIV_REF_WIDTH 6 ++ ++#define DC_L2DIV_OUT_GMAC_MARK 0x3f ++#define DC_L2DIV_OUT_DC_MARK 0x3f ++#define DC_L1DIV_OUT_MARK 0x3f ++#define DC_L1DIV_LOOPC_MARK 0x3ff ++#define DC_L1DIV_REF_MARK 0x3f ++ ++ ++#define PIX_L2DIV_OUT_PIX_SHIFT 0 ++#define PIX_L1DIV_OUT_SHIFT 42 ++#define PIX_L1DIV_LOOPC_SHIFT 32 ++#define PIX_L1DIV_REF_SHIFT 26 ++ ++#define PIX_L2DIV_OUT_GMAC_WIDTH 6 ++#define PIX_L2DIV_OUT_DC_WIDTH 6 ++#define PIX_L1DIV_OUT_WIDTH 6 ++#define PIX_L1DIV_LOOPC_WIDTH 10 ++#define PIX_L1DIV_REF_WIDTH 6 ++ ++#define PIX_L2DIV_OUT_PIX0_MARK 0x3f ++#define PIX_L1DIV_OUT_MARK 0x3f ++#define PIX_L1DIV_LOOPC_MARK 0x3ff ++#define PIX_L1DIV_REF_MARK 0x3f ++ ++#define FREQSCALE_APB_SHIFT 20 ++#define FREQSCALE_USB_SHIFT 16 ++#define FREQSCALE_SATA_SHIFT 12 ++#define FREQSCALE_BOOT_SHIFT 8 ++#define FREQSCALE_NODE_SHIFT 0 ++ ++#define FREQSCALE_APB_MARK 0x7 ++#define FREQSCALE_USB_MARK 0x7 ++#define FREQSCALE_SATA_MARK 0x7 ++#define FREQSCALE_BOOT_MARK 0x7 ++#define FREQSCALE_NODE_MARK 0x7 ++ ++#endif /* __ASM_MACH_LOONGSON_2K_H_ */ +diff --git a/arch/loongarch/include/asm/mach/loongson-2k300.h b/arch/loongarch/include/asm/mach/loongson-2k300.h +new file mode 100644 +index 000000000..1dd91fdae +--- /dev/null ++++ b/arch/loongarch/include/asm/mach/loongson-2k300.h +@@ -0,0 +1,123 @@ ++/* ++ * Copyright (C) 2020, Loongson Technology Corporation Limited, Inc. ++ * ++ * This program is free software; you can distribute it and/or modify it ++ * under the terms of the GNU General Public License (Version 2) as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * for more details. ++ * ++*/ ++ ++#ifdef CONFIG_LOONGSON_2K300 ++ ++#ifndef __ASM_MACH_LOONGSON_2K300_H_ ++#define __ASM_MACH_LOONGSON_2K300_H_ ++ ++#define PLL_NODE_0_OFFSET 0x0 ++#define PLL_NODE_1_OFFSET 0x4 ++#define PLL_DDR_0_OFFSET 0x8 ++#define PLL_DDR_1_OFFSET 0xc ++#define PLL_PIX_0_OFFSET 0x18 ++#define PLL_PIX_1_OFFSET 0x1c ++#define PLL_FREQ_SC 0x20 ++ ++//6 bit [30:24] odiv 7bit 0x111 1111 ++#define PLL_GENERIC_0_ODIV_SHIFT 24 ++#define PLL_GENERIC_0_ODIV_MASK 0x7f ++ ++//8 bit [23:15] loopc 9bit 0x1 1111 1111 ++#define PLL_GENERIC_0_LOOPC_SHIFT 15 ++#define PLL_GENERIC_0_LOOPC_MASK 0x1ff ++ ++//6 bit [14:8] refc 7bit 0x111 1111 ++#define PLL_GENERIC_0_REFC_SHIFT 8 ++#define PLL_GENERIC_0_REFC_MASK 0x3f ++ ++//6 bit [14:8] 7bit 0x111 1111 ++#define PLL_GENERIC_1_ODIV_1_SHIFT 8 ++#define PLL_GENERIC_1_ODIV_1_MASK 0x7f ++ ++//6 bit [6:0] 7bit 0x111 1111 ++#define PLL_GENERIC_1_ODIV_0_SHIFT 0 ++#define PLL_GENERIC_1_ODIV_0_MASK 0x7f ++ ++//////////////////////////////////////// ++ ++// node and cpu ++#define PLL_NODE_0_REFC_SHIFT PLL_GENERIC_0_REFC_SHIFT ++#define PLL_NODE_0_REFC_MASK PLL_GENERIC_0_REFC_MASK ++ ++#define PLL_NODE_0_LOOPC_SHIFT PLL_GENERIC_0_LOOPC_SHIFT ++#define PLL_NODE_0_LOOPC_MASK PLL_GENERIC_0_LOOPC_MASK ++ ++#define PLL_NODE_0_ODIV_SHIFT PLL_GENERIC_0_ODIV_SHIFT ++#define PLL_NODE_0_ODIV_MASK PLL_GENERIC_0_ODIV_MASK ++ ++// i2s and gmac ++#define PLL_NODE_1_ODIV_I2S_SHIFT PLL_GENERIC_1_ODIV_1_SHIFT ++#define PLL_NODE_1_ODIV_I2S_MASK PLL_GENERIC_1_ODIV_1_MASK ++ ++#define PLL_NODE_1_ODIV_GMAC_SHIFT PLL_GENERIC_1_ODIV_0_SHIFT ++#define PLL_NODE_1_ODIV_GMAC_MASK PLL_GENERIC_1_ODIV_0_MASK ++ ++// ddr pll and ddr ++#define PLL_DDR_0_REFC_SHIFT PLL_GENERIC_0_REFC_SHIFT ++#define PLL_DDR_0_REFC_MASK PLL_GENERIC_0_REFC_MASK ++ ++#define PLL_DDR_0_LOOPC_SHIFT PLL_GENERIC_0_LOOPC_SHIFT ++#define PLL_DDR_0_LOOPC_MASK PLL_GENERIC_0_LOOPC_MASK ++ ++#define PLL_DDR_0_ODIV_SHIFT PLL_GENERIC_0_ODIV_SHIFT ++#define PLL_DDR_0_ODIV_MASK PLL_GENERIC_0_ODIV_MASK ++ ++// devs and network ++#define PLL_DDR_1_ODIV_DEVS_SHIFT PLL_GENERIC_1_ODIV_1_SHIFT ++#define PLL_DDR_1_ODIV_DEVS_MASK PLL_GENERIC_1_ODIV_1_MASK ++ ++#define PLL_DDR_1_ODIV_NET_SHIFT PLL_GENERIC_1_ODIV_0_SHIFT ++#define PLL_DDR_1_ODIV_NET_MASK PLL_GENERIC_1_ODIV_0_MASK ++ ++// pix pll and pix ++#define PLL_PIX0_0_REFC_SHIFT PLL_GENERIC_0_REFC_SHIFT ++#define PLL_PIX0_0_REFC_MASK PLL_GENERIC_0_REFC_MASK ++ ++#define PLL_PIX0_0_LOOPC_SHIFT PLL_GENERIC_0_LOOPC_SHIFT ++#define PLL_PIX0_0_LOOPC_MASK PLL_GENERIC_0_LOOPC_MASK ++ ++#define PLL_PIX0_0_ODIV_SHIFT PLL_GENERIC_0_ODIV_SHIFT ++#define PLL_PIX0_0_ODIV_MASK PLL_GENERIC_0_ODIV_MASK ++ ++// gmac bp ++#define PLL_PIX0_1_ODIV_GMACBP_SHIFT PLL_GENERIC_1_ODIV_0_SHIFT ++#define PLL_PIX0_1_ODIV_GMACBP_MASK PLL_GENERIC_1_ODIV_0_MASK ++ ++#define PLL_FREQSCALE_SDIO_SHIFT 24 ++#define PLL_FREQSCALE_SDIO_MASK 0xf ++ ++#define PLL_FREQSCALE_I2S_SHIFT 20 ++#define PLL_FREQSCALE_I2S_MASK 0xf ++ ++#define PLL_FREQSCALE_APB_SHIFT 16 ++#define PLL_FREQSCALE_APB_MASK 0xf ++ ++#define PLL_FREQSCALE_USB_SHIFT 12 ++#define PLL_FREQSCALE_USB_MASK 0xf ++ ++#define PLL_FREQSCALE_BOOT_SHIFT 8 ++#define PLL_FREQSCALE_BOOT_MASK 0xf ++ ++#define PLL_FREQSCALE_PIX_SHIFT 4 ++#define PLL_FREQSCALE_PIX_MASK 0xf ++ ++#define PLL_FREQSCALE_NODE_SHIFT 0 ++#define PLL_FREQSCALE_NODE_MASK 0xf ++/* ++ * about clk manager (PLL) ++ */ ++ ++#endif /* __ASM_MACH_LOONGSON_2K300_H_ */ ++#endif /* CONFIG_LOONGSON_2K300 */ +diff --git a/arch/loongarch/kernel/Makefile b/arch/loongarch/kernel/Makefile +index 6c148ccea..8a56c950e 100644 +--- a/arch/loongarch/kernel/Makefile ++++ b/arch/loongarch/kernel/Makefile +@@ -9,7 +9,7 @@ obj-y += head.o cpu-probe.o cacheinfo.o env.o setup.o entry.o genex.o \ + traps.o irq.o idle.o process.o dma.o mem.o io.o reset.o switch.o \ + elf.o syscall.o signal.o time.o topology.o inst.o ptrace.o vdso.o \ + alternative.o unwind.o +-obj-y += legacy_boot.o ++#obj-y += legacy_boot.o + + obj-$(CONFIG_ACPI) += acpi.o + obj-$(CONFIG_EFI) += efi.o +diff --git a/arch/loongarch/kernel/acpi.c b/arch/loongarch/kernel/acpi.c +index f453271e6..650c58026 100644 +--- a/arch/loongarch/kernel/acpi.c ++++ b/arch/loongarch/kernel/acpi.c +@@ -17,7 +17,7 @@ + #include + #include + #include +-#include "legacy_boot.h" ++//#include "legacy_boot.h" + + int acpi_disabled; + EXPORT_SYMBOL(acpi_disabled); +@@ -134,8 +134,10 @@ static void __init acpi_process_madt(void) + } + #endif + ++#if 0 + if (efi_bp && bpi_version <= BPI_VERSION_V1) + legacy_madt_table_init(); ++#endif + + acpi_table_parse_madt(ACPI_MADT_TYPE_CORE_PIC, + acpi_parse_processor, MAX_CORE_PIC); +diff --git a/arch/loongarch/kernel/efi.c b/arch/loongarch/kernel/efi.c +index b132af112..f26b88a89 100644 +--- a/arch/loongarch/kernel/efi.c ++++ b/arch/loongarch/kernel/efi.c +@@ -26,14 +26,14 @@ + #include + #include + #include +-#include "legacy_boot.h" ++//#include "legacy_boot.h" + + static unsigned long efi_nr_tables; + static unsigned long efi_config_table; + + static unsigned long __initdata boot_memmap = EFI_INVALID_TABLE_ADDR; + static unsigned long __initdata fdt_pointer = EFI_INVALID_TABLE_ADDR; +-static __initdata pgd_t *pgd_efi; ++//static __initdata pgd_t *pgd_efi; + + static efi_system_table_t *efi_systab; + static efi_config_table_type_t arch_tables[] __initdata = { +@@ -53,6 +53,7 @@ void __init *efi_fdt_pointer(void) + return early_memremap_ro(fdt_pointer, SZ_64K); + } + ++#if 0 + static int __init efimap_populate_hugepages( + unsigned long start, unsigned long end, + pgprot_t prot) +@@ -207,10 +208,11 @@ static int __init set_virtual_map(void) + + return 0; + } ++#endif + + void __init efi_runtime_init(void) + { +- efi_status_t status; ++ //efi_status_t status; + + if (!efi_enabled(EFI_BOOT) || !efi_systab->runtime) + return; +@@ -220,9 +222,11 @@ void __init efi_runtime_init(void) + return; + } + ++#if 0 + status = set_virtual_map(); + if (status < 0) + return; ++#endif + + efi.runtime = READ_ONCE(efi_systab->runtime); + efi.runtime_version = (unsigned int)efi.runtime->hdr.revision; +@@ -258,12 +262,21 @@ void __init efi_init(void) + void *config_tables; + struct efi_boot_memmap *tbl; + ++ printk("efi_system_table [0x%016llx]\n", efi_system_table); ++ printk("fw_arg2 [0x%016llx]\n", (u64)fw_arg2); ++ #if 0 + if (efi_system_table) ++ { + efi_systab = (efi_system_table_t *)early_memremap_ro(efi_system_table, + sizeof(*efi_systab)); +- else ++ printk("efi_system_table true\n"); ++ }else{ + efi_systab = (efi_system_table_t *)efi_bp->systemtable; ++ printk("efi_system_table false\n"); ++ } ++ #endif + ++ efi_systab = (efi_system_table_t *)early_memremap_ro(efi_system_table, sizeof(*efi_systab)); + if (!efi_systab) { + pr_err("Can't find EFI system table.\n"); + return; +diff --git a/arch/loongarch/kernel/env.c b/arch/loongarch/kernel/env.c +index 85dbfb125..dd88c3187 100644 +--- a/arch/loongarch/kernel/env.c ++++ b/arch/loongarch/kernel/env.c +@@ -12,7 +12,7 @@ + #include + #include + #include +-#include "legacy_boot.h" ++//#include "legacy_boot.h" + + u64 efi_system_table; + struct loongson_system_configuration loongson_sysconf; +@@ -22,12 +22,12 @@ void __init init_environ(void) + { + int efi_boot = fw_arg0; + char *cmdline = early_memremap_ro(fw_arg1, COMMAND_LINE_SIZE); +- ++#if 0 + legacy_boot_init(fw_arg0, fw_arg1, fw_arg2); + + if (efi_bp) + return; +- ++#endif + if (efi_boot) + set_bit(EFI_BOOT, &efi.flags); + else +diff --git a/arch/loongarch/kernel/head.S b/arch/loongarch/kernel/head.S +index 53b883db0..753fa1c3f 100644 +--- a/arch/loongarch/kernel/head.S ++++ b/arch/loongarch/kernel/head.S +@@ -75,6 +75,12 @@ SYM_CODE_START(kernel_entry) # kernel entry point + la.pcrel t0, fw_arg2 + st.d a2, t0, 0 + ++#ifdef CONFIG_PAGE_SIZE_4KB ++ li.d t0, 0 ++ li.d t1, CSR_STFILL ++ csrxchg t0, t1, LOONGARCH_CSR_IMPCTL1 ++#endif ++ + /* KSave3 used for percpu base, initialized as 0 */ + csrwr zero, PERCPU_BASE_KS + /* GPR21 used for percpu base (runtime), initialized as 0 */ +@@ -127,6 +133,12 @@ SYM_CODE_START(smpboot_entry) + + JUMP_VIRT_ADDR t0, t1 + ++#ifdef CONFIG_PAGE_SIZE_4KB ++ li.d t0, 0 ++ li.d t1, CSR_STFILL ++ csrxchg t0, t1, LOONGARCH_CSR_IMPCTL1 ++#endif ++ + /* Enable PG */ + li.w t0, 0xb0 # PLV=0, IE=0, PG=1 + csrwr t0, LOONGARCH_CSR_CRMD +diff --git a/arch/loongarch/kernel/irq.c b/arch/loongarch/kernel/irq.c +index 8b21449a7..d50de4398 100644 +--- a/arch/loongarch/kernel/irq.c ++++ b/arch/loongarch/kernel/irq.c +@@ -20,7 +20,7 @@ + #include + #include + #include +-#include "legacy_boot.h" ++//#include "legacy_boot.h" + + DEFINE_PER_CPU(unsigned long, irq_stack); + DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat); +@@ -124,7 +124,8 @@ void fixup_irqs(void) + + void __init init_IRQ(void) + { +- int i, ret; ++ //int i, ret; ++ int i; + unsigned int order = get_order(IRQ_STACK_SIZE); + struct page *page; + +@@ -132,6 +133,7 @@ void __init init_IRQ(void) + clear_csr_estat(ESTATF_IP); + + init_vec_parent_group(); ++ #if 0 + if (efi_bp && bpi_version <= BPI_VERSION_V1) { + ret = setup_legacy_IRQ(); + if (ret) +@@ -139,6 +141,9 @@ void __init init_IRQ(void) + } else { + irqchip_init(); + } ++ #else ++ irqchip_init(); ++ #endif + #ifdef CONFIG_SMP + smp_ops.init_ipi(); + #endif +diff --git a/arch/loongarch/kernel/mem.c b/arch/loongarch/kernel/mem.c +index 5fd1bc333..f5a9acb50 100644 +--- a/arch/loongarch/kernel/mem.c ++++ b/arch/loongarch/kernel/mem.c +@@ -9,12 +9,14 @@ + #include + #include + #include +-#include "legacy_boot.h" ++//#include "legacy_boot.h" + void __init memblock_init(void) + { +- u32 i, mem_type; ++ //u32 i, mem_type; ++ u32 mem_type; + u64 mem_start, mem_end, mem_size; + efi_memory_desc_t *md; ++ #if 0 + if (g_mmap) { + /* parse memory information */ + for (i = 0; i < g_mmap->map_count; i++) { +@@ -26,6 +28,7 @@ void __init memblock_init(void) + switch (mem_type) { + case ADDRESS_TYPE_SYSRAM: + pr_info("add memory region memblock - base: 0x%llx size: 0x%llx\n", mem_start, mem_size); ++ printk("%s memblock_add [0x%016llx] [0x%016llx]\n", __func__, mem_start, mem_size); + memblock_add(mem_start, mem_size); + if (max_low_pfn < (mem_end >> PAGE_SHIFT)) + max_low_pfn = mem_end >> PAGE_SHIFT; +@@ -34,10 +37,12 @@ void __init memblock_init(void) + } + memblock_set_current_limit(PFN_PHYS(max_low_pfn)); + ++ printk("%s memblock_reserve [0x%016llx] [0x%016llx]\n", __func__, __pa_symbol(&_text), __pa_symbol(&_end) - __pa_symbol(&_text)); + memblock_reserve(__pa_symbol(&_text), + __pa_symbol(&_end) - __pa_symbol(&_text)); + return; + } ++ #endif + /* Parse memory information */ + for_each_efi_memory_desc(md) { + mem_type = md->type; +@@ -52,6 +57,7 @@ void __init memblock_init(void) + case EFI_BOOT_SERVICES_DATA: + case EFI_PERSISTENT_MEMORY: + case EFI_CONVENTIONAL_MEMORY: ++ printk("%s EFI_CONVENTIONAL_MEMORY memblock_add [0x%016llx] [0x%016llx]\n", __func__, mem_start, mem_size); + memblock_add(mem_start, mem_size); + if (max_low_pfn < (mem_end >> PAGE_SHIFT)) + max_low_pfn = mem_end >> PAGE_SHIFT; +@@ -59,6 +65,7 @@ void __init memblock_init(void) + case EFI_PAL_CODE: + case EFI_UNUSABLE_MEMORY: + case EFI_ACPI_RECLAIM_MEMORY: ++ printk("%s EFI_ACPI_RECLAIM_MEMORY memblock_add [0x%016llx] [0x%016llx]\n", __func__, mem_start, mem_size); + memblock_add(mem_start, mem_size); + fallthrough; + case EFI_RESERVED_TYPE: +@@ -66,6 +73,7 @@ void __init memblock_init(void) + case EFI_RUNTIME_SERVICES_DATA: + case EFI_MEMORY_MAPPED_IO: + case EFI_MEMORY_MAPPED_IO_PORT_SPACE: ++ printk("%s EFI_MEMORY_MAPPED_IO_PORT_SPACE memblock_reserve [0x%016llx] [0x%016llx]\n", __func__, mem_start, mem_size); + memblock_reserve(mem_start, mem_size); + break; + } +@@ -73,9 +81,11 @@ void __init memblock_init(void) + + memblock_set_current_limit(PFN_PHYS(max_low_pfn)); + ++ printk("%s memblock_reserve [0x%016llx] [0x%016llx]\n", __func__, (long long unsigned int)PHYS_OFFSET, (long long unsigned int)0x200000); + /* Reserve the first 2MB */ + memblock_reserve(PHYS_OFFSET, 0x200000); + ++ printk("%s memblock_reserve [0x%016llx] [0x%016llx]\n", __func__, __pa_symbol(&_text), __pa_symbol(&_end) - __pa_symbol(&_text)); + /* Reserve the kernel text/data/bss */ + memblock_reserve(__pa_symbol(&_text), + __pa_symbol(&_end) - __pa_symbol(&_text)); +diff --git a/arch/loongarch/kernel/numa.c b/arch/loongarch/kernel/numa.c +index 1c3ede74e..754dd9bc1 100644 +--- a/arch/loongarch/kernel/numa.c ++++ b/arch/loongarch/kernel/numa.c +@@ -25,7 +25,7 @@ + #include + #include + #include +-#include "legacy_boot.h" ++//#include "legacy_boot.h" + + int numa_off; + struct pglist_data *node_data[MAX_NUMNODES]; +diff --git a/arch/loongarch/kernel/relocate.c b/arch/loongarch/kernel/relocate.c +index aaa27823e..b9af88c78 100644 +--- a/arch/loongarch/kernel/relocate.c ++++ b/arch/loongarch/kernel/relocate.c +@@ -15,7 +15,7 @@ + #include + #include + #include +-#include "legacy_boot.h" ++//#include "legacy_boot.h" + + #define RELOCATED(x) ((void *)((long)x + reloc_offset)) + #define RELOCATED_KASLR(x) ((void *)((long)x + random_offset)) +@@ -173,10 +173,14 @@ unsigned long __init relocate_kernel(void) + void *location_new = _text; /* Default to original kernel start */ + char *cmdline = early_ioremap(fw_arg1, COMMAND_LINE_SIZE); /* Boot command line is passed in fw_arg1 */ + ++#if 0 + if (fw_arg0 < 2) + strscpy(boot_command_line, cmdline, COMMAND_LINE_SIZE); + else + fw_init_cmdline(fw_arg0, TO_CACHE(fw_arg1)); /* OLD BPI parameters */ ++#else ++ strscpy(boot_command_line, cmdline, COMMAND_LINE_SIZE); ++#endif + + #ifdef CONFIG_RANDOMIZE_BASE + location_new = determine_relocation_address(); +diff --git a/arch/loongarch/kernel/setup.c b/arch/loongarch/kernel/setup.c +index bfe1f05b2..89ef8c0ef 100644 +--- a/arch/loongarch/kernel/setup.c ++++ b/arch/loongarch/kernel/setup.c +@@ -48,7 +48,8 @@ + #include + #include + #include +-#include "legacy_boot.h" ++#include ++//#include "legacy_boot.h" + + #define SMBIOS_BIOSSIZE_OFFSET 0x09 + #define SMBIOS_BIOSEXTERN_OFFSET 0x13 +@@ -77,6 +78,7 @@ static phys_addr_t crashmem_start, crashmem_size; + * These are initialized so they are in the .data section + */ + char init_command_line[COMMAND_LINE_SIZE] __initdata; ++char bp_start_desc[] = "bp_start="; // 这是 command line 里面的内容 一定要有= + + static int num_standard_resources; + static struct resource *standard_resources; +@@ -85,6 +87,17 @@ static struct resource code_resource = { .name = "Kernel code", }; + static struct resource data_resource = { .name = "Kernel data", }; + static struct resource bss_resource = { .name = "Kernel bss", }; + ++////////////////////////////////////// ++/////for bootloader mem map parse///// ++////////////////////////////////////// ++static unsigned long long bp_start; ++struct loongsonlist_mem_map *loongson_mem_map; ++static u8 __init ext_listhdr_checksum(u8 *buffer, u32 length); ++static int __init parse_mem(struct _extention_list_hdr *head); ++static void __init memmap_bootlaoder_parse(void); ++static int __init parse_extlist(struct boot_params *bp); ++static int __init bp_start_match(void); ++ + const char *get_system_type(void) + { + return "generic-loongson-machine"; +@@ -137,6 +150,7 @@ static void __init parse_cpu_table(const struct dmi_header *dm) + + static void __init parse_bios_table(const struct dmi_header *dm) + { ++#if 0 + int bios_extern; + char *dmi_data = (char *)dm; + +@@ -153,6 +167,11 @@ static void __init parse_bios_table(const struct dmi_header *dm) + set_bit(EFI_BOOT, &efi.flags); + else + clear_bit(EFI_BOOT, &efi.flags); ++#else ++ char *dmi_data = (char *)dm; ++ ++ b_info.bios_size = (*(dmi_data + SMBIOS_BIOSSIZE_OFFSET) + 1) << 6; ++#endif + } + + static void __init find_tokens(const struct dmi_header *dm, void *dummy) +@@ -235,8 +254,10 @@ static int __init early_parse_mem(char *p) + } + + if (!IS_ENABLED(CONFIG_NUMA)) ++ { ++ printk("%s memblock_add not CONFIG_NUMA [0x%016llx] [0x%016llx]\n", __func__, start, size); + memblock_add(start, size); +- else ++ }else + memblock_add_node(start, size, pa_to_nid(start), MEMBLOCK_NONE); + + return 0; +@@ -319,8 +340,16 @@ static void __init fdt_setup(void) + if (acpi_os_get_root_pointer()) + return; + +- /* Look for a device tree configuration table entry */ +- fdt_pointer = efi_fdt_pointer(); ++ /* Prefer to use built-in dtb, checking its legality first. */ ++ if (!fdt_check_header(__dtb_start)) ++ { ++ fdt_pointer = __dtb_start; ++ } ++ else ++ { ++ fdt_pointer = efi_fdt_pointer(); /* Fallback to firmware dtb */ ++ } ++ + if (!fdt_pointer || fdt_check_header(fdt_pointer)) + return; + +@@ -354,7 +383,9 @@ static void __init bootcmdline_init(char **cmdline_p) + if (boot_command_line[0]) + strlcat(boot_command_line, " ", COMMAND_LINE_SIZE); + +- strlcat(boot_command_line, init_command_line, COMMAND_LINE_SIZE); ++ if (!strstr(boot_command_line, init_command_line)) ++ strlcat(boot_command_line, init_command_line, COMMAND_LINE_SIZE); ++ + goto out; + } + #endif +@@ -685,12 +716,24 @@ static void __init prefill_possible_map(void) + } + #endif + ++static int __init bp_start_early(char *p) ++{ ++ bp_start = __pa(memparse(p, &p)); // 这里拿到的是物理地址 ++ bp_start = TO_CACHE(bp_start); // 再转换成当前可以访问的地址 ++ return 0; ++} ++early_param("bp_start", bp_start_early); ++ + void __init setup_arch(char **cmdline_p) + { + cpu_probe(); + + init_environ(); + efi_init(); ++ if (!bp_start_match() && bp_start) ++ { ++ parse_extlist((struct boot_params *)bp_start); ++ } + fdt_setup(); + memblock_init(); + pagetable_init(); +@@ -715,3 +758,124 @@ void __init setup_arch(char **cmdline_p) + kasan_init(); + #endif + } ++ ++////////////////////////////////////// ++/////for bootloader mem map parse///// ++////////////////////////////////////// ++static __init u8 ext_listhdr_checksum(u8 *buffer, u32 length) ++{ ++ u8 sum = 0; ++ u8 *end = buffer + length; ++ ++ while (buffer < end) { ++ sum = (u8)(sum + *(buffer++)); ++ } ++ ++ return (sum); ++} ++ ++static __init int parse_mem(struct _extention_list_hdr *head) ++{ ++ struct loongsonlist_mem_map_legacy *ptr; ++ static struct loongsonlist_mem_map mem_map; ++ int i; ++ ++ loongson_mem_map = (struct loongsonlist_mem_map *)head; ++ ++ if (ext_listhdr_checksum((u8 *)loongson_mem_map, head->length)) { ++ printk("mem checksum error\n"); ++ return -EPERM; ++ } ++ ++ ptr = (struct loongsonlist_mem_map_legacy *)head; ++ ++ pr_info("convert legacy mem map to new mem map.\n"); ++ memcpy(&mem_map, ptr, sizeof(mem_map.header)); ++ mem_map.map_count = ptr->map_count; ++ for (i = 0; i < ptr->map_count; i++) { ++ mem_map.map[i].mem_type = ptr->map[i].mem_type; ++ mem_map.map[i].mem_start = ptr->map[i].mem_start; ++ mem_map.map[i].mem_size = ptr->map[i].mem_size; ++ pr_info("bootloader memmap block %d type : %d start : %.llx size : %.llx\n", ++ i, mem_map.map[i].mem_type, mem_map.map[i].mem_start, mem_map.map[i].mem_size); ++ } ++ loongson_mem_map = &mem_map; ++ return 0; ++} ++ ++static __init void memmap_bootlaoder_parse(void) ++{ ++ int i; ++ u32 mem_type; ++ u64 mem_start, mem_end, mem_size; ++ /* Parse memory information */ ++ for (i = 0; i < loongson_mem_map->map_count; i++) { ++ mem_type = loongson_mem_map->map[i].mem_type; ++ mem_start = loongson_mem_map->map[i].mem_start; ++ mem_size = loongson_mem_map->map[i].mem_size; ++ mem_end = mem_start + mem_size; ++ ++ switch (mem_type) { ++ case ADDRESS_TYPE_SYSRAM: ++ memblock_add(mem_start, mem_size); ++ if (max_low_pfn < (mem_end >> PAGE_SHIFT)) ++ max_low_pfn = mem_end >> PAGE_SHIFT; ++ break; ++ } ++ } ++} ++static __init int parse_extlist(struct boot_params *bp) ++{ ++ unsigned long next_offset; ++ struct _extention_list_hdr *fhead; ++ ++ // 原本有几种转换版本,但是这边就这一个 ++ fhead = (struct _extention_list_hdr *)bp->extlist_offset; ++ ++ if (fhead == NULL) { ++ printk("the ext struct is empty!\n"); ++ return -1; ++ } ++ ++ do { ++ if (memcmp(&(fhead->signature), LOONGSON_MEM_SIGNATURE, 3) == 0) { ++ if (parse_mem(fhead) != 0) { ++ printk("parse mem failed\n"); ++ return -EPERM; ++ } ++ memmap_bootlaoder_parse(); ++ } ++ ++ fhead = (struct _extention_list_hdr *)fhead->next_offset; ++ next_offset = (unsigned long)fhead; ++ ++ } while (next_offset); ++ ++ return 0; ++} ++ ++static int __init bp_start_match(void) ++{ ++ char *bp_start_value = NULL; ++ char temp[128]; ++ ++ bp_start = 0; ++ bp_start_value = strstr(boot_command_line, bp_start_desc); ++ if (bp_start_value) { ++ bp_start_value += strlen(bp_start_desc); // 跳过 = 和前面的字段 ++ size_t len = strcspn(bp_start_value, " "); ++ size_t max_len = sizeof(temp) - 1; ++ len = len > max_len ? max_len : len; ++ memcpy(temp, bp_start_value, len); ++ temp[len] = '\0'; ++ ++ bp_start_value = temp; ++ } else ++ return 1; ++ return bp_start_early(bp_start_value); ++} ++ ++////////////////////////////////////// ++/////for bootloader mem map parse///// ++////////////////////////////////////// ++ +diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c +index 897127c26..44da34e4a 100644 +--- a/arch/loongarch/kernel/smp.c ++++ b/arch/loongarch/kernel/smp.c +@@ -33,7 +33,7 @@ + #include + #include + #include +-#include "legacy_boot.h" ++//#include "legacy_boot.h" + + int __cpu_number_map[NR_CPUS]; /* Map physical to logical */ + EXPORT_SYMBOL(__cpu_number_map); +@@ -337,8 +337,13 @@ void loongson_boot_secondary(int cpu, struct task_struct *idle) + + pr_info("Booting CPU#%d...\n", cpu); + ++#if 0 + if (!efi_bp) + entry = __pa_symbol((unsigned long)&smpboot_entry); ++#else ++ entry = __pa_symbol((unsigned long)&smpboot_entry); ++#endif ++ + cpuboot_data.stack = (unsigned long)__KSTK_TOS(idle); + cpuboot_data.thread_info = (unsigned long)task_thread_info(idle); + +diff --git a/arch/loongarch/kernel/time.c b/arch/loongarch/kernel/time.c +index 46d7d40c8..03fd08200 100644 +--- a/arch/loongarch/kernel/time.c ++++ b/arch/loongarch/kernel/time.c +@@ -12,6 +12,8 @@ + #include + #include + #include ++#include ++#include + + #include + #include +@@ -206,6 +208,27 @@ int __init constant_clocksource_init(void) + + void __init time_init(void) + { ++#if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK_LOONGSON2X) ++ struct clk* cpu_clk; ++ struct clk* ref_clk; ++ of_clk_init(NULL); ++ ++ if (!cpu_clock_freq) { ++ cpu_clk = clk_get(NULL, "cpu_clk"); ++ if (IS_ERR(cpu_clk)) ++ pr_info("cpu clk cant get from clock driver"); ++ else ++ cpu_clock_freq = clk_get_rate(cpu_clk); ++ } ++ if (!const_clock_freq) { ++ ref_clk = clk_get(NULL, "ref_clk"); ++ if (IS_ERR(ref_clk)) ++ pr_info("reference clock cant get from clock driver"); ++ else ++ const_clock_freq = clk_get_rate(ref_clk); ++ } ++#endif ++ + if (!cpu_has_cpucfg) + const_clock_freq = cpu_clock_freq; + else +diff --git a/include/drm/drm_client.h b/include/drm/drm_client.h +index 7bbc9d5bc..1276e331c 100644 +--- a/include/drm/drm_client.h ++++ b/include/drm/drm_client.h +@@ -166,6 +166,9 @@ struct drm_client_buffer * + drm_client_framebuffer_create(struct drm_client_dev *client, u32 width, u32 height, u32 format); + void drm_client_framebuffer_delete(struct drm_client_buffer *buffer); + int drm_client_framebuffer_flush(struct drm_client_buffer *buffer, struct drm_rect *rect); ++int drm_client_buffer_vmap_local(struct drm_client_buffer *buffer, ++ struct iosys_map *map_copy); ++void drm_client_buffer_vunmap_local(struct drm_client_buffer *buffer); + int drm_client_buffer_vmap(struct drm_client_buffer *buffer, + struct iosys_map *map); + void drm_client_buffer_vunmap(struct drm_client_buffer *buffer); +diff --git a/include/drm/drm_fbdev_ttm.h b/include/drm/drm_fbdev_ttm.h +new file mode 100644 +index 000000000..9e6c3bdf3 +--- /dev/null ++++ b/include/drm/drm_fbdev_ttm.h +@@ -0,0 +1,15 @@ ++/* SPDX-License-Identifier: MIT */ ++ ++#ifndef DRM_FBDEV_TTM_H ++#define DRM_FBDEV_TTM_H ++ ++struct drm_device; ++ ++#ifdef CONFIG_DRM_FBDEV_EMULATION ++void drm_fbdev_ttm_setup(struct drm_device *dev, unsigned int preferred_bpp); ++#else ++static inline void drm_fbdev_ttm_setup(struct drm_device *dev, unsigned int preferred_bpp) ++{ } ++#endif ++ ++#endif +diff --git a/include/drm/drm_gem.h b/include/drm/drm_gem.h +index fe98b1405..2e3b9e81b 100644 +--- a/include/drm/drm_gem.h ++++ b/include/drm/drm_gem.h +@@ -526,6 +526,9 @@ struct page **drm_gem_get_pages(struct drm_gem_object *obj); + void drm_gem_put_pages(struct drm_gem_object *obj, struct page **pages, + bool dirty, bool accessed); + ++void drm_gem_lock(struct drm_gem_object *obj); ++void drm_gem_unlock(struct drm_gem_object *obj); ++ + int drm_gem_vmap_unlocked(struct drm_gem_object *obj, struct iosys_map *map); + void drm_gem_vunmap_unlocked(struct drm_gem_object *obj, struct iosys_map *map); + +diff --git a/include/dt-bindings/clock/loongson2k300-clock.h b/include/dt-bindings/clock/loongson2k300-clock.h +new file mode 100644 +index 000000000..b6a91164a +--- /dev/null ++++ b/include/dt-bindings/clock/loongson2k300-clock.h +@@ -0,0 +1,38 @@ ++#ifndef __DT_BINDINGS_CLOCK_LOONGSON2K300_H ++#define __DT_BINDINGS_CLOCK_LOONGSON2K300_H ++ ++#define CLK_REF 0 ++ ++#define CLK_NODE 1 ++#define CLK_CPU 2 ++#define CLK_SCACHE 3 ++#define CLK_IODMA 4 ++#define CLK_GMAC 5 ++#define CLK_I2S 6 ++ ++#define CLK_DDR_P 7 ++#define CLK_DDR 8 ++#define CLK_NET 9 ++#define CLK_DEVS 10 ++#define CLK_USB 11 ++#define CLK_APB 12 ++#define CLK_BOOT 13 ++#define CLK_SDIO 14 ++ ++#define CLK_PIX_P 15 ++#define CLK_PIX 16 ++#define CLK_GMACBP 17 ++ ++#define CLK_UART CLK_APB ++#define CLK_CAN CLK_APB ++#define CLK_I2C CLK_APB ++#define CLK_SPI CLK_APB ++#define CLK_AC97 CLK_APB ++#define CLK_NAND CLK_APB ++#define CLK_PWM CLK_APB ++#define CLK_HPET CLK_APB ++#define CLK_RTC CLK_APB ++ ++#define CLK_CNT 18 ++ ++#endif +\ No newline at end of file +diff --git a/include/dt-bindings/usb/dwc2-loongson-fix.h b/include/dt-bindings/usb/dwc2-loongson-fix.h +new file mode 100644 +index 000000000..b7bb525cf +--- /dev/null ++++ b/include/dt-bindings/usb/dwc2-loongson-fix.h +@@ -0,0 +1,9 @@ ++#ifndef __DT_DWC2_LOONGSON_FIX_H ++#define __DT_DWC2_LOONGSON_FIX_H ++ ++#define DWC2_LOONGSON_FIX_NONE 0 ++#define DWC2_LOONGSON_FIX_DMA 1 ++#define DWC2_LOONGSON_FIX_DELAY 2 ++#define DWC2_LOONGSON_FIX_DELAY_FULL 3 ++ ++#endif +diff --git a/include/linux/clk.h b/include/linux/clk.h +index 06f1b292f..24c49b01c 100644 +--- a/include/linux/clk.h ++++ b/include/linux/clk.h +@@ -201,6 +201,18 @@ bool clk_is_match(const struct clk *p, const struct clk *q); + */ + int clk_rate_exclusive_get(struct clk *clk); + ++/** ++ * devm_clk_rate_exclusive_get - devm variant of clk_rate_exclusive_get ++ * @dev: device the exclusivity is bound to ++ * @clk: clock source ++ * ++ * Calls clk_rate_exclusive_get() on @clk and registers a devm cleanup handler ++ * on @dev to call clk_rate_exclusive_put(). ++ * ++ * Must not be called from within atomic context. ++ */ ++int devm_clk_rate_exclusive_get(struct device *dev, struct clk *clk); ++ + /** + * clk_rate_exclusive_put - release exclusivity over the rate control of a + * producer +diff --git a/include/linux/mfd/loongson-timers.h b/include/linux/mfd/loongson-timers.h +new file mode 100644 +index 000000000..a33e2172e +--- /dev/null ++++ b/include/linux/mfd/loongson-timers.h +@@ -0,0 +1,185 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (C) STMicroelectronics 2016 ++ * Author: Benjamin Gaignard ++ * ++ * Copyright (C) 2025 Ilikara <3435193369@qq.com> ++ * Modified by: Ilikara <3435193369@qq.com> ++ */ ++ ++#ifndef _LINUX_LS_GPTIMER_H_ ++#define _LINUX_LS_GPTIMER_H_ ++ ++#include ++#include ++#include ++#include ++ ++#define TIM_CR1 0x00 /* Control Register 1 */ ++#define TIM_CR2 0x04 /* Control Register 2 */ ++#define TIM_SMCR 0x08 /* Slave mode control reg */ ++#define TIM_DIER 0x0C /* DMA/interrupt register */ ++#define TIM_SR 0x10 /* Status register */ ++#define TIM_EGR 0x14 /* Event Generation Reg */ ++#define TIM_CCMR1 0x18 /* Capt/Comp 1 Mode Reg */ ++#define TIM_CCMR2 0x1C /* Capt/Comp 2 Mode Reg */ ++#define TIM_CCER 0x20 /* Capt/Comp Enable Reg */ ++#define TIM_CNT 0x24 /* Counter */ ++#define TIM_PSC 0x28 /* Prescaler */ ++#define TIM_ARR 0x2c /* Auto-Reload Register */ ++#define TIM_CCRx(x) (0x34 + 4 * ((x) - 1)) /* Capt/Comp Register x (x ∈ {1, .. 4}) */ ++#define TIM_CCR1 TIM_CCRx(1) /* Capt/Comp Register 1 */ ++#define TIM_CCR2 TIM_CCRx(2) /* Capt/Comp Register 2 */ ++#define TIM_CCR3 TIM_CCRx(3) /* Capt/Comp Register 3 */ ++#define TIM_CCR4 TIM_CCRx(4) /* Capt/Comp Register 4 */ ++#define TIM_BDTR 0x44 /* Break and Dead-Time Reg */ ++ ++#define TIM_CR1_CEN BIT(0) /* Counter Enable */ ++#define TIM_CR1_DIR BIT(4) /* Counter Direction */ ++#define TIM_CR1_ARPE BIT(7) /* Auto-reload Preload Ena */ ++ ++#define TIM_CR2_MMS (BIT(4) | BIT(5) | BIT(6)) /* Master mode selection */ ++#define TIM_CR2_MMS2 GENMASK(23, 20) /* Master mode selection 2 */ ++ ++#define TIM_SMCR_SMS (BIT(0) | BIT(1) | BIT(2)) /* Slave mode selection */ ++#define TIM_SMCR_TS (BIT(4) | BIT(5) | BIT(6)) /* Trigger selection */ ++ ++#define TIM_DIER_UIE BIT(0) /* Update interrupt */ ++#define TIM_DIER_CCxIE(x) BIT(1 + ((x) - 1)) /* CCx Interrupt Enable (x ∈ {1, .. 4}) */ ++#define TIM_DIER_CC1IE TIM_DIER_CCxIE(1) /* CC1 Interrupt Enable */ ++#define TIM_DIER_CC2IE TIM_DIER_CCxIE(2) /* CC2 Interrupt Enable */ ++#define TIM_DIER_CC3IE TIM_DIER_CCxIE(3) /* CC3 Interrupt Enable */ ++#define TIM_DIER_CC4IE TIM_DIER_CCxIE(4) /* CC4 Interrupt Enable */ ++#define TIM_DIER_UDE BIT(8) /* Update DMA request Enable */ ++#define TIM_DIER_CCxDE(x) BIT(9 + ((x) - 1)) /* CCx DMA request Enable (x ∈ {1, .. 4}) */ ++#define TIM_DIER_CC1DE TIM_DIER_CCxDE(1) /* CC1 DMA request Enable */ ++#define TIM_DIER_CC2DE TIM_DIER_CCxDE(2) /* CC2 DMA request Enable */ ++#define TIM_DIER_CC3DE TIM_DIER_CCxDE(3) /* CC3 DMA request Enable */ ++#define TIM_DIER_CC4DE TIM_DIER_CCxDE(4) /* CC4 DMA request Enable */ ++#define TIM_DIER_COMDE BIT(13) /* COM DMA request Enable */ ++#define TIM_DIER_TDE BIT(14) /* Trigger DMA request Enable */ ++ ++#define TIM_SR_UIF BIT(0) /* Update interrupt flag */ ++#define TIM_SR_CC_IF(x) BIT((x) + 1) /* CC1, CC2, CC3, CC4 interrupt flag */ ++ ++#define TIM_EGR_UG BIT(0) /* Update Generation */ ++ ++// CCMR Output ++#define TIM_CCMR_PE BIT(3) /* Channel Preload Enable */ ++#define TIM_CCMR_M1 (BIT(6) | BIT(5)) /* Channel PWM Mode 1 */ ++#define TIM_CCMR_CC1S (BIT(0) | BIT(1)) /* Capture/compare 1 sel */ ++#define TIM_CCMR_CC2S (BIT(8) | BIT(9)) /* Capture/compare 2 sel */ ++#define TIM_CCMR_CC1S_TI1 BIT(0) /* IC1/IC3 selects TI1/TI3 */ ++#define TIM_CCMR_CC1S_TI2 BIT(1) /* IC1/IC3 selects TI2/TI4 */ ++#define TIM_CCMR_CC2S_TI2 BIT(8) /* IC2/IC4 selects TI2/TI4 */ ++#define TIM_CCMR_CC2S_TI1 BIT(9) /* IC2/IC4 selects TI1/TI3 */ ++#define TIM_CCMR_CC3S (BIT(0) | BIT(1)) /* Capture/compare 3 sel */ ++#define TIM_CCMR_CC4S (BIT(8) | BIT(9)) /* Capture/compare 4 sel */ ++#define TIM_CCMR_CC3S_TI3 BIT(0) /* IC3 selects TI3 */ ++#define TIM_CCMR_CC4S_TI4 BIT(8) /* IC4 selects TI4 */ ++// CCMR Input ++#define TIM_CCMR_IC1PSC GENMASK(3, 2) /* Input capture 1 prescaler */ ++#define TIM_CCMR_IC2PSC GENMASK(11, 10) /* Input capture 2 prescaler */ ++ ++#define TIM_CCER_CCxE(x) BIT(0 + 4 * ((x) - 1)) /* Capt/Comp x out Ena (x ∈ {1, .. 4}) */ ++#define TIM_CCER_CCxP(x) BIT(1 + 4 * ((x) - 1)) /* Capt/Comp x Polarity (x ∈ {1, .. 4}) */ ++#define TIM_CCER_CCxNE(x) BIT(2 + 4 * ((x) - 1)) /* Capt/Comp xN out Ena (x ∈ {1, .. 4}) */ ++#define TIM_CCER_CCxNP(x) BIT(3 + 4 * ((x) - 1)) /* Capt/Comp xN Polarity (x ∈ {1, .. 4}) */ ++#define TIM_CCER_CC1E TIM_CCER_CCxE(1) /* Capt/Comp 1 out Ena */ ++#define TIM_CCER_CC1P TIM_CCER_CCxP(1) /* Capt/Comp 1 Polarity */ ++#define TIM_CCER_CC1NE TIM_CCER_CCxNE(1) /* Capt/Comp 1N out Ena */ ++#define TIM_CCER_CC1NP TIM_CCER_CCxNP(1) /* Capt/Comp 1N Polarity */ ++#define TIM_CCER_CC2E TIM_CCER_CCxE(2) /* Capt/Comp 2 out Ena */ ++#define TIM_CCER_CC2P TIM_CCER_CCxP(2) /* Capt/Comp 2 Polarity */ ++#define TIM_CCER_CC2NE TIM_CCER_CCxNE(2) /* Capt/Comp 2N out Ena */ ++#define TIM_CCER_CC2NP TIM_CCER_CCxNP(2) /* Capt/Comp 2N Polarity */ ++#define TIM_CCER_CC3E TIM_CCER_CCxE(3) /* Capt/Comp 3 out Ena */ ++#define TIM_CCER_CC3P TIM_CCER_CCxP(3) /* Capt/Comp 3 Polarity */ ++#define TIM_CCER_CC3NE TIM_CCER_CCxNE(3) /* Capt/Comp 3N out Ena */ ++#define TIM_CCER_CC3NP TIM_CCER_CCxNP(3) /* Capt/Comp 3N Polarity */ ++#define TIM_CCER_CC4E TIM_CCER_CCxE(4) /* Capt/Comp 4 out Ena */ ++#define TIM_CCER_CC4P TIM_CCER_CCxP(4) /* Capt/Comp 4 Polarity */ ++#define TIM_CCER_CC4NE TIM_CCER_CCxNE(4) /* Capt/Comp 4N out Ena */ ++#define TIM_CCER_CC4NP TIM_CCER_CCxNP(4) /* Capt/Comp 4N Polarity */ ++#define TIM_CCER_CCXE (BIT(0) | BIT(4) | BIT(8) | BIT(12)) ++ ++#define TIM_BDTR_BKE(x) BIT(12 + (x) * 12) /* Break input enable */ ++#define TIM_BDTR_BKP(x) BIT(13 + (x) * 12) /* Break input polarity */ ++#define TIM_BDTR_AOE BIT(14) /* Automatic Output Enable */ ++#define TIM_BDTR_MOE BIT(15) /* Main Output Enable */ ++#define TIM_BDTR_BKF(x) (0xf << (16 + (x) * 4)) ++ ++#define MAX_TIM_PSC 0xFFFF ++#define MAX_TIM_ICPSC 0x3 ++ ++#define TIM_CR2_MMS_SHIFT 4 ++#define TIM_CR2_MMS2_SHIFT 20 ++ ++#define TIM_SMCR_SMS_SLAVE_MODE_DISABLED 0 /* counts on internal clock when CEN=1 */ ++#define TIM_SMCR_SMS_ENCODER_MODE_1 1 /* counts TI1FP1 edges, depending on TI2FP2 level */ ++#define TIM_SMCR_SMS_ENCODER_MODE_2 2 /* counts TI2FP2 edges, depending on TI1FP1 level */ ++#define TIM_SMCR_SMS_ENCODER_MODE_3 3 /* counts on both TI1FP1 and TI2FP2 edges */ ++#define TIM_SMCR_TS_SHIFT 4 ++ ++#define TIM_BDTR_BKF_MASK 0xF ++#define TIM_BDTR_BKF_SHIFT(x) (16 + (x) * 4) ++ ++enum loongson_timers_dmas { ++ LS_TIMERS_DMA_CH1, ++ LS_TIMERS_DMA_CH2, ++ LS_TIMERS_DMA_CH3, ++ LS_TIMERS_DMA_CH4, ++ LS_TIMERS_DMA_UP, ++ LS_TIMERS_DMA_TRIG, ++ LS_TIMERS_DMA_COM, ++ LS_TIMERS_MAX_DMAS, ++}; ++ ++/* LOONGSON Timer may have either a unique global interrupt or 4 interrupt lines */ ++enum loongson_timers_irqs { ++ LS_TIMERS_IRQ_GLOBAL, /* global IRQ */ ++ LS_TIMERS_MAX_IRQS, ++}; ++ ++/** ++ * struct loongson_timers_dma - LOONGSON timer DMA handling. ++ * @completion: end of DMA transfer completion ++ * @phys_base: control registers physical base address ++ * @lock: protect DMA access ++ * @chan: DMA channel in use ++ * @chans: DMA channels available for this timer instance ++ */ ++struct loongson_timers_dma { ++ struct completion completion; ++ phys_addr_t phys_base; ++ struct mutex lock; ++ struct dma_chan *chan; ++ struct dma_chan *chans[LS_TIMERS_MAX_DMAS]; ++}; ++ ++struct loongson_timers { ++ struct clk *clk; ++ struct regmap *regmap; ++ u32 max_arr; ++ struct loongson_timers_dma dma; /* Only to be used by the parent */ ++ unsigned int nr_irqs; ++ int irq[LS_TIMERS_MAX_IRQS]; ++}; ++ ++#if IS_REACHABLE(CONFIG_MFD_LS_TIMERS) ++int loongson_timers_dma_burst_read(struct device *dev, u32 *buf, ++ enum loongson_timers_dmas id, u32 reg, ++ unsigned int num_reg, unsigned int bursts, ++ unsigned long tmo_ms); ++#else ++static inline int loongson_timers_dma_burst_read(struct device *dev, u32 *buf, ++ enum loongson_timers_dmas id, ++ u32 reg, ++ unsigned int num_reg, ++ unsigned int bursts, ++ unsigned long tmo_ms) ++{ ++ return -ENODEV; ++} ++#endif ++#endif +-- +2.49.0 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0002-add-ls2k0300-clk-support.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0002-add-ls2k0300-clk-support.patch new file mode 100644 index 0000000000000000000000000000000000000000..3e058976a69e303655c7c648abbd1378f926feb6 --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0002-add-ls2k0300-clk-support.patch @@ -0,0 +1,1042 @@ +From fa94c299b8b053dfdbbcbdf60ca3eeb570877d3a Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:05:44 +0800 +Subject: [PATCH 02/17] add ls2k0300 clk support + +--- + drivers/clk/Kconfig | 1 + + drivers/clk/Makefile | 1 + + drivers/clk/clk.c | 19 + + drivers/clk/loongson/Kconfig | 35 + + drivers/clk/loongson/Makefile | 3 + + drivers/clk/loongson/clk-loongson2k300.c | 840 +++++++++++++++++++++++ + drivers/clk/loongson/clk.c | 41 ++ + drivers/clk/loongson/clk.h | 15 + + 8 files changed, 955 insertions(+) + create mode 100644 drivers/clk/loongson/Kconfig + create mode 100644 drivers/clk/loongson/Makefile + create mode 100644 drivers/clk/loongson/clk-loongson2k300.c + create mode 100644 drivers/clk/loongson/clk.c + create mode 100644 drivers/clk/loongson/clk.h + +diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig +index c30099866..24dbd44d9 100644 +--- a/drivers/clk/Kconfig ++++ b/drivers/clk/Kconfig +@@ -476,6 +476,7 @@ source "drivers/clk/imgtec/Kconfig" + source "drivers/clk/imx/Kconfig" + source "drivers/clk/ingenic/Kconfig" + source "drivers/clk/keystone/Kconfig" ++source "drivers/clk/loongson/Kconfig" + source "drivers/clk/mediatek/Kconfig" + source "drivers/clk/meson/Kconfig" + source "drivers/clk/mstar/Kconfig" +diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile +index 18969cbd4..23af60e44 100644 +--- a/drivers/clk/Makefile ++++ b/drivers/clk/Makefile +@@ -97,6 +97,7 @@ obj-y += imx/ + obj-y += ingenic/ + obj-$(CONFIG_ARCH_K3) += keystone/ + obj-$(CONFIG_ARCH_KEYSTONE) += keystone/ ++obj-$(CONFIG_LOONGARCH) += loongson/ + obj-y += mediatek/ + obj-$(CONFIG_ARCH_MESON) += meson/ + obj-y += microchip/ +diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c +index 4a67c0d48..cc0a0e569 100644 +--- a/drivers/clk/clk.c ++++ b/drivers/clk/clk.c +@@ -1030,6 +1030,25 @@ int clk_rate_exclusive_get(struct clk *clk) + } + EXPORT_SYMBOL_GPL(clk_rate_exclusive_get); + ++static void devm_clk_rate_exclusive_put(void *data) ++{ ++ struct clk *clk = data; ++ ++ clk_rate_exclusive_put(clk); ++} ++ ++int devm_clk_rate_exclusive_get(struct device *dev, struct clk *clk) ++{ ++ int ret; ++ ++ ret = clk_rate_exclusive_get(clk); ++ if (ret) ++ return ret; ++ ++ return devm_add_action_or_reset(dev, devm_clk_rate_exclusive_put, clk); ++} ++EXPORT_SYMBOL_GPL(devm_clk_rate_exclusive_get); ++ + static void clk_core_unprepare(struct clk_core *core) + { + lockdep_assert_held(&prepare_lock); +diff --git a/drivers/clk/loongson/Kconfig b/drivers/clk/loongson/Kconfig +new file mode 100644 +index 000000000..ef4305729 +--- /dev/null ++++ b/drivers/clk/loongson/Kconfig +@@ -0,0 +1,35 @@ ++# SPDX-License-Identifier: GPL-2.0-only ++ ++config COMMON_CLK_LOONGSON2X ++ bool "Clock drivers for Loongson2 SOCs" ++ depends on LOONGSON_2K300 ++ default LOONGSON_2K300 ++ help ++ Supports clock drivers for Loongson LS2K0300 SOCs. ++ ++choice ++ bool "System clock mode Selection" ++ depends on COMMON_CLK_LOONGSON2X ++ default LOONGSON2_SYSCLK_SOFT ++ ++ config LOONGSON2_SYSCLK_HW_LOWFREQ ++ bool "Hardware low frequency mode" ++ help ++ System clock select Hardware low frequency mode. ++ ++ config LOONGSON2_SYSCLK_HW_HIGFREQ ++ bool "Hardware hige frequency mode" ++ help ++ System clock select Hardware hige frequency mode. ++ ++ config LOONGSON2_SYSCLK_SOFT ++ bool "Soft mode" ++ help ++ System clock select Soft mode. ++ ++ config LOONGSON2_SYSCLK_HW_BYPASS ++ bool "Hardware bypass mode" ++ help ++ System clock select Hardware bypass mode. ++ ++endchoice +diff --git a/drivers/clk/loongson/Makefile b/drivers/clk/loongson/Makefile +new file mode 100644 +index 000000000..de2c18af0 +--- /dev/null ++++ b/drivers/clk/loongson/Makefile +@@ -0,0 +1,3 @@ ++# SPDX-License-Identifier: GPL-2.0-only ++obj-y += clk.o ++obj-$(CONFIG_LOONGSON_2K300) += clk-loongson2k300.o +diff --git a/drivers/clk/loongson/clk-loongson2k300.c b/drivers/clk/loongson/clk-loongson2k300.c +new file mode 100644 +index 000000000..668f59d5b +--- /dev/null ++++ b/drivers/clk/loongson/clk-loongson2k300.c +@@ -0,0 +1,840 @@ ++/* ++ * Copyright (c) 2024 Loongson(GD) Inc. ++ * Author: loongson-gz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "clk.h" ++ ++#define REF_CLK_NAME "ref_clk" ++#define NODE_CLK_FREQ_DEF 1000000000 ++ ++static unsigned long refclk_rate; ++static void __iomem *reg; ++ ++static struct clk** clks = NULL; ++ ++#ifdef CONFIG_LOONGSON2_SYSCLK_SOFT ++ ++// 还没实现 CPU 变频支持 代码是从 2K500 那里拿过来的 ++#define CPU_CLK_CHANGE 0 ++ ++#if 0 ++#define DEBUG_INFO(fmt, ...) printk(KERN_INFO fmt, ##__VA_ARGS__) ++#else ++#define DEBUG_INFO(fmt, ...) ++#endif ++ ++#define PARENT_BRANCH 0 ++#define PARENT_CLONE 1 ++ ++struct ls2k_reg_field_desc { ++ unsigned int reg_offset; ++ unsigned int bit_offset; ++ unsigned int bit_mask; ++}; ++ ++typedef unsigned long (*clock_magnification_calu_func)(struct ls2k_reg_field_desc*); ++ ++/* ++ * 本驱动中用于描述时钟结构的单个时钟的结构体,其组成的数组用于描述整个时钟结构 ++ * 其中不同的变量的值用于表示这个时钟的一些定义 ++ * name: 这是时钟的名字 ++ * parent_name: 这是时钟的上一层时钟的名字,比如DDR PLL的时钟 分频后 就是 CPU的时钟 那么可以说 CPU的 parent_name 是 Node PLL ++ * parent_relevant: 和上一层时钟的关系,这个变量用于 fixed 为 1的时候的处理流程,主要是为了区分 clks* 怎么来 ++ * PARENT_BRANCH 代表是一个分支,PARENT_CLONE 代表是同一个时钟,而定义是不是分支主要是看两个时钟之间有没有分频或倍频 ++ * 比如 DRR_PLL的时钟 分频后 获得 HDA 的时钟 那么就是 PARENT_BRANCH ++ * 比如 BOOT 的时钟 直接引到 BOOT SPI里面 那么就是 代表是一个分支, PARENT_CLONE ++ * dts_desc: 这是一个重要的变量 为1 的时候,意味着要去dts里面找这个时钟的声明,比如参考时钟 ++ * essential_n: 在 dts_desc 为 1的时候,如果找不到该时钟,如果这个值为 1 将不会报错,只是会提示,不会影响该时钟管理驱动的初始化。例如 PCI的外部时钟,不提供也没什么事 ++ * fixed: 这个值为1的时候,代表这个时钟在本内核中是固定不变的 不为1的时候,就可以改变 ++ * *_reg_set 和 *_calu_func: 在 fixed == 1 的时候有效 *_reg_set 用于登记 分频 和 倍频的寄存器位域 ++ * *calu_func是怎么处理这些寄存器的值的函数(就是怎么算系数) 不过我们也有提供通用的 ls2k_mul_calu ls2k_div_calu 等函数 ++ * clk_ops: 这个值就是一个结构体 需要填充 recalc_rate round_rate set_rate 函数的实现(linux这边要求的) 详见 ls2k300_node_clk_ops 和 ls2k300_cpu_clk_ops ++ * ++ * 所以 需要注意 ++ * name parent_name 是必填的 ++ * dts_desc 为 1的时候 相关的要填的变量是 essential_n(可选 不填的话 static 下 自动为0) 其他变量不起效 ++ * parent_relevant 为 PARENT_BRANCH 的时候 ++ * fixed 为 1的时候 *_reg_set 和 *_calu_func(可选 不填的话 static 下 自动为0) 其他变量不起效 ++ * fixed 为 0的时候 clk_ops(一定要实现) 其他变量不起效 ++ * parent_relevant 为 PARENT_CLONE ++ * parent_name 不能为空 其他变量不起效 ++ * ++ * *_reg_set 声明的时候 必须在在末尾添加 {.bit_mask = 0} 这是判断数组结束的标志 ++ * *_calu_func 可以为空 ++ * ++ * static 声明 ls2k_clock_desc数组时, 可不填的变量 就是 0 ++ */ ++struct ls2k_clock_desc { ++ char* name; ++ char* parent_name; ++ int parent_relevant; //branch or clone if branch reg_set or clk_ops enable if clone just clockA == clockB ++ int dts_desc; ++ int essential_n; ++ int fixed; // if fixed reg_set enable or clk_ops enable ++ ++ struct ls2k_reg_field_desc* mul_reg_set; ++ clock_magnification_calu_func mul_calu_func; ++ struct ls2k_reg_field_desc* div_reg_set; ++ clock_magnification_calu_func div_calu_func; ++ struct ls2k_reg_field_desc* freqscale_reg_set; ++ clock_magnification_calu_func freqscale_mul_calu_func; ++ clock_magnification_calu_func freqscale_div_calu_func; ++ ++ struct clk_ops* clk_ops; ++}; ++ ++#if (CPU_CLK_CHANGE == 1) ++ ++struct pll_config { ++ unsigned int l1_div_ref; ++ unsigned int l1_loopc; ++ unsigned int l1_odiv; ++}; ++ ++// 系统时钟需满足如下几个限制: ++// 1.可配分频器的输出 refclk/L1_div_ref 在 20~40MHz 范围内 ++// 2.PLL 倍频值 refclk/L1_div_ref*L1_loopc 需要在 1.2GHz~3.2GHz ++static int ls2k_caculate_freq(unsigned long freq, struct pll_config *pll_cfg) ++{ ++ unsigned long pll_in_clk; ++ unsigned long loopc; ++ unsigned long div; ++ int found = 0; ++ ++ if (!pll_cfg) ++ return -EINVAL; ++ ++ // Keep refclk/L1_div_ref in range 20MHz ~ 40Mhz ++ pll_cfg->l1_div_ref = 4; ++ pll_in_clk = refclk_rate >> 2; // 25MHz // 100/4 = 25 ++ ++ // 2*7 = 14 1.4Ghz 3*7 = 21 2.1GHz ++ // 3*6 = 18 1.8GHz ++ if(freq >= 700000000) ++ div = 2; ++ else ++ div = 3; ++ ++ //keep 1.2 ~ 3.2 ++ // and keep 1.2 ~ 2.1 will be better ++ loopc = (freq * div) / pll_in_clk; ++ ++ if (!found) { ++ pll_cfg->l1_div_ref = 0; ++ pll_cfg->l1_loopc = 0; ++ pll_cfg->l1_odiv = 0; ++ return -EINVAL; ++ } ++ ++ pll_cfg->l1_loopc = loopc; ++ pll_cfg->l1_odiv = div; ++ return 0; ++} ++ ++//PLL 寄存器设置 用于 时钟频率设置生效 ++/* ++ * 注意手册上写的 3.5.2 软件配置 ++ * 第二步和第三步是一起的,也就是代码中 ++ * li.w t1, (NODE_DIV << 24) | (NODE_LOOPC << 16) | (NODE_REFC << 8) ++ * 没有管 pd_pll 会被设置成 0 的原因 ++ */ ++static void ls2k_config_pll(void __iomem *pll_base, struct pll_config *pll_cfg) ++{ ++ int timeout = 200; ++ u32 val; ++ ++ /* pd_pll 1 */ ++ val = __raw_readl(pll_base); ++ val |= BIT(5); ++ __raw_writel(val, pll_base); ++ ++ /* 除了 pll_sel_* [2:0] 设置为0 pll_soft_set (3) 设置为0 其他的寄存器按需设置*/ ++ /* pd_pll 0 */ ++ val = (pll_cfg->l1_odiv << PLL_GENERIC_0_ODIV_SHIFT) | ++ (pll_cfg->l1_loopc << PLL_GENERIC_0_LOOPC_SHIFT) | ++ (pll_cfg->l1_div_ref << PLL_GENERIC_0_REFC_SHIFT); ++ __raw_writel(val, pll_base); ++ ++ /* 其他信号不变 pll_soft_set (3) 信号设置为 1 */ ++ val = __raw_readl(pll_base); ++ val |= BIT(3); ++ __raw_writel(val, pll_base); ++ ++ /* 等待 pll_lock (7) 锁定 也就是变成 1 */ ++ while(!(__raw_readl(pll_base) & BIT(7)) && (timeout-- > 0)) { ++ udelay(1); ++ } ++ ++ /* pll_sel_* [2:0] 设置为1 */ ++ val = __raw_readl(pll_base); ++ val |= 0x7; ++ __raw_writel(val, pll_base); ++} ++ ++ ++// 这是计算当前频率的 ++static unsigned long ls2k300_node_recalc_rate(struct clk_hw *hw, ++ unsigned long parent_rate) ++{ ++ u32 ctrl; ++ unsigned int div_loopc, div_ref, odiv; ++ unsigned int mult, div; ++ unsigned long rate; ++ ++ /* node cpu clk */ ++ ctrl = __raw_readl(reg + PLL_NODE_0_OFFSET); ++ div_loopc = (ctrl >> PLL_NODE_0_LOOPC_SHIFT) & PLL_NODE_0_LOOPC_MASK; ++ div_ref = (ctrl >> PLL_NODE_0_REFC_SHIFT) & PLL_NODE_0_REFC_MASK; ++ odiv = (ctrl >> PLL_NODE_0_ODIV_SHIFT) & PLL_NODE_0_ODIV_MASK; ++ mult = div_loopc; ++ // div = div_ref * odiv; ++ div = div_ref; ++ if (div == 0) { ++ rate = NODE_CLK_FREQ_DEF; ++ } else { ++ rate = refclk_rate * mult / div; ++ } ++ ++ return rate; ++} ++ ++static long ls2k300_node_round_rate(struct clk_hw *hw, unsigned long rate, ++ unsigned long *parent_rate) ++{ ++ struct pll_config pll_cfg; ++ unsigned int mult, div; ++ ++ if (rate == 0 || *parent_rate == 0) ++ return 0; ++ ++ if (ls2k_caculate_freq(rate, &pll_cfg)) { ++ return NODE_CLK_FREQ_DEF; ++ } ++ ++ mult = pll_cfg.l1_loopc; ++ div = pll_cfg.l1_div_ref * pll_cfg.l1_odiv; ++ ++ return refclk_rate * mult / div; ++} ++ ++static int ls2k300_node_set_rate(struct clk_hw *hw, unsigned long rate, ++ unsigned long parent_rate) ++{ ++ struct pll_config pll_cfg; ++ ++ if (rate == 0 || parent_rate == 0) ++ return -EINVAL; ++ ++ if (ls2k_caculate_freq(rate, &pll_cfg)) { ++ return -EINVAL; ++ } ++ ++ ls2k_config_pll(reg + PLL_NODE_0_OFFSET, &pll_cfg); ++ return 0; ++} ++ ++static struct clk_ops ls2k300_node_clk_ops = { ++ .recalc_rate = ls2k300_node_recalc_rate, ++ .round_rate = ls2k300_node_round_rate, ++ .set_rate = ls2k300_node_set_rate, ++}; ++ ++static unsigned long ls2k300_cpu_recalc_rate(struct clk_hw *hw, ++ unsigned long parent_rate) ++{ ++ unsigned int freqscale; ++ u32 val; ++ ++ val = __raw_readl(reg + PLL_FREQ_SC); ++ freqscale = (val >> PLL_FREQSCALE_NODE_SHIFT) & PLL_FREQSCALE_NODE_MASK; ++ ++freqscale; ++ freqscale >>= 3; // /8 ++ ++ return parent_rate / freqscale; ++} ++ ++static long ls2k300_cpu_round_rate(struct clk_hw *hw, unsigned long rate, ++ unsigned long *parent_rate) ++{ ++ int scale; ++ if (!rate || !*parent_rate) ++ return 0; ++ ++ scale = rate * 8 / (*parent_rate) - 1; ++ return (*parent_rate) * (scale + 1) / 8; ++} ++ ++static int ls2k300_cpu_set_rate(struct clk_hw *hw, unsigned long rate, ++ unsigned long parent_rate) ++{ ++ int scale; ++ u32 val; ++ ++ if (!rate || !parent_rate) ++ return -EINVAL; ++ ++ scale = rate * 8 / parent_rate - 1; ++ val = __raw_readl(reg + PLL_FREQ_SC); ++ val &= (~PLL_FREQSCALE_NODE_MASK) << PLL_FREQSCALE_NODE_SHIFT; ++ val |= (scale & PLL_FREQSCALE_NODE_MASK) << PLL_FREQSCALE_NODE_SHIFT; ++ __raw_writel(val, reg + PLL_FREQ_SC); ++ return 0; ++} ++ ++static struct clk_ops ls2k300_cpu_clk_ops = { ++ .recalc_rate = ls2k300_cpu_recalc_rate, ++ .round_rate = ls2k300_cpu_round_rate, ++ .set_rate = ls2k300_cpu_set_rate, ++}; ++#endif // end #if (CPU_CLK_CHANGE == 1) ++ ++//通用的倍率计算函数 不管是乘法还是除法 ++static unsigned int ls2k_generic_magnification_calu(struct ls2k_reg_field_desc* reg_set) ++{ ++ int i = 0; ++ unsigned int total = 1; ++ while(1) { ++ unsigned int reg_value, value; ++ if(!reg_set[i].bit_mask) ++ break; ++ reg_value = __raw_readl(reg + reg_set[i].reg_offset); ++ value = (reg_value >> reg_set[i].bit_offset) & reg_set[i].bit_mask; ++ total *= value; ++ ++i; ++ } ++ return total; ++} ++ ++static unsigned int ls2k_mul_calu(struct ls2k_reg_field_desc* reg_set) ++{ ++ return ls2k_generic_magnification_calu(reg_set); ++} ++ ++static unsigned int ls2k_div_calu(struct ls2k_reg_field_desc* reg_set) ++{ ++ return ls2k_generic_magnification_calu(reg_set); ++} ++ ++//通用的freqscale 乘法部分计算 需要 + 1 (7+1) ++// 最高bit 作为 freq_mode ++// freq_mode = 0 fout=fin*(freqscale[2:0]+1)/8 ++// freq_mode = 1 fout=fin/(freqscale[2:0]+1) ++static unsigned long ls2k_freqscale_mul_calu(struct ls2k_reg_field_desc* reg_set) ++{ ++ int i = 0; ++ unsigned int total = 1; ++ while(1) { ++ unsigned int reg_value, value, mode; ++ if(!reg_set[i].bit_mask) ++ break; ++ reg_value = __raw_readl(reg + reg_set[i].reg_offset); ++ value = (reg_value >> reg_set[i].bit_offset) & reg_set[i].bit_mask; ++ ++ // 判断最高bit 长度为 4, 右移 3 bit 就知道mode了 ++ mode = value >> 3; ++ if (mode) ++ total *= 1; // fout=fin/(freqscale[2:0]+1) 也就是 x1 ++ else ++ total *= ((value & 0x7) + 1); // fout=fin*(freqscale[2:0]+1)/8 也就是 低 3 bit 有效 ++ ++i; ++ } ++ return total; ++} ++ ++//通用的freqscale 除法部分计算 按照位域的最大值 + 1 比如 usb 就是 (freqscale + 1 / 8) 这个8就是返回值 ++// 这是 最高bit 作为 freq_mode ++// freq_mode = 0 fout=fin*(freqscale[2:0]+1)/8 ++// freq_mode = 1 fout=fin/(freqscale[2:0]+1) ++static unsigned long ls2k_freqscale_div_calu(struct ls2k_reg_field_desc* reg_set) ++{ ++ int i = 0; ++ unsigned int total = 1; ++ while(1) { ++ unsigned int reg_value, value, mode; ++ if(!reg_set[i].bit_mask) ++ break; ++ reg_value = __raw_readl(reg + reg_set[i].reg_offset); ++ value = (reg_value >> reg_set[i].bit_offset) & reg_set[i].bit_mask; ++ ++ // 判断最高bit 长度为 4, 右移 3 bit 就知道mode了 ++ mode = value >> 3; ++ ++ if (mode) ++ total *= ((value & 0x7) + 1); // fout=fin/(freqscale[2:0]+1) 也就是 低 3 bit 有效 ++ else ++ total *= 8; // fout=fin*(freqscale[2:0]+1)/8 也就是 / 8 ++ ++i; ++ } ++ return total; ++} ++ ++static unsigned long ls2k300_sdio_freqscale_mul_calu(struct ls2k_reg_field_desc* reg_set) ++{ ++ int i = 0; ++ unsigned int total = 1; ++ while(1) { ++ if(!reg_set[i].bit_mask) ++ break; ++ ++ // CLK/freqscale[27:24] 所以 * 1 ++ total *= 1; ++ ++i; ++ } ++ return total; ++} ++ ++static unsigned long ls2k300_sdio_freqscale_div_calu(struct ls2k_reg_field_desc* reg_set) ++{ ++ int i = 0; ++ unsigned int total = 1; ++ while(1) { ++ unsigned int reg_value, value; ++ if(!reg_set[i].bit_mask) ++ break; ++ reg_value = __raw_readl(reg + reg_set[i].reg_offset); ++ value = (reg_value >> reg_set[i].bit_offset) & reg_set[i].bit_mask; ++ ++ // CLK/freqscale[27:24] 是 0 或者 1 都是除以 1,也就是不分频 ++ if (!value) ++ value = 1; ++ ++ total /= value; ++ ++i; ++ } ++ return total; ++} ++ ++/* ++ * @brief: 倍频系数和分频系数的计算函数 ++ * 逻辑上就是对*_reg_set分析 把全部倍频系数 乘起来 把全部分频系数 乘起来 ++ * 然后 赋值到 参数 mul_result 和 div_result ++ * @param[in]: 参数1(cur_clock): 这个要计算的时钟的描述结构体 里面包含 *_reg_set ++ * @param[out]: 参数2(mul_result): 倍频的总系数 需要传入一个 unsigned long 的变量的地址 作为结果返回 ++ * @param[out]: 参数3(div_result): 分频的总系数 需要传入一个 unsigned long 的变量的地址 作为结果返回 ++ * @return: 参数传进来的指针有一个为NULL 返回 -EFAULT 否则返回 0 代表计算成功 ++ */ ++static int ls2k_mul_div_total_calu(struct ls2k_clock_desc* cur_clock, unsigned long* mul_result, unsigned long* div_result) ++{ ++ unsigned long mul = 1, div = 1, freq_sc_mul = 1, freq_sc_div = 1; ++ ++ if(!mul_result || !div_result) ++ return -EFAULT; ++ if(!cur_clock) ++ return -EFAULT; ++ ++ if(cur_clock->mul_reg_set) ++ mul = cur_clock->mul_calu_func ? cur_clock->mul_calu_func(cur_clock->mul_reg_set) ++ : ls2k_mul_calu(cur_clock->mul_reg_set); ++ if(cur_clock->div_reg_set) ++ div = cur_clock->div_calu_func ? cur_clock->div_calu_func(cur_clock->div_reg_set) ++ : ls2k_div_calu(cur_clock->div_reg_set); ++ if(cur_clock->freqscale_reg_set) { ++ freq_sc_mul = cur_clock->freqscale_mul_calu_func ? cur_clock->freqscale_mul_calu_func(cur_clock->freqscale_reg_set) ++ : ls2k_freqscale_mul_calu(cur_clock->freqscale_reg_set); ++ freq_sc_div = cur_clock->freqscale_div_calu_func ? cur_clock->freqscale_div_calu_func(cur_clock->freqscale_reg_set) ++ : ls2k_freqscale_div_calu(cur_clock->freqscale_reg_set); ++ } ++ mul *= freq_sc_mul; ++ div *= freq_sc_div; ++ mul_result[0] = mul; ++ div_result[0] = div; ++ return 0; ++} ++ ++/* ++ * 时钟的描述结构体的数组 用于描述 整个时钟结构 ++ * 注意 必须要让父节点先于子节点声明,否则在处理逻辑中会引发bug ++ * 参考时钟 REF_CLK_NAME 必须是第一个变量 ++ */ ++static struct ls2k_clock_desc ls2k_clock_desc_set[CLK_CNT] = { ++ { ++ .name = REF_CLK_NAME, ++ .parent_name = NULL, ++ .dts_desc = 1, ++ }, ++ ++ // node pll ++ { ++ .name = "node_pll_clk", ++ .parent_name = "ref_clk", ++ .parent_relevant = PARENT_BRANCH, ++#if (CPU_CLK_CHANGE == 1) ++ // 还没实现 ++ .clk_ops = &ls2k300_node_clk_ops, ++#else ++ .fixed = 1, ++ .mul_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_NODE_0_OFFSET, .bit_offset = PLL_NODE_0_LOOPC_SHIFT, .bit_mask = PLL_NODE_0_LOOPC_MASK}, {.bit_mask = 0}}, ++ .div_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_NODE_0_OFFSET, .bit_offset = PLL_NODE_0_REFC_SHIFT, .bit_mask = PLL_NODE_0_REFC_MASK}, {.bit_mask = 0}}, ++#endif ++ }, ++ { ++ .name = "cpu_clk", ++ .parent_name = "node_pll_clk", ++ .parent_relevant = PARENT_BRANCH, ++#if (CPU_CLK_CHANGE == 1) ++ // 还没实现 ++ .clk_ops = &ls2k300_cpu_clk_ops, ++#else ++ .fixed = 1, ++ .div_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_NODE_0_OFFSET, .bit_offset = PLL_NODE_0_ODIV_SHIFT, .bit_mask = PLL_NODE_0_ODIV_MASK}, {.bit_mask = 0}}, ++ .freqscale_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_FREQ_SC, .bit_offset = PLL_FREQSCALE_NODE_SHIFT, .bit_mask = PLL_FREQSCALE_NODE_MASK}, {.bit_mask = 0}}, ++#endif ++ }, ++ { ++ .name = "scache_clk", ++ .parent_name = "node_pll_clk", ++ .parent_relevant = PARENT_BRANCH, ++#if (CPU_CLK_CHANGE == 1) ++ // 还没实现 ++ .clk_ops = &ls2k300_cpu_clk_ops, ++#else ++ .fixed = 1, ++ .div_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_NODE_0_OFFSET, .bit_offset = PLL_NODE_0_ODIV_SHIFT, .bit_mask = PLL_NODE_0_ODIV_MASK}, {.bit_mask = 0}}, ++ .freqscale_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_FREQ_SC, .bit_offset = PLL_FREQSCALE_NODE_SHIFT, .bit_mask = PLL_FREQSCALE_NODE_MASK}, {.bit_mask = 0}}, ++#endif ++ }, ++ { ++ .name = "iodma_clk", ++ .parent_name = "node_pll_clk", ++ .parent_relevant = PARENT_BRANCH, ++#if (CPU_CLK_CHANGE == 1) ++ // 还没实现 ++ .clk_ops = &ls2k300_cpu_clk_ops, ++#else ++ .fixed = 1, ++ .div_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_NODE_0_OFFSET, .bit_offset = PLL_NODE_0_ODIV_SHIFT, .bit_mask = PLL_NODE_0_ODIV_MASK}, {.bit_mask = 0}}, ++ .freqscale_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_FREQ_SC, .bit_offset = PLL_FREQSCALE_NODE_SHIFT, .bit_mask = PLL_FREQSCALE_NODE_MASK}, {.bit_mask = 0}}, ++#endif ++ }, ++ { ++ .name = "gmac_clk", ++ .parent_name = "node_pll_clk", ++ .parent_relevant = PARENT_BRANCH, ++ .fixed = 1, ++ .div_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_NODE_1_OFFSET, .bit_offset = PLL_NODE_1_ODIV_GMAC_SHIFT, .bit_mask = PLL_NODE_1_ODIV_GMAC_MASK}, {.bit_mask = 0}}, ++ }, ++ { ++ .name = "i2s_clk", ++ .parent_name = "node_pll_clk", ++ .parent_relevant = PARENT_BRANCH, ++ .fixed = 1, ++ .div_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_NODE_1_OFFSET, .bit_offset = PLL_NODE_1_ODIV_I2S_SHIFT, .bit_mask = PLL_NODE_1_ODIV_I2S_MASK}, {.bit_mask = 0}}, ++ .freqscale_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_FREQ_SC, .bit_offset = PLL_FREQSCALE_I2S_SHIFT, .bit_mask = PLL_FREQSCALE_I2S_MASK}, {.bit_mask = 0}}, ++ }, ++ ++ // ddr pll ++ { ++ .name = "ddr_pll_clk", ++ .parent_name = "ref_clk", ++ .parent_relevant = PARENT_BRANCH, ++ .fixed = 1, ++ .mul_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_DDR_0_OFFSET, .bit_offset = PLL_DDR_0_LOOPC_SHIFT, .bit_mask = PLL_DDR_0_LOOPC_MASK}, {.bit_mask = 0}}, ++ .div_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_DDR_0_OFFSET, .bit_offset = PLL_DDR_0_REFC_SHIFT, .bit_mask = PLL_DDR_0_REFC_MASK}, {.bit_mask = 0}}, ++ }, ++ { ++ .name = "ddr_clk", ++ .parent_name = "ddr_pll_clk", ++ .parent_relevant = PARENT_BRANCH, ++ .fixed = 1, ++ .div_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_DDR_0_OFFSET, .bit_offset = PLL_DDR_0_ODIV_SHIFT, .bit_mask = PLL_DDR_0_ODIV_MASK}, {.bit_mask = 0}}, ++ }, ++ { ++ .name = "net_clk", ++ .parent_name = "ddr_pll_clk", ++ .parent_relevant = PARENT_BRANCH, ++ .fixed = 1, ++ .div_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_DDR_1_OFFSET, .bit_offset = PLL_DDR_1_ODIV_NET_SHIFT, .bit_mask = PLL_DDR_1_ODIV_NET_MASK}, {.bit_mask = 0}}, ++ }, ++ { ++ .name = "devs_clk", ++ .parent_name = "ddr_pll_clk", ++ .parent_relevant = PARENT_BRANCH, ++ .fixed = 1, ++ .div_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_DDR_1_OFFSET, .bit_offset = PLL_DDR_1_ODIV_DEVS_SHIFT, .bit_mask = PLL_DDR_1_ODIV_DEVS_MASK}, {.bit_mask = 0}}, ++ }, ++ { ++ .name = "usb_clk", ++ .parent_name = "devs_clk", ++ .parent_relevant = PARENT_BRANCH, ++ .fixed = 1, ++ .freqscale_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_FREQ_SC, .bit_offset = PLL_FREQSCALE_USB_SHIFT, .bit_mask = PLL_FREQSCALE_USB_MASK}, {.bit_mask = 0}}, ++ }, ++ { ++ .name = "apb_clk", ++ .parent_name = "devs_clk", ++ .parent_relevant = PARENT_BRANCH, ++ .fixed = 1, ++ .freqscale_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_FREQ_SC, .bit_offset = PLL_FREQSCALE_APB_SHIFT, .bit_mask = PLL_FREQSCALE_APB_MASK}, {.bit_mask = 0}}, ++ }, ++ { ++ .name = "boot_clk", ++ .parent_name = "devs_clk", ++ .parent_relevant = PARENT_BRANCH, ++ .fixed = 1, ++ .freqscale_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_FREQ_SC, .bit_offset = PLL_FREQSCALE_BOOT_SHIFT, .bit_mask = PLL_FREQSCALE_BOOT_MASK}, {.bit_mask = 0}}, ++ }, ++ { ++ .name = "sdio_clk", ++ .parent_name = "devs_clk", ++ .parent_relevant = PARENT_BRANCH, ++ .fixed = 1, ++ .freqscale_mul_calu_func = ls2k300_sdio_freqscale_mul_calu, ++ .freqscale_div_calu_func = ls2k300_sdio_freqscale_div_calu, ++ .freqscale_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_FREQ_SC, .bit_offset = PLL_FREQSCALE_SDIO_SHIFT, .bit_mask = PLL_FREQSCALE_SDIO_MASK}, {.bit_mask = 0}}, ++ }, ++ ++ // pix pll ++ { ++ .name = "pix_pll_clk", ++ .parent_name = "ref_clk", ++ .parent_relevant = PARENT_BRANCH, ++ .fixed = 1, ++ .mul_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_PIX_0_OFFSET, .bit_offset = PLL_PIX0_0_LOOPC_SHIFT, .bit_mask = PLL_PIX0_0_LOOPC_MASK}, {.bit_mask = 0}}, ++ .div_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_PIX_0_OFFSET, .bit_offset = PLL_PIX0_0_REFC_SHIFT, .bit_mask = PLL_PIX0_0_REFC_MASK}, {.bit_mask = 0}}, ++ }, ++ { ++ .name = "pix_clk", ++ .parent_name = "pix_pll_clk", ++ .parent_relevant = PARENT_BRANCH, ++ .fixed = 1, ++ .div_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_PIX_0_OFFSET, .bit_offset = PLL_PIX0_0_ODIV_SHIFT, .bit_mask = PLL_PIX0_0_ODIV_MASK}, {.bit_mask = 0}}, ++ }, ++ { ++ .name = "gmacbp_clk", ++ .parent_name = "pix_pll_clk", ++ .parent_relevant = PARENT_BRANCH, ++ .fixed = 1, ++ .div_reg_set = (struct ls2k_reg_field_desc[]){{.reg_offset = PLL_PIX_1_OFFSET, .bit_offset = PLL_PIX0_1_ODIV_GMACBP_SHIFT, .bit_mask = PLL_PIX0_1_ODIV_GMACBP_MASK}, {.bit_mask = 0}}, ++ }, ++}; ++ ++/* ++ * @brief: CONFIG_LOONGSON2_SYSCLK_SOFT 的情况下 ls2k300_clk_setup 函数要做的主要任务 ++ * 扫描上面的 ls2k_clock_desc_set 得到整个时钟结构 ++ * 然而第一个时钟默认不用扫,在 ls2k300_clk_setup 开头就会对 参数时钟中注册 ++ * @param[in]: 参数1(node): 这是dts中 始终管理驱动节点的信息 例如这个 clocks:clock-controller@1fe10400 ++ * 用于扫描dts中指定的外部时钟 ++ * @return: 如果成功返回 0 ++ * clks 为空则返回 -EFAULT ++ * node 为空 | dts里面没有要扫描的必要的时钟声明 | ls2k_clock_desc_set里面的某一个 PARENT_CLONE 的 父节点不存在 返回 -ENODEV ++ */ ++static int register_clock(struct device_node *node) ++{ ++ int i = 1; // ref clk is registered! ++ struct ls2k_clock_desc* cur_clock; ++ unsigned long rate; ++ ++ if(!clks) { ++ pr_err("%s func %s: ls2k300_clks kalloc failed\n", __FILE__, __func__); ++ return -EFAULT; ++ } ++ ++ for(; i < CLK_CNT; ++i) { ++ int err; ++ cur_clock = ls2k_clock_desc_set + i; ++ clks[i] = NULL; ++ if(cur_clock->dts_desc) { ++ //dts 扫描 ++ if(!node && !cur_clock->essential_n) { ++ pr_err("%s func %s: device node is NULL can't scan dts\n", __FILE__, __func__); ++ return -ENODEV; ++ } ++ ++ clks[i] = of_clk_get_by_name(node, cur_clock->name); ++ if (IS_ERR(clks[i])) { ++ pr_err("%s func %s: not found %s clock in device tree or maybe you should add this clock in %s clock-names key\n", ++ __FILE__, __func__, cur_clock->name, node->full_name); ++ if(cur_clock->essential_n) { ++ clks[i] = NULL; ++ continue; ++ } else ++ return -ENODEV; ++ } ++ err = clk_register_clkdev(clks[i], cur_clock->name, NULL); ++ if (err && !cur_clock->essential_n) ++ return err; ++ } ++ else if(cur_clock->parent_relevant == PARENT_BRANCH) { ++ if(cur_clock->fixed) { ++ //从父节点有分频倍频而来的的时钟 且固定不变 ++ unsigned long mul_total = 1, div_total = 1; ++ ls2k_mul_div_total_calu(cur_clock, &mul_total, &div_total); ++ clks[i] = clk_register_fixed_factor(NULL, cur_clock->name, cur_clock->parent_name, 0, mul_total, div_total); ++ clk_register_clkdev(clks[i], cur_clock->name, NULL); ++ } ++ else { ++ //从父节点有分频倍频而来的的时钟 且会改变 ++ struct clk_hw *cur_cpu_hw; ++ cur_cpu_hw = clk_hw_register_pll(NULL, cur_clock->name, cur_clock->parent_name, cur_clock->clk_ops, 0); ++ clks[i] = cur_cpu_hw->clk; ++ clk_register_clkdev(clks[i], cur_clock->name, NULL); ++ } ++ } ++ else if(cur_clock->parent_relevant == PARENT_CLONE) { ++ //从父节点直接使用的时钟 同一个时钟 ++ int parent_index = 0; ++ //null name not found ++ if(!cur_clock->parent_name) ++ parent_index = i; ++ for(; parent_index < i; ++parent_index) { ++ if(!strcmp(cur_clock->parent_name, ls2k_clock_desc_set[parent_index].name)) { ++ clks[i] = clks[parent_index]; ++ clk_register_clkdev(clks[i], cur_clock->name, NULL); ++ } ++ } ++ //not found parent ++ if(parent_index == i) { ++ //not found ++ printk(KERN_INFO "%s func %s: warning: clk not found parent clk, name is %s, parent is %s\n", ++ __FILE__, __func__, cur_clock->name, cur_clock->parent_name); ++ if(!cur_clock->essential_n) ++ return -ENODEV; ++ } ++ } ++ else ++ printk(KERN_INFO "%s func %s: warning: clk register type unkonwn! name is %s\n", __FILE__, __func__, cur_clock->name); ++ ++ if(clks[i]) { ++ rate = clk_get_rate(clks[i]); ++ //文件开头 #if 判断开的话 就能看到所有扫描的时钟的信息 ++ DEBUG_INFO("cur clock info name:%s\tpname:%s\trate:%ld\tdts_desc:%d\tparent_relevant:%d\tfixed:%d\n", ++ cur_clock->name, cur_clock->parent_name, rate, cur_clock->dts_desc, cur_clock->parent_relevant, cur_clock->fixed); ++ } ++ } ++ return 0; ++} ++#endif ++ ++static struct clk ** __init ls2k300_clk_setup(struct device_node *node) ++{ ++#ifndef CONFIG_LOONGSON2_SYSCLK_SOFT ++ int start_ = CLK_NODE; ++ int end_ = CLK_PCI; ++ int i = 0; ++ ++ char *con_ids[] = { REF_CLK_NAME, ++ "node_pll_clk", "cpu_clk", "scache_clk", "iodma_clk", "gmac_clk", "i2s_clk" ++ "ddr_pll_clk", "ddr_clk", "net_clk", "devs_clk", "usb_clk", "apb_clk", "boot_clk", "sdio_clk", ++ "pix_pll_clk", "pix_clk", "gmacbp_clk" ++ }; ++#endif ++ struct clk_onecell_data *clk_data; ++ int ndivs = CLK_CNT; ++ int err = -EINVAL; ++ ++ reg = of_iomap(node, 0); ++ if(!reg) { ++ pr_err("%s: Could not map registers for divs-clk: %s\n", __func__, node->full_name); ++ return NULL; ++ } ++ pr_debug("lsdbg---> %s reg:0x%lx", __func__, (unsigned long)reg); ++ ++ clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL); ++ if(!clk_data) ++ goto out_unmap; ++ clks = kcalloc(ndivs, sizeof(*clks), GFP_KERNEL); ++ if(!clks) ++ goto free_clkdata; ++ ++ clk_data->clks = clks; ++ clk_data->clk_num = CLK_CNT; ++ ++ clks[CLK_REF] = of_clk_get_by_name(node, REF_CLK_NAME); ++ if (IS_ERR(clks[CLK_REF])) { ++ pr_err("%s func %s: not found %s clock in device tree or maybe you should add this clock in %s clock-names key\n", ++ __FILE__, __func__, REF_CLK_NAME, node->full_name); ++ err = -ENODEV; ++ goto free_clks; ++ } ++ err = clk_register_clkdev(clks[CLK_REF], REF_CLK_NAME, NULL); ++ if (err) { ++ goto free_clks; ++ } ++ ++ refclk_rate = clk_get_rate(clks[CLK_REF]); ++ pr_debug("lsdbg--->%s refclk rate:%ld", __func__, refclk_rate); ++ if (!refclk_rate) { ++ err = -EINVAL; ++ goto free_clks; ++ } ++ ++#ifdef CONFIG_LOONGSON2_SYSCLK_HW_LOWFREQ ++ { ++ int fixed_clks[] = {120000000, ++ 750000000, 750000000, 750000000, 750000000, 125000000, 750000000, ++ 800000000, 800000000, 266000000, 100000000, 100000000, 100000000, 100000000, ++ 100000000, 100000000, 100000000 }; ++ for (i = start_; i <= end_; i++) { ++ clks[i] = clk_register_fixed_rate(NULL, con_ids[i], NULL, 0, fixed_clks[i-start_]); ++ clk_register_clkdev(clks[i], con_ids[i], NULL); ++ } ++ } ++#endif ++ ++#ifdef CONFIG_LOONGSON2_SYSCLK_HW_HIGFREQ ++ { ++ int fixed_clks[] = {120000000, ++ 1000000000, 1000000000, 1000000000, 1000000000, 125000000, 1000000000, ++ 1200000000, 1200000000, 400000000, 150000000, 150000000, 150000000, 150000000, ++ 200000000, 200000000, 200000000 ++ }; ++ for (i = start_; i <= end_; i++) { ++ clks[i] = clk_register_fixed_rate(NULL, con_ids[i], NULL, 0, fixed_clks[i-start_]); ++ clk_register_clkdev(clks[i], con_ids[i], NULL); ++ } ++ } ++#endif ++ ++#ifdef CONFIG_LOONGSON2_SYSCLK_SOFT ++ if(register_clock(node)) ++ goto free_clks; ++#endif ++ ++#ifdef CONFIG_LOONGSON2_SYSCLK_HW_BYPASS ++ for (i = start_; i <= end_; i++) { ++ clks[i] = clks[CLK_REF]; ++ clk_register_clkdev(clks[i], con_ids[i], NULL); ++ } ++#endif ++ ++ if (of_clk_add_provider(node, of_clk_src_onecell_get, clk_data)) { ++ pr_err("%s: failed to add clock provider for\n", ++ __func__); ++ goto free_clks; ++ } ++ ++ return clks; ++ ++free_clks: ++ kfree(clks); ++free_clkdata: ++ kfree(clk_data); ++out_unmap: ++ iounmap(reg); ++ return NULL; ++} ++ ++static void __init ls2k300_clk_init(struct device_node *node) ++{ ++ ls2k300_clk_setup(node); ++} ++ ++CLK_OF_DECLARE(ls2k300_clk, "loongson,ls2k300-clk", ls2k300_clk_init); +diff --git a/drivers/clk/loongson/clk.c b/drivers/clk/loongson/clk.c +new file mode 100644 +index 000000000..f336a3126 +--- /dev/null ++++ b/drivers/clk/loongson/clk.c +@@ -0,0 +1,41 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++/* ++ * Copyright (c) 2012-2016 Zhang, Keguang ++ */ ++ ++#include ++#include ++ ++#include "clk.h" ++ ++struct clk_hw *__init clk_hw_register_pll(struct device *dev, ++ const char *name, ++ const char *parent_name, ++ const struct clk_ops *ops, ++ unsigned long flags) ++{ ++ int ret; ++ struct clk_hw *hw; ++ struct clk_init_data init; ++ ++ /* allocate the divider */ ++ hw = kzalloc(sizeof(*hw), GFP_KERNEL); ++ if (!hw) ++ return ERR_PTR(-ENOMEM); ++ ++ init.name = name; ++ init.ops = ops; ++ init.flags = flags; ++ init.parent_names = parent_name ? &parent_name : NULL; ++ init.num_parents = parent_name ? 1 : 0; ++ hw->init = &init; ++ ++ /* register the clock */ ++ ret = clk_hw_register(dev, hw); ++ if (ret) { ++ kfree(hw); ++ hw = ERR_PTR(ret); ++ } ++ ++ return hw; ++} +diff --git a/drivers/clk/loongson/clk.h b/drivers/clk/loongson/clk.h +new file mode 100644 +index 000000000..124642302 +--- /dev/null ++++ b/drivers/clk/loongson/clk.h +@@ -0,0 +1,15 @@ ++/* SPDX-License-Identifier: GPL-2.0-or-later */ ++/* ++ * Copyright (c) 2012-2016 Zhang, Keguang ++ */ ++ ++#ifndef __LOONGSON1_CLK_H ++#define __LOONGSON1_CLK_H ++ ++struct clk_hw *clk_hw_register_pll(struct device *dev, ++ const char *name, ++ const char *parent_name, ++ const struct clk_ops *ops, ++ unsigned long flags); ++ ++#endif /* __LOONGSON1_CLK_H */ +-- +2.49.0 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0003-add-loongarch-dma-support.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0003-add-loongarch-dma-support.patch new file mode 100644 index 0000000000000000000000000000000000000000..626ad2ed9bfe12c6f1d1a9444e3fce90c2555441 --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0003-add-loongarch-dma-support.patch @@ -0,0 +1,1492 @@ +From cc895a54d82202a2c047afbfb77c9bff8ddd881a Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:07:18 +0800 +Subject: [PATCH 03/17] add loongarch dma support + +--- + drivers/dma/Kconfig | 22 + + drivers/dma/Makefile | 2 + + drivers/dma/loongson2-apb-dma.c | 705 ++++++++++++++++++++++++++++++++ + drivers/dma/lsia_dma.c | 705 ++++++++++++++++++++++++++++++++ + 4 files changed, 1434 insertions(+) + create mode 100644 drivers/dma/loongson2-apb-dma.c + create mode 100644 drivers/dma/lsia_dma.c + +diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig +index 7a618f629..94134d953 100644 +--- a/drivers/dma/Kconfig ++++ b/drivers/dma/Kconfig +@@ -369,6 +369,20 @@ config K3_DMA + Support the DMA engine for Hisilicon K3 platform + devices. + ++config LOONGSON2_APB_DMA ++ tristate "Loongson2 APB DMA support" ++ depends on LOONGARCH || COMPILE_TEST ++ select DMA_ENGINE ++ select DMA_VIRTUAL_CHANNELS ++ help ++ Support for the Loongson2 APB DMA controller driver. The ++ DMA controller is having single DMA channel which can be ++ configured for different peripherals like audio, nand, sdio ++ etc which is in APB bus. ++ ++ This DMA controller transfers data from memory to peripheral fifo. ++ It does not support memory to memory data transfer. ++ + config LPC18XX_DMAMUX + bool "NXP LPC18xx/43xx DMA MUX for PL080" + depends on ARCH_LPC18XX || COMPILE_TEST +@@ -733,6 +747,14 @@ config XILINX_ZYNQMP_DPDMA + driver provides the dmaengine required by the DisplayPort subsystem + display driver. + ++config LSIA_DMA ++ tristate "Loongson LSIA DMA support" ++ depends on LOONGARCH ++ select DMA_ENGINE ++ select DMA_VIRTUAL_CHANNELS ++ help ++ Support the Loongson LSIA DMA controller. ++ + # driver files + source "drivers/dma/bestcomm/Kconfig" + +diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile +index 83553a97a..2b5a327f6 100644 +--- a/drivers/dma/Makefile ++++ b/drivers/dma/Makefile +@@ -82,6 +82,8 @@ obj-$(CONFIG_XGENE_DMA) += xgene-dma.o + obj-$(CONFIG_ST_FDMA) += st_fdma.o + obj-$(CONFIG_FSL_DPAA2_QDMA) += fsl-dpaa2-qdma/ + obj-$(CONFIG_INTEL_LDMA) += lgm/ ++obj-$(CONFIG_LSIA_DMA) += lsia_dma.o ++obj-$(CONFIG_LOONGSON2_APB_DMA) += loongson2-apb-dma.o + + obj-y += mediatek/ + obj-y += qcom/ +diff --git a/drivers/dma/loongson2-apb-dma.c b/drivers/dma/loongson2-apb-dma.c +new file mode 100644 +index 000000000..9c9a1dbf0 +--- /dev/null ++++ b/drivers/dma/loongson2-apb-dma.c +@@ -0,0 +1,705 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++/* ++ * Driver for the Loongson-2 APB DMA Controller ++ * ++ * Copyright (C) 2017-2023 Loongson Corporation ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "dmaengine.h" ++#include "virt-dma.h" ++ ++/* Global Configuration Register */ ++#define LDMA_ORDER_ERG 0x0 ++ ++/* Bitfield definitions */ ++ ++/* Bitfields in Global Configuration Register */ ++#define LDMA_64BIT_EN BIT(0) /* 1: 64 bit support */ ++#define LDMA_UNCOHERENT_EN BIT(1) /* 0: cache, 1: uncache */ ++#define LDMA_ASK_VALID BIT(2) ++#define LDMA_START BIT(3) /* DMA start operation */ ++#define LDMA_STOP BIT(4) /* DMA stop operation */ ++#define LDMA_CONFIG_MASK GENMASK_ULL(4, 0) /* DMA controller config bits mask */ ++ ++/* Bitfields in ndesc_addr field of HW descriptor */ ++#define LDMA_DESC_EN BIT(0) /*1: The next descriptor is valid */ ++#define LDMA_DESC_ADDR_LOW GENMASK(31, 1) ++ ++/* Bitfields in cmd field of HW descriptor */ ++#define LDMA_INT BIT(1) /* Enable DMA interrupts */ ++#define LDMA_DATA_DIRECTION BIT(12) /* 1: write to device, 0: read from device */ ++ ++#define LDMA_SLAVE_BUSWIDTHS (BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) | \ ++ BIT(DMA_SLAVE_BUSWIDTH_8_BYTES)) ++ ++#define LDMA_MAX_TRANS_LEN U32_MAX ++ ++/*-- descriptors -----------------------------------------------------*/ ++ ++/* ++ * struct ls2x_dma_hw_desc - DMA HW descriptor ++ * @ndesc_addr: the next descriptor low address. ++ * @mem_addr: memory low address. ++ * @apb_addr: device buffer address. ++ * @len: length of a piece of carried content, in words. ++ * @step_len: length between two moved memory data blocks. ++ * @step_times: number of blocks to be carried in a single DMA operation. ++ * @cmd: descriptor command or state. ++ * @stats: DMA status. ++ * @high_ndesc_addr: the next descriptor high address. ++ * @high_mem_addr: memory high address. ++ * @reserved: reserved ++ */ ++struct ls2x_dma_hw_desc { ++ u32 ndesc_addr; ++ u32 mem_addr; ++ u32 apb_addr; ++ u32 len; ++ u32 step_len; ++ u32 step_times; ++ u32 cmd; ++ u32 stats; ++ u32 high_ndesc_addr; ++ u32 high_mem_addr; ++ u32 reserved[2]; ++} __packed; ++ ++/* ++ * struct ls2x_dma_sg - ls2x dma scatter gather entry ++ * @hw: the pointer to DMA HW descriptor. ++ * @llp: physical address of the DMA HW descriptor. ++ * @phys: destination or source address(mem). ++ * @len: number of Bytes to read. ++ */ ++struct ls2x_dma_sg { ++ struct ls2x_dma_hw_desc *hw; ++ dma_addr_t llp; ++ dma_addr_t phys; ++ u32 len; ++}; ++ ++/* ++ * struct ls2x_dma_desc - software descriptor ++ * @vdesc: pointer to the virtual dma descriptor. ++ * @cyclic: flag to dma cyclic ++ * @burst_size: burst size of transaction, in words. ++ * @desc_num: number of sg entries. ++ * @direction: transfer direction, to or from device. ++ * @status: dma controller status. ++ * @sg: array of sgs. ++ */ ++struct ls2x_dma_desc { ++ struct virt_dma_desc vdesc; ++ bool cyclic; ++ size_t burst_size; ++ u32 desc_num; ++ enum dma_transfer_direction direction; ++ enum dma_status status; ++ struct ls2x_dma_sg sg[] __counted_by(desc_num); ++}; ++ ++/*-- Channels --------------------------------------------------------*/ ++ ++/* ++ * struct ls2x_dma_chan - internal representation of an LS2X APB DMA channel ++ * @vchan: virtual dma channel entry. ++ * @desc: pointer to the ls2x sw dma descriptor. ++ * @pool: hw desc table ++ * @irq: irq line ++ * @sconfig: configuration for slave transfers, passed via .device_config ++ */ ++struct ls2x_dma_chan { ++ struct virt_dma_chan vchan; ++ struct ls2x_dma_desc *desc; ++ void *pool; ++ int irq; ++ struct dma_slave_config sconfig; ++}; ++ ++/*-- Controller ------------------------------------------------------*/ ++ ++/* ++ * struct ls2x_dma_priv - LS2X APB DMAC specific information ++ * @ddev: dmaengine dma_device object members ++ * @dma_clk: DMAC clock source ++ * @regs: memory mapped register base ++ * @lchan: channel to store ls2x_dma_chan structures ++ */ ++struct ls2x_dma_priv { ++ struct dma_device ddev; ++ struct clk *dma_clk; ++ void __iomem *regs; ++ struct ls2x_dma_chan lchan; ++}; ++ ++/*-- Helper functions ------------------------------------------------*/ ++ ++static inline struct ls2x_dma_desc *to_ldma_desc(struct virt_dma_desc *vdesc) ++{ ++ return container_of(vdesc, struct ls2x_dma_desc, vdesc); ++} ++ ++static inline struct ls2x_dma_chan *to_ldma_chan(struct dma_chan *chan) ++{ ++ return container_of(chan, struct ls2x_dma_chan, vchan.chan); ++} ++ ++static inline struct ls2x_dma_priv *to_ldma_priv(struct dma_device *ddev) ++{ ++ return container_of(ddev, struct ls2x_dma_priv, ddev); ++} ++ ++static struct device *chan2dev(struct dma_chan *chan) ++{ ++ return &chan->dev->device; ++} ++ ++static void ls2x_dma_desc_free(struct virt_dma_desc *vdesc) ++{ ++ struct ls2x_dma_chan *lchan = to_ldma_chan(vdesc->tx.chan); ++ struct ls2x_dma_desc *desc = to_ldma_desc(vdesc); ++ int i; ++ ++ for (i = 0; i < desc->desc_num; i++) { ++ if (desc->sg[i].hw) ++ dma_pool_free(lchan->pool, desc->sg[i].hw, ++ desc->sg[i].llp); ++ } ++ ++ kfree(desc); ++} ++ ++static void ls2x_dma_write_cmd(struct ls2x_dma_chan *lchan, bool cmd) ++{ ++ struct ls2x_dma_priv *priv = to_ldma_priv(lchan->vchan.chan.device); ++ u64 val; ++ ++ val = lo_hi_readq(priv->regs + LDMA_ORDER_ERG) & ~LDMA_CONFIG_MASK; ++ val |= LDMA_64BIT_EN | cmd; ++ lo_hi_writeq(val, priv->regs + LDMA_ORDER_ERG); ++} ++ ++static void ls2x_dma_start_transfer(struct ls2x_dma_chan *lchan) ++{ ++ struct ls2x_dma_priv *priv = to_ldma_priv(lchan->vchan.chan.device); ++ struct ls2x_dma_sg *ldma_sg; ++ struct virt_dma_desc *vdesc; ++ u64 val; ++ ++ /* Get the next descriptor */ ++ vdesc = vchan_next_desc(&lchan->vchan); ++ if (!vdesc) { ++ lchan->desc = NULL; ++ return; ++ } ++ ++ list_del(&vdesc->node); ++ lchan->desc = to_ldma_desc(vdesc); ++ ldma_sg = &lchan->desc->sg[0]; ++ ++ /* Start DMA */ ++ lo_hi_writeq(0, priv->regs + LDMA_ORDER_ERG); ++ val = (ldma_sg->llp & ~LDMA_CONFIG_MASK) | LDMA_64BIT_EN | LDMA_START; ++ lo_hi_writeq(val, priv->regs + LDMA_ORDER_ERG); ++} ++ ++static size_t ls2x_dmac_detect_burst(struct ls2x_dma_chan *lchan) ++{ ++ u32 maxburst, buswidth; ++ ++ /* Reject definitely invalid configurations */ ++ if ((lchan->sconfig.src_addr_width & LDMA_SLAVE_BUSWIDTHS) && ++ (lchan->sconfig.dst_addr_width & LDMA_SLAVE_BUSWIDTHS)) ++ return 0; ++ ++ if (lchan->sconfig.direction == DMA_MEM_TO_DEV) { ++ maxburst = lchan->sconfig.dst_maxburst; ++ buswidth = lchan->sconfig.dst_addr_width; ++ } else { ++ maxburst = lchan->sconfig.src_maxburst; ++ buswidth = lchan->sconfig.src_addr_width; ++ } ++ ++ /* If maxburst is zero, fallback to LDMA_MAX_TRANS_LEN */ ++ return maxburst ? (maxburst * buswidth) >> 2 : LDMA_MAX_TRANS_LEN; ++} ++ ++static void ls2x_dma_fill_desc(struct ls2x_dma_chan *lchan, u32 sg_index, ++ struct ls2x_dma_desc *desc) ++{ ++ struct ls2x_dma_sg *ldma_sg = &desc->sg[sg_index]; ++ u32 num_segments, segment_size; ++ ++ if (desc->direction == DMA_MEM_TO_DEV) { ++ ldma_sg->hw->cmd = LDMA_INT | LDMA_DATA_DIRECTION; ++ ldma_sg->hw->apb_addr = lchan->sconfig.dst_addr; ++ } else { ++ ldma_sg->hw->cmd = LDMA_INT; ++ ldma_sg->hw->apb_addr = lchan->sconfig.src_addr; ++ } ++ ++ ldma_sg->hw->mem_addr = lower_32_bits(ldma_sg->phys); ++ ldma_sg->hw->high_mem_addr = upper_32_bits(ldma_sg->phys); ++ ++ /* Split into multiple equally sized segments if necessary */ ++ num_segments = DIV_ROUND_UP((ldma_sg->len + 3) >> 2, desc->burst_size); ++ segment_size = DIV_ROUND_UP((ldma_sg->len + 3) >> 2, num_segments); ++ ++ /* Word count register takes input in words */ ++ ldma_sg->hw->len = segment_size; ++ ldma_sg->hw->step_times = num_segments; ++ ldma_sg->hw->step_len = 0; ++ ++ /* lets make a link list */ ++ if (sg_index) { ++ desc->sg[sg_index - 1].hw->ndesc_addr = ldma_sg->llp | LDMA_DESC_EN; ++ desc->sg[sg_index - 1].hw->high_ndesc_addr = upper_32_bits(ldma_sg->llp); ++ } ++} ++ ++/*-- DMA Engine API --------------------------------------------------*/ ++ ++/* ++ * ls2x_dma_alloc_chan_resources - allocate resources for DMA channel ++ * @chan: allocate descriptor resources for this channel ++ * ++ * return - the number of allocated descriptors ++ */ ++static int ls2x_dma_alloc_chan_resources(struct dma_chan *chan) ++{ ++ struct ls2x_dma_chan *lchan = to_ldma_chan(chan); ++ ++ /* Create a pool of consistent memory blocks for hardware descriptors */ ++ lchan->pool = dma_pool_create(dev_name(chan2dev(chan)), ++ chan->device->dev, PAGE_SIZE, ++ __alignof__(struct ls2x_dma_hw_desc), 0); ++ if (!lchan->pool) { ++ dev_err(chan2dev(chan), "No memory for descriptors\n"); ++ return -ENOMEM; ++ } ++ ++ return 1; ++} ++ ++/* ++ * ls2x_dma_free_chan_resources - free all channel resources ++ * @chan: DMA channel ++ */ ++static void ls2x_dma_free_chan_resources(struct dma_chan *chan) ++{ ++ struct ls2x_dma_chan *lchan = to_ldma_chan(chan); ++ ++ vchan_free_chan_resources(to_virt_chan(chan)); ++ dma_pool_destroy(lchan->pool); ++ lchan->pool = NULL; ++} ++ ++/* ++ * ls2x_dma_prep_slave_sg - prepare descriptors for a DMA_SLAVE transaction ++ * @chan: DMA channel ++ * @sgl: scatterlist to transfer to/from ++ * @sg_len: number of entries in @scatterlist ++ * @direction: DMA direction ++ * @flags: tx descriptor status flags ++ * @context: transaction context (ignored) ++ * ++ * Return: Async transaction descriptor on success and NULL on failure ++ */ ++static struct dma_async_tx_descriptor * ++ls2x_dma_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, ++ u32 sg_len, enum dma_transfer_direction direction, ++ unsigned long flags, void *context) ++{ ++ struct ls2x_dma_chan *lchan = to_ldma_chan(chan); ++ struct ls2x_dma_desc *desc; ++ struct scatterlist *sg; ++ size_t burst_size; ++ int i; ++ ++ if (unlikely(!sg_len || !is_slave_direction(direction))) ++ return NULL; ++ ++ burst_size = ls2x_dmac_detect_burst(lchan); ++ if (!burst_size) ++ return NULL; ++ ++ desc = kzalloc(struct_size(desc, sg, sg_len), GFP_NOWAIT); ++ if (!desc) ++ return NULL; ++ ++ desc->desc_num = sg_len; ++ desc->direction = direction; ++ desc->burst_size = burst_size; ++ ++ for_each_sg(sgl, sg, sg_len, i) { ++ struct ls2x_dma_sg *ldma_sg = &desc->sg[i]; ++ ++ /* Allocate DMA capable memory for hardware descriptor */ ++ ldma_sg->hw = dma_pool_alloc(lchan->pool, GFP_NOWAIT, &ldma_sg->llp); ++ if (!ldma_sg->hw) { ++ desc->desc_num = i; ++ ls2x_dma_desc_free(&desc->vdesc); ++ return NULL; ++ } ++ ++ ldma_sg->phys = sg_dma_address(sg); ++ ldma_sg->len = sg_dma_len(sg); ++ ++ ls2x_dma_fill_desc(lchan, i, desc); ++ } ++ ++ /* Setting the last descriptor enable bit */ ++ desc->sg[sg_len - 1].hw->ndesc_addr &= ~LDMA_DESC_EN; ++ desc->status = DMA_IN_PROGRESS; ++ ++ return vchan_tx_prep(&lchan->vchan, &desc->vdesc, flags); ++} ++ ++/* ++ * ls2x_dma_prep_dma_cyclic - prepare the cyclic DMA transfer ++ * @chan: the DMA channel to prepare ++ * @buf_addr: physical DMA address where the buffer starts ++ * @buf_len: total number of bytes for the entire buffer ++ * @period_len: number of bytes for each period ++ * @direction: transfer direction, to or from device ++ * @flags: tx descriptor status flags ++ * ++ * Return: Async transaction descriptor on success and NULL on failure ++ */ ++static struct dma_async_tx_descriptor * ++ls2x_dma_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, ++ size_t period_len, enum dma_transfer_direction direction, ++ unsigned long flags) ++{ ++ struct ls2x_dma_chan *lchan = to_ldma_chan(chan); ++ struct ls2x_dma_desc *desc; ++ size_t burst_size; ++ u32 num_periods; ++ int i; ++ ++ if (unlikely(!buf_len || !period_len)) ++ return NULL; ++ ++ if (unlikely(!is_slave_direction(direction))) ++ return NULL; ++ ++ burst_size = ls2x_dmac_detect_burst(lchan); ++ if (!burst_size) ++ return NULL; ++ ++ num_periods = buf_len / period_len; ++ desc = kzalloc(struct_size(desc, sg, num_periods), GFP_NOWAIT); ++ if (!desc) ++ return NULL; ++ ++ desc->desc_num = num_periods; ++ desc->direction = direction; ++ desc->burst_size = burst_size; ++ ++ /* Build cyclic linked list */ ++ for (i = 0; i < num_periods; i++) { ++ struct ls2x_dma_sg *ldma_sg = &desc->sg[i]; ++ ++ /* Allocate DMA capable memory for hardware descriptor */ ++ ldma_sg->hw = dma_pool_alloc(lchan->pool, GFP_NOWAIT, &ldma_sg->llp); ++ if (!ldma_sg->hw) { ++ desc->desc_num = i; ++ ls2x_dma_desc_free(&desc->vdesc); ++ return NULL; ++ } ++ ++ ldma_sg->phys = buf_addr + period_len * i; ++ ldma_sg->len = period_len; ++ ++ ls2x_dma_fill_desc(lchan, i, desc); ++ } ++ ++ /* Lets make a cyclic list */ ++ desc->sg[num_periods - 1].hw->ndesc_addr = desc->sg[0].llp | LDMA_DESC_EN; ++ desc->sg[num_periods - 1].hw->high_ndesc_addr = upper_32_bits(desc->sg[0].llp); ++ desc->cyclic = true; ++ desc->status = DMA_IN_PROGRESS; ++ ++ return vchan_tx_prep(&lchan->vchan, &desc->vdesc, flags); ++} ++ ++/* ++ * ls2x_slave_config - set slave configuration for channel ++ * @chan: dma channel ++ * @cfg: slave configuration ++ * ++ * Sets slave configuration for channel ++ */ ++static int ls2x_dma_slave_config(struct dma_chan *chan, ++ struct dma_slave_config *config) ++{ ++ struct ls2x_dma_chan *lchan = to_ldma_chan(chan); ++ ++ memcpy(&lchan->sconfig, config, sizeof(*config)); ++ return 0; ++} ++ ++/* ++ * ls2x_dma_issue_pending - push pending transactions to the hardware ++ * @chan: channel ++ * ++ * When this function is called, all pending transactions are pushed to the ++ * hardware and executed. ++ */ ++static void ls2x_dma_issue_pending(struct dma_chan *chan) ++{ ++ struct ls2x_dma_chan *lchan = to_ldma_chan(chan); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&lchan->vchan.lock, flags); ++ if (vchan_issue_pending(&lchan->vchan) && !lchan->desc) ++ ls2x_dma_start_transfer(lchan); ++ spin_unlock_irqrestore(&lchan->vchan.lock, flags); ++} ++ ++/* ++ * ls2x_dma_terminate_all - terminate all transactions ++ * @chan: channel ++ * ++ * Stops all DMA transactions. ++ */ ++static int ls2x_dma_terminate_all(struct dma_chan *chan) ++{ ++ struct ls2x_dma_chan *lchan = to_ldma_chan(chan); ++ unsigned long flags; ++ LIST_HEAD(head); ++ ++ spin_lock_irqsave(&lchan->vchan.lock, flags); ++ /* Setting stop cmd */ ++ ls2x_dma_write_cmd(lchan, LDMA_STOP); ++ if (lchan->desc) { ++ vchan_terminate_vdesc(&lchan->desc->vdesc); ++ lchan->desc = NULL; ++ } ++ ++ vchan_get_all_descriptors(&lchan->vchan, &head); ++ spin_unlock_irqrestore(&lchan->vchan.lock, flags); ++ ++ vchan_dma_desc_free_list(&lchan->vchan, &head); ++ return 0; ++} ++ ++/* ++ * ls2x_dma_synchronize - Synchronizes the termination of transfers to the ++ * current context. ++ * @chan: channel ++ */ ++static void ls2x_dma_synchronize(struct dma_chan *chan) ++{ ++ struct ls2x_dma_chan *lchan = to_ldma_chan(chan); ++ ++ vchan_synchronize(&lchan->vchan); ++} ++ ++static int ls2x_dma_pause(struct dma_chan *chan) ++{ ++ struct ls2x_dma_chan *lchan = to_ldma_chan(chan); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&lchan->vchan.lock, flags); ++ if (lchan->desc && lchan->desc->status == DMA_IN_PROGRESS) { ++ ls2x_dma_write_cmd(lchan, LDMA_STOP); ++ lchan->desc->status = DMA_PAUSED; ++ } ++ spin_unlock_irqrestore(&lchan->vchan.lock, flags); ++ ++ return 0; ++} ++ ++static int ls2x_dma_resume(struct dma_chan *chan) ++{ ++ struct ls2x_dma_chan *lchan = to_ldma_chan(chan); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&lchan->vchan.lock, flags); ++ if (lchan->desc && lchan->desc->status == DMA_PAUSED) { ++ lchan->desc->status = DMA_IN_PROGRESS; ++ ls2x_dma_write_cmd(lchan, LDMA_START); ++ } ++ spin_unlock_irqrestore(&lchan->vchan.lock, flags); ++ ++ return 0; ++} ++ ++/* ++ * ls2x_dma_isr - LS2X DMA Interrupt handler ++ * @irq: IRQ number ++ * @dev_id: Pointer to ls2x_dma_chan ++ * ++ * Return: IRQ_HANDLED/IRQ_NONE ++ */ ++static irqreturn_t ls2x_dma_isr(int irq, void *dev_id) ++{ ++ struct ls2x_dma_chan *lchan = dev_id; ++ struct ls2x_dma_desc *desc; ++ ++ spin_lock(&lchan->vchan.lock); ++ desc = lchan->desc; ++ if (desc) { ++ if (desc->cyclic) { ++ vchan_cyclic_callback(&desc->vdesc); ++ } else { ++ desc->status = DMA_COMPLETE; ++ vchan_cookie_complete(&desc->vdesc); ++ ls2x_dma_start_transfer(lchan); ++ } ++ ++ /* ls2x_dma_start_transfer() updates lchan->desc */ ++ if (!lchan->desc) ++ ls2x_dma_write_cmd(lchan, LDMA_STOP); ++ } ++ spin_unlock(&lchan->vchan.lock); ++ ++ return IRQ_HANDLED; ++} ++ ++static int ls2x_dma_chan_init(struct platform_device *pdev, ++ struct ls2x_dma_priv *priv) ++{ ++ struct ls2x_dma_chan *lchan = &priv->lchan; ++ struct device *dev = &pdev->dev; ++ int ret; ++ ++ lchan->irq = platform_get_irq(pdev, 0); ++ if (lchan->irq < 0) ++ return lchan->irq; ++ ++ ret = devm_request_irq(dev, lchan->irq, ls2x_dma_isr, IRQF_TRIGGER_RISING, ++ dev_name(&pdev->dev), lchan); ++ if (ret) ++ return ret; ++ ++ /* Initialize channels related values */ ++ INIT_LIST_HEAD(&priv->ddev.channels); ++ lchan->vchan.desc_free = ls2x_dma_desc_free; ++ vchan_init(&lchan->vchan, &priv->ddev); ++ ++ return 0; ++} ++ ++/* ++ * ls2x_dma_probe - Driver probe function ++ * @pdev: Pointer to the platform_device structure ++ * ++ * Return: '0' on success and failure value on error ++ */ ++static int ls2x_dma_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct ls2x_dma_priv *priv; ++ struct dma_device *ddev; ++ int ret; ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ priv->regs = devm_platform_ioremap_resource(pdev, 0); ++ if (IS_ERR(priv->regs)) ++ return dev_err_probe(dev, PTR_ERR(priv->regs), ++ "devm_platform_ioremap_resource failed.\n"); ++ ++ priv->dma_clk = devm_clk_get(&pdev->dev, NULL); ++ if (IS_ERR(priv->dma_clk)) ++ return dev_err_probe(dev, PTR_ERR(priv->dma_clk), "devm_clk_get failed.\n"); ++ ++ ret = clk_prepare_enable(priv->dma_clk); ++ if (ret) ++ return dev_err_probe(dev, ret, "clk_prepare_enable failed.\n"); ++ ++ ret = ls2x_dma_chan_init(pdev, priv); ++ if (ret) ++ goto disable_clk; ++ ++ ddev = &priv->ddev; ++ ddev->dev = dev; ++ dma_cap_zero(ddev->cap_mask); ++ dma_cap_set(DMA_SLAVE, ddev->cap_mask); ++ dma_cap_set(DMA_CYCLIC, ddev->cap_mask); ++ ++ ddev->device_alloc_chan_resources = ls2x_dma_alloc_chan_resources; ++ ddev->device_free_chan_resources = ls2x_dma_free_chan_resources; ++ ddev->device_tx_status = dma_cookie_status; ++ ddev->device_issue_pending = ls2x_dma_issue_pending; ++ ddev->device_prep_slave_sg = ls2x_dma_prep_slave_sg; ++ ddev->device_prep_dma_cyclic = ls2x_dma_prep_dma_cyclic; ++ ddev->device_config = ls2x_dma_slave_config; ++ ddev->device_terminate_all = ls2x_dma_terminate_all; ++ ddev->device_synchronize = ls2x_dma_synchronize; ++ ddev->device_pause = ls2x_dma_pause; ++ ddev->device_resume = ls2x_dma_resume; ++ ++ ddev->src_addr_widths = LDMA_SLAVE_BUSWIDTHS; ++ ddev->dst_addr_widths = LDMA_SLAVE_BUSWIDTHS; ++ ddev->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); ++ ++ ret = dma_async_device_register(&priv->ddev); ++ if (ret < 0) ++ goto disable_clk; ++ ++ ret = of_dma_controller_register(dev->of_node, of_dma_xlate_by_chan_id, priv); ++ if (ret < 0) ++ goto unregister_dmac; ++ ++ platform_set_drvdata(pdev, priv); ++ ++ dev_info(dev, "Loongson LS2X APB DMA driver registered successfully.\n"); ++ return 0; ++ ++unregister_dmac: ++ dma_async_device_unregister(&priv->ddev); ++disable_clk: ++ clk_disable_unprepare(priv->dma_clk); ++ ++ return ret; ++} ++ ++/* ++ * ls2x_dma_remove - Driver remove function ++ * @pdev: Pointer to the platform_device structure ++ */ ++static void ls2x_dma_remove(struct platform_device *pdev) ++{ ++ struct ls2x_dma_priv *priv = platform_get_drvdata(pdev); ++ ++ of_dma_controller_free(pdev->dev.of_node); ++ dma_async_device_unregister(&priv->ddev); ++ clk_disable_unprepare(priv->dma_clk); ++} ++ ++static const struct of_device_id ls2x_dma_of_match_table[] = { ++ { .compatible = "loongson,ls2k1000-apbdma" }, ++ { /* sentinel */ } ++}; ++MODULE_DEVICE_TABLE(of, ls2x_dma_of_match_table); ++ ++static struct platform_driver ls2x_dmac_driver = { ++ .probe = ls2x_dma_probe, ++ .remove_new = ls2x_dma_remove, ++ .driver = { ++ .name = "ls2x-apbdma", ++ .of_match_table = ls2x_dma_of_match_table, ++ }, ++}; ++module_platform_driver(ls2x_dmac_driver); ++ ++MODULE_DESCRIPTION("Loongson-2 APB DMA Controller driver"); ++MODULE_AUTHOR("Loongson Technology Corporation Limited"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/dma/lsia_dma.c b/drivers/dma/lsia_dma.c +new file mode 100644 +index 000000000..531f68ddc +--- /dev/null ++++ b/drivers/dma/lsia_dma.c +@@ -0,0 +1,705 @@ ++/* ++ * LOONGSON LSIA DMA controller ++ * ++ * Copyright (C) 2024 Loongson Technology Corporation Limited ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "virt-dma.h" ++ ++#define DMA_ISR 0x0000 /* DMA Int Status Reg */ ++#define DMA_IFCR 0x0004 /* DMA Int Flag Clear Reg */ ++#define DMA_TCI BIT(1) /* Transfer Complete Interrupt */ ++#define DMA_HTI BIT(2) /* Half Transfer Interrupt */ ++#define DMA_TEI BIT(3) /* Transfer Error Interrupt */ ++#define DMA_MASKI (DMA_TCI \ ++ | DMA_HTI \ ++ | DMA_TEI) ++ ++/* DMA channel x Configuration Register */ ++#define DMA_CCR(x) (0x0008 + 0x14 * (x)) ++#define DMA_CCR_M2M BIT(14) ++#define DMA_CCR_PL_MASK GENMASK(13, 12) ++#define DMA_CCR_PL(n) ((n & 0x3) << 12) ++#define DMA_CCR_MSIZE_MASK GENMASK(11, 10) ++#define DMA_CCR_MSIZE(n) ((n & 0x3) << 10) ++#define DMA_CCR_PSIZE_MASK GENMASK(9, 8) ++#define DMA_CCR_PSIZE(n) ((n & 0x3) << 8) ++#define DMA_CCR_MINC BIT(7) /* Memory increment mode */ ++#define DMA_CCR_PINC BIT(6) /* Peripheral increment mode */ ++#define DMA_CCR_CIRC BIT(5) /* Circular mode */ ++#define DMA_CCR_DIR BIT(4) ++#define DMA_CCR_TEIE BIT(3) /* Transfer Error Int Enable */ ++#define DMA_CCR_HTIE BIT(2) /* Half Transfer Complete Int Enable */ ++#define DMA_CCR_TCIE BIT(1) /* Transfer Complete Int Enable */ ++#define DMA_CCR_EN BIT(0) /* Stream Enable */ ++#define DMA_CCR_CFG_MASK (DMA_CCR_PINC \ ++ | DMA_CCR_MINC \ ++ | DMA_CCR_PL_MASK) ++#define DMA_CCR_IRQ_MASK (DMA_CCR_TCIE \ ++ | DMA_CCR_HTIE \ ++ | DMA_CCR_TEIE) ++ ++#define DMA_CNDTR(x) (0x000c + 0x14 * (x)) ++#define DMA_CPAR(x) (0x0010 + 0x14 * (x)) ++#define DMA_CMAR(x) (0x0014 + 0x14 * (x)) ++ ++ ++#define DMA_MAX_CHANNELS 8 ++ ++#define LS_DMA_BUSWIDTHS (BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | \ ++ BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \ ++ BIT(DMA_SLAVE_BUSWIDTH_4_BYTES)) ++ ++struct lsia_dma_chan_reg { ++ u32 dma_ccr; ++ u32 dma_cndtr; ++ u32 dma_cpar; ++ u32 dma_cmar; ++}; ++ ++struct lsia_dma_sg_req { ++ u32 len; ++ struct lsia_dma_chan_reg chan_reg; ++}; ++ ++struct lsia_dma_desc { ++ struct virt_dma_desc vdesc; ++ bool cyclic; ++ u32 num_sgs; ++ struct lsia_dma_sg_req sg_req[]; ++}; ++ ++struct lsia_dma_chan { ++ struct virt_dma_chan vchan; ++ u32 id; ++ u32 irq; ++ struct lsia_dma_desc *desc; ++ u32 next_sg; ++ struct dma_slave_config dma_sconfig; ++ struct lsia_dma_chan_reg chan_reg; ++}; ++ ++struct lsia_dma_device { ++ struct dma_device ddev; ++ void __iomem *base; ++ u32 dma_channels; ++ struct lsia_dma_chan chan[DMA_MAX_CHANNELS]; ++}; ++ ++static struct lsia_dma_device *lsia_dma_get_dev(struct lsia_dma_chan *chan) ++{ ++ return container_of(chan->vchan.chan.device, struct lsia_dma_device, ++ ddev); ++} ++ ++static struct lsia_dma_chan *to_lsia_dma_chan(struct dma_chan *c) ++{ ++ return container_of(c, struct lsia_dma_chan, vchan.chan); ++} ++ ++static struct lsia_dma_desc *to_lsia_dma_desc(struct virt_dma_desc *vdesc) ++{ ++ return container_of(vdesc, struct lsia_dma_desc, vdesc); ++} ++ ++static struct device *chan2dev(struct lsia_dma_chan *chan) ++{ ++ return &chan->vchan.chan.dev->device; ++} ++ ++static u32 lsia_dma_read(struct lsia_dma_device *dmadev, u32 reg) ++{ ++ return readl_relaxed(dmadev->base + reg); ++} ++ ++static void lsia_dma_write(struct lsia_dma_device *dmadev, u32 reg, u32 val) ++{ ++ writel_relaxed(val, dmadev->base + reg); ++} ++ ++static struct lsia_dma_desc *lsia_dma_alloc_desc(u32 num_sgs) ++{ ++ return kzalloc(sizeof(struct lsia_dma_desc) + ++ sizeof(struct lsia_dma_sg_req) * num_sgs, GFP_NOWAIT); ++} ++ ++static int lsia_dma_slave_config(struct dma_chan *c, ++ struct dma_slave_config *config) ++{ ++ struct lsia_dma_chan *chan = to_lsia_dma_chan(c); ++ ++ memcpy(&chan->dma_sconfig, config, sizeof(*config)); ++ ++ return 0; ++} ++ ++static void lsia_dma_irq_clear(struct lsia_dma_chan *chan, u32 flags) ++{ ++ struct lsia_dma_device *dmadev = lsia_dma_get_dev(chan); ++ u32 dma_ifcr; ++ ++ dma_ifcr = flags << (4 * chan->id); ++ lsia_dma_write(dmadev, DMA_IFCR, dma_ifcr); ++} ++ ++static void lsia_dma_stop(struct lsia_dma_chan *chan) ++{ ++ struct lsia_dma_device *dmadev = lsia_dma_get_dev(chan); ++ u32 dma_ccr; ++ ++ dma_ccr = lsia_dma_read(dmadev, DMA_CCR(chan->id)); ++ dma_ccr &= ~(DMA_CCR_IRQ_MASK | DMA_CCR_EN); ++ lsia_dma_write(dmadev, DMA_CCR(chan->id), dma_ccr); ++ ++ lsia_dma_irq_clear(chan, DMA_MASKI); ++} ++ ++static int lsia_dma_terminate_all(struct dma_chan *c) ++{ ++ struct lsia_dma_chan *chan = to_lsia_dma_chan(c); ++ unsigned long flags; ++ LIST_HEAD(head); ++ ++ spin_lock_irqsave(&chan->vchan.lock, flags); ++ if (chan->desc) { ++ vchan_terminate_vdesc(&chan->desc->vdesc); ++ lsia_dma_stop(chan); ++ chan->desc = NULL; ++ } ++ vchan_get_all_descriptors(&chan->vchan, &head); ++ spin_unlock_irqrestore(&chan->vchan.lock, flags); ++ vchan_dma_desc_free_list(&chan->vchan, &head); ++ ++ return 0; ++} ++ ++static void lsia_dma_synchronize(struct dma_chan *c) ++{ ++ struct lsia_dma_chan *chan = to_lsia_dma_chan(c); ++ ++ vchan_synchronize(&chan->vchan); ++} ++ ++static void lsia_dma_dump_reg(struct lsia_dma_chan *chan) ++{ ++ struct lsia_dma_device *dev = lsia_dma_get_dev(chan); ++ u32 id = chan->id; ++ ++ dev_dbg(chan2dev(chan), "CR: %x\n", lsia_dma_read(dev, DMA_CCR(id))); ++ dev_dbg(chan2dev(chan), "NDTR:%x\n", lsia_dma_read(dev, DMA_CNDTR(id))); ++ dev_dbg(chan2dev(chan), "PAR: %x\n", lsia_dma_read(dev, DMA_CPAR(id))); ++ dev_dbg(chan2dev(chan), "MAR: %x\n", lsia_dma_read(dev, DMA_CMAR(id))); ++} ++ ++static void lsia_dma_start_transfer(struct lsia_dma_chan *chan) ++{ ++ struct lsia_dma_device *dmadev = lsia_dma_get_dev(chan); ++ struct virt_dma_desc *vdesc; ++ struct lsia_dma_sg_req *sg_req; ++ struct lsia_dma_chan_reg *reg; ++ ++ lsia_dma_stop(chan); ++ ++ if (!chan->desc) { ++ vdesc = vchan_next_desc(&chan->vchan); ++ if (!vdesc) ++ return; ++ list_del(&vdesc->node); ++ chan->desc = to_lsia_dma_desc(vdesc); ++ chan->next_sg = 0; ++ } ++ ++ if (chan->next_sg == chan->desc->num_sgs) ++ chan->next_sg = 0; ++ ++ sg_req = &chan->desc->sg_req[chan->next_sg]; ++ reg = &sg_req->chan_reg; ++ ++ lsia_dma_write(dmadev, DMA_CCR(chan->id), reg->dma_ccr); ++ lsia_dma_write(dmadev, DMA_CNDTR(chan->id), reg->dma_cndtr); ++ lsia_dma_write(dmadev, DMA_CPAR(chan->id), reg->dma_cpar); ++ lsia_dma_write(dmadev, DMA_CMAR(chan->id), reg->dma_cmar); ++ ++ chan->next_sg++; ++ ++ lsia_dma_dump_reg(chan); ++ ++ /* Start DMA */ ++ reg->dma_ccr |= DMA_CCR_EN; ++ lsia_dma_write(dmadev, DMA_CCR(chan->id), reg->dma_ccr); ++ ++ dev_dbg(chan2dev(chan), "vchan %pK: started\n", &chan->vchan); ++} ++ ++static void lsia_dma_configure_next_sg(struct lsia_dma_chan *chan) ++{ ++ struct lsia_dma_device *dmadev = lsia_dma_get_dev(chan); ++ struct lsia_dma_sg_req *sg_req; ++ u32 dma_cmar, id; ++ u32 dma_ccr; ++ ++ id = chan->id; ++ ++ if (chan->next_sg == chan->desc->num_sgs) ++ chan->next_sg = 0; ++ ++ /* stop to update mem addr */ ++ dma_ccr = lsia_dma_read(dmadev, DMA_CCR(id)); ++ dma_ccr &= ~DMA_CCR_EN; ++ lsia_dma_write(dmadev, DMA_CCR(id), dma_ccr); ++ ++ sg_req = &chan->desc->sg_req[chan->next_sg]; ++ dma_cmar = sg_req->chan_reg.dma_cmar; ++ lsia_dma_write(dmadev, DMA_CMAR(id), dma_cmar); ++ ++ /* start transition */ ++ dma_ccr |= DMA_CCR_EN; ++ lsia_dma_write(dmadev, DMA_CCR(id), dma_ccr); ++} ++ ++static void lsia_dma_handle_chan_done(struct lsia_dma_chan *chan) ++{ ++ if (chan->desc) { ++ if (chan->desc->cyclic) { ++ vchan_cyclic_callback(&chan->desc->vdesc); ++ /* DMA_CCR_CIRC mode don't need update register */ ++ if (chan->desc->num_sgs == 1) ++ return; ++ lsia_dma_configure_next_sg(chan); ++ chan->next_sg++; ++ } else { ++ if (chan->next_sg == chan->desc->num_sgs) { ++ vchan_cookie_complete(&chan->desc->vdesc); ++ chan->desc = NULL; ++ } ++ lsia_dma_start_transfer(chan); ++ } ++ } ++} ++ ++static irqreturn_t lsia_dma_chan_irq(int irq, void *devid) ++{ ++ struct lsia_dma_chan *chan = devid; ++ struct lsia_dma_device *dmadev = lsia_dma_get_dev(chan); ++ u32 status, scr; ++ ++ spin_lock(&chan->vchan.lock); ++ ++ status = (lsia_dma_read(dmadev, DMA_ISR) >> (4 * chan->id)) & DMA_MASKI; ++ scr = lsia_dma_read(dmadev, DMA_CCR(chan->id)); ++ status &= scr; ++ ++ if (status & DMA_TCI) ++ lsia_dma_handle_chan_done(chan); ++ ++ if (status & DMA_HTI) ++ lsia_dma_irq_clear(chan, DMA_HTI); ++ ++ if (status & DMA_TEI) ++ dev_err(chan2dev(chan), "Trans Error\n"); ++ ++ lsia_dma_irq_clear(chan, status); ++ ++ spin_unlock(&chan->vchan.lock); ++ ++ return IRQ_HANDLED; ++} ++ ++static void lsia_dma_issue_pending(struct dma_chan *c) ++{ ++ struct lsia_dma_chan *chan = to_lsia_dma_chan(c); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&chan->vchan.lock, flags); ++ if (vchan_issue_pending(&chan->vchan) && !chan->desc) { ++ dev_dbg(chan2dev(chan), "vchan %pK: issued\n", &chan->vchan); ++ lsia_dma_start_transfer(chan); ++ ++ } ++ spin_unlock_irqrestore(&chan->vchan.lock, flags); ++} ++ ++static int lsia_dma_set_xfer_param(struct lsia_dma_chan *chan, ++ enum dma_transfer_direction direction, ++ enum dma_slave_buswidth *buswidth, ++ u32 buf_len) ++{ ++ enum dma_slave_buswidth dev_width; ++ int mem_size, periph_size; ++ u32 dma_ccr; ++ ++ switch (direction) { ++ case DMA_MEM_TO_DEV: ++ dev_width = chan->dma_sconfig.dst_addr_width; ++ chan->chan_reg.dma_cpar = chan->dma_sconfig.dst_addr; ++ dma_ccr = DMA_CCR_DIR | DMA_CCR_TCIE; ++ break; ++ case DMA_DEV_TO_MEM: ++ dev_width = chan->dma_sconfig.src_addr_width; ++ chan->chan_reg.dma_cpar = chan->dma_sconfig.src_addr; ++ dma_ccr = DMA_CCR_MINC | DMA_CCR_TCIE; ++ break; ++ default: ++ return -EINVAL; ++ } ++ *buswidth = dev_width; ++ if ((dev_width > 4) || (dev_width < 0)) ++ return -EINVAL; ++ ++ periph_size = (dev_width >> 1) & 0x3; ++ /* Set memory data size to 4 bytes */ ++ mem_size = 0x2; ++ dma_ccr |= DMA_CCR_PSIZE(periph_size) | DMA_CCR_MSIZE(mem_size); ++ ++ /* Set DMA control register */ ++ chan->chan_reg.dma_ccr &= ~(DMA_CCR_PSIZE_MASK | DMA_CCR_MSIZE_MASK); ++ chan->chan_reg.dma_ccr |= dma_ccr; ++ ++ return 0; ++} ++ ++static struct dma_async_tx_descriptor *lsia_dma_prep_slave_sg( ++ struct dma_chan *c, struct scatterlist *sgl, ++ u32 sg_len, enum dma_transfer_direction direction, ++ unsigned long flags, void *context) ++{ ++ struct lsia_dma_chan *chan = to_lsia_dma_chan(c); ++ struct lsia_dma_desc *desc; ++ struct scatterlist *sg; ++ enum dma_slave_buswidth buswidth; ++ u32 nb_data_items; ++ int i; ++ ++ desc = lsia_dma_alloc_desc(sg_len); ++ if (!desc) ++ return NULL; ++ ++ for_each_sg(sgl, sg, sg_len, i) { ++ if (lsia_dma_set_xfer_param(chan, direction, &buswidth, ++ sg_dma_len(sg))) ++ return NULL; ++ ++ desc->sg_req[i].len = sg_dma_len(sg); ++ ++ nb_data_items = desc->sg_req[i].len / buswidth; ++ if (nb_data_items >= (1 << 16)) { ++ dev_err(chan2dev(chan), "nb items not supported\n"); ++ kfree(desc); ++ return NULL; ++ } ++ desc->sg_req[i].chan_reg.dma_ccr = chan->chan_reg.dma_ccr; ++ desc->sg_req[i].chan_reg.dma_cpar = chan->chan_reg.dma_cpar; ++ desc->sg_req[i].chan_reg.dma_cmar = sg_dma_address(sg); ++ desc->sg_req[i].chan_reg.dma_cndtr = nb_data_items; ++ } ++ ++ desc->num_sgs = sg_len; ++ desc->cyclic = false; ++ ++ return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags); ++} ++ ++static struct dma_async_tx_descriptor *lsia_dma_prep_dma_cyclic( ++ struct dma_chan *c, dma_addr_t buf_addr, size_t buf_len, ++ size_t period_len, enum dma_transfer_direction direction, ++ unsigned long flags) ++{ ++ struct lsia_dma_chan *chan = to_lsia_dma_chan(c); ++ struct lsia_dma_desc *desc; ++ enum dma_slave_buswidth buswidth; ++ u32 num_periods, nb_data_items; ++ int i; ++ ++ if (buf_len % period_len) ++ return NULL; ++ ++ if (lsia_dma_set_xfer_param(chan, direction, &buswidth, period_len)) ++ return NULL; ++ ++ nb_data_items = period_len / buswidth; ++ if (nb_data_items >= (1 << 16)) { ++ dev_err(chan2dev(chan), "number of items not supported\n"); ++ return NULL; ++ } ++ ++ /* Enable Circular mode */ ++ if (buf_len == period_len) ++ chan->chan_reg.dma_ccr |= DMA_CCR_CIRC; ++ ++ num_periods = buf_len / period_len; ++ ++ desc = lsia_dma_alloc_desc(num_periods); ++ if (!desc) ++ return NULL; ++ ++ for (i = 0; i < num_periods; i++) { ++ desc->sg_req[i].len = period_len; ++ desc->sg_req[i].chan_reg.dma_ccr = chan->chan_reg.dma_ccr; ++ desc->sg_req[i].chan_reg.dma_cpar = chan->chan_reg.dma_cpar; ++ desc->sg_req[i].chan_reg.dma_cmar = buf_addr; ++ desc->sg_req[i].chan_reg.dma_cndtr = nb_data_items; ++ buf_addr += period_len; ++ } ++ ++ desc->num_sgs = num_periods; ++ desc->cyclic = true; ++ ++ return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags); ++} ++ ++static size_t lsia_dma_desc_residue(struct lsia_dma_chan *chan, ++ struct lsia_dma_desc *desc, ++ u32 next_sg) ++{ ++ u32 residue, width, ndtr; ++ int i; ++ struct lsia_dma_device *dmadev = lsia_dma_get_dev(chan); ++ ++ width = (lsia_dma_read(dmadev, DMA_CCR(chan->id)) >> 8) & 0x3; ++ ndtr = lsia_dma_read(dmadev, DMA_CNDTR(chan->id)); ++ residue = ndtr << width; ++ ++ if (chan->desc->cyclic && next_sg == 0) ++ return residue; ++ ++ for (i = next_sg; i < desc->num_sgs; i++) ++ residue += desc->sg_req[i].len; ++ ++ return residue; ++} ++ ++static enum dma_status lsia_dma_tx_status(struct dma_chan *c, ++ dma_cookie_t cookie, ++ struct dma_tx_state *state) ++{ ++ struct lsia_dma_chan *chan = to_lsia_dma_chan(c); ++ struct virt_dma_desc *vdesc; ++ enum dma_status status; ++ unsigned long flags; ++ ++ status = dma_cookie_status(c, cookie, state); ++ if (status == DMA_COMPLETE || !state) ++ return status; ++ ++ spin_lock_irqsave(&chan->vchan.lock, flags); ++ vdesc = vchan_find_desc(&chan->vchan, cookie); ++ if (chan->desc && cookie == chan->desc->vdesc.tx.cookie) ++ state->residue = lsia_dma_desc_residue(chan, chan->desc, ++ chan->next_sg); ++ else if (vdesc) ++ state->residue = lsia_dma_desc_residue(chan, ++ to_lsia_dma_desc(vdesc), 0); ++ ++ spin_unlock_irqrestore(&chan->vchan.lock, flags); ++ ++ return status; ++} ++ ++static int lsia_dma_alloc_chan_resources(struct dma_chan *c) ++{ ++ struct lsia_dma_chan *chan = to_lsia_dma_chan(c); ++ ++ lsia_dma_stop(chan); ++ return 0; ++} ++ ++static void lsia_dma_free_chan_resources(struct dma_chan *c) ++{ ++ vchan_free_chan_resources(to_virt_chan(c)); ++} ++ ++static void lsia_dma_desc_free(struct virt_dma_desc *vdesc) ++{ ++ kfree(container_of(vdesc, struct lsia_dma_desc, vdesc)); ++} ++ ++static struct dma_chan *lsia_dma_of_xlate(struct of_phandle_args *dma_spec, ++ struct of_dma *ofdma) ++{ ++ struct lsia_dma_device *dmadev = ofdma->of_dma_data; ++ struct device *dev = dmadev->ddev.dev; ++ struct lsia_dma_chan *chan; ++ struct dma_chan *c; ++ u32 channel_id, stream_config; ++ ++ if (dma_spec->args_count < 2) ++ return NULL; ++ ++ channel_id = dma_spec->args[0]; ++ stream_config = dma_spec->args[1]; ++ ++ if (channel_id >= DMA_MAX_CHANNELS) { ++ dev_err(dev, "Bad channel\n"); ++ return NULL; ++ } ++ ++ chan = &dmadev->chan[channel_id]; ++ ++ c = dma_get_slave_channel(&chan->vchan.chan); ++ if (!c) { ++ dev_err(dev, "No more channels available\n"); ++ return NULL; ++ } ++ ++ memset(&chan->chan_reg, 0, sizeof(struct lsia_dma_chan_reg)); ++ chan->chan_reg.dma_ccr = stream_config & (DMA_CCR_CFG_MASK ++ | DMA_CCR_IRQ_MASK); ++ ++ return c; ++} ++ ++static int lsia_dma_probe(struct platform_device *pdev) ++{ ++ struct lsia_dma_chan *chan; ++ struct lsia_dma_device *dmadev; ++ struct dma_device *dd; ++ struct resource *res; /* IO mem resources */ ++ int chls, i, ret, irq; ++ ++ dmadev = devm_kzalloc(&pdev->dev, sizeof(*dmadev), GFP_KERNEL); ++ if (!dmadev) ++ return -ENOMEM; ++ ++ dd = &dmadev->ddev; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ dmadev->base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(dmadev->base)) ++ return PTR_ERR(dmadev->base); ++ ++ dd->dev = &pdev->dev; ++ ++ dma_cap_set(DMA_SLAVE, dd->cap_mask); ++ dma_cap_set(DMA_PRIVATE, dd->cap_mask); ++ dma_cap_set(DMA_CYCLIC, dd->cap_mask); ++ dd->device_alloc_chan_resources = lsia_dma_alloc_chan_resources; ++ dd->device_config = lsia_dma_slave_config; ++ dd->device_prep_slave_sg = lsia_dma_prep_slave_sg; ++ dd->device_prep_dma_cyclic = lsia_dma_prep_dma_cyclic; ++ dd->device_issue_pending = lsia_dma_issue_pending; ++ dd->device_synchronize = lsia_dma_synchronize; ++ dd->device_tx_status = lsia_dma_tx_status; ++ dd->device_terminate_all = lsia_dma_terminate_all; ++ dd->device_free_chan_resources = lsia_dma_free_chan_resources; ++ ++ dd->src_addr_widths = LS_DMA_BUSWIDTHS; ++ dd->dst_addr_widths = LS_DMA_BUSWIDTHS; ++ dd->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); ++ ++ INIT_LIST_HEAD(&dd->channels); ++ ++ if (of_property_read_u32((&pdev->dev)->of_node, "dma-channels", &chls)) ++ chls = DMA_MAX_CHANNELS; ++ dmadev->dma_channels = chls; ++ ++ for (i = 0; i < chls; i++) { ++ chan = &dmadev->chan[i]; ++ chan->id = i; ++ chan->vchan.desc_free = lsia_dma_desc_free; ++ vchan_init(&chan->vchan, dd); ++ } ++ ++ ret = dma_async_device_register(dd); ++ if (ret) ++ return ret; ++ ++ for (i = 0; i < chls; i++) { ++ chan = &dmadev->chan[i]; ++ irq = platform_get_irq(pdev, i); ++ if (irq < 0) { ++ dev_err(&pdev->dev, "failed to get IRQ: %d\n", irq); ++ ret = -EINVAL; ++ goto err_unregister; ++ } ++ chan->irq = irq; ++ ret = request_irq(chan->irq, lsia_dma_chan_irq, 0, ++ dev_name(chan2dev(chan)), chan); ++ if (ret) { ++ dev_err(&pdev->dev, "request %d err %d\n", irq, ret); ++ goto err_unregister; ++ } ++ } ++ ++ ret = of_dma_controller_register(pdev->dev.of_node, ++ lsia_dma_of_xlate, dmadev); ++ if (ret) { ++ dev_err(&pdev->dev, "DMA registration failed %d\n", ret); ++ goto err_unregister; ++ } ++ ++ platform_set_drvdata(pdev, dmadev); ++ ++ dev_info(&pdev->dev, "DMA driver registered\n"); ++ ++ return 0; ++ ++err_unregister: ++ dma_async_device_unregister(dd); ++ ++ return ret; ++} ++ ++static int lsia_dma_remove(struct platform_device *pdev) ++{ ++ struct lsia_dma_device *dmadev = platform_get_drvdata(pdev); ++ int i; ++ ++ of_dma_controller_free(pdev->dev.of_node); ++ ++ for (i = 0; i < dmadev->dma_channels; i++) { ++ free_irq(dmadev->chan[i].irq, dmadev); ++ tasklet_kill(&dmadev->chan[i].vchan.task); ++ } ++ dma_async_device_unregister(&dmadev->ddev); ++ ++ return 0; ++} ++ ++static const struct of_device_id lsia_dma_of_match[] = { ++ { .compatible = "loongson,lsia-dma", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, lsia_dma_of_match); ++ ++static struct platform_driver lsia_dma_driver = { ++ .driver = { ++ .name = "loongson-lsia-dma", ++ .of_match_table = lsia_dma_of_match, ++ }, ++ .probe = lsia_dma_probe, ++ .remove = lsia_dma_remove, ++}; ++ ++static int __init lsia_dma_init(void) ++{ ++ return platform_driver_register(&lsia_dma_driver); ++} ++subsys_initcall(lsia_dma_init); ++ ++static void __exit lsia_dma_exit(void) ++{ ++ platform_driver_unregister(&lsia_dma_driver); ++} ++module_exit(lsia_dma_exit); ++ ++MODULE_AUTHOR("Loongson Technology Corporation Limited"); ++MODULE_DESCRIPTION("Looongson LSIA DMA Controller driver"); ++MODULE_LICENSE("GPL"); +-- +2.49.0 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0004-add-gpio-loongarch-irq.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0004-add-gpio-loongarch-irq.patch new file mode 100644 index 0000000000000000000000000000000000000000..7da30dd9aceff50f49cfe117fb0ab0c9cc555b22 --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0004-add-gpio-loongarch-irq.patch @@ -0,0 +1,603 @@ +From bd06d7c6fd33b07e8b6071aed3e477ec053a0556 Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:08:44 +0800 +Subject: [PATCH 04/17] add gpio loongarch irq + +--- + drivers/gpio/Kconfig | 8 + + drivers/gpio/Makefile | 1 + + drivers/gpio/gpio-loongson-irq.c | 550 +++++++++++++++++++++++++++++++ + 3 files changed, 559 insertions(+) + create mode 100644 drivers/gpio/gpio-loongson-irq.c + +diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig +index e52e8b5ae..bceab769a 100644 +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -393,6 +393,14 @@ config GPIO_LOONGSON + help + Driver for GPIO functionality on Loongson-2F/3A/3B processors. + ++config GPIO_LOONGSON_IRQCHIP ++ bool "Loongson GPIO support irqchip (e.g. 2P500)" ++ default n ++ depends on CPU_LOONGSON2EF || CPU_LOONGSON64 || LOONGARCH ++ select GPIOLIB_IRQCHIP ++ help ++ driver for GPIO With IRQCHIP. ++ + config GPIO_LOONGSON_64BIT + tristate "Loongson 64 bit GPIO support" + depends on LOONGARCH || COMPILE_TEST +diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile +index e44a700ec..8de5671a9 100644 +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -84,6 +84,7 @@ obj-$(CONFIG_GPIO_LJCA) += gpio-ljca.o + obj-$(CONFIG_GPIO_LOGICVC) += gpio-logicvc.o + obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o + obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o ++obj-$(CONFIG_GPIO_LOONGSON_IRQCHIP) += gpio-loongson-irq.o + obj-$(CONFIG_GPIO_LOONGSON_64BIT) += gpio-loongson-64bit.o + obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o + obj-$(CONFIG_GPIO_LP873X) += gpio-lp873x.o +diff --git a/drivers/gpio/gpio-loongson-irq.c b/drivers/gpio/gpio-loongson-irq.c +new file mode 100644 +index 000000000..13932e297 +--- /dev/null ++++ b/drivers/gpio/gpio-loongson-irq.c +@@ -0,0 +1,550 @@ ++/* ++ * irq-> hirq-> pin-> vhwirq-> rirq(remapped irq) ++ *GPIO0 40 100 0 vb+0 rib+0 200 ++ *GPIO1 40 100 1 vb+1 rib+1 201 ++ *GPIO2 41 101 2 vb+2 rib+2 202 ++ *GPIO3 41 101 3 vb+3 rib+3 203 ++ * |HIRQ-PIN-MAP |VIRQ-IRQ-MAP ++ * |hirq-pin-group |IRQ DOMAIN & CHIPGENERIC ++ * |vhwirq-base irq-base ++ * */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define MAX_IRQNUM_PER_CHIP 64 ++ ++#define REG_GPIO_DIR(s) (s->regtable->dir) ++#define REG_GPIO_OUT(s) (s->regtable->out) ++#define REG_GPIO_IN(s) (s->regtable->in) ++#define REG_GPIO_IRQ(s) (s->regtable->irq) ++#define REG_GPIO_IRQPOL(s) (s->regtable->irqpol) ++#define REG_GPIO_IRQEDG(s) (s->regtable->irqedg) ++#define REG_GPIO_IRQCLR(s) (s->regtable->irqclr) ++#define REG_GPIO_IRQSTA(s) (s->regtable->irqsta) ++#define REG_GPIO_IRQDUL(s) (s->regtable->irqdul) ++ ++#define lsirq_gpio_set_reg_dir(self, p, val) \ ++ writeb(val, self->reg + REG_GPIO_DIR(self) + p) ++#define lsirq_gpio_set_reg_out(self, p, val) \ ++ writeb(val, self->reg + REG_GPIO_OUT(self) + p) ++#define lsirq_gpio_get_reg_in(self, p) \ ++ readb(self->reg + REG_GPIO_IN(self) + p) ++#define lsirq_gpio_set_reg_irq(self, p, val) \ ++ writeb(val, self->reg + REG_GPIO_IRQ(self) + p) ++#define lsirq_gpio_get_reg_irq(self, p) \ ++ readb(self->reg + REG_GPIO_IRQ(self) + p) ++#define lsirq_gpio_set_reg_irqpol(self, p, val) \ ++ writeb(val, self->reg + REG_GPIO_IRQPOL(self) + p) ++#define lsirq_gpio_set_reg_irqedg(self, p, val) \ ++ writeb(val, self->reg + REG_GPIO_IRQEDG(self) + p) ++#define lsirq_gpio_set_reg_irqclr(self, p, val) \ ++ writeb(val, self->reg + REG_GPIO_IRQCLR(self) + p) ++#define lsirq_gpio_get_reg_irqsta(self, p) \ ++ readb(self->reg + REG_GPIO_IRQSTA(self) + p) ++#define lsirq_gpio_set_reg_irqdul(self, p, val) \ ++ writeb(val, self->reg + REG_GPIO_IRQDUL(self) + p) ++ ++typedef struct lsirq_gpio_regtable_s { ++ u32 dir; ++ u32 out; ++ u32 in; ++ u32 irq; ++ u32 irqpol; ++ u32 irqedg; ++ u32 irqclr; ++ u32 irqsta; ++ u32 irqdul; ++} lsirq_gpio_regtable_t; ++ ++typedef struct lsirq_gpio_irqpinmap_s { ++ int irq; ++ int hwirq; ++ int pin_start; ++ int pin_num; ++ void* parent; ++ struct list_head next; ++} lsirq_gpio_irqpinmap_t; ++ ++typedef struct lsirq_gpio_irqdesc_s { ++ char name[32]; ++ int rirq_base; ++ int vhwirq_base; ++ int nr_irqs; ++ // HIRQ-PIN MAP ++ struct list_head ipm; ++ // VIRQ-IRQ MAP ++ struct irq_domain* domain; ++ struct irq_chip* ic; ++} lsirq_gpio_irqdesc_t; ++ ++typedef struct lsirq_gpio_priv_s { ++ spinlock_t lock; ++ void __iomem* reg; ++ struct device* dev; ++ struct gpio_chip gc; ++ lsirq_gpio_irqdesc_t irqd; ++ const lsirq_gpio_regtable_t* regtable; ++} lsirq_gpio_priv_t; ++ ++static lsirq_gpio_regtable_t generic_reg_table = { ++ .dir = 0x800, ++ .out = 0x900, ++ .in = 0xa00, ++ .irq = 0xb00, ++ .irqpol = 0xc00, ++ .irqedg = 0xd00, ++ .irqclr = 0xe00, ++ .irqsta = 0xf00, ++ .irqdul = 0xf80, ++}; ++ ++static int __map_hwirq_pin(lsirq_gpio_irqpinmap_t* map, int hwirq, ++ lsirq_gpio_priv_t* priv) ++{ ++ int pin; ++ ++ if (map->hwirq == hwirq) ++ { ++ for (pin = map->pin_start; ++ pin < map->pin_start + map->pin_num; ++ pin++) ++ { ++ // 2k300 must check irq enable ++ if (lsirq_gpio_get_reg_irq(priv, pin) == 1 && ++ lsirq_gpio_get_reg_irqsta(priv, pin) == 1) ++ return pin; ++ } ++ } ++ ++ return -1; ++} ++ ++static int __map_vhwirq_pin(lsirq_gpio_priv_t* priv, int vhwirq) ++{ ++ return vhwirq - priv->irqd.vhwirq_base; ++} ++ ++static int __map_pin_vhwirq(lsirq_gpio_priv_t* priv, int pin) ++{ ++ return pin + priv->irqd.vhwirq_base; ++} ++ ++static int __map_vhwirq_rirq(lsirq_gpio_priv_t* priv, int vhwirq) ++{ ++ return irq_find_mapping(priv->irqd.domain, vhwirq); ++} ++ ++static void irqfhd_lsirq_gpio_handler(struct irq_desc *desc) ++{ ++ lsirq_gpio_irqpinmap_t* map = irq_desc_get_handler_data(desc); ++ lsirq_gpio_priv_t *priv = map->parent; ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ int pin, vhwirq, rirq; ++ ++ chained_irq_enter(chip, desc); ++ ++ pin = __map_hwirq_pin(map, desc->irq_data.hwirq, priv); ++ if (pin < 0) ++ goto end; ++ lsirq_gpio_set_reg_irqclr(priv, pin, 1); ++ ++ vhwirq = __map_pin_vhwirq(priv, pin); ++ rirq = __map_vhwirq_rirq(priv, vhwirq); ++ generic_handle_irq(rirq); ++end: ++ chained_irq_exit(chip, desc); ++} ++ ++static int mthd_lsirq_gpio_request(struct gpio_chip *gc, unsigned pin) ++{ ++ if (pin >= gc->ngpio) ++ return -EINVAL; ++ else ++ return 0; ++} ++ ++static int mthd_lsirq_gpio_direction_input(struct gpio_chip *gc, unsigned pin) ++{ ++ lsirq_gpio_priv_t *priv = gpiochip_get_data(gc); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&priv->lock, flags); ++ lsirq_gpio_set_reg_dir(priv, pin, 1); ++ spin_unlock_irqrestore(&priv->lock, flags); ++ ++ return 0; ++} ++ ++static int mthd_lsirq_gpio_direction_output(struct gpio_chip *gc, ++ unsigned pin, int value) ++{ ++ lsirq_gpio_priv_t *priv = gpiochip_get_data(gc); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&priv->lock, flags); ++ lsirq_gpio_set_reg_out(priv, pin, value); ++ lsirq_gpio_set_reg_dir(priv, pin, 0); ++ spin_unlock_irqrestore(&priv->lock, flags); ++ ++ return 0; ++} ++ ++static int mthd_lsirq_gpio_get(struct gpio_chip *gc, unsigned pin) ++{ ++ lsirq_gpio_priv_t *priv = gpiochip_get_data(gc); ++ ++ return lsirq_gpio_get_reg_in(priv, pin) & 1; ++} ++ ++static void mthd_lsirq_gpio_set(struct gpio_chip *gc, unsigned pin, int value) ++{ ++ lsirq_gpio_priv_t *priv = gpiochip_get_data(gc); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&priv->lock, flags); ++ lsirq_gpio_set_reg_out(priv, pin, value); ++ spin_unlock_irqrestore(&priv->lock, flags); ++} ++ ++static int mthd_lsirq_gpio_to_irq(struct gpio_chip *gc, unsigned pin) ++{ ++ int vhwirq, rirq; ++ lsirq_gpio_priv_t *priv = gpiochip_get_data(gc); ++ ++ vhwirq = __map_pin_vhwirq(priv, (int)pin); ++ rirq = __map_vhwirq_rirq(priv, vhwirq); ++ ++ return rirq; ++} ++ ++static int mthd_lsirq_gpio_irqsettype(struct irq_data *d, u32 type) ++{ ++ lsirq_gpio_priv_t *priv = irq_data_get_irq_chip_data(d); ++ int vhwirq = d->hwirq; ++ int pin = __map_vhwirq_pin(priv, vhwirq); ++ unsigned long flags; ++ ++ switch (type) { ++ case IRQ_TYPE_EDGE_RISING: ++ lsirq_gpio_set_reg_irq(priv, pin, 1); ++ lsirq_gpio_set_reg_irqdul(priv, pin, 0); ++ lsirq_gpio_set_reg_irqpol(priv, pin, 1); ++ lsirq_gpio_set_reg_irqedg(priv, pin, 1); ++ break; ++ case IRQ_TYPE_EDGE_FALLING: ++ lsirq_gpio_set_reg_irq(priv, pin, 1); ++ lsirq_gpio_set_reg_irqdul(priv, pin, 0); ++ lsirq_gpio_set_reg_irqpol(priv, pin, 0); ++ lsirq_gpio_set_reg_irqedg(priv, pin, 1); ++ break; ++ case IRQ_TYPE_EDGE_BOTH: ++ lsirq_gpio_set_reg_irq(priv, pin, 1); ++ lsirq_gpio_set_reg_irqdul(priv, pin, 1); ++ lsirq_gpio_set_reg_irqedg(priv, pin, 1); ++ break; ++ case IRQ_TYPE_LEVEL_LOW: ++ lsirq_gpio_set_reg_irq(priv, pin, 1); ++ lsirq_gpio_set_reg_irqdul(priv, pin, 0); ++ lsirq_gpio_set_reg_irqpol(priv, pin, 0); ++ lsirq_gpio_set_reg_irqedg(priv, pin, 0); ++ break; ++ case IRQ_TYPE_LEVEL_HIGH: ++ lsirq_gpio_set_reg_irq(priv, pin, 1); ++ lsirq_gpio_set_reg_irqdul(priv, pin, 0); ++ lsirq_gpio_set_reg_irqpol(priv, pin, 1); ++ lsirq_gpio_set_reg_irqedg(priv, pin, 0); ++ break; ++ case IRQ_TYPE_NONE: ++ lsirq_gpio_set_reg_irq(priv, pin, 0); ++ break; ++ default: ++ return -EINVAL; ++ } ++ spin_lock_irqsave(&priv->lock, flags); ++ lsirq_gpio_set_reg_dir(priv, pin, 1); ++ spin_unlock_irqrestore(&priv->lock, flags); ++ ++ return 0; ++} ++ ++static void mthd_lsirq_gpio_irqack(struct irq_data *d) ++{ ++ ++} ++ ++static void mthd_lsirq_gpio_irqmask(struct irq_data *d) ++{ ++ lsirq_gpio_priv_t *priv = irq_data_get_irq_chip_data(d); ++ int vhwirq = d->hwirq; ++ int pin = __map_vhwirq_pin(priv, vhwirq); ++ unsigned long flags; ++ ++ // interrupt must gpio input ++ spin_lock_irqsave(&priv->lock, flags); ++ lsirq_gpio_set_reg_dir(priv, pin, 1); ++ spin_unlock_irqrestore(&priv->lock, flags); ++ ++ lsirq_gpio_set_reg_irq(priv, pin, 0); ++} ++ ++static void mthd_lsirq_gpio_irqunmask(struct irq_data *d) ++{ ++ lsirq_gpio_priv_t *priv = irq_data_get_irq_chip_data(d); ++ int vhwirq = d->hwirq; ++ int pin = __map_vhwirq_pin(priv, vhwirq); ++ ++ lsirq_gpio_set_reg_irq(priv, pin, 1); ++} ++ ++static int lsirq_gpio_gc_remove(lsirq_gpio_priv_t* priv) ++{ ++ struct gpio_chip* gc = &priv->gc; ++ ++ gpiochip_remove(gc); ++ ++ return 0; ++} ++ ++static int lsirq_gpio_gc_setup(lsirq_gpio_priv_t* priv) ++{ ++ struct gpio_chip* gc = &priv->gc; ++ struct device_node *np = priv->dev->of_node; ++ ++ of_property_read_u32(np, "ngpios", (u32 *)&gc->ngpio); ++ of_property_read_u32(np, "gpio_base", (u32 *)&gc->base); ++ gc->request = mthd_lsirq_gpio_request; ++ gc->direction_input = mthd_lsirq_gpio_direction_input; ++ gc->get = mthd_lsirq_gpio_get; ++ gc->direction_output = mthd_lsirq_gpio_direction_output; ++ gc->set = mthd_lsirq_gpio_set; ++ gc->to_irq = mthd_lsirq_gpio_to_irq; ++ gc->can_sleep = 0; ++ gc->fwnode = &np->fwnode; ++ gc->parent = priv->dev; ++ ++ if (devm_gpiochip_add_data(priv->dev, gc, priv)) ++ { ++ dev_err(priv->dev, "gpiochip setup fail\n"); ++ return -1; ++ } ++ ++ return 0; ++} ++ ++static int lsirqmap_fill(struct list_head* map, ++ struct device_node *np, void* parent) ++{ ++ int i = 0; ++ int irq, hwirq, pin_start, pin_num, nr_irqs; ++ struct irq_desc *desc; ++ lsirq_gpio_irqpinmap_t* m; ++ ++ nr_irqs = 0; ++ ++ INIT_LIST_HEAD(map); ++ for (i = 0; i < MAX_IRQNUM_PER_CHIP; i++) ++ { ++ irq = of_irq_get(np, i); ++ if (irq < 0) ++ break; ++ ++ desc = irq_to_desc(irq); ++ if (!desc) ++ break; ++ hwirq = desc->irq_data.hwirq; ++ ++ if (of_property_read_u32_index(np, "loongson,irqpin-group", ++ i*2, &pin_start)) ++ break; ++ if (of_property_read_u32_index(np, "loongson,irqpin-group", ++ i*2+1, &pin_num)) ++ break; ++ ++ m = kzalloc(sizeof(*m), GFP_KERNEL); ++ if (!m) ++ break; ++ ++ m->irq = irq; ++ m->hwirq = hwirq; ++ m->pin_start = pin_start; ++ m->pin_num = pin_num; ++ m->parent = parent; ++ ++ list_add_tail(&m->next, map); ++ ++ irq_set_chained_handler_and_data(irq, ++ irqfhd_lsirq_gpio_handler, m); ++ nr_irqs += pin_num; ++ } ++ return nr_irqs; ++} ++ ++static int lsirqmap_clear(struct list_head* map) ++{ ++ lsirq_gpio_irqpinmap_t* m; ++ ++ while (!list_empty(map)) { ++ m = list_entry(map->next, lsirq_gpio_irqpinmap_t, next); ++ list_del(&m->next); ++ kfree(m); ++ } ++ return 0; ++} ++ ++static int mthd_irq_domain_map(struct irq_domain *domain, ++ unsigned int irq, irq_hw_number_t hwirq) ++{ ++ lsirq_gpio_priv_t* priv = domain->host_data; ++ lsirq_gpio_irqdesc_t* irqd = &priv->irqd; ++ ++ irq_set_chip_data(irq, priv); ++ irq_set_chip_and_handler(irq, irqd->ic, handle_edge_irq); ++ irq_set_probe(irq); ++ ++ return 0; ++} ++ ++ ++static const struct irq_domain_ops domain_ops_gpic = { ++ .map = mthd_irq_domain_map, ++ .xlate = irq_domain_xlate_onetwocell, ++}; ++ ++static int lsirqd_setup(lsirq_gpio_priv_t* priv) ++{ ++ lsirq_gpio_irqdesc_t* irqd = &priv->irqd; ++ struct device_node *np = priv->dev->of_node; ++ ++ of_property_read_u32(np, "loongson,vhwirq-base", (u32 *)&irqd->vhwirq_base); ++ snprintf(irqd->name, sizeof(irqd->name), "GPIC-%s", np->name); ++ ++ /* ++ * Setup HWIRQ-PIN-MAP ++ * */ ++ irqd->nr_irqs = lsirqmap_fill(&irqd->ipm, np, priv); ++ if (irqd->nr_irqs <= 0) ++ { ++ dev_err(priv->dev, "IRQ Pin Map fail\n"); ++ goto err; ++ } ++ /* ++ * Setup VIRQ-IRQ-MAP ++ * Use IRQ DOMAIN and chip generic ++ * */ ++ // find valid ib ++ irqd->rirq_base = devm_irq_alloc_descs(priv->dev, -1, ++ 0, irqd->nr_irqs, numa_node_id()); ++ if (irqd->rirq_base < 0) { ++ dev_err(priv->dev, "Alloc IRQ fail\n"); ++ goto clear_pin_map; ++ } ++ // set ic prop ++ irqd->ic = kzalloc(sizeof(*irqd->ic), GFP_KERNEL); ++ if (!irqd->ic) ++ { ++ dev_err(priv->dev, "IRQ chip alloc fail\n"); ++ goto free_irq_desc; ++ } ++ irqd->ic->name = irqd->name; ++ irqd->ic->irq_ack = mthd_lsirq_gpio_irqack; ++ irqd->ic->irq_mask = mthd_lsirq_gpio_irqmask; ++ irqd->ic->irq_unmask = mthd_lsirq_gpio_irqunmask; ++ irqd->ic->irq_set_type = mthd_lsirq_gpio_irqsettype; ++ irqd->ic->flags = IRQCHIP_MASK_ON_SUSPEND; ++ // map ib&vb ++ irqd->domain = irq_domain_add_legacy(np, ++ irqd->nr_irqs, irqd->rirq_base, irqd->vhwirq_base, ++ &domain_ops_gpic, priv); ++ if (!irqd->domain) { ++ dev_err(priv->dev, "IRQ domain add fail\n"); ++ goto free_ic; ++ } ++ dev_info(priv->dev, "register irqnum=%d, vhwirq-base=%d, rirq-base=%d\n", ++ irqd->nr_irqs, irqd->vhwirq_base, irqd->rirq_base); ++ return 0; ++ ++free_ic: ++ kfree(irqd->ic); ++free_irq_desc: ++ irq_free_descs(irqd->rirq_base, irqd->nr_irqs); ++clear_pin_map: ++ lsirqmap_clear(&irqd->ipm); ++err: ++ return -1; ++} ++ ++static const struct of_device_id drvids_lsirq_gpio[] = { ++ { .compatible = "loongson,ls2p-gpio", .data = &generic_reg_table }, ++ { .compatible = "loongson,ls2k0300-gpio", .data = &generic_reg_table }, ++ { /* sentinel */ } ++}; ++MODULE_DEVICE_TABLE(of, drvids_lsirq_gpio); ++ ++static int drv_lsirq_gpio_probe(struct platform_device *pdev) ++{ ++ lsirq_gpio_priv_t* priv; ++ const struct of_device_id *of_id = ++ of_match_device(drvids_lsirq_gpio, &pdev->dev); ++ ++ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ priv->reg = devm_platform_ioremap_resource(pdev, 0); ++ if (IS_ERR(priv->reg)) ++ goto ioremap_fail; ++ spin_lock_init(&priv->lock); ++ priv->dev = &pdev->dev; ++ priv->regtable = of_id->data; ++ ++ if (lsirq_gpio_gc_setup(priv)) ++ goto gc_fail; ++ ++ if (lsirqd_setup(priv)) ++ goto irqd_fail; ++ ++ platform_set_drvdata(pdev, priv); ++ ++ return 0; ++ ++irqd_fail: ++ lsirq_gpio_gc_remove(priv); ++gc_fail: ++ devm_iounmap(&pdev->dev, priv->reg); ++ioremap_fail: ++ devm_kfree(&pdev->dev, priv); ++ return -1; ++} ++ ++static struct platform_driver lsirq_gpio_driver = { ++ .driver = { ++ .name = "gpio-lsirq", ++ .owner = THIS_MODULE, ++ .of_match_table = drvids_lsirq_gpio, ++ }, ++ .probe = drv_lsirq_gpio_probe, ++}; ++ ++static int __init lsirq_gpio_init(void) ++{ ++ return platform_driver_register(&lsirq_gpio_driver); ++} ++subsys_initcall(lsirq_gpio_init); ++ ++MODULE_AUTHOR("Yize Niu "); ++MODULE_DESCRIPTION("Loongson GPIO With IRQ Driver"); ++MODULE_LICENSE("GPL"); +\ No newline at end of file +-- +2.49.0 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0005-add-loongarch-i2c-lsfs.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0005-add-loongarch-i2c-lsfs.patch new file mode 100644 index 0000000000000000000000000000000000000000..cfe33c67b839106854202158d34eab55e94e9792 --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0005-add-loongarch-i2c-lsfs.patch @@ -0,0 +1,719 @@ +From f03e87c962b31740e3a0efbbe1d56a9e17dd3457 Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:09:39 +0800 +Subject: [PATCH 05/17] add loongarch i2c lsfs + +--- + drivers/i2c/busses/Kconfig | 7 + + drivers/i2c/busses/Makefile | 1 + + drivers/i2c/busses/i2c-lsfs.c | 668 ++++++++++++++++++++++++++++++++++ + 3 files changed, 676 insertions(+) + create mode 100644 drivers/i2c/busses/i2c-lsfs.c + +diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig +index 9b4369ce8..03ee479fe 100644 +--- a/drivers/i2c/busses/Kconfig ++++ b/drivers/i2c/busses/Kconfig +@@ -805,6 +805,13 @@ config I2C_LS2X + This driver can also be built as a module. If so, the module + will be called i2c-ls2x. + ++config I2C_LSFS ++ tristate "Loongson fast speed I2C adapter" ++ depends on MACH_LOONGSON64 ++ help ++ If you say yes to this option, support will be included for the ++ I2C interface on the Loongson's LS2K300. ++ + config I2C_MLXBF + tristate "Mellanox BlueField I2C controller" + depends on MELLANOX_PLATFORM && ARM64 +diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile +index f15e36462..3c722636f 100644 +--- a/drivers/i2c/busses/Makefile ++++ b/drivers/i2c/busses/Makefile +@@ -80,6 +80,7 @@ obj-$(CONFIG_I2C_JZ4780) += i2c-jz4780.o + obj-$(CONFIG_I2C_KEMPLD) += i2c-kempld.o + obj-$(CONFIG_I2C_LPC2K) += i2c-lpc2k.o + obj-$(CONFIG_I2C_LS2X) += i2c-ls2x.o ++obj-$(CONFIG_I2C_LSFS) += i2c-lsfs.o + obj-$(CONFIG_I2C_MESON) += i2c-meson.o + obj-$(CONFIG_I2C_MICROCHIP_CORE) += i2c-microchip-corei2c.o + obj-$(CONFIG_I2C_MPC) += i2c-mpc.o +diff --git a/drivers/i2c/busses/i2c-lsfs.c b/drivers/i2c/busses/i2c-lsfs.c +new file mode 100644 +index 000000000..1d86b572d +--- /dev/null ++++ b/drivers/i2c/busses/i2c-lsfs.c +@@ -0,0 +1,668 @@ ++/* ++ * LOONGSON fast speed I2C controller ++ * ++ * Copyright (C) 2024 Loongson Technology Corporation Limited ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++// #define I2C_LSFS_DEBUG ++ ++#ifdef I2C_LSFS_DEBUG ++#define i2c_lsfs_err dev_err ++#define i2c_lsfs_info dev_info ++#else ++#define i2c_lsfs_err(dev, fmt, ...) ++#define i2c_lsfs_info(dev, fmt, ...) ++#endif ++ ++/* Loongson I2C offset registers */ ++#define I2C_CR1 0x00 ++#define I2C_CR2 0x04 ++#define I2C_DR 0x10 ++#define I2C_SR1 0x14 ++#define I2C_SR2 0x18 ++#define I2C_CCR 0x1C ++#define I2C_TRISE 0x20 ++#define I2C_FLTR 0x24 ++ ++/* Loongson I2C control 1*/ ++#define I2C_CR1_SWRST BIT(15) ++#define I2C_CR1_RECOVER BIT(14) ++#define I2C_CR1_POS BIT(11) ++#define I2C_CR1_ACK BIT(10) ++#define I2C_CR1_STOP BIT(9) ++#define I2C_CR1_START BIT(8) ++#define I2C_CR1_PE BIT(0) ++ ++/* Loongson I2C control 2 */ ++#define I2C_CR2_FREQ_MASK GENMASK(5, 0) ++#define I2C_CR2_FREQ(n) ((n) & I2C_CR2_FREQ_MASK) ++#define I2C_CR2_ITBUFEN BIT(10) ++#define I2C_CR2_ITEVTEN BIT(9) ++#define I2C_CR2_ITERREN BIT(8) ++#define I2C_CR2_IRQ_MASK (I2C_CR2_ITBUFEN | \ ++ I2C_CR2_ITEVTEN | \ ++ I2C_CR2_ITERREN) ++ ++/* Loongson I2C Status 1 */ ++#define I2C_SR1_AF BIT(10) ++#define I2C_SR1_ARLO BIT(9) ++#define I2C_SR1_BERR BIT(8) ++#define I2C_SR1_TXE BIT(7) ++#define I2C_SR1_RXNE BIT(6) ++#define I2C_SR1_BTF BIT(2) ++#define I2C_SR1_ADDR BIT(1) ++#define I2C_SR1_SB BIT(0) ++#define I2C_SR1_ITEVTEN_MASK (I2C_SR1_BTF | \ ++ I2C_SR1_ADDR | \ ++ I2C_SR1_SB) ++#define I2C_SR1_ITBUFEN_MASK (I2C_SR1_TXE | \ ++ I2C_SR1_RXNE) ++#define I2C_SR1_ITERREN_MASK (I2C_SR1_AF | \ ++ I2C_SR1_ARLO | \ ++ I2C_SR1_BERR) ++ ++/* Loongson I2C Status 2 */ ++#define I2C_SR2_BUSY BIT(1) ++ ++/* Loongson I2C Control Clock */ ++#define I2C_CCR_FS BIT(15) ++#define I2C_CCR_DUTY BIT(14) ++ ++enum ls_i2c_speed { ++ LS_I2C_SPEED_STANDARD, /* 100 kHz */ ++ LS_I2C_SPEED_FAST, /* 400 kHz */ ++}; ++ ++/** ++ * struct priv_msg - client specific data ++ * @addr: 8-bit slave addr, including r/w bit ++ * @count: number of bytes to be transferred ++ * @buf: data buffer ++ * @stop: last I2C msg to be sent, i.e. STOP to be generated ++ * @result: result of the transfer ++ */ ++struct priv_msg { ++ u8 addr; ++ u32 count; ++ u8 *buf; ++ bool stop; ++ int result; ++}; ++ ++/** ++ * struct ls_i2c_dev - private data of the controller ++ * @adap: I2C adapter for this controller ++ * @dev: device for this controller ++ * @base: virtual memory area ++ * @complete: completion of I2C message ++ * @speed: Standard or Fast are supported ++ * @msg: I2C transfer information ++ * @freq: I2C controller input clock freq ++ */ ++struct ls_i2c_dev { ++ struct i2c_adapter adap; ++ struct device *dev; ++ void __iomem *base; ++ struct completion complete; ++ int speed; ++ struct priv_msg msg; ++ int freq; ++}; ++ ++static inline void i2c_set_bits(void __iomem *reg, u32 mask) ++{ ++ writel(readl(reg) | mask, reg); ++} ++ ++static inline void i2c_clr_bits(void __iomem *reg, u32 mask) ++{ ++ writel(readl(reg) & ~mask, reg); ++} ++ ++static void ls_i2c_disable_irq(struct ls_i2c_dev *i2c_dev) ++{ ++ void __iomem *reg = i2c_dev->base + I2C_CR2; ++ ++ i2c_clr_bits(reg, I2C_CR2_IRQ_MASK); ++} ++ ++#define INPUT_DEFAULT_CLK 200000000 ++ ++static int ls_i2c_hw_config(struct ls_i2c_dev *i2c_dev) ++{ ++ u32 val; ++ u32 ccr = 0; ++ ++ /* reference clock determination the cnfigure val(0x3f) */ ++ i2c_set_bits(i2c_dev->base + I2C_CR2, 0x3f); ++ i2c_set_bits(i2c_dev->base + I2C_TRISE, 0x3f); ++ ++ if (i2c_dev->speed == LS_I2C_SPEED_STANDARD) ++ val = DIV_ROUND_UP(i2c_dev->freq, 100000 * 2); ++ else { ++ val = DIV_ROUND_UP(i2c_dev->freq, 400000 * 3); ++ ++ /* Select Fast mode */ ++ ccr |= I2C_CCR_FS; ++ } ++ ccr |= val & 0xfff; ++ writel(ccr, i2c_dev->base + I2C_CCR); ++ ++ /* Enable I2C */ ++ writel(I2C_CR1_PE, i2c_dev->base + I2C_CR1); ++ ++ return 0; ++} ++ ++static int ls_i2c_wait_free_bus(struct ls_i2c_dev *i2c_dev) ++{ ++ u32 status; ++ int ret; ++ ++ ret = readl_poll_timeout(i2c_dev->base + I2C_SR2, ++ status, ++ !(status & I2C_SR2_BUSY), ++ 10, 2000); ++ if (ret) { ++ dev_dbg(i2c_dev->dev, "bus not free\n"); ++ ret = -EBUSY; ++ } ++ ++ return ret; ++} ++ ++static int i2c_wait_EV_signal(struct ls_i2c_dev *i2c_dev, int reg, int mask, int target) ++{ ++ u32 status; ++ int ret; ++ ++ ret = readl_poll_timeout(i2c_dev->base + reg, ++ status, ++ (!!(status & mask) == target), ++ 20, 1000); ++ if (ret) { ++ dev_dbg(i2c_dev->dev, "wait timeout\n"); ++ ret = -EBUSY; ++ } ++ ++ return ret; ++} ++ ++// i2c_wait_EV_signal 返回非 0 时所在对应函数返回 I2C_XFER_TIMEOUT_ERROR ++#define i2c_wait_EV_signal_t(dev, reg_offset, mask, target) if (i2c_wait_EV_signal(dev, reg_offset, mask, target)) { return -EBUSY;} ++ ++/* ++ * @brief: i2c bus 状态机复位 ++ * @param: i2c_dev: struct ls_i2c_dev ++ */ ++static void i2c_bus_error_reset_end_of_xfer(struct ls_i2c_dev *i2c_dev) ++{ ++ unsigned char* base; ++ unsigned int temp; ++ unsigned int temp_SR1; ++ unsigned int temp_CR1_mask; ++ ++ base = i2c_dev->base; ++ ++ temp_SR1 = readl((base + I2C_SR1)); ++ if (temp_SR1 & I2C_SR1_BERR) ++ temp_CR1_mask = I2C_CR1_RECOVER; ++ ++ // 状态机复位 ++ temp = readl((base + I2C_CR1)); ++ temp |= (I2C_CR1_SWRST | temp_CR1_mask); ++ writel(temp, (base + I2C_CR1)); ++ ++ // 错误复位 ++ temp = readl((base + I2C_SR1)); ++ temp |= (0xf << 8); ++ temp ^= (0xf << 8); ++ writel(temp, (base + I2C_SR1)); ++ temp = readl((base + I2C_SR1)); ++ ++ temp = readl((base + I2C_CR1)); ++ temp |= (I2C_CR1_SWRST | temp_CR1_mask); ++ temp ^= (I2C_CR1_SWRST | temp_CR1_mask); ++ writel(temp, (base + I2C_CR1)); ++} ++ ++/* ++ * @brief: i2c主模式,接收状态结束时的设置 ++ * @param: base: i2c控制器基地址 ++ * @param: stop: 是否发送关闭i2c总线信号 ++ */ ++static inline void i2c_setup_CR1_end_read(unsigned char *base, uint8_t stop) ++{ ++ unsigned int temp; ++ ++ temp = readl((base + I2C_CR1)); ++ temp |= (I2C_CR1_ACK | I2C_CR1_POS); ++ temp ^= (I2C_CR1_ACK | I2C_CR1_POS); ++ temp |= (stop << 9); ++ ++ writel(temp, (base + I2C_CR1)); ++} ++ ++/* ++ * @brief: i2c主模式接收状态,读取i2c DR 寄存器,放到msg的data里面 ++ * @param: base: i2c控制器基地址 ++ * @param: msg: i2c读取描述(i2c_msg)实例指针 ++ * @param: i: 当前读取数据所在data数组的下标 ++ */ ++static inline void i2c_update_read_msg_data(unsigned char *base, struct i2c_msg *msg, int i) ++{ ++ msg->buf[i] = ((readl(base + I2C_DR)) & 0xff); ++} ++ ++/* ++ * @brief: i2c主模式接收状态,当只读取1个字节时的操作函数(从地址发送后的操作) ++ * @param: i2c_dev: ls_i2c_dev ++ * @param: msg: i2c读取描述(i2c_msg)实例指针 ++ * @return: 0代表操作成功,否则操作失败 ++ */ ++static int i2c_xfer_r_1(struct ls_i2c_dev *i2c_dev, struct i2c_msg *msg, int is_stop) ++{ ++ unsigned char* base; ++ base = i2c_dev->base; ++ ++ i2c_setup_CR1_end_read(base, is_stop); ++ i2c_wait_EV_signal_t(i2c_dev, I2C_SR1, I2C_SR1_RXNE, 1); ++ i2c_update_read_msg_data(base, msg, 0); ++ return 0; ++} ++ ++/* ++ * @brief: i2c主模式接收状态,当只读取2个字节时的操作函数(从地址发送后的操作) ++ * @param: i2c_dev: ls_i2c_dev ++ * @param: msg: i2c读取描述(i2c_msg)实例指针 ++ * @return: 0代表操作成功,否则操作失败 ++ */ ++static int i2c_xfer_r_2(struct ls_i2c_dev *i2c_dev, struct i2c_msg *msg, int is_stop) ++{ ++ unsigned char* base; ++ base = i2c_dev->base; ++ ++ i2c_wait_EV_signal_t(i2c_dev, I2C_SR1, I2C_SR1_RXNE, 1); ++ i2c_update_read_msg_data(base, msg, 0); ++ i2c_setup_CR1_end_read(base, is_stop); ++ i2c_wait_EV_signal_t(i2c_dev, I2C_SR1, I2C_SR1_RXNE, 1); ++ i2c_update_read_msg_data(base, msg, 1); ++ return 0; ++} ++ ++/* ++ * @brief: i2c主模式接收状态,当读取大于等于3个字节时的操作函数(从地址发送后的操作) ++ * @param: i2c_dev: ls_i2c_dev ++ * @param: msg: i2c读取描述(i2c_msg)实例指针 ++ * @return: 0代表操作成功,否则操作失败 ++ */ ++static int i2c_xfer_r_3m(struct ls_i2c_dev *i2c_dev, struct i2c_msg *msg, int is_stop) ++{ ++ unsigned char* base; ++ int i; ++ int remain_read; ++ ++ base = i2c_dev->base; ++ ++ i = 0; ++ remain_read = msg->len; ++ while (1) { ++ if (remain_read <= 3) ++ break; ++ ++ // 倒数3个字节之前,看 I2C_SR1_RXNE 信号即可,有就读取DR ++ i2c_wait_EV_signal_t(i2c_dev, I2C_SR1, I2C_SR1_RXNE, 1); ++ i2c_update_read_msg_data(base, msg, i++); ++ --remain_read; ++ } ++ // 见2k300手册 主接收模式(非及时、3 字节)示意图 ++ i2c_wait_EV_signal_t(i2c_dev, I2C_SR1, I2C_SR1_BTF, 1); // 倒数3个字节,I2C_SR1_BTF信号为1时,代表已经接收了两个字节 ++ i2c_update_read_msg_data(base, msg, i++); // 读取DR,此时倒数第二个字节开始从移位寄存器到DR ++ i2c_setup_CR1_end_read(base, is_stop); // 下一个字节(也就是最后一个字节)之后需要发送 NACK 和 stop 命令了 ++ i2c_wait_EV_signal_t(i2c_dev, I2C_SR1, I2C_SR1_BTF, 1); // 这时已经最后一个字节到来 ++ i2c_update_read_msg_data(base, msg, i++); // 这次读取之后,等待移位寄存器填充DR ++ i2c_wait_EV_signal_t(i2c_dev, I2C_SR1, I2C_SR1_RXNE, 1); // 没有字节传输动作,但是移位寄存器已经把最后一个字节填充到DR ++ i2c_update_read_msg_data(base, msg, i++); // 读取DR ++ return 0; ++} ++ ++/* ++ * @brief: i2c主模式读取数据处理函数 ++ * @param: i2c_dev: ls_i2c_dev ++ * @param: msg: i2c读取描述(i2c_msg)实例指针 ++ * @return: 0代表操作成功,否则操作失败 ++ */ ++static int i2c_xfer_r(struct ls_i2c_dev *i2c_dev, struct i2c_msg *msg, int is_stop) ++{ ++ unsigned char* base; ++ unsigned int temp; ++ unsigned char xfer_data; ++ int ret; ++ ++ base = i2c_dev->base; ++ ++ // START信号发送开始命令,ACK则会在接收到数据后发送ACK命令 ++ temp = readl((base + I2C_CR1)); ++ temp |= I2C_CR1_START; ++ temp |= I2C_CR1_ACK; ++ writel(temp, (base + I2C_CR1)); ++ ++ ret = i2c_wait_EV_signal(i2c_dev, I2C_SR1, I2C_SR1_SB, 1); ++ if (ret) { ++ i2c_lsfs_err(i2c_dev->dev, "i2c read SR1_SB error(%d) addr 0x%.2x\n", ret, msg->addr); ++ goto i2c_xfer_r_end; ++ } ++ ++ // 把7bit地址左移一位,然后最后1bit设置为1,代表此从地址用于读取 ++ xfer_data = msg->addr; ++ xfer_data <<= 1; ++ xfer_data |= 1; // bit 0 == 1 read ++ writeb(xfer_data, (base + I2C_DR)); ++ ++ ret = i2c_wait_EV_signal(i2c_dev, I2C_SR1, I2C_SR1_ADDR, 1); ++ if (ret) { ++ i2c_lsfs_err(i2c_dev->dev, "i2c read SR1_ADDR error(%d) addr 0x%.2x\n", ret, msg->addr); ++ goto i2c_xfer_r_end; ++ } ++ ++ temp = readl((base + I2C_SR2)); ++ ++ // 针对不同的需要读取的字节数,调用不同的处理函数 ++ if (msg->len == 1) // read 1 byte ++ ret = i2c_xfer_r_1(i2c_dev, msg, is_stop); ++ else if (msg->len == 2) // read 2 byte ++ ret = i2c_xfer_r_2(i2c_dev, msg, is_stop); ++ else if (msg->len > 3) // read 3 or more than 3 byte ++ ret = i2c_xfer_r_3m(i2c_dev, msg, is_stop); ++ ++ if (ret) { ++ i2c_lsfs_err(i2c_dev->dev, "i2c read xfer data error(%d) addr 0x%.2x\n", ret, msg->addr); ++ goto i2c_xfer_r_end; ++ } ++ ++i2c_xfer_r_end: ++ ++ if (ret) ++ i2c_bus_error_reset_end_of_xfer(i2c_dev); ++ else { ++ // 如果需要关闭总线,等待busy信号为0,代表总线总体已经空闲 ++ if (is_stop) ++ i2c_wait_EV_signal_t(i2c_dev, I2C_SR2, I2C_SR2_BUSY, 0); ++ } ++ ++ return ret; ++} ++ ++/* ++ * @brief: i2c主模式写入数据处理函数 ++ * @param: i2c_dev: ls_i2c_dev ++ * @param: msg: i2c写入描述(i2c_msg)实例指针 ++ * @return: 0代表操作成功,否则操作失败 ++ */ ++static int i2c_xfer_w(struct ls_i2c_dev *i2c_dev, struct i2c_msg *msg, int is_stop) ++{ ++ unsigned char* base; ++ unsigned int temp; ++ int i; ++ unsigned char xfer_data; ++ int ret; ++ ++ base = i2c_dev->base; ++ ++ // START信号发送开始命令,ACK则会在接收到数据后发送ACK命令 ++ temp = readl((base + I2C_CR1)); ++ temp |= I2C_CR1_START; ++ writel(temp, (base + I2C_CR1)); ++ ++ ret = i2c_wait_EV_signal(i2c_dev, I2C_SR1, I2C_SR1_SB, 1); ++ if (ret) { ++ i2c_lsfs_err(i2c_dev->dev, "i2c write SR1_SB error(%d) addr 0x%.2x\n", ret, msg->addr); ++ goto i2c_xfer_w_end; ++ } ++ ++ // 把7bit地址左移一位,然后最后1bit设置为1,代表此从地址用于读取 ++ xfer_data = msg->addr; ++ xfer_data <<= 1; // bit 0 == 0 write ++ writeb(xfer_data, (base + I2C_DR)); ++ ++ ret = i2c_wait_EV_signal(i2c_dev, I2C_SR1, I2C_SR1_ADDR, 1); ++ if (ret) { ++ i2c_lsfs_err(i2c_dev->dev, "i2c write SR1_ADDR error(%d) addr 0x%.2x\n", ret, msg->addr); ++ goto i2c_xfer_w_end; ++ } ++ ++ temp = readl((base + I2C_SR2)); ++ ++ // 等待发送数据寄存器为空 ++ ret = i2c_wait_EV_signal(i2c_dev, I2C_SR1, I2C_SR1_TXE, 1); ++ if (ret) { ++ i2c_lsfs_err(i2c_dev->dev, "i2c write SR1_TXE error(%d) addr 0x%.2x\n", ret, msg->addr); ++ goto i2c_xfer_w_end; ++ } ++ ++ i = 0; ++ while (1) { ++ if (i == msg->len) ++ break; ++ ++ xfer_data = msg->buf[i]; ++ ++i; ++ writeb(xfer_data, (base + I2C_DR)); ++ ++ // 等待传送结束 ++ ret = i2c_wait_EV_signal(i2c_dev, I2C_SR1, I2C_SR1_BTF, 1); ++ if (ret) { ++ i2c_lsfs_err(i2c_dev->dev, "i2c write SR1_BTF error(%d) addr 0x%.2x\n", ret, msg->addr); ++ goto i2c_xfer_w_end; ++ } ++ } ++ ++i2c_xfer_w_end: ++ if (ret) ++ i2c_bus_error_reset_end_of_xfer(i2c_dev); ++ else { ++ if (is_stop) { ++ // 关闭总线 ++ temp = readl((base + I2C_CR1)); ++ temp |= (I2C_CR1_STOP); ++ writel(temp, (base + I2C_CR1)); ++ // 等待busy信号为0,代表总线总体已经空闲 ++ i2c_wait_EV_signal_t(i2c_dev, I2C_SR2, I2C_SR2_BUSY, 0); ++ } ++ } ++ ++ return ret; ++} ++ ++/** ++ * ls_i2c_xfer() - Transfer combined I2C message ++ * @i2c_adap: Adapter pointer to the controller ++ * @msgs: Pointer to data to be written. ++ * @num: Number of messages to be executed ++ */ ++static int ls_i2c_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], int num) ++{ ++ struct ls_i2c_dev *i2c_dev = i2c_get_adapdata(i2c_adap); ++ int ret = 0; ++ struct i2c_msg* cur_msg; ++ int i; ++ int stop; ++ ++ ret = ls_i2c_wait_free_bus(i2c_dev); ++ if (ret) { ++ i2c_lsfs_err(i2c_dev->dev, "i2c buf free error(%d)\n", ret); ++ return ret; ++ } ++ ++ for (i = 0; i < num; i++) { ++ cur_msg = msgs + i; ++ stop = (i == (num - 1)); ++ if (cur_msg->flags & I2C_M_RD) ++ ret += i2c_xfer_r(i2c_dev, cur_msg, stop); ++ else ++ ret += i2c_xfer_w(i2c_dev, cur_msg, stop); ++ ++ if (ret) { ++ i2c_lsfs_err(i2c_dev->dev, "i2c %s error(%d)\n", (cur_msg->flags & I2C_M_RD) ? "read" : "write", ret); // maybe is null ++ } ++ } ++ ++ return (ret < 0) ? ret : num; ++} ++ ++static u32 ls_i2c_func(struct i2c_adapter *adap) ++{ ++ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; ++} ++ ++static const struct i2c_algorithm ls_i2c_algo = { ++ .master_xfer = ls_i2c_xfer, ++ .functionality = ls_i2c_func, ++}; ++ ++static void ls_i2c_bus_clock_probe(struct ls_i2c_dev *i2c_dev) ++{ ++ int ret; ++ struct clk* clk; ++ int of_clk_freq; ++ ++ i2c_dev->freq = INPUT_DEFAULT_CLK; ++ ret = 1; ++ clk = devm_clk_get_optional_enabled(i2c_dev->dev, NULL); ++ if (clk) { ++ ret = devm_clk_rate_exclusive_get(i2c_dev->dev, clk); ++ if (!ret) ++ i2c_dev->freq = clk_get_rate(clk); ++ } else { ++ if (!of_property_read_u32(i2c_dev->dev->of_node, "clock-frequency", &of_clk_freq)) { ++ ret = 0; ++ i2c_dev->freq = of_clk_freq; ++ } ++ } ++ ++ if (ret) ++ pr_info("%s warning: use default clk freq %d\n", __func__, INPUT_DEFAULT_CLK); ++} ++ ++static int ls_i2c_probe(struct platform_device *pdev) ++{ ++ struct device_node *np = pdev->dev.of_node; ++ struct ls_i2c_dev *i2c_dev; ++ struct resource *res; ++ u32 clk_rate; ++ struct i2c_adapter *adap; ++ int ret; ++ int name_buffer_len; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res) { ++ dev_err(&pdev->dev, "no mem resource?\n"); ++ return -ENODEV; ++ } ++ ++ i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); ++ if (!i2c_dev) ++ return -ENOMEM; ++ ++ i2c_dev->base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(i2c_dev->base)) { ++ ret = PTR_ERR(i2c_dev->base); ++ goto free_i2c_mem; ++ } ++ ++ i2c_dev->speed = LS_I2C_SPEED_STANDARD; ++ ret = of_property_read_u32(np, "i2c-speed", &clk_rate); ++ if (!ret && clk_rate >= 400000) ++ i2c_dev->speed = LS_I2C_SPEED_FAST; ++ ++ init_completion(&i2c_dev->complete); ++ ++ i2c_dev->dev = &pdev->dev; ++ ++ ls_i2c_bus_clock_probe(i2c_dev); ++ ls_i2c_hw_config(i2c_dev); ++ ls_i2c_disable_irq(i2c_dev); // 不需要中断 轮询等待 ++ ++ adap = &i2c_dev->adap; ++ i2c_set_adapdata(adap, i2c_dev); ++ adap->nr = pdev->id; ++ name_buffer_len = strlen(pdev->name); ++ name_buffer_len = (name_buffer_len >= sizeof(adap->name)) ? sizeof(adap->name) - 1 : name_buffer_len; ++ memset(adap->name, 0, name_buffer_len + 1); ++ strncpy(adap->name, pdev->name, name_buffer_len); ++ adap->name[name_buffer_len] = 0; ++ adap->owner = THIS_MODULE; ++ adap->retries = 5; ++ adap->algo = &ls_i2c_algo; ++ adap->dev.parent = &pdev->dev; ++ adap->dev.of_node = pdev->dev.of_node; ++ adap->timeout = 2 * HZ; ++ ++ ret = i2c_add_adapter(adap); ++ if (ret) { ++ dev_err(&pdev->dev, "failure adding adapter\n"); ++ goto free_i2c_ioremap; ++ } ++ ++ platform_set_drvdata(pdev, i2c_dev); ++ ++ return 0; ++ ++free_i2c_ioremap: ++ devm_iounmap(&pdev->dev, i2c_dev->base); ++free_i2c_mem: ++ kfree(i2c_dev); ++ ++ return ret; ++} ++ ++static int ls_i2c_remove(struct platform_device *pdev) ++{ ++ struct ls_i2c_dev *i2c_dev = platform_get_drvdata(pdev); ++ ++ platform_set_drvdata(pdev, NULL); ++ i2c_del_adapter(&i2c_dev->adap); ++ iounmap(i2c_dev->base); ++ kfree(i2c_dev); ++ ++ return 0; ++} ++ ++static const struct of_device_id ls_i2c_match[] = { ++ {.compatible = "loongson,lsfs-i2c"}, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, ls_i2c_match); ++ ++static struct platform_driver ls_i2c_driver = { ++ .driver = { ++ .name = "lsfs-i2c", ++ .of_match_table = ls_i2c_match, ++ }, ++ .probe = ls_i2c_probe, ++ .remove = ls_i2c_remove, ++}; ++ ++module_platform_driver(ls_i2c_driver); ++ ++MODULE_AUTHOR("Loongson Technology Corporation Limited"); ++MODULE_DESCRIPTION("Loongson fast speed I2C bus adapter"); ++MODULE_LICENSE("GPL"); +-- +2.49.0 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0006-add-loongson-ls2k0300-adc-support.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0006-add-loongson-ls2k0300-adc-support.patch new file mode 100644 index 0000000000000000000000000000000000000000..e87303cb698993e40fc69e1606abad18bb3bc4f8 --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0006-add-loongson-ls2k0300-adc-support.patch @@ -0,0 +1,988 @@ +From 7e6bed4ab64aa5746c06e6f3c81ce6f8237c4320 Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:10:38 +0800 +Subject: [PATCH 06/17] add loongson ls2k0300 adc support + +--- + drivers/iio/adc/Kconfig | 6 + + drivers/iio/adc/Makefile | 1 + + drivers/iio/adc/loongson-2k300-adc-core.c | 291 ++++++++++++++ + drivers/iio/adc/loongson-2k300-adc-core.h | 449 ++++++++++++++++++++++ + drivers/iio/adc/loongson-2k300-adc.c | 187 +++++++++ + 5 files changed, 934 insertions(+) + create mode 100644 drivers/iio/adc/loongson-2k300-adc-core.c + create mode 100644 drivers/iio/adc/loongson-2k300-adc-core.h + create mode 100644 drivers/iio/adc/loongson-2k300-adc.c + +diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig +index 517b3db11..558039413 100644 +--- a/drivers/iio/adc/Kconfig ++++ b/drivers/iio/adc/Kconfig +@@ -1441,4 +1441,10 @@ config XILINX_AMS + The driver can also be built as a module. If so, the module will be called + xilinx-ams. + ++config LS_2K300_ADC ++ tristate "ls2k300 driver" ++ select IIO_BUFFER ++ select IIO_TRIGGERED_BUFFER ++ help ++ loongson 2k300 ADC driver + endmenu +diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile +index 2facf9793..ee6e7092a 100644 +--- a/drivers/iio/adc/Makefile ++++ b/drivers/iio/adc/Makefile +@@ -129,3 +129,4 @@ xilinx-xadc-y := xilinx-xadc-core.o xilinx-xadc-events.o + obj-$(CONFIG_XILINX_XADC) += xilinx-xadc.o + obj-$(CONFIG_XILINX_AMS) += xilinx-ams.o + obj-$(CONFIG_SD_ADC_MODULATOR) += sd_adc_modulator.o ++obj-$(CONFIG_LS_2K300_ADC) += loongson-2k300-adc.o loongson-2k300-adc-core.o +diff --git a/drivers/iio/adc/loongson-2k300-adc-core.c b/drivers/iio/adc/loongson-2k300-adc-core.c +new file mode 100644 +index 000000000..9e9e089f5 +--- /dev/null ++++ b/drivers/iio/adc/loongson-2k300-adc-core.c +@@ -0,0 +1,291 @@ ++#include ++#include ++#include "loongson-2k300-adc-core.h" ++ ++#define ADC_DATA_MASK 0x0FFF ++ ++/******************************************************************************* ++* Function Name : adc_init ++* Description : Initializes the ADCx peripheral according to the specified parameters ++* in the ADC_InitStruct. ++* Input : - ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. ++* - ADC_InitStruct: pointer to an adc_init_info structure that ++* contains the configuration information for the specified ++* ADC peripheral. ++* Output : None ++* Return : None ++******************************************************************************/ ++void adc_init(adc_reg_map* ADCx, adc_init_info* ADC_InitStruct) ++{ ++ unsigned int temp_val_1 = 0; ++ unsigned int temp_val_2 = 0; ++ ++ /*---------------------------- ADCx CR1 Configuration -----------------*/ ++ /* Get the ADCx CR1 value */ ++ temp_val_1 = ADCx->CR1; ++ /* Clear DUALMOD and SCAN bits */ ++ temp_val_1 &= CR1_CLEAR_MASK; ++ /* Configure ADCx: Dual mode and scan conversion mode */ ++ /* Set DUALMOD bits according to ADC_Mode value */ ++ /* Set SCAN bit according to ADC_ScanConvMode value */ ++ temp_val_1 |= (unsigned int)(ADC_InitStruct->ADC_Mode | ((unsigned int)ADC_InitStruct->ADC_ScanConvMode << 8) | ++ ((unsigned int)((ADC_InitStruct->ADC_ClkDivider)&0x3f) << 24) | ++ ((unsigned int)ADC_InitStruct->ADC_DiffMod << 20) | ++ ((unsigned int)ADC_InitStruct->ADC_OutPhaseSel << 30)); //yg ++ temp_val_1 |= 1 << CR1_EOC_IE_OFFSET; ++ temp_val_1 ^= 1 << CR1_EOC_IE_OFFSET; ++ temp_val_1 |= ADC_InitStruct->ADC_Int_EOC << CR1_EOC_IE_OFFSET; ++ temp_val_1 |= 1 << CR1_J_EOC_IE_OFFSET; ++ temp_val_1 ^= 1 << CR1_J_EOC_IE_OFFSET; ++ temp_val_1 |= ADC_InitStruct->ADC_Int_JEOC << CR1_J_EOC_IE_OFFSET; ++ /* Write to ADCx CR1 */ ++ ADCx->CR1 = temp_val_1; ++ ++ /*---------------------------- ADCx CR2 Configuration -----------------*/ ++ /* Get the ADCx CR2 value */ ++ temp_val_1 = ADCx->CR2; ++ /* Clear CONT, ALIGN and EXTSEL bits */ ++ temp_val_1 &= CR2_CLEAR_MASK; ++ /* Configure ADCx: external trigger event and continuous conversion mode */ ++ /* Set ALIGN bit according to ADC_DataAlign value */ ++ /* Set EXTSEL bits according to ADC_ExternalTrigConv value */ ++ /* Set CONT bit according to ADC_ContinuousConvMode value */ ++ temp_val_1 |= (unsigned int)(ADC_InitStruct->ADC_DataAlign | ADC_InitStruct->ADC_ExternalTrigConv | ++ ((unsigned int)ADC_InitStruct->ADC_ContinuousConvMode << 1) | ++ ((unsigned int)ADC_InitStruct->ADC_JTrigMod << 24) | //yg ++ ((unsigned int)(((ADC_InitStruct->ADC_ClkDivider)>>6)&0xf) << 26) | ++ ((unsigned int)ADC_InitStruct->ADC_ADCEdge << 30) | ++ ((unsigned int)ADC_InitStruct->ADC_ClkMask << 31)) ; //yg ++ /* Write to ADCx CR2 */ ++ ADCx->CR2 = temp_val_1; ++ ++ /*---------------------------- ADCx SQR1 Configuration -----------------*/ ++ /* Get the ADCx SQR1 value */ ++ temp_val_1 = ADCx->SQR1; ++ /* Clear L bits */ ++ temp_val_1 &= SQR1_CLEAR_MASK; ++ /* Configure ADCx: regular channel sequence length */ ++ /* Set L bits according to ADC_NbrOfChannel value */ ++ temp_val_2 |= (ADC_InitStruct->ADC_NbrOfChannel - 1); ++ temp_val_1 |= ((unsigned int)temp_val_2 << 20); ++ /* Write to ADCx SQR1 */ ++ ADCx->SQR1 = temp_val_1; ++} ++ ++/******************************************************************************* ++* Function Name : adc_struct_init ++* Description : Fills each ADC_InitStruct member with its default value. ++* Input : ADC_InitStruct : pointer to an adc_init_info structure ++* which will be initialized. ++* Output : None ++* Return : None ++*******************************************************************************/ ++void adc_struct_init(adc_init_info* ADC_InitStruct) ++{ ++ /* Reset ADC init structure parameters values */ ++ /* Initialize the ADC_Mode member */ ++ ADC_InitStruct->ADC_Mode = ADC_Mode_Independent; ++ /* initialize the ADC_ScanConvMode member */ ++ ADC_InitStruct->ADC_ScanConvMode = DISABLE; ++ /* Initialize the ADC_ContinuousConvMode member */ ++ ADC_InitStruct->ADC_ContinuousConvMode = DISABLE; ++ /* Initialize the ADC_ExternalTrigConv member */ ++ ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; ++ /* Initialize the ADC_DataAlign member */ ++ ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right; ++ /* Initialize the ADC_NbrOfChannel member */ ++ ADC_InitStruct->ADC_NbrOfChannel = 1; ++ /* Initialize the ADC_ClkDivider member */ ++ ADC_InitStruct->ADC_ClkDivider = 0xff; ++ /* Initialize the ADC_JTrigMod member */ ++ ADC_InitStruct->ADC_JTrigMod = 0; ++ /* Initialize the ADC_ADCEdge member */ ++ ADC_InitStruct->ADC_ADCEdge = 0; ++ /* Initialize the ADC_DIFFMOD member */ ++ ADC_InitStruct->ADC_DiffMod = 0; ++ /* Initialize the ADC_OutPhaseSel member */ ++ ADC_InitStruct->ADC_OutPhaseSel = 0; ++ /* Initialize the ADC_ClkMask member */ ++ ADC_InitStruct->ADC_ClkMask = 0; ++ /* Initialize CR1 EOC disable */ ++ ADC_InitStruct->ADC_Int_EOC = DISABLE; ++ /* Initialize CR1 EOC disable */ ++ ADC_InitStruct->ADC_Int_JEOC = DISABLE; ++} ++ ++void ADC_RegularChannelConfig(adc_reg_map* ADCx, unsigned char ADC_Channel, unsigned char Rank, unsigned char ADC_SampleTime) ++{ ++ unsigned int temp_val_1 = 0, temp_val_2 = 0; ++ ++ /* if ADC_Channel_10 ... ADC_Channel_17 is selected */ ++ if (ADC_Channel > ADC_Channel_9) { ++ /* Get the old register value */ ++ temp_val_1 = ADCx->SMPR1; ++ /* Calculate the mask to clear */ ++ temp_val_2 = SMPR1_SMP_MASK << (3 * (ADC_Channel - 10)); ++ /* Clear the old discontinuous mode channel count */ ++ temp_val_1 &= ~temp_val_2; ++ /* Calculate the mask to set */ ++ temp_val_2 = (unsigned int)ADC_SampleTime << (3 * (ADC_Channel - 10)); ++ /* Set the discontinuous mode channel count */ ++ temp_val_1 |= temp_val_2; ++ /* Store the new register value */ ++ ADCx->SMPR1 = temp_val_1; ++ } else { /* ADC_Channel include in ADC_Channel_[0..9] */ ++ /* Get the old register value */ ++ temp_val_1 = ADCx->SMPR2; ++ /* Calculate the mask to clear */ ++ temp_val_2 = SMPR2_SMP_MASK << (3 * ADC_Channel); ++ /* Clear the old discontinuous mode channel count */ ++ temp_val_1 &= ~temp_val_2; ++ /* Calculate the mask to set */ ++ temp_val_2 = (unsigned int)ADC_SampleTime << (3 * ADC_Channel); ++ /* Set the discontinuous mode channel count */ ++ temp_val_1 |= temp_val_2; ++ /* Store the new register value */ ++ ADCx->SMPR2 = temp_val_1; ++ } ++ /* For Rank 1 to 6 */ ++ if (Rank < 7) { ++ /* Get the old register value */ ++ temp_val_1 = ADCx->SQR3; ++ /* Calculate the mask to clear */ ++ temp_val_2 = SQR3_SQ_MASK << (5 * (Rank - 1)); ++ /* Clear the old SQx bits for the selected rank */ ++ temp_val_1 &= ~temp_val_2; ++ /* Calculate the mask to set */ ++ temp_val_2 = (unsigned int)ADC_Channel << (5 * (Rank - 1)); ++ /* Set the SQx bits for the selected rank */ ++ temp_val_1 |= temp_val_2; ++ /* Store the new register value */ ++ ADCx->SQR3 = temp_val_1; ++ } else if (Rank < 13) { /* For Rank 7 to 12 */ ++ /* Get the old register value */ ++ temp_val_1 = ADCx->SQR2; ++ /* Calculate the mask to clear */ ++ temp_val_2 = SQR2_SQ_MASK << (5 * (Rank - 7)); ++ /* Clear the old SQx bits for the selected rank */ ++ temp_val_1 &= ~temp_val_2; ++ /* Calculate the mask to set */ ++ temp_val_2 = (unsigned int)ADC_Channel << (5 * (Rank - 7)); ++ /* Set the SQx bits for the selected rank */ ++ temp_val_1 |= temp_val_2; ++ /* Store the new register value */ ++ ADCx->SQR2 = temp_val_1; ++ } else { /* For Rank 13 to 16 */ ++ /* Get the old register value */ ++ temp_val_1 = ADCx->SQR1; ++ /* Calculate the mask to clear */ ++ temp_val_2 = SQR1_SQ_MASK << (5 * (Rank - 13)); ++ /* Clear the old SQx bits for the selected rank */ ++ temp_val_1 &= ~temp_val_2; ++ /* Calculate the mask to set */ ++ temp_val_2 = (unsigned int)ADC_Channel << (5 * (Rank - 13)); ++ /* Set the SQx bits for the selected rank */ ++ temp_val_1 |= temp_val_2; ++ /* Store the new register value */ ++ ADCx->SQR1 = temp_val_1; ++ } ++} ++ ++/******************************************************************************* ++* Function Name : adc_dev_enable ++* Description : Enables or disables the specified ADC peripheral. ++* Input : - ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. ++* - state: new state of the ADCx peripheral. This parameter ++* can be: ENABLE or DISABLE. ++* Output : None ++* Return : None ++*******************************************************************************/ ++void adc_dev_enable(adc_reg_map* ADCx, FunctionalState state) ++{ ++ unsigned int temp; ++ ++ if (state == ENABLE) { ++ temp = ADCx->CR2; ++ temp |= 1 << CR2_ADON_OFFSET; ++ temp ^= 1 << CR2_ADON_OFFSET; ++ temp |= (state << CR2_ADON_OFFSET); ++ ADCx->CR2 = temp; ++ ++ // 触发复位校准和AD校准 ++ ADCx->CR2 = temp; ++ temp = ADCx->CR2; ++ temp |= (state << 2) | (state << 3); ++ ADCx->CR2 = temp; ++#if 0 ++ while (1) { ++ temp = ADCx->CR2; ++ temp &= 1 << 2; ++ if (!temp) ++ break; ++ } ++#else ++ ndelay(1000000); ++#endif ++ } else { ++ temp = ADCx->CR2; ++ temp |= 1 << CR2_ADON_OFFSET; ++ temp ^= 1 << CR2_ADON_OFFSET; ++ ADCx->CR2 = temp; ++ } ++} ++ ++/******************************************************************************* ++* Function Name : adc_software_start_conv_trigger ++* Description : Enables or disables the selected ADC software start conversion . ++* Input : - ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. ++* - state: new state of the selected ADC software start conversion. ++* This parameter can be: ENABLE or DISABLE. ++* Output : None ++* Return : None ++*******************************************************************************/ ++void adc_software_start_conv_trigger(adc_reg_map* ADCx, FunctionalState state, unsigned char J_channel) ++{ ++ unsigned int temp; ++ unsigned char EOC_offset; ++ unsigned char start_offset; ++ unsigned char exttrig_offset; ++ ++ EOC_offset = J_channel ? SR_J_EOC_OFFSET : SR_EOC_OFFSET; ++ start_offset = J_channel ? CR2_EXTTRIG_SW_J_START_OFFSET : CR2_EXTTRIG_SW_START_OFFSET; ++ exttrig_offset = J_channel ? CR2_J_EXTTRIG_OFFSET : CR2_EXTTRIG_OFFSET; ++ ++ if (state == ENABLE) { ++ temp = ADCx->CR2; ++ temp |= 1 << exttrig_offset; ++ ADCx->CR2 = temp; ++ // 先把 EOC 清除 ++ temp = ADCx->SR; ++ temp |= 1 << EOC_offset; ++ temp ^= 1 << EOC_offset; ++ ADCx->SR = temp; ++ ADCx->CR2 |= 1 << start_offset; ++ } else { ++ /* Disable the selected ADC conversion on external event and stop the selected ADC conversion */ ++ temp = ADCx->CR2; ++ temp |= 1 << start_offset; ++ temp ^= 1 << start_offset; ++ ADCx->CR2 = temp; ++ } ++} ++ ++void adc_eoc_check_conv_end(adc_reg_map* ADCx) ++{ ++ int max_loop; ++ unsigned int temp; ++ ++ max_loop = 0; ++ while (1) { ++ temp = ADCx->SR; ++ temp &= 1 << 1; ++ ndelay(10); ++ ++max_loop; ++ if (temp == 2) ++ break; ++ if (max_loop == 10000) { ++ pr_info("adc_eoc_check_conv_end eoc wait timeout\n"); ++ break; ++ } ++ } ++} +diff --git a/drivers/iio/adc/loongson-2k300-adc-core.h b/drivers/iio/adc/loongson-2k300-adc-core.h +new file mode 100644 +index 000000000..f6d441f8a +--- /dev/null ++++ b/drivers/iio/adc/loongson-2k300-adc-core.h +@@ -0,0 +1,449 @@ ++#ifndef __LOONGSON_2K300_ADC_CORE_H__ ++#define __LOONGSON_2K300_ADC_CORE_H__ ++ ++typedef enum FunctionalState { ++ DISABLE = 0, ++ ENABLE, ++} FunctionalState; ++ ++// ADC register offsets ++#define ADC_SR 0x00 ++#define ADC_CR1 0x04 ++#define ADC_CR2 0x08 ++#define ADC_SMPR1 0x0C ++#define ADC_SMPR2 0x10 ++#define ADC_JOFR1 0x14 ++#define ADC_JOFR2 0x18 ++#define ADC_JOFR3 0x1C ++#define ADC_JOFR4 0x20 ++#define ADC_HTR 0x24 ++#define ADC_LTR 0x28 ++#define ADC_SQR1 0x2C ++#define ADC_SQR2 0x30 ++#define ADC_SQR3 0x34 ++#define ADC_JSQR 0x38 ++#define ADC_JDR1 0x3C ++#define ADC_JDR2 0x40 ++#define ADC_JDR3 0x44 ++#define ADC_JDR4 0x48 ++#define ADC_DR 0x4C ++ ++typedef struct ++{ ++ volatile unsigned int SR; ++ volatile unsigned int CR1; ++ volatile unsigned int CR2; ++ volatile unsigned int SMPR1; ++ volatile unsigned int SMPR2; ++ volatile unsigned int JOFR1; ++ volatile unsigned int JOFR2; ++ volatile unsigned int JOFR3; ++ volatile unsigned int JOFR4; ++ volatile unsigned int HTR; ++ volatile unsigned int LTR; ++ volatile unsigned int SQR1; ++ volatile unsigned int SQR2; ++ volatile unsigned int SQR3; ++ volatile unsigned int JSQR; ++ volatile unsigned int JDR1; ++ volatile unsigned int JDR2; ++ volatile unsigned int JDR3; ++ volatile unsigned int JDR4; ++ volatile unsigned int DR; ++} adc_reg_map; ++ ++/******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** ++* File Name : stm32f10x_adc.h ++* Author : MCD Application Team ++* Version : V2.0.3 ++* Date : 09/22/2008 ++* Description : This file contains all the functions prototypes for the ++* ADC firmware library. ++******************************************************************************** ++* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ++* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ++* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ++* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ++* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ++* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ++*******************************************************************************/ ++ ++/* Define to prevent recursive inclusion -------------------------------------*/ ++ ++#define ADC_RCG (12) ++ ++/* Private typedef -----------------------------------------------------------*/ ++/* Private define ------------------------------------------------------------*/ ++/* ADC DISCNUM mask */ ++// #define CR1_DISCNUM_Reset ((unsigned int)0xFFFF1FFF) ++ ++// /* ADC DISCEN mask */ ++// #define CR1_DISCEN_Set ((unsigned int)0x00000800) ++// #define CR1_DISCEN_Reset ((unsigned int)0xFFFFF7FF) ++ ++// /* ADC JAUTO mask */ ++// #define CR1_JAUTO_Set ((unsigned int)0x00000400) ++// #define CR1_JAUTO_Reset ((unsigned int)0xFFFFFBFF) ++ ++// /* ADC JDISCEN mask */ ++// #define CR1_JDISCEN_Set ((unsigned int)0x00001000) ++// #define CR1_JDISCEN_Reset ((unsigned int)0xFFFFEFFF) ++ ++// /* ADC AWDCH mask */ ++// #define CR1_AWDCH_Reset ((unsigned int)0xFFFFFFE0) ++ ++// /* ADC Analog watchdog enable mode mask */ ++// #define CR1_AWDMode_Reset ((unsigned int)0xFF3FFDFF) ++ ++// /* CR1 register Mask */ ++#define CR1_CLEAR_MASK ((unsigned int)0xFFF0FEFF) ++ ++// ++#define SR_EOC_OFFSET 0x1 ++#define SR_J_EOC_OFFSET 0x2 ++ ++// ++#define CR1_EOC_IE_OFFSET 0x5 ++#define CR1_J_EOC_IE_OFFSET 0x7 ++ ++/* ADC ADON mask */ ++#define CR2_ADON_OFFSET 0x0 ++ ++/* ADC reset */ ++// #define CR2_ADC_Reset ((unsigned int)0x80000000) ++ ++// /* ADC DMA mask */ ++// #define CR2_DMA_Set ((unsigned int)0x00000100) ++// #define CR2_DMA_Reset ((unsigned int)0xFFFFFEFF) ++ ++// /* ADC RSTCAL mask */ ++// #define CR2_RSTCAL_Set ((unsigned int)0x00000008) ++ ++// /* ADC CAL mask */ ++// #define CR2_CAL_Set ((unsigned int)0x00000004) ++ ++// /* ADC SWSTART mask */ ++// #define CR2_SWSTART_Set ((unsigned int)0x00400000) ++ ++// /* ADC EXTTRIG mask */ ++// #define CR2_EXTTRIG_Set ((unsigned int)0x00100000) ++// #define CR2_EXTTRIG_Reset ((unsigned int)0xFFEFFFFF) ++ ++/* ADC Software start mask */ ++#define CR2_EXTTRIG_SW_START_OFFSET 22 ++#define CR2_EXTTRIG_SW_J_START_OFFSET 21 ++#define CR2_EXTTRIG_OFFSET 20 ++#define CR2_J_EXTTRIG_OFFSET 15 ++// #define CR2_EXTTRIG_SWSTART_Set ((unsigned int)0x00500000) ++// #define CR2_EXTTRIG_SWSTART_Reset ((unsigned int)0xFFAFFFFF) ++ ++/* ADC JEXTSEL mask */ ++// #define CR2_JEXTSEL_Reset ((unsigned int)0xFFFF8FFF) ++ ++// /* ADC JEXTTRIG mask */ ++// #define CR2_JEXTTRIG_Set ((unsigned int)0x00008000) ++// #define CR2_JEXTTRIG_Reset ((unsigned int)0xFFFF7FFF) ++ ++// /* ADC JSWSTART mask */ ++// #define CR2_JSWSTART_Set ((unsigned int)0x00200000) ++ ++// /* ADC injected software start mask */ ++// #define CR2_JEXTTRIG_JSWSTART_Set ((unsigned int)0x00208000) ++// #define CR2_JEXTTRIG_JSWSTART_Reset ((unsigned int)0xFFDF7FFF) ++ ++// /* ADC TSPD mask */ ++// #define CR2_TSVREFE_Set ((unsigned int)0x00800000) ++// #define CR2_TSVREFE_Reset ((unsigned int)0xFF7FFFFF) ++ ++// /* CR2 register Mask */ ++#define CR2_CLEAR_MASK ((unsigned int)0xFFF1F7FD) ++ ++// /* ADC SQx mask */ ++#define SQR3_SQ_MASK 0x1F ++#define SQR2_SQ_MASK 0x1F ++#define SQR1_SQ_MASK 0x1F ++ ++// /* SQR1 register Mask */ ++#define SQR1_CLEAR_MASK ((unsigned int)0xFF0FFFFF) ++ ++// /* ADC JSQx mask */ ++// #define JSQR_JSQ_Set ((unsigned int)0x0000001F) ++ ++// /* ADC JL mask */ ++// #define JSQR_JL_Set ((unsigned int)0x00300000) ++// #define JSQR_JL_Reset ((unsigned int)0xFFCFFFFF) ++ ++// /* ADC SMPx mask */ ++#define SMPR1_SMP_MASK 0x7 ++#define SMPR2_SMP_MASK 0x7 ++ ++// /* ADC JDRx registers offset */ ++// #define JDR_Offset ((unsigned char)0x28) ++ ++// #define DISABLE 0 ++// #define ENABLE 1 ++ ++/* Includes ------------------------------------------------------------------*/ ++// #include "../i2c/ls2k0300_map.h" ++ ++/* Exported types ------------------------------------------------------------*/ ++/* ADC Init structure definition */ ++typedef struct ++{ ++ unsigned int ADC_Mode; ++ int ADC_ScanConvMode; //CR1 scan ++ int ADC_ContinuousConvMode;//CR2 cont ++ unsigned int ADC_ExternalTrigConv;//CR2 extsel ++ unsigned int ADC_DataAlign;//CR2 align ++ unsigned char ADC_NbrOfChannel;//SQR1 l ++ unsigned short ADC_ClkDivider;//CR1 clkdiv ++ unsigned char ADC_JTrigMod;//CR2 jtrigmod ++ unsigned char ADC_ADCEdge;//CR2 adcedge ++ unsigned char ADC_DiffMod;//CR1 diffmod ++ unsigned char ADC_OutPhaseSel;//CR1 ops ++ unsigned char ADC_ClkMask;//CR2 clkmask ++ unsigned char ADC_Int_EOC; // CR1 EOC enable ? ++ unsigned char ADC_Int_JEOC; // CR1 JEOC enable ? ++}adc_init_info; ++ ++/* Exported constants --------------------------------------------------------*/ ++ ++/* ADC dual mode -------------------------------------------------------------*/ ++#define ADC_Mode_Independent ((unsigned int)0x00000000) ++#define ADC_Mode_RegInjecSimult ((unsigned int)0x00010000) ++#define ADC_Mode_RegSimult_AlterTrig ((unsigned int)0x00020000) ++#define ADC_Mode_InjecSimult_FastInterl ((unsigned int)0x00030000) ++#define ADC_Mode_InjecSimult_SlowInterl ((unsigned int)0x00040000) ++#define ADC_Mode_InjecSimult ((unsigned int)0x00050000) ++#define ADC_Mode_RegSimult ((unsigned int)0x00060000) ++#define ADC_Mode_FastInterl ((unsigned int)0x00070000) ++#define ADC_Mode_SlowInterl ((unsigned int)0x00080000) ++#define ADC_Mode_AlterTrig ((unsigned int)0x00090000) ++ ++#define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \ ++ ((MODE) == ADC_Mode_RegInjecSimult) || \ ++ ((MODE) == ADC_Mode_RegSimult_AlterTrig) || \ ++ ((MODE) == ADC_Mode_InjecSimult_FastInterl) || \ ++ ((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \ ++ ((MODE) == ADC_Mode_InjecSimult) || \ ++ ((MODE) == ADC_Mode_RegSimult) || \ ++ ((MODE) == ADC_Mode_FastInterl) || \ ++ ((MODE) == ADC_Mode_SlowInterl) || \ ++ ((MODE) == ADC_Mode_AlterTrig)) ++ ++/* ADC extrenal trigger sources for regular channels conversion --------------*/ ++/* for ADC1 and ADC2 */ ++#define ADC_ExternalTrigConv_T1_CC1 ((unsigned int)0x00000000) ++#define ADC_ExternalTrigConv_T1_CC2 ((unsigned int)0x00020000) ++#define ADC_ExternalTrigConv_T2_CC2 ((unsigned int)0x00060000) ++#define ADC_ExternalTrigConv_T3_TRGO ((unsigned int)0x00080000) ++#define ADC_ExternalTrigConv_T4_CC4 ((unsigned int)0x000A0000) ++#define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((unsigned int)0x000C0000) ++/* for ADC1, ADC2 and ADC3 */ ++#define ADC_ExternalTrigConv_T1_CC3 ((unsigned int)0x00040000) ++#define ADC_ExternalTrigConv_None ((unsigned int)0x000E0000) ++/* for ADC3 */ ++#define ADC_ExternalTrigConv_T3_CC1 ((unsigned int)0x00000000) ++#define ADC_ExternalTrigConv_T2_CC3 ((unsigned int)0x00020000) ++#define ADC_ExternalTrigConv_T8_CC1 ((unsigned int)0x00060000) ++#define ADC_ExternalTrigConv_T8_TRGO ((unsigned int)0x00080000) ++#define ADC_ExternalTrigConv_T5_CC1 ((unsigned int)0x000A0000) ++#define ADC_ExternalTrigConv_T5_CC3 ((unsigned int)0x000C0000) ++ ++#define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \ ++ ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \ ++ ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \ ++ ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \ ++ ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \ ++ ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \ ++ ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \ ++ ((REGTRIG) == ADC_ExternalTrigConv_None) || \ ++ ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \ ++ ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \ ++ ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \ ++ ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \ ++ ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \ ++ ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3)) ++ ++/* ADC data align ------------------------------------------------------------*/ ++#define ADC_DataAlign_Right ((unsigned int)0x00000000) ++#define ADC_DataAlign_Left ((unsigned int)0x00000800) ++ ++#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \ ++ ((ALIGN) == ADC_DataAlign_Left)) ++ ++/* ADC channels --------------------------------------------------------------*/ ++#define ADC_Channel_0 ((unsigned char)0x00) ++#define ADC_Channel_1 ((unsigned char)0x01) ++#define ADC_Channel_2 ((unsigned char)0x02) ++#define ADC_Channel_3 ((unsigned char)0x03) ++#define ADC_Channel_4 ((unsigned char)0x08) ++#define ADC_Channel_5 ((unsigned char)0x09) ++#define ADC_Channel_6 ((unsigned char)0x0a) ++#define ADC_Channel_7 ((unsigned char)0x0b) ++#define ADC_Channel_8 ((unsigned char)0x18) ++#define ADC_Channel_9 ((unsigned char)0x19) ++#define ADC_Channel_10 ((unsigned char)0x1A) ++#define ADC_Channel_11 ((unsigned char)0x1B) ++#define ADC_Channel_12 ((unsigned char)0x1C) ++#define ADC_Channel_13 ((unsigned char)0x1D) ++#define ADC_Channel_14 ((unsigned char)0x1E) ++#define ADC_Channel_15 ((unsigned char)0x1F) ++#define ADC_Channel_16 ((unsigned char)0x10) ++#define ADC_Channel_17 ((unsigned char)0x11) ++ ++#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \ ++ ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \ ++ ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \ ++ ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \ ++ ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \ ++ ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \ ++ ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \ ++ ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \ ++ ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17)) ++ ++/* ADC sampling times --------------------------------------------------------*/ ++#define ADC_SampleTime_1Cycles ((unsigned char)0x00) ++#define ADC_SampleTime_2Cycles ((unsigned char)0x01) ++#define ADC_SampleTime_4Cycles ((unsigned char)0x02) ++#define ADC_SampleTime_8Cycles ((unsigned char)0x03) ++#define ADC_SampleTime_16Cycles ((unsigned char)0x04) ++#define ADC_SampleTime_32Cycles ((unsigned char)0x05) ++#define ADC_SampleTime_64Cycles ((unsigned char)0x06) ++#define ADC_SampleTime_128Cycles ((unsigned char)0x07) ++ ++#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \ ++ ((TIME) == ADC_SampleTime_2Cycles5) || \ ++ ((TIME) == ADC_SampleTime_4Cycles5) || \ ++ ((TIME) == ADC_SampleTime_8Cycles5) || \ ++ ((TIME) == ADC_SampleTime_16Cycles5) || \ ++ ((TIME) == ADC_SampleTime_32Cycles5) || \ ++ ((TIME) == ADC_SampleTime_64Cycles5) || \ ++ ((TIME) == ADC_SampleTime_128Cycles5)) ++ ++/* ADC extrenal trigger sources for injected channels conversion -------------*/ ++/* For ADC1 and ADC2 */ ++#define ADC_ExternalTrigInjecConv_T2_TRGO ((unsigned int)0x00002000) ++#define ADC_ExternalTrigInjecConv_T2_CC1 ((unsigned int)0x00003000) ++#define ADC_ExternalTrigInjecConv_T3_CC4 ((unsigned int)0x00004000) ++#define ADC_ExternalTrigInjecConv_T4_TRGO ((unsigned int)0x00005000) ++#define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((unsigned int)0x00006000) ++/* For ADC1, ADC2 and ADC3 */ ++#define ADC_ExternalTrigInjecConv_T1_TRGO ((unsigned int)0x00000000) ++#define ADC_ExternalTrigInjecConv_T1_CC4 ((unsigned int)0x00001000) ++#define ADC_ExternalTrigInjecConv_None ((unsigned int)0x00007000) ++/* For ADC3 */ ++#define ADC_ExternalTrigInjecConv_T4_CC3 ((unsigned int)0x00002000) ++#define ADC_ExternalTrigInjecConv_T8_CC2 ((unsigned int)0x00003000) ++#define ADC_ExternalTrigInjecConv_T8_CC4 ((unsigned int)0x00004000) ++#define ADC_ExternalTrigInjecConv_T5_TRGO ((unsigned int)0x00005000) ++#define ADC_ExternalTrigInjecConv_T5_CC4 ((unsigned int)0x00006000) ++ ++#define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \ ++ ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \ ++ ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \ ++ ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \ ++ ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \ ++ ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \ ++ ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \ ++ ((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \ ++ ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \ ++ ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \ ++ ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \ ++ ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \ ++ ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4)) ++ ++/* ADC injected channel selection --------------------------------------------*/ ++#define ADC_InjectedChannel_1 ((unsigned char)0x14) ++#define ADC_InjectedChannel_2 ((unsigned char)0x18) ++#define ADC_InjectedChannel_3 ((unsigned char)0x1C) ++#define ADC_InjectedChannel_4 ((unsigned char)0x20) ++ ++#define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \ ++ ((CHANNEL) == ADC_InjectedChannel_2) || \ ++ ((CHANNEL) == ADC_InjectedChannel_3) || \ ++ ((CHANNEL) == ADC_InjectedChannel_4)) ++ ++/* ADC analog watchdog selection ---------------------------------------------*/ ++#define ADC_AnalogWatchdog_SingleRegEnable ((unsigned int)0x00800200) ++#define ADC_AnalogWatchdog_SingleInjecEnable ((unsigned int)0x00400200) ++#define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((unsigned int)0x00C00200) ++#define ADC_AnalogWatchdog_AllRegEnable ((unsigned int)0x00800000) ++#define ADC_AnalogWatchdog_AllInjecEnable ((unsigned int)0x00400000) ++#define ADC_AnalogWatchdog_AllRegAllInjecEnable ((unsigned int)0x00C00000) ++#define ADC_AnalogWatchdog_None ((unsigned int)0x00000000) ++ ++#define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \ ++ ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \ ++ ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \ ++ ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \ ++ ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \ ++ ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \ ++ ((WATCHDOG) == ADC_AnalogWatchdog_None)) ++ ++/* ADC interrupts definition -------------------------------------------------*/ ++#define ADC_IT_EOC ((unsigned short)0x0220) ++#define ADC_IT_AWD ((unsigned short)0x0140) ++#define ADC_IT_JEOC ((unsigned short)0x0480) ++ ++#define IS_ADC_IT(IT) ((((IT) & (unsigned short)0xF81F) == 0x00) && ((IT) != 0x00)) ++#define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \ ++ ((IT) == ADC_IT_JEOC)) ++ ++/* ADC flags definition ------------------------------------------------------*/ ++#define ADC_FLAG_AWD ((unsigned char)0x01) ++#define ADC_FLAG_EOC ((unsigned char)0x02) ++#define ADC_FLAG_JEOC ((unsigned char)0x04) ++#define ADC_FLAG_JSTRT ((unsigned char)0x08) ++#define ADC_FLAG_STRT ((unsigned char)0x10) ++ ++#define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (unsigned char)0xE0) == 0x00) && ((FLAG) != 0x00)) ++#define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \ ++ ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \ ++ ((FLAG) == ADC_FLAG_STRT)) ++ ++/* ADC thresholds ------------------------------------------------------------*/ ++#define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF) ++ ++/* ADC injected offset -------------------------------------------------------*/ ++#define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF) ++ ++/* ADC injected length -------------------------------------------------------*/ ++#define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4)) ++ ++/* ADC injected rank ---------------------------------------------------------*/ ++#define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4)) ++ ++/* ADC regular length --------------------------------------------------------*/ ++#define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10)) ++ ++/* ADC regular rank ----------------------------------------------------------*/ ++#define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10)) ++ ++/* ADC regular discontinuous mode number -------------------------------------*/ ++#define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8)) ++ ++//Loongson Feature ++#define RCH0 ADC_Channel_0 ++#define RCH1 ADC_Channel_1 ++#define RCH2 ADC_Channel_2 ++#define RCH3 ADC_Channel_3 ++#define RCH4 ADC_Channel_4 ++#define RCH5 ADC_Channel_5 ++#define RCH6 ADC_Channel_6 ++#define RCH7 ADC_Channel_7 ++ ++//Loongson Feature ++#define JCH0 ADC_Channel_0 ++#define JCH1 ADC_Channel_1 ++#define JCH2 ADC_Channel_2 ++#define JCH3 ADC_Channel_3 ++ ++void adc_init(adc_reg_map* ADCx, adc_init_info* ADC_InitStruct); ++void adc_struct_init(adc_init_info* ADC_InitStruct); ++void ADC_RegularChannelConfig(adc_reg_map* ADCx, unsigned char ADC_Channel, unsigned char Rank, unsigned char ADC_SampleTime); ++void adc_dev_enable(adc_reg_map* ADCx, FunctionalState state); ++void adc_software_start_conv_trigger(adc_reg_map* ADCx, FunctionalState state, unsigned char J_channel); ++void adc_eoc_check_conv_end(adc_reg_map* ADCx); ++ ++#endif /* __LOONGSON_2K300_ADC_CORE_H__ */ +diff --git a/drivers/iio/adc/loongson-2k300-adc.c b/drivers/iio/adc/loongson-2k300-adc.c +new file mode 100644 +index 000000000..ba2a93d12 +--- /dev/null ++++ b/drivers/iio/adc/loongson-2k300-adc.c +@@ -0,0 +1,187 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "loongson-2k300-adc-core.h" ++ ++#define ADC_DATA_MASK 0x0FFF ++ ++#define ADC_MAX_VOLTAGE 1800 ++#define ADC_SCALE 4096 ++ ++struct ls2k300_adc_data { ++ void __iomem *base; ++ spinlock_t read_raw_lock; // 添加读取的自旋锁 扫描模式,单次读取时使用 ++}; ++ ++// 这里是有节点可以读取的关键 ++#define LS2K300_CHANNEL(num) { \ ++ .type = IIO_VOLTAGE, \ ++ .indexed = 1, \ ++ .channel = num, \ ++ .address = ADC_DR, \ ++ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ ++ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ ++ .scan_index = num, \ ++ .scan_type = { \ ++ .sign = 's', \ ++ .realbits = 12, \ ++ .storagebits = 16, \ ++ .shift = 12, \ ++ .endianness = IIO_CPU, \ ++ }, \ ++} ++ ++static const struct iio_chan_spec ls2k300_adc_channels[] = { ++ IIO_CHAN_SOFT_TIMESTAMP(8), ++ LS2K300_CHANNEL(0), ++ LS2K300_CHANNEL(1), ++ LS2K300_CHANNEL(2), ++ LS2K300_CHANNEL(3), ++ LS2K300_CHANNEL(4), ++ LS2K300_CHANNEL(5), ++ LS2K300_CHANNEL(6), ++ LS2K300_CHANNEL(7), ++ // 注入通道 ++ // { .type = IIO_VOLTAGE, .differential = 1, .channel = 0, .address = ADC_JDR1 }, ++ // { .type = IIO_VOLTAGE, .differential = 1, .channel = 1, .address = ADC_JDR2 }, ++ // { .type = IIO_VOLTAGE, .differential = 1, .channel = 2, .address = ADC_JDR3 }, ++ // { .type = IIO_VOLTAGE, .differential = 1, .channel = 3, .address = ADC_JDR4 }, ++}; ++ ++// sysfs 下的节点读取时的具体调用函数 ++static int ls2k300_adc_read_raw(struct iio_dev *indio_dev, ++ struct iio_chan_spec const *chan, ++ int *val, int *val2, long mask) ++{ ++ struct ls2k300_adc_data *data = iio_priv(indio_dev); ++ unsigned int reg_offset; ++ unsigned long flags; ++ ++ switch (mask) { ++ case IIO_CHAN_INFO_RAW: ++ // 针对 in_voltagex_raw 节点 ++ if (chan->differential) { ++ reg_offset = chan->address; ++ } else { ++ reg_offset = chan->address; ++ } ++ ++ // 由于规则通道组只有一个通道,所以这里需要用锁来限定一段时间只能读取一个通道的值。 ++ spin_lock_irqsave(&data->read_raw_lock, flags); ++ ++ ADC_RegularChannelConfig(data->base, chan->channel, 1, ADC_SampleTime_64Cycles); ++ adc_software_start_conv_trigger(data->base, ENABLE, 0); ++ adc_eoc_check_conv_end(data->base); ++ *val = ioread16(data->base + reg_offset) & ADC_DATA_MASK; ++ ++ spin_unlock_irqrestore(&data->read_raw_lock, flags); ++ ++ return IIO_VAL_INT; ++ case IIO_CHAN_INFO_SCALE: ++ // 针对 in_voltagex_scale 节点 ++ *val = ADC_MAX_VOLTAGE; ++ *val2 = ADC_SCALE; ++ // 返回的值就是 val1 / val2 的那个小数值 ++ // scale * raw 就是对应的电压值,单位mV ++ return IIO_VAL_FRACTIONAL; ++ default: ++ return -EINVAL; ++ } ++} ++ ++static const struct iio_info ls2k300_adc_info = { ++ .read_raw = ls2k300_adc_read_raw, ++}; ++ ++static int ls2k300_adc_probe(struct platform_device *pdev) ++{ ++ adc_init_info adc_init_struct; ++ struct iio_dev *indio_dev; ++ struct ls2k300_adc_data *data; ++ struct resource *res; ++ int ret; ++ ++ indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*data)); ++ if (!indio_dev) { ++ dev_err(&pdev->dev, "devm_iio_device_alloc failed! probe failed!\n"); ++ return -ENOMEM; ++ } ++ ++ data = iio_priv(indio_dev); ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ data->base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(data->base)) { ++ dev_err(&pdev->dev, "devm_ioremap_resource failed! probe failed! (base: %.llx)\n", (unsigned long long)data->base); ++ return PTR_ERR(data->base); ++ } ++ ++ // 配置 ADC CR1 和 CR2 等寄存器,具体配置根据需要调整 ++ // 不使用 DMA, 扫描模式, 单次,规则序列转化数为1, 也就是每次都等待读取完毕。 ++ // EOC中断和JEOC中断没开 ++ adc_struct_init(&adc_init_struct); ++ adc_init_struct.ADC_Mode = ADC_Mode_Independent; ++ adc_init_struct.ADC_ScanConvMode = ENABLE; ++ adc_init_struct.ADC_ContinuousConvMode = DISABLE; ++ adc_init_struct.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None; ++ adc_init_struct.ADC_DataAlign = ADC_DataAlign_Right; ++ adc_init_struct.ADC_NbrOfChannel = 1; //规则通道数量 为 1,这是一个一个的触发 扫描模式的单次扫描 ++ adc_init_struct.ADC_ClkDivider = 1; //Loongson Feature ++ adc_init_struct.ADC_JTrigMod = 0; //Loongson Feature ++ adc_init_struct.ADC_ADCEdge = 0; //Loongson Feature ++ adc_init_struct.ADC_DiffMod = 0; //Loongson Feature ++ adc_init(data->base, &adc_init_struct); ++ ++ adc_dev_enable(data->base, ENABLE); ++ ++ // iio 框架信息注册 ++ indio_dev->dev.parent = &pdev->dev; ++ indio_dev->info = &ls2k300_adc_info; ++ indio_dev->name = pdev->name; ++ indio_dev->modes = INDIO_DIRECT_MODE; ++ indio_dev->channels = ls2k300_adc_channels; ++ indio_dev->num_channels = ARRAY_SIZE(ls2k300_adc_channels); ++ ++ spin_lock_init(&data->read_raw_lock); // 初始化自旋锁 ++ ++ ret = iio_device_register(indio_dev); ++ if (ret) { ++ dev_err(&pdev->dev, "iio_device_register failed! probe failed! (ret: %d)\n", ret); ++ return ret; ++ } ++ ++ platform_set_drvdata(pdev, indio_dev); ++ dev_info(&pdev->dev, "ADC Device registered successfully\n"); ++ return 0; ++} ++ ++static int ls2k300_adc_remove(struct platform_device *pdev) ++{ ++ struct iio_dev *indio_dev = platform_get_drvdata(pdev); ++ iio_device_unregister(indio_dev); ++ ++ return 0; ++} ++ ++static const struct of_device_id ls2k300_adc_of_match[] = { ++ { .compatible = "ls2k300-adc", }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, ls2k300_adc_of_match); ++ ++static struct platform_driver ls2k300_adc_driver = { ++ .driver = { ++ .name = "ls2k300_adc", ++ .of_match_table = ls2k300_adc_of_match, ++ }, ++ .probe = ls2k300_adc_probe, ++ .remove = ls2k300_adc_remove, ++}; ++module_platform_driver(ls2k300_adc_driver); ++ ++MODULE_AUTHOR("oujintao qujintao@loongson.cn"); ++MODULE_DESCRIPTION("2k300 ADC IIO driver"); ++MODULE_LICENSE("GPL"); +-- +2.49.0 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0007-add-loongson-timers.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0007-add-loongson-timers.patch new file mode 100644 index 0000000000000000000000000000000000000000..6b6ffea76f671d18aa28499e08256d5dc94564ba --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0007-add-loongson-timers.patch @@ -0,0 +1,382 @@ +From 826fccbaeaf43632d51fefb0872f3b7b08821819 Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:11:28 +0800 +Subject: [PATCH 07/17] add loongson timers + +--- + drivers/mfd/Kconfig | 11 ++ + drivers/mfd/Makefile | 1 + + drivers/mfd/loongson-timers.c | 327 ++++++++++++++++++++++++++++++++++ + 3 files changed, 339 insertions(+) + create mode 100644 drivers/mfd/loongson-timers.c + +diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig +index 6b653487d..394c0d26b 100644 +--- a/drivers/mfd/Kconfig ++++ b/drivers/mfd/Kconfig +@@ -2129,6 +2129,17 @@ config MFD_STM32_TIMERS + for PWM and IIO Timer. This driver allow to share the + registers between the others drivers. + ++config MFD_LS_TIMERS ++ tristate "Support for LS Timers" ++ depends on (MACH_LOONGSON64 && OF) || COMPILE_TEST ++ select MFD_CORE ++ select REGMAP ++ select REGMAP_MMIO ++ help ++ Select this option to enable Loongson timers driver used ++ for PWM and IIO Timer. This driver allow to share the ++ registers between the others drivers. ++ + config MFD_STPMIC1 + tristate "Support for STPMIC1 PMIC" + depends on (I2C=y && OF) +diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile +index 700b3600e..9f639ebf0 100644 +--- a/drivers/mfd/Makefile ++++ b/drivers/mfd/Makefile +@@ -258,6 +258,7 @@ obj-$(CONFIG_MFD_SUN4I_GPADC) += sun4i-gpadc.o + + obj-$(CONFIG_MFD_STM32_LPTIMER) += stm32-lptimer.o + obj-$(CONFIG_MFD_STM32_TIMERS) += stm32-timers.o ++obj-$(CONFIG_MFD_LS_TIMERS) += loongson-timers.o + obj-$(CONFIG_MFD_MXS_LRADC) += mxs-lradc.o + obj-$(CONFIG_MFD_SC27XX_PMIC) += sprd-sc27xx-spi.o + obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o +diff --git a/drivers/mfd/loongson-timers.c b/drivers/mfd/loongson-timers.c +new file mode 100644 +index 000000000..6f4f219c7 +--- /dev/null ++++ b/drivers/mfd/loongson-timers.c +@@ -0,0 +1,327 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) STMicroelectronics 2016 ++ * Author: Benjamin Gaignard ++ * ++ * Copyright (C) 2025 Ilikara <3435193369@qq.com> ++ * Modified by: Ilikara <3435193369@qq.com> ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#define LS_TIMERS_MAX_REGISTERS 0x3fc ++ ++/* DIER register DMA enable bits */ ++static const u32 loongson_timers_dier_dmaen[LS_TIMERS_MAX_DMAS] = { ++ TIM_DIER_CC1DE, ++ TIM_DIER_CC2DE, ++ TIM_DIER_CC3DE, ++ TIM_DIER_CC4DE, ++ TIM_DIER_UIE, ++ TIM_DIER_TDE, ++ TIM_DIER_COMDE ++}; ++ ++static void loongson_timers_dma_done(void *p) ++{ ++ struct loongson_timers_dma *dma = p; ++ struct dma_tx_state state; ++ enum dma_status status; ++ ++ status = dmaengine_tx_status(dma->chan, dma->chan->cookie, &state); ++ if (status == DMA_COMPLETE) ++ complete(&dma->completion); ++} ++ ++/** ++ * loongson_timers_dma_burst_read - Read from timers registers using dual DMA channels. ++ * ++ * @dev: Loongson timers MFD device ++ * @buf: Destination buffer (must hold bursts * num_reg * 2 elements) ++ * @id: DMA event pair identifier (ch[1/2/3/4]_pair) ++ * @reg: Base register offset for DMA transfers ++ * @num_reg: Number of consecutive registers per burst ++ * @bursts: Number of bursts to capture (each burst triggers dual DMA transfers) ++ * @tmo_ms: Operation timeout in milliseconds ++ */ ++int loongson_timers_dma_burst_read(struct device *dev, u32 *buf, ++ enum loongson_timers_dmas id, u32 reg, ++ unsigned int num_reg, unsigned int bursts, ++ unsigned long tmo_ms) ++{ ++ struct loongson_timers *ddata = dev_get_drvdata(dev); ++ unsigned long timeout = msecs_to_jiffies(tmo_ms); ++ struct regmap *regmap = ddata->regmap; ++ struct loongson_timers_dma *dma = &ddata->dma; ++ size_t len = num_reg * bursts * sizeof(u32); ++ struct dma_async_tx_descriptor *descs[2]; ++ struct dma_slave_config configs[2]; ++ dma_cookie_t cookie; ++ dma_addr_t dma_bufs[2]; ++ long err; ++ int ret; ++ ++ /* Sanity check */ ++ if (id < LS_TIMERS_DMA_CH1 || id >= LS_TIMERS_MAX_DMAS - 1) ++ return -EINVAL; ++ ++ if (!num_reg || !bursts || reg > LS_TIMERS_MAX_REGISTERS || ++ (reg + num_reg * sizeof(u32)) > LS_TIMERS_MAX_REGISTERS) ++ return -EINVAL; ++ ++ if (!dma->chans[id] || !dma->chans[id + 1]) ++ return -ENODEV; ++ mutex_lock(&dma->lock); ++ ++ /* Select DMA channel in use */ ++ dma->chan = dma->chans[id]; ++ for (int i = 0; i < 2; i++) { ++ dma_bufs[i] = dma_map_single(dev, buf + i * bursts, len / 2, ++ DMA_FROM_DEVICE); ++ if (dma_mapping_error(dev, dma_bufs[i])) { ++ ret = -ENOMEM; ++ goto unmap; ++ } ++ } ++ ++ /* Configure DMA channels */ ++ for (int i = 0; i < 2; i++) { ++ memset(&configs[i], 0, sizeof(configs[i])); ++ configs[i].src_addr = (dma_addr_t)dma->phys_base + reg + i * sizeof(u32); ++ configs[i].src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ ++ ret = dmaengine_slave_config(dma->chans[id + i], &configs[i]); ++ if (ret) ++ goto unmap; ++ ++ descs[i] = dmaengine_prep_slave_single( ++ dma->chans[id + i], dma_bufs[i], len / 2, ++ DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT); ++ if (!descs[i]) { ++ ret = -EBUSY; ++ goto unmap; ++ } ++ ++ descs[i]->callback = loongson_timers_dma_done; ++ descs[i]->callback_param = dma; ++ } ++ for (int i = 0; i < 2; i++) { ++ cookie = dmaengine_submit(descs[i]); ++ ret = dma_submit_error(cookie); ++ if (ret) ++ goto dma_term; ++ } ++ ++ reinit_completion(&dma->completion); ++ dma_async_issue_pending(dma->chans[id + 0]); ++ dma_async_issue_pending(dma->chans[id + 1]); ++ ++ /* Clear pending flags before enabling DMA request */ ++ ret = regmap_write(regmap, TIM_SR, 0); ++ if (ret) ++ goto dma_term; ++ ++ regmap_update_bits(regmap, TIM_DIER, ++ loongson_timers_dier_dmaen[id] | ++ loongson_timers_dier_dmaen[id + 1], ++ loongson_timers_dier_dmaen[id] | ++ loongson_timers_dier_dmaen[id + 1]); ++ if (ret) ++ goto dma_term; ++ ++ err = wait_for_completion_interruptible_timeout(&dma->completion, ++ timeout); ++ if (err == 0) ++ ret = -ETIMEDOUT; ++ else if (err < 0) ++ ret = err; ++ ++ regmap_update_bits(regmap, TIM_DIER, ++ loongson_timers_dier_dmaen[id] | ++ loongson_timers_dier_dmaen[id + 1], ++ 0); ++ regmap_write(regmap, TIM_SR, 0); ++dma_term: ++ dmaengine_terminate_all(dma->chans[id + 0]); ++ dmaengine_terminate_all(dma->chans[id + 1]); ++unmap: ++ for (int i = 0; i < 2; i++) { ++ if (!dma_mapping_error(dev, dma_bufs[i])) ++ dma_unmap_single(dev, dma_bufs[i], len / 2, ++ DMA_FROM_DEVICE); ++ } ++//unlock: ++ dma->chan = NULL; ++ mutex_unlock(&dma->lock); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(loongson_timers_dma_burst_read); ++ ++static const struct regmap_config loongson_timers_regmap_cfg = { ++ .reg_bits = 32, ++ .val_bits = 32, ++ .reg_stride = sizeof(u32), ++ .max_register = LS_TIMERS_MAX_REGISTERS, ++}; ++ ++static void loongson_timers_get_arr_size(struct loongson_timers *ddata) ++{ ++ u32 arr; ++ ++ /* Backup ARR to restore it after getting the maximum value */ ++ regmap_read(ddata->regmap, TIM_ARR, &arr); ++ ++ /* ++ * Only the available bits will be written so when readback ++ * we get the maximum value of auto reload register ++ */ ++ regmap_write(ddata->regmap, TIM_ARR, ~0L); ++ regmap_read(ddata->regmap, TIM_ARR, &ddata->max_arr); ++ regmap_write(ddata->regmap, TIM_ARR, arr); ++} ++ ++static int loongson_timers_dma_probe(struct device *dev, ++ struct loongson_timers *ddata) ++{ ++ int i; ++ int ret = 0; ++ char name[4]; ++ ++ init_completion(&ddata->dma.completion); ++ mutex_init(&ddata->dma.lock); ++ ++ /* Optional DMA support: get valid DMA channel(s) or NULL */ ++ for (i = LS_TIMERS_DMA_CH1; i <= LS_TIMERS_DMA_CH4; i++) { ++ snprintf(name, ARRAY_SIZE(name), "ch%1d", i + 1); ++ ddata->dma.chans[i] = dma_request_chan(dev, name); ++ } ++ ddata->dma.chans[LS_TIMERS_DMA_UP] = dma_request_chan(dev, "up"); ++ ddata->dma.chans[LS_TIMERS_DMA_TRIG] = dma_request_chan(dev, "trig"); ++ ddata->dma.chans[LS_TIMERS_DMA_COM] = dma_request_chan(dev, "com"); ++ ++ for (i = LS_TIMERS_DMA_CH1; i < LS_TIMERS_MAX_DMAS; i++) { ++ if (IS_ERR(ddata->dma.chans[i])) { ++ /* Save the first error code to return */ ++ if (PTR_ERR(ddata->dma.chans[i]) != -ENODEV && !ret) ++ ret = PTR_ERR(ddata->dma.chans[i]); ++ ++ ddata->dma.chans[i] = NULL; ++ } ++ } ++ ++ return ret; ++} ++ ++static void loongson_timers_dma_remove(struct device *dev, ++ struct loongson_timers *ddata) ++{ ++ int i; ++ ++ for (i = LS_TIMERS_DMA_CH1; i < LS_TIMERS_MAX_DMAS; i++) ++ if (ddata->dma.chans[i]) ++ dma_release_channel(ddata->dma.chans[i]); ++} ++ ++static int loongson_timers_irq_probe(struct platform_device *pdev, ++ struct loongson_timers *ddata) ++{ ++ int ret; ++ ++ ret = platform_get_irq_byname_optional(pdev, "global"); ++ if (ret < 0 && ret != -ENXIO) { ++ return ret; ++ } else if (ret != -ENXIO) { ++ ddata->irq[LS_TIMERS_IRQ_GLOBAL] = ret; ++ ddata->nr_irqs = 1; ++ return 0; ++ } ++ ++ return 0; ++} ++ ++static int loongson_timers_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct loongson_timers *ddata; ++ struct resource *res; ++ void __iomem *mmio; ++ int ret; ++ ++ ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL); ++ if (!ddata) ++ return -ENOMEM; ++ ++ mmio = devm_platform_get_and_ioremap_resource(pdev, 0, &res); ++ if (IS_ERR(mmio)) ++ return PTR_ERR(mmio); ++ ++ /* Timer physical addr for DMA */ ++ ddata->dma.phys_base = res->start; ++ ++ ddata->regmap = devm_regmap_init_mmio_clk(dev, "int", mmio, ++ &loongson_timers_regmap_cfg); ++ if (IS_ERR(ddata->regmap)) ++ return PTR_ERR(ddata->regmap); ++ ++ ddata->clk = devm_clk_get(dev, NULL); ++ if (IS_ERR(ddata->clk)) ++ return PTR_ERR(ddata->clk); ++ ++ loongson_timers_get_arr_size(ddata); ++ ++ ret = loongson_timers_irq_probe(pdev, ddata); ++ if (ret) ++ return ret; ++ ++ ret = loongson_timers_dma_probe(dev, ddata); ++ if (ret) { ++ loongson_timers_dma_remove(dev, ddata); ++ return ret; ++ } ++ ++ platform_set_drvdata(pdev, ddata); ++ ++ ret = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev); ++ if (ret) ++ loongson_timers_dma_remove(dev, ddata); ++ ++ return ret; ++} ++ ++static void loongson_timers_remove(struct platform_device *pdev) ++{ ++ struct loongson_timers *ddata = platform_get_drvdata(pdev); ++ ++ /* ++ * Don't use devm_ here: enfore of_platform_depopulate() happens before ++ * DMA are released, to avoid race on DMA. ++ */ ++ of_platform_depopulate(&pdev->dev); ++ loongson_timers_dma_remove(&pdev->dev, ddata); ++} ++ ++static const struct of_device_id loongson_timers_of_match[] = { ++ { .compatible = "loongson,loongson-timers", }, ++ { /* end node */ }, ++}; ++MODULE_DEVICE_TABLE(of, loongson_timers_of_match); ++ ++static struct platform_driver loongson_timers_driver = { ++ .probe = loongson_timers_probe, ++ .remove_new = loongson_timers_remove, ++ .driver = { ++ .name = "loongson-timers", ++ .of_match_table = loongson_timers_of_match, ++ }, ++}; ++module_platform_driver(loongson_timers_driver); ++ ++MODULE_DESCRIPTION("Loongson Timers"); ++MODULE_LICENSE("GPL v2"); +-- +2.49.0 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0008-add-loongson-mmc-ls2kmci-support.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0008-add-loongson-mmc-ls2kmci-support.patch new file mode 100644 index 0000000000000000000000000000000000000000..29babb469f6b179b389a5738e75ac2a56866ed1c --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0008-add-loongson-mmc-ls2kmci-support.patch @@ -0,0 +1,1543 @@ +From 919749d38c02b00a10d68cddba8be5dbb5d80a16 Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:13:15 +0800 +Subject: [PATCH 08/17] add loongson mmc ls2kmci support + +--- + drivers/mmc/host/Kconfig | 11 + + drivers/mmc/host/Makefile | 1 + + drivers/mmc/host/ls2kmci.c | 1193 ++++++++++++++++++++++++++++++++++++ + drivers/mmc/host/ls2kmci.h | 290 +++++++++ + 4 files changed, 1495 insertions(+) + create mode 100644 drivers/mmc/host/ls2kmci.c + create mode 100644 drivers/mmc/host/ls2kmci.h + +diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig +index bc7e2ad37..cdfbc2f62 100644 +--- a/drivers/mmc/host/Kconfig ++++ b/drivers/mmc/host/Kconfig +@@ -1071,3 +1071,14 @@ config MMC_LITEX + module will be called litex_mmc. + + If unsure, say N. ++ ++config MMC_LS2K ++ tristate "loongson 2k SD/MMC Card Interface support" ++ depends on LOONGARCH && LOONGSON2_APB_DMA ++ help ++ This selects a driver for the MCI interface found in ++ loongson 2k CPU.If you have a board based on it and a MMC/SD ++ slot, say Y or M here. ++ ++ If unsure, say N. ++ +diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile +index a693fa3d3..055126b18 100644 +--- a/drivers/mmc/host/Makefile ++++ b/drivers/mmc/host/Makefile +@@ -101,6 +101,7 @@ cqhci-y += cqhci-core.o + cqhci-$(CONFIG_MMC_CRYPTO) += cqhci-crypto.o + obj-$(CONFIG_MMC_HSQ) += mmc_hsq.o + obj-$(CONFIG_MMC_LITEX) += litex_mmc.o ++obj-$(CONFIG_MMC_LS2K) += ls2kmci.o + + ifeq ($(CONFIG_CB710_DEBUG),y) + CFLAGS-cb710-mmc += -DDEBUG +diff --git a/drivers/mmc/host/ls2kmci.c b/drivers/mmc/host/ls2kmci.c +new file mode 100644 +index 000000000..51548c538 +--- /dev/null ++++ b/drivers/mmc/host/ls2kmci.c +@@ -0,0 +1,1193 @@ ++/* ++ * linux/drivers/mmc/ls2k_mci.h - Loongson ls2k MCI driver ++ * ++ * Copyright (C) loongson. ++ * ++ * Current driver maintained by Ben Dooks and Simtec Electronics ++ * Copyright (C) 2008 Simtec Electronics ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "ls2kmci.h" ++#include ++ ++#define DRIVER_NAME "ls2k_sdio" ++#define DEF_CLKRATE 125000000 ++ ++enum dbg_channels { ++ dbg_err = (1 << 0), ++ dbg_debug = (1 << 1), ++ dbg_info = (1 << 2), ++ dbg_irq = (1 << 3), ++ dbg_sg = (1 << 4), ++ dbg_dma = (1 << 5), ++ dbg_pio = (1 << 6), ++ dbg_fail = (1 << 7), ++ dbg_conf = (1 << 8), ++}; ++ ++struct mmc_gpio { ++ struct gpio_desc *ro_gpio; ++ struct gpio_desc *cd_gpio; ++ bool override_ro_active_level; ++ bool override_cd_active_level; ++ irqreturn_t (*cd_gpio_isr)(int irq, void *dev_id); ++ char *ro_label; ++ u32 cd_debounce_delay_ms; ++ char cd_label[]; ++}; ++ ++static const int dbgmap_err = dbg_fail; ++static const int dbgmap_info = dbg_info | dbg_conf; ++static const int dbgmap_debug = dbg_err | dbg_debug; ++ ++static void __iomem *cd_gpio_inten_base; ++#define dbg(host, channels, args...) \ ++ do { \ ++ if (dbgmap_err & channels) \ ++ dev_err(&host->pdev->dev, args); \ ++ else if (dbgmap_info & channels) \ ++ dev_info(&host->pdev->dev, args); \ ++ else if (dbgmap_debug & channels) \ ++ dev_dbg(&host->pdev->dev, args); \ ++ } while (0) ++ ++static void finalize_request(struct ls2k_mci_host *host); ++static void ls2k_mci_send_request(struct mmc_host *mmc); ++ ++#ifdef CONFIG_MMC_DEBUG ++ ++static void dbg_dumpregs(struct ls2k_mci_host *host, char *prefix) ++{ ++ u32 con, pre, cmdarg, cmdcon, cmdsta, r0, r1, r2, r3, timer, bsize; ++ u32 datcon, datcnt, datsta, fsta, imask; ++ ++ con = readl(host->base + SDICON); ++ pre = readl(host->base + SDIPRE); ++ cmdarg = readl(host->base + SDICMDARG); ++ cmdcon = readl(host->base + SDICMDCON); ++ cmdsta = readl(host->base + SDICMDSTAT); ++ r0 = readl(host->base + SDIRSP0); ++ r1 = readl(host->base + SDIRSP1); ++ r2 = readl(host->base + SDIRSP2); ++ r3 = readl(host->base + SDIRSP3); ++ timer = readl(host->base + SDITIMER); ++ bsize = readl(host->base + SDIBSIZE); ++ datcon = readl(host->base + SDIDCON); ++ datcnt = readl(host->base + SDIDCNT); ++ datsta = readl(host->base + SDIDSTA); ++ fsta = readl(host->base + SDIFSTA); ++ imask = readl(host->base + host->sdiimsk); ++ ++ dbg(host, dbg_debug, "%s CON:[%08x] PRE:[%08x] TMR:[%08x]\n", ++ prefix, con, pre, timer); ++ ++ dbg(host, dbg_debug, "%s CCON:[%08x] CARG:[%08x] CSTA:[%08x]\n", ++ prefix, cmdcon, cmdarg, cmdsta); ++ ++ dbg(host, dbg_debug, "%s DCON:[%08x] FSTA:[%08x]" ++ " DSTA:[%08x] DCNT:[%08x]\n", ++ prefix, datcon, fsta, datsta, datcnt); ++ ++ dbg(host, dbg_debug, "%s R0:[%08x] R1:[%08x]" ++ " R2:[%08x] R3:[%08x]\n", ++ prefix, r0, r1, r2, r3); ++} ++ ++static void prepare_dbgmsg(struct ls2k_mci_host *host, struct mmc_command *cmd, ++ int stop) ++{ ++ snprintf(host->dbgmsg_cmd, 300, ++ "#%u%s op:%i arg:0x%08x flags:0x08%x retries:%u", ++ host->ccnt, (stop ? " (STOP)" : ""), ++ cmd->opcode, cmd->arg, cmd->flags, cmd->retries); ++ ++ if (cmd->data) { ++ snprintf(host->dbgmsg_dat, 300, ++ "#%u bsize:%u blocks:%u bytes:%u", ++ host->dcnt, cmd->data->blksz, ++ cmd->data->blocks, ++ cmd->data->blocks * cmd->data->blksz); ++ } else { ++ host->dbgmsg_dat[0] = '\0'; ++ } ++} ++ ++static void dbg_dumpcmd(struct ls2k_mci_host *host, struct mmc_command *cmd, ++ int fail) ++{ ++ unsigned int dbglvl = fail ? dbg_fail : dbg_debug; ++ ++ if (!cmd) ++ return; ++ ++ if (cmd->error == 0) { ++ dbg(host, dbglvl, "CMD[OK] %s R0:0x%08x\n", ++ host->dbgmsg_cmd, cmd->resp[0]); ++ } else { ++ dbg(host, dbglvl, "CMD[ERR %i] %s Status:%s\n", ++ cmd->error, host->dbgmsg_cmd, host->status); ++ } ++ ++ if (!cmd->data) ++ return; ++ ++ if (cmd->data->error == 0) { ++ dbg(host, dbglvl, "DAT[OK] %s\n", host->dbgmsg_dat); ++ } else { ++ dbg(host, dbglvl, "DAT[ERR %i] %s DCNT:0x%08x\n", ++ cmd->data->error, host->dbgmsg_dat, ++ readl(host->base + SDIDCNT)); ++ } ++} ++#else ++#define dbg_dumpcmd NULL ++#define prepare_dbgmsg NULL ++#define dbg_dumpregs NULL ++#endif /* CONFIG_MMC_DEBUG */ ++ ++#define CARD_DETECT_IRQ (64+12) /* gpio12 */ ++ ++/* ++ * ls2k_mci_enable_irq - enable IRQ, after having disabled it. ++ * @host: The device state. ++ * @more: True if more IRQs are expected from transfer. ++ * ++ * Enable the main IRQ if needed after it has been disabled. ++ * ++ * The IRQ can be one of the following states: ++ * - disabled during IDLE ++ * - disabled whilst processing data ++ * - enabled during transfer ++ * - enabled whilst awaiting SDIO interrupt detection ++ */ ++static void ls2k_mci_enable_irq(struct ls2k_mci_host *host, bool more) ++{ ++ unsigned long flags; ++ bool enable = false; ++ ++ local_irq_save(flags); ++ ++ host->irq_enabled = more; ++ host->irq_disabled = false; ++ ++ enable = more | host->sdio_irqen; ++ ++ if (host->irq_state != enable) { ++ host->irq_state = enable; ++ ++ if (enable) ++ enable_irq(host->irq); ++ else ++ disable_irq(host->irq); ++ } ++ ++ local_irq_restore(flags); ++} ++ ++ ++static inline bool ls2k_mci_host_usedma(struct ls2k_mci_host *host) ++{ ++ return true; ++} ++ ++static void ls2k_mci_disable_irq(struct ls2k_mci_host *host, bool transfer) ++{ ++ unsigned long flags; ++ ++ local_irq_save(flags); ++ host->irq_disabled = transfer; ++ ++ if (transfer && host->irq_state) { ++ host->irq_state = false; ++ disable_irq(host->irq); ++ } ++ local_irq_restore(flags); ++} ++ ++static inline void clear_imask(struct ls2k_mci_host *host) ++{ ++ u32 mask = readl(host->base + host->sdiimsk); ++ ++ /* preserve the SDIO IRQ mask state */ ++ writel(mask, host->base + host->sdiimsk); ++} ++ ++static void finalize_request(struct ls2k_mci_host *host) ++{ ++ struct mmc_request *mrq = host->mrq; ++ struct mmc_command *cmd; ++ int debug_as_failure = 0; ++ if (host->complete_what != COMPLETION_FINALIZE) ++ return; ++ ++ if (!mrq) ++ return; ++ cmd = host->cmd_is_stop ? mrq->stop : mrq->cmd; ++ ++ if (cmd->data && (cmd->error == 0) && ++ (cmd->data->error == 0)) { ++ if (ls2k_mci_host_usedma(host) && (!host->dma_complete)) { ++ dbg(host, dbg_dma, "DMA Missing (%d)!\n", ++ host->dma_complete); ++ return; ++ } ++ } ++ /* Read response from controller. */ ++ cmd->resp[0] = readl(host->base + SDIRSP0); ++ cmd->resp[1] = readl(host->base + SDIRSP1); ++ cmd->resp[2] = readl(host->base + SDIRSP2); ++ cmd->resp[3] = readl(host->base + SDIRSP3); ++ ++ if (cmd->error) ++ debug_as_failure = 1; ++ ++ if (cmd->data && cmd->data->error) ++ debug_as_failure = 1; ++ ++ /* Cleanup controller */ ++ writel(0, host->base + SDICMDARG); ++ writel(0, host->base + SDICMDCON); ++ clear_imask(host); ++ ++ if (cmd->data && cmd->error) ++ cmd->data->error = cmd->error; ++ ++ if (cmd->data && cmd->data->stop && (!host->cmd_is_stop)) { ++ host->cmd_is_stop = 1; ++ ls2k_mci_send_request(host->mmc); ++ return; ++ } ++ ++ /* If we have no data transfer we are finished here */ ++ if (!mrq->data) ++ goto request_done; ++ ++ /* Calculate the amout of bytes transfer if there was no error */ ++ if (mrq->data->error == 0) { ++ mrq->data->bytes_xfered = ++ (mrq->data->blocks * mrq->data->blksz); ++ } else { ++ mrq->data->bytes_xfered = 0; ++ } ++ ++ /* If we had an error while transferring data we flush the ++ * DMA channel and the fifo to clear out any garbage. ++ */ ++ if (mrq->data->error != 0) { ++ if (ls2k_mci_host_usedma(host)) ++ printk(" dbg-ms: ls2k_mci dma data error!\r\n"); ++ } ++ ++request_done: ++ host->complete_what = COMPLETION_NONE; ++ host->mrq = NULL; ++ mmc_request_done(host->mmc, mrq); ++} ++ ++#ifdef CONFIG_PREEMPT_RT ++static void pio_tasklet(unsigned long data) ++{ ++ struct ls2k_mci_host *host = (struct ls2k_mci_host *) data; ++ if (host->complete_what == COMPLETION_FINALIZE) { ++ spin_lock(&host->complete_lock); ++ clear_imask(host); ++ finalize_request(host); ++ spin_unlock(&host->complete_lock); ++ } ++} ++#else ++static void pio_tasklet(unsigned long data) ++{ ++ struct ls2k_mci_host *host = (struct ls2k_mci_host *) data; ++ ++ ls2k_mci_disable_irq(host, true); ++ ++ if (host->complete_what == COMPLETION_FINALIZE) { ++ clear_imask(host); ++ ++ ls2k_mci_enable_irq(host, false); ++ finalize_request(host); ++ } else ++ ls2k_mci_enable_irq(host, true); ++} ++#endif ++ ++static void ls2k_cmd_data_fix(struct ls2k_mci_host *host, ++ struct mmc_command *cmd) ++{ ++ struct mmc_data *mdata = cmd->data; ++ int i, j; ++ u32 *data; ++ ++ if (host->pdata->version == LOONGSON_SDIO_EMMC_VER_1_2) { ++ if (cmd->opcode != SD_SWITCH) ++ return; ++ } else { ++ if (host->app_cmd != SD_APP_SEND_SCR && ++ host->app_cmd != SD_APP_SEND_NUM_WR_BLKS && ++ host->app_cmd != SD_APP_SD_STATUS && ++ cmd->opcode != MMC_SEND_WRITE_PROT && ++ cmd->opcode != SD_SWITCH) ++ return; ++ } ++ if (!(cmd->flags & MMC_CMD_ADTC)) ++ return; ++ ++ for (i = 0; i < mdata->sg_len; i++) { ++ data = sg_virt(&mdata->sg[i]); ++ for (j = 0; j < (sg_dma_len(&mdata->sg[i]) / 4); j++) ++ if (cmd->opcode == SD_SWITCH) ++ data[j] = (bitrev8x4(data[j])); ++ else ++ data[j] = cpu_to_be32(data[j]); ++ } ++} ++ ++static irqreturn_t ls2k_mci_irq(int irq, void *dev_id) ++{ ++ struct ls2k_mci_host *host = dev_id; ++ struct mmc_command *cmd; ++ u32 mci_csta, mci_dsta, mci_imsk; ++ ++#ifdef CONFIG_PREEMPT_RT ++ spin_lock(&host->complete_lock); ++#endif ++ mci_csta = readl(host->base + SDICMDSTA); ++ mci_imsk = readl(host->base + SDIINTMSK); ++ mci_dsta = readl(host->base + SDIDSTA); ++#ifdef CONFIG_PREEMPT_RT ++ spin_unlock(&host->complete_lock); ++#endif ++ ++ if ((host->complete_what == COMPLETION_NONE) || ++ (host->complete_what == COMPLETION_FINALIZE)) { ++ host->status = "nothing to complete"; ++ clear_imask(host); ++ goto irq_out; ++ } ++ if (!host->mrq) { ++ host->status = "no active mrq"; ++ clear_imask(host); ++ goto irq_out; ++ } ++ ++ cmd = host->cmd_is_stop ? host->mrq->stop : host->mrq->cmd; ++ ++ if (!cmd) { ++ host->status = "no active cmd"; ++ clear_imask(host); ++ goto irq_out; ++ } ++ ++ cmd->error = 0; ++ ++ if (mci_imsk & SDIIMSK_CMDTIMEOUT) { ++ dbg(host, dbg_err, "CMDSTAT: error CMDTIMEOUT\n"); ++ cmd->error = -ETIMEDOUT; ++ host->status = "error: command timeout"; ++ goto fail_transfer; ++ } ++ ++ if ((mci_imsk & SDIIMSK_CMDSENT)) { ++ if (host->complete_what == COMPLETION_CMDSENT) { ++ host->status = "ok: command sent"; ++ goto close_transfer; ++ } ++ } ++ ++ if (mci_imsk & SDIIMSK_RESPONSECRC) { ++ if (cmd->flags & MMC_RSP_CRC) { ++ if (host->mrq->cmd->flags & MMC_RSP_136) { ++ dbg(host, dbg_irq, ++ "fixup: ignore CRC fail with long rsp\n"); ++ } ++ } ++ } ++ ++ if ((mci_imsk & SDIIMSK_CMDSENT)) { ++ if (host->complete_what == COMPLETION_RSPFIN) { ++ host->status = "ok: command response received"; ++ goto close_transfer; ++ } ++ if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN) ++ host->complete_what = COMPLETION_XFERFINISH; ++ } ++ ++ if (!cmd->data) ++ goto clear_status_bits; ++ ++ if (mci_imsk & SDIIMSK_RXCRCFAIL) { ++ dbg(host, dbg_err, "bad data crc (outgoing)\n"); ++ cmd->data->error = -EILSEQ; ++ host->status = "error: bad data crc (outgoing)"; ++ goto fail_transfer; ++ } ++ ++ if (mci_imsk & SDIIMSK_TXCRCFAIL) { ++ dbg(host, dbg_err, "bad data crc (incoming)\n"); ++ cmd->data->error = -EILSEQ; ++ host->status = "error: bad data crc (incoming)"; ++ goto fail_transfer; ++ } ++ ++ if (mci_imsk & SDIIMSK_DATATIMEOUT) { ++ dbg(host, dbg_err, "data timeout\n"); ++ cmd->data->error = -ETIMEDOUT; ++ host->status = "error: data timeout"; ++ goto fail_transfer; ++ } ++ ++ if ((mci_imsk & SDIIMSK_DATAFINISH)) { ++ if (host->complete_what == COMPLETION_XFERFINISH) { ++ host->status = "ok: data transfer completed"; ++ host->dma_complete = 1; ++ goto close_transfer; ++ } ++ ++ if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN) ++ host->complete_what = COMPLETION_RSPFIN; ++ } ++ ++clear_status_bits: ++ goto irq_out; ++ ++fail_transfer: ++ host->pio_active = XFER_NONE; ++ ++close_transfer: ++ host->complete_what = COMPLETION_FINALIZE; ++ ++ if (host->pdata->irq_fixup) ++ host->pdata->irq_fixup(host, cmd); ++ ++ writel(mci_imsk, host->base + SDIINTMSK); ++ clear_imask(host); ++ tasklet_schedule(&host->pio_tasklet); ++ if (cmd->data && cmd->data->sg) ++ dma_unmap_sg(mmc_dev(host->mmc), cmd->data->sg, cmd->data->sg_len, ++ (cmd->data->flags & MMC_DATA_WRITE) ? DMA_TO_DEVICE : DMA_FROM_DEVICE); ++ goto irq_out; ++ ++irq_out: ++ writel(mci_imsk, host->base + SDIINTMSK); ++ return IRQ_HANDLED; ++} ++ ++static void ls2k_mci_set_clk(struct ls2k_mci_host *host, struct mmc_ios *ios) ++{ ++ u32 mci_psc; ++ ++ /* Set clock */ ++ for (mci_psc = 1; mci_psc < 255; mci_psc++) { ++ host->real_rate = host->clk_rate / mci_psc; ++ ++ if (host->real_rate <= ios->clock) ++ break; ++ } ++ if (mci_psc > 255) ++ mci_psc = 255; ++ ++ host->prescaler = mci_psc; ++ writel(host->prescaler | SDIPRE_REVCLOCK, host->base + SDIPRE); ++ ++ /* If requested clock is 0, real_rate will be 0, too */ ++ if (ios->clock == 0) ++ host->real_rate = 0; ++} ++ ++static noinline void ++ls2k_mci_send_command(struct ls2k_mci_host *host, struct mmc_command *cmd) ++{ ++ u32 ccon; ++ ++ if (cmd->data) { ++ host->complete_what = COMPLETION_XFERFINISH_RSPFIN; ++ } else if (cmd->flags & MMC_RSP_PRESENT) ++ host->complete_what = COMPLETION_RSPFIN; ++ else ++ host->complete_what = COMPLETION_CMDSENT; ++ ++ writel(cmd->arg, host->base + SDICMDARG); ++ ccon = cmd->opcode & SDICMDCON_INDEX; ++ ccon |= SDICMDCON_SENDERHOST | SDICMDCON_CMDSTART; ++ ++ /* Emmc cmd6 do not need data transfer */ ++ if (host->pdata->version > LOONGSON_SDIO_EMMC_VER_1_0 && ++ cmd->opcode == SD_SWITCH && cmd->data) ++ ccon |= SDICMDCON_CMD6DATA; ++ ++ if (cmd->flags & MMC_RSP_PRESENT) ++ ccon |= SDICMDCON_WAITRSP; ++ ++ if (cmd->flags & MMC_RSP_136) ++ ccon |= SDICMDCON_LONGRSP; ++ writel(ccon, host->base + SDICMDCON); ++} ++ ++static int ls2k_mci_prepare_dma(struct ls2k_mci_host *host, struct mmc_data *data) ++{ ++ void __iomem *dma_order_reg; ++ int dma_len, i; ++ u64 dma_order; ++ int rw = data->flags & MMC_DATA_WRITE; ++ ++ dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, ++ rw ? DMA_TO_DEVICE : DMA_FROM_DEVICE); ++ if (dma_len == 0) ++ return -ENOMEM; ++ ++ host->dma_complete = 0; ++ host->dmatogo = dma_len; ++ ++ for (i = 0; i < dma_len; i++) { ++ host->sg_cpu[i].length = sg_dma_len(&data->sg[i]) / 4; ++ host->sg_cpu[i].step_length = 0; ++ host->sg_cpu[i].step_times = 1; ++ host->sg_cpu[i].saddr = sg_dma_address(&data->sg[i]); ++ host->sg_cpu[i].saddr_hi = ((sg_dma_address(&data->sg[i])) >> 32); ++ host->sg_cpu[i].daddr = host->phys_base+0x40; ++ if (data->flags & MMC_DATA_READ) { ++ host->sg_cpu[i].cmd = 0x1<<0; ++ dma_order_reg = host->rdma_order_reg; ++ } else { ++ host->sg_cpu[i].cmd = ((0x1<<12) | (0x1<<0)); ++ dma_order_reg = host->wdma_order_reg; ++ } ++ ++ host->sg_cpu[i].order_addr = host->sg_dma+(i+1)*sizeof(struct ls2k_dma_desc); ++ host->sg_cpu[i].order_addr_hi = ((host->sg_dma+(i+1)*sizeof(struct ls2k_dma_desc)) >> 32); ++ host->sg_cpu[i].order_addr |= 0x1<<0; ++ } ++ ++ host->sg_cpu[dma_len-1].order_addr &= ~(0x1<<0); ++ ++ dma_order = (readq(dma_order_reg) & 0xfUL) | ((host->sg_dma & ~0x1fUL) | 0x8UL); ++ ++ if (host->pdev->dev.coherent_dma_mask == DMA_BIT_MASK(64)) ++ dma_order |= 0x1UL; ++ else ++ dma_order &= ~0x1UL; ++ ++ if (host->pdata->version == LOONGSON_SDIO_EMMC_VER_1_0) ++ writeq(dma_order, dma_order_reg); ++ else { ++ writel(dma_order >> 32, dma_order_reg + 4); ++ writel(dma_order & 0xffffffff, dma_order_reg); ++ } ++ ++ return 0; ++} ++ ++static int ls2k_mci_setup_data(struct ls2k_mci_host *host, struct mmc_data *data) ++{ ++ u32 dcon; ++ ++ /* write DCON register */ ++ if (!data) { ++ writel(0, host->base + SDIDCON); ++ return 0; ++ } ++ ++ if ((data->blksz & 3) != 0) { ++ if (data->blocks > 1) ++ return -EINVAL; ++ } ++ ++ dcon = data->blocks & SDIDCON_BLKNUM_MASK; ++ if (host->bus_width == MMC_BUS_WIDTH_4) { ++ dcon |= SDIDCON_4BIT_BUS; ++ } else if (host->bus_width == MMC_BUS_WIDTH_8) { ++ dcon |= SDIDCON_8BIT_BUS; ++ } ++ ++ dcon |= 3 << 14; ++ writel(dcon, host->base + SDIDCON); ++ writel(data->blksz, host->base + SDIBSIZE); ++ ++ /* write TIMER register */ ++ writel(0xFFFFFFFF, host->base + SDITIMER); ++ ++ return 0; ++} ++ ++ ++static void ls2k_mci_set_dll(struct ls2k_mci_host *host, u32 dll) ++{ ++ //u32 value = (dll << 8); //only for rd dll value ++ u32 value = dll; ++ writel(0x30000000, host->base + 0xf4); //set rd dll ++ writel(value, host->base + 0xf8); ++} ++ ++ ++static void ls2k_mci_send_request(struct mmc_host *mmc) ++{ ++ int res; ++ struct ls2k_mci_host *host = mmc_priv(mmc); ++ struct mmc_request *mrq = host->mrq; ++ struct mmc_command *cmd = host->cmd_is_stop ? mrq->stop : mrq->cmd; ++ ++ host->ccnt++; ++ ++ if (cmd->data) { ++ host->dcnt++; ++ res = ls2k_mci_setup_data(host, cmd->data); ++ if (res) { ++ dbg(host, dbg_err, "setup data error %d\n", res); ++ cmd->error = res; ++ cmd->data->error = res; ++ mmc_request_done(mmc, mrq); ++ return; ++ } ++ res = ls2k_mci_prepare_dma(host, cmd->data); ++ if (res) { ++ dbg(host, dbg_err, "data prepare error %d\n", res); ++ cmd->error = res; ++ cmd->data->error = res; ++ mmc_request_done(mmc, mrq); ++ return; ++ } ++ } ++ ++#if 1 /* to solve 2k1500 emmc bug for losing interrupt when send cmd25 */ ++ u32 s_flag, t_flag, tmp; ++ int retry_n = 1000; ++ if (cmd->opcode == 0x19) { /*for cmd25 multiple blocks write */ ++ while (retry_n--) { ++ tmp = readl(host->base + 0x2c); ++ s_flag = tmp & (0x1 << 14); ++ tmp = readl(host->base + 0x38); ++ t_flag = tmp & (0x1 << 11); ++ ++ if (s_flag && t_flag) //tx fifo full ++ break; ++ if (retry_n < 500) ++ udelay(10); ++ } ++ if (retry_n < 0) ++ printk("Warning: may losing int when tx fifo is not full\n"); ++ } ++#endif ++ ++ /* Send command */ ++ ls2k_mci_send_command(host, cmd); ++ ++ /* Note the app cmd opcode */ ++ if (cmd->opcode == MMC_APP_CMD || host->app_cmd == MMC_APP_CMD) ++ host->app_cmd = cmd->opcode; ++ else ++ host->app_cmd = 0; ++ ++ /* Enable Interrupt */ ++ ls2k_mci_enable_irq(host, true); ++ ++ /* fix deselect card no irq */ ++ if (cmd->opcode == MMC_SELECT_CARD && cmd->arg == 0) { ++ cmd->error = 0; ++ mmc_request_done(mmc, mrq); ++ } ++} ++ ++static void ls2k_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) ++{ ++ struct ls2k_mci_host *host = mmc_priv(mmc); ++ struct platform_device *pdev = host->pdev; ++ u32 mci_con; ++ /* Set the power state */ ++ mci_con = readl(host->base + SDICON); ++ u32 dll; ++ int ret; ++ ++ ls2k_mci_disable_irq(host, true); ++ switch (ios->power_mode) { ++ case MMC_POWER_ON: ++ case MMC_POWER_UP: ++ writel(SDICON_RESET, host->base + SDICON); ++ mdelay(100); ++ writel(0x3, host->base + SDICON); ++ if (host->pdata->version >= LOONGSON_SDIO_EMMC_VER_1_1) ++ writel(SDIINT_CLEARALL, host->base + SDIINTMSK); ++ writel(SDIINT_ENALL, host->base + SDIINTEN); ++ break; ++ case MMC_POWER_OFF: ++ default: ++ mci_con |= SDICON_RESET; ++ break; ++ } ++ ls2k_mci_set_clk(host, ios); ++ ++ /* Set CLOCK_ENABLE */ ++ if (ios->clock) ++ mci_con |= SDICON_CLOCKTYPE; ++ writel(mci_con, host->base + SDICON); ++ ++#ifdef CONFIG_MMC_DEBUG ++ if ((ios->power_mode == MMC_POWER_ON) || ++ (ios->power_mode == MMC_POWER_UP)) { ++ dbg(host, dbg_conf, "running at %lukHz (requested: %ukHz).\n", ++ host->real_rate/1000, ios->clock/1000); ++ } else { ++ dbg(host, dbg_conf, "powered down.\n"); ++ } ++#endif ++ host->bus_width = ios->bus_width; ++ ++ ret = of_property_read_u32(pdev->dev.of_node, "dll", &dll); ++ if (ret == 0) ++ ls2k_mci_set_dll(host, dll); ++ mdelay(100); ++ ls2k_mci_enable_irq(host, true); ++} ++ ++static int ls2k_mci_card_present(struct mmc_host *mmc) ++{ ++ return 1; ++} ++ ++static void ls2k_mci_request(struct mmc_host *mmc, struct mmc_request *mrq) ++{ ++ struct ls2k_mci_host *host = mmc_priv(mmc); ++ host->status = "mmc request"; ++ host->cmd_is_stop = 0; ++ host->mrq = mrq; ++#if 1 ++ // 部分 SD 卡会读取 EXT-REG 触发 CMD48(SD_READ_EXTR_SINGLE) ++ // 然而 LS2K300 CMD48 丢失中断,故直接不发送 CMD48 规避该问题 ++ if (mrq->cmd->opcode == 48) ++ { ++ mmc_request_done(mmc, mrq); ++ return; ++ } ++#endif ++ if (ls2k_mci_card_present(mmc) == 0) { ++ dbg(host, dbg_err, "%s: no medium present\n", __func__); ++ host->mrq->cmd->error = -ENOMEDIUM; ++ mmc_request_done(mmc, mrq); ++ } else ++ ls2k_mci_send_request(mmc); ++} ++ ++static int ls2k_mci_get_ro(struct mmc_host *mmc) ++{ ++ return 0; ++} ++ ++static int ls2k_mci_gpio_get_cd(struct mmc_host *host) ++{ ++ int value; ++ int virq; ++ struct mmc_gpio *ctx; ++ ++ ctx = host->slot.handler_priv; ++ ++ value = mmc_gpio_get_cd(host); ++ ++ virq = gpiod_to_irq(ctx->cd_gpio); ++ ++ if (value == 0) ++ irq_set_irq_type(virq, IRQ_TYPE_EDGE_FALLING); ++ else ++ irq_set_irq_type(virq, IRQ_TYPE_EDGE_RISING); ++ ++ return value; ++} ++ ++static struct mmc_host_ops ls2k_mci_ops = { ++ .request = ls2k_mci_request, ++ .set_ios = ls2k_mci_set_ios, ++ .get_ro = ls2k_mci_get_ro, ++ .get_cd = ls2k_mci_gpio_get_cd, ++}; ++ ++static struct ls2k_mci_pdata ls2k_mci_v1_0_pdata = { ++ .no_wprotect = 0, ++ .no_detect = 0, ++ .irq_fixup = ls2k_cmd_data_fix, ++ .version = LOONGSON_SDIO_EMMC_VER_1_0, ++}; ++ ++static struct ls2k_mci_pdata ls2k_mci_v1_1_pdata = { ++ .irq_fixup = ls2k_cmd_data_fix, ++ .version = LOONGSON_SDIO_EMMC_VER_1_1, ++}; ++ ++static struct ls2k_mci_pdata ls2k_mci_v1_2_pdata = { ++ .irq_fixup = ls2k_cmd_data_fix, ++ .version = LOONGSON_SDIO_EMMC_VER_1_2, ++}; ++ ++static struct ls2k_mci_host *hotpug_host; ++static int ls2k_mci_hotplug_set(const char *val, const struct kernel_param *kp) ++{ ++ mmc_detect_change(hotpug_host->mmc, msecs_to_jiffies(500)); ++ return 0; ++} ++ ++module_param_call(hotplug, ls2k_mci_hotplug_set, NULL, NULL, 0664); ++ ++static int ls2k_mci_probe(struct platform_device *pdev) ++{ ++ struct ls2k_mci_host *host; ++ struct ls2k_mci_pdata *pdata; ++ struct mmc_host *mmc; ++ int ret, addr_cells; ++ unsigned long flags; ++ struct resource *r; ++ struct dma_chan *chan; ++ __be32 *of_property = NULL; ++ struct mmc_gpio *ctx; ++ int cd_gpio_num; ++ u64 val; ++ ++ if (dev_fwnode(&pdev->dev)) { ++ if (!device_property_read_u64(&pdev->dev, "dma-mask", ++ (u64 *)&pdev->dev.coherent_dma_mask)) { ++ if (pdev->dev.dma_mask) ++ *(pdev->dev.dma_mask) = pdev->dev.coherent_dma_mask; ++ else ++ pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask; ++ } ++ } ++ ++ mmc = mmc_alloc_host(sizeof(struct ls2k_mci_host), &pdev->dev); ++ if (!mmc) { ++ ret = -ENOMEM; ++ goto probe_free_host; ++ } ++ ++ host = mmc_priv(mmc); ++ host->mmc = mmc; ++ host->pdev = pdev; ++ ++ pdata = (struct ls2k_mci_pdata *)device_get_match_data(&pdev->dev); ++ if (!pdata) { ++ ret = -EINVAL; ++ goto probe_free_host; ++ } ++ ++ platform_device_add_data(pdev, pdata, sizeof(*pdata)); ++ host->pdata = pdata; ++ ++ spin_lock_init(&host->complete_lock); ++ tasklet_init(&host->pio_tasklet, pio_tasklet, (unsigned long) host); ++ host->sdiimsk = 0x3c; ++ host->sdidata = 0x40; ++ host->clk_div = 0x1; ++ host->clk_rate = DEF_CLKRATE; ++ host->complete_what = COMPLETION_NONE; ++ host->pio_active = XFER_NONE; ++ ++ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (r == NULL) { ++ dev_err(&pdev->dev, "no IO memory resource defined\n"); ++ ret = -ENODEV; ++ goto probe_free_host; ++ } ++ host->phys_base = r->start; ++ ++ if (r->start == LS2K1000_SDIO_REG_BASE) ++ cd_gpio_inten_base = (void *)LS2K1000_GPIO_INTEN_BASE; ++ else if (r->start == LS2K0500_SDIO0_REG_BASE) ++ cd_gpio_inten_base = (void *)LS2K0500_SDIO0_GPIO_INTEN_BASE; ++ else if (r->start == LS2K0500_SDIO1_REG_BASE) ++ cd_gpio_inten_base = (void *)LS2K0500_SDIO1_GPIO_INTEN_BASE; ++ ++ host->base = ioremap(r->start, r->end - r->start + 1); ++ ++ ret = of_property_read_u32(pdev->dev.of_node, "#address-cells", &addr_cells); ++ if (ret) { ++ dev_err(&pdev->dev, "missing #address-cells property\n"); ++ addr_cells = 1; ++ } ++ ++ chan = of_dma_request_slave_channel(pdev->dev.of_node, "sdio_rw"); ++ ++ if (IS_ERR(chan)) { ++ dev_info(&pdev->dev, "Use exclusive dma engine.\n"); ++ host->wdma_order_reg = host->base + WDMA_OFFSET; ++ host->rdma_order_reg = host->base + RDMA_OFFSET; ++ } else { ++ if (addr_cells == 2) { ++ of_property = (__be32 *)of_get_property(chan->device->dev->of_node, "reg", NULL); ++ if (of_property != 0) ++ r->start = of_read_number(of_property, 2); ++ } else { ++ of_property_read_u32(chan->device->dev->of_node, "reg", (u32 *)&r->start); ++ } ++ host->wdma_order_reg = ioremap(r->start, 8); ++ host->rdma_order_reg = host->wdma_order_reg; ++ } ++ ++ writel(SDICON_RESET, host->base + SDICON); ++ mdelay(1); ++ writel(SDIINT_ENALL, host->base + SDIINTEN); ++ writel(0x2, host->base + SDICON); ++ ++ host->irq = platform_get_irq(pdev, 0); ++ if (host->irq == 0) { ++ dev_err(&pdev->dev, "failed to get interrupt resouce.\n"); ++ ret = -EINVAL; ++ goto probe_iounmap; ++ } ++ ++ hotpug_host = host; ++ local_irq_save(flags); ++ if (request_irq(host->irq, ls2k_mci_irq, 0, DRIVER_NAME, host)) { ++ dev_err(&pdev->dev, "failed to request mci interrupt.\n"); ++ ret = -ENOENT; ++ goto probe_iounmap; ++ } ++ ++ disable_irq(host->irq); ++ host->irq_state = false; ++ local_irq_restore(flags); ++ ++ if (ls2k_mci_host_usedma(host)) { ++ host->dma = 0; ++ } ++ ++ host->sg_cpu = dma_alloc_coherent(&pdev->dev, 0x100*28, &host->sg_dma, GFP_KERNEL); ++ memset(host->sg_cpu, 0, 0x100*28); ++ ++ if (dev_fwnode(&pdev->dev)) { ++ device_property_read_u64(&pdev->dev, "clock-frequency", (u64 *)&host->clk_rate); ++ } ++ ++ mmc->ops = &ls2k_mci_ops; ++ mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34; ++ ++ mmc->f_min = host->clk_rate / (host->clk_div * 256); ++ mmc->f_max = host->clk_rate / host->clk_div; ++ ++ if (host->pdata->ocr_avail) ++ mmc->ocr_avail = host->pdata->ocr_avail; ++ ++ mmc->max_blk_count = 4095; ++ mmc->max_blk_size = 4095; ++ mmc->max_req_size = mmc->max_blk_count * mmc->max_blk_size; ++ mmc->max_segs = 1; ++ mmc->max_seg_size = mmc->max_req_size; ++ dbg(host, dbg_debug, "mapped mci_base:%p irq:%u irq_cd:%u dma:%u.\n", host->base, host->irq, host->irq_cd, host->dma); ++ ++ ret = mmc_of_parse(mmc); ++ if (ret) { ++ dev_err(mmc_dev(mmc), "failed to parse device node!\n"); ++ ret = -EINVAL; ++ goto probe_iounmap; ++ } ++ ++ ctx = mmc->slot.handler_priv; ++ ++ if (!(mmc->caps & MMC_CAP_NONREMOVABLE) && ++ !(mmc->caps & MMC_CAP_NEEDS_POLL) && cd_gpio_inten_base) { ++ cd_gpio_num = desc_to_gpio(ctx->cd_gpio); ++ local_irq_save(flags); ++ val = readq((void *)cd_gpio_inten_base); ++ val |= (0x1 << cd_gpio_num); ++ writeq(val, (void *)cd_gpio_inten_base); ++ local_irq_restore(flags); ++ ls2k_mci_gpio_get_cd(mmc); ++ } ++ ret = mmc_add_host(mmc); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to add mmc host.\n"); ++ goto free_cpufreq; ++ } ++ platform_set_drvdata(pdev, mmc); ++ ++ return 0; ++ ++free_cpufreq: ++ free_irq(host->irq, host); ++ ++probe_iounmap: ++ iounmap(host->base); ++ ++probe_free_host: ++ mmc_free_host(mmc); ++ return ret; ++} ++ ++static void ls2k_mci_shutdown(struct platform_device *pdev) ++{ ++ struct mmc_host *mmc = platform_get_drvdata(pdev); ++ ++ if (mmc->caps & MMC_CAP_NONREMOVABLE) ++ return; ++ ++ if (mmc->card) ++ mmc->card->state &= ~1; ++ ++ mmc_remove_host(mmc); ++} ++ ++static int ls2k_mci_remove(struct platform_device *pdev) ++{ ++ struct mmc_host *mmc = platform_get_drvdata(pdev); ++ struct ls2k_mci_host *host = mmc_priv(mmc); ++ ++ if (mmc->caps & MMC_CAP_NONREMOVABLE) ++ return 0; ++ ++ ls2k_mci_shutdown(pdev); ++ ++ ++ free_irq(host->irq, host); ++ ++ iounmap(host->base); ++ release_mem_region(host->mem->start, (host->mem->end - host->mem->start + 1)); ++ ++ mmc_free_host(mmc); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_OF ++static const struct of_device_id sdio_ls2k_dt_match[] = { ++ {.compatible = "loongson,ls2k_sdio", .data = &ls2k_mci_v1_0_pdata}, ++ {.compatible = "loongson,ls2k_sdio_1.1", .data = &ls2k_mci_v1_1_pdata}, ++ {.compatible = "loongson,ls2k_sdio_1.2", .data = &ls2k_mci_v1_2_pdata}, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, sdio_ls2k_dt_match); ++#endif ++ ++static struct platform_driver ls2k_mci_driver = { ++ .driver = { ++ .name = "ls2k_sdio", ++ .owner = THIS_MODULE, ++#ifdef CONFIG_OF ++ .of_match_table = of_match_ptr(sdio_ls2k_dt_match), ++#endif ++ }, ++ .probe = ls2k_mci_probe, ++ .remove = ls2k_mci_remove, ++ .shutdown = ls2k_mci_shutdown, ++}; ++ ++static int __init ls2k_mci_init(void) ++{ ++ return platform_driver_register(&ls2k_mci_driver); ++} ++ ++static void __exit ls2k_mci_exit(void) ++{ ++ platform_driver_unregister(&ls2k_mci_driver); ++} ++ ++module_init(ls2k_mci_init); ++module_exit(ls2k_mci_exit); ++static void ls2k_mci_pci_remove(struct pci_dev *pci) ++{ ++ struct platform_device *ls2k_mci = pci_get_drvdata(pci); ++ ++ platform_device_unregister(ls2k_mci); ++ pci_set_drvdata(pci, NULL); ++} ++static int ls2k_mci_pci_probe(struct pci_dev *pci, ++ const struct pci_device_id *id) ++{ ++ struct resource res[2]; ++ // struct platform_device_info plat_info; ++ struct platform_device *ls2k_mci; ++ int ret; ++ struct device *dev = &pci->dev; ++ ++ ret = pcim_enable_device(pci); ++ if (ret) { ++ dev_err(dev, "failed to enable pci device\n"); ++ return -ENODEV; ++ } ++ ++ pci_set_master(pci); ++ ++ memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res)); ++ res[0].start = pci_resource_start(pci, 0); ++ res[0].end = pci_resource_end(pci, 0); ++ res[0].name = "ls2k_sdio"; ++ res[0].flags = IORESOURCE_MEM; ++ res[1].start = pci->irq ? : of_irq_get(dev->of_node, 0); ++ res[1].name = "ls2k_sdio"; ++ res[1].flags = IORESOURCE_IRQ; ++ ++ ls2k_mci = platform_device_alloc("ls2k_sdio", PLATFORM_DEVID_AUTO); ++ ret = platform_device_add_resources(ls2k_mci, res, ARRAY_SIZE(res)); ++ if (ret) { ++ dev_err(dev, "couldn't add resources to ls2k_mci device\n"); ++ goto err; ++ } ++ ls2k_mci->dev.parent = dev; ++ ls2k_mci->dev.fwnode = dev->fwnode; ++ ls2k_mci->dev.of_node = of_node_get(dev->of_node); ++ if (dev->dma_mask) ++ ls2k_mci->dev.dma_mask = dev->dma_mask; ++ ls2k_mci->dev.coherent_dma_mask = dev->coherent_dma_mask; ++ ++ ret = platform_device_add(ls2k_mci); ++ ++ if (ret) { ++ dev_err(dev, "failed to register ls2k_mci device\n"); ++ goto err; ++ } ++ ++ pci_set_drvdata(pci, ls2k_mci); ++ ++ return 0; ++err: ++ platform_device_put(ls2k_mci); ++ return ret; ++} ++ ++static const struct pci_device_id ls2k_mci_pci_ids[] = { ++ { ++ PCI_VENDOR_ID_LOONGSON, 0x7a48 ++ }, { ++ PCI_VENDOR_ID_LOONGSON, 0x7a88 ++ }, { ++ /* end: all zeroes */ ++ } ++}; ++MODULE_DEVICE_TABLE(pci, ls2k_mci_pci_ids); ++static struct pci_driver ls2k_mci_pci_driver = { ++ .name = "ls2k_sdio", ++ .id_table = ls2k_mci_pci_ids, ++ .probe = ls2k_mci_pci_probe, ++ .remove = ls2k_mci_pci_remove, ++}; ++ ++module_pci_driver(ls2k_mci_pci_driver); ++ ++ ++MODULE_DESCRIPTION("Loongson ls2k MMC/SD Card Interface driver"); ++MODULE_LICENSE("GPL v2"); ++MODULE_AUTHOR(" Loongson kernel-development team"); +diff --git a/drivers/mmc/host/ls2kmci.h b/drivers/mmc/host/ls2kmci.h +new file mode 100644 +index 000000000..5340d0556 +--- /dev/null ++++ b/drivers/mmc/host/ls2kmci.h +@@ -0,0 +1,290 @@ ++/* ++ * linux/drivers/mmc/ls2k_mci.h - Loongson ls2k MCI driver ++ * ++ * Copyright (C) loongson, All Rights Reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef FCR_SDIO_H_ ++#define FCR_SDIO_H_ ++ ++#include ++ ++#define _REG(x) ((volatile u32 *)(x)) ++#define _REG2(b, o) ((volatile u32 *)((b)+(o))) ++ ++/* ++ * sdio_controler ++ */ ++#ifndef CONFIG_LOONGARCH ++#define LS2K1000_SDIO_REG_BASE 0x1fe0c000 ++#define LS2K1000_GPIO_INTEN_BASE TO_UNCACHE(0x1fe10530) ++#else ++#define LS2K1000_SDIO_REG_BASE 0x1fe2c000 ++#define LS2K1000_GPIO_INTEN_BASE TO_UNCACHE(0x1fe00530) ++#endif ++ ++#define LS2K0500_SDIO0_REG_BASE 0x1ff64000 ++#define LS2K0500_SDIO0_GPIO_INTEN_BASE TO_UNCACHE(0x1fe104e4) /* GPIO32~63 */ ++#define LS2K0500_SDIO1_REG_BASE 0x1ff66000 ++#define LS2K0500_SDIO1_GPIO_INTEN_BASE TO_UNCACHE(0x1fe104e8) /* GPIO64~95 */ ++ ++#define SDIO_DEV_ADDR (host->base+0x40) ++#define WDMA_OFFSET 0x400 ++#define RDMA_OFFSET 0x800 ++ ++#define SDICON 0x00 ++#define SDIPRE 0x04 ++#define SDICMDARG 0x08 ++#define SDICMDCON 0x0c ++#define SDICMDSTA 0x10 ++#define SDIRSP0 0x14 ++#define SDIRSP1 0x18 ++#define SDIRSP2 0x1C ++#define SDIRSP3 0x20 ++#define SDIDTIMER 0x24 ++#define SDIBSIZE 0x28 ++#define SDIDATCON 0x2C ++#define SDIDATCNT 0x30 ++#define SDIDSTA 0x34 ++#define SDIFSTA 0x38 ++#define SDIINTMSK 0x3C ++#define SDIWRDAT 0x40 ++#define SDISTAADD0 0x44 ++#define SDISTAADD1 0x48 ++#define SDISTAADD2 0x4c ++#define SDISTAADD3 0x50 ++#define SDISTAADD4 0x54 ++#define SDISTAADD5 0x58 ++#define SDISTAADD6 0x5c ++#define SDISTAADD7 0x60 ++#define SDIINTEN 0x64 ++ ++#define DAT_4_WIRE 1 ++#define ERASE_START_ADDR 0x5000 ++#define ERASE_End_ADDR 0x5000 ++ ++#define SDICMDSTAT (0x10) ++#define SDITIMER (0x24) ++#define SDIDCON (0x2C) ++#define SDIDCNT (0x30) ++ ++#define SDIDATA (0x3C) ++#define SDIIMSK (0x40) ++ ++#define SDICON_RESET (1<<8) ++#define SDICON_MMCCLOCK (1<<5) ++#define SDICON_BYTEORDER (1<<4) ++#define SDICON_SDIOIRQ (1<<3) ++#define SDICON_RWAITEN (1<<2) ++#define SDICON_FIFORESET (1<<1) ++#define SDICON_CLOCKTYPE (1<<0) ++ ++#define SDIPRE_REVCLOCK (1<<31) ++ ++#define SDICMDCON_CMD6DATA (1<<18) ++#define SDICMDCON_ABORT (1<<12) ++#define SDICMDCON_WITHDATA (1<<11) ++#define SDICMDCON_LONGRSP (1<<10) ++#define SDICMDCON_WAITRSP (1<<9) ++#define SDICMDCON_CMDSTART (1<<8) ++#define SDICMDCON_SENDERHOST (1<<6) ++#define SDICMDCON_INDEX (0x3f) ++ ++#define SDICMDSTAT_CRCFAIL (1<<12) ++#define SDICMDSTAT_CMDSENT (1<<11) ++#define SDICMDSTAT_CMDTIMEOUT (1<<10) ++#define SDICMDSTAT_RSPFIN (1<<9) ++#define SDICMDSTAT_XFERING (1<<8) ++#define SDICMDSTAT_INDEX (0xff) ++ ++#define SDIDCON_8BIT_BUS (1<<26) ++#define SDIDCON_IRQPERIOD (1<<21) ++#define SDIDCON_TXAFTERRESP (1<<20) ++#define SDIDCON_RXAFTERCMD (1<<19) ++#define SDIDCON_BUSYAFTERCMD (1<<18) ++#define SDIDCON_BLOCKMODE (1<<17) ++#define SDIDCON_4BIT_BUS (1<<16) ++#define MISC_CTRL_SDIO_DMAEN (1<<15) ++#define SDIDCON_STOP (1<<14) ++#define SDIDCON_DATMODE (3<<12) ++#define SDIDCON_BLKNUM (0x7ff) ++ ++/* constants for SDIDCON_DATMODE */ ++#define SDIDCON_XFER_READY (0<<12) ++#define SDIDCON_XFER_CHKSTART (1<<12) ++#define SDIDCON_XFER_RXSTART (2<<12) ++#define SDIDCON_XFER_TXSTART (3<<12) ++ ++#define SDIDCON_BLKNUM_MASK (0xFFF) ++#define SDIDCNT_BLKNUM_SHIFT (12) ++ ++#define SDIDSTA_RDYWAITREQ (1<<10) ++#define SDIDSTA_SDIOIRQDETECT (1<<9) ++#define SDIDSTA_FIFOFAIL (1<<8) ++#define SDIDSTA_CRCFAIL (1<<7) ++#define SDIDSTA_RXCRCFAIL (1<<6) ++#define SDIDSTA_DATATIMEOUT (1<<5) ++#define SDIDSTA_XFERFINISH (1<<4) ++#define SDIDSTA_BUSYFINISH (1<<3) ++#define SDIDSTA_SBITERR (1<<2) ++#define SDIDSTA_TXDATAON (1<<1) ++#define SDIDSTA_RXDATAON (1<<0) ++ ++#define SDIFSTA_TFDET (1<<13) ++#define SDIFSTA_RFDET (1<<12) ++#define SDIFSTA_TFFULL (1<<11) ++#define SDIFSTA_TFEMPTY (1<<10) ++#define SDIFSTA_RFLAST (1<<9) ++#define SDIFSTA_RFFULL (1<<8) ++#define SDIFSTA_RFEMPTY (1<<7) ++#define SDIFSTA_COUNTMASK (0x7f) ++ ++#define SDIIMSK_RESPONSEND (1<<14) ++#define SDIIMSK_READWAIT (1<<13) ++#define SDIIMSK_SDIOIRQ (1<<12) ++#define SDIIMSK_FIFOFAIL (1<<11) ++ ++ ++#define SDIIMSK_RESPONSECRC (1<<8) ++#define SDIIMSK_CMDTIMEOUT (1<<7) ++#define SDIIMSK_CMDSENT (1<<6) ++#define SDIIMSK_PROGERR (1<<4) ++#define SDIIMSK_TXCRCFAIL (1<<3) ++#define SDIIMSK_RXCRCFAIL (1<<2) ++#define SDIIMSK_DATATIMEOUT (1<<1) ++#define SDIIMSK_DATAFINISH (1<<0) ++ ++#define SDIIMSK_BUSYFINISH (1<<6) ++#define SDIIMSK_SBITERR (1<<5) ++#define SDIIMSK_TXFIFOHALF (1<<4) ++#define SDIIMSK_TXFIFOEMPTY (1<<3) ++#define SDIIMSK_RXFIFOLAST (1<<2) ++#define SDIIMSK_RXFIFOFULL (1<<1) ++#define SDIIMSK_RXFIFOHALF (1<<0) ++ ++#define SDIINT_CLEARALL 0x1ff ++#define SDIINT_ENALL 0x1ff ++ ++#define nr_strtol strtoul ++ ++enum ls2k_mci_waitfor { ++ COMPLETION_NONE, ++ COMPLETION_FINALIZE, ++ COMPLETION_CMDSENT, ++ COMPLETION_RSPFIN, ++ COMPLETION_XFERFINISH, ++ COMPLETION_XFERFINISH_RSPFIN, ++}; ++ ++typedef struct ls2k_dma_desc{ ++ volatile u32 order_addr; ++ volatile u32 saddr; ++ volatile u32 daddr; ++ volatile u32 length; ++ volatile u32 step_length; ++ volatile u32 step_times; ++ volatile u32 cmd; ++ volatile u32 dummy; ++ volatile u32 order_addr_hi; ++ volatile u32 saddr_hi; ++} ls2k_dma_desc; ++ ++struct ls2k_mci_host { ++ struct platform_device *pdev; ++ struct ls2k_mci_pdata *pdata; ++ struct mmc_host *mmc; ++ struct resource *mem; ++ struct clk *clk; ++ void __iomem *base; ++ dma_addr_t phys_base; ++ void __iomem *wdma_order_reg; ++ void __iomem *rdma_order_reg; ++ int irq; ++ int irq_cd; ++ int dma; ++ unsigned long dma_send_vir_mem; ++ unsigned long dma_send_phy_mem; ++ unsigned long dma_rec_vir_mem; ++ unsigned long dma_rec_phy_mem; ++ struct ls2k_dma_desc *sg_cpu; ++ dma_addr_t sg_dma; ++ ++ unsigned long clk_rate; ++ unsigned long clk_div; ++ unsigned long real_rate; ++ u8 prescaler; ++ ++ int is2440; ++ unsigned sdiimsk; ++ unsigned sdidata; ++ int dodma; ++ int dmatogo; ++ ++ bool irq_disabled; ++ bool irq_enabled; ++ bool irq_state; ++ int sdio_irqen; ++ ++ struct mmc_request *mrq; ++ int cmd_is_stop; ++ ++ spinlock_t complete_lock; ++ enum ls2k_mci_waitfor complete_what; ++ ++ int dma_complete; ++ ++ u32 pio_sgptr; ++ u32 pio_bytes; ++ u32 pio_count; ++ u32 *pio_ptr; ++#define XFER_NONE 0 ++#define XFER_READ 1 ++#define XFER_WRITE 2 ++ u32 pio_active; ++ ++ int bus_width; ++ ++ char dbgmsg_cmd[301]; ++ char dbgmsg_dat[301]; ++ char *status; ++ ++ unsigned int ccnt, dcnt; ++ struct tasklet_struct pio_tasklet; ++ ++#ifdef CONFIG_DEBUG_FS ++ struct dentry *debug_root; ++ struct dentry *debug_state; ++ struct dentry *debug_regs; ++#endif ++ ++#ifdef CONFIG_CPU_FREQ ++ struct notifier_block freq_transition; ++#endif ++ struct dma_chan *chan; ++ unsigned int app_cmd; ++}; ++ ++struct ls2k_mci_pdata { ++ unsigned int no_wprotect : 1; ++ unsigned int no_detect : 1; ++ unsigned int wprotect_invert : 1; ++ unsigned int detect_invert : 1; /* set => detect active high. */ ++ unsigned int use_dma : 1; ++ ++ unsigned int gpio_detect; ++ unsigned int gpio_wprotect; ++#define LOONGSON_SDIO_EMMC_VER_1_0 0x100 ++#define LOONGSON_SDIO_EMMC_VER_1_1 0x110 ++#define LOONGSON_SDIO_EMMC_VER_1_2 0x120 ++ unsigned int version; ++ unsigned long ocr_avail; ++ void (*set_power)(unsigned char power_mode, ++ unsigned short vdd); ++ void (*irq_fixup)(struct ls2k_mci_host *host, ++ struct mmc_command *cmd); ++}; ++#endif +-- +2.49.0 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0009-fix-pci.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0009-fix-pci.patch new file mode 100644 index 0000000000000000000000000000000000000000..40ad62a335bda0aab0793c9a2297053efd072dac --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0009-fix-pci.patch @@ -0,0 +1,25 @@ +From eac87a5fdae929373d5755249c51880ab119de4e Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:14:10 +0800 +Subject: [PATCH 09/17] fix pci + +--- + drivers/pci/pci.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c +index 564b26a95..7c10694a0 100644 +--- a/drivers/pci/pci.c ++++ b/drivers/pci/pci.c +@@ -178,7 +178,7 @@ static bool pci_bridge_d3_force; + #ifdef CONFIG_MACH_LOONGSON64 + + #ifndef CONFIG_PM_SLEEP +-suspend_state_t pm_suspend_target_state; ++//suspend_state_t pm_suspend_target_state; + #define pm_suspend_target_state (PM_SUSPEND_ON) + #endif + +-- +2.49.0 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0010-add-loongson-pwm-support.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0010-add-loongson-pwm-support.patch new file mode 100644 index 0000000000000000000000000000000000000000..69905b5a5810290ee71421bb544a46525bae1f06 --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0010-add-loongson-pwm-support.patch @@ -0,0 +1,1207 @@ +From 4ebc67c93c71892d0b48bba0e5350f1dec490fc5 Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:14:34 +0800 +Subject: [PATCH 10/17] add loongson pwm support + +--- + drivers/pwm/Kconfig | 21 + + drivers/pwm/Makefile | 2 + + drivers/pwm/pwm-loongson.c | 364 ++++++++++++++++++ + drivers/pwm/pwm-ls-timer.c | 769 +++++++++++++++++++++++++++++++++++++ + 4 files changed, 1156 insertions(+) + create mode 100644 drivers/pwm/pwm-loongson.c + create mode 100644 drivers/pwm/pwm-ls-timer.c + +diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig +index 8ebcddf91..bf3413c2b 100644 +--- a/drivers/pwm/Kconfig ++++ b/drivers/pwm/Kconfig +@@ -314,6 +314,27 @@ config PWM_KEEMBAY + To compile this driver as a module, choose M here: the module + will be called pwm-keembay. + ++config PWM_LOONGSON ++ tristate "Loongson PWM support" ++ depends on MACH_LOONGSON64 || COMPILE_TEST ++ depends on COMMON_CLK ++ help ++ Generic PWM framework driver for Loongson family. ++ It can be found on Loongson-2K series cpus and Loongson LS7A ++ bridge chips. ++ ++ To compile this driver as a module, choose M here: the module ++ will be called pwm-loongson. ++ ++config PWM_LOONGSON_TIMER ++ tristate "Loongson Timer PWM support" ++ depends on MFD_LS_TIMERS || COMPILE_TEST ++ help ++ Timer PWM framework driver for loongson2k. ++ ++ To compile this driver as a module, choose M here: the module ++ will be called pwm-ls-timer. ++ + config PWM_LP3943 + tristate "TI/National Semiconductor LP3943 PWM support" + depends on MFD_LP3943 +diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile +index c822389c2..60ffd4747 100644 +--- a/drivers/pwm/Makefile ++++ b/drivers/pwm/Makefile +@@ -27,6 +27,8 @@ obj-$(CONFIG_PWM_INTEL_LGM) += pwm-intel-lgm.o + obj-$(CONFIG_PWM_IQS620A) += pwm-iqs620a.o + obj-$(CONFIG_PWM_JZ4740) += pwm-jz4740.o + obj-$(CONFIG_PWM_KEEMBAY) += pwm-keembay.o ++obj-$(CONFIG_PWM_LOONGSON) += pwm-loongson.o ++obj-$(CONFIG_PWM_LOONGSON_TIMER) += pwm-ls-timer.o + obj-$(CONFIG_PWM_LP3943) += pwm-lp3943.o + obj-$(CONFIG_PWM_LPC18XX_SCT) += pwm-lpc18xx-sct.o + obj-$(CONFIG_PWM_LPC32XX) += pwm-lpc32xx.o +diff --git a/drivers/pwm/pwm-loongson.c b/drivers/pwm/pwm-loongson.c +new file mode 100644 +index 000000000..068a87624 +--- /dev/null ++++ b/drivers/pwm/pwm-loongson.c +@@ -0,0 +1,364 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* Loongson PWM registers */ ++#define LOONGSON_PWM_REG_DUTY 0x4 /* Low Pulse Buffer Register */ ++#define LOONGSON_PWM_REG_PERIOD 0x8 /* Pulse Period Buffer Register */ ++#define LOONGSON_PWM_REG_CTRL 0xc /* Control Register */ ++ ++/* Control register bits */ ++#define LOONGSON_PWM_CTRL_EN BIT(0) /* Counter Enable Bit */ ++#define LOONGSON_PWM_CTRL_OE BIT(3) /* Pulse Output Enable Control Bit, Valid Low */ ++#define LOONGSON_PWM_CTRL_SINGLE BIT(4) /* Single Pulse Control Bit */ ++#define LOONGSON_PWM_CTRL_INTE BIT(5) /* Interrupt Enable Bit */ ++#define LOONGSON_PWM_CTRL_INT BIT(6) /* Interrupt Bit */ ++#define LOONGSON_PWM_CTRL_RST BIT(7) /* Counter Reset Bit */ ++#define LOONGSON_PWM_CTRL_CAPTE BIT(8) /* Measurement Pulse Enable Bit */ ++#define LOONGSON_PWM_CTRL_INVERT BIT(9) /* Output flip-flop Enable Bit */ ++#define LOONGSON_PWM_CTRL_DZONE BIT(10) /* Anti-dead Zone Enable Bit */ ++ ++/* default input clk frequency for the ACPI case */ ++#define LOONGSON_PWM_FREQ_DEFAULT 50000000 /* Hz */ ++ ++struct pwm_loongson_suspend_store { ++ u32 ctrl; ++ u32 duty; ++ u32 period; ++}; ++ ++struct pwm_loongson_ddata { ++ struct pwm_chip chip; ++ struct clk *clk; ++ void __iomem *base; ++ u32 irq; ++ u32 int_count; ++ u64 clk_rate; ++ struct pwm_loongson_suspend_store lss; ++}; ++ ++static inline struct pwm_loongson_ddata *to_loongson_pwm_chip(struct pwm_chip *chip) ++{ ++ return container_of(chip, struct pwm_loongson_ddata, chip); ++} ++ ++static int pwm_loongson_capture(struct pwm_chip *chip, struct pwm_device *pwm, ++ struct pwm_capture *result, ++ unsigned long timeout) ++{ ++ u32 val; ++ struct pwm_loongson_ddata *ddata = to_loongson_pwm_chip(chip); ++ struct device *dev = ddata->chip.dev; ++ int ret; ++ ++ writel(0, ddata->base+LOONGSON_PWM_REG_PERIOD); ++ ++ val = readl(ddata->base+LOONGSON_PWM_REG_CTRL); ++ val |= LOONGSON_PWM_CTRL_EN | LOONGSON_PWM_CTRL_CAPTE | ++ LOONGSON_PWM_CTRL_OE; ++ writel(val, ddata->base+LOONGSON_PWM_REG_CTRL); ++ ret = readl_poll_timeout(ddata->base + LOONGSON_PWM_REG_PERIOD, val, ++ val, 10, timeout * 1000); ++ if (ret < 0) ++ return -ETIMEDOUT; ++ ++ dev_dbg(dev, "get first period: %u\n", val); ++ ++ usleep_range(val * 4 / 100 + 1, val * 4 / 100 + 2); ++ ++ val = readl(ddata->base+LOONGSON_PWM_REG_PERIOD); ++ result->period = DIV64_U64_ROUND_UP((u64)val * NSEC_PER_SEC, ddata->clk_rate); ++ dev_dbg(dev, "get second period: %u\n", val); ++ val = readl(ddata->base+LOONGSON_PWM_REG_DUTY); ++ result->duty_cycle = DIV64_U64_ROUND_UP((u64)val * NSEC_PER_SEC, ddata->clk_rate); ++ ++ val = readl(ddata->base+LOONGSON_PWM_REG_CTRL); ++ val &= ~(LOONGSON_PWM_CTRL_EN | LOONGSON_PWM_CTRL_CAPTE | ++ LOONGSON_PWM_CTRL_OE); ++ writel(val, ddata->base+LOONGSON_PWM_REG_CTRL); ++ ++ return 0; ++} ++ ++ ++static int pwm_loongson_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm, ++ enum pwm_polarity polarity) ++{ ++ u16 val; ++ struct pwm_loongson_ddata *ddata = to_loongson_pwm_chip(chip); ++ ++ val = readl(ddata->base+LOONGSON_PWM_REG_CTRL); ++ ++ if (polarity == PWM_POLARITY_INVERSED) ++ /* Duty cycle defines LOW period of PWM */ ++ val &= ~LOONGSON_PWM_CTRL_INVERT; ++ else ++ /* Duty cycle defines HIGH period of PWM */ ++ val |= LOONGSON_PWM_CTRL_INVERT; ++ ++ writel(val, ddata->base+LOONGSON_PWM_REG_CTRL); ++ ++ return 0; ++} ++ ++static void pwm_loongson_disable(struct pwm_chip *chip, struct pwm_device *pwm) ++{ ++ u32 val; ++ u32 duty; ++ u32 period; ++ u32 period_1000ns; ++ struct pwm_loongson_ddata *ddata = to_loongson_pwm_chip(chip); ++ ++ duty = readl(ddata->base+LOONGSON_PWM_REG_DUTY); ++ period = readl(ddata->base+LOONGSON_PWM_REG_PERIOD); ++ ++ period_1000ns = mul_u64_u64_div_u64(1000, ddata->clk_rate, NSEC_PER_SEC); ++ writel(1, ddata->base+LOONGSON_PWM_REG_DUTY); ++ writel(period_1000ns, ddata->base+LOONGSON_PWM_REG_PERIOD); ++ val = readl(ddata->base+LOONGSON_PWM_REG_CTRL); ++ val |= LOONGSON_PWM_CTRL_RST; ++ writel(val, ddata->base+LOONGSON_PWM_REG_CTRL); ++ val ^= LOONGSON_PWM_CTRL_RST; ++ writel(val, ddata->base+LOONGSON_PWM_REG_CTRL); ++ ++ ndelay(1000); ++ ++ val = readl(ddata->base+LOONGSON_PWM_REG_CTRL); ++ val &= ~LOONGSON_PWM_CTRL_EN; ++ writel(val, ddata->base+LOONGSON_PWM_REG_CTRL); ++ ++ writel(duty, ddata->base+LOONGSON_PWM_REG_DUTY); ++ writel(period, ddata->base+LOONGSON_PWM_REG_PERIOD); ++} ++ ++static int pwm_loongson_enable(struct pwm_chip *chip, struct pwm_device *pwm) ++{ ++ u32 val; ++ struct pwm_loongson_ddata *ddata = to_loongson_pwm_chip(chip); ++ ++ val = readl(ddata->base+LOONGSON_PWM_REG_CTRL); ++ val |= LOONGSON_PWM_CTRL_EN; ++ writel(val, ddata->base+LOONGSON_PWM_REG_CTRL); ++ ++ return 0; ++} ++ ++static int pwm_loongson_config(struct pwm_chip *chip, struct pwm_device *pwm, ++ u64 duty_ns, u64 period_ns) ++{ ++ u32 duty, period; ++ struct pwm_loongson_ddata *ddata = to_loongson_pwm_chip(chip); ++ ++ /* duty = duty_ns * ddata->clk_rate / NSEC_PER_SEC */ ++ duty = mul_u64_u64_div_u64(duty_ns, ddata->clk_rate, NSEC_PER_SEC); ++ writel(duty, ddata->base+LOONGSON_PWM_REG_DUTY); ++ ++ /* period = period_ns * ddata->clk_rate / NSEC_PER_SEC */ ++ period = mul_u64_u64_div_u64(period_ns, ddata->clk_rate, NSEC_PER_SEC); ++ writel(period, ddata->base+LOONGSON_PWM_REG_PERIOD); ++ ++ return 0; ++} ++ ++static int pwm_loongson_apply(struct pwm_chip *chip, struct pwm_device *pwm, ++ const struct pwm_state *state) ++{ ++ int ret; ++ u64 period, duty_cycle; ++ bool enabled = pwm->state.enabled; ++ ++ if (!state->enabled) { ++ if (enabled) ++ pwm_loongson_disable(chip, pwm); ++ return 0; ++ } ++ ++ ret = pwm_loongson_set_polarity(chip, pwm, state->polarity); ++ if (ret) ++ return ret; ++ ++ period = min(state->period, NSEC_PER_SEC); ++ duty_cycle = min(state->duty_cycle, NSEC_PER_SEC); ++ ++ ret = pwm_loongson_config(chip, pwm, duty_cycle, period); ++ if (ret) ++ return ret; ++ ++ if (!enabled && state->enabled) ++ ret = pwm_loongson_enable(chip, pwm); ++ ++ return ret; ++} ++ ++static int pwm_loongson_get_state(struct pwm_chip *chip, struct pwm_device *pwm, ++ struct pwm_state *state) ++{ ++ u32 duty, period, ctrl; ++ struct pwm_loongson_ddata *ddata = to_loongson_pwm_chip(chip); ++ ++ duty = readl(ddata->base+LOONGSON_PWM_REG_DUTY); ++ period = readl(ddata->base+LOONGSON_PWM_REG_PERIOD); ++ ctrl = readl(ddata->base+LOONGSON_PWM_REG_CTRL); ++ ++ /* duty & period have a max of 2^32, so we can't overflow */ ++ state->duty_cycle = DIV64_U64_ROUND_UP((u64)duty * NSEC_PER_SEC, ddata->clk_rate); ++ state->period = DIV64_U64_ROUND_UP((u64)period * NSEC_PER_SEC, ddata->clk_rate); ++ state->polarity = (ctrl & LOONGSON_PWM_CTRL_INVERT) ? PWM_POLARITY_NORMAL : ++ PWM_POLARITY_INVERSED; ++ state->enabled = (ctrl & LOONGSON_PWM_CTRL_EN) ? true : false; ++ ++ return 0; ++} ++ ++static const struct pwm_ops pwm_loongson_ops = { ++ .capture = pwm_loongson_capture, ++ .apply = pwm_loongson_apply, ++ .get_state = pwm_loongson_get_state, ++}; ++ ++static irqreturn_t pwm_loongson_isr(int irq, void *dev) ++{ ++ u32 val; ++ struct pwm_loongson_ddata *ddata = dev_get_drvdata(dev); ++ ++ val = readl(ddata->base+LOONGSON_PWM_REG_CTRL); ++ if ((val & LOONGSON_PWM_CTRL_INT) == 0) { ++ return IRQ_NONE; ++ } ++ val |= LOONGSON_PWM_CTRL_INT; ++ writel(val, ddata->base+LOONGSON_PWM_REG_CTRL); ++ ++ ddata->int_count++; ++ ++ dev_info(dev, "pwm_loongson_isr count %u\n", ddata->int_count); ++ ++ return IRQ_HANDLED; ++} ++ ++static int pwm_loongson_probe(struct platform_device *pdev) ++{ ++ int ret; ++ struct pwm_loongson_ddata *ddata; ++ struct device *dev = &pdev->dev; ++ struct device_node *np = dev->of_node; ++ u32 of_clk_freq = 0; ++ u32 irq; ++ ++ ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL); ++ if(!ddata) ++ { ++ return -ENOMEM; ++ } ++ ++ ddata->base = devm_platform_ioremap_resource(pdev, 0); ++ if (IS_ERR(ddata->base)) ++ return PTR_ERR(ddata->base); ++ ++ ddata->clk = devm_clk_get_optional_enabled(dev, NULL); ++ if (IS_ERR(ddata->clk)) ++ return dev_err_probe(dev, PTR_ERR(ddata->clk), ++ "failed to get pwm clock\n"); ++ ddata->clk_rate = LOONGSON_PWM_FREQ_DEFAULT; ++ if (ddata->clk) { ++ ret = devm_clk_rate_exclusive_get(dev, ddata->clk); ++ if (ret) ++ return ret; ++ ++ ddata->clk_rate = clk_get_rate(ddata->clk); ++ } else { ++#ifdef CONFIG_OF ++ if (!of_property_read_u32(np, "clock-frequency", &of_clk_freq)) ++ ddata->clk_rate = of_clk_freq; ++#endif ++ } ++ ++ irq = platform_get_irq(pdev, 0); ++ dev_info(dev, "irq get:%u\n", irq); ++ if (irq <= 0) { ++ dev_err(&pdev->dev, "no irq resource?\n"); ++ return -ENODEV; ++ } ++ ++ ddata->irq = irq; ++ ++ ret = devm_request_irq(dev, ddata->irq, pwm_loongson_isr, IRQF_SHARED, ++ dev_name(dev), dev); ++ ++ if (ret) ++ dev_err(dev, "failure requesting irq %d\n", ret); ++ ++ /* Explicitly initialize the CTRL register */ ++ writel(0, ddata->base+LOONGSON_PWM_REG_CTRL); ++ ++ ddata->chip.dev = &pdev->dev; ++ ddata->chip.ops = &pwm_loongson_ops; ++ ddata->chip.npwm = 1; ++ ++ ret = devm_pwmchip_add(dev, &ddata->chip); ++ if (ret < 0) ++ return dev_err_probe(dev, ret, "failed to add PWM chip\n"); ++ ++ return 0; ++} ++ ++static int pwm_loongson_suspend(struct device *dev) ++{ ++ struct pwm_loongson_ddata *ddata = dev_get_drvdata(dev); ++ ++ ddata->lss.ctrl = readl(ddata->base+LOONGSON_PWM_REG_CTRL); ++ ddata->lss.duty = readl(ddata->base+LOONGSON_PWM_REG_DUTY); ++ ddata->lss.period = readl(ddata->base+LOONGSON_PWM_REG_PERIOD); ++ ++ clk_disable_unprepare(ddata->clk); ++ return 0; ++} ++ ++static int pwm_loongson_resume(struct device *dev) ++{ ++ int ret; ++ struct pwm_loongson_ddata *ddata = dev_get_drvdata(dev); ++ ++ ret = clk_prepare_enable(ddata->clk); ++ if (ret) ++ return ret; ++ ++ writel(ddata->lss.ctrl, ddata->base+LOONGSON_PWM_REG_CTRL); ++ writel(ddata->lss.duty, ddata->base+LOONGSON_PWM_REG_DUTY); ++ writel(ddata->lss.period, ddata->base+LOONGSON_PWM_REG_PERIOD); ++ ++ return 0; ++} ++ ++static DEFINE_SIMPLE_DEV_PM_OPS(pwm_loongson_pm_ops, pwm_loongson_suspend, ++ pwm_loongson_resume); ++ ++static const struct of_device_id pwm_loongson_of_ids[] = { ++ { .compatible = "loongson,ls2k-pwm" }, ++ { /* sentinel */ }, ++}; ++MODULE_DEVICE_TABLE(of, pwm_loongson_of_ids); ++ ++static struct platform_driver pwm_loongson_driver = { ++ .probe = pwm_loongson_probe, ++ .driver = { ++ .name = "loongson-pwm", ++ .pm = pm_ptr(&pwm_loongson_pm_ops), ++ .of_match_table = pwm_loongson_of_ids, ++ }, ++}; ++module_platform_driver(pwm_loongson_driver); ++ ++MODULE_DESCRIPTION("Loongson PWM driver"); ++MODULE_AUTHOR("Loongson Technology Corporation Limited."); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/pwm/pwm-ls-timer.c b/drivers/pwm/pwm-ls-timer.c +new file mode 100644 +index 000000000..7488a5a8d +--- /dev/null ++++ b/drivers/pwm/pwm-ls-timer.c +@@ -0,0 +1,769 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define CCMR_CHANNEL_SHIFT 8 ++#define CCMR_CHANNEL_MASK 0xFF ++#define MAX_BREAKINPUT 2 ++ ++struct loongson_breakinput { ++ u32 index; ++ u32 level; ++ u32 filter; ++}; ++ ++struct loongson_pwm { ++ struct pwm_chip chip; ++ struct mutex lock; /* protect pwm config/enable */ ++ struct clk *clk; ++ struct regmap *regmap; ++ u32 max_arr; ++ bool have_complementary_output; ++ struct loongson_breakinput breakinputs[MAX_BREAKINPUT]; ++ unsigned int num_breakinputs; ++ u32 capture[6] ____cacheline_aligned; /* DMA'able buffer */ ++}; ++ ++#define CCMR_CHANNEL_SHIFT 8 ++#define CCMR_CHANNEL_MASK 0xFF ++#define MAX_BREAKINPUT 2 ++ ++#define TIM_CCER_CC12P (TIM_CCER_CC1P | TIM_CCER_CC2P) ++#define TIM_CCER_CC12E (TIM_CCER_CC1E | TIM_CCER_CC2E) ++#define TIM_CCER_CC34P (TIM_CCER_CC3P | TIM_CCER_CC4P) ++#define TIM_CCER_CC34E (TIM_CCER_CC3E | TIM_CCER_CC4E) ++ ++static u32 active_channels(struct loongson_pwm *dev) ++{ ++ u32 ccer; ++ ++ regmap_read(dev->regmap, TIM_CCER, &ccer); ++ ++ return ccer & TIM_CCER_CCXE; ++} ++ ++static inline struct device *pwmchip_parent(const struct pwm_chip *chip) ++{ ++ return chip->dev->parent; ++} ++ ++static inline struct loongson_pwm *to_loongson_pwm(struct pwm_chip *chip) ++{ ++ return container_of(chip, struct loongson_pwm, chip); ++} ++ ++static unsigned int loongson_pwm_detect_channels(struct regmap *regmap, ++ unsigned int *num_enabled) ++{ ++ u32 ccer, ccer_backup; ++ ++ /* ++ * If channels enable bits don't exist writing 1 will have no ++ * effect so we can detect and count them. ++ */ ++ regmap_read(regmap, TIM_CCER, &ccer_backup); ++ regmap_set_bits(regmap, TIM_CCER, TIM_CCER_CCXE); ++ regmap_read(regmap, TIM_CCER, &ccer); ++ regmap_write(regmap, TIM_CCER, ccer_backup); ++ ++ *num_enabled = hweight32(ccer_backup & TIM_CCER_CCXE); ++ ++ return hweight32(ccer & TIM_CCER_CCXE); ++} ++ ++/* ++ * Capture using PWM input mode: ++ * ___ ___ ++ * TI[1, 2, 3 or 4]: ........._| |________| ++ * ^0 ^1 ^2 ++ * . . . ++ * . . XXXXX ++ * . . XXXXX | ++ * . XXXXX . | ++ * XXXXX . . | ++ * COUNTER: ______XXXXX . . . |_XXX ++ * start^ . . . ^stop ++ * . . . . ++ * v v . v ++ * v ++ * CCR1/CCR3: tx..........t0...........t2 ++ * CCR2/CCR4: tx..............t1......... ++ * ++ * DMA burst transfer: | | ++ * v v ++ * DMA buffer: { t0, tx } { t2, t1 } ++ * DMA done: ^ ++ * ++ * 0: IC1/3 snapchot on rising edge: counter value -> CCR1/CCR3 ++ * + DMA transfer CCR[1/3] & CCR[2/4] values (t0, tx: doesn't care) ++ * 1: IC2/4 snapchot on falling edge: counter value -> CCR2/CCR4 ++ * 2: IC1/3 snapchot on rising edge: counter value -> CCR1/CCR3 ++ * + DMA transfer CCR[1/3] & CCR[2/4] values (t2, t1) ++ * ++ * DMA done, compute: ++ * - Period = t2 - t0 ++ * - Duty cycle = t1 - t0 ++ */ ++static int loongson_pwm_raw_capture(struct pwm_chip *chip, struct pwm_device *pwm, ++ unsigned long tmo_ms, u32 *raw_prd, ++ u32 *raw_dty) ++{ ++ struct loongson_pwm *priv = to_loongson_pwm(chip); ++ struct device *parent = pwmchip_parent(chip)->parent; ++ enum loongson_timers_dmas dma_id; ++ u32 ccen, ccr; ++ int ret; ++ u32 capture[4]; ++ ++ /* Ensure registers have been updated, enable counter and capture */ ++ regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG); ++ regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); ++ ++ /* Use cc1 or cc3 DMA resp for PWM input channels 1 & 2 or 3 & 4 */ ++ dma_id = pwm->hwpwm < 2 ? LS_TIMERS_DMA_CH1 : LS_TIMERS_DMA_CH3; ++ ccen = pwm->hwpwm < 2 ? TIM_CCER_CC12E : TIM_CCER_CC34E; ++ ccr = pwm->hwpwm < 2 ? TIM_CCR1 : TIM_CCR3; ++ regmap_set_bits(priv->regmap, TIM_CCER, ccen); ++ ++ /* ++ * Timer DMA burst mode. Request 2 registers, 2 bursts, to get both ++ * CCR1 & CCR2 (or CCR3 & CCR4) on each capture event. ++ * We'll get two capture snapchots: { CCR1, CCR2 }, { CCR1, CCR2 } ++ * or { CCR3, CCR4 }, { CCR3, CCR4 } ++ */ ++ ret = loongson_timers_dma_burst_read(parent, priv->capture, dma_id, ccr, 2, ++ 3, tmo_ms); ++ if (ret) ++ goto stop; ++ dev_dbg(parent, "Capture: %u %u | %u %u\n", priv->capture[1], ++ priv->capture[2], priv->capture[4], priv->capture[5]); ++ capture[0] = priv->capture[1]; ++ capture[1] = priv->capture[4]; ++ capture[2] = priv->capture[2]; ++ capture[3] = priv->capture[5]; ++ ++ /* Period: t2 - t0 (take care of counter overflow) */ ++ if (capture[0] <= capture[2]) ++ *raw_prd = capture[2] - capture[0]; ++ else ++ *raw_prd = priv->max_arr - capture[0] + capture[2]; ++ /* Duty cycle capture requires at least two capture units */ ++ if (pwm->chip->npwm < 2) ++ *raw_dty = 0; ++ else if (capture[0] <= capture[3]) ++ *raw_dty = capture[3] - capture[0]; ++ else ++ *raw_dty = priv->max_arr - capture[0] + capture[3]; ++ ++ if (*raw_dty > *raw_prd) { ++ /* ++ * Race beetween PWM input and DMA: it may happen ++ * falling edge triggers new capture on TI2/4 before DMA ++ * had a chance to read CCR2/4. It means capture[1] ++ * contains period + duty_cycle. So, subtract period. ++ */ ++ *raw_dty -= *raw_prd; ++ } ++ ++stop: ++ regmap_clear_bits(priv->regmap, TIM_CCER, ccen); ++ regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); ++ ++ return ret; ++} ++ ++static int loongson_pwm_capture(struct pwm_chip *chip, struct pwm_device *pwm, ++ struct pwm_capture *result, unsigned long tmo_ms) ++{ ++ struct loongson_pwm *priv = to_loongson_pwm(chip); ++ unsigned long long prd, div, dty; ++ unsigned long rate; ++ unsigned int psc = 0, icpsc, scale; ++ u32 raw_prd = 0, raw_dty = 0; ++ int ret = 0; ++ ++ mutex_lock(&priv->lock); ++ ++ if (active_channels(priv)) { ++ ret = -EBUSY; ++ goto unlock; ++ } ++ ++ ret = clk_enable(priv->clk); ++ if (ret) { ++ dev_err(pwmchip_parent(chip), "failed to enable counter clock\n"); ++ goto unlock; ++ } ++ ++ rate = clk_get_rate(priv->clk); ++ if (!rate) { ++ ret = -EINVAL; ++ goto clk_dis; ++ } ++ ++ /* prescaler: fit timeout window provided by upper layer */ ++ div = (unsigned long long)rate * (unsigned long long)tmo_ms; ++ do_div(div, MSEC_PER_SEC); ++ prd = div; ++ while ((div > priv->max_arr) && (psc < MAX_TIM_PSC)) { ++ psc++; ++ div = prd; ++ do_div(div, psc + 1); ++ } ++ regmap_write(priv->regmap, TIM_ARR, priv->max_arr); ++ regmap_write(priv->regmap, TIM_PSC, psc); ++ ++ /* Reset input selector to its default input and disable slave mode */ ++ regmap_write(priv->regmap, TIM_SMCR, 0x0); ++ ++ /* Map TI1 or TI2 PWM input to IC1 & IC2 (or TI3/4 to IC3 & IC4) */ ++ regmap_update_bits(priv->regmap, ++ pwm->hwpwm < 2 ? TIM_CCMR1 : TIM_CCMR2, ++ TIM_CCMR_CC1S | TIM_CCMR_CC2S, pwm->hwpwm & 0x1 ? ++ TIM_CCMR_CC1S_TI2 | TIM_CCMR_CC2S_TI2 : ++ TIM_CCMR_CC1S_TI1 | TIM_CCMR_CC2S_TI1); ++ ++ /* Capture period on IC1/3 rising edge, duty cycle on IC2/4 falling. */ ++ regmap_update_bits(priv->regmap, TIM_CCER, pwm->hwpwm < 2 ? ++ TIM_CCER_CC12P : TIM_CCER_CC34P, pwm->hwpwm < 2 ? ++ TIM_CCER_CC2P : TIM_CCER_CC4P); ++ ++ ret = loongson_pwm_raw_capture(chip, pwm, tmo_ms, &raw_prd, &raw_dty); ++ if (ret) ++ goto stop; ++ dev_dbg(pwmchip_parent(chip), "Capture: %u %u\n", raw_prd, raw_dty); ++ ++ /* ++ * Got a capture. Try to improve accuracy at high rates: ++ * - decrease counter clock prescaler, scale up to max rate. ++ * - use input prescaler, capture once every /2 /4 or /8 edges. ++ */ ++ if (raw_prd) { ++ u32 max_arr = priv->max_arr - 0x1000; /* arbitrary margin */ ++ ++ scale = max_arr / min(max_arr, raw_prd); ++ } else { ++ scale = priv->max_arr; /* below resolution, use max scale */ ++ } ++ ++ if (psc && scale > 1) { ++ /* 2nd measure with new scale */ ++ psc /= scale; ++ regmap_write(priv->regmap, TIM_PSC, psc); ++ ret = loongson_pwm_raw_capture(chip, pwm, tmo_ms, &raw_prd, ++ &raw_dty); ++ if (ret) ++ goto stop; ++ dev_dbg(pwmchip_parent(chip), "Capture: %u %u\n", raw_prd, raw_dty); ++ } ++ ++ /* Compute intermediate period not to exceed timeout at low rates */ ++ prd = (unsigned long long)raw_prd * (psc + 1) * NSEC_PER_SEC; ++ do_div(prd, rate); ++ ++ for (icpsc = 0; icpsc < MAX_TIM_ICPSC ; icpsc++) { ++ /* input prescaler: also keep arbitrary margin */ ++ if (raw_prd >= (priv->max_arr - 0x1000) >> (icpsc + 1)) ++ break; ++ if (prd >= (tmo_ms * NSEC_PER_MSEC) >> (icpsc + 2)) ++ break; ++ } ++ ++ if (!icpsc) ++ goto done; ++ ++ /* Last chance to improve period accuracy, using input prescaler */ ++ regmap_update_bits(priv->regmap, ++ pwm->hwpwm < 2 ? TIM_CCMR1 : TIM_CCMR2, ++ TIM_CCMR_IC1PSC | TIM_CCMR_IC2PSC, ++ FIELD_PREP(TIM_CCMR_IC1PSC, icpsc) | ++ FIELD_PREP(TIM_CCMR_IC2PSC, icpsc)); ++ ++ ret = loongson_pwm_raw_capture(chip, pwm, tmo_ms, &raw_prd, &raw_dty); ++ if (ret) ++ goto stop; ++ dev_dbg(pwmchip_parent(chip), "Capture: %u %u\n", raw_prd, raw_dty); ++ ++ if (raw_dty >= (raw_prd >> icpsc)) { ++ /* ++ * We may fall here using input prescaler, when input ++ * capture starts on high side (before falling edge). ++ * Example with icpsc to capture on each 4 events: ++ * ++ * start 1st capture 2nd capture ++ * v v v ++ * ___ _____ _____ _____ _____ ____ ++ * TI1..4 |__| |__| |__| |__| |__| ++ * v v . . . . . v v ++ * icpsc1/3: . 0 . 1 . 2 . 3 . 0 ++ * icpsc2/4: 0 1 2 3 0 ++ * v v v v ++ * CCR1/3 ......t0..............................t2 ++ * CCR2/4 ..t1..............................t1'... ++ * . . . ++ * Capture0: .<----------------------------->. ++ * Capture1: .<-------------------------->. . ++ * . . . ++ * Period: .<------> . . ++ * Low side: .<>. ++ * ++ * Result: ++ * - Period = Capture0 / icpsc ++ * - Duty = Period - Low side = Period - (Capture0 - Capture1) ++ */ ++ raw_dty = (raw_prd >> icpsc) - (raw_prd - raw_dty); ++ } ++ ++ done: ++ prd = (unsigned long long)raw_prd * (psc + 1) * NSEC_PER_SEC; ++ result->period = DIV_ROUND_UP_ULL(prd, rate << icpsc); ++ dty = (unsigned long long)raw_dty * (psc + 1) * NSEC_PER_SEC; ++ result->duty_cycle = DIV_ROUND_UP_ULL(dty, rate); ++stop: ++ regmap_write(priv->regmap, TIM_CCER, 0); ++ regmap_write(priv->regmap, pwm->hwpwm < 2 ? TIM_CCMR1 : TIM_CCMR2, 0); ++ regmap_write(priv->regmap, TIM_PSC, 0); ++clk_dis: ++ clk_disable(priv->clk); ++unlock: ++ mutex_unlock(&priv->lock); ++ ++ return ret; ++} ++ ++ ++static int loongson_pwm_set_polarity(struct loongson_pwm *priv, unsigned int ch, ++ enum pwm_polarity polarity) ++{ ++ u32 mask; ++ ++ mask = TIM_CCER_CCxP(ch + 1); ++ if (priv->have_complementary_output) ++ mask |= TIM_CCER_CCxNP(ch + 1); ++ ++ regmap_update_bits(priv->regmap, TIM_CCER, mask, ++ polarity == PWM_POLARITY_NORMAL ? 0 : mask); ++ ++ return 0; ++} ++ ++static int loongson_pwm_enable(struct loongson_pwm *priv, unsigned int ch) ++{ ++ u32 mask; ++ int ret; ++ ++ ret = clk_enable(priv->clk); ++ if (ret) ++ return ret; ++ ++ /* Enable channel */ ++ mask = TIM_CCER_CCxE(ch + 1); ++ if (priv->have_complementary_output) ++ mask |= TIM_CCER_CCxNE(ch + 1); ++ ++ regmap_set_bits(priv->regmap, TIM_CCER, mask); ++ ++ /* Make sure that registers are updated */ ++ regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG); ++ ++ /* Enable controller */ ++ regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); ++ ++ return 0; ++} ++ ++static void loongson_pwm_disable(struct loongson_pwm *priv, unsigned int ch) ++{ ++ u32 mask; ++ ++ /* Disable channel */ ++ mask = TIM_CCER_CCxE(ch + 1); ++ if (priv->have_complementary_output) ++ mask |= TIM_CCER_CCxNE(ch + 1); ++ ++ regmap_clear_bits(priv->regmap, TIM_CCER, mask); ++ ++ /* When all channels are disabled, we can disable the controller */ ++ if (!active_channels(priv)) ++ regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); ++ ++ clk_disable(priv->clk); ++} ++ ++static int loongson_pwm_config(struct loongson_pwm *priv, unsigned int ch, ++ u64 duty_ns, u64 period_ns) ++{ ++ unsigned long long prd, dty; ++ unsigned long long prescaler; ++ u32 ccmr, mask, shift; ++ ++ /* ++ * .probe() asserted that clk_get_rate() is not bigger than 1 GHz, so ++ * the calculations here won't overflow. ++ * First we need to find the minimal value for prescaler such that ++ * ++ * period_ns * clkrate ++ * ------------------------------ < max_arr + 1 ++ * NSEC_PER_SEC * (prescaler + 1) ++ * ++ * This equation is equivalent to ++ * ++ * period_ns * clkrate ++ * ---------------------------- < prescaler + 1 ++ * NSEC_PER_SEC * (max_arr + 1) ++ * ++ * Using integer division and knowing that the right hand side is ++ * integer, this is further equivalent to ++ * ++ * (period_ns * clkrate) // (NSEC_PER_SEC * (max_arr + 1)) ≤ prescaler ++ */ ++ ++ prescaler = mul_u64_u64_div_u64(period_ns, clk_get_rate(priv->clk), ++ (u64)NSEC_PER_SEC * ((u64)priv->max_arr + 1)); ++ if (prescaler > MAX_TIM_PSC) ++ return -EINVAL; ++ ++ prd = mul_u64_u64_div_u64(period_ns, clk_get_rate(priv->clk), ++ (u64)NSEC_PER_SEC * (prescaler + 1)); ++ if (!prd) ++ return -EINVAL; ++ ++ /* ++ * All channels share the same prescaler and counter so when two ++ * channels are active at the same time we can't change them ++ */ ++ if (active_channels(priv) & ~(1 << ch * 4)) { ++ u32 psc, arr; ++ ++ regmap_read(priv->regmap, TIM_PSC, &psc); ++ regmap_read(priv->regmap, TIM_ARR, &arr); ++ ++ if ((psc != prescaler) || (arr != prd - 1)) ++ return -EBUSY; ++ } ++ ++ regmap_write(priv->regmap, TIM_PSC, prescaler); ++ regmap_write(priv->regmap, TIM_ARR, prd - 1); ++ regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE); ++ ++ /* Calculate the duty cycles */ ++ dty = mul_u64_u64_div_u64(duty_ns, clk_get_rate(priv->clk), ++ (u64)NSEC_PER_SEC * (prescaler + 1)); ++ ++ regmap_write(priv->regmap, TIM_CCRx(ch + 1), dty); ++ ++ /* Configure output mode */ ++ shift = (ch & 0x1) * CCMR_CHANNEL_SHIFT; ++ ccmr = (TIM_CCMR_PE | TIM_CCMR_M1) << shift; ++ mask = CCMR_CHANNEL_MASK << shift; ++ ++ if (ch < 2) ++ regmap_update_bits(priv->regmap, TIM_CCMR1, mask, ccmr); ++ else ++ regmap_update_bits(priv->regmap, TIM_CCMR2, mask, ccmr); ++ ++ regmap_set_bits(priv->regmap, TIM_BDTR, TIM_BDTR_MOE); ++ ++ return 0; ++} ++ ++ ++static int loongson_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, ++ const struct pwm_state *state) ++{ ++ bool enabled; ++ struct loongson_pwm *priv = to_loongson_pwm(chip); ++ int ret; ++ ++ enabled = pwm->state.enabled; ++ ++ if (!state->enabled) { ++ if (enabled) ++ loongson_pwm_disable(priv, pwm->hwpwm); ++ return 0; ++ } ++ ++ if (state->polarity != pwm->state.polarity) ++ loongson_pwm_set_polarity(priv, pwm->hwpwm, state->polarity); ++ ++ ret = loongson_pwm_config(priv, pwm->hwpwm, ++ state->duty_cycle, state->period); ++ if (ret) ++ return ret; ++ ++ if (!enabled && state->enabled) ++ ret = loongson_pwm_enable(priv, pwm->hwpwm); ++ ++ return ret; ++} ++ ++static int loongson_pwm_apply_locked(struct pwm_chip *chip, struct pwm_device *pwm, ++ const struct pwm_state *state) ++{ ++ struct loongson_pwm *priv = to_loongson_pwm(chip); ++ int ret; ++ ++ /* protect common prescaler for all active channels */ ++ mutex_lock(&priv->lock); ++ ret = loongson_pwm_apply(chip, pwm, state); ++ mutex_unlock(&priv->lock); ++ ++ return ret; ++} ++ ++static int loongson_pwm_get_state(struct pwm_chip *chip, ++ struct pwm_device *pwm, struct pwm_state *state) ++{ ++ struct loongson_pwm *priv = to_loongson_pwm(chip); ++ int ch = pwm->hwpwm; ++ unsigned long rate; ++ u32 ccer, psc, arr, ccr; ++ u64 dty, prd; ++ int ret; ++ ++ mutex_lock(&priv->lock); ++ ++ ret = regmap_read(priv->regmap, TIM_CCER, &ccer); ++ if (ret) ++ goto out; ++ ++ state->enabled = ccer & TIM_CCER_CCxE(ch + 1); ++ state->polarity = (ccer & TIM_CCER_CCxP(ch + 1)) ? ++ PWM_POLARITY_INVERSED : PWM_POLARITY_NORMAL; ++ ret = regmap_read(priv->regmap, TIM_PSC, &psc); ++ if (ret) ++ goto out; ++ ret = regmap_read(priv->regmap, TIM_ARR, &arr); ++ if (ret) ++ goto out; ++ ret = regmap_read(priv->regmap, TIM_CCRx(ch + 1), &ccr); ++ if (ret) ++ goto out; ++ ++ rate = clk_get_rate(priv->clk); ++ ++ prd = (u64)NSEC_PER_SEC * (psc + 1) * (arr + 1); ++ state->period = DIV_ROUND_UP_ULL(prd, rate); ++ dty = (u64)NSEC_PER_SEC * (psc + 1) * ccr; ++ state->duty_cycle = DIV_ROUND_UP_ULL(dty, rate); ++ ++out: ++ mutex_unlock(&priv->lock); ++ return ret; ++} ++ ++static const struct pwm_ops ls_timer_pwm_ops = { ++ .apply = loongson_pwm_apply_locked, ++ .get_state = loongson_pwm_get_state, ++ .capture = IS_ENABLED(CONFIG_DMA_ENGINE) ? loongson_pwm_capture : NULL, ++}; ++ ++static int loongson_pwm_set_breakinput(struct loongson_pwm *priv, ++ const struct loongson_breakinput *bi) ++{ ++ u32 shift = TIM_BDTR_BKF_SHIFT(bi->index); ++ u32 bke = TIM_BDTR_BKE(bi->index); ++ u32 bkp = TIM_BDTR_BKP(bi->index); ++ u32 bkf = TIM_BDTR_BKF(bi->index); ++ u32 mask = bkf | bkp | bke; ++ u32 bdtr; ++ ++ bdtr = (bi->filter & TIM_BDTR_BKF_MASK) << shift | bke; ++ ++ if (bi->level) ++ bdtr |= bkp; ++ ++ regmap_update_bits(priv->regmap, TIM_BDTR, mask, bdtr); ++ ++ regmap_read(priv->regmap, TIM_BDTR, &bdtr); ++ ++ return (bdtr & bke) ? 0 : -EINVAL; ++} ++ ++static int loongson_pwm_apply_breakinputs(struct loongson_pwm *priv) ++{ ++ unsigned int i; ++ int ret; ++ ++ for (i = 0; i < priv->num_breakinputs; i++) { ++ ret = loongson_pwm_set_breakinput(priv, &priv->breakinputs[i]); ++ if (ret < 0) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int loongson_pwm_probe_breakinputs(struct loongson_pwm *priv, ++ struct device_node *np) ++{ ++ int nb, ret, array_size; ++ unsigned int i; ++ ++ nb = of_property_count_elems_of_size(np, "loongson,breakinput", ++ sizeof(struct loongson_breakinput)); ++ ++ /* ++ * Because "loongson,breakinput" parameter is optional do not make probe ++ * failed if it doesn't exist. ++ */ ++ if (nb <= 0) ++ return 0; ++ ++ if (nb > MAX_BREAKINPUT) ++ return -EINVAL; ++ ++ priv->num_breakinputs = nb; ++ array_size = nb * sizeof(struct loongson_breakinput) / sizeof(u32); ++ ret = of_property_read_u32_array(np, "loongson,breakinput", ++ (u32 *)priv->breakinputs, array_size); ++ if (ret) ++ return ret; ++ ++ for (i = 0; i < priv->num_breakinputs; i++) { ++ if (priv->breakinputs[i].index > 1 || ++ priv->breakinputs[i].level > 1 || ++ priv->breakinputs[i].filter > 15) ++ return -EINVAL; ++ } ++ ++ return loongson_pwm_apply_breakinputs(priv); ++} ++ ++static void loongson_pwm_detect_complementary(struct loongson_pwm *priv) ++{ ++ u32 ccer; ++ ++ /* ++ * If complementary bit doesn't exist writing 1 will have no ++ * effect so we can detect it. ++ */ ++ regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE); ++ regmap_read(priv->regmap, TIM_CCER, &ccer); ++ regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE); ++ ++ priv->have_complementary_output = (ccer != 0); ++} ++ ++static int loongson_pwm_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct device_node *np = dev->of_node; ++ struct loongson_timers *ddata = dev_get_drvdata(pdev->dev.parent); ++ struct loongson_pwm *priv; ++ unsigned int npwm, num_enabled; ++ unsigned int i; ++ int ret; ++ ++ npwm = loongson_pwm_detect_channels(ddata->regmap, &num_enabled); ++ ++ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); ++ if(!priv) ++ { ++ return -ENOMEM; ++ } ++ ++ mutex_init(&priv->lock); ++ priv->regmap = ddata->regmap; ++ priv->clk = ddata->clk; ++ priv->max_arr = ddata->max_arr; ++ ++ if (!priv->regmap || !priv->clk) ++ return dev_err_probe(dev, -EINVAL, "Failed to get %s\n", ++ priv->regmap ? "clk" : "regmap"); ++ ++ ret = loongson_pwm_probe_breakinputs(priv, np); ++ if (ret) ++ return dev_err_probe(dev, ret, ++ "Failed to configure breakinputs\n"); ++ ++ loongson_pwm_detect_complementary(priv); ++ ++ ret = devm_clk_rate_exclusive_get(dev, priv->clk); ++ if (ret) ++ return dev_err_probe(dev, ret, "Failed to lock clock\n"); ++ ++ /* ++ * With the clk running with not more than 1 GHz the calculations in ++ * .apply() won't overflow. ++ */ ++ if (clk_get_rate(priv->clk) > 1000000000) ++ return dev_err_probe(dev, -EINVAL, "Clock freq too high (%lu)\n", ++ clk_get_rate(priv->clk)); ++ ++ /* Initialize clock refcount to number of enabled PWM channels. */ ++ for (i = 0; i < num_enabled; i++) ++ clk_enable(priv->clk); ++ ++ priv->chip.ops = &ls_timer_pwm_ops; ++ priv->chip.dev = &pdev->dev; ++ priv->chip.npwm = npwm; ++ ++ ret = devm_pwmchip_add(dev, &priv->chip); ++ if (ret < 0) ++ return dev_err_probe(dev, ret, ++ "Failed to register pwmchip\n"); ++ ++ return 0; ++} ++ ++static int loongson_pwm_suspend(struct device *dev) ++{ ++ struct loongson_pwm *priv = dev_get_drvdata(dev); ++ struct pwm_chip *chip = &priv->chip; ++ unsigned int i; ++ u32 ccer, mask; ++ ++ /* Look for active channels */ ++ ccer = active_channels(priv); ++ ++ for (i = 0; i < chip->npwm; i++) { ++ mask = TIM_CCER_CCxE(i + 1); ++ if (ccer & mask) { ++ dev_err(dev, "PWM %u still in use by consumer %s\n", ++ i, chip->pwms[i].label); ++ return -EBUSY; ++ } ++ } ++ ++ return pinctrl_pm_select_sleep_state(dev); ++} ++ ++static int loongson_pwm_resume(struct device *dev) ++{ ++ struct loongson_pwm *priv = dev_get_drvdata(dev); ++ int ret; ++ ++ ret = pinctrl_pm_select_default_state(dev); ++ if (ret) ++ return ret; ++ ++ /* restore breakinput registers that may have been lost in low power */ ++ return loongson_pwm_apply_breakinputs(priv); ++} ++ ++static DEFINE_SIMPLE_DEV_PM_OPS(loongson_pwm_pm_ops, loongson_pwm_suspend, loongson_pwm_resume); ++ ++static const struct of_device_id loongson_pwm_of_match[] = { ++ { .compatible = "loongson,ls2k-pwm-timer", }, ++ { /* end node */ }, ++}; ++MODULE_DEVICE_TABLE(of, loongson_pwm_of_match); ++ ++static struct platform_driver loongson_pwm_driver = { ++ .probe = loongson_pwm_probe, ++ .driver = { ++ .name = "loongson-pwm-timer", ++ .of_match_table = loongson_pwm_of_match, ++ .pm = pm_ptr(&loongson_pwm_pm_ops), ++ }, ++}; ++module_platform_driver(loongson_pwm_driver); ++ ++MODULE_ALIAS("platform:loongson-pwm-timer"); ++MODULE_DESCRIPTION("Loongson loongson2k PWM driver"); ++MODULE_LICENSE("GPL v2"); +-- +2.49.0 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0011-add-ls2k-rtc-support.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0011-add-ls2k-rtc-support.patch new file mode 100644 index 0000000000000000000000000000000000000000..7c83825993110ede6e286808f12f26d9b7f331d9 --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0011-add-ls2k-rtc-support.patch @@ -0,0 +1,75 @@ +From 17919b9dcf6437984c5e5ed43280dc8b5713654e Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:16:09 +0800 +Subject: [PATCH 11/17] add ls2k rtc support + +--- + drivers/rtc/rtc-loongson.c | 23 +++++++++++++++++------ + 1 file changed, 17 insertions(+), 6 deletions(-) + +diff --git a/drivers/rtc/rtc-loongson.c b/drivers/rtc/rtc-loongson.c +index e8ffc1ab9..64925fcf0 100644 +--- a/drivers/rtc/rtc-loongson.c ++++ b/drivers/rtc/rtc-loongson.c +@@ -102,6 +102,11 @@ static const struct loongson_rtc_config ls2k1000_rtc_config = { + .flags = 0, + }; + ++static const struct loongson_rtc_config ls2k_gen_rtc_config = { ++ .pm_offset = 0x0, ++ .flags = 0, ++}; ++ + static const struct regmap_config loongson_rtc_regmap_config = { + .reg_bits = 32, + .val_bits = 32, +@@ -114,6 +119,13 @@ static irqreturn_t loongson_rtc_isr(int irq, void *id) + struct loongson_rtc_priv *priv = (struct loongson_rtc_priv *)id; + + rtc_update_irq(priv->rtcdev, 1, RTC_AF | RTC_IRQF); ++ ++ /* ++ * The TOY_MATCH0_REG should be cleared 0 here, ++ * otherwise the interrupt cannot be cleared. ++ */ ++ regmap_write(priv->regmap, TOY_MATCH0_REG, 0); ++ + return IRQ_HANDLED; + } + +@@ -131,11 +143,7 @@ static u32 loongson_rtc_handler(void *id) + writel(RTC_STS, priv->pm_base + PM1_STS_REG); + spin_unlock(&priv->lock); + +- /* +- * The TOY_MATCH0_REG should be cleared 0 here, +- * otherwise the interrupt cannot be cleared. +- */ +- return regmap_write(priv->regmap, TOY_MATCH0_REG, 0); ++ return ACPI_INTERRUPT_HANDLED; + } + + static int loongson_rtc_set_enabled(struct device *dev) +@@ -320,8 +328,10 @@ static int loongson_rtc_probe(struct platform_device *pdev) + "devm_rtc_allocate_device failed\n"); + + /* Get RTC alarm irq */ ++ /* 发现 2k300 不需要中断 开了中断就会导致无法读写 */ ++ /* 所以 pm_offset == 0 代表不需要中断 */ + alarm_irq = platform_get_irq(pdev, 0); +- if (alarm_irq > 0) { ++ if (alarm_irq > 0 && priv->config->pm_offset) { + ret = devm_request_irq(dev, alarm_irq, loongson_rtc_isr, + 0, "loongson-alarm", priv); + if (ret < 0) +@@ -369,6 +379,7 @@ static const struct of_device_id loongson_rtc_of_match[] = { + { .compatible = "loongson,ls1c-rtc", .data = &ls1c_rtc_config }, + { .compatible = "loongson,ls7a-rtc", .data = &generic_rtc_config }, + { .compatible = "loongson,ls2k1000-rtc", .data = &ls2k1000_rtc_config }, ++ { .compatible = "loongson,ls2k-rtc", .data = &ls2k_gen_rtc_config }, + { /* sentinel */ } + }; + MODULE_DEVICE_TABLE(of, loongson_rtc_of_match); +-- +2.49.0 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0012-add-loongson-spi-support.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0012-add-loongson-spi-support.patch new file mode 100644 index 0000000000000000000000000000000000000000..61fcc6114b9eead7ce63ca1c5ad80089b1630b27 --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0012-add-loongson-spi-support.patch @@ -0,0 +1,1178 @@ +From 1677103185a79181387ffacc70891f9aa92a6f38 Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:16:33 +0800 +Subject: [PATCH 12/17] add loongson spi support + +--- + drivers/spi/Kconfig | 12 + + drivers/spi/Makefile | 2 + + drivers/spi/spi-ls-io.c | 500 ++++++++++++++++++++++++++++++++ + drivers/spi/spi-ls.c | 616 ++++++++++++++++++++++++++++++++++++++++ + 4 files changed, 1130 insertions(+) + create mode 100644 drivers/spi/spi-ls-io.c + create mode 100644 drivers/spi/spi-ls.c + +diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig +index 60826b7ed..55f0b55fb 100644 +--- a/drivers/spi/Kconfig ++++ b/drivers/spi/Kconfig +@@ -1226,6 +1226,18 @@ config SPI_TLE62X0 + sysfs interface, with each line presented as a kind of GPIO + exposing both switch control and diagnostic feedback. + ++config SPI_LS ++ tristate "Loongson SPI Controller Support" ++ depends on LOONGSON_2K1000 || LOONGSON_2K500 || LOONGSON_2K300 || LOONGSON_2P500 ++ help ++ This is the driver for Loongson spi master controller. ++ ++config SPI_LS_IO ++ tristate "Loongson SPI-IO Controller Support" ++ depends on LOONGSON_2K300 || LOONGSON_2P500 ++ help ++ This is the driver for Loongson spi-io controller. ++ + # + # Add new SPI protocol masters in alphabetical order above this line + # +diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile +index 26bf16fcf..8bf1cc2af 100644 +--- a/drivers/spi/Makefile ++++ b/drivers/spi/Makefile +@@ -157,3 +157,5 @@ obj-$(CONFIG_SPI_AMD) += spi-amd.o + # SPI slave protocol handlers + obj-$(CONFIG_SPI_SLAVE_TIME) += spi-slave-time.o + obj-$(CONFIG_SPI_SLAVE_SYSTEM_CONTROL) += spi-slave-system-control.o ++obj-$(CONFIG_SPI_LS) += spi-ls.o ++obj-$(CONFIG_SPI_LS_IO) += spi-ls-io.o +diff --git a/drivers/spi/spi-ls-io.c b/drivers/spi/spi-ls-io.c +new file mode 100644 +index 000000000..61e5dc7fc +--- /dev/null ++++ b/drivers/spi/spi-ls-io.c +@@ -0,0 +1,500 @@ ++/* ++ * Loongson SPI driver ++ * ++ * Copyright (C) 2017 Juxin Gao ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++// #include ++// #include ++ ++/*SPI IO registers */ ++#define REG_CR1 0x00 ++#define REG_CR2 0x04 ++#define REG_CR3 0x08 ++#define REG_CR4 0x0c ++#define REG_IER 0x10 ++#define REG_SR1 0x14 ++#define REG_SR2 0x18 ++#define REG_CFG1 0x20 ++#define REG_CFG2 0x24 ++#define REG_CFG3 0x28 ++#define REG_CRC1 0x30 ++#define REG_CRC2 0x34 ++#define REG_DR 0x40 ++#define REG_DMA_ISR 0x100 ++#define REG_DMA_IFCR 0x104 ++#define REG_DMA_CCR_RX 0x110 ++#define REG_DMA_CNDTR_RX 0x114 ++#define REG_DMA_CMAR_RX 0x11c ++#define REG_DMA_CCR_TX 0x120 ++#define REG_DMA_CNDTR_TX 0x124 ++#define REG_DMA_CMAR_TX 0x12c ++ ++#define SHIFTW(_x, _s) ((_x) << (_s)) ++#define SHIFTR(_x, _s) ((_x) >> (_s)) ++ ++/* SPI_CR1 bit fields */ ++#define BIT_CR1_SPE BIT(0) ++#define BIT_CR1_CSTART BIT(1) ++#define BIT_CR1_AUTOSUS BIT(2) ++#define BIT_CR1_SSREV BIT(8) ++ ++/* SPI_CR2 bit fields */ ++#define BIT_CR2_RXDMAEN BIT(7) ++#define BIT_CR2_TXDMAEN BIT(15) ++#define MASK_CR2_RXFTHLV 0x3 ++#define MASK_CR2_TXFTHLV 0x300 ++ ++/* SPI_IER bit fields */ ++#define BIT_IER_RXAIE BIT(0) ++#define BIT_IER_TXAIE BIT(1) ++#define BIT_IER_DXAIE BIT(2) ++#define BIT_IER_RXEIE BIT(4) ++#define BIT_IER_TXEIE BIT(5) ++#define BIT_IER_SUSPIE BIT(7) ++#define BIT_IER_OVRIE BIT(8) ++#define BIT_IER_UDRIE BIT(9) ++#define BIT_IER_CRCEIE BIT(10) ++#define BIT_IER_MODFIE BIT(11) ++#define BIT_IER_EOTIE BIT(15) ++#define BIT_IER_ALL \ ++ (BIT_IER_RXAIE | BIT_IER_TXAIE | BIT_IER_DXAIE | BIT_IER_RXEIE | \ ++ BIT_IER_TXEIE | BIT_IER_SUSPIE | BIT_IER_OVRIE | BIT_IER_UDRIE | \ ++ BIT_IER_CRCEIE | BIT_IER_MODFIE | BIT_IER_EOTIE) ++ ++/* SPI_SR1 bit fields */ ++#define BIT_SR1_RXA BIT(0) ++#define BIT_SR1_TXA BIT(1) ++#define BIT_SR1_DXA BIT(2) ++#define BIT_SR1_RXE BIT(4) ++#define BIT_SR1_TXE BIT(5) ++#define BIT_SR1_SUSP BIT(7) ++#define BIT_SR1_OVR BIT(8) ++#define BIT_SR1_UDR BIT(9) ++#define BIT_SR1_CRCE BIT(10) ++#define BIT_SR1_MODF BIT(11) ++#define BIT_SR1_EOT BIT(15) ++ ++/* SPI_SR2 bit fields */ ++#define MASK_SR2_RXFLV 0x7 // << 0 ++#define MASK_SR2_TXFLV 0x700 // << 8 ++ ++/* SPI_CFG1 bit fields */ ++#define BIT_CFG1_CPOL BIT(0) ++#define BIT_CFG1_CPHA BIT(1) ++#define BIT_CFG1_LSBFRST BIT(7) ++#define MASK_CFG1_DSIZE 0x1f00 // << 8 ++ ++/* SPI_CFG2 bit fields */ ++#define SHIFT_CFG2_BRINT 8 ++#define MASK_CFG2_BRDEC 0xfc // << 2 ++#define MASK_CFG2_BRINT 0xff00 // << 8 ++ ++/* SPI_CFG3 bit fields */ ++#define BIT_CFG3_MSTR BIT(0) ++#define BIT_CFG3_DIOSWP BIT(1) ++#define BIT_CFG3_DIE BIT(2) ++#define BIT_CFG3_DOE BIT(3) ++#define MASK_CFG3_SSMODE 0x300 // << 8 ++ ++/* SPI_CRC1 bit fields */ ++#define BIT_CRC1_CRCEN BIT(0) ++#define MASK_CRC1_CRCPOLY 0xfffffffe // << 1 ++ ++/* SPI_CRC2 bit fields */ ++#define BIT_CRC2_RCRCINI BIT(0) ++#define BIT_CRC2_TCRCINI BIT(1) ++#define MASK_CRC2_CRCSIZE 0x1f00 // << 8 ++ ++#define ls_spiio_write_reg(spi, offset, data) \ ++ writel(data, spi->reg + offset) ++#define ls_spiio_read_reg(spi, offset) \ ++ readl(spi->reg + offset) ++ ++#define ls_spiio_write_reg_byte(spi, offset, data) \ ++ writeb(data, spi->reg + offset) ++#define ls_spiio_read_reg_byte(spi, offset) \ ++ readb(spi->reg + offset) ++ ++ ++struct ls_spiio_priv { ++ void __iomem *reg; ++ struct spi_controller *controller; ++ u32 ref_clk; ++ u32 clk; ++ u8 dsize; ++ struct gpio_desc **cs_gpios; ++ struct device *dev; ++}; ++ ++static int ls_spiio_idle_sr1(struct ls_spiio_priv* priv, u32 bit) ++{ ++ int timeout = 1000; ++ while(!(ls_spiio_read_reg(priv, REG_SR1) & bit) ++ && timeout--); ++ return timeout; ++} ++ ++static int ls_spiio_active_cs(struct ls_spiio_priv* priv, int cs) ++{ ++ int active = 0; ++ ++ if (!priv->cs_gpios) ++ ls_spiio_write_reg(priv, REG_CR1, BIT_CR1_SSREV | BIT_CR1_SPE); ++ else ++ gpiod_set_raw_value(priv->cs_gpios[cs], active); ++ ++ return 0; ++} ++ ++static int ls_spiio_clear_cs(struct ls_spiio_priv* priv) ++{ ++ struct spi_controller* controller = priv->controller; ++ int clear = 1; ++ int i; ++ ++ if (!priv->cs_gpios) ++ ls_spiio_write_reg(priv, REG_CR1, BIT_CR1_SSREV); ++ else ++ for (i = 0; i < controller->num_chipselect; i++) ++ gpiod_set_raw_value(priv->cs_gpios[i], clear); ++ ++ return 0; ++} ++ ++static int ls_spiio_free_cs_gpios(struct ls_spiio_priv* priv) ++{ ++ struct spi_controller* controller = priv->controller; ++ struct device *dev = priv->dev; ++ int i; ++ ++ if (!priv->cs_gpios) ++ return 0; ++ ++ for (i = 0; i < controller->num_chipselect; i++) ++ devm_gpiod_put(dev, priv->cs_gpios[i]); ++ ++ devm_kfree(dev, priv->cs_gpios); ++ ++ return 0; ++} ++ ++static int ls_spiio_init_cs_gpios(struct ls_spiio_priv* priv) ++{ ++ struct spi_controller* controller = priv->controller; ++ struct device *dev = priv->dev; ++ int clear = 1; ++ int ret; ++ int i; ++ ++ priv->cs_gpios = devm_kcalloc(dev, controller->num_chipselect, ++ sizeof(*priv->cs_gpios), ++ GFP_KERNEL); ++ if (!priv->cs_gpios) ++ return -ENOMEM; ++ ++ for (i = 0; i < controller->num_chipselect; i++) { ++ priv->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i, ++ GPIOD_OUT_HIGH); ++ if (IS_ERR(priv->cs_gpios[i])) ++ { ++ ret = PTR_ERR(priv->cs_gpios[i]); ++ dev_err(dev, "Cannot Requst cs-gpio[%d]: %d\n", ++ i, ret); ++ goto free_cs_gpio_array; ++ } ++ else ++ { ++ dev_info(dev, "GPIO[%d] as cs[%d]\n", ++ desc_to_gpio(priv->cs_gpios[i]), i); ++ gpiod_direction_output_raw(priv->cs_gpios[i], clear); ++ } ++ } ++ ++ return 0; ++ ++free_cs_gpio_array: ++ devm_kfree(dev, priv->cs_gpios); ++ ++ return ret; ++} ++ ++static int ls_spiio_xfer(struct ls_spiio_priv* priv, u8* tx, u8* rx, int len) ++{ ++ int remain = len; ++ ++ if (len > 0) ++ { ++ while (remain > 0) ++ { ++ ++ if (ls_spiio_idle_sr1(priv, BIT_SR1_TXA) < 0) { ++ pr_debug("wait txa timeout!\n"); ++ return 0; ++ } ++ if (tx != NULL) ++ { ++ ls_spiio_write_reg_byte(priv, REG_DR, *tx); ++ tx++; ++ } ++ else ++ { ++ ls_spiio_write_reg_byte(priv, REG_DR, 0x00); ++ } ++ ++ ls_spiio_write_reg(priv, REG_CR1, ++ BIT_CR1_SPE | BIT_CR1_CSTART | BIT_CR1_AUTOSUS); ++ if (ls_spiio_idle_sr1(priv, BIT_SR1_EOT) < 0) { ++ pr_debug("wait eot timeout!\n"); ++ return 0; ++ } ++ else ++ { ++ ls_spiio_write_reg(priv, REG_SR1, BIT_SR1_EOT); ++ } ++ ++ if (ls_spiio_idle_sr1(priv, BIT_SR1_RXA) < 0) { ++ pr_debug("wait rxa timeout!\n"); ++ return 0; ++ } ++ if (rx != NULL) ++ { ++ *rx = ls_spiio_read_reg_byte(priv, REG_DR); ++ rx++; ++ } ++ else ++ { ++ ls_spiio_read_reg_byte(priv, REG_DR); ++ } ++ ++ remain--; ++ } ++ } ++ ++ ++ return len; ++} ++ ++static int ls_spiio_set_clk_timing(struct ls_spiio_priv* priv, ++ unsigned long clk, u32 mode) ++{ ++ u32 val; ++ ++ val = 0; ++ if (priv->clk != clk) ++ { ++ val= DIV_ROUND_UP(priv->ref_clk, clk); ++ ++ if (val < 2) ++ val = 2; ++ ++ if (val > 255) ++ val = 255; ++ ++ pr_debug("refclk = %d, need = %ld, approximate = %d\n", ++ priv->ref_clk, clk, priv->ref_clk / val); ++ ++ priv->clk = clk; ++ ++ ls_spiio_write_reg(priv, REG_CFG2, (val << 8)); ++ } ++ ++ val = 0; ++ if (mode & SPI_CPOL) ++ val |= (1 << 0); ++ if (mode & SPI_CPHA) ++ val |= (1 << 1); ++ if (mode & SPI_LSB_FIRST) ++ val |= (1 << 7); ++ val |= (priv->dsize << 8); ++ ++ pr_debug("clk timing : 0x%x\n", val); ++ ls_spiio_write_reg(priv, REG_CFG1, val); ++ ++ return 0; ++} ++ ++static int ls_spiio_init(struct ls_spiio_priv* priv) ++{ ++ /*pin set,controller mode and full duplex*/ ++ //MSTR:1 DIOSWP:0 DIE:1 DOE:1 SSMODE:0 ++ ls_spiio_write_reg(priv, REG_CFG3, ++ BIT_CFG3_MSTR | BIT_CFG3_DIE | BIT_CFG3_DOE); ++ /*set clk rate */ ++ //BRINT:0xff BRDEC:0 ++ ls_spiio_write_reg(priv, REG_CFG2,0xff00); ++ /*set transfer format*/ ++ //CPOL:0 CPHA:0 LSBFRST:0 DSIZE:7 ++ ls_spiio_write_reg(priv, REG_CFG1, 0x700); ++ // DR Enable ++ ls_spiio_write_reg(priv, REG_CR1, BIT_CR1_SPE); ++ ++ priv->dsize = 7; ++ ++ return 0; ++} ++ ++static int __spi_setup(struct spi_device *spi) ++{ ++ struct ls_spiio_priv* priv; ++ ++ priv = spi_controller_get_devdata(spi->controller); ++ ++ ls_spiio_set_clk_timing(priv, spi->max_speed_hz, spi->mode); ++ ++ return 0; ++} ++ ++static int __spi_transfer(struct spi_device *spi, struct spi_message *m) ++{ ++ struct ls_spiio_priv* priv = spi_controller_get_devdata(spi->controller); ++ struct spi_transfer *t = NULL; ++ m->actual_length = 0; ++ m->status = 0; ++ ++ ls_spiio_active_cs(priv, spi->chip_select); ++ list_for_each_entry(t, &m->transfers, transfer_list) { ++ /*setup spi clock*/ ++ ls_spiio_set_clk_timing(priv, t->speed_hz, spi->mode); ++ m->actual_length += ls_spiio_xfer(priv, ++ (u8*)t->tx_buf, (u8*)t->rx_buf, t->len); ++ } ++ ls_spiio_clear_cs(priv); ++ ++ m->complete(m->context); ++ ++ return 0; ++} ++ ++static int drv_ls_spiio_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct ls_spiio_priv* priv; ++ struct spi_controller* controller; ++ u32 num_chipselect; ++ int ret; ++ ++ controller = spi_alloc_master(&pdev->dev, sizeof(*priv)); ++ ++ if (controller == NULL) { ++ dev_dbg(&pdev->dev, "controller allocation failed\n"); ++ ret = -ENOMEM; ++ goto err; ++ } ++ ++ if (pdev->id != -1) ++ controller->bus_num = pdev->id; ++ ++ controller->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; ++ controller->setup = __spi_setup; ++ controller->transfer = __spi_transfer; ++ ++ if (of_property_read_u32(pdev->dev.of_node, "num-chipselects", ++ &num_chipselect)) ++ num_chipselect = 1; ++ controller->num_chipselect = num_chipselect ? num_chipselect : 1; ++ ++#ifdef CONFIG_OF ++ controller->dev.of_node = of_node_get(pdev->dev.of_node); ++#endif ++ dev_set_drvdata(&pdev->dev, controller); ++ ++ priv = spi_controller_get_devdata(controller); ++ priv->controller = controller; ++ priv->dev = dev; ++ ++ if (of_find_property(pdev->dev.of_node, "cs-gpios", NULL)) ++ { ++ ret = ls_spiio_init_cs_gpios(priv); ++ if (ret) ++ goto free_controller; ++ } ++ ++ priv->reg = devm_platform_ioremap_resource(pdev, 0); ++ if (priv->reg == NULL) { ++ dev_err(&pdev->dev, "Cannot map IO\n"); ++ ret = -ENXIO; ++ goto try_free_cs_gpios; ++ } ++ if (of_property_read_u32(pdev->dev.of_node, "clock-frequency", ++ &priv->ref_clk)) ++ { ++ dev_err(&pdev->dev, "Cannot get clock\n"); ++ goto try_free_cs_gpios; ++ } ++ ++ ls_spiio_init(priv); ++ ++ ret = spi_register_controller(controller); ++ if (ret) ++ { ++ dev_err(&pdev->dev, "spi register fail\n"); ++ goto unmap_io; ++ } ++ ++ return ret; ++ ++unmap_io: ++ devm_iounmap(&pdev->dev, priv->reg); ++try_free_cs_gpios: ++ if (of_find_property(pdev->dev.of_node, "cs-gpios", NULL)) ++ ls_spiio_free_cs_gpios(priv); ++free_controller: ++ spi_controller_put(controller); ++err: ++ return ret; ++} ++ ++#ifdef CONFIG_OF ++static struct of_device_id drvid_ls_spiio[] = { ++ { .compatible = "loongson,ls-spi-io", }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(of, drvid_ls_spiio); ++#endif ++static struct platform_driver ls_spiio_driver = { ++ .probe = drv_ls_spiio_probe, ++ .driver = { ++ .name = "ls-spi-io", ++ .owner = THIS_MODULE, ++ .bus = &platform_bus_type, ++#ifdef CONFIG_OF ++ .of_match_table = of_match_ptr(drvid_ls_spiio), ++#endif ++ }, ++}; ++ ++static int __init __drv_spi_init(void) ++{ ++ int ret; ++ ++ ret = platform_driver_register(&ls_spiio_driver); ++ return ret; ++} ++ ++static void __exit __drv_spi_exit(void) ++{ ++ platform_driver_unregister(&ls_spiio_driver); ++} ++ ++subsys_initcall(__drv_spi_init); ++module_exit(__drv_spi_exit); ++ ++MODULE_AUTHOR("Niuyize "); ++MODULE_DESCRIPTION("Loongson SPI driver"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/spi/spi-ls.c b/drivers/spi/spi-ls.c +new file mode 100644 +index 000000000..0ad7ce24f +--- /dev/null ++++ b/drivers/spi/spi-ls.c +@@ -0,0 +1,616 @@ ++/* ++ * Loongson SPI driver ++ * ++ * Copyright (C) 2017 Juxin Gao ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/*define spi register */ ++#define SPCR 0x00 ++#define SPSR 0x01 ++#define FIFO 0x02 ++#define SPER 0x03 ++#define PARA 0x04 ++#define SPCS 0x04 ++#define SFCS 0x05 ++#define TIMI 0x06 ++ ++#define PARA_MEM_EN 0x01 ++#define SPSR_SPIF 0x80 ++#define SPSR_WCOL 0x40 ++#define SPCR_SPE 0x40 ++ ++extern unsigned long bus_clock; ++struct ls_spi { ++ struct work_struct work; ++ spinlock_t lock; ++ ++ struct list_head msg_queue; ++ struct spi_controller *controller; ++ void __iomem *base; ++ int cs_active; ++ unsigned long clk; ++ unsigned int hz; ++ unsigned char spcr, sper, spsr; ++ unsigned char para, sfcs, timi; ++ struct workqueue_struct *wq; ++ unsigned int mode; ++ ++ unsigned int gpio_cs_mode; ++ struct gpio_desc **cs_gpios; ++} *ls_spi_dev; ++ ++static inline int set_cs(struct ls_spi *ls_spi, struct spi_device *spi, int val); ++ ++static void ls_spi_write_reg(struct ls_spi *spi, ++ unsigned char reg, unsigned char data) ++{ ++ writeb(data, spi->base +reg); ++} ++ ++static char ls_spi_read_reg(struct ls_spi *spi, ++ unsigned char reg) ++{ ++ return readb(spi->base + reg); ++} ++ ++static int get_ls_spi_clk(struct device *dev, unsigned long* clk) ++{ ++ struct clk *clk_unit; ++ if (!dev || !clk) ++ return -1; ++ ++ clk_unit = devm_clk_get(dev, "sclk"); ++ if (IS_ERR(clk_unit)) ++ return -1; ++ ++ if (clk_prepare_enable(clk_unit)) ++ return -1; ++ ++ clk[0] = clk_get_rate(clk_unit); ++ if (!clk[0]) { ++ clk_disable_unprepare(clk_unit); ++ return -1; ++ } ++ return 0; ++} ++ ++static int ls_spi_update_state(struct ls_spi *ls_spi,struct spi_device *spi, ++ struct spi_transfer *t) ++{ ++ unsigned int hz; ++ unsigned int div, div_tmp; ++ unsigned int bit; ++ unsigned long clk; ++ unsigned char val; ++ const char rdiv[12] = {0, 1, 4, 2, 3, 5, 6, 7, 8, 9, 10, 11}; ++ ++ hz = t ? t->speed_hz : spi->max_speed_hz; ++ ++ if (!hz) ++ hz = spi->max_speed_hz; ++ ++ clk = ls_spi->clk ? ls_spi->clk : 100000000; ++ ++ if ((hz && ls_spi->hz != hz) || ((spi->mode ^ ls_spi->mode) & (SPI_CPOL | SPI_CPHA))) { ++ div = DIV_ROUND_UP(clk, hz); ++ ++ if (div < 2) ++ div = 2; ++ ++ if (div > 4096) ++ div = 4096; ++ ++ bit = fls(div) - 1; ++ if ((1<dev, "clk = %ld hz = %d div_tmp = %d bit = %d\n", ++ clk, hz, div_tmp, bit); ++ ++ ls_spi->hz = hz; ++ ls_spi->spcr = div_tmp & 3; ++ ls_spi->sper = (div_tmp >> 2) & 3; ++ ++ val = ls_spi_read_reg(ls_spi, SPCR); ++ val &= ~0xc; ++ if (spi->mode & SPI_CPOL) ++ val |= 8; ++ if (spi->mode & SPI_CPHA) ++ val |= 4; ++ ls_spi_write_reg(ls_spi, SPCR, (val & ~3) | ls_spi->spcr); ++ val = ls_spi_read_reg(ls_spi, SPER); ++ ls_spi_write_reg(ls_spi, SPER, (val & ~3) | ls_spi->sper); ++ ls_spi->mode &= SPI_NO_CS; ++ ls_spi->mode |= spi->mode; ++ } ++ ++ return 0; ++} ++ ++static int ls_spi_setup(struct spi_device *spi) ++{ ++ struct ls_spi *ls_spi; ++ ++ ls_spi = spi_controller_get_devdata(spi->controller); ++ if (spi->bits_per_word %8) ++ return -EINVAL; ++ ++ if(spi->chip_select >= spi->controller->num_chipselect) ++ return -EINVAL; ++ ++ ls_spi_update_state(ls_spi, spi, NULL); ++ ++ set_cs(ls_spi, spi, 1); ++ ++ return 0; ++} ++ ++static int ls_spi_write_read_8bit( struct spi_device *spi, ++ const u8 **tx_buf, u8 **rx_buf, unsigned int num) ++{ ++ struct ls_spi *ls_spi; ++ ls_spi = spi_controller_get_devdata(spi->controller); ++ ++ if (tx_buf && *tx_buf){ ++ ls_spi_write_reg(ls_spi, FIFO, *((*tx_buf)++)); ++ while((ls_spi_read_reg(ls_spi, SPSR) & 0x1) == 1); ++ }else{ ++ ls_spi_write_reg(ls_spi, FIFO, 0); ++ while((ls_spi_read_reg(ls_spi, SPSR) & 0x1) == 1); ++ } ++ ++ if (rx_buf && *rx_buf) { ++ *(*rx_buf)++ = ls_spi_read_reg(ls_spi, FIFO); ++ }else{ ++ ls_spi_read_reg(ls_spi, FIFO); ++ } ++ ++ return 1; ++} ++ ++static unsigned int ls_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer) ++{ ++ struct ls_spi *ls_spi; ++ unsigned int count; ++ const u8 *tx = xfer->tx_buf; ++ u8 *rx = xfer->rx_buf; ++ ++ ls_spi = spi_controller_get_devdata(spi->controller); ++ count = xfer->len; ++ ++ do { ++ if (ls_spi_write_read_8bit(spi, &tx, &rx, count) < 0) ++ goto out; ++ count--; ++ } while (count); ++ ++out: ++ return xfer->len - count; ++ ++} ++ ++static inline void set_mul_cs(struct ls_spi *ls_spi, struct spi_device *spi, int val) ++{ ++ if (ls_spi->gpio_cs_mode) { ++ gpiod_direction_output(ls_spi->cs_gpios[spi->chip_select], val); ++ } ++ else { ++ int cs = ls_spi_read_reg(ls_spi, SFCS) & ~(0x11 << spi->chip_select); ++ ls_spi_write_reg(ls_spi, SFCS, (val ? (0x11 << spi->chip_select):(0x1 << spi->chip_select)) | cs); ++ } ++} ++ ++static inline int set_cs(struct ls_spi *ls_spi, struct spi_device *spi, int val) ++{ ++ if (spi->mode & SPI_CS_HIGH) ++ val = !val; ++ if (ls_spi->mode & SPI_NO_CS) { ++ // 虽然新增了 gpio_cs_mode 但是 如果 只是单个 cs,一直使能(指不能控制的),那么这里设置不设置都一样 ++ ls_spi_write_reg(ls_spi, SPCS, val); ++ } else { ++ set_mul_cs(ls_spi, spi, val); ++ } ++ return 0; ++} ++ ++static void ls_spi_work(struct work_struct *work) ++{ ++ struct ls_spi *ls_spi = ++ container_of(work, struct ls_spi, work); ++ int param; ++ ++ spin_lock(&ls_spi->lock); ++ param = ls_spi_read_reg(ls_spi, PARA); ++ ls_spi_write_reg(ls_spi, PARA, param&~1); ++ while (!list_empty(&ls_spi->msg_queue)) { ++ ++ struct spi_message *m; ++ struct spi_device *spi; ++ struct spi_transfer *t = NULL; ++ ++ m = container_of(ls_spi->msg_queue.next, struct spi_message, queue); ++ ++ list_del_init(&m->queue); ++ spin_unlock(&ls_spi->lock); ++ ++ spi = m->spi; ++ ++ /*in here set cs*/ ++ set_cs(ls_spi, spi, 0); ++ ++ list_for_each_entry(t, &m->transfers, transfer_list) { ++ ++ /*setup spi clock*/ ++ ls_spi_update_state(ls_spi, spi, t); ++ ++ if (t->len) ++ m->actual_length += ++ ls_spi_write_read(spi, t); ++ } ++ ++ set_cs(ls_spi, spi, 1); ++ m->complete(m->context); ++ ++ spin_lock(&ls_spi->lock); ++ } ++ ++ ls_spi_write_reg(ls_spi, PARA, param); ++ spin_unlock(&ls_spi->lock); ++} ++ ++static int ls_spi_transfer(struct spi_device *spi, struct spi_message *m) ++{ ++ struct ls_spi *ls_spi; ++ struct spi_transfer *t = NULL; ++ ++ m->actual_length = 0; ++ m->status = 0; ++ if (list_empty(&m->transfers) || !m->complete) ++ return -EINVAL; ++ ++ ls_spi = spi_controller_get_devdata(spi->controller); ++ ++ list_for_each_entry(t, &m->transfers, transfer_list) { ++ ++ if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) { ++ dev_err(&spi->dev, ++ "message rejected : " ++ "invalid transfer data buffers\n"); ++ goto msg_rejected; ++ } ++ ++ /*other things not check*/ ++ ++ } ++ ++ spin_lock(&ls_spi->lock); ++ list_add_tail(&m->queue, &ls_spi->msg_queue); ++ queue_work(ls_spi->wq, &ls_spi->work); ++ spin_unlock(&ls_spi->lock); ++ ++ return 0; ++msg_rejected: ++ ++ m->status = -EINVAL; ++ if (m->complete) ++ m->complete(m->context); ++ return -EINVAL; ++} ++ ++static void ls_spi_reginit(void) ++{ ++ unsigned char val; ++ ++ val = ls_spi_read_reg(ls_spi_dev, SPCR); ++ val &= ~SPCR_SPE; ++ ls_spi_write_reg(ls_spi_dev, SPCR, val); ++ ++ ls_spi_write_reg(ls_spi_dev, SPSR, (SPSR_SPIF | SPSR_WCOL)); ++ ++ val = ls_spi_read_reg(ls_spi_dev, SPCR); ++ val |= SPCR_SPE; ++ ls_spi_write_reg(ls_spi_dev, SPCR, val); ++} ++ ++static int ls_spi_probe(struct platform_device *pdev) ++{ ++ struct spi_controller *controller; ++ struct ls_spi *spi; ++ struct resource *res; ++ int ret; ++ unsigned int num_cs; ++ controller = spi_alloc_master(&pdev->dev, sizeof(struct ls_spi)); ++ ++ if (controller == NULL) { ++ dev_dbg(&pdev->dev, "controller allocation failed\n"); ++ return-ENOMEM; ++ } ++ ++ if (pdev->id != -1) ++ controller->bus_num = pdev->id; ++ ++ controller->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH ; ++ controller->setup = ls_spi_setup; ++ controller->transfer = ls_spi_transfer; ++#ifdef CONFIG_OF ++ controller->dev.of_node = of_node_get(pdev->dev.of_node); ++#endif ++ dev_set_drvdata(&pdev->dev, controller); ++ ++ spi = spi_controller_get_devdata(controller); ++ ++ ls_spi_dev = spi; ++ ++ spi->wq = create_singlethread_workqueue(pdev->name); ++ ++ spi->controller = controller; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (res == NULL) { ++ dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n"); ++ ret = -ENOENT; ++ goto free_controller; ++ } ++ ++ spi->base = ioremap(res->start, (res->end - res->start)+1); ++ if (spi->base == NULL) { ++ dev_err(&pdev->dev, "Cannot map IO\n"); ++ ret = -ENXIO; ++ goto unmap_io; ++ } ++ ++ ls_spi_reginit(); ++ ++ spi->clk = 0; ++ get_ls_spi_clk(&pdev->dev, &spi->clk); ++ ++ spi->mode = 0; ++ if (of_get_property(pdev->dev.of_node, "spi-nocs", NULL)) ++ spi->mode |= SPI_NO_CS; ++ ++ spi->gpio_cs_mode = 0; ++ if (of_get_property(pdev->dev.of_node, "gpio_cs", NULL)) ++ spi->gpio_cs_mode = 1; ++ ++ controller->num_chipselect = 4; ++ if (spi->gpio_cs_mode) { ++ ret = of_property_read_u32(pdev->dev.of_node, "num-chipselects", &num_cs); ++ if (ret || !num_cs) { ++ // 看成没有cs的玩法 基本不会来这里 ++ controller->num_chipselect = 0; ++ spi->gpio_cs_mode = 0; ++ spi->mode |= SPI_NO_CS; ++ if (ret) ++ dev_dbg(&pdev->dev, "warning: not found num-chipselects and let it as 0\n"); ++ } else { ++ int i; ++ spi->mode = 0; // 按照 gpio_cs 的模式来弄 这里的话是为了无视 dts 里面的 spi-nocs 声明 ++ controller->num_chipselect = num_cs; ++ spi->cs_gpios = devm_kcalloc(&pdev->dev, num_cs, ++ sizeof(*spi->cs_gpios), ++ GFP_KERNEL); ++ if (!spi->cs_gpios) ++ goto unmap_io; ++ for (i = 0; i < num_cs; i++) { ++ spi->cs_gpios[i] = devm_gpiod_get_index(&pdev->dev, "cs", i, ++ GPIOD_OUT_HIGH); ++ if (IS_ERR(spi->cs_gpios[i])) { ++ devm_kfree(&pdev->dev, spi->cs_gpios); ++ spi->cs_gpios = NULL; ++ goto unmap_io; ++ } ++ } ++ } ++ } ++ ++ INIT_WORK(&spi->work, ls_spi_work); ++ ++ spin_lock_init(&spi->lock); ++ INIT_LIST_HEAD(&spi->msg_queue); ++ ++ ret = spi_register_controller(controller); ++ if (ret < 0) ++ goto unmap_io; ++ ++ return ret; ++ ++unmap_io: ++ iounmap(spi->base); ++free_controller: ++ kfree(controller); ++ spi_controller_put(controller); ++ return ret; ++} ++ ++#ifdef CONFIG_PM ++static int ls_spi_suspend(struct device *dev) ++{ ++ struct ls_spi *ls_spi; ++ struct spi_controller *controller; ++ ++ controller = dev_get_drvdata(dev); ++ ls_spi = spi_controller_get_devdata(controller); ++ ++ ls_spi->spcr = ls_spi_read_reg(ls_spi, SPCR); ++ ls_spi->sper = ls_spi_read_reg(ls_spi, SPER); ++ ls_spi->spsr = ls_spi_read_reg(ls_spi, SPSR); ++ ls_spi->para = ls_spi_read_reg(ls_spi, PARA); ++ ls_spi->sfcs = ls_spi_read_reg(ls_spi, SFCS); ++ ls_spi->timi = ls_spi_read_reg(ls_spi, TIMI); ++ ++#ifdef CONFIG_MACH_LOONGSON64 ++ if (!(ls_spi->para & PARA_MEM_EN)) ++ ls_spi_write_reg(ls_spi, PARA, ls_spi->para | PARA_MEM_EN); ++#endif ++ ++ return 0; ++} ++ ++static int ls_spi_resume(struct device *dev) ++{ ++ struct ls_spi *ls_spi; ++ struct spi_controller *controller; ++ ++ controller = dev_get_drvdata(dev); ++ ls_spi = spi_controller_get_devdata(controller); ++ ++ ls_spi_write_reg(ls_spi, SPCR, ls_spi->spcr); ++ ls_spi_write_reg(ls_spi, SPER, ls_spi->sper); ++ ls_spi_write_reg(ls_spi, SPSR, ls_spi->spsr); ++ ls_spi_write_reg(ls_spi, PARA, ls_spi->para); ++ ls_spi_write_reg(ls_spi, SFCS, ls_spi->sfcs); ++ ls_spi_write_reg(ls_spi, TIMI, ls_spi->timi); ++ ++ return 0; ++} ++ ++static const struct dev_pm_ops ls_spi_dev_pm_ops = { ++ .suspend = ls_spi_suspend, ++ .resume = ls_spi_resume, ++}; ++ ++#define LS_DEV_PM_OPS (&ls_spi_dev_pm_ops) ++#else ++#define LS_DEV_PM_OPS NULL ++#endif ++ ++ ++#ifdef CONFIG_OF ++static struct of_device_id ls_spi_id_table[] = { ++ { .compatible = "loongson,ls-spi", }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(of, ls_spi_id_table); ++#endif ++static struct platform_driver ls_spi_driver = { ++ .probe = ls_spi_probe, ++ .driver = { ++ .name = "ls-spi", ++ .owner = THIS_MODULE, ++ .bus = &platform_bus_type, ++ .pm = LS_DEV_PM_OPS, ++#ifdef CONFIG_OF ++ .of_match_table = of_match_ptr(ls_spi_id_table), ++#endif ++ }, ++}; ++ ++#ifdef CONFIG_PCI ++static struct resource ls_spi_resources[] = { ++ [0] = { ++ .flags = IORESOURCE_MEM, ++ }, ++ [1] = { ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static struct platform_device ls_spi_device = { ++ .name = "ls-spi", ++ .id = 0, ++ .num_resources = ARRAY_SIZE(ls_spi_resources), ++ .resource = ls_spi_resources, ++}; ++ ++ ++static int ls_spi_pci_register(struct pci_dev *pdev, ++ const struct pci_device_id *ent) ++{ ++ int ret; ++ unsigned char v8; ++ ++ pr_debug("ls_spi_pci_register BEGIN\n"); ++ /* Enable device in PCI config */ ++ ret = pci_enable_device(pdev); ++ if (ret < 0) { ++ printk(KERN_ERR "ls-pci (%s): Cannot enable PCI device\n", ++ pci_name(pdev)); ++ goto err_out; ++ } ++ ++ /* request the mem regions */ ++ ret = pci_request_region(pdev, 0, "ls-spi io"); ++ if (ret < 0) { ++ printk( KERN_ERR "ls-spi (%s): cannot request region 0.\n", ++ pci_name(pdev)); ++ goto err_out; ++ } ++ ++ ls_spi_resources[0].start = pci_resource_start (pdev, 0); ++ ls_spi_resources[0].end = pci_resource_end(pdev, 0); ++ /* need api from pci irq */ ++ ret = pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &v8); ++ ++ if (ret == PCIBIOS_SUCCESSFUL) { ++ ++ ls_spi_resources[1].start = v8; ++ ls_spi_resources[1].end = v8; ++ platform_device_register(&ls_spi_device); ++ } ++ ++err_out: ++ return ret; ++} ++ ++static void ls_spi_pci_unregister(struct pci_dev *pdev) ++{ ++ pci_release_region(pdev, 0); ++} ++ ++static struct pci_device_id ls_spi_devices[] = { ++ {PCI_DEVICE(0x14, 0x7a0b)}, ++ {0, 0, 0, 0, 0, 0, 0} ++}; ++ ++static struct pci_driver ls_spi_pci_driver = { ++ .name = "ls-spi-pci", ++ .id_table = ls_spi_devices, ++ .probe = ls_spi_pci_register, ++ .remove = ls_spi_pci_unregister, ++}; ++#endif ++ ++ ++static int __init ls_spi_init(void) ++{ ++ int ret; ++ ++ ret = platform_driver_register(&ls_spi_driver); ++#ifdef CONFIG_PCI ++ if(!ret) ++ ret = pci_register_driver(&ls_spi_pci_driver); ++#endif ++ return ret; ++} ++ ++static void __exit ls_spi_exit(void) ++{ ++ platform_driver_unregister(&ls_spi_driver); ++#ifdef CONFIG_PCI ++ pci_unregister_driver(&ls_spi_pci_driver); ++#endif ++} ++ ++subsys_initcall(ls_spi_init); ++module_exit(ls_spi_exit); ++ ++MODULE_AUTHOR("Juxin Gao "); ++MODULE_DESCRIPTION("Loongson SPI driver"); ++MODULE_LICENSE("GPL"); +-- +2.49.0 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0013-add-loongson2-thermal-support-machines.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0013-add-loongson2-thermal-support-machines.patch new file mode 100644 index 0000000000000000000000000000000000000000..b2a544252a49e3d0c24cdf64ebdef233369a40f2 --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0013-add-loongson2-thermal-support-machines.patch @@ -0,0 +1,323 @@ +From f1c62c2d945414ce7758af9d2cf0feade71324dd Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:18:45 +0800 +Subject: [PATCH 13/17] add loongson2 thermal support machines + +--- + drivers/thermal/loongson2_thermal.c | 213 +++++++++++++++++++++++----- + 1 file changed, 174 insertions(+), 39 deletions(-) + +diff --git a/drivers/thermal/loongson2_thermal.c b/drivers/thermal/loongson2_thermal.c +index 99ca0c7bc..94be1d402 100644 +--- a/drivers/thermal/loongson2_thermal.c ++++ b/drivers/thermal/loongson2_thermal.c +@@ -8,63 +8,169 @@ + #include + #include + #include ++#include + #include +-#include + #include ++#include + #include + #include ++ + #include "thermal_hwmon.h" + +-#define LOONGSON2_MAX_SENSOR_SEL_NUM 3 ++#define LOONGSON2_MAX_SENSOR_SEL_NUM 3 ++ ++#define LOONGSON2_THSENS_CTRL_HI_REG 0x0 ++#define LOONGSON2_THSENS_CTRL_LOW_REG 0x8 ++#define LOONGSON2_THSENS_STATUS_REG 0x10 ++#define LOONGSON2_THSENS_OUT_REG 0x14 ++#define LOONGSON2_THSENS_CFG_REG 0x18 + +-#define LOONGSON2_THSENS_CTRL_HI_REG 0x0 +-#define LOONGSON2_THSENS_CTRL_LOW_REG 0x8 +-#define LOONGSON2_THSENS_STATUS_REG 0x10 +-#define LOONGSON2_THSENS_OUT_REG 0x14 ++#define LOONGSON2_THSENS_INT_LO BIT(0) ++#define LOONGSON2_THSENS_INT_HIGH BIT(1) ++#define LOONGSON2_THSENS_INT_EN (LOONGSON2_THSENS_INT_LO | \ ++ LOONGSON2_THSENS_INT_HIGH) ++#define LOONGSON2_THSENS_OUT_MASK 0xFF + +-#define LOONGSON2_THSENS_INT_LO BIT(0) +-#define LOONGSON2_THSENS_INT_HIGH BIT(1) +-#define LOONGSON2_THSENS_OUT_MASK 0xFF ++enum cpu_id { ++ ID_2K300 = 1, ++ ID_OTHER, ++}; ++ ++/* ++ * This flag is used to indicate the temperature reading ++ * method of the Loongson-2K2000 ++ */ ++#define LS2K2000_THSENS_OUT_FLAG BIT(0) + + struct loongson2_thermal_chip_data { +- unsigned int thermal_sensor_sel; ++ enum cpu_id cpu_type; ++ unsigned int thermal_sensor_sel; ++ unsigned int flags; + }; + + struct loongson2_thermal_data { +- void __iomem *regs; ++ void __iomem *ctrl_reg; ++ void __iomem *temp_reg; + const struct loongson2_thermal_chip_data *chip_data; + }; + ++static void loongson2_set_ctrl_regs(struct loongson2_thermal_data *data, ++ int ctrl_data, bool low, bool enable) ++{ ++ int reg_ctrl = 0; ++ int reg_off = data->chip_data->thermal_sensor_sel * 2; ++ int ctrl_reg = low ? LOONGSON2_THSENS_CTRL_LOW_REG : LOONGSON2_THSENS_CTRL_HI_REG; ++ ++ reg_ctrl = ctrl_data + HECTO; ++ reg_ctrl |= enable ? 0x100 : 0; ++ writew(reg_ctrl, data->ctrl_reg + ctrl_reg + reg_off); ++} ++ + static int loongson2_thermal_set(struct loongson2_thermal_data *data, +- int low, int high, bool enable) ++ int low, int high, bool enable) + { +- u64 reg_ctrl = 0; +- int reg_off = data->chip_data->thermal_sensor_sel * 2; ++ /* Set low temperature threshold */ ++ loongson2_set_ctrl_regs(data, clamp(-40, low, high), true, enable); + +- low = clamp(-40, low, high); +- high = clamp(125, low, high); ++ /* Set high temperature threshold */ ++ loongson2_set_ctrl_regs(data, clamp(125, low, high), false, enable); + +- low += HECTO; +- high += HECTO; ++ return 0; ++} + +- reg_ctrl = low; +- reg_ctrl |= enable ? 0x100 : 0; +- writew(reg_ctrl, data->regs + LOONGSON2_THSENS_CTRL_LOW_REG + reg_off); ++static int warning_2k300_old_fuse_tip; + +- reg_ctrl = high; +- reg_ctrl |= enable ? 0x100 : 0; +- writew(reg_ctrl, data->regs + LOONGSON2_THSENS_CTRL_HI_REG + reg_off); ++static int loongson2_2k1000_get_temp(struct thermal_zone_device *tz, int *temp) ++{ ++ int val; ++ int temp_val; ++ int old_fuse_2k300; ++ struct loongson2_thermal_data *data = thermal_zone_device_priv(tz); ++ const struct loongson2_thermal_chip_data* chip_data; ++ enum cpu_id cur_id; ++ ++ if (!data) ++ cur_id = ID_OTHER; ++ else { ++ chip_data = data->chip_data; ++ if (!chip_data) ++ cur_id = ID_OTHER; ++ else ++ cur_id = chip_data->cpu_type; ++ } ++ ++ val = readl(data->ctrl_reg + LOONGSON2_THSENS_OUT_REG); ++ if (cur_id == ID_2K300) { ++ int version; ++ int val_fix; ++ u32 reg_val; ++ writel(0xff03, data->ctrl_reg + LOONGSON2_THSENS_CFG_REG); // 0x18 ++ reg_val = readl(data->ctrl_reg + LOONGSON2_THSENS_OUT_REG); ++ reg_val &= 0x7ff; ++#if 0 ++ version = readl(data->ctrl_reg + 0x2AF0); // 0x16003ff0 ++ printk("%s: version [0x%x]\n", __func__, version); ++ version >>= 4; ++ version &= 1; ++ ++ if(version) ++ val_fix = readl(data->ctrl_reg + 0x2AF4) & 0xffff; // 0x16003ff4 ++ else ++ val_fix = (readl(data->ctrl_reg + 0x2AF0) >> 20) & 0xffff; // 0x16003ff0 ++ ++ printk("%s: val_fix [0x%x]\n", __func__, val_fix); ++ ++ if (val_fix & 0x8000) ++ val_fix = -(val_fix & 0x7fff); ++ else ++ val_fix = val_fix & 0x7fff; ++#endif ++ ++#if IS_ENABLED(CONFIG_LOONGSON_2K300) ++ val_fix = val_fix & 0x7fff; ++#else ++ val_fix = -(val_fix & 0x7fff); ++#endif ++ reg_val += val_fix; ++ temp_val = reg_val * 570 - 394700; ++ /* ++ * fix old 2k300 use old fuse that will let kernel crash critical temperature ++ */ ++ old_fuse_2k300 = 0; ++ val = temp_val; ++ if (temp_val < -55000) { ++ pr_info("look temp_val is %d\n", temp_val); ++ old_fuse_2k300 = 1; ++ temp_val = -55000; ++ } ++ else if (temp_val > 125000) { ++ pr_info("look temp_val is %d\n", temp_val); ++ old_fuse_2k300 = 1; ++ temp_val = 125000; ++ } ++ if (old_fuse_2k300) ++ { ++ if (!warning_2k300_old_fuse_tip) { ++ pr_err("%s this 2k300 use old fuse so thermal not right!(%d)\n", __func__, val); ++ warning_2k300_old_fuse_tip = 1; ++ } ++ val = readl(data->ctrl_reg + LOONGSON2_THSENS_OUT_REG); ++ temp_val = ((val & 0x7ff) * 569) - 394700; ++ } ++ *temp = temp_val; ++ } else ++ *temp = ((val & LOONGSON2_THSENS_OUT_MASK) - HECTO) * KILO; + + return 0; + } + +-static int loongson2_thermal_get_temp(struct thermal_zone_device *tz, int *temp) ++static int loongson2_2k2000_get_temp(struct thermal_zone_device *tz, int *temp) + { +- u32 reg_val; ++ int val; + struct loongson2_thermal_data *data = thermal_zone_device_priv(tz); + +- reg_val = readl(data->regs + LOONGSON2_THSENS_OUT_REG); +- *temp = ((reg_val & LOONGSON2_THSENS_OUT_MASK) - HECTO) * KILO; ++ val = readl(data->temp_reg); ++ *temp = ((val & 0xffff) * 820 / 0x4000 - 311) * KILO; + + return 0; + } +@@ -74,8 +180,7 @@ static irqreturn_t loongson2_thermal_irq_thread(int irq, void *dev) + struct thermal_zone_device *tzd = dev; + struct loongson2_thermal_data *data = thermal_zone_device_priv(tzd); + +- writeb(LOONGSON2_THSENS_INT_LO | LOONGSON2_THSENS_INT_HIGH, data->regs + +- LOONGSON2_THSENS_STATUS_REG); ++ writeb(LOONGSON2_THSENS_INT_EN, data->ctrl_reg + LOONGSON2_THSENS_STATUS_REG); + + thermal_zone_device_update(tzd, THERMAL_EVENT_UNSPECIFIED); + +@@ -89,8 +194,8 @@ static int loongson2_thermal_set_trips(struct thermal_zone_device *tz, int low, + return loongson2_thermal_set(data, low/MILLI, high/MILLI, true); + } + +-static const struct thermal_zone_device_ops loongson2_of_thermal_ops = { +- .get_temp = loongson2_thermal_get_temp, ++static struct thermal_zone_device_ops loongson2_of_thermal_ops = { ++ .get_temp = loongson2_2k1000_get_temp, + .set_trips = loongson2_thermal_set_trips, + }; + +@@ -107,22 +212,30 @@ static int loongson2_thermal_probe(struct platform_device *pdev) + + data->chip_data = device_get_match_data(dev); + +- data->regs = devm_platform_ioremap_resource(pdev, 0); +- if (IS_ERR(data->regs)) +- return PTR_ERR(data->regs); ++ data->ctrl_reg = devm_platform_ioremap_resource(pdev, 0); ++ if (IS_ERR(data->ctrl_reg)) ++ return PTR_ERR(data->ctrl_reg); ++ ++ /* The temperature output register is separate for Loongson-2K2000 */ ++ if (data->chip_data->flags & LS2K2000_THSENS_OUT_FLAG) { ++ data->temp_reg = devm_platform_ioremap_resource(pdev, 1); ++ if (IS_ERR(data->temp_reg)) ++ return PTR_ERR(data->temp_reg); ++ ++ loongson2_of_thermal_ops.get_temp = loongson2_2k2000_get_temp; ++ } + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + +- writeb(LOONGSON2_THSENS_INT_LO | LOONGSON2_THSENS_INT_HIGH, data->regs + +- LOONGSON2_THSENS_STATUS_REG); ++ writeb(LOONGSON2_THSENS_INT_EN, data->ctrl_reg + LOONGSON2_THSENS_STATUS_REG); + + loongson2_thermal_set(data, 0, 0, false); + + for (i = 0; i <= LOONGSON2_MAX_SENSOR_SEL_NUM; i++) { + tzd = devm_thermal_of_zone_register(dev, i, data, +- &loongson2_of_thermal_ops); ++ &loongson2_of_thermal_ops); + + if (!IS_ERR(tzd)) + break; +@@ -134,7 +247,7 @@ static int loongson2_thermal_probe(struct platform_device *pdev) + } + + ret = devm_request_threaded_irq(dev, irq, NULL, loongson2_thermal_irq_thread, +- IRQF_ONESHOT, "loongson2_thermal", tzd); ++ IRQF_ONESHOT, "loongson2_thermal", tzd); + if (ret < 0) + return dev_err_probe(dev, ret, "failed to request alarm irq\n"); + +@@ -144,14 +257,35 @@ static int loongson2_thermal_probe(struct platform_device *pdev) + } + + static const struct loongson2_thermal_chip_data loongson2_thermal_ls2k1000_data = { ++ .cpu_type = ID_OTHER, + .thermal_sensor_sel = 0, + }; + ++static const struct loongson2_thermal_chip_data loongson2_thermal_ls2k300_data = { ++ .cpu_type = ID_2K300, ++ .thermal_sensor_sel = 0, ++ .flags = 0, ++}; ++ ++static const struct loongson2_thermal_chip_data loongson2_thermal_ls2k2000_data = { ++ .cpu_type = ID_OTHER, ++ .thermal_sensor_sel = 0, ++ .flags = LS2K2000_THSENS_OUT_FLAG, ++}; ++ + static const struct of_device_id of_loongson2_thermal_match[] = { + { + .compatible = "loongson,ls2k1000-thermal", + .data = &loongson2_thermal_ls2k1000_data, + }, ++ { ++ .compatible = "loongson,ls2k2000-thermal", ++ .data = &loongson2_thermal_ls2k2000_data, ++ }, ++ { ++ .compatible = "loongson,ls2k300-thermal", ++ .data = &loongson2_thermal_ls2k300_data, ++ }, + { /* end */ } + }; + MODULE_DEVICE_TABLE(of, of_loongson2_thermal_match); +@@ -166,4 +300,5 @@ static struct platform_driver loongson2_thermal_driver = { + module_platform_driver(loongson2_thermal_driver); + + MODULE_DESCRIPTION("Loongson2 thermal driver"); ++MODULE_AUTHOR("Loongson Technology Corporation Limited"); + MODULE_LICENSE("GPL"); +-- +2.49.0 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0014-add-some-usb-dwc2-support-object.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0014-add-some-usb-dwc2-support-object.patch new file mode 100644 index 0000000000000000000000000000000000000000..e28828905575a727a0bdff052a1e493877650ca3 --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0014-add-some-usb-dwc2-support-object.patch @@ -0,0 +1,256 @@ +From aa5d1ca44b4359bf1e5bf2a92d5c8d5bca7c990b Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:21:04 +0800 +Subject: [PATCH 14/17] add some usb dwc2 support object + +--- + drivers/usb/dwc2/core.h | 8 +++ + drivers/usb/dwc2/params.c | 105 ++++++++++++++++++++++++++++++-------- + 2 files changed, 93 insertions(+), 20 deletions(-) + +diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h +index a141f83ab..0847c1691 100644 +--- a/drivers/usb/dwc2/core.h ++++ b/drivers/usb/dwc2/core.h +@@ -442,6 +442,7 @@ struct dwc2_core_params { + #define DWC2_SPEED_PARAM_LOW 2 + + u8 phy_utmi_width; ++ bool eusb2_disc; + bool phy_ulpi_ddr; + bool phy_ulpi_ext_vbus; + bool enable_dynamic_fifo; +@@ -499,6 +500,12 @@ struct dwc2_core_params { + u32 g_tx_fifo_size[MAX_EPS_CHANNELS]; + + bool change_speed_quirk; ++ ++#define DWC2_LOONGSON_FIX_NONE 0 ++#define DWC2_LOONGSON_FIX_DMA 1 ++#define DWC2_LOONGSON_FIX_DELAY 2 ++#define DWC2_LOONGSON_FIX_DELAY_FULL 3 ++ u32 loongson_fix; + }; + + /** +@@ -1110,6 +1117,7 @@ struct dwc2_hsotg { + #define DWC2_CORE_REV_3_10a 0x4f54310a + #define DWC2_CORE_REV_4_00a 0x4f54400a + #define DWC2_CORE_REV_4_20a 0x4f54420a ++#define DWC2_CORE_REV_5_00a 0x4f54500a + #define DWC2_FS_IOT_REV_1_00a 0x5531100a + #define DWC2_HS_IOT_REV_1_00a 0x5532100a + #define DWC2_CORE_REV_MASK 0x0000ffff +diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c +index 93f52e371..e689f8d7b 100644 +--- a/drivers/usb/dwc2/params.c ++++ b/drivers/usb/dwc2/params.c +@@ -5,7 +5,7 @@ + + #include + #include +-#include ++#include + #include + #include + #include +@@ -66,6 +66,13 @@ static void dwc2_set_loongson_params(struct dwc2_hsotg *hsotg) + + p->phy_utmi_width = 8; + p->power_down = DWC2_POWER_DOWN_PARAM_PARTIAL; ++ ++ device_property_read_u32(hsotg->dev, "loongson,dwc2-fix", ++ &p->loongson_fix); ++ dev_info(hsotg->dev, "Loongson Fix Param: %d\n", p->loongson_fix); ++ ++ if (p->loongson_fix == DWC2_LOONGSON_FIX_DMA) ++ p->dma_desc_enable = true; + } + + static void dwc2_set_x1600_params(struct dwc2_hsotg *hsotg) +@@ -130,9 +137,18 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg) + p->lpm_clock_gating = false; + p->besl = false; + p->hird_threshold_en = false; ++ p->no_clock_gating = true; + } + +-static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg) ++static void dwc2_set_ltq_danube_params(struct dwc2_hsotg *hsotg) ++{ ++ struct dwc2_core_params *p = &hsotg->params; ++ ++ p->otg_caps.hnp_support = false; ++ p->otg_caps.srp_support = false; ++} ++ ++static void dwc2_set_ltq_ase_params(struct dwc2_hsotg *hsotg) + { + struct dwc2_core_params *p = &hsotg->params; + +@@ -141,12 +157,21 @@ static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg) + p->host_rx_fifo_size = 288; + p->host_nperio_tx_fifo_size = 128; + p->host_perio_tx_fifo_size = 96; +- p->max_transfer_size = 65535; +- p->max_packet_count = 511; + p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << + GAHBCFG_HBSTLEN_SHIFT; + } + ++static void dwc2_set_ltq_xrx200_params(struct dwc2_hsotg *hsotg) ++{ ++ struct dwc2_core_params *p = &hsotg->params; ++ ++ p->otg_caps.hnp_support = false; ++ p->otg_caps.srp_support = false; ++ p->host_rx_fifo_size = 288; ++ p->host_nperio_tx_fifo_size = 128; ++ p->host_perio_tx_fifo_size = 136; ++} ++ + static void dwc2_set_amlogic_params(struct dwc2_hsotg *hsotg) + { + struct dwc2_core_params *p = &hsotg->params; +@@ -200,6 +225,25 @@ static void dwc2_set_amcc_params(struct dwc2_hsotg *hsotg) + p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT; + } + ++static void dwc2_set_cv1800_params(struct dwc2_hsotg *hsotg) ++{ ++ struct dwc2_core_params *p = &hsotg->params; ++ ++ p->otg_caps.hnp_support = false; ++ p->otg_caps.srp_support = false; ++ p->host_dma = false; ++ p->g_dma = false; ++ p->speed = DWC2_SPEED_PARAM_HIGH; ++ p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI; ++ p->phy_utmi_width = 16; ++ p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT; ++ p->lpm = false; ++ p->lpm_clock_gating = false; ++ p->besl = false; ++ p->hird_threshold_en = false; ++ p->power_down = DWC2_POWER_DOWN_PARAM_NONE; ++} ++ + static void dwc2_set_stm32f4x9_fsotg_params(struct dwc2_hsotg *hsotg) + { + struct dwc2_core_params *p = &hsotg->params; +@@ -277,8 +321,11 @@ const struct of_device_id dwc2_of_match_table[] = { + { .compatible = "ingenic,x1830-otg", .data = dwc2_set_x1600_params }, + { .compatible = "ingenic,x2000-otg", .data = dwc2_set_x2000_params }, + { .compatible = "rockchip,rk3066-usb", .data = dwc2_set_rk_params }, +- { .compatible = "lantiq,arx100-usb", .data = dwc2_set_ltq_params }, +- { .compatible = "lantiq,xrx200-usb", .data = dwc2_set_ltq_params }, ++ { .compatible = "lantiq,danube-usb", .data = &dwc2_set_ltq_danube_params }, ++ { .compatible = "lantiq,ase-usb", .data = &dwc2_set_ltq_ase_params }, ++ { .compatible = "lantiq,arx100-usb", .data = &dwc2_set_ltq_ase_params }, ++ { .compatible = "lantiq,xrx200-usb", .data = &dwc2_set_ltq_xrx200_params }, ++ { .compatible = "lantiq,xrx300-usb", .data = &dwc2_set_ltq_xrx200_params }, + { .compatible = "snps,dwc2" }, + { .compatible = "samsung,s3c6400-hsotg", + .data = dwc2_set_s3c6400_params }, +@@ -294,6 +341,8 @@ const struct of_device_id dwc2_of_match_table[] = { + .data = dwc2_set_amlogic_a1_params }, + { .compatible = "amcc,dwc-otg", .data = dwc2_set_amcc_params }, + { .compatible = "apm,apm82181-dwc-otg", .data = dwc2_set_amcc_params }, ++ { .compatible = "sophgo,cv1800-usb", ++ .data = dwc2_set_cv1800_params }, + { .compatible = "st,stm32f4x9-fsotg", + .data = dwc2_set_stm32f4x9_fsotg_params }, + { .compatible = "st,stm32f4x9-hsotg" }, +@@ -305,11 +354,14 @@ const struct of_device_id dwc2_of_match_table[] = { + .data = dwc2_set_stm32mp15_hsotg_params }, + { .compatible = "intel,socfpga-agilex-hsotg", + .data = dwc2_set_socfpga_agilex_params }, ++ { .compatible = "loongson,loongson2-dwc2", ++ .data = dwc2_set_loongson_params }, + {}, + }; + MODULE_DEVICE_TABLE(of, dwc2_of_match_table); + + const struct acpi_device_id dwc2_acpi_match[] = { ++ /* This ID refers to the same USB IP as of_device_id brcm,bcm2835-usb */ + { "BCM2848", (kernel_ulong_t)dwc2_set_bcm_params }, + { }, + }; +@@ -474,6 +526,7 @@ static void dwc2_set_default_params(struct dwc2_hsotg *hsotg) + dwc2_set_param_lpm(hsotg); + p->phy_ulpi_ddr = false; + p->phy_ulpi_ext_vbus = false; ++ p->eusb2_disc = false; + + p->enable_dynamic_fifo = hw->enable_dynamic_fifo; + p->en_multiple_tx_fifo = hw->en_multiple_tx_fifo; +@@ -736,6 +789,25 @@ static void dwc2_check_param_tx_fifo_sizes(struct dwc2_hsotg *hsotg) + } + } + ++static void dwc2_check_param_eusb2_disc(struct dwc2_hsotg *hsotg) ++{ ++ u32 gsnpsid; ++ ++ if (!hsotg->params.eusb2_disc) ++ return; ++ gsnpsid = dwc2_readl(hsotg, GSNPSID); ++ /* ++ * eusb2_disc not supported by FS IOT devices. ++ * For other cores, it supported starting from version 5.00a ++ */ ++ if ((gsnpsid & ~DWC2_CORE_REV_MASK) == DWC2_FS_IOT_ID || ++ (gsnpsid & DWC2_CORE_REV_MASK) < ++ (DWC2_CORE_REV_5_00a & DWC2_CORE_REV_MASK)) { ++ hsotg->params.eusb2_disc = false; ++ return; ++ } ++} ++ + #define CHECK_RANGE(_param, _min, _max, _def) do { \ + if ((int)(hsotg->params._param) < (_min) || \ + (hsotg->params._param) > (_max)) { \ +@@ -764,6 +836,8 @@ static void dwc2_check_params(struct dwc2_hsotg *hsotg) + dwc2_check_param_speed(hsotg); + dwc2_check_param_phy_utmi_width(hsotg); + dwc2_check_param_power_down(hsotg); ++ dwc2_check_param_eusb2_disc(hsotg); ++ + CHECK_BOOL(enable_dynamic_fifo, hw->enable_dynamic_fifo); + CHECK_BOOL(en_multiple_tx_fifo, hw->en_multiple_tx_fifo); + CHECK_BOOL(i2c_enable, hw->i2c_enable); +@@ -968,26 +1042,17 @@ typedef void (*set_params_cb)(struct dwc2_hsotg *data); + + int dwc2_init_params(struct dwc2_hsotg *hsotg) + { +- const struct of_device_id *match; + set_params_cb set_params; + + dwc2_set_default_params(hsotg); + dwc2_get_device_properties(hsotg); + +- match = of_match_device(dwc2_of_match_table, hsotg->dev); +- if (match && match->data) { +- set_params = match->data; ++ set_params = device_get_match_data(hsotg->dev); ++ if (set_params) { + set_params(hsotg); +- } else if (!match) { +- const struct acpi_device_id *amatch; +- const struct pci_device_id *pmatch = NULL; +- +- amatch = acpi_match_device(dwc2_acpi_match, hsotg->dev); +- if (amatch && amatch->driver_data) { +- set_params = (set_params_cb)amatch->driver_data; +- set_params(hsotg); +- } else if (!amatch) +- pmatch = pci_match_id(dwc2_pci_ids, to_pci_dev(hsotg->dev->parent)); ++ } else { ++ const struct pci_device_id *pmatch = ++ pci_match_id(dwc2_pci_ids, to_pci_dev(hsotg->dev->parent)); + + if (pmatch && pmatch->driver_data) { + set_params = (set_params_cb)pmatch->driver_data; +-- +2.49.0 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0015-add-loongson2-wdt-support.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0015-add-loongson2-wdt-support.patch new file mode 100644 index 0000000000000000000000000000000000000000..2ac489d978d3d68220a0f035ae855efb2ef7b9b2 --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0015-add-loongson2-wdt-support.patch @@ -0,0 +1,231 @@ +From d823856471d65cbed0fd67e8b6eabaecb6fbceaa Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:21:54 +0800 +Subject: [PATCH 15/17] add loongson2 wdt support + +--- + drivers/watchdog/Kconfig | 7 ++ + drivers/watchdog/Makefile | 1 + + drivers/watchdog/loongson2_wdt.c | 180 +++++++++++++++++++++++++++++++ + 3 files changed, 188 insertions(+) + create mode 100644 drivers/watchdog/loongson2_wdt.c + +diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig +index 751458959..1a8ed3dda 100644 +--- a/drivers/watchdog/Kconfig ++++ b/drivers/watchdog/Kconfig +@@ -1884,6 +1884,13 @@ config LOONGSON1_WDT + help + Hardware driver for the Loongson1 SoC Watchdog Timer. + ++config LOONGSON2_WDT ++ tristate "Loongson2 SoC hardware watchdog" ++ depends on MACH_LOONGSON64 ++ select WATCHDOG_CORE ++ help ++ Hardware driver for the Loongson2 SoC Watchdog Timer. ++ + config RALINK_WDT + tristate "Ralink SoC watchdog" + select WATCHDOG_CORE +diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile +index 7eab9de31..34cd9b623 100644 +--- a/drivers/watchdog/Makefile ++++ b/drivers/watchdog/Makefile +@@ -174,6 +174,7 @@ obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o + octeon-wdt-y := octeon-wdt-main.o octeon-wdt-nmi.o + obj-$(CONFIG_LANTIQ_WDT) += lantiq_wdt.o + obj-$(CONFIG_LOONGSON1_WDT) += loongson1_wdt.o ++obj-$(CONFIG_LOONGSON2_WDT) += loongson2_wdt.o + obj-$(CONFIG_RALINK_WDT) += rt2880_wdt.o + obj-$(CONFIG_IMGPDC_WDT) += imgpdc_wdt.o + obj-$(CONFIG_MT7621_WDT) += mt7621_wdt.o +diff --git a/drivers/watchdog/loongson2_wdt.c b/drivers/watchdog/loongson2_wdt.c +new file mode 100644 +index 000000000..83252edf3 +--- /dev/null ++++ b/drivers/watchdog/loongson2_wdt.c +@@ -0,0 +1,180 @@ ++/* ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#define DEFAULT_HEARTBEAT 30 ++ ++static bool nowayout = WATCHDOG_NOWAYOUT; ++module_param(nowayout, bool, 0444); ++ ++static unsigned int heartbeat; ++module_param(heartbeat, uint, 0444); ++ ++struct ls2x_wdt_drvdata { ++ void __iomem *base; ++ struct clk *clk; ++ unsigned long clk_rate; ++ struct watchdog_device wdt; ++}; ++ ++static int ls2x_wdt_ping(struct watchdog_device *wdt_dev) ++{ ++ struct ls2x_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); ++ ++ writel(0x1, drvdata->base + WD_CR); ++ ++ return 0; ++} ++ ++static int ls2x_wdt_set_timeout(struct watchdog_device *wdt_dev, ++ unsigned int timeout) ++{ ++ struct ls2x_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); ++ unsigned int max_hw_heartbeat = wdt_dev->max_hw_heartbeat_ms / 1000; ++ unsigned int counts; ++ ++ wdt_dev->timeout = timeout; ++ ++ counts = drvdata->clk_rate * min(timeout, max_hw_heartbeat); ++ writel(counts, drvdata->base + WD_TIMER); ++ ++ return 0; ++} ++ ++static int ls2x_wdt_start(struct watchdog_device *wdt_dev) ++{ ++ struct ls2x_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); ++ u8 wd_en = 1; ++ ++ writel((1 << wd_en), drvdata->base + RST_CTR); ++ ++ return 0; ++} ++ ++static int ls2x_wdt_stop(struct watchdog_device *wdt_dev) ++{ ++ struct ls2x_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); ++ ++ writel(0, drvdata->base + RST_CTR); ++ ++ return 0; ++} ++ ++static const struct watchdog_info ls2x_wdt_info = { ++ .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, ++ .identity = "Loongson2 Watchdog", ++}; ++ ++static const struct watchdog_ops ls2x_wdt_ops = { ++ .owner = THIS_MODULE, ++ .start = ls2x_wdt_start, ++ .stop = ls2x_wdt_stop, ++ .ping = ls2x_wdt_ping, ++ .set_timeout = ls2x_wdt_set_timeout, ++}; ++ ++static int ls2x_wdt_probe(struct platform_device *pdev) ++{ ++ struct ls2x_wdt_drvdata *drvdata; ++ struct watchdog_device *ls2x_wdt; ++ unsigned long clk_rate; ++ struct resource *res; ++ int err; ++ ++ drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); ++ if (!drvdata) ++ return -ENOMEM; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ drvdata->base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(drvdata->base)) ++ return PTR_ERR(drvdata->base); ++ ++ drvdata->clk = devm_clk_get(&pdev->dev, "wdt-clk"); ++ if (IS_ERR(drvdata->clk)) ++ return PTR_ERR(drvdata->clk); ++ ++ err = clk_prepare_enable(drvdata->clk); ++ if (err) { ++ dev_err(&pdev->dev, "clk enable failed\n"); ++ return err; ++ } ++ ++ clk_rate = clk_get_rate(drvdata->clk); ++ if (!clk_rate) { ++ err = -EINVAL; ++ goto err0; ++ } ++ drvdata->clk_rate = clk_rate; ++ ++ ls2x_wdt = &drvdata->wdt; ++ ls2x_wdt->info = &ls2x_wdt_info; ++ ls2x_wdt->ops = &ls2x_wdt_ops; ++ ls2x_wdt->timeout = DEFAULT_HEARTBEAT; ++ ls2x_wdt->min_timeout = 1; ++ ls2x_wdt->max_hw_heartbeat_ms = U32_MAX / clk_rate * 1000; ++ ls2x_wdt->parent = &pdev->dev; ++ ++ watchdog_init_timeout(ls2x_wdt, heartbeat, &pdev->dev); ++ watchdog_set_nowayout(ls2x_wdt, nowayout); ++ watchdog_set_drvdata(ls2x_wdt, drvdata); ++ ++ err = watchdog_register_device(&drvdata->wdt); ++ if (err) { ++ dev_err(&pdev->dev, "failed to register watchdog device\n"); ++ goto err0; ++ } ++ ++ platform_set_drvdata(pdev, drvdata); ++ ++ dev_info(&pdev->dev, "Loongson2 Watchdog driver registered\n"); ++ ++ return 0; ++err0: ++ pr_info("lsdbg----> ls2x_wdt_probe err...."); ++ clk_disable_unprepare(drvdata->clk); ++ return err; ++} ++ ++static int ls2x_wdt_remove(struct platform_device *pdev) ++{ ++ struct ls2x_wdt_drvdata *drvdata = platform_get_drvdata(pdev); ++ ++ watchdog_unregister_device(&drvdata->wdt); ++ clk_disable_unprepare(drvdata->clk); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_OF ++static const struct of_device_id ls2x_wdt_of_match[] = { ++ {.compatible = "loongson,ls2x-wdt",}, ++ { /* sentinel */ } ++}; ++ ++MODULE_DEVICE_TABLE(of, ls2x_wdt_of_match); ++#endif ++ ++static struct platform_driver ls2x_wdt_driver = { ++ .probe = ls2x_wdt_probe, ++ .remove = ls2x_wdt_remove, ++ .driver = { ++ .name = "ls2x-wdt", ++ .of_match_table = of_match_ptr(ls2x_wdt_of_match), ++ }, ++}; ++ ++module_platform_driver(ls2x_wdt_driver); ++ ++MODULE_AUTHOR("Xiaochuang Mao "); ++MODULE_DESCRIPTION("Loongson2 Watchdog Driver"); ++MODULE_LICENSE("GPL"); +-- +2.49.0 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0016-add-loongson-sound-card-support.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0016-add-loongson-sound-card-support.patch new file mode 100644 index 0000000000000000000000000000000000000000..1298a72752c471fe620d02e6ce760cff5034aa5a --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0016-add-loongson-sound-card-support.patch @@ -0,0 +1,2084 @@ +From 54853aa34785025422254e8a3ea14790d164cd76 Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:22:22 +0800 +Subject: [PATCH 16/17] add loongson sound card support + +--- + sound/soc/Kconfig | 1 + + sound/soc/Makefile | 1 + + sound/soc/loongson-gd/Kconfig | 30 ++ + sound/soc/loongson-gd/Makefile | 4 + + sound/soc/loongson-gd/ls-i2s.c | 383 +++++++++++++++ + sound/soc/loongson-gd/ls-i2s.h | 15 + + sound/soc/loongson-gd/ls-lib.h | 16 + + sound/soc/loongson-gd/ls-pcm-generic.c | 593 ++++++++++++++++++++++ + sound/soc/loongson-gd/ls-pcm.c | 654 +++++++++++++++++++++++++ + sound/soc/loongson-gd/ls-pcm.h | 77 +++ + sound/soc/loongson-gd/ls-sound.c | 203 ++++++++ + 11 files changed, 1977 insertions(+) + create mode 100644 sound/soc/loongson-gd/Kconfig + create mode 100644 sound/soc/loongson-gd/Makefile + create mode 100644 sound/soc/loongson-gd/ls-i2s.c + create mode 100644 sound/soc/loongson-gd/ls-i2s.h + create mode 100644 sound/soc/loongson-gd/ls-lib.h + create mode 100644 sound/soc/loongson-gd/ls-pcm-generic.c + create mode 100644 sound/soc/loongson-gd/ls-pcm.c + create mode 100644 sound/soc/loongson-gd/ls-pcm.h + create mode 100644 sound/soc/loongson-gd/ls-sound.c + +diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig +index 439fa631c..01d7d2208 100644 +--- a/sound/soc/Kconfig ++++ b/sound/soc/Kconfig +@@ -90,6 +90,7 @@ source "sound/soc/google/Kconfig" + source "sound/soc/hisilicon/Kconfig" + source "sound/soc/jz4740/Kconfig" + source "sound/soc/kirkwood/Kconfig" ++source "sound/soc/loongson-gd/Kconfig" + source "sound/soc/loongson/Kconfig" + source "sound/soc/img/Kconfig" + source "sound/soc/intel/Kconfig" +diff --git a/sound/soc/Makefile b/sound/soc/Makefile +index 8376fdb21..b61a121a6 100644 +--- a/sound/soc/Makefile ++++ b/sound/soc/Makefile +@@ -46,6 +46,7 @@ obj-$(CONFIG_SND_SOC) += fsl/ + obj-$(CONFIG_SND_SOC) += google/ + obj-$(CONFIG_SND_SOC) += hisilicon/ + obj-$(CONFIG_SND_SOC) += jz4740/ ++obj-$(CONFIG_SND_SOC) += loongson-gd/ + obj-$(CONFIG_SND_SOC) += loongson/ + obj-$(CONFIG_SND_SOC) += img/ + obj-$(CONFIG_SND_SOC) += intel/ +diff --git a/sound/soc/loongson-gd/Kconfig b/sound/soc/loongson-gd/Kconfig +new file mode 100644 +index 000000000..7cf0e31ae +--- /dev/null ++++ b/sound/soc/loongson-gd/Kconfig +@@ -0,0 +1,30 @@ ++menuconfig SND_SOC_LOONGSON ++ tristate "ASoC support for loongson" ++ ++if SND_SOC_LOONGSON ++ ++config SND_LS ++ tristate "SoC Audio for ls-i2s" ++ help ++ Say Y or M if you want to add support for codecs attached to ++ the I2S interface. You will also need to select the Audio ++ interfaces to support below. ++ ++config SND_LS_PCM ++ tristate "SoC Audio for ls-pcm used descriptor" ++ help ++ Say Y or M if you want to add support for codecs attached to ++ the PCM interface. Select this by configuring the dma of the descriptor. ++ ++config SND_LS_PCM_GENERIC_DMA ++ tristate "SoC Audio for ls-pcm used generic dma" ++ help ++ Say Y or M if you want to add support for codecs attached to ++ the PCM interface. Select this by configuring the generic dma. ++ ++config SND_LS_DAILINK ++ tristate "SoC Audio for Sound-Card/Dai-Link" ++ depends on SND_LS ++ default y ++ ++endif #SND_SOC_LOONGSON +diff --git a/sound/soc/loongson-gd/Makefile b/sound/soc/loongson-gd/Makefile +new file mode 100644 +index 000000000..cee067533 +--- /dev/null ++++ b/sound/soc/loongson-gd/Makefile +@@ -0,0 +1,4 @@ ++obj-$(CONFIG_SND_LS) += ls-i2s.o ++obj-$(CONFIG_SND_LS_PCM) += ls-pcm.o ++obj-$(CONFIG_SND_LS_PCM_GENERIC_DMA) += ls-pcm-generic.o ++obj-$(CONFIG_SND_LS_DAILINK) += ls-sound.o +diff --git a/sound/soc/loongson-gd/ls-i2s.c b/sound/soc/loongson-gd/ls-i2s.c +new file mode 100644 +index 000000000..23db10f4e +--- /dev/null ++++ b/sound/soc/loongson-gd/ls-i2s.c +@@ -0,0 +1,383 @@ ++/* ++ * Freescale MPC5200 PSC in I2S mode ++ * ALSA SoC Digital Audio Interface (DAI) driver ++ * ++ * Copyright (C) 2008 Secret Lab Technologies Ltd. ++ * Copyright (C) 2009 Jon Smirl, Digispeaker ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "ls-lib.h" ++#include ++ ++#include ++#include ++#include ++ ++#include "ls-i2s.h" ++#include "ls-pcm.h" ++ ++#define PCM_STEREO_OUT_NAME "I2S PCM Stereo out" ++#define PCM_STEREO_IN_NAME "I2S PCM Stereo in" ++ ++#define IISRXADDR 0x0c ++#define IISTXADDR 0x10 ++ ++static struct ls_pcm_dma_params ls_i2s_pcm_stereo_out; ++static struct ls_pcm_dma_params ls_i2s_pcm_stereo_in; ++static unsigned int revision_id; ++ ++struct ls_i2s { ++ bool slave_mode; ++ bool mclk_external; ++ bool mclk_fixed; ++ unsigned int refclk_freq; ++ unsigned int mclk_freq; ++ unsigned int xfs; ++}; ++ ++static struct ls_i2s g_ls_i2s; ++ ++bool ls_i2s_is_slave_mode(void) ++{ ++ return g_ls_i2s.slave_mode; ++} ++ ++static int ls_i2s_startup(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ return 0; ++} ++ ++static int ls_i2s_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params, ++ struct snd_soc_dai *dai) ++{ ++ struct ls_pcm_dma_params *dma_data; ++ void *i2sbase; ++ unsigned int mclk_ratio; ++ unsigned int mclk_ratio_frac; ++ unsigned int bclk_ratio; ++ unsigned int wlen = params_width(params); ++ unsigned int depth = params_width(params); ++ unsigned int fs = params->rate_num; ++ unsigned int xfs = g_ls_i2s.xfs; ++ unsigned int mclk_freq = g_ls_i2s.mclk_freq; ++ unsigned int bclk_freq = 0; ++ unsigned int refclk_freq = g_ls_i2s.refclk_freq; ++ unsigned int val = (wlen<<24) | (depth<<16); ++ ++ i2sbase = dai->dev->platform_data; ++ ++ if (!g_ls_i2s.mclk_external) { ++ if (!g_ls_i2s.mclk_fixed) { ++ mclk_freq = xfs * fs; ++ } ++ ++ if (revision_id == 0) ++ { ++ mclk_ratio = DIV_ROUND_CLOSEST(refclk_freq, mclk_freq * 2) - 1; ++ val |= (mclk_ratio<<0); ++ } ++ else ++ { ++ mclk_ratio = refclk_freq / mclk_freq; ++ mclk_ratio_frac = (u64)(refclk_freq - mclk_ratio * mclk_freq) ++ * 65536 / mclk_freq; ++ } ++ } ++ ++ if (!g_ls_i2s.slave_mode) { ++ bclk_freq = depth * 2 * fs; ++ if (revision_id == 0) ++ bclk_ratio = DIV_ROUND_CLOSEST(refclk_freq, bclk_freq * 2) - 1; ++ else ++ bclk_ratio = DIV_ROUND_CLOSEST(mclk_freq, bclk_freq * 2) - 1; ++ ++ val |= (bclk_ratio<<8); ++ } ++ ++ if (revision_id == 1) ++ val |= depth; ++ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ++ dma_data = &ls_i2s_pcm_stereo_out; ++ else ++ dma_data = &ls_i2s_pcm_stereo_in; ++ ++ snd_soc_dai_set_dma_data(dai, substream, dma_data); ++ ++ writel(val, i2sbase + 0x4); ++ if (revision_id == 1) ++ writel((mclk_ratio_frac << 16) | mclk_ratio, i2sbase + 0x14); ++ ++ return 0; ++} ++ ++static int ls_i2s_set_dai_sysclk(struct snd_soc_dai *cpu_dai, ++ int clk_id, unsigned int freq, int dir) ++{ ++ return 0; ++} ++ ++static int ls_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int format) ++{ ++ return 0; ++} ++ ++static int ls_i2s_trigger(struct snd_pcm_substream *substream, int cmd, ++ struct snd_soc_dai *dai) ++{ ++ struct ls_runtime_data *prtd = substream->runtime->private_data; ++ uint32_t data; ++ int ret = 0; ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ case SNDRV_PCM_TRIGGER_RESUME: ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ data = readl((void*)prtd->i2s_ctl_base); ++ data &= ~(0x1 << 12); ++ writel(data, (void*)prtd->i2s_ctl_base); ++ data = readl((void*)prtd->i2s_ctl_base); ++ if (ls_i2s_is_slave_mode()) ++ data |= 0x4010 | (1 << 7) | (1 << 12); ++ else ++ data |= 0xc010 | (1 << 7) | (1 << 12); ++ writel(data, (void*)prtd->i2s_ctl_base); ++ } else { ++ data = readl((void*)prtd->i2s_ctl_base); ++ if (ls_i2s_is_slave_mode()) ++ data |= 0x4010 | (1 << 11) | (1 << 13); ++ else ++ data |= 0xc010 | (1 << 11) | (1 << 13); ++ writel(data, (void*)prtd->i2s_ctl_base); ++ } ++ break; ++ case SNDRV_PCM_TRIGGER_STOP: ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ data = readl((void*)prtd->i2s_ctl_base); ++ data &= ~((1 << 7) | (1 << 12)); ++ writel(data, (void*)prtd->i2s_ctl_base); ++ } else { ++ data = readl((void*)prtd->i2s_ctl_base); ++ data &= ~((1 << 13) | (1 << 11)); ++ writel(data, (void*)prtd->i2s_ctl_base); ++ } ++ break; ++ default: ++ ret = -EINVAL; ++ } ++ ++ return ret; ++} ++ ++static void ls_i2s_shutdown(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ ++} ++ ++static int ls_i2s_probe(struct snd_soc_dai *dai) ++{ ++ return 0; ++} ++ ++static int ls_i2s_remove(struct snd_soc_dai *dai) ++{ ++ return 0; ++} ++ ++static const struct snd_soc_dai_ops psc_i2s_dai_ops = { ++ .probe = ls_i2s_probe, ++ .remove = ls_i2s_remove, ++ .startup = ls_i2s_startup, ++ .shutdown = ls_i2s_shutdown, ++ .trigger = ls_i2s_trigger, ++ .hw_params = ls_i2s_hw_params, ++ .set_fmt = ls_i2s_set_dai_fmt, ++ .set_sysclk = ls_i2s_set_dai_sysclk, ++}; ++ ++static struct snd_soc_dai_driver psc_i2s_dai[] = {{ ++ .name = "loongson-i2s-dai", ++ .playback = { ++ .stream_name = "I2S Playback", ++ .channels_min = 2, ++ .channels_max = 2, ++ .rates = PSC_I2S_RATES, ++ .formats = PSC_I2S_FORMATS, ++ }, .capture = { ++ .stream_name = "I2S Capture", ++ .channels_min = 2, ++ .channels_max = 2, ++ .rates = PSC_I2S_RATES, ++ .formats = PSC_I2S_FORMATS, ++ }, ++ .ops = &psc_i2s_dai_ops, ++ .symmetric_rate = 1, ++} }; ++ ++static const struct snd_soc_component_driver psc_i2s_component = { ++ .name = "loongson-i2s-dai", ++}; ++ ++static int ls_i2s_drv_probe(struct platform_device *pdev) ++{ ++ uint64_t IISRxData, IISTxData; ++ struct clk* refclk; ++ ++#if 0 // 4.19 与 5.10 不兼容代码 ++ if (ACPI_COMPANION(&pdev->dev)) { ++ resource_size_t mmio_base, mmio_size; ++ struct pci_dev *ppdev; ++ static void __iomem *pci_i2s_reg; ++ int ret; ++ ++ ppdev = pci_get_device(PCI_VENDOR_ID_LOONGSON, PCI_DEVICE_ID_LOONGSON_I2S, NULL); ++ ++ if (ppdev) { ++ ret = pci_enable_device(ppdev); ++ ++ mmio_base = pci_resource_start(ppdev, 0); ++ mmio_size = pci_resource_len(ppdev, 0); ++ pci_i2s_reg = ioremap(mmio_base, mmio_size); ++ revision_id = ppdev->revision; ++ } ++ ++ pdev->dev.platform_data = pci_i2s_reg; ++ IISRxData = (uint64_t)pci_i2s_reg | IISRXADDR; ++ IISTxData = (uint64_t)pci_i2s_reg | IISTXADDR; ++ } else { ++#endif ++ struct device_node *np = pdev->dev.of_node; ++ struct resource *r; ++ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ ++ if (r == NULL) { ++ dev_err(&pdev->dev, "no IO memory resource defined\n"); ++ return -ENODEV; ++ } ++ ++ pdev->dev.platform_data = ioremap(r->start, r->end - r->start + 1);; ++ IISRxData = r->start | IISRXADDR; ++ IISTxData = r->start | IISTXADDR; ++ ++ if (of_device_is_compatible(np, "loongson,ls2k0300-i2s")) ++ revision_id = 1; ++#if 0 ++ } ++#endif ++ ++ refclk = devm_clk_get(&pdev->dev, NULL); ++ if (IS_ERR(refclk)) ++ { ++ if (device_property_read_u32(&pdev->dev, "clock-frequency", ++ &g_ls_i2s.refclk_freq)) ++ { ++ dev_err(&pdev->dev, "Clock Get Fail!\n"); ++ return -ENODEV; ++ } ++ } ++ else ++ { ++ g_ls_i2s.refclk_freq = clk_get_rate(refclk); ++ } ++ ++ pdev->dev.kobj.name = "loongson-i2s-dai"; ++ ++ if (device_property_present(&pdev->dev, "slave-mode")) { ++ g_ls_i2s.slave_mode = true; ++ dev_info(&pdev->dev, "Choose SLAVE-MODE...\n"); ++ } ++ else { ++ g_ls_i2s.slave_mode = false; ++ } ++ ++ if (device_property_present(&pdev->dev, "mclk-external")) { ++ g_ls_i2s.mclk_external = true; ++ dev_info(&pdev->dev, "Use EXTERNAL-MCLK...\n"); ++ } ++ else { ++ g_ls_i2s.mclk_external = false; ++ } ++ ++ if (device_property_present(&pdev->dev, "mclk-fixed")) { ++ g_ls_i2s.mclk_fixed = true; ++ device_property_read_u32(&pdev->dev, "mclk-fixed", ++ &g_ls_i2s.mclk_freq); ++ dev_info(&pdev->dev, "Set MCLK-FIXED <%d> ...\n", ++ g_ls_i2s.mclk_freq); ++ } ++ else { ++ g_ls_i2s.mclk_fixed = false; ++ } ++ ++ if(device_property_read_u32(&pdev->dev, "xfs", &g_ls_i2s.xfs)) ++ g_ls_i2s.xfs = 128; ++ dev_info(&pdev->dev, "Set xfs <%d> ...\n", g_ls_i2s.xfs); ++ ++ ls_i2s_pcm_stereo_out.name = PCM_STEREO_OUT_NAME; ++ ls_i2s_pcm_stereo_out.dev_addr = IISTxData; ++ ++ ls_i2s_pcm_stereo_in.name = PCM_STEREO_IN_NAME; ++ ls_i2s_pcm_stereo_in.dev_addr = IISRxData; ++ ++ return snd_soc_register_component(&pdev->dev, &psc_i2s_component, ++ psc_i2s_dai, 1); ++} ++ ++static int ls_i2s_drv_remove(struct platform_device *pdev) ++{ ++ snd_soc_unregister_component(&pdev->dev); ++ return 0; ++} ++ ++static const struct of_device_id snd_ls_i2s_dt_match[] = { ++ { .compatible = "loongson,ls-i2s", }, ++ { .compatible = "loongson,ls2k0300-i2s", }, ++ { .compatible = "loongson,loongson2-i2s", }, ++ { .compatible = "loongson,ls7a-i2s", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, snd_ls_i2s_dt_match); ++ ++static struct platform_driver ls_i2s_driver = { ++ .probe = ls_i2s_drv_probe, ++ .remove = ls_i2s_drv_remove, ++ .driver = { ++ .name = "loongson-i2sp", ++ .owner = THIS_MODULE, ++ .of_match_table = of_match_ptr(snd_ls_i2s_dt_match), ++ }, ++}; ++ ++static int __init loongson_i2s_init(void) ++{ ++ return platform_driver_register(&ls_i2s_driver); ++} ++ ++static void __exit loongson_i2s_exit(void) ++{ ++ platform_driver_unregister(&ls_i2s_driver); ++} ++ ++module_init(loongson_i2s_init) ++module_exit(loongson_i2s_exit) ++ ++MODULE_AUTHOR("loongson"); ++MODULE_DESCRIPTION("Loongson I2S mode ASoC Driver"); ++MODULE_LICENSE("GPL"); ++ +diff --git a/sound/soc/loongson-gd/ls-i2s.h b/sound/soc/loongson-gd/ls-i2s.h +new file mode 100644 +index 000000000..02b81420b +--- /dev/null ++++ b/sound/soc/loongson-gd/ls-i2s.h +@@ -0,0 +1,15 @@ ++#ifndef __LS_I2S_H__ ++#define __LS_I2S_H__ ++ ++#define PSC_I2S_RATES SNDRV_PCM_RATE_8000_96000 ++ ++#define PSC_I2S_FORMATS ( SNDRV_PCM_FMTBIT_S8 | \ ++ SNDRV_PCM_FMTBIT_S16_LE | \ ++ SNDRV_PCM_FMTBIT_S20_3LE | \ ++ SNDRV_PCM_FMTBIT_S24_3LE | \ ++ SNDRV_PCM_FMTBIT_S32_LE) ++ ++bool ls_i2s_is_slave_mode(void); ++ ++#endif ++ +diff --git a/sound/soc/loongson-gd/ls-lib.h b/sound/soc/loongson-gd/ls-lib.h +new file mode 100644 +index 000000000..78b6d2de0 +--- /dev/null ++++ b/sound/soc/loongson-gd/ls-lib.h +@@ -0,0 +1,16 @@ ++#ifndef LS_LIB_H ++#define LS_LIB_H ++ ++#include ++#include ++ ++/* PCM */ ++ ++struct ls_pcm_dma_params { ++ char *name; /* stream identifier */ ++ u32 dcmd; /* DMA descriptor dcmd field */ ++ volatile u32 *drcmr; /* the DMA request channel to use */ ++ u64 dev_addr; /* device physical address for DMA */ ++}; ++ ++#endif +diff --git a/sound/soc/loongson-gd/ls-pcm-generic.c b/sound/soc/loongson-gd/ls-pcm-generic.c +new file mode 100644 +index 000000000..61ce50dd2 +--- /dev/null ++++ b/sound/soc/loongson-gd/ls-pcm-generic.c +@@ -0,0 +1,593 @@ ++/* ++ * sound/soc/loongson/ls-pcm-generic.c -- ALSA PCM interface for the Loongson chip with generic dma. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++#include ++#include "ls-lib.h" ++ ++#include ++#include "ls-pcm.h" ++ ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include "ls-i2s.h" ++ ++static struct ls_runtime_data generic_prtd; ++static const struct snd_pcm_hardware ls_pcm_hardware = { ++ .info = SNDRV_PCM_INFO_MMAP | ++ SNDRV_PCM_INFO_INTERLEAVED | ++ SNDRV_PCM_INFO_MMAP_VALID | ++ SNDRV_PCM_INFO_RESUME | ++ SNDRV_PCM_INFO_PAUSE, ++ .formats = (SNDRV_PCM_FMTBIT_S16_LE | ++ SNDRV_PCM_FMTBIT_S20_3LE | ++ SNDRV_PCM_FMTBIT_S24_LE | ++ SNDRV_PCM_FMTBIT_S32_LE), ++ .rates = SNDRV_PCM_RATE_8000_96000, ++ .channels_min = 2, ++ .channels_max = 2, ++ .period_bytes_min = 128, ++ .period_bytes_max = 128*1024, ++ .periods_min = 1, ++ .periods_max = PAGE_SIZE/sizeof(ls_dma_desc), ++ .buffer_bytes_max = 1024 * 1024, ++}; ++static void ls_pcm_generic_dma_irq(void *dev_id); ++ ++static int __ls_pcm_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct ls_runtime_data *rtd = runtime->private_data; ++ size_t totsize = params_buffer_bytes(params); ++ size_t period = params_period_bytes(params); ++ dma_addr_t dma_buff_phys; ++ struct dma_async_tx_descriptor *desc = NULL; ++ dma_cookie_t cookie; ++ ++ snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); ++ ++ rtd->totsize = totsize; ++ runtime->dma_bytes = totsize; ++ dma_buff_phys = runtime->dma_addr; ++ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ rtd->tx_dma_buf = dma_buff_phys; ++ desc = dmaengine_prep_dma_cyclic(rtd->tx_ch, ++ rtd->tx_dma_buf, ++ totsize, period, DMA_MEM_TO_DEV, ++ DMA_PREP_INTERRUPT); ++ } else { ++ rtd->rx_dma_buf = dma_buff_phys; ++ desc = dmaengine_prep_dma_cyclic(rtd->rx_ch, ++ rtd->rx_dma_buf, ++ totsize, period, DMA_DEV_TO_MEM, ++ DMA_PREP_INTERRUPT); ++ } ++ ++ if (!desc) { ++ printk("dma prep cyclic failed.\n"); ++ return -ENODEV; ++ } ++ ++ desc->callback = ls_pcm_generic_dma_irq; ++ desc->callback_param = substream; ++ ++ cookie = dmaengine_submit(desc); ++ ++ return 0; ++} ++ ++static int __ls_pcm_hw_free(struct snd_pcm_substream *substream) ++{ ++ snd_pcm_set_runtime_buffer(substream, NULL); ++ return 0; ++} ++ ++static int ls_pcm_trigger(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream, int cmd) ++{ ++ struct ls_runtime_data *prtd = substream->runtime->private_data; ++ struct dma_chan *chan; ++ int ret = 0; ++ // uint32_t data; ++ ++ chan = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? prtd->tx_ch : prtd->rx_ch; ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ dma_async_issue_pending(chan); ++ ++ break; ++ case SNDRV_PCM_TRIGGER_STOP: ++ dmaengine_terminate_all(chan); ++ break; ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ dmaengine_pause(chan); ++ break; ++ case SNDRV_PCM_TRIGGER_RESUME: ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ dmaengine_resume(chan); ++ break; ++ default: ++ ret = -EINVAL; ++ } ++ ++ return ret; ++} ++ ++static snd_pcm_uframes_t ls_pcm_pointer(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct ls_runtime_data *prtd = runtime->private_data; ++ ++ snd_pcm_uframes_t x; ++ u64 addr; ++ enum dma_status status; ++ struct dma_tx_state state; ++ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ++ status = dmaengine_tx_status(prtd->tx_ch, prtd->tx_ch->cookie, &state); ++ else ++ status = dmaengine_tx_status(prtd->rx_ch, prtd->rx_ch->cookie, &state); ++ ++ addr = prtd->totsize - state.residue; ++ ++ x = bytes_to_frames(runtime, addr); ++ ++ if (x == runtime->buffer_size) ++ x = 0; ++ ++ return x; ++} ++ ++static int ls_pcm_prepare(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream) ++{ ++ struct ls_runtime_data *prtd = substream->runtime->private_data; ++ ++ if (!prtd || !prtd->params) ++ return 0; ++ ++ return 0; ++} ++ ++static void ls_pcm_generic_dma_irq(void *dev_id) ++{ ++ struct snd_pcm_substream *substream = dev_id; ++ ++ snd_pcm_period_elapsed(substream); ++} ++ ++static int ls_pcm_open(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct ls_runtime_data *prtd; ++ int ret; ++ ++ runtime->hw = ls_pcm_hardware; ++ ++ if (substream->pcm->device & 1) { ++ runtime->hw.info &= ~SNDRV_PCM_INFO_INTERLEAVED; ++ runtime->hw.info |= SNDRV_PCM_INFO_NONINTERLEAVED; ++ } ++ if (substream->pcm->device & 2) ++ runtime->hw.info &= ~(SNDRV_PCM_INFO_MMAP | ++ SNDRV_PCM_INFO_MMAP_VALID); ++ /* ++ * For mysterious reasons (and despite what the manual says) ++ * playback samples are lost if the DMA count is not a multiple ++ * of the DMA burst size. Let's add a rule to enforce that. ++ */ ++ ret = snd_pcm_hw_constraint_step(runtime, 0, ++ SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 128); ++ if (ret) ++ goto out; ++ ++ ret = snd_pcm_hw_constraint_step(runtime, 0, ++ SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 128); ++ if (ret) ++ goto out; ++ ++ ret = snd_pcm_hw_constraint_integer(runtime, ++ SNDRV_PCM_HW_PARAM_PERIODS); ++ if (ret < 0) ++ goto out; ++ ++ ret = -ENOMEM; ++ prtd = kzalloc(sizeof(*prtd), GFP_KERNEL); ++ if (!prtd) ++ goto out; ++ ++ runtime->private_data = prtd; ++ ++ prtd->base_phys = generic_prtd.base_phys; ++ prtd->base = generic_prtd.base; ++ ++ prtd->tx_ch = generic_prtd.tx_ch; ++ prtd->tx_dma_buf = generic_prtd.tx_dma_buf; ++ prtd->tx_buf = generic_prtd.tx_buf; ++ ++ prtd->rx_ch = generic_prtd.rx_ch; ++ prtd->rx_dma_buf = generic_prtd.rx_dma_buf; ++ prtd->rx_buf = generic_prtd.rx_buf; ++ ++ prtd->i2s_ctl_base = generic_prtd.i2s_ctl_base; ++ ++ return 0; ++ ++ out: ++ return ret; ++} ++ ++static int ls_pcm_close(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct ls_runtime_data *prtd = runtime->private_data; ++ uint32_t data; ++ ++ data = readl((void*)prtd->i2s_ctl_base); ++ data &= ~(BIT(12) | BIT(13)); ++ writel(data, (void*)prtd->i2s_ctl_base); ++ ++ kfree(prtd); ++ ++ return 0; ++} ++ ++static int ls_pcm_ioctl(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream, ++ unsigned int cmd, void *arg) ++{ ++ return snd_pcm_lib_ioctl(substream, cmd, arg); ++} ++ ++static int ls_pcm_mmap(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream, ++ struct vm_area_struct *vma) ++{ ++ return remap_pfn_range(vma, vma->vm_start, ++ substream->dma_buffer.addr >> PAGE_SHIFT, ++ vma->vm_end - vma->vm_start, vma->vm_page_prot); ++} ++ ++static int ls_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream) ++{ ++ struct snd_pcm_substream *substream = pcm->streams[stream].substream; ++ struct snd_dma_buffer *buf = &substream->dma_buffer; ++ size_t size = ls_pcm_hardware.buffer_bytes_max; ++ ++ buf->dev.type = SNDRV_DMA_TYPE_DEV; ++ buf->dev.dev = pcm->card->dev; ++ buf->private_data = NULL; ++ ++ buf->area = dma_alloc_coherent(pcm->card->dev, size, ++ &buf->addr, GFP_KERNEL); ++ if (!buf->area) ++ return -ENOMEM; ++ buf->bytes = size; ++ return 0; ++} ++ ++static void ls_pcm_free_dma_buffers(struct snd_soc_component *component, ++ struct snd_pcm *pcm) ++{ ++ struct snd_pcm_substream *substream; ++ struct snd_dma_buffer *buf; ++ int stream; ++ ++ for (stream = 0; stream < 2; stream++) { ++ substream = pcm->streams[stream].substream; ++ if (!substream) ++ continue; ++ buf = &substream->dma_buffer; ++ if (!buf->area) ++ continue; ++ dma_free_coherent(pcm->card->dev, buf->bytes, ++ buf->area, buf->addr); ++ buf->area = NULL; ++ } ++} ++ ++static int ls_pcm_hw_params(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct ls_runtime_data *prtd = runtime->private_data; ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct ls_pcm_dma_params *dma = snd_soc_dai_get_dma_data(snd_soc_rtd_to_cpu(rtd, 0), ++ substream); ++ ++ if (!dma) ++ return 0; ++ ++ if (prtd->params != dma || prtd->params == NULL) { ++ prtd->params = dma; ++ } ++ ++ return __ls_pcm_hw_params(substream, params); ++} ++ ++static int ls_pcm_hw_free(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream) ++{ ++ __ls_pcm_hw_free(substream); ++ ++ return 0; ++} ++ ++static int ls_soc_pcm_new(struct snd_soc_component *component, ++ struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_card *card = rtd->card->snd_card; ++ struct snd_pcm *pcm = rtd->pcm; ++ int ret = 0; ++ ++ card->dev->coherent_dma_mask = DMA_MASK; ++ ++ if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) { ++ ret = ls_pcm_preallocate_dma_buffer(pcm, ++ SNDRV_PCM_STREAM_PLAYBACK); ++ if (ret) ++ goto out; ++ } ++ ++ if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) { ++ ret = ls_pcm_preallocate_dma_buffer(pcm, ++ SNDRV_PCM_STREAM_CAPTURE); ++ if (ret) ++ goto out; ++ } ++ out: ++ return ret; ++} ++ ++static struct snd_soc_component_driver ls_soc_platform_generic = { ++ .open = ls_pcm_open, ++ .close = ls_pcm_close, ++ .ioctl = ls_pcm_ioctl, ++ .hw_params = ls_pcm_hw_params, ++ .hw_free = ls_pcm_hw_free, ++ .prepare = ls_pcm_prepare, ++ .trigger = ls_pcm_trigger, ++ .pointer = ls_pcm_pointer, ++ .mmap = ls_pcm_mmap, ++ .pcm_construct = ls_soc_pcm_new, ++ .pcm_destruct = ls_pcm_free_dma_buffers, ++}; ++ ++ ++static int ls_snd_soc_register_component(struct platform_device *pdev) ++{ ++ pdev->dev.coherent_dma_mask = DMA_MASK; ++ pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask; ++ ++ pdev->dev.kobj.name = "loongson-i2s"; ++ ++ return snd_soc_register_component(&pdev->dev, &ls_soc_platform_generic, NULL, 0); ++} ++ ++ ++static int ls_of_dma_rx_probe(struct ls_runtime_data *ls_data, struct platform_device *pdev) ++{ ++ struct dma_slave_config config; ++ struct device *dev = &pdev->dev; ++ int ret; ++ ++ ls_data->rx_ch = dma_request_slave_channel(dev, "i2s_record"); ++ if (!ls_data->rx_ch) { ++ dev_err(dev, "rx dma alloc failed\n"); ++ return -ENODEV; ++ } ++ ++ ls_data->rx_buf = dma_alloc_coherent(dev, ls_pcm_hardware.buffer_bytes_max, ++ &ls_data->rx_dma_buf, ++ GFP_KERNEL); ++ if (!ls_data->rx_buf) { ++ ret = -ENOMEM; ++ goto alloc_err; ++ } ++ ++ memset(&config, 0, sizeof(config)); ++ ++ config.src_addr = ls_data->base_phys + 0xc; ++ config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ ++ ret = dmaengine_slave_config(ls_data->rx_ch, &config); ++ if (ret < 0) { ++ dev_err(dev, "rx dma channel config failed\n"); ++ ret = -ENODEV; ++ goto config_err; ++ } ++ ++ return 0; ++ ++config_err: ++ dma_free_coherent(dev, ++ ls_pcm_hardware.buffer_bytes_max, ls_data->rx_buf, ++ ls_data->rx_dma_buf); ++ ++alloc_err: ++ dma_release_channel(ls_data->rx_ch); ++ ls_data->rx_ch = NULL; ++ ++ return ret; ++} ++ ++static int ls_of_dma_tx_probe(struct ls_runtime_data *ls_data, struct platform_device *pdev) ++{ ++ struct dma_slave_config config; ++ struct device *dev = &pdev->dev; ++ int ret; ++ ++ ls_data->tx_ch = dma_request_slave_channel(dev, "i2s_play"); ++ if (!ls_data->tx_ch) { ++ dev_err(dev, "tx dma alloc failed\n"); ++ return -ENODEV; ++ } ++ ++ ls_data->tx_buf = dma_alloc_coherent(dev, ls_pcm_hardware.buffer_bytes_max, ++ &ls_data->tx_dma_buf, ++ GFP_KERNEL); ++ if (!ls_data->tx_buf) { ++ ret = -ENOMEM; ++ goto alloc_err; ++ } ++ ++ memset(&config, 0, sizeof(config)); ++ ++ config.dst_addr = ls_data->base_phys + 0x10; ++ config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ ++ ret = dmaengine_slave_config(ls_data->tx_ch, &config); ++ if (ret < 0) { ++ dev_err(dev, "tx dma channel config failed\n"); ++ ret = -ENODEV; ++ goto config_err; ++ } ++ ++ return 0; ++ ++config_err: ++ dma_free_coherent(dev, ++ ls_pcm_hardware.buffer_bytes_max, ls_data->tx_buf, ++ ls_data->tx_dma_buf); ++ ++alloc_err: ++ dma_release_channel(ls_data->tx_ch); ++ ls_data->tx_ch = NULL; ++ ++ return ret; ++} ++ ++static int ls_soc_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ int timeout = 20000; ++ ++ struct resource *r; ++ ++ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (r == NULL) { ++ dev_err(&pdev->dev, "no IO memory resource defined\n"); ++ ret = -ENODEV; ++ } ++ ++ generic_prtd.base_phys = r->start; ++ generic_prtd.base = (uint64_t *)ioremap(r->start, 0x14); ++ generic_prtd.i2s_ctl_base = (uint64_t)generic_prtd.base + 0x8; ++ ++ ret = ls_of_dma_rx_probe(&generic_prtd, pdev); ++ if (ret) ++ dev_info(&pdev->dev, "interrupt mode used for rx (no dma)\n"); ++ ++ ret = ls_of_dma_tx_probe(&generic_prtd, pdev); ++ if (ret) ++ dev_info(&pdev->dev, "interrupt mode used for tx (no dma)\n"); ++ ++ writel(0x8, (void*)generic_prtd.i2s_ctl_base); ++ while ((!(readl((void*)generic_prtd.i2s_ctl_base) & 0x10000)) && timeout--) ++ udelay(5); ++ if (!ls_i2s_is_slave_mode()) { ++ writel(0x8008, (void*)generic_prtd.i2s_ctl_base); ++ while ((!(readl((void*)generic_prtd.i2s_ctl_base) & 0x100)) && timeout--) ++ udelay(5); ++ } ++ return ls_snd_soc_register_component(pdev); ++} ++ ++static int ls_soc_remove(struct platform_device *pdev) ++{ ++ ++ if (generic_prtd.rx_ch) ++ dma_release_channel(generic_prtd.rx_ch); ++ ++ if (generic_prtd.rx_dma_buf) ++ dma_free_coherent(&pdev->dev, ++ ls_pcm_hardware.buffer_bytes_max, generic_prtd.rx_buf, ++ generic_prtd.rx_dma_buf); ++ ++ if (generic_prtd.tx_ch) ++ dma_release_channel(generic_prtd.tx_ch); ++ ++ if (generic_prtd.tx_dma_buf) ++ dma_free_coherent(&pdev->dev, ++ ls_pcm_hardware.buffer_bytes_max, generic_prtd.tx_buf, ++ generic_prtd.tx_dma_buf); ++ ++ snd_soc_unregister_component(&pdev->dev); ++ return 0; ++} ++ ++#ifdef CONFIG_OF ++static const struct of_device_id snd_ls_dt_match[] = { ++ { .compatible = "loongson,ls-pcm-generic-audio", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, snd_ls_dt_match); ++#endif ++ ++static struct platform_driver ls_generic_pcm_driver = { ++ .driver = { ++ .name = "ls-generic-pcm-audio", ++ .owner = THIS_MODULE, ++#ifdef CONFIG_OF ++ .of_match_table = of_match_ptr(snd_ls_dt_match), ++#endif ++ }, ++ .probe = ls_soc_probe, ++ .remove = ls_soc_remove, ++}; ++ ++static int __init ls_generic_pcm_init(void) ++{ ++ return platform_driver_register(&ls_generic_pcm_driver); ++} ++ ++static void __exit ls_generic_pcm_exit(void) ++{ ++ platform_driver_unregister(&ls_generic_pcm_driver); ++} ++ ++module_init(ls_generic_pcm_init) ++module_exit(ls_generic_pcm_exit) ++ ++MODULE_AUTHOR("loongson"); ++MODULE_DESCRIPTION("Loongson generic pcm driver"); ++MODULE_LICENSE("GPL"); ++ +diff --git a/sound/soc/loongson-gd/ls-pcm.c b/sound/soc/loongson-gd/ls-pcm.c +new file mode 100644 +index 000000000..2351a7fae +--- /dev/null ++++ b/sound/soc/loongson-gd/ls-pcm.c +@@ -0,0 +1,654 @@ ++/* ++ * linux/sound/mips/ls-pcm.c -- ALSA PCM interface for the Loongson chip ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++#include ++#include "ls-lib.h" ++ ++#include ++#include "ls-pcm.h" ++ ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include "ls-i2s.h" ++ ++#define DMA1ADDR 0x100 ++#define DMA2ADDR 0x110 ++ ++ ++unsigned long long i2s_ctl; ++ ++static struct ls_runtime_data g_prtd; ++static struct device *dev; ++static struct platform_device *plat_dev; ++static const struct snd_pcm_hardware ls_pcm_hardware = { ++ .info = SNDRV_PCM_INFO_MMAP | ++ SNDRV_PCM_INFO_INTERLEAVED | ++ SNDRV_PCM_INFO_MMAP_VALID | ++ SNDRV_PCM_INFO_RESUME | ++ SNDRV_PCM_INFO_PAUSE, ++ .formats = PSC_I2S_FORMATS, ++ .rates = PSC_I2S_RATES, ++ .channels_min = 2, ++ .channels_max = 2, ++ .period_bytes_min = 128, ++ .period_bytes_max = 128*1024, ++ .periods_min = 1, ++ .periods_max = PAGE_SIZE/sizeof(ls_dma_desc), ++ .buffer_bytes_max = 1024 * 1024, ++}; ++ ++ ++static int __ls_pcm_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct ls_runtime_data *rtd = runtime->private_data; ++ size_t totsize = params_buffer_bytes(params); ++ size_t period = params_period_bytes(params); ++ ls_dma_desc *dma_desc; ++ dma_addr_t dma_buff_phys, next_desc_phys; ++ ++ snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); ++ runtime->dma_bytes = totsize; ++ ++ dma_desc = rtd->dma_desc_array; ++ next_desc_phys = rtd->dma_desc_array_phys; ++ dma_buff_phys = runtime->dma_addr; ++ do { ++ next_desc_phys += sizeof(ls_dma_desc); ++ dma_desc->ordered = (next_desc_phys | 0x1); ++ dma_desc->ordered_hi = (next_desc_phys >> 32); ++ ++ dma_desc->saddr = dma_buff_phys; ++ dma_desc->saddr_hi = (dma_buff_phys >> 32); ++ dma_desc->daddr = rtd->params->dev_addr; ++ dma_desc->cmd = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? ++ 0x00001001 : 0x00000001; ++ ++ if (period > totsize) ++ period = totsize; ++ dma_desc->length = 8; ++ dma_desc->step_length = 0; ++ dma_desc->step_times = period >> 5; ++ ++ dma_desc++; ++ dma_buff_phys += period; ++ ++ } while (totsize -= period); ++ dma_desc[-1].ordered = (rtd->dma_desc_array_phys | 0x1); ++ dma_desc[-1].ordered_hi = ((rtd->dma_desc_array_phys) >> 32); ++ ++ return 0; ++} ++ ++static int __ls_pcm_hw_free(struct snd_pcm_substream *substream) ++{ ++ snd_pcm_set_runtime_buffer(substream, NULL); ++ return 0; ++} ++ ++static int ls_pcm_trigger(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream, int cmd) ++{ ++ struct ls_runtime_data *prtd = substream->runtime->private_data; ++ struct device *dev = substream->pcm->card->dev; ++ int ret = 0; ++ u64 val, dma_order; ++ int timeout = 20000; ++ void *order_addr; ++ uint32_t data; ++ ++ order_addr = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? prtd->order_addr1 : prtd->order_addr2; ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ if (ls_i2s_is_slave_mode()) { ++ writel(0x4200, (void*)i2s_ctl); ++ } ++ else { ++ writel(0xc200, (void*)i2s_ctl); ++ } ++ //writel(0x4200, i2s_ctl); ++ udelay(500); ++ ++ val = (prtd->dma_desc_array_phys & ~0x1fUL) | 0x8UL; ++ ++ if (dev->coherent_dma_mask == DMA_BIT_MASK(64)) ++ val |= 0x1UL; ++ else ++ val &= ~0x1UL; ++ ++ dma_order = (readq(order_addr) & 0xfUL) | val; ++ writeq(dma_order, order_addr); ++ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ data = readl((void*)i2s_ctl); ++ data &= ~((1<<13) | (1<<11) | (1<<1)); ++ data |= 0x5081; ++ //data |= 0xd081; ++ writel(data, (void*)i2s_ctl); ++ } else { ++ data = readl((void*)i2s_ctl); ++ data &= ~((1<<12) | (1<<7) | (1<<0)); ++ data |= 0x6802; ++ //data |= 0xe802; ++ writel(data, (void*)i2s_ctl); ++ } ++ ++ while ((readl(order_addr) & 8) && timeout--) ++ udelay(5); ++ ++ break; ++ ++ case SNDRV_PCM_TRIGGER_STOP: ++ writeq(0x10UL | (readq(order_addr) & 0x1fUL), order_addr); ++ udelay(1000); ++ break; ++ ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ val = (prtd->dma_desc_ready_phys & ~0x1fUL) | 0x4UL; ++ ++ if (dev->coherent_dma_mask == DMA_BIT_MASK(64)) ++ val |= 0x1UL; ++ else ++ val &= ~0x1UL; ++ ++ dma_order = (readq(order_addr) & 0x1fUL) | val; ++ writeq(dma_order, order_addr); ++ while (readl(order_addr)&4) ++ ; ++ writel(0x10UL | (readq(order_addr) & 0x1fUL), order_addr); ++ udelay(1000); ++ break; ++ ++ case SNDRV_PCM_TRIGGER_RESUME: ++ break; ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ val = (prtd->dma_desc_ready_phys & ~0x1fUL) | 0x8UL; ++ ++ if (dev->coherent_dma_mask == DMA_BIT_MASK(64)) ++ val |= 0x1UL; ++ else ++ val &= ~0x1UL; ++ ++ while ((readl(order_addr) & 8) && timeout--) ++ udelay(5); ++ break; ++ ++ default: ++ ret = -EINVAL; ++ } ++ ++ return ret; ++} ++ ++static snd_pcm_uframes_t ls_pcm_pointer(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct ls_runtime_data *prtd = runtime->private_data; ++ struct device *dev = substream->pcm->card->dev; ++ ++ snd_pcm_uframes_t x; ++ u64 dma_order, val; ++ u64 addr; ++ void *order_addr; ++ ++ order_addr = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? prtd->order_addr1 : prtd->order_addr2; ++ val = (prtd->dma_position_desc_phys & ~0x1fUL) | 0x4UL; ++ ++ if (dev->coherent_dma_mask == DMA_BIT_MASK(64)) ++ val |= 0x1UL; ++ else ++ val &= ~0x1UL; ++ ++ dma_order = (readq(order_addr) & 0x1fUL) | val; ++ writeq(dma_order, order_addr); ++ while (readl(order_addr) & 4) ++ ; ++ ++ addr = prtd->dma_position_desc->saddr_hi; ++ addr = ((addr << 32) | (prtd->dma_position_desc->saddr & 0xffffffff)); ++ ++ x = bytes_to_frames(runtime, addr - runtime->dma_addr); ++ ++ if (x == runtime->buffer_size) ++ x = 0; ++ return x; ++} ++ ++static int ls_pcm_prepare(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream) ++{ ++ struct ls_runtime_data *prtd = substream->runtime->private_data; ++ ++ if (!prtd || !prtd->params) ++ return 0; ++ ++ return 0; ++} ++ ++static irqreturn_t ls_pcm_dma_irq(int irq, void *dev_id) ++{ ++ struct snd_pcm_substream *substream = dev_id; ++ snd_pcm_period_elapsed(substream); ++ ++ return IRQ_HANDLED; ++} ++ ++static int ls_pcm_open(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct ls_runtime_data *prtd; ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ int ret; ++ int irq; ++ ++ // unsigned long int val; ++ ++ runtime->hw = ls_pcm_hardware; ++ ++ if (substream->pcm->device & 1) { ++ runtime->hw.info &= ~SNDRV_PCM_INFO_INTERLEAVED; ++ runtime->hw.info |= SNDRV_PCM_INFO_NONINTERLEAVED; ++ } ++ if (substream->pcm->device & 2) ++ runtime->hw.info &= ~(SNDRV_PCM_INFO_MMAP | ++ SNDRV_PCM_INFO_MMAP_VALID); ++ /* ++ * For mysterious reasons (and despite what the manual says) ++ * playback samples are lost if the DMA count is not a multiple ++ * of the DMA burst size. Let's add a rule to enforce that. ++ */ ++ ret = snd_pcm_hw_constraint_step(runtime, 0, ++ SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 128); ++ if (ret) ++ goto out; ++ ++ ret = snd_pcm_hw_constraint_step(runtime, 0, ++ SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 128); ++ if (ret) ++ goto out; ++ ++ ret = snd_pcm_hw_constraint_integer(runtime, ++ SNDRV_PCM_HW_PARAM_PERIODS); ++ if (ret < 0) ++ goto out; ++ ++ ret = -ENOMEM; ++ prtd = kzalloc(sizeof(*prtd), GFP_KERNEL); ++ if (!prtd) ++ goto out; ++ prtd->dma_desc_array = ++ dma_alloc_coherent(substream->pcm->card->dev, PAGE_SIZE, ++ &prtd->dma_desc_array_phys, GFP_KERNEL); ++ if (!prtd->dma_desc_array) ++ goto err1; ++ prtd->dma_desc_ready = ++ dma_alloc_coherent(substream->pcm->card->dev, sizeof(ls_dma_desc), ++ &prtd->dma_desc_ready_phys, GFP_KERNEL); ++ if (!prtd->dma_desc_ready) ++ goto err1; ++ prtd->dma_position_desc = ++ dma_alloc_coherent(substream->pcm->card->dev, sizeof(ls_dma_desc), ++ &prtd->dma_position_desc_phys, GFP_KERNEL); ++ if (!prtd->dma_position_desc) ++ goto err1; ++ ++ runtime->private_data = prtd; ++ ++ prtd->base_phys = g_prtd.base_phys; ++ prtd->base = g_prtd.base; ++ ++ prtd->order_addr1_phys = g_prtd.order_addr1_phys; ++ prtd->order_addr1 = g_prtd.order_addr1; ++ ++ prtd->order_addr2_phys = g_prtd.order_addr2_phys; ++ prtd->order_addr2 = g_prtd.order_addr2; ++ ++ irq = platform_get_irq(plat_dev, 1); ++ ret = request_irq(irq, ls_pcm_dma_irq, IRQF_TRIGGER_RISING, ++ "dma-read", substream); ++ if (ret < 0) { ++ printk("%s request_irq failed. ret=0x%x\r\n", __func__, ret); ++ return ret; ++ } ++ ++ irq = platform_get_irq(plat_dev, 0); ++ ret = request_irq(irq, ls_pcm_dma_irq, IRQF_TRIGGER_RISING, ++ "dma-write", substream); ++ if (ret < 0) { ++ printk("%s request_irq failed. ret=0x%x\r\n", __func__, ret); ++ return ret; ++ } ++ ++ return 0; ++ ++ err1: ++ kfree(rtd); ++ out: ++ return ret; ++} ++ ++static int ls_pcm_close(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct ls_runtime_data *prtd = runtime->private_data; ++ int irq; ++ ++ irq = platform_get_irq(plat_dev, 0); ++ free_irq(irq, substream); ++ ++ irq = platform_get_irq(plat_dev, 1); ++ free_irq(irq, substream); ++ ++ dma_free_coherent(substream->pcm->card->dev, PAGE_SIZE, ++ prtd->dma_desc_array, prtd->dma_desc_array_phys); ++ kfree(prtd); ++ writel(0x00, (void*)i2s_ctl); ++ return 0; ++} ++ ++// static int ls_pcm_ioctl(struct snd_soc_component *component, ++// struct snd_pcm_substream *substream, ++// unsigned int cmd, void *arg) ++// { ++// return snd_pcm_lib_ioctl(substream, cmd, arg); ++// } ++ ++static int ls_pcm_mmap(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream, ++ struct vm_area_struct *vma) ++{ ++ return remap_pfn_range(vma, vma->vm_start, ++ substream->dma_buffer.addr >> PAGE_SHIFT, ++ vma->vm_end - vma->vm_start, vma->vm_page_prot); ++} ++ ++static int ls_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream) ++{ ++ struct snd_pcm_substream *substream = pcm->streams[stream].substream; ++ struct snd_dma_buffer *buf = &substream->dma_buffer; ++ size_t size = ls_pcm_hardware.buffer_bytes_max; ++ buf->dev.type = SNDRV_DMA_TYPE_DEV; ++ buf->dev.dev = pcm->card->dev; ++ buf->private_data = NULL; ++ ++ buf->area = dma_alloc_coherent(pcm->card->dev, size, ++ &buf->addr, GFP_KERNEL); ++ if (!buf->area) ++ return -ENOMEM; ++ buf->bytes = size; ++ return 0; ++} ++ ++static int ls_soc_pcm_new(struct snd_soc_component *component, ++ struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_card *card = rtd->card->snd_card; ++ struct snd_pcm *pcm = rtd->pcm; ++ int ret = 0; ++ ++ if (!card->dev->dma_mask) ++ card->dev->dma_mask = (uint64_t *)dev->coherent_dma_mask; ++ card->dev->coherent_dma_mask = dev->coherent_dma_mask; ++ ++ if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) { ++ ret = ls_pcm_preallocate_dma_buffer(pcm, ++ SNDRV_PCM_STREAM_PLAYBACK); ++ if (ret) ++ goto out; ++ } ++ ++ if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) { ++ ret = ls_pcm_preallocate_dma_buffer(pcm, ++ SNDRV_PCM_STREAM_CAPTURE); ++ if (ret) ++ goto out; ++ } ++ out: ++ return ret; ++} ++ ++static void ls_pcm_free_dma_buffers(struct snd_soc_component *component, ++ struct snd_pcm *pcm) ++{ ++ struct snd_pcm_substream *substream; ++ struct snd_dma_buffer *buf; ++ int stream; ++ ++ for (stream = 0; stream < 2; stream++) { ++ substream = pcm->streams[stream].substream; ++ if (!substream) ++ continue; ++ buf = &substream->dma_buffer; ++ if (!buf->area) ++ continue; ++ dma_free_coherent(pcm->card->dev, buf->bytes, ++ buf->area, buf->addr); ++ buf->area = NULL; ++ } ++} ++ ++static int ls_pcm_hw_params(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct ls_runtime_data *prtd = runtime->private_data; ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct ls_pcm_dma_params *dma = snd_soc_dai_get_dma_data(snd_soc_rtd_to_cpu(rtd, 0), ++ substream); ++ ++ if (!dma) ++ return 0; ++ ++ if (prtd->params != dma || prtd->params == NULL) { ++ prtd->params = dma; ++ } ++ ++ return __ls_pcm_hw_params(substream, params); ++} ++ ++static int ls_pcm_hw_free(struct snd_soc_component *component, ++ struct snd_pcm_substream *substream) ++{ ++ __ls_pcm_hw_free(substream); ++ ++ return 0; ++} ++ ++static struct snd_soc_component_driver ls_soc_platform = { ++ .open = ls_pcm_open, ++ .close = ls_pcm_close, ++ //.ioctl = ls_pcm_ioctl, ++ .hw_params = ls_pcm_hw_params, ++ .hw_free = ls_pcm_hw_free, ++ .prepare = ls_pcm_prepare, ++ .trigger = ls_pcm_trigger, ++ .pointer = ls_pcm_pointer, ++ .mmap = ls_pcm_mmap, ++ .pcm_construct = ls_soc_pcm_new, ++ .pcm_destruct = ls_pcm_free_dma_buffers, ++}; ++ ++static int ls_snd_soc_register_component(struct platform_device *pdev) ++{ ++ uint32_t val; ++ ++ dev = &pdev->dev; ++ plat_dev = pdev; ++ ++ device_property_read_u32(dev, "dma-mask", &val); ++ pdev->dev.coherent_dma_mask = val; ++ ++ if (pdev->dev.dma_mask) ++ *(pdev->dev.dma_mask) = pdev->dev.coherent_dma_mask; ++ else ++ pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask; ++ ++ pdev->dev.kobj.name = "loongson-i2s"; ++ ++ return snd_soc_register_component(&pdev->dev, &ls_soc_platform, NULL, 0); ++} ++ ++static int ls_soc_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ resource_size_t dma_1; ++ resource_size_t dma_2; ++ ++#if 0 // 4.19 与 5.10 不兼容代码 ++ if (ACPI_COMPANION(&pdev->dev)) { ++ resource_size_t mmio_base, mmio_size; ++ struct pci_dev *ppdev; ++ static void __iomem *pci_i2s_reg; ++ ++ ppdev = pci_get_device(PCI_VENDOR_ID_LOONGSON, PCI_DEVICE_ID_LOONGSON_I2S, NULL); ++ ++ if (ppdev) { ++ ret = pci_enable_device(ppdev); ++ ++ mmio_base = pci_resource_start(ppdev, 0); ++ mmio_size = pci_resource_len(ppdev, 0); ++ pci_i2s_reg = ioremap(mmio_base, mmio_size); ++ } ++ dma_1 = ((uint64_t)pci_i2s_reg | DMA1ADDR); ++ dma_2 = ((uint64_t)pci_i2s_reg | DMA2ADDR); ++ ++ i2s_ctl = pci_i2s_reg + 0x8; ++ ++ g_prtd.base_phys = (dma_addr_t)pci_i2s_reg; ++ g_prtd.base = pci_i2s_reg; ++ ++ g_prtd.order_addr1_phys = (dma_addr_t)dma_1; ++ g_prtd.order_addr1 = (uint64_t *)dma_1; ++ ++ g_prtd.order_addr2_phys = (dma_addr_t)dma_2; ++ g_prtd.order_addr2 = (uint64_t *)dma_2; ++ } else { ++#endif ++ struct dma_chan *chan; ++ __be32 *of_property = NULL; ++ struct resource *r; ++ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (r == NULL) { ++ dev_err(&pdev->dev, "no IO memory resource defined\n"); ++ ret = -ENODEV; ++ } ++ ++ chan = of_dma_request_slave_channel(pdev->dev.of_node, "i2s_play"); ++ if (chan == NULL) { ++ dev_err(&pdev->dev, "no APBDMA-2 resource defined\n"); ++ return -ENODEV; ++ } ++ ++ of_property = (__be32 *)of_get_property(chan->device->dev->of_node, "reg", NULL); ++ if (of_property != 0) ++ dma_1 = of_read_number(of_property, 2); ++ ++ chan = of_dma_request_slave_channel(pdev->dev.of_node, "i2s_record"); ++ if (chan == NULL) { ++ dev_err(&pdev->dev, "no APBDMA-3 resource defined\n"); ++ return -ENODEV; ++ } ++ ++ of_property = (__be32 *)of_get_property(chan->device->dev->of_node, "reg", NULL); ++ if (of_property != 0) ++ dma_2 = of_read_number(of_property, 2); ++ ++ g_prtd.base_phys = r->start; ++ g_prtd.base = (uint64_t *)ioremap(r->start, 0x10); ++ i2s_ctl = (unsigned long long)(g_prtd.base) + 0x8; ++ ++ g_prtd.order_addr1_phys = dma_1; ++ g_prtd.order_addr1 = (uint64_t *)ioremap(dma_1, 8); ++ ++ g_prtd.order_addr2_phys = dma_2; ++ g_prtd.order_addr2 = (uint64_t *)ioremap(dma_2, 8); ++#if 0 ++ } ++#endif ++ return ls_snd_soc_register_component(pdev); ++} ++ ++static int ls_soc_remove(struct platform_device *pdev) ++{ ++ snd_soc_unregister_component(&pdev->dev); ++ return 0; ++} ++ ++#ifdef CONFIG_OF ++static const struct of_device_id snd_ls_dt_match[] = { ++ { .compatible = "loongson,ls-pcm-audio", }, ++ { .compatible = "loongson,loongson2-pcm-audio", }, ++ { .compatible = "loongson,ls7a-pcm-audio", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, snd_ls_dt_match); ++#endif ++ ++static struct platform_driver loongson_pcm_driver = { ++ .driver = { ++ .name = "loongson-pcm-audio", ++ .owner = THIS_MODULE, ++#ifdef CONFIG_OF ++ .of_match_table = of_match_ptr(snd_ls_dt_match), ++#endif ++ }, ++ .probe = ls_soc_probe, ++ .remove = ls_soc_remove, ++}; ++ ++static int __init loongson_pcm_init(void) ++{ ++ return platform_driver_register(&loongson_pcm_driver); ++} ++ ++static void __exit loongson_pcm_exit(void) ++{ ++ platform_driver_unregister(&loongson_pcm_driver); ++} ++ ++module_init(loongson_pcm_init) ++module_exit(loongson_pcm_exit) ++ ++MODULE_AUTHOR("loongson"); ++MODULE_DESCRIPTION("Loongson sound driver"); ++MODULE_LICENSE("GPL"); ++ +diff --git a/sound/soc/loongson-gd/ls-pcm.h b/sound/soc/loongson-gd/ls-pcm.h +new file mode 100644 +index 000000000..67ba38b94 +--- /dev/null ++++ b/sound/soc/loongson-gd/ls-pcm.h +@@ -0,0 +1,77 @@ ++/* ++ * linux/sound/mips/ls-pcm.h -- ALSA PCM interface for the Loongson chip ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#ifndef _LS_PCM_H ++#define _LS_PCM_H ++#include ++ ++#define DMA_MASK 0xffffffffffffffff ++ ++typedef struct ls_dma_desc { ++ u32 ordered; ++ u32 saddr; ++ u32 daddr; ++ u32 length; ++ u32 step_length; ++ u32 step_times; ++ u32 cmd; ++ u32 stats; ++ u32 ordered_hi; ++ u32 saddr_hi; ++ u32 dummy[6]; ++} ls_dma_desc; ++ ++struct ls_runtime_data { ++ int dma_ch; ++ u64 totsize; ++ u64 i2s_ctl_base; ++ struct ls_pcm_dma_params *params; ++ ls_dma_desc *dma_desc_array; ++ dma_addr_t dma_desc_array_phys; ++ ++ ls_dma_desc *dma_desc_ready; ++ dma_addr_t dma_desc_ready_phys; ++ ++ ls_dma_desc *dma_position_desc; ++ dma_addr_t dma_position_desc_phys; ++ ++ dma_addr_t base_phys; ++ void *base; ++ dma_addr_t order_addr1_phys; ++ void *order_addr1; ++ dma_addr_t order_addr2_phys; ++ void *order_addr2; ++ struct dma_chan *chan; ++ ++ struct dma_chan *tx_ch; /* dma rx channel */ ++ dma_addr_t tx_dma_buf; /* dma rx buffer bus address */ ++ unsigned int *tx_buf; /* dma rx buffer cpu address */ ++ struct dma_chan *rx_ch; /* dma rx channel */ ++ dma_addr_t rx_dma_buf; /* dma rx buffer bus address */ ++ unsigned int *rx_buf; /* dma rx buffer cpu address */ ++}; ++ ++struct ls_pcm_client { ++ struct ls_pcm_dma_params *playback_params; ++ struct ls_pcm_dma_params *capture_params; ++ int (*startup)(struct snd_pcm_substream *); ++ void (*shutdown)(struct snd_pcm_substream *); ++ int (*prepare)(struct snd_pcm_substream *); ++}; ++ ++extern int ls_pcm_new(struct snd_card *, struct ls_pcm_client *, struct snd_pcm **); ++ ++static inline u32 read_reg(volatile u32 *reg) ++{ ++ return *reg; ++} ++static inline void write_reg(volatile u32 *reg, u32 val) ++{ ++ *(reg) = (val); ++} ++ ++#endif +diff --git a/sound/soc/loongson-gd/ls-sound.c b/sound/soc/loongson-gd/ls-sound.c +new file mode 100644 +index 000000000..dfe2cdfc5 +--- /dev/null ++++ b/sound/soc/loongson-gd/ls-sound.c +@@ -0,0 +1,203 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static int loongson_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ return 0; ++ ++} ++ ++static struct snd_soc_ops loongson_dai_link_ops = { ++ .hw_params = loongson_hw_params, ++}; ++ ++enum { ++ PRI_PLAYBACK = 0, ++ PRI_CAPTURE, ++}; ++#define LOONGSON_DAI_FMT (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | \ ++ SND_SOC_DAIFMT_CBS_CFS) ++// SND_SOC_DAIFMT_CBM_CFM) ++ ++SND_SOC_DAILINK_DEF(ls_dai_cpus, COMP_CPU("loongson-i2s-dai")); ++SND_SOC_DAILINK_DEF(ls_dai_codecs, COMP_CODEC("", "")); ++SND_SOC_DAILINK_DEF(ls_dai_platforms, COMP_PLATFORM("loongson-i2s")); ++ ++static struct snd_soc_dai_link loongson_dai_link[] = { ++ [PRI_PLAYBACK] = { ++ /* Primary Playback i/f */ ++ .name = "Loongson Dai link RX", ++ .stream_name = "Playback", ++ .dai_fmt = LOONGSON_DAI_FMT, ++ .ops = &loongson_dai_link_ops, ++ SND_SOC_DAILINK_REG(ls_dai), ++ }, ++ [PRI_CAPTURE] = { ++ /* Primary Capture i/f */ ++ .name = "Loongson Dai link TX", ++ .stream_name = "Capture", ++ .dai_fmt = LOONGSON_DAI_FMT, ++ .ops = &loongson_dai_link_ops, ++ SND_SOC_DAILINK_REG(ls_dai), ++ }, ++}; ++ ++static struct snd_soc_card ls_sound_card = { ++ .owner = THIS_MODULE, ++ .dai_link = loongson_dai_link, ++ .num_links = ARRAY_SIZE(loongson_dai_link), ++ ++}; ++ ++static void put_of_nodes(struct snd_soc_card *card) ++{ ++ struct snd_soc_dai_link *dai_link; ++ int i; ++ ++ for_each_card_prelinks(card, i, dai_link) { ++ of_node_put(dai_link->cpus->of_node); ++ of_node_put(dai_link->codecs->of_node); ++ } ++} ++ ++static int ls_sound_init_codec_name(struct platform_device* pdev, ++ struct i2c_client *codec_i2c) ++{ ++ char codec_name[32]; ++ const char* codec_dai_name; ++ struct snd_soc_component *codec_component; ++ struct snd_soc_dai *codec_dai; ++ ++ codec_component = snd_soc_lookup_component(&codec_i2c->dev, NULL); ++ if (!codec_component) ++ { ++ dev_err(&pdev->dev, ++ "I2C codec Not Found\n"); ++ return -EAGAIN; ++ } ++ ++ // codec-name = .- ++ sprintf(codec_name, "%s.%d-%04x", ++ codec_i2c->dev.driver->name, ++ codec_i2c->adapter->nr, codec_i2c->addr); ++ ++ // codec-dai-name = depends on codec driver ++ for_each_component_dais(codec_component, codec_dai){ ++ codec_dai_name = codec_dai->name; ++ break; ++ } ++ ++ ls_dai_codecs[0].name = codec_name; ++ ls_dai_codecs[0].dai_name = codec_dai_name; ++ ++ dev_info(&pdev->dev, "name,dai-name: %s,%s\n", codec_name, codec_dai_name); ++ ++ return 0; ++} ++ ++static int ls_sound_drv_probe(struct platform_device *pdev) ++{ ++ struct device_node *np = pdev->dev.of_node; ++ struct snd_soc_card *card; ++ struct snd_soc_dai_link *dai_link; ++ int ret; ++ struct device_node *codec_np; ++ struct i2c_client *codec_i2c; ++ const char* card_name; ++ ++ card = (struct snd_soc_card *)of_device_get_match_data(&pdev->dev); ++ card->dev = &pdev->dev; ++ dai_link = card->dai_link; ++ ++ dai_link->cpus->of_node = of_parse_phandle(np, "loongson,i2s-controller", 0); ++ if (!dai_link->cpus->of_node) { ++ dev_err(&pdev->dev, ++ "Property 'loongson,i2s-controller' missing or invalid\n"); ++ return -EINVAL; ++ } ++ ++ if (!dai_link->platforms->name) ++ dai_link->platforms->of_node = dai_link->cpus->of_node; ++ ++ codec_np = of_parse_phandle(np, "loongson,audio-codec", 0); ++ if (!codec_np) { ++ dev_err(&pdev->dev, ++ "Property 'loongson,audio-codec' missing or invalid\n"); ++ ret = -EINVAL; ++ goto err_put_of_nodes; ++ } ++ ++ codec_i2c = of_find_i2c_device_by_node(codec_np); ++ if (!codec_i2c) ++ { ++ dev_err(&pdev->dev, ++ "Property 'loongson,audio-codec' is not a i2c device\n"); ++ ret = -EINVAL; ++ goto err_put_of_nodes; ++ } ++ ++ of_property_read_string(np, "loongson,sound-card-name", &card_name); ++ ++ card->name = card_name; ++ ++ ls_sound_init_codec_name(pdev, codec_i2c); ++ ++ ret = devm_snd_soc_register_card(card->dev, card); ++ if (ret) { ++ if (ret != -EPROBE_DEFER) ++ dev_err(&pdev->dev, ++ "snd_soc_register_card() failed: %d\n", ret); ++ goto err_put_of_nodes; ++ } ++ return 0; ++ ++err_put_of_nodes: ++ put_of_nodes(card); ++ return ret; ++} ++ ++static int ls_sound_drv_remove(struct platform_device *pdev) ++{ ++ struct snd_soc_card *card = platform_get_drvdata(pdev); ++ ++ put_of_nodes(card); ++ return 0; ++} ++ ++static const struct of_device_id snd_ls_sound_dt_match[] = { ++ { .compatible = "loongson,ls-sound", .data = &ls_sound_card}, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, snd_ls_sound_dt_match); ++ ++static struct platform_driver ls_sound_driver = { ++ .probe = ls_sound_drv_probe, ++ .remove = ls_sound_drv_remove, ++ .driver = { ++ .name = "ls-sound", ++ .owner = THIS_MODULE, ++ .of_match_table = of_match_ptr(snd_ls_sound_dt_match), ++ }, ++}; ++ ++static int __init loongson_audio_init(void) ++{ ++ return platform_driver_register(&ls_sound_driver); ++} ++module_init(loongson_audio_init); ++ ++static void __exit loongson_audio_exit(void) ++{ ++ platform_driver_unregister(&ls_sound_driver); ++} ++module_exit(loongson_audio_exit); ++ ++MODULE_AUTHOR("loongson"); ++MODULE_DESCRIPTION("ALSA SoC loongson"); ++MODULE_LICENSE("GPL"); +-- +2.49.0 + diff --git a/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0017-add-loongson-lsdc.patch b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0017-add-loongson-lsdc.patch new file mode 100644 index 0000000000000000000000000000000000000000..ac266f21e43ec1dabf1f435801e94d04f8d94322 --- /dev/null +++ b/bsp/meta-loongson/recipes-kernel/linux/files-alientek/patchs-6.6/0017-add-loongson-lsdc.patch @@ -0,0 +1,1865 @@ +From 4c66ad6d0f0227f8be8736cf2790ea528e1a6b81 Mon Sep 17 00:00:00 2001 +From: snow <1972997989@qq.com> +Date: Fri, 16 May 2025 10:23:44 +0800 +Subject: [PATCH 17/17] add loongson lsdc + +--- + drivers/gpu/drm/Makefile | 1 + + drivers/gpu/drm/amd/display/Kconfig | 2 +- + drivers/gpu/drm/drm_client.c | 60 +++ + drivers/gpu/drm/drm_fbdev_ttm.c | 350 ++++++++++++++++ + drivers/gpu/drm/drm_gem.c | 12 + + drivers/gpu/drm/loongson/Kconfig | 4 + + drivers/gpu/drm/loongson/Makefile | 1 + + drivers/gpu/drm/loongson/loongson_device.c | 54 +++ + drivers/gpu/drm/loongson/loongson_module.c | 18 +- + drivers/gpu/drm/loongson/lsdc_crtc.c | 1 + + drivers/gpu/drm/loongson/lsdc_drv.c | 372 +++++++++++++++++- + drivers/gpu/drm/loongson/lsdc_drv.h | 12 + + drivers/gpu/drm/loongson/lsdc_gem.c | 13 +- + drivers/gpu/drm/loongson/lsdc_gfxpll.c | 11 +- + drivers/gpu/drm/loongson/lsdc_gfxpll.h | 5 + + drivers/gpu/drm/loongson/lsdc_gfxpll_2k1000.c | 140 +++++++ + drivers/gpu/drm/loongson/lsdc_i2c.c | 1 - + drivers/gpu/drm/loongson/lsdc_output_7a1000.c | 15 +- + drivers/gpu/drm/loongson/lsdc_output_7a2000.c | 15 +- + drivers/gpu/drm/loongson/lsdc_pixpll.c | 104 ++++- + drivers/gpu/drm/loongson/lsdc_pixpll.h | 5 + + drivers/gpu/drm/loongson/lsdc_plane.c | 1 - + drivers/gpu/drm/loongson/lsdc_regs.h | 6 + + drivers/gpu/drm/loongson/lsdc_ttm.c | 10 +- + drivers/gpu/drm/panel/panel-lvds.c | 62 +++ + 25 files changed, 1198 insertions(+), 77 deletions(-) + create mode 100644 drivers/gpu/drm/drm_fbdev_ttm.c + create mode 100644 drivers/gpu/drm/loongson/lsdc_gfxpll_2k1000.c + +diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile +index a670c0d95..9835a70a5 100644 +--- a/drivers/gpu/drm/Makefile ++++ b/drivers/gpu/drm/Makefile +@@ -100,6 +100,7 @@ obj-$(CONFIG_DRM_VRAM_HELPER) += drm_vram_helper.o + + drm_ttm_helper-y := drm_gem_ttm_helper.o + obj-$(CONFIG_DRM_TTM_HELPER) += drm_ttm_helper.o ++drm_ttm_helper-$(CONFIG_DRM_FBDEV_EMULATION) += drm_fbdev_ttm.o + + # + # Modesetting helpers +diff --git a/drivers/gpu/drm/amd/display/Kconfig b/drivers/gpu/drm/amd/display/Kconfig +index 901d1961b..22c50e967 100644 +--- a/drivers/gpu/drm/amd/display/Kconfig ++++ b/drivers/gpu/drm/amd/display/Kconfig +@@ -5,7 +5,7 @@ menu "Display Engine Configuration" + config DRM_AMD_DC + bool "AMD DC - Enable new display engine" + default y +- depends on BROKEN || !CC_IS_CLANG || ARM64 || RISCV || SPARC64 || X86_64 ++ depends on BROKEN || !CC_IS_CLANG || ARM64 || LOONGARCH || RISCV || SPARC64 || X86_64 + select SND_HDA_COMPONENT if SND_HDA_CORE + # !CC_IS_CLANG: https://github.com/ClangBuiltLinux/linux/issues/1752 + select DRM_AMD_DC_FP if (X86 || LOONGARCH || (PPC64 && ALTIVEC) || (ARM64 && KERNEL_MODE_NEON && !CC_IS_CLANG)) +diff --git a/drivers/gpu/drm/drm_client.c b/drivers/gpu/drm/drm_client.c +index 037e36f20..fc6100c8b 100644 +--- a/drivers/gpu/drm/drm_client.c ++++ b/drivers/gpu/drm/drm_client.c +@@ -314,6 +314,66 @@ drm_client_buffer_create(struct drm_client_dev *client, u32 width, u32 height, + return ERR_PTR(ret); + } + ++/** ++ * drm_client_buffer_vmap_local - Map DRM client buffer into address space ++ * @buffer: DRM client buffer ++ * @map_copy: Returns the mapped memory's address ++ * ++ * This function maps a client buffer into kernel address space. If the ++ * buffer is already mapped, it returns the existing mapping's address. ++ * ++ * Client buffer mappings are not ref'counted. Each call to ++ * drm_client_buffer_vmap_local() should be closely followed by a call to ++ * drm_client_buffer_vunmap_local(). See drm_client_buffer_vmap() for ++ * long-term mappings. ++ * ++ * The returned address is a copy of the internal value. In contrast to ++ * other vmap interfaces, you don't need it for the client's vunmap ++ * function. So you can modify it at will during blit and draw operations. ++ * ++ * Returns: ++ * 0 on success, or a negative errno code otherwise. ++ */ ++int drm_client_buffer_vmap_local(struct drm_client_buffer *buffer, ++ struct iosys_map *map_copy) ++{ ++ struct drm_gem_object *gem = buffer->gem; ++ struct iosys_map *map = &buffer->map; ++ int ret; ++ ++ drm_gem_lock(gem); ++ ++ ret = drm_gem_vmap(gem, map); ++ if (ret) ++ goto err_drm_gem_vmap_unlocked; ++ *map_copy = *map; ++ ++ return 0; ++ ++err_drm_gem_vmap_unlocked: ++ drm_gem_unlock(gem); ++ return ret; ++} ++EXPORT_SYMBOL(drm_client_buffer_vmap_local); ++ ++/** ++ * drm_client_buffer_vunmap_local - Unmap DRM client buffer ++ * @buffer: DRM client buffer ++ * ++ * This function removes a client buffer's memory mapping established ++ * with drm_client_buffer_vunmap_local(). Calling this function is only ++ * required by clients that manage their buffer mappings by themselves. ++ */ ++void drm_client_buffer_vunmap_local(struct drm_client_buffer *buffer) ++{ ++ struct drm_gem_object *gem = buffer->gem; ++ struct iosys_map *map = &buffer->map; ++ ++ drm_gem_vunmap(gem, map); ++ drm_gem_unlock(gem); ++} ++EXPORT_SYMBOL(drm_client_buffer_vunmap_local); ++ + /** + * drm_client_buffer_vmap - Map DRM client buffer into address space + * @buffer: DRM client buffer +diff --git a/drivers/gpu/drm/drm_fbdev_ttm.c b/drivers/gpu/drm/drm_fbdev_ttm.c +new file mode 100644 +index 000000000..119ffb28a +--- /dev/null ++++ b/drivers/gpu/drm/drm_fbdev_ttm.c +@@ -0,0 +1,350 @@ ++// SPDX-License-Identifier: MIT ++ ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++/* @user: 1=userspace, 0=fbcon */ ++static int drm_fbdev_ttm_fb_open(struct fb_info *info, int user) ++{ ++ struct drm_fb_helper *fb_helper = info->par; ++ ++ /* No need to take a ref for fbcon because it unbinds on unregister */ ++ if (user && !try_module_get(fb_helper->dev->driver->fops->owner)) ++ return -ENODEV; ++ ++ return 0; ++} ++ ++static int drm_fbdev_ttm_fb_release(struct fb_info *info, int user) ++{ ++ struct drm_fb_helper *fb_helper = info->par; ++ ++ if (user) ++ module_put(fb_helper->dev->driver->fops->owner); ++ ++ return 0; ++} ++ ++FB_GEN_DEFAULT_DEFERRED_SYSMEM_OPS(drm_fbdev_ttm, ++ drm_fb_helper_damage_range, ++ drm_fb_helper_damage_area); ++ ++static void drm_fbdev_ttm_fb_destroy(struct fb_info *info) ++{ ++ struct drm_fb_helper *fb_helper = info->par; ++ void *shadow = info->screen_buffer; ++ ++ if (!fb_helper->dev) ++ return; ++ ++ fb_deferred_io_cleanup(info); ++ drm_fb_helper_fini(fb_helper); ++ vfree(shadow); ++ drm_client_framebuffer_delete(fb_helper->buffer); ++ ++ drm_client_release(&fb_helper->client); ++ drm_fb_helper_unprepare(fb_helper); ++ kfree(fb_helper); ++} ++ ++static const struct fb_ops drm_fbdev_ttm_fb_ops = { ++ .owner = THIS_MODULE, ++ .fb_open = drm_fbdev_ttm_fb_open, ++ .fb_release = drm_fbdev_ttm_fb_release, ++ FB_DEFAULT_DEFERRED_OPS(drm_fbdev_ttm), ++ DRM_FB_HELPER_DEFAULT_OPS, ++ .fb_destroy = drm_fbdev_ttm_fb_destroy, ++}; ++ ++/* ++ * This function uses the client API to create a framebuffer backed by a dumb buffer. ++ */ ++static int drm_fbdev_ttm_helper_fb_probe(struct drm_fb_helper *fb_helper, ++ struct drm_fb_helper_surface_size *sizes) ++{ ++ struct drm_client_dev *client = &fb_helper->client; ++ struct drm_device *dev = fb_helper->dev; ++ struct drm_client_buffer *buffer; ++ struct fb_info *info; ++ size_t screen_size; ++ void *screen_buffer; ++ u32 format; ++ int ret; ++ ++ drm_dbg_kms(dev, "surface width(%d), height(%d) and bpp(%d)\n", ++ sizes->surface_width, sizes->surface_height, ++ sizes->surface_bpp); ++ ++ format = drm_driver_legacy_fb_format(dev, sizes->surface_bpp, ++ sizes->surface_depth); ++ buffer = drm_client_framebuffer_create(client, sizes->surface_width, ++ sizes->surface_height, format); ++ if (IS_ERR(buffer)) ++ return PTR_ERR(buffer); ++ ++ fb_helper->buffer = buffer; ++ fb_helper->fb = buffer->fb; ++ ++ screen_size = buffer->gem->size; ++ screen_buffer = vzalloc(screen_size); ++ if (!screen_buffer) { ++ ret = -ENOMEM; ++ goto err_drm_client_framebuffer_delete; ++ } ++ ++ info = drm_fb_helper_alloc_info(fb_helper); ++ if (IS_ERR(info)) { ++ ret = PTR_ERR(info); ++ goto err_vfree; ++ } ++ ++ drm_fb_helper_fill_info(info, fb_helper, sizes); ++ ++ info->fbops = &drm_fbdev_ttm_fb_ops; ++ ++ /* screen */ ++ info->flags |= FBINFO_VIRTFB | FBINFO_READS_FAST; ++ info->screen_buffer = screen_buffer; ++ info->fix.smem_len = screen_size; ++ ++ /* deferred I/O */ ++ fb_helper->fbdefio.delay = HZ / 20; ++ fb_helper->fbdefio.deferred_io = drm_fb_helper_deferred_io; ++ ++ info->fbdefio = &fb_helper->fbdefio; ++ ret = fb_deferred_io_init(info); ++ if (ret) ++ goto err_drm_fb_helper_release_info; ++ ++ return 0; ++ ++err_drm_fb_helper_release_info: ++ drm_fb_helper_release_info(fb_helper); ++err_vfree: ++ vfree(screen_buffer); ++err_drm_client_framebuffer_delete: ++ fb_helper->fb = NULL; ++ fb_helper->buffer = NULL; ++ drm_client_framebuffer_delete(buffer); ++ return ret; ++} ++ ++static void drm_fbdev_ttm_damage_blit_real(struct drm_fb_helper *fb_helper, ++ struct drm_clip_rect *clip, ++ struct iosys_map *dst) ++{ ++ struct drm_framebuffer *fb = fb_helper->fb; ++ size_t offset = clip->y1 * fb->pitches[0]; ++ size_t len = clip->x2 - clip->x1; ++ unsigned int y; ++ void *src; ++ ++ switch (drm_format_info_bpp(fb->format, 0)) { ++ case 1: ++ offset += clip->x1 / 8; ++ len = DIV_ROUND_UP(len + clip->x1 % 8, 8); ++ break; ++ case 2: ++ offset += clip->x1 / 4; ++ len = DIV_ROUND_UP(len + clip->x1 % 4, 4); ++ break; ++ case 4: ++ offset += clip->x1 / 2; ++ len = DIV_ROUND_UP(len + clip->x1 % 2, 2); ++ break; ++ default: ++ offset += clip->x1 * fb->format->cpp[0]; ++ len *= fb->format->cpp[0]; ++ break; ++ } ++ ++ src = fb_helper->info->screen_buffer + offset; ++ iosys_map_incr(dst, offset); /* go to first pixel within clip rect */ ++ ++ for (y = clip->y1; y < clip->y2; y++) { ++ iosys_map_memcpy_to(dst, 0, src, len); ++ iosys_map_incr(dst, fb->pitches[0]); ++ src += fb->pitches[0]; ++ } ++} ++ ++static int drm_fbdev_ttm_damage_blit(struct drm_fb_helper *fb_helper, ++ struct drm_clip_rect *clip) ++{ ++ struct drm_client_buffer *buffer = fb_helper->buffer; ++ struct iosys_map map, dst; ++ int ret; ++ ++ /* ++ * We have to pin the client buffer to its current location while ++ * flushing the shadow buffer. In the general case, concurrent ++ * modesetting operations could try to move the buffer and would ++ * fail. The modeset has to be serialized by acquiring the reservation ++ * object of the underlying BO here. ++ * ++ * For fbdev emulation, we only have to protect against fbdev modeset ++ * operations. Nothing else will involve the client buffer's BO. So it ++ * is sufficient to acquire struct drm_fb_helper.lock here. ++ */ ++ mutex_lock(&fb_helper->lock); ++ ++ ret = drm_client_buffer_vmap_local(buffer, &map); ++ if (ret) ++ goto out; ++ ++ dst = map; ++ drm_fbdev_ttm_damage_blit_real(fb_helper, clip, &dst); ++ ++ drm_client_buffer_vunmap_local(buffer); ++ ++out: ++ mutex_unlock(&fb_helper->lock); ++ ++ return ret; ++} ++ ++static int drm_fbdev_ttm_helper_fb_dirty(struct drm_fb_helper *helper, ++ struct drm_clip_rect *clip) ++{ ++ struct drm_device *dev = helper->dev; ++ int ret; ++ ++ /* Call damage handlers only if necessary */ ++ if (!(clip->x1 < clip->x2 && clip->y1 < clip->y2)) ++ return 0; ++ ++ ret = drm_fbdev_ttm_damage_blit(helper, clip); ++ if (drm_WARN_ONCE(dev, ret, "Damage blitter failed: ret=%d\n", ret)) ++ return ret; ++ ++ if (helper->fb->funcs->dirty) { ++ ret = helper->fb->funcs->dirty(helper->fb, NULL, 0, 0, clip, 1); ++ if (drm_WARN_ONCE(dev, ret, "Dirty helper failed: ret=%d\n", ret)) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static const struct drm_fb_helper_funcs drm_fbdev_ttm_helper_funcs = { ++ .fb_probe = drm_fbdev_ttm_helper_fb_probe, ++ .fb_dirty = drm_fbdev_ttm_helper_fb_dirty, ++}; ++ ++static void drm_fbdev_ttm_client_unregister(struct drm_client_dev *client) ++{ ++ struct drm_fb_helper *fb_helper = drm_fb_helper_from_client(client); ++ ++ if (fb_helper->info) { ++ drm_fb_helper_unregister_info(fb_helper); ++ } else { ++ drm_client_release(&fb_helper->client); ++ drm_fb_helper_unprepare(fb_helper); ++ kfree(fb_helper); ++ } ++} ++ ++static int drm_fbdev_ttm_client_restore(struct drm_client_dev *client) ++{ ++ drm_fb_helper_lastclose(client->dev); ++ ++ return 0; ++} ++ ++static int drm_fbdev_ttm_client_hotplug(struct drm_client_dev *client) ++{ ++ struct drm_fb_helper *fb_helper = drm_fb_helper_from_client(client); ++ struct drm_device *dev = client->dev; ++ int ret; ++ ++ if (dev->fb_helper) ++ return drm_fb_helper_hotplug_event(dev->fb_helper); ++ ++ ret = drm_fb_helper_init(dev, fb_helper); ++ if (ret) ++ goto err_drm_err; ++ ++ if (!drm_drv_uses_atomic_modeset(dev)) ++ drm_helper_disable_unused_functions(dev); ++ ++ ret = drm_fb_helper_initial_config(fb_helper); ++ if (ret) ++ goto err_drm_fb_helper_fini; ++ ++ return 0; ++ ++err_drm_fb_helper_fini: ++ drm_fb_helper_fini(fb_helper); ++err_drm_err: ++ drm_err(dev, "fbdev: Failed to setup emulation (ret=%d)\n", ret); ++ return ret; ++} ++ ++static const struct drm_client_funcs drm_fbdev_ttm_client_funcs = { ++ .owner = THIS_MODULE, ++ .unregister = drm_fbdev_ttm_client_unregister, ++ .restore = drm_fbdev_ttm_client_restore, ++ .hotplug = drm_fbdev_ttm_client_hotplug, ++}; ++ ++/** ++ * drm_fbdev_ttm_setup() - Setup fbdev emulation for TTM-based drivers ++ * @dev: DRM device ++ * @preferred_bpp: Preferred bits per pixel for the device. ++ * ++ * This function sets up fbdev emulation for TTM-based drivers that support ++ * dumb buffers with a virtual address and that can be mmap'ed. ++ * drm_fbdev_ttm_setup() shall be called after the DRM driver registered ++ * the new DRM device with drm_dev_register(). ++ * ++ * Restore, hotplug events and teardown are all taken care of. Drivers that do ++ * suspend/resume need to call drm_fb_helper_set_suspend_unlocked() themselves. ++ * Simple drivers might use drm_mode_config_helper_suspend(). ++ * ++ * In order to provide fixed mmap-able memory ranges, fbdev emulation ++ * uses a shadow buffer in system memory. The implementation blits the shadow ++ * fbdev buffer onto the real buffer in regular intervals. ++ * ++ * This function is safe to call even when there are no connectors present. ++ * Setup will be retried on the next hotplug event. ++ * ++ * The fbdev is destroyed by drm_dev_unregister(). ++ */ ++void drm_fbdev_ttm_setup(struct drm_device *dev, unsigned int preferred_bpp) ++{ ++ struct drm_fb_helper *fb_helper; ++ int ret; ++ ++ drm_WARN(dev, !dev->registered, "Device has not been registered.\n"); ++ drm_WARN(dev, dev->fb_helper, "fb_helper is already set!\n"); ++ ++ fb_helper = kzalloc(sizeof(*fb_helper), GFP_KERNEL); ++ if (!fb_helper) ++ return; ++ drm_fb_helper_prepare(dev, fb_helper, preferred_bpp, &drm_fbdev_ttm_helper_funcs); ++ ++ ret = drm_client_init(dev, &fb_helper->client, "fbdev", &drm_fbdev_ttm_client_funcs); ++ if (ret) { ++ drm_err(dev, "Failed to register client: %d\n", ret); ++ goto err_drm_client_init; ++ } ++ ++ drm_client_register(&fb_helper->client); ++ ++ return; ++ ++err_drm_client_init: ++ drm_fb_helper_unprepare(fb_helper); ++ kfree(fb_helper); ++ return; ++} ++EXPORT_SYMBOL(drm_fbdev_ttm_setup); +diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c +index 44a948b80..ee83c7ce3 100644 +--- a/drivers/gpu/drm/drm_gem.c ++++ b/drivers/gpu/drm/drm_gem.c +@@ -1209,6 +1209,18 @@ void drm_gem_vunmap(struct drm_gem_object *obj, struct iosys_map *map) + } + EXPORT_SYMBOL(drm_gem_vunmap); + ++void drm_gem_lock(struct drm_gem_object *obj) ++{ ++ dma_resv_lock(obj->resv, NULL); ++} ++EXPORT_SYMBOL(drm_gem_lock); ++ ++void drm_gem_unlock(struct drm_gem_object *obj) ++{ ++ dma_resv_unlock(obj->resv); ++} ++EXPORT_SYMBOL(drm_gem_unlock); ++ + int drm_gem_vmap_unlocked(struct drm_gem_object *obj, struct iosys_map *map) + { + int ret; +diff --git a/drivers/gpu/drm/loongson/Kconfig b/drivers/gpu/drm/loongson/Kconfig +index df6946d50..e9f375ffc 100644 +--- a/drivers/gpu/drm/loongson/Kconfig ++++ b/drivers/gpu/drm/loongson/Kconfig +@@ -3,8 +3,12 @@ + config DRM_LOONGSON + tristate "DRM support for Loongson Graphics" + depends on DRM && PCI && MMU ++ depends on LOONGARCH || MIPS || COMPILE_TEST + select DRM_KMS_HELPER + select DRM_TTM ++ select DRM_TTM_HELPER ++ select DRM_BRIDGE_CONNECTOR ++ select DRM_DISPLAY_HELPER + select I2C + select I2C_ALGOBIT + help +diff --git a/drivers/gpu/drm/loongson/Makefile b/drivers/gpu/drm/loongson/Makefile +index 91e72bd90..d6e709e19 100644 +--- a/drivers/gpu/drm/loongson/Makefile ++++ b/drivers/gpu/drm/loongson/Makefile +@@ -7,6 +7,7 @@ loongson-y := \ + lsdc_drv.o \ + lsdc_gem.o \ + lsdc_gfxpll.o \ ++ lsdc_gfxpll_2k1000.o \ + lsdc_i2c.o \ + lsdc_irq.o \ + lsdc_output_7a1000.o \ +diff --git a/drivers/gpu/drm/loongson/loongson_device.c b/drivers/gpu/drm/loongson/loongson_device.c +index 9986c8a2a..07eda74b4 100644 +--- a/drivers/gpu/drm/loongson/loongson_device.c ++++ b/drivers/gpu/drm/loongson/loongson_device.c +@@ -25,6 +25,15 @@ static const struct lsdc_kms_funcs ls7a2000_kms_funcs = { + .crtc_init = ls7a2000_crtc_init, + }; + ++static const struct lsdc_kms_funcs ls2k0300_kms_funcs = { ++ .create_i2c = lsdc_create_i2c_chan, ++ .irq_handler = ls7a2000_dc_irq_handler, ++ .output_init = ls7a1000_output_init, ++ .cursor_plane_init = ls7a1000_cursor_plane_init, ++ .primary_plane_init = lsdc_primary_plane_init, ++ .crtc_init = ls7a1000_crtc_init, ++}; ++ + static const struct loongson_gfx_desc ls7a1000_gfx = { + .dc = { + .num_of_crtc = 2, +@@ -35,7 +44,9 @@ static const struct loongson_gfx_desc ls7a1000_gfx = { + .hw_cursor_w = 32, + .hw_cursor_h = 32, + .pitch_align = 256, ++ .hw_vblank_enable = true, + .has_vblank_counter = false, ++ .has_dedicated_vram = true, + .funcs = &ls7a1000_kms_funcs, + }, + .conf_reg_base = LS7A1000_CONF_REG_BASE, +@@ -43,6 +54,7 @@ static const struct loongson_gfx_desc ls7a1000_gfx = { + .reg_offset = LS7A1000_PLL_GFX_REG, + .reg_size = 8, + }, ++ .gfxpll_funcs = &ls7a1000_gfx_pll_funcs, + .pixpll = { + [0] = { + .reg_offset = LS7A1000_PIXPLL0_REG, +@@ -53,6 +65,7 @@ static const struct loongson_gfx_desc ls7a1000_gfx = { + .reg_size = 8, + }, + }, ++ .pixpll_funcs = &ls2k0300_pixpll_funcs, + .chip_id = CHIP_LS7A1000, + .model = "LS7A1000 bridge chipset", + }; +@@ -67,7 +80,9 @@ static const struct loongson_gfx_desc ls7a2000_gfx = { + .hw_cursor_w = 64, + .hw_cursor_h = 64, + .pitch_align = 64, ++ .hw_vblank_enable = true, + .has_vblank_counter = true, ++ .has_dedicated_vram = true, + .funcs = &ls7a2000_kms_funcs, + }, + .conf_reg_base = LS7A2000_CONF_REG_BASE, +@@ -75,6 +90,7 @@ static const struct loongson_gfx_desc ls7a2000_gfx = { + .reg_offset = LS7A2000_PLL_GFX_REG, + .reg_size = 8, + }, ++ .gfxpll_funcs = &ls7a2000_gfx_pll_funcs, + .pixpll = { + [0] = { + .reg_offset = LS7A2000_PIXPLL0_REG, +@@ -85,13 +101,51 @@ static const struct loongson_gfx_desc ls7a2000_gfx = { + .reg_size = 8, + }, + }, ++ .pixpll_funcs = &ls2k0300_pixpll_funcs, + .chip_id = CHIP_LS7A2000, + .model = "LS7A2000 bridge chipset", + }; + ++static const struct loongson_gfx_desc ls2k0300_gfx = { ++ .dc = { ++ .num_of_crtc = 1, ++ .max_pixel_clk = 200000, ++ .max_width = 4096, ++ .max_height = 4096, ++ .num_of_hw_cursor = 1, ++ .hw_cursor_w = 32, ++ .hw_cursor_h = 32, ++ .pitch_align = 1, // 不需要考虑对齐,对小屏幕不友好 ++ .hw_vblank_enable = false, // 强制不使用 hw_vblank ++ .has_vblank_counter = false, ++ .has_dedicated_vram = false, ++ .funcs = &ls2k0300_kms_funcs, ++ }, ++ .conf_reg_base = LS2K0300_CFG_REG_BASE, ++ .gfxpll = { ++ .reg_offset = LS2K0300_DDR_PLL_REG, ++ .reg_size = 16 + 16, ++ }, ++ .gfxpll_funcs = &ls2k1000_gfx_pll_funcs, ++ .pixpll = { ++ [0] = { ++ .reg_offset = LS2K0300_PIX_PLL0_REG, ++ .reg_size = 16, ++ }, ++ [1] = { ++ .reg_offset = LS2K0300_PIX_PLL1_REG, ++ .reg_size = 16, ++ }, ++ }, ++ .pixpll_funcs = &ls2k0300_pixpll_funcs, ++ .chip_id = CHIP_LS2K0300, ++ .model = "LS2K300 SoC", ++}; ++ + static const struct lsdc_desc *__chip_id_desc_table[] = { + [CHIP_LS7A1000] = &ls7a1000_gfx.dc, + [CHIP_LS7A2000] = &ls7a2000_gfx.dc, ++ [CHIP_LS2K0300] = &ls2k0300_gfx.dc, + [CHIP_LS_LAST] = NULL, + }; + +diff --git a/drivers/gpu/drm/loongson/loongson_module.c b/drivers/gpu/drm/loongson/loongson_module.c +index 37b7d97c4..071302ba5 100644 +--- a/drivers/gpu/drm/loongson/loongson_module.c ++++ b/drivers/gpu/drm/loongson/loongson_module.c +@@ -4,6 +4,7 @@ + */ + + #include ++#include + + #include