diff --git a/linux-4.19/dayu600_patch/hdf.patch b/linux-4.19/dayu600_patch/hdf.patch new file mode 100644 index 0000000000000000000000000000000000000000..a94049873e1b391985ff621356a756c906bce550 --- /dev/null +++ b/linux-4.19/dayu600_patch/hdf.patch @@ -0,0 +1,329 @@ +diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S +index 69e7c8d4a..6bdc118dd 100644 +--- a/arch/arm64/kernel/vmlinux.lds.S ++++ b/arch/arm64/kernel/vmlinux.lds.S +@@ -176,6 +176,15 @@ SECTIONS + INIT_RAM_FS + *(.init.rodata.* .init.bss) /* from the EFI stub */ + } ++ ++#ifdef CONFIG_DRIVERS_HDF ++ .init.hdf_table : { ++ _hdf_drivers_start = .; ++ *(.hdf.driver) ++ _hdf_drivers_end = .; ++ } ++#endif ++ + .exit.data : { + ARM_EXIT_KEEP(EXIT_DATA) + } +diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S +index 23150c0f0..2780470c5 100644 +--- a/arch/arm/kernel/vmlinux.lds.S ++++ b/arch/arm/kernel/vmlinux.lds.S +@@ -121,6 +121,14 @@ SECTIONS + __pv_table_end = .; + } + ++#ifdef CONFIG_DRIVERS_HDF ++ .init.hdf_table : { ++ _hdf_drivers_start = .; ++ *(.hdf.driver) ++ _hdf_drivers_end = .; ++ } ++#endif ++ + INIT_DATA_SECTION(16) + + .exit.data : { +diff --git a/drivers/Kconfig b/drivers/Kconfig +index ab4d43923..70fade369 100644 +--- a/drivers/Kconfig ++++ b/drivers/Kconfig +@@ -217,6 +217,8 @@ source "drivers/visorbus/Kconfig" + + source "drivers/siox/Kconfig" + ++source "drivers/hdf/khdf/Kconfig" ++ + source "drivers/slimbus/Kconfig" + + endmenu +diff --git a/drivers/Makefile b/drivers/Makefile +index 578f469f7..f4aae6a3a 100644 +--- a/drivers/Makefile ++++ b/drivers/Makefile +@@ -185,4 +185,5 @@ obj-$(CONFIG_TEE) += tee/ + obj-$(CONFIG_MULTIPLEXER) += mux/ + obj-$(CONFIG_UNISYS_VISORBUS) += visorbus/ + obj-$(CONFIG_SIOX) += siox/ ++obj-$(CONFIG_DRIVERS_HDF) += hdf/ + obj-$(CONFIG_GNSS) += gnss/ +diff --git a/drivers/hdf/Makefile b/drivers/hdf/Makefile +new file mode 100644 +index 000000000..01ce6ab52 +--- /dev/null ++++ b/drivers/hdf/Makefile +@@ -0,0 +1 @@ ++obj-$(CONFIG_DRIVERS_HDF) += khdf/ +diff --git a/drivers/hid/Makefile b/drivers/hid/Makefile +index bd7ac53b7..d7efd1e3d 100644 +--- a/drivers/hid/Makefile ++++ b/drivers/hid/Makefile +@@ -2,6 +2,15 @@ + # + # Makefile for the HID driver + # ++HDF_ROOT_DIR = -Idrivers/hdf ++ccflags-$(CONFIG_DRIVERS_HDF_INPUT) += $(HDF_ROOT_DIR)/framework/model/input/driver \ ++ $(HDF_ROOT_DIR)/framework/include/core \ ++ $(HDF_ROOT_DIR)/framework/core/common/include/host \ ++ $(HDF_ROOT_DIR)/framework/include/utils \ ++ $(HDF_ROOT_DIR)/framework/include/osal \ ++ $(HDF_ROOT_DIR)/framework/ability/sbuf/include \ ++ $(HDF_ROOT_DIR)/khdf/osal/include \ ++ -I../../../../../third_party/FreeBSD/sys/dev/evdev + hid-y := hid-core.o hid-input.o hid-quirks.o + hid-$(CONFIG_DEBUG_FS) += hid-debug.o + +diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c +index bde5cef32..1cf2e9b9c 100644 +--- a/drivers/hid/hid-core.c ++++ b/drivers/hid/hid-core.c +@@ -36,6 +36,9 @@ + #include + #include + ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++#include "hdf_hid_adapter.h" ++#endif + #include "hid-ids.h" + + /* +@@ -1340,6 +1343,11 @@ static void hid_process_event(struct hid_device *hid, struct hid_field *field, + hidinput_hid_event(hid, field, usage, value); + if (hid->claimed & HID_CLAIMED_HIDDEV && interrupt && hid->hiddev_hid_event) + hid->hiddev_hid_event(hid, field, usage, value); ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++ if (hid->input_dev) { ++ HidReportEvent(hid->input_dev, usage->type, usage->code, value); ++ } ++#endif + } + + /* +@@ -1743,6 +1751,81 @@ static const struct device_attribute dev_attr_country = { + .show = show_country, + }; + ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++static bool check_mouse(char *name) ++{ ++ static char *option[]={"Mouse", "mouse", "MOUSE", "Razer"}; ++ for (int i = 0; i < 4; i++) { ++ if (strstr(name, option[i])) ++ return true; ++ } ++ return false; ++} ++static bool check_kbd(char *name) ++{ ++ static char *option[]={"Keyboard", "keyboard"}; ++ for (int i = 0; i < 2; i++) { ++ if (strstr(name, option[i])) ++ return true; ++ } ++ return false; ++} ++static bool check_rocker(char *name) ++{ ++ static char *option[]={"Thrustmaster"}; ++ for (int i = 0; i < 1; i++) { ++ if (strstr(name, option[i])) ++ return true; ++ } ++ return false; ++} ++static bool check_encoder(char *name) ++{ ++ if (strcmp(name, "Wired KeyBoard") == 0) { ++ return true; ++ } ++ return false; ++} ++static bool check_trackball(char *name) ++{ ++ static char *option[]={"Trackball"}; ++ for (int i = 0; i < 1; i++) { ++ if (strstr(name, option[i])) ++ return true; ++ } ++ return false; ++} ++static void notify_connect_event(struct hid_device *hdev) ++{ ++ bool check; ++ int type = -1; ++ HidInfo *dev = (HidInfo *)kmalloc(sizeof(HidInfo), GFP_KERNEL); ++ if (dev == NULL) { ++ printk("%s: malloc failed", __func__); ++ return; ++ } ++ type = check_mouse(hdev->name)?HID_TYPE_MOUSE:type; ++ type = check_kbd(hdev->name)?HID_TYPE_KEYBOARD:type; ++ type = check_rocker(hdev->name)?HID_TYPE_ROCKER:type; ++ type = check_encoder(hdev->name)?HID_TYPE_ENCODER:type; ++ type = check_trackball(hdev->name)?HID_TYPE_TRACKBALL:type; ++ if ( type < 0) { ++ kfree(dev); ++ dev = NULL; ++ return; ++ } ++ ++ dev->devType = type; ++ dev->devName = hdev->name; ++ hdev->input_dev = HidRegisterHdfInputDev(dev); ++ if (hdev->input_dev == NULL) { ++ printk("%s: RegisterInputDevice failed\n", __func__); ++ } ++ kfree(dev); ++ dev = NULL; ++} ++#endif ++ + int hid_connect(struct hid_device *hdev, unsigned int connect_mask) + { + static const char *types[] = { "Device", "Pointer", "Mouse", "Device", +@@ -1832,6 +1915,9 @@ int hid_connect(struct hid_device *hdev, unsigned int connect_mask) + hid_info(hdev, "%s: %s HID v%x.%02x %s [%s] on %s\n", + buf, bus, hdev->version >> 8, hdev->version & 0xff, + type, hdev->name, hdev->phys); ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++ notify_connect_event(hdev); ++#endif + + return 0; + } +@@ -1847,6 +1933,10 @@ void hid_disconnect(struct hid_device *hdev) + if (hdev->claimed & HID_CLAIMED_HIDRAW) + hidraw_disconnect(hdev); + hdev->claimed = 0; ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++ if (hdev->input_dev) ++ HidUnregisterHdfInputDev(hdev->input_dev); ++#endif + } + EXPORT_SYMBOL_GPL(hid_disconnect); + +@@ -1931,6 +2021,11 @@ EXPORT_SYMBOL_GPL(hid_hw_open); + */ + void hid_hw_close(struct hid_device *hdev) + { ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++ if (hdev->input_dev) { ++ return; ++ } ++#endif + mutex_lock(&hdev->ll_open_lock); + if (!--hdev->ll_open_count) + hdev->ll_driver->close(hdev); +diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c +index 11bd2ca22..a5d0d6c19 100644 +--- a/drivers/hid/hid-input.c ++++ b/drivers/hid/hid-input.c +@@ -32,6 +32,10 @@ + #include + #include + ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++#include "hdf_hid_adapter.h" ++#endif ++ + #include "hid-ids.h" + + #define unk KEY_UNKNOWN +@@ -1365,7 +1369,15 @@ void hidinput_report_event(struct hid_device *hid, struct hid_report *report) + return; + + list_for_each_entry(hidinput, &hid->inputs, list) ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++ { ++#endif + input_sync(hidinput->input); ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++ if(hid->input_dev) ++ HidReportEvent(hid->input_dev, EV_SYN, SYN_REPORT, 0); ++ } ++#endif + } + EXPORT_SYMBOL_GPL(hidinput_report_event); + +@@ -1729,6 +1741,41 @@ static inline void hidinput_configure_usages(struct hid_input *hidinput, + report->field[i]->usage + j); + } + ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++static void transfer_info(struct input_dev *dev) ++{ ++ HidInfo *info = (HidInfo *)kmalloc(sizeof(HidInfo),GFP_KERNEL); ++ if (info == NULL) { ++ printk("%s: malloc failed\n",__func__); ++ return; ++ } ++ info->devName = dev->name; ++ memcpy(info->devProp, dev->propbit, sizeof(unsigned long) * BITS_TO_LONGS(INPUT_PROP_CNT)); ++ memcpy(info->eventType, dev->evbit, sizeof(unsigned long) * BITS_TO_LONGS(EV_CNT)); ++ memcpy(info->keyCode, dev->keybit, sizeof(unsigned long) * BITS_TO_LONGS(KEY_CNT)); ++ memcpy(info->relCode, dev->relbit, sizeof(unsigned long) * BITS_TO_LONGS(REL_CNT)); ++ memcpy(info->absCode, dev->absbit, sizeof(unsigned long) * BITS_TO_LONGS(ABS_CNT)); ++ memcpy(info->miscCode, dev->mscbit, sizeof(unsigned long) * BITS_TO_LONGS(MSC_CNT)); ++ memcpy(info->ledCode, dev->ledbit, sizeof(unsigned long) * BITS_TO_LONGS(LED_CNT)); ++ memcpy(info->soundCode, dev->sndbit, sizeof(unsigned long) * BITS_TO_LONGS(SND_CNT)); ++ memcpy(info->forceCode, dev->ffbit, sizeof(unsigned long) * BITS_TO_LONGS(FF_CNT)); ++ memcpy(info->switchCode, dev->swbit, sizeof(unsigned long) * BITS_TO_LONGS(SW_CNT)); ++ for (int i = 0; i < BITS_TO_LONGS(ABS_CNT); i++) { ++ if (dev->absbit[i] != 0) { ++ memcpy(info->axisInfo, dev->absinfo, sizeof(struct input_absinfo) * ABS_CNT); ++ break; ++ } ++ } ++ info->bustype = dev->id.bustype; ++ info->vendor = dev->id.vendor; ++ info->product = dev->id.product; ++ info->version = dev->id.version; ++ SendInfoToHdf(info); ++ kfree(info); ++ info = NULL; ++} ++#endif ++ + /* + * Register the input device; print a message. + * Configure the input layer interface +@@ -1811,7 +1858,9 @@ int hidinput_connect(struct hid_device *hid, unsigned int force) + hidinput_cleanup_hidinput(hid, hidinput); + continue; + } +- ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++ transfer_info(hidinput->input); ++#endif + if (input_register_device(hidinput->input)) + goto out_unwind; + hidinput->registered = true; +diff --git a/include/linux/hid.h b/include/linux/hid.h +index a46b6832b..c61a17de5 100644 +--- a/include/linux/hid.h ++++ b/include/linux/hid.h +@@ -621,6 +621,7 @@ struct hid_device { /* device report descriptor */ + struct list_head debug_list; + spinlock_t debug_list_lock; + wait_queue_head_t debug_wait; ++ void *input_dev; + }; + + #define to_hid_device(pdev) \ +-- +2.25.1 + diff --git a/linux-4.19/dayu600_patch/kernel.patch b/linux-4.19/dayu600_patch/kernel.patch new file mode 100644 index 0000000000000000000000000000000000000000..69c590934d8ceb694f1f083901c300696825a02b --- /dev/null +++ b/linux-4.19/dayu600_patch/kernel.patch @@ -0,0 +1,88405 @@ +commit 6944f582ee7bb47ac033842f1d6c5bb007262166 +Author: xin_xiwei +Date: Tue Jun 28 06:25:58 2022 +0000 + + push patch + + Change-Id: I8f762075a1595b0d5e0c39284266f2228a62bff1 + +diff --git a/Makefile b/Makefile +index 9fc16d34e..ac90194dc 100644 +--- a/Makefile ++++ b/Makefile +@@ -5,6 +5,10 @@ SUBLEVEL = 155 + EXTRAVERSION = + NAME = "People's Front" + ++#HOME_PATH := $(shell pwd)/../../.. ++#BUILD_PATH := $(HOME_PATH)/build ++#include $(BUILD_PATH)/version.mak ++ + # *DOCUMENTATION* + # To see a list of typical targets execute "make help" + # More info can be located in ./README +@@ -462,6 +466,7 @@ export KBUILD_AFLAGS AFLAGS_KERNEL AFLAGS_MODULE + export KBUILD_AFLAGS_MODULE KBUILD_CFLAGS_MODULE KBUILD_LDFLAGS_MODULE + export KBUILD_AFLAGS_KERNEL KBUILD_CFLAGS_KERNEL + export KBUILD_ARFLAGS ++export SDK_VERSION + + # When compiling out-of-tree modules, put MODVERDIR in the module + # tree rather than in the kernel tree. The kernel tree might +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index 1877da816..6f8314b78 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -724,6 +724,8 @@ source "arch/arm/mach-at91/Kconfig" + + source "arch/arm/mach-axxia/Kconfig" + ++source "arch/arm/mach-axera/Kconfig" ++ + source "arch/arm/mach-bcm/Kconfig" + + source "arch/arm/mach-berlin/Kconfig" +@@ -855,6 +857,8 @@ source "arch/arm/mach-zx/Kconfig" + + source "arch/arm/mach-zynq/Kconfig" + ++source "arch/arm/mach-axera/Kconfig" ++ + # ARMv7-M architecture + config ARCH_EFM32 + bool "Energy Micro efm32" +diff --git a/arch/arm/Makefile b/arch/arm/Makefile +index d1516f85f..509ea4e9e 100644 +--- a/arch/arm/Makefile ++++ b/arch/arm/Makefile +@@ -158,6 +158,7 @@ machine-$(CONFIG_ARCH_ALPINE) += alpine + machine-$(CONFIG_ARCH_ARTPEC) += artpec + machine-$(CONFIG_ARCH_AT91) += at91 + machine-$(CONFIG_ARCH_AXXIA) += axxia ++machine-$(CONFIG_ARCH_AXERA) += axera + machine-$(CONFIG_ARCH_BCM) += bcm + machine-$(CONFIG_ARCH_BERLIN) += berlin + machine-$(CONFIG_ARCH_CLPS711X) += clps711x +diff --git a/arch/arm/boot/dts/AX620U_38board.dts b/arch/arm/boot/dts/AX620U_38board.dts +new file mode 100644 +index 000000000..9db0208c6 +--- /dev/null ++++ b/arch/arm/boot/dts/AX620U_38board.dts +@@ -0,0 +1,384 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * dts file for Axera EVB Development Board ++ * ++ * Copyright (C) 2021, Axera Ltd. ++ * ++ */ ++ ++/dts-v1/; ++#include "axera_ax620x.dtsi" ++/ { ++ memory@40000000 { ++ device_type = "memory"; ++ reg = <0x40000000 0x447fffff>; ++ }; ++ reserved-memory { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ ++ ramoops_mem@43000000{ ++ compatible = "ramoops"; ++ reg = <0x43000000 0x20000>; ++ record-size = <0x20000>; ++ }; ++ ax_memory_dump@44100000 { ++ compatible = "ax_memory_dump"; ++ reg = <0x44100000 0x1000>; ++ size = <0x1000>; ++ }; ++ }; ++ chosen { ++ bootargs = "mem=72M rdinit=/linuxrc console=ttyS1,230400n8 loglevel=8 vmalloc=768M"; ++ }; ++ ++ wdt0: watchdog@49aa000 { ++ compatible = "snps,dw-wdt"; ++ reg = <0x49aa000 0x100>; ++ interrupts = <0 123 4>; ++ clocks = <&ap_clk AX620X_CLK_WDT>; ++ clock-names = "wdg-clk"; ++ }; ++ ++ dec: dec@4020000 { ++ compatible = "axera, video-decoder"; ++ reg = <0x4020000 0x10000>; ++ reg-names = "dec0"; ++ interrupts = <0 41 4>; ++ type = "chip"; ++ clocks = <&vpu_clk AX620X_CLK_VDEC>; ++ clock-names = "dec_clk"; ++ }; ++ ++ venc: venc@4010000 { ++ compatible = "axera,video-encoder"; ++ reg = <0x4010000 0x10000>; ++ reg-names = "avc_hevc"; ++ interrupts = <0 42 4>; ++ clocks = <&vpu_clk AX620X_CLK_VENC>; ++ clock-names = "venc_clk"; ++ }; ++ ++ jenc: jenc@4000000 { ++ compatible = "axera, jpeg-encoder"; ++ reg = <0x4000000 0x10000>; ++ reg-names = "jpeg_enc"; ++ interrupts = <0 40 4>; ++ clocks = <&vpu_clk AX620X_CLK_JENC>; ++ clock-names = "jpegenc_clk"; ++ }; ++ ++ tdp: tdp@4410000 { ++ compatible = "axera,tdp-dev"; ++ reg = <0x4410000 0x1000>, ++ <0x4420000 0x1000>; ++ clocks = <&mm_clk AX620X_CLK_TDP>; ++ clock-names = "clk_tdp"; ++ interrupts = <0 20 4>; ++ status = "okay"; ++ }; ++ gdc: gdc@2620000 { ++ compatible = "axera,gdc-dev"; ++ reg = <0x2620000 0x1000>; ++ clocks = <&isp_clk AX620X_CLK_ISP_GDC>; ++ clock-names = "clk_gdc"; ++ interrupts = <0 21 4>; ++ status = "okay"; ++ }; ++ ++ eth0: ethernet@0x4970000{ ++ compatible = "axera,dwmac-4.10a"; ++ reg = <0x4970000 0x10000>; ++ ++ clocks = <&ap_clk AX620X_PCLK_EMAC>, <&ap_clk AX620X_ACLK_EMAC>, ++ <&ap_clk AX620X_CLK_EPHY_REF>, <&ap_clk AX620X_CLK_EMAC_RGMII_TX>, ++ <&ap_clk AX620X_CLK_EMAC_RMII_RX_PAD_DIV>, <&ap_clk AX620X_CLK_EMAC_RMII_TX>; ++ clock-names = "emac_pclk", "emac_aclk", "ephy_clk", "rgmii_tx_clk", "rmii_rx_clk", "rmii_tx_clk"; ++ ++ interrupt-parent = <&gic>; ++ interrupts = <0 101 4>, <0 102 4>, <0 100 4>; ++ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; ++ ++ phy-mode = "rmii"; ++ phy-handle = <&phy0>; ++ phy-rst-gpio = <&port2a 28 0>; /* GPIO2_D4 */ ++ ++ rx-fifo-depth = <16384>; ++ tx-fifo-depth = <16384>; ++ snps,tso; ++ ++ mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "snps,dwmac-mdio"; ++ phy0: phy@2 { ++ device_tpye = "ethernet-phy"; ++ compatible = "ethernet-phy-id001c.c816"; ++ reg = <2>; ++ }; ++ }; ++ }; ++ ++ aliases { ++ ethernet0 = ð0; ++ }; ++ ++ usb@0x4800000 { ++ compatible = "cdns,usb3"; ++ ++ clocks = <&ap_clk AX620X_PCLK_USB>, <&ap_clk AX620X_ACLK_USB>, ++ <&ap_clk AX620X_CLK_USB_REF>, <&ap_clk AX620X_CLK_USB2PHY>, ++ <&ap_clk AX620X_CLK_STB_PREDFT>, <&ap_clk AX620X_CLK_OTG_FAST>, ++ <&ap_clk AX620X_CLK_LPM_PREDFT>; ++ clock-names = "usb_pclk", "usb_aclk", "usb_ref_clk", "usb2phy_clk", ++ "stb_predft_clk", "otg_fast_clk", "lpm_predft_clk"; ++ ++ interrupts = <0 106 4>, ++ <0 114 4>, ++ <0 105 4>; ++ interrupt-names = "host", "peripheral", "otg"; ++ ++ reg = <0x4800000 0x10000>, /* memory area for OTG registers */ ++ <0x4810000 0x10000>, /* memory area for HOST registers */ ++ <0x4820000 0x10000>; /* memory area for DEVICE registers */ ++ reg-names = "otg", "xhci", "dev"; ++ ++ maximum-speed = "high-speed"; ++ dr_mode = "peripheral"; /* host or peripheral */ ++ /* id-gpio = <&port0a 31 0>; */ /* GPIO0_D7 */ ++ }; ++ ++ rtc-top@10040000 { ++ compatible = "axera,axi-top-rtc"; ++ reg-num = <2>; ++ reg = <0x10040000 0x2000>, ++ <0x2210000 0x100>; ++ interrupts = <0 136 4>; ++ status = "okay"; ++ }; ++ ++ sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Axera Audio"; ++ simple-audio-card,widgets = ++ "Microphone", "Mic Jack", ++ "Headphone", "Headphone Jack"; ++ simple-audio-card,routing = ++ "Headphone Jack", "DIFFERENTIAL OUT", ++ "AMIC", "Mic Jack"; ++ simple-audio-card,dai-link@0 { ++ format = "i2s"; ++ cpu { ++ sound-dai = <&i2s_mst>; ++ }; ++ codec { ++ sound-dai = <&es8311>; ++ system-clock-frequency = <12288000>; ++ }; ++ }; ++ }; ++ thermal-zones { ++ soc_thm: soc_thm { ++ polling-delay = <1000>; ++ polling-delay-passive = <100>; ++ sustainable-power = <4500>; ++ /* sensor ID */ ++ thermal-sensors = <&tsensor 0>; ++ trips { ++ threshold: trip-point@0 { ++ temperature = <80000>; ++ hysteresis = <0>; ++ type = "passive"; ++ }; ++ target: trip-point@1 { ++ temperature = <90000>; ++ hysteresis = <0>; ++ type = "passive"; ++ }; ++ soc_crit: soc-crit { ++ temperature = <120000>; ++ hysteresis = <0>; ++ type = "passive"; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++ ++ ++&emmc{ ++ status = "okay"; ++}; ++ ++&sd1{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ no-sdio; ++ no-mmc; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "disable"; ++}; ++ ++&sd2{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ no-1-8-v; // hw not support 1.8V ++ no-sdio; ++ no-mmc; ++ //non-removable; ++ //broken-cd; //polling ++ cd-gpios = <&port2a 2 0>; ++ cd-inverted; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "okay"; ++}; ++ ++&i2s_mst { ++ status = "okay"; ++ reg = <0x49AC000 0x1000>, ++ <0x49BA000 0x400>; ++ clocks = <&ap_clk AX620X_SCLK_I2S>, ++ <&ap_clk AX620X_CLK_I2S_REF2>; ++ glb-value = <0xf80>; ++}; ++ ++&i2c0 { ++ status = "okay"; ++}; ++&i2c1 { ++ status = "okay"; ++}; ++&i2c_hs0 { ++ status = "okay"; ++}; ++&i2c_hs2 { ++ status = "okay"; ++ #address-cells = <0x1>; ++ #size-cells = <0x0>; ++ es8311: es8311@19 { ++ compatible = "ambarella,es8311"; ++ /* ++ DVDD-supply = <®_3p3v>; ++ AVDD-supply = <®_3p3v>; ++ PVDD-supply = <®_3p3v>; ++ HPVDD-supply = <®_3p3v>; ++ */ ++ reg = <0x19>; ++ #sound-dai-cells = <0>; ++ }; ++}; ++ ++ ++&dwgpio0 { ++ status = "okay"; ++}; ++ ++&dwgpio1 { ++ status = "okay"; ++}; ++ ++&dwgpio2 { ++ status = "okay"; ++}; ++ ++&spi4 { ++ status = "okay"; ++ spi_nand@0 { ++ compatible = "spi-nand"; ++ reg = <0>; ++ spi-max-frequency = <30000000>; ++ spi-tx-bus-width = <4>; ++ spi-rx-bus-width = <4>; ++ }; ++}; ++ ++&dsi { ++ status = "okay"; ++ enable-dsi = <0x1>; ++}; ++ ++&panel_dsi { ++ reset-gpio = <&expander_io 3 0>; ++ prepare-delay-ms = <0>; ++ unprepare-delay-ms = <0>; ++ enable-delay-ms = <0>; ++ disable-delay-ms = <0>; ++ reset-low-delay-ms = <20>; ++ reset-high-delay-ms = <100>; ++ dsi,format = ; ++ dsi,lanes = <2>; ++ dsi,flags = <(MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM)>; ++ panel-init-seq = [39 00 06 FF 77 01 00 00 13 ++ 15 00 02 EF 08 ++ 39 00 06 FF 77 01 00 00 10 ++ 39 00 03 C0 2C 00 ++ 39 00 03 C1 08 02 ++ 39 00 03 C2 37 05 ++ 15 00 02 C3 02 ++ 15 00 02 CC 10 ++ 39 00 11 B0 04 0E 17 0B 0F 06 08 08 08 24 04 11 0F 2C 33 13 ++ 39 00 11 B1 0C 16 1D 0E 11 06 08 08 08 24 05 13 11 2D 33 1F ++ 39 00 06 FF 77 01 00 00 11 ++ 15 00 02 B0 54 ++ 15 00 02 B1 76 ++ 15 00 02 B2 87 ++ 15 00 02 B3 80 ++ 15 00 02 B5 4B ++ 15 00 02 B7 85 ++ 15 00 02 B8 21 ++ 15 00 02 C1 78 ++ 15 00 02 C2 78 ++ 15 64 02 D0 88 ++ 39 00 04 E0 00 00 02 ++ 39 00 0C E1 02 00 04 00 01 00 03 00 00 33 33 ++ 39 00 0D E2 11 11 33 33 6E 00 70 00 6D 00 6F 00 ++ 39 00 05 E3 00 00 11 11 ++ 39 00 03 E4 44 44 ++ 39 00 11 E5 03 6F 00 FF 05 71 00 FF 07 73 00 FF 09 6D 00 FF ++ 39 00 05 E6 00 00 11 11 ++ 39 00 03 E7 44 44 ++ 39 00 11 E8 02 6E 00 FF 04 70 00 FF 06 72 00 FF 08 6C 00 FF ++ 39 00 08 EB 00 01 4E 4E EE 44 00 ++ 39 00 11 ED 4F 01 23 56 7F FF FF FF FF FF FF F7 65 32 10 F4 ++ 39 00 07 EF 10 0D 04 08 3F 1F ++ 39 00 06 FF 77 01 00 00 00 ++ 05 78 01 11 ++ 15 00 02 36 08 ++ 15 00 02 35 00 ++ 05 14 01 29]; ++ panel-exit-seq = [05 00 01 28]; ++ ++ display-timings { ++ ++ timing0 { ++ /* 480x360@60 */ ++ clock-frequency = <13500000>; ++ hactive = <480>; ++ vactive = <360>; ++ hfront-porch = <25>; ++ hsync-len = <25>; ++ hback-porch = <30>; ++ vfront-porch = <20>; ++ vsync-len = <10>; ++ vback-porch = <12>; ++ hsync-active = <0>; ++ vsync-active = <0>; ++ de-active = <0>; ++ }; ++ }; ++}; +diff --git a/arch/arm/boot/dts/AX620U_demo.dts b/arch/arm/boot/dts/AX620U_demo.dts +new file mode 100644 +index 000000000..a450e8846 +--- /dev/null ++++ b/arch/arm/boot/dts/AX620U_demo.dts +@@ -0,0 +1,410 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * dts file for Axera Demo Development Board ++ * ++ * Copyright (C) 2021, Axera Ltd. ++ * ++ */ ++ ++/dts-v1/; ++#include "axera_ax620x.dtsi" ++/ { ++ memory@40000000 { ++ device_type = "memory"; ++ reg = <0x40000000 0x44Dfffff>; ++ }; ++ reserved-memory { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ ++ ramoops_mem@43000000{ ++ compatible = "ramoops"; ++ reg = <0x43000000 0x20000>; ++ record-size = <0x20000>; ++ }; ++ ++ ax_memory_dump@44100000 { ++ compatible = "ax_memory_dump"; ++ reg = <0x44100000 0x1000>; ++ size = <0x1000>; ++ }; ++ }; ++ chosen { ++ bootargs = "mem=78M rdinit=/linuxrc console=ttyS1,230400n8 loglevel=8 vmalloc=768M"; ++ }; ++ ++ wdt0: watchdog@49aa000 { ++ compatible = "snps,dw-wdt"; ++ reg = <0x49aa000 0x100>; ++ interrupts = <0 123 4>; ++ clocks = <&ap_clk AX620X_CLK_WDT>; ++ clock-names = "wdg-clk"; ++ }; ++ ++ dec: dec@4020000 { ++ compatible = "axera, video-decoder"; ++ reg = <0x4020000 0x10000>; ++ reg-names = "dec0"; ++ interrupts = <0 41 4>; ++ type = "chip"; ++ clocks = <&vpu_clk AX620X_CLK_VDEC>; ++ clock-names = "dec_clk"; ++ }; ++ ++ venc: venc@4010000 { ++ compatible = "axera,video-encoder"; ++ reg = <0x4010000 0x10000>; ++ reg-names = "avc_hevc"; ++ interrupts = <0 42 4>; ++ clocks = <&vpu_clk AX620X_CLK_VENC>; ++ clock-names = "venc_clk"; ++ }; ++ ++ jenc: jenc@4000000 { ++ compatible = "axera, jpeg-encoder"; ++ reg = <0x4000000 0x10000>; ++ reg-names = "jpeg_enc"; ++ interrupts = <0 40 4>; ++ clocks = <&vpu_clk AX620X_CLK_JENC>; ++ clock-names = "jpegenc_clk"; ++ }; ++ ++ tdp: tdp@4410000 { ++ compatible = "axera,tdp-dev"; ++ reg = <0x4410000 0x1000>, ++ <0x4420000 0x1000>; ++ clocks = <&mm_clk AX620X_CLK_TDP>; ++ clock-names = "clk_tdp"; ++ interrupts = <0 20 4>; ++ status = "okay"; ++ }; ++ ++ gdc: gdc@2620000 { ++ compatible = "axera,gdc-dev"; ++ reg = <0x2620000 0x1000>; ++ clocks = <&isp_clk AX620X_CLK_ISP_GDC>; ++ clock-names = "clk_gdc"; ++ interrupts = <0 21 4>; ++ status = "okay"; ++ }; ++ ++ eth0: ethernet@0x4970000{ ++ compatible = "axera,dwmac-4.10a"; ++ reg = <0x4970000 0x10000>; ++ ++ clocks = <&ap_clk AX620X_PCLK_EMAC>, <&ap_clk AX620X_ACLK_EMAC>, ++ <&ap_clk AX620X_CLK_EPHY_REF>, <&ap_clk AX620X_CLK_EMAC_RGMII_TX>, ++ <&ap_clk AX620X_CLK_EMAC_RMII_RX_PAD_DIV>, <&ap_clk AX620X_CLK_EMAC_RMII_TX>; ++ clock-names = "emac_pclk", "emac_aclk", "ephy_clk", "rgmii_tx_clk", "rmii_rx_clk", "rmii_tx_clk"; ++ ++ interrupt-parent = <&gic>; ++ interrupts = <0 101 4>, <0 102 4>, <0 100 4>; ++ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; ++ ++ phy-mode = "rgmii"; ++ phy-handle = <&phy0>; ++ phy-rst-gpio = <&port2a 28 0>; /* GPIO2_D4 */ ++ ++ rx-fifo-depth = <16384>; ++ tx-fifo-depth = <16384>; ++ snps,tso; ++ ++ mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "snps,dwmac-mdio"; ++ phy0: phy@1 { ++ device_tpye = "ethernet-phy"; ++ compatible = "ethernet-phy-id001c.c916"; ++ reg = <1>; ++ }; ++ }; ++ }; ++ ++ aliases { ++ ethernet0 = ð0; ++ }; ++ ++ usb@0x4800000 { ++ compatible = "cdns,usb3"; ++ ++ clocks = <&ap_clk AX620X_PCLK_USB>, <&ap_clk AX620X_ACLK_USB>, ++ <&ap_clk AX620X_CLK_USB_REF>, <&ap_clk AX620X_CLK_USB2PHY>, ++ <&ap_clk AX620X_CLK_STB_PREDFT>, <&ap_clk AX620X_CLK_OTG_FAST>, ++ <&ap_clk AX620X_CLK_LPM_PREDFT>; ++ clock-names = "usb_pclk", "usb_aclk", "usb_ref_clk", "usb2phy_clk", ++ "stb_predft_clk", "otg_fast_clk", "lpm_predft_clk"; ++ ++ interrupts = <0 106 4>, ++ <0 114 4>, ++ <0 105 4>; ++ interrupt-names = "host", "peripheral", "otg"; ++ ++ reg = <0x4800000 0x10000>, /* memory area for OTG registers */ ++ <0x4810000 0x10000>, /* memory area for HOST registers */ ++ <0x4820000 0x10000>; /* memory area for DEVICE registers */ ++ reg-names = "otg", "xhci", "dev"; ++ ++ maximum-speed = "high-speed"; ++ dr_mode = "otg"; /*host or peripheral*/ ++ /* id-gpio = <&port0a 31 0>; */ ++ }; ++ ++ rtc-top@10040000 { ++ compatible = "axera,axi-top-rtc"; ++ reg-num = <2>; ++ reg = <0x10040000 0x2000>, ++ <0x2210000 0x100>; ++ interrupts = <0 136 4>; ++ status = "disable"; ++ }; ++ ++ sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Axera Audio"; ++ simple-audio-card,widgets = ++ "Microphone", "Mic Jack", ++ "Headphone", "Headphone Jack"; ++ simple-audio-card,routing = ++ "Headphone Jack", "LOUT1", ++ "Headphone Jack", "ROUT1", ++ "LINPUT2", "Mic Jack", ++ "RINPUT2", "Mic Jack", ++ "Mic Jack", "Mic Bias"; ++ simple-audio-card,dai-link@0 { ++ format = "i2s"; ++ cpu { ++ sound-dai = <&i2s_mst>; ++ }; ++ codec { ++ sound-dai = <&es8388>; ++ system-clock-frequency = <12288000>; ++ }; ++ }; ++ }; ++ thermal-zones { ++ soc_thm: soc_thm { ++ polling-delay = <1000>; ++ polling-delay-passive = <100>; ++ sustainable-power = <4500>; ++ /* sensor ID */ ++ thermal-sensors = <&tsensor 0>; ++ trips { ++ threshold: trip-point@0 { ++ temperature = <80000>; ++ hysteresis = <0>; ++ type = "passive"; ++ }; ++ target: trip-point@1 { ++ temperature = <90000>; ++ hysteresis = <0>; ++ type = "passive"; ++ }; ++ soc_crit: soc-crit { ++ temperature = <120000>; ++ hysteresis = <0>; ++ type = "passive"; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&emmc{ ++ max-frequency = <200000000>; ++ /*resets = <&sysclk>;*/ ++ sdhci-caps-mask = <0x2 0x03200000>; ++ bus-width = <8>; ++ no-sdio; ++ no-sd; ++ non-removable; ++ disable-wp; ++ cap-mmc-highspeed; ++ mmc-hs200-1_8v; ++ cdns,phy-input-delay-sd-highspeed = <2>; ++ cdns,phy-input-delay-legacy = <3>; ++ cdns,phy-input-delay-sd-uhs-sdr12 = <0>; ++ cdns,phy-input-delay-sd-uhs-sdr25 = <4>; ++ cdns,phy-input-delay-sd-uhs-sdr50 = <3>; ++ cdns,phy-input-delay-sd-uhs-ddr50 = <3>; ++ cdns,phy-input-delay-mmc-legacy = <8>; ++ cdns,phy-input-delay-mmc-highspeed = <4>; ++ cdns,phy-input-delay-mmc-ddr = <3>; ++ cdns,phy-dll-delay-sdclk = <45>; ++ cdns,phy-dll-delay-sdclk-hsmmc = <23>; ++ cdns,phy-dll-delay-strobe = <18>; ++ fixed-emmc-driver-type = <4>; ++ clocks = <&flash_clk AX620X_CLK_EMMC_CARD>; ++ clock-names = "cardclk"; ++ status = "okay"; ++}; ++ ++&sd1{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ no-sdio; ++ no-mmc; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "disable"; ++}; ++ ++&sd2{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ no-1-8-v; // hw not support 1.8V ++ no-sdio; ++ no-mmc; ++ //non-removable; ++ //broken-cd; //polling ++ cd-gpios = <&port2a 2 0>; ++ cd-inverted; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "okay"; ++}; ++ ++&i2s_mst { ++ status = "okay"; ++ reg = <0x49AC000 0x1000>, ++ <0x49BA000 0x400>; ++ glb-value = <0xf80>; ++}; ++ ++&i2c0 { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++}; ++ ++&i2c_hs0 { ++ status = "okay"; ++}; ++ ++&i2c_hs2 { ++ status = "okay"; ++ #address-cells = <0x1>; ++ #size-cells = <0x0>; ++ es8388: es8388@11 { ++ compatible = "everest,es8388"; ++ /* ++ DVDD-supply = <®_3p3v>; ++ AVDD-supply = <®_3p3v>; ++ PVDD-supply = <®_3p3v>; ++ HPVDD-supply = <®_3p3v>; ++ */ ++ clocks = <&ap_clk AX620X_CLK_I2S_REF2>; ++ reg = <0x11>; ++ #sound-dai-cells = <0>; ++ }; ++ ++ typec: sgm7220@47 { ++ compatible = "axera,sgm7220"; ++ reg = <0x47>; ++ /* int-gpio = <&port0a 31 0>; GPIO0_D7 */ ++ bind-usb = "4800000.usb"; ++ }; ++}; ++ ++ ++&dwgpio0 { ++ status = "okay"; ++}; ++ ++&dwgpio1 { ++ status = "okay"; ++}; ++ ++&dwgpio2 { ++ status = "okay"; ++}; ++ ++&dsi { ++ status = "okay"; ++ enable-dsi = <0x1>; ++}; ++ ++&panel_dsi { ++ reset-gpio = <&expander_io 3 0>; ++ prepare-delay-ms = <0>; ++ unprepare-delay-ms = <0>; ++ enable-delay-ms = <0>; ++ disable-delay-ms = <0>; ++ reset-low-delay-ms = <20>; ++ reset-high-delay-ms = <100>; ++ dsi,format = ; ++ dsi,lanes = <2>; ++ dsi,flags = <(MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM)>; ++ panel-init-seq = [39 00 06 FF 77 01 00 00 13 ++ 15 00 02 EF 08 ++ 39 00 06 FF 77 01 00 00 10 ++ 39 00 03 C0 2C 00 ++ 39 00 03 C1 08 02 ++ 39 00 03 C2 37 05 ++ 15 00 02 C3 02 ++ 15 00 02 CC 10 ++ 39 00 11 B0 04 0E 17 0B 0F 06 08 08 08 24 04 11 0F 2C 33 13 ++ 39 00 11 B1 0C 16 1D 0E 11 06 08 08 08 24 05 13 11 2D 33 1F ++ 39 00 06 FF 77 01 00 00 11 ++ 15 00 02 B0 54 ++ 15 00 02 B1 76 ++ 15 00 02 B2 87 ++ 15 00 02 B3 80 ++ 15 00 02 B5 4B ++ 15 00 02 B7 85 ++ 15 00 02 B8 21 ++ 15 00 02 C1 78 ++ 15 00 02 C2 78 ++ 15 64 02 D0 88 ++ 39 00 04 E0 00 00 02 ++ 39 00 0C E1 02 00 04 00 01 00 03 00 00 33 33 ++ 39 00 0D E2 11 11 33 33 6E 00 70 00 6D 00 6F 00 ++ 39 00 05 E3 00 00 11 11 ++ 39 00 03 E4 44 44 ++ 39 00 11 E5 03 6F 00 FF 05 71 00 FF 07 73 00 FF 09 6D 00 FF ++ 39 00 05 E6 00 00 11 11 ++ 39 00 03 E7 44 44 ++ 39 00 11 E8 02 6E 00 FF 04 70 00 FF 06 72 00 FF 08 6C 00 FF ++ 39 00 08 EB 00 01 4E 4E EE 44 00 ++ 39 00 11 ED 4F 01 23 56 7F FF FF FF FF FF FF F7 65 32 10 F4 ++ 39 00 07 EF 10 0D 04 08 3F 1F ++ 39 00 06 FF 77 01 00 00 00 ++ 05 78 01 11 ++ 15 00 02 36 08 ++ 15 00 02 35 00 ++ 05 14 01 29]; ++ panel-exit-seq = [05 00 01 28]; ++ ++ display-timings { ++ ++ timing0 { ++ /* 480x360@60 */ ++ clock-frequency = <13500000>; ++ hactive = <480>; ++ vactive = <360>; ++ hfront-porch = <25>; ++ hsync-len = <25>; ++ hback-porch = <30>; ++ vfront-porch = <20>; ++ vsync-len = <10>; ++ vback-porch = <12>; ++ hsync-active = <0>; ++ vsync-active = <0>; ++ de-active = <0>; ++ }; ++ }; ++}; +diff --git a/arch/arm/boot/dts/AX620U_nand.dts b/arch/arm/boot/dts/AX620U_nand.dts +new file mode 100644 +index 000000000..74bcf27d7 +--- /dev/null ++++ b/arch/arm/boot/dts/AX620U_nand.dts +@@ -0,0 +1,403 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * dts file for Axera EVB Development Board ++ * ++ * Copyright (C) 2021, Axera Ltd. ++ * ++ */ ++ ++/dts-v1/; ++#include "axera_ax620x.dtsi" ++/ { ++ memory@40000000 { ++ device_type = "memory"; ++ reg = <0x40000000 0x44Dfffff>; ++ }; ++ reserved-memory { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ ++ ramoops_mem@43000000{ ++ compatible = "ramoops"; ++ reg = <0x43000000 0x20000>; ++ record-size = <0x20000>; ++ }; ++ ++ ax_memory_dump@44100000 { ++ compatible = "ax_memory_dump"; ++ reg = <0x44100000 0x1000>; ++ size = <0x1000>; ++ }; ++ ++ boot_logo@44c80000 { ++ compatible = "boot_logo"; ++ reg = <0x44c80000 0x40000>; ++ size = <0x40000>; ++ }; ++ }; ++ chosen { ++ bootargs = "mem=78M rdinit=/linuxrc console=ttyS1,230400n8 loglevel=8 vmalloc=768M"; ++ }; ++ ++ wdt0: watchdog@49aa000 { ++ compatible = "snps,dw-wdt"; ++ reg = <0x49aa000 0x100>; ++ interrupts = <0 123 4>; ++ clocks = <&ap_clk AX620X_CLK_WDT>; ++ clock-names = "wdg-clk"; ++ }; ++ ++ dec: dec@4020000 { ++ compatible = "axera, video-decoder"; ++ reg = <0x4020000 0x10000>; ++ reg-names = "dec0"; ++ interrupts = <0 41 4>; ++ type = "chip"; ++ clocks = <&vpu_clk AX620X_CLK_VDEC>; ++ clock-names = "dec_clk"; ++ }; ++ ++ venc: venc@4010000 { ++ compatible = "axera,video-encoder"; ++ reg = <0x4010000 0x10000>; ++ reg-names = "avc_hevc"; ++ interrupts = <0 42 4>; ++ clocks = <&vpu_clk AX620X_CLK_VENC>; ++ clock-names = "venc_clk"; ++ }; ++ ++ jenc: jenc@4000000 { ++ compatible = "axera, jpeg-encoder"; ++ reg = <0x4000000 0x10000>; ++ reg-names = "jpeg_enc"; ++ interrupts = <0 40 4>; ++ clocks = <&vpu_clk AX620X_CLK_JENC>; ++ clock-names = "jpegenc_clk"; ++ }; ++ ++ tdp: tdp@4410000 { ++ compatible = "axera,tdp-dev"; ++ reg = <0x4410000 0x1000>, ++ <0x4420000 0x1000>; ++ clocks = <&mm_clk AX620X_CLK_TDP>; ++ clock-names = "clk_tdp"; ++ interrupts = <0 20 4>; ++ status = "okay"; ++ }; ++ ++ gdc: gdc@2620000 { ++ compatible = "axera,gdc-dev"; ++ reg = <0x2620000 0x1000>; ++ clocks = <&isp_clk AX620X_CLK_ISP_GDC>; ++ clock-names = "clk_gdc"; ++ interrupts = <0 21 4>; ++ status = "okay"; ++ }; ++ ++ eth0: ethernet@0x4970000{ ++ compatible = "axera,dwmac-4.10a"; ++ reg = <0x4970000 0x10000>; ++ ++ clocks = <&ap_clk AX620X_PCLK_EMAC>, <&ap_clk AX620X_ACLK_EMAC>, ++ <&ap_clk AX620X_CLK_EPHY_REF>, <&ap_clk AX620X_CLK_EMAC_RGMII_TX>, ++ <&ap_clk AX620X_CLK_EMAC_RMII_RX_PAD_DIV>, <&ap_clk AX620X_CLK_EMAC_RMII_TX>; ++ clock-names = "emac_pclk", "emac_aclk", "ephy_clk", "rgmii_tx_clk", "rmii_rx_clk", "rmii_tx_clk"; ++ ++ interrupt-parent = <&gic>; ++ interrupts = <0 101 4>, <0 102 4>, <0 100 4>; ++ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; ++ ++ phy-mode = "rgmii"; ++ phy-handle = <&phy0>; ++ phy-rst-gpio = <&port2a 28 0>; /* GPIO2_D4 */ ++ ++ rx-fifo-depth = <16384>; ++ tx-fifo-depth = <16384>; ++ snps,tso; ++ ++ mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "snps,dwmac-mdio"; ++ phy0: phy@1 { ++ device_tpye = "ethernet-phy"; ++ compatible = "ethernet-phy-id001c.c916"; ++ reg = <1>; ++ }; ++ }; ++ }; ++ ++ aliases { ++ ethernet0 = ð0; ++ }; ++ ++ usb@0x4800000 { ++ compatible = "cdns,usb3"; ++ ++ clocks = <&ap_clk AX620X_PCLK_USB>, <&ap_clk AX620X_ACLK_USB>, ++ <&ap_clk AX620X_CLK_USB_REF>, <&ap_clk AX620X_CLK_USB2PHY>, ++ <&ap_clk AX620X_CLK_STB_PREDFT>, <&ap_clk AX620X_CLK_OTG_FAST>, ++ <&ap_clk AX620X_CLK_LPM_PREDFT>; ++ clock-names = "usb_pclk", "usb_aclk", "usb_ref_clk", "usb2phy_clk", ++ "stb_predft_clk", "otg_fast_clk", "lpm_predft_clk"; ++ ++ interrupts = <0 106 4>, ++ <0 114 4>, ++ <0 105 4>; ++ interrupt-names = "host", "peripheral", "otg"; ++ ++ reg = <0x4800000 0x10000>, /* memory area for OTG registers */ ++ <0x4810000 0x10000>, /* memory area for HOST registers */ ++ <0x4820000 0x10000>; /* memory area for DEVICE registers */ ++ reg-names = "otg", "xhci", "dev"; ++ ++ maximum-speed = "high-speed"; ++ dr_mode = "otg"; /*host or peripheral*/ ++ /* id-gpio = <&port0a 31 0>; */ ++ }; ++ ++ rtc-top@10040000 { ++ compatible = "axera,axi-top-rtc"; ++ reg-num = <2>; ++ reg = <0x10040000 0x2000>, ++ <0x2210000 0x100>; ++ interrupts = <0 136 4>; ++ status = "okay"; ++ }; ++ ++ sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Axera Audio"; ++ simple-audio-card,widgets = ++ "Microphone", "Mic Jack", ++ "Headphone", "Headphone Jack"; ++ simple-audio-card,routing = ++ "Headphone Jack", "LOUT1", ++ "Headphone Jack", "ROUT1", ++ "LINPUT2", "Mic Jack", ++ "RINPUT2", "Mic Jack", ++ "Mic Jack", "Mic Bias"; ++ simple-audio-card,dai-link@0 { ++ format = "i2s"; ++ cpu { ++ sound-dai = <&i2s_mst>; ++ }; ++ codec { ++ sound-dai = <&es8388>; ++ system-clock-frequency = <12288000>; ++ }; ++ }; ++ }; ++ thermal-zones { ++ soc_thm: soc_thm { ++ polling-delay = <1000>; ++ polling-delay-passive = <100>; ++ sustainable-power = <4500>; ++ /* sensor ID */ ++ thermal-sensors = <&tsensor 0>; ++ trips { ++ threshold: trip-point@0 { ++ temperature = <80000>; ++ hysteresis = <0>; ++ type = "passive"; ++ }; ++ target: trip-point@1 { ++ temperature = <90000>; ++ hysteresis = <0>; ++ type = "passive"; ++ }; ++ soc_crit: soc-crit { ++ temperature = <120000>; ++ hysteresis = <0>; ++ type = "passive"; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++ ++&emmc{ ++ status = "okay"; ++}; ++ ++&sd1{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ no-sdio; ++ no-mmc; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "disable"; ++}; ++ ++&sd2{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ no-1-8-v; // hw not support 1.8V ++ no-sdio; ++ no-mmc; ++ //non-removable; ++ //broken-cd; //polling ++ cd-gpios = <&port2a 2 0>; ++ cd-inverted; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "okay"; ++}; ++ ++&i2s_mst { ++ status = "okay"; ++ reg = <0x49AC000 0x1000>, ++ <0x49BA000 0x400>; ++ glb-value = <0xf80>; ++}; ++ ++&i2c0 { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++}; ++ ++&i2c_hs0 { ++ status = "okay"; ++}; ++ ++&i2c_hs2 { ++ status = "okay"; ++ #address-cells = <0x1>; ++ #size-cells = <0x0>; ++ es8388: es8388@11 { ++ compatible = "everest,es8388"; ++ /* ++ DVDD-supply = <®_3p3v>; ++ AVDD-supply = <®_3p3v>; ++ PVDD-supply = <®_3p3v>; ++ HPVDD-supply = <®_3p3v>; ++ */ ++ clocks = <&ap_clk AX620X_CLK_I2S_REF2>; ++ reg = <0x11>; ++ #sound-dai-cells = <0>; ++ }; ++ ++ typec: sgm7220@47 { ++ compatible = "axera,sgm7220"; ++ reg = <0x47>; ++ /* int-gpio = <&port0a 31 0>; GPIO0_D7 */ ++ bind-usb = "4800000.usb"; ++ }; ++}; ++ ++ ++&dwgpio0 { ++ status = "okay"; ++}; ++ ++&dwgpio1 { ++ status = "okay"; ++}; ++ ++&dwgpio2 { ++ status = "okay"; ++}; ++ ++&spi4 { ++ status = "okay"; ++ spi_nand@0 { ++ compatible = "spi-nand"; ++ reg = <0>; ++ spi-max-frequency = <30000000>; ++ spi-tx-bus-width = <4>; ++ spi-rx-bus-width = <4>; ++ }; ++}; ++ ++&dsi { ++ status = "okay"; ++ enable-dsi = <0x1>; ++}; ++ ++&panel_dsi { ++ reset-gpio = <&expander_io 3 0>; ++ prepare-delay-ms = <0>; ++ unprepare-delay-ms = <0>; ++ enable-delay-ms = <0>; ++ disable-delay-ms = <0>; ++ reset-low-delay-ms = <20>; ++ reset-high-delay-ms = <100>; ++ dsi,format = ; ++ dsi,lanes = <2>; ++ dsi,flags = <(MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM)>; ++ panel-init-seq = [39 00 06 FF 77 01 00 00 13 ++ 15 00 02 EF 08 ++ 39 00 06 FF 77 01 00 00 10 ++ 39 00 03 C0 2C 00 ++ 39 00 03 C1 08 02 ++ 39 00 03 C2 37 05 ++ 15 00 02 C3 02 ++ 15 00 02 CC 10 ++ 39 00 11 B0 04 0E 17 0B 0F 06 08 08 08 24 04 11 0F 2C 33 13 ++ 39 00 11 B1 0C 16 1D 0E 11 06 08 08 08 24 05 13 11 2D 33 1F ++ 39 00 06 FF 77 01 00 00 11 ++ 15 00 02 B0 54 ++ 15 00 02 B1 76 ++ 15 00 02 B2 87 ++ 15 00 02 B3 80 ++ 15 00 02 B5 4B ++ 15 00 02 B7 85 ++ 15 00 02 B8 21 ++ 15 00 02 C1 78 ++ 15 00 02 C2 78 ++ 15 64 02 D0 88 ++ 39 00 04 E0 00 00 02 ++ 39 00 0C E1 02 00 04 00 01 00 03 00 00 33 33 ++ 39 00 0D E2 11 11 33 33 6E 00 70 00 6D 00 6F 00 ++ 39 00 05 E3 00 00 11 11 ++ 39 00 03 E4 44 44 ++ 39 00 11 E5 03 6F 00 FF 05 71 00 FF 07 73 00 FF 09 6D 00 FF ++ 39 00 05 E6 00 00 11 11 ++ 39 00 03 E7 44 44 ++ 39 00 11 E8 02 6E 00 FF 04 70 00 FF 06 72 00 FF 08 6C 00 FF ++ 39 00 08 EB 00 01 4E 4E EE 44 00 ++ 39 00 11 ED 4F 01 23 56 7F FF FF FF FF FF FF F7 65 32 10 F4 ++ 39 00 07 EF 10 0D 04 08 3F 1F ++ 39 00 06 FF 77 01 00 00 00 ++ 05 78 01 11 ++ 15 00 02 36 08 ++ 15 00 02 35 00 ++ 05 14 01 29]; ++ panel-exit-seq = [05 00 01 28]; ++ ++ display-timings { ++ ++ timing0 { ++ /* 480x360@60 */ ++ clock-frequency = <13500000>; ++ hactive = <480>; ++ vactive = <360>; ++ hfront-porch = <25>; ++ hsync-len = <25>; ++ hback-porch = <30>; ++ vfront-porch = <20>; ++ vsync-len = <10>; ++ vback-porch = <12>; ++ hsync-active = <0>; ++ vsync-active = <0>; ++ de-active = <0>; ++ }; ++ }; ++}; +diff --git a/arch/arm/boot/dts/AX620_38board.dts b/arch/arm/boot/dts/AX620_38board.dts +new file mode 100644 +index 000000000..0e210bf2f +--- /dev/null ++++ b/arch/arm/boot/dts/AX620_38board.dts +@@ -0,0 +1,311 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * dts file for Axera EVB Development Board ++ * ++ * Copyright (C) 2021, Axera Ltd. ++ * ++ */ ++ ++/dts-v1/; ++#include "axera_ax620x.dtsi" ++/ { ++ memory@40000000 { ++ device_type = "memory"; ++ reg = <0x40000000 0x7ff00000>; ++ }; ++ reserved-memory { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ ++ linux,cma { ++ compatible = "shared-dma-pool"; ++ reusable; ++ size = <0x10000000>; ++ linux,cma-default; ++ }; ++ ramoops_mem@44000000{ ++ compatible = "ramoops"; ++ reg = <0x44000000 0xf0000>; ++ record-size = <0x40000>; ++ console-size = <0x80000>; ++ ftrace-size = <0x20000>; ++ }; ++ ++ ax_memory_dump@44100000 { ++ compatible = "ax_memory_dump"; ++ reg = <0x44100000 0x100000>; ++ size = <0x100000>; ++ }; ++ }; ++ chosen { ++ bootargs = "mem=1024M rdinit=/linuxrc console=ttyS1,230400n8 loglevel=8 vmalloc=768M"; ++ }; ++ ++ wdt0: watchdog@49aa000 { ++ compatible = "snps,dw-wdt"; ++ reg = <0x49aa000 0x100>; ++ interrupts = <0 123 4>; ++ clocks = <&ap_clk AX620X_CLK_WDT>; ++ clock-names = "wdg-clk"; ++ }; ++ ++ dec: dec@4020000 { ++ compatible = "axera, video-decoder"; ++ reg = <0x4020000 0x10000>; ++ reg-names = "dec0"; ++ interrupts = <0 41 4>; ++ type = "chip"; ++ clocks = <&vpu_clk AX620X_CLK_VDEC>; ++ clock-names = "dec_clk"; ++ }; ++ ++ venc: venc@4010000 { ++ compatible = "axera,video-encoder"; ++ reg = <0x4010000 0x10000>; ++ reg-names = "avc_hevc"; ++ interrupts = <0 42 4>; ++ clocks = <&vpu_clk AX620X_CLK_VENC>; ++ clock-names = "venc_clk"; ++ }; ++ ++ jenc: jenc@4000000 { ++ compatible = "axera, jpeg-encoder"; ++ reg = <0x4000000 0x10000>; ++ reg-names = "jpeg_enc"; ++ interrupts = <0 40 4>; ++ clocks = <&vpu_clk AX620X_CLK_JENC>; ++ clock-names = "jpegenc_clk"; ++ }; ++ ++ tdp: tdp@4410000 { ++ compatible = "axera,tdp-dev"; ++ reg = <0x4410000 0x1000>, ++ <0x4420000 0x1000>; ++ clocks = <&mm_clk AX620X_CLK_TDP>; ++ clock-names = "clk_tdp"; ++ interrupts = <0 20 4>; ++ status = "okay"; ++ }; ++ ++ eth0: ethernet@0x4970000{ ++ compatible = "axera,dwmac-4.10a"; ++ reg = <0x4970000 0x10000>; ++ ++ clocks = <&ap_clk AX620X_PCLK_EMAC>, <&ap_clk AX620X_ACLK_EMAC>, ++ <&ap_clk AX620X_CLK_EPHY_REF>, <&ap_clk AX620X_CLK_EMAC_RGMII_TX>, ++ <&ap_clk AX620X_CLK_EMAC_RMII_RX_PAD_DIV>, <&ap_clk AX620X_CLK_EMAC_RMII_TX>; ++ clock-names = "emac_pclk", "emac_aclk", "ephy_clk", "rgmii_tx_clk", "rmii_rx_clk", "rmii_tx_clk"; ++ ++ interrupt-parent = <&gic>; ++ interrupts = <0 101 4>, <0 102 4>, <0 100 4>; ++ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; ++ ++ phy-mode = "rmii"; ++ phy-handle = <&phy0>; ++ phy-rst-gpio = <&port2a 28 0>; /* GPIO2_D4 */ ++ ++ rx-fifo-depth = <16384>; ++ tx-fifo-depth = <16384>; ++ snps,tso; ++ ++ mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "snps,dwmac-mdio"; ++ phy0: phy@2 { ++ device_tpye = "ethernet-phy"; ++ compatible = "ethernet-phy-id001c.c816"; ++ reg = <2>; ++ }; ++ }; ++ }; ++ ++ aliases { ++ ethernrt0 = ð0; ++ }; ++ ++ usb@0x4800000 { ++ compatible = "cdns,usb3"; ++ ++ clocks = <&ap_clk AX620X_PCLK_USB>, <&ap_clk AX620X_ACLK_USB>, ++ <&ap_clk AX620X_CLK_USB_REF>, <&ap_clk AX620X_CLK_USB2PHY>, ++ <&ap_clk AX620X_CLK_STB_PREDFT>, <&ap_clk AX620X_CLK_OTG_FAST>, ++ <&ap_clk AX620X_CLK_LPM_PREDFT>; ++ clock-names = "usb_pclk", "usb_aclk", "usb_ref_clk", "usb2phy_clk", ++ "stb_predft_clk", "otg_fast_clk", "lpm_predft_clk"; ++ ++ interrupts = <0 106 4>, ++ <0 114 4>, ++ <0 105 4>; ++ interrupt-names = "host", "peripheral", "otg"; ++ ++ reg = <0x4800000 0x10000>, /* memory area for OTG registers */ ++ <0x4810000 0x10000>, /* memory area for HOST registers */ ++ <0x4820000 0x10000>; /* memory area for DEVICE registers */ ++ reg-names = "otg", "xhci", "dev"; ++ ++ maximum-speed = "high-speed"; ++ dr_mode = "peripheral"; /* host or peripheral */ ++ /* id-gpio = <&port0a 31 0>; */ /* GPIO0_D7 */ ++ }; ++ ++ rtc-top@10040000 { ++ compatible = "axera,axi-top-rtc"; ++ reg-num = <2>; ++ reg = <0x10040000 0x2000>, ++ <0x2210000 0x100>; ++ interrupts = <0 136 4>; ++ status = "okay"; ++ }; ++ ++ sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Axera Audio"; ++ /* ++ simple-audio-card,widgets = ++ "Microphone", "Mic Jack", ++ "Headphone", "Headphone Jack"; ++ simple-audio-card,routing = ++ "Headphone Jack", "LOUT2", ++ "Headphone Jack", "ROUT2", ++ "LINPUT2", "Mic Jack", ++ "LINPUT1", "Mic Jack", ++ "RINPUT1", "Mic Jack"; ++ */ ++ simple-audio-card,dai-link@0 { ++ format = "i2s"; ++ cpu { ++ sound-dai = <&i2s_mst>; ++ }; ++ codec { ++ sound-dai = <&es7210>; ++ system-clock-frequency = <12288000>; ++ }; ++ }; ++ }; ++}; ++ ++ ++ ++&emmc{ ++ status = "okay"; ++}; ++ ++&sd1{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ no-sdio; ++ no-mmc; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "disable"; ++}; ++ ++&sd2{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ no-1-8-v; // hw not support 1.8V ++ no-sdio; ++ no-mmc; ++ //non-removable; ++ //broken-cd; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "okay"; ++}; ++ ++&i2s_mst { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ #address-cells = <0x1>; ++ #size-cells = <0x0>; ++ es7210: es7210@41 { ++ compatible = "MicArray_0"; ++ /* ++ DVDD-supply = <®_3p3v>; ++ AVDD-supply = <®_3p3v>; ++ PVDD-supply = <®_3p3v>; ++ HPVDD-supply = <®_3p3v>; ++ */ ++ reg = <0x41>; ++ #sound-dai-cells = <0>; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++}; ++ ++ ++&dwgpio0 { ++ status = "okay"; ++}; ++ ++&dwgpio1 { ++ status = "okay"; ++}; ++ ++&dwgpio2 { ++ status = "okay"; ++}; ++ ++&spi4 { ++ status = "okay"; ++ spi_nand@0 { ++ compatible = "spi-nand"; ++ reg = <0>; ++ spi-max-frequency = <30000000>; ++ spi-tx-bus-width = <4>; ++ spi-rx-bus-width = <4>; ++ }; ++}; ++ ++&dsi { ++ status = "okay"; ++ enable-dsi = <0x1>; ++}; ++ ++&panel_dsi { ++ reset-gpio = <&expander_io 3 0>; ++ reset-low-delay-ms = <20>; ++ reset-high-delay-ms = <100>; ++ dsi,format = ; ++ dsi,lanes = <4>; ++ dsi,flags = <(MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM)>; ++ panel-init-seq = [05 00 01 00]; ++ panel-exit-seq = [05 00 01 00]; ++ ++ display-timings { ++ ++ timing0 { ++ /* 1920x1080@60 */ ++ clock-frequency = <148500000>; ++ hactive = <1920>; ++ vactive = <1080>; ++ hfront-porch = <88>; ++ hsync-len = <44>; ++ hback-porch = <148>; ++ vfront-porch = <4>; ++ vsync-len = <5>; ++ vback-porch = <36>; ++ hsync-active = <0>; ++ vsync-active = <0>; ++ de-active = <0>; ++ }; ++ }; ++}; +\ No newline at end of file +diff --git a/arch/arm/boot/dts/AX620_dashcam.dts b/arch/arm/boot/dts/AX620_dashcam.dts +new file mode 100644 +index 000000000..172e90c25 +--- /dev/null ++++ b/arch/arm/boot/dts/AX620_dashcam.dts +@@ -0,0 +1,362 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * dts file for Axera Demo Development Board ++ * ++ * Copyright (C) 2021, Axera Ltd. ++ * ++ */ ++ ++/dts-v1/; ++#include "axera_ax620x.dtsi" ++/ { ++ memory@40000000 { ++ device_type = "memory"; ++ reg = <0x40000000 0x7ff00000>; ++ }; ++ reserved-memory { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ ++ linux,cma { ++ compatible = "shared-dma-pool"; ++ reusable; ++ size = <0x10000000>; ++ linux,cma-default; ++ }; ++ ramoops_mem@44000000{ ++ compatible = "ramoops"; ++ reg = <0x44000000 0xf0000>; ++ record-size = <0x40000>; ++ console-size = <0x80000>; ++ ftrace-size = <0x20000>; ++ }; ++ ++ ax_memory_dump@44100000 { ++ compatible = "ax_memory_dump"; ++ reg = <0x44100000 0x100000>; ++ size = <0x100000>; ++ }; ++ }; ++ ++ chosen { ++ bootargs = "mem=1024M rdinit=/linuxrc console=ttyS1,230400n8 loglevel=8 vmalloc=768M"; ++ }; ++ ++ wdt0: watchdog@49aa000 { ++ compatible = "snps,dw-wdt"; ++ reg = <0x49aa000 0x100>; ++ interrupts = <0 123 4>; ++ clocks = <&ap_clk AX620X_CLK_WDT>; ++ clock-names = "wdg-clk"; ++ }; ++ ++ dec: dec@4020000 { ++ compatible = "axera, video-decoder"; ++ reg = <0x4020000 0x10000>; ++ reg-names = "dec0"; ++ interrupts = <0 41 4>; ++ type = "chip"; ++ clocks = <&vpu_clk AX620X_CLK_VDEC>; ++ clock-names = "dec_clk"; ++ }; ++ ++ venc: venc@4010000 { ++ compatible = "axera,video-encoder"; ++ reg = <0x4010000 0x10000>; ++ reg-names = "avc_hevc"; ++ interrupts = <0 42 4>; ++ clocks = <&vpu_clk AX620X_CLK_VENC>; ++ clock-names = "venc_clk"; ++ }; ++ ++ jenc: jenc@4000000 { ++ compatible = "axera, jpeg-encoder"; ++ reg = <0x4000000 0x10000>; ++ reg-names = "jpeg_enc"; ++ interrupts = <0 40 4>; ++ clocks = <&vpu_clk AX620X_CLK_JENC>; ++ clock-names = "jpegenc_clk"; ++ }; ++ ++ tdp: tdp@4410000 { ++ compatible = "axera,tdp-dev"; ++ reg = <0x4410000 0x1000>, ++ <0x4420000 0x1000>; ++ clocks = <&mm_clk AX620X_CLK_TDP>; ++ clock-names = "clk_tdp"; ++ interrupts = <0 20 4>; ++ status = "okay"; ++ }; ++ ++ gdc: gdc@2620000 { ++ compatible = "axera,gdc-dev"; ++ reg = <0x2620000 0x1000>; ++ clocks = <&isp_clk AX620X_CLK_ISP_GDC>; ++ clock-names = "clk_gdc"; ++ interrupts = <0 21 4>; ++ status = "okay"; ++ }; ++ ++ eth0: ethernet@0x4970000{ ++ compatible = "axera,dwmac-4.10a"; ++ reg = <0x4970000 0x10000>; ++ ++ clocks = <&ap_clk AX620X_PCLK_EMAC>, <&ap_clk AX620X_ACLK_EMAC>, ++ <&ap_clk AX620X_CLK_EPHY_REF>, <&ap_clk AX620X_CLK_EMAC_RGMII_TX>, ++ <&ap_clk AX620X_CLK_EMAC_RMII_RX_PAD_DIV>, <&ap_clk AX620X_CLK_EMAC_RMII_TX>; ++ clock-names = "emac_pclk", "emac_aclk", "ephy_clk", "rgmii_tx_clk", "rmii_rx_clk", "rmii_tx_clk"; ++ ++ interrupt-parent = <&gic>; ++ interrupts = <0 101 4>, <0 102 4>, <0 100 4>; ++ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; ++ ++ phy-mode = "rgmii"; ++ phy-handle = <&phy0>; ++ phy-rst-gpio = <&port2a 28 0>; /* GPIO2_D4 */ ++ ++ rx-fifo-depth = <16384>; ++ tx-fifo-depth = <16384>; ++ snps,tso; ++ ++ mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "snps,dwmac-mdio"; ++ phy0: phy@1 { ++ device_tpye = "ethernet-phy"; ++ compatible = "ethernet-phy-id001c.c916"; ++ reg = <1>; ++ }; ++ }; ++ }; ++ ++ aliases { ++ ethernet0 = ð0; ++ }; ++ ++ usb@0x4800000 { ++ compatible = "cdns,usb3"; ++ ++ clocks = <&ap_clk AX620X_PCLK_USB>, <&ap_clk AX620X_ACLK_USB>, ++ <&ap_clk AX620X_CLK_USB_REF>, <&ap_clk AX620X_CLK_USB2PHY>, ++ <&ap_clk AX620X_CLK_STB_PREDFT>, <&ap_clk AX620X_CLK_OTG_FAST>, ++ <&ap_clk AX620X_CLK_LPM_PREDFT>; ++ clock-names = "usb_pclk", "usb_aclk", "usb_ref_clk", "usb2phy_clk", ++ "stb_predft_clk", "otg_fast_clk", "lpm_predft_clk"; ++ ++ interrupts = <0 106 4>, ++ <0 114 4>, ++ <0 105 4>; ++ interrupt-names = "host", "peripheral", "otg"; ++ ++ reg = <0x4800000 0x10000>, /* memory area for OTG registers */ ++ <0x4810000 0x10000>, /* memory area for HOST registers */ ++ <0x4820000 0x10000>; /* memory area for DEVICE registers */ ++ reg-names = "otg", "xhci", "dev"; ++ ++ maximum-speed = "high-speed"; ++ dr_mode = "otg"; /*host or peripheral*/ ++ /* id-gpio = <&port0a 31 0>; */ ++ }; ++ ++ rtc-top@10040000 { ++ compatible = "axera,axi-top-rtc"; ++ reg-num = <2>; ++ reg = <0x10040000 0x2000>, ++ <0x2210000 0x100>; ++ interrupts = <0 136 4>; ++ status = "disable"; ++ }; ++ ++ sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Axera Audio"; ++ simple-audio-card,widgets = ++ "Microphone", "Mic Jack", ++ "Headphone", "Headphone Jack"; ++ simple-audio-card,routing = ++ "Headphone Jack", "LOUT2", ++ "Headphone Jack", "ROUT2", ++ "LINPUT2", "Mic Jack", ++ "LINPUT1", "Mic Jack", ++ "RINPUT1", "Mic Jack"; ++ simple-audio-card,dai-link@0 { ++ format = "i2s"; ++ cpu { ++ sound-dai = <&i2s_mst>; ++ }; ++ codec { ++ sound-dai = <&es8388>; ++ system-clock-frequency = <12288000>; ++ }; ++ }; ++ }; ++}; ++ ++ ++&emmc{ ++ max-frequency = <200000000>; ++ /*resets = <&sysclk>;*/ ++ sdhci-caps-mask = <0x2 0x03200000>; ++ bus-width = <8>; ++ no-sdio; ++ no-sd; ++ non-removable; ++ disable-wp; ++ cap-mmc-highspeed; ++ mmc-hs200-1_8v; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ cdns,phy-input-delay-sd-highspeed = <2>; ++ cdns,phy-input-delay-legacy = <3>; ++ cdns,phy-input-delay-sd-uhs-sdr12 = <0>; ++ cdns,phy-input-delay-sd-uhs-sdr25 = <4>; ++ cdns,phy-input-delay-sd-uhs-sdr50 = <3>; ++ cdns,phy-input-delay-sd-uhs-ddr50 = <3>; ++ cdns,phy-input-delay-mmc-legacy = <8>; ++ cdns,phy-input-delay-mmc-highspeed = <4>; ++ cdns,phy-input-delay-mmc-ddr = <3>; ++ cdns,phy-dll-delay-sdclk = <45>; ++ cdns,phy-dll-delay-sdclk-hsmmc = <23>; ++ cdns,phy-dll-delay-strobe = <18>; ++ fixed-emmc-driver-type = <4>; ++ clocks = <&flash_clk AX620X_CLK_EMMC_CARD>; ++ clock-names = "cardclk"; ++ status = "okay"; ++}; ++ ++&sd1{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ no-sdio; ++ no-mmc; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "disable"; ++}; ++ ++&sd2{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ no-sdio; ++ no-mmc; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "okay"; ++}; ++ ++&i2s_mst { ++ status = "okay"; ++ reg = <0x49AC000 0x1000>, ++ <0x49BA000 0x400>; ++ glb-value = <0xf80>; ++}; ++ ++&i2c0 { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++}; ++ ++&i2c_hs0 { ++ status = "okay"; ++}; ++ ++&i2c_hs2 { ++ status = "okay"; ++ #address-cells = <0x1>; ++ #size-cells = <0x0>; ++ es8388: es8388@11 { ++ compatible = "everest,es8388"; ++ /* ++ DVDD-supply = <®_3p3v>; ++ AVDD-supply = <®_3p3v>; ++ PVDD-supply = <®_3p3v>; ++ HPVDD-supply = <®_3p3v>; ++ */ ++ clocks = <&ap_clk AX620X_CLK_I2S_REF2>; ++ reg = <0x11>; ++ #sound-dai-cells = <0>; ++ }; ++ ++ typec: sgm7220@47 { ++ compatible = "axera,sgm7220"; ++ reg = <0x47>; ++ int-gpio = <&port0a 31 0>; /* GPIO0_D7 */ ++ bind-usb = "4800000.usb"; ++ }; ++}; ++ ++ ++&dwgpio0 { ++ status = "okay"; ++}; ++ ++&dwgpio1 { ++ status = "okay"; ++}; ++ ++&dwgpio2 { ++ status = "okay"; ++}; ++ ++&pwm0 { ++ pin_sleep_setting = <0x049BC0FC 0x00060014>; ++}; ++ ++&crtc { ++ vfb_configs = "1920x1080-32-2"; ++}; ++ ++&dsi { ++ status = "okay"; ++ enable-dsi = <0x1>; ++}; ++ ++&panel_dsi { ++ reset-gpio = <&expander_io 3 0>; ++ reset-low-delay-ms = <20>; ++ reset-high-delay-ms = <100>; ++ dsi,format = ; ++ dsi,lanes = <4>; ++ dsi,flags = <(MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM)>; ++ panel-init-seq = [05 00 01 00]; ++ panel-exit-seq = [05 00 01 00]; ++ ++ display-timings { ++ ++ timing0 { ++ /* 1920x1080@60 */ ++ clock-frequency = <148500000>; ++ hactive = <1920>; ++ vactive = <1080>; ++ hfront-porch = <88>; ++ hsync-len = <44>; ++ hback-porch = <148>; ++ vfront-porch = <4>; ++ vsync-len = <5>; ++ vback-porch = <36>; ++ hsync-active = <0>; ++ vsync-active = <0>; ++ de-active = <0>; ++ }; ++ }; ++}; +diff --git a/arch/arm/boot/dts/AX620_demo.dts b/arch/arm/boot/dts/AX620_demo.dts +new file mode 100644 +index 000000000..5d9c27fec +--- /dev/null ++++ b/arch/arm/boot/dts/AX620_demo.dts +@@ -0,0 +1,362 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * dts file for Axera Demo Development Board ++ * ++ * Copyright (C) 2021, Axera Ltd. ++ * ++ */ ++ ++/dts-v1/; ++#include "axera_ax620x.dtsi" ++/ { ++ memory@40000000 { ++ device_type = "memory"; ++ reg = <0x40000000 0x7ff00000>; ++ }; ++ reserved-memory { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ ++ linux,cma { ++ compatible = "shared-dma-pool"; ++ reusable; ++ size = <0x10000000>; ++ linux,cma-default; ++ }; ++ ramoops_mem@44000000{ ++ compatible = "ramoops"; ++ reg = <0x44000000 0xf0000>; ++ record-size = <0x40000>; ++ console-size = <0x80000>; ++ ftrace-size = <0x20000>; ++ }; ++ ++ ax_memory_dump@44100000 { ++ compatible = "ax_memory_dump"; ++ reg = <0x44100000 0x100000>; ++ size = <0x100000>; ++ }; ++ }; ++ ++ chosen { ++ bootargs = "mem=1024M rdinit=/linuxrc console=ttyS1,230400n8 loglevel=8 vmalloc=768M"; ++ }; ++ ++ wdt0: watchdog@49aa000 { ++ compatible = "snps,dw-wdt"; ++ reg = <0x49aa000 0x100>; ++ interrupts = <0 123 4>; ++ clocks = <&ap_clk AX620X_CLK_WDT>; ++ clock-names = "wdg-clk"; ++ }; ++ ++ dec: dec@4020000 { ++ compatible = "axera, video-decoder"; ++ reg = <0x4020000 0x10000>; ++ reg-names = "dec0"; ++ interrupts = <0 41 4>; ++ type = "chip"; ++ clocks = <&vpu_clk AX620X_CLK_VDEC>; ++ clock-names = "dec_clk"; ++ }; ++ ++ venc: venc@4010000 { ++ compatible = "axera,video-encoder"; ++ reg = <0x4010000 0x10000>; ++ reg-names = "avc_hevc"; ++ interrupts = <0 42 4>; ++ clocks = <&vpu_clk AX620X_CLK_VENC>; ++ clock-names = "venc_clk"; ++ }; ++ ++ jenc: jenc@4000000 { ++ compatible = "axera, jpeg-encoder"; ++ reg = <0x4000000 0x10000>; ++ reg-names = "jpeg_enc"; ++ interrupts = <0 40 4>; ++ clocks = <&vpu_clk AX620X_CLK_JENC>; ++ clock-names = "jpegenc_clk"; ++ }; ++ ++ tdp: tdp@4410000 { ++ compatible = "axera,tdp-dev"; ++ reg = <0x4410000 0x1000>, ++ <0x4420000 0x1000>; ++ clocks = <&mm_clk AX620X_CLK_TDP>; ++ clock-names = "clk_tdp"; ++ interrupts = <0 20 4>; ++ status = "okay"; ++ }; ++ ++ gdc: gdc@2620000 { ++ compatible = "axera,gdc-dev"; ++ reg = <0x2620000 0x1000>; ++ clocks = <&isp_clk AX620X_CLK_ISP_GDC>; ++ clock-names = "clk_gdc"; ++ interrupts = <0 21 4>; ++ status = "okay"; ++ }; ++ ++ eth0: ethernet@0x4970000{ ++ compatible = "axera,dwmac-4.10a"; ++ reg = <0x4970000 0x10000>; ++ ++ clocks = <&ap_clk AX620X_PCLK_EMAC>, <&ap_clk AX620X_ACLK_EMAC>, ++ <&ap_clk AX620X_CLK_EPHY_REF>, <&ap_clk AX620X_CLK_EMAC_RGMII_TX>, ++ <&ap_clk AX620X_CLK_EMAC_RMII_RX_PAD_DIV>, <&ap_clk AX620X_CLK_EMAC_RMII_TX>; ++ clock-names = "emac_pclk", "emac_aclk", "ephy_clk", "rgmii_tx_clk", "rmii_rx_clk", "rmii_tx_clk"; ++ ++ interrupt-parent = <&gic>; ++ interrupts = <0 101 4>, <0 102 4>, <0 100 4>; ++ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; ++ ++ phy-mode = "rgmii"; ++ phy-handle = <&phy0>; ++ phy-rst-gpio = <&port2a 28 0>; /* GPIO2_D4 */ ++ ++ rx-fifo-depth = <16384>; ++ tx-fifo-depth = <16384>; ++ snps,tso; ++ ++ mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "snps,dwmac-mdio"; ++ phy0: phy@1 { ++ device_tpye = "ethernet-phy"; ++ compatible = "ethernet-phy-id001c.c916"; ++ reg = <1>; ++ }; ++ }; ++ }; ++ ++ aliases { ++ ethernet0 = ð0; ++ }; ++ ++ usb@0x4800000 { ++ compatible = "cdns,usb3"; ++ ++ clocks = <&ap_clk AX620X_PCLK_USB>, <&ap_clk AX620X_ACLK_USB>, ++ <&ap_clk AX620X_CLK_USB_REF>, <&ap_clk AX620X_CLK_USB2PHY>, ++ <&ap_clk AX620X_CLK_STB_PREDFT>, <&ap_clk AX620X_CLK_OTG_FAST>, ++ <&ap_clk AX620X_CLK_LPM_PREDFT>; ++ clock-names = "usb_pclk", "usb_aclk", "usb_ref_clk", "usb2phy_clk", ++ "stb_predft_clk", "otg_fast_clk", "lpm_predft_clk"; ++ ++ interrupts = <0 106 4>, ++ <0 114 4>, ++ <0 105 4>; ++ interrupt-names = "host", "peripheral", "otg"; ++ ++ reg = <0x4800000 0x10000>, /* memory area for OTG registers */ ++ <0x4810000 0x10000>, /* memory area for HOST registers */ ++ <0x4820000 0x10000>; /* memory area for DEVICE registers */ ++ reg-names = "otg", "xhci", "dev"; ++ ++ maximum-speed = "high-speed"; ++ dr_mode = "otg"; /*host or peripheral*/ ++ /* id-gpio = <&port0a 31 0>; */ ++ }; ++ ++ rtc-top@10040000 { ++ compatible = "axera,axi-top-rtc"; ++ reg-num = <2>; ++ reg = <0x10040000 0x2000>, ++ <0x2210000 0x100>; ++ interrupts = <0 136 4>; ++ status = "okay"; ++ }; ++ ++ sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Axera Audio"; ++ simple-audio-card,widgets = ++ "Microphone", "Mic Jack", ++ "Headphone", "Headphone Jack"; ++ simple-audio-card,routing = ++ "Headphone Jack", "LOUT1", ++ "Headphone Jack", "ROUT1", ++ "LINPUT2", "Mic Jack", ++ "RINPUT2", "Mic Jack", ++ "Mic Jack", "Mic Bias"; ++ simple-audio-card,dai-link@0 { ++ format = "i2s"; ++ cpu { ++ sound-dai = <&i2s_mst>; ++ }; ++ codec { ++ sound-dai = <&es8388>; ++ system-clock-frequency = <12288000>; ++ }; ++ }; ++ }; ++}; ++ ++ ++&emmc{ ++ max-frequency = <200000000>; ++ /*resets = <&sysclk>;*/ ++ sdhci-caps-mask = <0x2 0x03200000>; ++ bus-width = <8>; ++ no-sdio; ++ no-sd; ++ non-removable; ++ disable-wp; ++ cap-mmc-highspeed; ++ mmc-hs200-1_8v; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ cdns,phy-input-delay-sd-highspeed = <2>; ++ cdns,phy-input-delay-legacy = <3>; ++ cdns,phy-input-delay-sd-uhs-sdr12 = <0>; ++ cdns,phy-input-delay-sd-uhs-sdr25 = <4>; ++ cdns,phy-input-delay-sd-uhs-sdr50 = <3>; ++ cdns,phy-input-delay-sd-uhs-ddr50 = <3>; ++ cdns,phy-input-delay-mmc-legacy = <8>; ++ cdns,phy-input-delay-mmc-highspeed = <4>; ++ cdns,phy-input-delay-mmc-ddr = <3>; ++ cdns,phy-dll-delay-sdclk = <45>; ++ cdns,phy-dll-delay-sdclk-hsmmc = <23>; ++ cdns,phy-dll-delay-strobe = <18>; ++ fixed-emmc-driver-type = <4>; ++ clocks = <&flash_clk AX620X_CLK_EMMC_CARD>; ++ clock-names = "cardclk"; ++ status = "okay"; ++}; ++ ++&sd1{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ no-sdio; ++ no-mmc; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "disable"; ++}; ++ ++&sd2{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ no-sdio; ++ no-mmc; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "okay"; ++}; ++ ++&i2s_mst { ++ status = "okay"; ++ reg = <0x49AC000 0x1000>, ++ <0x49BA000 0x400>; ++ glb-value = <0xf80>; ++}; ++ ++&i2c0 { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++}; ++ ++&i2c_hs0 { ++ status = "okay"; ++}; ++ ++&i2c_hs2 { ++ status = "okay"; ++ #address-cells = <0x1>; ++ #size-cells = <0x0>; ++ es8388: es8388@11 { ++ compatible = "everest,es8388"; ++ /* ++ DVDD-supply = <®_3p3v>; ++ AVDD-supply = <®_3p3v>; ++ PVDD-supply = <®_3p3v>; ++ HPVDD-supply = <®_3p3v>; ++ */ ++ clocks = <&ap_clk AX620X_CLK_I2S_REF2>; ++ reg = <0x11>; ++ #sound-dai-cells = <0>; ++ }; ++ ++ typec: sgm7220@47 { ++ compatible = "axera,sgm7220"; ++ reg = <0x47>; ++ int-gpio = <&port0a 31 0>; /* GPIO0_D7 */ ++ bind-usb = "4800000.usb"; ++ }; ++}; ++ ++ ++&dwgpio0 { ++ status = "okay"; ++}; ++ ++&dwgpio1 { ++ status = "okay"; ++}; ++ ++&dwgpio2 { ++ status = "okay"; ++}; ++ ++&pwm0 { ++ pin_sleep_setting = <0x049BC0FC 0x00060014>; ++}; ++ ++&crtc { ++ vfb_configs = "1920x1080-32-2"; ++}; ++ ++&dsi { ++ status = "okay"; ++ enable-dsi = <0x1>; ++}; ++ ++&panel_dsi { ++ reset-gpio = <&expander_io 3 0>; ++ reset-low-delay-ms = <20>; ++ reset-high-delay-ms = <100>; ++ dsi,format = ; ++ dsi,lanes = <4>; ++ dsi,flags = <(MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM)>; ++ panel-init-seq = [05 00 01 00]; ++ panel-exit-seq = [05 00 01 00]; ++ ++ display-timings { ++ ++ timing0 { ++ /* 1920x1080@60 */ ++ clock-frequency = <148500000>; ++ hactive = <1920>; ++ vactive = <1080>; ++ hfront-porch = <88>; ++ hsync-len = <44>; ++ hback-porch = <148>; ++ vfront-porch = <4>; ++ vsync-len = <5>; ++ vback-porch = <36>; ++ hsync-active = <0>; ++ vsync-active = <0>; ++ de-active = <0>; ++ }; ++ }; ++}; +diff --git a/arch/arm/boot/dts/AX620_master.dts b/arch/arm/boot/dts/AX620_master.dts +new file mode 100644 +index 000000000..9a5622c07 +--- /dev/null ++++ b/arch/arm/boot/dts/AX620_master.dts +@@ -0,0 +1,375 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * dts file for Axera Demo Development Board ++ * ++ * Copyright (C) 2021, Axera Ltd. ++ * ++ */ ++ ++/dts-v1/; ++#include "axera_ax620x.dtsi" ++/ { ++ memory@40000000 { ++ device_type = "memory"; ++ reg = <0x40000000 0x7ff00000>; ++ }; ++ reserved-memory { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ ++ linux,cma { ++ compatible = "shared-dma-pool"; ++ reusable; ++ size = <0x10000000>; ++ linux,cma-default; ++ }; ++ ++ ramoops_mem@44000000{ ++ compatible = "ramoops"; ++ reg = <0x44000000 0xf0000>; ++ record-size = <0x40000>; ++ console-size = <0x80000>; ++ ftrace-size = <0x20000>; ++ }; ++ ++ ax_memory_dump@4cffe000 { ++ compatible = "ax_memory_dump"; ++ reg = <0x4cffe000 0x1000>; ++ size = <0x1000>; ++ }; ++ }; ++ ++ chosen { ++ bootargs = "mem=1024M rdinit=/linuxrc console=ttyS1,230400n8 loglevel=8 vmalloc=768M"; ++ }; ++ ++ wdt0: watchdog@49aa000 { ++ compatible = "snps,dw-wdt"; ++ reg = <0x49aa000 0x100>; ++ interrupts = <0 123 4>; ++ clocks = <&ap_clk AX620X_CLK_WDT>; ++ clock-names = "wdg-clk"; ++ }; ++ ++ dec: dec@4020000 { ++ compatible = "axera, video-decoder"; ++ reg = <0x4020000 0x10000>; ++ reg-names = "dec0"; ++ interrupts = <0 41 4>; ++ type = "chip"; ++ clocks = <&vpu_clk AX620X_CLK_VDEC>; ++ clock-names = "dec_clk"; ++ }; ++ ++ venc: venc@4010000 { ++ compatible = "axera,video-encoder"; ++ reg = <0x4010000 0x10000>; ++ reg-names = "avc_hevc"; ++ interrupts = <0 42 4>; ++ clocks = <&vpu_clk AX620X_CLK_VENC>; ++ clock-names = "venc_clk"; ++ }; ++ ++ jenc: jenc@4000000 { ++ compatible = "axera, jpeg-encoder"; ++ reg = <0x4000000 0x10000>; ++ reg-names = "jpeg_enc"; ++ interrupts = <0 40 4>; ++ clocks = <&vpu_clk AX620X_CLK_JENC>; ++ clock-names = "jpegenc_clk"; ++ }; ++ ++ tdp: tdp@4410000 { ++ compatible = "axera,tdp-dev"; ++ reg = <0x4410000 0x1000>, ++ <0x4420000 0x1000>; ++ clocks = <&mm_clk AX620X_CLK_TDP>; ++ clock-names = "clk_tdp"; ++ interrupts = <0 20 4>; ++ status = "okay"; ++ }; ++ ++ gdc: gdc@2620000 { ++ compatible = "axera,gdc-dev"; ++ reg = <0x2620000 0x1000>; ++ clocks = <&isp_clk AX620X_CLK_ISP_GDC>; ++ clock-names = "clk_gdc"; ++ interrupts = <0 21 4>; ++ status = "okay"; ++ }; ++ ++ eth0: ethernet@0x4970000{ ++ compatible = "axera,dwmac-4.10a"; ++ reg = <0x4970000 0x10000>; ++ ++ clocks = <&ap_clk AX620X_PCLK_EMAC>, <&ap_clk AX620X_ACLK_EMAC>, ++ <&ap_clk AX620X_CLK_EPHY_REF>, <&ap_clk AX620X_CLK_EMAC_RGMII_TX>, ++ <&ap_clk AX620X_CLK_EMAC_RMII_RX_PAD_DIV>, <&ap_clk AX620X_CLK_EMAC_RMII_TX>; ++ clock-names = "emac_pclk", "emac_aclk", "ephy_clk", "rgmii_tx_clk", "rmii_rx_clk", "rmii_tx_clk"; ++ ++ interrupt-parent = <&gic>; ++ interrupts = <0 101 4>, <0 102 4>, <0 100 4>; ++ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; ++ ++ phy-mode = "rgmii"; ++ phy-handle = <&phy0>; ++ phy-rst-gpio = <&port2a 28 0>; /* GPIO2_D4 */ ++ ++ rx-fifo-depth = <16384>; ++ tx-fifo-depth = <16384>; ++ snps,tso; ++ ++ mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "snps,dwmac-mdio"; ++ phy0: phy@1 { ++ device_tpye = "ethernet-phy"; ++ compatible = "ethernet-phy-id001c.c916"; ++ reg = <1>; ++ }; ++ }; ++ }; ++ ++ aliases { ++ ethernrt0 = ð0; ++ }; ++ ++ usb@0x4800000 { ++ compatible = "cdns,usb3"; ++ ++ clocks = <&ap_clk AX620X_PCLK_USB>, <&ap_clk AX620X_ACLK_USB>, ++ <&ap_clk AX620X_CLK_USB_REF>, <&ap_clk AX620X_CLK_USB2PHY>, ++ <&ap_clk AX620X_CLK_STB_PREDFT>, <&ap_clk AX620X_CLK_OTG_FAST>, ++ <&ap_clk AX620X_CLK_LPM_PREDFT>; ++ clock-names = "usb_pclk", "usb_aclk", "usb_ref_clk", "usb2phy_clk", ++ "stb_predft_clk", "otg_fast_clk", "lpm_predft_clk"; ++ ++ interrupts = <0 106 4>, ++ <0 114 4>, ++ <0 105 4>; ++ interrupt-names = "host", "peripheral", "otg"; ++ ++ reg = <0x4800000 0x10000>, /* memory area for OTG registers */ ++ <0x4810000 0x10000>, /* memory area for HOST registers */ ++ <0x4820000 0x10000>; /* memory area for DEVICE registers */ ++ reg-names = "otg", "xhci", "dev"; ++ ++ maximum-speed = "high-speed"; ++ dr_mode = "otg"; /*host or peripheral*/ ++ /* id-gpio = <&port0a 31 0>; */ ++ }; ++ ++ rtc-top@10040000 { ++ compatible = "axera,axi-top-rtc"; ++ reg-num = <2>; ++ reg = <0x10040000 0x2000>, ++ <0x2210000 0x100>; ++ interrupts = <0 136 4>; ++ status = "okay"; ++ }; ++ ++ sdio_host@0 { ++ compatible = "axera,sdio_host"; ++ debounce-delay-ms = <3>; ++ wake_up = <83>; ++ sleep_status = <81>; ++ reset_out_preisp = <82>; ++ reset_preisp = <80>; ++ preisp_notify = <84>; ++ }; ++ ++ sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Axera Audio"; ++ simple-audio-card,widgets = ++ "Microphone", "Mic Jack", ++ "Headphone", "Headphone Jack"; ++ simple-audio-card,routing = ++ "Headphone Jack", "LOUT1", ++ "Headphone Jack", "ROUT1", ++ "LINPUT2", "Mic Jack", ++ "RINPUT2", "Mic Jack", ++ "Mic Jack", "Mic Bias"; ++ simple-audio-card,dai-link@0 { ++ format = "i2s"; ++ cpu { ++ sound-dai = <&i2s_mst>; ++ }; ++ codec { ++ sound-dai = <&es8388>; ++ system-clock-frequency = <12288000>; ++ }; ++ }; ++ }; ++}; ++ ++ ++&dw_uart1 { ++ status = "okay"; ++}; ++ ++&emmc{ ++ max-frequency = <200000000>; ++ /*resets = <&sysclk>;*/ ++ sdhci-caps-mask = <0x2 0x03200000>; ++ bus-width = <8>; ++ no-sdio; ++ no-sd; ++ non-removable; ++ disable-wp; ++ cap-mmc-highspeed; ++ mmc-hs200-1_8v; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ cdns,phy-input-delay-sd-highspeed = <2>; ++ cdns,phy-input-delay-legacy = <3>; ++ cdns,phy-input-delay-sd-uhs-sdr12 = <0>; ++ cdns,phy-input-delay-sd-uhs-sdr25 = <4>; ++ cdns,phy-input-delay-sd-uhs-sdr50 = <3>; ++ cdns,phy-input-delay-sd-uhs-ddr50 = <3>; ++ cdns,phy-input-delay-mmc-legacy = <8>; ++ cdns,phy-input-delay-mmc-highspeed = <4>; ++ cdns,phy-input-delay-mmc-ddr = <3>; ++ cdns,phy-dll-delay-sdclk = <45>; ++ cdns,phy-dll-delay-sdclk-hsmmc = <23>; ++ cdns,phy-dll-delay-strobe = <18>; ++ fixed-emmc-driver-type = <4>; ++ clocks = <&flash_clk AX620X_CLK_EMMC_CARD_SEL>; ++ clock-names = "cardclk"; ++ status = "okay"; ++}; ++ ++&sd1{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++// cap-sd-highspeed; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ sd-uhs-sdr50; ++ no-sd; ++ no-mmc; ++ cap-sdio-irq; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "ok"; ++}; ++ ++&sd2{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ no-sdio; ++ no-mmc; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "okay"; ++}; ++ ++&i2s_mst { ++ status = "okay"; ++ reg = <0x49AC000 0x1000>, ++ <0x49BA000 0x400>; ++ glb-value = <0xf80>; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++}; ++ ++&i2c1 { ++ status = "okay"; ++}; ++ ++&i2c_hs0 { ++ status = "okay"; ++}; ++ ++&i2c_hs2 { ++ status = "okay"; ++ #address-cells = <0x1>; ++ #size-cells = <0x0>; ++ es8388: es8388@11 { ++ compatible = "everest,es8388"; ++ /* ++ DVDD-supply = <®_3p3v>; ++ AVDD-supply = <®_3p3v>; ++ PVDD-supply = <®_3p3v>; ++ HPVDD-supply = <®_3p3v>; ++ */ ++ clocks = <&ap_clk AX620X_CLK_I2S_REF2>; ++ reg = <0x11>; ++ #sound-dai-cells = <0>; ++ }; ++ ++ typec: sgm7220@47 { ++ compatible = "axera,sgm7220"; ++ reg = <0x47>; ++ int-gpio = <&port0a 31 0>; /* GPIO0_D7 */ ++ bind-usb = "4800000.usb"; ++ }; ++ ++ ++}; ++ ++ ++&dwgpio0 { ++ status = "okay"; ++}; ++ ++&dwgpio1 { ++ status = "okay"; ++}; ++ ++&dwgpio2 { ++ status = "okay"; ++}; ++ ++&spi4 { ++ status = "okay"; ++}; ++ ++&dsi { ++ status = "okay"; ++ enable-dsi = <0x1>; ++}; ++ ++&panel_dsi { ++ reset-gpio = <&expander_io 3 0>; ++ reset-low-delay-ms = <20>; ++ reset-high-delay-ms = <100>; ++ dsi,format = ; ++ dsi,lanes = <4>; ++ dsi,flags = <(MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM)>; ++ panel-init-seq = [05 00 01 00]; ++ panel-exit-seq = [05 00 01 00]; ++ ++ display-timings { ++ ++ timing0 { ++ /* 1920x1080@60 */ ++ clock-frequency = <148500000>; ++ hactive = <1920>; ++ vactive = <1080>; ++ hfront-porch = <88>; ++ hsync-len = <44>; ++ hback-porch = <148>; ++ vfront-porch = <4>; ++ vsync-len = <5>; ++ vback-porch = <36>; ++ hsync-active = <0>; ++ vsync-active = <0>; ++ de-active = <0>; ++ }; ++ }; ++}; +\ No newline at end of file +diff --git a/arch/arm/boot/dts/AX620_nand.dts b/arch/arm/boot/dts/AX620_nand.dts +new file mode 100644 +index 000000000..91dae60a1 +--- /dev/null ++++ b/arch/arm/boot/dts/AX620_nand.dts +@@ -0,0 +1,345 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * dts file for Axera Demo Development NAND Board ++ * ++ * Copyright (C) 2021, Axera Ltd. ++ * ++ */ ++ ++/dts-v1/; ++#include "axera_ax620x.dtsi" ++/ { ++ memory@40000000 { ++ device_type = "memory"; ++ reg = <0x40000000 0x7ff00000>; ++ }; ++ reserved-memory { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ ++ linux,cma { ++ compatible = "shared-dma-pool"; ++ reusable; ++ size = <0x10000000>; ++ linux,cma-default; ++ }; ++ ramoops_mem@44000000{ ++ compatible = "ramoops"; ++ reg = <0x44000000 0xf0000>; ++ record-size = <0x40000>; ++ console-size = <0x80000>; ++ ftrace-size = <0x20000>; ++ }; ++ ++ ax_memory_dump@44100000 { ++ compatible = "ax_memory_dump"; ++ reg = <0x44100000 0x100000>; ++ size = <0x100000>; ++ }; ++ }; ++ chosen { ++ bootargs = "mem=1024M rdinit=/linuxrc console=ttyS1,230400n8 loglevel=8 vmalloc=768M"; ++ }; ++ ++ wdt0: watchdog@49aa000 { ++ compatible = "snps,dw-wdt"; ++ reg = <0x49aa000 0x100>; ++ interrupts = <0 123 4>; ++ clocks = <&ap_clk AX620X_CLK_WDT>; ++ clock-names = "wdg-clk"; ++ }; ++ ++ dec: dec@4020000 { ++ compatible = "axera, video-decoder"; ++ reg = <0x4020000 0x10000>; ++ reg-names = "dec0"; ++ interrupts = <0 41 4>; ++ type = "chip"; ++ clocks = <&vpu_clk AX620X_CLK_VDEC>; ++ clock-names = "dec_clk"; ++ }; ++ ++ venc: venc@4010000 { ++ compatible = "axera,video-encoder"; ++ reg = <0x4010000 0x10000>; ++ reg-names = "avc_hevc"; ++ interrupts = <0 42 4>; ++ clocks = <&vpu_clk AX620X_CLK_VENC>; ++ clock-names = "venc_clk"; ++ }; ++ ++ jenc: jenc@4000000 { ++ compatible = "axera, jpeg-encoder"; ++ reg = <0x4000000 0x10000>; ++ reg-names = "jpeg_enc"; ++ interrupts = <0 40 4>; ++ clocks = <&vpu_clk AX620X_CLK_JENC>; ++ clock-names = "jpegenc_clk"; ++ }; ++ ++ tdp: tdp@4410000 { ++ compatible = "axera,tdp-dev"; ++ reg = <0x4410000 0x1000>, ++ <0x4420000 0x1000>; ++ clocks = <&mm_clk AX620X_CLK_TDP>; ++ clock-names = "clk_tdp"; ++ interrupts = <0 20 4>; ++ status = "okay"; ++ }; ++ ++ gdc: gdc@2620000 { ++ compatible = "axera,gdc-dev"; ++ reg = <0x2620000 0x1000>; ++ clocks = <&isp_clk AX620X_CLK_ISP_GDC>; ++ clock-names = "clk_gdc"; ++ interrupts = <0 21 4>; ++ status = "okay"; ++ }; ++ ++ eth0: ethernet@0x4970000{ ++ compatible = "axera,dwmac-4.10a"; ++ reg = <0x4970000 0x10000>; ++ ++ clocks = <&ap_clk AX620X_PCLK_EMAC>, <&ap_clk AX620X_ACLK_EMAC>, ++ <&ap_clk AX620X_CLK_EPHY_REF>, <&ap_clk AX620X_CLK_EMAC_RGMII_TX>, ++ <&ap_clk AX620X_CLK_EMAC_RMII_RX_PAD_DIV>, <&ap_clk AX620X_CLK_EMAC_RMII_TX>; ++ clock-names = "emac_pclk", "emac_aclk", "ephy_clk", "rgmii_tx_clk", "rmii_rx_clk", "rmii_tx_clk"; ++ ++ interrupt-parent = <&gic>; ++ interrupts = <0 101 4>, <0 102 4>, <0 100 4>; ++ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; ++ ++ phy-mode = "rgmii"; ++ phy-handle = <&phy0>; ++ phy-rst-gpio = <&port2a 28 0>; /* GPIO2_D4 */ ++ ++ rx-fifo-depth = <16384>; ++ tx-fifo-depth = <16384>; ++ snps,tso; ++ ++ mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "snps,dwmac-mdio"; ++ phy0: phy@1 { ++ device_tpye = "ethernet-phy"; ++ compatible = "ethernet-phy-id001c.c916"; ++ reg = <1>; ++ }; ++ }; ++ }; ++ ++ aliases { ++ ethernet0 = ð0; ++ }; ++ ++ usb@0x4800000 { ++ compatible = "cdns,usb3"; ++ ++ clocks = <&ap_clk AX620X_PCLK_USB>, <&ap_clk AX620X_ACLK_USB>, ++ <&ap_clk AX620X_CLK_USB_REF>, <&ap_clk AX620X_CLK_USB2PHY>, ++ <&ap_clk AX620X_CLK_STB_PREDFT>, <&ap_clk AX620X_CLK_OTG_FAST>, ++ <&ap_clk AX620X_CLK_LPM_PREDFT>; ++ clock-names = "usb_pclk", "usb_aclk", "usb_ref_clk", "usb2phy_clk", ++ "stb_predft_clk", "otg_fast_clk", "lpm_predft_clk"; ++ ++ interrupts = <0 106 4>, ++ <0 114 4>, ++ <0 105 4>; ++ interrupt-names = "host", "peripheral", "otg"; ++ ++ reg = <0x4800000 0x10000>, /* memory area for OTG registers */ ++ <0x4810000 0x10000>, /* memory area for HOST registers */ ++ <0x4820000 0x10000>; /* memory area for DEVICE registers */ ++ reg-names = "otg", "xhci", "dev"; ++ ++ maximum-speed = "high-speed"; ++ dr_mode = "otg"; /*host or peripheral*/ ++ /* id-gpio = <&port0a 31 0>; */ ++ }; ++ ++ rtc-top@10040000 { ++ compatible = "axera,axi-top-rtc"; ++ reg-num = <2>; ++ reg = <0x10040000 0x2000>, ++ <0x2210000 0x100>; ++ interrupts = <0 136 4>; ++ status = "okay"; ++ }; ++ ++ sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Axera Audio"; ++ simple-audio-card,widgets = ++ "Microphone", "Mic Jack", ++ "Headphone", "Headphone Jack"; ++ simple-audio-card,routing = ++ "Headphone Jack", "LOUT1", ++ "Headphone Jack", "ROUT1", ++ "LINPUT2", "Mic Jack", ++ "RINPUT2", "Mic Jack", ++ "Mic Jack", "Mic Bias"; ++ simple-audio-card,dai-link@0 { ++ format = "i2s"; ++ cpu { ++ sound-dai = <&i2s_mst>; ++ }; ++ codec { ++ sound-dai = <&es8388>; ++ system-clock-frequency = <12288000>; ++ }; ++ }; ++ }; ++}; ++ ++ ++&emmc{ ++ status = "okay"; ++}; ++ ++&sd1{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ no-sdio; ++ no-mmc; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "disable"; ++}; ++ ++&sd2{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ no-sdio; ++ no-mmc; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "okay"; ++}; ++ ++&i2s_mst { ++ status = "okay"; ++ reg = <0x49AC000 0x1000>, ++ <0x49BA000 0x400>; ++ glb-value = <0xf80>; ++}; ++ ++&i2c0 { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++}; ++ ++&i2c_hs0 { ++ status = "okay"; ++}; ++ ++&i2c_hs2 { ++ status = "okay"; ++ #address-cells = <0x1>; ++ #size-cells = <0x0>; ++ es8388: es8388@11 { ++ compatible = "everest,es8388"; ++ /* ++ DVDD-supply = <®_3p3v>; ++ AVDD-supply = <®_3p3v>; ++ PVDD-supply = <®_3p3v>; ++ HPVDD-supply = <®_3p3v>; ++ */ ++ clocks = <&ap_clk AX620X_CLK_I2S_REF2>; ++ reg = <0x11>; ++ #sound-dai-cells = <0>; ++ }; ++ ++ typec: sgm7220@47 { ++ compatible = "axera,sgm7220"; ++ reg = <0x47>; ++ int-gpio = <&port0a 31 0>; /* GPIO0_D7 */ ++ bind-usb = "4800000.usb"; ++ }; ++}; ++ ++ ++&dwgpio0 { ++ status = "okay"; ++}; ++ ++&dwgpio1 { ++ status = "okay"; ++}; ++ ++&dwgpio2 { ++ status = "okay"; ++}; ++ ++&pwm0 { ++ pin_sleep_setting = <0x049BC0FC 0x00060014>; ++}; ++ ++&spi4 { ++ status = "okay"; ++ spi_nand@0 { ++ compatible = "spi-nand"; ++ reg = <0>; ++ spi-max-frequency = <30000000>; ++ spi-tx-bus-width = <4>; ++ spi-rx-bus-width = <4>; ++ }; ++}; ++ ++&crtc { ++ vfb_configs = "1920x1080-32-2"; ++}; ++ ++&dsi { ++ status = "okay"; ++ enable-dsi = <0x1>; ++}; ++ ++&panel_dsi { ++ reset-gpio = <&expander_io 3 0>; ++ reset-low-delay-ms = <20>; ++ reset-high-delay-ms = <100>; ++ dsi,format = ; ++ dsi,lanes = <4>; ++ dsi,flags = <(MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM)>; ++ panel-init-seq = [05 00 01 00]; ++ panel-exit-seq = [05 00 01 00]; ++ ++ display-timings { ++ ++ timing0 { ++ /* 1920x1080@60 */ ++ clock-frequency = <148500000>; ++ hactive = <1920>; ++ vactive = <1080>; ++ hfront-porch = <88>; ++ hsync-len = <44>; ++ hback-porch = <148>; ++ vfront-porch = <4>; ++ vsync-len = <5>; ++ vback-porch = <36>; ++ hsync-active = <0>; ++ vsync-active = <0>; ++ de-active = <0>; ++ }; ++ }; ++}; +diff --git a/arch/arm/boot/dts/AX620_nor.dts b/arch/arm/boot/dts/AX620_nor.dts +new file mode 100644 +index 000000000..02b161ab6 +--- /dev/null ++++ b/arch/arm/boot/dts/AX620_nor.dts +@@ -0,0 +1,299 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * dts file for Axera EVB Development Board ++ * ++ * Copyright (C) 2021, Axera Ltd. ++ * ++ */ ++ ++/dts-v1/; ++#include "axera_ax620x.dtsi" ++/ { ++ memory@40000000 { ++ device_type = "memory"; ++ reg = <0x40000000 0x7ff00000>; ++ }; ++ reserved-memory { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ ++ linux,cma { ++ compatible = "shared-dma-pool"; ++ reusable; ++ size = <0x10000000>; ++ linux,cma-default; ++ }; ++ }; ++ chosen { ++ bootargs = "mem=1024M rdinit=/linuxrc console=ttyS1,230400n8 loglevel=8 vmalloc=768M"; ++ }; ++ ++ wdt0: watchdog@49aa000 { ++ compatible = "snps,dw-wdt"; ++ reg = <0x49aa000 0x100>; ++ interrupts = <0 123 4>; ++ clocks = <&ap_clk AX620X_CLK_WDT>; ++ clock-names = "wdg-clk"; ++ }; ++ ++ dec: dec@4020000 { ++ compatible = "axera, video-decoder"; ++ reg = <0x4020000 0x10000>; ++ reg-names = "dec0"; ++ interrupts = <0 41 4>; ++ type = "chip"; ++ clocks = <&vpu_clk AX620X_CLK_VDEC>; ++ clock-names = "dec_clk"; ++ }; ++ ++ venc: venc@4010000 { ++ compatible = "axera,video-encoder"; ++ reg = <0x4010000 0x10000>; ++ reg-names = "avc_hevc"; ++ interrupts = <0 42 4>; ++ clocks = <&vpu_clk AX620X_CLK_VENC>; ++ clock-names = "venc_clk"; ++ }; ++ ++ jenc: jenc@4000000 { ++ compatible = "axera, jpeg-encoder"; ++ reg = <0x4000000 0x10000>; ++ reg-names = "jpeg_enc"; ++ interrupts = <0 40 4>; ++ clocks = <&vpu_clk AX620X_CLK_JENC>; ++ clock-names = "jpegenc_clk"; ++ }; ++ ++ tdp: tdp@4410000 { ++ compatible = "axera,tdp-dev"; ++ reg = <0x4410000 0x1000>, ++ <0x4420000 0x1000>; ++ clocks = <&mm_clk AX620X_CLK_TDP>; ++ clock-names = "clk_tdp"; ++ interrupts = <0 20 4>; ++ status = "okay"; ++ }; ++ ++ eth0: ethernet@0x4970000{ ++ compatible = "axera,dwmac-4.10a"; ++ reg = <0x4970000 0x10000>; ++ ++ clocks = <&ap_clk AX620X_PCLK_EMAC>, <&ap_clk AX620X_ACLK_EMAC>, ++ <&ap_clk AX620X_CLK_EPHY_REF>, <&ap_clk AX620X_CLK_EMAC_RGMII_TX>, ++ <&ap_clk AX620X_CLK_EMAC_RMII_RX_PAD_DIV>, <&ap_clk AX620X_CLK_EMAC_RMII_TX>; ++ clock-names = "emac_pclk", "emac_aclk", "ephy_clk", "rgmii_tx_clk", "rmii_rx_clk", "rmii_tx_clk"; ++ ++ interrupt-parent = <&gic>; ++ interrupts = <0 101 4>, <0 102 4>, <0 100 4>; ++ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; ++ ++ phy-mode = "rgmii"; ++ phy-handle = <&phy0>; ++ phy-rst-gpio = <&port2a 28 0>; /* GPIO2_D4 */ ++ ++ rx-fifo-depth = <16384>; ++ tx-fifo-depth = <16384>; ++ snps,tso; ++ ++ mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "snps,dwmac-mdio"; ++ phy0: phy@1 { ++ device_tpye = "ethernet-phy"; ++ compatible = "ethernet-phy-id001c.c916"; ++ reg = <1>; ++ }; ++ }; ++ }; ++ ++ aliases { ++ ethernet0 = ð0; ++ }; ++ ++ usb@0x4800000 { ++ compatible = "cdns,usb3"; ++ ++ clocks = <&ap_clk AX620X_PCLK_USB>, <&ap_clk AX620X_ACLK_USB>, ++ <&ap_clk AX620X_CLK_USB_REF>, <&ap_clk AX620X_CLK_USB2PHY>, ++ <&ap_clk AX620X_CLK_STB_PREDFT>, <&ap_clk AX620X_CLK_OTG_FAST>, ++ <&ap_clk AX620X_CLK_LPM_PREDFT>; ++ clock-names = "usb_pclk", "usb_aclk", "usb_ref_clk", "usb2phy_clk", ++ "stb_predft_clk", "otg_fast_clk", "lpm_predft_clk"; ++ ++ interrupts = <0 106 4>, ++ <0 114 4>, ++ <0 105 4>; ++ interrupt-names = "host", "peripheral", "otg"; ++ ++ reg = <0x4800000 0x10000>, /* memory area for OTG registers */ ++ <0x4810000 0x10000>, /* memory area for HOST registers */ ++ <0x4820000 0x10000>; /* memory area for DEVICE registers */ ++ reg-names = "otg", "xhci", "dev"; ++ ++ maximum-speed = "high-speed"; ++ dr_mode = "otg"; /*host or peripheral*/ ++ id-gpio = <&port0a 31 0>; /* GPIO0_D7 */ ++ }; ++ ++ rtc-top@10040000 { ++ compatible = "axera,axi-top-rtc"; ++ reg-num = <2>; ++ reg = <0x10040000 0x2000>, ++ <0x2210000 0x100>; ++ interrupts = <0 136 4>; ++ status = "okay"; ++ }; ++ ++ sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Axera Audio"; ++ /* ++ simple-audio-card,widgets = ++ "Microphone", "Mic Jack", ++ "Headphone", "Headphone Jack"; ++ simple-audio-card,routing = ++ "Headphone Jack", "LOUT2", ++ "Headphone Jack", "ROUT2", ++ "LINPUT2", "Mic Jack", ++ "LINPUT1", "Mic Jack", ++ "RINPUT1", "Mic Jack"; ++ */ ++ simple-audio-card,dai-link@0 { ++ format = "i2s"; ++ cpu { ++ sound-dai = <&i2s_mst>; ++ }; ++ codec { ++ sound-dai = <&es7210>; ++ system-clock-frequency = <12288000>; ++ }; ++ }; ++ }; ++}; ++ ++ ++&emmc{ ++ status = "okay"; ++}; ++ ++&sd1{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ no-sdio; ++ no-mmc; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "disable"; ++}; ++ ++&sd2{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ no-1-8-v; // hw not support 1.8V ++ no-sdio; ++ no-mmc; ++ //non-removable; ++ broken-cd; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD>; ++ clock-names = "cardclk"; ++ status = "okay"; ++}; ++ ++&i2s_mst { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ #address-cells = <0x1>; ++ #size-cells = <0x0>; ++ es7210: es7210@41 { ++ compatible = "MicArray_0"; ++ /* ++ DVDD-supply = <®_3p3v>; ++ AVDD-supply = <®_3p3v>; ++ PVDD-supply = <®_3p3v>; ++ HPVDD-supply = <®_3p3v>; ++ */ ++ reg = <0x41>; ++ #sound-dai-cells = <0>; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++}; ++ ++ ++&dwgpio0 { ++ status = "okay"; ++}; ++ ++&dwgpio1 { ++ status = "okay"; ++}; ++ ++&dwgpio2 { ++ status = "okay"; ++}; ++ ++&spi4 { ++ status = "okay"; ++ spi_flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <50000000>; ++ spi-tx-bus-width = <4>; ++ spi-rx-bus-width = <4>; ++ }; ++}; ++ ++&dsi { ++ status = "okay"; ++ enable-dsi = <0x1>; ++}; ++ ++&panel_dsi { ++ reset-gpio = <&expander_io 3 0>; ++ reset-low-delay-ms = <20>; ++ reset-high-delay-ms = <100>; ++ dsi,format = ; ++ dsi,lanes = <4>; ++ dsi,flags = <(MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM)>; ++ panel-init-seq = [05 00 01 00]; ++ panel-exit-seq = [05 00 01 00]; ++ ++ display-timings { ++ ++ timing0 { ++ /* 1920x1080@60 */ ++ clock-frequency = <148500000>; ++ hactive = <1920>; ++ vactive = <1080>; ++ hfront-porch = <88>; ++ hsync-len = <44>; ++ hback-porch = <148>; ++ vfront-porch = <4>; ++ vsync-len = <5>; ++ vback-porch = <36>; ++ hsync-active = <0>; ++ vsync-active = <0>; ++ de-active = <0>; ++ }; ++ }; ++}; +\ No newline at end of file +diff --git a/arch/arm/boot/dts/AX620_slave.dts b/arch/arm/boot/dts/AX620_slave.dts +new file mode 100644 +index 000000000..8fa0da50d +--- /dev/null ++++ b/arch/arm/boot/dts/AX620_slave.dts +@@ -0,0 +1,382 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * dts file for Axera Demo Development Board ++ * ++ * Copyright (C) 2021, Axera Ltd. ++ * ++ */ ++ ++/dts-v1/; ++#include "axera_ax620x.dtsi" ++/ { ++ memory@40000000 { ++ device_type = "memory"; ++ reg = <0x40000000 0x7ff00000>; ++ }; ++ reserved-memory { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ ++ linux,cma { ++ compatible = "shared-dma-pool"; ++ reusable; ++ reg = <0x4e000000 0x2000000>; ++ size = <0x2000000>; ++ no-map; ++ linux,cma-default; ++ }; ++ ++ sdio_slave_mem@44200000{ ++ compatible = "sdio_slave"; ++ reg = <0x44200000 0x100000>; ++ size = <0x100000>; ++ no-map; ++ }; ++ ++ ramdisk_mem@50000000{ ++ compatible = "axera, ramdisk"; ++ reg = <0x50000000 0x10000000>; ++ addr = <0x50000000>; ++ size = <0x10000000>; ++ no-map; ++ }; ++ ++ ax_memory_dump@4cffe000 { ++ compatible = "ax_memory_dump"; ++ reg = <0x4cffe000 0x1000>; ++ size = <0x1000>; ++ }; ++ }; ++ chosen { ++ bootargs = "mem=512M rdinit=/init console=ttyS0,115200n8 loglevel=5 vmalloc=768M"; ++ }; ++ ++ timer { ++ compatible = "arm,armv7-timer"; ++ arm,cpu-registers-not-fw-configured; ++ interrupts = <1 13 0xf08>, ++ <1 14 0xf08>, ++ <1 11 0xf08>, ++ <1 10 0xf08>; ++ clock-frequency = <19200000>; ++ }; ++ ++ wdt0: watchdog@49aa000 { ++ compatible = "snps,dw-wdt"; ++ reg = <0x49aa000 0x100>; ++ interrupts = <0 123 4>; ++ clocks = <&ap_clk AX620X_CLK_WDT>; ++ clock-names = "wdg-clk"; ++ status = "disabled"; ++ }; ++ ++ ++ dec: dec@4020000 { ++ compatible = "axera, video-decoder"; ++ reg = <0x4020000 0x10000>; ++ reg-names = "dec0"; ++ interrupts = <0 41 4>; ++ type = "chip"; ++ clocks = <&vpu_clk AX620X_CLK_VDEC>; ++ clock-names = "dec_clk"; ++ }; ++ ++ venc: venc@4010000 { ++ compatible = "axera,video-encoder"; ++ reg = <0x4010000 0x10000>; ++ reg-names = "avc_hevc"; ++ interrupts = <0 42 4>; ++ clocks = <&vpu_clk AX620X_CLK_VENC>; ++ clock-names = "venc_clk"; ++ }; ++ ++ jenc: jenc@4000000 { ++ compatible = "axera, jpeg-encoder"; ++ reg = <0x4000000 0x10000>; ++ reg-names = "jpeg_enc"; ++ interrupts = <0 40 4>; ++ clocks = <&vpu_clk AX620X_CLK_JENC>; ++ clock-names = "jpegenc_clk"; ++ }; ++ ++ tdp: tdp@4410000 { ++ compatible = "axera,tdp-dev"; ++ reg = <0x4410000 0x1000>, ++ <0x4420000 0x1000>; ++ clocks = <&mm_clk AX620X_CLK_TDP>; ++ clock-names = "clk_tdp"; ++ interrupts = <0 20 4>; ++ status = "okay"; ++ }; ++ ++ gdc: gdc@2620000 { ++ compatible = "axera,gdc-dev"; ++ reg = <0x2620000 0x1000>; ++ clocks = <&isp_clk AX620X_CLK_ISP_GDC>; ++ clock-names = "clk_gdc"; ++ interrupts = <0 21 4>; ++ status = "okay"; ++ }; ++ ++ eth0: ethernet@0x4970000{ ++ compatible = "axera,dwmac-4.10a"; ++ reg = <0x4970000 0x10000>; ++ ++ clocks = <&ap_clk AX620X_PCLK_EMAC>, <&ap_clk AX620X_ACLK_EMAC>, ++ <&ap_clk AX620X_CLK_EPHY_REF>, <&ap_clk AX620X_CLK_EMAC_RGMII_TX>, ++ <&ap_clk AX620X_CLK_EMAC_RMII_RX_PAD_DIV>, <&ap_clk AX620X_CLK_EMAC_RMII_TX>; ++ clock-names = "emac_pclk", "emac_aclk", "ephy_clk", "rgmii_tx_clk", "rmii_rx_clk", "rmii_tx_clk"; ++ ++ interrupt-parent = <&gic>; ++ interrupts = <0 101 4>, <0 102 4>, <0 100 4>; ++ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; ++ ++ phy-mode = "rgmii"; ++ phy-handle = <&phy0>; ++ phy-rst-gpio = <&port2a 28 0>; /* GPIO2_D4 */ ++ ++ rx-fifo-depth = <16384>; ++ tx-fifo-depth = <16384>; ++ snps,tso; ++ mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "snps,dwmac-mdio"; ++ phy0: phy@1 { ++ device_tpye = "ethernet-phy"; ++ compatible = "ethernet-phy-id001c.c916"; ++ reg = <1>; ++ }; ++ }; ++ }; ++ ++ aliases { ++ ethernrt0 = ð0; ++ }; ++ ++ usb@0x4800000 { ++ compatible = "cdns,usb3"; ++ ++ clocks = <&ap_clk AX620X_PCLK_USB>, <&ap_clk AX620X_ACLK_USB>, ++ <&ap_clk AX620X_CLK_USB_REF>, <&ap_clk AX620X_CLK_USB2PHY>, ++ <&ap_clk AX620X_CLK_STB_PREDFT>, <&ap_clk AX620X_CLK_OTG_FAST>, ++ <&ap_clk AX620X_CLK_LPM_PREDFT>; ++ clock-names = "usb_pclk", "usb_aclk", "usb_ref_clk", "usb2phy_clk", ++ "stb_predft_clk", "otg_fast_clk", "lpm_predft_clk"; ++ ++ interrupts = <0 106 4>, ++ <0 114 4>, ++ <0 105 4>; ++ interrupt-names = "host", "peripheral", "otg"; ++ ++ reg = <0x4800000 0x10000>, /* memory area for OTG registers */ ++ <0x4810000 0x10000>, /* memory area for HOST registers */ ++ <0x4820000 0x10000>; /* memory area for DEVICE registers */ ++ reg-names = "otg", "xhci", "dev"; ++ ++ maximum-speed = "high-speed"; ++ dr_mode = "otg"; /*host or peripheral*/ ++ /* id-gpio = <&port0a 31 0>; */ ++ }; ++ ++ rtc-top@10040000 { ++ compatible = "axera,axi-top-rtc"; ++ reg-num = <2>; ++ reg = <0x10040000 0x2000>, ++ <0x2210000 0x100>; ++ interrupts = <0 136 4>; ++ status = "okay"; ++ }; ++ ++ sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "Axera Audio"; ++ simple-audio-card,widgets = ++ "Microphone", "Mic Jack", ++ "Headphone", "Headphone Jack"; ++ simple-audio-card,routing = ++ "Headphone Jack", "LOUT1", ++ "Headphone Jack", "ROUT1", ++ "LINPUT2", "Mic Jack", ++ "RINPUT2", "Mic Jack", ++ "Mic Jack", "Mic Bias"; ++ simple-audio-card,dai-link@0 { ++ format = "i2s"; ++ cpu { ++ sound-dai = <&i2s_mst>; ++ }; ++ codec { ++ sound-dai = <&es8388>; ++ system-clock-frequency = <12288000>; ++ }; ++ }; ++ }; ++}; ++ ++&emmc{ ++ max-frequency = <200000000>; ++ /*resets = <&sysclk>;*/ ++ sdhci-caps-mask = <0x2 0x03200000>; ++ bus-width = <8>; ++ no-sdio; ++ no-sd; ++ non-removable; ++ disable-wp; ++ cap-mmc-highspeed; ++ mmc-hs200-1_8v; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ cdns,phy-input-delay-sd-highspeed = <2>; ++ cdns,phy-input-delay-legacy = <3>; ++ cdns,phy-input-delay-sd-uhs-sdr12 = <0>; ++ cdns,phy-input-delay-sd-uhs-sdr25 = <4>; ++ cdns,phy-input-delay-sd-uhs-sdr50 = <3>; ++ cdns,phy-input-delay-sd-uhs-ddr50 = <3>; ++ cdns,phy-input-delay-mmc-legacy = <8>; ++ cdns,phy-input-delay-mmc-highspeed = <4>; ++ cdns,phy-input-delay-mmc-ddr = <3>; ++ cdns,phy-dll-delay-sdclk = <45>; ++ cdns,phy-dll-delay-sdclk-hsmmc = <23>; ++ cdns,phy-dll-delay-strobe = <18>; ++ fixed-emmc-driver-type = <4>; ++ clocks = <&flash_clk AX620X_CLK_EMMC_CARD_SEL>; ++ clock-names = "cardclk"; ++ status = "disabled"; ++}; ++ ++&sd1{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ no-sdio; ++ no-mmc; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD_SEL>; ++ clock-names = "cardclk"; ++ status = "disable"; ++}; ++ ++&sd2{ ++ sdhci-caps-mask = <0x7 0x00200000>; ++ bus-width = <4>; ++ max-frequency = <200000000>; ++ cap-sd-highspeed; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ no-sdio; ++ no-mmc; ++ disable-wp; ++ clocks = <&ap_clk AX620X_CLK_SDIO_M_CARD_SEL>; ++ clock-names = "cardclk"; ++ status = "disabled"; ++}; ++ ++&sdio_slave { ++ status = "okay"; ++}; ++ ++&i2s_mst { ++ status = "okay"; ++ reg = <0x49AC000 0x1000>, ++ <0x49BA000 0x400>; ++ glb-value = <0xf80>; ++}; ++ ++&i2c0 { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++}; ++ ++&i2c_hs0 { ++ status = "okay"; ++}; ++ ++&i2c_hs2 { ++ status = "okay"; ++ #address-cells = <0x1>; ++ #size-cells = <0x0>; ++ es8388: es8388@11 { ++ compatible = "everest,es8388"; ++ /* ++ DVDD-supply = <®_3p3v>; ++ AVDD-supply = <®_3p3v>; ++ PVDD-supply = <®_3p3v>; ++ HPVDD-supply = <®_3p3v>; ++ */ ++ clocks = <&ap_clk AX620X_CLK_I2S_REF2>; ++ reg = <0x11>; ++ #sound-dai-cells = <0>; ++ }; ++ ++ typec: sgm7220@47 { ++ compatible = "axera,sgm7220"; ++ reg = <0x47>; ++ int-gpio = <&port0a 31 0>; /* GPIO0_D7 */ ++ bind-usb = "4800000.usb"; ++ }; ++}; ++ ++ ++&dwgpio0 { ++ status = "okay"; ++}; ++ ++&dwgpio1 { ++ status = "okay"; ++}; ++ ++&dwgpio2 { ++ status = "okay"; ++}; ++ ++&spi4 { ++ status = "okay"; ++}; ++ ++ ++&dsi { ++ status = "okay"; ++ enable-dsi = <0x1>; ++}; ++ ++&panel_dsi { ++ reset-gpio = <&expander_io 3 0>; ++ reset-low-delay-ms = <20>; ++ reset-high-delay-ms = <100>; ++ dsi,format = ; ++ dsi,lanes = <4>; ++ dsi,flags = <(MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM)>; ++ panel-init-seq = [05 00 01 00]; ++ panel-exit-seq = [05 00 01 00]; ++ ++ display-timings { ++ ++ timing0 { ++ /* 1920x1080@60 */ ++ clock-frequency = <148500000>; ++ hactive = <1920>; ++ vactive = <1080>; ++ hfront-porch = <88>; ++ hsync-len = <44>; ++ hback-porch = <148>; ++ vfront-porch = <4>; ++ vsync-len = <5>; ++ vback-porch = <36>; ++ hsync-active = <0>; ++ vsync-active = <0>; ++ de-active = <0>; ++ }; ++ }; ++}; +\ No newline at end of file +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index b5bd3de87..d12fca50d 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -1207,3 +1207,14 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ + aspeed-bmc-opp-zaius.dtb \ + aspeed-bmc-portwell-neptune.dtb \ + aspeed-bmc-quanta-q71l.dtb ++dtb-$(CONFIG_ARCH_AXERA) += \ ++ AX620U_nand.dtb \ ++ AX620U_38board.dtb \ ++ AX620U_demo.dtb \ ++ AX620_demo.dtb \ ++ AX620_nand.dtb \ ++ AX620_nor.dtb \ ++ AX620_slave.dtb \ ++ AX620_master.dtb \ ++ AX620_38board.dtb \ ++ AX620_dashcam.dtb +diff --git a/arch/arm/boot/dts/axera_ax620x.dtsi b/arch/arm/boot/dts/axera_ax620x.dtsi +new file mode 100644 +index 000000000..462cadb61 +--- /dev/null ++++ b/arch/arm/boot/dts/axera_ax620x.dtsi +@@ -0,0 +1,856 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * dts file for Axera Ax620x SoC ++ * ++ * Copyright (C) 2021, Axera Ltd. ++ */ ++#include ++#include ++ ++/ { ++ compatible = "axera,ax620x"; ++ interrupt-parent = <&gic>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ aliases { ++ serial0 = &dw_uart0; ++ serial1 = &dw_uart1; ++ serial2 = &dw_uart2_0; ++ serial3 = &dw_uart2_1; ++ serial4 = &dw_uart3; ++ ++ spi0 = &spi0; ++ spi1 = &spi1; ++ spi2 = &spi2; ++ spi3 = &spi3; ++ spi4 = &spi4; ++ ++ i2c0 = &i2c0; ++ i2c1 = &i2c1; ++ i2c2 = &i2c2; ++ i2c3 = &i2c3; ++ i2c4 = &i2c4; ++ i2c5 = &i2c5; ++ i2c6 = &i2c_hs0; ++ i2c7 = &i2c_hs1; ++ i2c8 = &i2c_hs2; ++ i2c9 = &i2c_hs3; ++ }; ++ ++ cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ secondary-boot-reg = <0x02220300>; ++ ++ cpu@0 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a7"; ++ reg = <0x0>; ++ enable-method = "axera,ax620x-smp"; ++ }; ++ cpu@1 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a7"; ++ reg = <0x1>; ++ enable-method = "axera,ax620x-smp"; ++ }; ++ cpu@2 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a7"; ++ reg = <0x2>; ++ enable-method = "axera,ax620x-smp"; ++ }; ++ cpu@3 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a7"; ++ reg = <0x3>; ++ enable-method = "axera,ax620x-smp"; ++ }; ++ }; ++ gic: interrupt-controller@1850000 { ++ compatible = "arm,cortex-a7-gic"; ++ #interrupt-cells = <3>; ++ interrupt-controller; ++ reg = <0x1851000 0x1000>, ++ <0x1852000 0x2000>, ++ <0x1854000 0x2000>, ++ <0x1856000 0x2000>; ++ }; ++ pl_control0: npu_reg { ++ compatible = "generic-uio"; ++ reg = <0x3800000 0x7000>; ++ status = "okay"; ++ interrupt-controller; ++ interrupt-parent = <&gic>; ++ interrupts = <0 36 4>; ++ }; ++ pl_control1: npu_ocm { ++ compatible = "generic-uio"; ++ reg = <0x3000000 0x500000>; ++ status = "okay"; ++ interrupt-controller; ++ interrupt-parent = <&gic>; ++ interrupts = <0 39 1>; ++ }; ++ pl_control2: npu_top { ++ compatible = "generic-uio"; ++ status = "okay"; ++ interrupt-controller; ++ interrupt-parent = <&gic>; ++ interrupts = <0 37 1>; ++ }; ++ pl_control3: npu_fab { ++ compatible = "generic-uio"; ++ status = "okay"; ++ interrupt-controller; ++ interrupt-parent = <&gic>; ++ interrupts = <0 38 1>; ++ }; ++ ++ npu: ax_npu@0x3800000 { ++ compatible = "axera,npu"; ++ reg = < 0x3800000 0x7000 0x3000000 0x500000 >; ++ status = "okay"; ++ interrupt-parent = <&gic>; ++ interrupts = <0 36 4>,<0 39 1>,<0 37 1>,<0 38 1>; ++ }; ++ ++ timer { ++ compatible = "arm,armv7-timer"; ++ arm,cpu-registers-not-fw-configured; ++ interrupts = <1 13 0xf08>, ++ <1 14 0xf08>, ++ <1 11 0xf08>, ++ <1 10 0xf08>; ++ clock-frequency = <24000000>; ++ }; ++ ++ soc { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "simple-bus"; ++ ranges; ++ ++ ap_clk: ap_clk@49BA000 { ++ compatible = "axera,ax620x-ap-clk", "syscon"; ++ reg = <0x49BA000 0x2000>; ++ #clock-cells = <1>; ++ }; ++ common_clk: common_clk@2220000 { ++ compatible = "axera,ax620x-common-clk", "syscon"; ++ reg = <0x2220000 0x10000>; ++ #clock-cells = <1>; ++ }; ++ dispc_clk: dispc_clk@44B0000 { ++ compatible = "axera,ax620x-dispc-clk", "syscon"; ++ reg = <0x44B0000 0x10000>; ++ #clock-cells = <1>; ++ }; ++ flash_clk: flash_clk@10030000 { ++ compatible = "axera,ax620x-flash-clk", "syscon"; ++ reg = <0x10030000 0x10000>; ++ #clock-cells = <1>; ++ }; ++ isp_clk: isp_clk@2500000 { ++ compatible = "axera,ax620x-isp-clk", "syscon"; ++ reg = <0x2500000 0x80000>; ++ #clock-cells = <1>; ++ }; ++ mm_clk: mm_clk@4430000 { ++ compatible = "axera,ax620x-mm-clk", "syscon"; ++ reg = <0x4430000 0x10000>; ++ #clock-cells = <1>; ++ }; ++ vpu_clk: vpu_clk@4030000 { ++ compatible = "axera,ax620x-vpu-clk", "syscon"; ++ reg = <0x4030000 0x10000>; ++ #clock-cells = <1>; ++ }; ++ cpu_clk: cpu_clk@1900000 { ++ compatible = "axera,ax620x-cpu-clk", "syscon"; ++ reg = <0x1900000 0x10000>; ++ #clock-cells = <1>; ++ }; ++ ++ sys { ++ compatible = "axera,sys"; ++ }; ++ ++ ives@0 { ++ compatible = "axera,ives"; ++ }; ++ ++ isp: isp@2400000 { ++ compatible = "axera,proton"; ++ reg = <0x2400000 0x100000>; ++ interrupts = <0 27 4>; ++ interrupt-names = "isp"; ++ clocks = <&isp_clk AX620X_CLK_ISP_GLB_SEL>, ++ <&isp_clk AX620X_CLK_SEN0_REF>, ++ <&isp_clk AX620X_CLK_SEN1_REF>, ++ <&isp_clk AX620X_CLK_SEN2_REF>, ++ <&isp_clk AX620X_CLK_SEN3_REF>, ++ <&isp_clk AX620X_CLK_SEN4_REF>, ++ <&isp_clk AX620X_CLK_SEN5_REF>; ++ clock-names = "isp_glb_clk","sns_mclk0","sns_mclk1","sns_mclk2","sns_mclk3","sns_mclk4","sns_mclk5"; ++ }; ++ ++ mipi: isp@2600000 { ++ compatible = "axera,mipi"; ++ reg = <0x2600000 0x2210000>; ++ interrupts = <0 29 4>,<0 31 4>,<0 33 4>,<0 35 4>,<0 22 4>,<0 23 4>; ++ interrupt-names = "mipi"; ++ }; ++ ++ dmac: dw_dmac@1920000 { ++ compatible = "axera,axi-dma-1.01a"; ++ reg = <0x1920000 0x10000>; ++ #dma-cells = <1>; ++ dma-channels = <2>; ++ snps,dma-masters = <2>; ++ snps,data-width = <2>; ++ snps,block-size = <0x400000 0x400000>; ++ snps,priority = <1 1>; ++ snps,axi-max-burst-len = <256>; ++ clocks = <&cpu_clk AX620X_CLK_DMA>; ++ clock-names = "core-clk"; ++ interrupts = <0 5 4>; ++ status = "okay"; ++ }; ++ apb_timer: dw_apb_timer@49a0000 { ++ compatible = "axera,dw-apb-timer"; ++ reg = <0x49a0000 0x1000>; ++ interrupts = <0 72 4>; ++ status = "okay"; ++ }; ++ ++ dmac_hal: dw_dmac_hal@0000000 { ++ compatible = "axera,axi-dma-hal-1.01a"; ++ #dma-cells = <1>; ++ dma-channels = <2>; ++ status = "okay"; ++ }; ++ dw_uart0: dw_uart@4990000 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x4990000 0x1000>; ++ reg-shift = <2>; ++ reg-io-width = <4>; ++ clocks = <&ap_clk AX620X_CLK_UART0>; ++ clock-names = "baudclk"; ++ interrupts = <0 68 4>; ++ status = "okay"; ++ }; ++ dw_uart1: dw_uart@4992000 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x4992000 0x1000>; ++ reg-shift = <2>; ++ reg-io-width = <4>; ++ clocks = <&ap_clk AX620X_CLK_UART1>; ++ clock-names = "baudclk"; ++ interrupts = <0 69 4>; ++ status = "disabled"; ++ }; ++ ++ dw_uart2_0: dw_uart@0x04994000 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x04994000 0x400>; ++ reg-shift = <2>; ++ reg-io-width = <4>; ++ clocks = <&ap_clk AX620X_CLK_UART2>; ++ clock-names = "baudclk"; ++ interrupts = <0 70 4>; ++ status = "disabled"; ++ }; ++ ++ dw_uart2_1: dw_uart@0x04995000 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x04995000 0x400>; ++ reg-shift = <2>; ++ reg-io-width = <4>; ++ clocks = <&ap_clk AX620X_CLK_UART2>; ++ clock-names = "baudclk"; ++ interrupts = <0 70 4>; ++ status = "disabled"; ++ }; ++ ++ dw_uart3: dw_uart@0x04996000 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x4996000 0x1000>; ++ reg-shift = <2>; ++ reg-io-width = <4>; ++ clocks = <&ap_clk AX620X_CLK_UART3>; ++ clock-names = "baudclk"; ++ interrupts = <0 71 4>; ++ status = "disabled"; ++ }; ++ ++ emmc: sdhc@0x10000000 { ++ compatible = "axera,sdhc-ax620"; ++ reg = <0x10000000 0x10000>; ++ interrupts = <0 9 4>; ++ #size-cells = <2>; ++ status = "disabled"; ++ }; ++ sd1: sdhc@4940000 { ++ compatible = "axera,sdhc-ax620"; ++ reg = <0x4940000 0x10000>; ++ interrupts = <0 130 4>; ++ #address-cells = <1>; ++ #size-cells = <2>; ++ cdns,phy-input-delay-legacy = <9>; ++ cdns,phy-input-delay-mmc-highspeed = <2>; ++ cdns,phy-input-delay-mmc-ddr = <3>; ++ cdns,phy-dll-delay-sdclk = <21>; ++ cdns,phy-dll-delay-sdclk-hsmmc = <21>; ++ status = "disabled"; ++ }; ++ sd2: sdhc@4950000 { ++ compatible = "axera,sdhc-ax620"; ++ reg = <0x4950000 0x10000>; ++ interrupts = <0 132 4>; ++ #address-cells = <1>; ++ #size-cells = <2>; ++ cdns,phy-input-delay-legacy = <9>; ++ cdns,phy-input-delay-mmc-highspeed = <2>; ++ cdns,phy-input-delay-mmc-ddr = <3>; ++ cdns,phy-dll-delay-sdclk = <21>; ++ cdns,phy-dll-delay-sdclk-hsmmc = <21>; ++ status = "disabled"; ++ }; ++ dwgpio0: gpio@49a8000 { ++ compatible = "snps,dw-apb-gpio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x49a8000 0x1000>; ++ status = "okay"; ++ port0a: gpio-controller@0 { ++ compatible = "snps,dw-apb-gpio-port"; ++ gpio-controller; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ interrupts = <0 66 4>; ++ #gpio-cells = <2>; ++ snps,nr-gpios = <32>; ++ reg = <0>; ++ }; ++ }; ++ dwgpio1: gpio@10010000 { ++ compatible = "snps,dw-apb-gpio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x10010000 0x1000>; ++ status = "okay"; ++ port1a: gpio-controller@0 { ++ compatible = "snps,dw-apb-gpio-port"; ++ gpio-controller; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ interrupts = <0 11 4>; ++ #gpio-cells = <2>; ++ snps,nr-gpios = <32>; ++ reg = <0>; ++ }; ++ }; ++ dwgpio2: gpio@4960000 { ++ compatible = "snps,dw-apb-gpio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x4960000 0x1000>; ++ status = "okay"; ++ port2a: gpio-controller@0 { ++ compatible = "snps,dw-apb-gpio-port"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ interrupts = <0 67 4>; ++ snps,nr-gpios = <32>; ++ reg = <0>; ++ }; ++ }; ++ /* PAD i2c0 i2c1*/ ++ i2c0: i2c@4980000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x4980000 0x1000>; ++ interrupts = <0 90 4>; ++ clock-frequency = <400000>; ++ clocks = <&ap_clk AX620X_CLK_I2C0>; ++ clock-names = "baudclk"; ++ scl-gpio = <&port0a 15 0>; ++ sda-gpio = <&port0a 16 0>; ++ status = "disabled"; ++ }; ++ /* PAD i2c2 i2c10*/ ++ i2c1: i2c@4982000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x4982000 0x1000>; ++ interrupts = <0 91 4>; ++ clock-frequency = <400000>; ++ clocks = <&ap_clk AX620X_CLK_I2C1>; ++ clock-names = "baudclk"; ++ scl-gpio = <&port0a 19 0>; ++ sda-gpio = <&port0a 20 0>; ++ status = "disabled"; ++ }; ++ /* PAD i2c11 */ ++ i2c2: i2c@4984000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x4984000 0x1000>; ++ interrupts = <0 92 4>; ++ clock-frequency = <400000>; ++ clocks = <&ap_clk AX620X_CLK_I2C2>; ++ clock-names = "baudclk"; ++ scl-gpio = <&port2a 12 0>; ++ sda-gpio = <&port2a 13 0>; ++ status = "disabled"; ++ }; ++ /* PAD i2c5 */ ++ i2c3: i2c@4986000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x4986000 0x1000>; ++ interrupts = <0 93 4>; ++ clock-frequency = <400000>; ++ clocks = <&ap_clk AX620X_CLK_I2C3>; ++ clock-names = "baudclk"; ++ scl-gpio = <&port2a 8 0>; ++ sda-gpio = <&port2a 9 0>; ++ status = "disabled"; ++ }; ++ /* PAD i2c6 */ ++ i2c4: i2c@4988000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x4988000 0x1000>; ++ interrupts = <0 94 4>; ++ clock-frequency = <400000>; ++ clocks = <&ap_clk AX620X_CLK_I2C4>; ++ clock-names = "baudclk"; ++ scl-gpio = <&port2a 10 0>; ++ sda-gpio = <&port2a 11 0>; ++ status = "disabled"; ++ }; ++ /* PAD i2c7 */ ++ i2c5: i2c@498a000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x498a000 0x1000>; ++ interrupts = <0 95 4>; ++ clock-frequency = <400000>; ++ clocks = <&ap_clk AX620X_CLK_I2C5>; ++ clock-names = "baudclk"; ++ scl-gpio = <&port1a 27 0>; ++ sda-gpio = <&port1a 28 0>; ++ status = "disabled"; ++ }; ++ /* PAD i2c8 */ ++ i2c_hs0: i2c@49b0000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x49b0000 0x1000>; ++ interrupts = <0 96 4>; ++ clock-frequency = <400000>; ++ clocks = <&ap_clk AX620X_CLK_I2C_HS0>; ++ clock-names = "baudclk"; ++ scl-gpio = <&port2a 14 0>; ++ sda-gpio = <&port2a 15 0>; ++ status = "disabled"; ++ }; ++ /* PAD i2c9 */ ++ i2c_hs1: i2c@49b2000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x49b2000 0x1000>; ++ interrupts = <0 97 4>; ++ clock-frequency = <400000>; ++ clocks = <&ap_clk AX620X_CLK_I2C_HS1>; ++ clock-names = "baudclk"; ++ scl-gpio = <&port0a 30 0>; ++ sda-gpio = <&port0a 29 0>; ++ status = "disabled"; ++ }; ++ /* PAD i2c3 */ ++ i2c_hs2: i2c@49b4000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x49b4000 0x1000>; ++ interrupts = <0 98 4>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ clock-frequency = <400000>; ++ clocks = <&ap_clk AX620X_CLK_I2C_HS2>; ++ clock-names = "baudclk"; ++ status = "disabled"; ++ scl-gpio = <&port0a 21 0>; ++ sda-gpio = <&port0a 22 0>; ++ expander_io:expander_io@0x20 { ++ compatible = "axera,pcal6416a"; ++ reg = <0x20>; ++ interrput-parent = <&gic>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ status = "okay"; ++ }; ++ pt7c4563: pt7c4563@51 { ++ compatible = "diodes,pt7c4563"; ++ reg = <0x51>; ++ status = "disable"; ++ }; ++ ++ }; ++ ++ /* PAD i2c4 */ ++ i2c_hs3: i2c@49b6000 { ++ compatible = "snps,designware-i2c"; ++ reg = <0x49b6000 0x1000>; ++ interrupts = <0 99 4>; ++ clock-frequency = <400000>; ++ clocks = <&ap_clk AX620X_CLK_I2C_HS3>; ++ clock-names = "baudclk"; ++ scl-gpio = <&port0a 23 0>; ++ sda-gpio = <&port0a 24 0>; ++ status = "disabled"; ++ }; ++ ++ sdio_slave: sdio_slave@49d0000 { ++ compatible = "ax620,sdio_slave"; ++ reg = <0x49d0000 0x3000>; ++ interrupts = <0 134 4>; ++ status = "disabled"; ++ }; ++ ++ spi0: apb-spi0-master@0x04998000 { ++ compatible = "snps,dw-apb-ssi"; ++ reg = <0x04998000 0x400>; ++ interrupts = <0 122 4>; ++ //cs-gpios = <&port0a 6 0>; /* GPIO0-A6 for apb_ssi_p0’s cs0 */ ++ /* cs-gpios = <&port0a 7 0>; */ /*GPIO0-A7 for apb_ssi_p0’s cs1 */ ++ pinctrl-names = "default"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ clocks = <&ap_clk AX620X_CLK_SPI_M0>; ++ clock-names = "apb_ssi_clk"; ++ status = "disabled"; ++ }; ++ ++ spi1: apb-spi1-master@0x0499A000 { ++ compatible = "snps,dw-apb-ssi"; ++ reg = <0x0499A000 0x400>; ++ interrupts = <0 123 4>; ++ cs-gpios = <&port2a 5 0>; //config CS0 to GPIO2_A5 ++ pinctrl-names = "default"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ clocks = <&ap_clk AX620X_CLK_SPI_M1>; ++ clock-names = "apb_ssi_clk"; ++ status = "disabled"; ++ }; ++ ++ spi2: apb-spi2-master@0x0499C000 { ++ compatible = "snps,dw-apb-ssi"; ++ reg = <0x0499C000 0x400>; ++ interrupts = <0 124 4>; ++ pinctrl-names = "default"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ clocks = <&ap_clk AX620X_CLK_SPI_M2>; ++ clock-names = "apb_ssi_clk"; ++ status = "disabled"; ++ }; ++ ++ spi3: apb-spi3-slv@0x0499E000 { ++ compatible = "snps,dw-apb-ssi"; ++ reg = <0x0499E000 0x400>; ++ interrupts = <0 125 4>; ++ pinctrl-names = "default"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ clocks = <&ap_clk AX620X_CLK_SPI_S>; ++ clock-names = "apb_ssi_clk"; ++ status = "disabled"; ++ }; ++ ++ spi4: spi-master@0x08000000 { ++ compatible = "snps,dw-ssi"; ++ reg = <0x08000000 0x1000>; ++ interrupts = <0 8 4>; ++ cs-gpios = <&port1a 5 0>; //config CS0 to GPIO1_A5 ++ pinctrl-names = "default"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ clocks = <&flash_clk AX620X_CLK_H_SSI>; ++ clock-names = "spinand-flashclk"; ++ status = "disabled"; ++ }; ++ ++ i2s_mst: i2s_mst@49AC000 { ++ compatible = "axera,dwc-i2s-mst"; ++ reg = <0x49AC000 0x1000>; ++ interrupt-names = "i2s_mst"; ++ interrupts = <0 116 0x4>; ++ clocks = <&ap_clk AX620X_SCLK_I2S>, ++ <&ap_clk AX620X_CLK_I2S_REF1>; ++ clock-names = "i2s_sclk", "i2s_mclk"; ++ channel = <1>; ++ #sound-dai-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2s_slv: i2s_slv@49AE000 { ++ compatible = "axera,dwc-i2s-slv"; ++ reg = <0x49AE000 0x1000>; ++ interrupt-names = "i2s_slv"; ++ interrupts = <0 117 0x4>; ++ channel = <2>; ++ #sound-dai-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2s_tdm_mst: i2s_tdm_mst@49BE000 { ++ compatible = "axera,dwc-i2s-tdm-mst"; ++ reg = <0x49BE000 0x1000>; ++ interrupt-names = "i2s_mst_tdm"; ++ interrupts = <0 118 0x4>; ++ clocks = <&ap_clk AX620X_SCLK_I2S_TDM>, ++ <&ap_clk AX620X_CLK_I2S_REF1>; ++ clock-names = "i2s_sclk", "i2s_mclk"; ++ channel = <3>; ++ #sound-dai-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2s_tdm_slv: i2s_tdm_slv@49C0000 { ++ compatible = "axera,dwc-i2s-tdm-slv"; ++ reg = <0x49C0000 0x1000>; ++ interrupt-names = "i2s_slv_tdm"; ++ interrupts = <0 119 0x4>; ++ channel = <4>; ++ #sound-dai-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ cipher: ax_cipher@4900000 { ++ compatible = "axrea,cipher"; ++ reg = <0x4900000 0x40000>; ++ interrupts = <0 126 4>; ++ clocks = <&ap_clk AX620X_CLK_CE>, ++ <&ap_clk AX620X_CLK_CE_CNT>; ++ clock-names = "core", "cnt"; ++ }; ++ ++ ax_perf_bm: ax_perf_bm@181A000 { ++ compatible = "axera,perf_bm"; ++ reg = <0x181A000 0x4000>; ++ interrupts = <0 17 4>; ++ reg-shift = <2>; ++ }; ++ pwm0: pwm0@49a2000 { ++ compatible = "axera,ax620x-pwm"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ reg = <0x49a2000 0x2000>; ++ #pwm-cells = <2>; ++ clocks = <&ap_clk AX620X_CLK_PWM00>, <&ap_clk AX620X_CLK_PWM01>, ++ <&ap_clk AX620X_CLK_PWM02>, <&ap_clk AX620X_CLK_PWM03>; ++ clock-names = "pwm-ch0-clk", "pwm-ch1-clk", "pwm-ch2-clk", "pwm-ch3-clk"; ++ }; ++ ++ pwm1: pwm1@49a4000 { ++ compatible = "axera,ax620x-pwm"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ reg = <0x49a4000 0x2000>; ++ #pwm-cells = <2>; ++ clocks = <&ap_clk AX620X_CLK_PWM10>, <&ap_clk AX620X_CLK_PWM11>, ++ <&ap_clk AX620X_CLK_PWM12>, <&ap_clk AX620X_CLK_PWM13>; ++ clock-names = "pwm-ch0-clk", "pwm-ch1-clk", "pwm-ch2-clk", "pwm-ch3-clk"; ++ }; ++ ++ pwm2: pwm2@4946000 { ++ compatible = "axera,ax620x-pwm"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ reg = <0x49a6000 0x2000>; ++ #pwm-cells = <2>; ++ clocks = <&ap_clk AX620X_CLK_PWM20>, <&ap_clk AX620X_CLK_PWM21>, ++ <&ap_clk AX620X_CLK_PWM22>, <&ap_clk AX620X_CLK_PWM23>; ++ clock-names = "pwm-ch0-clk", "pwm-ch1-clk", "pwm-ch2-clk", "pwm-ch3-clk"; ++ }; ++ ++ iram: iram@0 { ++ compatible = "axera,ax620x-iram", "syscon"; ++ reg = <0x0 0x18000>; ++ }; ++ ++ gtmr: gtmr@1930000 { ++ compatible = "axera,ax620x-gtmr", "syscon"; ++ reg = <0x1930000 0x1000>; ++ clock-frequency = <24000000>; ++ }; ++ ++ npu_sys: npu_sys@3F00000 { ++ compatible = "axera,npu_sys", "syscon"; ++ reg = <0x3f00000 0x400>; ++ }; ++ ++ pmu: power_management@2100000 { ++ compatible = "axera,ax620x-pmu", "syscon"; ++ reg = <0x02100000 0x400>; ++ interrupts = <0 48 4>; ++ interrupt-names = "deb_gpio_lp_int"; ++ }; ++ }; ++ ++ hwinfo: hwinfo { ++ compatible = "ax,hwinfo"; ++ status = "okay"; ++ }; ++ tsensor: tsensor@0,2000000 { ++ compatible = "axera,ax620-tsensor"; ++ reg = <0x2000000 0x1000>; ++ interrupts = <0 49 4>; ++ clocks = <&common_clk AX620X_CLK_THM>; ++ clock-names = "thermal_clk"; ++ #thermal-sensor-cells = <1>; ++ }; ++ thermal-zones { ++ soc_thm: soc_thm { ++ polling-delay = <1000>; ++ polling-delay-passive = <100>; ++ sustainable-power = <4500>; ++ /* sensor ID */ ++ thermal-sensors = <&tsensor 0>; ++ trips { ++ threshold: trip-point@0 { ++ temperature = <80000>; ++ hysteresis = <0>; ++ type = "passive"; ++ }; ++ target: trip-point@1 { ++ temperature = <105000>; ++ hysteresis = <0>; ++ type = "passive"; ++ }; ++ soc_crit: soc-crit { ++ temperature = <120000>; ++ hysteresis = <0>; ++ type = "passive"; ++ }; ++ }; ++ }; ++ }; ++ ++ drm { ++ compatible = "axera,display-subsystem"; ++ ports = <&dpu_out>; ++ status = "okay"; ++ }; ++ ++ vo: vo@4400000 { ++ compatible = "axera,vo"; ++ reg = <0x4400000 0x1000>, ++ <0x4430000 0x400>; ++ clocks = <&mm_clk AX620X_CLK_DPU>, <&mm_clk AX620X_CLK_DPI>; ++ clock-names = "clk_dpu", "clk_dpi"; ++ interrupts = <0 19 4>; ++ status = "okay"; ++ }; ++ ++ crtc: crtc@0 { ++ compatible = "axera,crtc"; ++ status = "okay"; ++ ++ dpu_out: port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ dpu_out2dpi_or_bt: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&dpi_or_bt_in>; ++ }; ++ ++ dpu_out_dsi: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&dsi_in>; ++ }; ++ }; ++ }; ++ ++ panel: panel@0 { ++ compatible = "axera,simple-panel"; ++ status = "disabled"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port { ++ reg = <0>; ++ dpi_or_bt_in: endpoint { ++ remote-endpoint = <&dpu_out2dpi_or_bt>; ++ }; ++ }; ++ }; ++ }; ++ ++ dphy: dphy@44b0000{ ++ compatible = "axera,dphy"; ++ reg = <0x44b0000 0x1000>, ++ <0x2220000 0x1000>; ++ clocks = <&dispc_clk AX620X_CLK_DPHY_REF0>, ++ <&dispc_clk AX620X_CLK_DPHY_TX_ESC0>, ++ <&dispc_clk AX620X_CLK_DPHY2DSI_HS0>; ++ clock-names = "dphy_ref_clk", "dphy_esc_clk", "dphy_hs_clk"; ++ #phy-cells = <0>; ++ }; ++ ++ dsi: dsi@4490000 { ++ compatible = "axera,dsi"; ++ status = "disabled"; ++ enable-dsi = <0x2>; ++ reg = <0x4490000 0x1000>, ++ <0x44A0000 0x1000>; ++ clocks = <&dispc_clk AX620X_PCLK_DSI0>, <&dispc_clk AX620X_CLK_DSI_SYS0>, ++ <&dispc_clk AX620X_PCLK_DSI1>, <&dispc_clk AX620X_CLK_DSI_SYS1>; ++ clock-names = "dsi0_p_clk", "dsi0_sys_clk", "dsi1_p_clk", "dsi1_sys_clk"; ++ interrupts = <0 25 4>, <0 26 4>; ++ phys = <&dphy>; ++ phy-names = "dphy"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ dsi_output: endpoint { ++ remote-endpoint = <&dsi_panel_input>; ++ }; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ dsi_in: endpoint { ++ remote-endpoint = <&dpu_out_dsi>; ++ }; ++ }; ++ }; ++ ++ panel_dsi: panel_dsi0@0 { ++ compatible = "axera,simple-dsi-panel"; ++ reg = <0>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0>; ++ dsi_panel_input: endpoint { ++ remote-endpoint = <&dsi_output>; ++ }; ++ }; ++ }; ++ }; ++ }; ++}; +diff --git a/arch/arm/configs/axera_AX620U_defconfig b/arch/arm/configs/axera_AX620U_defconfig +new file mode 100644 +index 000000000..426a0d113 +--- /dev/null ++++ b/arch/arm/configs/axera_AX620U_defconfig +@@ -0,0 +1,3383 @@ ++# ++# Automatically generated file; DO NOT EDIT. ++# Linux/arm 4.19.125 Kernel Configuration ++# ++ ++# ++# Compiler: arm-linux-gnueabihf-gcc (Linaro GCC 7.5-2019.12) 7.5.0 ++# ++CONFIG_CC_IS_GCC=y ++CONFIG_GCC_VERSION=70500 ++CONFIG_CLANG_VERSION=0 ++CONFIG_CC_HAS_ASM_GOTO=y ++CONFIG_IRQ_WORK=y ++CONFIG_BUILDTIME_EXTABLE_SORT=y ++ ++# ++# General setup ++# ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++# CONFIG_COMPILE_TEST is not set ++CONFIG_LOCALVERSION="" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_BUILD_SALT="" ++CONFIG_HAVE_KERNEL_GZIP=y ++CONFIG_HAVE_KERNEL_LZMA=y ++CONFIG_HAVE_KERNEL_XZ=y ++CONFIG_HAVE_KERNEL_LZO=y ++CONFIG_HAVE_KERNEL_LZ4=y ++CONFIG_KERNEL_GZIP=y ++# CONFIG_KERNEL_LZMA is not set ++# CONFIG_KERNEL_XZ is not set ++# CONFIG_KERNEL_LZO is not set ++# CONFIG_KERNEL_LZ4 is not set ++CONFIG_DEFAULT_HOSTNAME="(none)" ++CONFIG_SWAP=y ++CONFIG_SYSVIPC=y ++CONFIG_SYSVIPC_SYSCTL=y ++# CONFIG_POSIX_MQUEUE is not set ++CONFIG_CROSS_MEMORY_ATTACH=y ++# CONFIG_USELIB is not set ++# CONFIG_AUDIT is not set ++CONFIG_HAVE_ARCH_AUDITSYSCALL=y ++ ++# ++# IRQ subsystem ++# ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_GENERIC_IRQ_SHOW=y ++CONFIG_GENERIC_IRQ_SHOW_LEVEL=y ++CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y ++CONFIG_GENERIC_IRQ_MIGRATION=y ++CONFIG_HARDIRQS_SW_RESEND=y ++CONFIG_GENERIC_IRQ_CHIP=y ++CONFIG_IRQ_DOMAIN=y ++CONFIG_IRQ_DOMAIN_HIERARCHY=y ++CONFIG_HANDLE_DOMAIN_IRQ=y ++CONFIG_IRQ_FORCED_THREADING=y ++CONFIG_SPARSE_IRQ=y ++# CONFIG_GENERIC_IRQ_DEBUGFS is not set ++CONFIG_GENERIC_IRQ_MULTI_HANDLER=y ++CONFIG_ARCH_CLOCKSOURCE_DATA=y ++CONFIG_GENERIC_TIME_VSYSCALL=y ++CONFIG_GENERIC_CLOCKEVENTS=y ++CONFIG_ARCH_HAS_TICK_BROADCAST=y ++CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y ++ ++# ++# Timers subsystem ++# ++CONFIG_TICK_ONESHOT=y ++CONFIG_HZ_PERIODIC=y ++# CONFIG_NO_HZ_IDLE is not set ++# CONFIG_NO_HZ_FULL is not set ++# CONFIG_NO_HZ is not set ++CONFIG_HIGH_RES_TIMERS=y ++# CONFIG_PREEMPT_NONE is not set ++# CONFIG_PREEMPT_VOLUNTARY is not set ++CONFIG_PREEMPT=y ++CONFIG_PREEMPT_COUNT=y ++ ++# ++# CPU/Task time and stats accounting ++# ++CONFIG_TICK_CPU_ACCOUNTING=y ++# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set ++# CONFIG_IRQ_TIME_ACCOUNTING is not set ++# CONFIG_BSD_PROCESS_ACCT is not set ++# CONFIG_TASKSTATS is not set ++# CONFIG_CPU_ISOLATION is not set ++ ++# ++# RCU Subsystem ++# ++CONFIG_PREEMPT_RCU=y ++# CONFIG_RCU_EXPERT is not set ++CONFIG_SRCU=y ++CONFIG_TREE_SRCU=y ++CONFIG_TASKS_RCU=y ++CONFIG_RCU_STALL_COMMON=y ++CONFIG_RCU_NEED_SEGCBLIST=y ++CONFIG_BUILD_BIN2C=y ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_LOG_BUF_SHIFT=17 ++CONFIG_AXLOG_BUF_SHIFT=17 ++CONFIG_LOG_CPU_MAX_BUF_SHIFT=13 ++CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 ++CONFIG_GENERIC_SCHED_CLOCK=y ++CONFIG_CGROUPS=y ++# CONFIG_MEMCG is not set ++# CONFIG_BLK_CGROUP is not set ++# CONFIG_CGROUP_SCHED is not set ++# CONFIG_CGROUP_PIDS is not set ++# CONFIG_CGROUP_RDMA is not set ++# CONFIG_CGROUP_FREEZER is not set ++CONFIG_CPUSETS=y ++CONFIG_PROC_PID_CPUSET=y ++# CONFIG_CGROUP_DEVICE is not set ++# CONFIG_CGROUP_CPUACCT is not set ++# CONFIG_CGROUP_DEBUG is not set ++CONFIG_NAMESPACES=y ++# CONFIG_UTS_NS is not set ++# CONFIG_IPC_NS is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set ++# CONFIG_NET_NS is not set ++# CONFIG_CHECKPOINT_RESTORE is not set ++# CONFIG_SCHED_AUTOGROUP is not set ++# CONFIG_SYSFS_DEPRECATED is not set ++# CONFIG_RELAY is not set ++# CONFIG_BLK_DEV_INITRD is not set ++CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y ++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set ++CONFIG_SYSCTL=y ++CONFIG_ANON_INODES=y ++CONFIG_HAVE_UID16=y ++CONFIG_BPF=y ++# CONFIG_EXPERT is not set ++CONFIG_UID16=y ++CONFIG_MULTIUSER=y ++CONFIG_SYSFS_SYSCALL=y ++CONFIG_FHANDLE=y ++CONFIG_POSIX_TIMERS=y ++CONFIG_PRINTK=y ++CONFIG_PRINTK_NMI=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++CONFIG_BASE_FULL=y ++CONFIG_FUTEX=y ++CONFIG_FUTEX_PI=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_TIMERFD=y ++CONFIG_EVENTFD=y ++CONFIG_SHMEM=y ++CONFIG_AIO=y ++CONFIG_ADVISE_SYSCALLS=y ++CONFIG_MEMBARRIER=y ++CONFIG_KALLSYMS=y ++# CONFIG_KALLSYMS_ALL is not set ++CONFIG_KALLSYMS_BASE_RELATIVE=y ++# CONFIG_BPF_SYSCALL is not set ++# CONFIG_USERFAULTFD is not set ++CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y ++CONFIG_RSEQ=y ++# CONFIG_EMBEDDED is not set ++CONFIG_HAVE_PERF_EVENTS=y ++CONFIG_PERF_USE_VMALLOC=y ++ ++# ++# Kernel Performance Events And Counters ++# ++# CONFIG_PERF_EVENTS is not set ++CONFIG_VM_EVENT_COUNTERS=y ++CONFIG_SLUB_DEBUG=y ++CONFIG_COMPAT_BRK=y ++# CONFIG_SLAB is not set ++CONFIG_SLUB=y ++CONFIG_SLAB_MERGE_DEFAULT=y ++# CONFIG_SLAB_FREELIST_RANDOM is not set ++# CONFIG_SLAB_FREELIST_HARDENED is not set ++CONFIG_SLUB_CPU_PARTIAL=y ++CONFIG_PROFILING=y ++CONFIG_ARM=y ++CONFIG_ARM_HAS_SG_CHAIN=y ++CONFIG_MIGHT_HAVE_PCI=y ++CONFIG_SYS_SUPPORTS_APM_EMULATION=y ++CONFIG_HAVE_PROC_CPU=y ++CONFIG_NO_IOPORT_MAP=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_RWSEM_XCHGADD_ALGORITHM=y ++CONFIG_FIX_EARLYCON_MEM=y ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_ARCH_SUPPORTS_UPROBES=y ++CONFIG_ARM_PATCH_PHYS_VIRT=y ++CONFIG_GENERIC_BUG=y ++CONFIG_PGTABLE_LEVELS=2 ++ ++# ++# System Type ++# ++CONFIG_MMU=y ++CONFIG_ARCH_MMAP_RND_BITS_MIN=8 ++CONFIG_ARCH_MMAP_RND_BITS_MAX=16 ++CONFIG_ARCH_MULTIPLATFORM=y ++# CONFIG_ARCH_EBSA110 is not set ++# CONFIG_ARCH_EP93XX is not set ++# CONFIG_ARCH_FOOTBRIDGE is not set ++# CONFIG_ARCH_NETX is not set ++# CONFIG_ARCH_IOP13XX is not set ++# CONFIG_ARCH_IOP32X is not set ++# CONFIG_ARCH_IOP33X is not set ++# CONFIG_ARCH_IXP4XX is not set ++# CONFIG_ARCH_DOVE is not set ++# CONFIG_ARCH_KS8695 is not set ++# CONFIG_ARCH_W90X900 is not set ++# CONFIG_ARCH_LPC32XX is not set ++# CONFIG_ARCH_PXA is not set ++# CONFIG_ARCH_RPC is not set ++# CONFIG_ARCH_SA1100 is not set ++# CONFIG_ARCH_S3C24XX is not set ++# CONFIG_ARCH_DAVINCI is not set ++# CONFIG_ARCH_OMAP1 is not set ++ ++# ++# Multiple platform selection ++# ++ ++# ++# CPU Core family selection ++# ++# CONFIG_ARCH_MULTI_V6 is not set ++CONFIG_ARCH_MULTI_V7=y ++CONFIG_ARCH_MULTI_V6_V7=y ++# CONFIG_ARCH_VIRT is not set ++# CONFIG_ARCH_ACTIONS is not set ++# CONFIG_ARCH_ALPINE is not set ++# CONFIG_ARCH_ARTPEC is not set ++# CONFIG_ARCH_AT91 is not set ++CONFIG_ARCH_AXERA=y ++ ++# ++# Axera platform type ++# ++CONFIG_ARCH_AX620=y ++# CONFIG_ARCH_BCM is not set ++# CONFIG_ARCH_BERLIN is not set ++# CONFIG_ARCH_DIGICOLOR is not set ++# CONFIG_ARCH_EXYNOS is not set ++# CONFIG_ARCH_HIGHBANK is not set ++# CONFIG_ARCH_HISI is not set ++# CONFIG_ARCH_MXC is not set ++# CONFIG_ARCH_KEYSTONE is not set ++# CONFIG_ARCH_MEDIATEK is not set ++# CONFIG_ARCH_MESON is not set ++# CONFIG_ARCH_MMP is not set ++# CONFIG_ARCH_MVEBU is not set ++# CONFIG_ARCH_NPCM is not set ++ ++# ++# TI OMAP/AM/DM/DRA Family ++# ++# CONFIG_ARCH_OMAP3 is not set ++# CONFIG_ARCH_OMAP4 is not set ++# CONFIG_SOC_OMAP5 is not set ++# CONFIG_SOC_AM33XX is not set ++# CONFIG_SOC_AM43XX is not set ++# CONFIG_SOC_DRA7XX is not set ++# CONFIG_ARCH_SIRF is not set ++# CONFIG_ARCH_QCOM is not set ++# CONFIG_ARCH_REALVIEW is not set ++# CONFIG_ARCH_ROCKCHIP is not set ++# CONFIG_ARCH_S5PV210 is not set ++# CONFIG_ARCH_RENESAS is not set ++# CONFIG_ARCH_SOCFPGA is not set ++# CONFIG_PLAT_SPEAR is not set ++# CONFIG_ARCH_STI is not set ++# CONFIG_ARCH_STM32 is not set ++# CONFIG_ARCH_SUNXI is not set ++# CONFIG_ARCH_TANGO is not set ++# CONFIG_ARCH_TEGRA is not set ++# CONFIG_ARCH_UNIPHIER is not set ++# CONFIG_ARCH_U8500 is not set ++# CONFIG_ARCH_VEXPRESS is not set ++# CONFIG_ARCH_WM8850 is not set ++# CONFIG_ARCH_ZX is not set ++# CONFIG_ARCH_ZYNQ is not set ++ ++# ++# Axera platform type ++# ++ ++# ++# Processor Type ++# ++CONFIG_CPU_V7=y ++CONFIG_CPU_THUMB_CAPABLE=y ++CONFIG_CPU_32v6K=y ++CONFIG_CPU_32v7=y ++CONFIG_CPU_ABRT_EV7=y ++CONFIG_CPU_PABRT_V7=y ++CONFIG_CPU_CACHE_V7=y ++CONFIG_CPU_CACHE_VIPT=y ++CONFIG_CPU_COPY_V6=y ++CONFIG_CPU_TLB_V7=y ++CONFIG_CPU_HAS_ASID=y ++CONFIG_CPU_CP15=y ++CONFIG_CPU_CP15_MMU=y ++ ++# ++# Processor Features ++# ++# CONFIG_ARM_LPAE is not set ++CONFIG_ARM_THUMB=y ++# CONFIG_ARM_THUMBEE is not set ++CONFIG_ARM_VIRT_EXT=y ++CONFIG_SWP_EMULATE=y ++# CONFIG_CPU_ICACHE_DISABLE is not set ++# CONFIG_CPU_BPREDICT_DISABLE is not set ++CONFIG_CPU_SPECTRE=y ++CONFIG_HARDEN_BRANCH_PREDICTOR=y ++CONFIG_KUSER_HELPERS=y ++CONFIG_VDSO=y ++CONFIG_OUTER_CACHE=y ++CONFIG_OUTER_CACHE_SYNC=y ++CONFIG_MIGHT_HAVE_CACHE_L2X0=y ++CONFIG_CACHE_L2X0=y ++# CONFIG_PL310_ERRATA_588369 is not set ++# CONFIG_PL310_ERRATA_727915 is not set ++CONFIG_PL310_ERRATA_753970=y ++# CONFIG_PL310_ERRATA_769419 is not set ++CONFIG_ARM_L1_CACHE_SHIFT_6=y ++CONFIG_ARM_L1_CACHE_SHIFT=6 ++CONFIG_ARM_DMA_MEM_BUFFERABLE=y ++CONFIG_ARM_HEAVY_MB=y ++CONFIG_DEBUG_ALIGN_RODATA=y ++# CONFIG_ARM_ERRATA_430973 is not set ++CONFIG_ARM_ERRATA_643719=y ++CONFIG_ARM_ERRATA_720789=y ++# CONFIG_ARM_ERRATA_754322 is not set ++# CONFIG_ARM_ERRATA_754327 is not set ++# CONFIG_ARM_ERRATA_764369 is not set ++# CONFIG_ARM_ERRATA_775420 is not set ++# CONFIG_ARM_ERRATA_798181 is not set ++# CONFIG_ARM_ERRATA_773022 is not set ++# CONFIG_ARM_ERRATA_818325_852422 is not set ++# CONFIG_ARM_ERRATA_821420 is not set ++# CONFIG_ARM_ERRATA_825619 is not set ++# CONFIG_ARM_ERRATA_852421 is not set ++# CONFIG_ARM_ERRATA_852423 is not set ++ ++# ++# Bus support ++# ++# CONFIG_PCI is not set ++ ++# ++# PCI Endpoint ++# ++# CONFIG_PCI_ENDPOINT is not set ++# CONFIG_PCCARD is not set ++ ++# ++# Kernel Features ++# ++CONFIG_HAVE_SMP=y ++CONFIG_SMP=y ++CONFIG_SMP_ON_UP=y ++CONFIG_ARM_CPU_TOPOLOGY=y ++# CONFIG_SCHED_MC is not set ++# CONFIG_SCHED_SMT is not set ++CONFIG_HAVE_ARM_SCU=y ++CONFIG_HAVE_ARM_ARCH_TIMER=y ++CONFIG_HAVE_ARM_TWD=y ++CONFIG_MCPM=y ++# CONFIG_BIG_LITTLE is not set ++CONFIG_VMSPLIT_3G=y ++# CONFIG_VMSPLIT_3G_OPT is not set ++# CONFIG_VMSPLIT_2G is not set ++# CONFIG_VMSPLIT_1G is not set ++CONFIG_PAGE_OFFSET=0xC0000000 ++CONFIG_NR_CPUS=4 ++CONFIG_HOTPLUG_CPU=y ++# CONFIG_ARM_PSCI is not set ++CONFIG_ARCH_NR_GPIO=0 ++CONFIG_HZ_FIXED=0 ++# CONFIG_HZ_100 is not set ++CONFIG_HZ_200=y ++# CONFIG_HZ_250 is not set ++# CONFIG_HZ_300 is not set ++# CONFIG_HZ_500 is not set ++# CONFIG_HZ_1000 is not set ++CONFIG_HZ=200 ++CONFIG_SCHED_HRTICK=y ++# CONFIG_THUMB2_KERNEL is not set ++CONFIG_ARM_PATCH_IDIV=y ++CONFIG_AEABI=y ++# CONFIG_OABI_COMPAT is not set ++CONFIG_HAVE_ARCH_PFN_VALID=y ++CONFIG_HIGHMEM=y ++CONFIG_HIGHPTE=y ++CONFIG_CPU_SW_DOMAIN_PAN=y ++CONFIG_ARCH_WANT_GENERAL_HUGETLB=y ++CONFIG_ARM_MODULE_PLTS=y ++CONFIG_FORCE_MAX_ZONEORDER=11 ++CONFIG_ALIGNMENT_TRAP=y ++# CONFIG_UACCESS_WITH_MEMCPY is not set ++CONFIG_SECCOMP=y ++# CONFIG_PARAVIRT is not set ++# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set ++# CONFIG_XEN is not set ++ ++# ++# Boot options ++# ++CONFIG_USE_OF=y ++CONFIG_ATAGS=y ++# CONFIG_DEPRECATED_PARAM_STRUCT is not set ++CONFIG_ZBOOT_ROM_TEXT=0x0 ++CONFIG_ZBOOT_ROM_BSS=0x0 ++# CONFIG_ARM_APPENDED_DTB is not set ++CONFIG_CMDLINE="console=ttyAMA0" ++CONFIG_CMDLINE_FROM_BOOTLOADER=y ++# CONFIG_CMDLINE_EXTEND is not set ++# CONFIG_CMDLINE_FORCE is not set ++# CONFIG_CRASH_DUMP is not set ++CONFIG_AUTO_ZRELADDR=y ++# CONFIG_EFI is not set ++ ++# ++# CPU Power Management ++# ++ ++# ++# CPU Frequency scaling ++# ++# CONFIG_CPU_FREQ is not set ++ ++# ++# CPU Idle ++# ++# CONFIG_CPU_IDLE is not set ++ ++# ++# Floating point emulation ++# ++ ++# ++# At least one emulation must be selected ++# ++CONFIG_VFP=y ++CONFIG_VFPv3=y ++CONFIG_NEON=y ++CONFIG_KERNEL_MODE_NEON=y ++ ++# ++# Power management options ++# ++# CONFIG_SUSPEND is not set ++# CONFIG_HIBERNATION is not set ++# CONFIG_PM is not set ++# CONFIG_APM_EMULATION is not set ++CONFIG_ARCH_SUSPEND_POSSIBLE=y ++CONFIG_ARCH_HIBERNATION_POSSIBLE=y ++ ++# ++# Firmware Drivers ++# ++CONFIG_HAVE_ARM_SMCCC=y ++# CONFIG_GOOGLE_FIRMWARE is not set ++ ++# ++# Tegra firmware driver ++# ++# CONFIG_ARM_CRYPTO is not set ++# CONFIG_VIRTUALIZATION is not set ++ ++# ++# General architecture-dependent options ++# ++CONFIG_OPROFILE=y ++CONFIG_HAVE_OPROFILE=y ++# CONFIG_KPROBES is not set ++# CONFIG_JUMP_LABEL is not set ++CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y ++CONFIG_ARCH_USE_BUILTIN_BSWAP=y ++CONFIG_HAVE_KPROBES=y ++CONFIG_HAVE_KRETPROBES=y ++CONFIG_HAVE_OPTPROBES=y ++CONFIG_HAVE_NMI=y ++CONFIG_HAVE_ARCH_TRACEHOOK=y ++CONFIG_HAVE_DMA_CONTIGUOUS=y ++CONFIG_GENERIC_SMP_IDLE_THREAD=y ++CONFIG_GENERIC_IDLE_POLL_SETUP=y ++CONFIG_ARCH_HAS_FORTIFY_SOURCE=y ++CONFIG_ARCH_HAS_SET_MEMORY=y ++CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y ++CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y ++CONFIG_HAVE_RSEQ=y ++CONFIG_HAVE_CLK=y ++CONFIG_HAVE_PERF_REGS=y ++CONFIG_HAVE_PERF_USER_STACK_DUMP=y ++CONFIG_HAVE_ARCH_JUMP_LABEL=y ++CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y ++CONFIG_HAVE_ARCH_SECCOMP_FILTER=y ++CONFIG_SECCOMP_FILTER=y ++CONFIG_HAVE_STACKPROTECTOR=y ++CONFIG_CC_HAS_STACKPROTECTOR_NONE=y ++CONFIG_STACKPROTECTOR=y ++CONFIG_STACKPROTECTOR_STRONG=y ++CONFIG_HAVE_CONTEXT_TRACKING=y ++CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y ++CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y ++CONFIG_HAVE_MOD_ARCH_SPECIFIC=y ++CONFIG_MODULES_USE_ELF_REL=y ++CONFIG_ARCH_HAS_ELF_RANDOMIZE=y ++CONFIG_HAVE_ARCH_MMAP_RND_BITS=y ++CONFIG_HAVE_EXIT_THREAD=y ++CONFIG_ARCH_MMAP_RND_BITS=8 ++CONFIG_CLONE_BACKWARDS=y ++CONFIG_OLD_SIGSUSPEND3=y ++CONFIG_OLD_SIGACTION=y ++CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y ++CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y ++CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y ++CONFIG_STRICT_KERNEL_RWX=y ++CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y ++CONFIG_STRICT_MODULE_RWX=y ++CONFIG_ARCH_HAS_PHYS_TO_DMA=y ++CONFIG_REFCOUNT_FULL=y ++ ++# ++# GCOV-based kernel profiling ++# ++# CONFIG_GCOV_KERNEL is not set ++CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y ++CONFIG_PLUGIN_HOSTCC="" ++CONFIG_HAVE_GCC_PLUGINS=y ++CONFIG_RT_MUTEXES=y ++CONFIG_BASE_SMALL=0 ++CONFIG_MODULES=y ++# CONFIG_MODULE_FORCE_LOAD is not set ++CONFIG_MODULE_UNLOAD=y ++# CONFIG_MODULE_FORCE_UNLOAD is not set ++# CONFIG_MODVERSIONS is not set ++# CONFIG_MODULE_SRCVERSION_ALL is not set ++# CONFIG_MODULE_SIG is not set ++# CONFIG_MODULE_COMPRESS is not set ++# CONFIG_TRIM_UNUSED_KSYMS is not set ++CONFIG_BLOCK=y ++CONFIG_LBDAF=y ++CONFIG_BLK_SCSI_REQUEST=y ++# CONFIG_BLK_DEV_BSG is not set ++# CONFIG_BLK_DEV_BSGLIB is not set ++# CONFIG_BLK_DEV_INTEGRITY is not set ++# CONFIG_BLK_DEV_ZONED is not set ++CONFIG_BLK_CMDLINE_PARSER=y ++# CONFIG_BLK_WBT is not set ++CONFIG_BLK_DEBUG_FS=y ++# CONFIG_BLK_SED_OPAL is not set ++ ++# ++# Partition Types ++# ++CONFIG_PARTITION_ADVANCED=y ++# CONFIG_ACORN_PARTITION is not set ++# CONFIG_AIX_PARTITION is not set ++# CONFIG_OSF_PARTITION is not set ++# CONFIG_AMIGA_PARTITION is not set ++# CONFIG_ATARI_PARTITION is not set ++# CONFIG_MAC_PARTITION is not set ++CONFIG_MSDOS_PARTITION=y ++# CONFIG_BSD_DISKLABEL is not set ++# CONFIG_MINIX_SUBPARTITION is not set ++# CONFIG_SOLARIS_X86_PARTITION is not set ++# CONFIG_UNIXWARE_DISKLABEL is not set ++# CONFIG_LDM_PARTITION is not set ++# CONFIG_SGI_PARTITION is not set ++# CONFIG_ULTRIX_PARTITION is not set ++# CONFIG_SUN_PARTITION is not set ++# CONFIG_KARMA_PARTITION is not set ++CONFIG_EFI_PARTITION=y ++# CONFIG_SYSV68_PARTITION is not set ++CONFIG_CMDLINE_PARTITION=y ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++# CONFIG_IOSCHED_DEADLINE is not set ++# CONFIG_IOSCHED_CFQ is not set ++CONFIG_DEFAULT_NOOP=y ++CONFIG_DEFAULT_IOSCHED="noop" ++CONFIG_MQ_IOSCHED_DEADLINE=y ++CONFIG_MQ_IOSCHED_KYBER=y ++# CONFIG_IOSCHED_BFQ is not set ++CONFIG_UNINLINE_SPIN_UNLOCK=y ++CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y ++CONFIG_MUTEX_SPIN_ON_OWNER=y ++CONFIG_RWSEM_SPIN_ON_OWNER=y ++CONFIG_LOCK_SPIN_ON_OWNER=y ++ ++# ++# Executable file formats ++# ++CONFIG_BINFMT_ELF=y ++# CONFIG_BINFMT_ELF_FDPIC is not set ++CONFIG_ELFCORE=y ++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set ++CONFIG_BINFMT_SCRIPT=y ++# CONFIG_BINFMT_FLAT is not set ++# CONFIG_BINFMT_MISC is not set ++CONFIG_COREDUMP=y ++ ++# ++# Memory Management options ++# ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++CONFIG_HAVE_MEMBLOCK=y ++CONFIG_NO_BOOTMEM=y ++CONFIG_SPLIT_PTLOCK_CPUS=4 ++CONFIG_COMPACTION=y ++CONFIG_MIGRATION=y ++CONFIG_BOUNCE=y ++# CONFIG_KSM is not set ++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 ++# CONFIG_CLEANCACHE is not set ++# CONFIG_FRONTSWAP is not set ++# CONFIG_CMA is not set ++# CONFIG_ZPOOL is not set ++# CONFIG_ZBUD is not set ++# CONFIG_ZSMALLOC is not set ++CONFIG_GENERIC_EARLY_IOREMAP=y ++# CONFIG_IDLE_PAGE_TRACKING is not set ++# CONFIG_PERCPU_STATS is not set ++# CONFIG_GUP_BENCHMARK is not set ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++# CONFIG_PACKET_DIAG is not set ++CONFIG_UNIX=y ++# CONFIG_UNIX_DIAG is not set ++# CONFIG_TLS is not set ++CONFIG_XFRM=y ++# CONFIG_XFRM_USER is not set ++# CONFIG_XFRM_SUB_POLICY is not set ++# CONFIG_XFRM_MIGRATE is not set ++# CONFIG_XFRM_STATISTICS is not set ++# CONFIG_NET_KEY is not set ++CONFIG_INET=y ++# CONFIG_IP_MULTICAST is not set ++# CONFIG_IP_ADVANCED_ROUTER is not set ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++CONFIG_IP_PNP_BOOTP=y ++# CONFIG_IP_PNP_RARP is not set ++# CONFIG_NET_IPIP is not set ++# CONFIG_NET_IPGRE_DEMUX is not set ++# CONFIG_SYN_COOKIES is not set ++# CONFIG_NET_IPVTI is not set ++# CONFIG_NET_FOU is not set ++# CONFIG_INET_AH is not set ++# CONFIG_INET_ESP is not set ++# CONFIG_INET_IPCOMP is not set ++CONFIG_INET_XFRM_MODE_TRANSPORT=y ++CONFIG_INET_XFRM_MODE_TUNNEL=y ++CONFIG_INET_XFRM_MODE_BEET=y ++CONFIG_INET_DIAG=y ++CONFIG_INET_TCP_DIAG=y ++# CONFIG_INET_UDP_DIAG is not set ++# CONFIG_INET_RAW_DIAG is not set ++# CONFIG_INET_DIAG_DESTROY is not set ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++# CONFIG_TCP_MD5SIG is not set ++# CONFIG_IPV6 is not set ++# CONFIG_NETWORK_SECMARK is not set ++CONFIG_NET_PTP_CLASSIFY=y ++# CONFIG_NETWORK_PHY_TIMESTAMPING is not set ++# CONFIG_NETFILTER is not set ++# CONFIG_BPFILTER is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_RDS is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++# CONFIG_L2TP is not set ++# CONFIG_BRIDGE is not set ++CONFIG_HAVE_NET_DSA=y ++# CONFIG_NET_DSA is not set ++# CONFIG_VLAN_8021Q is not set ++# CONFIG_DECNET is not set ++# CONFIG_LLC2 is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_PHONET is not set ++# CONFIG_IEEE802154 is not set ++# CONFIG_NET_SCHED is not set ++# CONFIG_DCB is not set ++CONFIG_DNS_RESOLVER=y ++# CONFIG_BATMAN_ADV is not set ++# CONFIG_OPENVSWITCH is not set ++# CONFIG_VSOCKETS is not set ++# CONFIG_NETLINK_DIAG is not set ++# CONFIG_MPLS is not set ++# CONFIG_NET_NSH is not set ++# CONFIG_HSR is not set ++# CONFIG_NET_SWITCHDEV is not set ++# CONFIG_NET_L3_MASTER_DEV is not set ++# CONFIG_NET_NCSI is not set ++CONFIG_RPS=y ++CONFIG_RFS_ACCEL=y ++CONFIG_XPS=y ++# CONFIG_CGROUP_NET_PRIO is not set ++# CONFIG_CGROUP_NET_CLASSID is not set ++CONFIG_NET_RX_BUSY_POLL=y ++CONFIG_BQL=y ++# CONFIG_BPF_JIT is not set ++CONFIG_NET_FLOW_LIMIT=y ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_CAN is not set ++# CONFIG_BT is not set ++# CONFIG_AF_RXRPC is not set ++# CONFIG_AF_KCM is not set ++# CONFIG_WIRELESS is not set ++# CONFIG_WIMAX is not set ++# CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set ++# CONFIG_CAIF is not set ++# CONFIG_CEPH_LIB is not set ++# CONFIG_NFC is not set ++# CONFIG_PSAMPLE is not set ++# CONFIG_NET_IFE is not set ++# CONFIG_LWTUNNEL is not set ++CONFIG_GRO_CELLS=y ++# CONFIG_NET_DEVLINK is not set ++CONFIG_MAY_USE_DEVLINK=y ++# CONFIG_FAILOVER is not set ++CONFIG_HAVE_EBPF_JIT=y ++ ++# ++# Device Drivers ++# ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER=y ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_DEVTMPFS=y ++# CONFIG_DEVTMPFS_MOUNT is not set ++CONFIG_STANDALONE=y ++CONFIG_PREVENT_FIRMWARE_BUILD=y ++ ++# ++# Firmware loader ++# ++CONFIG_FW_LOADER=y ++CONFIG_EXTRA_FIRMWARE="" ++# CONFIG_FW_LOADER_USER_HELPER is not set ++CONFIG_ALLOW_DEV_COREDUMP=y ++# CONFIG_DEBUG_DRIVER is not set ++# CONFIG_DEBUG_DEVRES is not set ++# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set ++# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set ++CONFIG_GENERIC_CPU_AUTOPROBE=y ++CONFIG_REGMAP=y ++CONFIG_REGMAP_I2C=y ++CONFIG_REGMAP_SPI=y ++CONFIG_REGMAP_MMIO=y ++CONFIG_DMA_SHARED_BUFFER=y ++# CONFIG_DMA_FENCE_TRACE is not set ++CONFIG_GENERIC_ARCH_TOPOLOGY=y ++ ++# ++# Bus devices ++# ++# CONFIG_BRCMSTB_GISB_ARB is not set ++# CONFIG_VEXPRESS_CONFIG is not set ++# CONFIG_CONNECTOR is not set ++# CONFIG_GNSS is not set ++CONFIG_MTD=y ++CONFIG_MTD_TESTS=m ++# CONFIG_MTD_REDBOOT_PARTS is not set ++CONFIG_MTD_CMDLINE_PARTS=y ++# CONFIG_MTD_AFS_PARTS is not set ++CONFIG_MTD_OF_PARTS=y ++# CONFIG_MTD_AR7_PARTS is not set ++ ++# ++# Partition parsers ++# ++ ++# ++# User Modules And Translation Layers ++# ++CONFIG_MTD_BLKDEVS=y ++CONFIG_MTD_BLOCK=y ++# CONFIG_FTL is not set ++# CONFIG_NFTL is not set ++# CONFIG_INFTL is not set ++# CONFIG_RFD_FTL is not set ++# CONFIG_SSFDC is not set ++# CONFIG_SM_FTL is not set ++# CONFIG_MTD_OOPS is not set ++# CONFIG_MTD_SWAP is not set ++CONFIG_MTD_PARTITIONED_MASTER=y ++ ++# ++# RAM/ROM/Flash chip drivers ++# ++# CONFIG_MTD_CFI is not set ++# CONFIG_MTD_JEDECPROBE is not set ++CONFIG_MTD_MAP_BANK_WIDTH_1=y ++CONFIG_MTD_MAP_BANK_WIDTH_2=y ++CONFIG_MTD_MAP_BANK_WIDTH_4=y ++CONFIG_MTD_CFI_I1=y ++CONFIG_MTD_CFI_I2=y ++# CONFIG_MTD_RAM is not set ++# CONFIG_MTD_ROM is not set ++# CONFIG_MTD_ABSENT is not set ++ ++# ++# Mapping drivers for chip access ++# ++# CONFIG_MTD_COMPLEX_MAPPINGS is not set ++# CONFIG_MTD_PLATRAM is not set ++ ++# ++# Self-contained MTD device drivers ++# ++# CONFIG_MTD_DATAFLASH is not set ++CONFIG_MTD_M25P80=y ++# CONFIG_MTD_MCHP23K256 is not set ++# CONFIG_MTD_SST25L is not set ++# CONFIG_MTD_SLRAM is not set ++# CONFIG_MTD_PHRAM is not set ++# CONFIG_MTD_MTDRAM is not set ++# CONFIG_MTD_BLOCK2MTD is not set ++ ++# ++# Disk-On-Chip Device Drivers ++# ++# CONFIG_MTD_DOCG3 is not set ++CONFIG_MTD_NAND_CORE=y ++# CONFIG_MTD_ONENAND is not set ++# CONFIG_MTD_NAND is not set ++CONFIG_MTD_SPI_NAND=y ++ ++# ++# LPDDR & LPDDR2 PCM memory drivers ++# ++# CONFIG_MTD_LPDDR is not set ++# CONFIG_MTD_LPDDR2_NVM is not set ++CONFIG_MTD_SPI_NOR=y ++# CONFIG_MTD_MT81xx_NOR is not set ++# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set ++# CONFIG_SPI_CADENCE_QUADSPI is not set ++CONFIG_MTD_UBI=y ++CONFIG_MTD_UBI_WL_THRESHOLD=4096 ++CONFIG_MTD_UBI_BEB_LIMIT=20 ++# CONFIG_MTD_UBI_FASTMAP is not set ++# CONFIG_MTD_UBI_GLUEBI is not set ++# CONFIG_MTD_UBI_BLOCK is not set ++CONFIG_DTC=y ++CONFIG_OF=y ++# CONFIG_OF_UNITTEST is not set ++CONFIG_OF_FLATTREE=y ++CONFIG_OF_EARLY_FLATTREE=y ++CONFIG_OF_KOBJ=y ++CONFIG_OF_ADDRESS=y ++CONFIG_OF_IRQ=y ++CONFIG_OF_NET=y ++CONFIG_OF_MDIO=y ++CONFIG_OF_RESERVED_MEM=y ++# CONFIG_OF_OVERLAY is not set ++CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y ++# CONFIG_PARPORT is not set ++CONFIG_BLK_DEV=y ++CONFIG_BLK_DEV_NULL_BLK=y ++# CONFIG_BLK_DEV_LOOP is not set ++# CONFIG_BLK_DEV_DRBD is not set ++# CONFIG_BLK_DEV_NBD is not set ++# CONFIG_BLK_DEV_RAM is not set ++# CONFIG_CDROM_PKTCDVD is not set ++# CONFIG_ATA_OVER_ETH is not set ++# CONFIG_BLK_DEV_RBD is not set ++ ++# ++# NVME Support ++# ++# CONFIG_NVME_FC is not set ++# CONFIG_NVME_TARGET is not set ++ ++# ++# Misc devices ++# ++# CONFIG_AD525X_DPOT is not set ++# CONFIG_DUMMY_IRQ is not set ++# CONFIG_ICS932S401 is not set ++# CONFIG_ENCLOSURE_SERVICES is not set ++# CONFIG_APDS9802ALS is not set ++# CONFIG_ISL29003 is not set ++# CONFIG_ISL29020 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_SENSORS_BH1770 is not set ++# CONFIG_SENSORS_APDS990X is not set ++# CONFIG_HMC6352 is not set ++# CONFIG_DS1682 is not set ++# CONFIG_USB_SWITCH_FSA9480 is not set ++# CONFIG_LATTICE_ECP3_CONFIG is not set ++# CONFIG_SRAM is not set ++# CONFIG_C2PORT is not set ++ ++# ++# EEPROM support ++# ++# CONFIG_EEPROM_AT24 is not set ++# CONFIG_EEPROM_AT25 is not set ++# CONFIG_EEPROM_LEGACY is not set ++# CONFIG_EEPROM_MAX6875 is not set ++# CONFIG_EEPROM_93CX6 is not set ++# CONFIG_EEPROM_93XX46 is not set ++# CONFIG_EEPROM_IDT_89HPESX is not set ++ ++# ++# Texas Instruments shared transport line discipline ++# ++# CONFIG_TI_ST is not set ++# CONFIG_SENSORS_LIS3_SPI is not set ++# CONFIG_SENSORS_LIS3_I2C is not set ++# CONFIG_ALTERA_STAPL is not set ++ ++# ++# Intel MIC & related support ++# ++ ++# ++# Intel MIC Bus Driver ++# ++ ++# ++# SCIF Bus Driver ++# ++ ++# ++# VOP Bus Driver ++# ++ ++# ++# Intel MIC Host Driver ++# ++ ++# ++# Intel MIC Card Driver ++# ++ ++# ++# SCIF Driver ++# ++ ++# ++# Intel MIC Coprocessor State Management (COSM) Drivers ++# ++ ++# ++# VOP Driver ++# ++# CONFIG_ECHO is not set ++# CONFIG_MISC_RTSX_USB is not set ++ ++# ++# SCSI device support ++# ++CONFIG_SCSI_MOD=y ++# CONFIG_RAID_ATTRS is not set ++CONFIG_SCSI=y ++CONFIG_SCSI_DMA=y ++CONFIG_SCSI_MQ_DEFAULT=y ++# CONFIG_SCSI_PROC_FS is not set ++ ++# ++# SCSI support type (disk, tape, CD-ROM) ++# ++CONFIG_BLK_DEV_SD=y ++# CONFIG_CHR_DEV_ST is not set ++# CONFIG_CHR_DEV_OSST is not set ++# CONFIG_BLK_DEV_SR is not set ++# CONFIG_CHR_DEV_SG is not set ++# CONFIG_CHR_DEV_SCH is not set ++# CONFIG_SCSI_CONSTANTS is not set ++# CONFIG_SCSI_LOGGING is not set ++# CONFIG_SCSI_SCAN_ASYNC is not set ++ ++# ++# SCSI Transports ++# ++# CONFIG_SCSI_SPI_ATTRS is not set ++# CONFIG_SCSI_FC_ATTRS is not set ++# CONFIG_SCSI_ISCSI_ATTRS is not set ++# CONFIG_SCSI_SAS_ATTRS is not set ++# CONFIG_SCSI_SAS_LIBSAS is not set ++# CONFIG_SCSI_SRP_ATTRS is not set ++CONFIG_SCSI_LOWLEVEL=y ++# CONFIG_ISCSI_TCP is not set ++# CONFIG_ISCSI_BOOT_SYSFS is not set ++# CONFIG_SCSI_UFSHCD is not set ++# CONFIG_SCSI_DEBUG is not set ++# CONFIG_SCSI_DH is not set ++# CONFIG_SCSI_OSD_INITIATOR is not set ++# CONFIG_ATA is not set ++# CONFIG_MD is not set ++# CONFIG_TARGET_CORE is not set ++CONFIG_NETDEVICES=y ++CONFIG_MII=y ++CONFIG_NET_CORE=y ++# CONFIG_BONDING is not set ++# CONFIG_DUMMY is not set ++# CONFIG_EQUALIZER is not set ++# CONFIG_NET_TEAM is not set ++# CONFIG_MACVLAN is not set ++# CONFIG_VXLAN is not set ++# CONFIG_GENEVE is not set ++# CONFIG_GTP is not set ++# CONFIG_MACSEC is not set ++# CONFIG_NETCONSOLE is not set ++# CONFIG_TUN is not set ++# CONFIG_TUN_VNET_CROSS_LE is not set ++# CONFIG_VETH is not set ++# CONFIG_NLMON is not set ++ ++# ++# CAIF transport drivers ++# ++ ++# ++# Distributed Switch Architecture drivers ++# ++CONFIG_ETHERNET=y ++# CONFIG_NET_VENDOR_ALACRITECH is not set ++# CONFIG_ALTERA_TSE is not set ++# CONFIG_NET_VENDOR_AMAZON is not set ++# CONFIG_NET_VENDOR_AQUANTIA is not set ++# CONFIG_NET_VENDOR_ARC is not set ++# CONFIG_NET_VENDOR_AURORA is not set ++# CONFIG_NET_VENDOR_BROADCOM is not set ++# CONFIG_NET_VENDOR_CADENCE is not set ++# CONFIG_NET_VENDOR_CAVIUM is not set ++# CONFIG_NET_VENDOR_CIRRUS is not set ++# CONFIG_NET_VENDOR_CORTINA is not set ++# CONFIG_DM9000 is not set ++# CONFIG_DNET is not set ++# CONFIG_NET_VENDOR_EZCHIP is not set ++# CONFIG_NET_VENDOR_FARADAY is not set ++# CONFIG_NET_VENDOR_HISILICON is not set ++# CONFIG_NET_VENDOR_HUAWEI is not set ++# CONFIG_NET_VENDOR_INTEL is not set ++# CONFIG_NET_VENDOR_MARVELL is not set ++# CONFIG_NET_VENDOR_MELLANOX is not set ++# CONFIG_NET_VENDOR_MICREL is not set ++CONFIG_NET_VENDOR_MICROCHIP=y ++# CONFIG_ENC28J60 is not set ++# CONFIG_ENCX24J600 is not set ++# CONFIG_NET_VENDOR_MICROSEMI is not set ++# CONFIG_NET_VENDOR_NATSEMI is not set ++# CONFIG_NET_VENDOR_NETRONOME is not set ++# CONFIG_NET_VENDOR_NI is not set ++# CONFIG_ETHOC is not set ++# CONFIG_NET_VENDOR_QUALCOMM is not set ++# CONFIG_NET_VENDOR_RENESAS is not set ++# CONFIG_NET_VENDOR_ROCKER is not set ++# CONFIG_NET_VENDOR_SAMSUNG is not set ++# CONFIG_NET_VENDOR_SEEQ is not set ++# CONFIG_NET_VENDOR_SOLARFLARE is not set ++# CONFIG_NET_VENDOR_SMSC is not set ++# CONFIG_NET_VENDOR_SOCIONEXT is not set ++CONFIG_NET_VENDOR_STMICRO=y ++CONFIG_STMMAC_ETH=y ++CONFIG_STMMAC_PLATFORM=y ++# CONFIG_DWMAC_DWC_QOS_ETH is not set ++# CONFIG_DWMAC_GENERIC is not set ++CONFIG_DWMAC_AXERA=y ++CONFIG_DWMAC_AXERA_AX620=y ++# CONFIG_DWMAC_AXERA_HAPS is not set ++# CONFIG_NET_VENDOR_SYNOPSYS is not set ++# CONFIG_NET_VENDOR_VIA is not set ++# CONFIG_NET_VENDOR_WIZNET is not set ++CONFIG_MDIO_DEVICE=y ++CONFIG_MDIO_BUS=y ++# CONFIG_MDIO_BCM_UNIMAC is not set ++# CONFIG_MDIO_BITBANG is not set ++# CONFIG_MDIO_BUS_MUX_GPIO is not set ++# CONFIG_MDIO_BUS_MUX_MMIOREG is not set ++# CONFIG_MDIO_HISI_FEMAC is not set ++# CONFIG_MDIO_MSCC_MIIM is not set ++CONFIG_PHYLIB=y ++CONFIG_SWPHY=y ++ ++# ++# MII PHY device drivers ++# ++# CONFIG_AMD_PHY is not set ++# CONFIG_AQUANTIA_PHY is not set ++# CONFIG_AX88796B_PHY is not set ++# CONFIG_AT803X_PHY is not set ++# CONFIG_BCM7XXX_PHY is not set ++# CONFIG_BCM87XX_PHY is not set ++# CONFIG_BROADCOM_PHY is not set ++# CONFIG_CICADA_PHY is not set ++# CONFIG_CORTINA_PHY is not set ++# CONFIG_DAVICOM_PHY is not set ++# CONFIG_DP83822_PHY is not set ++# CONFIG_DP83TC811_PHY is not set ++# CONFIG_DP83848_PHY is not set ++# CONFIG_DP83867_PHY is not set ++CONFIG_FIXED_PHY=y ++# CONFIG_ICPLUS_PHY is not set ++# CONFIG_INTEL_XWAY_PHY is not set ++# CONFIG_LSI_ET1011C_PHY is not set ++# CONFIG_LXT_PHY is not set ++CONFIG_MARVELL_PHY=y ++# CONFIG_MARVELL_10G_PHY is not set ++# CONFIG_MICREL_PHY is not set ++# CONFIG_MICROCHIP_PHY is not set ++# CONFIG_MICROCHIP_T1_PHY is not set ++# CONFIG_MICROSEMI_PHY is not set ++# CONFIG_NATIONAL_PHY is not set ++# CONFIG_QSEMI_PHY is not set ++CONFIG_REALTEK_PHY=y ++# CONFIG_RENESAS_PHY is not set ++# CONFIG_ROCKCHIP_PHY is not set ++# CONFIG_SMSC_PHY is not set ++# CONFIG_STE10XP is not set ++# CONFIG_TERANETICS_PHY is not set ++# CONFIG_VITESSE_PHY is not set ++# CONFIG_XILINX_GMII2RGMII is not set ++# CONFIG_MICREL_KS8995MA is not set ++# CONFIG_PPP is not set ++# CONFIG_SLIP is not set ++CONFIG_USB_NET_DRIVERS=y ++# CONFIG_USB_CATC is not set ++# CONFIG_USB_KAWETH is not set ++# CONFIG_USB_PEGASUS is not set ++# CONFIG_USB_RTL8150 is not set ++# CONFIG_USB_RTL8152 is not set ++# CONFIG_USB_LAN78XX is not set ++# CONFIG_USB_USBNET is not set ++# CONFIG_USB_IPHETH is not set ++# CONFIG_WLAN is not set ++ ++# ++# Enable WiMAX (Networking options) to see the WiMAX drivers ++# ++# CONFIG_WAN is not set ++# CONFIG_NETDEVSIM is not set ++# CONFIG_NET_FAILOVER is not set ++# CONFIG_ISDN is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=y ++# CONFIG_INPUT_FF_MEMLESS is not set ++# CONFIG_INPUT_POLLDEV is not set ++# CONFIG_INPUT_SPARSEKMAP is not set ++# CONFIG_INPUT_MATRIXKMAP is not set ++ ++# ++# Userland interfaces ++# ++# CONFIG_INPUT_MOUSEDEV is not set ++# CONFIG_INPUT_JOYDEV is not set ++CONFIG_INPUT_EVDEV=y ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++CONFIG_INPUT_KEYBOARD=y ++# CONFIG_KEYBOARD_ADP5588 is not set ++# CONFIG_KEYBOARD_ADP5589 is not set ++CONFIG_KEYBOARD_ATKBD=y ++# CONFIG_KEYBOARD_QT1070 is not set ++# CONFIG_KEYBOARD_QT2160 is not set ++# CONFIG_KEYBOARD_DLINK_DIR685 is not set ++# CONFIG_KEYBOARD_LKKBD is not set ++# CONFIG_KEYBOARD_GPIO is not set ++# CONFIG_KEYBOARD_GPIO_POLLED is not set ++# CONFIG_KEYBOARD_TCA6416 is not set ++# CONFIG_KEYBOARD_TCA8418 is not set ++# CONFIG_KEYBOARD_MATRIX is not set ++# CONFIG_KEYBOARD_LM8333 is not set ++# CONFIG_KEYBOARD_MAX7359 is not set ++# CONFIG_KEYBOARD_MCS is not set ++# CONFIG_KEYBOARD_MPR121 is not set ++# CONFIG_KEYBOARD_NEWTON is not set ++# CONFIG_KEYBOARD_OPENCORES is not set ++# CONFIG_KEYBOARD_SAMSUNG is not set ++# CONFIG_KEYBOARD_STOWAWAY is not set ++# CONFIG_KEYBOARD_SUNKBD is not set ++# CONFIG_KEYBOARD_OMAP4 is not set ++# CONFIG_KEYBOARD_XTKBD is not set ++# CONFIG_KEYBOARD_CAP11XX is not set ++# CONFIG_KEYBOARD_BCM is not set ++CONFIG_INPUT_MOUSE=y ++CONFIG_MOUSE_PS2=y ++CONFIG_MOUSE_PS2_ALPS=y ++CONFIG_MOUSE_PS2_BYD=y ++CONFIG_MOUSE_PS2_LOGIPS2PP=y ++CONFIG_MOUSE_PS2_SYNAPTICS=y ++CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y ++CONFIG_MOUSE_PS2_CYPRESS=y ++CONFIG_MOUSE_PS2_TRACKPOINT=y ++# CONFIG_MOUSE_PS2_ELANTECH is not set ++# CONFIG_MOUSE_PS2_SENTELIC is not set ++# CONFIG_MOUSE_PS2_TOUCHKIT is not set ++CONFIG_MOUSE_PS2_FOCALTECH=y ++CONFIG_MOUSE_PS2_SMBUS=y ++# CONFIG_MOUSE_SERIAL is not set ++# CONFIG_MOUSE_APPLETOUCH is not set ++# CONFIG_MOUSE_BCM5974 is not set ++# CONFIG_MOUSE_CYAPA is not set ++# CONFIG_MOUSE_ELAN_I2C is not set ++# CONFIG_MOUSE_VSXXXAA is not set ++# CONFIG_MOUSE_GPIO is not set ++# CONFIG_MOUSE_SYNAPTICS_I2C is not set ++# CONFIG_MOUSE_SYNAPTICS_USB is not set ++# CONFIG_INPUT_JOYSTICK is not set ++# CONFIG_INPUT_TABLET is not set ++# CONFIG_INPUT_TOUCHSCREEN is not set ++# CONFIG_INPUT_MISC is not set ++# CONFIG_RMI4_CORE is not set ++ ++# ++# Hardware I/O ports ++# ++CONFIG_SERIO=y ++# CONFIG_SERIO_SERPORT is not set ++CONFIG_SERIO_LIBPS2=y ++# CONFIG_SERIO_RAW is not set ++# CONFIG_SERIO_ALTERA_PS2 is not set ++# CONFIG_SERIO_PS2MULT is not set ++# CONFIG_SERIO_ARC_PS2 is not set ++# CONFIG_SERIO_APBPS2 is not set ++# CONFIG_SERIO_GPIO_PS2 is not set ++# CONFIG_USERIO is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++CONFIG_TTY=y ++CONFIG_VT=y ++CONFIG_CONSOLE_TRANSLATIONS=y ++CONFIG_VT_CONSOLE=y ++CONFIG_HW_CONSOLE=y ++CONFIG_VT_HW_CONSOLE_BINDING=y ++CONFIG_UNIX98_PTYS=y ++CONFIG_LEGACY_PTYS=y ++CONFIG_LEGACY_PTY_COUNT=16 ++# CONFIG_SERIAL_NONSTANDARD is not set ++# CONFIG_N_GSM is not set ++# CONFIG_TRACE_SINK is not set ++CONFIG_LDISC_AUTOLOAD=y ++CONFIG_DEVMEM=y ++# CONFIG_DEVKMEM is not set ++ ++# ++# Serial drivers ++# ++CONFIG_SERIAL_EARLYCON=y ++CONFIG_SERIAL_8250=y ++CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y ++# CONFIG_SERIAL_8250_FINTEK is not set ++CONFIG_SERIAL_8250_CONSOLE=y ++CONFIG_SERIAL_8250_DMA=y ++CONFIG_SERIAL_8250_NR_UARTS=4 ++CONFIG_SERIAL_8250_RUNTIME_UARTS=4 ++# CONFIG_SERIAL_8250_EXTENDED is not set ++# CONFIG_SERIAL_8250_ASPEED_VUART is not set ++CONFIG_SERIAL_8250_FSL=y ++CONFIG_SERIAL_8250_DW=y ++# CONFIG_SERIAL_8250_EM is not set ++# CONFIG_SERIAL_8250_RT288X is not set ++# CONFIG_SERIAL_OF_PLATFORM is not set ++ ++# ++# Non-8250 serial port support ++# ++# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set ++# CONFIG_SERIAL_MAX3100 is not set ++# CONFIG_SERIAL_MAX310X is not set ++# CONFIG_SERIAL_UARTLITE is not set ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++# CONFIG_SERIAL_SCCNXP is not set ++# CONFIG_SERIAL_SC16IS7XX is not set ++# CONFIG_SERIAL_BCM63XX is not set ++# CONFIG_SERIAL_ALTERA_JTAGUART is not set ++# CONFIG_SERIAL_ALTERA_UART is not set ++# CONFIG_SERIAL_IFX6X60 is not set ++# CONFIG_SERIAL_XILINX_PS_UART is not set ++# CONFIG_SERIAL_ARC is not set ++# CONFIG_SERIAL_FSL_LPUART is not set ++# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set ++# CONFIG_SERIAL_ST_ASC is not set ++# CONFIG_SERIAL_DEV_BUS is not set ++# CONFIG_HVC_DCC is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set ++# CONFIG_XILLYBUS is not set ++ ++# ++# I2C support ++# ++CONFIG_I2C=y ++CONFIG_I2C_BOARDINFO=y ++CONFIG_I2C_COMPAT=y ++CONFIG_I2C_CHARDEV=y ++CONFIG_I2C_MUX=y ++ ++# ++# Multiplexer I2C Chip support ++# ++# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set ++# CONFIG_I2C_MUX_GPIO is not set ++# CONFIG_I2C_MUX_GPMUX is not set ++# CONFIG_I2C_MUX_LTC4306 is not set ++# CONFIG_I2C_MUX_PCA9541 is not set ++# CONFIG_I2C_MUX_PCA954x is not set ++# CONFIG_I2C_MUX_PINCTRL is not set ++# CONFIG_I2C_MUX_REG is not set ++# CONFIG_I2C_DEMUX_PINCTRL is not set ++# CONFIG_I2C_MUX_MLXCPLD is not set ++CONFIG_I2C_HELPER_AUTO=y ++CONFIG_I2C_ALGOBIT=y ++ ++# ++# I2C Hardware Bus support ++# ++ ++# ++# I2C system bus drivers (mostly embedded / system-on-chip) ++# ++# CONFIG_I2C_CBUS_GPIO is not set ++CONFIG_I2C_DESIGNWARE_CORE=y ++CONFIG_I2C_DESIGNWARE_PLATFORM=y ++# CONFIG_I2C_DESIGNWARE_SLAVE is not set ++# CONFIG_I2C_EMEV2 is not set ++# CONFIG_I2C_GPIO is not set ++# CONFIG_I2C_OCORES is not set ++# CONFIG_I2C_PCA_PLATFORM is not set ++# CONFIG_I2C_RK3X is not set ++# CONFIG_I2C_SIMTEC is not set ++# CONFIG_I2C_XILINX is not set ++ ++# ++# External I2C/SMBus adapter drivers ++# ++# CONFIG_I2C_DIOLAN_U2C is not set ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_ROBOTFUZZ_OSIF is not set ++# CONFIG_I2C_TAOS_EVM is not set ++# CONFIG_I2C_TINY_USB is not set ++ ++# ++# Other I2C/SMBus bus drivers ++# ++# CONFIG_I2C_STUB is not set ++# CONFIG_I2C_SLAVE is not set ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++CONFIG_SPI=y ++# CONFIG_SPI_DEBUG is not set ++CONFIG_SPI_MASTER=y ++CONFIG_SPI_MEM=y ++ ++# ++# SPI Master Controller Drivers ++# ++# CONFIG_SPI_ALTERA is not set ++# CONFIG_SPI_AXI_SPI_ENGINE is not set ++# CONFIG_SPI_BITBANG is not set ++# CONFIG_SPI_CADENCE is not set ++CONFIG_SPI_DESIGNWARE=y ++CONFIG_SPI_AXERA=y ++CONFIG_SPI_DW_AXERA_DMA=y ++CONFIG_SPI_DW_MMIO=y ++CONFIG_SPI_AXERA_MMIO=y ++# CONFIG_SPI_GPIO is not set ++# CONFIG_SPI_FSL_SPI is not set ++# CONFIG_SPI_OC_TINY is not set ++# CONFIG_SPI_ROCKCHIP is not set ++# CONFIG_SPI_SC18IS602 is not set ++# CONFIG_SPI_XCOMM is not set ++# CONFIG_SPI_XILINX is not set ++# CONFIG_SPI_ZYNQMP_GQSPI is not set ++ ++# ++# SPI Protocol Masters ++# ++# CONFIG_SPI_SPIDEV is not set ++# CONFIG_SPI_LOOPBACK_TEST is not set ++# CONFIG_SPI_TLE62X0 is not set ++# CONFIG_SPI_SLAVE is not set ++# CONFIG_SPMI is not set ++# CONFIG_HSI is not set ++CONFIG_PPS=y ++# CONFIG_PPS_DEBUG is not set ++# CONFIG_NTP_PPS is not set ++ ++# ++# PPS clients support ++# ++# CONFIG_PPS_CLIENT_KTIMER is not set ++# CONFIG_PPS_CLIENT_LDISC is not set ++# CONFIG_PPS_CLIENT_GPIO is not set ++ ++# ++# PPS generators support ++# ++ ++# ++# PTP clock support ++# ++CONFIG_PTP_1588_CLOCK=y ++ ++# ++# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. ++# ++CONFIG_PINCTRL=y ++CONFIG_GENERIC_PINCTRL_GROUPS=y ++CONFIG_PINMUX=y ++CONFIG_GENERIC_PINMUX_FUNCTIONS=y ++CONFIG_PINCONF=y ++CONFIG_GENERIC_PINCONF=y ++# CONFIG_DEBUG_PINCTRL is not set ++# CONFIG_PINCTRL_AMD is not set ++# CONFIG_PINCTRL_MCP23S08 is not set ++CONFIG_PINCTRL_SINGLE=y ++# CONFIG_PINCTRL_SX150X is not set ++CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y ++CONFIG_GPIOLIB=y ++CONFIG_GPIOLIB_FASTPATH_LIMIT=512 ++CONFIG_OF_GPIO=y ++# CONFIG_DEBUG_GPIO is not set ++CONFIG_GPIO_SYSFS=y ++CONFIG_GPIO_GENERIC=y ++ ++# ++# Memory mapped GPIO drivers ++# ++# CONFIG_GPIO_74XX_MMIO is not set ++# CONFIG_GPIO_ALTERA is not set ++CONFIG_GPIO_DWAPB=y ++# CONFIG_GPIO_FTGPIO010 is not set ++CONFIG_GPIO_GENERIC_PLATFORM=y ++# CONFIG_GPIO_GRGPIO is not set ++# CONFIG_GPIO_HLWD is not set ++# CONFIG_GPIO_MB86S7X is not set ++# CONFIG_GPIO_MOCKUP is not set ++# CONFIG_GPIO_MPC8XXX is not set ++# CONFIG_GPIO_SYSCON is not set ++# CONFIG_GPIO_XILINX is not set ++# CONFIG_GPIO_ZEVIO is not set ++ ++# ++# I2C GPIO expanders ++# ++# CONFIG_GPIO_ADP5588 is not set ++# CONFIG_GPIO_ADNP is not set ++# CONFIG_GPIO_MAX7300 is not set ++# CONFIG_GPIO_MAX732X is not set ++# CONFIG_GPIO_PCA953X is not set ++# CONFIG_GPIO_PCF857X is not set ++# CONFIG_GPIO_TPIC2810 is not set ++ ++# ++# MFD GPIO expanders ++# ++# CONFIG_HTC_EGPIO is not set ++ ++# ++# SPI GPIO expanders ++# ++# CONFIG_GPIO_74X164 is not set ++# CONFIG_GPIO_MAX3191X is not set ++# CONFIG_GPIO_MAX7301 is not set ++# CONFIG_GPIO_MC33880 is not set ++# CONFIG_GPIO_PISOSR is not set ++# CONFIG_GPIO_XRA1403 is not set ++ ++# ++# USB GPIO expanders ++# ++# CONFIG_W1 is not set ++# CONFIG_POWER_AVS is not set ++# CONFIG_POWER_RESET is not set ++CONFIG_POWER_SUPPLY=y ++# CONFIG_POWER_SUPPLY_DEBUG is not set ++# CONFIG_PDA_POWER is not set ++# CONFIG_TEST_POWER is not set ++# CONFIG_CHARGER_ADP5061 is not set ++# CONFIG_BATTERY_DS2780 is not set ++# CONFIG_BATTERY_DS2781 is not set ++# CONFIG_BATTERY_DS2782 is not set ++# CONFIG_BATTERY_SBS is not set ++# CONFIG_CHARGER_SBS is not set ++# CONFIG_MANAGER_SBS is not set ++# CONFIG_BATTERY_BQ27XXX is not set ++# CONFIG_BATTERY_MAX17040 is not set ++# CONFIG_BATTERY_MAX17042 is not set ++# CONFIG_CHARGER_MAX8903 is not set ++# CONFIG_CHARGER_LP8727 is not set ++# CONFIG_CHARGER_GPIO is not set ++# CONFIG_CHARGER_LTC3651 is not set ++# CONFIG_CHARGER_DETECTOR_MAX14656 is not set ++# CONFIG_CHARGER_BQ2415X is not set ++# CONFIG_CHARGER_BQ24257 is not set ++# CONFIG_CHARGER_BQ24735 is not set ++# CONFIG_CHARGER_BQ25890 is not set ++# CONFIG_CHARGER_SMB347 is not set ++# CONFIG_BATTERY_GAUGE_LTC2941 is not set ++# CONFIG_CHARGER_RT9455 is not set ++# CONFIG_HWMON is not set ++CONFIG_THERMAL=y ++# CONFIG_THERMAL_STATISTICS is not set ++CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 ++CONFIG_THERMAL_OF=y ++# CONFIG_THERMAL_WRITABLE_TRIPS is not set ++CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y ++# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set ++# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set ++# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set ++# CONFIG_THERMAL_GOV_FAIR_SHARE is not set ++CONFIG_THERMAL_GOV_STEP_WISE=y ++# CONFIG_THERMAL_GOV_BANG_BANG is not set ++# CONFIG_THERMAL_GOV_USER_SPACE is not set ++CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y ++# CONFIG_THERMAL_EMULATION is not set ++# CONFIG_QORIQ_THERMAL is not set ++ ++# ++# ACPI INT340X thermal drivers ++# ++CONFIG_AX_THERMAL=y ++CONFIG_WATCHDOG=y ++CONFIG_WATCHDOG_CORE=y ++# CONFIG_WATCHDOG_NOWAYOUT is not set ++CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y ++# CONFIG_WATCHDOG_SYSFS is not set ++ ++# ++# Watchdog Device Drivers ++# ++# CONFIG_SOFT_WATCHDOG is not set ++# CONFIG_GPIO_WATCHDOG is not set ++# CONFIG_XILINX_WATCHDOG is not set ++# CONFIG_ZIIRAVE_WATCHDOG is not set ++# CONFIG_CADENCE_WATCHDOG is not set ++# CONFIG_FTWDT010_WATCHDOG is not set ++CONFIG_DW_WATCHDOG=y ++# CONFIG_MAX63XX_WATCHDOG is not set ++# CONFIG_MEN_A21_WDT is not set ++ ++# ++# USB-based Watchdog Cards ++# ++# CONFIG_USBPCWATCHDOG is not set ++ ++# ++# Watchdog Pretimeout Governors ++# ++# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set ++CONFIG_BCMA_POSSIBLE=y ++# CONFIG_BCMA is not set ++ ++# ++# Multifunction device drivers ++# ++# CONFIG_MFD_ACT8945A is not set ++# CONFIG_MFD_AS3711 is not set ++# CONFIG_MFD_AS3722 is not set ++# CONFIG_PMIC_ADP5520 is not set ++# CONFIG_MFD_AAT2870_CORE is not set ++# CONFIG_MFD_ATMEL_FLEXCOM is not set ++# CONFIG_MFD_ATMEL_HLCDC is not set ++# CONFIG_MFD_BCM590XX is not set ++# CONFIG_MFD_BD9571MWV is not set ++# CONFIG_MFD_AXP20X_I2C is not set ++# CONFIG_MFD_CROS_EC is not set ++# CONFIG_MFD_MADERA is not set ++# CONFIG_MFD_ASIC3 is not set ++# CONFIG_PMIC_DA903X is not set ++# CONFIG_MFD_DA9052_SPI is not set ++# CONFIG_MFD_DA9052_I2C is not set ++# CONFIG_MFD_DA9055 is not set ++# CONFIG_MFD_DA9062 is not set ++# CONFIG_MFD_DA9063 is not set ++# CONFIG_MFD_DA9150 is not set ++# CONFIG_MFD_DLN2 is not set ++# CONFIG_MFD_MC13XXX_SPI is not set ++# CONFIG_MFD_MC13XXX_I2C is not set ++# CONFIG_MFD_HI6421_PMIC is not set ++# CONFIG_HTC_PASIC3 is not set ++# CONFIG_HTC_I2CPLD is not set ++# CONFIG_MFD_KEMPLD is not set ++# CONFIG_MFD_88PM800 is not set ++# CONFIG_MFD_88PM805 is not set ++# CONFIG_MFD_88PM860X is not set ++# CONFIG_MFD_MAX14577 is not set ++# CONFIG_MFD_MAX77620 is not set ++# CONFIG_MFD_MAX77686 is not set ++# CONFIG_MFD_MAX77693 is not set ++# CONFIG_MFD_MAX77843 is not set ++# CONFIG_MFD_MAX8907 is not set ++# CONFIG_MFD_MAX8925 is not set ++# CONFIG_MFD_MAX8997 is not set ++# CONFIG_MFD_MAX8998 is not set ++# CONFIG_MFD_MT6397 is not set ++# CONFIG_MFD_MENF21BMC is not set ++# CONFIG_EZX_PCAP is not set ++# CONFIG_MFD_CPCAP is not set ++# CONFIG_MFD_VIPERBOARD is not set ++# CONFIG_MFD_RETU is not set ++# CONFIG_MFD_PCF50633 is not set ++# CONFIG_MFD_PM8XXX is not set ++# CONFIG_MFD_RT5033 is not set ++# CONFIG_MFD_RC5T583 is not set ++# CONFIG_MFD_RK808 is not set ++# CONFIG_MFD_RN5T618 is not set ++# CONFIG_MFD_SEC_CORE is not set ++# CONFIG_MFD_SI476X_CORE is not set ++# CONFIG_MFD_SM501 is not set ++# CONFIG_MFD_SKY81452 is not set ++# CONFIG_MFD_SMSC is not set ++# CONFIG_ABX500_CORE is not set ++# CONFIG_MFD_STMPE is not set ++CONFIG_MFD_SYSCON=y ++# CONFIG_MFD_TI_AM335X_TSCADC is not set ++# CONFIG_MFD_LP3943 is not set ++# CONFIG_MFD_LP8788 is not set ++# CONFIG_MFD_TI_LMU is not set ++# CONFIG_MFD_PALMAS is not set ++# CONFIG_TPS6105X is not set ++# CONFIG_TPS65010 is not set ++# CONFIG_TPS6507X is not set ++# CONFIG_MFD_TPS65086 is not set ++# CONFIG_MFD_TPS65090 is not set ++# CONFIG_MFD_TPS65217 is not set ++# CONFIG_MFD_TI_LP873X is not set ++# CONFIG_MFD_TI_LP87565 is not set ++# CONFIG_MFD_TPS65218 is not set ++# CONFIG_MFD_TPS6586X is not set ++# CONFIG_MFD_TPS65910 is not set ++# CONFIG_MFD_TPS65912_I2C is not set ++# CONFIG_MFD_TPS65912_SPI is not set ++# CONFIG_MFD_TPS80031 is not set ++# CONFIG_TWL4030_CORE is not set ++# CONFIG_TWL6040_CORE is not set ++# CONFIG_MFD_WL1273_CORE is not set ++# CONFIG_MFD_LM3533 is not set ++# CONFIG_MFD_TC3589X is not set ++# CONFIG_MFD_T7L66XB is not set ++# CONFIG_MFD_TC6387XB is not set ++# CONFIG_MFD_TC6393XB is not set ++# CONFIG_MFD_ARIZONA_I2C is not set ++# CONFIG_MFD_ARIZONA_SPI is not set ++# CONFIG_MFD_WM8400 is not set ++# CONFIG_MFD_WM831X_I2C is not set ++# CONFIG_MFD_WM831X_SPI is not set ++# CONFIG_MFD_WM8350_I2C is not set ++# CONFIG_MFD_WM8994 is not set ++# CONFIG_MFD_ROHM_BD718XX is not set ++# CONFIG_REGULATOR is not set ++# CONFIG_RC_CORE is not set ++# CONFIG_MEDIA_SUPPORT is not set ++ ++# ++# Graphics support ++# ++# CONFIG_IMX_IPUV3_CORE is not set ++CONFIG_DRM=y ++CONFIG_DRM_MIPI_DSI=y ++# CONFIG_DRM_DP_AUX_CHARDEV is not set ++# CONFIG_DRM_DEBUG_MM is not set ++# CONFIG_DRM_DEBUG_SELFTEST is not set ++CONFIG_DRM_KMS_HELPER=y ++CONFIG_DRM_KMS_FB_HELPER=y ++CONFIG_DRM_FBDEV_EMULATION=y ++CONFIG_DRM_FBDEV_OVERALLOC=100 ++# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set ++# CONFIG_DRM_DP_CEC is not set ++CONFIG_DRM_GEM_CMA_HELPER=y ++CONFIG_DRM_KMS_CMA_HELPER=y ++ ++# ++# I2C encoder or helper chips ++# ++# CONFIG_DRM_I2C_CH7006 is not set ++# CONFIG_DRM_I2C_SIL164 is not set ++# CONFIG_DRM_I2C_NXP_TDA998X is not set ++# CONFIG_DRM_I2C_NXP_TDA9950 is not set ++# CONFIG_DRM_HDLCD is not set ++# CONFIG_DRM_MALI_DISPLAY is not set ++ ++# ++# ACP (Audio CoProcessor) Configuration ++# ++ ++# ++# AMD Library routines ++# ++# CONFIG_DRM_VGEM is not set ++# CONFIG_DRM_VKMS is not set ++# CONFIG_DRM_EXYNOS is not set ++# CONFIG_DRM_UDL is not set ++# CONFIG_DRM_ARMADA is not set ++# CONFIG_DRM_RCAR_DW_HDMI is not set ++# CONFIG_DRM_RCAR_LVDS is not set ++# CONFIG_DRM_OMAP is not set ++# CONFIG_DRM_TILCDC is not set ++# CONFIG_DRM_FSL_DCU is not set ++# CONFIG_DRM_STM is not set ++CONFIG_DRM_PANEL=y ++ ++# ++# Display Panels ++# ++# CONFIG_DRM_PANEL_ARM_VERSATILE is not set ++# CONFIG_DRM_PANEL_LVDS is not set ++CONFIG_DRM_PANEL_SIMPLE=y ++# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set ++# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set ++# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set ++# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set ++# CONFIG_DRM_PANEL_LG_LG4573 is not set ++# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set ++# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set ++# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set ++# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set ++# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set ++# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set ++# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set ++# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set ++CONFIG_DRM_BRIDGE=y ++CONFIG_DRM_PANEL_BRIDGE=y ++ ++# ++# Display Interface Bridges ++# ++# CONFIG_DRM_ANALOGIX_ANX78XX is not set ++CONFIG_DRM_CDNS_DSI=y ++# CONFIG_DRM_DUMB_VGA_DAC is not set ++# CONFIG_DRM_LVDS_ENCODER is not set ++# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set ++# CONFIG_DRM_NXP_PTN3460 is not set ++# CONFIG_DRM_PARADE_PS8622 is not set ++# CONFIG_DRM_SIL_SII8620 is not set ++# CONFIG_DRM_SII902X is not set ++# CONFIG_DRM_SII9234 is not set ++# CONFIG_DRM_THINE_THC63LVD1024 is not set ++# CONFIG_DRM_TOSHIBA_TC358767 is not set ++# CONFIG_DRM_TI_TFP410 is not set ++# CONFIG_DRM_I2C_ADV7511 is not set ++# CONFIG_DRM_STI is not set ++# CONFIG_DRM_ARCPGU is not set ++# CONFIG_DRM_MXSFB is not set ++CONFIG_DRM_TINYDRM=y ++# CONFIG_TINYDRM_ILI9225 is not set ++# CONFIG_TINYDRM_ILI9341 is not set ++# CONFIG_TINYDRM_MI0283QT is not set ++# CONFIG_TINYDRM_REPAPER is not set ++# CONFIG_TINYDRM_ST7586 is not set ++# CONFIG_TINYDRM_ST7735R is not set ++# CONFIG_DRM_PL111 is not set ++CONFIG_DRM_AXERA=y ++# CONFIG_DRM_LEGACY is not set ++CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y ++ ++# ++# Frame buffer Devices ++# ++CONFIG_FB_CMDLINE=y ++CONFIG_FB_NOTIFY=y ++CONFIG_FB=y ++# CONFIG_FIRMWARE_EDID is not set ++CONFIG_FB_CFB_FILLRECT=y ++CONFIG_FB_CFB_COPYAREA=y ++CONFIG_FB_CFB_IMAGEBLIT=y ++CONFIG_FB_SYS_FILLRECT=y ++CONFIG_FB_SYS_COPYAREA=y ++CONFIG_FB_SYS_IMAGEBLIT=y ++# CONFIG_FB_FOREIGN_ENDIAN is not set ++CONFIG_FB_SYS_FOPS=y ++CONFIG_FB_DEFERRED_IO=y ++CONFIG_FB_MODE_HELPERS=y ++# CONFIG_FB_TILEBLITTING is not set ++ ++# ++# Frame buffer hardware drivers ++# ++# CONFIG_FB_OPENCORES is not set ++# CONFIG_FB_S1D13XXX is not set ++# CONFIG_FB_SMSCUFX is not set ++# CONFIG_FB_UDL is not set ++# CONFIG_FB_IBM_GXT4500 is not set ++# CONFIG_FB_VIRTUAL is not set ++# CONFIG_FB_METRONOME is not set ++# CONFIG_FB_BROADSHEET is not set ++# CONFIG_FB_SIMPLE is not set ++# CONFIG_FB_SSD1307 is not set ++CONFIG_BACKLIGHT_LCD_SUPPORT=y ++CONFIG_LCD_CLASS_DEVICE=m ++# CONFIG_LCD_L4F00242T03 is not set ++# CONFIG_LCD_LMS283GF05 is not set ++# CONFIG_LCD_LTV350QV is not set ++# CONFIG_LCD_ILI922X is not set ++# CONFIG_LCD_ILI9320 is not set ++# CONFIG_LCD_TDO24M is not set ++# CONFIG_LCD_VGG2432A4 is not set ++# CONFIG_LCD_PLATFORM is not set ++# CONFIG_LCD_S6E63M0 is not set ++# CONFIG_LCD_LD9040 is not set ++# CONFIG_LCD_AMS369FG06 is not set ++# CONFIG_LCD_LMS501KF03 is not set ++# CONFIG_LCD_HX8357 is not set ++# CONFIG_LCD_OTM3225A is not set ++CONFIG_BACKLIGHT_CLASS_DEVICE=y ++CONFIG_BACKLIGHT_GENERIC=y ++# CONFIG_BACKLIGHT_PWM is not set ++# CONFIG_BACKLIGHT_PM8941_WLED is not set ++# CONFIG_BACKLIGHT_ADP8860 is not set ++# CONFIG_BACKLIGHT_ADP8870 is not set ++# CONFIG_BACKLIGHT_LM3630A is not set ++# CONFIG_BACKLIGHT_LM3639 is not set ++# CONFIG_BACKLIGHT_LP855X is not set ++# CONFIG_BACKLIGHT_GPIO is not set ++# CONFIG_BACKLIGHT_LV5207LP is not set ++# CONFIG_BACKLIGHT_BD6107 is not set ++# CONFIG_BACKLIGHT_ARCXCNN is not set ++CONFIG_VIDEOMODE_HELPERS=y ++CONFIG_HDMI=y ++ ++# ++# Console display driver support ++# ++CONFIG_DUMMY_CONSOLE=y ++CONFIG_FRAMEBUFFER_CONSOLE=y ++CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y ++# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set ++# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set ++CONFIG_LOGO=y ++# CONFIG_LOGO_LINUX_MONO is not set ++# CONFIG_LOGO_LINUX_VGA16 is not set ++CONFIG_LOGO_LINUX_CLUT224=y ++CONFIG_SOUND=y ++CONFIG_SND=y ++CONFIG_SND_TIMER=y ++CONFIG_SND_PCM=y ++CONFIG_SND_JACK=y ++CONFIG_SND_JACK_INPUT_DEV=y ++# CONFIG_SND_OSSEMUL is not set ++CONFIG_SND_PCM_TIMER=y ++# CONFIG_SND_HRTIMER is not set ++# CONFIG_SND_DYNAMIC_MINORS is not set ++CONFIG_SND_SUPPORT_OLD_API=y ++CONFIG_SND_PROC_FS=y ++CONFIG_SND_VERBOSE_PROCFS=y ++# CONFIG_SND_VERBOSE_PRINTK is not set ++# CONFIG_SND_DEBUG is not set ++# CONFIG_SND_SEQUENCER is not set ++CONFIG_SND_DRIVERS=y ++# CONFIG_SND_DUMMY is not set ++# CONFIG_SND_ALOOP is not set ++# CONFIG_SND_MTPAV is not set ++# CONFIG_SND_SERIAL_U16550 is not set ++# CONFIG_SND_MPU401 is not set ++ ++# ++# HD-Audio ++# ++CONFIG_SND_HDA_PREALLOC_SIZE=64 ++CONFIG_SND_ARM=y ++CONFIG_SND_SPI=y ++CONFIG_SND_USB=y ++# CONFIG_SND_USB_AUDIO is not set ++# CONFIG_SND_USB_UA101 is not set ++# CONFIG_SND_USB_CAIAQ is not set ++# CONFIG_SND_USB_6FIRE is not set ++# CONFIG_SND_USB_HIFACE is not set ++# CONFIG_SND_BCD2000 is not set ++# CONFIG_SND_USB_POD is not set ++# CONFIG_SND_USB_PODHD is not set ++# CONFIG_SND_USB_TONEPORT is not set ++# CONFIG_SND_USB_VARIAX is not set ++CONFIG_SND_SOC=y ++# CONFIG_SND_SOC_AMD_ACP is not set ++# CONFIG_SND_ATMEL_SOC is not set ++# CONFIG_SND_DESIGNWARE_I2S is not set ++ ++# ++# SoC Audio for Freescale CPUs ++# ++ ++# ++# Common SoC Audio options for Freescale CPUs: ++# ++# CONFIG_SND_SOC_FSL_ASRC is not set ++# CONFIG_SND_SOC_FSL_SAI is not set ++# CONFIG_SND_SOC_FSL_SSI is not set ++# CONFIG_SND_SOC_FSL_SPDIF is not set ++# CONFIG_SND_SOC_FSL_ESAI is not set ++# CONFIG_SND_SOC_IMX_AUDMUX is not set ++# CONFIG_SND_I2S_HI6210_I2S is not set ++# CONFIG_SND_SOC_IMG is not set ++ ++# ++# STMicroelectronics STM32 SOC audio support ++# ++# CONFIG_SND_SOC_XTFPGA_I2S is not set ++# CONFIG_ZX_TDM is not set ++CONFIG_SND_SOC_I2C_AND_SPI=y ++ ++# ++# CODEC drivers ++# ++# CONFIG_SND_SOC_AC97_CODEC is not set ++# CONFIG_SND_SOC_ADAU1701 is not set ++# CONFIG_SND_SOC_ADAU1761_I2C is not set ++# CONFIG_SND_SOC_ADAU1761_SPI is not set ++# CONFIG_SND_SOC_ADAU7002 is not set ++# CONFIG_SND_SOC_AK4104 is not set ++# CONFIG_SND_SOC_AK4458 is not set ++# CONFIG_SND_SOC_AK4554 is not set ++# CONFIG_SND_SOC_AK4613 is not set ++# CONFIG_SND_SOC_AK4642 is not set ++# CONFIG_SND_SOC_AK5386 is not set ++# CONFIG_SND_SOC_AK5558 is not set ++# CONFIG_SND_SOC_ALC5623 is not set ++# CONFIG_SND_SOC_BD28623 is not set ++# CONFIG_SND_SOC_BT_SCO is not set ++# CONFIG_SND_SOC_CS35L32 is not set ++# CONFIG_SND_SOC_CS35L33 is not set ++# CONFIG_SND_SOC_CS35L34 is not set ++# CONFIG_SND_SOC_CS35L35 is not set ++# CONFIG_SND_SOC_CS42L42 is not set ++# CONFIG_SND_SOC_CS42L51_I2C is not set ++# CONFIG_SND_SOC_CS42L52 is not set ++# CONFIG_SND_SOC_CS42L56 is not set ++# CONFIG_SND_SOC_CS42L73 is not set ++# CONFIG_SND_SOC_CS4265 is not set ++# CONFIG_SND_SOC_CS4270 is not set ++# CONFIG_SND_SOC_CS4271_I2C is not set ++# CONFIG_SND_SOC_CS4271_SPI is not set ++# CONFIG_SND_SOC_CS42XX8_I2C is not set ++# CONFIG_SND_SOC_CS43130 is not set ++# CONFIG_SND_SOC_CS4349 is not set ++# CONFIG_SND_SOC_CS53L30 is not set ++# CONFIG_SND_SOC_HDMI_CODEC is not set ++# CONFIG_SND_SOC_ES7134 is not set ++# CONFIG_SND_SOC_ES7241 is not set ++# CONFIG_SND_SOC_ES8316 is not set ++# CONFIG_SND_SOC_ES8328_I2C is not set ++# CONFIG_SND_SOC_ES8328_SPI is not set ++# CONFIG_SND_SOC_GTM601 is not set ++# CONFIG_SND_SOC_INNO_RK3036 is not set ++# CONFIG_SND_SOC_MAX98504 is not set ++# CONFIG_SND_SOC_MAX9867 is not set ++# CONFIG_SND_SOC_MAX98927 is not set ++# CONFIG_SND_SOC_MAX98373 is not set ++# CONFIG_SND_SOC_MAX9860 is not set ++# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set ++# CONFIG_SND_SOC_PCM1681 is not set ++# CONFIG_SND_SOC_PCM1789_I2C is not set ++# CONFIG_SND_SOC_PCM179X_I2C is not set ++# CONFIG_SND_SOC_PCM179X_SPI is not set ++# CONFIG_SND_SOC_PCM186X_I2C is not set ++# CONFIG_SND_SOC_PCM186X_SPI is not set ++# CONFIG_SND_SOC_PCM3168A_I2C is not set ++# CONFIG_SND_SOC_PCM3168A_SPI is not set ++# CONFIG_SND_SOC_PCM512x_I2C is not set ++# CONFIG_SND_SOC_PCM512x_SPI is not set ++# CONFIG_SND_SOC_RT5616 is not set ++# CONFIG_SND_SOC_RT5631 is not set ++# CONFIG_SND_SOC_SGTL5000 is not set ++# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set ++# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set ++# CONFIG_SND_SOC_SPDIF is not set ++# CONFIG_SND_SOC_SSM2305 is not set ++# CONFIG_SND_SOC_SSM2602_SPI is not set ++# CONFIG_SND_SOC_SSM2602_I2C is not set ++# CONFIG_SND_SOC_SSM4567 is not set ++# CONFIG_SND_SOC_STA32X is not set ++# CONFIG_SND_SOC_STA350 is not set ++# CONFIG_SND_SOC_STI_SAS is not set ++# CONFIG_SND_SOC_TAS2552 is not set ++# CONFIG_SND_SOC_TAS5086 is not set ++# CONFIG_SND_SOC_TAS571X is not set ++# CONFIG_SND_SOC_TAS5720 is not set ++# CONFIG_SND_SOC_TAS6424 is not set ++# CONFIG_SND_SOC_TDA7419 is not set ++# CONFIG_SND_SOC_TFA9879 is not set ++# CONFIG_SND_SOC_TLV320AIC23_I2C is not set ++# CONFIG_SND_SOC_TLV320AIC23_SPI is not set ++# CONFIG_SND_SOC_TLV320AIC31XX is not set ++# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set ++# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set ++# CONFIG_SND_SOC_TLV320AIC3X is not set ++# CONFIG_SND_SOC_TS3A227E is not set ++# CONFIG_SND_SOC_TSCS42XX is not set ++# CONFIG_SND_SOC_TSCS454 is not set ++# CONFIG_SND_SOC_WM8510 is not set ++# CONFIG_SND_SOC_WM8523 is not set ++# CONFIG_SND_SOC_WM8524 is not set ++# CONFIG_SND_SOC_WM8580 is not set ++# CONFIG_SND_SOC_WM8711 is not set ++# CONFIG_SND_SOC_WM8728 is not set ++# CONFIG_SND_SOC_WM8731 is not set ++# CONFIG_SND_SOC_WM8737 is not set ++# CONFIG_SND_SOC_WM8741 is not set ++# CONFIG_SND_SOC_WM8750 is not set ++# CONFIG_SND_SOC_WM8753 is not set ++# CONFIG_SND_SOC_WM8770 is not set ++# CONFIG_SND_SOC_WM8776 is not set ++# CONFIG_SND_SOC_WM8782 is not set ++# CONFIG_SND_SOC_WM8804_I2C is not set ++# CONFIG_SND_SOC_WM8804_SPI is not set ++# CONFIG_SND_SOC_WM8903 is not set ++# CONFIG_SND_SOC_WM8960 is not set ++# CONFIG_SND_SOC_WM8962 is not set ++# CONFIG_SND_SOC_WM8974 is not set ++# CONFIG_SND_SOC_WM8978 is not set ++# CONFIG_SND_SOC_WM8985 is not set ++# CONFIG_SND_SOC_ZX_AUD96P22 is not set ++# CONFIG_SND_SOC_MAX9759 is not set ++# CONFIG_SND_SOC_MT6351 is not set ++# CONFIG_SND_SOC_NAU8540 is not set ++# CONFIG_SND_SOC_NAU8810 is not set ++# CONFIG_SND_SOC_NAU8824 is not set ++# CONFIG_SND_SOC_TPA6130A2 is not set ++# CONFIG_SND_SIMPLE_CARD is not set ++# CONFIG_SND_SIMPLE_SCU_CARD is not set ++# CONFIG_SND_AUDIO_GRAPH_CARD is not set ++# CONFIG_SND_AUDIO_GRAPH_SCU_CARD is not set ++ ++# ++# HID support ++# ++CONFIG_HID=y ++# CONFIG_HID_BATTERY_STRENGTH is not set ++# CONFIG_HIDRAW is not set ++# CONFIG_UHID is not set ++CONFIG_HID_GENERIC=y ++ ++# ++# Special HID drivers ++# ++CONFIG_HID_A4TECH=y ++# CONFIG_HID_ACCUTOUCH is not set ++# CONFIG_HID_ACRUX is not set ++CONFIG_HID_APPLE=y ++# CONFIG_HID_APPLEIR is not set ++# CONFIG_HID_AUREAL is not set ++CONFIG_HID_BELKIN=y ++# CONFIG_HID_BETOP_FF is not set ++CONFIG_HID_CHERRY=y ++CONFIG_HID_CHICONY=y ++# CONFIG_HID_COUGAR is not set ++# CONFIG_HID_PRODIKEYS is not set ++# CONFIG_HID_CMEDIA is not set ++CONFIG_HID_CYPRESS=y ++CONFIG_HID_DRAGONRISE=y ++# CONFIG_DRAGONRISE_FF is not set ++# CONFIG_HID_EMS_FF is not set ++# CONFIG_HID_ELECOM is not set ++# CONFIG_HID_ELO is not set ++CONFIG_HID_EZKEY=y ++# CONFIG_HID_GEMBIRD is not set ++# CONFIG_HID_GFRM is not set ++# CONFIG_HID_HOLTEK is not set ++# CONFIG_HID_KEYTOUCH is not set ++# CONFIG_HID_KYE is not set ++# CONFIG_HID_UCLOGIC is not set ++# CONFIG_HID_WALTOP is not set ++CONFIG_HID_GYRATION=y ++# CONFIG_HID_ICADE is not set ++CONFIG_HID_ITE=y ++# CONFIG_HID_JABRA is not set ++CONFIG_HID_TWINHAN=y ++CONFIG_HID_KENSINGTON=y ++# CONFIG_HID_LCPOWER is not set ++# CONFIG_HID_LENOVO is not set ++CONFIG_HID_LOGITECH=y ++# CONFIG_HID_LOGITECH_HIDPP is not set ++# CONFIG_LOGITECH_FF is not set ++# CONFIG_LOGIRUMBLEPAD2_FF is not set ++# CONFIG_LOGIG940_FF is not set ++# CONFIG_LOGIWHEELS_FF is not set ++# CONFIG_HID_MAGICMOUSE is not set ++# CONFIG_HID_MAYFLASH is not set ++CONFIG_HID_REDRAGON=y ++CONFIG_HID_MICROSOFT=y ++CONFIG_HID_MONTEREY=y ++# CONFIG_HID_MULTITOUCH is not set ++# CONFIG_HID_NTI is not set ++# CONFIG_HID_NTRIG is not set ++# CONFIG_HID_ORTEK is not set ++CONFIG_HID_PANTHERLORD=y ++# CONFIG_PANTHERLORD_FF is not set ++# CONFIG_HID_PENMOUNT is not set ++CONFIG_HID_PETALYNX=y ++# CONFIG_HID_PICOLCD is not set ++# CONFIG_HID_PLANTRONICS is not set ++# CONFIG_HID_PRIMAX is not set ++# CONFIG_HID_RETRODE is not set ++# CONFIG_HID_ROCCAT is not set ++# CONFIG_HID_SAITEK is not set ++CONFIG_HID_SAMSUNG=y ++# CONFIG_HID_SPEEDLINK is not set ++# CONFIG_HID_STEAM is not set ++# CONFIG_HID_STEELSERIES is not set ++CONFIG_HID_SUNPLUS=y ++# CONFIG_HID_RMI is not set ++CONFIG_HID_GREENASIA=y ++# CONFIG_GREENASIA_FF is not set ++CONFIG_HID_SMARTJOYPLUS=y ++# CONFIG_SMARTJOYPLUS_FF is not set ++# CONFIG_HID_TIVO is not set ++CONFIG_HID_TOPSEED=y ++CONFIG_HID_THRUSTMASTER=y ++# CONFIG_THRUSTMASTER_FF is not set ++# CONFIG_HID_UDRAW_PS3 is not set ++# CONFIG_HID_WACOM is not set ++# CONFIG_HID_XINMO is not set ++CONFIG_HID_ZEROPLUS=y ++# CONFIG_ZEROPLUS_FF is not set ++# CONFIG_HID_ZYDACRON is not set ++# CONFIG_HID_SENSOR_HUB is not set ++# CONFIG_HID_ALPS is not set ++ ++# ++# USB HID support ++# ++CONFIG_USB_HID=y ++# CONFIG_HID_PID is not set ++# CONFIG_USB_HIDDEV is not set ++ ++# ++# I2C HID support ++# ++# CONFIG_I2C_HID is not set ++CONFIG_USB_OHCI_LITTLE_ENDIAN=y ++CONFIG_USB_SUPPORT=y ++CONFIG_USB_COMMON=y ++CONFIG_USB_ARCH_HAS_HCD=y ++CONFIG_USB=y ++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y ++ ++# ++# Miscellaneous USB options ++# ++CONFIG_USB_DEFAULT_PERSIST=y ++# CONFIG_USB_DYNAMIC_MINORS is not set ++# CONFIG_USB_OTG_WHITELIST is not set ++# CONFIG_USB_MON is not set ++# CONFIG_USB_WUSB_CBAF is not set ++ ++# ++# USB Host Controller Drivers ++# ++# CONFIG_USB_C67X00_HCD is not set ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DBGCAP=y ++CONFIG_USB_XHCI_PLATFORM=y ++# CONFIG_USB_EHCI_HCD is not set ++# CONFIG_USB_OXU210HP_HCD is not set ++# CONFIG_USB_ISP116X_HCD is not set ++# CONFIG_USB_FOTG210_HCD is not set ++# CONFIG_USB_MAX3421_HCD is not set ++# CONFIG_USB_OHCI_HCD is not set ++# CONFIG_USB_SL811_HCD is not set ++# CONFIG_USB_R8A66597_HCD is not set ++# CONFIG_USB_HCD_TEST_MODE is not set ++ ++# ++# USB Device Class drivers ++# ++CONFIG_USB_ACM=y ++# CONFIG_USB_PRINTER is not set ++# CONFIG_USB_WDM is not set ++# CONFIG_USB_TMC is not set ++ ++# ++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may ++# ++ ++# ++# also be needed; see USB_STORAGE Help for more info ++# ++CONFIG_USB_STORAGE=y ++# CONFIG_USB_STORAGE_DEBUG is not set ++# CONFIG_USB_STORAGE_REALTEK is not set ++# CONFIG_USB_STORAGE_DATAFAB is not set ++# CONFIG_USB_STORAGE_FREECOM is not set ++# CONFIG_USB_STORAGE_ISD200 is not set ++# CONFIG_USB_STORAGE_USBAT is not set ++# CONFIG_USB_STORAGE_SDDR09 is not set ++# CONFIG_USB_STORAGE_SDDR55 is not set ++# CONFIG_USB_STORAGE_JUMPSHOT is not set ++# CONFIG_USB_STORAGE_ALAUDA is not set ++# CONFIG_USB_STORAGE_ONETOUCH is not set ++# CONFIG_USB_STORAGE_KARMA is not set ++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set ++# CONFIG_USB_STORAGE_ENE_UB6250 is not set ++CONFIG_USB_UAS=y ++ ++# ++# USB Imaging devices ++# ++# CONFIG_USB_MDC800 is not set ++# CONFIG_USB_MICROTEK is not set ++# CONFIG_USBIP_CORE is not set ++# CONFIG_USB_MUSB_HDRC is not set ++# CONFIG_USB_DWC3 is not set ++# CONFIG_USB_DWC2 is not set ++CONFIG_USB_CDNS3=y ++CONFIG_USB_CDNS3_GADGET=y ++CONFIG_USB_CDNS3_HOST=y ++CONFIG_USB_CDNS3_AXERA=y ++# CONFIG_USB_CHIPIDEA is not set ++# CONFIG_USB_ISP1760 is not set ++ ++# ++# USB port drivers ++# ++CONFIG_USB_SERIAL=y ++# CONFIG_USB_SERIAL_CONSOLE is not set ++CONFIG_USB_SERIAL_GENERIC=y ++# CONFIG_USB_SERIAL_SIMPLE is not set ++# CONFIG_USB_SERIAL_AIRCABLE is not set ++# CONFIG_USB_SERIAL_ARK3116 is not set ++# CONFIG_USB_SERIAL_BELKIN is not set ++CONFIG_USB_SERIAL_CH341=y ++# CONFIG_USB_SERIAL_WHITEHEAT is not set ++# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set ++# CONFIG_USB_SERIAL_CP210X is not set ++# CONFIG_USB_SERIAL_CYPRESS_M8 is not set ++# CONFIG_USB_SERIAL_EMPEG is not set ++# CONFIG_USB_SERIAL_FTDI_SIO is not set ++# CONFIG_USB_SERIAL_VISOR is not set ++# CONFIG_USB_SERIAL_IPAQ is not set ++# CONFIG_USB_SERIAL_IR is not set ++# CONFIG_USB_SERIAL_EDGEPORT is not set ++# CONFIG_USB_SERIAL_EDGEPORT_TI is not set ++# CONFIG_USB_SERIAL_F81232 is not set ++# CONFIG_USB_SERIAL_F8153X is not set ++# CONFIG_USB_SERIAL_GARMIN is not set ++# CONFIG_USB_SERIAL_IPW is not set ++# CONFIG_USB_SERIAL_IUU is not set ++# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set ++# CONFIG_USB_SERIAL_KEYSPAN is not set ++# CONFIG_USB_SERIAL_KLSI is not set ++# CONFIG_USB_SERIAL_KOBIL_SCT is not set ++# CONFIG_USB_SERIAL_MCT_U232 is not set ++# CONFIG_USB_SERIAL_METRO is not set ++# CONFIG_USB_SERIAL_MOS7720 is not set ++# CONFIG_USB_SERIAL_MOS7840 is not set ++# CONFIG_USB_SERIAL_MXUPORT is not set ++# CONFIG_USB_SERIAL_NAVMAN is not set ++CONFIG_USB_SERIAL_PL2303=y ++# CONFIG_USB_SERIAL_OTI6858 is not set ++# CONFIG_USB_SERIAL_QCAUX is not set ++# CONFIG_USB_SERIAL_QUALCOMM is not set ++# CONFIG_USB_SERIAL_SPCP8X5 is not set ++# CONFIG_USB_SERIAL_SAFE is not set ++# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set ++# CONFIG_USB_SERIAL_SYMBOL is not set ++# CONFIG_USB_SERIAL_TI is not set ++# CONFIG_USB_SERIAL_CYBERJACK is not set ++# CONFIG_USB_SERIAL_XIRCOM is not set ++# CONFIG_USB_SERIAL_OPTION is not set ++# CONFIG_USB_SERIAL_OMNINET is not set ++# CONFIG_USB_SERIAL_OPTICON is not set ++# CONFIG_USB_SERIAL_XSENS_MT is not set ++# CONFIG_USB_SERIAL_WISHBONE is not set ++# CONFIG_USB_SERIAL_SSU100 is not set ++# CONFIG_USB_SERIAL_QT2 is not set ++# CONFIG_USB_SERIAL_UPD78F0730 is not set ++# CONFIG_USB_SERIAL_DEBUG is not set ++ ++# ++# USB Miscellaneous drivers ++# ++# CONFIG_USB_EMI62 is not set ++# CONFIG_USB_EMI26 is not set ++# CONFIG_USB_ADUTUX is not set ++# CONFIG_USB_SEVSEG is not set ++# CONFIG_USB_LEGOTOWER is not set ++# CONFIG_USB_LCD is not set ++# CONFIG_USB_CYPRESS_CY7C63 is not set ++# CONFIG_USB_CYTHERM is not set ++# CONFIG_USB_IDMOUSE is not set ++# CONFIG_USB_FTDI_ELAN is not set ++# CONFIG_USB_APPLEDISPLAY is not set ++# CONFIG_USB_LD is not set ++# CONFIG_USB_TRANCEVIBRATOR is not set ++# CONFIG_USB_IOWARRIOR is not set ++CONFIG_USB_TEST=y ++# CONFIG_USB_EHSET_TEST_FIXTURE is not set ++# CONFIG_USB_ISIGHTFW is not set ++# CONFIG_USB_YUREX is not set ++# CONFIG_USB_EZUSB_FX2 is not set ++# CONFIG_USB_HUB_USB251XB is not set ++# CONFIG_USB_HSIC_USB3503 is not set ++# CONFIG_USB_HSIC_USB4604 is not set ++# CONFIG_USB_LINK_LAYER_TEST is not set ++ ++# ++# USB Physical Layer drivers ++# ++# CONFIG_NOP_USB_XCEIV is not set ++# CONFIG_USB_GPIO_VBUS is not set ++# CONFIG_USB_ISP1301 is not set ++# CONFIG_USB_ULPI is not set ++CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG is not set ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++# CONFIG_USB_GADGET_DEBUG_FS is not set ++CONFIG_USB_GADGET_VBUS_DRAW=2 ++CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 ++# CONFIG_U_SERIAL_CONSOLE is not set ++ ++# ++# USB Peripheral Controller ++# ++# CONFIG_USB_FUSB300 is not set ++# CONFIG_USB_FOTG210_UDC is not set ++# CONFIG_USB_GR_UDC is not set ++# CONFIG_USB_R8A66597 is not set ++# CONFIG_USB_PXA27X is not set ++# CONFIG_USB_MV_UDC is not set ++# CONFIG_USB_MV_U3D is not set ++# CONFIG_USB_SNP_UDC_PLAT is not set ++# CONFIG_USB_M66592 is not set ++# CONFIG_USB_BDC_UDC is not set ++# CONFIG_USB_NET2272 is not set ++# CONFIG_USB_GADGET_XILINX is not set ++# CONFIG_USB_DUMMY_HCD is not set ++CONFIG_USB_LIBCOMPOSITE=y ++CONFIG_USB_F_ACM=y ++CONFIG_USB_F_SS_LB=y ++CONFIG_USB_U_SERIAL=y ++CONFIG_USB_U_ETHER=y ++CONFIG_USB_F_SERIAL=y ++CONFIG_USB_F_RNDIS=y ++CONFIG_USB_F_MASS_STORAGE=y ++CONFIG_USB_CONFIGFS=y ++CONFIG_USB_CONFIGFS_SERIAL=y ++CONFIG_USB_CONFIGFS_ACM=y ++# CONFIG_USB_CONFIGFS_OBEX is not set ++# CONFIG_USB_CONFIGFS_NCM is not set ++# CONFIG_USB_CONFIGFS_ECM is not set ++# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set ++CONFIG_USB_CONFIGFS_RNDIS=y ++# CONFIG_USB_CONFIGFS_EEM is not set ++CONFIG_USB_CONFIGFS_MASS_STORAGE=y ++CONFIG_USB_CONFIGFS_F_LB_SS=y ++# CONFIG_USB_CONFIGFS_F_FS is not set ++# CONFIG_USB_CONFIGFS_F_UAC1 is not set ++# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set ++# CONFIG_USB_CONFIGFS_F_UAC2 is not set ++# CONFIG_USB_CONFIGFS_F_MIDI is not set ++# CONFIG_USB_CONFIGFS_F_HID is not set ++# CONFIG_USB_CONFIGFS_F_PRINTER is not set ++CONFIG_TYPEC=y ++CONFIG_TYPEC_TCPM=y ++CONFIG_TYPEC_TCPCI=y ++# CONFIG_TYPEC_RT1711H is not set ++CONFIG_TYPEC_SGM7220=y ++# CONFIG_TYPEC_FUSB302 is not set ++# CONFIG_TYPEC_UCSI is not set ++# CONFIG_TYPEC_TPS6598X is not set ++ ++# ++# USB Type-C Multiplexer/DeMultiplexer Switch support ++# ++# CONFIG_TYPEC_MUX_PI3USB30532 is not set ++ ++# ++# USB Type-C Alternate Mode drivers ++# ++# CONFIG_TYPEC_DP_ALTMODE is not set ++CONFIG_USB_ROLE_SWITCH=y ++# CONFIG_USB_ULPI_BUS is not set ++# CONFIG_UWB is not set ++CONFIG_MMC=y ++CONFIG_PWRSEQ_EMMC=y ++CONFIG_PWRSEQ_SIMPLE=y ++CONFIG_MMC_BLOCK=y ++CONFIG_MMC_BLOCK_MINORS=8 ++# CONFIG_SDIO_UART is not set ++# CONFIG_MMC_TEST is not set ++ ++# ++# MMC/SD/SDIO Host Controller Drivers ++# ++# CONFIG_MMC_DEBUG is not set ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_IO_ACCESSORS=y ++CONFIG_MMC_SDHCI_PLTFM=y ++# CONFIG_MMC_SDHCI_OF_ARASAN is not set ++# CONFIG_MMC_SDHCI_OF_AT91 is not set ++# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set ++# CONFIG_MMC_SDHCI_CADENCE is not set ++CONFIG_MMC_SDHCI_AX620=y ++# CONFIG_MMC_SDHCI_F_SDH30 is not set ++# CONFIG_MMC_SPI is not set ++# CONFIG_MMC_DW is not set ++# CONFIG_MMC_VUB300 is not set ++# CONFIG_MMC_USHC is not set ++# CONFIG_MMC_USDHI6ROL0 is not set ++# CONFIG_MMC_CQHCI is not set ++# CONFIG_MMC_MTK is not set ++# CONFIG_MMC_SDHCI_XENON is not set ++# CONFIG_MMC_SDHCI_OMAP is not set ++# CONFIG_MEMSTICK is not set ++# CONFIG_NEW_LEDS is not set ++# CONFIG_ACCESSIBILITY is not set ++# CONFIG_INFINIBAND is not set ++CONFIG_EDAC_ATOMIC_SCRUB=y ++CONFIG_EDAC_SUPPORT=y ++CONFIG_RTC_LIB=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" ++CONFIG_RTC_SYSTOHC=y ++CONFIG_RTC_SYSTOHC_DEVICE="rtc0" ++# CONFIG_RTC_DEBUG is not set ++CONFIG_RTC_NVMEM=y ++ ++# ++# RTC interfaces ++# ++CONFIG_RTC_INTF_SYSFS=y ++CONFIG_RTC_INTF_PROC=y ++CONFIG_RTC_INTF_DEV=y ++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set ++# CONFIG_RTC_DRV_TEST is not set ++ ++# ++# I2C RTC drivers ++# ++# CONFIG_RTC_DRV_ABB5ZES3 is not set ++# CONFIG_RTC_DRV_ABX80X is not set ++# CONFIG_RTC_DRV_DS1307 is not set ++# CONFIG_RTC_DRV_DS1374 is not set ++# CONFIG_RTC_DRV_DS1672 is not set ++# CONFIG_RTC_DRV_HYM8563 is not set ++# CONFIG_RTC_DRV_MAX6900 is not set ++# CONFIG_RTC_DRV_RS5C372 is not set ++# CONFIG_RTC_DRV_ISL1208 is not set ++# CONFIG_RTC_DRV_ISL12022 is not set ++# CONFIG_RTC_DRV_ISL12026 is not set ++# CONFIG_RTC_DRV_X1205 is not set ++# CONFIG_RTC_DRV_PCF8523 is not set ++# CONFIG_RTC_DRV_PCF85063 is not set ++# CONFIG_RTC_DRV_PCF85363 is not set ++# CONFIG_RTC_DRV_PCF8563 is not set ++# CONFIG_RTC_DRV_PCF8583 is not set ++# CONFIG_RTC_DRV_M41T80 is not set ++# CONFIG_RTC_DRV_BQ32K is not set ++# CONFIG_RTC_DRV_S35390A is not set ++# CONFIG_RTC_DRV_FM3130 is not set ++# CONFIG_RTC_DRV_RX8010 is not set ++CONFIG_RTC_DRV_PT7C4563=y ++# CONFIG_RTC_DRV_RX8581 is not set ++# CONFIG_RTC_DRV_RX8025 is not set ++# CONFIG_RTC_DRV_EM3027 is not set ++# CONFIG_RTC_DRV_RV8803 is not set ++ ++# ++# SPI RTC drivers ++# ++# CONFIG_RTC_DRV_M41T93 is not set ++# CONFIG_RTC_DRV_M41T94 is not set ++# CONFIG_RTC_DRV_DS1302 is not set ++# CONFIG_RTC_DRV_DS1305 is not set ++# CONFIG_RTC_DRV_DS1343 is not set ++# CONFIG_RTC_DRV_DS1347 is not set ++# CONFIG_RTC_DRV_DS1390 is not set ++# CONFIG_RTC_DRV_MAX6916 is not set ++# CONFIG_RTC_DRV_R9701 is not set ++# CONFIG_RTC_DRV_RX4581 is not set ++# CONFIG_RTC_DRV_RX6110 is not set ++# CONFIG_RTC_DRV_RS5C348 is not set ++# CONFIG_RTC_DRV_MAX6902 is not set ++# CONFIG_RTC_DRV_PCF2123 is not set ++# CONFIG_RTC_DRV_MCP795 is not set ++CONFIG_RTC_I2C_AND_SPI=y ++ ++# ++# SPI and I2C RTC drivers ++# ++# CONFIG_RTC_DRV_DS3232 is not set ++# CONFIG_RTC_DRV_PCF2127 is not set ++# CONFIG_RTC_DRV_RV3029C2 is not set ++ ++# ++# Platform RTC drivers ++# ++# CONFIG_RTC_DRV_CMOS is not set ++# CONFIG_RTC_DRV_DS1286 is not set ++# CONFIG_RTC_DRV_DS1511 is not set ++# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_DS1685_FAMILY is not set ++# CONFIG_RTC_DRV_DS1742 is not set ++# CONFIG_RTC_DRV_DS2404 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set ++# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T35 is not set ++# CONFIG_RTC_DRV_M48T59 is not set ++# CONFIG_RTC_DRV_MSM6242 is not set ++# CONFIG_RTC_DRV_BQ4802 is not set ++# CONFIG_RTC_DRV_RP5C01 is not set ++# CONFIG_RTC_DRV_V3020 is not set ++# CONFIG_RTC_DRV_ZYNQMP is not set ++ ++# ++# on-CPU RTC drivers ++# ++# CONFIG_RTC_DRV_FTRTC010 is not set ++# CONFIG_RTC_DRV_SNVS is not set ++# CONFIG_RTC_DRV_R7301 is not set ++ ++# ++# HID Sensor RTC drivers ++# ++# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set ++CONFIG_DMADEVICES=y ++# CONFIG_DMADEVICES_DEBUG is not set ++ ++# ++# DMA Devices ++# ++CONFIG_DMA_ENGINE=y ++CONFIG_DMA_VIRTUAL_CHANNELS=y ++CONFIG_DMA_OF=y ++# CONFIG_ALTERA_MSGDMA is not set ++# CONFIG_DW_AXI_DMAC is not set ++CONFIG_AXERA_AXI_DMAC=y ++# CONFIG_FSL_EDMA is not set ++# CONFIG_INTEL_IDMA64 is not set ++# CONFIG_NBPFAXI_DMA is not set ++# CONFIG_QCOM_HIDMA_MGMT is not set ++# CONFIG_QCOM_HIDMA is not set ++# CONFIG_DW_DMAC is not set ++ ++# ++# DMA Clients ++# ++# CONFIG_ASYNC_TX_DMA is not set ++# CONFIG_DMATEST is not set ++ ++# ++# DMABUF options ++# ++CONFIG_SYNC_FILE=y ++# CONFIG_SW_SYNC is not set ++# CONFIG_AUXDISPLAY is not set ++CONFIG_UIO=y ++CONFIG_UIO_PDRV_GENIRQ=m ++# CONFIG_UIO_DMEM_GENIRQ is not set ++# CONFIG_UIO_PRUSS is not set ++# CONFIG_VIRT_DRIVERS is not set ++# CONFIG_VIRTIO_MENU is not set ++ ++# ++# Microsoft Hyper-V guest support ++# ++# CONFIG_STAGING is not set ++# CONFIG_GOLDFISH is not set ++# CONFIG_CHROME_PLATFORMS is not set ++# CONFIG_MELLANOX_PLATFORM is not set ++CONFIG_CLKDEV_LOOKUP=y ++CONFIG_HAVE_CLK_PREPARE=y ++CONFIG_COMMON_CLK=y ++ ++# ++# Common Clock Framework ++# ++# CONFIG_CLK_HSDK is not set ++# CONFIG_COMMON_CLK_MAX9485 is not set ++# CONFIG_COMMON_CLK_SI5351 is not set ++# CONFIG_COMMON_CLK_SI514 is not set ++# CONFIG_COMMON_CLK_SI544 is not set ++# CONFIG_COMMON_CLK_SI570 is not set ++# CONFIG_COMMON_CLK_CDCE706 is not set ++# CONFIG_COMMON_CLK_CDCE925 is not set ++# CONFIG_COMMON_CLK_CS2000_CP is not set ++# CONFIG_CLK_QORIQ is not set ++# CONFIG_COMMON_CLK_PWM is not set ++# CONFIG_COMMON_CLK_VC5 is not set ++CONFIG_COMMON_CLK_AXERA=y ++CONFIG_COMMON_CLK_AX620X=y ++# CONFIG_SLAVE_CLK_AX620X is not set ++CONFIG_CLK_AX620U=y ++# CONFIG_HWSPINLOCK is not set ++ ++# ++# Clock Source drivers ++# ++CONFIG_TIMER_OF=y ++CONFIG_TIMER_PROBE=y ++CONFIG_CLKSRC_MMIO=y ++CONFIG_ARM_ARCH_TIMER=y ++CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y ++CONFIG_ARM_GLOBAL_TIMER=y ++CONFIG_ARM_TIMER_SP804=y ++CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y ++# CONFIG_MAILBOX is not set ++# CONFIG_IOMMU_SUPPORT is not set ++ ++# ++# Remoteproc drivers ++# ++# CONFIG_REMOTEPROC is not set ++ ++# ++# Rpmsg drivers ++# ++# CONFIG_RPMSG_VIRTIO is not set ++ ++# ++# SOC (System On Chip) specific Drivers ++# ++ ++# ++# Amlogic SoC drivers ++# ++ ++# ++# Broadcom SoC drivers ++# ++# CONFIG_SOC_BRCMSTB is not set ++ ++# ++# NXP/Freescale QorIQ SoC drivers ++# ++ ++# ++# i.MX SoC drivers ++# ++ ++# ++# Qualcomm SoC drivers ++# ++# CONFIG_SOC_TI is not set ++ ++# ++# Xilinx SoC drivers ++# ++# CONFIG_XILINX_VCU is not set ++# CONFIG_AXERA_MEMORY_DUMP is not set ++# CONFIG_PM_DEVFREQ is not set ++# CONFIG_EXTCON is not set ++# CONFIG_MEMORY is not set ++# CONFIG_IIO is not set ++CONFIG_PWM=y ++CONFIG_PWM_SYSFS=y ++# CONFIG_PWM_FSL_FTM is not set ++# CONFIG_PWM_PCA9685 is not set ++CONFIG_PWM_AXERA=y ++ ++# ++# IRQ chip support ++# ++CONFIG_IRQCHIP=y ++CONFIG_ARM_GIC=y ++CONFIG_ARM_GIC_MAX_NR=1 ++# CONFIG_IPACK_BUS is not set ++CONFIG_RESET_CONTROLLER=y ++# CONFIG_RESET_TI_SYSCON is not set ++# CONFIG_FMC is not set ++ ++# ++# PHY Subsystem ++# ++# CONFIG_GENERIC_PHY is not set ++# CONFIG_BCM_KONA_USB2_PHY is not set ++# CONFIG_PHY_PXA_28NM_HSIC is not set ++# CONFIG_PHY_PXA_28NM_USB2 is not set ++# CONFIG_PHY_MAPPHONE_MDM6600 is not set ++# CONFIG_POWERCAP is not set ++# CONFIG_MCB is not set ++# CONFIG_RAS is not set ++ ++# ++# Android ++# ++# CONFIG_ANDROID is not set ++# CONFIG_DAX is not set ++CONFIG_NVMEM=y ++ ++# ++# HW tracing support ++# ++# CONFIG_STM is not set ++# CONFIG_INTEL_TH is not set ++# CONFIG_FPGA is not set ++# CONFIG_FSI is not set ++# CONFIG_TEE is not set ++# CONFIG_SIOX is not set ++# CONFIG_SLIMBUS is not set ++ ++# ++# File systems ++# ++CONFIG_DCACHE_WORD_ACCESS=y ++CONFIG_FS_IOMAP=y ++CONFIG_EXT2_FS=y ++# CONFIG_EXT2_FS_XATTR is not set ++CONFIG_EXT3_FS=y ++# CONFIG_EXT3_FS_POSIX_ACL is not set ++# CONFIG_EXT3_FS_SECURITY is not set ++CONFIG_EXT4_FS=y ++# CONFIG_EXT4_FS_POSIX_ACL is not set ++# CONFIG_EXT4_FS_SECURITY is not set ++# CONFIG_EXT4_ENCRYPTION is not set ++# CONFIG_EXT4_DEBUG is not set ++CONFIG_JBD2=y ++CONFIG_JBD2_DEBUG=y ++CONFIG_FS_MBCACHE=y ++# CONFIG_REISERFS_FS is not set ++# CONFIG_JFS_FS is not set ++# CONFIG_XFS_FS is not set ++# CONFIG_GFS2_FS is not set ++# CONFIG_OCFS2_FS is not set ++# CONFIG_BTRFS_FS is not set ++# CONFIG_NILFS2_FS is not set ++# CONFIG_F2FS_FS is not set ++CONFIG_EXPORTFS=y ++# CONFIG_EXPORTFS_BLOCK_OPS is not set ++CONFIG_FILE_LOCKING=y ++CONFIG_MANDATORY_FILE_LOCKING=y ++# CONFIG_FS_ENCRYPTION is not set ++CONFIG_FSNOTIFY=y ++CONFIG_DNOTIFY=y ++CONFIG_INOTIFY_USER=y ++# CONFIG_FANOTIFY is not set ++# CONFIG_QUOTA is not set ++# CONFIG_AUTOFS4_FS is not set ++# CONFIG_AUTOFS_FS is not set ++# CONFIG_FUSE_FS is not set ++# CONFIG_OVERLAY_FS is not set ++ ++# ++# Caches ++# ++# CONFIG_FSCACHE is not set ++ ++# ++# CD-ROM/DVD Filesystems ++# ++# CONFIG_ISO9660_FS is not set ++# CONFIG_UDF_FS is not set ++ ++# ++# DOS/FAT/NT Filesystems ++# ++CONFIG_FAT_FS=y ++# CONFIG_MSDOS_FS is not set ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_CODEPAGE=437 ++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" ++# CONFIG_FAT_DEFAULT_UTF8 is not set ++CONFIG_EXFAT_FS=y ++CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" ++CONFIG_EXFAT_VIRTUAL_XATTR=y ++CONFIG_EXFAT_VIRTUAL_XATTR_SELINUX_LABEL="u:object_r:exfat:s0" ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_PROC_PAGE_MONITOR=y ++# CONFIG_PROC_CHILDREN is not set ++CONFIG_KERNFS=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++# CONFIG_TMPFS_POSIX_ACL is not set ++# CONFIG_TMPFS_XATTR is not set ++CONFIG_MEMFD_CREATE=y ++CONFIG_CONFIGFS_FS=y ++CONFIG_MISC_FILESYSTEMS=y ++# CONFIG_ORANGEFS_FS is not set ++# CONFIG_ADFS_FS is not set ++# CONFIG_AFFS_FS is not set ++# CONFIG_ECRYPT_FS is not set ++# CONFIG_HFS_FS is not set ++# CONFIG_HFSPLUS_FS is not set ++# CONFIG_BEFS_FS is not set ++# CONFIG_BFS_FS is not set ++# CONFIG_EFS_FS is not set ++# CONFIG_YAFFS_FS is not set ++# CONFIG_JFFS2_FS is not set ++CONFIG_UBIFS_FS=y ++# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set ++CONFIG_UBIFS_FS_LZO=y ++CONFIG_UBIFS_FS_ZLIB=y ++# CONFIG_UBIFS_ATIME_SUPPORT is not set ++CONFIG_UBIFS_FS_XATTR=y ++# CONFIG_UBIFS_FS_ENCRYPTION is not set ++CONFIG_UBIFS_FS_SECURITY=y ++CONFIG_CRAMFS=y ++CONFIG_CRAMFS_BLOCKDEV=y ++# CONFIG_CRAMFS_MTD is not set ++CONFIG_SQUASHFS=y ++CONFIG_SQUASHFS_FILE_CACHE=y ++# CONFIG_SQUASHFS_FILE_DIRECT is not set ++CONFIG_SQUASHFS_DECOMP_SINGLE=y ++# CONFIG_SQUASHFS_DECOMP_MULTI is not set ++# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set ++# CONFIG_SQUASHFS_XATTR is not set ++CONFIG_SQUASHFS_ZLIB=y ++# CONFIG_SQUASHFS_LZ4 is not set ++CONFIG_SQUASHFS_LZO=y ++# CONFIG_SQUASHFS_XZ is not set ++# CONFIG_SQUASHFS_ZSTD is not set ++# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set ++# CONFIG_SQUASHFS_EMBEDDED is not set ++CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 ++# CONFIG_VXFS_FS is not set ++# CONFIG_MINIX_FS is not set ++# CONFIG_OMFS_FS is not set ++# CONFIG_HPFS_FS is not set ++# CONFIG_QNX4FS_FS is not set ++# CONFIG_QNX6FS_FS is not set ++# CONFIG_ROMFS_FS is not set ++CONFIG_PSTORE=y ++CONFIG_PSTORE_DEFLATE_COMPRESS=y ++# CONFIG_PSTORE_LZO_COMPRESS is not set ++# CONFIG_PSTORE_LZ4_COMPRESS is not set ++# CONFIG_PSTORE_LZ4HC_COMPRESS is not set ++# CONFIG_PSTORE_842_COMPRESS is not set ++# CONFIG_PSTORE_ZSTD_COMPRESS is not set ++CONFIG_PSTORE_COMPRESS=y ++CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y ++CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" ++CONFIG_PSTORE_CONSOLE=y ++# CONFIG_PSTORE_PMSG is not set ++CONFIG_PSTORE_RAM=y ++# CONFIG_SYSV_FS is not set ++# CONFIG_UFS_FS is not set ++CONFIG_NETWORK_FILESYSTEMS=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V2=y ++CONFIG_NFS_V3=y ++# CONFIG_NFS_V3_ACL is not set ++CONFIG_NFS_V4=y ++# CONFIG_NFS_SWAP is not set ++# CONFIG_NFS_V4_1 is not set ++CONFIG_ROOT_NFS=y ++# CONFIG_NFS_USE_LEGACY_DNS is not set ++CONFIG_NFS_USE_KERNEL_DNS=y ++# CONFIG_NFSD is not set ++CONFIG_GRACE_PERIOD=y ++CONFIG_LOCKD=y ++CONFIG_LOCKD_V4=y ++CONFIG_NFS_COMMON=y ++CONFIG_SUNRPC=y ++CONFIG_SUNRPC_GSS=y ++# CONFIG_SUNRPC_DEBUG is not set ++# CONFIG_CEPH_FS is not set ++# CONFIG_CIFS is not set ++# CONFIG_CODA_FS is not set ++# CONFIG_AFS_FS is not set ++CONFIG_NLS=y ++CONFIG_NLS_DEFAULT="iso8859-1" ++CONFIG_NLS_CODEPAGE_437=y ++# CONFIG_NLS_CODEPAGE_737 is not set ++# CONFIG_NLS_CODEPAGE_775 is not set ++# CONFIG_NLS_CODEPAGE_850 is not set ++# CONFIG_NLS_CODEPAGE_852 is not set ++# CONFIG_NLS_CODEPAGE_855 is not set ++# CONFIG_NLS_CODEPAGE_857 is not set ++# CONFIG_NLS_CODEPAGE_860 is not set ++# CONFIG_NLS_CODEPAGE_861 is not set ++# CONFIG_NLS_CODEPAGE_862 is not set ++# CONFIG_NLS_CODEPAGE_863 is not set ++# CONFIG_NLS_CODEPAGE_864 is not set ++# CONFIG_NLS_CODEPAGE_865 is not set ++# CONFIG_NLS_CODEPAGE_866 is not set ++# CONFIG_NLS_CODEPAGE_869 is not set ++# CONFIG_NLS_CODEPAGE_936 is not set ++# CONFIG_NLS_CODEPAGE_950 is not set ++# CONFIG_NLS_CODEPAGE_932 is not set ++# CONFIG_NLS_CODEPAGE_949 is not set ++# CONFIG_NLS_CODEPAGE_874 is not set ++# CONFIG_NLS_ISO8859_8 is not set ++# CONFIG_NLS_CODEPAGE_1250 is not set ++# CONFIG_NLS_CODEPAGE_1251 is not set ++# CONFIG_NLS_ASCII is not set ++CONFIG_NLS_ISO8859_1=y ++# CONFIG_NLS_ISO8859_2 is not set ++# CONFIG_NLS_ISO8859_3 is not set ++# CONFIG_NLS_ISO8859_4 is not set ++# CONFIG_NLS_ISO8859_5 is not set ++# CONFIG_NLS_ISO8859_6 is not set ++# CONFIG_NLS_ISO8859_7 is not set ++# CONFIG_NLS_ISO8859_9 is not set ++# CONFIG_NLS_ISO8859_13 is not set ++# CONFIG_NLS_ISO8859_14 is not set ++# CONFIG_NLS_ISO8859_15 is not set ++# CONFIG_NLS_KOI8_R is not set ++# CONFIG_NLS_KOI8_U is not set ++# CONFIG_NLS_MAC_ROMAN is not set ++# CONFIG_NLS_MAC_CELTIC is not set ++# CONFIG_NLS_MAC_CENTEURO is not set ++# CONFIG_NLS_MAC_CROATIAN is not set ++# CONFIG_NLS_MAC_CYRILLIC is not set ++# CONFIG_NLS_MAC_GAELIC is not set ++# CONFIG_NLS_MAC_GREEK is not set ++# CONFIG_NLS_MAC_ICELAND is not set ++# CONFIG_NLS_MAC_INUIT is not set ++# CONFIG_NLS_MAC_ROMANIAN is not set ++# CONFIG_NLS_MAC_TURKISH is not set ++# CONFIG_NLS_UTF8 is not set ++# CONFIG_DLM is not set ++ ++# ++# Security options ++# ++CONFIG_KEYS=y ++# CONFIG_PERSISTENT_KEYRINGS is not set ++# CONFIG_BIG_KEYS is not set ++# CONFIG_ENCRYPTED_KEYS is not set ++# CONFIG_KEY_DH_OPERATIONS is not set ++# CONFIG_SECURITY_DMESG_RESTRICT is not set ++# CONFIG_SECURITY is not set ++# CONFIG_SECURITYFS is not set ++CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y ++# CONFIG_HARDENED_USERCOPY is not set ++# CONFIG_FORTIFY_SOURCE is not set ++# CONFIG_STATIC_USERMODEHELPER is not set ++CONFIG_DEFAULT_SECURITY_DAC=y ++CONFIG_DEFAULT_SECURITY="" ++CONFIG_CRYPTO=y ++ ++# ++# Crypto core or helper ++# ++CONFIG_CRYPTO_ALGAPI=y ++CONFIG_CRYPTO_ALGAPI2=y ++CONFIG_CRYPTO_AEAD=m ++CONFIG_CRYPTO_AEAD2=y ++CONFIG_CRYPTO_BLKCIPHER2=y ++CONFIG_CRYPTO_HASH=y ++CONFIG_CRYPTO_HASH2=y ++CONFIG_CRYPTO_RNG=m ++CONFIG_CRYPTO_RNG2=y ++CONFIG_CRYPTO_RNG_DEFAULT=m ++CONFIG_CRYPTO_AKCIPHER2=y ++CONFIG_CRYPTO_KPP2=y ++CONFIG_CRYPTO_ACOMP2=y ++# CONFIG_CRYPTO_RSA is not set ++# CONFIG_CRYPTO_DH is not set ++# CONFIG_CRYPTO_ECDH is not set ++CONFIG_CRYPTO_MANAGER=m ++CONFIG_CRYPTO_MANAGER2=y ++# CONFIG_CRYPTO_USER is not set ++CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y ++# CONFIG_CRYPTO_GF128MUL is not set ++CONFIG_CRYPTO_NULL=m ++CONFIG_CRYPTO_NULL2=y ++# CONFIG_CRYPTO_PCRYPT is not set ++CONFIG_CRYPTO_WORKQUEUE=y ++# CONFIG_CRYPTO_CRYPTD is not set ++# CONFIG_CRYPTO_MCRYPTD is not set ++# CONFIG_CRYPTO_AUTHENC is not set ++# CONFIG_CRYPTO_TEST is not set ++ ++# ++# Authenticated Encryption with Associated Data ++# ++# CONFIG_CRYPTO_CCM is not set ++# CONFIG_CRYPTO_GCM is not set ++# CONFIG_CRYPTO_CHACHA20POLY1305 is not set ++# CONFIG_CRYPTO_AEGIS128 is not set ++# CONFIG_CRYPTO_AEGIS128L is not set ++# CONFIG_CRYPTO_AEGIS256 is not set ++# CONFIG_CRYPTO_MORUS640 is not set ++# CONFIG_CRYPTO_MORUS1280 is not set ++# CONFIG_CRYPTO_SEQIV is not set ++CONFIG_CRYPTO_ECHAINIV=m ++ ++# ++# Block modes ++# ++# CONFIG_CRYPTO_CBC is not set ++# CONFIG_CRYPTO_CFB is not set ++# CONFIG_CRYPTO_CTR is not set ++# CONFIG_CRYPTO_CTS is not set ++# CONFIG_CRYPTO_ECB is not set ++# CONFIG_CRYPTO_LRW is not set ++# CONFIG_CRYPTO_PCBC is not set ++# CONFIG_CRYPTO_XTS is not set ++# CONFIG_CRYPTO_KEYWRAP is not set ++ ++# ++# Hash modes ++# ++# CONFIG_CRYPTO_CMAC is not set ++CONFIG_CRYPTO_HMAC=m ++# CONFIG_CRYPTO_XCBC is not set ++# CONFIG_CRYPTO_VMAC is not set ++ ++# ++# Digest ++# ++CONFIG_CRYPTO_CRC32C=y ++# CONFIG_CRYPTO_CRC32 is not set ++# CONFIG_CRYPTO_CRCT10DIF is not set ++# CONFIG_CRYPTO_GHASH is not set ++# CONFIG_CRYPTO_POLY1305 is not set ++# CONFIG_CRYPTO_MD4 is not set ++# CONFIG_CRYPTO_MD5 is not set ++# CONFIG_CRYPTO_MICHAEL_MIC is not set ++# CONFIG_CRYPTO_RMD128 is not set ++# CONFIG_CRYPTO_RMD160 is not set ++# CONFIG_CRYPTO_RMD256 is not set ++# CONFIG_CRYPTO_RMD320 is not set ++# CONFIG_CRYPTO_SHA1 is not set ++CONFIG_CRYPTO_SHA256=m ++# CONFIG_CRYPTO_SHA512 is not set ++# CONFIG_CRYPTO_SHA3 is not set ++# CONFIG_CRYPTO_SM3 is not set ++# CONFIG_CRYPTO_TGR192 is not set ++# CONFIG_CRYPTO_WP512 is not set ++ ++# ++# Ciphers ++# ++CONFIG_CRYPTO_AES=y ++# CONFIG_CRYPTO_AES_TI is not set ++# CONFIG_CRYPTO_ANUBIS is not set ++# CONFIG_CRYPTO_ARC4 is not set ++# CONFIG_CRYPTO_BLOWFISH is not set ++# CONFIG_CRYPTO_CAMELLIA is not set ++# CONFIG_CRYPTO_CAST5 is not set ++# CONFIG_CRYPTO_CAST6 is not set ++# CONFIG_CRYPTO_DES is not set ++# CONFIG_CRYPTO_FCRYPT is not set ++# CONFIG_CRYPTO_KHAZAD is not set ++# CONFIG_CRYPTO_SALSA20 is not set ++# CONFIG_CRYPTO_CHACHA20 is not set ++# CONFIG_CRYPTO_SEED is not set ++# CONFIG_CRYPTO_SERPENT is not set ++# CONFIG_CRYPTO_SM4 is not set ++# CONFIG_CRYPTO_TEA is not set ++# CONFIG_CRYPTO_TWOFISH is not set ++ ++# ++# Compression ++# ++CONFIG_CRYPTO_DEFLATE=y ++CONFIG_CRYPTO_LZO=y ++# CONFIG_CRYPTO_842 is not set ++# CONFIG_CRYPTO_LZ4 is not set ++# CONFIG_CRYPTO_LZ4HC is not set ++# CONFIG_CRYPTO_ZSTD is not set ++ ++# ++# Random Number Generation ++# ++# CONFIG_CRYPTO_ANSI_CPRNG is not set ++CONFIG_CRYPTO_DRBG_MENU=m ++CONFIG_CRYPTO_DRBG_HMAC=y ++# CONFIG_CRYPTO_DRBG_HASH is not set ++CONFIG_CRYPTO_DRBG=m ++CONFIG_CRYPTO_JITTERENTROPY=m ++# CONFIG_CRYPTO_USER_API_HASH is not set ++# CONFIG_CRYPTO_USER_API_SKCIPHER is not set ++# CONFIG_CRYPTO_USER_API_RNG is not set ++# CONFIG_CRYPTO_USER_API_AEAD is not set ++# CONFIG_CRYPTO_HW is not set ++# CONFIG_ASYMMETRIC_KEY_TYPE is not set ++ ++# ++# Certificates for signature checking ++# ++# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++CONFIG_HAVE_ARCH_BITREVERSE=y ++CONFIG_RATIONAL=y ++CONFIG_GENERIC_STRNCPY_FROM_USER=y ++CONFIG_GENERIC_STRNLEN_USER=y ++CONFIG_GENERIC_NET_UTILS=y ++CONFIG_GENERIC_PCI_IOMAP=y ++CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y ++# CONFIG_CRC_CCITT is not set ++CONFIG_CRC16=y ++# CONFIG_CRC_T10DIF is not set ++# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC32=y ++# CONFIG_CRC32_SELFTEST is not set ++CONFIG_CRC32_SLICEBY8=y ++# CONFIG_CRC32_SLICEBY4 is not set ++# CONFIG_CRC32_SARWATE is not set ++# CONFIG_CRC32_BIT is not set ++# CONFIG_CRC64 is not set ++# CONFIG_CRC4 is not set ++# CONFIG_CRC7 is not set ++# CONFIG_LIBCRC32C is not set ++# CONFIG_CRC8 is not set ++# CONFIG_RANDOM32_SELFTEST is not set ++CONFIG_ZLIB_INFLATE=y ++CONFIG_ZLIB_DEFLATE=y ++CONFIG_LZO_COMPRESS=y ++CONFIG_LZO_DECOMPRESS=y ++CONFIG_XZ_DEC=y ++CONFIG_XZ_DEC_X86=y ++CONFIG_XZ_DEC_POWERPC=y ++CONFIG_XZ_DEC_IA64=y ++CONFIG_XZ_DEC_ARM=y ++CONFIG_XZ_DEC_ARMTHUMB=y ++CONFIG_XZ_DEC_SPARC=y ++CONFIG_XZ_DEC_BCJ=y ++# CONFIG_XZ_DEC_TEST is not set ++CONFIG_GENERIC_ALLOCATOR=y ++CONFIG_REED_SOLOMON=y ++CONFIG_REED_SOLOMON_ENC8=y ++CONFIG_REED_SOLOMON_DEC8=y ++CONFIG_ASSOCIATIVE_ARRAY=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_DMA=y ++CONFIG_NEED_DMA_MAP_STATE=y ++CONFIG_HAVE_GENERIC_DMA_COHERENT=y ++CONFIG_SGL_ALLOC=y ++CONFIG_CPU_RMAP=y ++CONFIG_DQL=y ++CONFIG_NLATTR=y ++# CONFIG_CORDIC is not set ++# CONFIG_DDR is not set ++# CONFIG_IRQ_POLL is not set ++CONFIG_LIBFDT=y ++CONFIG_OID_REGISTRY=y ++CONFIG_FONT_SUPPORT=y ++# CONFIG_FONTS is not set ++CONFIG_FONT_8x8=y ++CONFIG_FONT_8x16=y ++CONFIG_SG_POOL=y ++CONFIG_ARCH_HAS_SG_CHAIN=y ++CONFIG_SBITMAP=y ++# CONFIG_STRING_SELFTEST is not set ++ ++# ++# Kernel hacking ++# ++ ++# ++# printk and dmesg options ++# ++CONFIG_PRINTK_TIME=y ++CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 ++CONFIG_CONSOLE_LOGLEVEL_QUIET=4 ++CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 ++# CONFIG_BOOT_PRINTK_DELAY is not set ++CONFIG_DYNAMIC_DEBUG=y ++ ++# ++# Compile-time checks and compiler options ++# ++CONFIG_DEBUG_INFO=y ++# CONFIG_DEBUG_INFO_REDUCED is not set ++# CONFIG_DEBUG_INFO_SPLIT is not set ++# CONFIG_DEBUG_INFO_DWARF4 is not set ++# CONFIG_GDB_SCRIPTS is not set ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_FRAME_WARN=1024 ++# CONFIG_STRIP_ASM_SYMS is not set ++# CONFIG_READABLE_ASM is not set ++# CONFIG_UNUSED_SYMBOLS is not set ++# CONFIG_PAGE_OWNER is not set ++CONFIG_DEBUG_FS=y ++# CONFIG_HEADERS_CHECK is not set ++# CONFIG_DEBUG_SECTION_MISMATCH is not set ++CONFIG_SECTION_MISMATCH_WARN_ONLY=y ++# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set ++CONFIG_MAGIC_SYSRQ=y ++CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 ++CONFIG_MAGIC_SYSRQ_SERIAL=y ++CONFIG_DEBUG_KERNEL=y ++ ++# ++# Memory Debugging ++# ++# CONFIG_PAGE_EXTENSION is not set ++# CONFIG_DEBUG_PAGEALLOC is not set ++# CONFIG_PAGE_POISONING is not set ++# CONFIG_DEBUG_RODATA_TEST is not set ++# CONFIG_DEBUG_OBJECTS is not set ++# CONFIG_SLUB_DEBUG_ON is not set ++# CONFIG_SLUB_STATS is not set ++CONFIG_HAVE_DEBUG_KMEMLEAK=y ++# CONFIG_DEBUG_KMEMLEAK is not set ++# CONFIG_DEBUG_STACK_USAGE is not set ++# CONFIG_DEBUG_VM is not set ++CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y ++# CONFIG_DEBUG_VIRTUAL is not set ++CONFIG_DEBUG_MEMORY_INIT=y ++# CONFIG_DEBUG_PER_CPU_MAPS is not set ++# CONFIG_DEBUG_HIGHMEM is not set ++CONFIG_ARCH_HAS_KCOV=y ++CONFIG_CC_HAS_SANCOV_TRACE_PC=y ++# CONFIG_KCOV is not set ++# CONFIG_DEBUG_SHIRQ is not set ++ ++# ++# Debug Lockups and Hangs ++# ++# CONFIG_SOFTLOCKUP_DETECTOR is not set ++CONFIG_DETECT_HUNG_TASK=y ++CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 ++# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set ++CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 ++# CONFIG_WQ_WATCHDOG is not set ++CONFIG_PANIC_ON_OOPS=y ++CONFIG_PANIC_ON_OOPS_VALUE=1 ++CONFIG_PANIC_TIMEOUT=5 ++# CONFIG_SCHED_DEBUG is not set ++# CONFIG_SCHEDSTATS is not set ++# CONFIG_SCHED_STACK_END_CHECK is not set ++# CONFIG_DEBUG_TIMEKEEPING is not set ++CONFIG_DEBUG_PREEMPT=y ++ ++# ++# Lock Debugging (spinlocks, mutexes, etc...) ++# ++CONFIG_LOCK_DEBUGGING_SUPPORT=y ++# CONFIG_PROVE_LOCKING is not set ++# CONFIG_LOCK_STAT is not set ++# CONFIG_DEBUG_RT_MUTEXES is not set ++# CONFIG_DEBUG_SPINLOCK is not set ++# CONFIG_DEBUG_MUTEXES is not set ++# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set ++# CONFIG_DEBUG_RWSEMS is not set ++# CONFIG_DEBUG_LOCK_ALLOC is not set ++# CONFIG_DEBUG_ATOMIC_SLEEP is not set ++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set ++# CONFIG_LOCK_TORTURE_TEST is not set ++# CONFIG_WW_MUTEX_SELFTEST is not set ++CONFIG_STACKTRACE=y ++# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set ++# CONFIG_DEBUG_KOBJECT is not set ++CONFIG_DEBUG_BUGVERBOSE=y ++# CONFIG_DEBUG_LIST is not set ++# CONFIG_DEBUG_PI_LIST is not set ++# CONFIG_DEBUG_SG is not set ++# CONFIG_DEBUG_NOTIFIERS is not set ++# CONFIG_DEBUG_CREDENTIALS is not set ++ ++# ++# RCU Debugging ++# ++# CONFIG_RCU_PERF_TEST is not set ++# CONFIG_RCU_TORTURE_TEST is not set ++CONFIG_RCU_CPU_STALL_TIMEOUT=21 ++CONFIG_RCU_TRACE=y ++# CONFIG_RCU_EQS_DEBUG is not set ++# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set ++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set ++# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set ++# CONFIG_NOTIFIER_ERROR_INJECTION is not set ++# CONFIG_FAULT_INJECTION is not set ++# CONFIG_LATENCYTOP is not set ++CONFIG_HAVE_FUNCTION_TRACER=y ++CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y ++CONFIG_HAVE_DYNAMIC_FTRACE=y ++CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y ++CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y ++CONFIG_HAVE_SYSCALL_TRACEPOINTS=y ++CONFIG_HAVE_C_RECORDMCOUNT=y ++CONFIG_TRACE_CLOCK=y ++CONFIG_RING_BUFFER=y ++CONFIG_RING_BUFFER_ALLOW_SWAP=y ++CONFIG_TRACING_SUPPORT=y ++CONFIG_FTRACE=y ++# CONFIG_FUNCTION_TRACER is not set ++# CONFIG_PREEMPTIRQ_EVENTS is not set ++# CONFIG_IRQSOFF_TRACER is not set ++# CONFIG_PREEMPT_TRACER is not set ++# CONFIG_SCHED_TRACER is not set ++# CONFIG_HWLAT_TRACER is not set ++# CONFIG_ENABLE_DEFAULT_TRACERS is not set ++# CONFIG_FTRACE_SYSCALLS is not set ++# CONFIG_TRACER_SNAPSHOT is not set ++CONFIG_BRANCH_PROFILE_NONE=y ++# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set ++# CONFIG_PROFILE_ALL_BRANCHES is not set ++# CONFIG_STACK_TRACER is not set ++# CONFIG_BLK_DEV_IO_TRACE is not set ++# CONFIG_TRACEPOINT_BENCHMARK is not set ++# CONFIG_RING_BUFFER_BENCHMARK is not set ++# CONFIG_RING_BUFFER_STARTUP_TEST is not set ++# CONFIG_PREEMPTIRQ_DELAY_TEST is not set ++CONFIG_TRACING_EVENTS_GPIO=y ++# CONFIG_DMA_API_DEBUG is not set ++CONFIG_RUNTIME_TESTING_MENU=y ++# CONFIG_LKDTM is not set ++# CONFIG_TEST_LIST_SORT is not set ++# CONFIG_TEST_SORT is not set ++# CONFIG_BACKTRACE_SELF_TEST is not set ++# CONFIG_RBTREE_TEST is not set ++# CONFIG_INTERVAL_TREE_TEST is not set ++# CONFIG_PERCPU_TEST is not set ++# CONFIG_ATOMIC64_SELFTEST is not set ++# CONFIG_TEST_HEXDUMP is not set ++# CONFIG_TEST_STRING_HELPERS is not set ++# CONFIG_TEST_KSTRTOX is not set ++# CONFIG_TEST_PRINTF is not set ++# CONFIG_TEST_BITMAP is not set ++# CONFIG_TEST_BITFIELD is not set ++# CONFIG_TEST_UUID is not set ++# CONFIG_TEST_OVERFLOW is not set ++# CONFIG_TEST_RHASHTABLE is not set ++# CONFIG_TEST_HASH is not set ++# CONFIG_TEST_IDA is not set ++# CONFIG_TEST_LKM is not set ++# CONFIG_TEST_USER_COPY is not set ++# CONFIG_TEST_BPF is not set ++# CONFIG_FIND_BIT_BENCHMARK is not set ++# CONFIG_TEST_FIRMWARE is not set ++# CONFIG_TEST_SYSCTL is not set ++# CONFIG_TEST_UDELAY is not set ++# CONFIG_TEST_STATIC_KEYS is not set ++# CONFIG_TEST_KMOD is not set ++# CONFIG_MEMTEST is not set ++# CONFIG_BUG_ON_DATA_CORRUPTION is not set ++# CONFIG_SAMPLES is not set ++CONFIG_HAVE_ARCH_KGDB=y ++# CONFIG_KGDB is not set ++# CONFIG_UBSAN is not set ++CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y ++# CONFIG_STRICT_DEVMEM is not set ++# CONFIG_ARM_PTDUMP_DEBUGFS is not set ++# CONFIG_DEBUG_WX is not set ++CONFIG_ARM_UNWIND=y ++CONFIG_DEBUG_USER=y ++# CONFIG_DEBUG_LL is not set ++CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" ++CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" ++# CONFIG_PID_IN_CONTEXTIDR is not set ++# CONFIG_CORESIGHT is not set +diff --git a/arch/arm/configs/axera_AX620_dashcam_defconfig b/arch/arm/configs/axera_AX620_dashcam_defconfig +new file mode 100644 +index 000000000..0a6bc676f +--- /dev/null ++++ b/arch/arm/configs/axera_AX620_dashcam_defconfig +@@ -0,0 +1,3451 @@ ++# ++# Automatically generated file; DO NOT EDIT. ++# Linux/arm 4.19.125 Kernel Configuration ++# ++ ++# ++# Compiler: arm-linux-gnueabihf-gcc (Linaro GCC 7.5-2019.12) 7.5.0 ++# ++CONFIG_CC_IS_GCC=y ++CONFIG_GCC_VERSION=70500 ++CONFIG_CLANG_VERSION=0 ++CONFIG_CC_HAS_ASM_GOTO=y ++CONFIG_IRQ_WORK=y ++CONFIG_BUILDTIME_EXTABLE_SORT=y ++ ++# ++# General setup ++# ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++# CONFIG_COMPILE_TEST is not set ++CONFIG_LOCALVERSION="" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_BUILD_SALT="" ++CONFIG_HAVE_KERNEL_GZIP=y ++CONFIG_HAVE_KERNEL_LZMA=y ++CONFIG_HAVE_KERNEL_XZ=y ++CONFIG_HAVE_KERNEL_LZO=y ++CONFIG_HAVE_KERNEL_LZ4=y ++CONFIG_KERNEL_GZIP=y ++# CONFIG_KERNEL_LZMA is not set ++# CONFIG_KERNEL_XZ is not set ++# CONFIG_KERNEL_LZO is not set ++# CONFIG_KERNEL_LZ4 is not set ++CONFIG_DEFAULT_HOSTNAME="(none)" ++CONFIG_SWAP=y ++CONFIG_SYSVIPC=y ++CONFIG_SYSVIPC_SYSCTL=y ++# CONFIG_POSIX_MQUEUE is not set ++CONFIG_CROSS_MEMORY_ATTACH=y ++# CONFIG_USELIB is not set ++# CONFIG_AUDIT is not set ++CONFIG_HAVE_ARCH_AUDITSYSCALL=y ++ ++# ++# IRQ subsystem ++# ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_GENERIC_IRQ_SHOW=y ++CONFIG_GENERIC_IRQ_SHOW_LEVEL=y ++CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y ++CONFIG_GENERIC_IRQ_MIGRATION=y ++CONFIG_HARDIRQS_SW_RESEND=y ++CONFIG_GENERIC_IRQ_CHIP=y ++CONFIG_IRQ_DOMAIN=y ++CONFIG_IRQ_DOMAIN_HIERARCHY=y ++CONFIG_HANDLE_DOMAIN_IRQ=y ++CONFIG_IRQ_FORCED_THREADING=y ++CONFIG_SPARSE_IRQ=y ++# CONFIG_GENERIC_IRQ_DEBUGFS is not set ++CONFIG_GENERIC_IRQ_MULTI_HANDLER=y ++CONFIG_ARCH_CLOCKSOURCE_DATA=y ++CONFIG_GENERIC_TIME_VSYSCALL=y ++CONFIG_GENERIC_CLOCKEVENTS=y ++CONFIG_ARCH_HAS_TICK_BROADCAST=y ++CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y ++ ++# ++# Timers subsystem ++# ++CONFIG_TICK_ONESHOT=y ++CONFIG_HZ_PERIODIC=y ++# CONFIG_NO_HZ_IDLE is not set ++# CONFIG_NO_HZ_FULL is not set ++# CONFIG_NO_HZ is not set ++CONFIG_HIGH_RES_TIMERS=y ++# CONFIG_PREEMPT_NONE is not set ++# CONFIG_PREEMPT_VOLUNTARY is not set ++CONFIG_PREEMPT=y ++CONFIG_PREEMPT_COUNT=y ++ ++# ++# CPU/Task time and stats accounting ++# ++CONFIG_TICK_CPU_ACCOUNTING=y ++# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set ++# CONFIG_IRQ_TIME_ACCOUNTING is not set ++# CONFIG_BSD_PROCESS_ACCT is not set ++# CONFIG_TASKSTATS is not set ++# CONFIG_CPU_ISOLATION is not set ++ ++# ++# RCU Subsystem ++# ++CONFIG_PREEMPT_RCU=y ++# CONFIG_RCU_EXPERT is not set ++CONFIG_SRCU=y ++CONFIG_TREE_SRCU=y ++CONFIG_TASKS_RCU=y ++CONFIG_RCU_STALL_COMMON=y ++CONFIG_RCU_NEED_SEGCBLIST=y ++CONFIG_BUILD_BIN2C=y ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_LOG_BUF_SHIFT=17 ++CONFIG_AXLOG_BUF_SHIFT=20 ++CONFIG_LOG_CPU_MAX_BUF_SHIFT=13 ++CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 ++CONFIG_GENERIC_SCHED_CLOCK=y ++CONFIG_CGROUPS=y ++# CONFIG_MEMCG is not set ++# CONFIG_BLK_CGROUP is not set ++# CONFIG_CGROUP_SCHED is not set ++# CONFIG_CGROUP_PIDS is not set ++# CONFIG_CGROUP_RDMA is not set ++# CONFIG_CGROUP_FREEZER is not set ++CONFIG_CPUSETS=y ++CONFIG_PROC_PID_CPUSET=y ++# CONFIG_CGROUP_DEVICE is not set ++# CONFIG_CGROUP_CPUACCT is not set ++# CONFIG_CGROUP_PERF is not set ++# CONFIG_CGROUP_DEBUG is not set ++CONFIG_NAMESPACES=y ++# CONFIG_UTS_NS is not set ++# CONFIG_IPC_NS is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set ++# CONFIG_NET_NS is not set ++# CONFIG_CHECKPOINT_RESTORE is not set ++# CONFIG_SCHED_AUTOGROUP is not set ++# CONFIG_SYSFS_DEPRECATED is not set ++# CONFIG_RELAY is not set ++# CONFIG_BLK_DEV_INITRD is not set ++CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y ++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set ++CONFIG_SYSCTL=y ++CONFIG_ANON_INODES=y ++CONFIG_HAVE_UID16=y ++CONFIG_BPF=y ++# CONFIG_EXPERT is not set ++CONFIG_UID16=y ++CONFIG_MULTIUSER=y ++CONFIG_SYSFS_SYSCALL=y ++CONFIG_FHANDLE=y ++CONFIG_POSIX_TIMERS=y ++CONFIG_PRINTK=y ++CONFIG_PRINTK_NMI=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++CONFIG_BASE_FULL=y ++CONFIG_FUTEX=y ++CONFIG_FUTEX_PI=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_TIMERFD=y ++CONFIG_EVENTFD=y ++CONFIG_SHMEM=y ++CONFIG_AIO=y ++CONFIG_ADVISE_SYSCALLS=y ++CONFIG_MEMBARRIER=y ++CONFIG_KALLSYMS=y ++# CONFIG_KALLSYMS_ALL is not set ++CONFIG_KALLSYMS_BASE_RELATIVE=y ++# CONFIG_BPF_SYSCALL is not set ++# CONFIG_USERFAULTFD is not set ++CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y ++CONFIG_RSEQ=y ++# CONFIG_EMBEDDED is not set ++CONFIG_HAVE_PERF_EVENTS=y ++CONFIG_PERF_USE_VMALLOC=y ++ ++# ++# Kernel Performance Events And Counters ++# ++CONFIG_PERF_EVENTS=y ++# CONFIG_DEBUG_PERF_USE_VMALLOC is not set ++CONFIG_VM_EVENT_COUNTERS=y ++CONFIG_SLUB_DEBUG=y ++CONFIG_COMPAT_BRK=y ++# CONFIG_SLAB is not set ++CONFIG_SLUB=y ++CONFIG_SLAB_MERGE_DEFAULT=y ++# CONFIG_SLAB_FREELIST_RANDOM is not set ++# CONFIG_SLAB_FREELIST_HARDENED is not set ++CONFIG_SLUB_CPU_PARTIAL=y ++CONFIG_PROFILING=y ++CONFIG_TRACEPOINTS=y ++CONFIG_ARM=y ++CONFIG_ARM_HAS_SG_CHAIN=y ++CONFIG_MIGHT_HAVE_PCI=y ++CONFIG_SYS_SUPPORTS_APM_EMULATION=y ++CONFIG_HAVE_PROC_CPU=y ++CONFIG_NO_IOPORT_MAP=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_RWSEM_XCHGADD_ALGORITHM=y ++CONFIG_FIX_EARLYCON_MEM=y ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_ARCH_SUPPORTS_UPROBES=y ++CONFIG_ARM_PATCH_PHYS_VIRT=y ++CONFIG_GENERIC_BUG=y ++CONFIG_PGTABLE_LEVELS=2 ++ ++# ++# System Type ++# ++CONFIG_MMU=y ++CONFIG_ARCH_MMAP_RND_BITS_MIN=8 ++CONFIG_ARCH_MMAP_RND_BITS_MAX=16 ++CONFIG_ARCH_MULTIPLATFORM=y ++# CONFIG_ARCH_EBSA110 is not set ++# CONFIG_ARCH_EP93XX is not set ++# CONFIG_ARCH_FOOTBRIDGE is not set ++# CONFIG_ARCH_NETX is not set ++# CONFIG_ARCH_IOP13XX is not set ++# CONFIG_ARCH_IOP32X is not set ++# CONFIG_ARCH_IOP33X is not set ++# CONFIG_ARCH_IXP4XX is not set ++# CONFIG_ARCH_DOVE is not set ++# CONFIG_ARCH_KS8695 is not set ++# CONFIG_ARCH_W90X900 is not set ++# CONFIG_ARCH_LPC32XX is not set ++# CONFIG_ARCH_PXA is not set ++# CONFIG_ARCH_RPC is not set ++# CONFIG_ARCH_SA1100 is not set ++# CONFIG_ARCH_S3C24XX is not set ++# CONFIG_ARCH_DAVINCI is not set ++# CONFIG_ARCH_OMAP1 is not set ++ ++# ++# Multiple platform selection ++# ++ ++# ++# CPU Core family selection ++# ++# CONFIG_ARCH_MULTI_V6 is not set ++CONFIG_ARCH_MULTI_V7=y ++CONFIG_ARCH_MULTI_V6_V7=y ++# CONFIG_ARCH_VIRT is not set ++# CONFIG_ARCH_ACTIONS is not set ++# CONFIG_ARCH_ALPINE is not set ++# CONFIG_ARCH_ARTPEC is not set ++# CONFIG_ARCH_AT91 is not set ++CONFIG_ARCH_AXERA=y ++ ++# ++# Axera platform type ++# ++CONFIG_ARCH_AX620=y ++# CONFIG_ARCH_BCM is not set ++# CONFIG_ARCH_BERLIN is not set ++# CONFIG_ARCH_DIGICOLOR is not set ++# CONFIG_ARCH_EXYNOS is not set ++# CONFIG_ARCH_HIGHBANK is not set ++# CONFIG_ARCH_HISI is not set ++# CONFIG_ARCH_MXC is not set ++# CONFIG_ARCH_KEYSTONE is not set ++# CONFIG_ARCH_MEDIATEK is not set ++# CONFIG_ARCH_MESON is not set ++# CONFIG_ARCH_MMP is not set ++# CONFIG_ARCH_MVEBU is not set ++# CONFIG_ARCH_NPCM is not set ++ ++# ++# TI OMAP/AM/DM/DRA Family ++# ++# CONFIG_ARCH_OMAP3 is not set ++# CONFIG_ARCH_OMAP4 is not set ++# CONFIG_SOC_OMAP5 is not set ++# CONFIG_SOC_AM33XX is not set ++# CONFIG_SOC_AM43XX is not set ++# CONFIG_SOC_DRA7XX is not set ++# CONFIG_ARCH_SIRF is not set ++# CONFIG_ARCH_QCOM is not set ++# CONFIG_ARCH_REALVIEW is not set ++# CONFIG_ARCH_ROCKCHIP is not set ++# CONFIG_ARCH_S5PV210 is not set ++# CONFIG_ARCH_RENESAS is not set ++# CONFIG_ARCH_SOCFPGA is not set ++# CONFIG_PLAT_SPEAR is not set ++# CONFIG_ARCH_STI is not set ++# CONFIG_ARCH_STM32 is not set ++# CONFIG_ARCH_SUNXI is not set ++# CONFIG_ARCH_TANGO is not set ++# CONFIG_ARCH_TEGRA is not set ++# CONFIG_ARCH_UNIPHIER is not set ++# CONFIG_ARCH_U8500 is not set ++# CONFIG_ARCH_VEXPRESS is not set ++# CONFIG_ARCH_WM8850 is not set ++# CONFIG_ARCH_ZX is not set ++# CONFIG_ARCH_ZYNQ is not set ++ ++# ++# Axera platform type ++# ++ ++# ++# Processor Type ++# ++CONFIG_CPU_V7=y ++CONFIG_CPU_THUMB_CAPABLE=y ++CONFIG_CPU_32v6K=y ++CONFIG_CPU_32v7=y ++CONFIG_CPU_ABRT_EV7=y ++CONFIG_CPU_PABRT_V7=y ++CONFIG_CPU_CACHE_V7=y ++CONFIG_CPU_CACHE_VIPT=y ++CONFIG_CPU_COPY_V6=y ++CONFIG_CPU_TLB_V7=y ++CONFIG_CPU_HAS_ASID=y ++CONFIG_CPU_CP15=y ++CONFIG_CPU_CP15_MMU=y ++ ++# ++# Processor Features ++# ++# CONFIG_ARM_LPAE is not set ++CONFIG_ARM_THUMB=y ++# CONFIG_ARM_THUMBEE is not set ++CONFIG_ARM_VIRT_EXT=y ++CONFIG_SWP_EMULATE=y ++# CONFIG_CPU_ICACHE_DISABLE is not set ++# CONFIG_CPU_BPREDICT_DISABLE is not set ++CONFIG_CPU_SPECTRE=y ++CONFIG_HARDEN_BRANCH_PREDICTOR=y ++CONFIG_KUSER_HELPERS=y ++CONFIG_VDSO=y ++CONFIG_OUTER_CACHE=y ++CONFIG_OUTER_CACHE_SYNC=y ++CONFIG_MIGHT_HAVE_CACHE_L2X0=y ++CONFIG_CACHE_L2X0=y ++# CONFIG_CACHE_L2X0_PMU is not set ++# CONFIG_PL310_ERRATA_588369 is not set ++# CONFIG_PL310_ERRATA_727915 is not set ++CONFIG_PL310_ERRATA_753970=y ++# CONFIG_PL310_ERRATA_769419 is not set ++CONFIG_ARM_L1_CACHE_SHIFT_6=y ++CONFIG_ARM_L1_CACHE_SHIFT=6 ++CONFIG_ARM_DMA_MEM_BUFFERABLE=y ++CONFIG_ARM_HEAVY_MB=y ++CONFIG_DEBUG_ALIGN_RODATA=y ++# CONFIG_ARM_ERRATA_430973 is not set ++CONFIG_ARM_ERRATA_643719=y ++CONFIG_ARM_ERRATA_720789=y ++# CONFIG_ARM_ERRATA_754322 is not set ++# CONFIG_ARM_ERRATA_754327 is not set ++# CONFIG_ARM_ERRATA_764369 is not set ++# CONFIG_ARM_ERRATA_775420 is not set ++# CONFIG_ARM_ERRATA_798181 is not set ++# CONFIG_ARM_ERRATA_773022 is not set ++# CONFIG_ARM_ERRATA_818325_852422 is not set ++# CONFIG_ARM_ERRATA_821420 is not set ++# CONFIG_ARM_ERRATA_825619 is not set ++# CONFIG_ARM_ERRATA_852421 is not set ++# CONFIG_ARM_ERRATA_852423 is not set ++ ++# ++# Bus support ++# ++# CONFIG_PCI is not set ++ ++# ++# PCI Endpoint ++# ++# CONFIG_PCI_ENDPOINT is not set ++# CONFIG_PCCARD is not set ++ ++# ++# Kernel Features ++# ++CONFIG_HAVE_SMP=y ++CONFIG_SMP=y ++CONFIG_SMP_ON_UP=y ++CONFIG_ARM_CPU_TOPOLOGY=y ++# CONFIG_SCHED_MC is not set ++# CONFIG_SCHED_SMT is not set ++CONFIG_HAVE_ARM_SCU=y ++CONFIG_HAVE_ARM_ARCH_TIMER=y ++CONFIG_HAVE_ARM_TWD=y ++CONFIG_MCPM=y ++# CONFIG_BIG_LITTLE is not set ++CONFIG_VMSPLIT_3G=y ++# CONFIG_VMSPLIT_3G_OPT is not set ++# CONFIG_VMSPLIT_2G is not set ++# CONFIG_VMSPLIT_1G is not set ++CONFIG_PAGE_OFFSET=0xC0000000 ++CONFIG_NR_CPUS=4 ++CONFIG_HOTPLUG_CPU=y ++# CONFIG_ARM_PSCI is not set ++CONFIG_ARCH_NR_GPIO=0 ++CONFIG_HZ_FIXED=0 ++# CONFIG_HZ_100 is not set ++CONFIG_HZ_200=y ++# CONFIG_HZ_250 is not set ++# CONFIG_HZ_300 is not set ++# CONFIG_HZ_500 is not set ++# CONFIG_HZ_1000 is not set ++CONFIG_HZ=200 ++CONFIG_SCHED_HRTICK=y ++# CONFIG_THUMB2_KERNEL is not set ++CONFIG_ARM_PATCH_IDIV=y ++CONFIG_AEABI=y ++# CONFIG_OABI_COMPAT is not set ++CONFIG_HAVE_ARCH_PFN_VALID=y ++CONFIG_HIGHMEM=y ++CONFIG_HIGHPTE=y ++CONFIG_CPU_SW_DOMAIN_PAN=y ++CONFIG_HW_PERF_EVENTS=y ++CONFIG_ARCH_WANT_GENERAL_HUGETLB=y ++CONFIG_ARM_MODULE_PLTS=y ++CONFIG_FORCE_MAX_ZONEORDER=14 ++CONFIG_ALIGNMENT_TRAP=y ++# CONFIG_UACCESS_WITH_MEMCPY is not set ++CONFIG_SECCOMP=y ++# CONFIG_PARAVIRT is not set ++# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set ++# CONFIG_XEN is not set ++ ++# ++# Boot options ++# ++CONFIG_USE_OF=y ++CONFIG_ATAGS=y ++# CONFIG_DEPRECATED_PARAM_STRUCT is not set ++CONFIG_ZBOOT_ROM_TEXT=0x0 ++CONFIG_ZBOOT_ROM_BSS=0x0 ++# CONFIG_ARM_APPENDED_DTB is not set ++CONFIG_CMDLINE="console=ttyAMA0" ++CONFIG_CMDLINE_FROM_BOOTLOADER=y ++# CONFIG_CMDLINE_EXTEND is not set ++# CONFIG_CMDLINE_FORCE is not set ++# CONFIG_KEXEC is not set ++# CONFIG_CRASH_DUMP is not set ++CONFIG_AUTO_ZRELADDR=y ++# CONFIG_EFI is not set ++ ++# ++# CPU Power Management ++# ++ ++# ++# CPU Frequency scaling ++# ++# CONFIG_CPU_FREQ is not set ++ ++# ++# CPU Idle ++# ++# CONFIG_CPU_IDLE is not set ++ ++# ++# Floating point emulation ++# ++ ++# ++# At least one emulation must be selected ++# ++CONFIG_VFP=y ++CONFIG_VFPv3=y ++CONFIG_NEON=y ++CONFIG_KERNEL_MODE_NEON=y ++ ++# ++# Power management options ++# ++CONFIG_SUSPEND=y ++CONFIG_SUSPEND_FREEZER=y ++# CONFIG_HIBERNATION is not set ++CONFIG_PM_SLEEP=y ++CONFIG_PM_SLEEP_SMP=y ++CONFIG_PM_AUTOSLEEP=y ++CONFIG_PM_WAKELOCKS=y ++CONFIG_PM_WAKELOCKS_LIMIT=100 ++CONFIG_PM_WAKELOCKS_GC=y ++CONFIG_PM=y ++# CONFIG_PM_DEBUG is not set ++# CONFIG_APM_EMULATION is not set ++CONFIG_PM_CLK=y ++# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set ++CONFIG_CPU_PM=y ++CONFIG_ARCH_SUSPEND_POSSIBLE=y ++CONFIG_ARM_CPU_SUSPEND=y ++CONFIG_ARCH_HIBERNATION_POSSIBLE=y ++ ++# ++# Firmware Drivers ++# ++CONFIG_HAVE_ARM_SMCCC=y ++# CONFIG_GOOGLE_FIRMWARE is not set ++ ++# ++# Tegra firmware driver ++# ++# CONFIG_ARM_CRYPTO is not set ++# CONFIG_VIRTUALIZATION is not set ++ ++# ++# General architecture-dependent options ++# ++CONFIG_OPROFILE=y ++CONFIG_HAVE_OPROFILE=y ++# CONFIG_KPROBES is not set ++# CONFIG_JUMP_LABEL is not set ++CONFIG_UPROBES=y ++CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y ++CONFIG_ARCH_USE_BUILTIN_BSWAP=y ++CONFIG_HAVE_KPROBES=y ++CONFIG_HAVE_KRETPROBES=y ++CONFIG_HAVE_OPTPROBES=y ++CONFIG_HAVE_NMI=y ++CONFIG_HAVE_ARCH_TRACEHOOK=y ++CONFIG_HAVE_DMA_CONTIGUOUS=y ++CONFIG_GENERIC_SMP_IDLE_THREAD=y ++CONFIG_GENERIC_IDLE_POLL_SETUP=y ++CONFIG_ARCH_HAS_FORTIFY_SOURCE=y ++CONFIG_ARCH_HAS_SET_MEMORY=y ++CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y ++CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y ++CONFIG_HAVE_RSEQ=y ++CONFIG_HAVE_CLK=y ++CONFIG_HAVE_HW_BREAKPOINT=y ++CONFIG_HAVE_PERF_REGS=y ++CONFIG_HAVE_PERF_USER_STACK_DUMP=y ++CONFIG_HAVE_ARCH_JUMP_LABEL=y ++CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y ++CONFIG_HAVE_ARCH_SECCOMP_FILTER=y ++CONFIG_SECCOMP_FILTER=y ++CONFIG_HAVE_STACKPROTECTOR=y ++CONFIG_CC_HAS_STACKPROTECTOR_NONE=y ++CONFIG_STACKPROTECTOR=y ++CONFIG_STACKPROTECTOR_STRONG=y ++CONFIG_HAVE_CONTEXT_TRACKING=y ++CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y ++CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y ++CONFIG_HAVE_MOD_ARCH_SPECIFIC=y ++CONFIG_MODULES_USE_ELF_REL=y ++CONFIG_ARCH_HAS_ELF_RANDOMIZE=y ++CONFIG_HAVE_ARCH_MMAP_RND_BITS=y ++CONFIG_HAVE_EXIT_THREAD=y ++CONFIG_ARCH_MMAP_RND_BITS=8 ++CONFIG_CLONE_BACKWARDS=y ++CONFIG_OLD_SIGSUSPEND3=y ++CONFIG_OLD_SIGACTION=y ++CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y ++CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y ++CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y ++CONFIG_STRICT_KERNEL_RWX=y ++CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y ++CONFIG_STRICT_MODULE_RWX=y ++CONFIG_ARCH_HAS_PHYS_TO_DMA=y ++CONFIG_REFCOUNT_FULL=y ++ ++# ++# GCOV-based kernel profiling ++# ++# CONFIG_GCOV_KERNEL is not set ++CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y ++CONFIG_PLUGIN_HOSTCC="" ++CONFIG_HAVE_GCC_PLUGINS=y ++CONFIG_RT_MUTEXES=y ++CONFIG_BASE_SMALL=0 ++CONFIG_MODULES=y ++# CONFIG_MODULE_FORCE_LOAD is not set ++CONFIG_MODULE_UNLOAD=y ++# CONFIG_MODULE_FORCE_UNLOAD is not set ++# CONFIG_MODVERSIONS is not set ++# CONFIG_MODULE_SRCVERSION_ALL is not set ++# CONFIG_MODULE_SIG is not set ++# CONFIG_MODULE_COMPRESS is not set ++# CONFIG_TRIM_UNUSED_KSYMS is not set ++CONFIG_MODULES_TREE_LOOKUP=y ++CONFIG_BLOCK=y ++CONFIG_LBDAF=y ++CONFIG_BLK_SCSI_REQUEST=y ++# CONFIG_BLK_DEV_BSG is not set ++# CONFIG_BLK_DEV_BSGLIB is not set ++# CONFIG_BLK_DEV_INTEGRITY is not set ++# CONFIG_BLK_DEV_ZONED is not set ++CONFIG_BLK_CMDLINE_PARSER=y ++# CONFIG_BLK_WBT is not set ++CONFIG_BLK_DEBUG_FS=y ++# CONFIG_BLK_SED_OPAL is not set ++ ++# ++# Partition Types ++# ++CONFIG_PARTITION_ADVANCED=y ++# CONFIG_ACORN_PARTITION is not set ++# CONFIG_AIX_PARTITION is not set ++# CONFIG_OSF_PARTITION is not set ++# CONFIG_AMIGA_PARTITION is not set ++# CONFIG_ATARI_PARTITION is not set ++# CONFIG_MAC_PARTITION is not set ++CONFIG_MSDOS_PARTITION=y ++# CONFIG_BSD_DISKLABEL is not set ++# CONFIG_MINIX_SUBPARTITION is not set ++# CONFIG_SOLARIS_X86_PARTITION is not set ++# CONFIG_UNIXWARE_DISKLABEL is not set ++# CONFIG_LDM_PARTITION is not set ++# CONFIG_SGI_PARTITION is not set ++# CONFIG_ULTRIX_PARTITION is not set ++# CONFIG_SUN_PARTITION is not set ++# CONFIG_KARMA_PARTITION is not set ++CONFIG_EFI_PARTITION=y ++# CONFIG_SYSV68_PARTITION is not set ++CONFIG_CMDLINE_PARTITION=y ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++# CONFIG_IOSCHED_DEADLINE is not set ++# CONFIG_IOSCHED_CFQ is not set ++CONFIG_DEFAULT_NOOP=y ++CONFIG_DEFAULT_IOSCHED="noop" ++CONFIG_MQ_IOSCHED_DEADLINE=y ++CONFIG_MQ_IOSCHED_KYBER=y ++# CONFIG_IOSCHED_BFQ is not set ++CONFIG_UNINLINE_SPIN_UNLOCK=y ++CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y ++CONFIG_MUTEX_SPIN_ON_OWNER=y ++CONFIG_RWSEM_SPIN_ON_OWNER=y ++CONFIG_LOCK_SPIN_ON_OWNER=y ++CONFIG_FREEZER=y ++ ++# ++# Executable file formats ++# ++CONFIG_BINFMT_ELF=y ++# CONFIG_BINFMT_ELF_FDPIC is not set ++CONFIG_ELFCORE=y ++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set ++CONFIG_BINFMT_SCRIPT=y ++# CONFIG_BINFMT_FLAT is not set ++# CONFIG_BINFMT_MISC is not set ++CONFIG_COREDUMP=y ++ ++# ++# Memory Management options ++# ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++CONFIG_HAVE_MEMBLOCK=y ++CONFIG_NO_BOOTMEM=y ++CONFIG_MEMORY_ISOLATION=y ++CONFIG_SPLIT_PTLOCK_CPUS=4 ++CONFIG_COMPACTION=y ++CONFIG_MIGRATION=y ++CONFIG_BOUNCE=y ++# CONFIG_KSM is not set ++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 ++# CONFIG_CLEANCACHE is not set ++# CONFIG_FRONTSWAP is not set ++CONFIG_CMA=y ++# CONFIG_CMA_DEBUG is not set ++# CONFIG_CMA_DEBUGFS is not set ++CONFIG_CMA_AREAS=7 ++# CONFIG_ZPOOL is not set ++# CONFIG_ZBUD is not set ++# CONFIG_ZSMALLOC is not set ++CONFIG_GENERIC_EARLY_IOREMAP=y ++# CONFIG_IDLE_PAGE_TRACKING is not set ++# CONFIG_PERCPU_STATS is not set ++# CONFIG_GUP_BENCHMARK is not set ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++# CONFIG_PACKET_DIAG is not set ++CONFIG_UNIX=y ++# CONFIG_UNIX_DIAG is not set ++# CONFIG_TLS is not set ++CONFIG_XFRM=y ++# CONFIG_XFRM_USER is not set ++# CONFIG_XFRM_SUB_POLICY is not set ++# CONFIG_XFRM_MIGRATE is not set ++# CONFIG_XFRM_STATISTICS is not set ++# CONFIG_NET_KEY is not set ++CONFIG_INET=y ++# CONFIG_IP_MULTICAST is not set ++# CONFIG_IP_ADVANCED_ROUTER is not set ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++CONFIG_IP_PNP_BOOTP=y ++# CONFIG_IP_PNP_RARP is not set ++# CONFIG_NET_IPIP is not set ++# CONFIG_NET_IPGRE_DEMUX is not set ++# CONFIG_SYN_COOKIES is not set ++# CONFIG_NET_IPVTI is not set ++# CONFIG_NET_FOU is not set ++# CONFIG_INET_AH is not set ++# CONFIG_INET_ESP is not set ++# CONFIG_INET_IPCOMP is not set ++CONFIG_INET_XFRM_MODE_TRANSPORT=y ++CONFIG_INET_XFRM_MODE_TUNNEL=y ++CONFIG_INET_XFRM_MODE_BEET=y ++CONFIG_INET_DIAG=y ++CONFIG_INET_TCP_DIAG=y ++# CONFIG_INET_UDP_DIAG is not set ++# CONFIG_INET_RAW_DIAG is not set ++# CONFIG_INET_DIAG_DESTROY is not set ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++# CONFIG_TCP_MD5SIG is not set ++# CONFIG_IPV6 is not set ++# CONFIG_NETWORK_SECMARK is not set ++CONFIG_NET_PTP_CLASSIFY=y ++# CONFIG_NETWORK_PHY_TIMESTAMPING is not set ++# CONFIG_NETFILTER is not set ++# CONFIG_BPFILTER is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_RDS is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++# CONFIG_L2TP is not set ++# CONFIG_BRIDGE is not set ++CONFIG_HAVE_NET_DSA=y ++# CONFIG_NET_DSA is not set ++# CONFIG_VLAN_8021Q is not set ++# CONFIG_DECNET is not set ++# CONFIG_LLC2 is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_PHONET is not set ++# CONFIG_IEEE802154 is not set ++# CONFIG_NET_SCHED is not set ++# CONFIG_DCB is not set ++CONFIG_DNS_RESOLVER=y ++# CONFIG_BATMAN_ADV is not set ++# CONFIG_OPENVSWITCH is not set ++# CONFIG_VSOCKETS is not set ++# CONFIG_NETLINK_DIAG is not set ++# CONFIG_MPLS is not set ++# CONFIG_NET_NSH is not set ++# CONFIG_HSR is not set ++# CONFIG_NET_SWITCHDEV is not set ++# CONFIG_NET_L3_MASTER_DEV is not set ++# CONFIG_NET_NCSI is not set ++CONFIG_RPS=y ++CONFIG_RFS_ACCEL=y ++CONFIG_XPS=y ++# CONFIG_CGROUP_NET_PRIO is not set ++# CONFIG_CGROUP_NET_CLASSID is not set ++CONFIG_NET_RX_BUSY_POLL=y ++CONFIG_BQL=y ++# CONFIG_BPF_JIT is not set ++CONFIG_NET_FLOW_LIMIT=y ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_NET_DROP_MONITOR is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_CAN is not set ++# CONFIG_BT is not set ++# CONFIG_AF_RXRPC is not set ++# CONFIG_AF_KCM is not set ++# CONFIG_WIRELESS is not set ++# CONFIG_WIMAX is not set ++# CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set ++# CONFIG_CAIF is not set ++# CONFIG_CEPH_LIB is not set ++# CONFIG_NFC is not set ++# CONFIG_PSAMPLE is not set ++# CONFIG_NET_IFE is not set ++# CONFIG_LWTUNNEL is not set ++CONFIG_GRO_CELLS=y ++# CONFIG_NET_DEVLINK is not set ++CONFIG_MAY_USE_DEVLINK=y ++# CONFIG_FAILOVER is not set ++CONFIG_HAVE_EBPF_JIT=y ++ ++# ++# Device Drivers ++# ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER=y ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_DEVTMPFS=y ++# CONFIG_DEVTMPFS_MOUNT is not set ++CONFIG_STANDALONE=y ++CONFIG_PREVENT_FIRMWARE_BUILD=y ++ ++# ++# Firmware loader ++# ++CONFIG_FW_LOADER=y ++CONFIG_EXTRA_FIRMWARE="" ++# CONFIG_FW_LOADER_USER_HELPER is not set ++CONFIG_ALLOW_DEV_COREDUMP=y ++# CONFIG_DEBUG_DRIVER is not set ++# CONFIG_DEBUG_DEVRES is not set ++# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set ++# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set ++CONFIG_GENERIC_CPU_AUTOPROBE=y ++CONFIG_REGMAP=y ++CONFIG_REGMAP_I2C=y ++CONFIG_REGMAP_SPI=y ++CONFIG_REGMAP_MMIO=y ++CONFIG_DMA_SHARED_BUFFER=y ++# CONFIG_DMA_FENCE_TRACE is not set ++CONFIG_DMA_CMA=y ++ ++# ++# Default contiguous memory area size: ++# ++CONFIG_CMA_SIZE_MBYTES=64 ++CONFIG_CMA_SIZE_SEL_MBYTES=y ++# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set ++# CONFIG_CMA_SIZE_SEL_MIN is not set ++# CONFIG_CMA_SIZE_SEL_MAX is not set ++CONFIG_CMA_ALIGNMENT=8 ++CONFIG_GENERIC_ARCH_TOPOLOGY=y ++ ++# ++# Bus devices ++# ++# CONFIG_BRCMSTB_GISB_ARB is not set ++# CONFIG_SIMPLE_PM_BUS is not set ++# CONFIG_VEXPRESS_CONFIG is not set ++# CONFIG_CONNECTOR is not set ++# CONFIG_GNSS is not set ++CONFIG_MTD=y ++CONFIG_MTD_TESTS=m ++# CONFIG_MTD_REDBOOT_PARTS is not set ++CONFIG_MTD_CMDLINE_PARTS=y ++# CONFIG_MTD_AFS_PARTS is not set ++CONFIG_MTD_OF_PARTS=y ++# CONFIG_MTD_AR7_PARTS is not set ++ ++# ++# Partition parsers ++# ++ ++# ++# User Modules And Translation Layers ++# ++CONFIG_MTD_BLKDEVS=y ++CONFIG_MTD_BLOCK=y ++# CONFIG_FTL is not set ++# CONFIG_NFTL is not set ++# CONFIG_INFTL is not set ++# CONFIG_RFD_FTL is not set ++# CONFIG_SSFDC is not set ++# CONFIG_SM_FTL is not set ++# CONFIG_MTD_OOPS is not set ++# CONFIG_MTD_SWAP is not set ++CONFIG_MTD_PARTITIONED_MASTER=y ++ ++# ++# RAM/ROM/Flash chip drivers ++# ++# CONFIG_MTD_CFI is not set ++# CONFIG_MTD_JEDECPROBE is not set ++CONFIG_MTD_MAP_BANK_WIDTH_1=y ++CONFIG_MTD_MAP_BANK_WIDTH_2=y ++CONFIG_MTD_MAP_BANK_WIDTH_4=y ++CONFIG_MTD_CFI_I1=y ++CONFIG_MTD_CFI_I2=y ++# CONFIG_MTD_RAM is not set ++# CONFIG_MTD_ROM is not set ++# CONFIG_MTD_ABSENT is not set ++ ++# ++# Mapping drivers for chip access ++# ++# CONFIG_MTD_COMPLEX_MAPPINGS is not set ++# CONFIG_MTD_PLATRAM is not set ++ ++# ++# Self-contained MTD device drivers ++# ++# CONFIG_MTD_DATAFLASH is not set ++CONFIG_MTD_M25P80=y ++# CONFIG_MTD_MCHP23K256 is not set ++# CONFIG_MTD_SST25L is not set ++# CONFIG_MTD_SLRAM is not set ++# CONFIG_MTD_PHRAM is not set ++# CONFIG_MTD_MTDRAM is not set ++# CONFIG_MTD_BLOCK2MTD is not set ++ ++# ++# Disk-On-Chip Device Drivers ++# ++# CONFIG_MTD_DOCG3 is not set ++CONFIG_MTD_NAND_CORE=y ++# CONFIG_MTD_ONENAND is not set ++# CONFIG_MTD_NAND is not set ++CONFIG_MTD_SPI_NAND=y ++ ++# ++# LPDDR & LPDDR2 PCM memory drivers ++# ++# CONFIG_MTD_LPDDR is not set ++# CONFIG_MTD_LPDDR2_NVM is not set ++CONFIG_MTD_SPI_NOR=y ++# CONFIG_MTD_MT81xx_NOR is not set ++# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set ++# CONFIG_SPI_CADENCE_QUADSPI is not set ++CONFIG_MTD_UBI=y ++CONFIG_MTD_UBI_WL_THRESHOLD=4096 ++CONFIG_MTD_UBI_BEB_LIMIT=20 ++# CONFIG_MTD_UBI_FASTMAP is not set ++# CONFIG_MTD_UBI_GLUEBI is not set ++# CONFIG_MTD_UBI_BLOCK is not set ++CONFIG_DTC=y ++CONFIG_OF=y ++# CONFIG_OF_UNITTEST is not set ++CONFIG_OF_FLATTREE=y ++CONFIG_OF_EARLY_FLATTREE=y ++CONFIG_OF_KOBJ=y ++CONFIG_OF_ADDRESS=y ++CONFIG_OF_IRQ=y ++CONFIG_OF_NET=y ++CONFIG_OF_MDIO=y ++CONFIG_OF_RESERVED_MEM=y ++# CONFIG_OF_OVERLAY is not set ++CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y ++# CONFIG_PARPORT is not set ++CONFIG_BLK_DEV=y ++CONFIG_BLK_DEV_NULL_BLK=y ++# CONFIG_BLK_DEV_LOOP is not set ++# CONFIG_BLK_DEV_DRBD is not set ++# CONFIG_BLK_DEV_NBD is not set ++# CONFIG_BLK_DEV_RAM is not set ++# CONFIG_CDROM_PKTCDVD is not set ++# CONFIG_ATA_OVER_ETH is not set ++# CONFIG_BLK_DEV_RBD is not set ++ ++# ++# NVME Support ++# ++# CONFIG_NVME_FC is not set ++# CONFIG_NVME_TARGET is not set ++ ++# ++# Misc devices ++# ++# CONFIG_AD525X_DPOT is not set ++# CONFIG_DUMMY_IRQ is not set ++# CONFIG_ICS932S401 is not set ++# CONFIG_ENCLOSURE_SERVICES is not set ++# CONFIG_APDS9802ALS is not set ++# CONFIG_ISL29003 is not set ++# CONFIG_ISL29020 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_SENSORS_BH1770 is not set ++# CONFIG_SENSORS_APDS990X is not set ++# CONFIG_HMC6352 is not set ++# CONFIG_DS1682 is not set ++# CONFIG_USB_SWITCH_FSA9480 is not set ++# CONFIG_LATTICE_ECP3_CONFIG is not set ++# CONFIG_SRAM is not set ++# CONFIG_C2PORT is not set ++ ++# ++# EEPROM support ++# ++# CONFIG_EEPROM_AT24 is not set ++# CONFIG_EEPROM_AT25 is not set ++# CONFIG_EEPROM_LEGACY is not set ++# CONFIG_EEPROM_MAX6875 is not set ++# CONFIG_EEPROM_93CX6 is not set ++# CONFIG_EEPROM_93XX46 is not set ++# CONFIG_EEPROM_IDT_89HPESX is not set ++ ++# ++# Texas Instruments shared transport line discipline ++# ++# CONFIG_TI_ST is not set ++# CONFIG_SENSORS_LIS3_SPI is not set ++# CONFIG_SENSORS_LIS3_I2C is not set ++# CONFIG_ALTERA_STAPL is not set ++ ++# ++# Intel MIC & related support ++# ++ ++# ++# Intel MIC Bus Driver ++# ++ ++# ++# SCIF Bus Driver ++# ++ ++# ++# VOP Bus Driver ++# ++ ++# ++# Intel MIC Host Driver ++# ++ ++# ++# Intel MIC Card Driver ++# ++ ++# ++# SCIF Driver ++# ++ ++# ++# Intel MIC Coprocessor State Management (COSM) Drivers ++# ++ ++# ++# VOP Driver ++# ++# CONFIG_ECHO is not set ++# CONFIG_MISC_RTSX_USB is not set ++ ++# ++# SCSI device support ++# ++CONFIG_SCSI_MOD=y ++# CONFIG_RAID_ATTRS is not set ++CONFIG_SCSI=y ++CONFIG_SCSI_DMA=y ++CONFIG_SCSI_MQ_DEFAULT=y ++# CONFIG_SCSI_PROC_FS is not set ++ ++# ++# SCSI support type (disk, tape, CD-ROM) ++# ++CONFIG_BLK_DEV_SD=y ++# CONFIG_CHR_DEV_ST is not set ++# CONFIG_CHR_DEV_OSST is not set ++# CONFIG_BLK_DEV_SR is not set ++# CONFIG_CHR_DEV_SG is not set ++# CONFIG_CHR_DEV_SCH is not set ++# CONFIG_SCSI_CONSTANTS is not set ++# CONFIG_SCSI_LOGGING is not set ++# CONFIG_SCSI_SCAN_ASYNC is not set ++ ++# ++# SCSI Transports ++# ++# CONFIG_SCSI_SPI_ATTRS is not set ++# CONFIG_SCSI_FC_ATTRS is not set ++# CONFIG_SCSI_ISCSI_ATTRS is not set ++# CONFIG_SCSI_SAS_ATTRS is not set ++# CONFIG_SCSI_SAS_LIBSAS is not set ++# CONFIG_SCSI_SRP_ATTRS is not set ++CONFIG_SCSI_LOWLEVEL=y ++# CONFIG_ISCSI_TCP is not set ++# CONFIG_ISCSI_BOOT_SYSFS is not set ++# CONFIG_SCSI_UFSHCD is not set ++# CONFIG_SCSI_DEBUG is not set ++# CONFIG_SCSI_DH is not set ++# CONFIG_SCSI_OSD_INITIATOR is not set ++# CONFIG_ATA is not set ++# CONFIG_MD is not set ++# CONFIG_TARGET_CORE is not set ++CONFIG_NETDEVICES=y ++CONFIG_MII=y ++CONFIG_NET_CORE=y ++# CONFIG_BONDING is not set ++# CONFIG_DUMMY is not set ++# CONFIG_EQUALIZER is not set ++# CONFIG_NET_TEAM is not set ++# CONFIG_MACVLAN is not set ++# CONFIG_VXLAN is not set ++# CONFIG_GENEVE is not set ++# CONFIG_GTP is not set ++# CONFIG_MACSEC is not set ++# CONFIG_NETCONSOLE is not set ++# CONFIG_TUN is not set ++# CONFIG_TUN_VNET_CROSS_LE is not set ++# CONFIG_VETH is not set ++# CONFIG_NLMON is not set ++ ++# ++# CAIF transport drivers ++# ++ ++# ++# Distributed Switch Architecture drivers ++# ++CONFIG_ETHERNET=y ++# CONFIG_NET_VENDOR_ALACRITECH is not set ++# CONFIG_ALTERA_TSE is not set ++# CONFIG_NET_VENDOR_AMAZON is not set ++# CONFIG_NET_VENDOR_AQUANTIA is not set ++# CONFIG_NET_VENDOR_ARC is not set ++# CONFIG_NET_VENDOR_AURORA is not set ++# CONFIG_NET_VENDOR_BROADCOM is not set ++# CONFIG_NET_VENDOR_CADENCE is not set ++# CONFIG_NET_VENDOR_CAVIUM is not set ++# CONFIG_NET_VENDOR_CIRRUS is not set ++# CONFIG_NET_VENDOR_CORTINA is not set ++# CONFIG_DM9000 is not set ++# CONFIG_DNET is not set ++# CONFIG_NET_VENDOR_EZCHIP is not set ++# CONFIG_NET_VENDOR_FARADAY is not set ++# CONFIG_NET_VENDOR_HISILICON is not set ++# CONFIG_NET_VENDOR_HUAWEI is not set ++# CONFIG_NET_VENDOR_INTEL is not set ++# CONFIG_NET_VENDOR_MARVELL is not set ++# CONFIG_NET_VENDOR_MELLANOX is not set ++# CONFIG_NET_VENDOR_MICREL is not set ++CONFIG_NET_VENDOR_MICROCHIP=y ++# CONFIG_ENC28J60 is not set ++# CONFIG_ENCX24J600 is not set ++# CONFIG_NET_VENDOR_MICROSEMI is not set ++# CONFIG_NET_VENDOR_NATSEMI is not set ++# CONFIG_NET_VENDOR_NETRONOME is not set ++# CONFIG_NET_VENDOR_NI is not set ++# CONFIG_ETHOC is not set ++# CONFIG_NET_VENDOR_QUALCOMM is not set ++# CONFIG_NET_VENDOR_RENESAS is not set ++# CONFIG_NET_VENDOR_ROCKER is not set ++# CONFIG_NET_VENDOR_SAMSUNG is not set ++# CONFIG_NET_VENDOR_SEEQ is not set ++# CONFIG_NET_VENDOR_SOLARFLARE is not set ++# CONFIG_NET_VENDOR_SMSC is not set ++# CONFIG_NET_VENDOR_SOCIONEXT is not set ++CONFIG_NET_VENDOR_STMICRO=y ++CONFIG_STMMAC_ETH=y ++CONFIG_STMMAC_PLATFORM=y ++# CONFIG_DWMAC_DWC_QOS_ETH is not set ++# CONFIG_DWMAC_GENERIC is not set ++CONFIG_DWMAC_AXERA=y ++CONFIG_DWMAC_AXERA_AX620=y ++# CONFIG_DWMAC_AXERA_HAPS is not set ++# CONFIG_NET_VENDOR_SYNOPSYS is not set ++# CONFIG_NET_VENDOR_VIA is not set ++# CONFIG_NET_VENDOR_WIZNET is not set ++CONFIG_MDIO_DEVICE=y ++CONFIG_MDIO_BUS=y ++# CONFIG_MDIO_BCM_UNIMAC is not set ++# CONFIG_MDIO_BITBANG is not set ++# CONFIG_MDIO_BUS_MUX_GPIO is not set ++# CONFIG_MDIO_BUS_MUX_MMIOREG is not set ++# CONFIG_MDIO_HISI_FEMAC is not set ++# CONFIG_MDIO_MSCC_MIIM is not set ++CONFIG_PHYLIB=y ++CONFIG_SWPHY=y ++ ++# ++# MII PHY device drivers ++# ++# CONFIG_AMD_PHY is not set ++# CONFIG_AQUANTIA_PHY is not set ++# CONFIG_AX88796B_PHY is not set ++# CONFIG_AT803X_PHY is not set ++# CONFIG_BCM7XXX_PHY is not set ++# CONFIG_BCM87XX_PHY is not set ++# CONFIG_BROADCOM_PHY is not set ++# CONFIG_CICADA_PHY is not set ++# CONFIG_CORTINA_PHY is not set ++# CONFIG_DAVICOM_PHY is not set ++# CONFIG_DP83822_PHY is not set ++# CONFIG_DP83TC811_PHY is not set ++# CONFIG_DP83848_PHY is not set ++# CONFIG_DP83867_PHY is not set ++CONFIG_FIXED_PHY=y ++# CONFIG_ICPLUS_PHY is not set ++# CONFIG_INTEL_XWAY_PHY is not set ++# CONFIG_LSI_ET1011C_PHY is not set ++# CONFIG_LXT_PHY is not set ++CONFIG_MARVELL_PHY=y ++# CONFIG_MARVELL_10G_PHY is not set ++# CONFIG_MICREL_PHY is not set ++# CONFIG_MICROCHIP_PHY is not set ++# CONFIG_MICROCHIP_T1_PHY is not set ++# CONFIG_MICROSEMI_PHY is not set ++# CONFIG_NATIONAL_PHY is not set ++# CONFIG_QSEMI_PHY is not set ++CONFIG_REALTEK_PHY=y ++# CONFIG_RENESAS_PHY is not set ++# CONFIG_ROCKCHIP_PHY is not set ++# CONFIG_SMSC_PHY is not set ++# CONFIG_STE10XP is not set ++# CONFIG_TERANETICS_PHY is not set ++# CONFIG_VITESSE_PHY is not set ++# CONFIG_XILINX_GMII2RGMII is not set ++# CONFIG_MICREL_KS8995MA is not set ++# CONFIG_PPP is not set ++# CONFIG_SLIP is not set ++CONFIG_USB_NET_DRIVERS=y ++# CONFIG_USB_CATC is not set ++# CONFIG_USB_KAWETH is not set ++# CONFIG_USB_PEGASUS is not set ++# CONFIG_USB_RTL8150 is not set ++# CONFIG_USB_RTL8152 is not set ++# CONFIG_USB_LAN78XX is not set ++# CONFIG_USB_USBNET is not set ++# CONFIG_USB_IPHETH is not set ++# CONFIG_WLAN is not set ++ ++# ++# Enable WiMAX (Networking options) to see the WiMAX drivers ++# ++# CONFIG_WAN is not set ++# CONFIG_NETDEVSIM is not set ++# CONFIG_NET_FAILOVER is not set ++# CONFIG_ISDN is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=y ++# CONFIG_INPUT_FF_MEMLESS is not set ++# CONFIG_INPUT_POLLDEV is not set ++# CONFIG_INPUT_SPARSEKMAP is not set ++# CONFIG_INPUT_MATRIXKMAP is not set ++ ++# ++# Userland interfaces ++# ++# CONFIG_INPUT_MOUSEDEV is not set ++# CONFIG_INPUT_JOYDEV is not set ++CONFIG_INPUT_EVDEV=y ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++CONFIG_INPUT_KEYBOARD=y ++# CONFIG_KEYBOARD_ADP5588 is not set ++# CONFIG_KEYBOARD_ADP5589 is not set ++CONFIG_KEYBOARD_ATKBD=y ++# CONFIG_KEYBOARD_QT1070 is not set ++# CONFIG_KEYBOARD_QT2160 is not set ++# CONFIG_KEYBOARD_DLINK_DIR685 is not set ++# CONFIG_KEYBOARD_LKKBD is not set ++# CONFIG_KEYBOARD_GPIO is not set ++# CONFIG_KEYBOARD_GPIO_POLLED is not set ++# CONFIG_KEYBOARD_TCA6416 is not set ++# CONFIG_KEYBOARD_TCA8418 is not set ++# CONFIG_KEYBOARD_MATRIX is not set ++# CONFIG_KEYBOARD_LM8333 is not set ++# CONFIG_KEYBOARD_MAX7359 is not set ++# CONFIG_KEYBOARD_MCS is not set ++# CONFIG_KEYBOARD_MPR121 is not set ++# CONFIG_KEYBOARD_NEWTON is not set ++# CONFIG_KEYBOARD_OPENCORES is not set ++# CONFIG_KEYBOARD_SAMSUNG is not set ++# CONFIG_KEYBOARD_STOWAWAY is not set ++# CONFIG_KEYBOARD_SUNKBD is not set ++# CONFIG_KEYBOARD_OMAP4 is not set ++# CONFIG_KEYBOARD_XTKBD is not set ++# CONFIG_KEYBOARD_CAP11XX is not set ++# CONFIG_KEYBOARD_BCM is not set ++CONFIG_INPUT_MOUSE=y ++CONFIG_MOUSE_PS2=y ++CONFIG_MOUSE_PS2_ALPS=y ++CONFIG_MOUSE_PS2_BYD=y ++CONFIG_MOUSE_PS2_LOGIPS2PP=y ++CONFIG_MOUSE_PS2_SYNAPTICS=y ++CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y ++CONFIG_MOUSE_PS2_CYPRESS=y ++CONFIG_MOUSE_PS2_TRACKPOINT=y ++# CONFIG_MOUSE_PS2_ELANTECH is not set ++# CONFIG_MOUSE_PS2_SENTELIC is not set ++# CONFIG_MOUSE_PS2_TOUCHKIT is not set ++CONFIG_MOUSE_PS2_FOCALTECH=y ++CONFIG_MOUSE_PS2_SMBUS=y ++# CONFIG_MOUSE_SERIAL is not set ++# CONFIG_MOUSE_APPLETOUCH is not set ++# CONFIG_MOUSE_BCM5974 is not set ++# CONFIG_MOUSE_CYAPA is not set ++# CONFIG_MOUSE_ELAN_I2C is not set ++# CONFIG_MOUSE_VSXXXAA is not set ++# CONFIG_MOUSE_GPIO is not set ++# CONFIG_MOUSE_SYNAPTICS_I2C is not set ++# CONFIG_MOUSE_SYNAPTICS_USB is not set ++# CONFIG_INPUT_JOYSTICK is not set ++# CONFIG_INPUT_TABLET is not set ++# CONFIG_INPUT_TOUCHSCREEN is not set ++# CONFIG_INPUT_MISC is not set ++# CONFIG_RMI4_CORE is not set ++ ++# ++# Hardware I/O ports ++# ++CONFIG_SERIO=y ++# CONFIG_SERIO_SERPORT is not set ++CONFIG_SERIO_LIBPS2=y ++# CONFIG_SERIO_RAW is not set ++# CONFIG_SERIO_ALTERA_PS2 is not set ++# CONFIG_SERIO_PS2MULT is not set ++# CONFIG_SERIO_ARC_PS2 is not set ++# CONFIG_SERIO_APBPS2 is not set ++# CONFIG_SERIO_GPIO_PS2 is not set ++# CONFIG_USERIO is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++CONFIG_TTY=y ++CONFIG_VT=y ++CONFIG_CONSOLE_TRANSLATIONS=y ++CONFIG_VT_CONSOLE=y ++CONFIG_VT_CONSOLE_SLEEP=y ++CONFIG_HW_CONSOLE=y ++CONFIG_VT_HW_CONSOLE_BINDING=y ++CONFIG_UNIX98_PTYS=y ++CONFIG_LEGACY_PTYS=y ++CONFIG_LEGACY_PTY_COUNT=16 ++# CONFIG_SERIAL_NONSTANDARD is not set ++# CONFIG_N_GSM is not set ++# CONFIG_TRACE_SINK is not set ++CONFIG_LDISC_AUTOLOAD=y ++CONFIG_DEVMEM=y ++# CONFIG_DEVKMEM is not set ++ ++# ++# Serial drivers ++# ++CONFIG_SERIAL_EARLYCON=y ++CONFIG_SERIAL_8250=y ++CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y ++# CONFIG_SERIAL_8250_FINTEK is not set ++CONFIG_SERIAL_8250_CONSOLE=y ++CONFIG_SERIAL_8250_DMA=y ++CONFIG_SERIAL_8250_NR_UARTS=4 ++CONFIG_SERIAL_8250_RUNTIME_UARTS=4 ++# CONFIG_SERIAL_8250_EXTENDED is not set ++# CONFIG_SERIAL_8250_ASPEED_VUART is not set ++CONFIG_SERIAL_8250_FSL=y ++CONFIG_SERIAL_8250_DW=y ++# CONFIG_SERIAL_8250_EM is not set ++# CONFIG_SERIAL_8250_RT288X is not set ++# CONFIG_SERIAL_OF_PLATFORM is not set ++ ++# ++# Non-8250 serial port support ++# ++# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set ++# CONFIG_SERIAL_MAX3100 is not set ++# CONFIG_SERIAL_MAX310X is not set ++# CONFIG_SERIAL_UARTLITE is not set ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++# CONFIG_SERIAL_SCCNXP is not set ++# CONFIG_SERIAL_SC16IS7XX is not set ++# CONFIG_SERIAL_BCM63XX is not set ++# CONFIG_SERIAL_ALTERA_JTAGUART is not set ++# CONFIG_SERIAL_ALTERA_UART is not set ++# CONFIG_SERIAL_IFX6X60 is not set ++# CONFIG_SERIAL_XILINX_PS_UART is not set ++# CONFIG_SERIAL_ARC is not set ++# CONFIG_SERIAL_FSL_LPUART is not set ++# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set ++# CONFIG_SERIAL_ST_ASC is not set ++# CONFIG_SERIAL_DEV_BUS is not set ++# CONFIG_HVC_DCC is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set ++# CONFIG_XILLYBUS is not set ++ ++# ++# I2C support ++# ++CONFIG_I2C=y ++CONFIG_I2C_BOARDINFO=y ++CONFIG_I2C_COMPAT=y ++CONFIG_I2C_CHARDEV=y ++CONFIG_I2C_MUX=y ++ ++# ++# Multiplexer I2C Chip support ++# ++# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set ++# CONFIG_I2C_MUX_GPIO is not set ++# CONFIG_I2C_MUX_GPMUX is not set ++# CONFIG_I2C_MUX_LTC4306 is not set ++# CONFIG_I2C_MUX_PCA9541 is not set ++# CONFIG_I2C_MUX_PCA954x is not set ++# CONFIG_I2C_MUX_PINCTRL is not set ++# CONFIG_I2C_MUX_REG is not set ++# CONFIG_I2C_DEMUX_PINCTRL is not set ++# CONFIG_I2C_MUX_MLXCPLD is not set ++CONFIG_I2C_HELPER_AUTO=y ++CONFIG_I2C_ALGOBIT=y ++ ++# ++# I2C Hardware Bus support ++# ++ ++# ++# I2C system bus drivers (mostly embedded / system-on-chip) ++# ++# CONFIG_I2C_CBUS_GPIO is not set ++CONFIG_I2C_DESIGNWARE_CORE=y ++CONFIG_I2C_DESIGNWARE_PLATFORM=y ++# CONFIG_I2C_DESIGNWARE_SLAVE is not set ++# CONFIG_I2C_EMEV2 is not set ++# CONFIG_I2C_GPIO is not set ++# CONFIG_I2C_OCORES is not set ++# CONFIG_I2C_PCA_PLATFORM is not set ++# CONFIG_I2C_RK3X is not set ++# CONFIG_I2C_SIMTEC is not set ++# CONFIG_I2C_XILINX is not set ++ ++# ++# External I2C/SMBus adapter drivers ++# ++# CONFIG_I2C_DIOLAN_U2C is not set ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_ROBOTFUZZ_OSIF is not set ++# CONFIG_I2C_TAOS_EVM is not set ++# CONFIG_I2C_TINY_USB is not set ++ ++# ++# Other I2C/SMBus bus drivers ++# ++# CONFIG_I2C_STUB is not set ++# CONFIG_I2C_SLAVE is not set ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++CONFIG_SPI=y ++# CONFIG_SPI_DEBUG is not set ++CONFIG_SPI_MASTER=y ++CONFIG_SPI_MEM=y ++ ++# ++# SPI Master Controller Drivers ++# ++# CONFIG_SPI_ALTERA is not set ++# CONFIG_SPI_AXI_SPI_ENGINE is not set ++# CONFIG_SPI_BITBANG is not set ++# CONFIG_SPI_CADENCE is not set ++CONFIG_SPI_DESIGNWARE=y ++CONFIG_SPI_AXERA=y ++CONFIG_SPI_DW_AXERA_DMA=y ++CONFIG_SPI_DW_MMIO=y ++CONFIG_SPI_AXERA_MMIO=y ++# CONFIG_SPI_GPIO is not set ++# CONFIG_SPI_FSL_SPI is not set ++# CONFIG_SPI_OC_TINY is not set ++# CONFIG_SPI_ROCKCHIP is not set ++# CONFIG_SPI_SC18IS602 is not set ++# CONFIG_SPI_XCOMM is not set ++# CONFIG_SPI_XILINX is not set ++# CONFIG_SPI_ZYNQMP_GQSPI is not set ++ ++# ++# SPI Protocol Masters ++# ++# CONFIG_SPI_SPIDEV is not set ++# CONFIG_SPI_LOOPBACK_TEST is not set ++# CONFIG_SPI_TLE62X0 is not set ++# CONFIG_SPI_SLAVE is not set ++# CONFIG_SPMI is not set ++# CONFIG_HSI is not set ++CONFIG_PPS=y ++# CONFIG_PPS_DEBUG is not set ++# CONFIG_NTP_PPS is not set ++ ++# ++# PPS clients support ++# ++# CONFIG_PPS_CLIENT_KTIMER is not set ++# CONFIG_PPS_CLIENT_LDISC is not set ++# CONFIG_PPS_CLIENT_GPIO is not set ++ ++# ++# PPS generators support ++# ++ ++# ++# PTP clock support ++# ++CONFIG_PTP_1588_CLOCK=y ++ ++# ++# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. ++# ++CONFIG_PINCTRL=y ++CONFIG_GENERIC_PINCTRL_GROUPS=y ++CONFIG_PINMUX=y ++CONFIG_GENERIC_PINMUX_FUNCTIONS=y ++CONFIG_PINCONF=y ++CONFIG_GENERIC_PINCONF=y ++# CONFIG_DEBUG_PINCTRL is not set ++# CONFIG_PINCTRL_AMD is not set ++# CONFIG_PINCTRL_MCP23S08 is not set ++CONFIG_PINCTRL_SINGLE=y ++# CONFIG_PINCTRL_SX150X is not set ++CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y ++CONFIG_GPIOLIB=y ++CONFIG_GPIOLIB_FASTPATH_LIMIT=512 ++CONFIG_OF_GPIO=y ++# CONFIG_DEBUG_GPIO is not set ++CONFIG_GPIO_SYSFS=y ++CONFIG_GPIO_GENERIC=y ++ ++# ++# Memory mapped GPIO drivers ++# ++# CONFIG_GPIO_74XX_MMIO is not set ++# CONFIG_GPIO_ALTERA is not set ++CONFIG_GPIO_DWAPB=y ++# CONFIG_GPIO_FTGPIO010 is not set ++CONFIG_GPIO_GENERIC_PLATFORM=y ++# CONFIG_GPIO_GRGPIO is not set ++# CONFIG_GPIO_HLWD is not set ++# CONFIG_GPIO_MB86S7X is not set ++# CONFIG_GPIO_MOCKUP is not set ++# CONFIG_GPIO_MPC8XXX is not set ++# CONFIG_GPIO_SYSCON is not set ++# CONFIG_GPIO_XILINX is not set ++# CONFIG_GPIO_ZEVIO is not set ++ ++# ++# I2C GPIO expanders ++# ++# CONFIG_GPIO_ADP5588 is not set ++# CONFIG_GPIO_ADNP is not set ++# CONFIG_GPIO_MAX7300 is not set ++# CONFIG_GPIO_MAX732X is not set ++# CONFIG_GPIO_PCA953X is not set ++# CONFIG_GPIO_PCF857X is not set ++# CONFIG_GPIO_TPIC2810 is not set ++ ++# ++# MFD GPIO expanders ++# ++# CONFIG_HTC_EGPIO is not set ++ ++# ++# SPI GPIO expanders ++# ++# CONFIG_GPIO_74X164 is not set ++# CONFIG_GPIO_MAX3191X is not set ++# CONFIG_GPIO_MAX7301 is not set ++# CONFIG_GPIO_MC33880 is not set ++# CONFIG_GPIO_PISOSR is not set ++# CONFIG_GPIO_XRA1403 is not set ++ ++# ++# USB GPIO expanders ++# ++# CONFIG_W1 is not set ++# CONFIG_POWER_AVS is not set ++# CONFIG_POWER_RESET is not set ++CONFIG_POWER_SUPPLY=y ++# CONFIG_POWER_SUPPLY_DEBUG is not set ++# CONFIG_PDA_POWER is not set ++# CONFIG_TEST_POWER is not set ++# CONFIG_CHARGER_ADP5061 is not set ++# CONFIG_BATTERY_DS2780 is not set ++# CONFIG_BATTERY_DS2781 is not set ++# CONFIG_BATTERY_DS2782 is not set ++# CONFIG_BATTERY_SBS is not set ++# CONFIG_CHARGER_SBS is not set ++# CONFIG_MANAGER_SBS is not set ++# CONFIG_BATTERY_BQ27XXX is not set ++# CONFIG_BATTERY_MAX17040 is not set ++# CONFIG_BATTERY_MAX17042 is not set ++# CONFIG_CHARGER_MAX8903 is not set ++# CONFIG_CHARGER_LP8727 is not set ++# CONFIG_CHARGER_GPIO is not set ++# CONFIG_CHARGER_LTC3651 is not set ++# CONFIG_CHARGER_DETECTOR_MAX14656 is not set ++# CONFIG_CHARGER_BQ2415X is not set ++# CONFIG_CHARGER_BQ24257 is not set ++# CONFIG_CHARGER_BQ24735 is not set ++# CONFIG_CHARGER_BQ25890 is not set ++# CONFIG_CHARGER_SMB347 is not set ++# CONFIG_BATTERY_GAUGE_LTC2941 is not set ++# CONFIG_CHARGER_RT9455 is not set ++# CONFIG_HWMON is not set ++CONFIG_THERMAL=y ++# CONFIG_THERMAL_STATISTICS is not set ++CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 ++CONFIG_THERMAL_OF=y ++# CONFIG_THERMAL_WRITABLE_TRIPS is not set ++CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y ++# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set ++# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set ++# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set ++# CONFIG_THERMAL_GOV_FAIR_SHARE is not set ++CONFIG_THERMAL_GOV_STEP_WISE=y ++# CONFIG_THERMAL_GOV_BANG_BANG is not set ++# CONFIG_THERMAL_GOV_USER_SPACE is not set ++CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y ++# CONFIG_THERMAL_EMULATION is not set ++# CONFIG_QORIQ_THERMAL is not set ++ ++# ++# ACPI INT340X thermal drivers ++# ++CONFIG_AX_THERMAL=y ++CONFIG_WATCHDOG=y ++CONFIG_WATCHDOG_CORE=y ++# CONFIG_WATCHDOG_NOWAYOUT is not set ++CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y ++# CONFIG_WATCHDOG_SYSFS is not set ++ ++# ++# Watchdog Device Drivers ++# ++# CONFIG_SOFT_WATCHDOG is not set ++# CONFIG_GPIO_WATCHDOG is not set ++# CONFIG_XILINX_WATCHDOG is not set ++# CONFIG_ZIIRAVE_WATCHDOG is not set ++# CONFIG_CADENCE_WATCHDOG is not set ++# CONFIG_FTWDT010_WATCHDOG is not set ++CONFIG_DW_WATCHDOG=y ++# CONFIG_MAX63XX_WATCHDOG is not set ++# CONFIG_MEN_A21_WDT is not set ++ ++# ++# USB-based Watchdog Cards ++# ++# CONFIG_USBPCWATCHDOG is not set ++ ++# ++# Watchdog Pretimeout Governors ++# ++# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set ++CONFIG_BCMA_POSSIBLE=y ++# CONFIG_BCMA is not set ++ ++# ++# Multifunction device drivers ++# ++# CONFIG_MFD_ACT8945A is not set ++# CONFIG_MFD_AS3711 is not set ++# CONFIG_MFD_AS3722 is not set ++# CONFIG_PMIC_ADP5520 is not set ++# CONFIG_MFD_AAT2870_CORE is not set ++# CONFIG_MFD_ATMEL_FLEXCOM is not set ++# CONFIG_MFD_ATMEL_HLCDC is not set ++# CONFIG_MFD_BCM590XX is not set ++# CONFIG_MFD_BD9571MWV is not set ++# CONFIG_MFD_AXP20X_I2C is not set ++# CONFIG_MFD_CROS_EC is not set ++# CONFIG_MFD_MADERA is not set ++# CONFIG_MFD_ASIC3 is not set ++# CONFIG_PMIC_DA903X is not set ++# CONFIG_MFD_DA9052_SPI is not set ++# CONFIG_MFD_DA9052_I2C is not set ++# CONFIG_MFD_DA9055 is not set ++# CONFIG_MFD_DA9062 is not set ++# CONFIG_MFD_DA9063 is not set ++# CONFIG_MFD_DA9150 is not set ++# CONFIG_MFD_DLN2 is not set ++# CONFIG_MFD_MC13XXX_SPI is not set ++# CONFIG_MFD_MC13XXX_I2C is not set ++# CONFIG_MFD_HI6421_PMIC is not set ++# CONFIG_HTC_PASIC3 is not set ++# CONFIG_HTC_I2CPLD is not set ++# CONFIG_MFD_KEMPLD is not set ++# CONFIG_MFD_88PM800 is not set ++# CONFIG_MFD_88PM805 is not set ++# CONFIG_MFD_88PM860X is not set ++# CONFIG_MFD_MAX14577 is not set ++# CONFIG_MFD_MAX77620 is not set ++# CONFIG_MFD_MAX77686 is not set ++# CONFIG_MFD_MAX77693 is not set ++# CONFIG_MFD_MAX77843 is not set ++# CONFIG_MFD_MAX8907 is not set ++# CONFIG_MFD_MAX8925 is not set ++# CONFIG_MFD_MAX8997 is not set ++# CONFIG_MFD_MAX8998 is not set ++# CONFIG_MFD_MT6397 is not set ++# CONFIG_MFD_MENF21BMC is not set ++# CONFIG_EZX_PCAP is not set ++# CONFIG_MFD_CPCAP is not set ++# CONFIG_MFD_VIPERBOARD is not set ++# CONFIG_MFD_RETU is not set ++# CONFIG_MFD_PCF50633 is not set ++# CONFIG_MFD_PM8XXX is not set ++# CONFIG_MFD_RT5033 is not set ++# CONFIG_MFD_RC5T583 is not set ++# CONFIG_MFD_RK808 is not set ++# CONFIG_MFD_RN5T618 is not set ++# CONFIG_MFD_SEC_CORE is not set ++# CONFIG_MFD_SI476X_CORE is not set ++# CONFIG_MFD_SM501 is not set ++# CONFIG_MFD_SKY81452 is not set ++# CONFIG_MFD_SMSC is not set ++# CONFIG_ABX500_CORE is not set ++# CONFIG_MFD_STMPE is not set ++CONFIG_MFD_SYSCON=y ++# CONFIG_MFD_TI_AM335X_TSCADC is not set ++# CONFIG_MFD_LP3943 is not set ++# CONFIG_MFD_LP8788 is not set ++# CONFIG_MFD_TI_LMU is not set ++# CONFIG_MFD_PALMAS is not set ++# CONFIG_TPS6105X is not set ++# CONFIG_TPS65010 is not set ++# CONFIG_TPS6507X is not set ++# CONFIG_MFD_TPS65086 is not set ++# CONFIG_MFD_TPS65090 is not set ++# CONFIG_MFD_TPS65217 is not set ++# CONFIG_MFD_TI_LP873X is not set ++# CONFIG_MFD_TI_LP87565 is not set ++# CONFIG_MFD_TPS65218 is not set ++# CONFIG_MFD_TPS6586X is not set ++# CONFIG_MFD_TPS65910 is not set ++# CONFIG_MFD_TPS65912_I2C is not set ++# CONFIG_MFD_TPS65912_SPI is not set ++# CONFIG_MFD_TPS80031 is not set ++# CONFIG_TWL4030_CORE is not set ++# CONFIG_TWL6040_CORE is not set ++# CONFIG_MFD_WL1273_CORE is not set ++# CONFIG_MFD_LM3533 is not set ++# CONFIG_MFD_TC3589X is not set ++# CONFIG_MFD_T7L66XB is not set ++# CONFIG_MFD_TC6387XB is not set ++# CONFIG_MFD_TC6393XB is not set ++# CONFIG_MFD_ARIZONA_I2C is not set ++# CONFIG_MFD_ARIZONA_SPI is not set ++# CONFIG_MFD_WM8400 is not set ++# CONFIG_MFD_WM831X_I2C is not set ++# CONFIG_MFD_WM831X_SPI is not set ++# CONFIG_MFD_WM8350_I2C is not set ++# CONFIG_MFD_WM8994 is not set ++# CONFIG_MFD_ROHM_BD718XX is not set ++# CONFIG_REGULATOR is not set ++# CONFIG_RC_CORE is not set ++# CONFIG_MEDIA_SUPPORT is not set ++ ++# ++# Graphics support ++# ++# CONFIG_IMX_IPUV3_CORE is not set ++CONFIG_DRM=y ++CONFIG_DRM_MIPI_DSI=y ++# CONFIG_DRM_DP_AUX_CHARDEV is not set ++# CONFIG_DRM_DEBUG_MM is not set ++# CONFIG_DRM_DEBUG_SELFTEST is not set ++CONFIG_DRM_KMS_HELPER=y ++CONFIG_DRM_KMS_FB_HELPER=y ++CONFIG_DRM_FBDEV_EMULATION=y ++CONFIG_DRM_FBDEV_OVERALLOC=100 ++# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set ++# CONFIG_DRM_DP_CEC is not set ++CONFIG_DRM_GEM_CMA_HELPER=y ++CONFIG_DRM_KMS_CMA_HELPER=y ++ ++# ++# I2C encoder or helper chips ++# ++# CONFIG_DRM_I2C_CH7006 is not set ++# CONFIG_DRM_I2C_SIL164 is not set ++# CONFIG_DRM_I2C_NXP_TDA998X is not set ++# CONFIG_DRM_I2C_NXP_TDA9950 is not set ++# CONFIG_DRM_HDLCD is not set ++# CONFIG_DRM_MALI_DISPLAY is not set ++ ++# ++# ACP (Audio CoProcessor) Configuration ++# ++ ++# ++# AMD Library routines ++# ++# CONFIG_DRM_VGEM is not set ++# CONFIG_DRM_VKMS is not set ++# CONFIG_DRM_EXYNOS is not set ++# CONFIG_DRM_UDL is not set ++# CONFIG_DRM_ARMADA is not set ++# CONFIG_DRM_RCAR_DW_HDMI is not set ++# CONFIG_DRM_RCAR_LVDS is not set ++# CONFIG_DRM_OMAP is not set ++# CONFIG_DRM_TILCDC is not set ++# CONFIG_DRM_FSL_DCU is not set ++# CONFIG_DRM_STM is not set ++CONFIG_DRM_PANEL=y ++ ++# ++# Display Panels ++# ++# CONFIG_DRM_PANEL_ARM_VERSATILE is not set ++# CONFIG_DRM_PANEL_LVDS is not set ++CONFIG_DRM_PANEL_SIMPLE=y ++# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set ++# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set ++# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set ++# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set ++# CONFIG_DRM_PANEL_LG_LG4573 is not set ++# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set ++# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set ++# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set ++# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set ++# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set ++# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set ++# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set ++# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set ++CONFIG_DRM_BRIDGE=y ++CONFIG_DRM_PANEL_BRIDGE=y ++ ++# ++# Display Interface Bridges ++# ++# CONFIG_DRM_ANALOGIX_ANX78XX is not set ++CONFIG_DRM_CDNS_DSI=y ++# CONFIG_DRM_DUMB_VGA_DAC is not set ++# CONFIG_DRM_LVDS_ENCODER is not set ++# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set ++# CONFIG_DRM_NXP_PTN3460 is not set ++# CONFIG_DRM_PARADE_PS8622 is not set ++# CONFIG_DRM_SIL_SII8620 is not set ++# CONFIG_DRM_SII902X is not set ++# CONFIG_DRM_SII9234 is not set ++# CONFIG_DRM_THINE_THC63LVD1024 is not set ++# CONFIG_DRM_TOSHIBA_TC358767 is not set ++# CONFIG_DRM_TI_TFP410 is not set ++# CONFIG_DRM_I2C_ADV7511 is not set ++# CONFIG_DRM_STI is not set ++# CONFIG_DRM_ARCPGU is not set ++# CONFIG_DRM_MXSFB is not set ++CONFIG_DRM_TINYDRM=y ++# CONFIG_TINYDRM_ILI9225 is not set ++# CONFIG_TINYDRM_ILI9341 is not set ++# CONFIG_TINYDRM_MI0283QT is not set ++# CONFIG_TINYDRM_REPAPER is not set ++# CONFIG_TINYDRM_ST7586 is not set ++# CONFIG_TINYDRM_ST7735R is not set ++# CONFIG_DRM_PL111 is not set ++# CONFIG_DRM_TVE200 is not set ++CONFIG_DRM_AXERA=y ++# CONFIG_DRM_LEGACY is not set ++CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y ++ ++# ++# Frame buffer Devices ++# ++CONFIG_FB_CMDLINE=y ++CONFIG_FB_NOTIFY=y ++CONFIG_FB=y ++# CONFIG_FIRMWARE_EDID is not set ++CONFIG_FB_CFB_FILLRECT=y ++CONFIG_FB_CFB_COPYAREA=y ++CONFIG_FB_CFB_IMAGEBLIT=y ++CONFIG_FB_SYS_FILLRECT=y ++CONFIG_FB_SYS_COPYAREA=y ++CONFIG_FB_SYS_IMAGEBLIT=y ++# CONFIG_FB_FOREIGN_ENDIAN is not set ++CONFIG_FB_SYS_FOPS=y ++CONFIG_FB_DEFERRED_IO=y ++CONFIG_FB_MODE_HELPERS=y ++# CONFIG_FB_TILEBLITTING is not set ++ ++# ++# Frame buffer hardware drivers ++# ++# CONFIG_FB_OPENCORES is not set ++# CONFIG_FB_S1D13XXX is not set ++# CONFIG_FB_SMSCUFX is not set ++# CONFIG_FB_UDL is not set ++# CONFIG_FB_IBM_GXT4500 is not set ++# CONFIG_FB_VIRTUAL is not set ++# CONFIG_FB_METRONOME is not set ++# CONFIG_FB_BROADSHEET is not set ++# CONFIG_FB_SIMPLE is not set ++# CONFIG_FB_SSD1307 is not set ++CONFIG_BACKLIGHT_LCD_SUPPORT=y ++CONFIG_LCD_CLASS_DEVICE=m ++# CONFIG_LCD_L4F00242T03 is not set ++# CONFIG_LCD_LMS283GF05 is not set ++# CONFIG_LCD_LTV350QV is not set ++# CONFIG_LCD_ILI922X is not set ++# CONFIG_LCD_ILI9320 is not set ++# CONFIG_LCD_TDO24M is not set ++# CONFIG_LCD_VGG2432A4 is not set ++# CONFIG_LCD_PLATFORM is not set ++# CONFIG_LCD_S6E63M0 is not set ++# CONFIG_LCD_LD9040 is not set ++# CONFIG_LCD_AMS369FG06 is not set ++# CONFIG_LCD_LMS501KF03 is not set ++# CONFIG_LCD_HX8357 is not set ++# CONFIG_LCD_OTM3225A is not set ++CONFIG_BACKLIGHT_CLASS_DEVICE=y ++CONFIG_BACKLIGHT_GENERIC=y ++# CONFIG_BACKLIGHT_PWM is not set ++# CONFIG_BACKLIGHT_PM8941_WLED is not set ++# CONFIG_BACKLIGHT_ADP8860 is not set ++# CONFIG_BACKLIGHT_ADP8870 is not set ++# CONFIG_BACKLIGHT_LM3630A is not set ++# CONFIG_BACKLIGHT_LM3639 is not set ++# CONFIG_BACKLIGHT_LP855X is not set ++# CONFIG_BACKLIGHT_GPIO is not set ++# CONFIG_BACKLIGHT_LV5207LP is not set ++# CONFIG_BACKLIGHT_BD6107 is not set ++# CONFIG_BACKLIGHT_ARCXCNN is not set ++CONFIG_VIDEOMODE_HELPERS=y ++CONFIG_HDMI=y ++ ++# ++# Console display driver support ++# ++CONFIG_DUMMY_CONSOLE=y ++CONFIG_FRAMEBUFFER_CONSOLE=y ++CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y ++# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set ++# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set ++CONFIG_LOGO=y ++# CONFIG_LOGO_LINUX_MONO is not set ++# CONFIG_LOGO_LINUX_VGA16 is not set ++CONFIG_LOGO_LINUX_CLUT224=y ++CONFIG_SOUND=y ++CONFIG_SND=y ++CONFIG_SND_TIMER=y ++CONFIG_SND_PCM=y ++CONFIG_SND_JACK=y ++CONFIG_SND_JACK_INPUT_DEV=y ++# CONFIG_SND_OSSEMUL is not set ++CONFIG_SND_PCM_TIMER=y ++# CONFIG_SND_HRTIMER is not set ++# CONFIG_SND_DYNAMIC_MINORS is not set ++CONFIG_SND_SUPPORT_OLD_API=y ++CONFIG_SND_PROC_FS=y ++CONFIG_SND_VERBOSE_PROCFS=y ++# CONFIG_SND_VERBOSE_PRINTK is not set ++# CONFIG_SND_DEBUG is not set ++# CONFIG_SND_SEQUENCER is not set ++CONFIG_SND_DRIVERS=y ++# CONFIG_SND_DUMMY is not set ++# CONFIG_SND_ALOOP is not set ++# CONFIG_SND_MTPAV is not set ++# CONFIG_SND_SERIAL_U16550 is not set ++# CONFIG_SND_MPU401 is not set ++ ++# ++# HD-Audio ++# ++CONFIG_SND_HDA_PREALLOC_SIZE=64 ++CONFIG_SND_ARM=y ++CONFIG_SND_SPI=y ++CONFIG_SND_USB=y ++# CONFIG_SND_USB_AUDIO is not set ++# CONFIG_SND_USB_UA101 is not set ++# CONFIG_SND_USB_CAIAQ is not set ++# CONFIG_SND_USB_6FIRE is not set ++# CONFIG_SND_USB_HIFACE is not set ++# CONFIG_SND_BCD2000 is not set ++# CONFIG_SND_USB_POD is not set ++# CONFIG_SND_USB_PODHD is not set ++# CONFIG_SND_USB_TONEPORT is not set ++# CONFIG_SND_USB_VARIAX is not set ++CONFIG_SND_SOC=y ++# CONFIG_SND_SOC_AMD_ACP is not set ++# CONFIG_SND_ATMEL_SOC is not set ++# CONFIG_SND_DESIGNWARE_I2S is not set ++ ++# ++# SoC Audio for Freescale CPUs ++# ++ ++# ++# Common SoC Audio options for Freescale CPUs: ++# ++# CONFIG_SND_SOC_FSL_ASRC is not set ++# CONFIG_SND_SOC_FSL_SAI is not set ++# CONFIG_SND_SOC_FSL_SSI is not set ++# CONFIG_SND_SOC_FSL_SPDIF is not set ++# CONFIG_SND_SOC_FSL_ESAI is not set ++# CONFIG_SND_SOC_IMX_AUDMUX is not set ++# CONFIG_SND_I2S_HI6210_I2S is not set ++# CONFIG_SND_SOC_IMG is not set ++ ++# ++# STMicroelectronics STM32 SOC audio support ++# ++# CONFIG_SND_SOC_XTFPGA_I2S is not set ++# CONFIG_ZX_TDM is not set ++CONFIG_SND_SOC_I2C_AND_SPI=y ++ ++# ++# CODEC drivers ++# ++# CONFIG_SND_SOC_AC97_CODEC is not set ++# CONFIG_SND_SOC_ADAU1701 is not set ++# CONFIG_SND_SOC_ADAU1761_I2C is not set ++# CONFIG_SND_SOC_ADAU1761_SPI is not set ++# CONFIG_SND_SOC_ADAU7002 is not set ++# CONFIG_SND_SOC_AK4104 is not set ++# CONFIG_SND_SOC_AK4458 is not set ++# CONFIG_SND_SOC_AK4554 is not set ++# CONFIG_SND_SOC_AK4613 is not set ++# CONFIG_SND_SOC_AK4642 is not set ++# CONFIG_SND_SOC_AK5386 is not set ++# CONFIG_SND_SOC_AK5558 is not set ++# CONFIG_SND_SOC_ALC5623 is not set ++# CONFIG_SND_SOC_BD28623 is not set ++# CONFIG_SND_SOC_BT_SCO is not set ++# CONFIG_SND_SOC_CS35L32 is not set ++# CONFIG_SND_SOC_CS35L33 is not set ++# CONFIG_SND_SOC_CS35L34 is not set ++# CONFIG_SND_SOC_CS35L35 is not set ++# CONFIG_SND_SOC_CS42L42 is not set ++# CONFIG_SND_SOC_CS42L51_I2C is not set ++# CONFIG_SND_SOC_CS42L52 is not set ++# CONFIG_SND_SOC_CS42L56 is not set ++# CONFIG_SND_SOC_CS42L73 is not set ++# CONFIG_SND_SOC_CS4265 is not set ++# CONFIG_SND_SOC_CS4270 is not set ++# CONFIG_SND_SOC_CS4271_I2C is not set ++# CONFIG_SND_SOC_CS4271_SPI is not set ++# CONFIG_SND_SOC_CS42XX8_I2C is not set ++# CONFIG_SND_SOC_CS43130 is not set ++# CONFIG_SND_SOC_CS4349 is not set ++# CONFIG_SND_SOC_CS53L30 is not set ++# CONFIG_SND_SOC_HDMI_CODEC is not set ++# CONFIG_SND_SOC_ES7134 is not set ++# CONFIG_SND_SOC_ES7241 is not set ++# CONFIG_SND_SOC_ES8316 is not set ++# CONFIG_SND_SOC_ES8328_I2C is not set ++# CONFIG_SND_SOC_ES8328_SPI is not set ++# CONFIG_SND_SOC_GTM601 is not set ++# CONFIG_SND_SOC_INNO_RK3036 is not set ++# CONFIG_SND_SOC_MAX98504 is not set ++# CONFIG_SND_SOC_MAX9867 is not set ++# CONFIG_SND_SOC_MAX98927 is not set ++# CONFIG_SND_SOC_MAX98373 is not set ++# CONFIG_SND_SOC_MAX9860 is not set ++# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set ++# CONFIG_SND_SOC_PCM1681 is not set ++# CONFIG_SND_SOC_PCM1789_I2C is not set ++# CONFIG_SND_SOC_PCM179X_I2C is not set ++# CONFIG_SND_SOC_PCM179X_SPI is not set ++# CONFIG_SND_SOC_PCM186X_I2C is not set ++# CONFIG_SND_SOC_PCM186X_SPI is not set ++# CONFIG_SND_SOC_PCM3168A_I2C is not set ++# CONFIG_SND_SOC_PCM3168A_SPI is not set ++# CONFIG_SND_SOC_PCM512x_I2C is not set ++# CONFIG_SND_SOC_PCM512x_SPI is not set ++# CONFIG_SND_SOC_RT5616 is not set ++# CONFIG_SND_SOC_RT5631 is not set ++# CONFIG_SND_SOC_SGTL5000 is not set ++# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set ++# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set ++# CONFIG_SND_SOC_SPDIF is not set ++# CONFIG_SND_SOC_SSM2305 is not set ++# CONFIG_SND_SOC_SSM2602_SPI is not set ++# CONFIG_SND_SOC_SSM2602_I2C is not set ++# CONFIG_SND_SOC_SSM4567 is not set ++# CONFIG_SND_SOC_STA32X is not set ++# CONFIG_SND_SOC_STA350 is not set ++# CONFIG_SND_SOC_STI_SAS is not set ++# CONFIG_SND_SOC_TAS2552 is not set ++# CONFIG_SND_SOC_TAS5086 is not set ++# CONFIG_SND_SOC_TAS571X is not set ++# CONFIG_SND_SOC_TAS5720 is not set ++# CONFIG_SND_SOC_TAS6424 is not set ++# CONFIG_SND_SOC_TDA7419 is not set ++# CONFIG_SND_SOC_TFA9879 is not set ++# CONFIG_SND_SOC_TLV320AIC23_I2C is not set ++# CONFIG_SND_SOC_TLV320AIC23_SPI is not set ++# CONFIG_SND_SOC_TLV320AIC31XX is not set ++# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set ++# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set ++# CONFIG_SND_SOC_TLV320AIC3X is not set ++# CONFIG_SND_SOC_TS3A227E is not set ++# CONFIG_SND_SOC_TSCS42XX is not set ++# CONFIG_SND_SOC_TSCS454 is not set ++# CONFIG_SND_SOC_WM8510 is not set ++# CONFIG_SND_SOC_WM8523 is not set ++# CONFIG_SND_SOC_WM8524 is not set ++# CONFIG_SND_SOC_WM8580 is not set ++# CONFIG_SND_SOC_WM8711 is not set ++# CONFIG_SND_SOC_WM8728 is not set ++# CONFIG_SND_SOC_WM8731 is not set ++# CONFIG_SND_SOC_WM8737 is not set ++# CONFIG_SND_SOC_WM8741 is not set ++# CONFIG_SND_SOC_WM8750 is not set ++# CONFIG_SND_SOC_WM8753 is not set ++# CONFIG_SND_SOC_WM8770 is not set ++# CONFIG_SND_SOC_WM8776 is not set ++# CONFIG_SND_SOC_WM8782 is not set ++# CONFIG_SND_SOC_WM8804_I2C is not set ++# CONFIG_SND_SOC_WM8804_SPI is not set ++# CONFIG_SND_SOC_WM8903 is not set ++# CONFIG_SND_SOC_WM8960 is not set ++# CONFIG_SND_SOC_WM8962 is not set ++# CONFIG_SND_SOC_WM8974 is not set ++# CONFIG_SND_SOC_WM8978 is not set ++# CONFIG_SND_SOC_WM8985 is not set ++# CONFIG_SND_SOC_ZX_AUD96P22 is not set ++# CONFIG_SND_SOC_MAX9759 is not set ++# CONFIG_SND_SOC_MT6351 is not set ++# CONFIG_SND_SOC_NAU8540 is not set ++# CONFIG_SND_SOC_NAU8810 is not set ++# CONFIG_SND_SOC_NAU8824 is not set ++# CONFIG_SND_SOC_TPA6130A2 is not set ++# CONFIG_SND_SIMPLE_CARD is not set ++# CONFIG_SND_SIMPLE_SCU_CARD is not set ++# CONFIG_SND_AUDIO_GRAPH_CARD is not set ++# CONFIG_SND_AUDIO_GRAPH_SCU_CARD is not set ++ ++# ++# HID support ++# ++CONFIG_HID=y ++# CONFIG_HID_BATTERY_STRENGTH is not set ++# CONFIG_HIDRAW is not set ++# CONFIG_UHID is not set ++CONFIG_HID_GENERIC=y ++ ++# ++# Special HID drivers ++# ++CONFIG_HID_A4TECH=y ++# CONFIG_HID_ACCUTOUCH is not set ++# CONFIG_HID_ACRUX is not set ++CONFIG_HID_APPLE=y ++# CONFIG_HID_APPLEIR is not set ++# CONFIG_HID_AUREAL is not set ++CONFIG_HID_BELKIN=y ++# CONFIG_HID_BETOP_FF is not set ++CONFIG_HID_CHERRY=y ++CONFIG_HID_CHICONY=y ++# CONFIG_HID_COUGAR is not set ++# CONFIG_HID_PRODIKEYS is not set ++# CONFIG_HID_CMEDIA is not set ++CONFIG_HID_CYPRESS=y ++CONFIG_HID_DRAGONRISE=y ++# CONFIG_DRAGONRISE_FF is not set ++# CONFIG_HID_EMS_FF is not set ++# CONFIG_HID_ELECOM is not set ++# CONFIG_HID_ELO is not set ++CONFIG_HID_EZKEY=y ++# CONFIG_HID_GEMBIRD is not set ++# CONFIG_HID_GFRM is not set ++# CONFIG_HID_HOLTEK is not set ++# CONFIG_HID_KEYTOUCH is not set ++# CONFIG_HID_KYE is not set ++# CONFIG_HID_UCLOGIC is not set ++# CONFIG_HID_WALTOP is not set ++CONFIG_HID_GYRATION=y ++# CONFIG_HID_ICADE is not set ++CONFIG_HID_ITE=y ++# CONFIG_HID_JABRA is not set ++CONFIG_HID_TWINHAN=y ++CONFIG_HID_KENSINGTON=y ++# CONFIG_HID_LCPOWER is not set ++# CONFIG_HID_LENOVO is not set ++CONFIG_HID_LOGITECH=y ++# CONFIG_HID_LOGITECH_HIDPP is not set ++# CONFIG_LOGITECH_FF is not set ++# CONFIG_LOGIRUMBLEPAD2_FF is not set ++# CONFIG_LOGIG940_FF is not set ++# CONFIG_LOGIWHEELS_FF is not set ++# CONFIG_HID_MAGICMOUSE is not set ++# CONFIG_HID_MAYFLASH is not set ++CONFIG_HID_REDRAGON=y ++CONFIG_HID_MICROSOFT=y ++CONFIG_HID_MONTEREY=y ++# CONFIG_HID_MULTITOUCH is not set ++# CONFIG_HID_NTI is not set ++# CONFIG_HID_NTRIG is not set ++# CONFIG_HID_ORTEK is not set ++CONFIG_HID_PANTHERLORD=y ++# CONFIG_PANTHERLORD_FF is not set ++# CONFIG_HID_PENMOUNT is not set ++CONFIG_HID_PETALYNX=y ++# CONFIG_HID_PICOLCD is not set ++# CONFIG_HID_PLANTRONICS is not set ++# CONFIG_HID_PRIMAX is not set ++# CONFIG_HID_RETRODE is not set ++# CONFIG_HID_ROCCAT is not set ++# CONFIG_HID_SAITEK is not set ++CONFIG_HID_SAMSUNG=y ++# CONFIG_HID_SPEEDLINK is not set ++# CONFIG_HID_STEAM is not set ++# CONFIG_HID_STEELSERIES is not set ++CONFIG_HID_SUNPLUS=y ++# CONFIG_HID_RMI is not set ++CONFIG_HID_GREENASIA=y ++# CONFIG_GREENASIA_FF is not set ++CONFIG_HID_SMARTJOYPLUS=y ++# CONFIG_SMARTJOYPLUS_FF is not set ++# CONFIG_HID_TIVO is not set ++CONFIG_HID_TOPSEED=y ++CONFIG_HID_THRUSTMASTER=y ++# CONFIG_THRUSTMASTER_FF is not set ++# CONFIG_HID_UDRAW_PS3 is not set ++# CONFIG_HID_WACOM is not set ++# CONFIG_HID_XINMO is not set ++CONFIG_HID_ZEROPLUS=y ++# CONFIG_ZEROPLUS_FF is not set ++# CONFIG_HID_ZYDACRON is not set ++# CONFIG_HID_SENSOR_HUB is not set ++# CONFIG_HID_ALPS is not set ++ ++# ++# USB HID support ++# ++CONFIG_USB_HID=y ++# CONFIG_HID_PID is not set ++# CONFIG_USB_HIDDEV is not set ++ ++# ++# I2C HID support ++# ++# CONFIG_I2C_HID is not set ++CONFIG_USB_OHCI_LITTLE_ENDIAN=y ++CONFIG_USB_SUPPORT=y ++CONFIG_USB_COMMON=y ++CONFIG_USB_ARCH_HAS_HCD=y ++CONFIG_USB=y ++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y ++ ++# ++# Miscellaneous USB options ++# ++CONFIG_USB_DEFAULT_PERSIST=y ++# CONFIG_USB_DYNAMIC_MINORS is not set ++# CONFIG_USB_OTG is not set ++# CONFIG_USB_OTG_WHITELIST is not set ++# CONFIG_USB_MON is not set ++# CONFIG_USB_WUSB_CBAF is not set ++ ++# ++# USB Host Controller Drivers ++# ++# CONFIG_USB_C67X00_HCD is not set ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DBGCAP=y ++CONFIG_USB_XHCI_PLATFORM=y ++# CONFIG_USB_EHCI_HCD is not set ++# CONFIG_USB_OXU210HP_HCD is not set ++# CONFIG_USB_ISP116X_HCD is not set ++# CONFIG_USB_FOTG210_HCD is not set ++# CONFIG_USB_MAX3421_HCD is not set ++# CONFIG_USB_OHCI_HCD is not set ++# CONFIG_USB_SL811_HCD is not set ++# CONFIG_USB_R8A66597_HCD is not set ++# CONFIG_USB_HCD_TEST_MODE is not set ++ ++# ++# USB Device Class drivers ++# ++CONFIG_USB_ACM=y ++# CONFIG_USB_PRINTER is not set ++# CONFIG_USB_WDM is not set ++# CONFIG_USB_TMC is not set ++ ++# ++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may ++# ++ ++# ++# also be needed; see USB_STORAGE Help for more info ++# ++CONFIG_USB_STORAGE=y ++# CONFIG_USB_STORAGE_DEBUG is not set ++# CONFIG_USB_STORAGE_REALTEK is not set ++# CONFIG_USB_STORAGE_DATAFAB is not set ++# CONFIG_USB_STORAGE_FREECOM is not set ++# CONFIG_USB_STORAGE_ISD200 is not set ++# CONFIG_USB_STORAGE_USBAT is not set ++# CONFIG_USB_STORAGE_SDDR09 is not set ++# CONFIG_USB_STORAGE_SDDR55 is not set ++# CONFIG_USB_STORAGE_JUMPSHOT is not set ++# CONFIG_USB_STORAGE_ALAUDA is not set ++# CONFIG_USB_STORAGE_ONETOUCH is not set ++# CONFIG_USB_STORAGE_KARMA is not set ++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set ++# CONFIG_USB_STORAGE_ENE_UB6250 is not set ++CONFIG_USB_UAS=y ++ ++# ++# USB Imaging devices ++# ++# CONFIG_USB_MDC800 is not set ++# CONFIG_USB_MICROTEK is not set ++# CONFIG_USBIP_CORE is not set ++# CONFIG_USB_MUSB_HDRC is not set ++# CONFIG_USB_DWC3 is not set ++# CONFIG_USB_DWC2 is not set ++CONFIG_USB_CDNS3=y ++CONFIG_USB_CDNS3_GADGET=y ++CONFIG_USB_CDNS3_HOST=y ++CONFIG_USB_CDNS3_AXERA=y ++# CONFIG_USB_CHIPIDEA is not set ++# CONFIG_USB_ISP1760 is not set ++ ++# ++# USB port drivers ++# ++CONFIG_USB_SERIAL=y ++# CONFIG_USB_SERIAL_CONSOLE is not set ++CONFIG_USB_SERIAL_GENERIC=y ++# CONFIG_USB_SERIAL_SIMPLE is not set ++# CONFIG_USB_SERIAL_AIRCABLE is not set ++# CONFIG_USB_SERIAL_ARK3116 is not set ++# CONFIG_USB_SERIAL_BELKIN is not set ++CONFIG_USB_SERIAL_CH341=y ++# CONFIG_USB_SERIAL_WHITEHEAT is not set ++# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set ++# CONFIG_USB_SERIAL_CP210X is not set ++# CONFIG_USB_SERIAL_CYPRESS_M8 is not set ++# CONFIG_USB_SERIAL_EMPEG is not set ++# CONFIG_USB_SERIAL_FTDI_SIO is not set ++# CONFIG_USB_SERIAL_VISOR is not set ++# CONFIG_USB_SERIAL_IPAQ is not set ++# CONFIG_USB_SERIAL_IR is not set ++# CONFIG_USB_SERIAL_EDGEPORT is not set ++# CONFIG_USB_SERIAL_EDGEPORT_TI is not set ++# CONFIG_USB_SERIAL_F81232 is not set ++# CONFIG_USB_SERIAL_F8153X is not set ++# CONFIG_USB_SERIAL_GARMIN is not set ++# CONFIG_USB_SERIAL_IPW is not set ++# CONFIG_USB_SERIAL_IUU is not set ++# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set ++# CONFIG_USB_SERIAL_KEYSPAN is not set ++# CONFIG_USB_SERIAL_KLSI is not set ++# CONFIG_USB_SERIAL_KOBIL_SCT is not set ++# CONFIG_USB_SERIAL_MCT_U232 is not set ++# CONFIG_USB_SERIAL_METRO is not set ++# CONFIG_USB_SERIAL_MOS7720 is not set ++# CONFIG_USB_SERIAL_MOS7840 is not set ++# CONFIG_USB_SERIAL_MXUPORT is not set ++# CONFIG_USB_SERIAL_NAVMAN is not set ++CONFIG_USB_SERIAL_PL2303=y ++# CONFIG_USB_SERIAL_OTI6858 is not set ++# CONFIG_USB_SERIAL_QCAUX is not set ++# CONFIG_USB_SERIAL_QUALCOMM is not set ++# CONFIG_USB_SERIAL_SPCP8X5 is not set ++# CONFIG_USB_SERIAL_SAFE is not set ++# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set ++# CONFIG_USB_SERIAL_SYMBOL is not set ++# CONFIG_USB_SERIAL_TI is not set ++# CONFIG_USB_SERIAL_CYBERJACK is not set ++# CONFIG_USB_SERIAL_XIRCOM is not set ++# CONFIG_USB_SERIAL_OPTION is not set ++# CONFIG_USB_SERIAL_OMNINET is not set ++# CONFIG_USB_SERIAL_OPTICON is not set ++# CONFIG_USB_SERIAL_XSENS_MT is not set ++# CONFIG_USB_SERIAL_WISHBONE is not set ++# CONFIG_USB_SERIAL_SSU100 is not set ++# CONFIG_USB_SERIAL_QT2 is not set ++# CONFIG_USB_SERIAL_UPD78F0730 is not set ++# CONFIG_USB_SERIAL_DEBUG is not set ++ ++# ++# USB Miscellaneous drivers ++# ++# CONFIG_USB_EMI62 is not set ++# CONFIG_USB_EMI26 is not set ++# CONFIG_USB_ADUTUX is not set ++# CONFIG_USB_SEVSEG is not set ++# CONFIG_USB_LEGOTOWER is not set ++# CONFIG_USB_LCD is not set ++# CONFIG_USB_CYPRESS_CY7C63 is not set ++# CONFIG_USB_CYTHERM is not set ++# CONFIG_USB_IDMOUSE is not set ++# CONFIG_USB_FTDI_ELAN is not set ++# CONFIG_USB_APPLEDISPLAY is not set ++# CONFIG_USB_LD is not set ++# CONFIG_USB_TRANCEVIBRATOR is not set ++# CONFIG_USB_IOWARRIOR is not set ++CONFIG_USB_TEST=y ++# CONFIG_USB_EHSET_TEST_FIXTURE is not set ++# CONFIG_USB_ISIGHTFW is not set ++# CONFIG_USB_YUREX is not set ++# CONFIG_USB_EZUSB_FX2 is not set ++# CONFIG_USB_HUB_USB251XB is not set ++# CONFIG_USB_HSIC_USB3503 is not set ++# CONFIG_USB_HSIC_USB4604 is not set ++# CONFIG_USB_LINK_LAYER_TEST is not set ++ ++# ++# USB Physical Layer drivers ++# ++# CONFIG_NOP_USB_XCEIV is not set ++# CONFIG_USB_GPIO_VBUS is not set ++# CONFIG_USB_ISP1301 is not set ++# CONFIG_USB_ULPI is not set ++CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG is not set ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++# CONFIG_USB_GADGET_DEBUG_FS is not set ++CONFIG_USB_GADGET_VBUS_DRAW=2 ++CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 ++# CONFIG_U_SERIAL_CONSOLE is not set ++ ++# ++# USB Peripheral Controller ++# ++# CONFIG_USB_FUSB300 is not set ++# CONFIG_USB_FOTG210_UDC is not set ++# CONFIG_USB_GR_UDC is not set ++# CONFIG_USB_R8A66597 is not set ++# CONFIG_USB_PXA27X is not set ++# CONFIG_USB_MV_UDC is not set ++# CONFIG_USB_MV_U3D is not set ++# CONFIG_USB_SNP_UDC_PLAT is not set ++# CONFIG_USB_M66592 is not set ++# CONFIG_USB_BDC_UDC is not set ++# CONFIG_USB_NET2272 is not set ++# CONFIG_USB_GADGET_XILINX is not set ++# CONFIG_USB_DUMMY_HCD is not set ++CONFIG_USB_LIBCOMPOSITE=y ++CONFIG_USB_F_ACM=y ++CONFIG_USB_F_SS_LB=y ++CONFIG_USB_U_SERIAL=y ++CONFIG_USB_U_ETHER=y ++CONFIG_USB_F_SERIAL=y ++CONFIG_USB_F_RNDIS=y ++CONFIG_USB_F_MASS_STORAGE=y ++CONFIG_USB_CONFIGFS=y ++CONFIG_USB_CONFIGFS_SERIAL=y ++CONFIG_USB_CONFIGFS_ACM=y ++# CONFIG_USB_CONFIGFS_OBEX is not set ++# CONFIG_USB_CONFIGFS_NCM is not set ++# CONFIG_USB_CONFIGFS_ECM is not set ++# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set ++CONFIG_USB_CONFIGFS_RNDIS=y ++# CONFIG_USB_CONFIGFS_EEM is not set ++CONFIG_USB_CONFIGFS_MASS_STORAGE=y ++CONFIG_USB_CONFIGFS_F_LB_SS=y ++# CONFIG_USB_CONFIGFS_F_FS is not set ++# CONFIG_USB_CONFIGFS_F_UAC1 is not set ++# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set ++# CONFIG_USB_CONFIGFS_F_UAC2 is not set ++# CONFIG_USB_CONFIGFS_F_MIDI is not set ++# CONFIG_USB_CONFIGFS_F_HID is not set ++# CONFIG_USB_CONFIGFS_F_PRINTER is not set ++CONFIG_TYPEC=y ++CONFIG_TYPEC_TCPM=y ++CONFIG_TYPEC_TCPCI=y ++# CONFIG_TYPEC_RT1711H is not set ++CONFIG_TYPEC_SGM7220=y ++# CONFIG_TYPEC_FUSB302 is not set ++# CONFIG_TYPEC_UCSI is not set ++# CONFIG_TYPEC_TPS6598X is not set ++ ++# ++# USB Type-C Multiplexer/DeMultiplexer Switch support ++# ++# CONFIG_TYPEC_MUX_PI3USB30532 is not set ++ ++# ++# USB Type-C Alternate Mode drivers ++# ++# CONFIG_TYPEC_DP_ALTMODE is not set ++CONFIG_USB_ROLE_SWITCH=y ++# CONFIG_USB_ULPI_BUS is not set ++# CONFIG_UWB is not set ++CONFIG_MMC=y ++CONFIG_PWRSEQ_EMMC=y ++CONFIG_PWRSEQ_SIMPLE=y ++CONFIG_MMC_BLOCK=y ++CONFIG_MMC_BLOCK_MINORS=8 ++# CONFIG_SDIO_UART is not set ++# CONFIG_MMC_TEST is not set ++ ++# ++# MMC/SD/SDIO Host Controller Drivers ++# ++# CONFIG_MMC_DEBUG is not set ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_IO_ACCESSORS=y ++CONFIG_MMC_SDHCI_PLTFM=y ++# CONFIG_MMC_SDHCI_OF_ARASAN is not set ++# CONFIG_MMC_SDHCI_OF_AT91 is not set ++# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set ++# CONFIG_MMC_SDHCI_CADENCE is not set ++CONFIG_MMC_SDHCI_AX620=y ++# CONFIG_MMC_SDHCI_F_SDH30 is not set ++# CONFIG_MMC_SPI is not set ++# CONFIG_MMC_DW is not set ++# CONFIG_MMC_VUB300 is not set ++# CONFIG_MMC_USHC is not set ++# CONFIG_MMC_USDHI6ROL0 is not set ++# CONFIG_MMC_CQHCI is not set ++# CONFIG_MMC_MTK is not set ++# CONFIG_MMC_SDHCI_XENON is not set ++# CONFIG_MMC_SDHCI_OMAP is not set ++# CONFIG_MEMSTICK is not set ++# CONFIG_NEW_LEDS is not set ++# CONFIG_ACCESSIBILITY is not set ++# CONFIG_INFINIBAND is not set ++CONFIG_EDAC_ATOMIC_SCRUB=y ++CONFIG_EDAC_SUPPORT=y ++CONFIG_RTC_LIB=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" ++CONFIG_RTC_SYSTOHC=y ++CONFIG_RTC_SYSTOHC_DEVICE="rtc0" ++# CONFIG_RTC_DEBUG is not set ++CONFIG_RTC_NVMEM=y ++ ++# ++# RTC interfaces ++# ++CONFIG_RTC_INTF_SYSFS=y ++CONFIG_RTC_INTF_PROC=y ++CONFIG_RTC_INTF_DEV=y ++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set ++# CONFIG_RTC_DRV_TEST is not set ++ ++# ++# I2C RTC drivers ++# ++# CONFIG_RTC_DRV_ABB5ZES3 is not set ++# CONFIG_RTC_DRV_ABX80X is not set ++# CONFIG_RTC_DRV_DS1307 is not set ++# CONFIG_RTC_DRV_DS1374 is not set ++# CONFIG_RTC_DRV_DS1672 is not set ++# CONFIG_RTC_DRV_HYM8563 is not set ++# CONFIG_RTC_DRV_MAX6900 is not set ++# CONFIG_RTC_DRV_RS5C372 is not set ++# CONFIG_RTC_DRV_ISL1208 is not set ++# CONFIG_RTC_DRV_ISL12022 is not set ++# CONFIG_RTC_DRV_ISL12026 is not set ++# CONFIG_RTC_DRV_X1205 is not set ++# CONFIG_RTC_DRV_PCF8523 is not set ++# CONFIG_RTC_DRV_PCF85063 is not set ++# CONFIG_RTC_DRV_PCF85363 is not set ++# CONFIG_RTC_DRV_PCF8563 is not set ++# CONFIG_RTC_DRV_PCF8583 is not set ++# CONFIG_RTC_DRV_M41T80 is not set ++# CONFIG_RTC_DRV_BQ32K is not set ++# CONFIG_RTC_DRV_S35390A is not set ++# CONFIG_RTC_DRV_FM3130 is not set ++# CONFIG_RTC_DRV_RX8010 is not set ++CONFIG_RTC_DRV_PT7C4563=y ++# CONFIG_RTC_DRV_RX8581 is not set ++# CONFIG_RTC_DRV_RX8025 is not set ++# CONFIG_RTC_DRV_EM3027 is not set ++# CONFIG_RTC_DRV_RV8803 is not set ++ ++# ++# SPI RTC drivers ++# ++# CONFIG_RTC_DRV_M41T93 is not set ++# CONFIG_RTC_DRV_M41T94 is not set ++# CONFIG_RTC_DRV_DS1302 is not set ++# CONFIG_RTC_DRV_DS1305 is not set ++# CONFIG_RTC_DRV_DS1343 is not set ++# CONFIG_RTC_DRV_DS1347 is not set ++# CONFIG_RTC_DRV_DS1390 is not set ++# CONFIG_RTC_DRV_MAX6916 is not set ++# CONFIG_RTC_DRV_R9701 is not set ++# CONFIG_RTC_DRV_RX4581 is not set ++# CONFIG_RTC_DRV_RX6110 is not set ++# CONFIG_RTC_DRV_RS5C348 is not set ++# CONFIG_RTC_DRV_MAX6902 is not set ++# CONFIG_RTC_DRV_PCF2123 is not set ++# CONFIG_RTC_DRV_MCP795 is not set ++CONFIG_RTC_I2C_AND_SPI=y ++ ++# ++# SPI and I2C RTC drivers ++# ++# CONFIG_RTC_DRV_DS3232 is not set ++# CONFIG_RTC_DRV_PCF2127 is not set ++# CONFIG_RTC_DRV_RV3029C2 is not set ++ ++# ++# Platform RTC drivers ++# ++# CONFIG_RTC_DRV_CMOS is not set ++# CONFIG_RTC_DRV_DS1286 is not set ++# CONFIG_RTC_DRV_DS1511 is not set ++# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_DS1685_FAMILY is not set ++# CONFIG_RTC_DRV_DS1742 is not set ++# CONFIG_RTC_DRV_DS2404 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set ++# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T35 is not set ++# CONFIG_RTC_DRV_M48T59 is not set ++# CONFIG_RTC_DRV_MSM6242 is not set ++# CONFIG_RTC_DRV_BQ4802 is not set ++# CONFIG_RTC_DRV_RP5C01 is not set ++# CONFIG_RTC_DRV_V3020 is not set ++# CONFIG_RTC_DRV_ZYNQMP is not set ++ ++# ++# on-CPU RTC drivers ++# ++# CONFIG_RTC_DRV_FTRTC010 is not set ++# CONFIG_RTC_DRV_SNVS is not set ++# CONFIG_RTC_DRV_R7301 is not set ++ ++# ++# HID Sensor RTC drivers ++# ++# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set ++CONFIG_DMADEVICES=y ++# CONFIG_DMADEVICES_DEBUG is not set ++ ++# ++# DMA Devices ++# ++CONFIG_DMA_ENGINE=y ++CONFIG_DMA_VIRTUAL_CHANNELS=y ++CONFIG_DMA_OF=y ++# CONFIG_ALTERA_MSGDMA is not set ++# CONFIG_DW_AXI_DMAC is not set ++CONFIG_AXERA_AXI_DMAC=y ++# CONFIG_FSL_EDMA is not set ++# CONFIG_INTEL_IDMA64 is not set ++# CONFIG_NBPFAXI_DMA is not set ++# CONFIG_QCOM_HIDMA_MGMT is not set ++# CONFIG_QCOM_HIDMA is not set ++# CONFIG_DW_DMAC is not set ++ ++# ++# DMA Clients ++# ++# CONFIG_ASYNC_TX_DMA is not set ++# CONFIG_DMATEST is not set ++ ++# ++# DMABUF options ++# ++CONFIG_SYNC_FILE=y ++# CONFIG_SW_SYNC is not set ++# CONFIG_AUXDISPLAY is not set ++CONFIG_UIO=y ++CONFIG_UIO_PDRV_GENIRQ=m ++# CONFIG_UIO_DMEM_GENIRQ is not set ++# CONFIG_UIO_PRUSS is not set ++# CONFIG_VIRT_DRIVERS is not set ++# CONFIG_VIRTIO_MENU is not set ++ ++# ++# Microsoft Hyper-V guest support ++# ++# CONFIG_STAGING is not set ++# CONFIG_GOLDFISH is not set ++# CONFIG_CHROME_PLATFORMS is not set ++# CONFIG_MELLANOX_PLATFORM is not set ++CONFIG_CLKDEV_LOOKUP=y ++CONFIG_HAVE_CLK_PREPARE=y ++CONFIG_COMMON_CLK=y ++ ++# ++# Common Clock Framework ++# ++# CONFIG_CLK_HSDK is not set ++# CONFIG_COMMON_CLK_MAX9485 is not set ++# CONFIG_COMMON_CLK_SI5351 is not set ++# CONFIG_COMMON_CLK_SI514 is not set ++# CONFIG_COMMON_CLK_SI544 is not set ++# CONFIG_COMMON_CLK_SI570 is not set ++# CONFIG_COMMON_CLK_CDCE706 is not set ++# CONFIG_COMMON_CLK_CDCE925 is not set ++# CONFIG_COMMON_CLK_CS2000_CP is not set ++# CONFIG_CLK_QORIQ is not set ++# CONFIG_COMMON_CLK_PWM is not set ++# CONFIG_COMMON_CLK_VC5 is not set ++CONFIG_COMMON_CLK_AXERA=y ++CONFIG_COMMON_CLK_AX620X=y ++# CONFIG_SLAVE_CLK_AX620X is not set ++# CONFIG_CLK_AX620U is not set ++# CONFIG_HWSPINLOCK is not set ++ ++# ++# Clock Source drivers ++# ++CONFIG_TIMER_OF=y ++CONFIG_TIMER_PROBE=y ++CONFIG_CLKSRC_MMIO=y ++CONFIG_ARM_ARCH_TIMER=y ++CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y ++CONFIG_ARM_GLOBAL_TIMER=y ++CONFIG_ARM_TIMER_SP804=y ++CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y ++# CONFIG_MAILBOX is not set ++# CONFIG_IOMMU_SUPPORT is not set ++ ++# ++# Remoteproc drivers ++# ++# CONFIG_REMOTEPROC is not set ++ ++# ++# Rpmsg drivers ++# ++# CONFIG_RPMSG_VIRTIO is not set ++ ++# ++# SOC (System On Chip) specific Drivers ++# ++ ++# ++# Amlogic SoC drivers ++# ++ ++# ++# Broadcom SoC drivers ++# ++# CONFIG_SOC_BRCMSTB is not set ++ ++# ++# NXP/Freescale QorIQ SoC drivers ++# ++ ++# ++# i.MX SoC drivers ++# ++ ++# ++# Qualcomm SoC drivers ++# ++# CONFIG_SOC_TI is not set ++ ++# ++# Xilinx SoC drivers ++# ++# CONFIG_XILINX_VCU is not set ++CONFIG_AXERA_MEMORY_DUMP=y ++# CONFIG_PM_DEVFREQ is not set ++# CONFIG_EXTCON is not set ++# CONFIG_MEMORY is not set ++# CONFIG_IIO is not set ++CONFIG_PWM=y ++CONFIG_PWM_SYSFS=y ++# CONFIG_PWM_FSL_FTM is not set ++# CONFIG_PWM_PCA9685 is not set ++CONFIG_PWM_AXERA=y ++ ++# ++# IRQ chip support ++# ++CONFIG_IRQCHIP=y ++CONFIG_ARM_GIC=y ++CONFIG_ARM_GIC_MAX_NR=1 ++# CONFIG_IPACK_BUS is not set ++CONFIG_RESET_CONTROLLER=y ++# CONFIG_RESET_TI_SYSCON is not set ++# CONFIG_FMC is not set ++ ++# ++# PHY Subsystem ++# ++# CONFIG_GENERIC_PHY is not set ++# CONFIG_BCM_KONA_USB2_PHY is not set ++# CONFIG_PHY_PXA_28NM_HSIC is not set ++# CONFIG_PHY_PXA_28NM_USB2 is not set ++# CONFIG_PHY_MAPPHONE_MDM6600 is not set ++# CONFIG_POWERCAP is not set ++# CONFIG_MCB is not set ++ ++# ++# Performance monitor support ++# ++# CONFIG_ARM_CCI_PMU is not set ++# CONFIG_ARM_CCN is not set ++CONFIG_ARM_PMU=y ++# CONFIG_RAS is not set ++ ++# ++# Android ++# ++# CONFIG_ANDROID is not set ++# CONFIG_DAX is not set ++CONFIG_NVMEM=y ++ ++# ++# HW tracing support ++# ++# CONFIG_STM is not set ++# CONFIG_INTEL_TH is not set ++# CONFIG_FPGA is not set ++# CONFIG_FSI is not set ++# CONFIG_TEE is not set ++# CONFIG_SIOX is not set ++# CONFIG_SLIMBUS is not set ++ ++# ++# File systems ++# ++CONFIG_DCACHE_WORD_ACCESS=y ++CONFIG_FS_IOMAP=y ++CONFIG_EXT2_FS=y ++# CONFIG_EXT2_FS_XATTR is not set ++CONFIG_EXT3_FS=y ++# CONFIG_EXT3_FS_POSIX_ACL is not set ++# CONFIG_EXT3_FS_SECURITY is not set ++CONFIG_EXT4_FS=y ++# CONFIG_EXT4_FS_POSIX_ACL is not set ++# CONFIG_EXT4_FS_SECURITY is not set ++# CONFIG_EXT4_ENCRYPTION is not set ++# CONFIG_EXT4_DEBUG is not set ++CONFIG_JBD2=y ++# CONFIG_JBD2_DEBUG is not set ++CONFIG_FS_MBCACHE=y ++# CONFIG_REISERFS_FS is not set ++# CONFIG_JFS_FS is not set ++# CONFIG_XFS_FS is not set ++# CONFIG_GFS2_FS is not set ++# CONFIG_OCFS2_FS is not set ++# CONFIG_BTRFS_FS is not set ++# CONFIG_NILFS2_FS is not set ++# CONFIG_F2FS_FS is not set ++CONFIG_EXPORTFS=y ++# CONFIG_EXPORTFS_BLOCK_OPS is not set ++CONFIG_FILE_LOCKING=y ++CONFIG_MANDATORY_FILE_LOCKING=y ++# CONFIG_FS_ENCRYPTION is not set ++CONFIG_FSNOTIFY=y ++CONFIG_DNOTIFY=y ++CONFIG_INOTIFY_USER=y ++# CONFIG_FANOTIFY is not set ++# CONFIG_QUOTA is not set ++# CONFIG_AUTOFS4_FS is not set ++# CONFIG_AUTOFS_FS is not set ++# CONFIG_FUSE_FS is not set ++# CONFIG_OVERLAY_FS is not set ++ ++# ++# Caches ++# ++# CONFIG_FSCACHE is not set ++ ++# ++# CD-ROM/DVD Filesystems ++# ++# CONFIG_ISO9660_FS is not set ++# CONFIG_UDF_FS is not set ++ ++# ++# DOS/FAT/NT Filesystems ++# ++CONFIG_FAT_FS=y ++# CONFIG_MSDOS_FS is not set ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_CODEPAGE=437 ++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" ++# CONFIG_FAT_DEFAULT_UTF8 is not set ++CONFIG_EXFAT_FS=y ++CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" ++CONFIG_EXFAT_VIRTUAL_XATTR=y ++CONFIG_EXFAT_VIRTUAL_XATTR_SELINUX_LABEL="u:object_r:exfat:s0" ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_PROC_PAGE_MONITOR=y ++# CONFIG_PROC_CHILDREN is not set ++CONFIG_KERNFS=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++# CONFIG_TMPFS_POSIX_ACL is not set ++# CONFIG_TMPFS_XATTR is not set ++CONFIG_MEMFD_CREATE=y ++CONFIG_CONFIGFS_FS=y ++CONFIG_MISC_FILESYSTEMS=y ++# CONFIG_ORANGEFS_FS is not set ++# CONFIG_ADFS_FS is not set ++# CONFIG_AFFS_FS is not set ++# CONFIG_ECRYPT_FS is not set ++# CONFIG_HFS_FS is not set ++# CONFIG_HFSPLUS_FS is not set ++# CONFIG_BEFS_FS is not set ++# CONFIG_BFS_FS is not set ++# CONFIG_EFS_FS is not set ++# CONFIG_YAFFS_FS is not set ++CONFIG_JFFS2_FS=y ++CONFIG_JFFS2_FS_DEBUG=0 ++CONFIG_JFFS2_FS_WRITEBUFFER=y ++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set ++# CONFIG_JFFS2_SUMMARY is not set ++# CONFIG_JFFS2_FS_XATTR is not set ++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set ++CONFIG_JFFS2_ZLIB=y ++CONFIG_JFFS2_RTIME=y ++CONFIG_UBIFS_FS=y ++# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set ++CONFIG_UBIFS_FS_LZO=y ++CONFIG_UBIFS_FS_ZLIB=y ++# CONFIG_UBIFS_ATIME_SUPPORT is not set ++CONFIG_UBIFS_FS_XATTR=y ++# CONFIG_UBIFS_FS_ENCRYPTION is not set ++CONFIG_UBIFS_FS_SECURITY=y ++CONFIG_CRAMFS=y ++CONFIG_CRAMFS_BLOCKDEV=y ++# CONFIG_CRAMFS_MTD is not set ++CONFIG_SQUASHFS=y ++CONFIG_SQUASHFS_FILE_CACHE=y ++# CONFIG_SQUASHFS_FILE_DIRECT is not set ++CONFIG_SQUASHFS_DECOMP_SINGLE=y ++# CONFIG_SQUASHFS_DECOMP_MULTI is not set ++# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set ++# CONFIG_SQUASHFS_XATTR is not set ++CONFIG_SQUASHFS_ZLIB=y ++# CONFIG_SQUASHFS_LZ4 is not set ++CONFIG_SQUASHFS_LZO=y ++# CONFIG_SQUASHFS_XZ is not set ++# CONFIG_SQUASHFS_ZSTD is not set ++# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set ++# CONFIG_SQUASHFS_EMBEDDED is not set ++CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 ++# CONFIG_VXFS_FS is not set ++# CONFIG_MINIX_FS is not set ++# CONFIG_OMFS_FS is not set ++# CONFIG_HPFS_FS is not set ++# CONFIG_QNX4FS_FS is not set ++# CONFIG_QNX6FS_FS is not set ++# CONFIG_ROMFS_FS is not set ++CONFIG_PSTORE=y ++CONFIG_PSTORE_DEFLATE_COMPRESS=y ++# CONFIG_PSTORE_LZO_COMPRESS is not set ++# CONFIG_PSTORE_LZ4_COMPRESS is not set ++# CONFIG_PSTORE_LZ4HC_COMPRESS is not set ++# CONFIG_PSTORE_842_COMPRESS is not set ++# CONFIG_PSTORE_ZSTD_COMPRESS is not set ++CONFIG_PSTORE_COMPRESS=y ++CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y ++CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" ++CONFIG_PSTORE_CONSOLE=y ++# CONFIG_PSTORE_PMSG is not set ++CONFIG_PSTORE_RAM=y ++# CONFIG_SYSV_FS is not set ++# CONFIG_UFS_FS is not set ++CONFIG_NETWORK_FILESYSTEMS=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V2=y ++CONFIG_NFS_V3=y ++# CONFIG_NFS_V3_ACL is not set ++CONFIG_NFS_V4=y ++# CONFIG_NFS_SWAP is not set ++# CONFIG_NFS_V4_1 is not set ++CONFIG_ROOT_NFS=y ++# CONFIG_NFS_USE_LEGACY_DNS is not set ++CONFIG_NFS_USE_KERNEL_DNS=y ++# CONFIG_NFSD is not set ++CONFIG_GRACE_PERIOD=y ++CONFIG_LOCKD=y ++CONFIG_LOCKD_V4=y ++CONFIG_NFS_COMMON=y ++CONFIG_SUNRPC=y ++CONFIG_SUNRPC_GSS=y ++# CONFIG_SUNRPC_DEBUG is not set ++# CONFIG_CEPH_FS is not set ++# CONFIG_CIFS is not set ++# CONFIG_CODA_FS is not set ++# CONFIG_AFS_FS is not set ++CONFIG_NLS=y ++CONFIG_NLS_DEFAULT="iso8859-1" ++CONFIG_NLS_CODEPAGE_437=y ++# CONFIG_NLS_CODEPAGE_737 is not set ++# CONFIG_NLS_CODEPAGE_775 is not set ++# CONFIG_NLS_CODEPAGE_850 is not set ++# CONFIG_NLS_CODEPAGE_852 is not set ++# CONFIG_NLS_CODEPAGE_855 is not set ++# CONFIG_NLS_CODEPAGE_857 is not set ++# CONFIG_NLS_CODEPAGE_860 is not set ++# CONFIG_NLS_CODEPAGE_861 is not set ++# CONFIG_NLS_CODEPAGE_862 is not set ++# CONFIG_NLS_CODEPAGE_863 is not set ++# CONFIG_NLS_CODEPAGE_864 is not set ++# CONFIG_NLS_CODEPAGE_865 is not set ++# CONFIG_NLS_CODEPAGE_866 is not set ++# CONFIG_NLS_CODEPAGE_869 is not set ++# CONFIG_NLS_CODEPAGE_936 is not set ++# CONFIG_NLS_CODEPAGE_950 is not set ++# CONFIG_NLS_CODEPAGE_932 is not set ++# CONFIG_NLS_CODEPAGE_949 is not set ++# CONFIG_NLS_CODEPAGE_874 is not set ++# CONFIG_NLS_ISO8859_8 is not set ++# CONFIG_NLS_CODEPAGE_1250 is not set ++# CONFIG_NLS_CODEPAGE_1251 is not set ++# CONFIG_NLS_ASCII is not set ++CONFIG_NLS_ISO8859_1=y ++# CONFIG_NLS_ISO8859_2 is not set ++# CONFIG_NLS_ISO8859_3 is not set ++# CONFIG_NLS_ISO8859_4 is not set ++# CONFIG_NLS_ISO8859_5 is not set ++# CONFIG_NLS_ISO8859_6 is not set ++# CONFIG_NLS_ISO8859_7 is not set ++# CONFIG_NLS_ISO8859_9 is not set ++# CONFIG_NLS_ISO8859_13 is not set ++# CONFIG_NLS_ISO8859_14 is not set ++# CONFIG_NLS_ISO8859_15 is not set ++# CONFIG_NLS_KOI8_R is not set ++# CONFIG_NLS_KOI8_U is not set ++# CONFIG_NLS_MAC_ROMAN is not set ++# CONFIG_NLS_MAC_CELTIC is not set ++# CONFIG_NLS_MAC_CENTEURO is not set ++# CONFIG_NLS_MAC_CROATIAN is not set ++# CONFIG_NLS_MAC_CYRILLIC is not set ++# CONFIG_NLS_MAC_GAELIC is not set ++# CONFIG_NLS_MAC_GREEK is not set ++# CONFIG_NLS_MAC_ICELAND is not set ++# CONFIG_NLS_MAC_INUIT is not set ++# CONFIG_NLS_MAC_ROMANIAN is not set ++# CONFIG_NLS_MAC_TURKISH is not set ++# CONFIG_NLS_UTF8 is not set ++# CONFIG_DLM is not set ++ ++# ++# Security options ++# ++CONFIG_KEYS=y ++# CONFIG_PERSISTENT_KEYRINGS is not set ++# CONFIG_BIG_KEYS is not set ++# CONFIG_ENCRYPTED_KEYS is not set ++# CONFIG_KEY_DH_OPERATIONS is not set ++# CONFIG_SECURITY_DMESG_RESTRICT is not set ++# CONFIG_SECURITY is not set ++# CONFIG_SECURITYFS is not set ++CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y ++# CONFIG_HARDENED_USERCOPY is not set ++# CONFIG_FORTIFY_SOURCE is not set ++# CONFIG_STATIC_USERMODEHELPER is not set ++CONFIG_DEFAULT_SECURITY_DAC=y ++CONFIG_DEFAULT_SECURITY="" ++CONFIG_CRYPTO=y ++ ++# ++# Crypto core or helper ++# ++CONFIG_CRYPTO_ALGAPI=y ++CONFIG_CRYPTO_ALGAPI2=y ++CONFIG_CRYPTO_AEAD=m ++CONFIG_CRYPTO_AEAD2=y ++CONFIG_CRYPTO_BLKCIPHER2=y ++CONFIG_CRYPTO_HASH=y ++CONFIG_CRYPTO_HASH2=y ++CONFIG_CRYPTO_RNG=m ++CONFIG_CRYPTO_RNG2=y ++CONFIG_CRYPTO_RNG_DEFAULT=m ++CONFIG_CRYPTO_AKCIPHER2=y ++CONFIG_CRYPTO_KPP2=y ++CONFIG_CRYPTO_ACOMP2=y ++# CONFIG_CRYPTO_RSA is not set ++# CONFIG_CRYPTO_DH is not set ++# CONFIG_CRYPTO_ECDH is not set ++CONFIG_CRYPTO_MANAGER=m ++CONFIG_CRYPTO_MANAGER2=y ++# CONFIG_CRYPTO_USER is not set ++CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y ++# CONFIG_CRYPTO_GF128MUL is not set ++CONFIG_CRYPTO_NULL=m ++CONFIG_CRYPTO_NULL2=y ++# CONFIG_CRYPTO_PCRYPT is not set ++CONFIG_CRYPTO_WORKQUEUE=y ++# CONFIG_CRYPTO_CRYPTD is not set ++# CONFIG_CRYPTO_MCRYPTD is not set ++# CONFIG_CRYPTO_AUTHENC is not set ++# CONFIG_CRYPTO_TEST is not set ++ ++# ++# Authenticated Encryption with Associated Data ++# ++# CONFIG_CRYPTO_CCM is not set ++# CONFIG_CRYPTO_GCM is not set ++# CONFIG_CRYPTO_CHACHA20POLY1305 is not set ++# CONFIG_CRYPTO_AEGIS128 is not set ++# CONFIG_CRYPTO_AEGIS128L is not set ++# CONFIG_CRYPTO_AEGIS256 is not set ++# CONFIG_CRYPTO_MORUS640 is not set ++# CONFIG_CRYPTO_MORUS1280 is not set ++# CONFIG_CRYPTO_SEQIV is not set ++CONFIG_CRYPTO_ECHAINIV=m ++ ++# ++# Block modes ++# ++# CONFIG_CRYPTO_CBC is not set ++# CONFIG_CRYPTO_CFB is not set ++# CONFIG_CRYPTO_CTR is not set ++# CONFIG_CRYPTO_CTS is not set ++# CONFIG_CRYPTO_ECB is not set ++# CONFIG_CRYPTO_LRW is not set ++# CONFIG_CRYPTO_PCBC is not set ++# CONFIG_CRYPTO_XTS is not set ++# CONFIG_CRYPTO_KEYWRAP is not set ++ ++# ++# Hash modes ++# ++# CONFIG_CRYPTO_CMAC is not set ++CONFIG_CRYPTO_HMAC=m ++# CONFIG_CRYPTO_XCBC is not set ++# CONFIG_CRYPTO_VMAC is not set ++ ++# ++# Digest ++# ++CONFIG_CRYPTO_CRC32C=y ++# CONFIG_CRYPTO_CRC32 is not set ++# CONFIG_CRYPTO_CRCT10DIF is not set ++# CONFIG_CRYPTO_GHASH is not set ++# CONFIG_CRYPTO_POLY1305 is not set ++# CONFIG_CRYPTO_MD4 is not set ++# CONFIG_CRYPTO_MD5 is not set ++# CONFIG_CRYPTO_MICHAEL_MIC is not set ++# CONFIG_CRYPTO_RMD128 is not set ++# CONFIG_CRYPTO_RMD160 is not set ++# CONFIG_CRYPTO_RMD256 is not set ++# CONFIG_CRYPTO_RMD320 is not set ++# CONFIG_CRYPTO_SHA1 is not set ++CONFIG_CRYPTO_SHA256=m ++# CONFIG_CRYPTO_SHA512 is not set ++# CONFIG_CRYPTO_SHA3 is not set ++# CONFIG_CRYPTO_SM3 is not set ++# CONFIG_CRYPTO_TGR192 is not set ++# CONFIG_CRYPTO_WP512 is not set ++ ++# ++# Ciphers ++# ++CONFIG_CRYPTO_AES=y ++# CONFIG_CRYPTO_AES_TI is not set ++# CONFIG_CRYPTO_ANUBIS is not set ++# CONFIG_CRYPTO_ARC4 is not set ++# CONFIG_CRYPTO_BLOWFISH is not set ++# CONFIG_CRYPTO_CAMELLIA is not set ++# CONFIG_CRYPTO_CAST5 is not set ++# CONFIG_CRYPTO_CAST6 is not set ++# CONFIG_CRYPTO_DES is not set ++# CONFIG_CRYPTO_FCRYPT is not set ++# CONFIG_CRYPTO_KHAZAD is not set ++# CONFIG_CRYPTO_SALSA20 is not set ++# CONFIG_CRYPTO_CHACHA20 is not set ++# CONFIG_CRYPTO_SEED is not set ++# CONFIG_CRYPTO_SERPENT is not set ++# CONFIG_CRYPTO_SM4 is not set ++# CONFIG_CRYPTO_TEA is not set ++# CONFIG_CRYPTO_TWOFISH is not set ++ ++# ++# Compression ++# ++CONFIG_CRYPTO_DEFLATE=y ++CONFIG_CRYPTO_LZO=y ++# CONFIG_CRYPTO_842 is not set ++# CONFIG_CRYPTO_LZ4 is not set ++# CONFIG_CRYPTO_LZ4HC is not set ++# CONFIG_CRYPTO_ZSTD is not set ++ ++# ++# Random Number Generation ++# ++# CONFIG_CRYPTO_ANSI_CPRNG is not set ++CONFIG_CRYPTO_DRBG_MENU=m ++CONFIG_CRYPTO_DRBG_HMAC=y ++# CONFIG_CRYPTO_DRBG_HASH is not set ++CONFIG_CRYPTO_DRBG=m ++CONFIG_CRYPTO_JITTERENTROPY=m ++# CONFIG_CRYPTO_USER_API_HASH is not set ++# CONFIG_CRYPTO_USER_API_SKCIPHER is not set ++# CONFIG_CRYPTO_USER_API_RNG is not set ++# CONFIG_CRYPTO_USER_API_AEAD is not set ++# CONFIG_CRYPTO_HW is not set ++# CONFIG_ASYMMETRIC_KEY_TYPE is not set ++ ++# ++# Certificates for signature checking ++# ++# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set ++CONFIG_BINARY_PRINTF=y ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++CONFIG_HAVE_ARCH_BITREVERSE=y ++CONFIG_RATIONAL=y ++CONFIG_GENERIC_STRNCPY_FROM_USER=y ++CONFIG_GENERIC_STRNLEN_USER=y ++CONFIG_GENERIC_NET_UTILS=y ++CONFIG_GENERIC_PCI_IOMAP=y ++CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y ++# CONFIG_CRC_CCITT is not set ++CONFIG_CRC16=y ++# CONFIG_CRC_T10DIF is not set ++# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC32=y ++# CONFIG_CRC32_SELFTEST is not set ++CONFIG_CRC32_SLICEBY8=y ++# CONFIG_CRC32_SLICEBY4 is not set ++# CONFIG_CRC32_SARWATE is not set ++# CONFIG_CRC32_BIT is not set ++# CONFIG_CRC64 is not set ++# CONFIG_CRC4 is not set ++# CONFIG_CRC7 is not set ++# CONFIG_LIBCRC32C is not set ++# CONFIG_CRC8 is not set ++# CONFIG_RANDOM32_SELFTEST is not set ++CONFIG_ZLIB_INFLATE=y ++CONFIG_ZLIB_DEFLATE=y ++CONFIG_LZO_COMPRESS=y ++CONFIG_LZO_DECOMPRESS=y ++CONFIG_XZ_DEC=y ++CONFIG_XZ_DEC_X86=y ++CONFIG_XZ_DEC_POWERPC=y ++CONFIG_XZ_DEC_IA64=y ++CONFIG_XZ_DEC_ARM=y ++CONFIG_XZ_DEC_ARMTHUMB=y ++CONFIG_XZ_DEC_SPARC=y ++CONFIG_XZ_DEC_BCJ=y ++# CONFIG_XZ_DEC_TEST is not set ++CONFIG_GENERIC_ALLOCATOR=y ++CONFIG_REED_SOLOMON=y ++CONFIG_REED_SOLOMON_ENC8=y ++CONFIG_REED_SOLOMON_DEC8=y ++CONFIG_ASSOCIATIVE_ARRAY=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_DMA=y ++CONFIG_NEED_DMA_MAP_STATE=y ++CONFIG_HAVE_GENERIC_DMA_COHERENT=y ++CONFIG_SGL_ALLOC=y ++CONFIG_CPU_RMAP=y ++CONFIG_DQL=y ++CONFIG_GLOB=y ++# CONFIG_GLOB_SELFTEST is not set ++CONFIG_NLATTR=y ++# CONFIG_CORDIC is not set ++# CONFIG_DDR is not set ++# CONFIG_IRQ_POLL is not set ++CONFIG_LIBFDT=y ++CONFIG_OID_REGISTRY=y ++CONFIG_FONT_SUPPORT=y ++# CONFIG_FONTS is not set ++CONFIG_FONT_8x8=y ++CONFIG_FONT_8x16=y ++CONFIG_SG_POOL=y ++CONFIG_ARCH_HAS_SG_CHAIN=y ++CONFIG_SBITMAP=y ++# CONFIG_STRING_SELFTEST is not set ++ ++# ++# Kernel hacking ++# ++ ++# ++# printk and dmesg options ++# ++CONFIG_PRINTK_TIME=y ++CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 ++CONFIG_CONSOLE_LOGLEVEL_QUIET=4 ++CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 ++# CONFIG_BOOT_PRINTK_DELAY is not set ++CONFIG_DYNAMIC_DEBUG=y ++ ++# ++# Compile-time checks and compiler options ++# ++CONFIG_DEBUG_INFO=y ++# CONFIG_DEBUG_INFO_REDUCED is not set ++# CONFIG_DEBUG_INFO_SPLIT is not set ++# CONFIG_DEBUG_INFO_DWARF4 is not set ++# CONFIG_GDB_SCRIPTS is not set ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_FRAME_WARN=1024 ++# CONFIG_STRIP_ASM_SYMS is not set ++# CONFIG_READABLE_ASM is not set ++# CONFIG_UNUSED_SYMBOLS is not set ++# CONFIG_PAGE_OWNER is not set ++CONFIG_DEBUG_FS=y ++# CONFIG_HEADERS_CHECK is not set ++# CONFIG_DEBUG_SECTION_MISMATCH is not set ++CONFIG_SECTION_MISMATCH_WARN_ONLY=y ++# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set ++CONFIG_MAGIC_SYSRQ=y ++CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 ++CONFIG_MAGIC_SYSRQ_SERIAL=y ++CONFIG_DEBUG_KERNEL=y ++ ++# ++# Memory Debugging ++# ++# CONFIG_PAGE_EXTENSION is not set ++# CONFIG_DEBUG_PAGEALLOC is not set ++# CONFIG_PAGE_POISONING is not set ++# CONFIG_DEBUG_PAGE_REF is not set ++# CONFIG_DEBUG_RODATA_TEST is not set ++# CONFIG_DEBUG_OBJECTS is not set ++# CONFIG_SLUB_DEBUG_ON is not set ++# CONFIG_SLUB_STATS is not set ++CONFIG_HAVE_DEBUG_KMEMLEAK=y ++# CONFIG_DEBUG_KMEMLEAK is not set ++# CONFIG_DEBUG_STACK_USAGE is not set ++# CONFIG_DEBUG_VM is not set ++CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y ++# CONFIG_DEBUG_VIRTUAL is not set ++CONFIG_DEBUG_MEMORY_INIT=y ++# CONFIG_DEBUG_PER_CPU_MAPS is not set ++# CONFIG_DEBUG_HIGHMEM is not set ++CONFIG_ARCH_HAS_KCOV=y ++CONFIG_CC_HAS_SANCOV_TRACE_PC=y ++# CONFIG_KCOV is not set ++# CONFIG_DEBUG_SHIRQ is not set ++ ++# ++# Debug Lockups and Hangs ++# ++# CONFIG_SOFTLOCKUP_DETECTOR is not set ++CONFIG_DETECT_HUNG_TASK=y ++CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 ++# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set ++CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 ++# CONFIG_WQ_WATCHDOG is not set ++CONFIG_PANIC_ON_OOPS=y ++CONFIG_PANIC_ON_OOPS_VALUE=1 ++CONFIG_PANIC_TIMEOUT=5 ++# CONFIG_SCHED_DEBUG is not set ++# CONFIG_SCHEDSTATS is not set ++# CONFIG_SCHED_STACK_END_CHECK is not set ++# CONFIG_DEBUG_TIMEKEEPING is not set ++CONFIG_DEBUG_PREEMPT=y ++ ++# ++# Lock Debugging (spinlocks, mutexes, etc...) ++# ++CONFIG_LOCK_DEBUGGING_SUPPORT=y ++# CONFIG_PROVE_LOCKING is not set ++# CONFIG_LOCK_STAT is not set ++# CONFIG_DEBUG_RT_MUTEXES is not set ++# CONFIG_DEBUG_SPINLOCK is not set ++# CONFIG_DEBUG_MUTEXES is not set ++# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set ++# CONFIG_DEBUG_RWSEMS is not set ++# CONFIG_DEBUG_LOCK_ALLOC is not set ++# CONFIG_DEBUG_ATOMIC_SLEEP is not set ++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set ++# CONFIG_LOCK_TORTURE_TEST is not set ++# CONFIG_WW_MUTEX_SELFTEST is not set ++CONFIG_STACKTRACE=y ++# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set ++# CONFIG_DEBUG_KOBJECT is not set ++CONFIG_DEBUG_BUGVERBOSE=y ++# CONFIG_DEBUG_LIST is not set ++# CONFIG_DEBUG_PI_LIST is not set ++# CONFIG_DEBUG_SG is not set ++# CONFIG_DEBUG_NOTIFIERS is not set ++# CONFIG_DEBUG_CREDENTIALS is not set ++ ++# ++# RCU Debugging ++# ++# CONFIG_RCU_PERF_TEST is not set ++# CONFIG_RCU_TORTURE_TEST is not set ++CONFIG_RCU_CPU_STALL_TIMEOUT=21 ++CONFIG_RCU_TRACE=y ++# CONFIG_RCU_EQS_DEBUG is not set ++# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set ++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set ++# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set ++# CONFIG_NOTIFIER_ERROR_INJECTION is not set ++# CONFIG_FAULT_INJECTION is not set ++# CONFIG_LATENCYTOP is not set ++CONFIG_NOP_TRACER=y ++CONFIG_HAVE_FUNCTION_TRACER=y ++CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y ++CONFIG_HAVE_DYNAMIC_FTRACE=y ++CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y ++CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y ++CONFIG_HAVE_SYSCALL_TRACEPOINTS=y ++CONFIG_HAVE_C_RECORDMCOUNT=y ++CONFIG_TRACE_CLOCK=y ++CONFIG_RING_BUFFER=y ++CONFIG_EVENT_TRACING=y ++CONFIG_CONTEXT_SWITCH_TRACER=y ++CONFIG_RING_BUFFER_ALLOW_SWAP=y ++CONFIG_TRACING=y ++CONFIG_TRACING_SUPPORT=y ++CONFIG_FTRACE=y ++# CONFIG_FUNCTION_TRACER is not set ++# CONFIG_PREEMPTIRQ_EVENTS is not set ++# CONFIG_IRQSOFF_TRACER is not set ++# CONFIG_PREEMPT_TRACER is not set ++# CONFIG_SCHED_TRACER is not set ++# CONFIG_HWLAT_TRACER is not set ++# CONFIG_ENABLE_DEFAULT_TRACERS is not set ++# CONFIG_FTRACE_SYSCALLS is not set ++# CONFIG_TRACER_SNAPSHOT is not set ++CONFIG_BRANCH_PROFILE_NONE=y ++# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set ++# CONFIG_PROFILE_ALL_BRANCHES is not set ++# CONFIG_STACK_TRACER is not set ++# CONFIG_BLK_DEV_IO_TRACE is not set ++CONFIG_UPROBE_EVENTS=y ++CONFIG_PROBE_EVENTS=y ++# CONFIG_TRACEPOINT_BENCHMARK is not set ++# CONFIG_RING_BUFFER_BENCHMARK is not set ++# CONFIG_RING_BUFFER_STARTUP_TEST is not set ++# CONFIG_PREEMPTIRQ_DELAY_TEST is not set ++# CONFIG_TRACE_EVAL_MAP_FILE is not set ++CONFIG_TRACING_EVENTS_GPIO=y ++# CONFIG_DMA_API_DEBUG is not set ++CONFIG_RUNTIME_TESTING_MENU=y ++# CONFIG_LKDTM is not set ++# CONFIG_TEST_LIST_SORT is not set ++# CONFIG_TEST_SORT is not set ++# CONFIG_BACKTRACE_SELF_TEST is not set ++# CONFIG_RBTREE_TEST is not set ++# CONFIG_INTERVAL_TREE_TEST is not set ++# CONFIG_PERCPU_TEST is not set ++# CONFIG_ATOMIC64_SELFTEST is not set ++# CONFIG_TEST_HEXDUMP is not set ++# CONFIG_TEST_STRING_HELPERS is not set ++# CONFIG_TEST_KSTRTOX is not set ++# CONFIG_TEST_PRINTF is not set ++# CONFIG_TEST_BITMAP is not set ++# CONFIG_TEST_BITFIELD is not set ++# CONFIG_TEST_UUID is not set ++# CONFIG_TEST_OVERFLOW is not set ++# CONFIG_TEST_RHASHTABLE is not set ++# CONFIG_TEST_HASH is not set ++# CONFIG_TEST_IDA is not set ++# CONFIG_TEST_LKM is not set ++# CONFIG_TEST_USER_COPY is not set ++# CONFIG_TEST_BPF is not set ++# CONFIG_FIND_BIT_BENCHMARK is not set ++# CONFIG_TEST_FIRMWARE is not set ++# CONFIG_TEST_SYSCTL is not set ++# CONFIG_TEST_UDELAY is not set ++# CONFIG_TEST_STATIC_KEYS is not set ++# CONFIG_TEST_KMOD is not set ++# CONFIG_MEMTEST is not set ++# CONFIG_BUG_ON_DATA_CORRUPTION is not set ++# CONFIG_SAMPLES is not set ++CONFIG_HAVE_ARCH_KGDB=y ++# CONFIG_KGDB is not set ++# CONFIG_UBSAN is not set ++CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y ++# CONFIG_STRICT_DEVMEM is not set ++# CONFIG_ARM_PTDUMP_DEBUGFS is not set ++# CONFIG_DEBUG_WX is not set ++CONFIG_ARM_UNWIND=y ++CONFIG_DEBUG_USER=y ++# CONFIG_DEBUG_LL is not set ++CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" ++CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" ++# CONFIG_PID_IN_CONTEXTIDR is not set ++# CONFIG_CORESIGHT is not set +diff --git a/arch/arm/configs/axera_AX620_defconfig b/arch/arm/configs/axera_AX620_defconfig +new file mode 100644 +index 000000000..189a1f2e5 +--- /dev/null ++++ b/arch/arm/configs/axera_AX620_defconfig +@@ -0,0 +1,3451 @@ ++# ++# Automatically generated file; DO NOT EDIT. ++# Linux/arm 4.19.125 Kernel Configuration ++# ++ ++# ++# Compiler: arm-linux-gnueabihf-gcc (Linaro GCC 7.5-2019.12) 7.5.0 ++# ++CONFIG_CC_IS_GCC=y ++CONFIG_GCC_VERSION=70500 ++CONFIG_CLANG_VERSION=0 ++CONFIG_CC_HAS_ASM_GOTO=y ++CONFIG_IRQ_WORK=y ++CONFIG_BUILDTIME_EXTABLE_SORT=y ++ ++# ++# General setup ++# ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++# CONFIG_COMPILE_TEST is not set ++CONFIG_LOCALVERSION="" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_BUILD_SALT="" ++CONFIG_HAVE_KERNEL_GZIP=y ++CONFIG_HAVE_KERNEL_LZMA=y ++CONFIG_HAVE_KERNEL_XZ=y ++CONFIG_HAVE_KERNEL_LZO=y ++CONFIG_HAVE_KERNEL_LZ4=y ++CONFIG_KERNEL_GZIP=y ++# CONFIG_KERNEL_LZMA is not set ++# CONFIG_KERNEL_XZ is not set ++# CONFIG_KERNEL_LZO is not set ++# CONFIG_KERNEL_LZ4 is not set ++CONFIG_DEFAULT_HOSTNAME="(none)" ++CONFIG_SWAP=y ++CONFIG_SYSVIPC=y ++CONFIG_SYSVIPC_SYSCTL=y ++# CONFIG_POSIX_MQUEUE is not set ++CONFIG_CROSS_MEMORY_ATTACH=y ++# CONFIG_USELIB is not set ++# CONFIG_AUDIT is not set ++CONFIG_HAVE_ARCH_AUDITSYSCALL=y ++ ++# ++# IRQ subsystem ++# ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_GENERIC_IRQ_SHOW=y ++CONFIG_GENERIC_IRQ_SHOW_LEVEL=y ++CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y ++CONFIG_GENERIC_IRQ_MIGRATION=y ++CONFIG_HARDIRQS_SW_RESEND=y ++CONFIG_GENERIC_IRQ_CHIP=y ++CONFIG_IRQ_DOMAIN=y ++CONFIG_IRQ_DOMAIN_HIERARCHY=y ++CONFIG_HANDLE_DOMAIN_IRQ=y ++CONFIG_IRQ_FORCED_THREADING=y ++CONFIG_SPARSE_IRQ=y ++# CONFIG_GENERIC_IRQ_DEBUGFS is not set ++CONFIG_GENERIC_IRQ_MULTI_HANDLER=y ++CONFIG_ARCH_CLOCKSOURCE_DATA=y ++CONFIG_GENERIC_TIME_VSYSCALL=y ++CONFIG_GENERIC_CLOCKEVENTS=y ++CONFIG_ARCH_HAS_TICK_BROADCAST=y ++CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y ++ ++# ++# Timers subsystem ++# ++CONFIG_TICK_ONESHOT=y ++CONFIG_HZ_PERIODIC=y ++# CONFIG_NO_HZ_IDLE is not set ++# CONFIG_NO_HZ_FULL is not set ++# CONFIG_NO_HZ is not set ++CONFIG_HIGH_RES_TIMERS=y ++# CONFIG_PREEMPT_NONE is not set ++# CONFIG_PREEMPT_VOLUNTARY is not set ++CONFIG_PREEMPT=y ++CONFIG_PREEMPT_COUNT=y ++ ++# ++# CPU/Task time and stats accounting ++# ++CONFIG_TICK_CPU_ACCOUNTING=y ++# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set ++# CONFIG_IRQ_TIME_ACCOUNTING is not set ++# CONFIG_BSD_PROCESS_ACCT is not set ++# CONFIG_TASKSTATS is not set ++# CONFIG_CPU_ISOLATION is not set ++ ++# ++# RCU Subsystem ++# ++CONFIG_PREEMPT_RCU=y ++# CONFIG_RCU_EXPERT is not set ++CONFIG_SRCU=y ++CONFIG_TREE_SRCU=y ++CONFIG_TASKS_RCU=y ++CONFIG_RCU_STALL_COMMON=y ++CONFIG_RCU_NEED_SEGCBLIST=y ++CONFIG_BUILD_BIN2C=y ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_LOG_BUF_SHIFT=17 ++CONFIG_AXLOG_BUF_SHIFT=20 ++CONFIG_LOG_CPU_MAX_BUF_SHIFT=13 ++CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 ++CONFIG_GENERIC_SCHED_CLOCK=y ++CONFIG_CGROUPS=y ++# CONFIG_MEMCG is not set ++# CONFIG_BLK_CGROUP is not set ++# CONFIG_CGROUP_SCHED is not set ++# CONFIG_CGROUP_PIDS is not set ++# CONFIG_CGROUP_RDMA is not set ++# CONFIG_CGROUP_FREEZER is not set ++CONFIG_CPUSETS=y ++CONFIG_PROC_PID_CPUSET=y ++# CONFIG_CGROUP_DEVICE is not set ++# CONFIG_CGROUP_CPUACCT is not set ++# CONFIG_CGROUP_PERF is not set ++# CONFIG_CGROUP_DEBUG is not set ++CONFIG_NAMESPACES=y ++# CONFIG_UTS_NS is not set ++# CONFIG_IPC_NS is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set ++# CONFIG_NET_NS is not set ++# CONFIG_CHECKPOINT_RESTORE is not set ++# CONFIG_SCHED_AUTOGROUP is not set ++# CONFIG_SYSFS_DEPRECATED is not set ++# CONFIG_RELAY is not set ++# CONFIG_BLK_DEV_INITRD is not set ++CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y ++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set ++CONFIG_SYSCTL=y ++CONFIG_ANON_INODES=y ++CONFIG_HAVE_UID16=y ++CONFIG_BPF=y ++# CONFIG_EXPERT is not set ++CONFIG_UID16=y ++CONFIG_MULTIUSER=y ++CONFIG_SYSFS_SYSCALL=y ++CONFIG_FHANDLE=y ++CONFIG_POSIX_TIMERS=y ++CONFIG_PRINTK=y ++CONFIG_PRINTK_NMI=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++CONFIG_BASE_FULL=y ++CONFIG_FUTEX=y ++CONFIG_FUTEX_PI=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_TIMERFD=y ++CONFIG_EVENTFD=y ++CONFIG_SHMEM=y ++CONFIG_AIO=y ++CONFIG_ADVISE_SYSCALLS=y ++CONFIG_MEMBARRIER=y ++CONFIG_KALLSYMS=y ++# CONFIG_KALLSYMS_ALL is not set ++CONFIG_KALLSYMS_BASE_RELATIVE=y ++# CONFIG_BPF_SYSCALL is not set ++# CONFIG_USERFAULTFD is not set ++CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y ++CONFIG_RSEQ=y ++# CONFIG_EMBEDDED is not set ++CONFIG_HAVE_PERF_EVENTS=y ++CONFIG_PERF_USE_VMALLOC=y ++ ++# ++# Kernel Performance Events And Counters ++# ++CONFIG_PERF_EVENTS=y ++# CONFIG_DEBUG_PERF_USE_VMALLOC is not set ++CONFIG_VM_EVENT_COUNTERS=y ++CONFIG_SLUB_DEBUG=y ++CONFIG_COMPAT_BRK=y ++# CONFIG_SLAB is not set ++CONFIG_SLUB=y ++CONFIG_SLAB_MERGE_DEFAULT=y ++# CONFIG_SLAB_FREELIST_RANDOM is not set ++# CONFIG_SLAB_FREELIST_HARDENED is not set ++CONFIG_SLUB_CPU_PARTIAL=y ++CONFIG_PROFILING=y ++CONFIG_TRACEPOINTS=y ++CONFIG_ARM=y ++CONFIG_ARM_HAS_SG_CHAIN=y ++CONFIG_MIGHT_HAVE_PCI=y ++CONFIG_SYS_SUPPORTS_APM_EMULATION=y ++CONFIG_HAVE_PROC_CPU=y ++CONFIG_NO_IOPORT_MAP=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_RWSEM_XCHGADD_ALGORITHM=y ++CONFIG_FIX_EARLYCON_MEM=y ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_ARCH_SUPPORTS_UPROBES=y ++CONFIG_ARM_PATCH_PHYS_VIRT=y ++CONFIG_GENERIC_BUG=y ++CONFIG_PGTABLE_LEVELS=2 ++ ++# ++# System Type ++# ++CONFIG_MMU=y ++CONFIG_ARCH_MMAP_RND_BITS_MIN=8 ++CONFIG_ARCH_MMAP_RND_BITS_MAX=16 ++CONFIG_ARCH_MULTIPLATFORM=y ++# CONFIG_ARCH_EBSA110 is not set ++# CONFIG_ARCH_EP93XX is not set ++# CONFIG_ARCH_FOOTBRIDGE is not set ++# CONFIG_ARCH_NETX is not set ++# CONFIG_ARCH_IOP13XX is not set ++# CONFIG_ARCH_IOP32X is not set ++# CONFIG_ARCH_IOP33X is not set ++# CONFIG_ARCH_IXP4XX is not set ++# CONFIG_ARCH_DOVE is not set ++# CONFIG_ARCH_KS8695 is not set ++# CONFIG_ARCH_W90X900 is not set ++# CONFIG_ARCH_LPC32XX is not set ++# CONFIG_ARCH_PXA is not set ++# CONFIG_ARCH_RPC is not set ++# CONFIG_ARCH_SA1100 is not set ++# CONFIG_ARCH_S3C24XX is not set ++# CONFIG_ARCH_DAVINCI is not set ++# CONFIG_ARCH_OMAP1 is not set ++ ++# ++# Multiple platform selection ++# ++ ++# ++# CPU Core family selection ++# ++# CONFIG_ARCH_MULTI_V6 is not set ++CONFIG_ARCH_MULTI_V7=y ++CONFIG_ARCH_MULTI_V6_V7=y ++# CONFIG_ARCH_VIRT is not set ++# CONFIG_ARCH_ACTIONS is not set ++# CONFIG_ARCH_ALPINE is not set ++# CONFIG_ARCH_ARTPEC is not set ++# CONFIG_ARCH_AT91 is not set ++CONFIG_ARCH_AXERA=y ++ ++# ++# Axera platform type ++# ++CONFIG_ARCH_AX620=y ++# CONFIG_ARCH_BCM is not set ++# CONFIG_ARCH_BERLIN is not set ++# CONFIG_ARCH_DIGICOLOR is not set ++# CONFIG_ARCH_EXYNOS is not set ++# CONFIG_ARCH_HIGHBANK is not set ++# CONFIG_ARCH_HISI is not set ++# CONFIG_ARCH_MXC is not set ++# CONFIG_ARCH_KEYSTONE is not set ++# CONFIG_ARCH_MEDIATEK is not set ++# CONFIG_ARCH_MESON is not set ++# CONFIG_ARCH_MMP is not set ++# CONFIG_ARCH_MVEBU is not set ++# CONFIG_ARCH_NPCM is not set ++ ++# ++# TI OMAP/AM/DM/DRA Family ++# ++# CONFIG_ARCH_OMAP3 is not set ++# CONFIG_ARCH_OMAP4 is not set ++# CONFIG_SOC_OMAP5 is not set ++# CONFIG_SOC_AM33XX is not set ++# CONFIG_SOC_AM43XX is not set ++# CONFIG_SOC_DRA7XX is not set ++# CONFIG_ARCH_SIRF is not set ++# CONFIG_ARCH_QCOM is not set ++# CONFIG_ARCH_REALVIEW is not set ++# CONFIG_ARCH_ROCKCHIP is not set ++# CONFIG_ARCH_S5PV210 is not set ++# CONFIG_ARCH_RENESAS is not set ++# CONFIG_ARCH_SOCFPGA is not set ++# CONFIG_PLAT_SPEAR is not set ++# CONFIG_ARCH_STI is not set ++# CONFIG_ARCH_STM32 is not set ++# CONFIG_ARCH_SUNXI is not set ++# CONFIG_ARCH_TANGO is not set ++# CONFIG_ARCH_TEGRA is not set ++# CONFIG_ARCH_UNIPHIER is not set ++# CONFIG_ARCH_U8500 is not set ++# CONFIG_ARCH_VEXPRESS is not set ++# CONFIG_ARCH_WM8850 is not set ++# CONFIG_ARCH_ZX is not set ++# CONFIG_ARCH_ZYNQ is not set ++ ++# ++# Axera platform type ++# ++ ++# ++# Processor Type ++# ++CONFIG_CPU_V7=y ++CONFIG_CPU_THUMB_CAPABLE=y ++CONFIG_CPU_32v6K=y ++CONFIG_CPU_32v7=y ++CONFIG_CPU_ABRT_EV7=y ++CONFIG_CPU_PABRT_V7=y ++CONFIG_CPU_CACHE_V7=y ++CONFIG_CPU_CACHE_VIPT=y ++CONFIG_CPU_COPY_V6=y ++CONFIG_CPU_TLB_V7=y ++CONFIG_CPU_HAS_ASID=y ++CONFIG_CPU_CP15=y ++CONFIG_CPU_CP15_MMU=y ++ ++# ++# Processor Features ++# ++# CONFIG_ARM_LPAE is not set ++CONFIG_ARM_THUMB=y ++# CONFIG_ARM_THUMBEE is not set ++CONFIG_ARM_VIRT_EXT=y ++CONFIG_SWP_EMULATE=y ++# CONFIG_CPU_ICACHE_DISABLE is not set ++# CONFIG_CPU_BPREDICT_DISABLE is not set ++CONFIG_CPU_SPECTRE=y ++CONFIG_HARDEN_BRANCH_PREDICTOR=y ++CONFIG_KUSER_HELPERS=y ++CONFIG_VDSO=y ++CONFIG_OUTER_CACHE=y ++CONFIG_OUTER_CACHE_SYNC=y ++CONFIG_MIGHT_HAVE_CACHE_L2X0=y ++CONFIG_CACHE_L2X0=y ++# CONFIG_CACHE_L2X0_PMU is not set ++# CONFIG_PL310_ERRATA_588369 is not set ++# CONFIG_PL310_ERRATA_727915 is not set ++CONFIG_PL310_ERRATA_753970=y ++# CONFIG_PL310_ERRATA_769419 is not set ++CONFIG_ARM_L1_CACHE_SHIFT_6=y ++CONFIG_ARM_L1_CACHE_SHIFT=6 ++CONFIG_ARM_DMA_MEM_BUFFERABLE=y ++CONFIG_ARM_HEAVY_MB=y ++CONFIG_DEBUG_ALIGN_RODATA=y ++# CONFIG_ARM_ERRATA_430973 is not set ++CONFIG_ARM_ERRATA_643719=y ++CONFIG_ARM_ERRATA_720789=y ++# CONFIG_ARM_ERRATA_754322 is not set ++# CONFIG_ARM_ERRATA_754327 is not set ++# CONFIG_ARM_ERRATA_764369 is not set ++# CONFIG_ARM_ERRATA_775420 is not set ++# CONFIG_ARM_ERRATA_798181 is not set ++# CONFIG_ARM_ERRATA_773022 is not set ++# CONFIG_ARM_ERRATA_818325_852422 is not set ++# CONFIG_ARM_ERRATA_821420 is not set ++# CONFIG_ARM_ERRATA_825619 is not set ++# CONFIG_ARM_ERRATA_852421 is not set ++# CONFIG_ARM_ERRATA_852423 is not set ++ ++# ++# Bus support ++# ++# CONFIG_PCI is not set ++ ++# ++# PCI Endpoint ++# ++# CONFIG_PCI_ENDPOINT is not set ++# CONFIG_PCCARD is not set ++ ++# ++# Kernel Features ++# ++CONFIG_HAVE_SMP=y ++CONFIG_SMP=y ++CONFIG_SMP_ON_UP=y ++CONFIG_ARM_CPU_TOPOLOGY=y ++# CONFIG_SCHED_MC is not set ++# CONFIG_SCHED_SMT is not set ++CONFIG_HAVE_ARM_SCU=y ++CONFIG_HAVE_ARM_ARCH_TIMER=y ++CONFIG_HAVE_ARM_TWD=y ++CONFIG_MCPM=y ++# CONFIG_BIG_LITTLE is not set ++CONFIG_VMSPLIT_3G=y ++# CONFIG_VMSPLIT_3G_OPT is not set ++# CONFIG_VMSPLIT_2G is not set ++# CONFIG_VMSPLIT_1G is not set ++CONFIG_PAGE_OFFSET=0xC0000000 ++CONFIG_NR_CPUS=4 ++CONFIG_HOTPLUG_CPU=y ++# CONFIG_ARM_PSCI is not set ++CONFIG_ARCH_NR_GPIO=0 ++CONFIG_HZ_FIXED=0 ++# CONFIG_HZ_100 is not set ++CONFIG_HZ_200=y ++# CONFIG_HZ_250 is not set ++# CONFIG_HZ_300 is not set ++# CONFIG_HZ_500 is not set ++# CONFIG_HZ_1000 is not set ++CONFIG_HZ=200 ++CONFIG_SCHED_HRTICK=y ++# CONFIG_THUMB2_KERNEL is not set ++CONFIG_ARM_PATCH_IDIV=y ++CONFIG_AEABI=y ++# CONFIG_OABI_COMPAT is not set ++CONFIG_HAVE_ARCH_PFN_VALID=y ++CONFIG_HIGHMEM=y ++CONFIG_HIGHPTE=y ++CONFIG_CPU_SW_DOMAIN_PAN=y ++CONFIG_HW_PERF_EVENTS=y ++CONFIG_ARCH_WANT_GENERAL_HUGETLB=y ++CONFIG_ARM_MODULE_PLTS=y ++CONFIG_FORCE_MAX_ZONEORDER=14 ++CONFIG_ALIGNMENT_TRAP=y ++# CONFIG_UACCESS_WITH_MEMCPY is not set ++CONFIG_SECCOMP=y ++# CONFIG_PARAVIRT is not set ++# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set ++# CONFIG_XEN is not set ++ ++# ++# Boot options ++# ++CONFIG_USE_OF=y ++CONFIG_ATAGS=y ++# CONFIG_DEPRECATED_PARAM_STRUCT is not set ++CONFIG_ZBOOT_ROM_TEXT=0x0 ++CONFIG_ZBOOT_ROM_BSS=0x0 ++# CONFIG_ARM_APPENDED_DTB is not set ++CONFIG_CMDLINE="console=ttyAMA0" ++CONFIG_CMDLINE_FROM_BOOTLOADER=y ++# CONFIG_CMDLINE_EXTEND is not set ++# CONFIG_CMDLINE_FORCE is not set ++# CONFIG_KEXEC is not set ++# CONFIG_CRASH_DUMP is not set ++CONFIG_AUTO_ZRELADDR=y ++# CONFIG_EFI is not set ++ ++# ++# CPU Power Management ++# ++ ++# ++# CPU Frequency scaling ++# ++# CONFIG_CPU_FREQ is not set ++ ++# ++# CPU Idle ++# ++# CONFIG_CPU_IDLE is not set ++ ++# ++# Floating point emulation ++# ++ ++# ++# At least one emulation must be selected ++# ++CONFIG_VFP=y ++CONFIG_VFPv3=y ++CONFIG_NEON=y ++CONFIG_KERNEL_MODE_NEON=y ++ ++# ++# Power management options ++# ++CONFIG_SUSPEND=y ++CONFIG_SUSPEND_FREEZER=y ++# CONFIG_HIBERNATION is not set ++CONFIG_PM_SLEEP=y ++CONFIG_PM_SLEEP_SMP=y ++CONFIG_PM_AUTOSLEEP=y ++CONFIG_PM_WAKELOCKS=y ++CONFIG_PM_WAKELOCKS_LIMIT=100 ++CONFIG_PM_WAKELOCKS_GC=y ++CONFIG_PM=y ++# CONFIG_PM_DEBUG is not set ++# CONFIG_APM_EMULATION is not set ++CONFIG_PM_CLK=y ++# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set ++CONFIG_CPU_PM=y ++CONFIG_ARCH_SUSPEND_POSSIBLE=y ++CONFIG_ARM_CPU_SUSPEND=y ++CONFIG_ARCH_HIBERNATION_POSSIBLE=y ++ ++# ++# Firmware Drivers ++# ++CONFIG_HAVE_ARM_SMCCC=y ++# CONFIG_GOOGLE_FIRMWARE is not set ++ ++# ++# Tegra firmware driver ++# ++# CONFIG_ARM_CRYPTO is not set ++# CONFIG_VIRTUALIZATION is not set ++ ++# ++# General architecture-dependent options ++# ++CONFIG_OPROFILE=y ++CONFIG_HAVE_OPROFILE=y ++# CONFIG_KPROBES is not set ++# CONFIG_JUMP_LABEL is not set ++CONFIG_UPROBES=y ++CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y ++CONFIG_ARCH_USE_BUILTIN_BSWAP=y ++CONFIG_HAVE_KPROBES=y ++CONFIG_HAVE_KRETPROBES=y ++CONFIG_HAVE_OPTPROBES=y ++CONFIG_HAVE_NMI=y ++CONFIG_HAVE_ARCH_TRACEHOOK=y ++CONFIG_HAVE_DMA_CONTIGUOUS=y ++CONFIG_GENERIC_SMP_IDLE_THREAD=y ++CONFIG_GENERIC_IDLE_POLL_SETUP=y ++CONFIG_ARCH_HAS_FORTIFY_SOURCE=y ++CONFIG_ARCH_HAS_SET_MEMORY=y ++CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y ++CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y ++CONFIG_HAVE_RSEQ=y ++CONFIG_HAVE_CLK=y ++CONFIG_HAVE_HW_BREAKPOINT=y ++CONFIG_HAVE_PERF_REGS=y ++CONFIG_HAVE_PERF_USER_STACK_DUMP=y ++CONFIG_HAVE_ARCH_JUMP_LABEL=y ++CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y ++CONFIG_HAVE_ARCH_SECCOMP_FILTER=y ++CONFIG_SECCOMP_FILTER=y ++CONFIG_HAVE_STACKPROTECTOR=y ++CONFIG_CC_HAS_STACKPROTECTOR_NONE=y ++CONFIG_STACKPROTECTOR=y ++CONFIG_STACKPROTECTOR_STRONG=y ++CONFIG_HAVE_CONTEXT_TRACKING=y ++CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y ++CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y ++CONFIG_HAVE_MOD_ARCH_SPECIFIC=y ++CONFIG_MODULES_USE_ELF_REL=y ++CONFIG_ARCH_HAS_ELF_RANDOMIZE=y ++CONFIG_HAVE_ARCH_MMAP_RND_BITS=y ++CONFIG_HAVE_EXIT_THREAD=y ++CONFIG_ARCH_MMAP_RND_BITS=8 ++CONFIG_CLONE_BACKWARDS=y ++CONFIG_OLD_SIGSUSPEND3=y ++CONFIG_OLD_SIGACTION=y ++CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y ++CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y ++CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y ++CONFIG_STRICT_KERNEL_RWX=y ++CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y ++CONFIG_STRICT_MODULE_RWX=y ++CONFIG_ARCH_HAS_PHYS_TO_DMA=y ++CONFIG_REFCOUNT_FULL=y ++ ++# ++# GCOV-based kernel profiling ++# ++# CONFIG_GCOV_KERNEL is not set ++CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y ++CONFIG_PLUGIN_HOSTCC="" ++CONFIG_HAVE_GCC_PLUGINS=y ++CONFIG_RT_MUTEXES=y ++CONFIG_BASE_SMALL=0 ++CONFIG_MODULES=y ++# CONFIG_MODULE_FORCE_LOAD is not set ++CONFIG_MODULE_UNLOAD=y ++# CONFIG_MODULE_FORCE_UNLOAD is not set ++CONFIG_MODVERSIONS=y ++# CONFIG_MODULE_SRCVERSION_ALL is not set ++# CONFIG_MODULE_SIG is not set ++# CONFIG_MODULE_COMPRESS is not set ++# CONFIG_TRIM_UNUSED_KSYMS is not set ++CONFIG_MODULES_TREE_LOOKUP=y ++CONFIG_BLOCK=y ++CONFIG_LBDAF=y ++CONFIG_BLK_SCSI_REQUEST=y ++# CONFIG_BLK_DEV_BSG is not set ++# CONFIG_BLK_DEV_BSGLIB is not set ++# CONFIG_BLK_DEV_INTEGRITY is not set ++# CONFIG_BLK_DEV_ZONED is not set ++CONFIG_BLK_CMDLINE_PARSER=y ++# CONFIG_BLK_WBT is not set ++CONFIG_BLK_DEBUG_FS=y ++# CONFIG_BLK_SED_OPAL is not set ++ ++# ++# Partition Types ++# ++CONFIG_PARTITION_ADVANCED=y ++# CONFIG_ACORN_PARTITION is not set ++# CONFIG_AIX_PARTITION is not set ++# CONFIG_OSF_PARTITION is not set ++# CONFIG_AMIGA_PARTITION is not set ++# CONFIG_ATARI_PARTITION is not set ++# CONFIG_MAC_PARTITION is not set ++CONFIG_MSDOS_PARTITION=y ++# CONFIG_BSD_DISKLABEL is not set ++# CONFIG_MINIX_SUBPARTITION is not set ++# CONFIG_SOLARIS_X86_PARTITION is not set ++# CONFIG_UNIXWARE_DISKLABEL is not set ++# CONFIG_LDM_PARTITION is not set ++# CONFIG_SGI_PARTITION is not set ++# CONFIG_ULTRIX_PARTITION is not set ++# CONFIG_SUN_PARTITION is not set ++# CONFIG_KARMA_PARTITION is not set ++CONFIG_EFI_PARTITION=y ++# CONFIG_SYSV68_PARTITION is not set ++CONFIG_CMDLINE_PARTITION=y ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++# CONFIG_IOSCHED_DEADLINE is not set ++# CONFIG_IOSCHED_CFQ is not set ++CONFIG_DEFAULT_NOOP=y ++CONFIG_DEFAULT_IOSCHED="noop" ++CONFIG_MQ_IOSCHED_DEADLINE=y ++CONFIG_MQ_IOSCHED_KYBER=y ++# CONFIG_IOSCHED_BFQ is not set ++CONFIG_UNINLINE_SPIN_UNLOCK=y ++CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y ++CONFIG_MUTEX_SPIN_ON_OWNER=y ++CONFIG_RWSEM_SPIN_ON_OWNER=y ++CONFIG_LOCK_SPIN_ON_OWNER=y ++CONFIG_FREEZER=y ++ ++# ++# Executable file formats ++# ++CONFIG_BINFMT_ELF=y ++# CONFIG_BINFMT_ELF_FDPIC is not set ++CONFIG_ELFCORE=y ++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set ++CONFIG_BINFMT_SCRIPT=y ++# CONFIG_BINFMT_FLAT is not set ++# CONFIG_BINFMT_MISC is not set ++CONFIG_COREDUMP=y ++ ++# ++# Memory Management options ++# ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++CONFIG_HAVE_MEMBLOCK=y ++CONFIG_NO_BOOTMEM=y ++CONFIG_MEMORY_ISOLATION=y ++CONFIG_SPLIT_PTLOCK_CPUS=4 ++CONFIG_COMPACTION=y ++CONFIG_MIGRATION=y ++CONFIG_BOUNCE=y ++# CONFIG_KSM is not set ++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 ++# CONFIG_CLEANCACHE is not set ++# CONFIG_FRONTSWAP is not set ++CONFIG_CMA=y ++# CONFIG_CMA_DEBUG is not set ++# CONFIG_CMA_DEBUGFS is not set ++CONFIG_CMA_AREAS=7 ++# CONFIG_ZPOOL is not set ++# CONFIG_ZBUD is not set ++# CONFIG_ZSMALLOC is not set ++CONFIG_GENERIC_EARLY_IOREMAP=y ++# CONFIG_IDLE_PAGE_TRACKING is not set ++# CONFIG_PERCPU_STATS is not set ++# CONFIG_GUP_BENCHMARK is not set ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++# CONFIG_PACKET_DIAG is not set ++CONFIG_UNIX=y ++# CONFIG_UNIX_DIAG is not set ++# CONFIG_TLS is not set ++CONFIG_XFRM=y ++# CONFIG_XFRM_USER is not set ++# CONFIG_XFRM_SUB_POLICY is not set ++# CONFIG_XFRM_MIGRATE is not set ++# CONFIG_XFRM_STATISTICS is not set ++# CONFIG_NET_KEY is not set ++CONFIG_INET=y ++# CONFIG_IP_MULTICAST is not set ++# CONFIG_IP_ADVANCED_ROUTER is not set ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++CONFIG_IP_PNP_BOOTP=y ++# CONFIG_IP_PNP_RARP is not set ++# CONFIG_NET_IPIP is not set ++# CONFIG_NET_IPGRE_DEMUX is not set ++# CONFIG_SYN_COOKIES is not set ++# CONFIG_NET_IPVTI is not set ++# CONFIG_NET_FOU is not set ++# CONFIG_INET_AH is not set ++# CONFIG_INET_ESP is not set ++# CONFIG_INET_IPCOMP is not set ++CONFIG_INET_XFRM_MODE_TRANSPORT=y ++CONFIG_INET_XFRM_MODE_TUNNEL=y ++CONFIG_INET_XFRM_MODE_BEET=y ++CONFIG_INET_DIAG=y ++CONFIG_INET_TCP_DIAG=y ++# CONFIG_INET_UDP_DIAG is not set ++# CONFIG_INET_RAW_DIAG is not set ++# CONFIG_INET_DIAG_DESTROY is not set ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++# CONFIG_TCP_MD5SIG is not set ++# CONFIG_IPV6 is not set ++# CONFIG_NETWORK_SECMARK is not set ++CONFIG_NET_PTP_CLASSIFY=y ++# CONFIG_NETWORK_PHY_TIMESTAMPING is not set ++# CONFIG_NETFILTER is not set ++# CONFIG_BPFILTER is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_RDS is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++# CONFIG_L2TP is not set ++# CONFIG_BRIDGE is not set ++CONFIG_HAVE_NET_DSA=y ++# CONFIG_NET_DSA is not set ++# CONFIG_VLAN_8021Q is not set ++# CONFIG_DECNET is not set ++# CONFIG_LLC2 is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_PHONET is not set ++# CONFIG_IEEE802154 is not set ++# CONFIG_NET_SCHED is not set ++# CONFIG_DCB is not set ++CONFIG_DNS_RESOLVER=y ++# CONFIG_BATMAN_ADV is not set ++# CONFIG_OPENVSWITCH is not set ++# CONFIG_VSOCKETS is not set ++# CONFIG_NETLINK_DIAG is not set ++# CONFIG_MPLS is not set ++# CONFIG_NET_NSH is not set ++# CONFIG_HSR is not set ++# CONFIG_NET_SWITCHDEV is not set ++# CONFIG_NET_L3_MASTER_DEV is not set ++# CONFIG_NET_NCSI is not set ++CONFIG_RPS=y ++CONFIG_RFS_ACCEL=y ++CONFIG_XPS=y ++# CONFIG_CGROUP_NET_PRIO is not set ++# CONFIG_CGROUP_NET_CLASSID is not set ++CONFIG_NET_RX_BUSY_POLL=y ++CONFIG_BQL=y ++# CONFIG_BPF_JIT is not set ++CONFIG_NET_FLOW_LIMIT=y ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_NET_DROP_MONITOR is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_CAN is not set ++# CONFIG_BT is not set ++# CONFIG_AF_RXRPC is not set ++# CONFIG_AF_KCM is not set ++# CONFIG_WIRELESS is not set ++# CONFIG_WIMAX is not set ++# CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set ++# CONFIG_CAIF is not set ++# CONFIG_CEPH_LIB is not set ++# CONFIG_NFC is not set ++# CONFIG_PSAMPLE is not set ++# CONFIG_NET_IFE is not set ++# CONFIG_LWTUNNEL is not set ++CONFIG_GRO_CELLS=y ++# CONFIG_NET_DEVLINK is not set ++CONFIG_MAY_USE_DEVLINK=y ++# CONFIG_FAILOVER is not set ++CONFIG_HAVE_EBPF_JIT=y ++ ++# ++# Device Drivers ++# ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER=y ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_DEVTMPFS=y ++# CONFIG_DEVTMPFS_MOUNT is not set ++CONFIG_STANDALONE=y ++CONFIG_PREVENT_FIRMWARE_BUILD=y ++ ++# ++# Firmware loader ++# ++CONFIG_FW_LOADER=y ++CONFIG_EXTRA_FIRMWARE="" ++# CONFIG_FW_LOADER_USER_HELPER is not set ++CONFIG_ALLOW_DEV_COREDUMP=y ++# CONFIG_DEBUG_DRIVER is not set ++# CONFIG_DEBUG_DEVRES is not set ++# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set ++# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set ++CONFIG_GENERIC_CPU_AUTOPROBE=y ++CONFIG_REGMAP=y ++CONFIG_REGMAP_I2C=y ++CONFIG_REGMAP_SPI=y ++CONFIG_REGMAP_MMIO=y ++CONFIG_DMA_SHARED_BUFFER=y ++# CONFIG_DMA_FENCE_TRACE is not set ++CONFIG_DMA_CMA=y ++ ++# ++# Default contiguous memory area size: ++# ++CONFIG_CMA_SIZE_MBYTES=64 ++CONFIG_CMA_SIZE_SEL_MBYTES=y ++# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set ++# CONFIG_CMA_SIZE_SEL_MIN is not set ++# CONFIG_CMA_SIZE_SEL_MAX is not set ++CONFIG_CMA_ALIGNMENT=8 ++CONFIG_GENERIC_ARCH_TOPOLOGY=y ++ ++# ++# Bus devices ++# ++# CONFIG_BRCMSTB_GISB_ARB is not set ++# CONFIG_SIMPLE_PM_BUS is not set ++# CONFIG_VEXPRESS_CONFIG is not set ++# CONFIG_CONNECTOR is not set ++# CONFIG_GNSS is not set ++CONFIG_MTD=y ++CONFIG_MTD_TESTS=m ++# CONFIG_MTD_REDBOOT_PARTS is not set ++CONFIG_MTD_CMDLINE_PARTS=y ++# CONFIG_MTD_AFS_PARTS is not set ++CONFIG_MTD_OF_PARTS=y ++# CONFIG_MTD_AR7_PARTS is not set ++ ++# ++# Partition parsers ++# ++ ++# ++# User Modules And Translation Layers ++# ++CONFIG_MTD_BLKDEVS=y ++CONFIG_MTD_BLOCK=y ++# CONFIG_FTL is not set ++# CONFIG_NFTL is not set ++# CONFIG_INFTL is not set ++# CONFIG_RFD_FTL is not set ++# CONFIG_SSFDC is not set ++# CONFIG_SM_FTL is not set ++# CONFIG_MTD_OOPS is not set ++# CONFIG_MTD_SWAP is not set ++CONFIG_MTD_PARTITIONED_MASTER=y ++ ++# ++# RAM/ROM/Flash chip drivers ++# ++# CONFIG_MTD_CFI is not set ++# CONFIG_MTD_JEDECPROBE is not set ++CONFIG_MTD_MAP_BANK_WIDTH_1=y ++CONFIG_MTD_MAP_BANK_WIDTH_2=y ++CONFIG_MTD_MAP_BANK_WIDTH_4=y ++CONFIG_MTD_CFI_I1=y ++CONFIG_MTD_CFI_I2=y ++# CONFIG_MTD_RAM is not set ++# CONFIG_MTD_ROM is not set ++# CONFIG_MTD_ABSENT is not set ++ ++# ++# Mapping drivers for chip access ++# ++# CONFIG_MTD_COMPLEX_MAPPINGS is not set ++# CONFIG_MTD_PLATRAM is not set ++ ++# ++# Self-contained MTD device drivers ++# ++# CONFIG_MTD_DATAFLASH is not set ++CONFIG_MTD_M25P80=y ++# CONFIG_MTD_MCHP23K256 is not set ++# CONFIG_MTD_SST25L is not set ++# CONFIG_MTD_SLRAM is not set ++# CONFIG_MTD_PHRAM is not set ++# CONFIG_MTD_MTDRAM is not set ++# CONFIG_MTD_BLOCK2MTD is not set ++ ++# ++# Disk-On-Chip Device Drivers ++# ++# CONFIG_MTD_DOCG3 is not set ++CONFIG_MTD_NAND_CORE=y ++# CONFIG_MTD_ONENAND is not set ++# CONFIG_MTD_NAND is not set ++CONFIG_MTD_SPI_NAND=y ++ ++# ++# LPDDR & LPDDR2 PCM memory drivers ++# ++# CONFIG_MTD_LPDDR is not set ++# CONFIG_MTD_LPDDR2_NVM is not set ++CONFIG_MTD_SPI_NOR=y ++# CONFIG_MTD_MT81xx_NOR is not set ++# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set ++# CONFIG_SPI_CADENCE_QUADSPI is not set ++CONFIG_MTD_UBI=y ++CONFIG_MTD_UBI_WL_THRESHOLD=4096 ++CONFIG_MTD_UBI_BEB_LIMIT=20 ++# CONFIG_MTD_UBI_FASTMAP is not set ++# CONFIG_MTD_UBI_GLUEBI is not set ++# CONFIG_MTD_UBI_BLOCK is not set ++CONFIG_DTC=y ++CONFIG_OF=y ++# CONFIG_OF_UNITTEST is not set ++CONFIG_OF_FLATTREE=y ++CONFIG_OF_EARLY_FLATTREE=y ++CONFIG_OF_KOBJ=y ++CONFIG_OF_ADDRESS=y ++CONFIG_OF_IRQ=y ++CONFIG_OF_NET=y ++CONFIG_OF_MDIO=y ++CONFIG_OF_RESERVED_MEM=y ++# CONFIG_OF_OVERLAY is not set ++CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y ++# CONFIG_PARPORT is not set ++CONFIG_BLK_DEV=y ++CONFIG_BLK_DEV_NULL_BLK=y ++# CONFIG_BLK_DEV_LOOP is not set ++# CONFIG_BLK_DEV_DRBD is not set ++# CONFIG_BLK_DEV_NBD is not set ++# CONFIG_BLK_DEV_RAM is not set ++# CONFIG_CDROM_PKTCDVD is not set ++# CONFIG_ATA_OVER_ETH is not set ++# CONFIG_BLK_DEV_RBD is not set ++ ++# ++# NVME Support ++# ++# CONFIG_NVME_FC is not set ++# CONFIG_NVME_TARGET is not set ++ ++# ++# Misc devices ++# ++# CONFIG_AD525X_DPOT is not set ++# CONFIG_DUMMY_IRQ is not set ++# CONFIG_ICS932S401 is not set ++# CONFIG_ENCLOSURE_SERVICES is not set ++# CONFIG_APDS9802ALS is not set ++# CONFIG_ISL29003 is not set ++# CONFIG_ISL29020 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_SENSORS_BH1770 is not set ++# CONFIG_SENSORS_APDS990X is not set ++# CONFIG_HMC6352 is not set ++# CONFIG_DS1682 is not set ++# CONFIG_USB_SWITCH_FSA9480 is not set ++# CONFIG_LATTICE_ECP3_CONFIG is not set ++# CONFIG_SRAM is not set ++# CONFIG_C2PORT is not set ++ ++# ++# EEPROM support ++# ++# CONFIG_EEPROM_AT24 is not set ++# CONFIG_EEPROM_AT25 is not set ++# CONFIG_EEPROM_LEGACY is not set ++# CONFIG_EEPROM_MAX6875 is not set ++# CONFIG_EEPROM_93CX6 is not set ++# CONFIG_EEPROM_93XX46 is not set ++# CONFIG_EEPROM_IDT_89HPESX is not set ++ ++# ++# Texas Instruments shared transport line discipline ++# ++# CONFIG_TI_ST is not set ++# CONFIG_SENSORS_LIS3_SPI is not set ++# CONFIG_SENSORS_LIS3_I2C is not set ++# CONFIG_ALTERA_STAPL is not set ++ ++# ++# Intel MIC & related support ++# ++ ++# ++# Intel MIC Bus Driver ++# ++ ++# ++# SCIF Bus Driver ++# ++ ++# ++# VOP Bus Driver ++# ++ ++# ++# Intel MIC Host Driver ++# ++ ++# ++# Intel MIC Card Driver ++# ++ ++# ++# SCIF Driver ++# ++ ++# ++# Intel MIC Coprocessor State Management (COSM) Drivers ++# ++ ++# ++# VOP Driver ++# ++# CONFIG_ECHO is not set ++# CONFIG_MISC_RTSX_USB is not set ++ ++# ++# SCSI device support ++# ++CONFIG_SCSI_MOD=y ++# CONFIG_RAID_ATTRS is not set ++CONFIG_SCSI=y ++CONFIG_SCSI_DMA=y ++CONFIG_SCSI_MQ_DEFAULT=y ++# CONFIG_SCSI_PROC_FS is not set ++ ++# ++# SCSI support type (disk, tape, CD-ROM) ++# ++CONFIG_BLK_DEV_SD=y ++# CONFIG_CHR_DEV_ST is not set ++# CONFIG_CHR_DEV_OSST is not set ++# CONFIG_BLK_DEV_SR is not set ++# CONFIG_CHR_DEV_SG is not set ++# CONFIG_CHR_DEV_SCH is not set ++# CONFIG_SCSI_CONSTANTS is not set ++# CONFIG_SCSI_LOGGING is not set ++# CONFIG_SCSI_SCAN_ASYNC is not set ++ ++# ++# SCSI Transports ++# ++# CONFIG_SCSI_SPI_ATTRS is not set ++# CONFIG_SCSI_FC_ATTRS is not set ++# CONFIG_SCSI_ISCSI_ATTRS is not set ++# CONFIG_SCSI_SAS_ATTRS is not set ++# CONFIG_SCSI_SAS_LIBSAS is not set ++# CONFIG_SCSI_SRP_ATTRS is not set ++CONFIG_SCSI_LOWLEVEL=y ++# CONFIG_ISCSI_TCP is not set ++# CONFIG_ISCSI_BOOT_SYSFS is not set ++# CONFIG_SCSI_UFSHCD is not set ++# CONFIG_SCSI_DEBUG is not set ++# CONFIG_SCSI_DH is not set ++# CONFIG_SCSI_OSD_INITIATOR is not set ++# CONFIG_ATA is not set ++# CONFIG_MD is not set ++# CONFIG_TARGET_CORE is not set ++CONFIG_NETDEVICES=y ++CONFIG_MII=y ++CONFIG_NET_CORE=y ++# CONFIG_BONDING is not set ++# CONFIG_DUMMY is not set ++# CONFIG_EQUALIZER is not set ++# CONFIG_NET_TEAM is not set ++# CONFIG_MACVLAN is not set ++# CONFIG_VXLAN is not set ++# CONFIG_GENEVE is not set ++# CONFIG_GTP is not set ++# CONFIG_MACSEC is not set ++# CONFIG_NETCONSOLE is not set ++# CONFIG_TUN is not set ++# CONFIG_TUN_VNET_CROSS_LE is not set ++# CONFIG_VETH is not set ++# CONFIG_NLMON is not set ++ ++# ++# CAIF transport drivers ++# ++ ++# ++# Distributed Switch Architecture drivers ++# ++CONFIG_ETHERNET=y ++# CONFIG_NET_VENDOR_ALACRITECH is not set ++# CONFIG_ALTERA_TSE is not set ++# CONFIG_NET_VENDOR_AMAZON is not set ++# CONFIG_NET_VENDOR_AQUANTIA is not set ++# CONFIG_NET_VENDOR_ARC is not set ++# CONFIG_NET_VENDOR_AURORA is not set ++# CONFIG_NET_VENDOR_BROADCOM is not set ++# CONFIG_NET_VENDOR_CADENCE is not set ++# CONFIG_NET_VENDOR_CAVIUM is not set ++# CONFIG_NET_VENDOR_CIRRUS is not set ++# CONFIG_NET_VENDOR_CORTINA is not set ++# CONFIG_DM9000 is not set ++# CONFIG_DNET is not set ++# CONFIG_NET_VENDOR_EZCHIP is not set ++# CONFIG_NET_VENDOR_FARADAY is not set ++# CONFIG_NET_VENDOR_HISILICON is not set ++# CONFIG_NET_VENDOR_HUAWEI is not set ++# CONFIG_NET_VENDOR_INTEL is not set ++# CONFIG_NET_VENDOR_MARVELL is not set ++# CONFIG_NET_VENDOR_MELLANOX is not set ++# CONFIG_NET_VENDOR_MICREL is not set ++CONFIG_NET_VENDOR_MICROCHIP=y ++# CONFIG_ENC28J60 is not set ++# CONFIG_ENCX24J600 is not set ++# CONFIG_NET_VENDOR_MICROSEMI is not set ++# CONFIG_NET_VENDOR_NATSEMI is not set ++# CONFIG_NET_VENDOR_NETRONOME is not set ++# CONFIG_NET_VENDOR_NI is not set ++# CONFIG_ETHOC is not set ++# CONFIG_NET_VENDOR_QUALCOMM is not set ++# CONFIG_NET_VENDOR_RENESAS is not set ++# CONFIG_NET_VENDOR_ROCKER is not set ++# CONFIG_NET_VENDOR_SAMSUNG is not set ++# CONFIG_NET_VENDOR_SEEQ is not set ++# CONFIG_NET_VENDOR_SOLARFLARE is not set ++# CONFIG_NET_VENDOR_SMSC is not set ++# CONFIG_NET_VENDOR_SOCIONEXT is not set ++CONFIG_NET_VENDOR_STMICRO=y ++CONFIG_STMMAC_ETH=y ++CONFIG_STMMAC_PLATFORM=y ++# CONFIG_DWMAC_DWC_QOS_ETH is not set ++# CONFIG_DWMAC_GENERIC is not set ++CONFIG_DWMAC_AXERA=y ++CONFIG_DWMAC_AXERA_AX620=y ++# CONFIG_DWMAC_AXERA_HAPS is not set ++# CONFIG_NET_VENDOR_SYNOPSYS is not set ++# CONFIG_NET_VENDOR_VIA is not set ++# CONFIG_NET_VENDOR_WIZNET is not set ++CONFIG_MDIO_DEVICE=y ++CONFIG_MDIO_BUS=y ++# CONFIG_MDIO_BCM_UNIMAC is not set ++# CONFIG_MDIO_BITBANG is not set ++# CONFIG_MDIO_BUS_MUX_GPIO is not set ++# CONFIG_MDIO_BUS_MUX_MMIOREG is not set ++# CONFIG_MDIO_HISI_FEMAC is not set ++# CONFIG_MDIO_MSCC_MIIM is not set ++CONFIG_PHYLIB=y ++CONFIG_SWPHY=y ++ ++# ++# MII PHY device drivers ++# ++# CONFIG_AMD_PHY is not set ++# CONFIG_AQUANTIA_PHY is not set ++# CONFIG_AX88796B_PHY is not set ++# CONFIG_AT803X_PHY is not set ++# CONFIG_BCM7XXX_PHY is not set ++# CONFIG_BCM87XX_PHY is not set ++# CONFIG_BROADCOM_PHY is not set ++# CONFIG_CICADA_PHY is not set ++# CONFIG_CORTINA_PHY is not set ++# CONFIG_DAVICOM_PHY is not set ++# CONFIG_DP83822_PHY is not set ++# CONFIG_DP83TC811_PHY is not set ++# CONFIG_DP83848_PHY is not set ++# CONFIG_DP83867_PHY is not set ++CONFIG_FIXED_PHY=y ++# CONFIG_ICPLUS_PHY is not set ++# CONFIG_INTEL_XWAY_PHY is not set ++# CONFIG_LSI_ET1011C_PHY is not set ++# CONFIG_LXT_PHY is not set ++CONFIG_MARVELL_PHY=y ++# CONFIG_MARVELL_10G_PHY is not set ++# CONFIG_MICREL_PHY is not set ++# CONFIG_MICROCHIP_PHY is not set ++# CONFIG_MICROCHIP_T1_PHY is not set ++# CONFIG_MICROSEMI_PHY is not set ++# CONFIG_NATIONAL_PHY is not set ++# CONFIG_QSEMI_PHY is not set ++CONFIG_REALTEK_PHY=y ++# CONFIG_RENESAS_PHY is not set ++# CONFIG_ROCKCHIP_PHY is not set ++# CONFIG_SMSC_PHY is not set ++# CONFIG_STE10XP is not set ++# CONFIG_TERANETICS_PHY is not set ++# CONFIG_VITESSE_PHY is not set ++# CONFIG_XILINX_GMII2RGMII is not set ++# CONFIG_MICREL_KS8995MA is not set ++# CONFIG_PPP is not set ++# CONFIG_SLIP is not set ++CONFIG_USB_NET_DRIVERS=y ++# CONFIG_USB_CATC is not set ++# CONFIG_USB_KAWETH is not set ++# CONFIG_USB_PEGASUS is not set ++# CONFIG_USB_RTL8150 is not set ++# CONFIG_USB_RTL8152 is not set ++# CONFIG_USB_LAN78XX is not set ++# CONFIG_USB_USBNET is not set ++# CONFIG_USB_IPHETH is not set ++# CONFIG_WLAN is not set ++ ++# ++# Enable WiMAX (Networking options) to see the WiMAX drivers ++# ++# CONFIG_WAN is not set ++# CONFIG_NETDEVSIM is not set ++# CONFIG_NET_FAILOVER is not set ++# CONFIG_ISDN is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=y ++# CONFIG_INPUT_FF_MEMLESS is not set ++# CONFIG_INPUT_POLLDEV is not set ++# CONFIG_INPUT_SPARSEKMAP is not set ++# CONFIG_INPUT_MATRIXKMAP is not set ++ ++# ++# Userland interfaces ++# ++# CONFIG_INPUT_MOUSEDEV is not set ++# CONFIG_INPUT_JOYDEV is not set ++CONFIG_INPUT_EVDEV=y ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++CONFIG_INPUT_KEYBOARD=y ++# CONFIG_KEYBOARD_ADP5588 is not set ++# CONFIG_KEYBOARD_ADP5589 is not set ++CONFIG_KEYBOARD_ATKBD=y ++# CONFIG_KEYBOARD_QT1070 is not set ++# CONFIG_KEYBOARD_QT2160 is not set ++# CONFIG_KEYBOARD_DLINK_DIR685 is not set ++# CONFIG_KEYBOARD_LKKBD is not set ++# CONFIG_KEYBOARD_GPIO is not set ++# CONFIG_KEYBOARD_GPIO_POLLED is not set ++# CONFIG_KEYBOARD_TCA6416 is not set ++# CONFIG_KEYBOARD_TCA8418 is not set ++# CONFIG_KEYBOARD_MATRIX is not set ++# CONFIG_KEYBOARD_LM8333 is not set ++# CONFIG_KEYBOARD_MAX7359 is not set ++# CONFIG_KEYBOARD_MCS is not set ++# CONFIG_KEYBOARD_MPR121 is not set ++# CONFIG_KEYBOARD_NEWTON is not set ++# CONFIG_KEYBOARD_OPENCORES is not set ++# CONFIG_KEYBOARD_SAMSUNG is not set ++# CONFIG_KEYBOARD_STOWAWAY is not set ++# CONFIG_KEYBOARD_SUNKBD is not set ++# CONFIG_KEYBOARD_OMAP4 is not set ++# CONFIG_KEYBOARD_XTKBD is not set ++# CONFIG_KEYBOARD_CAP11XX is not set ++# CONFIG_KEYBOARD_BCM is not set ++CONFIG_INPUT_MOUSE=y ++CONFIG_MOUSE_PS2=y ++CONFIG_MOUSE_PS2_ALPS=y ++CONFIG_MOUSE_PS2_BYD=y ++CONFIG_MOUSE_PS2_LOGIPS2PP=y ++CONFIG_MOUSE_PS2_SYNAPTICS=y ++CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y ++CONFIG_MOUSE_PS2_CYPRESS=y ++CONFIG_MOUSE_PS2_TRACKPOINT=y ++# CONFIG_MOUSE_PS2_ELANTECH is not set ++# CONFIG_MOUSE_PS2_SENTELIC is not set ++# CONFIG_MOUSE_PS2_TOUCHKIT is not set ++CONFIG_MOUSE_PS2_FOCALTECH=y ++CONFIG_MOUSE_PS2_SMBUS=y ++# CONFIG_MOUSE_SERIAL is not set ++# CONFIG_MOUSE_APPLETOUCH is not set ++# CONFIG_MOUSE_BCM5974 is not set ++# CONFIG_MOUSE_CYAPA is not set ++# CONFIG_MOUSE_ELAN_I2C is not set ++# CONFIG_MOUSE_VSXXXAA is not set ++# CONFIG_MOUSE_GPIO is not set ++# CONFIG_MOUSE_SYNAPTICS_I2C is not set ++# CONFIG_MOUSE_SYNAPTICS_USB is not set ++# CONFIG_INPUT_JOYSTICK is not set ++# CONFIG_INPUT_TABLET is not set ++# CONFIG_INPUT_TOUCHSCREEN is not set ++# CONFIG_INPUT_MISC is not set ++# CONFIG_RMI4_CORE is not set ++ ++# ++# Hardware I/O ports ++# ++CONFIG_SERIO=y ++# CONFIG_SERIO_SERPORT is not set ++CONFIG_SERIO_LIBPS2=y ++# CONFIG_SERIO_RAW is not set ++# CONFIG_SERIO_ALTERA_PS2 is not set ++# CONFIG_SERIO_PS2MULT is not set ++# CONFIG_SERIO_ARC_PS2 is not set ++# CONFIG_SERIO_APBPS2 is not set ++# CONFIG_SERIO_GPIO_PS2 is not set ++# CONFIG_USERIO is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++CONFIG_TTY=y ++CONFIG_VT=y ++CONFIG_CONSOLE_TRANSLATIONS=y ++CONFIG_VT_CONSOLE=y ++CONFIG_VT_CONSOLE_SLEEP=y ++CONFIG_HW_CONSOLE=y ++CONFIG_VT_HW_CONSOLE_BINDING=y ++CONFIG_UNIX98_PTYS=y ++CONFIG_LEGACY_PTYS=y ++CONFIG_LEGACY_PTY_COUNT=16 ++# CONFIG_SERIAL_NONSTANDARD is not set ++# CONFIG_N_GSM is not set ++# CONFIG_TRACE_SINK is not set ++CONFIG_LDISC_AUTOLOAD=y ++CONFIG_DEVMEM=y ++# CONFIG_DEVKMEM is not set ++ ++# ++# Serial drivers ++# ++CONFIG_SERIAL_EARLYCON=y ++CONFIG_SERIAL_8250=y ++CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y ++# CONFIG_SERIAL_8250_FINTEK is not set ++CONFIG_SERIAL_8250_CONSOLE=y ++CONFIG_SERIAL_8250_DMA=y ++CONFIG_SERIAL_8250_NR_UARTS=4 ++CONFIG_SERIAL_8250_RUNTIME_UARTS=4 ++# CONFIG_SERIAL_8250_EXTENDED is not set ++# CONFIG_SERIAL_8250_ASPEED_VUART is not set ++CONFIG_SERIAL_8250_FSL=y ++CONFIG_SERIAL_8250_DW=y ++# CONFIG_SERIAL_8250_EM is not set ++# CONFIG_SERIAL_8250_RT288X is not set ++# CONFIG_SERIAL_OF_PLATFORM is not set ++ ++# ++# Non-8250 serial port support ++# ++# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set ++# CONFIG_SERIAL_MAX3100 is not set ++# CONFIG_SERIAL_MAX310X is not set ++# CONFIG_SERIAL_UARTLITE is not set ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++# CONFIG_SERIAL_SCCNXP is not set ++# CONFIG_SERIAL_SC16IS7XX is not set ++# CONFIG_SERIAL_BCM63XX is not set ++# CONFIG_SERIAL_ALTERA_JTAGUART is not set ++# CONFIG_SERIAL_ALTERA_UART is not set ++# CONFIG_SERIAL_IFX6X60 is not set ++# CONFIG_SERIAL_XILINX_PS_UART is not set ++# CONFIG_SERIAL_ARC is not set ++# CONFIG_SERIAL_FSL_LPUART is not set ++# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set ++# CONFIG_SERIAL_ST_ASC is not set ++# CONFIG_SERIAL_DEV_BUS is not set ++# CONFIG_HVC_DCC is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set ++# CONFIG_XILLYBUS is not set ++ ++# ++# I2C support ++# ++CONFIG_I2C=y ++CONFIG_I2C_BOARDINFO=y ++CONFIG_I2C_COMPAT=y ++CONFIG_I2C_CHARDEV=y ++CONFIG_I2C_MUX=y ++ ++# ++# Multiplexer I2C Chip support ++# ++# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set ++# CONFIG_I2C_MUX_GPIO is not set ++# CONFIG_I2C_MUX_GPMUX is not set ++# CONFIG_I2C_MUX_LTC4306 is not set ++# CONFIG_I2C_MUX_PCA9541 is not set ++# CONFIG_I2C_MUX_PCA954x is not set ++# CONFIG_I2C_MUX_PINCTRL is not set ++# CONFIG_I2C_MUX_REG is not set ++# CONFIG_I2C_DEMUX_PINCTRL is not set ++# CONFIG_I2C_MUX_MLXCPLD is not set ++CONFIG_I2C_HELPER_AUTO=y ++CONFIG_I2C_ALGOBIT=y ++ ++# ++# I2C Hardware Bus support ++# ++ ++# ++# I2C system bus drivers (mostly embedded / system-on-chip) ++# ++# CONFIG_I2C_CBUS_GPIO is not set ++CONFIG_I2C_DESIGNWARE_CORE=y ++CONFIG_I2C_DESIGNWARE_PLATFORM=y ++# CONFIG_I2C_DESIGNWARE_SLAVE is not set ++# CONFIG_I2C_EMEV2 is not set ++# CONFIG_I2C_GPIO is not set ++# CONFIG_I2C_OCORES is not set ++# CONFIG_I2C_PCA_PLATFORM is not set ++# CONFIG_I2C_RK3X is not set ++# CONFIG_I2C_SIMTEC is not set ++# CONFIG_I2C_XILINX is not set ++ ++# ++# External I2C/SMBus adapter drivers ++# ++# CONFIG_I2C_DIOLAN_U2C is not set ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_ROBOTFUZZ_OSIF is not set ++# CONFIG_I2C_TAOS_EVM is not set ++# CONFIG_I2C_TINY_USB is not set ++ ++# ++# Other I2C/SMBus bus drivers ++# ++# CONFIG_I2C_STUB is not set ++# CONFIG_I2C_SLAVE is not set ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++CONFIG_SPI=y ++# CONFIG_SPI_DEBUG is not set ++CONFIG_SPI_MASTER=y ++CONFIG_SPI_MEM=y ++ ++# ++# SPI Master Controller Drivers ++# ++# CONFIG_SPI_ALTERA is not set ++# CONFIG_SPI_AXI_SPI_ENGINE is not set ++# CONFIG_SPI_BITBANG is not set ++# CONFIG_SPI_CADENCE is not set ++CONFIG_SPI_DESIGNWARE=y ++CONFIG_SPI_AXERA=y ++CONFIG_SPI_DW_AXERA_DMA=y ++CONFIG_SPI_DW_MMIO=y ++CONFIG_SPI_AXERA_MMIO=y ++# CONFIG_SPI_GPIO is not set ++# CONFIG_SPI_FSL_SPI is not set ++# CONFIG_SPI_OC_TINY is not set ++# CONFIG_SPI_ROCKCHIP is not set ++# CONFIG_SPI_SC18IS602 is not set ++# CONFIG_SPI_XCOMM is not set ++# CONFIG_SPI_XILINX is not set ++# CONFIG_SPI_ZYNQMP_GQSPI is not set ++ ++# ++# SPI Protocol Masters ++# ++# CONFIG_SPI_SPIDEV is not set ++# CONFIG_SPI_LOOPBACK_TEST is not set ++# CONFIG_SPI_TLE62X0 is not set ++# CONFIG_SPI_SLAVE is not set ++# CONFIG_SPMI is not set ++# CONFIG_HSI is not set ++CONFIG_PPS=y ++# CONFIG_PPS_DEBUG is not set ++# CONFIG_NTP_PPS is not set ++ ++# ++# PPS clients support ++# ++# CONFIG_PPS_CLIENT_KTIMER is not set ++# CONFIG_PPS_CLIENT_LDISC is not set ++# CONFIG_PPS_CLIENT_GPIO is not set ++ ++# ++# PPS generators support ++# ++ ++# ++# PTP clock support ++# ++CONFIG_PTP_1588_CLOCK=y ++ ++# ++# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. ++# ++CONFIG_PINCTRL=y ++CONFIG_GENERIC_PINCTRL_GROUPS=y ++CONFIG_PINMUX=y ++CONFIG_GENERIC_PINMUX_FUNCTIONS=y ++CONFIG_PINCONF=y ++CONFIG_GENERIC_PINCONF=y ++# CONFIG_DEBUG_PINCTRL is not set ++# CONFIG_PINCTRL_AMD is not set ++# CONFIG_PINCTRL_MCP23S08 is not set ++CONFIG_PINCTRL_SINGLE=y ++# CONFIG_PINCTRL_SX150X is not set ++CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y ++CONFIG_GPIOLIB=y ++CONFIG_GPIOLIB_FASTPATH_LIMIT=512 ++CONFIG_OF_GPIO=y ++# CONFIG_DEBUG_GPIO is not set ++CONFIG_GPIO_SYSFS=y ++CONFIG_GPIO_GENERIC=y ++ ++# ++# Memory mapped GPIO drivers ++# ++# CONFIG_GPIO_74XX_MMIO is not set ++# CONFIG_GPIO_ALTERA is not set ++CONFIG_GPIO_DWAPB=y ++# CONFIG_GPIO_FTGPIO010 is not set ++CONFIG_GPIO_GENERIC_PLATFORM=y ++# CONFIG_GPIO_GRGPIO is not set ++# CONFIG_GPIO_HLWD is not set ++# CONFIG_GPIO_MB86S7X is not set ++# CONFIG_GPIO_MOCKUP is not set ++# CONFIG_GPIO_MPC8XXX is not set ++# CONFIG_GPIO_SYSCON is not set ++# CONFIG_GPIO_XILINX is not set ++# CONFIG_GPIO_ZEVIO is not set ++ ++# ++# I2C GPIO expanders ++# ++# CONFIG_GPIO_ADP5588 is not set ++# CONFIG_GPIO_ADNP is not set ++# CONFIG_GPIO_MAX7300 is not set ++# CONFIG_GPIO_MAX732X is not set ++# CONFIG_GPIO_PCA953X is not set ++# CONFIG_GPIO_PCF857X is not set ++# CONFIG_GPIO_TPIC2810 is not set ++ ++# ++# MFD GPIO expanders ++# ++# CONFIG_HTC_EGPIO is not set ++ ++# ++# SPI GPIO expanders ++# ++# CONFIG_GPIO_74X164 is not set ++# CONFIG_GPIO_MAX3191X is not set ++# CONFIG_GPIO_MAX7301 is not set ++# CONFIG_GPIO_MC33880 is not set ++# CONFIG_GPIO_PISOSR is not set ++# CONFIG_GPIO_XRA1403 is not set ++ ++# ++# USB GPIO expanders ++# ++# CONFIG_W1 is not set ++# CONFIG_POWER_AVS is not set ++# CONFIG_POWER_RESET is not set ++CONFIG_POWER_SUPPLY=y ++# CONFIG_POWER_SUPPLY_DEBUG is not set ++# CONFIG_PDA_POWER is not set ++# CONFIG_TEST_POWER is not set ++# CONFIG_CHARGER_ADP5061 is not set ++# CONFIG_BATTERY_DS2780 is not set ++# CONFIG_BATTERY_DS2781 is not set ++# CONFIG_BATTERY_DS2782 is not set ++# CONFIG_BATTERY_SBS is not set ++# CONFIG_CHARGER_SBS is not set ++# CONFIG_MANAGER_SBS is not set ++# CONFIG_BATTERY_BQ27XXX is not set ++# CONFIG_BATTERY_MAX17040 is not set ++# CONFIG_BATTERY_MAX17042 is not set ++# CONFIG_CHARGER_MAX8903 is not set ++# CONFIG_CHARGER_LP8727 is not set ++# CONFIG_CHARGER_GPIO is not set ++# CONFIG_CHARGER_LTC3651 is not set ++# CONFIG_CHARGER_DETECTOR_MAX14656 is not set ++# CONFIG_CHARGER_BQ2415X is not set ++# CONFIG_CHARGER_BQ24257 is not set ++# CONFIG_CHARGER_BQ24735 is not set ++# CONFIG_CHARGER_BQ25890 is not set ++# CONFIG_CHARGER_SMB347 is not set ++# CONFIG_BATTERY_GAUGE_LTC2941 is not set ++# CONFIG_CHARGER_RT9455 is not set ++# CONFIG_HWMON is not set ++CONFIG_THERMAL=y ++# CONFIG_THERMAL_STATISTICS is not set ++CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 ++CONFIG_THERMAL_OF=y ++# CONFIG_THERMAL_WRITABLE_TRIPS is not set ++CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y ++# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set ++# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set ++# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set ++# CONFIG_THERMAL_GOV_FAIR_SHARE is not set ++CONFIG_THERMAL_GOV_STEP_WISE=y ++# CONFIG_THERMAL_GOV_BANG_BANG is not set ++# CONFIG_THERMAL_GOV_USER_SPACE is not set ++CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y ++# CONFIG_THERMAL_EMULATION is not set ++# CONFIG_QORIQ_THERMAL is not set ++ ++# ++# ACPI INT340X thermal drivers ++# ++CONFIG_AX_THERMAL=y ++CONFIG_WATCHDOG=y ++CONFIG_WATCHDOG_CORE=y ++# CONFIG_WATCHDOG_NOWAYOUT is not set ++CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y ++# CONFIG_WATCHDOG_SYSFS is not set ++ ++# ++# Watchdog Device Drivers ++# ++# CONFIG_SOFT_WATCHDOG is not set ++# CONFIG_GPIO_WATCHDOG is not set ++# CONFIG_XILINX_WATCHDOG is not set ++# CONFIG_ZIIRAVE_WATCHDOG is not set ++# CONFIG_CADENCE_WATCHDOG is not set ++# CONFIG_FTWDT010_WATCHDOG is not set ++CONFIG_DW_WATCHDOG=y ++# CONFIG_MAX63XX_WATCHDOG is not set ++# CONFIG_MEN_A21_WDT is not set ++ ++# ++# USB-based Watchdog Cards ++# ++# CONFIG_USBPCWATCHDOG is not set ++ ++# ++# Watchdog Pretimeout Governors ++# ++# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set ++CONFIG_BCMA_POSSIBLE=y ++# CONFIG_BCMA is not set ++ ++# ++# Multifunction device drivers ++# ++# CONFIG_MFD_ACT8945A is not set ++# CONFIG_MFD_AS3711 is not set ++# CONFIG_MFD_AS3722 is not set ++# CONFIG_PMIC_ADP5520 is not set ++# CONFIG_MFD_AAT2870_CORE is not set ++# CONFIG_MFD_ATMEL_FLEXCOM is not set ++# CONFIG_MFD_ATMEL_HLCDC is not set ++# CONFIG_MFD_BCM590XX is not set ++# CONFIG_MFD_BD9571MWV is not set ++# CONFIG_MFD_AXP20X_I2C is not set ++# CONFIG_MFD_CROS_EC is not set ++# CONFIG_MFD_MADERA is not set ++# CONFIG_MFD_ASIC3 is not set ++# CONFIG_PMIC_DA903X is not set ++# CONFIG_MFD_DA9052_SPI is not set ++# CONFIG_MFD_DA9052_I2C is not set ++# CONFIG_MFD_DA9055 is not set ++# CONFIG_MFD_DA9062 is not set ++# CONFIG_MFD_DA9063 is not set ++# CONFIG_MFD_DA9150 is not set ++# CONFIG_MFD_DLN2 is not set ++# CONFIG_MFD_MC13XXX_SPI is not set ++# CONFIG_MFD_MC13XXX_I2C is not set ++# CONFIG_MFD_HI6421_PMIC is not set ++# CONFIG_HTC_PASIC3 is not set ++# CONFIG_HTC_I2CPLD is not set ++# CONFIG_MFD_KEMPLD is not set ++# CONFIG_MFD_88PM800 is not set ++# CONFIG_MFD_88PM805 is not set ++# CONFIG_MFD_88PM860X is not set ++# CONFIG_MFD_MAX14577 is not set ++# CONFIG_MFD_MAX77620 is not set ++# CONFIG_MFD_MAX77686 is not set ++# CONFIG_MFD_MAX77693 is not set ++# CONFIG_MFD_MAX77843 is not set ++# CONFIG_MFD_MAX8907 is not set ++# CONFIG_MFD_MAX8925 is not set ++# CONFIG_MFD_MAX8997 is not set ++# CONFIG_MFD_MAX8998 is not set ++# CONFIG_MFD_MT6397 is not set ++# CONFIG_MFD_MENF21BMC is not set ++# CONFIG_EZX_PCAP is not set ++# CONFIG_MFD_CPCAP is not set ++# CONFIG_MFD_VIPERBOARD is not set ++# CONFIG_MFD_RETU is not set ++# CONFIG_MFD_PCF50633 is not set ++# CONFIG_MFD_PM8XXX is not set ++# CONFIG_MFD_RT5033 is not set ++# CONFIG_MFD_RC5T583 is not set ++# CONFIG_MFD_RK808 is not set ++# CONFIG_MFD_RN5T618 is not set ++# CONFIG_MFD_SEC_CORE is not set ++# CONFIG_MFD_SI476X_CORE is not set ++# CONFIG_MFD_SM501 is not set ++# CONFIG_MFD_SKY81452 is not set ++# CONFIG_MFD_SMSC is not set ++# CONFIG_ABX500_CORE is not set ++# CONFIG_MFD_STMPE is not set ++CONFIG_MFD_SYSCON=y ++# CONFIG_MFD_TI_AM335X_TSCADC is not set ++# CONFIG_MFD_LP3943 is not set ++# CONFIG_MFD_LP8788 is not set ++# CONFIG_MFD_TI_LMU is not set ++# CONFIG_MFD_PALMAS is not set ++# CONFIG_TPS6105X is not set ++# CONFIG_TPS65010 is not set ++# CONFIG_TPS6507X is not set ++# CONFIG_MFD_TPS65086 is not set ++# CONFIG_MFD_TPS65090 is not set ++# CONFIG_MFD_TPS65217 is not set ++# CONFIG_MFD_TI_LP873X is not set ++# CONFIG_MFD_TI_LP87565 is not set ++# CONFIG_MFD_TPS65218 is not set ++# CONFIG_MFD_TPS6586X is not set ++# CONFIG_MFD_TPS65910 is not set ++# CONFIG_MFD_TPS65912_I2C is not set ++# CONFIG_MFD_TPS65912_SPI is not set ++# CONFIG_MFD_TPS80031 is not set ++# CONFIG_TWL4030_CORE is not set ++# CONFIG_TWL6040_CORE is not set ++# CONFIG_MFD_WL1273_CORE is not set ++# CONFIG_MFD_LM3533 is not set ++# CONFIG_MFD_TC3589X is not set ++# CONFIG_MFD_T7L66XB is not set ++# CONFIG_MFD_TC6387XB is not set ++# CONFIG_MFD_TC6393XB is not set ++# CONFIG_MFD_ARIZONA_I2C is not set ++# CONFIG_MFD_ARIZONA_SPI is not set ++# CONFIG_MFD_WM8400 is not set ++# CONFIG_MFD_WM831X_I2C is not set ++# CONFIG_MFD_WM831X_SPI is not set ++# CONFIG_MFD_WM8350_I2C is not set ++# CONFIG_MFD_WM8994 is not set ++# CONFIG_MFD_ROHM_BD718XX is not set ++# CONFIG_REGULATOR is not set ++# CONFIG_RC_CORE is not set ++# CONFIG_MEDIA_SUPPORT is not set ++ ++# ++# Graphics support ++# ++# CONFIG_IMX_IPUV3_CORE is not set ++CONFIG_DRM=y ++CONFIG_DRM_MIPI_DSI=y ++# CONFIG_DRM_DP_AUX_CHARDEV is not set ++# CONFIG_DRM_DEBUG_MM is not set ++# CONFIG_DRM_DEBUG_SELFTEST is not set ++CONFIG_DRM_KMS_HELPER=y ++CONFIG_DRM_KMS_FB_HELPER=y ++CONFIG_DRM_FBDEV_EMULATION=y ++CONFIG_DRM_FBDEV_OVERALLOC=100 ++# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set ++# CONFIG_DRM_DP_CEC is not set ++CONFIG_DRM_GEM_CMA_HELPER=y ++CONFIG_DRM_KMS_CMA_HELPER=y ++ ++# ++# I2C encoder or helper chips ++# ++# CONFIG_DRM_I2C_CH7006 is not set ++# CONFIG_DRM_I2C_SIL164 is not set ++# CONFIG_DRM_I2C_NXP_TDA998X is not set ++# CONFIG_DRM_I2C_NXP_TDA9950 is not set ++# CONFIG_DRM_HDLCD is not set ++# CONFIG_DRM_MALI_DISPLAY is not set ++ ++# ++# ACP (Audio CoProcessor) Configuration ++# ++ ++# ++# AMD Library routines ++# ++# CONFIG_DRM_VGEM is not set ++# CONFIG_DRM_VKMS is not set ++# CONFIG_DRM_EXYNOS is not set ++# CONFIG_DRM_UDL is not set ++# CONFIG_DRM_ARMADA is not set ++# CONFIG_DRM_RCAR_DW_HDMI is not set ++# CONFIG_DRM_RCAR_LVDS is not set ++# CONFIG_DRM_OMAP is not set ++# CONFIG_DRM_TILCDC is not set ++# CONFIG_DRM_FSL_DCU is not set ++# CONFIG_DRM_STM is not set ++CONFIG_DRM_PANEL=y ++ ++# ++# Display Panels ++# ++# CONFIG_DRM_PANEL_ARM_VERSATILE is not set ++# CONFIG_DRM_PANEL_LVDS is not set ++CONFIG_DRM_PANEL_SIMPLE=y ++# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set ++# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set ++# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set ++# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set ++# CONFIG_DRM_PANEL_LG_LG4573 is not set ++# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set ++# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set ++# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set ++# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set ++# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set ++# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set ++# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set ++# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set ++CONFIG_DRM_BRIDGE=y ++CONFIG_DRM_PANEL_BRIDGE=y ++ ++# ++# Display Interface Bridges ++# ++# CONFIG_DRM_ANALOGIX_ANX78XX is not set ++CONFIG_DRM_CDNS_DSI=y ++# CONFIG_DRM_DUMB_VGA_DAC is not set ++# CONFIG_DRM_LVDS_ENCODER is not set ++# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set ++# CONFIG_DRM_NXP_PTN3460 is not set ++# CONFIG_DRM_PARADE_PS8622 is not set ++# CONFIG_DRM_SIL_SII8620 is not set ++# CONFIG_DRM_SII902X is not set ++# CONFIG_DRM_SII9234 is not set ++# CONFIG_DRM_THINE_THC63LVD1024 is not set ++# CONFIG_DRM_TOSHIBA_TC358767 is not set ++# CONFIG_DRM_TI_TFP410 is not set ++# CONFIG_DRM_I2C_ADV7511 is not set ++# CONFIG_DRM_STI is not set ++# CONFIG_DRM_ARCPGU is not set ++# CONFIG_DRM_MXSFB is not set ++CONFIG_DRM_TINYDRM=y ++# CONFIG_TINYDRM_ILI9225 is not set ++# CONFIG_TINYDRM_ILI9341 is not set ++# CONFIG_TINYDRM_MI0283QT is not set ++# CONFIG_TINYDRM_REPAPER is not set ++# CONFIG_TINYDRM_ST7586 is not set ++# CONFIG_TINYDRM_ST7735R is not set ++# CONFIG_DRM_PL111 is not set ++# CONFIG_DRM_TVE200 is not set ++CONFIG_DRM_AXERA=y ++# CONFIG_DRM_LEGACY is not set ++CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y ++ ++# ++# Frame buffer Devices ++# ++CONFIG_FB_CMDLINE=y ++CONFIG_FB_NOTIFY=y ++CONFIG_FB=y ++# CONFIG_FIRMWARE_EDID is not set ++CONFIG_FB_CFB_FILLRECT=y ++CONFIG_FB_CFB_COPYAREA=y ++CONFIG_FB_CFB_IMAGEBLIT=y ++CONFIG_FB_SYS_FILLRECT=y ++CONFIG_FB_SYS_COPYAREA=y ++CONFIG_FB_SYS_IMAGEBLIT=y ++# CONFIG_FB_FOREIGN_ENDIAN is not set ++CONFIG_FB_SYS_FOPS=y ++CONFIG_FB_DEFERRED_IO=y ++CONFIG_FB_MODE_HELPERS=y ++# CONFIG_FB_TILEBLITTING is not set ++ ++# ++# Frame buffer hardware drivers ++# ++# CONFIG_FB_OPENCORES is not set ++# CONFIG_FB_S1D13XXX is not set ++# CONFIG_FB_SMSCUFX is not set ++# CONFIG_FB_UDL is not set ++# CONFIG_FB_IBM_GXT4500 is not set ++# CONFIG_FB_VIRTUAL is not set ++# CONFIG_FB_METRONOME is not set ++# CONFIG_FB_BROADSHEET is not set ++# CONFIG_FB_SIMPLE is not set ++# CONFIG_FB_SSD1307 is not set ++CONFIG_BACKLIGHT_LCD_SUPPORT=y ++CONFIG_LCD_CLASS_DEVICE=m ++# CONFIG_LCD_L4F00242T03 is not set ++# CONFIG_LCD_LMS283GF05 is not set ++# CONFIG_LCD_LTV350QV is not set ++# CONFIG_LCD_ILI922X is not set ++# CONFIG_LCD_ILI9320 is not set ++# CONFIG_LCD_TDO24M is not set ++# CONFIG_LCD_VGG2432A4 is not set ++# CONFIG_LCD_PLATFORM is not set ++# CONFIG_LCD_S6E63M0 is not set ++# CONFIG_LCD_LD9040 is not set ++# CONFIG_LCD_AMS369FG06 is not set ++# CONFIG_LCD_LMS501KF03 is not set ++# CONFIG_LCD_HX8357 is not set ++# CONFIG_LCD_OTM3225A is not set ++CONFIG_BACKLIGHT_CLASS_DEVICE=y ++CONFIG_BACKLIGHT_GENERIC=y ++# CONFIG_BACKLIGHT_PWM is not set ++# CONFIG_BACKLIGHT_PM8941_WLED is not set ++# CONFIG_BACKLIGHT_ADP8860 is not set ++# CONFIG_BACKLIGHT_ADP8870 is not set ++# CONFIG_BACKLIGHT_LM3630A is not set ++# CONFIG_BACKLIGHT_LM3639 is not set ++# CONFIG_BACKLIGHT_LP855X is not set ++# CONFIG_BACKLIGHT_GPIO is not set ++# CONFIG_BACKLIGHT_LV5207LP is not set ++# CONFIG_BACKLIGHT_BD6107 is not set ++# CONFIG_BACKLIGHT_ARCXCNN is not set ++CONFIG_VIDEOMODE_HELPERS=y ++CONFIG_HDMI=y ++ ++# ++# Console display driver support ++# ++CONFIG_DUMMY_CONSOLE=y ++CONFIG_FRAMEBUFFER_CONSOLE=y ++CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y ++# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set ++# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set ++CONFIG_LOGO=y ++# CONFIG_LOGO_LINUX_MONO is not set ++# CONFIG_LOGO_LINUX_VGA16 is not set ++CONFIG_LOGO_LINUX_CLUT224=y ++CONFIG_SOUND=y ++CONFIG_SND=y ++CONFIG_SND_TIMER=y ++CONFIG_SND_PCM=y ++CONFIG_SND_JACK=y ++CONFIG_SND_JACK_INPUT_DEV=y ++# CONFIG_SND_OSSEMUL is not set ++CONFIG_SND_PCM_TIMER=y ++# CONFIG_SND_HRTIMER is not set ++# CONFIG_SND_DYNAMIC_MINORS is not set ++CONFIG_SND_SUPPORT_OLD_API=y ++CONFIG_SND_PROC_FS=y ++CONFIG_SND_VERBOSE_PROCFS=y ++# CONFIG_SND_VERBOSE_PRINTK is not set ++# CONFIG_SND_DEBUG is not set ++# CONFIG_SND_SEQUENCER is not set ++CONFIG_SND_DRIVERS=y ++# CONFIG_SND_DUMMY is not set ++# CONFIG_SND_ALOOP is not set ++# CONFIG_SND_MTPAV is not set ++# CONFIG_SND_SERIAL_U16550 is not set ++# CONFIG_SND_MPU401 is not set ++ ++# ++# HD-Audio ++# ++CONFIG_SND_HDA_PREALLOC_SIZE=64 ++CONFIG_SND_ARM=y ++CONFIG_SND_SPI=y ++CONFIG_SND_USB=y ++# CONFIG_SND_USB_AUDIO is not set ++# CONFIG_SND_USB_UA101 is not set ++# CONFIG_SND_USB_CAIAQ is not set ++# CONFIG_SND_USB_6FIRE is not set ++# CONFIG_SND_USB_HIFACE is not set ++# CONFIG_SND_BCD2000 is not set ++# CONFIG_SND_USB_POD is not set ++# CONFIG_SND_USB_PODHD is not set ++# CONFIG_SND_USB_TONEPORT is not set ++# CONFIG_SND_USB_VARIAX is not set ++CONFIG_SND_SOC=y ++# CONFIG_SND_SOC_AMD_ACP is not set ++# CONFIG_SND_ATMEL_SOC is not set ++# CONFIG_SND_DESIGNWARE_I2S is not set ++ ++# ++# SoC Audio for Freescale CPUs ++# ++ ++# ++# Common SoC Audio options for Freescale CPUs: ++# ++# CONFIG_SND_SOC_FSL_ASRC is not set ++# CONFIG_SND_SOC_FSL_SAI is not set ++# CONFIG_SND_SOC_FSL_SSI is not set ++# CONFIG_SND_SOC_FSL_SPDIF is not set ++# CONFIG_SND_SOC_FSL_ESAI is not set ++# CONFIG_SND_SOC_IMX_AUDMUX is not set ++# CONFIG_SND_I2S_HI6210_I2S is not set ++# CONFIG_SND_SOC_IMG is not set ++ ++# ++# STMicroelectronics STM32 SOC audio support ++# ++# CONFIG_SND_SOC_XTFPGA_I2S is not set ++# CONFIG_ZX_TDM is not set ++CONFIG_SND_SOC_I2C_AND_SPI=y ++ ++# ++# CODEC drivers ++# ++# CONFIG_SND_SOC_AC97_CODEC is not set ++# CONFIG_SND_SOC_ADAU1701 is not set ++# CONFIG_SND_SOC_ADAU1761_I2C is not set ++# CONFIG_SND_SOC_ADAU1761_SPI is not set ++# CONFIG_SND_SOC_ADAU7002 is not set ++# CONFIG_SND_SOC_AK4104 is not set ++# CONFIG_SND_SOC_AK4458 is not set ++# CONFIG_SND_SOC_AK4554 is not set ++# CONFIG_SND_SOC_AK4613 is not set ++# CONFIG_SND_SOC_AK4642 is not set ++# CONFIG_SND_SOC_AK5386 is not set ++# CONFIG_SND_SOC_AK5558 is not set ++# CONFIG_SND_SOC_ALC5623 is not set ++# CONFIG_SND_SOC_BD28623 is not set ++# CONFIG_SND_SOC_BT_SCO is not set ++# CONFIG_SND_SOC_CS35L32 is not set ++# CONFIG_SND_SOC_CS35L33 is not set ++# CONFIG_SND_SOC_CS35L34 is not set ++# CONFIG_SND_SOC_CS35L35 is not set ++# CONFIG_SND_SOC_CS42L42 is not set ++# CONFIG_SND_SOC_CS42L51_I2C is not set ++# CONFIG_SND_SOC_CS42L52 is not set ++# CONFIG_SND_SOC_CS42L56 is not set ++# CONFIG_SND_SOC_CS42L73 is not set ++# CONFIG_SND_SOC_CS4265 is not set ++# CONFIG_SND_SOC_CS4270 is not set ++# CONFIG_SND_SOC_CS4271_I2C is not set ++# CONFIG_SND_SOC_CS4271_SPI is not set ++# CONFIG_SND_SOC_CS42XX8_I2C is not set ++# CONFIG_SND_SOC_CS43130 is not set ++# CONFIG_SND_SOC_CS4349 is not set ++# CONFIG_SND_SOC_CS53L30 is not set ++# CONFIG_SND_SOC_HDMI_CODEC is not set ++# CONFIG_SND_SOC_ES7134 is not set ++# CONFIG_SND_SOC_ES7241 is not set ++# CONFIG_SND_SOC_ES8316 is not set ++# CONFIG_SND_SOC_ES8328_I2C is not set ++# CONFIG_SND_SOC_ES8328_SPI is not set ++# CONFIG_SND_SOC_GTM601 is not set ++# CONFIG_SND_SOC_INNO_RK3036 is not set ++# CONFIG_SND_SOC_MAX98504 is not set ++# CONFIG_SND_SOC_MAX9867 is not set ++# CONFIG_SND_SOC_MAX98927 is not set ++# CONFIG_SND_SOC_MAX98373 is not set ++# CONFIG_SND_SOC_MAX9860 is not set ++# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set ++# CONFIG_SND_SOC_PCM1681 is not set ++# CONFIG_SND_SOC_PCM1789_I2C is not set ++# CONFIG_SND_SOC_PCM179X_I2C is not set ++# CONFIG_SND_SOC_PCM179X_SPI is not set ++# CONFIG_SND_SOC_PCM186X_I2C is not set ++# CONFIG_SND_SOC_PCM186X_SPI is not set ++# CONFIG_SND_SOC_PCM3168A_I2C is not set ++# CONFIG_SND_SOC_PCM3168A_SPI is not set ++# CONFIG_SND_SOC_PCM512x_I2C is not set ++# CONFIG_SND_SOC_PCM512x_SPI is not set ++# CONFIG_SND_SOC_RT5616 is not set ++# CONFIG_SND_SOC_RT5631 is not set ++# CONFIG_SND_SOC_SGTL5000 is not set ++# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set ++# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set ++# CONFIG_SND_SOC_SPDIF is not set ++# CONFIG_SND_SOC_SSM2305 is not set ++# CONFIG_SND_SOC_SSM2602_SPI is not set ++# CONFIG_SND_SOC_SSM2602_I2C is not set ++# CONFIG_SND_SOC_SSM4567 is not set ++# CONFIG_SND_SOC_STA32X is not set ++# CONFIG_SND_SOC_STA350 is not set ++# CONFIG_SND_SOC_STI_SAS is not set ++# CONFIG_SND_SOC_TAS2552 is not set ++# CONFIG_SND_SOC_TAS5086 is not set ++# CONFIG_SND_SOC_TAS571X is not set ++# CONFIG_SND_SOC_TAS5720 is not set ++# CONFIG_SND_SOC_TAS6424 is not set ++# CONFIG_SND_SOC_TDA7419 is not set ++# CONFIG_SND_SOC_TFA9879 is not set ++# CONFIG_SND_SOC_TLV320AIC23_I2C is not set ++# CONFIG_SND_SOC_TLV320AIC23_SPI is not set ++# CONFIG_SND_SOC_TLV320AIC31XX is not set ++# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set ++# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set ++# CONFIG_SND_SOC_TLV320AIC3X is not set ++# CONFIG_SND_SOC_TS3A227E is not set ++# CONFIG_SND_SOC_TSCS42XX is not set ++# CONFIG_SND_SOC_TSCS454 is not set ++# CONFIG_SND_SOC_WM8510 is not set ++# CONFIG_SND_SOC_WM8523 is not set ++# CONFIG_SND_SOC_WM8524 is not set ++# CONFIG_SND_SOC_WM8580 is not set ++# CONFIG_SND_SOC_WM8711 is not set ++# CONFIG_SND_SOC_WM8728 is not set ++# CONFIG_SND_SOC_WM8731 is not set ++# CONFIG_SND_SOC_WM8737 is not set ++# CONFIG_SND_SOC_WM8741 is not set ++# CONFIG_SND_SOC_WM8750 is not set ++# CONFIG_SND_SOC_WM8753 is not set ++# CONFIG_SND_SOC_WM8770 is not set ++# CONFIG_SND_SOC_WM8776 is not set ++# CONFIG_SND_SOC_WM8782 is not set ++# CONFIG_SND_SOC_WM8804_I2C is not set ++# CONFIG_SND_SOC_WM8804_SPI is not set ++# CONFIG_SND_SOC_WM8903 is not set ++# CONFIG_SND_SOC_WM8960 is not set ++# CONFIG_SND_SOC_WM8962 is not set ++# CONFIG_SND_SOC_WM8974 is not set ++# CONFIG_SND_SOC_WM8978 is not set ++# CONFIG_SND_SOC_WM8985 is not set ++# CONFIG_SND_SOC_ZX_AUD96P22 is not set ++# CONFIG_SND_SOC_MAX9759 is not set ++# CONFIG_SND_SOC_MT6351 is not set ++# CONFIG_SND_SOC_NAU8540 is not set ++# CONFIG_SND_SOC_NAU8810 is not set ++# CONFIG_SND_SOC_NAU8824 is not set ++# CONFIG_SND_SOC_TPA6130A2 is not set ++# CONFIG_SND_SIMPLE_CARD is not set ++# CONFIG_SND_SIMPLE_SCU_CARD is not set ++# CONFIG_SND_AUDIO_GRAPH_CARD is not set ++# CONFIG_SND_AUDIO_GRAPH_SCU_CARD is not set ++ ++# ++# HID support ++# ++CONFIG_HID=y ++# CONFIG_HID_BATTERY_STRENGTH is not set ++# CONFIG_HIDRAW is not set ++# CONFIG_UHID is not set ++CONFIG_HID_GENERIC=y ++ ++# ++# Special HID drivers ++# ++CONFIG_HID_A4TECH=y ++# CONFIG_HID_ACCUTOUCH is not set ++# CONFIG_HID_ACRUX is not set ++CONFIG_HID_APPLE=y ++# CONFIG_HID_APPLEIR is not set ++# CONFIG_HID_AUREAL is not set ++CONFIG_HID_BELKIN=y ++# CONFIG_HID_BETOP_FF is not set ++CONFIG_HID_CHERRY=y ++CONFIG_HID_CHICONY=y ++# CONFIG_HID_COUGAR is not set ++# CONFIG_HID_PRODIKEYS is not set ++# CONFIG_HID_CMEDIA is not set ++CONFIG_HID_CYPRESS=y ++CONFIG_HID_DRAGONRISE=y ++# CONFIG_DRAGONRISE_FF is not set ++# CONFIG_HID_EMS_FF is not set ++# CONFIG_HID_ELECOM is not set ++# CONFIG_HID_ELO is not set ++CONFIG_HID_EZKEY=y ++# CONFIG_HID_GEMBIRD is not set ++# CONFIG_HID_GFRM is not set ++# CONFIG_HID_HOLTEK is not set ++# CONFIG_HID_KEYTOUCH is not set ++# CONFIG_HID_KYE is not set ++# CONFIG_HID_UCLOGIC is not set ++# CONFIG_HID_WALTOP is not set ++CONFIG_HID_GYRATION=y ++# CONFIG_HID_ICADE is not set ++CONFIG_HID_ITE=y ++# CONFIG_HID_JABRA is not set ++CONFIG_HID_TWINHAN=y ++CONFIG_HID_KENSINGTON=y ++# CONFIG_HID_LCPOWER is not set ++# CONFIG_HID_LENOVO is not set ++CONFIG_HID_LOGITECH=y ++# CONFIG_HID_LOGITECH_HIDPP is not set ++# CONFIG_LOGITECH_FF is not set ++# CONFIG_LOGIRUMBLEPAD2_FF is not set ++# CONFIG_LOGIG940_FF is not set ++# CONFIG_LOGIWHEELS_FF is not set ++# CONFIG_HID_MAGICMOUSE is not set ++# CONFIG_HID_MAYFLASH is not set ++CONFIG_HID_REDRAGON=y ++CONFIG_HID_MICROSOFT=y ++CONFIG_HID_MONTEREY=y ++# CONFIG_HID_MULTITOUCH is not set ++# CONFIG_HID_NTI is not set ++# CONFIG_HID_NTRIG is not set ++# CONFIG_HID_ORTEK is not set ++CONFIG_HID_PANTHERLORD=y ++# CONFIG_PANTHERLORD_FF is not set ++# CONFIG_HID_PENMOUNT is not set ++CONFIG_HID_PETALYNX=y ++# CONFIG_HID_PICOLCD is not set ++# CONFIG_HID_PLANTRONICS is not set ++# CONFIG_HID_PRIMAX is not set ++# CONFIG_HID_RETRODE is not set ++# CONFIG_HID_ROCCAT is not set ++# CONFIG_HID_SAITEK is not set ++CONFIG_HID_SAMSUNG=y ++# CONFIG_HID_SPEEDLINK is not set ++# CONFIG_HID_STEAM is not set ++# CONFIG_HID_STEELSERIES is not set ++CONFIG_HID_SUNPLUS=y ++# CONFIG_HID_RMI is not set ++CONFIG_HID_GREENASIA=y ++# CONFIG_GREENASIA_FF is not set ++CONFIG_HID_SMARTJOYPLUS=y ++# CONFIG_SMARTJOYPLUS_FF is not set ++# CONFIG_HID_TIVO is not set ++CONFIG_HID_TOPSEED=y ++CONFIG_HID_THRUSTMASTER=y ++# CONFIG_THRUSTMASTER_FF is not set ++# CONFIG_HID_UDRAW_PS3 is not set ++# CONFIG_HID_WACOM is not set ++# CONFIG_HID_XINMO is not set ++CONFIG_HID_ZEROPLUS=y ++# CONFIG_ZEROPLUS_FF is not set ++# CONFIG_HID_ZYDACRON is not set ++# CONFIG_HID_SENSOR_HUB is not set ++# CONFIG_HID_ALPS is not set ++ ++# ++# USB HID support ++# ++CONFIG_USB_HID=y ++# CONFIG_HID_PID is not set ++# CONFIG_USB_HIDDEV is not set ++ ++# ++# I2C HID support ++# ++# CONFIG_I2C_HID is not set ++CONFIG_USB_OHCI_LITTLE_ENDIAN=y ++CONFIG_USB_SUPPORT=y ++CONFIG_USB_COMMON=y ++CONFIG_USB_ARCH_HAS_HCD=y ++CONFIG_USB=y ++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y ++ ++# ++# Miscellaneous USB options ++# ++CONFIG_USB_DEFAULT_PERSIST=y ++# CONFIG_USB_DYNAMIC_MINORS is not set ++# CONFIG_USB_OTG is not set ++# CONFIG_USB_OTG_WHITELIST is not set ++# CONFIG_USB_MON is not set ++# CONFIG_USB_WUSB_CBAF is not set ++ ++# ++# USB Host Controller Drivers ++# ++# CONFIG_USB_C67X00_HCD is not set ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DBGCAP=y ++CONFIG_USB_XHCI_PLATFORM=y ++# CONFIG_USB_EHCI_HCD is not set ++# CONFIG_USB_OXU210HP_HCD is not set ++# CONFIG_USB_ISP116X_HCD is not set ++# CONFIG_USB_FOTG210_HCD is not set ++# CONFIG_USB_MAX3421_HCD is not set ++# CONFIG_USB_OHCI_HCD is not set ++# CONFIG_USB_SL811_HCD is not set ++# CONFIG_USB_R8A66597_HCD is not set ++# CONFIG_USB_HCD_TEST_MODE is not set ++ ++# ++# USB Device Class drivers ++# ++CONFIG_USB_ACM=y ++# CONFIG_USB_PRINTER is not set ++# CONFIG_USB_WDM is not set ++# CONFIG_USB_TMC is not set ++ ++# ++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may ++# ++ ++# ++# also be needed; see USB_STORAGE Help for more info ++# ++CONFIG_USB_STORAGE=y ++# CONFIG_USB_STORAGE_DEBUG is not set ++# CONFIG_USB_STORAGE_REALTEK is not set ++# CONFIG_USB_STORAGE_DATAFAB is not set ++# CONFIG_USB_STORAGE_FREECOM is not set ++# CONFIG_USB_STORAGE_ISD200 is not set ++# CONFIG_USB_STORAGE_USBAT is not set ++# CONFIG_USB_STORAGE_SDDR09 is not set ++# CONFIG_USB_STORAGE_SDDR55 is not set ++# CONFIG_USB_STORAGE_JUMPSHOT is not set ++# CONFIG_USB_STORAGE_ALAUDA is not set ++# CONFIG_USB_STORAGE_ONETOUCH is not set ++# CONFIG_USB_STORAGE_KARMA is not set ++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set ++# CONFIG_USB_STORAGE_ENE_UB6250 is not set ++CONFIG_USB_UAS=y ++ ++# ++# USB Imaging devices ++# ++# CONFIG_USB_MDC800 is not set ++# CONFIG_USB_MICROTEK is not set ++# CONFIG_USBIP_CORE is not set ++# CONFIG_USB_MUSB_HDRC is not set ++# CONFIG_USB_DWC3 is not set ++# CONFIG_USB_DWC2 is not set ++CONFIG_USB_CDNS3=y ++CONFIG_USB_CDNS3_GADGET=y ++CONFIG_USB_CDNS3_HOST=y ++CONFIG_USB_CDNS3_AXERA=y ++# CONFIG_USB_CHIPIDEA is not set ++# CONFIG_USB_ISP1760 is not set ++ ++# ++# USB port drivers ++# ++CONFIG_USB_SERIAL=y ++# CONFIG_USB_SERIAL_CONSOLE is not set ++CONFIG_USB_SERIAL_GENERIC=y ++# CONFIG_USB_SERIAL_SIMPLE is not set ++# CONFIG_USB_SERIAL_AIRCABLE is not set ++# CONFIG_USB_SERIAL_ARK3116 is not set ++# CONFIG_USB_SERIAL_BELKIN is not set ++CONFIG_USB_SERIAL_CH341=y ++# CONFIG_USB_SERIAL_WHITEHEAT is not set ++# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set ++# CONFIG_USB_SERIAL_CP210X is not set ++# CONFIG_USB_SERIAL_CYPRESS_M8 is not set ++# CONFIG_USB_SERIAL_EMPEG is not set ++# CONFIG_USB_SERIAL_FTDI_SIO is not set ++# CONFIG_USB_SERIAL_VISOR is not set ++# CONFIG_USB_SERIAL_IPAQ is not set ++# CONFIG_USB_SERIAL_IR is not set ++# CONFIG_USB_SERIAL_EDGEPORT is not set ++# CONFIG_USB_SERIAL_EDGEPORT_TI is not set ++# CONFIG_USB_SERIAL_F81232 is not set ++# CONFIG_USB_SERIAL_F8153X is not set ++# CONFIG_USB_SERIAL_GARMIN is not set ++# CONFIG_USB_SERIAL_IPW is not set ++# CONFIG_USB_SERIAL_IUU is not set ++# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set ++# CONFIG_USB_SERIAL_KEYSPAN is not set ++# CONFIG_USB_SERIAL_KLSI is not set ++# CONFIG_USB_SERIAL_KOBIL_SCT is not set ++# CONFIG_USB_SERIAL_MCT_U232 is not set ++# CONFIG_USB_SERIAL_METRO is not set ++# CONFIG_USB_SERIAL_MOS7720 is not set ++# CONFIG_USB_SERIAL_MOS7840 is not set ++# CONFIG_USB_SERIAL_MXUPORT is not set ++# CONFIG_USB_SERIAL_NAVMAN is not set ++CONFIG_USB_SERIAL_PL2303=y ++# CONFIG_USB_SERIAL_OTI6858 is not set ++# CONFIG_USB_SERIAL_QCAUX is not set ++# CONFIG_USB_SERIAL_QUALCOMM is not set ++# CONFIG_USB_SERIAL_SPCP8X5 is not set ++# CONFIG_USB_SERIAL_SAFE is not set ++# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set ++# CONFIG_USB_SERIAL_SYMBOL is not set ++# CONFIG_USB_SERIAL_TI is not set ++# CONFIG_USB_SERIAL_CYBERJACK is not set ++# CONFIG_USB_SERIAL_XIRCOM is not set ++# CONFIG_USB_SERIAL_OPTION is not set ++# CONFIG_USB_SERIAL_OMNINET is not set ++# CONFIG_USB_SERIAL_OPTICON is not set ++# CONFIG_USB_SERIAL_XSENS_MT is not set ++# CONFIG_USB_SERIAL_WISHBONE is not set ++# CONFIG_USB_SERIAL_SSU100 is not set ++# CONFIG_USB_SERIAL_QT2 is not set ++# CONFIG_USB_SERIAL_UPD78F0730 is not set ++# CONFIG_USB_SERIAL_DEBUG is not set ++ ++# ++# USB Miscellaneous drivers ++# ++# CONFIG_USB_EMI62 is not set ++# CONFIG_USB_EMI26 is not set ++# CONFIG_USB_ADUTUX is not set ++# CONFIG_USB_SEVSEG is not set ++# CONFIG_USB_LEGOTOWER is not set ++# CONFIG_USB_LCD is not set ++# CONFIG_USB_CYPRESS_CY7C63 is not set ++# CONFIG_USB_CYTHERM is not set ++# CONFIG_USB_IDMOUSE is not set ++# CONFIG_USB_FTDI_ELAN is not set ++# CONFIG_USB_APPLEDISPLAY is not set ++# CONFIG_USB_LD is not set ++# CONFIG_USB_TRANCEVIBRATOR is not set ++# CONFIG_USB_IOWARRIOR is not set ++CONFIG_USB_TEST=y ++# CONFIG_USB_EHSET_TEST_FIXTURE is not set ++# CONFIG_USB_ISIGHTFW is not set ++# CONFIG_USB_YUREX is not set ++# CONFIG_USB_EZUSB_FX2 is not set ++# CONFIG_USB_HUB_USB251XB is not set ++# CONFIG_USB_HSIC_USB3503 is not set ++# CONFIG_USB_HSIC_USB4604 is not set ++# CONFIG_USB_LINK_LAYER_TEST is not set ++ ++# ++# USB Physical Layer drivers ++# ++# CONFIG_NOP_USB_XCEIV is not set ++# CONFIG_USB_GPIO_VBUS is not set ++# CONFIG_USB_ISP1301 is not set ++# CONFIG_USB_ULPI is not set ++CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG is not set ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++# CONFIG_USB_GADGET_DEBUG_FS is not set ++CONFIG_USB_GADGET_VBUS_DRAW=2 ++CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 ++# CONFIG_U_SERIAL_CONSOLE is not set ++ ++# ++# USB Peripheral Controller ++# ++# CONFIG_USB_FUSB300 is not set ++# CONFIG_USB_FOTG210_UDC is not set ++# CONFIG_USB_GR_UDC is not set ++# CONFIG_USB_R8A66597 is not set ++# CONFIG_USB_PXA27X is not set ++# CONFIG_USB_MV_UDC is not set ++# CONFIG_USB_MV_U3D is not set ++# CONFIG_USB_SNP_UDC_PLAT is not set ++# CONFIG_USB_M66592 is not set ++# CONFIG_USB_BDC_UDC is not set ++# CONFIG_USB_NET2272 is not set ++# CONFIG_USB_GADGET_XILINX is not set ++# CONFIG_USB_DUMMY_HCD is not set ++CONFIG_USB_LIBCOMPOSITE=y ++CONFIG_USB_F_ACM=y ++CONFIG_USB_F_SS_LB=y ++CONFIG_USB_U_SERIAL=y ++CONFIG_USB_U_ETHER=y ++CONFIG_USB_F_SERIAL=y ++CONFIG_USB_F_RNDIS=y ++CONFIG_USB_F_MASS_STORAGE=y ++CONFIG_USB_CONFIGFS=y ++CONFIG_USB_CONFIGFS_SERIAL=y ++CONFIG_USB_CONFIGFS_ACM=y ++# CONFIG_USB_CONFIGFS_OBEX is not set ++# CONFIG_USB_CONFIGFS_NCM is not set ++# CONFIG_USB_CONFIGFS_ECM is not set ++# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set ++CONFIG_USB_CONFIGFS_RNDIS=y ++# CONFIG_USB_CONFIGFS_EEM is not set ++CONFIG_USB_CONFIGFS_MASS_STORAGE=y ++CONFIG_USB_CONFIGFS_F_LB_SS=y ++# CONFIG_USB_CONFIGFS_F_FS is not set ++# CONFIG_USB_CONFIGFS_F_UAC1 is not set ++# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set ++# CONFIG_USB_CONFIGFS_F_UAC2 is not set ++# CONFIG_USB_CONFIGFS_F_MIDI is not set ++# CONFIG_USB_CONFIGFS_F_HID is not set ++# CONFIG_USB_CONFIGFS_F_PRINTER is not set ++CONFIG_TYPEC=y ++CONFIG_TYPEC_TCPM=y ++CONFIG_TYPEC_TCPCI=y ++# CONFIG_TYPEC_RT1711H is not set ++CONFIG_TYPEC_SGM7220=y ++# CONFIG_TYPEC_FUSB302 is not set ++# CONFIG_TYPEC_UCSI is not set ++# CONFIG_TYPEC_TPS6598X is not set ++ ++# ++# USB Type-C Multiplexer/DeMultiplexer Switch support ++# ++# CONFIG_TYPEC_MUX_PI3USB30532 is not set ++ ++# ++# USB Type-C Alternate Mode drivers ++# ++# CONFIG_TYPEC_DP_ALTMODE is not set ++CONFIG_USB_ROLE_SWITCH=y ++# CONFIG_USB_ULPI_BUS is not set ++# CONFIG_UWB is not set ++CONFIG_MMC=y ++CONFIG_PWRSEQ_EMMC=y ++CONFIG_PWRSEQ_SIMPLE=y ++CONFIG_MMC_BLOCK=y ++CONFIG_MMC_BLOCK_MINORS=8 ++# CONFIG_SDIO_UART is not set ++# CONFIG_MMC_TEST is not set ++ ++# ++# MMC/SD/SDIO Host Controller Drivers ++# ++# CONFIG_MMC_DEBUG is not set ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_IO_ACCESSORS=y ++CONFIG_MMC_SDHCI_PLTFM=y ++# CONFIG_MMC_SDHCI_OF_ARASAN is not set ++# CONFIG_MMC_SDHCI_OF_AT91 is not set ++# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set ++# CONFIG_MMC_SDHCI_CADENCE is not set ++CONFIG_MMC_SDHCI_AX620=y ++# CONFIG_MMC_SDHCI_F_SDH30 is not set ++# CONFIG_MMC_SPI is not set ++# CONFIG_MMC_DW is not set ++# CONFIG_MMC_VUB300 is not set ++# CONFIG_MMC_USHC is not set ++# CONFIG_MMC_USDHI6ROL0 is not set ++# CONFIG_MMC_CQHCI is not set ++# CONFIG_MMC_MTK is not set ++# CONFIG_MMC_SDHCI_XENON is not set ++# CONFIG_MMC_SDHCI_OMAP is not set ++# CONFIG_MEMSTICK is not set ++# CONFIG_NEW_LEDS is not set ++# CONFIG_ACCESSIBILITY is not set ++# CONFIG_INFINIBAND is not set ++CONFIG_EDAC_ATOMIC_SCRUB=y ++CONFIG_EDAC_SUPPORT=y ++CONFIG_RTC_LIB=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" ++CONFIG_RTC_SYSTOHC=y ++CONFIG_RTC_SYSTOHC_DEVICE="rtc0" ++# CONFIG_RTC_DEBUG is not set ++CONFIG_RTC_NVMEM=y ++ ++# ++# RTC interfaces ++# ++CONFIG_RTC_INTF_SYSFS=y ++CONFIG_RTC_INTF_PROC=y ++CONFIG_RTC_INTF_DEV=y ++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set ++# CONFIG_RTC_DRV_TEST is not set ++ ++# ++# I2C RTC drivers ++# ++# CONFIG_RTC_DRV_ABB5ZES3 is not set ++# CONFIG_RTC_DRV_ABX80X is not set ++# CONFIG_RTC_DRV_DS1307 is not set ++# CONFIG_RTC_DRV_DS1374 is not set ++# CONFIG_RTC_DRV_DS1672 is not set ++# CONFIG_RTC_DRV_HYM8563 is not set ++# CONFIG_RTC_DRV_MAX6900 is not set ++# CONFIG_RTC_DRV_RS5C372 is not set ++# CONFIG_RTC_DRV_ISL1208 is not set ++# CONFIG_RTC_DRV_ISL12022 is not set ++# CONFIG_RTC_DRV_ISL12026 is not set ++# CONFIG_RTC_DRV_X1205 is not set ++# CONFIG_RTC_DRV_PCF8523 is not set ++# CONFIG_RTC_DRV_PCF85063 is not set ++# CONFIG_RTC_DRV_PCF85363 is not set ++# CONFIG_RTC_DRV_PCF8563 is not set ++# CONFIG_RTC_DRV_PCF8583 is not set ++# CONFIG_RTC_DRV_M41T80 is not set ++# CONFIG_RTC_DRV_BQ32K is not set ++# CONFIG_RTC_DRV_S35390A is not set ++# CONFIG_RTC_DRV_FM3130 is not set ++# CONFIG_RTC_DRV_RX8010 is not set ++# CONFIG_RTC_DRV_PT7C4563 is not set ++# CONFIG_RTC_DRV_RX8581 is not set ++# CONFIG_RTC_DRV_RX8025 is not set ++# CONFIG_RTC_DRV_EM3027 is not set ++# CONFIG_RTC_DRV_RV8803 is not set ++ ++# ++# SPI RTC drivers ++# ++# CONFIG_RTC_DRV_M41T93 is not set ++# CONFIG_RTC_DRV_M41T94 is not set ++# CONFIG_RTC_DRV_DS1302 is not set ++# CONFIG_RTC_DRV_DS1305 is not set ++# CONFIG_RTC_DRV_DS1343 is not set ++# CONFIG_RTC_DRV_DS1347 is not set ++# CONFIG_RTC_DRV_DS1390 is not set ++# CONFIG_RTC_DRV_MAX6916 is not set ++# CONFIG_RTC_DRV_R9701 is not set ++# CONFIG_RTC_DRV_RX4581 is not set ++# CONFIG_RTC_DRV_RX6110 is not set ++# CONFIG_RTC_DRV_RS5C348 is not set ++# CONFIG_RTC_DRV_MAX6902 is not set ++# CONFIG_RTC_DRV_PCF2123 is not set ++# CONFIG_RTC_DRV_MCP795 is not set ++CONFIG_RTC_I2C_AND_SPI=y ++ ++# ++# SPI and I2C RTC drivers ++# ++# CONFIG_RTC_DRV_DS3232 is not set ++# CONFIG_RTC_DRV_PCF2127 is not set ++# CONFIG_RTC_DRV_RV3029C2 is not set ++ ++# ++# Platform RTC drivers ++# ++# CONFIG_RTC_DRV_CMOS is not set ++# CONFIG_RTC_DRV_DS1286 is not set ++# CONFIG_RTC_DRV_DS1511 is not set ++# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_DS1685_FAMILY is not set ++# CONFIG_RTC_DRV_DS1742 is not set ++# CONFIG_RTC_DRV_DS2404 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set ++# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T35 is not set ++# CONFIG_RTC_DRV_M48T59 is not set ++# CONFIG_RTC_DRV_MSM6242 is not set ++# CONFIG_RTC_DRV_BQ4802 is not set ++# CONFIG_RTC_DRV_RP5C01 is not set ++# CONFIG_RTC_DRV_V3020 is not set ++# CONFIG_RTC_DRV_ZYNQMP is not set ++ ++# ++# on-CPU RTC drivers ++# ++# CONFIG_RTC_DRV_FTRTC010 is not set ++# CONFIG_RTC_DRV_SNVS is not set ++# CONFIG_RTC_DRV_R7301 is not set ++ ++# ++# HID Sensor RTC drivers ++# ++# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set ++CONFIG_DMADEVICES=y ++# CONFIG_DMADEVICES_DEBUG is not set ++ ++# ++# DMA Devices ++# ++CONFIG_DMA_ENGINE=y ++CONFIG_DMA_VIRTUAL_CHANNELS=y ++CONFIG_DMA_OF=y ++# CONFIG_ALTERA_MSGDMA is not set ++# CONFIG_DW_AXI_DMAC is not set ++CONFIG_AXERA_AXI_DMAC=y ++# CONFIG_FSL_EDMA is not set ++# CONFIG_INTEL_IDMA64 is not set ++# CONFIG_NBPFAXI_DMA is not set ++# CONFIG_QCOM_HIDMA_MGMT is not set ++# CONFIG_QCOM_HIDMA is not set ++# CONFIG_DW_DMAC is not set ++ ++# ++# DMA Clients ++# ++# CONFIG_ASYNC_TX_DMA is not set ++# CONFIG_DMATEST is not set ++ ++# ++# DMABUF options ++# ++CONFIG_SYNC_FILE=y ++# CONFIG_SW_SYNC is not set ++# CONFIG_AUXDISPLAY is not set ++CONFIG_UIO=y ++CONFIG_UIO_PDRV_GENIRQ=m ++# CONFIG_UIO_DMEM_GENIRQ is not set ++# CONFIG_UIO_PRUSS is not set ++# CONFIG_VIRT_DRIVERS is not set ++# CONFIG_VIRTIO_MENU is not set ++ ++# ++# Microsoft Hyper-V guest support ++# ++# CONFIG_STAGING is not set ++# CONFIG_GOLDFISH is not set ++# CONFIG_CHROME_PLATFORMS is not set ++# CONFIG_MELLANOX_PLATFORM is not set ++CONFIG_CLKDEV_LOOKUP=y ++CONFIG_HAVE_CLK_PREPARE=y ++CONFIG_COMMON_CLK=y ++ ++# ++# Common Clock Framework ++# ++# CONFIG_CLK_HSDK is not set ++# CONFIG_COMMON_CLK_MAX9485 is not set ++# CONFIG_COMMON_CLK_SI5351 is not set ++# CONFIG_COMMON_CLK_SI514 is not set ++# CONFIG_COMMON_CLK_SI544 is not set ++# CONFIG_COMMON_CLK_SI570 is not set ++# CONFIG_COMMON_CLK_CDCE706 is not set ++# CONFIG_COMMON_CLK_CDCE925 is not set ++# CONFIG_COMMON_CLK_CS2000_CP is not set ++# CONFIG_CLK_QORIQ is not set ++# CONFIG_COMMON_CLK_PWM is not set ++# CONFIG_COMMON_CLK_VC5 is not set ++CONFIG_COMMON_CLK_AXERA=y ++CONFIG_COMMON_CLK_AX620X=y ++# CONFIG_SLAVE_CLK_AX620X is not set ++# CONFIG_CLK_AX620U is not set ++# CONFIG_HWSPINLOCK is not set ++ ++# ++# Clock Source drivers ++# ++CONFIG_TIMER_OF=y ++CONFIG_TIMER_PROBE=y ++CONFIG_CLKSRC_MMIO=y ++CONFIG_ARM_ARCH_TIMER=y ++CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y ++CONFIG_ARM_GLOBAL_TIMER=y ++CONFIG_ARM_TIMER_SP804=y ++CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y ++# CONFIG_MAILBOX is not set ++# CONFIG_IOMMU_SUPPORT is not set ++ ++# ++# Remoteproc drivers ++# ++# CONFIG_REMOTEPROC is not set ++ ++# ++# Rpmsg drivers ++# ++# CONFIG_RPMSG_VIRTIO is not set ++ ++# ++# SOC (System On Chip) specific Drivers ++# ++ ++# ++# Amlogic SoC drivers ++# ++ ++# ++# Broadcom SoC drivers ++# ++# CONFIG_SOC_BRCMSTB is not set ++ ++# ++# NXP/Freescale QorIQ SoC drivers ++# ++ ++# ++# i.MX SoC drivers ++# ++ ++# ++# Qualcomm SoC drivers ++# ++# CONFIG_SOC_TI is not set ++ ++# ++# Xilinx SoC drivers ++# ++# CONFIG_XILINX_VCU is not set ++CONFIG_AXERA_MEMORY_DUMP=y ++# CONFIG_PM_DEVFREQ is not set ++# CONFIG_EXTCON is not set ++# CONFIG_MEMORY is not set ++# CONFIG_IIO is not set ++CONFIG_PWM=y ++CONFIG_PWM_SYSFS=y ++# CONFIG_PWM_FSL_FTM is not set ++# CONFIG_PWM_PCA9685 is not set ++CONFIG_PWM_AXERA=y ++ ++# ++# IRQ chip support ++# ++CONFIG_IRQCHIP=y ++CONFIG_ARM_GIC=y ++CONFIG_ARM_GIC_MAX_NR=1 ++# CONFIG_IPACK_BUS is not set ++CONFIG_RESET_CONTROLLER=y ++# CONFIG_RESET_TI_SYSCON is not set ++# CONFIG_FMC is not set ++ ++# ++# PHY Subsystem ++# ++# CONFIG_GENERIC_PHY is not set ++# CONFIG_BCM_KONA_USB2_PHY is not set ++# CONFIG_PHY_PXA_28NM_HSIC is not set ++# CONFIG_PHY_PXA_28NM_USB2 is not set ++# CONFIG_PHY_MAPPHONE_MDM6600 is not set ++# CONFIG_POWERCAP is not set ++# CONFIG_MCB is not set ++ ++# ++# Performance monitor support ++# ++# CONFIG_ARM_CCI_PMU is not set ++# CONFIG_ARM_CCN is not set ++CONFIG_ARM_PMU=y ++# CONFIG_RAS is not set ++ ++# ++# Android ++# ++# CONFIG_ANDROID is not set ++# CONFIG_DAX is not set ++CONFIG_NVMEM=y ++ ++# ++# HW tracing support ++# ++# CONFIG_STM is not set ++# CONFIG_INTEL_TH is not set ++# CONFIG_FPGA is not set ++# CONFIG_FSI is not set ++# CONFIG_TEE is not set ++# CONFIG_SIOX is not set ++# CONFIG_SLIMBUS is not set ++ ++# ++# File systems ++# ++CONFIG_DCACHE_WORD_ACCESS=y ++CONFIG_FS_IOMAP=y ++CONFIG_EXT2_FS=y ++# CONFIG_EXT2_FS_XATTR is not set ++CONFIG_EXT3_FS=y ++# CONFIG_EXT3_FS_POSIX_ACL is not set ++# CONFIG_EXT3_FS_SECURITY is not set ++CONFIG_EXT4_FS=y ++# CONFIG_EXT4_FS_POSIX_ACL is not set ++# CONFIG_EXT4_FS_SECURITY is not set ++# CONFIG_EXT4_ENCRYPTION is not set ++# CONFIG_EXT4_DEBUG is not set ++CONFIG_JBD2=y ++# CONFIG_JBD2_DEBUG is not set ++CONFIG_FS_MBCACHE=y ++# CONFIG_REISERFS_FS is not set ++# CONFIG_JFS_FS is not set ++# CONFIG_XFS_FS is not set ++# CONFIG_GFS2_FS is not set ++# CONFIG_OCFS2_FS is not set ++# CONFIG_BTRFS_FS is not set ++# CONFIG_NILFS2_FS is not set ++# CONFIG_F2FS_FS is not set ++CONFIG_EXPORTFS=y ++# CONFIG_EXPORTFS_BLOCK_OPS is not set ++CONFIG_FILE_LOCKING=y ++CONFIG_MANDATORY_FILE_LOCKING=y ++# CONFIG_FS_ENCRYPTION is not set ++CONFIG_FSNOTIFY=y ++CONFIG_DNOTIFY=y ++CONFIG_INOTIFY_USER=y ++# CONFIG_FANOTIFY is not set ++# CONFIG_QUOTA is not set ++# CONFIG_AUTOFS4_FS is not set ++# CONFIG_AUTOFS_FS is not set ++# CONFIG_FUSE_FS is not set ++# CONFIG_OVERLAY_FS is not set ++ ++# ++# Caches ++# ++# CONFIG_FSCACHE is not set ++ ++# ++# CD-ROM/DVD Filesystems ++# ++# CONFIG_ISO9660_FS is not set ++# CONFIG_UDF_FS is not set ++ ++# ++# DOS/FAT/NT Filesystems ++# ++CONFIG_FAT_FS=y ++# CONFIG_MSDOS_FS is not set ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_CODEPAGE=437 ++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" ++# CONFIG_FAT_DEFAULT_UTF8 is not set ++CONFIG_EXFAT_FS=y ++CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" ++CONFIG_EXFAT_VIRTUAL_XATTR=y ++CONFIG_EXFAT_VIRTUAL_XATTR_SELINUX_LABEL="u:object_r:exfat:s0" ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_PROC_PAGE_MONITOR=y ++# CONFIG_PROC_CHILDREN is not set ++CONFIG_KERNFS=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++# CONFIG_TMPFS_POSIX_ACL is not set ++# CONFIG_TMPFS_XATTR is not set ++CONFIG_MEMFD_CREATE=y ++CONFIG_CONFIGFS_FS=y ++CONFIG_MISC_FILESYSTEMS=y ++# CONFIG_ORANGEFS_FS is not set ++# CONFIG_ADFS_FS is not set ++# CONFIG_AFFS_FS is not set ++# CONFIG_ECRYPT_FS is not set ++# CONFIG_HFS_FS is not set ++# CONFIG_HFSPLUS_FS is not set ++# CONFIG_BEFS_FS is not set ++# CONFIG_BFS_FS is not set ++# CONFIG_EFS_FS is not set ++# CONFIG_YAFFS_FS is not set ++CONFIG_JFFS2_FS=y ++CONFIG_JFFS2_FS_DEBUG=0 ++CONFIG_JFFS2_FS_WRITEBUFFER=y ++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set ++# CONFIG_JFFS2_SUMMARY is not set ++# CONFIG_JFFS2_FS_XATTR is not set ++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set ++CONFIG_JFFS2_ZLIB=y ++CONFIG_JFFS2_RTIME=y ++CONFIG_UBIFS_FS=y ++# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set ++CONFIG_UBIFS_FS_LZO=y ++CONFIG_UBIFS_FS_ZLIB=y ++# CONFIG_UBIFS_ATIME_SUPPORT is not set ++CONFIG_UBIFS_FS_XATTR=y ++# CONFIG_UBIFS_FS_ENCRYPTION is not set ++CONFIG_UBIFS_FS_SECURITY=y ++CONFIG_CRAMFS=y ++CONFIG_CRAMFS_BLOCKDEV=y ++# CONFIG_CRAMFS_MTD is not set ++CONFIG_SQUASHFS=y ++CONFIG_SQUASHFS_FILE_CACHE=y ++# CONFIG_SQUASHFS_FILE_DIRECT is not set ++CONFIG_SQUASHFS_DECOMP_SINGLE=y ++# CONFIG_SQUASHFS_DECOMP_MULTI is not set ++# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set ++# CONFIG_SQUASHFS_XATTR is not set ++CONFIG_SQUASHFS_ZLIB=y ++# CONFIG_SQUASHFS_LZ4 is not set ++CONFIG_SQUASHFS_LZO=y ++# CONFIG_SQUASHFS_XZ is not set ++# CONFIG_SQUASHFS_ZSTD is not set ++# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set ++# CONFIG_SQUASHFS_EMBEDDED is not set ++CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 ++# CONFIG_VXFS_FS is not set ++# CONFIG_MINIX_FS is not set ++# CONFIG_OMFS_FS is not set ++# CONFIG_HPFS_FS is not set ++# CONFIG_QNX4FS_FS is not set ++# CONFIG_QNX6FS_FS is not set ++# CONFIG_ROMFS_FS is not set ++CONFIG_PSTORE=y ++CONFIG_PSTORE_DEFLATE_COMPRESS=y ++# CONFIG_PSTORE_LZO_COMPRESS is not set ++# CONFIG_PSTORE_LZ4_COMPRESS is not set ++# CONFIG_PSTORE_LZ4HC_COMPRESS is not set ++# CONFIG_PSTORE_842_COMPRESS is not set ++# CONFIG_PSTORE_ZSTD_COMPRESS is not set ++CONFIG_PSTORE_COMPRESS=y ++CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y ++CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" ++CONFIG_PSTORE_CONSOLE=y ++# CONFIG_PSTORE_PMSG is not set ++CONFIG_PSTORE_RAM=y ++# CONFIG_SYSV_FS is not set ++# CONFIG_UFS_FS is not set ++CONFIG_NETWORK_FILESYSTEMS=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V2=y ++CONFIG_NFS_V3=y ++# CONFIG_NFS_V3_ACL is not set ++CONFIG_NFS_V4=y ++# CONFIG_NFS_SWAP is not set ++# CONFIG_NFS_V4_1 is not set ++CONFIG_ROOT_NFS=y ++# CONFIG_NFS_USE_LEGACY_DNS is not set ++CONFIG_NFS_USE_KERNEL_DNS=y ++# CONFIG_NFSD is not set ++CONFIG_GRACE_PERIOD=y ++CONFIG_LOCKD=y ++CONFIG_LOCKD_V4=y ++CONFIG_NFS_COMMON=y ++CONFIG_SUNRPC=y ++CONFIG_SUNRPC_GSS=y ++# CONFIG_SUNRPC_DEBUG is not set ++# CONFIG_CEPH_FS is not set ++# CONFIG_CIFS is not set ++# CONFIG_CODA_FS is not set ++# CONFIG_AFS_FS is not set ++CONFIG_NLS=y ++CONFIG_NLS_DEFAULT="iso8859-1" ++CONFIG_NLS_CODEPAGE_437=y ++# CONFIG_NLS_CODEPAGE_737 is not set ++# CONFIG_NLS_CODEPAGE_775 is not set ++# CONFIG_NLS_CODEPAGE_850 is not set ++# CONFIG_NLS_CODEPAGE_852 is not set ++# CONFIG_NLS_CODEPAGE_855 is not set ++# CONFIG_NLS_CODEPAGE_857 is not set ++# CONFIG_NLS_CODEPAGE_860 is not set ++# CONFIG_NLS_CODEPAGE_861 is not set ++# CONFIG_NLS_CODEPAGE_862 is not set ++# CONFIG_NLS_CODEPAGE_863 is not set ++# CONFIG_NLS_CODEPAGE_864 is not set ++# CONFIG_NLS_CODEPAGE_865 is not set ++# CONFIG_NLS_CODEPAGE_866 is not set ++# CONFIG_NLS_CODEPAGE_869 is not set ++# CONFIG_NLS_CODEPAGE_936 is not set ++# CONFIG_NLS_CODEPAGE_950 is not set ++# CONFIG_NLS_CODEPAGE_932 is not set ++# CONFIG_NLS_CODEPAGE_949 is not set ++# CONFIG_NLS_CODEPAGE_874 is not set ++# CONFIG_NLS_ISO8859_8 is not set ++# CONFIG_NLS_CODEPAGE_1250 is not set ++# CONFIG_NLS_CODEPAGE_1251 is not set ++# CONFIG_NLS_ASCII is not set ++CONFIG_NLS_ISO8859_1=y ++# CONFIG_NLS_ISO8859_2 is not set ++# CONFIG_NLS_ISO8859_3 is not set ++# CONFIG_NLS_ISO8859_4 is not set ++# CONFIG_NLS_ISO8859_5 is not set ++# CONFIG_NLS_ISO8859_6 is not set ++# CONFIG_NLS_ISO8859_7 is not set ++# CONFIG_NLS_ISO8859_9 is not set ++# CONFIG_NLS_ISO8859_13 is not set ++# CONFIG_NLS_ISO8859_14 is not set ++# CONFIG_NLS_ISO8859_15 is not set ++# CONFIG_NLS_KOI8_R is not set ++# CONFIG_NLS_KOI8_U is not set ++# CONFIG_NLS_MAC_ROMAN is not set ++# CONFIG_NLS_MAC_CELTIC is not set ++# CONFIG_NLS_MAC_CENTEURO is not set ++# CONFIG_NLS_MAC_CROATIAN is not set ++# CONFIG_NLS_MAC_CYRILLIC is not set ++# CONFIG_NLS_MAC_GAELIC is not set ++# CONFIG_NLS_MAC_GREEK is not set ++# CONFIG_NLS_MAC_ICELAND is not set ++# CONFIG_NLS_MAC_INUIT is not set ++# CONFIG_NLS_MAC_ROMANIAN is not set ++# CONFIG_NLS_MAC_TURKISH is not set ++# CONFIG_NLS_UTF8 is not set ++# CONFIG_DLM is not set ++ ++# ++# Security options ++# ++CONFIG_KEYS=y ++# CONFIG_PERSISTENT_KEYRINGS is not set ++# CONFIG_BIG_KEYS is not set ++# CONFIG_ENCRYPTED_KEYS is not set ++# CONFIG_KEY_DH_OPERATIONS is not set ++# CONFIG_SECURITY_DMESG_RESTRICT is not set ++# CONFIG_SECURITY is not set ++# CONFIG_SECURITYFS is not set ++CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y ++# CONFIG_HARDENED_USERCOPY is not set ++# CONFIG_FORTIFY_SOURCE is not set ++# CONFIG_STATIC_USERMODEHELPER is not set ++CONFIG_DEFAULT_SECURITY_DAC=y ++CONFIG_DEFAULT_SECURITY="" ++CONFIG_CRYPTO=y ++ ++# ++# Crypto core or helper ++# ++CONFIG_CRYPTO_ALGAPI=y ++CONFIG_CRYPTO_ALGAPI2=y ++CONFIG_CRYPTO_AEAD=m ++CONFIG_CRYPTO_AEAD2=y ++CONFIG_CRYPTO_BLKCIPHER2=y ++CONFIG_CRYPTO_HASH=y ++CONFIG_CRYPTO_HASH2=y ++CONFIG_CRYPTO_RNG=m ++CONFIG_CRYPTO_RNG2=y ++CONFIG_CRYPTO_RNG_DEFAULT=m ++CONFIG_CRYPTO_AKCIPHER2=y ++CONFIG_CRYPTO_KPP2=y ++CONFIG_CRYPTO_ACOMP2=y ++# CONFIG_CRYPTO_RSA is not set ++# CONFIG_CRYPTO_DH is not set ++# CONFIG_CRYPTO_ECDH is not set ++CONFIG_CRYPTO_MANAGER=m ++CONFIG_CRYPTO_MANAGER2=y ++# CONFIG_CRYPTO_USER is not set ++CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y ++# CONFIG_CRYPTO_GF128MUL is not set ++CONFIG_CRYPTO_NULL=m ++CONFIG_CRYPTO_NULL2=y ++# CONFIG_CRYPTO_PCRYPT is not set ++CONFIG_CRYPTO_WORKQUEUE=y ++# CONFIG_CRYPTO_CRYPTD is not set ++# CONFIG_CRYPTO_MCRYPTD is not set ++# CONFIG_CRYPTO_AUTHENC is not set ++# CONFIG_CRYPTO_TEST is not set ++ ++# ++# Authenticated Encryption with Associated Data ++# ++# CONFIG_CRYPTO_CCM is not set ++# CONFIG_CRYPTO_GCM is not set ++# CONFIG_CRYPTO_CHACHA20POLY1305 is not set ++# CONFIG_CRYPTO_AEGIS128 is not set ++# CONFIG_CRYPTO_AEGIS128L is not set ++# CONFIG_CRYPTO_AEGIS256 is not set ++# CONFIG_CRYPTO_MORUS640 is not set ++# CONFIG_CRYPTO_MORUS1280 is not set ++# CONFIG_CRYPTO_SEQIV is not set ++CONFIG_CRYPTO_ECHAINIV=m ++ ++# ++# Block modes ++# ++# CONFIG_CRYPTO_CBC is not set ++# CONFIG_CRYPTO_CFB is not set ++# CONFIG_CRYPTO_CTR is not set ++# CONFIG_CRYPTO_CTS is not set ++# CONFIG_CRYPTO_ECB is not set ++# CONFIG_CRYPTO_LRW is not set ++# CONFIG_CRYPTO_PCBC is not set ++# CONFIG_CRYPTO_XTS is not set ++# CONFIG_CRYPTO_KEYWRAP is not set ++ ++# ++# Hash modes ++# ++# CONFIG_CRYPTO_CMAC is not set ++CONFIG_CRYPTO_HMAC=m ++# CONFIG_CRYPTO_XCBC is not set ++# CONFIG_CRYPTO_VMAC is not set ++ ++# ++# Digest ++# ++CONFIG_CRYPTO_CRC32C=y ++# CONFIG_CRYPTO_CRC32 is not set ++# CONFIG_CRYPTO_CRCT10DIF is not set ++# CONFIG_CRYPTO_GHASH is not set ++# CONFIG_CRYPTO_POLY1305 is not set ++# CONFIG_CRYPTO_MD4 is not set ++# CONFIG_CRYPTO_MD5 is not set ++# CONFIG_CRYPTO_MICHAEL_MIC is not set ++# CONFIG_CRYPTO_RMD128 is not set ++# CONFIG_CRYPTO_RMD160 is not set ++# CONFIG_CRYPTO_RMD256 is not set ++# CONFIG_CRYPTO_RMD320 is not set ++# CONFIG_CRYPTO_SHA1 is not set ++CONFIG_CRYPTO_SHA256=m ++# CONFIG_CRYPTO_SHA512 is not set ++# CONFIG_CRYPTO_SHA3 is not set ++# CONFIG_CRYPTO_SM3 is not set ++# CONFIG_CRYPTO_TGR192 is not set ++# CONFIG_CRYPTO_WP512 is not set ++ ++# ++# Ciphers ++# ++CONFIG_CRYPTO_AES=y ++# CONFIG_CRYPTO_AES_TI is not set ++# CONFIG_CRYPTO_ANUBIS is not set ++# CONFIG_CRYPTO_ARC4 is not set ++# CONFIG_CRYPTO_BLOWFISH is not set ++# CONFIG_CRYPTO_CAMELLIA is not set ++# CONFIG_CRYPTO_CAST5 is not set ++# CONFIG_CRYPTO_CAST6 is not set ++# CONFIG_CRYPTO_DES is not set ++# CONFIG_CRYPTO_FCRYPT is not set ++# CONFIG_CRYPTO_KHAZAD is not set ++# CONFIG_CRYPTO_SALSA20 is not set ++# CONFIG_CRYPTO_CHACHA20 is not set ++# CONFIG_CRYPTO_SEED is not set ++# CONFIG_CRYPTO_SERPENT is not set ++# CONFIG_CRYPTO_SM4 is not set ++# CONFIG_CRYPTO_TEA is not set ++# CONFIG_CRYPTO_TWOFISH is not set ++ ++# ++# Compression ++# ++CONFIG_CRYPTO_DEFLATE=y ++CONFIG_CRYPTO_LZO=y ++# CONFIG_CRYPTO_842 is not set ++# CONFIG_CRYPTO_LZ4 is not set ++# CONFIG_CRYPTO_LZ4HC is not set ++# CONFIG_CRYPTO_ZSTD is not set ++ ++# ++# Random Number Generation ++# ++# CONFIG_CRYPTO_ANSI_CPRNG is not set ++CONFIG_CRYPTO_DRBG_MENU=m ++CONFIG_CRYPTO_DRBG_HMAC=y ++# CONFIG_CRYPTO_DRBG_HASH is not set ++CONFIG_CRYPTO_DRBG=m ++CONFIG_CRYPTO_JITTERENTROPY=m ++# CONFIG_CRYPTO_USER_API_HASH is not set ++# CONFIG_CRYPTO_USER_API_SKCIPHER is not set ++# CONFIG_CRYPTO_USER_API_RNG is not set ++# CONFIG_CRYPTO_USER_API_AEAD is not set ++# CONFIG_CRYPTO_HW is not set ++# CONFIG_ASYMMETRIC_KEY_TYPE is not set ++ ++# ++# Certificates for signature checking ++# ++# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set ++CONFIG_BINARY_PRINTF=y ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++CONFIG_HAVE_ARCH_BITREVERSE=y ++CONFIG_RATIONAL=y ++CONFIG_GENERIC_STRNCPY_FROM_USER=y ++CONFIG_GENERIC_STRNLEN_USER=y ++CONFIG_GENERIC_NET_UTILS=y ++CONFIG_GENERIC_PCI_IOMAP=y ++CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y ++# CONFIG_CRC_CCITT is not set ++CONFIG_CRC16=y ++# CONFIG_CRC_T10DIF is not set ++# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC32=y ++# CONFIG_CRC32_SELFTEST is not set ++CONFIG_CRC32_SLICEBY8=y ++# CONFIG_CRC32_SLICEBY4 is not set ++# CONFIG_CRC32_SARWATE is not set ++# CONFIG_CRC32_BIT is not set ++# CONFIG_CRC64 is not set ++# CONFIG_CRC4 is not set ++# CONFIG_CRC7 is not set ++# CONFIG_LIBCRC32C is not set ++# CONFIG_CRC8 is not set ++# CONFIG_RANDOM32_SELFTEST is not set ++CONFIG_ZLIB_INFLATE=y ++CONFIG_ZLIB_DEFLATE=y ++CONFIG_LZO_COMPRESS=y ++CONFIG_LZO_DECOMPRESS=y ++CONFIG_XZ_DEC=y ++CONFIG_XZ_DEC_X86=y ++CONFIG_XZ_DEC_POWERPC=y ++CONFIG_XZ_DEC_IA64=y ++CONFIG_XZ_DEC_ARM=y ++CONFIG_XZ_DEC_ARMTHUMB=y ++CONFIG_XZ_DEC_SPARC=y ++CONFIG_XZ_DEC_BCJ=y ++# CONFIG_XZ_DEC_TEST is not set ++CONFIG_GENERIC_ALLOCATOR=y ++CONFIG_REED_SOLOMON=y ++CONFIG_REED_SOLOMON_ENC8=y ++CONFIG_REED_SOLOMON_DEC8=y ++CONFIG_ASSOCIATIVE_ARRAY=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_DMA=y ++CONFIG_NEED_DMA_MAP_STATE=y ++CONFIG_HAVE_GENERIC_DMA_COHERENT=y ++CONFIG_SGL_ALLOC=y ++CONFIG_CPU_RMAP=y ++CONFIG_DQL=y ++CONFIG_GLOB=y ++# CONFIG_GLOB_SELFTEST is not set ++CONFIG_NLATTR=y ++# CONFIG_CORDIC is not set ++# CONFIG_DDR is not set ++# CONFIG_IRQ_POLL is not set ++CONFIG_LIBFDT=y ++CONFIG_OID_REGISTRY=y ++CONFIG_FONT_SUPPORT=y ++# CONFIG_FONTS is not set ++CONFIG_FONT_8x8=y ++CONFIG_FONT_8x16=y ++CONFIG_SG_POOL=y ++CONFIG_ARCH_HAS_SG_CHAIN=y ++CONFIG_SBITMAP=y ++# CONFIG_STRING_SELFTEST is not set ++ ++# ++# Kernel hacking ++# ++ ++# ++# printk and dmesg options ++# ++CONFIG_PRINTK_TIME=y ++CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 ++CONFIG_CONSOLE_LOGLEVEL_QUIET=4 ++CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 ++# CONFIG_BOOT_PRINTK_DELAY is not set ++CONFIG_DYNAMIC_DEBUG=y ++ ++# ++# Compile-time checks and compiler options ++# ++CONFIG_DEBUG_INFO=y ++# CONFIG_DEBUG_INFO_REDUCED is not set ++# CONFIG_DEBUG_INFO_SPLIT is not set ++# CONFIG_DEBUG_INFO_DWARF4 is not set ++# CONFIG_GDB_SCRIPTS is not set ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_FRAME_WARN=1024 ++# CONFIG_STRIP_ASM_SYMS is not set ++# CONFIG_READABLE_ASM is not set ++# CONFIG_UNUSED_SYMBOLS is not set ++# CONFIG_PAGE_OWNER is not set ++CONFIG_DEBUG_FS=y ++# CONFIG_HEADERS_CHECK is not set ++# CONFIG_DEBUG_SECTION_MISMATCH is not set ++CONFIG_SECTION_MISMATCH_WARN_ONLY=y ++# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set ++CONFIG_MAGIC_SYSRQ=y ++CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 ++CONFIG_MAGIC_SYSRQ_SERIAL=y ++CONFIG_DEBUG_KERNEL=y ++ ++# ++# Memory Debugging ++# ++# CONFIG_PAGE_EXTENSION is not set ++# CONFIG_DEBUG_PAGEALLOC is not set ++# CONFIG_PAGE_POISONING is not set ++# CONFIG_DEBUG_PAGE_REF is not set ++# CONFIG_DEBUG_RODATA_TEST is not set ++# CONFIG_DEBUG_OBJECTS is not set ++# CONFIG_SLUB_DEBUG_ON is not set ++# CONFIG_SLUB_STATS is not set ++CONFIG_HAVE_DEBUG_KMEMLEAK=y ++# CONFIG_DEBUG_KMEMLEAK is not set ++# CONFIG_DEBUG_STACK_USAGE is not set ++# CONFIG_DEBUG_VM is not set ++CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y ++# CONFIG_DEBUG_VIRTUAL is not set ++CONFIG_DEBUG_MEMORY_INIT=y ++# CONFIG_DEBUG_PER_CPU_MAPS is not set ++# CONFIG_DEBUG_HIGHMEM is not set ++CONFIG_ARCH_HAS_KCOV=y ++CONFIG_CC_HAS_SANCOV_TRACE_PC=y ++# CONFIG_KCOV is not set ++# CONFIG_DEBUG_SHIRQ is not set ++ ++# ++# Debug Lockups and Hangs ++# ++# CONFIG_SOFTLOCKUP_DETECTOR is not set ++CONFIG_DETECT_HUNG_TASK=y ++CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 ++# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set ++CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 ++# CONFIG_WQ_WATCHDOG is not set ++CONFIG_PANIC_ON_OOPS=y ++CONFIG_PANIC_ON_OOPS_VALUE=1 ++CONFIG_PANIC_TIMEOUT=5 ++# CONFIG_SCHED_DEBUG is not set ++# CONFIG_SCHEDSTATS is not set ++# CONFIG_SCHED_STACK_END_CHECK is not set ++# CONFIG_DEBUG_TIMEKEEPING is not set ++CONFIG_DEBUG_PREEMPT=y ++ ++# ++# Lock Debugging (spinlocks, mutexes, etc...) ++# ++CONFIG_LOCK_DEBUGGING_SUPPORT=y ++# CONFIG_PROVE_LOCKING is not set ++# CONFIG_LOCK_STAT is not set ++# CONFIG_DEBUG_RT_MUTEXES is not set ++# CONFIG_DEBUG_SPINLOCK is not set ++# CONFIG_DEBUG_MUTEXES is not set ++# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set ++# CONFIG_DEBUG_RWSEMS is not set ++# CONFIG_DEBUG_LOCK_ALLOC is not set ++# CONFIG_DEBUG_ATOMIC_SLEEP is not set ++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set ++# CONFIG_LOCK_TORTURE_TEST is not set ++# CONFIG_WW_MUTEX_SELFTEST is not set ++CONFIG_STACKTRACE=y ++# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set ++# CONFIG_DEBUG_KOBJECT is not set ++CONFIG_DEBUG_BUGVERBOSE=y ++# CONFIG_DEBUG_LIST is not set ++# CONFIG_DEBUG_PI_LIST is not set ++# CONFIG_DEBUG_SG is not set ++# CONFIG_DEBUG_NOTIFIERS is not set ++# CONFIG_DEBUG_CREDENTIALS is not set ++ ++# ++# RCU Debugging ++# ++# CONFIG_RCU_PERF_TEST is not set ++# CONFIG_RCU_TORTURE_TEST is not set ++CONFIG_RCU_CPU_STALL_TIMEOUT=21 ++CONFIG_RCU_TRACE=y ++# CONFIG_RCU_EQS_DEBUG is not set ++# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set ++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set ++# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set ++# CONFIG_NOTIFIER_ERROR_INJECTION is not set ++# CONFIG_FAULT_INJECTION is not set ++# CONFIG_LATENCYTOP is not set ++CONFIG_NOP_TRACER=y ++CONFIG_HAVE_FUNCTION_TRACER=y ++CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y ++CONFIG_HAVE_DYNAMIC_FTRACE=y ++CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y ++CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y ++CONFIG_HAVE_SYSCALL_TRACEPOINTS=y ++CONFIG_HAVE_C_RECORDMCOUNT=y ++CONFIG_TRACE_CLOCK=y ++CONFIG_RING_BUFFER=y ++CONFIG_EVENT_TRACING=y ++CONFIG_CONTEXT_SWITCH_TRACER=y ++CONFIG_RING_BUFFER_ALLOW_SWAP=y ++CONFIG_TRACING=y ++CONFIG_TRACING_SUPPORT=y ++CONFIG_FTRACE=y ++# CONFIG_FUNCTION_TRACER is not set ++# CONFIG_PREEMPTIRQ_EVENTS is not set ++# CONFIG_IRQSOFF_TRACER is not set ++# CONFIG_PREEMPT_TRACER is not set ++# CONFIG_SCHED_TRACER is not set ++# CONFIG_HWLAT_TRACER is not set ++# CONFIG_ENABLE_DEFAULT_TRACERS is not set ++# CONFIG_FTRACE_SYSCALLS is not set ++# CONFIG_TRACER_SNAPSHOT is not set ++CONFIG_BRANCH_PROFILE_NONE=y ++# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set ++# CONFIG_PROFILE_ALL_BRANCHES is not set ++# CONFIG_STACK_TRACER is not set ++# CONFIG_BLK_DEV_IO_TRACE is not set ++CONFIG_UPROBE_EVENTS=y ++CONFIG_PROBE_EVENTS=y ++# CONFIG_TRACEPOINT_BENCHMARK is not set ++# CONFIG_RING_BUFFER_BENCHMARK is not set ++# CONFIG_RING_BUFFER_STARTUP_TEST is not set ++# CONFIG_PREEMPTIRQ_DELAY_TEST is not set ++# CONFIG_TRACE_EVAL_MAP_FILE is not set ++CONFIG_TRACING_EVENTS_GPIO=y ++# CONFIG_DMA_API_DEBUG is not set ++CONFIG_RUNTIME_TESTING_MENU=y ++# CONFIG_LKDTM is not set ++# CONFIG_TEST_LIST_SORT is not set ++# CONFIG_TEST_SORT is not set ++# CONFIG_BACKTRACE_SELF_TEST is not set ++# CONFIG_RBTREE_TEST is not set ++# CONFIG_INTERVAL_TREE_TEST is not set ++# CONFIG_PERCPU_TEST is not set ++# CONFIG_ATOMIC64_SELFTEST is not set ++# CONFIG_TEST_HEXDUMP is not set ++# CONFIG_TEST_STRING_HELPERS is not set ++# CONFIG_TEST_KSTRTOX is not set ++# CONFIG_TEST_PRINTF is not set ++# CONFIG_TEST_BITMAP is not set ++# CONFIG_TEST_BITFIELD is not set ++# CONFIG_TEST_UUID is not set ++# CONFIG_TEST_OVERFLOW is not set ++# CONFIG_TEST_RHASHTABLE is not set ++# CONFIG_TEST_HASH is not set ++# CONFIG_TEST_IDA is not set ++# CONFIG_TEST_LKM is not set ++# CONFIG_TEST_USER_COPY is not set ++# CONFIG_TEST_BPF is not set ++# CONFIG_FIND_BIT_BENCHMARK is not set ++# CONFIG_TEST_FIRMWARE is not set ++# CONFIG_TEST_SYSCTL is not set ++# CONFIG_TEST_UDELAY is not set ++# CONFIG_TEST_STATIC_KEYS is not set ++# CONFIG_TEST_KMOD is not set ++# CONFIG_MEMTEST is not set ++# CONFIG_BUG_ON_DATA_CORRUPTION is not set ++# CONFIG_SAMPLES is not set ++CONFIG_HAVE_ARCH_KGDB=y ++# CONFIG_KGDB is not set ++# CONFIG_UBSAN is not set ++CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y ++# CONFIG_STRICT_DEVMEM is not set ++# CONFIG_ARM_PTDUMP_DEBUGFS is not set ++# CONFIG_DEBUG_WX is not set ++CONFIG_ARM_UNWIND=y ++CONFIG_DEBUG_USER=y ++# CONFIG_DEBUG_LL is not set ++CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" ++CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" ++# CONFIG_PID_IN_CONTEXTIDR is not set ++# CONFIG_CORESIGHT is not set +diff --git a/arch/arm/configs/axera_AX620_slave_defconfig b/arch/arm/configs/axera_AX620_slave_defconfig +new file mode 100644 +index 000000000..33221d422 +--- /dev/null ++++ b/arch/arm/configs/axera_AX620_slave_defconfig +@@ -0,0 +1,3427 @@ ++# ++# Automatically generated file; DO NOT EDIT. ++# Linux/arm 4.19.125 Kernel Configuration ++# ++ ++# ++# Compiler: arm-linux-gnueabihf-gcc (Linaro GCC 7.5-2019.12) 7.5.0 ++# ++CONFIG_CC_IS_GCC=y ++CONFIG_GCC_VERSION=70500 ++CONFIG_CLANG_VERSION=0 ++CONFIG_CC_HAS_ASM_GOTO=y ++CONFIG_IRQ_WORK=y ++CONFIG_BUILDTIME_EXTABLE_SORT=y ++ ++# ++# General setup ++# ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++# CONFIG_COMPILE_TEST is not set ++CONFIG_LOCALVERSION="" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_BUILD_SALT="" ++CONFIG_HAVE_KERNEL_GZIP=y ++CONFIG_HAVE_KERNEL_LZMA=y ++CONFIG_HAVE_KERNEL_XZ=y ++CONFIG_HAVE_KERNEL_LZO=y ++CONFIG_HAVE_KERNEL_LZ4=y ++CONFIG_KERNEL_GZIP=y ++# CONFIG_KERNEL_LZMA is not set ++# CONFIG_KERNEL_XZ is not set ++# CONFIG_KERNEL_LZO is not set ++# CONFIG_KERNEL_LZ4 is not set ++CONFIG_DEFAULT_HOSTNAME="(none)" ++CONFIG_SWAP=y ++CONFIG_SYSVIPC=y ++CONFIG_SYSVIPC_SYSCTL=y ++# CONFIG_POSIX_MQUEUE is not set ++CONFIG_CROSS_MEMORY_ATTACH=y ++# CONFIG_USELIB is not set ++# CONFIG_AUDIT is not set ++CONFIG_HAVE_ARCH_AUDITSYSCALL=y ++ ++# ++# IRQ subsystem ++# ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_GENERIC_IRQ_SHOW=y ++CONFIG_GENERIC_IRQ_SHOW_LEVEL=y ++CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y ++CONFIG_GENERIC_IRQ_MIGRATION=y ++CONFIG_HARDIRQS_SW_RESEND=y ++CONFIG_GENERIC_IRQ_CHIP=y ++CONFIG_IRQ_DOMAIN=y ++CONFIG_IRQ_DOMAIN_HIERARCHY=y ++CONFIG_HANDLE_DOMAIN_IRQ=y ++CONFIG_IRQ_FORCED_THREADING=y ++CONFIG_SPARSE_IRQ=y ++# CONFIG_GENERIC_IRQ_DEBUGFS is not set ++CONFIG_GENERIC_IRQ_MULTI_HANDLER=y ++CONFIG_ARCH_CLOCKSOURCE_DATA=y ++CONFIG_GENERIC_TIME_VSYSCALL=y ++CONFIG_GENERIC_CLOCKEVENTS=y ++CONFIG_ARCH_HAS_TICK_BROADCAST=y ++CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y ++ ++# ++# Timers subsystem ++# ++CONFIG_TICK_ONESHOT=y ++CONFIG_HZ_PERIODIC=y ++# CONFIG_NO_HZ_IDLE is not set ++# CONFIG_NO_HZ_FULL is not set ++# CONFIG_NO_HZ is not set ++CONFIG_HIGH_RES_TIMERS=y ++# CONFIG_PREEMPT_NONE is not set ++# CONFIG_PREEMPT_VOLUNTARY is not set ++CONFIG_PREEMPT=y ++CONFIG_PREEMPT_COUNT=y ++ ++# ++# CPU/Task time and stats accounting ++# ++CONFIG_TICK_CPU_ACCOUNTING=y ++# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set ++# CONFIG_IRQ_TIME_ACCOUNTING is not set ++# CONFIG_BSD_PROCESS_ACCT is not set ++# CONFIG_TASKSTATS is not set ++# CONFIG_CPU_ISOLATION is not set ++ ++# ++# RCU Subsystem ++# ++CONFIG_PREEMPT_RCU=y ++# CONFIG_RCU_EXPERT is not set ++CONFIG_SRCU=y ++CONFIG_TREE_SRCU=y ++CONFIG_TASKS_RCU=y ++CONFIG_RCU_STALL_COMMON=y ++CONFIG_RCU_NEED_SEGCBLIST=y ++CONFIG_BUILD_BIN2C=y ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_LOG_BUF_SHIFT=17 ++CONFIG_AXLOG_BUF_SHIFT=20 ++CONFIG_LOG_CPU_MAX_BUF_SHIFT=13 ++CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 ++CONFIG_GENERIC_SCHED_CLOCK=y ++CONFIG_CGROUPS=y ++# CONFIG_MEMCG is not set ++# CONFIG_BLK_CGROUP is not set ++# CONFIG_CGROUP_SCHED is not set ++# CONFIG_CGROUP_PIDS is not set ++# CONFIG_CGROUP_RDMA is not set ++# CONFIG_CGROUP_FREEZER is not set ++CONFIG_CPUSETS=y ++CONFIG_PROC_PID_CPUSET=y ++# CONFIG_CGROUP_DEVICE is not set ++# CONFIG_CGROUP_CPUACCT is not set ++# CONFIG_CGROUP_PERF is not set ++# CONFIG_CGROUP_DEBUG is not set ++CONFIG_NAMESPACES=y ++# CONFIG_UTS_NS is not set ++# CONFIG_IPC_NS is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set ++# CONFIG_NET_NS is not set ++# CONFIG_CHECKPOINT_RESTORE is not set ++# CONFIG_SCHED_AUTOGROUP is not set ++# CONFIG_SYSFS_DEPRECATED is not set ++# CONFIG_RELAY is not set ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_INITRAMFS_SOURCE="../../../rootfs/ramdisk/minirootfs.cpio" ++CONFIG_INITRAMFS_ROOT_UID=0 ++CONFIG_INITRAMFS_ROOT_GID=0 ++CONFIG_RD_GZIP=y ++CONFIG_RD_BZIP2=y ++CONFIG_RD_LZMA=y ++CONFIG_RD_XZ=y ++CONFIG_RD_LZO=y ++CONFIG_RD_LZ4=y ++CONFIG_INITRAMFS_COMPRESSION=".gz" ++CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y ++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set ++CONFIG_SYSCTL=y ++CONFIG_ANON_INODES=y ++CONFIG_HAVE_UID16=y ++CONFIG_BPF=y ++# CONFIG_EXPERT is not set ++CONFIG_UID16=y ++CONFIG_MULTIUSER=y ++CONFIG_SYSFS_SYSCALL=y ++CONFIG_FHANDLE=y ++CONFIG_POSIX_TIMERS=y ++CONFIG_PRINTK=y ++CONFIG_PRINTK_NMI=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++CONFIG_BASE_FULL=y ++CONFIG_FUTEX=y ++CONFIG_FUTEX_PI=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_TIMERFD=y ++CONFIG_EVENTFD=y ++CONFIG_SHMEM=y ++CONFIG_AIO=y ++CONFIG_ADVISE_SYSCALLS=y ++CONFIG_MEMBARRIER=y ++CONFIG_KALLSYMS=y ++# CONFIG_KALLSYMS_ALL is not set ++CONFIG_KALLSYMS_BASE_RELATIVE=y ++# CONFIG_BPF_SYSCALL is not set ++# CONFIG_USERFAULTFD is not set ++CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y ++CONFIG_RSEQ=y ++# CONFIG_EMBEDDED is not set ++CONFIG_HAVE_PERF_EVENTS=y ++CONFIG_PERF_USE_VMALLOC=y ++ ++# ++# Kernel Performance Events And Counters ++# ++CONFIG_PERF_EVENTS=y ++# CONFIG_DEBUG_PERF_USE_VMALLOC is not set ++CONFIG_VM_EVENT_COUNTERS=y ++CONFIG_SLUB_DEBUG=y ++CONFIG_COMPAT_BRK=y ++# CONFIG_SLAB is not set ++CONFIG_SLUB=y ++CONFIG_SLAB_MERGE_DEFAULT=y ++# CONFIG_SLAB_FREELIST_RANDOM is not set ++# CONFIG_SLAB_FREELIST_HARDENED is not set ++CONFIG_SLUB_CPU_PARTIAL=y ++CONFIG_PROFILING=y ++CONFIG_TRACEPOINTS=y ++CONFIG_ARM=y ++CONFIG_ARM_HAS_SG_CHAIN=y ++CONFIG_MIGHT_HAVE_PCI=y ++CONFIG_SYS_SUPPORTS_APM_EMULATION=y ++CONFIG_HAVE_PROC_CPU=y ++CONFIG_NO_IOPORT_MAP=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_RWSEM_XCHGADD_ALGORITHM=y ++CONFIG_FIX_EARLYCON_MEM=y ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_ARCH_SUPPORTS_UPROBES=y ++CONFIG_ARM_PATCH_PHYS_VIRT=y ++CONFIG_GENERIC_BUG=y ++CONFIG_PGTABLE_LEVELS=2 ++ ++# ++# System Type ++# ++CONFIG_MMU=y ++CONFIG_ARCH_MMAP_RND_BITS_MIN=8 ++CONFIG_ARCH_MMAP_RND_BITS_MAX=16 ++CONFIG_ARCH_MULTIPLATFORM=y ++# CONFIG_ARCH_EBSA110 is not set ++# CONFIG_ARCH_EP93XX is not set ++# CONFIG_ARCH_FOOTBRIDGE is not set ++# CONFIG_ARCH_NETX is not set ++# CONFIG_ARCH_IOP13XX is not set ++# CONFIG_ARCH_IOP32X is not set ++# CONFIG_ARCH_IOP33X is not set ++# CONFIG_ARCH_IXP4XX is not set ++# CONFIG_ARCH_DOVE is not set ++# CONFIG_ARCH_KS8695 is not set ++# CONFIG_ARCH_W90X900 is not set ++# CONFIG_ARCH_LPC32XX is not set ++# CONFIG_ARCH_PXA is not set ++# CONFIG_ARCH_RPC is not set ++# CONFIG_ARCH_SA1100 is not set ++# CONFIG_ARCH_S3C24XX is not set ++# CONFIG_ARCH_DAVINCI is not set ++# CONFIG_ARCH_OMAP1 is not set ++ ++# ++# Multiple platform selection ++# ++ ++# ++# CPU Core family selection ++# ++# CONFIG_ARCH_MULTI_V6 is not set ++CONFIG_ARCH_MULTI_V7=y ++CONFIG_ARCH_MULTI_V6_V7=y ++# CONFIG_ARCH_VIRT is not set ++# CONFIG_ARCH_ACTIONS is not set ++# CONFIG_ARCH_ALPINE is not set ++# CONFIG_ARCH_ARTPEC is not set ++# CONFIG_ARCH_AT91 is not set ++CONFIG_ARCH_AXERA=y ++ ++# ++# Axera platform type ++# ++CONFIG_ARCH_AX620=y ++# CONFIG_ARCH_BCM is not set ++# CONFIG_ARCH_BERLIN is not set ++# CONFIG_ARCH_DIGICOLOR is not set ++# CONFIG_ARCH_EXYNOS is not set ++# CONFIG_ARCH_HIGHBANK is not set ++# CONFIG_ARCH_HISI is not set ++# CONFIG_ARCH_MXC is not set ++# CONFIG_ARCH_KEYSTONE is not set ++# CONFIG_ARCH_MEDIATEK is not set ++# CONFIG_ARCH_MESON is not set ++# CONFIG_ARCH_MMP is not set ++# CONFIG_ARCH_MVEBU is not set ++# CONFIG_ARCH_NPCM is not set ++ ++# ++# TI OMAP/AM/DM/DRA Family ++# ++# CONFIG_ARCH_OMAP3 is not set ++# CONFIG_ARCH_OMAP4 is not set ++# CONFIG_SOC_OMAP5 is not set ++# CONFIG_SOC_AM33XX is not set ++# CONFIG_SOC_AM43XX is not set ++# CONFIG_SOC_DRA7XX is not set ++# CONFIG_ARCH_SIRF is not set ++# CONFIG_ARCH_QCOM is not set ++# CONFIG_ARCH_REALVIEW is not set ++# CONFIG_ARCH_ROCKCHIP is not set ++# CONFIG_ARCH_S5PV210 is not set ++# CONFIG_ARCH_RENESAS is not set ++# CONFIG_ARCH_SOCFPGA is not set ++# CONFIG_PLAT_SPEAR is not set ++# CONFIG_ARCH_STI is not set ++# CONFIG_ARCH_STM32 is not set ++# CONFIG_ARCH_SUNXI is not set ++# CONFIG_ARCH_TANGO is not set ++# CONFIG_ARCH_TEGRA is not set ++# CONFIG_ARCH_UNIPHIER is not set ++# CONFIG_ARCH_U8500 is not set ++# CONFIG_ARCH_VEXPRESS is not set ++# CONFIG_ARCH_WM8850 is not set ++# CONFIG_ARCH_ZX is not set ++# CONFIG_ARCH_ZYNQ is not set ++ ++# ++# Axera platform type ++# ++ ++# ++# Processor Type ++# ++CONFIG_CPU_V7=y ++CONFIG_CPU_THUMB_CAPABLE=y ++CONFIG_CPU_32v6K=y ++CONFIG_CPU_32v7=y ++CONFIG_CPU_ABRT_EV7=y ++CONFIG_CPU_PABRT_V7=y ++CONFIG_CPU_CACHE_V7=y ++CONFIG_CPU_CACHE_VIPT=y ++CONFIG_CPU_COPY_V6=y ++CONFIG_CPU_TLB_V7=y ++CONFIG_CPU_HAS_ASID=y ++CONFIG_CPU_CP15=y ++CONFIG_CPU_CP15_MMU=y ++ ++# ++# Processor Features ++# ++# CONFIG_ARM_LPAE is not set ++CONFIG_ARM_THUMB=y ++# CONFIG_ARM_THUMBEE is not set ++CONFIG_ARM_VIRT_EXT=y ++CONFIG_SWP_EMULATE=y ++# CONFIG_CPU_ICACHE_DISABLE is not set ++# CONFIG_CPU_BPREDICT_DISABLE is not set ++CONFIG_CPU_SPECTRE=y ++CONFIG_HARDEN_BRANCH_PREDICTOR=y ++CONFIG_KUSER_HELPERS=y ++CONFIG_VDSO=y ++CONFIG_OUTER_CACHE=y ++CONFIG_OUTER_CACHE_SYNC=y ++CONFIG_MIGHT_HAVE_CACHE_L2X0=y ++CONFIG_CACHE_L2X0=y ++# CONFIG_CACHE_L2X0_PMU is not set ++# CONFIG_PL310_ERRATA_588369 is not set ++# CONFIG_PL310_ERRATA_727915 is not set ++CONFIG_PL310_ERRATA_753970=y ++# CONFIG_PL310_ERRATA_769419 is not set ++CONFIG_ARM_L1_CACHE_SHIFT_6=y ++CONFIG_ARM_L1_CACHE_SHIFT=6 ++CONFIG_ARM_DMA_MEM_BUFFERABLE=y ++CONFIG_ARM_HEAVY_MB=y ++CONFIG_DEBUG_ALIGN_RODATA=y ++# CONFIG_ARM_ERRATA_430973 is not set ++CONFIG_ARM_ERRATA_643719=y ++CONFIG_ARM_ERRATA_720789=y ++# CONFIG_ARM_ERRATA_754322 is not set ++# CONFIG_ARM_ERRATA_754327 is not set ++# CONFIG_ARM_ERRATA_764369 is not set ++# CONFIG_ARM_ERRATA_775420 is not set ++# CONFIG_ARM_ERRATA_798181 is not set ++# CONFIG_ARM_ERRATA_773022 is not set ++# CONFIG_ARM_ERRATA_818325_852422 is not set ++# CONFIG_ARM_ERRATA_821420 is not set ++# CONFIG_ARM_ERRATA_825619 is not set ++# CONFIG_ARM_ERRATA_852421 is not set ++# CONFIG_ARM_ERRATA_852423 is not set ++ ++# ++# Bus support ++# ++# CONFIG_PCI is not set ++ ++# ++# PCI Endpoint ++# ++# CONFIG_PCI_ENDPOINT is not set ++# CONFIG_PCCARD is not set ++ ++# ++# Kernel Features ++# ++CONFIG_HAVE_SMP=y ++CONFIG_SMP=y ++CONFIG_SMP_ON_UP=y ++CONFIG_ARM_CPU_TOPOLOGY=y ++# CONFIG_SCHED_MC is not set ++# CONFIG_SCHED_SMT is not set ++CONFIG_HAVE_ARM_SCU=y ++CONFIG_HAVE_ARM_ARCH_TIMER=y ++CONFIG_HAVE_ARM_TWD=y ++CONFIG_MCPM=y ++# CONFIG_BIG_LITTLE is not set ++CONFIG_VMSPLIT_3G=y ++# CONFIG_VMSPLIT_3G_OPT is not set ++# CONFIG_VMSPLIT_2G is not set ++# CONFIG_VMSPLIT_1G is not set ++CONFIG_PAGE_OFFSET=0xC0000000 ++CONFIG_NR_CPUS=4 ++CONFIG_HOTPLUG_CPU=y ++# CONFIG_ARM_PSCI is not set ++CONFIG_ARCH_NR_GPIO=0 ++CONFIG_HZ_FIXED=0 ++# CONFIG_HZ_100 is not set ++CONFIG_HZ_200=y ++# CONFIG_HZ_250 is not set ++# CONFIG_HZ_300 is not set ++# CONFIG_HZ_500 is not set ++# CONFIG_HZ_1000 is not set ++CONFIG_HZ=200 ++CONFIG_SCHED_HRTICK=y ++# CONFIG_THUMB2_KERNEL is not set ++CONFIG_ARM_PATCH_IDIV=y ++CONFIG_AEABI=y ++# CONFIG_OABI_COMPAT is not set ++CONFIG_HAVE_ARCH_PFN_VALID=y ++CONFIG_HIGHMEM=y ++CONFIG_HIGHPTE=y ++CONFIG_CPU_SW_DOMAIN_PAN=y ++CONFIG_HW_PERF_EVENTS=y ++CONFIG_ARCH_WANT_GENERAL_HUGETLB=y ++CONFIG_ARM_MODULE_PLTS=y ++CONFIG_FORCE_MAX_ZONEORDER=11 ++CONFIG_ALIGNMENT_TRAP=y ++# CONFIG_UACCESS_WITH_MEMCPY is not set ++CONFIG_SECCOMP=y ++# CONFIG_PARAVIRT is not set ++# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set ++# CONFIG_XEN is not set ++ ++# ++# Boot options ++# ++CONFIG_USE_OF=y ++CONFIG_ATAGS=y ++# CONFIG_DEPRECATED_PARAM_STRUCT is not set ++CONFIG_ZBOOT_ROM_TEXT=0x0 ++CONFIG_ZBOOT_ROM_BSS=0x0 ++# CONFIG_ARM_APPENDED_DTB is not set ++CONFIG_CMDLINE="console=ttyAMA0" ++CONFIG_CMDLINE_FROM_BOOTLOADER=y ++# CONFIG_CMDLINE_EXTEND is not set ++# CONFIG_CMDLINE_FORCE is not set ++# CONFIG_CRASH_DUMP is not set ++CONFIG_AUTO_ZRELADDR=y ++# CONFIG_EFI is not set ++ ++# ++# CPU Power Management ++# ++ ++# ++# CPU Frequency scaling ++# ++# CONFIG_CPU_FREQ is not set ++ ++# ++# CPU Idle ++# ++# CONFIG_CPU_IDLE is not set ++ ++# ++# Floating point emulation ++# ++ ++# ++# At least one emulation must be selected ++# ++CONFIG_VFP=y ++CONFIG_VFPv3=y ++CONFIG_NEON=y ++CONFIG_KERNEL_MODE_NEON=y ++ ++# ++# Power management options ++# ++# CONFIG_SUSPEND is not set ++# CONFIG_HIBERNATION is not set ++# CONFIG_PM is not set ++# CONFIG_APM_EMULATION is not set ++CONFIG_ARCH_SUSPEND_POSSIBLE=y ++CONFIG_ARCH_HIBERNATION_POSSIBLE=y ++ ++# ++# Firmware Drivers ++# ++CONFIG_HAVE_ARM_SMCCC=y ++# CONFIG_GOOGLE_FIRMWARE is not set ++ ++# ++# Tegra firmware driver ++# ++# CONFIG_ARM_CRYPTO is not set ++# CONFIG_VIRTUALIZATION is not set ++ ++# ++# General architecture-dependent options ++# ++CONFIG_OPROFILE=y ++CONFIG_HAVE_OPROFILE=y ++# CONFIG_KPROBES is not set ++# CONFIG_JUMP_LABEL is not set ++CONFIG_UPROBES=y ++CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y ++CONFIG_ARCH_USE_BUILTIN_BSWAP=y ++CONFIG_HAVE_KPROBES=y ++CONFIG_HAVE_KRETPROBES=y ++CONFIG_HAVE_OPTPROBES=y ++CONFIG_HAVE_NMI=y ++CONFIG_HAVE_ARCH_TRACEHOOK=y ++CONFIG_HAVE_DMA_CONTIGUOUS=y ++CONFIG_GENERIC_SMP_IDLE_THREAD=y ++CONFIG_GENERIC_IDLE_POLL_SETUP=y ++CONFIG_ARCH_HAS_FORTIFY_SOURCE=y ++CONFIG_ARCH_HAS_SET_MEMORY=y ++CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y ++CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y ++CONFIG_HAVE_RSEQ=y ++CONFIG_HAVE_CLK=y ++CONFIG_HAVE_HW_BREAKPOINT=y ++CONFIG_HAVE_PERF_REGS=y ++CONFIG_HAVE_PERF_USER_STACK_DUMP=y ++CONFIG_HAVE_ARCH_JUMP_LABEL=y ++CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y ++CONFIG_HAVE_ARCH_SECCOMP_FILTER=y ++CONFIG_SECCOMP_FILTER=y ++CONFIG_HAVE_STACKPROTECTOR=y ++CONFIG_CC_HAS_STACKPROTECTOR_NONE=y ++CONFIG_STACKPROTECTOR=y ++CONFIG_STACKPROTECTOR_STRONG=y ++CONFIG_HAVE_CONTEXT_TRACKING=y ++CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y ++CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y ++CONFIG_HAVE_MOD_ARCH_SPECIFIC=y ++CONFIG_MODULES_USE_ELF_REL=y ++CONFIG_ARCH_HAS_ELF_RANDOMIZE=y ++CONFIG_HAVE_ARCH_MMAP_RND_BITS=y ++CONFIG_HAVE_EXIT_THREAD=y ++CONFIG_ARCH_MMAP_RND_BITS=8 ++CONFIG_CLONE_BACKWARDS=y ++CONFIG_OLD_SIGSUSPEND3=y ++CONFIG_OLD_SIGACTION=y ++CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y ++CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y ++CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y ++CONFIG_STRICT_KERNEL_RWX=y ++CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y ++CONFIG_STRICT_MODULE_RWX=y ++CONFIG_ARCH_HAS_PHYS_TO_DMA=y ++CONFIG_REFCOUNT_FULL=y ++ ++# ++# GCOV-based kernel profiling ++# ++# CONFIG_GCOV_KERNEL is not set ++CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y ++CONFIG_PLUGIN_HOSTCC="" ++CONFIG_HAVE_GCC_PLUGINS=y ++CONFIG_RT_MUTEXES=y ++CONFIG_BASE_SMALL=0 ++CONFIG_MODULES=y ++# CONFIG_MODULE_FORCE_LOAD is not set ++CONFIG_MODULE_UNLOAD=y ++# CONFIG_MODULE_FORCE_UNLOAD is not set ++# CONFIG_MODVERSIONS is not set ++# CONFIG_MODULE_SRCVERSION_ALL is not set ++# CONFIG_MODULE_SIG is not set ++# CONFIG_MODULE_COMPRESS is not set ++# CONFIG_TRIM_UNUSED_KSYMS is not set ++CONFIG_MODULES_TREE_LOOKUP=y ++CONFIG_BLOCK=y ++CONFIG_LBDAF=y ++CONFIG_BLK_SCSI_REQUEST=y ++# CONFIG_BLK_DEV_BSG is not set ++# CONFIG_BLK_DEV_BSGLIB is not set ++# CONFIG_BLK_DEV_INTEGRITY is not set ++# CONFIG_BLK_DEV_ZONED is not set ++CONFIG_BLK_CMDLINE_PARSER=y ++# CONFIG_BLK_WBT is not set ++CONFIG_BLK_DEBUG_FS=y ++# CONFIG_BLK_SED_OPAL is not set ++ ++# ++# Partition Types ++# ++CONFIG_PARTITION_ADVANCED=y ++# CONFIG_ACORN_PARTITION is not set ++# CONFIG_AIX_PARTITION is not set ++# CONFIG_OSF_PARTITION is not set ++# CONFIG_AMIGA_PARTITION is not set ++# CONFIG_ATARI_PARTITION is not set ++# CONFIG_MAC_PARTITION is not set ++CONFIG_MSDOS_PARTITION=y ++# CONFIG_BSD_DISKLABEL is not set ++# CONFIG_MINIX_SUBPARTITION is not set ++# CONFIG_SOLARIS_X86_PARTITION is not set ++# CONFIG_UNIXWARE_DISKLABEL is not set ++# CONFIG_LDM_PARTITION is not set ++# CONFIG_SGI_PARTITION is not set ++# CONFIG_ULTRIX_PARTITION is not set ++# CONFIG_SUN_PARTITION is not set ++# CONFIG_KARMA_PARTITION is not set ++CONFIG_EFI_PARTITION=y ++# CONFIG_SYSV68_PARTITION is not set ++CONFIG_CMDLINE_PARTITION=y ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++# CONFIG_IOSCHED_DEADLINE is not set ++# CONFIG_IOSCHED_CFQ is not set ++CONFIG_DEFAULT_NOOP=y ++CONFIG_DEFAULT_IOSCHED="noop" ++CONFIG_MQ_IOSCHED_DEADLINE=y ++CONFIG_MQ_IOSCHED_KYBER=y ++# CONFIG_IOSCHED_BFQ is not set ++CONFIG_UNINLINE_SPIN_UNLOCK=y ++CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y ++CONFIG_MUTEX_SPIN_ON_OWNER=y ++CONFIG_RWSEM_SPIN_ON_OWNER=y ++CONFIG_LOCK_SPIN_ON_OWNER=y ++ ++# ++# Executable file formats ++# ++CONFIG_BINFMT_ELF=y ++# CONFIG_BINFMT_ELF_FDPIC is not set ++CONFIG_ELFCORE=y ++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set ++CONFIG_BINFMT_SCRIPT=y ++# CONFIG_BINFMT_FLAT is not set ++# CONFIG_BINFMT_MISC is not set ++CONFIG_COREDUMP=y ++ ++# ++# Memory Management options ++# ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++CONFIG_HAVE_MEMBLOCK=y ++CONFIG_NO_BOOTMEM=y ++CONFIG_MEMORY_ISOLATION=y ++CONFIG_SPLIT_PTLOCK_CPUS=4 ++CONFIG_COMPACTION=y ++CONFIG_MIGRATION=y ++CONFIG_BOUNCE=y ++# CONFIG_KSM is not set ++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 ++# CONFIG_CLEANCACHE is not set ++# CONFIG_FRONTSWAP is not set ++CONFIG_CMA=y ++# CONFIG_CMA_DEBUG is not set ++# CONFIG_CMA_DEBUGFS is not set ++CONFIG_CMA_AREAS=7 ++# CONFIG_ZPOOL is not set ++# CONFIG_ZBUD is not set ++# CONFIG_ZSMALLOC is not set ++CONFIG_GENERIC_EARLY_IOREMAP=y ++# CONFIG_IDLE_PAGE_TRACKING is not set ++# CONFIG_PERCPU_STATS is not set ++# CONFIG_GUP_BENCHMARK is not set ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++# CONFIG_PACKET_DIAG is not set ++CONFIG_UNIX=y ++# CONFIG_UNIX_DIAG is not set ++# CONFIG_TLS is not set ++CONFIG_XFRM=y ++# CONFIG_XFRM_USER is not set ++# CONFIG_XFRM_SUB_POLICY is not set ++# CONFIG_XFRM_MIGRATE is not set ++# CONFIG_XFRM_STATISTICS is not set ++# CONFIG_NET_KEY is not set ++CONFIG_INET=y ++# CONFIG_IP_MULTICAST is not set ++# CONFIG_IP_ADVANCED_ROUTER is not set ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++CONFIG_IP_PNP_BOOTP=y ++# CONFIG_IP_PNP_RARP is not set ++# CONFIG_NET_IPIP is not set ++# CONFIG_NET_IPGRE_DEMUX is not set ++# CONFIG_SYN_COOKIES is not set ++# CONFIG_NET_IPVTI is not set ++# CONFIG_NET_FOU is not set ++# CONFIG_INET_AH is not set ++# CONFIG_INET_ESP is not set ++# CONFIG_INET_IPCOMP is not set ++CONFIG_INET_XFRM_MODE_TRANSPORT=y ++CONFIG_INET_XFRM_MODE_TUNNEL=y ++CONFIG_INET_XFRM_MODE_BEET=y ++CONFIG_INET_DIAG=y ++CONFIG_INET_TCP_DIAG=y ++# CONFIG_INET_UDP_DIAG is not set ++# CONFIG_INET_RAW_DIAG is not set ++# CONFIG_INET_DIAG_DESTROY is not set ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++# CONFIG_TCP_MD5SIG is not set ++# CONFIG_IPV6 is not set ++# CONFIG_NETWORK_SECMARK is not set ++# CONFIG_NETWORK_PHY_TIMESTAMPING is not set ++# CONFIG_NETFILTER is not set ++# CONFIG_BPFILTER is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_RDS is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++# CONFIG_L2TP is not set ++# CONFIG_BRIDGE is not set ++CONFIG_HAVE_NET_DSA=y ++# CONFIG_NET_DSA is not set ++# CONFIG_VLAN_8021Q is not set ++# CONFIG_DECNET is not set ++# CONFIG_LLC2 is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_PHONET is not set ++# CONFIG_IEEE802154 is not set ++# CONFIG_NET_SCHED is not set ++# CONFIG_DCB is not set ++CONFIG_DNS_RESOLVER=y ++# CONFIG_BATMAN_ADV is not set ++# CONFIG_OPENVSWITCH is not set ++# CONFIG_VSOCKETS is not set ++# CONFIG_NETLINK_DIAG is not set ++# CONFIG_MPLS is not set ++# CONFIG_NET_NSH is not set ++# CONFIG_HSR is not set ++# CONFIG_NET_SWITCHDEV is not set ++# CONFIG_NET_L3_MASTER_DEV is not set ++# CONFIG_NET_NCSI is not set ++CONFIG_RPS=y ++CONFIG_RFS_ACCEL=y ++CONFIG_XPS=y ++# CONFIG_CGROUP_NET_PRIO is not set ++# CONFIG_CGROUP_NET_CLASSID is not set ++CONFIG_NET_RX_BUSY_POLL=y ++CONFIG_BQL=y ++# CONFIG_BPF_JIT is not set ++CONFIG_NET_FLOW_LIMIT=y ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_NET_DROP_MONITOR is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_CAN is not set ++# CONFIG_BT is not set ++# CONFIG_AF_RXRPC is not set ++# CONFIG_AF_KCM is not set ++# CONFIG_WIRELESS is not set ++# CONFIG_WIMAX is not set ++# CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set ++# CONFIG_CAIF is not set ++# CONFIG_CEPH_LIB is not set ++# CONFIG_NFC is not set ++# CONFIG_PSAMPLE is not set ++# CONFIG_NET_IFE is not set ++# CONFIG_LWTUNNEL is not set ++CONFIG_GRO_CELLS=y ++# CONFIG_NET_DEVLINK is not set ++CONFIG_MAY_USE_DEVLINK=y ++# CONFIG_FAILOVER is not set ++CONFIG_HAVE_EBPF_JIT=y ++ ++# ++# Device Drivers ++# ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER=y ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_DEVTMPFS=y ++# CONFIG_DEVTMPFS_MOUNT is not set ++CONFIG_STANDALONE=y ++CONFIG_PREVENT_FIRMWARE_BUILD=y ++ ++# ++# Firmware loader ++# ++CONFIG_FW_LOADER=y ++CONFIG_EXTRA_FIRMWARE="" ++# CONFIG_FW_LOADER_USER_HELPER is not set ++CONFIG_ALLOW_DEV_COREDUMP=y ++# CONFIG_DEBUG_DRIVER is not set ++# CONFIG_DEBUG_DEVRES is not set ++# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set ++# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set ++CONFIG_GENERIC_CPU_AUTOPROBE=y ++CONFIG_REGMAP=y ++CONFIG_REGMAP_I2C=y ++CONFIG_REGMAP_SPI=y ++CONFIG_REGMAP_MMIO=y ++CONFIG_DMA_SHARED_BUFFER=y ++# CONFIG_DMA_FENCE_TRACE is not set ++CONFIG_DMA_CMA=y ++ ++# ++# Default contiguous memory area size: ++# ++CONFIG_CMA_SIZE_MBYTES=32 ++CONFIG_CMA_SIZE_SEL_MBYTES=y ++# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set ++# CONFIG_CMA_SIZE_SEL_MIN is not set ++# CONFIG_CMA_SIZE_SEL_MAX is not set ++CONFIG_CMA_ALIGNMENT=8 ++CONFIG_GENERIC_ARCH_TOPOLOGY=y ++ ++# ++# Bus devices ++# ++# CONFIG_BRCMSTB_GISB_ARB is not set ++# CONFIG_VEXPRESS_CONFIG is not set ++# CONFIG_CONNECTOR is not set ++# CONFIG_GNSS is not set ++CONFIG_MTD=y ++CONFIG_MTD_TESTS=m ++# CONFIG_MTD_REDBOOT_PARTS is not set ++CONFIG_MTD_CMDLINE_PARTS=y ++# CONFIG_MTD_AFS_PARTS is not set ++CONFIG_MTD_OF_PARTS=y ++# CONFIG_MTD_AR7_PARTS is not set ++ ++# ++# Partition parsers ++# ++ ++# ++# User Modules And Translation Layers ++# ++CONFIG_MTD_BLKDEVS=y ++CONFIG_MTD_BLOCK=y ++# CONFIG_FTL is not set ++# CONFIG_NFTL is not set ++# CONFIG_INFTL is not set ++# CONFIG_RFD_FTL is not set ++# CONFIG_SSFDC is not set ++# CONFIG_SM_FTL is not set ++# CONFIG_MTD_OOPS is not set ++# CONFIG_MTD_SWAP is not set ++CONFIG_MTD_PARTITIONED_MASTER=y ++ ++# ++# RAM/ROM/Flash chip drivers ++# ++# CONFIG_MTD_CFI is not set ++# CONFIG_MTD_JEDECPROBE is not set ++CONFIG_MTD_MAP_BANK_WIDTH_1=y ++CONFIG_MTD_MAP_BANK_WIDTH_2=y ++CONFIG_MTD_MAP_BANK_WIDTH_4=y ++CONFIG_MTD_CFI_I1=y ++CONFIG_MTD_CFI_I2=y ++# CONFIG_MTD_RAM is not set ++# CONFIG_MTD_ROM is not set ++# CONFIG_MTD_ABSENT is not set ++ ++# ++# Mapping drivers for chip access ++# ++# CONFIG_MTD_COMPLEX_MAPPINGS is not set ++# CONFIG_MTD_PLATRAM is not set ++ ++# ++# Self-contained MTD device drivers ++# ++# CONFIG_MTD_DATAFLASH is not set ++CONFIG_MTD_M25P80=y ++# CONFIG_MTD_MCHP23K256 is not set ++# CONFIG_MTD_SST25L is not set ++# CONFIG_MTD_SLRAM is not set ++# CONFIG_MTD_PHRAM is not set ++# CONFIG_MTD_MTDRAM is not set ++# CONFIG_MTD_BLOCK2MTD is not set ++ ++# ++# Disk-On-Chip Device Drivers ++# ++# CONFIG_MTD_DOCG3 is not set ++CONFIG_MTD_NAND_CORE=y ++# CONFIG_MTD_ONENAND is not set ++# CONFIG_MTD_NAND is not set ++CONFIG_MTD_SPI_NAND=y ++ ++# ++# LPDDR & LPDDR2 PCM memory drivers ++# ++# CONFIG_MTD_LPDDR is not set ++# CONFIG_MTD_LPDDR2_NVM is not set ++CONFIG_MTD_SPI_NOR=y ++# CONFIG_MTD_MT81xx_NOR is not set ++# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set ++# CONFIG_SPI_CADENCE_QUADSPI is not set ++CONFIG_MTD_UBI=y ++CONFIG_MTD_UBI_WL_THRESHOLD=4096 ++CONFIG_MTD_UBI_BEB_LIMIT=20 ++# CONFIG_MTD_UBI_FASTMAP is not set ++# CONFIG_MTD_UBI_GLUEBI is not set ++# CONFIG_MTD_UBI_BLOCK is not set ++CONFIG_DTC=y ++CONFIG_OF=y ++# CONFIG_OF_UNITTEST is not set ++CONFIG_OF_FLATTREE=y ++CONFIG_OF_EARLY_FLATTREE=y ++CONFIG_OF_KOBJ=y ++CONFIG_OF_ADDRESS=y ++CONFIG_OF_IRQ=y ++CONFIG_OF_NET=y ++CONFIG_OF_MDIO=y ++CONFIG_OF_RESERVED_MEM=y ++# CONFIG_OF_OVERLAY is not set ++CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y ++# CONFIG_PARPORT is not set ++CONFIG_BLK_DEV=y ++CONFIG_BLK_DEV_NULL_BLK=y ++# CONFIG_BLK_DEV_LOOP is not set ++# CONFIG_BLK_DEV_DRBD is not set ++# CONFIG_BLK_DEV_NBD is not set ++CONFIG_BLK_DEV_RAM=y ++CONFIG_BLK_DEV_RAM_COUNT=16 ++CONFIG_BLK_DEV_RAM_SIZE=8192 ++# CONFIG_CDROM_PKTCDVD is not set ++# CONFIG_ATA_OVER_ETH is not set ++# CONFIG_BLK_DEV_RBD is not set ++ ++# ++# NVME Support ++# ++# CONFIG_NVME_FC is not set ++# CONFIG_NVME_TARGET is not set ++ ++# ++# Misc devices ++# ++# CONFIG_AD525X_DPOT is not set ++# CONFIG_DUMMY_IRQ is not set ++# CONFIG_ICS932S401 is not set ++# CONFIG_ENCLOSURE_SERVICES is not set ++# CONFIG_APDS9802ALS is not set ++# CONFIG_ISL29003 is not set ++# CONFIG_ISL29020 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_SENSORS_BH1770 is not set ++# CONFIG_SENSORS_APDS990X is not set ++# CONFIG_HMC6352 is not set ++# CONFIG_DS1682 is not set ++# CONFIG_USB_SWITCH_FSA9480 is not set ++# CONFIG_LATTICE_ECP3_CONFIG is not set ++# CONFIG_SRAM is not set ++# CONFIG_C2PORT is not set ++ ++# ++# EEPROM support ++# ++# CONFIG_EEPROM_AT24 is not set ++# CONFIG_EEPROM_AT25 is not set ++# CONFIG_EEPROM_LEGACY is not set ++# CONFIG_EEPROM_MAX6875 is not set ++# CONFIG_EEPROM_93CX6 is not set ++# CONFIG_EEPROM_93XX46 is not set ++# CONFIG_EEPROM_IDT_89HPESX is not set ++ ++# ++# Texas Instruments shared transport line discipline ++# ++# CONFIG_TI_ST is not set ++# CONFIG_SENSORS_LIS3_SPI is not set ++# CONFIG_SENSORS_LIS3_I2C is not set ++# CONFIG_ALTERA_STAPL is not set ++ ++# ++# Intel MIC & related support ++# ++ ++# ++# Intel MIC Bus Driver ++# ++ ++# ++# SCIF Bus Driver ++# ++ ++# ++# VOP Bus Driver ++# ++ ++# ++# Intel MIC Host Driver ++# ++ ++# ++# Intel MIC Card Driver ++# ++ ++# ++# SCIF Driver ++# ++ ++# ++# Intel MIC Coprocessor State Management (COSM) Drivers ++# ++ ++# ++# VOP Driver ++# ++# CONFIG_ECHO is not set ++# CONFIG_MISC_RTSX_USB is not set ++ ++# ++# SCSI device support ++# ++CONFIG_SCSI_MOD=y ++# CONFIG_RAID_ATTRS is not set ++CONFIG_SCSI=y ++CONFIG_SCSI_DMA=y ++CONFIG_SCSI_MQ_DEFAULT=y ++# CONFIG_SCSI_PROC_FS is not set ++ ++# ++# SCSI support type (disk, tape, CD-ROM) ++# ++CONFIG_BLK_DEV_SD=y ++# CONFIG_CHR_DEV_ST is not set ++# CONFIG_CHR_DEV_OSST is not set ++# CONFIG_BLK_DEV_SR is not set ++# CONFIG_CHR_DEV_SG is not set ++# CONFIG_CHR_DEV_SCH is not set ++# CONFIG_SCSI_CONSTANTS is not set ++# CONFIG_SCSI_LOGGING is not set ++# CONFIG_SCSI_SCAN_ASYNC is not set ++ ++# ++# SCSI Transports ++# ++# CONFIG_SCSI_SPI_ATTRS is not set ++# CONFIG_SCSI_FC_ATTRS is not set ++# CONFIG_SCSI_ISCSI_ATTRS is not set ++# CONFIG_SCSI_SAS_ATTRS is not set ++# CONFIG_SCSI_SAS_LIBSAS is not set ++# CONFIG_SCSI_SRP_ATTRS is not set ++CONFIG_SCSI_LOWLEVEL=y ++# CONFIG_ISCSI_TCP is not set ++# CONFIG_ISCSI_BOOT_SYSFS is not set ++# CONFIG_SCSI_UFSHCD is not set ++# CONFIG_SCSI_DEBUG is not set ++# CONFIG_SCSI_DH is not set ++# CONFIG_SCSI_OSD_INITIATOR is not set ++# CONFIG_ATA is not set ++# CONFIG_MD is not set ++# CONFIG_TARGET_CORE is not set ++CONFIG_NETDEVICES=y ++CONFIG_MII=y ++CONFIG_NET_CORE=y ++# CONFIG_BONDING is not set ++# CONFIG_DUMMY is not set ++# CONFIG_EQUALIZER is not set ++# CONFIG_NET_TEAM is not set ++# CONFIG_MACVLAN is not set ++# CONFIG_VXLAN is not set ++# CONFIG_GENEVE is not set ++# CONFIG_GTP is not set ++# CONFIG_MACSEC is not set ++# CONFIG_NETCONSOLE is not set ++# CONFIG_TUN is not set ++# CONFIG_TUN_VNET_CROSS_LE is not set ++# CONFIG_VETH is not set ++# CONFIG_NLMON is not set ++ ++# ++# CAIF transport drivers ++# ++ ++# ++# Distributed Switch Architecture drivers ++# ++CONFIG_ETHERNET=y ++# CONFIG_NET_VENDOR_ALACRITECH is not set ++# CONFIG_ALTERA_TSE is not set ++# CONFIG_NET_VENDOR_AMAZON is not set ++# CONFIG_NET_VENDOR_AQUANTIA is not set ++# CONFIG_NET_VENDOR_ARC is not set ++# CONFIG_NET_VENDOR_AURORA is not set ++# CONFIG_NET_VENDOR_BROADCOM is not set ++# CONFIG_NET_VENDOR_CADENCE is not set ++# CONFIG_NET_VENDOR_CAVIUM is not set ++# CONFIG_NET_VENDOR_CIRRUS is not set ++# CONFIG_NET_VENDOR_CORTINA is not set ++# CONFIG_DM9000 is not set ++# CONFIG_DNET is not set ++# CONFIG_NET_VENDOR_EZCHIP is not set ++# CONFIG_NET_VENDOR_FARADAY is not set ++# CONFIG_NET_VENDOR_HISILICON is not set ++# CONFIG_NET_VENDOR_HUAWEI is not set ++# CONFIG_NET_VENDOR_INTEL is not set ++# CONFIG_NET_VENDOR_MARVELL is not set ++# CONFIG_NET_VENDOR_MELLANOX is not set ++# CONFIG_NET_VENDOR_MICREL is not set ++CONFIG_NET_VENDOR_MICROCHIP=y ++# CONFIG_ENC28J60 is not set ++# CONFIG_ENCX24J600 is not set ++# CONFIG_NET_VENDOR_MICROSEMI is not set ++# CONFIG_NET_VENDOR_NATSEMI is not set ++# CONFIG_NET_VENDOR_NETRONOME is not set ++# CONFIG_NET_VENDOR_NI is not set ++# CONFIG_ETHOC is not set ++# CONFIG_NET_VENDOR_QUALCOMM is not set ++# CONFIG_NET_VENDOR_RENESAS is not set ++# CONFIG_NET_VENDOR_ROCKER is not set ++# CONFIG_NET_VENDOR_SAMSUNG is not set ++# CONFIG_NET_VENDOR_SEEQ is not set ++# CONFIG_NET_VENDOR_SOLARFLARE is not set ++# CONFIG_NET_VENDOR_SMSC is not set ++# CONFIG_NET_VENDOR_SOCIONEXT is not set ++CONFIG_NET_VENDOR_STMICRO=y ++CONFIG_STMMAC_ETH=y ++CONFIG_STMMAC_PLATFORM=y ++# CONFIG_DWMAC_DWC_QOS_ETH is not set ++# CONFIG_DWMAC_GENERIC is not set ++CONFIG_DWMAC_AXERA=y ++CONFIG_DWMAC_AXERA_AX620=y ++# CONFIG_DWMAC_AXERA_HAPS is not set ++# CONFIG_NET_VENDOR_SYNOPSYS is not set ++# CONFIG_NET_VENDOR_VIA is not set ++# CONFIG_NET_VENDOR_WIZNET is not set ++CONFIG_MDIO_DEVICE=y ++CONFIG_MDIO_BUS=y ++# CONFIG_MDIO_BCM_UNIMAC is not set ++# CONFIG_MDIO_BITBANG is not set ++# CONFIG_MDIO_BUS_MUX_GPIO is not set ++# CONFIG_MDIO_BUS_MUX_MMIOREG is not set ++# CONFIG_MDIO_HISI_FEMAC is not set ++# CONFIG_MDIO_MSCC_MIIM is not set ++CONFIG_PHYLIB=y ++CONFIG_SWPHY=y ++ ++# ++# MII PHY device drivers ++# ++# CONFIG_AMD_PHY is not set ++# CONFIG_AQUANTIA_PHY is not set ++# CONFIG_AX88796B_PHY is not set ++# CONFIG_AT803X_PHY is not set ++# CONFIG_BCM7XXX_PHY is not set ++# CONFIG_BCM87XX_PHY is not set ++# CONFIG_BROADCOM_PHY is not set ++# CONFIG_CICADA_PHY is not set ++# CONFIG_CORTINA_PHY is not set ++# CONFIG_DAVICOM_PHY is not set ++# CONFIG_DP83822_PHY is not set ++# CONFIG_DP83TC811_PHY is not set ++# CONFIG_DP83848_PHY is not set ++# CONFIG_DP83867_PHY is not set ++CONFIG_FIXED_PHY=y ++# CONFIG_ICPLUS_PHY is not set ++# CONFIG_INTEL_XWAY_PHY is not set ++# CONFIG_LSI_ET1011C_PHY is not set ++# CONFIG_LXT_PHY is not set ++CONFIG_MARVELL_PHY=y ++# CONFIG_MARVELL_10G_PHY is not set ++# CONFIG_MICREL_PHY is not set ++# CONFIG_MICROCHIP_PHY is not set ++# CONFIG_MICROCHIP_T1_PHY is not set ++# CONFIG_MICROSEMI_PHY is not set ++# CONFIG_NATIONAL_PHY is not set ++# CONFIG_QSEMI_PHY is not set ++CONFIG_REALTEK_PHY=y ++# CONFIG_RENESAS_PHY is not set ++# CONFIG_ROCKCHIP_PHY is not set ++# CONFIG_SMSC_PHY is not set ++# CONFIG_STE10XP is not set ++# CONFIG_TERANETICS_PHY is not set ++# CONFIG_VITESSE_PHY is not set ++# CONFIG_XILINX_GMII2RGMII is not set ++# CONFIG_MICREL_KS8995MA is not set ++# CONFIG_PPP is not set ++# CONFIG_SLIP is not set ++CONFIG_USB_NET_DRIVERS=y ++# CONFIG_USB_CATC is not set ++# CONFIG_USB_KAWETH is not set ++# CONFIG_USB_PEGASUS is not set ++# CONFIG_USB_RTL8150 is not set ++# CONFIG_USB_RTL8152 is not set ++# CONFIG_USB_LAN78XX is not set ++# CONFIG_USB_USBNET is not set ++# CONFIG_USB_IPHETH is not set ++# CONFIG_WLAN is not set ++ ++# ++# Enable WiMAX (Networking options) to see the WiMAX drivers ++# ++# CONFIG_WAN is not set ++# CONFIG_NETDEVSIM is not set ++# CONFIG_NET_FAILOVER is not set ++# CONFIG_ISDN is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=y ++# CONFIG_INPUT_FF_MEMLESS is not set ++# CONFIG_INPUT_POLLDEV is not set ++# CONFIG_INPUT_SPARSEKMAP is not set ++# CONFIG_INPUT_MATRIXKMAP is not set ++ ++# ++# Userland interfaces ++# ++# CONFIG_INPUT_MOUSEDEV is not set ++# CONFIG_INPUT_JOYDEV is not set ++CONFIG_INPUT_EVDEV=y ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++CONFIG_INPUT_KEYBOARD=y ++# CONFIG_KEYBOARD_ADP5588 is not set ++# CONFIG_KEYBOARD_ADP5589 is not set ++CONFIG_KEYBOARD_ATKBD=y ++# CONFIG_KEYBOARD_QT1070 is not set ++# CONFIG_KEYBOARD_QT2160 is not set ++# CONFIG_KEYBOARD_DLINK_DIR685 is not set ++# CONFIG_KEYBOARD_LKKBD is not set ++# CONFIG_KEYBOARD_GPIO is not set ++# CONFIG_KEYBOARD_GPIO_POLLED is not set ++# CONFIG_KEYBOARD_TCA6416 is not set ++# CONFIG_KEYBOARD_TCA8418 is not set ++# CONFIG_KEYBOARD_MATRIX is not set ++# CONFIG_KEYBOARD_LM8333 is not set ++# CONFIG_KEYBOARD_MAX7359 is not set ++# CONFIG_KEYBOARD_MCS is not set ++# CONFIG_KEYBOARD_MPR121 is not set ++# CONFIG_KEYBOARD_NEWTON is not set ++# CONFIG_KEYBOARD_OPENCORES is not set ++# CONFIG_KEYBOARD_SAMSUNG is not set ++# CONFIG_KEYBOARD_STOWAWAY is not set ++# CONFIG_KEYBOARD_SUNKBD is not set ++# CONFIG_KEYBOARD_OMAP4 is not set ++# CONFIG_KEYBOARD_XTKBD is not set ++# CONFIG_KEYBOARD_CAP11XX is not set ++# CONFIG_KEYBOARD_BCM is not set ++CONFIG_INPUT_MOUSE=y ++CONFIG_MOUSE_PS2=y ++CONFIG_MOUSE_PS2_ALPS=y ++CONFIG_MOUSE_PS2_BYD=y ++CONFIG_MOUSE_PS2_LOGIPS2PP=y ++CONFIG_MOUSE_PS2_SYNAPTICS=y ++CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y ++CONFIG_MOUSE_PS2_CYPRESS=y ++CONFIG_MOUSE_PS2_TRACKPOINT=y ++# CONFIG_MOUSE_PS2_ELANTECH is not set ++# CONFIG_MOUSE_PS2_SENTELIC is not set ++# CONFIG_MOUSE_PS2_TOUCHKIT is not set ++CONFIG_MOUSE_PS2_FOCALTECH=y ++CONFIG_MOUSE_PS2_SMBUS=y ++# CONFIG_MOUSE_SERIAL is not set ++# CONFIG_MOUSE_APPLETOUCH is not set ++# CONFIG_MOUSE_BCM5974 is not set ++# CONFIG_MOUSE_CYAPA is not set ++# CONFIG_MOUSE_ELAN_I2C is not set ++# CONFIG_MOUSE_VSXXXAA is not set ++# CONFIG_MOUSE_GPIO is not set ++# CONFIG_MOUSE_SYNAPTICS_I2C is not set ++# CONFIG_MOUSE_SYNAPTICS_USB is not set ++# CONFIG_INPUT_JOYSTICK is not set ++# CONFIG_INPUT_TABLET is not set ++# CONFIG_INPUT_TOUCHSCREEN is not set ++# CONFIG_INPUT_MISC is not set ++# CONFIG_RMI4_CORE is not set ++ ++# ++# Hardware I/O ports ++# ++CONFIG_SERIO=y ++# CONFIG_SERIO_SERPORT is not set ++CONFIG_SERIO_LIBPS2=y ++# CONFIG_SERIO_RAW is not set ++# CONFIG_SERIO_ALTERA_PS2 is not set ++# CONFIG_SERIO_PS2MULT is not set ++# CONFIG_SERIO_ARC_PS2 is not set ++# CONFIG_SERIO_APBPS2 is not set ++# CONFIG_SERIO_GPIO_PS2 is not set ++# CONFIG_USERIO is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++CONFIG_TTY=y ++CONFIG_VT=y ++CONFIG_CONSOLE_TRANSLATIONS=y ++CONFIG_VT_CONSOLE=y ++CONFIG_HW_CONSOLE=y ++CONFIG_VT_HW_CONSOLE_BINDING=y ++CONFIG_UNIX98_PTYS=y ++CONFIG_LEGACY_PTYS=y ++CONFIG_LEGACY_PTY_COUNT=16 ++# CONFIG_SERIAL_NONSTANDARD is not set ++# CONFIG_N_GSM is not set ++# CONFIG_TRACE_SINK is not set ++CONFIG_LDISC_AUTOLOAD=y ++CONFIG_DEVMEM=y ++# CONFIG_DEVKMEM is not set ++ ++# ++# Serial drivers ++# ++CONFIG_SERIAL_EARLYCON=y ++CONFIG_SERIAL_8250=y ++CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y ++# CONFIG_SERIAL_8250_FINTEK is not set ++CONFIG_SERIAL_8250_CONSOLE=y ++CONFIG_SERIAL_8250_DMA=y ++CONFIG_SERIAL_8250_NR_UARTS=4 ++CONFIG_SERIAL_8250_RUNTIME_UARTS=4 ++# CONFIG_SERIAL_8250_EXTENDED is not set ++# CONFIG_SERIAL_8250_ASPEED_VUART is not set ++CONFIG_SERIAL_8250_FSL=y ++CONFIG_SERIAL_8250_DW=y ++# CONFIG_SERIAL_8250_EM is not set ++# CONFIG_SERIAL_8250_RT288X is not set ++# CONFIG_SERIAL_OF_PLATFORM is not set ++ ++# ++# Non-8250 serial port support ++# ++# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set ++# CONFIG_SERIAL_MAX3100 is not set ++# CONFIG_SERIAL_MAX310X is not set ++# CONFIG_SERIAL_UARTLITE is not set ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++# CONFIG_SERIAL_SCCNXP is not set ++# CONFIG_SERIAL_SC16IS7XX is not set ++# CONFIG_SERIAL_BCM63XX is not set ++# CONFIG_SERIAL_ALTERA_JTAGUART is not set ++# CONFIG_SERIAL_ALTERA_UART is not set ++# CONFIG_SERIAL_IFX6X60 is not set ++# CONFIG_SERIAL_XILINX_PS_UART is not set ++# CONFIG_SERIAL_ARC is not set ++# CONFIG_SERIAL_FSL_LPUART is not set ++# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set ++# CONFIG_SERIAL_ST_ASC is not set ++# CONFIG_SERIAL_DEV_BUS is not set ++# CONFIG_HVC_DCC is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set ++# CONFIG_XILLYBUS is not set ++ ++# ++# I2C support ++# ++CONFIG_I2C=y ++CONFIG_I2C_BOARDINFO=y ++CONFIG_I2C_COMPAT=y ++CONFIG_I2C_CHARDEV=y ++CONFIG_I2C_MUX=y ++ ++# ++# Multiplexer I2C Chip support ++# ++# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set ++# CONFIG_I2C_MUX_GPIO is not set ++# CONFIG_I2C_MUX_GPMUX is not set ++# CONFIG_I2C_MUX_LTC4306 is not set ++# CONFIG_I2C_MUX_PCA9541 is not set ++# CONFIG_I2C_MUX_PCA954x is not set ++# CONFIG_I2C_MUX_PINCTRL is not set ++# CONFIG_I2C_MUX_REG is not set ++# CONFIG_I2C_DEMUX_PINCTRL is not set ++# CONFIG_I2C_MUX_MLXCPLD is not set ++CONFIG_I2C_HELPER_AUTO=y ++CONFIG_I2C_ALGOBIT=y ++ ++# ++# I2C Hardware Bus support ++# ++ ++# ++# I2C system bus drivers (mostly embedded / system-on-chip) ++# ++# CONFIG_I2C_CBUS_GPIO is not set ++CONFIG_I2C_DESIGNWARE_CORE=y ++CONFIG_I2C_DESIGNWARE_PLATFORM=y ++# CONFIG_I2C_DESIGNWARE_SLAVE is not set ++# CONFIG_I2C_EMEV2 is not set ++# CONFIG_I2C_GPIO is not set ++# CONFIG_I2C_OCORES is not set ++# CONFIG_I2C_PCA_PLATFORM is not set ++# CONFIG_I2C_RK3X is not set ++# CONFIG_I2C_SIMTEC is not set ++# CONFIG_I2C_XILINX is not set ++ ++# ++# External I2C/SMBus adapter drivers ++# ++# CONFIG_I2C_DIOLAN_U2C is not set ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_ROBOTFUZZ_OSIF is not set ++# CONFIG_I2C_TAOS_EVM is not set ++# CONFIG_I2C_TINY_USB is not set ++ ++# ++# Other I2C/SMBus bus drivers ++# ++# CONFIG_I2C_STUB is not set ++# CONFIG_I2C_SLAVE is not set ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++CONFIG_SPI=y ++# CONFIG_SPI_DEBUG is not set ++CONFIG_SPI_MASTER=y ++CONFIG_SPI_MEM=y ++ ++# ++# SPI Master Controller Drivers ++# ++# CONFIG_SPI_ALTERA is not set ++# CONFIG_SPI_AXI_SPI_ENGINE is not set ++# CONFIG_SPI_BITBANG is not set ++# CONFIG_SPI_CADENCE is not set ++CONFIG_SPI_DESIGNWARE=y ++CONFIG_SPI_AXERA=y ++# CONFIG_SPI_DW_AXERA_DMA is not set ++CONFIG_SPI_DW_MMIO=y ++CONFIG_SPI_AXERA_MMIO=y ++# CONFIG_SPI_GPIO is not set ++# CONFIG_SPI_FSL_SPI is not set ++# CONFIG_SPI_OC_TINY is not set ++# CONFIG_SPI_ROCKCHIP is not set ++# CONFIG_SPI_SC18IS602 is not set ++# CONFIG_SPI_XCOMM is not set ++# CONFIG_SPI_XILINX is not set ++# CONFIG_SPI_ZYNQMP_GQSPI is not set ++ ++# ++# SPI Protocol Masters ++# ++# CONFIG_SPI_SPIDEV is not set ++# CONFIG_SPI_LOOPBACK_TEST is not set ++# CONFIG_SPI_TLE62X0 is not set ++# CONFIG_SPI_SLAVE is not set ++# CONFIG_SPMI is not set ++# CONFIG_HSI is not set ++# CONFIG_PPS is not set ++ ++# ++# PTP clock support ++# ++# CONFIG_PTP_1588_CLOCK is not set ++ ++# ++# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. ++# ++CONFIG_PINCTRL=y ++CONFIG_GENERIC_PINCTRL_GROUPS=y ++CONFIG_PINMUX=y ++CONFIG_GENERIC_PINMUX_FUNCTIONS=y ++CONFIG_PINCONF=y ++CONFIG_GENERIC_PINCONF=y ++# CONFIG_DEBUG_PINCTRL is not set ++# CONFIG_PINCTRL_AMD is not set ++# CONFIG_PINCTRL_MCP23S08 is not set ++CONFIG_PINCTRL_SINGLE=y ++# CONFIG_PINCTRL_SX150X is not set ++CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y ++CONFIG_GPIOLIB=y ++CONFIG_GPIOLIB_FASTPATH_LIMIT=512 ++CONFIG_OF_GPIO=y ++# CONFIG_DEBUG_GPIO is not set ++CONFIG_GPIO_SYSFS=y ++CONFIG_GPIO_GENERIC=y ++ ++# ++# Memory mapped GPIO drivers ++# ++# CONFIG_GPIO_74XX_MMIO is not set ++# CONFIG_GPIO_ALTERA is not set ++CONFIG_GPIO_DWAPB=y ++# CONFIG_GPIO_FTGPIO010 is not set ++CONFIG_GPIO_GENERIC_PLATFORM=y ++# CONFIG_GPIO_GRGPIO is not set ++# CONFIG_GPIO_HLWD is not set ++# CONFIG_GPIO_MB86S7X is not set ++# CONFIG_GPIO_MOCKUP is not set ++# CONFIG_GPIO_MPC8XXX is not set ++# CONFIG_GPIO_SYSCON is not set ++# CONFIG_GPIO_XILINX is not set ++# CONFIG_GPIO_ZEVIO is not set ++ ++# ++# I2C GPIO expanders ++# ++# CONFIG_GPIO_ADP5588 is not set ++# CONFIG_GPIO_ADNP is not set ++# CONFIG_GPIO_MAX7300 is not set ++# CONFIG_GPIO_MAX732X is not set ++# CONFIG_GPIO_PCA953X is not set ++# CONFIG_GPIO_PCF857X is not set ++# CONFIG_GPIO_TPIC2810 is not set ++ ++# ++# MFD GPIO expanders ++# ++# CONFIG_HTC_EGPIO is not set ++ ++# ++# SPI GPIO expanders ++# ++# CONFIG_GPIO_74X164 is not set ++# CONFIG_GPIO_MAX3191X is not set ++# CONFIG_GPIO_MAX7301 is not set ++# CONFIG_GPIO_MC33880 is not set ++# CONFIG_GPIO_PISOSR is not set ++# CONFIG_GPIO_XRA1403 is not set ++ ++# ++# USB GPIO expanders ++# ++# CONFIG_W1 is not set ++# CONFIG_POWER_AVS is not set ++# CONFIG_POWER_RESET is not set ++CONFIG_POWER_SUPPLY=y ++# CONFIG_POWER_SUPPLY_DEBUG is not set ++# CONFIG_PDA_POWER is not set ++# CONFIG_TEST_POWER is not set ++# CONFIG_CHARGER_ADP5061 is not set ++# CONFIG_BATTERY_DS2780 is not set ++# CONFIG_BATTERY_DS2781 is not set ++# CONFIG_BATTERY_DS2782 is not set ++# CONFIG_BATTERY_SBS is not set ++# CONFIG_CHARGER_SBS is not set ++# CONFIG_MANAGER_SBS is not set ++# CONFIG_BATTERY_BQ27XXX is not set ++# CONFIG_BATTERY_MAX17040 is not set ++# CONFIG_BATTERY_MAX17042 is not set ++# CONFIG_CHARGER_MAX8903 is not set ++# CONFIG_CHARGER_LP8727 is not set ++# CONFIG_CHARGER_GPIO is not set ++# CONFIG_CHARGER_LTC3651 is not set ++# CONFIG_CHARGER_DETECTOR_MAX14656 is not set ++# CONFIG_CHARGER_BQ2415X is not set ++# CONFIG_CHARGER_BQ24257 is not set ++# CONFIG_CHARGER_BQ24735 is not set ++# CONFIG_CHARGER_BQ25890 is not set ++# CONFIG_CHARGER_SMB347 is not set ++# CONFIG_BATTERY_GAUGE_LTC2941 is not set ++# CONFIG_CHARGER_RT9455 is not set ++# CONFIG_HWMON is not set ++CONFIG_THERMAL=y ++# CONFIG_THERMAL_STATISTICS is not set ++CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 ++CONFIG_THERMAL_OF=y ++# CONFIG_THERMAL_WRITABLE_TRIPS is not set ++CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y ++# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set ++# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set ++# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set ++# CONFIG_THERMAL_GOV_FAIR_SHARE is not set ++CONFIG_THERMAL_GOV_STEP_WISE=y ++# CONFIG_THERMAL_GOV_BANG_BANG is not set ++# CONFIG_THERMAL_GOV_USER_SPACE is not set ++CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y ++# CONFIG_THERMAL_EMULATION is not set ++# CONFIG_QORIQ_THERMAL is not set ++ ++# ++# ACPI INT340X thermal drivers ++# ++CONFIG_AX_THERMAL=y ++CONFIG_WATCHDOG=y ++CONFIG_WATCHDOG_CORE=y ++# CONFIG_WATCHDOG_NOWAYOUT is not set ++CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y ++# CONFIG_WATCHDOG_SYSFS is not set ++ ++# ++# Watchdog Device Drivers ++# ++# CONFIG_SOFT_WATCHDOG is not set ++# CONFIG_GPIO_WATCHDOG is not set ++# CONFIG_XILINX_WATCHDOG is not set ++# CONFIG_ZIIRAVE_WATCHDOG is not set ++# CONFIG_CADENCE_WATCHDOG is not set ++# CONFIG_FTWDT010_WATCHDOG is not set ++CONFIG_DW_WATCHDOG=y ++# CONFIG_MAX63XX_WATCHDOG is not set ++# CONFIG_MEN_A21_WDT is not set ++ ++# ++# USB-based Watchdog Cards ++# ++# CONFIG_USBPCWATCHDOG is not set ++ ++# ++# Watchdog Pretimeout Governors ++# ++# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set ++CONFIG_BCMA_POSSIBLE=y ++# CONFIG_BCMA is not set ++ ++# ++# Multifunction device drivers ++# ++# CONFIG_MFD_ACT8945A is not set ++# CONFIG_MFD_AS3711 is not set ++# CONFIG_MFD_AS3722 is not set ++# CONFIG_PMIC_ADP5520 is not set ++# CONFIG_MFD_AAT2870_CORE is not set ++# CONFIG_MFD_ATMEL_FLEXCOM is not set ++# CONFIG_MFD_ATMEL_HLCDC is not set ++# CONFIG_MFD_BCM590XX is not set ++# CONFIG_MFD_BD9571MWV is not set ++# CONFIG_MFD_AXP20X_I2C is not set ++# CONFIG_MFD_CROS_EC is not set ++# CONFIG_MFD_MADERA is not set ++# CONFIG_MFD_ASIC3 is not set ++# CONFIG_PMIC_DA903X is not set ++# CONFIG_MFD_DA9052_SPI is not set ++# CONFIG_MFD_DA9052_I2C is not set ++# CONFIG_MFD_DA9055 is not set ++# CONFIG_MFD_DA9062 is not set ++# CONFIG_MFD_DA9063 is not set ++# CONFIG_MFD_DA9150 is not set ++# CONFIG_MFD_DLN2 is not set ++# CONFIG_MFD_MC13XXX_SPI is not set ++# CONFIG_MFD_MC13XXX_I2C is not set ++# CONFIG_MFD_HI6421_PMIC is not set ++# CONFIG_HTC_PASIC3 is not set ++# CONFIG_HTC_I2CPLD is not set ++# CONFIG_MFD_KEMPLD is not set ++# CONFIG_MFD_88PM800 is not set ++# CONFIG_MFD_88PM805 is not set ++# CONFIG_MFD_88PM860X is not set ++# CONFIG_MFD_MAX14577 is not set ++# CONFIG_MFD_MAX77620 is not set ++# CONFIG_MFD_MAX77686 is not set ++# CONFIG_MFD_MAX77693 is not set ++# CONFIG_MFD_MAX77843 is not set ++# CONFIG_MFD_MAX8907 is not set ++# CONFIG_MFD_MAX8925 is not set ++# CONFIG_MFD_MAX8997 is not set ++# CONFIG_MFD_MAX8998 is not set ++# CONFIG_MFD_MT6397 is not set ++# CONFIG_MFD_MENF21BMC is not set ++# CONFIG_EZX_PCAP is not set ++# CONFIG_MFD_CPCAP is not set ++# CONFIG_MFD_VIPERBOARD is not set ++# CONFIG_MFD_RETU is not set ++# CONFIG_MFD_PCF50633 is not set ++# CONFIG_MFD_PM8XXX is not set ++# CONFIG_MFD_RT5033 is not set ++# CONFIG_MFD_RC5T583 is not set ++# CONFIG_MFD_RK808 is not set ++# CONFIG_MFD_RN5T618 is not set ++# CONFIG_MFD_SEC_CORE is not set ++# CONFIG_MFD_SI476X_CORE is not set ++# CONFIG_MFD_SM501 is not set ++# CONFIG_MFD_SKY81452 is not set ++# CONFIG_MFD_SMSC is not set ++# CONFIG_ABX500_CORE is not set ++# CONFIG_MFD_STMPE is not set ++CONFIG_MFD_SYSCON=y ++# CONFIG_MFD_TI_AM335X_TSCADC is not set ++# CONFIG_MFD_LP3943 is not set ++# CONFIG_MFD_LP8788 is not set ++# CONFIG_MFD_TI_LMU is not set ++# CONFIG_MFD_PALMAS is not set ++# CONFIG_TPS6105X is not set ++# CONFIG_TPS65010 is not set ++# CONFIG_TPS6507X is not set ++# CONFIG_MFD_TPS65086 is not set ++# CONFIG_MFD_TPS65090 is not set ++# CONFIG_MFD_TPS65217 is not set ++# CONFIG_MFD_TI_LP873X is not set ++# CONFIG_MFD_TI_LP87565 is not set ++# CONFIG_MFD_TPS65218 is not set ++# CONFIG_MFD_TPS6586X is not set ++# CONFIG_MFD_TPS65910 is not set ++# CONFIG_MFD_TPS65912_I2C is not set ++# CONFIG_MFD_TPS65912_SPI is not set ++# CONFIG_MFD_TPS80031 is not set ++# CONFIG_TWL4030_CORE is not set ++# CONFIG_TWL6040_CORE is not set ++# CONFIG_MFD_WL1273_CORE is not set ++# CONFIG_MFD_LM3533 is not set ++# CONFIG_MFD_TC3589X is not set ++# CONFIG_MFD_T7L66XB is not set ++# CONFIG_MFD_TC6387XB is not set ++# CONFIG_MFD_TC6393XB is not set ++# CONFIG_MFD_ARIZONA_I2C is not set ++# CONFIG_MFD_ARIZONA_SPI is not set ++# CONFIG_MFD_WM8400 is not set ++# CONFIG_MFD_WM831X_I2C is not set ++# CONFIG_MFD_WM831X_SPI is not set ++# CONFIG_MFD_WM8350_I2C is not set ++# CONFIG_MFD_WM8994 is not set ++# CONFIG_MFD_ROHM_BD718XX is not set ++# CONFIG_REGULATOR is not set ++# CONFIG_RC_CORE is not set ++# CONFIG_MEDIA_SUPPORT is not set ++ ++# ++# Graphics support ++# ++# CONFIG_IMX_IPUV3_CORE is not set ++CONFIG_DRM=y ++CONFIG_DRM_MIPI_DSI=y ++# CONFIG_DRM_DP_AUX_CHARDEV is not set ++# CONFIG_DRM_DEBUG_MM is not set ++# CONFIG_DRM_DEBUG_SELFTEST is not set ++CONFIG_DRM_KMS_HELPER=y ++CONFIG_DRM_KMS_FB_HELPER=y ++CONFIG_DRM_FBDEV_EMULATION=y ++CONFIG_DRM_FBDEV_OVERALLOC=100 ++# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set ++# CONFIG_DRM_DP_CEC is not set ++CONFIG_DRM_GEM_CMA_HELPER=y ++CONFIG_DRM_KMS_CMA_HELPER=y ++ ++# ++# I2C encoder or helper chips ++# ++# CONFIG_DRM_I2C_CH7006 is not set ++# CONFIG_DRM_I2C_SIL164 is not set ++# CONFIG_DRM_I2C_NXP_TDA998X is not set ++# CONFIG_DRM_I2C_NXP_TDA9950 is not set ++# CONFIG_DRM_HDLCD is not set ++# CONFIG_DRM_MALI_DISPLAY is not set ++ ++# ++# ACP (Audio CoProcessor) Configuration ++# ++ ++# ++# AMD Library routines ++# ++# CONFIG_DRM_VGEM is not set ++# CONFIG_DRM_VKMS is not set ++# CONFIG_DRM_EXYNOS is not set ++# CONFIG_DRM_UDL is not set ++# CONFIG_DRM_ARMADA is not set ++# CONFIG_DRM_RCAR_DW_HDMI is not set ++# CONFIG_DRM_RCAR_LVDS is not set ++# CONFIG_DRM_OMAP is not set ++# CONFIG_DRM_TILCDC is not set ++# CONFIG_DRM_FSL_DCU is not set ++# CONFIG_DRM_STM is not set ++CONFIG_DRM_PANEL=y ++ ++# ++# Display Panels ++# ++# CONFIG_DRM_PANEL_ARM_VERSATILE is not set ++# CONFIG_DRM_PANEL_LVDS is not set ++CONFIG_DRM_PANEL_SIMPLE=y ++# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set ++# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set ++# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set ++# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set ++# CONFIG_DRM_PANEL_LG_LG4573 is not set ++# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set ++# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set ++# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set ++# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set ++# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set ++# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set ++# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set ++# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set ++CONFIG_DRM_BRIDGE=y ++CONFIG_DRM_PANEL_BRIDGE=y ++ ++# ++# Display Interface Bridges ++# ++# CONFIG_DRM_ANALOGIX_ANX78XX is not set ++CONFIG_DRM_CDNS_DSI=y ++# CONFIG_DRM_DUMB_VGA_DAC is not set ++# CONFIG_DRM_LVDS_ENCODER is not set ++# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set ++# CONFIG_DRM_NXP_PTN3460 is not set ++# CONFIG_DRM_PARADE_PS8622 is not set ++# CONFIG_DRM_SIL_SII8620 is not set ++# CONFIG_DRM_SII902X is not set ++# CONFIG_DRM_SII9234 is not set ++# CONFIG_DRM_THINE_THC63LVD1024 is not set ++# CONFIG_DRM_TOSHIBA_TC358767 is not set ++# CONFIG_DRM_TI_TFP410 is not set ++# CONFIG_DRM_I2C_ADV7511 is not set ++# CONFIG_DRM_STI is not set ++# CONFIG_DRM_ARCPGU is not set ++# CONFIG_DRM_MXSFB is not set ++CONFIG_DRM_TINYDRM=y ++# CONFIG_TINYDRM_ILI9225 is not set ++# CONFIG_TINYDRM_ILI9341 is not set ++# CONFIG_TINYDRM_MI0283QT is not set ++# CONFIG_TINYDRM_REPAPER is not set ++# CONFIG_TINYDRM_ST7586 is not set ++# CONFIG_TINYDRM_ST7735R is not set ++# CONFIG_DRM_PL111 is not set ++# CONFIG_DRM_TVE200 is not set ++CONFIG_DRM_AXERA=y ++# CONFIG_DRM_LEGACY is not set ++CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y ++ ++# ++# Frame buffer Devices ++# ++CONFIG_FB_CMDLINE=y ++CONFIG_FB_NOTIFY=y ++CONFIG_FB=y ++# CONFIG_FIRMWARE_EDID is not set ++CONFIG_FB_CFB_FILLRECT=y ++CONFIG_FB_CFB_COPYAREA=y ++CONFIG_FB_CFB_IMAGEBLIT=y ++CONFIG_FB_SYS_FILLRECT=y ++CONFIG_FB_SYS_COPYAREA=y ++CONFIG_FB_SYS_IMAGEBLIT=y ++# CONFIG_FB_FOREIGN_ENDIAN is not set ++CONFIG_FB_SYS_FOPS=y ++CONFIG_FB_DEFERRED_IO=y ++CONFIG_FB_MODE_HELPERS=y ++# CONFIG_FB_TILEBLITTING is not set ++ ++# ++# Frame buffer hardware drivers ++# ++# CONFIG_FB_OPENCORES is not set ++# CONFIG_FB_S1D13XXX is not set ++# CONFIG_FB_SMSCUFX is not set ++# CONFIG_FB_UDL is not set ++# CONFIG_FB_IBM_GXT4500 is not set ++# CONFIG_FB_VIRTUAL is not set ++# CONFIG_FB_METRONOME is not set ++# CONFIG_FB_BROADSHEET is not set ++# CONFIG_FB_SIMPLE is not set ++# CONFIG_FB_SSD1307 is not set ++CONFIG_BACKLIGHT_LCD_SUPPORT=y ++CONFIG_LCD_CLASS_DEVICE=m ++# CONFIG_LCD_L4F00242T03 is not set ++# CONFIG_LCD_LMS283GF05 is not set ++# CONFIG_LCD_LTV350QV is not set ++# CONFIG_LCD_ILI922X is not set ++# CONFIG_LCD_ILI9320 is not set ++# CONFIG_LCD_TDO24M is not set ++# CONFIG_LCD_VGG2432A4 is not set ++# CONFIG_LCD_PLATFORM is not set ++# CONFIG_LCD_S6E63M0 is not set ++# CONFIG_LCD_LD9040 is not set ++# CONFIG_LCD_AMS369FG06 is not set ++# CONFIG_LCD_LMS501KF03 is not set ++# CONFIG_LCD_HX8357 is not set ++# CONFIG_LCD_OTM3225A is not set ++CONFIG_BACKLIGHT_CLASS_DEVICE=y ++CONFIG_BACKLIGHT_GENERIC=y ++# CONFIG_BACKLIGHT_PWM is not set ++# CONFIG_BACKLIGHT_PM8941_WLED is not set ++# CONFIG_BACKLIGHT_ADP8860 is not set ++# CONFIG_BACKLIGHT_ADP8870 is not set ++# CONFIG_BACKLIGHT_LM3630A is not set ++# CONFIG_BACKLIGHT_LM3639 is not set ++# CONFIG_BACKLIGHT_LP855X is not set ++# CONFIG_BACKLIGHT_GPIO is not set ++# CONFIG_BACKLIGHT_LV5207LP is not set ++# CONFIG_BACKLIGHT_BD6107 is not set ++# CONFIG_BACKLIGHT_ARCXCNN is not set ++CONFIG_VIDEOMODE_HELPERS=y ++CONFIG_HDMI=y ++ ++# ++# Console display driver support ++# ++CONFIG_DUMMY_CONSOLE=y ++CONFIG_FRAMEBUFFER_CONSOLE=y ++CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y ++# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set ++# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set ++CONFIG_LOGO=y ++# CONFIG_LOGO_LINUX_MONO is not set ++# CONFIG_LOGO_LINUX_VGA16 is not set ++CONFIG_LOGO_LINUX_CLUT224=y ++CONFIG_SOUND=y ++CONFIG_SND=y ++CONFIG_SND_TIMER=y ++CONFIG_SND_PCM=y ++CONFIG_SND_JACK=y ++CONFIG_SND_JACK_INPUT_DEV=y ++# CONFIG_SND_OSSEMUL is not set ++CONFIG_SND_PCM_TIMER=y ++# CONFIG_SND_HRTIMER is not set ++# CONFIG_SND_DYNAMIC_MINORS is not set ++CONFIG_SND_SUPPORT_OLD_API=y ++CONFIG_SND_PROC_FS=y ++CONFIG_SND_VERBOSE_PROCFS=y ++# CONFIG_SND_VERBOSE_PRINTK is not set ++# CONFIG_SND_DEBUG is not set ++# CONFIG_SND_SEQUENCER is not set ++CONFIG_SND_DRIVERS=y ++# CONFIG_SND_DUMMY is not set ++# CONFIG_SND_ALOOP is not set ++# CONFIG_SND_MTPAV is not set ++# CONFIG_SND_SERIAL_U16550 is not set ++# CONFIG_SND_MPU401 is not set ++ ++# ++# HD-Audio ++# ++CONFIG_SND_HDA_PREALLOC_SIZE=64 ++CONFIG_SND_ARM=y ++CONFIG_SND_SPI=y ++CONFIG_SND_USB=y ++# CONFIG_SND_USB_AUDIO is not set ++# CONFIG_SND_USB_UA101 is not set ++# CONFIG_SND_USB_CAIAQ is not set ++# CONFIG_SND_USB_6FIRE is not set ++# CONFIG_SND_USB_HIFACE is not set ++# CONFIG_SND_BCD2000 is not set ++# CONFIG_SND_USB_POD is not set ++# CONFIG_SND_USB_PODHD is not set ++# CONFIG_SND_USB_TONEPORT is not set ++# CONFIG_SND_USB_VARIAX is not set ++CONFIG_SND_SOC=y ++# CONFIG_SND_SOC_AMD_ACP is not set ++# CONFIG_SND_ATMEL_SOC is not set ++# CONFIG_SND_DESIGNWARE_I2S is not set ++ ++# ++# SoC Audio for Freescale CPUs ++# ++ ++# ++# Common SoC Audio options for Freescale CPUs: ++# ++# CONFIG_SND_SOC_FSL_ASRC is not set ++# CONFIG_SND_SOC_FSL_SAI is not set ++# CONFIG_SND_SOC_FSL_SSI is not set ++# CONFIG_SND_SOC_FSL_SPDIF is not set ++# CONFIG_SND_SOC_FSL_ESAI is not set ++# CONFIG_SND_SOC_IMX_AUDMUX is not set ++# CONFIG_SND_I2S_HI6210_I2S is not set ++# CONFIG_SND_SOC_IMG is not set ++ ++# ++# STMicroelectronics STM32 SOC audio support ++# ++# CONFIG_SND_SOC_XTFPGA_I2S is not set ++# CONFIG_ZX_TDM is not set ++CONFIG_SND_SOC_I2C_AND_SPI=y ++ ++# ++# CODEC drivers ++# ++# CONFIG_SND_SOC_AC97_CODEC is not set ++# CONFIG_SND_SOC_ADAU1701 is not set ++# CONFIG_SND_SOC_ADAU1761_I2C is not set ++# CONFIG_SND_SOC_ADAU1761_SPI is not set ++# CONFIG_SND_SOC_ADAU7002 is not set ++# CONFIG_SND_SOC_AK4104 is not set ++# CONFIG_SND_SOC_AK4458 is not set ++# CONFIG_SND_SOC_AK4554 is not set ++# CONFIG_SND_SOC_AK4613 is not set ++# CONFIG_SND_SOC_AK4642 is not set ++# CONFIG_SND_SOC_AK5386 is not set ++# CONFIG_SND_SOC_AK5558 is not set ++# CONFIG_SND_SOC_ALC5623 is not set ++# CONFIG_SND_SOC_BD28623 is not set ++# CONFIG_SND_SOC_BT_SCO is not set ++# CONFIG_SND_SOC_CS35L32 is not set ++# CONFIG_SND_SOC_CS35L33 is not set ++# CONFIG_SND_SOC_CS35L34 is not set ++# CONFIG_SND_SOC_CS35L35 is not set ++# CONFIG_SND_SOC_CS42L42 is not set ++# CONFIG_SND_SOC_CS42L51_I2C is not set ++# CONFIG_SND_SOC_CS42L52 is not set ++# CONFIG_SND_SOC_CS42L56 is not set ++# CONFIG_SND_SOC_CS42L73 is not set ++# CONFIG_SND_SOC_CS4265 is not set ++# CONFIG_SND_SOC_CS4270 is not set ++# CONFIG_SND_SOC_CS4271_I2C is not set ++# CONFIG_SND_SOC_CS4271_SPI is not set ++# CONFIG_SND_SOC_CS42XX8_I2C is not set ++# CONFIG_SND_SOC_CS43130 is not set ++# CONFIG_SND_SOC_CS4349 is not set ++# CONFIG_SND_SOC_CS53L30 is not set ++# CONFIG_SND_SOC_HDMI_CODEC is not set ++# CONFIG_SND_SOC_ES7134 is not set ++# CONFIG_SND_SOC_ES7241 is not set ++# CONFIG_SND_SOC_ES8316 is not set ++# CONFIG_SND_SOC_ES8328_I2C is not set ++# CONFIG_SND_SOC_ES8328_SPI is not set ++# CONFIG_SND_SOC_GTM601 is not set ++# CONFIG_SND_SOC_INNO_RK3036 is not set ++# CONFIG_SND_SOC_MAX98504 is not set ++# CONFIG_SND_SOC_MAX9867 is not set ++# CONFIG_SND_SOC_MAX98927 is not set ++# CONFIG_SND_SOC_MAX98373 is not set ++# CONFIG_SND_SOC_MAX9860 is not set ++# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set ++# CONFIG_SND_SOC_PCM1681 is not set ++# CONFIG_SND_SOC_PCM1789_I2C is not set ++# CONFIG_SND_SOC_PCM179X_I2C is not set ++# CONFIG_SND_SOC_PCM179X_SPI is not set ++# CONFIG_SND_SOC_PCM186X_I2C is not set ++# CONFIG_SND_SOC_PCM186X_SPI is not set ++# CONFIG_SND_SOC_PCM3168A_I2C is not set ++# CONFIG_SND_SOC_PCM3168A_SPI is not set ++# CONFIG_SND_SOC_PCM512x_I2C is not set ++# CONFIG_SND_SOC_PCM512x_SPI is not set ++# CONFIG_SND_SOC_RT5616 is not set ++# CONFIG_SND_SOC_RT5631 is not set ++# CONFIG_SND_SOC_SGTL5000 is not set ++# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set ++# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set ++# CONFIG_SND_SOC_SPDIF is not set ++# CONFIG_SND_SOC_SSM2305 is not set ++# CONFIG_SND_SOC_SSM2602_SPI is not set ++# CONFIG_SND_SOC_SSM2602_I2C is not set ++# CONFIG_SND_SOC_SSM4567 is not set ++# CONFIG_SND_SOC_STA32X is not set ++# CONFIG_SND_SOC_STA350 is not set ++# CONFIG_SND_SOC_STI_SAS is not set ++# CONFIG_SND_SOC_TAS2552 is not set ++# CONFIG_SND_SOC_TAS5086 is not set ++# CONFIG_SND_SOC_TAS571X is not set ++# CONFIG_SND_SOC_TAS5720 is not set ++# CONFIG_SND_SOC_TAS6424 is not set ++# CONFIG_SND_SOC_TDA7419 is not set ++# CONFIG_SND_SOC_TFA9879 is not set ++# CONFIG_SND_SOC_TLV320AIC23_I2C is not set ++# CONFIG_SND_SOC_TLV320AIC23_SPI is not set ++# CONFIG_SND_SOC_TLV320AIC31XX is not set ++# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set ++# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set ++# CONFIG_SND_SOC_TLV320AIC3X is not set ++# CONFIG_SND_SOC_TS3A227E is not set ++# CONFIG_SND_SOC_TSCS42XX is not set ++# CONFIG_SND_SOC_TSCS454 is not set ++# CONFIG_SND_SOC_WM8510 is not set ++# CONFIG_SND_SOC_WM8523 is not set ++# CONFIG_SND_SOC_WM8524 is not set ++# CONFIG_SND_SOC_WM8580 is not set ++# CONFIG_SND_SOC_WM8711 is not set ++# CONFIG_SND_SOC_WM8728 is not set ++# CONFIG_SND_SOC_WM8731 is not set ++# CONFIG_SND_SOC_WM8737 is not set ++# CONFIG_SND_SOC_WM8741 is not set ++# CONFIG_SND_SOC_WM8750 is not set ++# CONFIG_SND_SOC_WM8753 is not set ++# CONFIG_SND_SOC_WM8770 is not set ++# CONFIG_SND_SOC_WM8776 is not set ++# CONFIG_SND_SOC_WM8782 is not set ++# CONFIG_SND_SOC_WM8804_I2C is not set ++# CONFIG_SND_SOC_WM8804_SPI is not set ++# CONFIG_SND_SOC_WM8903 is not set ++# CONFIG_SND_SOC_WM8960 is not set ++# CONFIG_SND_SOC_WM8962 is not set ++# CONFIG_SND_SOC_WM8974 is not set ++# CONFIG_SND_SOC_WM8978 is not set ++# CONFIG_SND_SOC_WM8985 is not set ++# CONFIG_SND_SOC_ZX_AUD96P22 is not set ++# CONFIG_SND_SOC_MAX9759 is not set ++# CONFIG_SND_SOC_MT6351 is not set ++# CONFIG_SND_SOC_NAU8540 is not set ++# CONFIG_SND_SOC_NAU8810 is not set ++# CONFIG_SND_SOC_NAU8824 is not set ++# CONFIG_SND_SOC_TPA6130A2 is not set ++# CONFIG_SND_SIMPLE_CARD is not set ++# CONFIG_SND_SIMPLE_SCU_CARD is not set ++# CONFIG_SND_AUDIO_GRAPH_CARD is not set ++# CONFIG_SND_AUDIO_GRAPH_SCU_CARD is not set ++ ++# ++# HID support ++# ++CONFIG_HID=y ++# CONFIG_HID_BATTERY_STRENGTH is not set ++# CONFIG_HIDRAW is not set ++# CONFIG_UHID is not set ++CONFIG_HID_GENERIC=y ++ ++# ++# Special HID drivers ++# ++CONFIG_HID_A4TECH=y ++# CONFIG_HID_ACCUTOUCH is not set ++# CONFIG_HID_ACRUX is not set ++CONFIG_HID_APPLE=y ++# CONFIG_HID_APPLEIR is not set ++# CONFIG_HID_AUREAL is not set ++CONFIG_HID_BELKIN=y ++# CONFIG_HID_BETOP_FF is not set ++CONFIG_HID_CHERRY=y ++CONFIG_HID_CHICONY=y ++# CONFIG_HID_COUGAR is not set ++# CONFIG_HID_PRODIKEYS is not set ++# CONFIG_HID_CMEDIA is not set ++CONFIG_HID_CYPRESS=y ++CONFIG_HID_DRAGONRISE=y ++# CONFIG_DRAGONRISE_FF is not set ++# CONFIG_HID_EMS_FF is not set ++# CONFIG_HID_ELECOM is not set ++# CONFIG_HID_ELO is not set ++CONFIG_HID_EZKEY=y ++# CONFIG_HID_GEMBIRD is not set ++# CONFIG_HID_GFRM is not set ++# CONFIG_HID_HOLTEK is not set ++# CONFIG_HID_KEYTOUCH is not set ++# CONFIG_HID_KYE is not set ++# CONFIG_HID_UCLOGIC is not set ++# CONFIG_HID_WALTOP is not set ++CONFIG_HID_GYRATION=y ++# CONFIG_HID_ICADE is not set ++CONFIG_HID_ITE=y ++# CONFIG_HID_JABRA is not set ++CONFIG_HID_TWINHAN=y ++CONFIG_HID_KENSINGTON=y ++# CONFIG_HID_LCPOWER is not set ++# CONFIG_HID_LENOVO is not set ++CONFIG_HID_LOGITECH=y ++# CONFIG_HID_LOGITECH_HIDPP is not set ++# CONFIG_LOGITECH_FF is not set ++# CONFIG_LOGIRUMBLEPAD2_FF is not set ++# CONFIG_LOGIG940_FF is not set ++# CONFIG_LOGIWHEELS_FF is not set ++# CONFIG_HID_MAGICMOUSE is not set ++# CONFIG_HID_MAYFLASH is not set ++CONFIG_HID_REDRAGON=y ++CONFIG_HID_MICROSOFT=y ++CONFIG_HID_MONTEREY=y ++# CONFIG_HID_MULTITOUCH is not set ++# CONFIG_HID_NTI is not set ++# CONFIG_HID_NTRIG is not set ++# CONFIG_HID_ORTEK is not set ++CONFIG_HID_PANTHERLORD=y ++# CONFIG_PANTHERLORD_FF is not set ++# CONFIG_HID_PENMOUNT is not set ++CONFIG_HID_PETALYNX=y ++# CONFIG_HID_PICOLCD is not set ++# CONFIG_HID_PLANTRONICS is not set ++# CONFIG_HID_PRIMAX is not set ++# CONFIG_HID_RETRODE is not set ++# CONFIG_HID_ROCCAT is not set ++# CONFIG_HID_SAITEK is not set ++CONFIG_HID_SAMSUNG=y ++# CONFIG_HID_SPEEDLINK is not set ++# CONFIG_HID_STEAM is not set ++# CONFIG_HID_STEELSERIES is not set ++CONFIG_HID_SUNPLUS=y ++# CONFIG_HID_RMI is not set ++CONFIG_HID_GREENASIA=y ++# CONFIG_GREENASIA_FF is not set ++CONFIG_HID_SMARTJOYPLUS=y ++# CONFIG_SMARTJOYPLUS_FF is not set ++# CONFIG_HID_TIVO is not set ++CONFIG_HID_TOPSEED=y ++CONFIG_HID_THRUSTMASTER=y ++# CONFIG_THRUSTMASTER_FF is not set ++# CONFIG_HID_UDRAW_PS3 is not set ++# CONFIG_HID_WACOM is not set ++# CONFIG_HID_XINMO is not set ++CONFIG_HID_ZEROPLUS=y ++# CONFIG_ZEROPLUS_FF is not set ++# CONFIG_HID_ZYDACRON is not set ++# CONFIG_HID_SENSOR_HUB is not set ++# CONFIG_HID_ALPS is not set ++ ++# ++# USB HID support ++# ++CONFIG_USB_HID=y ++# CONFIG_HID_PID is not set ++# CONFIG_USB_HIDDEV is not set ++ ++# ++# I2C HID support ++# ++# CONFIG_I2C_HID is not set ++CONFIG_USB_OHCI_LITTLE_ENDIAN=y ++CONFIG_USB_SUPPORT=y ++CONFIG_USB_COMMON=y ++CONFIG_USB_ARCH_HAS_HCD=y ++CONFIG_USB=y ++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y ++ ++# ++# Miscellaneous USB options ++# ++CONFIG_USB_DEFAULT_PERSIST=y ++# CONFIG_USB_DYNAMIC_MINORS is not set ++# CONFIG_USB_OTG_WHITELIST is not set ++# CONFIG_USB_MON is not set ++# CONFIG_USB_WUSB_CBAF is not set ++ ++# ++# USB Host Controller Drivers ++# ++# CONFIG_USB_C67X00_HCD is not set ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DBGCAP=y ++CONFIG_USB_XHCI_PLATFORM=y ++# CONFIG_USB_EHCI_HCD is not set ++# CONFIG_USB_OXU210HP_HCD is not set ++# CONFIG_USB_ISP116X_HCD is not set ++# CONFIG_USB_FOTG210_HCD is not set ++# CONFIG_USB_MAX3421_HCD is not set ++# CONFIG_USB_OHCI_HCD is not set ++# CONFIG_USB_SL811_HCD is not set ++# CONFIG_USB_R8A66597_HCD is not set ++# CONFIG_USB_HCD_TEST_MODE is not set ++ ++# ++# USB Device Class drivers ++# ++CONFIG_USB_ACM=y ++# CONFIG_USB_PRINTER is not set ++# CONFIG_USB_WDM is not set ++# CONFIG_USB_TMC is not set ++ ++# ++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may ++# ++ ++# ++# also be needed; see USB_STORAGE Help for more info ++# ++CONFIG_USB_STORAGE=y ++# CONFIG_USB_STORAGE_DEBUG is not set ++# CONFIG_USB_STORAGE_REALTEK is not set ++# CONFIG_USB_STORAGE_DATAFAB is not set ++# CONFIG_USB_STORAGE_FREECOM is not set ++# CONFIG_USB_STORAGE_ISD200 is not set ++# CONFIG_USB_STORAGE_USBAT is not set ++# CONFIG_USB_STORAGE_SDDR09 is not set ++# CONFIG_USB_STORAGE_SDDR55 is not set ++# CONFIG_USB_STORAGE_JUMPSHOT is not set ++# CONFIG_USB_STORAGE_ALAUDA is not set ++# CONFIG_USB_STORAGE_ONETOUCH is not set ++# CONFIG_USB_STORAGE_KARMA is not set ++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set ++# CONFIG_USB_STORAGE_ENE_UB6250 is not set ++CONFIG_USB_UAS=y ++ ++# ++# USB Imaging devices ++# ++# CONFIG_USB_MDC800 is not set ++# CONFIG_USB_MICROTEK is not set ++# CONFIG_USBIP_CORE is not set ++# CONFIG_USB_MUSB_HDRC is not set ++# CONFIG_USB_DWC3 is not set ++# CONFIG_USB_DWC2 is not set ++CONFIG_USB_CDNS3=y ++CONFIG_USB_CDNS3_GADGET=y ++CONFIG_USB_CDNS3_HOST=y ++CONFIG_USB_CDNS3_AXERA=y ++# CONFIG_USB_CHIPIDEA is not set ++# CONFIG_USB_ISP1760 is not set ++ ++# ++# USB port drivers ++# ++CONFIG_USB_SERIAL=y ++# CONFIG_USB_SERIAL_CONSOLE is not set ++CONFIG_USB_SERIAL_GENERIC=y ++# CONFIG_USB_SERIAL_SIMPLE is not set ++# CONFIG_USB_SERIAL_AIRCABLE is not set ++# CONFIG_USB_SERIAL_ARK3116 is not set ++# CONFIG_USB_SERIAL_BELKIN is not set ++CONFIG_USB_SERIAL_CH341=y ++# CONFIG_USB_SERIAL_WHITEHEAT is not set ++# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set ++# CONFIG_USB_SERIAL_CP210X is not set ++# CONFIG_USB_SERIAL_CYPRESS_M8 is not set ++# CONFIG_USB_SERIAL_EMPEG is not set ++# CONFIG_USB_SERIAL_FTDI_SIO is not set ++# CONFIG_USB_SERIAL_VISOR is not set ++# CONFIG_USB_SERIAL_IPAQ is not set ++# CONFIG_USB_SERIAL_IR is not set ++# CONFIG_USB_SERIAL_EDGEPORT is not set ++# CONFIG_USB_SERIAL_EDGEPORT_TI is not set ++# CONFIG_USB_SERIAL_F81232 is not set ++# CONFIG_USB_SERIAL_F8153X is not set ++# CONFIG_USB_SERIAL_GARMIN is not set ++# CONFIG_USB_SERIAL_IPW is not set ++# CONFIG_USB_SERIAL_IUU is not set ++# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set ++# CONFIG_USB_SERIAL_KEYSPAN is not set ++# CONFIG_USB_SERIAL_KLSI is not set ++# CONFIG_USB_SERIAL_KOBIL_SCT is not set ++# CONFIG_USB_SERIAL_MCT_U232 is not set ++# CONFIG_USB_SERIAL_METRO is not set ++# CONFIG_USB_SERIAL_MOS7720 is not set ++# CONFIG_USB_SERIAL_MOS7840 is not set ++# CONFIG_USB_SERIAL_MXUPORT is not set ++# CONFIG_USB_SERIAL_NAVMAN is not set ++CONFIG_USB_SERIAL_PL2303=y ++# CONFIG_USB_SERIAL_OTI6858 is not set ++# CONFIG_USB_SERIAL_QCAUX is not set ++# CONFIG_USB_SERIAL_QUALCOMM is not set ++# CONFIG_USB_SERIAL_SPCP8X5 is not set ++# CONFIG_USB_SERIAL_SAFE is not set ++# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set ++# CONFIG_USB_SERIAL_SYMBOL is not set ++# CONFIG_USB_SERIAL_TI is not set ++# CONFIG_USB_SERIAL_CYBERJACK is not set ++# CONFIG_USB_SERIAL_XIRCOM is not set ++# CONFIG_USB_SERIAL_OPTION is not set ++# CONFIG_USB_SERIAL_OMNINET is not set ++# CONFIG_USB_SERIAL_OPTICON is not set ++# CONFIG_USB_SERIAL_XSENS_MT is not set ++# CONFIG_USB_SERIAL_WISHBONE is not set ++# CONFIG_USB_SERIAL_SSU100 is not set ++# CONFIG_USB_SERIAL_QT2 is not set ++# CONFIG_USB_SERIAL_UPD78F0730 is not set ++# CONFIG_USB_SERIAL_DEBUG is not set ++ ++# ++# USB Miscellaneous drivers ++# ++# CONFIG_USB_EMI62 is not set ++# CONFIG_USB_EMI26 is not set ++# CONFIG_USB_ADUTUX is not set ++# CONFIG_USB_SEVSEG is not set ++# CONFIG_USB_LEGOTOWER is not set ++# CONFIG_USB_LCD is not set ++# CONFIG_USB_CYPRESS_CY7C63 is not set ++# CONFIG_USB_CYTHERM is not set ++# CONFIG_USB_IDMOUSE is not set ++# CONFIG_USB_FTDI_ELAN is not set ++# CONFIG_USB_APPLEDISPLAY is not set ++# CONFIG_USB_LD is not set ++# CONFIG_USB_TRANCEVIBRATOR is not set ++# CONFIG_USB_IOWARRIOR is not set ++CONFIG_USB_TEST=y ++# CONFIG_USB_EHSET_TEST_FIXTURE is not set ++# CONFIG_USB_ISIGHTFW is not set ++# CONFIG_USB_YUREX is not set ++# CONFIG_USB_EZUSB_FX2 is not set ++# CONFIG_USB_HUB_USB251XB is not set ++# CONFIG_USB_HSIC_USB3503 is not set ++# CONFIG_USB_HSIC_USB4604 is not set ++# CONFIG_USB_LINK_LAYER_TEST is not set ++ ++# ++# USB Physical Layer drivers ++# ++# CONFIG_NOP_USB_XCEIV is not set ++# CONFIG_USB_GPIO_VBUS is not set ++# CONFIG_USB_ISP1301 is not set ++# CONFIG_USB_ULPI is not set ++CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG is not set ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++# CONFIG_USB_GADGET_DEBUG_FS is not set ++CONFIG_USB_GADGET_VBUS_DRAW=2 ++CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 ++# CONFIG_U_SERIAL_CONSOLE is not set ++ ++# ++# USB Peripheral Controller ++# ++# CONFIG_USB_FUSB300 is not set ++# CONFIG_USB_FOTG210_UDC is not set ++# CONFIG_USB_GR_UDC is not set ++# CONFIG_USB_R8A66597 is not set ++# CONFIG_USB_PXA27X is not set ++# CONFIG_USB_MV_UDC is not set ++# CONFIG_USB_MV_U3D is not set ++# CONFIG_USB_SNP_UDC_PLAT is not set ++# CONFIG_USB_M66592 is not set ++# CONFIG_USB_BDC_UDC is not set ++# CONFIG_USB_NET2272 is not set ++# CONFIG_USB_GADGET_XILINX is not set ++# CONFIG_USB_DUMMY_HCD is not set ++CONFIG_USB_LIBCOMPOSITE=y ++CONFIG_USB_F_ACM=y ++CONFIG_USB_F_SS_LB=y ++CONFIG_USB_U_SERIAL=y ++CONFIG_USB_U_ETHER=y ++CONFIG_USB_F_SERIAL=y ++CONFIG_USB_F_RNDIS=y ++CONFIG_USB_F_MASS_STORAGE=y ++CONFIG_USB_CONFIGFS=y ++CONFIG_USB_CONFIGFS_SERIAL=y ++CONFIG_USB_CONFIGFS_ACM=y ++# CONFIG_USB_CONFIGFS_OBEX is not set ++# CONFIG_USB_CONFIGFS_NCM is not set ++# CONFIG_USB_CONFIGFS_ECM is not set ++# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set ++CONFIG_USB_CONFIGFS_RNDIS=y ++# CONFIG_USB_CONFIGFS_EEM is not set ++CONFIG_USB_CONFIGFS_MASS_STORAGE=y ++CONFIG_USB_CONFIGFS_F_LB_SS=y ++# CONFIG_USB_CONFIGFS_F_FS is not set ++# CONFIG_USB_CONFIGFS_F_UAC1 is not set ++# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set ++# CONFIG_USB_CONFIGFS_F_UAC2 is not set ++# CONFIG_USB_CONFIGFS_F_MIDI is not set ++# CONFIG_USB_CONFIGFS_F_HID is not set ++# CONFIG_USB_CONFIGFS_F_PRINTER is not set ++CONFIG_TYPEC=y ++CONFIG_TYPEC_TCPM=y ++CONFIG_TYPEC_TCPCI=y ++# CONFIG_TYPEC_RT1711H is not set ++CONFIG_TYPEC_SGM7220=y ++# CONFIG_TYPEC_FUSB302 is not set ++# CONFIG_TYPEC_UCSI is not set ++# CONFIG_TYPEC_TPS6598X is not set ++ ++# ++# USB Type-C Multiplexer/DeMultiplexer Switch support ++# ++# CONFIG_TYPEC_MUX_PI3USB30532 is not set ++ ++# ++# USB Type-C Alternate Mode drivers ++# ++# CONFIG_TYPEC_DP_ALTMODE is not set ++CONFIG_USB_ROLE_SWITCH=y ++# CONFIG_USB_ULPI_BUS is not set ++# CONFIG_UWB is not set ++CONFIG_MMC=y ++CONFIG_PWRSEQ_EMMC=y ++CONFIG_PWRSEQ_SIMPLE=y ++CONFIG_MMC_BLOCK=y ++CONFIG_MMC_BLOCK_MINORS=8 ++# CONFIG_SDIO_UART is not set ++# CONFIG_MMC_TEST is not set ++ ++# ++# MMC/SD/SDIO Host Controller Drivers ++# ++# CONFIG_MMC_DEBUG is not set ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_IO_ACCESSORS=y ++CONFIG_MMC_SDHCI_PLTFM=y ++# CONFIG_MMC_SDHCI_OF_ARASAN is not set ++# CONFIG_MMC_SDHCI_OF_AT91 is not set ++# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set ++# CONFIG_MMC_SDHCI_CADENCE is not set ++CONFIG_MMC_SDHCI_AX620=y ++# CONFIG_MMC_SDHCI_F_SDH30 is not set ++# CONFIG_MMC_SPI is not set ++# CONFIG_MMC_DW is not set ++# CONFIG_MMC_VUB300 is not set ++# CONFIG_MMC_USHC is not set ++# CONFIG_MMC_USDHI6ROL0 is not set ++# CONFIG_MMC_CQHCI is not set ++# CONFIG_MMC_MTK is not set ++# CONFIG_MMC_SDHCI_XENON is not set ++# CONFIG_MMC_SDHCI_OMAP is not set ++# CONFIG_MEMSTICK is not set ++# CONFIG_NEW_LEDS is not set ++# CONFIG_ACCESSIBILITY is not set ++# CONFIG_INFINIBAND is not set ++CONFIG_EDAC_ATOMIC_SCRUB=y ++CONFIG_EDAC_SUPPORT=y ++CONFIG_RTC_LIB=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" ++CONFIG_RTC_SYSTOHC=y ++CONFIG_RTC_SYSTOHC_DEVICE="rtc0" ++# CONFIG_RTC_DEBUG is not set ++CONFIG_RTC_NVMEM=y ++ ++# ++# RTC interfaces ++# ++CONFIG_RTC_INTF_SYSFS=y ++CONFIG_RTC_INTF_PROC=y ++CONFIG_RTC_INTF_DEV=y ++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set ++# CONFIG_RTC_DRV_TEST is not set ++ ++# ++# I2C RTC drivers ++# ++# CONFIG_RTC_DRV_ABB5ZES3 is not set ++# CONFIG_RTC_DRV_ABX80X is not set ++# CONFIG_RTC_DRV_DS1307 is not set ++# CONFIG_RTC_DRV_DS1374 is not set ++# CONFIG_RTC_DRV_DS1672 is not set ++# CONFIG_RTC_DRV_HYM8563 is not set ++# CONFIG_RTC_DRV_MAX6900 is not set ++# CONFIG_RTC_DRV_RS5C372 is not set ++# CONFIG_RTC_DRV_ISL1208 is not set ++# CONFIG_RTC_DRV_ISL12022 is not set ++# CONFIG_RTC_DRV_ISL12026 is not set ++# CONFIG_RTC_DRV_X1205 is not set ++# CONFIG_RTC_DRV_PCF8523 is not set ++# CONFIG_RTC_DRV_PCF85063 is not set ++# CONFIG_RTC_DRV_PCF85363 is not set ++# CONFIG_RTC_DRV_PCF8563 is not set ++# CONFIG_RTC_DRV_PCF8583 is not set ++# CONFIG_RTC_DRV_M41T80 is not set ++# CONFIG_RTC_DRV_BQ32K is not set ++# CONFIG_RTC_DRV_S35390A is not set ++# CONFIG_RTC_DRV_FM3130 is not set ++# CONFIG_RTC_DRV_RX8010 is not set ++# CONFIG_RTC_DRV_PT7C4563 is not set ++# CONFIG_RTC_DRV_RX8581 is not set ++# CONFIG_RTC_DRV_RX8025 is not set ++# CONFIG_RTC_DRV_EM3027 is not set ++# CONFIG_RTC_DRV_RV8803 is not set ++ ++# ++# SPI RTC drivers ++# ++# CONFIG_RTC_DRV_M41T93 is not set ++# CONFIG_RTC_DRV_M41T94 is not set ++# CONFIG_RTC_DRV_DS1302 is not set ++# CONFIG_RTC_DRV_DS1305 is not set ++# CONFIG_RTC_DRV_DS1343 is not set ++# CONFIG_RTC_DRV_DS1347 is not set ++# CONFIG_RTC_DRV_DS1390 is not set ++# CONFIG_RTC_DRV_MAX6916 is not set ++# CONFIG_RTC_DRV_R9701 is not set ++# CONFIG_RTC_DRV_RX4581 is not set ++# CONFIG_RTC_DRV_RX6110 is not set ++# CONFIG_RTC_DRV_RS5C348 is not set ++# CONFIG_RTC_DRV_MAX6902 is not set ++# CONFIG_RTC_DRV_PCF2123 is not set ++# CONFIG_RTC_DRV_MCP795 is not set ++CONFIG_RTC_I2C_AND_SPI=y ++ ++# ++# SPI and I2C RTC drivers ++# ++# CONFIG_RTC_DRV_DS3232 is not set ++# CONFIG_RTC_DRV_PCF2127 is not set ++# CONFIG_RTC_DRV_RV3029C2 is not set ++ ++# ++# Platform RTC drivers ++# ++# CONFIG_RTC_DRV_CMOS is not set ++# CONFIG_RTC_DRV_DS1286 is not set ++# CONFIG_RTC_DRV_DS1511 is not set ++# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_DS1685_FAMILY is not set ++# CONFIG_RTC_DRV_DS1742 is not set ++# CONFIG_RTC_DRV_DS2404 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set ++# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T35 is not set ++# CONFIG_RTC_DRV_M48T59 is not set ++# CONFIG_RTC_DRV_MSM6242 is not set ++# CONFIG_RTC_DRV_BQ4802 is not set ++# CONFIG_RTC_DRV_RP5C01 is not set ++# CONFIG_RTC_DRV_V3020 is not set ++# CONFIG_RTC_DRV_ZYNQMP is not set ++ ++# ++# on-CPU RTC drivers ++# ++# CONFIG_RTC_DRV_FTRTC010 is not set ++# CONFIG_RTC_DRV_SNVS is not set ++# CONFIG_RTC_DRV_R7301 is not set ++ ++# ++# HID Sensor RTC drivers ++# ++# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set ++CONFIG_DMADEVICES=y ++# CONFIG_DMADEVICES_DEBUG is not set ++ ++# ++# DMA Devices ++# ++CONFIG_DMA_ENGINE=y ++CONFIG_DMA_VIRTUAL_CHANNELS=y ++CONFIG_DMA_OF=y ++# CONFIG_ALTERA_MSGDMA is not set ++# CONFIG_DW_AXI_DMAC is not set ++CONFIG_AXERA_AXI_DMAC=y ++# CONFIG_FSL_EDMA is not set ++# CONFIG_INTEL_IDMA64 is not set ++# CONFIG_NBPFAXI_DMA is not set ++# CONFIG_QCOM_HIDMA_MGMT is not set ++# CONFIG_QCOM_HIDMA is not set ++# CONFIG_DW_DMAC is not set ++ ++# ++# DMA Clients ++# ++# CONFIG_ASYNC_TX_DMA is not set ++# CONFIG_DMATEST is not set ++ ++# ++# DMABUF options ++# ++CONFIG_SYNC_FILE=y ++# CONFIG_SW_SYNC is not set ++# CONFIG_AUXDISPLAY is not set ++CONFIG_UIO=y ++CONFIG_UIO_PDRV_GENIRQ=m ++# CONFIG_UIO_DMEM_GENIRQ is not set ++# CONFIG_UIO_PRUSS is not set ++# CONFIG_VIRT_DRIVERS is not set ++# CONFIG_VIRTIO_MENU is not set ++ ++# ++# Microsoft Hyper-V guest support ++# ++# CONFIG_STAGING is not set ++# CONFIG_GOLDFISH is not set ++# CONFIG_CHROME_PLATFORMS is not set ++# CONFIG_MELLANOX_PLATFORM is not set ++CONFIG_CLKDEV_LOOKUP=y ++CONFIG_HAVE_CLK_PREPARE=y ++CONFIG_COMMON_CLK=y ++ ++# ++# Common Clock Framework ++# ++# CONFIG_CLK_HSDK is not set ++# CONFIG_COMMON_CLK_MAX9485 is not set ++# CONFIG_COMMON_CLK_SI5351 is not set ++# CONFIG_COMMON_CLK_SI514 is not set ++# CONFIG_COMMON_CLK_SI544 is not set ++# CONFIG_COMMON_CLK_SI570 is not set ++# CONFIG_COMMON_CLK_CDCE706 is not set ++# CONFIG_COMMON_CLK_CDCE925 is not set ++# CONFIG_COMMON_CLK_CS2000_CP is not set ++# CONFIG_CLK_QORIQ is not set ++# CONFIG_COMMON_CLK_PWM is not set ++# CONFIG_COMMON_CLK_VC5 is not set ++CONFIG_COMMON_CLK_AXERA=y ++CONFIG_COMMON_CLK_AX620X=y ++CONFIG_SLAVE_CLK_AX620X=y ++# CONFIG_CLK_AX620U is not set ++# CONFIG_HWSPINLOCK is not set ++ ++# ++# Clock Source drivers ++# ++CONFIG_TIMER_OF=y ++CONFIG_TIMER_PROBE=y ++CONFIG_CLKSRC_MMIO=y ++CONFIG_ARM_ARCH_TIMER=y ++CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y ++CONFIG_ARM_GLOBAL_TIMER=y ++CONFIG_ARM_TIMER_SP804=y ++CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y ++# CONFIG_MAILBOX is not set ++# CONFIG_IOMMU_SUPPORT is not set ++ ++# ++# Remoteproc drivers ++# ++# CONFIG_REMOTEPROC is not set ++ ++# ++# Rpmsg drivers ++# ++# CONFIG_RPMSG_VIRTIO is not set ++ ++# ++# SOC (System On Chip) specific Drivers ++# ++ ++# ++# Amlogic SoC drivers ++# ++ ++# ++# Broadcom SoC drivers ++# ++# CONFIG_SOC_BRCMSTB is not set ++ ++# ++# NXP/Freescale QorIQ SoC drivers ++# ++ ++# ++# i.MX SoC drivers ++# ++ ++# ++# Qualcomm SoC drivers ++# ++# CONFIG_SOC_TI is not set ++ ++# ++# Xilinx SoC drivers ++# ++# CONFIG_XILINX_VCU is not set ++CONFIG_AXERA_MEMORY_DUMP=y ++# CONFIG_PM_DEVFREQ is not set ++# CONFIG_EXTCON is not set ++# CONFIG_MEMORY is not set ++# CONFIG_IIO is not set ++CONFIG_PWM=y ++CONFIG_PWM_SYSFS=y ++# CONFIG_PWM_FSL_FTM is not set ++# CONFIG_PWM_PCA9685 is not set ++CONFIG_PWM_AXERA=y ++ ++# ++# IRQ chip support ++# ++CONFIG_IRQCHIP=y ++CONFIG_ARM_GIC=y ++CONFIG_ARM_GIC_MAX_NR=1 ++# CONFIG_IPACK_BUS is not set ++CONFIG_RESET_CONTROLLER=y ++# CONFIG_RESET_TI_SYSCON is not set ++# CONFIG_FMC is not set ++ ++# ++# PHY Subsystem ++# ++# CONFIG_GENERIC_PHY is not set ++# CONFIG_BCM_KONA_USB2_PHY is not set ++# CONFIG_PHY_PXA_28NM_HSIC is not set ++# CONFIG_PHY_PXA_28NM_USB2 is not set ++# CONFIG_PHY_MAPPHONE_MDM6600 is not set ++# CONFIG_POWERCAP is not set ++# CONFIG_MCB is not set ++ ++# ++# Performance monitor support ++# ++# CONFIG_ARM_CCI_PMU is not set ++# CONFIG_ARM_CCN is not set ++CONFIG_ARM_PMU=y ++# CONFIG_RAS is not set ++ ++# ++# Android ++# ++# CONFIG_ANDROID is not set ++# CONFIG_DAX is not set ++CONFIG_NVMEM=y ++ ++# ++# HW tracing support ++# ++# CONFIG_STM is not set ++# CONFIG_INTEL_TH is not set ++# CONFIG_FPGA is not set ++# CONFIG_FSI is not set ++# CONFIG_TEE is not set ++# CONFIG_SIOX is not set ++# CONFIG_SLIMBUS is not set ++ ++# ++# File systems ++# ++CONFIG_DCACHE_WORD_ACCESS=y ++CONFIG_FS_IOMAP=y ++CONFIG_EXT2_FS=y ++CONFIG_EXT2_FS_XATTR=y ++CONFIG_EXT2_FS_POSIX_ACL=y ++CONFIG_EXT2_FS_SECURITY=y ++CONFIG_EXT3_FS=y ++# CONFIG_EXT3_FS_POSIX_ACL is not set ++# CONFIG_EXT3_FS_SECURITY is not set ++CONFIG_EXT4_FS=y ++# CONFIG_EXT4_FS_POSIX_ACL is not set ++# CONFIG_EXT4_FS_SECURITY is not set ++# CONFIG_EXT4_ENCRYPTION is not set ++# CONFIG_EXT4_DEBUG is not set ++CONFIG_JBD2=y ++# CONFIG_JBD2_DEBUG is not set ++CONFIG_FS_MBCACHE=y ++# CONFIG_REISERFS_FS is not set ++# CONFIG_JFS_FS is not set ++# CONFIG_XFS_FS is not set ++# CONFIG_GFS2_FS is not set ++# CONFIG_OCFS2_FS is not set ++# CONFIG_BTRFS_FS is not set ++# CONFIG_NILFS2_FS is not set ++# CONFIG_F2FS_FS is not set ++CONFIG_FS_POSIX_ACL=y ++CONFIG_EXPORTFS=y ++# CONFIG_EXPORTFS_BLOCK_OPS is not set ++CONFIG_FILE_LOCKING=y ++CONFIG_MANDATORY_FILE_LOCKING=y ++# CONFIG_FS_ENCRYPTION is not set ++CONFIG_FSNOTIFY=y ++CONFIG_DNOTIFY=y ++CONFIG_INOTIFY_USER=y ++# CONFIG_FANOTIFY is not set ++# CONFIG_QUOTA is not set ++# CONFIG_AUTOFS4_FS is not set ++# CONFIG_AUTOFS_FS is not set ++# CONFIG_FUSE_FS is not set ++# CONFIG_OVERLAY_FS is not set ++ ++# ++# Caches ++# ++# CONFIG_FSCACHE is not set ++ ++# ++# CD-ROM/DVD Filesystems ++# ++# CONFIG_ISO9660_FS is not set ++# CONFIG_UDF_FS is not set ++ ++# ++# DOS/FAT/NT Filesystems ++# ++CONFIG_FAT_FS=y ++# CONFIG_MSDOS_FS is not set ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_CODEPAGE=437 ++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" ++# CONFIG_FAT_DEFAULT_UTF8 is not set ++CONFIG_EXFAT_FS=y ++CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" ++CONFIG_EXFAT_VIRTUAL_XATTR=y ++CONFIG_EXFAT_VIRTUAL_XATTR_SELINUX_LABEL="u:object_r:exfat:s0" ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_PROC_PAGE_MONITOR=y ++# CONFIG_PROC_CHILDREN is not set ++CONFIG_KERNFS=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++# CONFIG_TMPFS_POSIX_ACL is not set ++# CONFIG_TMPFS_XATTR is not set ++CONFIG_MEMFD_CREATE=y ++CONFIG_CONFIGFS_FS=y ++CONFIG_MISC_FILESYSTEMS=y ++# CONFIG_ORANGEFS_FS is not set ++# CONFIG_ADFS_FS is not set ++# CONFIG_AFFS_FS is not set ++# CONFIG_ECRYPT_FS is not set ++# CONFIG_HFS_FS is not set ++# CONFIG_HFSPLUS_FS is not set ++# CONFIG_BEFS_FS is not set ++# CONFIG_BFS_FS is not set ++# CONFIG_EFS_FS is not set ++# CONFIG_YAFFS_FS is not set ++CONFIG_JFFS2_FS=y ++CONFIG_JFFS2_FS_DEBUG=0 ++CONFIG_JFFS2_FS_WRITEBUFFER=y ++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set ++# CONFIG_JFFS2_SUMMARY is not set ++# CONFIG_JFFS2_FS_XATTR is not set ++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set ++CONFIG_JFFS2_ZLIB=y ++CONFIG_JFFS2_RTIME=y ++CONFIG_UBIFS_FS=y ++# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set ++CONFIG_UBIFS_FS_LZO=y ++CONFIG_UBIFS_FS_ZLIB=y ++# CONFIG_UBIFS_ATIME_SUPPORT is not set ++CONFIG_UBIFS_FS_XATTR=y ++# CONFIG_UBIFS_FS_ENCRYPTION is not set ++CONFIG_UBIFS_FS_SECURITY=y ++CONFIG_CRAMFS=y ++CONFIG_CRAMFS_BLOCKDEV=y ++# CONFIG_CRAMFS_MTD is not set ++CONFIG_SQUASHFS=y ++CONFIG_SQUASHFS_FILE_CACHE=y ++# CONFIG_SQUASHFS_FILE_DIRECT is not set ++CONFIG_SQUASHFS_DECOMP_SINGLE=y ++# CONFIG_SQUASHFS_DECOMP_MULTI is not set ++# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set ++# CONFIG_SQUASHFS_XATTR is not set ++CONFIG_SQUASHFS_ZLIB=y ++# CONFIG_SQUASHFS_LZ4 is not set ++CONFIG_SQUASHFS_LZO=y ++# CONFIG_SQUASHFS_XZ is not set ++# CONFIG_SQUASHFS_ZSTD is not set ++# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set ++# CONFIG_SQUASHFS_EMBEDDED is not set ++CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 ++# CONFIG_VXFS_FS is not set ++# CONFIG_MINIX_FS is not set ++# CONFIG_OMFS_FS is not set ++# CONFIG_HPFS_FS is not set ++# CONFIG_QNX4FS_FS is not set ++# CONFIG_QNX6FS_FS is not set ++# CONFIG_ROMFS_FS is not set ++# CONFIG_PSTORE is not set ++# CONFIG_SYSV_FS is not set ++# CONFIG_UFS_FS is not set ++CONFIG_NETWORK_FILESYSTEMS=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V2=y ++CONFIG_NFS_V3=y ++# CONFIG_NFS_V3_ACL is not set ++CONFIG_NFS_V4=y ++# CONFIG_NFS_SWAP is not set ++# CONFIG_NFS_V4_1 is not set ++CONFIG_ROOT_NFS=y ++# CONFIG_NFS_USE_LEGACY_DNS is not set ++CONFIG_NFS_USE_KERNEL_DNS=y ++# CONFIG_NFSD is not set ++CONFIG_GRACE_PERIOD=y ++CONFIG_LOCKD=y ++CONFIG_LOCKD_V4=y ++CONFIG_NFS_COMMON=y ++CONFIG_SUNRPC=y ++CONFIG_SUNRPC_GSS=y ++# CONFIG_SUNRPC_DEBUG is not set ++# CONFIG_CEPH_FS is not set ++# CONFIG_CIFS is not set ++# CONFIG_CODA_FS is not set ++# CONFIG_AFS_FS is not set ++CONFIG_NLS=y ++CONFIG_NLS_DEFAULT="iso8859-1" ++CONFIG_NLS_CODEPAGE_437=y ++# CONFIG_NLS_CODEPAGE_737 is not set ++# CONFIG_NLS_CODEPAGE_775 is not set ++# CONFIG_NLS_CODEPAGE_850 is not set ++# CONFIG_NLS_CODEPAGE_852 is not set ++# CONFIG_NLS_CODEPAGE_855 is not set ++# CONFIG_NLS_CODEPAGE_857 is not set ++# CONFIG_NLS_CODEPAGE_860 is not set ++# CONFIG_NLS_CODEPAGE_861 is not set ++# CONFIG_NLS_CODEPAGE_862 is not set ++# CONFIG_NLS_CODEPAGE_863 is not set ++# CONFIG_NLS_CODEPAGE_864 is not set ++# CONFIG_NLS_CODEPAGE_865 is not set ++# CONFIG_NLS_CODEPAGE_866 is not set ++# CONFIG_NLS_CODEPAGE_869 is not set ++# CONFIG_NLS_CODEPAGE_936 is not set ++# CONFIG_NLS_CODEPAGE_950 is not set ++# CONFIG_NLS_CODEPAGE_932 is not set ++# CONFIG_NLS_CODEPAGE_949 is not set ++# CONFIG_NLS_CODEPAGE_874 is not set ++# CONFIG_NLS_ISO8859_8 is not set ++# CONFIG_NLS_CODEPAGE_1250 is not set ++# CONFIG_NLS_CODEPAGE_1251 is not set ++# CONFIG_NLS_ASCII is not set ++CONFIG_NLS_ISO8859_1=y ++# CONFIG_NLS_ISO8859_2 is not set ++# CONFIG_NLS_ISO8859_3 is not set ++# CONFIG_NLS_ISO8859_4 is not set ++# CONFIG_NLS_ISO8859_5 is not set ++# CONFIG_NLS_ISO8859_6 is not set ++# CONFIG_NLS_ISO8859_7 is not set ++# CONFIG_NLS_ISO8859_9 is not set ++# CONFIG_NLS_ISO8859_13 is not set ++# CONFIG_NLS_ISO8859_14 is not set ++# CONFIG_NLS_ISO8859_15 is not set ++# CONFIG_NLS_KOI8_R is not set ++# CONFIG_NLS_KOI8_U is not set ++# CONFIG_NLS_MAC_ROMAN is not set ++# CONFIG_NLS_MAC_CELTIC is not set ++# CONFIG_NLS_MAC_CENTEURO is not set ++# CONFIG_NLS_MAC_CROATIAN is not set ++# CONFIG_NLS_MAC_CYRILLIC is not set ++# CONFIG_NLS_MAC_GAELIC is not set ++# CONFIG_NLS_MAC_GREEK is not set ++# CONFIG_NLS_MAC_ICELAND is not set ++# CONFIG_NLS_MAC_INUIT is not set ++# CONFIG_NLS_MAC_ROMANIAN is not set ++# CONFIG_NLS_MAC_TURKISH is not set ++# CONFIG_NLS_UTF8 is not set ++# CONFIG_DLM is not set ++ ++# ++# Security options ++# ++CONFIG_KEYS=y ++# CONFIG_PERSISTENT_KEYRINGS is not set ++# CONFIG_BIG_KEYS is not set ++# CONFIG_ENCRYPTED_KEYS is not set ++# CONFIG_KEY_DH_OPERATIONS is not set ++# CONFIG_SECURITY_DMESG_RESTRICT is not set ++# CONFIG_SECURITY is not set ++# CONFIG_SECURITYFS is not set ++CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y ++# CONFIG_HARDENED_USERCOPY is not set ++# CONFIG_FORTIFY_SOURCE is not set ++# CONFIG_STATIC_USERMODEHELPER is not set ++CONFIG_DEFAULT_SECURITY_DAC=y ++CONFIG_DEFAULT_SECURITY="" ++CONFIG_CRYPTO=y ++ ++# ++# Crypto core or helper ++# ++CONFIG_CRYPTO_ALGAPI=y ++CONFIG_CRYPTO_ALGAPI2=y ++CONFIG_CRYPTO_AEAD=m ++CONFIG_CRYPTO_AEAD2=y ++CONFIG_CRYPTO_BLKCIPHER2=y ++CONFIG_CRYPTO_HASH=y ++CONFIG_CRYPTO_HASH2=y ++CONFIG_CRYPTO_RNG=m ++CONFIG_CRYPTO_RNG2=y ++CONFIG_CRYPTO_RNG_DEFAULT=m ++CONFIG_CRYPTO_AKCIPHER2=y ++CONFIG_CRYPTO_KPP2=y ++CONFIG_CRYPTO_ACOMP2=y ++# CONFIG_CRYPTO_RSA is not set ++# CONFIG_CRYPTO_DH is not set ++# CONFIG_CRYPTO_ECDH is not set ++CONFIG_CRYPTO_MANAGER=m ++CONFIG_CRYPTO_MANAGER2=y ++# CONFIG_CRYPTO_USER is not set ++CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y ++# CONFIG_CRYPTO_GF128MUL is not set ++CONFIG_CRYPTO_NULL=m ++CONFIG_CRYPTO_NULL2=y ++# CONFIG_CRYPTO_PCRYPT is not set ++CONFIG_CRYPTO_WORKQUEUE=y ++# CONFIG_CRYPTO_CRYPTD is not set ++# CONFIG_CRYPTO_MCRYPTD is not set ++# CONFIG_CRYPTO_AUTHENC is not set ++# CONFIG_CRYPTO_TEST is not set ++ ++# ++# Authenticated Encryption with Associated Data ++# ++# CONFIG_CRYPTO_CCM is not set ++# CONFIG_CRYPTO_GCM is not set ++# CONFIG_CRYPTO_CHACHA20POLY1305 is not set ++# CONFIG_CRYPTO_AEGIS128 is not set ++# CONFIG_CRYPTO_AEGIS128L is not set ++# CONFIG_CRYPTO_AEGIS256 is not set ++# CONFIG_CRYPTO_MORUS640 is not set ++# CONFIG_CRYPTO_MORUS1280 is not set ++# CONFIG_CRYPTO_SEQIV is not set ++CONFIG_CRYPTO_ECHAINIV=m ++ ++# ++# Block modes ++# ++# CONFIG_CRYPTO_CBC is not set ++# CONFIG_CRYPTO_CFB is not set ++# CONFIG_CRYPTO_CTR is not set ++# CONFIG_CRYPTO_CTS is not set ++# CONFIG_CRYPTO_ECB is not set ++# CONFIG_CRYPTO_LRW is not set ++# CONFIG_CRYPTO_PCBC is not set ++# CONFIG_CRYPTO_XTS is not set ++# CONFIG_CRYPTO_KEYWRAP is not set ++ ++# ++# Hash modes ++# ++# CONFIG_CRYPTO_CMAC is not set ++CONFIG_CRYPTO_HMAC=m ++# CONFIG_CRYPTO_XCBC is not set ++# CONFIG_CRYPTO_VMAC is not set ++ ++# ++# Digest ++# ++CONFIG_CRYPTO_CRC32C=y ++# CONFIG_CRYPTO_CRC32 is not set ++# CONFIG_CRYPTO_CRCT10DIF is not set ++# CONFIG_CRYPTO_GHASH is not set ++# CONFIG_CRYPTO_POLY1305 is not set ++# CONFIG_CRYPTO_MD4 is not set ++# CONFIG_CRYPTO_MD5 is not set ++# CONFIG_CRYPTO_MICHAEL_MIC is not set ++# CONFIG_CRYPTO_RMD128 is not set ++# CONFIG_CRYPTO_RMD160 is not set ++# CONFIG_CRYPTO_RMD256 is not set ++# CONFIG_CRYPTO_RMD320 is not set ++# CONFIG_CRYPTO_SHA1 is not set ++CONFIG_CRYPTO_SHA256=m ++# CONFIG_CRYPTO_SHA512 is not set ++# CONFIG_CRYPTO_SHA3 is not set ++# CONFIG_CRYPTO_SM3 is not set ++# CONFIG_CRYPTO_TGR192 is not set ++# CONFIG_CRYPTO_WP512 is not set ++ ++# ++# Ciphers ++# ++CONFIG_CRYPTO_AES=y ++# CONFIG_CRYPTO_AES_TI is not set ++# CONFIG_CRYPTO_ANUBIS is not set ++# CONFIG_CRYPTO_ARC4 is not set ++# CONFIG_CRYPTO_BLOWFISH is not set ++# CONFIG_CRYPTO_CAMELLIA is not set ++# CONFIG_CRYPTO_CAST5 is not set ++# CONFIG_CRYPTO_CAST6 is not set ++# CONFIG_CRYPTO_DES is not set ++# CONFIG_CRYPTO_FCRYPT is not set ++# CONFIG_CRYPTO_KHAZAD is not set ++# CONFIG_CRYPTO_SALSA20 is not set ++# CONFIG_CRYPTO_CHACHA20 is not set ++# CONFIG_CRYPTO_SEED is not set ++# CONFIG_CRYPTO_SERPENT is not set ++# CONFIG_CRYPTO_SM4 is not set ++# CONFIG_CRYPTO_TEA is not set ++# CONFIG_CRYPTO_TWOFISH is not set ++ ++# ++# Compression ++# ++CONFIG_CRYPTO_DEFLATE=y ++CONFIG_CRYPTO_LZO=y ++# CONFIG_CRYPTO_842 is not set ++# CONFIG_CRYPTO_LZ4 is not set ++# CONFIG_CRYPTO_LZ4HC is not set ++# CONFIG_CRYPTO_ZSTD is not set ++ ++# ++# Random Number Generation ++# ++# CONFIG_CRYPTO_ANSI_CPRNG is not set ++CONFIG_CRYPTO_DRBG_MENU=m ++CONFIG_CRYPTO_DRBG_HMAC=y ++# CONFIG_CRYPTO_DRBG_HASH is not set ++CONFIG_CRYPTO_DRBG=m ++CONFIG_CRYPTO_JITTERENTROPY=m ++# CONFIG_CRYPTO_USER_API_HASH is not set ++# CONFIG_CRYPTO_USER_API_SKCIPHER is not set ++# CONFIG_CRYPTO_USER_API_RNG is not set ++# CONFIG_CRYPTO_USER_API_AEAD is not set ++# CONFIG_CRYPTO_HW is not set ++# CONFIG_ASYMMETRIC_KEY_TYPE is not set ++ ++# ++# Certificates for signature checking ++# ++# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set ++CONFIG_BINARY_PRINTF=y ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++CONFIG_HAVE_ARCH_BITREVERSE=y ++CONFIG_RATIONAL=y ++CONFIG_GENERIC_STRNCPY_FROM_USER=y ++CONFIG_GENERIC_STRNLEN_USER=y ++CONFIG_GENERIC_NET_UTILS=y ++CONFIG_GENERIC_PCI_IOMAP=y ++CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y ++# CONFIG_CRC_CCITT is not set ++CONFIG_CRC16=y ++# CONFIG_CRC_T10DIF is not set ++# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC32=y ++# CONFIG_CRC32_SELFTEST is not set ++CONFIG_CRC32_SLICEBY8=y ++# CONFIG_CRC32_SLICEBY4 is not set ++# CONFIG_CRC32_SARWATE is not set ++# CONFIG_CRC32_BIT is not set ++# CONFIG_CRC64 is not set ++# CONFIG_CRC4 is not set ++# CONFIG_CRC7 is not set ++# CONFIG_LIBCRC32C is not set ++# CONFIG_CRC8 is not set ++# CONFIG_RANDOM32_SELFTEST is not set ++CONFIG_ZLIB_INFLATE=y ++CONFIG_ZLIB_DEFLATE=y ++CONFIG_LZO_COMPRESS=y ++CONFIG_LZO_DECOMPRESS=y ++CONFIG_LZ4_DECOMPRESS=y ++CONFIG_XZ_DEC=y ++CONFIG_XZ_DEC_X86=y ++CONFIG_XZ_DEC_POWERPC=y ++CONFIG_XZ_DEC_IA64=y ++CONFIG_XZ_DEC_ARM=y ++CONFIG_XZ_DEC_ARMTHUMB=y ++CONFIG_XZ_DEC_SPARC=y ++CONFIG_XZ_DEC_BCJ=y ++# CONFIG_XZ_DEC_TEST is not set ++CONFIG_DECOMPRESS_GZIP=y ++CONFIG_DECOMPRESS_BZIP2=y ++CONFIG_DECOMPRESS_LZMA=y ++CONFIG_DECOMPRESS_XZ=y ++CONFIG_DECOMPRESS_LZO=y ++CONFIG_DECOMPRESS_LZ4=y ++CONFIG_GENERIC_ALLOCATOR=y ++CONFIG_ASSOCIATIVE_ARRAY=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_DMA=y ++CONFIG_NEED_DMA_MAP_STATE=y ++CONFIG_HAVE_GENERIC_DMA_COHERENT=y ++CONFIG_SGL_ALLOC=y ++CONFIG_CPU_RMAP=y ++CONFIG_DQL=y ++CONFIG_GLOB=y ++# CONFIG_GLOB_SELFTEST is not set ++CONFIG_NLATTR=y ++# CONFIG_CORDIC is not set ++# CONFIG_DDR is not set ++# CONFIG_IRQ_POLL is not set ++CONFIG_LIBFDT=y ++CONFIG_OID_REGISTRY=y ++CONFIG_FONT_SUPPORT=y ++# CONFIG_FONTS is not set ++CONFIG_FONT_8x8=y ++CONFIG_FONT_8x16=y ++CONFIG_SG_POOL=y ++CONFIG_ARCH_HAS_SG_CHAIN=y ++CONFIG_SBITMAP=y ++# CONFIG_STRING_SELFTEST is not set ++ ++# ++# Kernel hacking ++# ++ ++# ++# printk and dmesg options ++# ++CONFIG_PRINTK_TIME=y ++CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 ++CONFIG_CONSOLE_LOGLEVEL_QUIET=4 ++CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 ++# CONFIG_BOOT_PRINTK_DELAY is not set ++# CONFIG_DYNAMIC_DEBUG is not set ++ ++# ++# Compile-time checks and compiler options ++# ++CONFIG_DEBUG_INFO=y ++# CONFIG_DEBUG_INFO_REDUCED is not set ++# CONFIG_DEBUG_INFO_SPLIT is not set ++# CONFIG_DEBUG_INFO_DWARF4 is not set ++# CONFIG_GDB_SCRIPTS is not set ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_FRAME_WARN=1024 ++# CONFIG_STRIP_ASM_SYMS is not set ++# CONFIG_READABLE_ASM is not set ++# CONFIG_UNUSED_SYMBOLS is not set ++# CONFIG_PAGE_OWNER is not set ++CONFIG_DEBUG_FS=y ++# CONFIG_HEADERS_CHECK is not set ++# CONFIG_DEBUG_SECTION_MISMATCH is not set ++CONFIG_SECTION_MISMATCH_WARN_ONLY=y ++# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set ++CONFIG_MAGIC_SYSRQ=y ++CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 ++CONFIG_MAGIC_SYSRQ_SERIAL=y ++CONFIG_DEBUG_KERNEL=y ++ ++# ++# Memory Debugging ++# ++# CONFIG_PAGE_EXTENSION is not set ++# CONFIG_DEBUG_PAGEALLOC is not set ++# CONFIG_PAGE_POISONING is not set ++# CONFIG_DEBUG_PAGE_REF is not set ++# CONFIG_DEBUG_RODATA_TEST is not set ++# CONFIG_DEBUG_OBJECTS is not set ++# CONFIG_SLUB_DEBUG_ON is not set ++# CONFIG_SLUB_STATS is not set ++CONFIG_HAVE_DEBUG_KMEMLEAK=y ++# CONFIG_DEBUG_KMEMLEAK is not set ++# CONFIG_DEBUG_STACK_USAGE is not set ++# CONFIG_DEBUG_VM is not set ++CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y ++# CONFIG_DEBUG_VIRTUAL is not set ++CONFIG_DEBUG_MEMORY_INIT=y ++# CONFIG_DEBUG_PER_CPU_MAPS is not set ++# CONFIG_DEBUG_HIGHMEM is not set ++CONFIG_ARCH_HAS_KCOV=y ++CONFIG_CC_HAS_SANCOV_TRACE_PC=y ++# CONFIG_KCOV is not set ++# CONFIG_DEBUG_SHIRQ is not set ++ ++# ++# Debug Lockups and Hangs ++# ++# CONFIG_SOFTLOCKUP_DETECTOR is not set ++CONFIG_DETECT_HUNG_TASK=y ++CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 ++# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set ++CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 ++# CONFIG_WQ_WATCHDOG is not set ++CONFIG_PANIC_ON_OOPS=y ++CONFIG_PANIC_ON_OOPS_VALUE=1 ++CONFIG_PANIC_TIMEOUT=5 ++# CONFIG_SCHED_DEBUG is not set ++# CONFIG_SCHEDSTATS is not set ++# CONFIG_SCHED_STACK_END_CHECK is not set ++# CONFIG_DEBUG_TIMEKEEPING is not set ++CONFIG_DEBUG_PREEMPT=y ++ ++# ++# Lock Debugging (spinlocks, mutexes, etc...) ++# ++CONFIG_LOCK_DEBUGGING_SUPPORT=y ++# CONFIG_PROVE_LOCKING is not set ++# CONFIG_LOCK_STAT is not set ++# CONFIG_DEBUG_RT_MUTEXES is not set ++# CONFIG_DEBUG_SPINLOCK is not set ++# CONFIG_DEBUG_MUTEXES is not set ++# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set ++# CONFIG_DEBUG_RWSEMS is not set ++# CONFIG_DEBUG_LOCK_ALLOC is not set ++# CONFIG_DEBUG_ATOMIC_SLEEP is not set ++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set ++# CONFIG_LOCK_TORTURE_TEST is not set ++# CONFIG_WW_MUTEX_SELFTEST is not set ++CONFIG_STACKTRACE=y ++# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set ++# CONFIG_DEBUG_KOBJECT is not set ++CONFIG_DEBUG_BUGVERBOSE=y ++# CONFIG_DEBUG_LIST is not set ++# CONFIG_DEBUG_PI_LIST is not set ++# CONFIG_DEBUG_SG is not set ++# CONFIG_DEBUG_NOTIFIERS is not set ++# CONFIG_DEBUG_CREDENTIALS is not set ++ ++# ++# RCU Debugging ++# ++# CONFIG_RCU_PERF_TEST is not set ++# CONFIG_RCU_TORTURE_TEST is not set ++CONFIG_RCU_CPU_STALL_TIMEOUT=21 ++CONFIG_RCU_TRACE=y ++# CONFIG_RCU_EQS_DEBUG is not set ++# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set ++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set ++# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set ++# CONFIG_NOTIFIER_ERROR_INJECTION is not set ++# CONFIG_FAULT_INJECTION is not set ++# CONFIG_LATENCYTOP is not set ++CONFIG_NOP_TRACER=y ++CONFIG_HAVE_FUNCTION_TRACER=y ++CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y ++CONFIG_HAVE_DYNAMIC_FTRACE=y ++CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y ++CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y ++CONFIG_HAVE_SYSCALL_TRACEPOINTS=y ++CONFIG_HAVE_C_RECORDMCOUNT=y ++CONFIG_TRACE_CLOCK=y ++CONFIG_RING_BUFFER=y ++CONFIG_EVENT_TRACING=y ++CONFIG_CONTEXT_SWITCH_TRACER=y ++CONFIG_RING_BUFFER_ALLOW_SWAP=y ++CONFIG_TRACING=y ++CONFIG_TRACING_SUPPORT=y ++CONFIG_FTRACE=y ++# CONFIG_FUNCTION_TRACER is not set ++# CONFIG_PREEMPTIRQ_EVENTS is not set ++# CONFIG_IRQSOFF_TRACER is not set ++# CONFIG_PREEMPT_TRACER is not set ++# CONFIG_SCHED_TRACER is not set ++# CONFIG_HWLAT_TRACER is not set ++# CONFIG_ENABLE_DEFAULT_TRACERS is not set ++# CONFIG_FTRACE_SYSCALLS is not set ++# CONFIG_TRACER_SNAPSHOT is not set ++CONFIG_BRANCH_PROFILE_NONE=y ++# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set ++# CONFIG_PROFILE_ALL_BRANCHES is not set ++# CONFIG_STACK_TRACER is not set ++# CONFIG_BLK_DEV_IO_TRACE is not set ++CONFIG_UPROBE_EVENTS=y ++CONFIG_PROBE_EVENTS=y ++# CONFIG_TRACEPOINT_BENCHMARK is not set ++# CONFIG_RING_BUFFER_BENCHMARK is not set ++# CONFIG_RING_BUFFER_STARTUP_TEST is not set ++# CONFIG_PREEMPTIRQ_DELAY_TEST is not set ++# CONFIG_TRACE_EVAL_MAP_FILE is not set ++CONFIG_TRACING_EVENTS_GPIO=y ++# CONFIG_DMA_API_DEBUG is not set ++CONFIG_RUNTIME_TESTING_MENU=y ++# CONFIG_LKDTM is not set ++# CONFIG_TEST_LIST_SORT is not set ++# CONFIG_TEST_SORT is not set ++# CONFIG_BACKTRACE_SELF_TEST is not set ++# CONFIG_RBTREE_TEST is not set ++# CONFIG_INTERVAL_TREE_TEST is not set ++# CONFIG_PERCPU_TEST is not set ++# CONFIG_ATOMIC64_SELFTEST is not set ++# CONFIG_TEST_HEXDUMP is not set ++# CONFIG_TEST_STRING_HELPERS is not set ++# CONFIG_TEST_KSTRTOX is not set ++# CONFIG_TEST_PRINTF is not set ++# CONFIG_TEST_BITMAP is not set ++# CONFIG_TEST_BITFIELD is not set ++# CONFIG_TEST_UUID is not set ++# CONFIG_TEST_OVERFLOW is not set ++# CONFIG_TEST_RHASHTABLE is not set ++# CONFIG_TEST_HASH is not set ++# CONFIG_TEST_IDA is not set ++# CONFIG_TEST_LKM is not set ++# CONFIG_TEST_USER_COPY is not set ++# CONFIG_TEST_BPF is not set ++# CONFIG_FIND_BIT_BENCHMARK is not set ++# CONFIG_TEST_FIRMWARE is not set ++# CONFIG_TEST_SYSCTL is not set ++# CONFIG_TEST_UDELAY is not set ++# CONFIG_TEST_STATIC_KEYS is not set ++# CONFIG_TEST_KMOD is not set ++# CONFIG_MEMTEST is not set ++# CONFIG_BUG_ON_DATA_CORRUPTION is not set ++# CONFIG_SAMPLES is not set ++CONFIG_HAVE_ARCH_KGDB=y ++# CONFIG_KGDB is not set ++# CONFIG_UBSAN is not set ++CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y ++# CONFIG_STRICT_DEVMEM is not set ++# CONFIG_ARM_PTDUMP_DEBUGFS is not set ++# CONFIG_DEBUG_WX is not set ++CONFIG_ARM_UNWIND=y ++CONFIG_DEBUG_USER=y ++# CONFIG_DEBUG_LL is not set ++CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" ++CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" ++# CONFIG_PID_IN_CONTEXTIDR is not set ++# CONFIG_CORESIGHT is not set +diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h +index ec1a5fd0d..5a4e5bf4b 100644 +--- a/arch/arm/include/asm/cacheflush.h ++++ b/arch/arm/include/asm/cacheflush.h +@@ -160,7 +160,7 @@ extern void __cpuc_flush_dcache_area(void *, size_t); + * visible to the CPU. + */ + extern void dmac_flush_range(const void *, const void *); +- ++extern void dmac_inv_range(const void *, const void *); + #endif + + /* +diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h +index 8d1f498e5..b920944af 100644 +--- a/arch/arm/include/asm/glue-cache.h ++++ b/arch/arm/include/asm/glue-cache.h +@@ -159,6 +159,7 @@ static inline void nop_dma_unmap_area(const void *s, size_t l, int f) { } + #define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area) + + #define dmac_flush_range __glue(_CACHE,_dma_flush_range) ++#define dmac_inv_range __glue(_CACHE,_dma_inv_range) + #endif + + #endif +diff --git a/arch/arm/mach-axera/Kconfig b/arch/arm/mach-axera/Kconfig +new file mode 100644 +index 000000000..6c6e298f6 +--- /dev/null ++++ b/arch/arm/mach-axera/Kconfig +@@ -0,0 +1,26 @@ ++# SPDX-License-Identifier: GPL-2.0 ++menuconfig ARCH_AXERA ++ bool "Axera SOC Support" ++ depends on ARCH_MULTI_V7 ++ select ARM_GIC ++ select ARM_TIMER_SP804 ++ select ARM_GLOBAL_TIMER ++ select NO_IOPORT_MAP ++ ++if ARCH_AXERA ++ ++menu "Axera platform type" ++ ++config ARCH_AX620 ++ bool "Axera AX620X family" ++ depends on ARCH_MULTI_V7 ++ select CACHE_L2X0 ++ select HAVE_ARM_SCU if SMP ++ select HAVE_ARM_TWD if SMP ++ select PINCTRL ++ select PINCTRL_SINGLE ++ help ++ Support for Axera AX620 SoC family ++endmenu ++ ++endif +diff --git a/arch/arm/mach-axera/Makefile b/arch/arm/mach-axera/Makefile +new file mode 100644 +index 000000000..83bb45421 +--- /dev/null ++++ b/arch/arm/mach-axera/Makefile +@@ -0,0 +1,6 @@ ++# SPDX-License-Identifier: GPL-2.0 ++# ++# Makefile for the linux kernel. ++# ++obj-$(CONFIG_SMP) += platsmp.o headsmp.o ++obj-$(CONFIG_PM_SLEEP) += pm.o sleep.o +diff --git a/arch/arm/mach-axera/headsmp.S b/arch/arm/mach-axera/headsmp.S +new file mode 100644 +index 000000000..f57b91696 +--- /dev/null ++++ b/arch/arm/mach-axera/headsmp.S +@@ -0,0 +1,42 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Cloned from linux/arch/arm/mach-realview/headsmp.S ++ * ++ * Copyright (c) 2003 ARM Limited ++ * All Rights Reserved ++ */ ++#include ++#include ++ ++#include ++ ++/* ++ * axera specific entry point for secondary CPUs. This provides ++ * a "holding pen" into which all secondary cores are held until we're ++ * ready for them to initialise. ++ */ ++ENTRY(secondary_holding_pen) ++ mrc p15, 0, r0, c0, c0, 5 ++ and r0, r0, #15 ++ cmp r0, #CONFIG_NR_CPUS ++ blt 2f ++3: ++ wfi ++ b 3b ++2: ++ adr r4, 1f ++ ldmia r4, {r5, r6, r8} ++ sub r4, r4, r5 ++ add r6, r6, r4 ++ add r8, r8, r4 ++pen: ++ ldr r7, [r6] ++ cmp r7, r0 ++ bxeq r8 ++ b pen ++ENDPROC(secondary_holding_pen) ++ ++ .align 2 ++1: .long . ++ .long pen_release ++ .long secondary_startup +diff --git a/arch/arm/mach-axera/platsmp.c b/arch/arm/mach-axera/platsmp.c +new file mode 100644 +index 000000000..fab2bca7a +--- /dev/null ++++ b/arch/arm/mach-axera/platsmp.c +@@ -0,0 +1,241 @@ ++/* ++ * ++ * Copyright (C) 2002 ARM Ltd. ++ * All Rights Reserved ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static u32 cpus_release_paddr; ++static bool cpus_inited = false; ++static DEFINE_SPINLOCK(boot_lock); ++extern void secondary_holding_pen(void); ++ ++/* ++ * Write pen_release in a way that is guaranteed to be visible to all ++ * observers, irrespective of whether they're taking part in coherency ++ * or not. This is necessary for the hotplug code to work reliably. ++ */ ++static void write_pen_release(int val) ++{ ++ pen_release = val; ++ smp_wmb(); ++ sync_cache_w(&pen_release); ++} ++ ++static void ax620x_smp_init_cpus(void) ++{ ++ struct device_node *cpus_node = NULL; ++ ++ cpus_node = of_find_node_by_path("/cpus"); ++ if (!cpus_node) { ++ pr_err("No CPU information found in DT\n"); ++ return; ++ } ++ ++ if (of_property_read_u32(cpus_node, ++ "secondary-boot-reg", ++ &cpus_release_paddr)) { ++ pr_err("required secondary release register not specified for cpus\n"); ++ return; ++ } ++ ++ cpus_inited = true; ++} ++ ++static void ax620x_smp_prepare_cpus(unsigned int max_cpus) ++{ ++ void __iomem *cpus_release_vaddr; ++ phys_addr_t secondary_startup_paddr; ++ ++ if (!cpus_inited) ++ return; ++ ++ cpus_release_vaddr = ioremap_nocache((phys_addr_t)cpus_release_paddr, ++ sizeof(phys_addr_t)); ++ if (!cpus_release_vaddr) { ++ cpus_inited = false; ++ pr_err("unable to ioremap secondary_release register for cpus\n"); ++ return; ++ } ++ ++ secondary_startup_paddr = __pa_symbol(secondary_holding_pen); ++ BUG_ON(secondary_startup_paddr > (phys_addr_t)U32_MAX); ++ ++ /* core1-core3 hold pending at secondary_holding_pen */ ++ writel_relaxed(secondary_startup_paddr, cpus_release_vaddr); ++ sev(); ++ ++ iounmap(cpus_release_vaddr); ++} ++ ++static int ax620x_smp_boot_secondary(unsigned int cpu, ++ struct task_struct *idle) ++{ ++ unsigned long timeout; ++ ++ if (!cpus_inited) ++ return -ENOSYS; ++ /* ++ * Set synchronisation state between this boot processor ++ * and the secondary one ++ */ ++ spin_lock(&boot_lock); ++ ++ /* ++ * This is really belt and braces; we hold unintended secondary ++ * CPUs in the holding pen until we're ready for them. However, ++ * since we haven't sent them a soft interrupt, they shouldn't ++ * be there. ++ */ ++ write_pen_release(cpu_logical_map(cpu)); ++ arch_send_wakeup_ipi_mask(cpumask_of(cpu)); ++ ++ timeout = jiffies + (1 * HZ); ++ while (time_before(jiffies, timeout)) { ++ smp_rmb(); ++ if (pen_release == -1) ++ break; ++ ++ udelay(10); ++ } ++ ++ /* ++ * now the secondary core is starting up let it run its ++ * calibrations, then wait for it to finish ++ */ ++ spin_unlock(&boot_lock); ++ ++ return pen_release != -1 ? -ENOSYS : 0; ++} ++ ++static void ax620x_secondary_init(unsigned int cpu) ++{ ++ /* ++ * let the primary processor know we're out of the ++ * pen, then head off into the C entry point ++ */ ++ write_pen_release(-1); ++ ++ /* ++ * Synchronise with the boot thread. ++ */ ++ spin_lock(&boot_lock); ++ spin_unlock(&boot_lock); ++} ++ ++#ifdef CONFIG_HOTPLUG_CPU ++#include ++#include ++ ++static inline void cpu_enter_lowpower(void) ++{ ++ unsigned int v; ++ ++ asm volatile( ++ "mcr p15, 0, %1, c7, c5, 0\n" ++ " mcr p15, 0, %1, c7, c10, 4\n" ++ /* ++ * Turn off coherency ++ */ ++ " mrc p15, 0, %0, c1, c0, 1\n" ++ " bic %0, %0, %3\n" ++ " mcr p15, 0, %0, c1, c0, 1\n" ++ " mrc p15, 0, %0, c1, c0, 0\n" ++ " bic %0, %0, %2\n" ++ " mcr p15, 0, %0, c1, c0, 0\n" ++ : "=&r" (v) ++ : "r" (0), "Ir" (CR_C), "Ir" (0x40) ++ : "cc"); ++} ++ ++static inline void cpu_leave_lowpower(void) ++{ ++ unsigned int v; ++ ++ asm volatile( ++ "mrc p15, 0, %0, c1, c0, 0\n" ++ " orr %0, %0, %1\n" ++ " mcr p15, 0, %0, c1, c0, 0\n" ++ " mrc p15, 0, %0, c1, c0, 1\n" ++ " orr %0, %0, %2\n" ++ " mcr p15, 0, %0, c1, c0, 1\n" ++ : "=&r" (v) ++ : "Ir" (CR_C), "Ir" (0x40) ++ : "cc"); ++} ++ ++static inline void platform_do_lowpower(unsigned int cpu, int *spurious) ++{ ++ /* ++ * there is no power-control hardware on this platform, so all ++ * we can do is put the core into WFI; this is safe as the calling ++ * code will have already disabled interrupts ++ */ ++ for (;;) { ++ wfi(); ++ ++ if (pen_release == cpu_logical_map(cpu)) { ++ /* ++ * OK, proper wakeup, we're done ++ */ ++ break; ++ } ++ ++ /* ++ * Getting here, means that we have come out of WFI without ++ * having been woken up - this shouldn't happen ++ * ++ * Just note it happening - when we're woken, we can report ++ * its occurrence. ++ */ ++ (*spurious)++; ++ } ++} ++ ++/* ++ * platform-specific code to shutdown a CPU ++ * ++ * Called with IRQs disabled ++ */ ++static void ax620x_cpu_die(unsigned int cpu) ++{ ++ int spurious = 0; ++ ++ /* ++ * we're ready for shutdown now, so do it ++ */ ++ cpu_enter_lowpower(); ++ platform_do_lowpower(cpu, &spurious); ++ ++ /* ++ * bring this CPU back into the world of cache ++ * coherency, and then restore interrupts ++ */ ++ cpu_leave_lowpower(); ++ ++ if (spurious) ++ pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious); ++} ++#endif ++ ++const struct smp_operations ax620x_smp_ops __initconst = { ++ .smp_init_cpus = ax620x_smp_init_cpus, ++ .smp_prepare_cpus = ax620x_smp_prepare_cpus, ++ .smp_boot_secondary = ax620x_smp_boot_secondary, ++ .smp_secondary_init = ax620x_secondary_init, ++#ifdef CONFIG_HOTPLUG_CPU ++ .cpu_die = ax620x_cpu_die, ++#endif ++}; ++ ++CPU_METHOD_OF_DECLARE(axera_smp_ax620x, "axera,ax620x-smp", &ax620x_smp_ops); +diff --git a/arch/arm/mach-axera/pm.c b/arch/arm/mach-axera/pm.c +new file mode 100644 +index 000000000..ca78a2170 +--- /dev/null ++++ b/arch/arm/mach-axera/pm.c +@@ -0,0 +1,893 @@ ++/* ++ * Axera power manage driver ++ * ++ * Copyright (c) 2019-2020 Axera Technology Co., Ltd. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "pm.h" ++ ++#define DEBUG_PM_TEMP ++ ++struct ax620_pmu_source { ++ struct regmap *pmu_regmap; ++ struct regmap *ap_regmap; ++ struct regmap *cpu_regmap; ++ struct regmap *flash_regmap; ++ struct regmap *chiptop_regmap; ++ struct regmap *gtmr_regmap; ++ //void __iomem *iram_base; ++#ifdef DEBUG_PM_TEMP ++ struct regmap *isp_regmap; ++ struct regmap *mm_regmap; ++ struct regmap *npu_regmap; ++ struct regmap *vpu_regmap; ++#endif ++ pgd_t *pm_idmap_pgd; ++ /* some others later */ ++ unsigned int gtmr_freq; ++}; ++ ++struct axera_pm_data { ++ const struct platform_suspend_ops *ops; ++ int (*init)(struct device_node *np); ++ void *pm_source; ++}; ++ ++struct regs_bak_restore { ++ unsigned int reg_addr; ++ unsigned int reg_val; ++}; ++ ++static struct regs_bak_restore ap_bak_store_regs[] = { ++ {AP_CLK_MUX_0, 0}, ++ {AP_CLK_MUX_1, 0}, ++ {AP_CLK_EB_0, 0}, ++ {AP_CLK_EB_1, 0}, ++ {AP_CLK_EB_2, 0}, ++ {AP_CLK_EB_3, 0}, ++ {AP_CLK_DIV_0, 0}, ++ {AP_CLK_DIV_1, 0}, ++ {AP_SLEEP_CTRL, 0}, ++}; ++ ++static struct regs_bak_restore cpu_bak_store_regs[] = { ++ {CPU_CLK_MUX_0, 0}, ++ {CPU_CLK_EB_0, 0}, ++ {CPU_CLK_EB_1, 0}, ++ {CPU_SLEEP_CTRL, 0}, ++}; ++ ++static struct regs_bak_restore flash_bak_store_regs[] = { ++ {FLASH_CLK_MUX_0, 0}, ++ {FLASH_CLK_EB_0, 0}, ++ {FLASH_CLK_EB_1, 0}, ++}; ++ ++const struct axera_pm_data *cur_pm_data; ++ ++static void pmu_sleep_en(enum sub_sys_e sub_sys) ++{ ++ unsigned int val = 0; ++ struct ax620_pmu_source *pmu_source = ++ (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ ++ val = 1 << sub_sys; ++ //writel(val, PMU_SLP_EN_SET); ++ regmap_write(pmu_source->pmu_regmap, PMU_SLP_EN_SET, val); ++} ++ ++static void ax620_ap_sleep_config(void) ++{ ++ unsigned int val = 0; ++ struct ax620_pmu_source *pmu_source = ++ (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ ++ regmap_write(pmu_source->ap_regmap, AP_BUS_IDLE_EN_SET, BITS_AP_BUS_IDLE_EN); ++ ++ /* set ap slp_en */ ++ regmap_write(pmu_source->ap_regmap, AP_SLEEP_CTRL_SET, BIT_AP_SLP_EN); ++ ++ pmu_sleep_en(AP_SYS); ++ ++ while (1) { ++ regmap_read(pmu_source->ap_regmap, AP_BUS_IDLE_EN, &val); ++ if (((val >> 16) & BITS_AP_BUS_IDLE_STATE) == ++ BITS_AP_BUS_IDLE_STATE) ++ break; ++ } ++ ++ /* clr clk_eb */ ++ regmap_write(pmu_source->ap_regmap, AP_CLK_EB_0_CLR, BITS_AP_CLK_EB0_EN); ++ regmap_write(pmu_source->ap_regmap, AP_CLK_EB_1_CLR, BITS_AP_CLK_EB1_EN); ++ regmap_write(pmu_source->ap_regmap, AP_CLK_EB_2_CLR, BITS_AP_CLK_EB2_EN); ++ regmap_write(pmu_source->ap_regmap, AP_CLK_EB_3_CLR, BITS_AP_CLK_EB3_EN); ++ ++ while (1) { ++ regmap_read(pmu_source->pmu_regmap, PMU_PWR_STATE, &val); ++ if (PWR_SYS_STATE(val, AP_SYS) == PWR_STATE_SLEEP) { ++ break; ++ } ++ } ++} ++ ++static void ax620_cpu_sleep_config(void) ++{ ++ struct ax620_pmu_source *pmu_source = ++ (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ ++ /* cpu some different, not polling idle state */ ++ regmap_write(pmu_source->cpu_regmap, CPU_BUS_IDLE_EN_SET, ++ BITS_CPU_BUS_IDLE_EN); ++ ++ /* clr flash clk_eb */ ++ regmap_write(pmu_source->flash_regmap, FLASH_CLK_EB_0_CLR, ++ BITS_FLAHS_CLK_EB0_EN); ++ regmap_write(pmu_source->flash_regmap, FLASH_CLK_EB_1_CLR, ++ BITS_FLAHS_CLK_EB1_EN); ++ ++ /* clr dma clk_eb */ ++ regmap_write(pmu_source->cpu_regmap, CPU_CLK_EB_1_CLR, ++ BIT_CLK_DMA_EB); ++ ++ /* set cpu slp_en */ ++ regmap_write(pmu_source->cpu_regmap, CPU_SLEEP_CTRL_SET, ++ BIT_CPU_SLEEP | BIT_INT_DISABLE); ++ ++ pmu_sleep_en(CPU_SYS); ++} ++ ++#ifdef DEBUG_PM_TEMP ++#define BIT_ISP_CFG_X2P BIT(2) ++#define BIT_ISP_ISP2DATA BIT(1) ++#define BIT_ISP_ISP2NPU BIT(0) ++#define BITS_ISP_IDLE (BIT_ISP_ISP2DATA | BIT_ISP_ISP2NPU) ++#define BITS_ISP_CLK_EB0 0x3FF ++#define BITS_ISP_CLK_EB1 0x1FFFF ++#define BIT_ISP_SLEEP_EN BIT(0) ++ ++#define ISP_BUS_IDLE_SET 0x1DC ++#define ISP_LPC_AXI 0x24 ++#define ISP_CLK_EB_0_CLR 0x198 ++#define ISP_CLK_EB_1_CLR 0x1A0 ++#define ISP_SLEEP_EN_SET 0x1C4 ++static void ax620_isp_sleep_config(void) ++{ ++ unsigned int val = 0; ++ struct ax620_pmu_source *pmu_source = ++ (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ ++ regmap_read(pmu_source->pmu_regmap, PMU_PWR_STATE, &val); ++ if (PWR_SYS_STATE(val, ISP_SYS) == PWR_STATE_SLEEP) ++ return; ++ ++ regmap_write(pmu_source->isp_regmap, ISP_BUS_IDLE_SET, ++ (BITS_ISP_IDLE | BIT_ISP_CFG_X2P)); ++ while (1) { ++ regmap_read(pmu_source->isp_regmap, ISP_LPC_AXI, &val); ++ if ((val & BITS_ISP_IDLE) == BITS_ISP_IDLE) ++ break; ++ } ++ ++ regmap_write(pmu_source->isp_regmap, ISP_CLK_EB_0_CLR, BITS_ISP_CLK_EB0); ++ regmap_write(pmu_source->isp_regmap, ISP_CLK_EB_1_CLR, BITS_ISP_CLK_EB1); ++ regmap_write(pmu_source->isp_regmap, ISP_SLEEP_EN_SET, BIT_ISP_SLEEP_EN); ++ ++ pmu_sleep_en(ISP_SYS); ++ ++ while (1) { ++ regmap_read(pmu_source->pmu_regmap, PMU_PWR_STATE, &val); ++ if (PWR_SYS_STATE(val, ISP_SYS) == PWR_STATE_SLEEP) { ++ break; ++ } ++ } ++} ++ ++#define BITS_VPU_IDLE 0x3E ++#define BIT_CFG2VPU_X2P_A_BUS_IDLE_EN BIT(0) ++#define BITS_VPU_CLK_EB 0x7 ++#define BIT_VPU_SLP_EN BIT(0) ++ ++#define VPU_BUS_IDLE_EN_SET 0xF0 ++#define VPU_BUS_IDLE_STATE 0x40 ++#define VPU_CLK_EB_CLR 0x8C ++#define VPU_SLEEP_CTRL_SET 0xE8 ++static void ax620_vpu_sleep_config(void) ++{ ++ unsigned int val = 0; ++ struct ax620_pmu_source *pmu_source = ++ (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ ++ regmap_read(pmu_source->pmu_regmap, PMU_PWR_STATE, &val); ++ if (PWR_SYS_STATE(val, VPU_SYS) == PWR_STATE_SLEEP) ++ return; ++ ++ regmap_write(pmu_source->vpu_regmap, VPU_BUS_IDLE_EN_SET, ++ (BITS_VPU_IDLE | BIT_CFG2VPU_X2P_A_BUS_IDLE_EN)); ++ while (1) { ++ regmap_read(pmu_source->vpu_regmap, VPU_BUS_IDLE_STATE, &val); ++ if ((val & BITS_VPU_IDLE) == BITS_VPU_IDLE) ++ break; ++ } ++ ++ regmap_write(pmu_source->vpu_regmap, VPU_CLK_EB_CLR, BITS_VPU_CLK_EB); ++ regmap_write(pmu_source->vpu_regmap, VPU_SLEEP_CTRL_SET, BIT_VPU_SLP_EN); ++ ++ pmu_sleep_en(VPU_SYS); ++ ++ while (1) { ++ regmap_read(pmu_source->pmu_regmap, PMU_PWR_STATE, &val); ++ if (PWR_SYS_STATE(val, VPU_SYS) == PWR_STATE_SLEEP) { ++ break; ++ } ++ } ++} ++ ++#define BIT_MM_ARB_IDLE_EN BIT(2) ++#define BIT_MM2CFG_IDLE_EN BIT(1) ++#define BIT_MM2DATA_IDLE_EN BIT(0) ++#define BITS_MM_BUS_IDLE (BIT_MM_ARB_IDLE_EN | BIT_MM2DATA_IDLE_EN) ++#define BITS_MM_CLK_EB 0x3F ++#define BIT_MM_SLP_EN BIT(0) ++ ++#define MM_BUS_IDLE_EN_SET 0xAC ++#define MM_BUS_IDLE_STATE 0x14 ++#define MM_CLK_EB_1_CLR 0x88 ++#define MM_SLEEP_CTRL_SET 0x9C ++ ++static void ax620_mm_sleep_config(void) ++{ ++ unsigned int val = 0; ++ struct ax620_pmu_source *pmu_source = ++ (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ ++ regmap_read(pmu_source->pmu_regmap, PMU_PWR_STATE, &val); ++ if (PWR_SYS_STATE(val, MM_SYS) == PWR_STATE_SLEEP) ++ return; ++ ++ regmap_write(pmu_source->mm_regmap, MM_BUS_IDLE_EN_SET, ++ (BITS_MM_BUS_IDLE | BIT_MM2CFG_IDLE_EN)); ++ while (1) { ++ regmap_read(pmu_source->mm_regmap, MM_BUS_IDLE_STATE, &val); ++ if ((val & BITS_MM_BUS_IDLE) == BITS_MM_BUS_IDLE) ++ break; ++ } ++ ++ /* clr clk_eb */ ++ regmap_write(pmu_source->mm_regmap, MM_CLK_EB_1_CLR, BITS_MM_CLK_EB); ++ ++ /* set mm slp_en */ ++ regmap_write(pmu_source->mm_regmap, MM_SLEEP_CTRL_SET, BIT_MM_SLP_EN); ++ ++ pmu_sleep_en(MM_SYS); ++ ++ while (1) { ++ regmap_read(pmu_source->pmu_regmap, PMU_PWR_STATE, &val); ++ if (PWR_SYS_STATE(val, MM_SYS) == PWR_STATE_SLEEP) { ++ break; ++ } ++ } ++} ++ ++#define BIT_NPU_CFG2NPU_X2P_A_BUS_IDLE_EN BIT(1) ++#define BIT_NPU_NPU2DATA_A_BUS_IDLE_EN BIT(0) ++#define BITS_NPU_BUS_IDLE_STATE 0xD ++#define BITS_NPU_CLK_EB0_EN 0x3 ++#define BITS_NPU_CLK_EB1_EN 0x3F ++#define BIT_NPU_SLP_EN BIT(0) ++ ++#define NPU_BUS_IDLE_EN_SET 0xA0 ++#define NPU_BUS_IDLE_STATE 0x20 ++#define NPU_CLK_EB_0_CLR 0x7C ++#define NPU_CLK_EB_1_CLR 0x84 ++#define NPU_SLEEP_CTRL_SET 0x90 ++static void ax620_npu_sleep_config(void) ++{ ++ unsigned int val = 0; ++ struct ax620_pmu_source *pmu_source = ++ (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ ++ regmap_read(pmu_source->pmu_regmap, PMU_PWR_STATE, &val); ++ if (PWR_SYS_STATE(val, NPU_SYS) == PWR_STATE_SLEEP) ++ return; ++ ++ regmap_write(pmu_source->npu_regmap, NPU_BUS_IDLE_EN_SET, ++ (BIT_NPU_NPU2DATA_A_BUS_IDLE_EN | BIT_NPU_CFG2NPU_X2P_A_BUS_IDLE_EN)); ++ while (1) { ++ regmap_read(pmu_source->npu_regmap, NPU_BUS_IDLE_STATE, &val); ++ if ((val & BITS_NPU_BUS_IDLE_STATE) == BITS_NPU_BUS_IDLE_STATE) ++ break; ++ } ++ ++ /* clr clk_eb */ ++ regmap_write(pmu_source->npu_regmap, NPU_CLK_EB_0_CLR, BITS_NPU_CLK_EB0_EN); ++ regmap_write(pmu_source->npu_regmap, NPU_CLK_EB_1_CLR, BITS_NPU_CLK_EB1_EN); ++ ++ /* set npu slp_en */ ++ regmap_write(pmu_source->npu_regmap, NPU_SLEEP_CTRL_SET, BIT_NPU_SLP_EN); ++ ++ pmu_sleep_en(NPU_SYS); ++ ++ while (1) { ++ regmap_read(pmu_source->pmu_regmap, PMU_PWR_STATE, &val); ++ if (PWR_SYS_STATE(val, NPU_SYS) == PWR_STATE_SLEEP) { ++ break; ++ } ++ } ++} ++ ++static void other_sys_sleep_for_debug(void) ++{ ++ ax620_isp_sleep_config(); ++ ++ ax620_vpu_sleep_config(); ++ ++ ax620_mm_sleep_config(); ++ ++ ax620_npu_sleep_config(); ++} ++ ++#define PMU_WAKUP_SET 0x6C ++#define PMU_WAKUP_CLR 0x70 ++static void pmu_wakeup_en(enum sub_sys_e sub_sys) ++{ ++ unsigned int val = 0; ++ unsigned int state; ++ struct ax620_pmu_source *pmu_source = ++ (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ ++ regmap_read(pmu_source->pmu_regmap, PMU_PWR_STATE, &state); ++ if (PWR_SYS_STATE(state, sub_sys) == PWR_STATE_ON) ++ return; ++ ++ val = 1 << sub_sys; ++ regmap_write(pmu_source->pmu_regmap, PMU_WAKUP_SET, val); ++ ++ while (1) { ++ regmap_read(pmu_source->pmu_regmap, PMU_PWR_STATE, &state); ++ if (PWR_SYS_STATE(state, sub_sys) == PWR_STATE_ON) { ++ break; ++ } ++ } ++ ++ regmap_write(pmu_source->pmu_regmap, PMU_WAKUP_CLR, val); ++} ++ ++static void other_sys_wakeup_for_debug(void) ++{ ++ pmu_wakeup_en(ISP_SYS); ++ ++ pmu_wakeup_en(VPU_SYS); ++ ++ pmu_wakeup_en(MM_SYS); ++ ++ pmu_wakeup_en(NPU_SYS); ++} ++#endif ++ ++static int ax620_lpmode_enter(unsigned long arg) ++{ ++ int ret; ++ unsigned int val; ++ struct ax620_pmu_source *pmu_source = ++ (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ void (*sleep_fn)(unsigned int); ++ ++ ret = regmap_read(pmu_source->cpu_regmap, CPU_CLK_MUX_0, &val); ++ if (ret) { ++ pr_err("%s: could get cpu sys GLB_CPU_GLB reg\n", __func__); ++ //while (1); ++ return ret; ++ } ++ ++ ax620_ap_sleep_config(); ++ ++ ax620_cpu_sleep_config(); ++ ++ flush_cache_all(); ++ ++ cpu_switch_mm(pmu_source->pm_idmap_pgd, &init_mm); ++ sleep_fn = (void (*)(unsigned int))(iram_physical_base + ++ (unsigned int)axera_cpu_sleep_enter - ++ (unsigned int)axera_slp_cpu_resume); ++ sleep_fn(val); ++ ++ pr_err("%s: Failed to suspend\n", __func__); ++ ++ /* should never here */ ++ BUG(); ++ ++ return 1; ++} ++ ++static int ax620_backup_regs(void) ++{ ++ int i; ++ unsigned int val; ++ int reg_cnt; ++ struct ax620_pmu_source *pmu_source = ++ (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ ++ /* save ap sys context */ ++ reg_cnt = sizeof(ap_bak_store_regs) / sizeof(ap_bak_store_regs[0]); ++ for (i = 0; i < reg_cnt; i++) { ++ regmap_read(pmu_source->ap_regmap, ap_bak_store_regs[i].reg_addr, &val); ++ ap_bak_store_regs[i].reg_val = val; ++ } ++ ++ /* save cpu sys context */ ++ reg_cnt = sizeof(cpu_bak_store_regs) / sizeof(cpu_bak_store_regs[0]); ++ for (i = 0; i < reg_cnt; i++) { ++ regmap_read(pmu_source->cpu_regmap, cpu_bak_store_regs[i].reg_addr, &val); ++ cpu_bak_store_regs[i].reg_val = val; ++ } ++ ++ /* save flash sys context */ ++ reg_cnt = sizeof(flash_bak_store_regs) / sizeof(flash_bak_store_regs[0]); ++ for (i = 0; i < reg_cnt; i++) { ++ regmap_read(pmu_source->flash_regmap, flash_bak_store_regs[i].reg_addr, &val); ++ flash_bak_store_regs[i].reg_val = val; ++ } ++ ++ return 0; ++} ++ ++static int ax620_restore_regs(void) ++{ ++ int i; ++ int reg_cnt; ++ struct ax620_pmu_source *pmu_source = ++ (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ ++ /* restore flash sys context */ ++ reg_cnt = sizeof(flash_bak_store_regs) / sizeof(flash_bak_store_regs[0]); ++ for (i = 0; i < reg_cnt; i++) ++ regmap_write(pmu_source->flash_regmap, flash_bak_store_regs[i].reg_addr, ++ flash_bak_store_regs[i].reg_val); ++ ++ /* restore cpu sys context */ ++ reg_cnt = sizeof(cpu_bak_store_regs) / sizeof(cpu_bak_store_regs[0]); ++ for (i = 0; i < reg_cnt; i++) ++ regmap_write(pmu_source->cpu_regmap, cpu_bak_store_regs[i].reg_addr, ++ cpu_bak_store_regs[i].reg_val); ++ ++ /* restore ap sys context */ ++ reg_cnt = sizeof(ap_bak_store_regs) / sizeof(ap_bak_store_regs[0]); ++ for (i = 0; i < reg_cnt; i++) ++ regmap_write(pmu_source->ap_regmap, ap_bak_store_regs[i].reg_addr, ++ ap_bak_store_regs[i].reg_val); ++ ++ return 0; ++} ++ ++static void ax620_wakeup_addr_config(void) ++{ ++ struct ax620_pmu_source *pmu_source = ++ (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ ++ /* wakeup from iram addr 0*/ ++ regmap_write(pmu_source->chiptop_regmap, CHIP_TOP_CPU_CFG_CLR, ++ BITS_CPU_BOOT_ADDR_MASK); ++} ++ ++static int ax620_pm_enter(suspend_state_t state) ++{ ++ pr_info("ax620_pm_enter\n"); ++ ++ ax620_backup_regs(); ++#ifdef DEBUG_PM_TEMP ++ other_sys_sleep_for_debug(); ++#endif ++ ++ cpu_suspend(0, ax620_lpmode_enter); ++ ++#ifdef DEBUG_PM_TEMP ++ other_sys_wakeup_for_debug(); ++#endif ++ ++ ax620_restore_regs(); ++ ++ return 0; ++} ++ ++static irqreturn_t ax620_deb_gpio_lp_int_handler(int irq, void *data) ++{ ++ struct ax620_pmu_source *pmu_source; ++ pmu_source = (struct ax620_pmu_source *)data; ++ ++ /* clear deb_gpio_lp int status */ ++ regmap_write(pmu_source->chiptop_regmap, ++ CHIP_TOP_DEB_GPIO0_LP_INT_CLR_SET, 0xFF); ++ regmap_write(pmu_source->chiptop_regmap, ++ CHIP_TOP_DEB_GPIO0_LP_INT_CLR_CLR, 0xFF); ++ ++ return IRQ_HANDLED; ++} ++ ++static int ax620_deb_gpio_lp_int_config(struct device_node *np) ++{ ++ int ret, irq; ++ struct ax620_pmu_source *pmu_source; ++ ++ pmu_source = (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ ++ /* deb_gpio_lp_int */ ++ irq = of_irq_get_byname(np, "deb_gpio_lp_int"); ++ if (irq < 0) { ++ pr_err("%s: could not get lp int number\n", __func__); ++ return -1; ++ } ++ ++ ret = request_irq(irq, ax620_deb_gpio_lp_int_handler, IRQF_ONESHOT, ++ "ax620_deb_gpio_lp_int", (void *)pmu_source); ++ if (ret < 0) { ++ pr_err("%s: could not request ax620_deb_gpio_lp_int\n", __func__); ++ return ret; ++ } ++ ++ regmap_write(pmu_source->chiptop_regmap, ++ CHIP_TOP_DEB_GPIO0_LP_RISE_EN_SET, 0xFF); ++ regmap_write(pmu_source->chiptop_regmap, ++ CHIP_TOP_DEB_GPIO0_LP_INT_EN_SET, 0xFF); ++ ++ return 0; ++} ++ ++static int ax620_pm_valid(suspend_state_t state) ++{ ++ return state == PM_SUSPEND_MEM; ++} ++ ++static int generic_timer_suspend(void) ++{ ++ return 0; ++} ++ ++static void generic_timer_resume(void) ++{ ++ struct ax620_pmu_source *pmu_source; ++ pmu_source = (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ ++ regmap_write(pmu_source->gtmr_regmap, GTMR_CNTCVL, 0); ++ regmap_write(pmu_source->gtmr_regmap, GTMR_CNTCVU, 0); ++ regmap_write(pmu_source->gtmr_regmap, GTMR_CNTFID0, pmu_source->gtmr_freq); ++ /* enable gtimer */ ++ regmap_write(pmu_source->gtmr_regmap, GTMR_CNTCR, BITS_ENABLE_GTMR); ++} ++ ++static struct syscore_ops generic_timer_pm_syscore_ops = { ++ .suspend = generic_timer_suspend, ++ .resume = generic_timer_resume, ++}; ++ ++static int generic_timer_pm_init(void) ++{ ++ struct ax620_pmu_source *pmu_source; ++ struct device_node *gtmr_node; ++ ++ pmu_source = (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ ++ gtmr_node = of_find_compatible_node(NULL, NULL, "axera,ax620x-gtmr"); ++ if (!gtmr_node) { ++ pr_err("%s: could not find gtmr device node \n", __func__); ++ return -ENODEV; ++ } ++ ++ if (of_property_read_u32(gtmr_node, "clock-frequency", ++ &pmu_source->gtmr_freq)) { ++ pr_err("%s: could not find gtmr clk freq value in dts \n", __func__); ++ return -ENODEV; ++ } ++ ++ pmu_source->gtmr_regmap = syscon_node_to_regmap(gtmr_node); ++ if (IS_ERR(pmu_source->gtmr_regmap)) { ++ pr_err("%s: could not find gtmr regmap\n", __func__); ++ return PTR_ERR(pmu_source->gtmr_regmap); ++ } ++ ++ register_syscore_ops(&generic_timer_pm_syscore_ops); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_ARM_LPAE ++static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end, ++ unsigned long prot) ++{ ++ pmd_t *pmd; ++ unsigned long next; ++ ++ if (pud_none_or_clear_bad(pud) || (pud_val(*pud) & L_PGD_SWAPPER)) { ++ pmd = pmd_alloc_one(&init_mm, addr); ++ if (!pmd) { ++ pr_warn("Failed to allocate identity pmd.\n"); ++ return; ++ } ++ /* ++ * Copy the original PMD to ensure that the PMD entries for ++ * the kernel image are preserved. ++ */ ++ if (!pud_none(*pud)) ++ memcpy(pmd, pmd_offset(pud, 0), ++ PTRS_PER_PMD * sizeof(pmd_t)); ++ pud_populate(&init_mm, pud, pmd); ++ pmd += pmd_index(addr); ++ } else ++ pmd = pmd_offset(pud, addr); ++ ++ do { ++ next = pmd_addr_end(addr, end); ++ *pmd = __pmd((addr & PMD_MASK) | prot); ++ flush_pmd_entry(pmd); ++ } while (pmd++, addr = next, addr != end); ++} ++#else /* !CONFIG_ARM_LPAE */ ++static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end, ++ unsigned long prot) ++{ ++ pmd_t *pmd = pmd_offset(pud, addr); ++ ++ addr = (addr & PMD_MASK) | prot; ++ pmd[0] = __pmd(addr); ++ addr += SECTION_SIZE; ++ pmd[1] = __pmd(addr); ++ flush_pmd_entry(pmd); ++} ++#endif /* CONFIG_ARM_LPAE */ ++ ++static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end, ++ unsigned long prot) ++{ ++ pud_t *pud = pud_offset(pgd, addr); ++ unsigned long next; ++ ++ do { ++ next = pud_addr_end(addr, end); ++ idmap_add_pmd(pud, addr, next, prot); ++ } while (pud++, addr = next, addr != end); ++} ++ ++static void identity_mapping_add(pgd_t *pgd, unsigned long start, ++ unsigned long end_to, unsigned long prot) ++{ ++ unsigned long addr = start; ++ unsigned long end = end_to; ++ unsigned long next; ++ ++ pr_info("Setting up static identity map for 0x%lx - 0x%lx\n", addr, end); ++ ++ prot |= PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AF; ++ ++ pgd += pgd_index(addr); ++ do { ++ next = pgd_addr_end(addr, end); ++ idmap_add_pud(pgd, addr, next, prot); ++ } while (pgd++, addr = next, addr != end); ++} ++ ++static int pm_setup_idmap(unsigned long start, unsigned long end) ++{ ++ struct ax620_pmu_source *pmu_source; ++ ++ pmu_source = (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ ++ pmu_source->pm_idmap_pgd = pgd_alloc(&init_mm); ++ if (!pmu_source->pm_idmap_pgd) ++ return -ENOMEM; ++ ++ identity_mapping_add(pmu_source->pm_idmap_pgd, start, end, 0); ++ ++ /* Flush L1 for the hardware to see this page table content */ ++ flush_cache_louis(); ++ ++ return 0; ++} ++ ++static int ax620_pm_init(struct device_node *np) ++{ ++ struct device_node *iram_np; ++ struct ax620_pmu_source *pmu_source; ++ struct resource iram_res, temp_res; ++ struct device_node *dev_np; ++ void __iomem *iram_base; ++ int ret; ++ ++ pmu_source = (struct ax620_pmu_source *)cur_pm_data->pm_source; ++ ++ pmu_source->pmu_regmap = syscon_node_to_regmap(np); ++ if (IS_ERR(pmu_source->pmu_regmap)) { ++ pr_err("%s: could not find pmu regmap\n", __func__); ++ return PTR_ERR(pmu_source->pmu_regmap); ++ } ++ ++ pmu_source->ap_regmap = syscon_regmap_lookup_by_compatible( ++ "axera,ax620x-ap-clk"); ++ if (IS_ERR(pmu_source->ap_regmap)) { ++ pr_err("%s: could not find ap sys regmap\n", __func__); ++ return PTR_ERR(pmu_source->ap_regmap); ++ } ++ ++ pmu_source->cpu_regmap = syscon_regmap_lookup_by_compatible( ++ "axera,ax620x-cpu-clk"); ++ if (IS_ERR(pmu_source->cpu_regmap)) { ++ pr_err("%s: could not find cpu sys regmap\n", __func__); ++ return PTR_ERR(pmu_source->cpu_regmap); ++ } ++ ++ pmu_source->flash_regmap = syscon_regmap_lookup_by_compatible( ++ "axera,ax620x-flash-clk"); ++ if (IS_ERR(pmu_source->flash_regmap)) { ++ pr_err("%s: could not find flash sys regmap\n", __func__); ++ return PTR_ERR(pmu_source->flash_regmap); ++ } ++ ++ pmu_source->chiptop_regmap = syscon_regmap_lookup_by_compatible( ++ "axera,ax620x-common-clk"); ++ if (IS_ERR(pmu_source->chiptop_regmap)) { ++ pr_err("%s: could not find chiptop regmap\n", __func__); ++ return PTR_ERR(pmu_source->chiptop_regmap); ++ } ++ ++#ifdef DEBUG_PM_TEMP ++ pmu_source->isp_regmap = syscon_regmap_lookup_by_compatible( ++ "axera,ax620x-isp-clk"); ++ if (IS_ERR(pmu_source->isp_regmap)) { ++ pr_err("%s: could not find isp sys regmap\n", __func__); ++ return PTR_ERR(pmu_source->isp_regmap); ++ } ++ ++ pmu_source->mm_regmap = syscon_regmap_lookup_by_compatible( ++ "axera,ax620x-mm-clk"); ++ if (IS_ERR(pmu_source->mm_regmap)) { ++ pr_err("%s: could not find mm sys regmap\n", __func__); ++ return PTR_ERR(pmu_source->mm_regmap); ++ } ++ ++ pmu_source->vpu_regmap = syscon_regmap_lookup_by_compatible( ++ "axera,ax620x-vpu-clk"); ++ if (IS_ERR(pmu_source->vpu_regmap)) { ++ pr_err("%s: could not find vpu sys regmap\n", __func__); ++ return PTR_ERR(pmu_source->vpu_regmap); ++ } ++ ++ pmu_source->npu_regmap = syscon_regmap_lookup_by_compatible( ++ "axera,npu_sys"); ++ if (IS_ERR(pmu_source->npu_regmap)) { ++ pr_err("%s: could not find npu sys regmap\n", __func__); ++ return PTR_ERR(pmu_source->npu_regmap); ++ } ++#endif ++ ++ iram_np = of_find_compatible_node(NULL, NULL, "axera,ax620x-iram"); ++ if (!iram_np) { ++ pr_err("%s: could not find iram dt node\n", __func__); ++ return -ENODEV; ++ } ++ ++ if (!of_address_to_resource(iram_np, 0, &iram_res)) { ++ iram_physical_base = iram_res.start; ++ iram_base = ioremap(iram_res.start, resource_size(&iram_res)); ++ if (!iram_base) { ++ pr_err("%s: could not map iram base\n", __func__); ++ return -ENOMEM; ++ } ++ } else { ++ pr_err("%s: could not find iram resource data\n", __func__); ++ return -ENODEV; ++ } ++ ++ dev_np = of_find_compatible_node(NULL, NULL, "axera,ax620x-ap-clk"); ++ of_address_to_resource(dev_np, 0, &temp_res); ++ ap_sys_physical_base = temp_res.start; ++ ++ dev_np = of_find_compatible_node(NULL, NULL, "axera,ax620x-pmu"); ++ of_address_to_resource(dev_np, 0, &temp_res); ++ pmu_physical_base = temp_res.start; ++ ++ dev_np = of_find_compatible_node(NULL, NULL, "axera,ax620x-cpu-clk"); ++ of_address_to_resource(dev_np, 0, &temp_res); ++ cpu_physical_base = temp_res.start; ++ ++ cpu_resume_physical_addr = virt_to_phys((void *)cpu_resume); ++#ifdef CONFIG_SMP ++ pen_release_physical_addr = virt_to_phys((void *)&pen_release); ++#endif ++ /* copy resume code and data to bootsram */ ++ memcpy(iram_base, axera_slp_cpu_resume, ax620_slp_resume_code_sz); ++ ++ flush_cache_all(); ++ ++ iounmap(iram_base); ++ ++ ax620_wakeup_addr_config(); ++ ++ ret = ax620_deb_gpio_lp_int_config(np); ++ if (ret) { ++ pr_err("%s: ax620 deb_gpio_lp_int config fail \n", __func__); ++ return ret; ++ } ++ ++ ret = pm_setup_idmap(iram_res.start, iram_res.end + 1); ++ if (ret) { ++ pr_err("%s: could not remap iram to page table \n", __func__); ++ return ret; ++ } ++ ++ ret = generic_timer_pm_init(); ++ if (ret) { ++ pr_err("%s: generic_timer_pm_init fail \n", __func__); ++ return ret; ++ } ++ ++ printk("ax620 pm int successfully\n"); ++ ++ return ret; ++} ++ ++static struct ax620_pmu_source ax620_pmu_source; ++ ++static const struct platform_suspend_ops ax620_pm_ops = { ++ .enter = ax620_pm_enter, ++ .valid = ax620_pm_valid, ++}; ++ ++static const struct axera_pm_data ax620_pm_data= { ++ .ops = &ax620_pm_ops, ++ .init = ax620_pm_init, ++ .pm_source = &ax620_pmu_source, ++}; ++ ++static const struct of_device_id axera_pmu_of_device_ids[]= { ++ { ++ .compatible = "axera,ax620x-pmu", ++ .data = &ax620_pm_data, ++ }, ++ { /* sentinel */ }, ++}; ++ ++static int __init axera_pm_init(void) ++{ ++ const struct of_device_id *match; ++ struct device_node *np; ++ int ret; ++ ++ np = of_find_matching_node_and_match(NULL, axera_pmu_of_device_ids, &match); ++ if (!match) { ++ pr_err("Failed to find PMU node\n"); ++ return -ENODEV; ++ } ++ cur_pm_data = (struct axera_pm_data *)match->data; ++ ++ if (cur_pm_data->init) { ++ ret = cur_pm_data->init(np); ++ ++ if (ret) { ++ pr_err("%s: matches init error %d\n", __func__, ret); ++ return ret; ++ } ++ } ++ ++ suspend_set_ops(cur_pm_data->ops); ++ ++ return 0; ++} ++ ++late_initcall(axera_pm_init); +diff --git a/arch/arm/mach-axera/pm.h b/arch/arm/mach-axera/pm.h +new file mode 100644 +index 000000000..9e586c18f +--- /dev/null ++++ b/arch/arm/mach-axera/pm.h +@@ -0,0 +1,105 @@ ++/* ++ * Axera power manage driver ++ * ++ * Copyright (c) 2019-2020 Axera Technology Co., Ltd. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef __MACH_AXERA_PM_H ++#define __MACH_AXERA_PM_H ++ ++#define CPU_CLK_MUX_0 0x0 ++#define CPU_CLK_EB_0 0x4 ++#define CPU_CLK_EB_1 0x8 ++#define CPU_SLEEP_CTRL 0x2C ++#define CPU_SLEEP_CTRL_SET 0x102C ++#define CPU_BUS_IDLE_EN_SET 0x1030 ++#define CPU_CLK_EB_1_CLR 0x2008 ++ ++#define PMU_PWR_STATE 0x8 ++#define PMU_SLP_EN_SET 0x64 ++ ++#define AP_CLK_MUX_0 0x0 ++#define AP_CLK_MUX_1 0x4 ++#define AP_CLK_EB_0 0x8 ++#define AP_CLK_EB_1 0xC ++#define AP_CLK_EB_2 0x10 ++#define AP_CLK_EB_3 0x14 ++#define AP_CLK_DIV_0 0x18 ++#define AP_CLK_DIV_1 0x1C ++#define AP_BUS_IDLE_EN 0x2C ++#define AP_SLEEP_CTRL 0x150 ++#define AP_CLK_EB_0_CLR 0x200 ++#define AP_CLK_EB_1_CLR 0x208 ++#define AP_CLK_EB_2_CLR 0x210 ++#define AP_CLK_EB_3_CLR 0x218 ++#define AP_BUS_IDLE_EN_SET 0x23C ++#define AP_SLEEP_CTRL_SET 0x46C ++ ++#define FLASH_CLK_MUX_0 0x0 ++#define FLASH_CLK_EB_0 0x4 ++#define FLASH_CLK_EB_1 0x8 ++#define FLASH_CLK_EB_0_CLR 0xF4 ++#define FLASH_CLK_EB_1_CLR 0xFC ++ ++#define CHIP_TOP_DEB_GPIO0_LP_INT_EN_SET 0x134 ++#define CHIP_TOP_DEB_GPIO0_LP_INT_CLR_SET 0x140 ++#define CHIP_TOP_DEB_GPIO0_LP_INT_CLR_CLR 0x144 ++#define CHIP_TOP_DEB_GPIO0_LP_RISE_EN_SET 0x14C ++#define CHIP_TOP_CPU_CFG_CLR 0x180 ++ ++#define GTMR_CNTCR 0x0 ++#define GTMR_CNTCVL 0x8 ++#define GTMR_CNTCVU 0xC ++#define GTMR_CNTFID0 0x20 ++#define BITS_ENABLE_GTMR 0x11 ++ ++#define BITS_AP_BUS_IDLE_EN 0xFFFF ++#define BIT_AP_SLP_EN BIT(0) ++#define BITS_AP_BUS_IDLE_STATE 0x83EE ++#define BITS_AP_CLK_EB0_EN 0x3FFFFF ++#define BITS_AP_CLK_EB1_EN 0xFFFFFFFF ++#define BITS_AP_CLK_EB2_EN 0xFFFFFFFF ++#define BITS_AP_CLK_EB3_EN 0x7FFFFF ++ ++#define BITS_CPU_BUS_IDLE_EN 0x3FFF ++#define BIT_CLK_DMA_EB BIT(0) ++#define BIT_INT_DISABLE BIT(1) ++#define BIT_CPU_SLEEP BIT(0) ++ ++#define BITS_CPU_BOOT_ADDR_MASK (0xF << 18) ++ ++#define BITS_FLAHS_CLK_EB0_EN 0x7F ++#define BITS_FLAHS_CLK_EB1_EN 0xF ++ ++#define PWR_STATE_ON 0 ++#define PWR_STATE_SLEEP 6 ++#define PWR_SYS_STATE(val, sys) (((val) >> ((sys) * 4)) & 0xF) ++ ++enum sub_sys_e { ++ AP_SYS = 0, ++ NPU_SYS, ++ VPU_SYS, ++ ISP_SYS, ++ MM_SYS, ++ DDR_SYS, ++ CPU_SYS, ++ SYS_COUNT, ++}; ++ ++extern unsigned int ax620_slp_resume_code_sz; ++extern unsigned int ap_sys_physical_base; ++extern unsigned int pmu_physical_base; ++extern unsigned int cpu_physical_base; ++extern unsigned int iram_physical_base; ++extern unsigned int cpu_resume_physical_addr; ++#ifdef CONFIG_SMP ++extern unsigned int pen_release_physical_addr; ++#endif ++void axera_slp_cpu_resume(void); ++void axera_cpu_sleep_enter(unsigned int); ++#endif +diff --git a/arch/arm/mach-axera/sleep.S b/arch/arm/mach-axera/sleep.S +new file mode 100644 +index 000000000..f08528ebc +--- /dev/null ++++ b/arch/arm/mach-axera/sleep.S +@@ -0,0 +1,255 @@ ++/* ++ * Axera power manage driver ++ * ++ * Copyright (c) 2019-2020 Axera Technology Co., Ltd. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#define CPU_CLK_MUX_0 0x0 ++#define CPU_SYS_ADDR_REMAP 0x14 ++#define DDR_SLEEP_CODE_OFFSET 0xB000 ++#define IRAM_SP_TEMP 0x17FFC ++#define PMU_WAKUP_SET 0x6C ++#define PMU_WAKUP_CLR 0x70 ++#define PMU_PWR_STATE 0x8 ++#define AP_CLK_EB_0_CLR 0x200 ++#define CLK_WDT_EB_OFFSET 19 ++ ++#define REMAP_HSK_CNT 4 ++#define REMAP_HSK_LOOP_CNT ((REMAP_HSK_CNT + 1) * 2) ++#define REMAP_HSK_CNT_SHITT 8 ++#define REMAP_HSK_CNT_MASK 0xFF00 ++#define REMAP_HSK_EN 0x1 ++ ++ ++ .align 2 ++ENTRY(axera_slp_cpu_resume) ++ cpsid aif, #SVC_MODE ++ ++ mrc p15, 0, r1, c0, c0, 5 ++ and r1, r1, #0xf ++ cmp r1, #0 ++ /* olny cpu0 can continue to run, the others is halt here */ ++ beq cpu0run ++ ++ /* sometime boot cores less than real processor cores, ++ * the unused cores enter wfi state ++ */ ++ cmp r1, #CONFIG_NR_CPUS ++ blt secondary_run ++wfi_loop: ++ wfi ++ b wfi_loop ++ ++secondary_run: ++ adr r0, pen_release_physical_addr ++ ldr r0, [r0] ++ ++ adr r2, 1f ++ ldmia r2, {r7, r8} ++ sub r2, r8, r7 @ secondary_startup and pen_release vaddr offset ++ add r8, r0, r2 ++ /* secondary cores enter wfe before ddr ready */ ++ wfe ++pen: ++ ldr r2, [r0] ++ cmp r2, r1 ++ bxeq r8 ++ b pen ++ ++cpu0run: ++ bl axera_cpu_up_freq ++ ++ bl ap_sys_wakeup ++ ++ /* ddr reinit here*/ ++ ldr sp, =#IRAM_SP_TEMP ++ ldr r1, =#DDR_SLEEP_CODE_OFFSET /* ddr reinit code addr */ ++ mov r0, #0x0 ++ blx r1 ++ ++ /* let secondary cores loop pen_release */ ++ sev ++ ++ bl rom_remap_config ++ ++ /* run cpu_resume */ ++ adr r0, cpu_resume_physical_addr ++ ldr r0, [r0] ++ bx r0 ++ENDPROC(axera_slp_cpu_resume) ++ ++ENTRY(axera_cpu_up_freq) ++ ldr r0, =#CPU_CLK_MUX_0 ++ adr r1, cpu_freq_save ++ ldr r1, [r1] ++ adr r2, cpu_physical_base ++ ldr r2, [r2] ++ add r0, r0, r2 ++ str r1, [r0] ++ mov pc, r14 ++ENDPROC(axera_cpu_up_freq) ++ ++ENTRY(ap_sys_wakeup) ++ adr r0, pmu_physical_base ++ ldr r0, [r0] @ get pmu physical addr ++ mov r1, #PMU_WAKUP_SET @ set ap wakeup bit ++ add r1, r0, r1 ++ mov r2, #0x1 ++ str r2, [r1] ++ ++ mov r1, #PMU_PWR_STATE @ loop ap power state bits ++ add r1, r0, r1 ++loop_state: ++ ldr r2, [r1] ++ and r2, r2, #0xF ++ cmp r2, #0x0 ++ bne loop_state ++ mov r1, #PMU_WAKUP_CLR @ clear pmu wakeup bit ++ add r1, r0, r1 ++ mov r2, #0x1 ++ str r2, [r1] ++ ++ adr r0, ap_sys_physical_base @ disable ap wdt ++ ldr r0, [r0] ++ mov r1, #AP_CLK_EB_0_CLR ++ add r0 ,r0, r1 ++ mov r1, #0x1 ++ mov r1, r1, lsl #CLK_WDT_EB_OFFSET ++ str r1, [r0] ++ mov pc, r14 ++ENDPROC(ap_sys_wakeup) ++ ++ENTRY(rom_remap_config) ++ ldr r0, =#CPU_SYS_ADDR_REMAP ++ adr r1, cpu_physical_base ++ ldr r1, [r1] ++ add r0, r0, r1 @ get remap addr ++ ldr r1, [r0] @ get val of remap register ++ ++ mov r2, #REMAP_HSK_CNT ++ bic r1, #REMAP_HSK_CNT_MASK ++ orr r1, r1, r2, lsl #REMAP_HSK_CNT_SHITT ++ mov r2, #0 ++ mov r3, #REMAP_HSK_LOOP_CNT ++ orr r1, r1, #REMAP_HSK_EN ++ str r1, [r0] @ set HSK cnt and enable ++ ++hsk_loop: ++ wfe ++ add r2, r2, #1 ++ cmp r2, r3 ++ bne hsk_loop ++ bic r1, #REMAP_HSK_EN ++ str r1, [r0] @ loop then clear hsk enable ++ ++ mov pc, r14 ++ENDPROC(rom_remap_config) ++ ++ ++/* r0: clk_val */ ++ENTRY(axera_cpu_sleep_enter) ++ /* after mmu off, r0 save axera_cpu_do_sleep physical addr in iram for ret */ ++ ldr r2, =axera_cpu_do_sleep ++ ldr r3, =axera_slp_cpu_resume ++ sub r2, r2 ,r3 ++ adr r1, iram_physical_base ++ ldr r1, [r1] ++ add r1, r2, r1 ++ ++ adr r2, axera_disable_mmu ++ blx r2 ++ENDPROC(axera_cpu_sleep_enter) ++ ++/* r1: the physical addr of axera_cpu_do_sleep */ ++ENTRY(axera_disable_mmu) ++ mrc p15, 0, r3, c1, c0, 0 ++ mov r2, #CR_I | CR_Z | CR_C | CR_M ++ bic r3, r3, r2 ++ dsb ++ mcr p15, 0, r3, c1, c0, 0 ++ isb ++ ++ ret r1 ++ENDPROC(axera_disable_mmu) ++ ++ENTRY(axera_cpu_do_sleep) ++ adr r1, cpu_freq_save ++ str r0, [r1] ++ ++ /* ddr sleep config */ ++ mov r0, #0x1 ++ adr r1, iram_physical_base ++ ldr r1, [r1] ++ mov r2, #DDR_SLEEP_CODE_OFFSET ++ add r1, r1, r2 ++ ldr sp, =#IRAM_SP_TEMP ++ blx r1 ++ @b . ++ ++ dsb ++ isb ++ wfi ++ ++ mov r0, #1 ++ bx lr ++ENDPROC(axera_cpu_do_sleep) ++ .ltorg ++ ++/* Parameters in iram */ ++ .globl cpu_freq_save ++cpu_freq_save: ++ .long 0 ++ ++/* Parameters filled in by the kernel begin */ ++ ++/* cpu base addr (physical address) */ ++ .globl cpu_physical_base ++cpu_physical_base: ++ .long 0 ++ ++/* pmu base addr (physical address) */ ++ .globl pmu_physical_base ++pmu_physical_base: ++ .long 0 ++ ++/* ap sys base addr (physical address) */ ++ .globl ap_sys_physical_base ++ap_sys_physical_base: ++ .long 0 ++ ++/* aon iram addr (physical address) */ ++ .globl iram_physical_base ++iram_physical_base: ++ .long 0 ++ ++/* cpu_resume addr (physical address) */ ++ .globl cpu_resume_physical_addr ++cpu_resume_physical_addr: ++ .long 0 ++ ++#ifdef CONFIG_SMP ++/* pen_release addr (physical address) */ ++ .globl pen_release_physical_addr ++pen_release_physical_addr: ++ .long 0 ++#endif ++ ++/* Parameters filled in by the kernel end */ ++ ++1: .long pen_release ++ .long secondary_startup ++ ++ENTRY(ax620_slp_resume_code_sz) ++ .word . - axera_slp_cpu_resume ++ ++/* not copy to iram*/ +diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S +index 2149b47a0..1eae49c17 100644 +--- a/arch/arm/mm/cache-v7.S ++++ b/arch/arm/mm/cache-v7.S +@@ -350,7 +350,7 @@ ENDPROC(v7_flush_kern_dcache_area) + * - start - virtual start address of region + * - end - virtual end address of region + */ +-v7_dma_inv_range: ++ENTRY(v7_dma_inv_range) + dcache_line_size r2, r3 + sub r3, r2, #1 + tst r0, r3 +diff --git a/arch/arm/mm/proc-syms.c b/arch/arm/mm/proc-syms.c +index 054b491ff..2e74f553e 100644 +--- a/arch/arm/mm/proc-syms.c ++++ b/arch/arm/mm/proc-syms.c +@@ -30,6 +30,7 @@ EXPORT_SYMBOL(__cpuc_flush_user_all); + EXPORT_SYMBOL(__cpuc_flush_user_range); + EXPORT_SYMBOL(__cpuc_coherent_kern_range); + EXPORT_SYMBOL(__cpuc_flush_dcache_area); ++EXPORT_SYMBOL(dmac_inv_range); + #else + EXPORT_SYMBOL(cpu_cache); + #endif +diff --git a/arch/arm/tools/syscall.tbl b/arch/arm/tools/syscall.tbl +index 8edf93b44..8175d2b2b 100644 +--- a/arch/arm/tools/syscall.tbl ++++ b/arch/arm/tools/syscall.tbl +@@ -414,3 +414,4 @@ + 397 common statx sys_statx + 398 common rseq sys_rseq + 399 common io_pgetevents sys_io_pgetevents ++400 common axsyslog sys_axsyslog +diff --git a/block/Makefile b/block/Makefile +index 572b33f32..c7e381d56 100644 +--- a/block/Makefile ++++ b/block/Makefile +@@ -37,3 +37,4 @@ obj-$(CONFIG_BLK_WBT) += blk-wbt.o + obj-$(CONFIG_BLK_DEBUG_FS) += blk-mq-debugfs.o + obj-$(CONFIG_BLK_DEBUG_FS_ZONED)+= blk-mq-debugfs-zoned.o + obj-$(CONFIG_BLK_SED_OPAL) += sed-opal.o ++obj-$(CONFIG_BLK_DEV_RAM) += ax_ramdisk.o +diff --git a/block/ax_ramdisk.c b/block/ax_ramdisk.c +new file mode 100644 +index 000000000..39996fdee +--- /dev/null ++++ b/block/ax_ramdisk.c +@@ -0,0 +1,163 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define AX_DEVICE_NAME "axramdisk" ++ ++static unsigned int axbdrv_ma_no, disk_size; ++static char *ramdisk; ++static struct gendisk *ax_gd; ++static spinlock_t lock; ++static unsigned short sector_size = 512; ++static struct request_queue *ax_request_queue; ++ ++static void ax_request(struct request_queue *q) ++{ ++ struct request *rq; ++ int size, res = 0; ++ char *ptr; ++ unsigned nr_sectors, sector; ++ ++ rq = blk_fetch_request(q); ++ while (rq) { ++ nr_sectors = blk_rq_cur_sectors(rq); ++ sector = blk_rq_pos(rq); ++ ++ ptr = ramdisk + sector * sector_size; ++ size = nr_sectors * sector_size; ++ ++ if ((ptr + size) > (ramdisk + disk_size)) { ++ pr_err("end of device\n"); ++ goto done; ++ } ++ ++ if (rq_data_dir(rq)) { ++ memcpy(ptr, bio_data(rq->bio), size); ++ } else { ++ memcpy(bio_data(rq->bio), ptr, size); ++ } ++done: ++ if (!__blk_end_request_cur(rq, res)) ++ rq = blk_fetch_request(q); ++ } ++} ++ ++static int ax_ioctl(struct block_device *bdev, fmode_t mode, ++ unsigned int cmd, unsigned long arg) ++{ ++ long size; ++ struct hd_geometry geo; ++ ++ pr_info("cmd=%d\n", cmd); ++ ++ switch (cmd) { ++ case HDIO_GETGEO: ++ pr_info("hit HDIO_GETGEO\n"); ++ /* ++ * get geometry: we have to fake one... ++ */ ++ size = disk_size; ++ size &= ~0x3f; ++ geo.cylinders = size>>6; ++ geo.heads = 2; ++ geo.sectors = 16; ++ geo.start = 4; ++ ++ if (copy_to_user((void __user *)arg, &geo, sizeof(geo))) ++ return -EFAULT; ++ ++ return 0; ++ } ++ pr_warn("return -ENOTTY\n"); ++ ++ return -ENOTTY; ++} ++ ++static const struct block_device_operations axbdrv_fops = { ++ .owner = THIS_MODULE, ++ .ioctl = ax_ioctl, ++}; ++ ++static int __init ax_ramdisk_init(void) ++{ ++ int phy_addr; ++ int diskmb; ++ struct device_node * of_node = of_find_compatible_node(NULL, NULL, "axera, ramdisk"); ++ if (!of_node) { ++ pr_err("%s:can't find ramdisk device tree node\n", __func__); ++ return -ENODEV; ++ } ++ if (of_property_read_u32(of_node, "addr", &phy_addr)) { ++ pr_err("%s:can't find 'addr' in ramdisk device tree node\n", __func__); ++ return -ENXIO; ++ } ++ if (of_property_read_u32(of_node, "size", &disk_size)) { ++ pr_err("%s:can't find 'size' in ramdisk device tree node\n", __func__); ++ return -ENXIO; ++ } ++ diskmb = disk_size / 0x100000; ++ spin_lock_init(&lock); ++ ++ ramdisk = ioremap_nocache(phy_addr,disk_size); ++ if (!ramdisk) ++ return -ENOMEM; ++ ++ ax_request_queue = blk_init_queue(ax_request, &lock); ++ if (!ax_request_queue) { ++ iounmap(ramdisk); ++ return -ENOMEM; ++ } ++ blk_queue_logical_block_size(ax_request_queue, sector_size); ++ ++ axbdrv_ma_no = register_blkdev(0, AX_DEVICE_NAME); ++ if (axbdrv_ma_no < 0) { ++ pr_err("Failed registering axbdrv, returned %d\n", ++ axbdrv_ma_no); ++ iounmap(ramdisk); ++ return axbdrv_ma_no; ++ } ++ ++ ax_gd = alloc_disk(16); ++ if (!ax_gd) { ++ unregister_blkdev(axbdrv_ma_no, AX_DEVICE_NAME); ++ iounmap(ramdisk); ++ return -ENOMEM; ++ } ++ ++ ax_gd->major = axbdrv_ma_no; ++ ax_gd->first_minor = 0; ++ ax_gd->fops = &axbdrv_fops; ++ strcpy(ax_gd->disk_name, AX_DEVICE_NAME); ++ ax_gd->queue = ax_request_queue; ++ set_capacity(ax_gd, disk_size / sector_size); ++ add_disk(ax_gd); ++ ++ pr_info("axramdisk device successfully registered, Major No. = %d\n", axbdrv_ma_no); ++ pr_info("Capacity of ram disk is: %d MB\n", diskmb); ++ ++ return 0; ++} ++ ++static void __exit ax_ramdisk_exit(void) ++{ ++ del_gendisk(ax_gd); ++ put_disk(ax_gd); ++ unregister_blkdev(axbdrv_ma_no, AX_DEVICE_NAME); ++ pr_info("module successfully unloaded, Major No. = %d\n", axbdrv_ma_no); ++ blk_cleanup_queue(ax_request_queue); ++ iounmap(ramdisk); ++} ++ ++module_init(ax_ramdisk_init); ++module_exit(ax_ramdisk_exit); ++ ++MODULE_LICENSE("GPL v2"); ++ +diff --git a/drivers/char/mem.c b/drivers/char/mem.c +index 54b86490d..09d742878 100644 +--- a/drivers/char/mem.c ++++ b/drivers/char/mem.c +@@ -897,6 +897,7 @@ static const struct memdev { + [9] = { "urandom", 0666, &urandom_fops, 0 }, + #ifdef CONFIG_PRINTK + [11] = { "kmsg", 0644, &kmsg_fops, 0 }, ++ [12] = { "axkmsg", 0644, &ax_kmsg_fops, 0 }, + #endif + }; + +diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig +index 292056bbb..1319450c7 100644 +--- a/drivers/clk/Kconfig ++++ b/drivers/clk/Kconfig +@@ -299,5 +299,6 @@ source "drivers/clk/sunxi-ng/Kconfig" + source "drivers/clk/tegra/Kconfig" + source "drivers/clk/ti/Kconfig" + source "drivers/clk/uniphier/Kconfig" ++source "drivers/clk/axera/Kconfig" + + endmenu +diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile +index ed344eb71..9ff042ecf 100644 +--- a/drivers/clk/Makefile ++++ b/drivers/clk/Makefile +@@ -109,3 +109,4 @@ obj-$(CONFIG_X86) += x86/ + endif + obj-$(CONFIG_ARCH_ZX) += zte/ + obj-$(CONFIG_ARCH_ZYNQ) += zynq/ ++obj-$(CONFIG_ARCH_AXERA) += axera/ +diff --git a/drivers/clk/axera/Kconfig b/drivers/clk/axera/Kconfig +new file mode 100644 +index 000000000..f3e7b2f51 +--- /dev/null ++++ b/drivers/clk/axera/Kconfig +@@ -0,0 +1,28 @@ ++config COMMON_CLK_AXERA ++ bool ++ ---help--- ++ Axera SoCs' clock support. ++ ++config COMMON_CLK_AX620X ++ bool "Clock driver for Axera AX620X" ++ depends on ARCH_AXERA || COMPILE_TEST ++ select COMMON_CLK_AXERA ++ default ARCH_AXERA ++ ---help--- ++ This driver supports Axera AX620X basic clocks. ++ ++config SLAVE_CLK_AX620X ++ bool "Slave Clock driver for Axera AX620X" ++ depends on ARCH_AXERA || COMPILE_TEST ++ select COMMON_CLK_AXERA ++ default n ++ ---help--- ++ This driver supports Axera AX620X slave clocks. ++ ++config CLK_AX620U ++ bool "Clock driver for Axera AX620U" ++ depends on ARCH_AXERA || COMPILE_TEST ++ select COMMON_CLK_AXERA ++ default n ++ ---help--- ++ This driver supports Axera AX620U clocks. +diff --git a/drivers/clk/axera/Makefile b/drivers/clk/axera/Makefile +new file mode 100644 +index 000000000..63d98097c +--- /dev/null ++++ b/drivers/clk/axera/Makefile +@@ -0,0 +1,6 @@ ++# SPDX-License-Identifier: GPL-2.0 ++# ++# AXERA Clock Drivers ++# ++obj-$(CONFIG_COMMON_CLK_AXERA) += clk.o ++obj-$(CONFIG_COMMON_CLK_AX620X) += clk-ax620x.o +diff --git a/drivers/clk/axera/clk-ax620x.c b/drivers/clk/axera/clk-ax620x.c +new file mode 100644 +index 000000000..fa1c9754b +--- /dev/null ++++ b/drivers/clk/axera/clk-ax620x.c +@@ -0,0 +1,903 @@ ++ ++/* ++ * Axera AX620X clock driver ++ * ++ * Copyright (c) 2019-2020 Axera Technology Co., Ltd. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "clk-axera.h" ++ ++/*common*/ ++ ++/* clocks in AO (always on) controller */ ++static struct axera_fixed_rate_clock ax620x_fixed_rate_clks[] __initdata = { ++ {AX620X_REF32HZ, "rtc_32hz", NULL, 0, 32,}, ++ {AX620X_REF32K, "xtal_32k", NULL, 0, 32764,}, ++#ifdef CONFIG_SLAVE_CLK_AX620X ++ {AX620X_REF24M, "xtal_24m", NULL, 0, 19200000,}, ++#else ++ {AX620X_REF24M, "xtal_24m", NULL, 0, 24000000,}, ++#endif ++ {AX620X_CPLL, "cpll", NULL, 0, 1248000000,}, ++ {AX620X_HPLL, "hpll", NULL, 0, 614400000,}, ++#ifdef CONFIG_CLK_AX620U ++ {AX620X_NPLL, "npll", NULL, 0, 1200000000,}, ++#else ++ {AX620X_NPLL, "npll", NULL, 0, 1600000000,}, ++#endif ++#ifdef CONFIG_SLAVE_CLK_AX620X ++ {AX620X_VPLL, "vpll", NULL, 0, 1056000000,}, ++#else ++ {AX620X_VPLL, "vpll", NULL, 0, 1188000000,}, ++#endif ++ {AX620X_EPLL, "epll", NULL, 0, 1000000000,}, ++ {AX620X_DPLL, "dpll", NULL, 0, 1066000000,}, ++}; ++ ++static struct axera_fixed_factor_clock ax620x_fixed_factor_clks[] __initdata = { ++ {AX620X_CPLL_1248M, "cpll_1248m", "cpll", 1, 1, 0,}, ++ {AX620X_CPLL_624M, "cpll_624m", "cpll", 1, 2, 0,}, ++ {AX620X_CPLL_208M, "cpll_208m", "cpll", 1, 6, 0,}, ++ {AX620X_CPLL_312M, "cpll_312m", "cpll", 1, 4, 0,}, ++ {AX620X_CPLL_156M, "cpll_156m", "cpll", 1, 8, 0,}, ++ {AX620X_CPLL_DIV_16, "cpll_div_16", "cpll", 1, 16, 0,}, ++ {AX620X_CPLL_26M, "cpll_26m", "cpll", 1, 48, 0,}, ++ {AX620X_CPLL_39M, "cpll_39m", "cpll", 1, 32, 0,}, ++ {AX620X_CPLL_DIV_5, "cpll_div_5", "cpll", 1, 5, 0,}, ++ {AX620X_CPLL_19P2M, "cpll_19p2m", "cpll", 1, 65, 0,}, ++ {AX620X_CPLL_24M, "cpll_24m", "cpll", 1, 52, 0,}, ++ {AX620X_CPLL_12M, "cpll_12m", "cpll", 1, 104, 0,}, ++ {AX620X_HPLL_DIV_2, "hpll_div_2", "hpll", 1, 2, 0,}, ++ {AX620X_HPLL_DIV_4, "hpll_div_4", "hpll", 1, 4, 0,}, ++ {AX620X_HPLL_DIV_8, "hpll_div_8", "hpll", 1, 8, 0,}, ++ {AX620X_HPLL_DIV_16, "hpll_div_16", "hpll", 1, 16, 0,}, ++ {AX620X_HPLL_38P4M, "hpll_38p4m", "hpll", 1, 32, 0,}, ++ {AX620X_HPLL_DIV_3, "hpll_div_3", "hpll", 1, 3, 0,}, ++ {AX620X_HPLL_DIV_15, "hpll_div_15", "hpll", 1, 15, 0,}, ++ {AX620X_HPLL_40P96M, "hpll_40p96m", "hpll", 1, 30, 0,}, ++ {AX620X_HPLL_DIV_5, "hpll_div_5", "hpll", 1, 5, 0,}, ++ {AX620X_HPLL_49P152M, "hpll_49p152m", "hpll", 1, 25, 0,}, ++ {AX620X_HPLL_24P576M, "hpll_24p576m", "hpll", 1, 50, 0,}, ++ {AX620X_HPLL_16P384M, "hpll_16p384m", "hpll", 1, 75, 0,}, ++ {AX620X_NPLL_1600M, "npll_1600m", "npll", 1, 1, 0,}, ++ {AX620X_NPLL_800M, "npll_800m", "npll", 1, 2, 0,}, ++ {AX620X_NPLL_400M, "npll_400m", "npll", 1, 4, 0,}, ++ {AX620X_NPLL_200M, "npll_200m", "npll", 1, 8, 0,}, ++ {AX620X_NPLL_DIV_16, "npll_div_16", "npll", 1, 16, 0,}, ++ {AX620X_NPLL_DIV_32, "npll_div_32", "npll", 1, 32, 0,}, ++ {AX620X_NPLL_25M, "npll_25m", "npll", 1, 64, 0,}, ++ {AX620X_NPLL_533M, "npll_533m", "npll", 1, 3, 0,}, ++ {AX620X_VPLL_594M, "vpll_594m", "vpll", 1, 2, 0,}, ++ {AX620X_VPLL_DIV_4, "vpll_div_4", "vpll", 1, 4, 0,}, ++ {AX620X_VPLL_148P5M, "vpll_148p5m", "vpll", 1, 8, 0,}, ++ {AX620X_VPLL_74P25M, "vpll_74p25m", "vpll", 1, 16, 0,}, ++ {AX620X_VPLL_37P125M, "vpll_37p125m", "vpll", 1, 32, 0,}, ++ {AX620X_VPLL_27M, "vpll_27m", "vpll", 1, 44, 0,}, ++ {AX620X_EPLL_1000M, "epll_1000m", "epll", 1, 1, 0,}, ++ {AX620X_EPLL_500M, "epll_500m", "epll", 1, 2, 0,}, ++ {AX620X_EPLL_250M, "epll_250m", "epll", 1, 4, 0,}, ++ {AX620X_EPLL_125M, "epll_125m", "epll", 1, 8, 0,}, ++ {AX620X_EPLL_DIV_16, "epll_div_16", "epll", 1, 16, 0,}, ++ {AX620X_EPLL_31P25M, "epll_31p25m", "epll", 1, 32, 0,}, ++ {AX620X_EPLL_200M, "epll_200m", "epll", 1, 5, 0,}, ++ {AX620X_EPLL_100M, "epll_100m", "epll", 1, 10, 0,}, ++ {AX620X_EPLL_20M, "epll_20m", "epll", 1, 50, 0,}, ++ {AX620X_EPLL_10M, "epll_10m", "epll", 1, 100, 0,}, ++ {AX620X_EPLL_50M, "epll_50m", "epll", 1, 20, 0,}, ++ {AX620X_EPLL_25M, "epll_25m", "epll", 1, 40, 0,}, ++ {AX620X_EPLL_333M, "epll_333m", "epll", 1, 3, 0,}, ++ {AX620X_DPLL_1066M, "dpll_1066m", "dpll", 1, 1, 0,}, ++ {AX620X_DPLL_533M, "dpll_533m", "dpll", 1, 2, 0,}, ++ {AX620X_DPLL_DIV_4, "dpll_div_4", "dpll", 1, 4, 0,}, ++ {AX620X_DPLL_DIV_8, "dpll_div_8", "dpll", 1, 8, 0,}, ++ {AX620X_DPLL_DIV_16, "dpll_div_16", "dpll", 1, 16, 0,}, ++ {AX620X_DPLL_33M, "dpll_33m", "dpll", 1, 32, 0,}, ++}; ++ ++static const char *pclk_top_sel[] __initdata = { "xtal_24m", "cpll_208m", "epll_250m", "cpll_312m" }; ++static const char *clk_csi_tx_sel[] __initdata = { "cpll_208m", "epll_333m", "npll_400m", "epll_500m", "npll_533m" }; ++static const char *clk_com_glb_sel[] __initdata = { "xtal_32k", "xtal_24m" }; ++static const char *aclk_vpu_top_sel[] __initdata = { "xtal_24m", "epll_500m", "npll_533m", "cpll_624m" }; ++static const char *aclk_nn_top_sel[] __initdata = { "xtal_24m", "epll_500m", "npll_533m", "cpll_624m" }; ++static const char *aclk_isp_top_sel[] __initdata = { "xtal_24m", "epll_500m", "npll_533m", "cpll_624m" }; ++static const char *aclk_cpu_top_sel[] __initdata = { "xtal_24m", "epll_500m", "npll_533m", "cpll_624m" }; ++static const char *debug_sel[] __initdata = { "xtal_24m", "xtal_32k", "rtc_32hz" }; ++ ++static struct axera_mux_clock ax620x_mux_clks_common[] __initdata = { ++ {AX620X_PCLK_TOP_SEL, "pclk_top_sel", pclk_top_sel, ARRAY_SIZE(pclk_top_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x60, 12, 2, 0, NULL,}, ++ {AX620X_CLK_CSI_TX_SEL, "clk_csi_tx_sel", clk_csi_tx_sel, ARRAY_SIZE(clk_csi_tx_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x60, 9, 3, 0, NULL,}, ++ {AX620X_CLK_COM_GLB_SEL, "clk_com_glb_sel", clk_com_glb_sel, ARRAY_SIZE(clk_com_glb_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x60, 8, 1, 0, NULL,}, ++ {AX620X_ACLK_VPU_TOP_SEL, "aclk_vpu_top_sel", aclk_vpu_top_sel, ARRAY_SIZE(aclk_vpu_top_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x60, 6, 2, 0, NULL,}, ++ {AX620X_ACLK_NN_TOP_SEL, "aclk_nn_top_sel", aclk_nn_top_sel, ARRAY_SIZE(aclk_nn_top_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x60, 4, 2, 0, NULL,}, ++ {AX620X_ACLK_ISP_TOP_SEL, "aclk_isp_top_sel", aclk_isp_top_sel, ARRAY_SIZE(aclk_isp_top_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x60, 2, 2, 0, NULL,}, ++ {AX620X_ACLK_CPU_TOP_SEL, "aclk_cpu_top_sel", aclk_cpu_top_sel, ARRAY_SIZE(aclk_cpu_top_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x60, 0, 2, 0, NULL,}, ++ {AX620X_DEBUG_SEL, "debug_sel", debug_sel, ARRAY_SIZE(debug_sel), CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x30C, 0, 3, 0, NULL,}, ++}; ++ ++static struct axera_gate_clock ax620x_gate_clks_common[] __initdata = { ++ {AX620X_CLK_CSI_TX, "clk_csi_tx", "clk_csi_tx_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x6C, 2, 0, 0x70, ++ 2, 0x74, 2,}, ++ {AX620X_CLK_COM_DIG, "clk_com_dig", "rtc_32hz", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x6C, 1, 0, 0x70, 1, ++ 0x74, 1,}, ++ {AX620X_CLK_COM_ANA, "clk_com_ana", "xtal_24m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED | CLK_IS_CRITICAL, 0x6C, 0, 0, 0x70, 0, ++ 0x74, 0,}, ++ {AX620X_PCLK_WDT_COMMON, "pclk_wdt_eb_common", "clk_com_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x78, ++ 12, 0, 0x7C, 12, 0x80, 12,}, ++ {AX620X_PCLK_TMR32, "pclk_tmr32", "clk_com_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x78, 11, 0, 0x7C, ++ 11, 0x80, 11,}, ++ {AX620X_PCLK_THM, "pclk_thm", "clk_com_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x78, 10, 0, 0x7C, 10, ++ 0x80, 10,}, ++ {AX620X_PCLK_EFC, "pclk_efc", "clk_com_ana", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x78, 9, 0, 0x7C, 9, 0x80, ++ 9,}, ++ {AX620X_PCLK_DBC_GPIO, "pclk_dbc_gpio", "clk_com_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x78, 8, 0, ++ 0x7C, 8, 0x80, 8,}, ++ {AX620X_CLK_WDT_COMMON, "clk_wdt_eb_common", "clk_com_dig", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x78, 7, 0, ++ 0x7C, 7, 0x80, 7,}, ++ {AX620X_CLK_TMR32, "clk_tmr32", "clk_com_dig", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x78, 6, 0, 0x7C, 6, ++ 0x80, 6,}, ++ {AX620X_CLK_THM, "clk_thm", "clk_com_ana", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x78, 5, 0, 0x7C, 5, 0x80, ++ 5,}, ++ {AX620X_CLK_PMU, "clk_pmu", "clk_com_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x78, 4, 0, 0x7C, 4, ++ 0x80, 4,}, ++ {AX620X_CLK_PLLC, "clk_pllc", "clk_com_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x78, 3, 0, 0x7C, 3, ++ 0x80, 3,}, ++ {AX620X_CLK_PINMUX, "clk_pinmux", "clk_com_ana", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED | CLK_IS_CRITICAL, 0x78, 2, 0, 0x7C, 2, ++ 0x80, 2,}, ++ {AX620X_CLK_IRAM, "clk_iram", "pclk_top_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x78, 1, 0, 0x7C, 1, ++ 0x80, 1,}, ++ {AX620X_CLK_DBC_GPIO, "clk_dbc_gpio", "debug_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x78, 0, 0, 0x7C, 0, ++ 0x80, 0,}, ++}; ++ ++static void __init ax620x_clk_common_clk_init(struct device_node *np) ++{ ++ struct axera_clock_data *clk_data_top; ++ clk_data_top = axera_clk_init(np, AX620X_COMMON_NR_CLKS); ++ if (!clk_data_top) ++ return; ++ ++ axera_clk_register_fixed_rate(ax620x_fixed_rate_clks, ARRAY_SIZE(ax620x_fixed_rate_clks), clk_data_top); ++ axera_clk_register_fixed_factor(ax620x_fixed_factor_clks, ARRAY_SIZE(ax620x_fixed_factor_clks), clk_data_top); ++ ++ axera_clk_register_mux(ax620x_mux_clks_common, ARRAY_SIZE(ax620x_mux_clks_common), clk_data_top); ++ axera_clk_register_gate(ax620x_gate_clks_common, ARRAY_SIZE(ax620x_gate_clks_common), clk_data_top); ++} ++ ++CLK_OF_DECLARE(ax620x_clk_common_glb, "axera,ax620x-common-clk", ax620x_clk_common_clk_init); ++ ++/*ap*/ ++static const char *clk_wdt_sel[] __initdata = { "xtal_32k", "xtal_24m" }; ++static const char *clk_stb_predft_sel[] __initdata = { "xtal_32k", "cpll_12m" }; ++static const char *clk_sdio_s_pad_sel[] __initdata = { "clk_pad_sdio_s", "epll_200m" }; ++static const char *clk_sdio_m_card_sel[] __initdata = { "epll_5m", "xtal_24m", "cpll_156m", "epll_200m" }; ++static const char *clk_otg_fast_sel[] __initdata = { "xtal_24m", "epll_50m", "epll_250m" }; ++static const char *clk_ephy_ref_sel[] __initdata = { "epll_25m", "epll_50m", "epll_125m" }; ++static const char *clk_emac_rgmii_tx_sel[] __initdata = { "epll_10m", "epll_100m", "epll_500m" }; ++static const char *clk_emac_rgmii_rx_pad_sel[] __initdata = { "clk_pad_emac_rx", "epll_125m" }; ++static const char *clk_ce_bus_sel[] __initdata = { "xtal_24m", "epll_500m", "cpll_624m" }; ++static const char *clk_ap_timer_sel[] __initdata = { "xtal_32k", "xtal_24m" }; ++static const char *clk_ap_spi_s_pad_sel[] __initdata = { "clk_pad_spi_s", "epll_62p5m" }; ++static const char *clk_ap_spi1_sel[] __initdata = { "xtal_24m", "cpll_156m", "epll_200m", "cpll_312m" }; ++static const char *clk_ap_spi0_sel[] __initdata = { "xtal_24m", "cpll_156m", "epll_200m", "cpll_312m" }; ++static const char *clk_ap_sil_sel[] __initdata = { "xtal_24m", "epll_50m", "cpll_156m", "epll_200m" }; ++static const char *clk_ap_sih_sel[] __initdata = { "xtal_24m", "epll_50m", "cpll_156m", "epll_200m" }; ++static const char *clk_ap_rtc_sel[] __initdata = { "xtal_32k", "xtal_24m" }; ++static const char *clk_ap_glb_sel[] __initdata = { "xtal_24m", "epll_100m", "epll_200m", "cpll_312m" }; ++static const char *clk_i2s_ref2_sel[] __initdata = ++ { "cpll_12m", "hpll_16p384m", "hpll_24p576m", "epll_25m", "hpll_40p96m", "hpll_49p152m" }; ++static const char *clk_i2s_ref1_sel[] __initdata = ++ { "cpll_12m", "hpll_16p384m", "hpll_24p576m", "epll_25m", "hpll_40p96m", "hpll_49p152m" }; ++static const char *clk_i2s_ref0_sel[] __initdata = ++ { "cpll_12m", "hpll_16p384m", "hpll_24p576m", "epll_25m", "hpll_40p96m", "hpll_49p152m" }; ++static const char *sclk_i2s_tdm_sel[] __initdata = { "hpll_16p384m", "hpll_24p576m", "hpll_40p96m", "hpll_49p152m" }; ++static const char *sclk_i2s_sel[] __initdata = { "hpll_16p384m", "hpll_24p576m", "hpll_40p96m", "hpll_49p152m" }; ++ ++static struct axera_mux_clock ax620x_mux_clks_ap[] __initdata = { ++ {AX620X_CLK_WDT_SEL, "clk_wdt_sel", clk_wdt_sel, ARRAY_SIZE(clk_wdt_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 30, 1, 0, NULL,}, ++ {AX620X_CLK_STB_PREDFT_SEL, "clk_stb_predft_sel", clk_stb_predft_sel, ARRAY_SIZE(clk_stb_predft_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 28, 1, 0, NULL,}, ++ {AX620X_CLK_SDIO_S_PAD_SEL, "clk_sdio_s_pad_sel", clk_sdio_s_pad_sel, ARRAY_SIZE(clk_sdio_s_pad_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 27, 1, 0, NULL,}, ++ {AX620X_CLK_SDIO_M_CARD_SEL, "clk_sdio_m_card_sel", clk_sdio_m_card_sel, ARRAY_SIZE(clk_sdio_m_card_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 25, 2, 0, NULL,}, ++ {AX620X_CLK_OTG_FAST_SEL, "clk_otg_fast_sel", clk_otg_fast_sel, ARRAY_SIZE(clk_otg_fast_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 23, 2, 0, NULL,}, ++ {AX620X_CLK_EPHY_REF_SEL, "clk_ephy_ref_sel", clk_ephy_ref_sel, ARRAY_SIZE(clk_ephy_ref_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 18, 2, 0, NULL,}, ++ {AX620X_CLK_EMAC_RGMII_TX_SEL, "clk_emac_rgmii_tx_sel", clk_emac_rgmii_tx_sel, ++ ARRAY_SIZE(clk_emac_rgmii_tx_sel), CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 16, 2, 0, NULL,}, ++ {AX620X_CLK_EMAC_RGMII_RX_PAD_SEL, "clk_emac_rgmii_rx_pad_sel", clk_emac_rgmii_rx_pad_sel, ++ ARRAY_SIZE(clk_emac_rgmii_rx_pad_sel), CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 15, 1, 0, NULL,}, ++ {AX620X_CLK_CE_BUS_SEL, "clk_ce_bus_sel", clk_ce_bus_sel, ARRAY_SIZE(clk_ce_bus_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 13, 2, 0, NULL,}, ++ {AX620X_CLK_AP_TIMER_SEL, "clk_ap_timer_sel", clk_ap_timer_sel, ARRAY_SIZE(clk_ap_timer_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 12, 1, 0, NULL,}, ++ {AX620X_CLK_AP_SPI_S_PAD_SEL, "clk_ap_spi_s_pad_sel", clk_ap_spi_s_pad_sel, ARRAY_SIZE(clk_ap_spi_s_pad_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 11, 1, 0, NULL,}, ++ {AX620X_CLK_AP_SPI1_SEL, "clk_ap_spi1_sel", clk_ap_spi1_sel, ARRAY_SIZE(clk_ap_spi1_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 9, 2, 0, NULL,}, ++ {AX620X_CLK_AP_SPI0_SEL, "clk_ap_spi0_sel", clk_ap_spi0_sel, ARRAY_SIZE(clk_ap_spi0_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 7, 2, 0, NULL,}, ++ {AX620X_CLK_AP_SIL_SEL, "clk_ap_sil_sel", clk_ap_sil_sel, ARRAY_SIZE(clk_ap_sil_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 5, 2, 0, NULL,}, ++ {AX620X_CLK_AP_SIH_SEL, "clk_ap_sih_sel", clk_ap_sih_sel, ARRAY_SIZE(clk_ap_sih_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 3, 2, 0, NULL,}, ++ {AX620X_CLK_AP_RTC_SEL, "clk_ap_rtc_sel", clk_ap_rtc_sel, ARRAY_SIZE(clk_ap_rtc_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 2, 1, 0, NULL,}, ++ {AX620X_CLK_AP_GLB_SEL, "clk_ap_glb_sel", clk_ap_glb_sel, ARRAY_SIZE(clk_ap_glb_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 0, 2, 0, NULL,}, ++ {AX620X_CLK_I2S_REF2_SEL, "clk_i2s_ref2_sel", clk_i2s_ref2_sel, ARRAY_SIZE(clk_i2s_ref2_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 13, 3, 0, NULL,}, ++ {AX620X_CLK_I2S_REF1_SEL, "clk_i2s_ref1_sel", clk_i2s_ref1_sel, ARRAY_SIZE(clk_i2s_ref1_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 10, 3, 0, NULL,}, ++ {AX620X_CLK_I2S_REF0_SEL, "clk_i2s_ref0_sel", clk_i2s_ref0_sel, ARRAY_SIZE(clk_i2s_ref0_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 7, 3, 0, NULL,}, ++ {AX620X_SCLK_I2S_TDM_SEL, "sclk_i2s_tdm_sel", sclk_i2s_tdm_sel, ARRAY_SIZE(sclk_i2s_tdm_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 2, 2, 0, NULL,}, ++ {AX620X_SCLK_I2S_SEL, "sclk_i2s_sel", sclk_i2s_sel, ARRAY_SIZE(sclk_i2s_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 0, 2, 0, NULL,}, ++}; ++ ++static struct axera_gate_clock ax620x_gate_clks_ap[] __initdata = { ++ {AX620X_SCLK_I2S_TDM, "sclk_i2s_tdm", "sclk_i2s_tdm_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 21, 0, ++ 0x1FC, 21, 0x200, 21,}, ++ {AX620X_SCLK_I2S, "sclk_i2s", "sclk_i2s_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 20, 0, 0x1FC, 20, ++ 0x200, 20,}, ++ {AX620X_CLK_WDT, "clk_wdt", "clk_wdt_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 19, 0, 0x1FC, 19, ++ 0x200, 19,}, ++ {AX620X_CLK_USB_REF, "clk_usb_ref", "epll_25m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 18, 0, 0x1FC, 18, ++ 0x200, 18,}, ++ {AX620X_CLK_USB2PHY, "clk_usb2phy", "cpll_12m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 17, 0, 0x1FC, 17, ++ 0x200, 17,}, ++ {AX620X_CLK_STB_PREDFT, "clk_stb_predft", "clk_stb_predft_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, ++ 16, 0, 0x1FC, 16, 0x200, 16,}, ++ {AX620X_CLK_SDIO_M_CARD, "clk_sdio_m_card", "clk_sdio_m_card_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x8, 15, 0, 0x1FC, 15, 0x200, 15,}, ++ {AX620X_CLK_OTG_FAST, "clk_otg_fast", "clk_otg_fast_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 14, 0, ++ 0x1FC, 14, 0x200, 14,}, ++ {AX620X_CLK_LPM_PREDFT, "clk_lpm_predft", "cpll_12m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 13, 0, ++ 0x1FC, 13, 0x200, 13,}, ++ {AX620X_CLK_EPHY_REF, "clk_ephy_ref", "clk_ephy_ref_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 11, 0, ++ 0x1FC, 11, 0x200, 11,}, ++ {AX620X_CLK_EMAC_RMII_TX, "clk_emac_rmii_tx", "epll_50m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 10, 0, ++ 0x1FC, 10, 0x200, 10}, ++ {AX620X_CLK_EMAC_RMII_RX_PAD_DIV, "clk_emac_rmii_rx_pad_div", "clk_emac_rmii_rx_pad_divn", ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 9, 0, 0x1FC, 9, 0x200, 9,}, ++ {AX620X_CLK_EMAC_RGMII_TX, "clk_emac_rgmii_tx", "clk_emac_rgmii_tx_sel", ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 8, 0, 0x1FC, 8, 0x200, 8,}, ++ {AX620X_CLK_CE_CNT, "clk_ce_cnt", "clk_ce_bus_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 7, 0, 0x1FC, ++ 7, 0x200, 7,}, ++ {AX620X_CLK_APP_125_PREDFT, "clk_app_125_predft", "need_modify", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, ++ 6, 0, 0x1FC, 6, 0x200, 6,}, ++ {AX620X_CLK_AP_TIMER, "clk_ap_timer", "clk_ap_timer_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 5, 0, ++ 0x1FC, 5, 0x200, 5,}, ++ {AX620X_CLK_AP_SPI1, "clk_ap_spi1", "clk_ap_spi1_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 4, 0, ++ 0x1FC, 4, 0x200, 4,}, ++ {AX620X_CLK_AP_SPI0, "clk_ap_spi0", "clk_ap_spi0_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 3, 0, ++ 0x1FC, 3, 0x200, 3,}, ++ {AX620X_CLK_AP_SIL, "clk_ap_sil", "clk_ap_sil_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 2, 0, 0x1FC, ++ 2, 0x200, 2,}, ++ {AX620X_CLK_AP_SIH, "clk_ap_sih", "clk_ap_sih_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 1, 0, 0x1FC, ++ 1, 0x200, 1,}, ++ {AX620X_CLK_AP_RTC, "clk_ap_rtc", "clk_ap_rtc_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 0, 0, 0x1FC, ++ 0, 0x200, 0,}, ++ {AX620X_CLK_PWM23, "clk_pwm23", "clk_ap_rtc_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 31, 0, 0x204, ++ 31, 0x208, 31,}, ++ {AX620X_CLK_PWM22, "clk_pwm22", "clk_ap_rtc_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 30, 0, 0x204, ++ 30, 0x208, 30,}, ++ {AX620X_CLK_PWM21, "clk_pwm21", "clk_ap_timer_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 29, 0, 0x204, ++ 29, 0x208, 29,}, ++ {AX620X_CLK_PWM20, "clk_pwm20", "clk_ap_timer_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 28, 0, 0x204, ++ 28, 0x208, 28,}, ++ {AX620X_CLK_PWM13, "clk_pwm13", "clk_ap_rtc_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 27, 0, 0x204, ++ 27, 0x208, 27,}, ++ {AX620X_CLK_PWM12, "clk_pwm12", "clk_ap_rtc_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 26, 0, 0x204, ++ 26, 0x208, 26,}, ++ {AX620X_CLK_PWM11, "clk_pwm11", "clk_ap_timer_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 25, 0, 0x204, ++ 25, 0x208, 25,}, ++ {AX620X_CLK_PWM10, "clk_pwm10", "clk_ap_timer_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 24, 0, 0x204, ++ 24, 0x208, 24,}, ++ {AX620X_CLK_PWM03, "clk_pwm03", "clk_ap_rtc_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 23, 0, 0x204, ++ 23, 0x208, 23,}, ++ {AX620X_CLK_PWM02, "clk_pwm02", "clk_ap_rtc_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 22, 0, 0x204, ++ 22, 0x208, 22,}, ++ {AX620X_CLK_PWM01, "clk_pwm01", "clk_ap_timer_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 21, 0, 0x204, ++ 21, 0x208, 21,}, ++ {AX620X_CLK_PWM00, "clk_pwm00", "clk_ap_timer_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 20, 0, 0x204, ++ 20, 0x208, 20,}, ++ {AX620X_CLK_I2S_REF2, "clk_i2s_ref2", "clk_i2s_ref2_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 19, 0, ++ 0x204, 19, 0x208, 19,}, ++ {AX620X_CLK_I2S_REF1, "clk_i2s_ref1", "clk_i2s_ref1_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 18, 0, ++ 0x204, 18, 0x208, 18,}, ++ {AX620X_CLK_I2S_REF0, "clk_i2s_ref0", "clk_i2s_ref0_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 17, 0, ++ 0x204, 17, 0x208, 17,}, ++ {AX620X_CLK_I2C_HS3, "clk_i2c_hs3", "clk_ap_sih_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 16, 0, ++ 0x204, 16, 0x208, 16,}, ++ {AX620X_CLK_I2C_HS2, "clk_i2c_hs2", "clk_ap_sih_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 15, 0, ++ 0x204, 15, 0x208, 15,}, ++ {AX620X_CLK_I2C_HS1, "clk_i2c_hs1", "clk_ap_sih_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 14, 0, ++ 0x204, 14, 0x208, 14,}, ++ {AX620X_CLK_I2C_HS0, "clk_i2c_hs0", "clk_ap_sih_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 13, 0, ++ 0x204, 13, 0x208, 13,}, ++ {AX620X_CLK_I2C5, "clk_i2c5", "clk_ap_sil_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 12, 0, 0x204, 12, ++ 0x208, 12,}, ++ {AX620X_CLK_I2C4, "clk_i2c4", "clk_ap_sil_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 11, 0, 0x204, 11, ++ 0x208, 11,}, ++ {AX620X_CLK_I2C3, "clk_i2c3", "clk_ap_sil_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 10, 0, 0x204, 10, ++ 0x208, 10,}, ++ {AX620X_CLK_I2C2, "clk_i2c2", "clk_ap_sil_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 9, 0, 0x204, 9, ++ 0x208, 9,}, ++ {AX620X_CLK_I2C1, "clk_i2c1", "clk_ap_sil_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 8, 0, 0x204, 8, ++ 0x208, 8,}, ++ {AX620X_CLK_I2C0, "clk_i2c0", "clk_ap_sil_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 7, 0, 0x204, 7, ++ 0x208, 7,}, ++ {AX620X_CLK_GPIO2, "clk_gpio2", "clk_ap_rtc_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 6, 0, 0x204, 6, ++ 0x208, 6,}, ++ {AX620X_CLK_GPIO0, "clk_gpio0", "clk_ap_rtc_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 5, 0, 0x204, 5, ++ 0x208, 5,}, ++ {AX620X_CLK_CE, "clk_ce", "clk_ce_bus_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 4, 0, 0x204, 4, 0x208, ++ 4,}, ++ {AX620X_ACLK_USB, "aclk_usb", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 3, 0, 0x204, 3, ++ 0x208, 3,}, ++ {AX620X_ACLK_SDIO_M1, "aclk_sdio_m1", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 2, 0, ++ 0x204, 2, 0x208, 2,}, ++ {AX620X_ACLK_SDIO_M0, "aclk_sdio_m0", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 1, 0, ++ 0x204, 1, 0x208, 1,}, ++ {AX620X_ACLK_EMAC, "aclk_emac", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 0, 0, 0x204, 0, ++ 0x208, 0,}, ++ {AX620X_PCLK_I2C_HS2, "pclk_i2c_hs2", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 31, 0, ++ 0x20C, 31, 0x210, 31,}, ++ {AX620X_PCLK_I2C_HS1, "pclk_i2c_hs1", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 30, 0, ++ 0x20C, 30, 0x210, 30,}, ++ {AX620X_PCLK_I2C_HS0, "pclk_i2c_hs0", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 29, 0, ++ 0x20C, 29, 0x210, 29,}, ++ {AX620X_PCLK_I2C5, "pclk_i2c5", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 28, 0, 0x20C, ++ 28, 0x210, 28,}, ++ {AX620X_PCLK_I2C4, "pclk_i2c4", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 27, 0, 0x20C, ++ 27, 0x210, 27,}, ++ {AX620X_PCLK_I2C3, "pclk_i2c3", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 26, 0, 0x20C, ++ 26, 0x210, 26,}, ++ {AX620X_PCLK_I2C2, "pclk_i2c2", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 25, 0, 0x20C, ++ 25, 0x210, 25,}, ++ {AX620X_PCLK_I2C1, "pclk_i2c1", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 24, 0, 0x20C, ++ 24, 0x210, 24,}, ++ {AX620X_PCLK_I2C0, "pclk_i2c0", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 23, 0, 0x20C, ++ 23, 0x210, 23,}, ++ {AX620X_PCLK_GPIO2, "pclk_gpio2", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 22, 0, 0x20C, ++ 22, 0x210, 22,}, ++ {AX620X_PCLK_GPIO0, "pclk_gpio0", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 21, 0, 0x20C, ++ 21, 0x210, 21,}, ++ {AX620X_PCLK_EMAC, "pclk_emac", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 20, 0, 0x20C, ++ 20, 0x210, 20,}, ++ {AX620X_PCLK_CE, "pclk_ce", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 19, 0, 0x20C, 19, ++ 0x210, 19,}, ++ {AX620X_HCLK_SPI_S, "hclk_spi_s", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 18, 0, 0x20C, ++ 18, 0x210, 18,}, ++ {AX620X_HCLK_SDIO_S, "hclk_sdio_s", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 17, 0, ++ 0x20C, 17, 0x210, 17,}, ++ {AX620X_CLK_UART3, "clk_uart3", "clk_ap_sil_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 16, 0, 0x20C, ++ 16, 0x210, 16,}, ++ {AX620X_CLK_UART2, "clk_uart2", "clk_ap_sil_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 15, 0, 0x20C, ++ 15, 0x210, 15,}, ++ {AX620X_CLK_UART1, "clk_uart1", "clk_ap_sil_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 14, 0, 0x20C, ++ 14, 0x210, 14,}, ++ {AX620X_CLK_UART0, "clk_uart0", "clk_ap_sil_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 13, 0, 0x20C, ++ 13, 0x210, 13,}, ++ {AX620X_CLK_TMR64, "clk_tmr64", "clk_ap_rtc_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 12, 0, 0x20C, ++ 12, 0x210, 12, "clk_tmr64"}, ++ {AX620X_CLK_TIMER3, "clk_timer3", "clk_ap_rtc_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 11, 0, 0x20C, ++ 11, 0x210, 11,}, ++ {AX620X_CLK_TIMER2, "clk_timer2", "clk_ap_rtc_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 10, 0, 0x20C, ++ 10, 0x210, 10,}, ++ {AX620X_CLK_TIMER1, "clk_timer1", "clk_ap_timer_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 9, 0, ++ 0x20C, 9, 0x210, 9,}, ++ {AX620X_CLK_TIMER0, "clk_timer0", "clk_ap_timer_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 8, 0, ++ 0x20C, 8, 0x210, 8,}, ++ {AX620X_CLK_SPI_S, "clk_spi_s", "clk_ap_spi1_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 7, 0, 0x20C, ++ 7, 0x210, 7,}, ++ {AX620X_CLK_SPI_M2, "clk_spi_m2", "clk_ap_spi1_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 6, 0, 0x20C, ++ 6, 0x210, 6,}, ++ {AX620X_CLK_SPI_M1, "clk_spi_m1", "clk_ap_spi0_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 5, 0, 0x20C, ++ 5, 0x210, 5,}, ++ {AX620X_CLK_SPI_M0, "clk_spi_m0", "clk_ap_spi0_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 4, 0, 0x20C, ++ 4, 0x210, 4,}, ++ {AX620X_CLK_SDIO_M1_CARD, "clk_sdio_m1_card", "clk_sdio_m_card_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x10, 3, 0, 0x20C, 3, 0x210, 3,}, ++ {AX620X_CLK_SDIO_M0_CARD, "clk_sdio_m0_card", "clk_sdio_m_card_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x10, 2, 0, 0x20C, 2, 0x210, 2,}, ++ {AX620X_CLK_RTC1, "clk_rtc1", "clk_ap_rtc_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 1, 0, 0x20C, 1, ++ 0x210, 1,}, ++ {AX620X_CLK_RTC0, "clk_rtc0", "clk_ap_timer_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x10, 0, 0, 0x20C, 0, ++ 0x210, 0,}, ++ {AX620X_PCLK_WDT, "pclk_wdt", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 22, 0, 0x214, 22, ++ 0x218, 22,}, ++ {AX620X_PCLK_USB, "pclk_usb", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 21, 0, 0x214, 21, ++ 0x218, 21,}, ++ {AX620X_PCLK_UART3, "pclk_uart3", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 20, 0, 0x214, ++ 20, 0x218, 20,}, ++ {AX620X_PCLK_UART2, "pclk_uart2", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 19, 0, 0x214, ++ 19, 0x218, 19,}, ++ {AX620X_PCLK_UART1, "pclk_uart1", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 18, 0, 0x214, ++ 18, 0x218, 18,}, ++ {AX620X_PCLK_UART0, "pclk_uart0", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 17, 0, 0x214, ++ 17, 0x218, 17,}, ++ {AX620X_PCLK_TMR64, "pclk_tmr64", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 16, 0, 0x214, ++ 16, 0x218, 16,}, ++ {AX620X_PCLK_TIMER, "pclk_timer", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 15, 0, 0x214, ++ 15, 0x218, 15,}, ++ {AX620X_PCLK_SPI_M2, "pclk_spi_m2", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 14, 0, ++ 0x214, 14, 0x218, 14,}, ++ {AX620X_PCLK_SPI_M1, "pclk_spi_m1", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 13, 0, ++ 0x214, 13, 0x218, 13,}, ++ {AX620X_PCLK_SPI_M0, "pclk_spi_m0", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 12, 0, ++ 0x214, 12, 0x218, 12,}, ++ {AX620X_PCLK_SDIO_M1, "pclk_sdio_m1", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 11, 0, ++ 0x214, 11, 0x218, 11,}, ++ {AX620X_PCLK_SDIO_M0, "pclk_sdio_m0", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 10, 0, ++ 0x214, 10, 0x218, 10,}, ++ {AX620X_PCLK_RTC1, "pclk_rtc1", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 9, 0, 0x214, 9, ++ 0x218, 9,}, ++ {AX620X_PCLK_RTC0, "pclk_rtc0", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 8, 0, 0x214, 8, ++ 0x218, 8,}, ++ {AX620X_PCLK_PWM2, "pclk_pwm2", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 7, 0, 0x214, 7, ++ 0x218, 7,}, ++ {AX620X_PCLK_PWM1, "pclk_pwm1", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 6, 0, 0x214, 6, ++ 0x218, 6,}, ++ {AX620X_PCLK_PWM0, "pclk_pwm0", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 5, 0, 0x214, 5, ++ 0x218, 5,}, ++ {AX620X_PCLK_I2S_TDM_S, "pclk_i2s_tdm_s", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 4, 0, ++ 0x214, 4, 0x218, 4,}, ++ {AX620X_PCLK_I2S_TDM_M, "pclk_i2s_tdm_m", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 3, 0, ++ 0x214, 3, 0x218, 3,}, ++ {AX620X_PCLK_I2S_S, "pclk_i2s_s", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 2, 0, 0x214, ++ 2, 0x218, 2,}, ++ {AX620X_PCLK_I2S_M, "pclk_i2s_m", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 1, 0, 0x214, ++ 1, 0x218, 1,}, ++ {AX620X_PCLK_I2C_HS3, "pclk_i2c_hs3", "clk_ap_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x14, 0, 0, ++ 0x214, 0, 0x218, 0,}, ++}; ++ ++static struct axera_divider_clock ax620x_div_clks_ap[] __initdata = { ++ {AX620X_SCLK_I2S_TDM_DIVN, "sclk_i2s_tdm_divn", "sclk_i2s_tdm_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x18, 0x1C, 0, 27, 5, 0, NULL,}, ++ {AX620X_SCLK_I2S_DIVN, "sclk_i2s_divn", "sclk_i2s_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x18, 0x18, 26, ++ 21, 5, 0, NULL,}, ++ {AX620X_CLK_SDIO_M_CARD_DIVN, "clk_sdio_m_card_divn", "clk_sdio_m_card_sel", ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x18, 0x18, 20, 16, 4, 0, NULL,}, ++ {AX620X_CLK_OTG_FAST_DIVN, "clk_otg_fast_divn", "clk_otg_fast_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x18, 0x18, 15, 11, 4, 0, NULL,}, ++ {AX620X_CLK_EMAC_RMII_RX_PAD_DIVN, "clk_emac_rmii_rx_pad_divn", "clk_emac_rmii_tx", ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x18, 0x18, 4, 0, 4, 0, NULL,}, ++ {AX620X_CLK_I2S_REF2_DIVN, "clk_i2s_ref2_divn", "clk_i2s_ref2_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x1C, 0x1C, 18, 13, 5, 0, NULL,}, ++ {AX620X_CLK_I2S_REF1_DIVN, "clk_i2s_ref1_divn", "clk_i2s_ref1_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x1C, 0x1C, 12, 7, 5, 0, NULL,}, ++ {AX620X_CLK_I2S_REF0_DIVN, "clk_i2s_ref0_divn", "clk_i2s_ref0_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x1C, 0x1C, 6, 1, 5, 0, NULL,}, ++}; ++ ++static void __init ax620x_clk_ap_clk_init(struct device_node *np) ++{ ++ struct axera_clock_data *clk_data_top; ++ clk_data_top = axera_clk_init(np, AX620X_AP_NR_CLKS); ++ if (!clk_data_top) ++ return; ++ ++ axera_clk_register_mux(ax620x_mux_clks_ap, ARRAY_SIZE(ax620x_mux_clks_ap), clk_data_top); ++ axera_clk_register_gate(ax620x_gate_clks_ap, ARRAY_SIZE(ax620x_gate_clks_ap), clk_data_top); ++ axera_clk_register_divider(ax620x_div_clks_ap, ARRAY_SIZE(ax620x_div_clks_ap), clk_data_top); ++} ++ ++CLK_OF_DECLARE(ax620x_clk_ap_glb, "axera,ax620x-ap-clk", ax620x_clk_ap_clk_init); ++ ++/*dispc*/ ++static const char *clk_dphy_tx_esc2_sel[] __initdata = { "epll_10m", "epll_20m" }; ++static const char *clk_dphy_tx_esc1_sel[] __initdata = { "epll_10m", "epll_20m" }; ++static const char *clk_dphy_tx_esc0_sel[] __initdata = { "epll_10m", "epll_20m" }; ++static const char *clk_csi_tx_pix_sel[] __initdata = ++ { "cpll_208m", "epll_333m", "npll_400m", "epll_500m", "npll_533m" }; ++ ++static struct axera_mux_clock ax620x_mux_clks_dispc[] __initdata = { ++ {AX620X_CLK_DPHY_TX_ESC2_SEL, "clk_dphy_tx_esc2_sel", clk_dphy_tx_esc2_sel, ARRAY_SIZE(clk_dphy_tx_esc2_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 5, 1, 0, NULL,}, ++ {AX620X_CLK_DPHY_TX_ESC1_SEL, "clk_dphy_tx_esc1_sel", clk_dphy_tx_esc1_sel, ARRAY_SIZE(clk_dphy_tx_esc1_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 4, 1, 0, NULL,}, ++ {AX620X_CLK_DPHY_TX_ESC0_SEL, "clk_dphy_tx_esc0_sel", clk_dphy_tx_esc0_sel, ARRAY_SIZE(clk_dphy_tx_esc0_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 3, 1, 0, NULL,}, ++ {AX620X_CLK_CSI_TX_PIX_SEL, "clk_csi_tx_pix_sel", clk_csi_tx_pix_sel, ARRAY_SIZE(clk_csi_tx_pix_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 0, 3, 0, NULL,}, ++}; ++ ++static struct axera_gate_clock ax620x_gate_clks_dispc[] __initdata = { ++ {AX620X_CLK_DPHY_TX_REF, "clk_dphy_tx_ref", "cpll_12m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 4, 0, ++ 0x3B4, 4, 0x3B8, 4,}, ++ {AX620X_CLK_DPHY_TX_ESC2, "clk_dphy_tx_esc2", "clk_dphy_tx_esc2_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x4, 3, 0, 0x3B4, 3, 0x3B8, 3,}, ++ {AX620X_CLK_DPHY_TX_ESC1, "clk_dphy_tx_esc1", "clk_dphy_tx_esc1_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x4, 2, 0, 0x3B4, 2, 0x3B8, 2,}, ++ {AX620X_CLK_DPHY_TX_ESC0, "clk_dphy_tx_esc0", "clk_dphy_tx_esc0_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x4, 1, 0, 0x3B4, 1, 0x3B8, 1,}, ++ {AX620X_CLK_CSI_TX_PIX, "clk_csi_tx_pix", "clk_csi_tx_pix_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 0, ++ 0, 0x3B4, 0, 0x3B8, 0,}, ++ {AX620X_PCLK_DSI1, "pclk_dsi1", "pclk_dispc_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 25, 0, 0x3BC, ++ 25, 0x3C0, 25,}, ++ {AX620X_PCLK_DSI0, "pclk_dsi0", "pclk_dispc_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 24, 0, 0x3BC, ++ 24, 0x3C0, 24,}, ++ {AX620X_PCLK_CSI2, "pclk_csi2", "pclk_dispc_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 23, 0, 0x3BC, ++ 23, 0x3C0, 23,}, ++ {AX620X_PCLK_CSI1, "pclk_csi1", "pclk_dispc_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 22, 0, 0x3BC, ++ 22, 0x3C0, 22,}, ++ {AX620X_PCLK_CSI0, "pclk_csi0", "pclk_dispc_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 21, 0, 0x3BC, ++ 21, 0x3C0, 21,}, ++ {AX620X_CLK_DSI_TX_ESC1, "clk_dsi_tx_esc1", "clk_dphy_tx_esc1_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x8, 20, 0, 0x3BC, 20, 0x3C0, 20,}, ++ {AX620X_CLK_DSI_TX_ESC0, "clk_dsi_tx_esc0", "clk_dphy_tx_esc0_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x8, 19, 0, 0x3BC, 19, 0x3C0, 19,}, ++ {AX620X_CLK_DSI_SYS1, "clk_dsi_sys1", "pclk_dispc_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 18, 0, ++ 0x3BC, 18, 0x3C0, 18,}, ++ {AX620X_CLK_DSI_SYS0, "clk_dsi_sys0", "pclk_dispc_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 17, 0, ++ 0x3BC, 17, 0x3C0, 17,}, ++ {AX620X_CLK_DPHY_REF2, "clk_dphy_ref2", "cpll_12m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 16, 0, 0x3BC, ++ 16, 0x3C0, 16,}, ++ {AX620X_CLK_DPHY_REF1, "clk_dphy_ref1", "cpll_12m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 15, 0, 0x3BC, ++ 15, 0x3C0, 15,}, ++ {AX620X_CLK_DPHY_REF0, "clk_dphy_ref0", "cpll_12m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 14, 0, 0x3BC, ++ 14, 0x3C0, 14,}, ++ {AX620X_CLK_DPHY2DSI_HS1, "clk_dphy2dsi_hs1", "epll_333m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 13, 0, ++ 0x3BC, 13, 0x3C0, 13,}, ++ {AX620X_CLK_DPHY2DSI_HS0, "clk_dphy2dsi_hs0", "epll_333m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 12, 0, ++ 0x3BC, 12, 0x3C0, 12,}, ++ {AX620X_CLK_DPHY2CSI_HS2, "clk_dphy2csi_hs2", "epll_333m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 11, 0, ++ 0x3BC, 11, 0x3C0, 11,}, ++ {AX620X_CLK_DPHY2CSI_HS1, "clk_dphy2csi_hs1", "epll_333m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 10, 0, ++ 0x3BC, 10, 0x3C0, 10,}, ++ {AX620X_CLK_DPHY2CSI_HS0, "clk_dphy2csi_hs0", "epll_333m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 9, 0, ++ 0x3BC, 9, 0x3C0, 9,}, ++ {AX620X_CLK_CSI_TX_PIX2, "clk_csi_tx_pix2", "clk_csi_tx_pix_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, ++ 8, 0, 0x3BC, 8, 0x3C0, 8,}, ++ {AX620X_CLK_CSI_TX_PIX1, "clk_csi_tx_pix1", "clk_csi_tx_pix_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, ++ 7, 0, 0x3BC, 7, 0x3C0, 7,}, ++ {AX620X_CLK_CSI_TX_PIX0, "clk_csi_tx_pix0", "clk_csi_tx_pix_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, ++ 6, 0, 0x3BC, 6, 0x3C0, 6,}, ++ {AX620X_CLK_CSI_TX_ESC2, "clk_csi_tx_esc2", "clk_dphy_tx_esc2_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x8, 5, 0, 0x3BC, 5, 0x3C0, 5,}, ++ {AX620X_CLK_CSI_TX_ESC1, "clk_csi_tx_esc1", "clk_dphy_tx_esc1_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x8, 4, 0, 0x3BC, 4, 0x3C0, 4,}, ++ {AX620X_CLK_CSI_TX_ESC0, "clk_csi_tx_esc0", "clk_dphy_tx_esc0_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x8, 3, 0, 0x3BC, 3, 0x3C0, 3,}, ++ {AX620X_CLK_CSI_TX2, "clk_csi_tx2", "clk_csi_tx", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 2, 0, 0x3BC, 2, ++ 0x3C0, 2,}, ++ {AX620X_CLK_CSI_TX1, "clk_csi_tx1", "clk_csi_tx", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 1, 0, 0x3BC, 1, ++ 0x3C0, 1,}, ++ {AX620X_CLK_CSI_TX0, "clk_csi_tx0", "clk_csi_tx", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 0, 0, 0x3BC, 0, ++ 0x3C0, 0,}, ++}; ++ ++static void __init ax620x_clk_dispc_clk_init(struct device_node *np) ++{ ++ struct axera_clock_data *clk_data_top; ++ clk_data_top = axera_clk_init(np, AX620X_DISPC_NR_CLKS); ++ if (!clk_data_top) ++ return; ++ ++ axera_clk_register_mux(ax620x_mux_clks_dispc, ARRAY_SIZE(ax620x_mux_clks_dispc), clk_data_top); ++ axera_clk_register_gate(ax620x_gate_clks_dispc, ARRAY_SIZE(ax620x_gate_clks_dispc), clk_data_top); ++} ++ ++CLK_OF_DECLARE(ax620x_clk_dispc_glb, "axera,ax620x-dispc-clk", ax620x_clk_dispc_clk_init); ++ ++/*flash*/ ++static const char *clk_h_ssi_sel[] __initdata = { "xtal_24m", "epll_250m", "epll_333m" }; ++static const char *clk_flash_gpio_sel[] __initdata = { "xtal_32k", "xtal_24m" }; ++static const char *clk_flash_glb_sel[] __initdata = { "xtal_24m", "cpll_156m", "cpll_208m", "epll_250m" }; ++static const char *clk_emmc_card_sel[] __initdata = { "epll_5m", "xtal_24m", "cpll_156m", "epll_200m" }; ++ ++static struct axera_mux_clock ax620x_mux_clks_flash[] __initdata = { ++ {AX620X_CLK_H_SSI_SEL, "clk_h_ssi_sel", clk_h_ssi_sel, ARRAY_SIZE(clk_h_ssi_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 5, 2, 0, NULL,}, ++ {AX620X_CLK_FLASH_GPIO_SEL, "clk_flash_gpio_sel", clk_flash_gpio_sel, ARRAY_SIZE(clk_flash_gpio_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 4, 1, 0, NULL,}, ++ {AX620X_CLK_FLASH_GLB_SEL, "clk_flash_glb_sel", clk_flash_glb_sel, ARRAY_SIZE(clk_flash_glb_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 2, 2, 0, NULL,}, ++ {AX620X_CLK_EMMC_CARD_SEL, "clk_emmc_card_sel", clk_emmc_card_sel, ARRAY_SIZE(clk_emmc_card_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 0, 2, 0, NULL,}, ++}; ++ ++static struct axera_gate_clock ax620x_gate_clks_flash[] __initdata = { ++ {AX620X_CLK_TLB_RTC, "clk_tlb_rtc", "xtal_32k", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 6, 0, 0xF0, 6, ++ 0xF4, 6,}, ++ {AX620X_CLK_TLB_PIN_FLASH, "clk_tlb_pin_flash", "xtal_24m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 5, 0, ++ 0xF0, 5, 0xF4, 5,}, ++ {AX620X_CLK_H_SSI, "clk_h_ssi", "clk_h_ssi_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 3, 0, 0xF0, 3, ++ 0xF4, 3,}, ++ {AX620X_CLK_FLASH_GPIO, "clk_flash_gpio", "clk_flash_gpio_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 2, ++ 0, 0xF0, 2, 0xF4, 2,}, ++ {AX620X_CLK_FLASH_GLB, "clk_flash_glb", "clk_flash_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 1, 0, ++ 0xF0, 1, 0xF4, 1,}, ++ {AX620X_CLK_EMMC_CARD, "clk_emmc_card", "clk_emmc_card_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 0, ++ 0, 0xF0, 0, 0xF4, 0,}, ++ {AX620X_PCLK_GPIO, "pclk_gpio", "clk_flash_glb", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 3, 0, 0xF8, 3, ++ 0xFC, 3,}, ++ {AX620X_PCLK_EMMC, "pclk_emmc", "clk_flash_glb", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 2, 0, 0xF8, 2, ++ 0xFC, 2,}, ++ {AX620X_HCLK_SPI, "hclk_spi", "clk_flash_glb", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 1, 0, 0xF8, 1, ++ 0xFC, 1,}, ++ {AX620X_ACLK_EMMC, "aclk_emmc", "clk_flash_glb", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 0, 0, 0xF8, 0, ++ 0xFC, 0,}, ++}; ++ ++static struct axera_divider_clock ax620x_div_clks_flash[] __initdata = { ++ {AX620X_CLK_H_SSI_DIVN, "clk_h_ssi_divn", "clk_h_ssi_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0xC, 0xC, 9, ++ 5, 4, 0, NULL,}, ++ {AX620X_CLK_EMMC_CARD_DIVN, "clk_emmc_card_divn", "clk_emmc_card_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0xC, 0xC, 4, 0, 4, 0, NULL,}, ++}; ++ ++static void __init ax620x_clk_flash_clk_init(struct device_node *np) ++{ ++ struct axera_clock_data *clk_data_top; ++ clk_data_top = axera_clk_init(np, AX620X_FLASH_NR_CLKS); ++ if (!clk_data_top) ++ return; ++ ++ axera_clk_register_mux(ax620x_mux_clks_flash, ARRAY_SIZE(ax620x_mux_clks_flash), clk_data_top); ++ axera_clk_register_gate(ax620x_gate_clks_flash, ARRAY_SIZE(ax620x_gate_clks_flash), clk_data_top); ++ axera_clk_register_divider(ax620x_div_clks_flash, ARRAY_SIZE(ax620x_div_clks_flash), clk_data_top); ++} ++ ++CLK_OF_DECLARE(ax620x_clk_flash_glb, "axera,ax620x-flash-clk", ax620x_clk_flash_clk_init); ++ ++/*isp*/ ++static const char *clk_sen5_ref_sel[] __initdata = { "xtal_24m", "vpll_27m", "vpll_37p125m", "vpll_74p25m" }; ++static const char *clk_sen4_ref_sel[] __initdata = { "xtal_24m", "vpll_27m", "vpll_37p125m", "vpll_74p25m" }; ++static const char *clk_sen3_ref_sel[] __initdata = { "xtal_24m", "vpll_27m", "vpll_37p125m", "vpll_74p25m" }; ++static const char *clk_sen2_ref_sel[] __initdata = { "xtal_24m", "vpll_27m", "vpll_37p125m", "vpll_74p25m" }; ++static const char *clk_sen1_ref_sel[] __initdata = { "xtal_24m", "vpll_27m", "vpll_37p125m", "vpll_74p25m" }; ++static const char *clk_sen0_ref_sel[] __initdata = { "xtal_24m", "vpll_27m", "vpll_37p125m", "vpll_74p25m" }; ++static const char *clk_isp_glb_sel[] __initdata = { "cpll_208m", "epll_333m", "npll_400m", "epll_500m", "npll_533m" }; ++static const char *clk_isp_csi_sel[] __initdata = { "vpll_148p5m", "cpll_208m" }; ++ ++static struct axera_mux_clock ax620x_mux_clks_isp[] __initdata = { ++ /*sen5 dummy_hw0[23:16] [17:16] sel [21:18] divn [22] divn_update [23] clk_eb ++ sen4 dummy_hw0[15:8] [9:8] sel [13:10] divn [14] divn_update [15] clk_eb ++ sen3 dummy_hw0[7:0] [1:0] sel [5:2] divn [6] divn_update [7] clk_eb ++ */ ++ {AX620X_CLK_SEN5_REF_SEL, "clk_sen5_ref_sel", clk_sen5_ref_sel, ARRAY_SIZE(clk_sen5_ref_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x330, 16, 2, 0, NULL,}, ++ {AX620X_CLK_SEN4_REF_SEL, "clk_sen4_ref_sel", clk_sen4_ref_sel, ARRAY_SIZE(clk_sen4_ref_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x330, 8, 2, 0, NULL,}, ++ {AX620X_CLK_SEN3_REF_SEL, "clk_sen3_ref_sel", clk_sen3_ref_sel, ARRAY_SIZE(clk_sen3_ref_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x330, 0, 2, 0, NULL,}, ++ {AX620X_CLK_SEN2_REF_SEL, "clk_sen2_ref_sel", clk_sen2_ref_sel, ARRAY_SIZE(clk_sen2_ref_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 15, 2, 0, NULL,}, ++ {AX620X_CLK_SEN1_REF_SEL, "clk_sen1_ref_sel", clk_sen1_ref_sel, ARRAY_SIZE(clk_sen1_ref_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 13, 2, 0, NULL,}, ++ {AX620X_CLK_SEN0_REF_SEL, "clk_sen0_ref_sel", clk_sen0_ref_sel, ARRAY_SIZE(clk_sen0_ref_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 11, 2, 0, NULL,}, ++ {AX620X_CLK_ISP_GLB_SEL, "clk_isp_glb_sel", clk_isp_glb_sel, ARRAY_SIZE(clk_isp_glb_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 2, 3, 0, NULL,}, ++ {AX620X_CLK_ISP_CSI_SEL, "clk_isp_csi_sel", clk_isp_csi_sel, ARRAY_SIZE(clk_isp_csi_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 1, 1, 0, NULL,}, ++}; ++ ++static struct axera_gate_clock ax620x_gate_clks_isp[] __initdata = { ++ {AX620X_CLK_SEN5_REF, "clk_sen5_ref", "clk_sen5_ref_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x330, 23, ++ 1, 0, 0, 0, 0,}, ++ {AX620X_CLK_SEN4_REF, "clk_sen4_ref", "clk_sen4_ref_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x330, 15, ++ 1, 0, 0, 0, 0,}, ++ {AX620X_CLK_SEN3_REF, "clk_sen3_ref", "clk_sen3_ref_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x330, 7, 1, ++ 0, 0, 0, 0,}, ++ {AX620X_CLK_SEN2_REF, "clk_sen2_ref", "clk_sen2_ref_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 6, 0, ++ 0x194, 6, 0x198, 6,}, ++ {AX620X_CLK_SEN1_REF, "clk_sen1_ref", "clk_sen1_ref_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 5, 0, ++ 0x194, 5, 0x198, 5,}, ++ {AX620X_CLK_SEN0_REF, "clk_sen0_ref", "clk_sen0_ref_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 4, 0, ++ 0x194, 4, 0x198, 4,}, ++ {AX620X_CLK_PPI_TXCLKESC_ALL, "clk_ppi_txclkesc_all", "epll_10m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, ++ 3, 0, 0x194, 3, 0x198, 3,}, ++ {AX620X_CLK_ISP_CSI, "clk_isp_csi", "clk_isp_csi_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 2, 0, ++ 0x194, 2, 0x198, 2,}, ++ {AX620X_CLK_DPHY_RX_REF, "clk_dphy_rx_ref", "epll_100m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 1, 0, ++ 0x194, 1, 0x198, 1,}, ++ {AX620X_CLK_CFG_PHY, "clk_cfg_phy", "epll_100m", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 0, 0, 0x194, 0, ++ 0x198, 0,}, ++ {AX620X_PPI2_TXCLKESC_ALL, "ppi2_txclkesc_all", "clk_ppi_txclkesc_all", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x8, 16, 0, 0x19C, 16, 0x1A0, 16,}, ++ {AX620X_PPI1_TXCLKESC_ALL, "ppi1_txclkesc_all", "clk_ppi_txclkesc_all", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x8, 15, 0, 0x19C, 15, 0x1A0, 15,}, ++ {AX620X_PPI0_TXCLKESC_ALL, "ppi0_txclkesc_all", "clk_ppi_txclkesc_all", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x8, 14, 0, 0x19C, 14, 0x1A0, 14,}, ++ {AX620X_PCLK_CSI3_ISP, "pclk_csi3_isp", "clk_isp_csi", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 13, 0, ++ 0x19C, 13, 0x1A0, 13,}, ++ {AX620X_PCLK_CSI2_ISP, "pclk_csi2_isp", "clk_isp_csi", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 12, 0, ++ 0x19C, 12, 0x1A0, 12,}, ++ {AX620X_PCLK_CSI1_ISP, "pclk_csi1_isp", "clk_isp_csi", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 11, 0, ++ 0x19C, 11, 0x1A0, 11,}, ++ {AX620X_PCLK_CSI0_ISP, "pclk_csi0_isp", "clk_isp_csi", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 10, 0, ++ 0x19C, 10, 0x1A0, 10,}, ++ {AX620X_CLK_PHY_REF2, "clk_phy_ref2", "clk_dphy_rx_ref", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 9, 0, ++ 0x19C, 9, 0x1A0, 9,}, ++ {AX620X_CLK_PHY_REF1, "clk_phy_ref1", "clk_dphy_rx_ref", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 8, 0, ++ 0x19C, 8, 0x1A0, 8,}, ++ {AX620X_CLK_PHY_REF0, "clk_phy_ref0", "clk_dphy_rx_ref", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 7, 0, ++ 0x19C, 7, 0x1A0, 7,}, ++ {AX620X_CLK_ISP_ITP, "clk_isp_itp", "clk_isp_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 6, 0, ++ 0x19C, 6, 0x1A0, 6,}, ++ {AX620X_CLK_ISP_IFE, "clk_isp_ife", "clk_isp_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 5, 0, ++ 0x19C, 5, 0x1A0, 5,}, ++ {AX620X_CLK_ISP_GDC, "clk_isp_gdc", "clk_isp_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 4, 0, ++ 0x19C, 4, 0x1A0, 4,}, ++ {AX620X_CLK_ISP_AXIM, "clk_isp_axim", "clk_isp_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 3, 0, ++ 0x19C, 3, 0x1A0, 3,}, ++ {AX620X_CLK_CFG_PHY2, "clk_cfg_phy2", "clk_cfg_phy", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 2, 0, 0x19C, ++ 2, 0x1A0, 2,}, ++ {AX620X_CLK_CFG_PHY1, "clk_cfg_phy1", "clk_cfg_phy", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 1, 0, 0x19C, ++ 1, 0x1A0, 1,}, ++ {AX620X_CLK_CFG_PHY0, "clk_cfg_phy0", "clk_cfg_phy", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 0, 0, 0x19C, ++ 0, 0x1A0, 0,}, ++}; ++ ++static struct axera_divider_clock ax620x_div_clks_isp[] __initdata = { ++ /*sen5 dummy_hw0[23:16] [17:16] sel [21:18] divn [22] divn_update [23] clk_eb ++ sen4 dummy_hw0[15:8] [9:8] sel [13:10] divn [14] divn_update [15] clk_eb ++ sen3 dummy_hw0[7:0] [1:0] sel [5:2] divn [6] divn_update [7] clk_eb ++ */ ++ {AX620X_CLK_SEN5_REF_DIVN, "clk_sen5_ref_divn", "clk_sen5_ref_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x330, 0x330, 22, 18, 4, 0, NULL,}, ++ {AX620X_CLK_SEN4_REF_DIVN, "clk_sen4_ref_divn", "clk_sen4_ref_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x330, 0x330, 14, 10, 4, 0, NULL,}, ++ {AX620X_CLK_SEN3_REF_DIVN, "clk_sen3_ref_divn", "clk_sen3_ref_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0x330, 0x330, 6, 2, 4, 0, NULL,}, ++ {AX620X_CLK_SEN2_REF_DIVN, "clk_sen2_ref_divn", "clk_sen2_ref_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0xC, 0xC, 14, 10, 4, 0, NULL,}, ++ {AX620X_CLK_SEN1_REF_DIVN, "clk_sen1_ref_divn", "clk_sen1_ref_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0xC, 0xC, 9, 5, 4, 0, NULL,}, ++ {AX620X_CLK_SEN0_REF_DIVN, "clk_sen0_ref_divn", "clk_sen0_ref_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ 0xC, 0xC, 4, 0, 4, 0, NULL,}, ++}; ++ ++static void __init ax620x_clk_isp_clk_init(struct device_node *np) ++{ ++ struct axera_clock_data *clk_data_top; ++ clk_data_top = axera_clk_init(np, AX620X_ISP_NR_CLKS); ++ if (!clk_data_top) ++ return; ++ ++ axera_clk_register_mux(ax620x_mux_clks_isp, ARRAY_SIZE(ax620x_mux_clks_isp), clk_data_top); ++ axera_clk_register_gate(ax620x_gate_clks_isp, ARRAY_SIZE(ax620x_gate_clks_isp), clk_data_top); ++ axera_clk_register_divider(ax620x_div_clks_isp, ARRAY_SIZE(ax620x_div_clks_isp), clk_data_top); ++} ++ ++CLK_OF_DECLARE(ax620x_clk_isp_glb, "axera,ax620x-isp-clk", ax620x_clk_isp_clk_init); ++ ++/*mm*/ ++static const char *pclk_dispc_sel[] __initdata = { "xtal_24m", "vpll_27m", "cpll_208m", "epll_333m", "vpll_594m" }; ++static const char *clk_mm_glb_sel[] __initdata = ++#ifdef CONFIG_SLAVE_CLK_AX620X ++ { "xtal_24m", "cpll_312m", "npll_400m", "epll_500m", "npll_533m"}; ++#else ++ { "xtal_24m", "cpll_312m", "npll_400m", "epll_500m", "npll_533m", "vpll_594m" }; ++#endif ++ ++static struct axera_mux_clock ax620x_mux_clks_mm[] __initdata = { ++ {AX620X_PCLK_DISPC_SEL, "pclk_dispc_sel", pclk_dispc_sel, ARRAY_SIZE(pclk_dispc_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 3, 3, 0, NULL,}, ++ {AX620X_CLK_MM_GLB_SEL, "clk_mm_glb_sel", clk_mm_glb_sel, ARRAY_SIZE(clk_mm_glb_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 0, 3, 0, NULL,}, ++}; ++ ++static struct axera_gate_clock ax620x_gate_clks_mm[] __initdata = { ++ {AX620X_CLK_TDP, "clk_tdp", "clk_mm_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 5, 0, 0x84, 5, 0x88, ++ 5,}, ++ {AX620X_CLK_FBCE, "clk_fbce", "clk_mm_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 4, 0, 0x84, 4, ++ 0x88, 4,}, ++ {AX620X_CLK_FBCD, "clk_fbcd", "clk_mm_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 3, 0, 0x84, 3, ++ 0x88, 3,}, ++ {AX620X_CLK_DPU, "clk_dpu", "clk_mm_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 2, 0, 0x84, 2, 0x88, ++ 2,}, ++ {AX620X_CLK_DPI, "clk_dpi", "pclk_dispc_divn", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 1, 0, 0x84, 1, ++ 0x88, 1,}, ++ {AX620X_CLK_CMD, "clk_cmd", "clk_mm_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 0, 0, 0x84, 0, 0x88, ++ 0,}, ++}; ++ ++static struct axera_divider_clock ax620x_div_clks_mm[] __initdata = { ++ {AX620X_PCLK_DISPC_DIVN, "pclk_dispc_divn", "pclk_dispc_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 0x8, ++ 4, 0, 4, 0, NULL,}, ++}; ++ ++static void __init ax620x_clk_mm_clk_init(struct device_node *np) ++{ ++ struct axera_clock_data *clk_data_top; ++ clk_data_top = axera_clk_init(np, AX620X_MM_NR_CLKS); ++ if (!clk_data_top) ++ return; ++ ++ axera_clk_register_mux(ax620x_mux_clks_mm, ARRAY_SIZE(ax620x_mux_clks_mm), clk_data_top); ++ axera_clk_register_gate(ax620x_gate_clks_mm, ARRAY_SIZE(ax620x_gate_clks_mm), clk_data_top); ++ axera_clk_register_divider(ax620x_div_clks_mm, ARRAY_SIZE(ax620x_div_clks_mm), clk_data_top); ++} ++ ++CLK_OF_DECLARE(ax620x_clk_mm_glb, "axera,ax620x-mm-clk", ax620x_clk_mm_clk_init); ++ ++/*vpu*/ ++static const char *clk_vpu_glb_sel[] __initdata = { "epll_250m", "cpll_312m", "epll_500m", "cpll_624m" }; ++ ++static struct axera_mux_clock ax620x_mux_clks_vpu[] __initdata = { ++ {AX620X_CLK_VPU_GLB_SEL, "clk_vpu_glb_sel", clk_vpu_glb_sel, ARRAY_SIZE(clk_vpu_glb_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 0, 2, 0, NULL,}, ++}; ++ ++static struct axera_gate_clock ax620x_gate_clks_vpu[] __initdata = { ++ {AX620X_CLK_VENC, "clk_venc", "clk_vpu_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 2, 0, 0x88, 2, ++ 0x8C, 2,}, ++ {AX620X_CLK_VDEC, "clk_vdec", "clk_vpu_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 1, 0, 0x88, 1, ++ 0x8C, 1,}, ++ {AX620X_CLK_JENC, "clk_jenc", "clk_vpu_glb_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x4, 0, 0, 0x88, 0, ++ 0x8C, 0,}, ++}; ++ ++static void __init ax620x_clk_vpu_clk_init(struct device_node *np) ++{ ++ struct axera_clock_data *clk_data_top; ++ clk_data_top = axera_clk_init(np, AX620X_VPU_NR_CLKS); ++ if (!clk_data_top) ++ return; ++ ++ axera_clk_register_mux(ax620x_mux_clks_vpu, ARRAY_SIZE(ax620x_mux_clks_vpu), clk_data_top); ++ axera_clk_register_gate(ax620x_gate_clks_vpu, ARRAY_SIZE(ax620x_gate_clks_vpu), clk_data_top); ++} ++ ++CLK_OF_DECLARE(ax620x_clk_vpu_glb, "axera,ax620x-vpu-clk", ax620x_clk_vpu_clk_init); ++ ++/*CPU*/ ++static const char *clk_dma_fab_sel[] __initdata = { "xtal_24m", "cpll_156m", "epll_250m", "epll_500m" }; ++static const char *clk_cpu_sel[] __initdata = { "xtal_24m", "npll_800m", "epll_1000m", "vpll", "cpll_1248m" }; ++ ++static struct axera_mux_clock ax620x_mux_clks_cpu[] __initdata = { ++ {AX620X_CLK_DMA_FAB_SEL, "clk_dma_fab_sel", clk_dma_fab_sel, ARRAY_SIZE(clk_dma_fab_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 4, 2, 0, NULL,}, ++ {AX620X_CLK_CPU_SEL, "clk_cpu_sel", clk_cpu_sel, ARRAY_SIZE(clk_cpu_sel), ++ CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x0, 1, 3, 0, NULL,}, ++}; ++ ++static struct axera_gate_clock ax620x_gate_clks_cpu[] __initdata = { ++ {AX620X_CLK_DMA, "clk_dma", "clk_dma_fab_sel", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0x8, 0, 0, 0x1008, 0, ++ 0x2008, 0,}, ++}; ++ ++static void __init ax620x_clk_cpu_clk_init(struct device_node *np) ++{ ++ struct axera_clock_data *clk_data_top; ++ clk_data_top = axera_clk_init(np, AX620X_CPU_NR_CLKS); ++ if (!clk_data_top) ++ return; ++ ++ axera_clk_register_mux(ax620x_mux_clks_cpu, ARRAY_SIZE(ax620x_mux_clks_cpu), clk_data_top); ++ axera_clk_register_gate(ax620x_gate_clks_cpu, ARRAY_SIZE(ax620x_gate_clks_cpu), clk_data_top); ++} ++ ++CLK_OF_DECLARE(ax620x_clk_cpu_glb, "axera,ax620x-cpu-clk", ax620x_clk_cpu_clk_init); +diff --git a/drivers/clk/axera/clk-axera.h b/drivers/clk/axera/clk-axera.h +new file mode 100644 +index 000000000..c6715a196 +--- /dev/null ++++ b/drivers/clk/axera/clk-axera.h +@@ -0,0 +1,156 @@ ++/* ++ * Axera clock driver ++ * ++ * Copyright (c) 2019-2020 Axera Technology Co., Ltd. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#ifndef __AXERA_CLK_H_ ++#define __AXERA_CLK_H_ ++ ++#include ++#include ++#include ++ ++struct platform_device; ++ ++struct axera_clock_data { ++ struct clk_onecell_data clk_data; ++ void __iomem *base; ++}; ++ ++struct axera_fixed_rate_clock { ++ unsigned int id; ++ char *name; ++ const char *parent_name; ++ unsigned long flags; ++ unsigned long fixed_rate; ++}; ++ ++struct axera_fixed_factor_clock { ++ unsigned int id; ++ char *name; ++ const char *parent_name; ++ unsigned long mult; ++ unsigned long div; ++ unsigned long flags; ++}; ++ ++struct axera_mux_clock { ++ unsigned int id; ++ const char *name; ++ const char *const *parent_names; ++ u8 num_parents; ++ unsigned long flags; ++ unsigned long offset; ++ u8 shift; ++ u8 width; ++ u8 mux_flags; ++ u32 *table; ++ const char *alias; ++}; ++ ++struct axera_phase_clock { ++ unsigned int id; ++ const char *name; ++ const char *parent_names; ++ unsigned long flags; ++ unsigned long offset; ++ u8 shift; ++ u8 width; ++ u32 *phase_degrees; ++ u32 *phase_regvals; ++ u8 phase_num; ++}; ++ ++struct axera_divider_clock { ++ unsigned int id; ++ const char *name; ++ const char *parent_name; ++ unsigned long flags; ++ unsigned long offset; ++ unsigned long update_offset; ++ u8 update; ++ u8 shift; ++ u8 width; ++ u8 div_flags; ++ struct clk_div_table *table; ++ const char *alias; ++}; ++ ++ ++struct axera_gate_clock { ++ unsigned int id; ++ const char *name; ++ const char *parent_name; ++ unsigned long flags; ++ unsigned long offset; ++ u8 bit_idx; ++ u8 gate_flags; ++ u16 set_offset; ++ u8 set_bit; ++ u16 clr_offset; ++ u8 clr_bit; ++ const char *alias; ++}; ++struct clkgate_separated { ++ struct clk_hw hw; ++ void __iomem *enable; /* enable register */ ++ u8 bit_idx; /* bits in enable/disable register */ ++ u8 flags; ++ void __iomem *set; /*set enable register */ ++ u8 set_bit; /*set enable bit in set enable register */ ++ void __iomem *clr; /*set clear register */ ++ u8 clr_bit; /*set clear bit in set clear register */ ++ spinlock_t *lock; ++ const char *name; ++}; ++struct clk *axera_register_clkgate(struct device *, const char *, ++ const char *, unsigned long, ++ void __iomem *, u8, u8, ++ void __iomem *, u8, ++ void __iomem *, u8, ++ spinlock_t *); ++struct clk *axera_register_clkdiv(struct device *dev, const char *name, ++ const char *parent_name, unsigned long flags, ++ void __iomem *reg, void __iomem *reg_update, ++ u8 shift, u8 width, u32 mask_bit, spinlock_t *lock); ++ ++struct axera_clock_data *axera_clk_alloc(struct platform_device *, int); ++struct axera_clock_data *axera_clk_init(struct device_node *, int); ++int axera_clk_register_fixed_rate(const struct axera_fixed_rate_clock *, ++ int, struct axera_clock_data *); ++int axera_clk_register_fixed_factor(const struct axera_fixed_factor_clock *, ++ int, struct axera_clock_data *); ++int axera_clk_register_mux(const struct axera_mux_clock *, int, ++ struct axera_clock_data *); ++int axera_clk_register_divider(const struct axera_divider_clock *, ++ int, struct axera_clock_data *); ++void axera_clk_register_gate(const struct axera_gate_clock *, ++ int, struct axera_clock_data *); ++ ++#define axera_clk_unregister(type) \ ++static inline \ ++void axera_clk_unregister_##type(const struct axera_##type##_clock *clks, \ ++ int nums, struct axera_clock_data *data) \ ++{ \ ++ struct clk **clocks = data->clk_data.clks; \ ++ int i; \ ++ for (i = 0; i < nums; i++) { \ ++ int id = clks[i].id; \ ++ if (clocks[id]) \ ++ clk_unregister_##type(clocks[id]); \ ++ } \ ++} ++ ++axera_clk_unregister(fixed_rate) ++axera_clk_unregister(fixed_factor) ++axera_clk_unregister(mux) ++axera_clk_unregister(divider) ++axera_clk_unregister(gate) ++ ++#endif /* __axera_CLK_H */ ++ +diff --git a/drivers/clk/axera/clk.c b/drivers/clk/axera/clk.c +new file mode 100644 +index 000000000..89619ebd1 +--- /dev/null ++++ b/drivers/clk/axera/clk.c +@@ -0,0 +1,468 @@ ++/* ++ * Axera clock driver ++ * ++ * Copyright (c) 2019-2020 Axera Technology Co., Ltd. ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "clk-axera.h" ++static DEFINE_SPINLOCK(axera_clk_lock); ++struct axera_clock_data *axera_clk_alloc(struct platform_device *pdev,int nr_clks) ++{ ++ struct axera_clock_data *clk_data; ++ struct resource *res; ++ struct clk **clk_table; ++ clk_data = devm_kmalloc(&pdev->dev, sizeof(*clk_data), GFP_KERNEL); ++ if (!clk_data) ++ return NULL; ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res) ++ return NULL; ++ clk_data->base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); ++ if (!clk_data->base) ++ return NULL; ++ clk_table = devm_kmalloc_array(&pdev->dev, nr_clks, sizeof(*clk_table), GFP_KERNEL); ++ if (!clk_table) ++ return NULL; ++ clk_data->clk_data.clks = clk_table; ++ clk_data->clk_data.clk_num = nr_clks; ++ return clk_data; ++} ++ ++EXPORT_SYMBOL_GPL(axera_clk_alloc); ++struct axera_clock_data *axera_clk_init(struct device_node *np, ++ int nr_clks) ++{ ++ struct axera_clock_data *clk_data; ++ struct clk **clk_table; ++ void __iomem *base; ++ base = of_iomap(np, 0); ++ if (!base) { ++ pr_err("%s: failed to map clock registers\n", __func__); ++ goto err; ++ } ++ clk_data = kzalloc(sizeof(*clk_data), GFP_KERNEL); ++ if (!clk_data) ++ goto err; ++ clk_data->base = base; ++ clk_table = kcalloc(nr_clks, sizeof(*clk_table), GFP_KERNEL); ++ if (!clk_table) ++ goto err_data; ++ clk_data->clk_data.clks = clk_table; ++ clk_data->clk_data.clk_num = nr_clks; ++ of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data->clk_data); ++ return clk_data; ++err_data: ++ kfree(clk_data); ++err: ++ return NULL; ++} ++ ++EXPORT_SYMBOL_GPL(axera_clk_init); ++int axera_clk_register_fixed_rate(const struct axera_fixed_rate_clock ++ *clks, int nums, ++ struct axera_clock_data *data) ++{ ++ struct clk *clk; ++ int i; ++ for (i = 0; i < nums; i++) { ++ clk = clk_register_fixed_rate(NULL, clks[i].name, ++ clks[i].parent_name, ++ clks[i].flags, ++ clks[i].fixed_rate); ++ if (IS_ERR(clk)) { ++ pr_err("%s: failed to register clock %s\n", __func__, ++ clks[i].name); ++ goto err; ++ } ++ data->clk_data.clks[clks[i].id] = clk; ++ } ++ return 0; ++ err:while (i--) ++ clk_unregister_fixed_rate(data->clk_data.clks[clks[i].id]); ++ return PTR_ERR(clk); ++} ++ ++EXPORT_SYMBOL_GPL(axera_clk_register_fixed_rate); ++int axera_clk_register_fixed_factor(const struct axera_fixed_factor_clock ++ *clks, int nums, ++ struct axera_clock_data *data) ++{ ++ struct clk *clk; ++ int i; ++ for (i = 0; i < nums; i++) { ++ clk = clk_register_fixed_factor(NULL, clks[i].name, ++ clks[i].parent_name, ++ clks[i].flags, clks[i].mult, ++ clks[i].div); ++ if (IS_ERR(clk)) { ++ pr_err("%s: failed to register clock %s\n", __func__, ++ clks[i].name); ++ goto err; ++ } ++ data->clk_data.clks[clks[i].id] = clk; ++ } ++ return 0; ++ err: ++ while (i--) ++ clk_unregister_fixed_factor(data->clk_data.clks[clks[i].id]); ++ return PTR_ERR(clk); ++} ++ ++EXPORT_SYMBOL_GPL(axera_clk_register_fixed_factor); ++int axera_clk_register_mux(const struct axera_mux_clock *clks, int nums, ++ struct axera_clock_data *data) ++{ ++ struct clk *clk; ++ void __iomem *base = data->base; ++ int i; ++ for (i = 0; i < nums; i++) { ++ u32 mask = BIT(clks[i].width) - 1; ++ clk = ++ clk_register_mux_table(NULL, clks[i].name, ++ clks[i].parent_names, ++ clks[i].num_parents, clks[i].flags, ++ base + clks[i].offset, ++ clks[i].shift, mask, ++ clks[i].mux_flags, clks[i].table, ++ &axera_clk_lock); ++ if (IS_ERR(clk)) { ++ pr_err("%s: failed to register clock %s\n", __func__, ++ clks[i].name); ++ goto err; ++ } ++ if (clks[i].alias) ++ clk_register_clkdev(clk, clks[i].alias, NULL); ++ data->clk_data.clks[clks[i].id] = clk; ++ } ++ return 0; ++ err:while (i--) ++ clk_unregister_mux(data->clk_data.clks[clks[i].id]); ++ return PTR_ERR(clk); ++} ++ ++EXPORT_SYMBOL_GPL(axera_clk_register_mux); ++#define div_mask(width) ((1 << (width)) - 1) ++ ++ ++struct axera_clk_divider { ++ struct clk_hw hw; ++ void __iomem *reg; ++ void __iomem *reg_update; ++ u8 update; ++ u8 shift; ++ u8 width; ++ u32 mask; ++ const struct clk_div_table *table; ++ spinlock_t *lock; ++}; ++ ++#define to_axera_clk_divider(_hw) \ ++ container_of(_hw, struct axera_clk_divider, hw) ++ ++static unsigned long axera_clkdiv_recalc_rate(struct clk_hw *hw, ++ unsigned long parent_rate) ++{ ++ unsigned int val; ++ struct axera_clk_divider *dclk = to_axera_clk_divider(hw); ++ ++ val = readl_relaxed(dclk->reg) >> dclk->shift; ++ val &= div_mask(dclk->width); ++ ++ return divider_recalc_rate(hw, parent_rate, val, dclk->table, ++ CLK_DIVIDER_ROUND_CLOSEST, dclk->width); ++} ++ ++static long axera_clkdiv_round_rate(struct clk_hw *hw, unsigned long rate, ++ unsigned long *prate) ++{ ++ struct axera_clk_divider *dclk = to_axera_clk_divider(hw); ++ ++ return divider_round_rate(hw, rate, prate, dclk->table, ++ dclk->width, CLK_DIVIDER_ROUND_CLOSEST); ++} ++ ++static int axera_clkdiv_set_rate(struct clk_hw *hw, unsigned long rate, ++ unsigned long parent_rate) ++{ ++ int value; ++ u32 data; ++ struct axera_clk_divider *dclk = to_axera_clk_divider(hw); ++ ++ value = divider_get_val(rate, parent_rate, dclk->table, ++ dclk->width, CLK_DIVIDER_ROUND_CLOSEST); ++ ++ pr_debug("axera_clkdiv_set_rate, rate: %ld, parent_rate: %ld, value: %d", rate, parent_rate, value); ++ if (dclk->lock) ++ spin_lock(dclk->lock); ++ ++ data = readl_relaxed(dclk->reg); ++ data &= ~(div_mask(dclk->width) << dclk->shift); ++ data |= value << dclk->shift; ++ writel_relaxed(data, dclk->reg); ++ data = readl_relaxed(dclk->reg_update); ++ data |= 1 << dclk->update; ++ writel_relaxed(data, dclk->reg_update); ++ mdelay(1); ++ data &= ~(1 << dclk->update); ++ writel_relaxed(data, dclk->reg_update); ++ ++ if (dclk->lock) ++ spin_unlock(dclk->lock); ++ ++ return 0; ++} ++ ++static const struct clk_ops axera_clkdiv_ops = { ++ .recalc_rate = axera_clkdiv_recalc_rate, ++ .round_rate = axera_clkdiv_round_rate, ++ .set_rate = axera_clkdiv_set_rate, ++}; ++ ++struct clk *axera_register_clkdiv(struct device *dev, const char *name, ++ const char *parent_name, unsigned long flags, ++ void __iomem *reg, void __iomem *reg_update, ++ u8 shift, u8 width, u32 update, spinlock_t *lock) ++{ ++ struct axera_clk_divider *div; ++ struct clk *clk; ++ struct clk_init_data init; ++ struct clk_div_table *table; ++ u32 max_div, min_div; ++ int i; ++ ++ /* allocate the divider */ ++ div = kzalloc(sizeof(*div), GFP_KERNEL); ++ if (!div) ++ return ERR_PTR(-ENOMEM); ++ ++ /* Init the divider table */ ++ max_div = div_mask(width) + 1; ++ min_div = 1; ++ ++ table = kcalloc(max_div + 1, sizeof(*table), GFP_KERNEL); ++ if (!table) { ++ kfree(div); ++ return ERR_PTR(-ENOMEM); ++ } ++ table[0].div = 1; ++ table[0].val = 0; ++ for (i = 1; i < max_div; i++) { ++ table[i].div = i * 2; ++ table[i].val = i; ++ } ++ ++ init.name = name; ++ init.ops = &axera_clkdiv_ops; ++ init.flags = flags; ++ init.parent_names = parent_name ? &parent_name : NULL; ++ init.num_parents = parent_name ? 1 : 0; ++ ++ div->reg = reg; ++ div->reg_update = reg_update; ++ div->shift = shift; ++ div->width = width; ++ div->lock = lock; ++ div->hw.init = &init; ++ div->table = table; ++ div->update = update; ++ ++ /* register the clock */ ++ clk = clk_register(dev, &div->hw); ++ if (IS_ERR(clk)) { ++ kfree(table); ++ kfree(div); ++ } ++ ++ return clk; ++} ++int axera_clk_register_divider(const struct axera_divider_clock *clks, ++ int nums, struct axera_clock_data *data) ++{ ++ struct clk *clk; ++ void __iomem *base = data->base; ++ int i; ++ ++ for (i = 0; i < nums; i++) { ++ clk = axera_register_clkdiv(NULL, clks[i].name, ++ clks[i].parent_name, ++ clks[i].flags, ++ base + clks[i].offset, ++ base + clks[i].update_offset, ++ clks[i].shift, ++ clks[i].width, ++ clks[i].update, ++ &axera_clk_lock); ++ if (IS_ERR(clk)) { ++ pr_err("%s: failed to register clock %s\n", ++ __func__, clks[i].name); ++ goto err; ++ } ++ ++ if (clks[i].alias) ++ clk_register_clkdev(clk, clks[i].alias, NULL); ++ ++ data->clk_data.clks[clks[i].id] = clk; ++ } ++ return 0; ++err:while (i--) ++ clk_unregister_divider(data->clk_data.clks[clks[i].id]); ++ return PTR_ERR(clk); ++ ++} ++ ++EXPORT_SYMBOL_GPL(axera_clk_register_divider); ++static int axera_clkgate_enable(struct clk_hw *hw) ++{ ++ struct clkgate_separated *sclk; ++ unsigned long flags = 0; ++ u32 reg; ++ sclk = container_of(hw, struct clkgate_separated, hw); ++ pr_debug("axera_clkgate_enable, %s, %lx, %d, %lx, %d, %lx, %d\n", ++ sclk->name, (unsigned long )sclk->enable, sclk->bit_idx, ++ (unsigned long )sclk->set, sclk->set_bit, ++ (unsigned long )sclk->clr, sclk->clr_bit); ++ if(sclk->flags == 1) { ++ if (sclk->lock) ++ spin_lock_irqsave(sclk->lock, flags); ++ reg = readl_relaxed(sclk->enable); ++ reg |= BIT(sclk->bit_idx); ++ writel_relaxed(reg, sclk->enable); ++ if (sclk->lock) ++ spin_unlock_irqrestore(sclk->lock, flags); ++ } ++ else { ++ reg = BIT(sclk->set_bit); ++ writel_relaxed(reg, sclk->set); ++ } ++ pr_debug("axera_clkgate_enable %x\n", readl_relaxed(sclk->enable)); ++ return 0; ++} ++ ++static void axera_clkgate_disable(struct clk_hw *hw) ++{ ++ struct clkgate_separated *sclk; ++ unsigned long flags = 0; ++ u32 reg; ++ sclk = container_of(hw, struct clkgate_separated, hw); ++ pr_debug("axera_clkgate_disable, %s, %lx, %d, %lx, %d, %lx, %d\n", ++ sclk->name, (unsigned long )sclk->enable, sclk->bit_idx, ++ (unsigned long )sclk->set, sclk->set_bit, ++ (unsigned long )sclk->clr, sclk->clr_bit); ++ if(sclk->flags == 1) { ++ if (sclk->lock) ++ spin_lock_irqsave(sclk->lock, flags); ++ reg = readl_relaxed(sclk->enable); ++ reg &= ~BIT(sclk->bit_idx); ++ writel_relaxed(reg, sclk->enable); ++ if (sclk->lock) ++ spin_unlock_irqrestore(sclk->lock, flags); ++ } ++ else { ++ reg = BIT(sclk->clr_bit); ++ writel_relaxed(reg, sclk->clr); ++ } ++ reg = readl_relaxed(sclk->enable); ++ pr_debug("axera_clkgate_disable %x\n", readl_relaxed(sclk->enable)); ++} ++ ++static int axera_clkgate_is_enabled(struct clk_hw *hw) ++{ ++ struct clkgate_separated *sclk; ++ u32 reg; ++ sclk = container_of(hw, struct clkgate_separated, hw); ++ pr_debug("axera_clkgate_is_enabled, %s, %lx, %d, %lx, %d, %lx, %d\n", ++ sclk->name, (unsigned long )sclk->enable, sclk->bit_idx, ++ (unsigned long )sclk->set, sclk->set_bit, ++ (unsigned long )sclk->clr, sclk->clr_bit); ++ reg = readl_relaxed(sclk->enable); ++ reg &= BIT(sclk->bit_idx); ++ pr_debug("axera_clkgate_is_enabled %x\n", readl_relaxed(sclk->enable)); ++ return reg ? 1 : 0; ++} ++ ++static const struct clk_ops clkgate_separated_ops = { ++ .enable = axera_clkgate_enable, ++ .disable = axera_clkgate_disable, ++ .is_enabled = axera_clkgate_is_enabled, ++}; ++ ++struct clk *axera_register_clkgate(struct device *dev, const char *name, ++ const char *parent_name, ++ unsigned long flags, ++ void __iomem * reg, u8 bit_idx, ++ u8 clk_gate_flags, ++ void __iomem * set_reg, u8 set_bit, ++ void __iomem * clr_reg, u8 clr_bit, ++ spinlock_t * lock) ++{ ++ struct clkgate_separated *sclk; ++ struct clk *clk; ++ struct clk_init_data init; ++ sclk = kzalloc(sizeof(*sclk), GFP_KERNEL); ++ if (!sclk) ++ return ERR_PTR(-ENOMEM); ++ init.name = name; ++ init.ops = &clkgate_separated_ops; ++ init.flags = flags | CLK_IS_BASIC; ++ init.parent_names = (parent_name ? &parent_name : NULL); ++ init.num_parents = (parent_name ? 1 : 0); ++ sclk->enable = reg; ++ sclk->bit_idx = bit_idx; ++ sclk->flags = clk_gate_flags; ++ sclk->set = set_reg; ++ sclk->set_bit = set_bit; ++ sclk->clr = clr_reg; ++ sclk->clr_bit = clr_bit; ++ sclk->hw.init = &init; ++ sclk->lock = lock; ++ sclk->name = name; ++ pr_debug("axera_register_clkgate: %lx, %s\n", (unsigned long )sclk->enable, init.name); ++ clk = clk_register(dev, &sclk->hw); ++ if (IS_ERR(clk)) ++ kfree(sclk); ++ return clk; ++} ++ ++void axera_clk_register_gate(const struct axera_gate_clock *clks, ++ int nums, struct axera_clock_data *data) ++{ ++ struct clk *clk; ++ void __iomem *base = data->base; ++ int i; ++ for (i = 0; i < nums; i++) { ++ clk = axera_register_clkgate(NULL, clks[i].name, ++ clks[i].parent_name, ++ clks[i].flags, ++ base + clks[i].offset, ++ clks[i].bit_idx, ++ clks[i].gate_flags, ++ base + clks[i].set_offset, ++ clks[i].set_bit, ++ base + clks[i].clr_offset, ++ clks[i].clr_bit, ++ &axera_clk_lock); ++ if (IS_ERR(clk)) { ++ pr_err("%s: failed to register clock %s\n", __func__, clks[i].name); ++ continue; ++ } ++ if (clks[i].alias) ++ clk_register_clkdev(clk, clks[i].alias, NULL); ++ data->clk_data.clks[clks[i].id] = clk; ++ } ++} ++ ++EXPORT_SYMBOL_GPL(axera_clk_register_gate); +diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig +index a4f95574e..b818ca270 100644 +--- a/drivers/dma/Kconfig ++++ b/drivers/dma/Kconfig +@@ -190,6 +190,16 @@ config DW_AXI_DMAC + NOTE: This driver wasn't tested on 64 bit platform because + of lack 64 bit platform with Synopsys DW AXI DMAC. + ++config AXERA_AXI_DMAC ++ tristate "AXERA AXI DMA support" ++ depends on OF || COMPILE_TEST ++ select DMA_ENGINE ++ select DMA_VIRTUAL_CHANNELS ++ help ++ Enable support for Synopsys DesignWare AXI DMA controller. ++ NOTE: This driver wasn't tested on 64 bit platform because ++ of lack 64 bit platform with Synopsys DW AXI DMAC. ++ + config EP93XX_DMA + bool "Cirrus Logic EP93xx DMA support" + depends on ARCH_EP93XX || COMPILE_TEST +diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile +index c91702d88..38fcb1f98 100644 +--- a/drivers/dma/Makefile ++++ b/drivers/dma/Makefile +@@ -28,6 +28,7 @@ obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o + obj-$(CONFIG_DMA_SUN4I) += sun4i-dma.o + obj-$(CONFIG_DMA_SUN6I) += sun6i-dma.o + obj-$(CONFIG_DW_AXI_DMAC) += dw-axi-dmac/ ++obj-$(CONFIG_AXERA_AXI_DMAC) += axera-axi-dmac/ + obj-$(CONFIG_DW_DMAC_CORE) += dw/ + obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o + obj-$(CONFIG_FSL_DMA) += fsldma.o +diff --git a/drivers/dma/axera-axi-dmac/Makefile b/drivers/dma/axera-axi-dmac/Makefile +new file mode 100644 +index 000000000..cb0ddcaba +--- /dev/null ++++ b/drivers/dma/axera-axi-dmac/Makefile +@@ -0,0 +1 @@ ++obj-$(CONFIG_AXERA_AXI_DMAC) += axera-axi-dmac-platform.o +diff --git a/drivers/dma/axera-axi-dmac/axera-axi-dmac-platform.c b/drivers/dma/axera-axi-dmac/axera-axi-dmac-platform.c +new file mode 100644 +index 000000000..fdd2b36a2 +--- /dev/null ++++ b/drivers/dma/axera-axi-dmac/axera-axi-dmac-platform.c +@@ -0,0 +1,1396 @@ ++// SPDX-License-Identifier: GPL-2.0 ++// (C) 2017-2018 Synopsys, Inc. (www.synopsys.com) ++ ++/* ++ * Synopsys DesignWare AXI DMA Controller driver. ++ * ++ * Author: Eugeniy Paltsev ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "axera-axi-dmac.h" ++ ++#include "../dmaengine.h" ++#include "../virt-dma.h" ++ ++#define AX_DMA_DRV "axera_dma" ++ ++/* ++ * The set of bus widths supported by the DMA controller. DW AXI DMAC supports ++ * master data bus width up to 512 bits (for both AXI master interfaces), but ++ * it depends on IP block configurarion. ++ */ ++#define AXI_DMA_BUSWIDTHS \ ++ (DMA_SLAVE_BUSWIDTH_1_BYTE | \ ++ DMA_SLAVE_BUSWIDTH_2_BYTES | \ ++ DMA_SLAVE_BUSWIDTH_4_BYTES | \ ++ DMA_SLAVE_BUSWIDTH_8_BYTES | \ ++ DMA_SLAVE_BUSWIDTH_16_BYTES | \ ++ DMA_SLAVE_BUSWIDTH_32_BYTES | \ ++ DMA_SLAVE_BUSWIDTH_64_BYTES) ++ ++static inline void ++axi_dma_iowrite32(struct axi_dma_chip *chip, u32 reg, u32 val) ++{ ++ iowrite32(val, chip->regs + reg); ++} ++ ++static inline u32 axi_dma_ioread32(struct axi_dma_chip *chip, u32 reg) ++{ ++ return ioread32(chip->regs + reg); ++} ++ ++static inline void ++axi_chan_iowrite32(struct axi_dma_chan *chan, u32 reg, u32 val) ++{ ++ iowrite32(val, chan->chan_regs + reg); ++} ++ ++static inline u32 axi_chan_ioread32(struct axi_dma_chan *chan, u32 reg) ++{ ++ return ioread32(chan->chan_regs + reg); ++} ++ ++static inline void ++axi_chan_iowrite64(struct axi_dma_chan *chan, u32 reg, u64 val) ++{ ++ /* ++ * We split one 64 bit write for two 32 bit write as some HW doesn't ++ * support 64 bit access. ++ */ ++ iowrite32(lower_32_bits(val), chan->chan_regs + reg); ++ iowrite32(upper_32_bits(val), chan->chan_regs + reg + 4); ++} ++ ++static inline void axi_dma_disable(struct axi_dma_chip *chip) ++{ ++ u32 val; ++ ++ val = axi_dma_ioread32(chip, DMAC_CFG); ++ val &= ~DMAC_EN_MASK; ++ axi_dma_iowrite32(chip, DMAC_CFG, val); ++} ++ ++static inline void axi_dma_enable(struct axi_dma_chip *chip) ++{ ++ u32 val; ++ ++ val = axi_dma_ioread32(chip, DMAC_CFG); ++ val |= DMAC_EN_MASK; ++ axi_dma_iowrite32(chip, DMAC_CFG, val); ++} ++ ++static inline void axi_dma_irq_disable(struct axi_dma_chip *chip) ++{ ++ u32 val; ++ ++ val = axi_dma_ioread32(chip, DMAC_CFG); ++ val &= ~INT_EN_MASK; ++ axi_dma_iowrite32(chip, DMAC_CFG, val); ++} ++ ++static inline void axi_dma_irq_enable(struct axi_dma_chip *chip) ++{ ++ u32 val; ++ ++ val = axi_dma_ioread32(chip, DMAC_CFG); ++ val |= INT_EN_MASK; ++ axi_dma_iowrite32(chip, DMAC_CFG, val); ++} ++ ++static inline void axi_chan_irq_disable(struct axi_dma_chan *chan, u32 irq_mask) ++{ ++ u32 val; ++ ++ if (likely(irq_mask == DWAXIDMAC_IRQ_ALL)) { ++ axi_chan_iowrite32(chan, CH_INTSTATUS_ENA, DWAXIDMAC_IRQ_NONE); ++ } else { ++ val = axi_chan_ioread32(chan, CH_INTSTATUS_ENA); ++ val &= ~irq_mask; ++ axi_chan_iowrite32(chan, CH_INTSTATUS_ENA, val); ++ } ++} ++ ++static inline void axi_chan_irq_set(struct axi_dma_chan *chan, u32 irq_mask) ++{ ++ axi_chan_iowrite32(chan, CH_INTSTATUS_ENA, irq_mask); ++} ++ ++static inline void axi_chan_irq_sig_set(struct axi_dma_chan *chan, u32 irq_mask) ++{ ++ axi_chan_iowrite32(chan, CH_INTSIGNAL_ENA, irq_mask); ++} ++ ++static inline void axi_chan_irq_clear(struct axi_dma_chan *chan, u32 irq_mask) ++{ ++ axi_chan_iowrite32(chan, CH_INTCLEAR, irq_mask); ++} ++ ++static inline u32 axi_chan_irq_read(struct axi_dma_chan *chan) ++{ ++ return axi_chan_ioread32(chan, CH_INTSTATUS); ++} ++ ++static inline void axi_chan_disable(struct axi_dma_chan *chan) ++{ ++ u32 val; ++ ++ val = axi_dma_ioread32(chan->chip, DMAC_CHEN); ++ val &= ~(BIT(chan->id) << DMAC_CHAN_EN_SHIFT); ++ val |= BIT(chan->id) << DMAC_CHAN_EN_WE_SHIFT; ++ axi_dma_iowrite32(chan->chip, DMAC_CHEN, val); ++} ++ ++static inline void axi_chan_enable(struct axi_dma_chan *chan) ++{ ++ u32 val; ++ ++ val = axi_dma_ioread32(chan->chip, DMAC_CHEN); ++ val |= BIT(chan->id) << DMAC_CHAN_EN_SHIFT | ++ BIT(chan->id) << DMAC_CHAN_EN_WE_SHIFT; ++ axi_dma_iowrite32(chan->chip, DMAC_CHEN, val); ++} ++ ++static inline bool axi_chan_is_hw_enable(struct axi_dma_chan *chan) ++{ ++ u32 val; ++ ++ val = axi_dma_ioread32(chan->chip, DMAC_CHEN); ++ ++ return !!(val & (BIT(chan->id) << DMAC_CHAN_EN_SHIFT)); ++} ++ ++static void axi_dma_hw_init(struct axi_dma_chip *chip) ++{ ++ u32 i; ++ ++ for (i = 0; i < chip->dw->hdata->nr_channels; i++) { ++ axi_chan_irq_disable(&chip->dw->chan[i], DWAXIDMAC_IRQ_ALL); ++ axi_chan_disable(&chip->dw->chan[i]); ++ } ++} ++ ++static u32 axi_chan_get_xfer_width(struct axi_dma_chan *chan, dma_addr_t src, ++ dma_addr_t dst, size_t len) ++{ ++ u32 max_width = chan->chip->dw->hdata->m_data_width; ++ ++ return __ffs(src | dst | len | BIT(max_width)); ++} ++ ++static inline const char *axi_chan_name(struct axi_dma_chan *chan) ++{ ++ return dma_chan_name(&chan->vc.chan); ++} ++ ++static struct axi_dma_desc *axi_desc_alloc(u32 num) ++{ ++ struct axi_dma_desc *desc; ++ ++ desc = kzalloc(sizeof(*desc), GFP_NOWAIT); ++ if (!desc) ++ return NULL; ++ ++ desc->hw_desc = kcalloc(num, sizeof(*desc->hw_desc), GFP_NOWAIT); ++ if (!desc->hw_desc) { ++ kfree(desc); ++ return NULL; ++ } ++ ++ return desc; ++} ++ ++static struct axi_dma_lli *axi_desc_get(struct axi_dma_chan *chan, ++ dma_addr_t *addr) ++{ ++ struct axi_dma_lli *lli; ++ dma_addr_t phys; ++ ++ lli = dma_pool_zalloc(chan->desc_pool, GFP_NOWAIT, &phys); ++ if (unlikely(!lli)) { ++ dev_err(chan2dev(chan), "%s: not enough descriptors available\n", ++ axi_chan_name(chan)); ++ return NULL; ++ } ++ ++ atomic_inc(&chan->descs_allocated); ++ *addr = phys; ++ ++ return lli; ++} ++ ++static void axi_desc_put(struct axi_dma_desc *desc) ++{ ++ struct axi_dma_chan *chan = desc->chan; ++ int count = atomic_read(&chan->descs_allocated); ++ struct axi_dma_hw_desc *hw_desc; ++ int descs_put; ++ ++ for (descs_put = 0; descs_put < count; descs_put++) { ++ hw_desc = &desc->hw_desc[descs_put]; ++ dma_pool_free(chan->desc_pool, hw_desc->lli, hw_desc->llp); ++ } ++ ++ kfree(desc->hw_desc); ++ kfree(desc); ++ atomic_sub(descs_put, &chan->descs_allocated); ++ dev_vdbg(chan2dev(chan), "%s: %d descs put, %d still allocated\n", ++ axi_chan_name(chan), descs_put, ++ atomic_read(&chan->descs_allocated)); ++} ++ ++static void vchan_desc_put(struct virt_dma_desc *vdesc) ++{ ++ axi_desc_put(vd_to_axi_desc(vdesc)); ++} ++ ++static enum dma_status ++dma_chan_tx_status(struct dma_chan *dchan, dma_cookie_t cookie, ++ struct dma_tx_state *txstate) ++{ ++ struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan); ++ struct virt_dma_desc *vdesc; ++ enum dma_status status; ++ u32 completed_length; ++ unsigned long flags; ++ u32 completed_blocks; ++ size_t bytes = 0; ++ u32 length; ++ u32 len; ++ ++ status = dma_cookie_status(dchan, cookie, txstate); ++ if (status == DMA_COMPLETE || !txstate) ++ return status; ++ ++ spin_lock_irqsave(&chan->vc.lock, flags); ++ ++ vdesc = vchan_find_desc(&chan->vc, cookie); ++ if (vdesc) { ++ length = vd_to_axi_desc(vdesc)->length; ++ completed_blocks = vd_to_axi_desc(vdesc)->completed_blocks; ++ len = vd_to_axi_desc(vdesc)->hw_desc[0].len; ++ completed_length = completed_blocks * len; ++ bytes = length - completed_length; ++ } else { ++ bytes = vd_to_axi_desc(vdesc)->length; ++ } ++ ++ spin_unlock_irqrestore(&chan->vc.lock, flags); ++ dma_set_residue(txstate, bytes); ++ ++ return status; ++} ++ ++static void write_desc_llp(struct axi_dma_hw_desc *desc, dma_addr_t adr) ++{ ++ desc->lli->llp = cpu_to_le64(adr); ++} ++ ++static void write_chan_llp(struct axi_dma_chan *chan, dma_addr_t adr) ++{ ++ axi_chan_iowrite64(chan, CH_LLP, adr); ++} ++ ++/* Called in chan locked context */ ++static void axi_chan_block_xfer_start(struct axi_dma_chan *chan, ++ struct axi_dma_desc *first) ++{ ++ u32 priority = chan->chip->dw->hdata->priority[chan->id]; ++ u32 cfg_hi, cfg_lo, irq_mask; ++ u8 lms = 0; /* Select AXI0 master for LLI fetching */ ++ u32 *slave_id_ptr = chan->vc.chan.private; ++ ++ if (unlikely(axi_chan_is_hw_enable(chan))) { ++ dev_err(chan2dev(chan), "%s is non-idle!\n", ++ axi_chan_name(chan)); ++ ++ return; ++ } ++ ++ axi_dma_enable(chan->chip); ++ ++ if (chan->direction == DMA_MEM_TO_DEV) { ++ cfg_lo = (DWAXIDMAC_MBLK_TYPE_LL << CH_CFG_L_DST_MULTBLK_TYPE_POS | ++ DWAXIDMAC_MBLK_TYPE_LL << CH_CFG_L_SRC_MULTBLK_TYPE_POS | ++ (*slave_id_ptr) << CH_CFG_L_DST_PER_POS); ++ cfg_hi = ((chan->config.device_fc ? DWAXIDMAC_TT_FC_MEM_TO_PER_DST : ++ DWAXIDMAC_TT_FC_MEM_TO_PER_DMAC) << CH_CFG_H_TT_FC_POS | ++ priority << CH_CFG_H_PRIORITY_POS | ++ DWAXIDMAC_HS_SEL_HW << CH_CFG_H_HS_SEL_DST_POS | ++ DWAXIDMAC_HS_SEL_SW << CH_CFG_H_HS_SEL_SRC_POS) | (0xff << 23);//0xff outstanding lmt ++ } else if (chan->direction == DMA_DEV_TO_MEM) { ++ cfg_lo = (DWAXIDMAC_MBLK_TYPE_LL << CH_CFG_L_DST_MULTBLK_TYPE_POS | ++ DWAXIDMAC_MBLK_TYPE_LL << CH_CFG_L_SRC_MULTBLK_TYPE_POS | ++ (*slave_id_ptr) << CH_CFG_L_SRC_PER_POS); ++ cfg_hi = ((chan->config.device_fc ? DWAXIDMAC_TT_FC_PER_TO_MEM_SRC : ++ DWAXIDMAC_TT_FC_PER_TO_MEM_DMAC) << CH_CFG_H_TT_FC_POS | ++ priority << CH_CFG_H_PRIORITY_POS | ++ DWAXIDMAC_HS_SEL_SW << CH_CFG_H_HS_SEL_DST_POS | ++ DWAXIDMAC_HS_SEL_HW << CH_CFG_H_HS_SEL_SRC_POS) | (0xff << 23);//0xff outstanding lmt ++ } else { ++ cfg_lo = (DWAXIDMAC_MBLK_TYPE_LL << CH_CFG_L_DST_MULTBLK_TYPE_POS | ++ DWAXIDMAC_MBLK_TYPE_LL << CH_CFG_L_SRC_MULTBLK_TYPE_POS); ++ cfg_hi = (DWAXIDMAC_TT_FC_MEM_TO_MEM_DMAC << CH_CFG_H_TT_FC_POS | ++ priority << CH_CFG_H_PRIORITY_POS | ++ DWAXIDMAC_HS_SEL_HW << CH_CFG_H_HS_SEL_DST_POS | ++ DWAXIDMAC_HS_SEL_HW << CH_CFG_H_HS_SEL_SRC_POS) | (0xff << 23); //0xff outstanding lmt ++ } ++ axi_chan_iowrite32(chan, CH_CFG_L, cfg_lo); ++ axi_chan_iowrite32(chan, CH_CFG_H, cfg_hi); ++ ++ write_chan_llp(chan, first->hw_desc[0].llp | lms); ++ ++ irq_mask = DWAXIDMAC_IRQ_DMA_TRF | DWAXIDMAC_IRQ_ALL_ERR; ++ axi_chan_irq_sig_set(chan, irq_mask); ++ ++ /* Generate 'suspend' status but don't generate interrupt */ ++ irq_mask |= DWAXIDMAC_IRQ_SUSPENDED; ++ axi_chan_irq_set(chan, irq_mask); ++ ++ axi_chan_enable(chan); ++} ++ ++static void axi_chan_start_first_queued(struct axi_dma_chan *chan) ++{ ++ struct axi_dma_desc *desc; ++ struct virt_dma_desc *vd; ++ ++ vd = vchan_next_desc(&chan->vc); ++ if (!vd) ++ return; ++ ++ desc = vd_to_axi_desc(vd); ++ dev_vdbg(chan2dev(chan), "%s: started %u\n", axi_chan_name(chan), ++ vd->tx.cookie); ++ axi_chan_block_xfer_start(chan, desc); ++} ++ ++static void dma_chan_issue_pending(struct dma_chan *dchan) ++{ ++ struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&chan->vc.lock, flags); ++ if (vchan_issue_pending(&chan->vc)) ++ axi_chan_start_first_queued(chan); ++ spin_unlock_irqrestore(&chan->vc.lock, flags); ++} ++ ++static int dma_chan_alloc_chan_resources(struct dma_chan *dchan) ++{ ++ struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan); ++ ++ /* ASSERT: channel is idle */ ++ if (axi_chan_is_hw_enable(chan)) { ++ dev_err(chan2dev(chan), "%s is non-idle!\n", ++ axi_chan_name(chan)); ++ return -EBUSY; ++ } ++ ++ /* LLI address must be aligned to a 64-byte boundary */ ++ chan->desc_pool = dma_pool_create(dev_name(chan2dev(chan)), ++ chan->chip->dev, ++ sizeof(struct axi_dma_lli), ++ 64, 0); ++ if (!chan->desc_pool) { ++ dev_err(chan2dev(chan), "No memory for descriptors\n"); ++ return -ENOMEM; ++ } ++ dev_vdbg(dchan2dev(dchan), "%s: allocating\n", axi_chan_name(chan)); ++ ++ pm_runtime_get(chan->chip->dev); ++ ++ return 0; ++} ++ ++static void dma_chan_free_chan_resources(struct dma_chan *dchan) ++{ ++ struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan); ++ ++ /* ASSERT: channel is idle */ ++ if (axi_chan_is_hw_enable(chan)) ++ dev_err(dchan2dev(dchan), "%s is non-idle!\n", ++ axi_chan_name(chan)); ++ ++ axi_chan_disable(chan); ++ axi_chan_irq_disable(chan, DWAXIDMAC_IRQ_ALL); ++ ++ vchan_free_chan_resources(&chan->vc); ++ ++ dma_pool_destroy(chan->desc_pool); ++ chan->desc_pool = NULL; ++ dev_vdbg(dchan2dev(dchan), ++ "%s: free resources, descriptor still allocated: %u\n", ++ axi_chan_name(chan), atomic_read(&chan->descs_allocated)); ++ ++ pm_runtime_put(chan->chip->dev); ++} ++ ++/* ++ * If DW_axi_dmac sees CHx_CTL.ShadowReg_Or_LLI_Last bit of the fetched LLI ++ * as 1, it understands that the current block is the final block in the ++ * transfer and completes the DMA transfer operation at the end of current ++ * block transfer. ++ */ ++static void set_desc_last(struct axi_dma_hw_desc *desc) ++{ ++ u32 val; ++ ++ val = le32_to_cpu(desc->lli->ctl_hi); ++ val |= CH_CTL_H_LLI_LAST; ++ desc->lli->ctl_hi = cpu_to_le32(val); ++} ++ ++static void write_desc_sar(struct axi_dma_hw_desc *desc, dma_addr_t adr) ++{ ++ desc->lli->sar = cpu_to_le64(adr); ++} ++ ++static void write_desc_dar(struct axi_dma_hw_desc *desc, dma_addr_t adr) ++{ ++ desc->lli->dar = cpu_to_le64(adr); ++} ++ ++static void set_desc_src_master(struct axi_dma_hw_desc *desc) ++{ ++ u32 val; ++ ++ /* Select AXI0 for source master */ ++ val = le32_to_cpu(desc->lli->ctl_lo); ++ val &= ~CH_CTL_L_SRC_MAST; ++ desc->lli->ctl_lo = cpu_to_le32(val); ++} ++ ++static void set_desc_dest_master(struct axi_dma_hw_desc *hw_desc, ++ struct axi_dma_desc *desc) ++{ ++ u32 val; ++ ++ /* Select AXI1 for source master if available */ ++ val = le32_to_cpu(hw_desc->lli->ctl_lo); ++ if (desc->chan->chip->dw->hdata->nr_masters > 1) ++ val |= CH_CTL_L_DST_MAST; ++ else ++ val &= ~CH_CTL_L_DST_MAST; ++ ++ hw_desc->lli->ctl_lo = cpu_to_le32(val); ++} ++ ++static int dw_axi_dma_set_hw_desc(struct axi_dma_chan *chan, ++ struct axi_dma_hw_desc *hw_desc, ++ dma_addr_t mem_addr, size_t len) ++{ ++ unsigned int reg_width; ++ unsigned int mem_width; ++ dma_addr_t device_addr; ++ size_t axi_block_ts; ++ size_t block_ts; ++ u32 ctllo, ctlhi; ++ u32 burst_len; ++ ++ axi_block_ts = chan->chip->dw->hdata->block_size[chan->id]; ++ ++ switch (chan->direction) { ++ case DMA_MEM_TO_DEV: ++ reg_width = chan->config.dst_addr_width ? chan->config.dst_addr_width - 1 : DWAXIDMAC_TRANS_WIDTH_32; ++ mem_width = chan->config.src_addr_width ? chan->config.src_addr_width - 1 : DWAXIDMAC_TRANS_WIDTH_32; ++ ++ device_addr = chan->config.dst_addr; ++ ctllo = reg_width << CH_CTL_L_DST_WIDTH_POS | ++ mem_width << CH_CTL_L_SRC_WIDTH_POS | ++ DWAXIDMAC_CH_CTL_L_NOINC << CH_CTL_L_DST_INC_POS | ++ DWAXIDMAC_CH_CTL_L_INC << CH_CTL_L_SRC_INC_POS; ++ block_ts = len >> mem_width; ++ break; ++ case DMA_DEV_TO_MEM: ++ reg_width = chan->config.src_addr_width ? chan->config.src_addr_width - 1 : DWAXIDMAC_TRANS_WIDTH_32; ++ mem_width = chan->config.dst_addr_width ? chan->config.dst_addr_width - 1 : DWAXIDMAC_TRANS_WIDTH_32; ++ device_addr = chan->config.src_addr; ++ ctllo = reg_width << CH_CTL_L_SRC_WIDTH_POS | ++ mem_width << CH_CTL_L_DST_WIDTH_POS | ++ DWAXIDMAC_CH_CTL_L_INC << CH_CTL_L_DST_INC_POS | ++ DWAXIDMAC_CH_CTL_L_NOINC << CH_CTL_L_SRC_INC_POS; ++ block_ts = len >> reg_width; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ if (block_ts > axi_block_ts) ++ return -EINVAL; ++ ++ hw_desc->lli = axi_desc_get(chan, &hw_desc->llp); ++ if (unlikely(!hw_desc->lli)) ++ return -ENOMEM; ++ ++ ctlhi = CH_CTL_H_LLI_VALID; ++ ++ if (chan->chip->dw->hdata->restrict_axi_burst_len) { ++ burst_len = chan->chip->dw->hdata->axi_rw_burst_len; ++ ctlhi |= CH_CTL_H_ARLEN_EN | CH_CTL_H_AWLEN_EN | ++ burst_len << CH_CTL_H_ARLEN_POS | ++ burst_len << CH_CTL_H_AWLEN_POS; ++ } ++ ++ hw_desc->lli->ctl_hi = cpu_to_le32(ctlhi); ++ ++ if (chan->direction == DMA_MEM_TO_DEV) { ++ write_desc_sar(hw_desc, mem_addr); ++ write_desc_dar(hw_desc, device_addr); ++ } else { ++ write_desc_sar(hw_desc, device_addr); ++ write_desc_dar(hw_desc, mem_addr); ++ } ++ ++ hw_desc->lli->block_ts_lo = cpu_to_le32(block_ts - 1); ++ ++ ctllo |= chan->config.dst_maxburst << CH_CTL_L_DST_MSIZE_POS | ++ chan->config.src_maxburst << CH_CTL_L_SRC_MSIZE_POS; ++ hw_desc->lli->ctl_lo = cpu_to_le32(ctllo); ++ ++ set_desc_src_master(hw_desc); ++ ++ hw_desc->len = len; ++ return 0; ++} ++ ++static struct dma_async_tx_descriptor * ++dw_axi_dma_chan_prep_cyclic(struct dma_chan *dchan, dma_addr_t dma_addr, ++ size_t buf_len, size_t period_len, ++ enum dma_transfer_direction direction, ++ unsigned long flags) ++{ ++ struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan); ++ struct axi_dma_hw_desc *hw_desc = NULL; ++ struct axi_dma_desc *desc = NULL; ++ dma_addr_t src_addr = dma_addr; ++ u32 num_periods, num_segments; ++ size_t axi_block_len; ++ u32 total_segments; ++ u32 segment_len; ++ unsigned int i; ++ int status; ++ u64 llp = 0; ++ u8 lms = 0; /* Select AXI0 master for LLI fetching */ ++ ++ num_periods = buf_len / period_len; ++ ++ axi_block_len = chan->chip->dw->hdata->block_size[chan->id];//calculate_block_len(chan, dma_addr, buf_len, direction); ++ if (axi_block_len == 0) ++ return NULL; ++ ++ num_segments = DIV_ROUND_UP(period_len, axi_block_len); ++ segment_len = DIV_ROUND_UP(period_len, num_segments); ++ ++ total_segments = num_periods * num_segments; ++ ++ desc = axi_desc_alloc(total_segments); ++ if (unlikely(!desc)) ++ goto err_desc_get; ++ ++ chan->direction = direction; ++ desc->chan = chan; ++ chan->cyclic = true; ++ desc->length = 0; ++ desc->period_len = period_len; ++ ++ for (i = 0; i < total_segments; i++) { ++ hw_desc = &desc->hw_desc[i]; ++ ++ status = dw_axi_dma_set_hw_desc(chan, hw_desc, src_addr, ++ segment_len); ++ if (status < 0) ++ goto err_desc_get; ++ ++ desc->length += hw_desc->len; ++ /* Set end-of-link to the linked descriptor, so that cyclic ++ * callback function can be triggered during interrupt. ++ */ ++ set_desc_last(hw_desc); ++ ++ src_addr += segment_len; ++ } ++ ++ llp = desc->hw_desc[0].llp; ++ ++ /* Managed transfer list */ ++ do { ++ hw_desc = &desc->hw_desc[--total_segments]; ++ write_desc_llp(hw_desc, llp | lms); ++ llp = hw_desc->llp; ++ } while (total_segments); ++ ++ return vchan_tx_prep(&chan->vc, &desc->vd, flags); ++ ++err_desc_get: ++ if (desc) ++ axi_desc_put(desc); ++ ++ return NULL; ++} ++ ++static struct dma_async_tx_descriptor * ++dw_axi_dma_chan_prep_slave_sg(struct dma_chan *dchan, struct scatterlist *sgl, ++ unsigned int sg_len, ++ enum dma_transfer_direction direction, ++ unsigned long flags, void *context) ++{ ++ struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan); ++ struct axi_dma_hw_desc *hw_desc = NULL; ++ struct axi_dma_desc *desc = NULL; ++ u32 num_segments, segment_len; ++ unsigned int loop = 0; ++ struct scatterlist *sg; ++ size_t axi_block_len; ++ u32 len, num_sgs = 0; ++ unsigned int i; ++ dma_addr_t mem; ++ int status; ++ u64 llp = 0; ++ u8 lms = 0; /* Select AXI0 master for LLI fetching */ ++ ++ if (unlikely(!is_slave_direction(direction) || !sg_len)) ++ return NULL; ++ ++ mem = sg_dma_address(sgl); ++ len = sg_dma_len(sgl); ++ ++ axi_block_len = chan->chip->dw->hdata->block_size[chan->id];//calculate_block_len(chan, mem, len, direction); ++ if (axi_block_len == 0) ++ return NULL; ++ ++ for_each_sg(sgl, sg, sg_len, i) ++ num_sgs += DIV_ROUND_UP(sg_dma_len(sg), axi_block_len); ++ ++ desc = axi_desc_alloc(num_sgs); ++ if (unlikely(!desc)) ++ goto err_desc_get; ++ ++ desc->chan = chan; ++ desc->length = 0; ++ chan->direction = direction; ++ ++ for_each_sg(sgl, sg, sg_len, i) { ++ mem = sg_dma_address(sg); ++ len = sg_dma_len(sg); ++ num_segments = DIV_ROUND_UP(sg_dma_len(sg), axi_block_len); ++ segment_len = DIV_ROUND_UP(sg_dma_len(sg), num_segments); ++ do { ++ hw_desc = &desc->hw_desc[loop++]; ++ status = dw_axi_dma_set_hw_desc(chan, hw_desc, mem, segment_len); ++ if (status < 0) ++ goto err_desc_get; ++ ++ desc->length += hw_desc->len; ++ len -= segment_len; ++ mem += segment_len; ++ } while (len >= segment_len); ++ } ++ ++ /* Set end-of-link to the last link descriptor of list */ ++ set_desc_last(&desc->hw_desc[num_sgs - 1]); ++ ++ /* Managed transfer list */ ++ do { ++ hw_desc = &desc->hw_desc[--num_sgs]; ++ write_desc_llp(hw_desc, llp | lms); ++ llp = hw_desc->llp; ++ } while (num_sgs); ++ ++ return vchan_tx_prep(&chan->vc, &desc->vd, flags); ++ ++err_desc_get: ++ if (desc) ++ axi_desc_put(desc); ++ ++ return NULL; ++} ++ ++static struct dma_async_tx_descriptor * ++dma_chan_prep_dma_memcpy(struct dma_chan *dchan, dma_addr_t dst_adr, ++ dma_addr_t src_adr, size_t len, unsigned long flags) ++{ ++ struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan); ++ size_t block_ts, max_block_ts, xfer_len; ++ struct axi_dma_hw_desc *hw_desc = NULL; ++ struct axi_dma_desc *desc = NULL; ++ u32 xfer_width, reg, num; ++ u64 llp = 0; ++ u8 lms = 0; /* Select AXI0 master for LLI fetching */ ++ ++ dev_dbg(chan2dev(chan), "%s: memcpy: src: %pad dst: %pad length: %zd flags: %#lx", ++ axi_chan_name(chan), &src_adr, &dst_adr, len, flags); ++ ++ max_block_ts = chan->chip->dw->hdata->block_size[chan->id]; ++ xfer_width = axi_chan_get_xfer_width(chan, src_adr, dst_adr, len); ++ num = DIV_ROUND_UP(len, max_block_ts << xfer_width); ++ desc = axi_desc_alloc(num); ++ if (unlikely(!desc)) ++ goto err_desc_get; ++ ++ desc->chan = chan; ++ num = 0; ++ desc->length = 0; ++ while (len) { ++ xfer_len = len; ++ ++ hw_desc = &desc->hw_desc[num]; ++ /* ++ * Take care for the alignment. ++ * Actually source and destination widths can be different, but ++ * make them same to be simpler. ++ */ ++ xfer_width = axi_chan_get_xfer_width(chan, src_adr, dst_adr, xfer_len); ++ ++ /* ++ * block_ts indicates the total number of data of width ++ * to be transferred in a DMA block transfer. ++ * BLOCK_TS register should be set to block_ts - 1 ++ */ ++ block_ts = xfer_len >> xfer_width; ++ if (block_ts > max_block_ts) { ++ block_ts = max_block_ts; ++ xfer_len = max_block_ts << xfer_width; ++ } ++ ++ hw_desc->lli = axi_desc_get(chan, &hw_desc->llp); ++ if (unlikely(!hw_desc->lli)) ++ goto err_desc_get; ++ ++ write_desc_sar(hw_desc, src_adr); ++ write_desc_dar(hw_desc, dst_adr); ++ hw_desc->lli->block_ts_lo = cpu_to_le32(block_ts - 1); ++ ++ reg = CH_CTL_H_LLI_VALID; ++ if (chan->chip->dw->hdata->restrict_axi_burst_len) { ++ u32 burst_len = chan->chip->dw->hdata->axi_rw_burst_len; ++ ++ reg |= (CH_CTL_H_ARLEN_EN | ++ burst_len << CH_CTL_H_ARLEN_POS | ++ CH_CTL_H_AWLEN_EN | ++ burst_len << CH_CTL_H_AWLEN_POS); ++ } ++ hw_desc->lli->ctl_hi = cpu_to_le32(reg); ++ ++ reg = (DWAXIDMAC_BURST_TRANS_LEN_4 << CH_CTL_L_DST_MSIZE_POS | ++ DWAXIDMAC_BURST_TRANS_LEN_4 << CH_CTL_L_SRC_MSIZE_POS | ++ xfer_width << CH_CTL_L_DST_WIDTH_POS | ++ xfer_width << CH_CTL_L_SRC_WIDTH_POS | ++ DWAXIDMAC_CH_CTL_L_INC << CH_CTL_L_DST_INC_POS | ++ DWAXIDMAC_CH_CTL_L_INC << CH_CTL_L_SRC_INC_POS); ++ hw_desc->lli->ctl_lo = cpu_to_le32(reg); ++ ++ set_desc_src_master(hw_desc); ++ set_desc_dest_master(hw_desc, desc); ++ ++ hw_desc->len = xfer_len; ++ desc->length += hw_desc->len; ++ /* update the length and addresses for the next loop cycle */ ++ len -= xfer_len; ++ dst_adr += xfer_len; ++ src_adr += xfer_len; ++ num++; ++ } ++ ++ /* Set end-of-link to the last link descriptor of list */ ++ set_desc_last(&desc->hw_desc[num - 1]); ++ /* Managed transfer list */ ++ do { ++ hw_desc = &desc->hw_desc[--num]; ++ write_desc_llp(hw_desc, llp | lms); ++ llp = hw_desc->llp; ++ } while (num); ++ ++ return vchan_tx_prep(&chan->vc, &desc->vd, flags); ++ ++err_desc_get: ++ if (desc) ++ axi_desc_put(desc); ++ return NULL; ++} ++ ++static int dw_axi_dma_chan_slave_config(struct dma_chan *dchan, ++ struct dma_slave_config *config) ++{ ++ struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan); ++ ++ memcpy(&chan->config, config, sizeof(*config)); ++ ++ return 0; ++} ++ ++static void axi_chan_dump_lli(struct axi_dma_chan *chan, ++ struct axi_dma_hw_desc *desc) ++{ ++ dev_err(dchan2dev(&chan->vc.chan), ++ "SAR: 0x%llx DAR: 0x%llx LLP: 0x%llx BTS 0x%x CTL: 0x%x:%08x", ++ le64_to_cpu(desc->lli->sar), ++ le64_to_cpu(desc->lli->dar), ++ le64_to_cpu(desc->lli->llp), ++ le32_to_cpu(desc->lli->block_ts_lo), ++ le32_to_cpu(desc->lli->ctl_hi), ++ le32_to_cpu(desc->lli->ctl_lo)); ++} ++ ++static void axi_chan_list_dump_lli(struct axi_dma_chan *chan, ++ struct axi_dma_desc *desc_head) ++{ ++ int count = atomic_read(&chan->descs_allocated); ++ int i; ++ ++ for (i = 0; i < count; i++) ++ axi_chan_dump_lli(chan, &desc_head->hw_desc[i]); ++} ++ ++static noinline void axi_chan_handle_err(struct axi_dma_chan *chan, u32 status) ++{ ++ struct virt_dma_desc *vd; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&chan->vc.lock, flags); ++ ++ axi_chan_disable(chan); ++ ++ /* The bad descriptor currently is in the head of vc list */ ++ vd = vchan_next_desc(&chan->vc); ++ /* Remove the completed descriptor from issued list */ ++ list_del(&vd->node); ++ ++ /* WARN about bad descriptor */ ++ dev_err(chan2dev(chan), ++ "Bad descriptor submitted for %s, cookie: %d, irq: 0x%08x\n", ++ axi_chan_name(chan), vd->tx.cookie, status); ++ axi_chan_list_dump_lli(chan, vd_to_axi_desc(vd)); ++ ++ vchan_cookie_complete(vd); ++ ++ /* Try to restart the controller */ ++ axi_chan_start_first_queued(chan); ++ ++ spin_unlock_irqrestore(&chan->vc.lock, flags); ++} ++ ++static void axi_chan_block_xfer_complete(struct axi_dma_chan *chan) ++{ ++ int count = atomic_read(&chan->descs_allocated); ++ struct axi_dma_hw_desc *hw_desc; ++ struct axi_dma_desc *desc; ++ struct virt_dma_desc *vd; ++ unsigned long flags; ++ u64 llp; ++ int i; ++ ++ spin_lock_irqsave(&chan->vc.lock, flags); ++ if (unlikely(axi_chan_is_hw_enable(chan))) { ++ dev_err(chan2dev(chan), "BUG: %s caught DWAXIDMAC_IRQ_DMA_TRF, but channel not idle!\n", ++ axi_chan_name(chan)); ++ axi_chan_disable(chan); ++ } ++ ++ /* The completed descriptor currently is in the head of vc list */ ++ vd = vchan_next_desc(&chan->vc); ++ ++ if (!vd) { ++ dev_err(chan2dev(chan), "BUG: %s caught DWAXIDMAC_IRQ_DMA_TRF, butthe head of vc list is NULL!\n", ++ axi_chan_name(chan)); ++ spin_unlock_irqrestore(&chan->vc.lock, flags); ++ return; ++ } ++ if (chan->cyclic) { ++ desc = vd_to_axi_desc(vd); ++ if (desc) { ++ llp = lo_hi_readq(chan->chan_regs + CH_LLP); ++ for (i = 0; i < count; i++) { ++ hw_desc = &desc->hw_desc[i]; ++ if (hw_desc->llp == llp) { ++ axi_chan_irq_clear(chan, hw_desc->lli->status_lo); ++ hw_desc->lli->ctl_hi |= CH_CTL_H_LLI_VALID; ++ desc->completed_blocks = i; ++ ++ if (((hw_desc->len * (i + 1)) % desc->period_len) == 0) ++ vchan_cyclic_callback(vd); ++ break; ++ } ++ } ++ ++ axi_chan_enable(chan); ++ } ++ } else { ++ /* Remove the completed descriptor from issued list before completing */ ++ list_del(&vd->node); ++ vchan_cookie_complete(vd); ++ ++ /* Submit queued descriptors after processing the completed ones */ ++ axi_chan_start_first_queued(chan); ++ } ++ ++ spin_unlock_irqrestore(&chan->vc.lock, flags); ++} ++ ++static irqreturn_t dw_axi_dma_interrupt(int irq, void *dev_id) ++{ ++ struct axi_dma_chip *chip = dev_id; ++ struct dw_axi_dma *dw = chip->dw; ++ struct axi_dma_chan *chan; ++ ++ u32 status, i; ++ ++ /* Disable DMAC inerrupts. We'll enable them after processing chanels */ ++ axi_dma_irq_disable(chip); ++ ++ /* Poll, clear and process every chanel interrupt status */ ++ for (i = 0; i < dw->hdata->nr_channels; i++) { ++ chan = &dw->chan[i]; ++ status = axi_chan_irq_read(chan); ++ axi_chan_irq_clear(chan, status); ++ ++ dev_vdbg(chip->dev, "%s %u IRQ status: 0x%08x\n", ++ axi_chan_name(chan), i, status); ++ ++ if (status & DWAXIDMAC_IRQ_ALL_ERR) ++ axi_chan_handle_err(chan, status); ++ else if (status & DWAXIDMAC_IRQ_DMA_TRF) ++ axi_chan_block_xfer_complete(chan); ++ } ++ ++ /* Re-enable interrupts */ ++ axi_dma_irq_enable(chip); ++ ++ return IRQ_HANDLED; ++} ++ ++static int dma_chan_terminate_all(struct dma_chan *dchan) ++{ ++ struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan); ++ u32 chan_active = BIT(chan->id) << DMAC_CHAN_EN_SHIFT; ++ unsigned long flags; ++ u32 val; ++ int ret; ++ LIST_HEAD(head); ++ ++ axi_chan_disable(chan); ++ ++ ret = readl_poll_timeout_atomic(chan->chip->regs + DMAC_CHEN, val, ++ !(val & chan_active), 1000, 10000); ++ if (ret == -ETIMEDOUT) ++ dev_warn(dchan2dev(dchan), ++ "%s failed to stop\n", axi_chan_name(chan)); ++ ++ spin_lock_irqsave(&chan->vc.lock, flags); ++ ++ vchan_get_all_descriptors(&chan->vc, &head); ++ ++ chan->cyclic = false; ++ spin_unlock_irqrestore(&chan->vc.lock, flags); ++ ++ vchan_dma_desc_free_list(&chan->vc, &head); ++ ++ dev_vdbg(dchan2dev(dchan), "terminated: %s\n", axi_chan_name(chan)); ++ ++ return 0; ++} ++ ++static int dma_chan_pause(struct dma_chan *dchan) ++{ ++ struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan); ++ unsigned long flags; ++ unsigned int timeout = 20; /* timeout iterations */ ++ u32 val; ++ ++ spin_lock_irqsave(&chan->vc.lock, flags); ++ ++ val = axi_dma_ioread32(chan->chip, DMAC_CHEN); ++ val |= BIT(chan->id) << DMAC_CHAN_SUSP_SHIFT | ++ BIT(chan->id) << DMAC_CHAN_SUSP_WE_SHIFT; ++ axi_dma_iowrite32(chan->chip, DMAC_CHEN, val); ++ ++ do { ++ if (axi_chan_irq_read(chan) & DWAXIDMAC_IRQ_SUSPENDED) ++ break; ++ ++ udelay(2); ++ } while (--timeout); ++ ++ axi_chan_irq_clear(chan, DWAXIDMAC_IRQ_SUSPENDED); ++ ++ chan->is_paused = true; ++ ++ spin_unlock_irqrestore(&chan->vc.lock, flags); ++ ++ return timeout ? 0 : -EAGAIN; ++} ++ ++/* Called in chan locked context */ ++static inline void axi_chan_resume(struct axi_dma_chan *chan) ++{ ++ u32 val; ++ ++ val = axi_dma_ioread32(chan->chip, DMAC_CHEN); ++ val &= ~(BIT(chan->id) << DMAC_CHAN_SUSP_SHIFT); ++ val |= (BIT(chan->id) << DMAC_CHAN_SUSP_WE_SHIFT); ++ axi_dma_iowrite32(chan->chip, DMAC_CHEN, val); ++ ++ chan->is_paused = false; ++} ++ ++static int dma_chan_resume(struct dma_chan *dchan) ++{ ++ struct axi_dma_chan *chan = dchan_to_axi_dma_chan(dchan); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&chan->vc.lock, flags); ++ ++ if (chan->is_paused) ++ axi_chan_resume(chan); ++ ++ spin_unlock_irqrestore(&chan->vc.lock, flags); ++ ++ return 0; ++} ++ ++static int axi_dma_suspend(struct axi_dma_chip *chip) ++{ ++ axi_dma_irq_disable(chip); ++ axi_dma_disable(chip); ++ ++ clk_disable_unprepare(chip->core_clk); ++ ++ return 0; ++} ++ ++static int axi_dma_resume(struct axi_dma_chip *chip) ++{ ++ int ret; ++ ++ ret = clk_prepare_enable(chip->core_clk); ++ if (ret < 0) ++ return ret; ++ ++ axi_dma_enable(chip); ++ axi_dma_irq_enable(chip); ++ ++ return 0; ++} ++ ++static int __maybe_unused axi_dma_runtime_suspend(struct device *dev) ++{ ++ struct axi_dma_chip *chip = dev_get_drvdata(dev); ++ ++ return axi_dma_suspend(chip); ++} ++ ++static int __maybe_unused axi_dma_runtime_resume(struct device *dev) ++{ ++ struct axi_dma_chip *chip = dev_get_drvdata(dev); ++ ++ return axi_dma_resume(chip); ++} ++ ++static struct dma_chan *dw_axi_dma_of_xlate(struct of_phandle_args *dma_spec, ++ struct of_dma *ofdma) ++{ ++ struct dw_axi_dma *dw = ofdma->of_dma_data; ++ struct axi_dma_chan *chan; ++ struct dma_chan *dchan; ++ ++ dchan = dma_get_any_slave_channel(&dw->dma); ++ if (!dchan) ++ return NULL; ++ ++ chan = dchan_to_axi_dma_chan(dchan); ++ chan->hw_handshake_num = dma_spec->args[0]; ++ return dchan; ++} ++ ++static int parse_device_properties(struct axi_dma_chip *chip) ++{ ++ struct device *dev = chip->dev; ++ u32 tmp, carr[DMAC_MAX_CHANNELS]; ++ int ret; ++ ++ ret = device_property_read_u32(dev, "dma-channels", &tmp); ++ if (ret) ++ return ret; ++ if (tmp == 0 || tmp > DMAC_MAX_CHANNELS) ++ return -EINVAL; ++ ++ chip->dw->hdata->nr_channels = tmp; ++ ++ ret = device_property_read_u32(dev, "snps,dma-masters", &tmp); ++ if (ret) ++ return ret; ++ if (tmp == 0 || tmp > DMAC_MAX_MASTERS) ++ return -EINVAL; ++ ++ chip->dw->hdata->nr_masters = tmp; ++ ++ ret = device_property_read_u32(dev, "snps,data-width", &tmp); ++ if (ret) ++ return ret; ++ if (tmp > DWAXIDMAC_TRANS_WIDTH_MAX) ++ return -EINVAL; ++ ++ chip->dw->hdata->m_data_width = tmp; ++ ++ ret = device_property_read_u32_array(dev, "snps,block-size", carr, ++ chip->dw->hdata->nr_channels); ++ if (ret) ++ return ret; ++ for (tmp = 0; tmp < chip->dw->hdata->nr_channels; tmp++) { ++ if (carr[tmp] == 0 || carr[tmp] > DMAC_MAX_BLK_SIZE) ++ return -EINVAL; ++ ++ chip->dw->hdata->block_size[tmp] = carr[tmp]; ++ } ++ ++ ret = device_property_read_u32_array(dev, "snps,priority", carr, ++ chip->dw->hdata->nr_channels); ++ if (ret) ++ return ret; ++ /* Priority value must be programmed within [0:nr_channels-1] range */ ++ for (tmp = 0; tmp < chip->dw->hdata->nr_channels; tmp++) { ++ if (carr[tmp] >= chip->dw->hdata->nr_channels) ++ return -EINVAL; ++ ++ chip->dw->hdata->priority[tmp] = carr[tmp]; ++ } ++ ++ /* axi-max-burst-len is optional property */ ++ ret = device_property_read_u32(dev, "snps,axi-max-burst-len", &tmp); ++ if (!ret) { ++ if (tmp > DWAXIDMAC_ARWLEN_MAX + 1) ++ return -EINVAL; ++ if (tmp < DWAXIDMAC_ARWLEN_MIN + 1) ++ return -EINVAL; ++ ++ chip->dw->hdata->restrict_axi_burst_len = true; ++ chip->dw->hdata->axi_rw_burst_len = tmp - 1; ++ } ++ ++ return 0; ++} ++ ++static int dw_probe(struct platform_device *pdev) ++{ ++ struct axi_dma_chip *chip; ++ struct resource *mem; ++ struct dw_axi_dma *dw; ++ struct dw_axi_dma_hcfg *hdata; ++ u32 i; ++ int ret; ++ ++ chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); ++ if (!chip) ++ return -ENOMEM; ++ ++ dw = devm_kzalloc(&pdev->dev, sizeof(*dw), GFP_KERNEL); ++ if (!dw) ++ return -ENOMEM; ++ ++ hdata = devm_kzalloc(&pdev->dev, sizeof(*hdata), GFP_KERNEL); ++ if (!hdata) ++ return -ENOMEM; ++ ++ chip->dw = dw; ++ chip->dev = &pdev->dev; ++ chip->dw->hdata = hdata; ++ ++ of_dma_configure(chip->dev, chip->dev->of_node, true); ++ chip->dev->coherent_dma_mask = 0xfffffffff; ++ ++ chip->irq = platform_get_irq(pdev, 0); ++ if (chip->irq < 0) ++ return chip->irq; ++ ++ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ chip->regs = devm_ioremap_resource(chip->dev, mem); ++ if (IS_ERR(chip->regs)) ++ return PTR_ERR(chip->regs); ++ ++ chip->core_clk = devm_clk_get(chip->dev, "core-clk"); ++ if (IS_ERR(chip->core_clk)) ++ return PTR_ERR(chip->core_clk); ++ ++ if (clk_set_rate(chip->core_clk, 500000000)) ++ dev_err(chip->dev, "Set dmac core-clk rate fail\n"); ++ ++ ret = parse_device_properties(chip); ++ if (ret) ++ return ret; ++ ++ dw->chan = devm_kcalloc(chip->dev, hdata->nr_channels, ++ sizeof(*dw->chan), GFP_KERNEL); ++ if (!dw->chan) ++ return -ENOMEM; ++ ++ ret = devm_request_irq(chip->dev, chip->irq, dw_axi_dma_interrupt, ++ IRQF_SHARED, KBUILD_MODNAME, chip); ++ if (ret) ++ return ret; ++ ++ INIT_LIST_HEAD(&dw->dma.channels); ++ for (i = 0; i < hdata->nr_channels; i++) { ++ struct axi_dma_chan *chan = &dw->chan[i]; ++ ++ chan->chip = chip; ++ chan->id = i; ++ chan->chan_regs = chip->regs + COMMON_REG_LEN + i * CHAN_REG_LEN; ++ atomic_set(&chan->descs_allocated, 0); ++ ++ chan->vc.desc_free = vchan_desc_put; ++ vchan_init(&chan->vc, &dw->dma); ++ } ++ ++ /* Set capabilities */ ++ dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask); ++ dma_cap_set(DMA_SLAVE, dw->dma.cap_mask); ++ dma_cap_set(DMA_CYCLIC, dw->dma.cap_mask); ++ ++ /* DMA capabilities */ ++ dw->dma.chancnt = hdata->nr_channels; ++ dw->dma.max_burst = hdata->axi_rw_burst_len; ++ dw->dma.src_addr_widths = AXI_DMA_BUSWIDTHS; ++ dw->dma.dst_addr_widths = AXI_DMA_BUSWIDTHS; ++ dw->dma.directions = BIT(DMA_MEM_TO_MEM); ++ dw->dma.directions |= BIT(DMA_MEM_TO_DEV) | BIT(DMA_DEV_TO_MEM); ++ dw->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; ++ ++ dw->dma.dev = chip->dev; ++ dw->dma.device_tx_status = dma_chan_tx_status; ++ dw->dma.device_issue_pending = dma_chan_issue_pending; ++ dw->dma.device_terminate_all = dma_chan_terminate_all; ++ dw->dma.device_pause = dma_chan_pause; ++ dw->dma.device_resume = dma_chan_resume; ++ ++ dw->dma.device_alloc_chan_resources = dma_chan_alloc_chan_resources; ++ dw->dma.device_free_chan_resources = dma_chan_free_chan_resources; ++ ++ dw->dma.device_prep_dma_memcpy = dma_chan_prep_dma_memcpy; ++ dw->dma.device_config = dw_axi_dma_chan_slave_config; ++ dw->dma.device_prep_slave_sg = dw_axi_dma_chan_prep_slave_sg; ++ dw->dma.device_prep_dma_cyclic = dw_axi_dma_chan_prep_cyclic; ++ ++ /* ++ * Synopsis DesignWare AxiDMA datasheet mentioned Maximum ++ * supported blocks is 1024. Device register width is 4 bytes. ++ * Therefore, set constraint to 1024 * 4. ++ */ ++ dw->dma.dev->dma_parms = &dw->dma_parms; ++ platform_set_drvdata(pdev, chip); ++ ++ pm_runtime_enable(chip->dev); ++ ++ /* ++ * We can't just call pm_runtime_get here instead of ++ * pm_runtime_get_noresume + axi_dma_resume because we need ++ * driver to work also without Runtime PM. ++ */ ++ pm_runtime_get_noresume(chip->dev); ++ ret = axi_dma_resume(chip); ++ if (ret < 0) ++ goto err_pm_disable; ++ ++ axi_dma_hw_init(chip); ++ ++ pm_runtime_put(chip->dev); ++ ++ ret = dmaenginem_async_device_register(&dw->dma); ++ if (ret) ++ goto err_pm_disable; ++ ++ /* Register with OF helpers for DMA lookups */ ++ ret = of_dma_controller_register(pdev->dev.of_node, ++ dw_axi_dma_of_xlate, dw); ++ if (ret < 0) ++ dev_warn(&pdev->dev, ++ "Failed to register OF DMA controller, fallback to MEM_TO_MEM mode\n"); ++ ++ dev_info(chip->dev, "DesignWare AXI DMA Controller, %d channels\n", ++ dw->hdata->nr_channels); ++ ++ return 0; ++ ++err_pm_disable: ++ pm_runtime_disable(chip->dev); ++ ++ return ret; ++} ++ ++static int dw_remove(struct platform_device *pdev) ++{ ++ struct axi_dma_chip *chip = platform_get_drvdata(pdev); ++ struct dw_axi_dma *dw = chip->dw; ++ struct axi_dma_chan *chan, *_chan; ++ u32 i; ++ ++ /* Enable clk before accessing to registers */ ++ clk_prepare_enable(chip->core_clk); ++ axi_dma_irq_disable(chip); ++ for (i = 0; i < dw->hdata->nr_channels; i++) { ++ axi_chan_disable(&chip->dw->chan[i]); ++ axi_chan_irq_disable(&chip->dw->chan[i], DWAXIDMAC_IRQ_ALL); ++ } ++ axi_dma_disable(chip); ++ ++ pm_runtime_disable(chip->dev); ++ axi_dma_suspend(chip); ++ ++ devm_free_irq(chip->dev, chip->irq, chip); ++ ++ of_dma_controller_free(chip->dev->of_node); ++ ++ list_for_each_entry_safe(chan, _chan, &dw->dma.channels, ++ vc.chan.device_node) { ++ list_del(&chan->vc.chan.device_node); ++ tasklet_kill(&chan->vc.task); ++ } ++ ++ return 0; ++} ++ ++static const struct dev_pm_ops dw_axi_dma_pm_ops = { ++ SET_RUNTIME_PM_OPS(axi_dma_runtime_suspend, axi_dma_runtime_resume, NULL) ++}; ++ ++static const struct of_device_id dw_dma_of_id_table[] = { ++ { .compatible = "axera,axi-dma-1.01a" }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, dw_dma_of_id_table); ++ ++static struct platform_driver dw_driver = { ++ .probe = dw_probe, ++ .remove = dw_remove, ++ .driver = { ++ .name = AX_DMA_DRV, ++ .of_match_table = of_match_ptr(dw_dma_of_id_table), ++ .pm = &dw_axi_dma_pm_ops, ++ }, ++}; ++ ++module_platform_driver(dw_driver); ++ ++MODULE_LICENSE("GPL v2"); ++MODULE_DESCRIPTION("Synopsys DesignWare AXI DMA Controller platform driver"); ++MODULE_AUTHOR("Eugeniy Paltsev "); +diff --git a/drivers/dma/axera-axi-dmac/axera-axi-dmac.h b/drivers/dma/axera-axi-dmac/axera-axi-dmac.h +new file mode 100644 +index 000000000..00a82da0a +--- /dev/null ++++ b/drivers/dma/axera-axi-dmac/axera-axi-dmac.h +@@ -0,0 +1,348 @@ ++// SPDX-License-Identifier: GPL-2.0 ++// (C) 2017-2018 Synopsys, Inc. (www.synopsys.com) ++ ++/* ++ * Synopsys DesignWare AXI DMA Controller driver. ++ * ++ * Author: Eugeniy Paltsev ++ */ ++ ++#ifndef _AXI_DMA_PLATFORM_H ++#define _AXI_DMA_PLATFORM_H ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "../virt-dma.h" ++ ++#define DMAC_MAX_CHANNELS 2 ++#define DMAC_MAX_MASTERS 2 ++#define DMAC_MAX_BLK_SIZE (1 << 22) ++ ++struct dw_axi_dma_hcfg { ++ u32 nr_channels; ++ u32 nr_masters; ++ u32 m_data_width; ++ u32 block_size[DMAC_MAX_CHANNELS]; ++ u32 priority[DMAC_MAX_CHANNELS]; ++ /* maximum supported axi burst length */ ++ u32 axi_rw_burst_len; ++ bool restrict_axi_burst_len; ++}; ++ ++struct axi_dma_chan { ++ struct axi_dma_chip *chip; ++ void __iomem *chan_regs; ++ u8 id; ++ u8 hw_handshake_num; ++ atomic_t descs_allocated; ++ ++ struct dma_pool *desc_pool; ++ struct virt_dma_chan vc; ++ ++ struct axi_dma_desc *desc; ++ struct dma_slave_config config; ++ enum dma_transfer_direction direction; ++ bool cyclic; ++ /* these other elements are all protected by vc.lock */ ++ bool is_paused; ++}; ++ ++struct dw_axi_dma { ++ struct dma_device dma; ++ struct dw_axi_dma_hcfg *hdata; ++ struct device_dma_parameters dma_parms; ++ ++ /* channels */ ++ struct axi_dma_chan *chan; ++}; ++ ++struct axi_dma_chip { ++ struct device *dev; ++ int irq; ++ void __iomem *regs; ++ struct clk *core_clk; ++ struct dw_axi_dma *dw; ++}; ++ ++/* LLI == Linked List Item */ ++struct __packed axi_dma_lli { ++ __le64 sar; ++ __le64 dar; ++ __le32 block_ts_lo; ++ __le32 block_ts_hi; ++ __le64 llp; ++ __le32 ctl_lo; ++ __le32 ctl_hi; ++ __le32 sstat; ++ __le32 dstat; ++ __le32 status_lo; ++ __le32 status_hi; ++ __le32 reserved_lo; ++ __le32 reserved_hi; ++}; ++ ++struct axi_dma_hw_desc { ++ struct axi_dma_lli *lli; ++ dma_addr_t llp; ++ u32 len; ++}; ++ ++struct axi_dma_desc { ++ struct axi_dma_hw_desc *hw_desc; ++ ++ struct virt_dma_desc vd; ++ struct axi_dma_chan *chan; ++ u32 completed_blocks; ++ u32 length; ++ u32 period_len; ++}; ++ ++static inline struct device *dchan2dev(struct dma_chan *dchan) ++{ ++ return &dchan->dev->device; ++} ++ ++static inline struct device *chan2dev(struct axi_dma_chan *chan) ++{ ++ return &chan->vc.chan.dev->device; ++} ++ ++static inline struct axi_dma_desc *vd_to_axi_desc(struct virt_dma_desc *vd) ++{ ++ return container_of(vd, struct axi_dma_desc, vd); ++} ++ ++static inline struct axi_dma_chan *vc_to_axi_dma_chan(struct virt_dma_chan *vc) ++{ ++ return container_of(vc, struct axi_dma_chan, vc); ++} ++ ++static inline struct axi_dma_chan *dchan_to_axi_dma_chan(struct dma_chan *dchan) ++{ ++ return vc_to_axi_dma_chan(to_virt_chan(dchan)); ++} ++ ++ ++#define COMMON_REG_LEN 0x100 ++#define CHAN_REG_LEN 0x100 ++ ++/* Common registers offset */ ++#define DMAC_ID 0x000 /* R DMAC ID */ ++#define DMAC_COMPVER 0x008 /* R DMAC Component Version */ ++#define DMAC_CFG 0x010 /* R/W DMAC Configuration */ ++#define DMAC_CHEN 0x018 /* R/W DMAC Channel Enable */ ++#define DMAC_CHEN_L 0x018 /* R/W DMAC Channel Enable 00-31 */ ++#define DMAC_CHEN_H 0x01C /* R/W DMAC Channel Enable 32-63 */ ++#define DMAC_INTSTATUS 0x030 /* R DMAC Interrupt Status */ ++#define DMAC_COMMON_INTCLEAR 0x038 /* W DMAC Interrupt Clear */ ++#define DMAC_COMMON_INTSTATUS_ENA 0x040 /* R DMAC Interrupt Status Enable */ ++#define DMAC_COMMON_INTSIGNAL_ENA 0x048 /* R/W DMAC Interrupt Signal Enable */ ++#define DMAC_COMMON_INTSTATUS 0x050 /* R DMAC Interrupt Status */ ++#define DMAC_RESET 0x058 /* R DMAC Reset Register1 */ ++ ++/* DMA channel registers offset */ ++#define CH_SAR 0x000 /* R/W Chan Source Address */ ++#define CH_DAR 0x008 /* R/W Chan Destination Address */ ++#define CH_BLOCK_TS 0x010 /* R/W Chan Block Transfer Size */ ++#define CH_CTL 0x018 /* R/W Chan Control */ ++#define CH_CTL_L 0x018 /* R/W Chan Control 00-31 */ ++#define CH_CTL_H 0x01C /* R/W Chan Control 32-63 */ ++#define CH_CFG 0x020 /* R/W Chan Configuration */ ++#define CH_CFG_L 0x020 /* R/W Chan Configuration 00-31 */ ++#define CH_CFG_H 0x024 /* R/W Chan Configuration 32-63 */ ++#define CH_LLP 0x028 /* R/W Chan Linked List Pointer */ ++#define CH_STATUS 0x030 /* R Chan Status */ ++#define CH_SWHSSRC 0x038 /* R/W Chan SW Handshake Source */ ++#define CH_SWHSDST 0x040 /* R/W Chan SW Handshake Destination */ ++#define CH_BLK_TFR_RESUMEREQ 0x048 /* W Chan Block Transfer Resume Req */ ++#define CH_AXI_ID 0x050 /* R/W Chan AXI ID */ ++#define CH_AXI_QOS 0x058 /* R/W Chan AXI QOS */ ++#define CH_SSTAT 0x060 /* R Chan Source Status */ ++#define CH_DSTAT 0x068 /* R Chan Destination Status */ ++#define CH_SSTATAR 0x070 /* R/W Chan Source Status Fetch Addr */ ++#define CH_DSTATAR 0x078 /* R/W Chan Destination Status Fetch Addr */ ++#define CH_INTSTATUS_ENA 0x080 /* R/W Chan Interrupt Status Enable */ ++#define CH_INTSTATUS 0x088 /* R/W Chan Interrupt Status */ ++#define CH_INTSIGNAL_ENA 0x090 /* R/W Chan Interrupt Signal Enable */ ++#define CH_INTCLEAR 0x098 /* W Chan Interrupt Clear */ ++ ++/* DMAC_CFG */ ++#define DMAC_EN_POS 0 ++#define DMAC_EN_MASK BIT(DMAC_EN_POS) ++ ++#define INT_EN_POS 1 ++#define INT_EN_MASK BIT(INT_EN_POS) ++ ++#define DMAC_CHAN_EN_SHIFT 0 ++#define DMAC_CHAN_EN_WE_SHIFT 8 ++ ++#define DMAC_CHAN_SUSP_SHIFT 16 ++#define DMAC_CHAN_SUSP_WE_SHIFT 24 ++ ++/* CH_CTL_H */ ++#define CH_CTL_H_ARLEN_EN BIT(6) ++#define CH_CTL_H_ARLEN_POS 7 ++#define CH_CTL_H_AWLEN_EN BIT(15) ++#define CH_CTL_H_AWLEN_POS 16 ++ ++enum { ++ DWAXIDMAC_ARWLEN_1 = 0, ++ DWAXIDMAC_ARWLEN_2 = 1, ++ DWAXIDMAC_ARWLEN_4 = 3, ++ DWAXIDMAC_ARWLEN_8 = 7, ++ DWAXIDMAC_ARWLEN_16 = 15, ++ DWAXIDMAC_ARWLEN_32 = 31, ++ DWAXIDMAC_ARWLEN_64 = 63, ++ DWAXIDMAC_ARWLEN_128 = 127, ++ DWAXIDMAC_ARWLEN_256 = 255, ++ DWAXIDMAC_ARWLEN_MIN = DWAXIDMAC_ARWLEN_1, ++ DWAXIDMAC_ARWLEN_MAX = DWAXIDMAC_ARWLEN_256 ++}; ++ ++#define CH_CTL_H_LLI_LAST BIT(30) ++#define CH_CTL_H_LLI_VALID BIT(31) ++ ++/* CH_CTL_L */ ++#define CH_CTL_L_LAST_WRITE_EN BIT(30) ++ ++#define CH_CTL_L_DST_MSIZE_POS 18 ++#define CH_CTL_L_SRC_MSIZE_POS 14 ++ ++enum { ++ DWAXIDMAC_BURST_TRANS_LEN_1 = 0, ++ DWAXIDMAC_BURST_TRANS_LEN_4, ++ DWAXIDMAC_BURST_TRANS_LEN_8, ++ DWAXIDMAC_BURST_TRANS_LEN_16, ++ DWAXIDMAC_BURST_TRANS_LEN_32, ++ DWAXIDMAC_BURST_TRANS_LEN_64, ++ DWAXIDMAC_BURST_TRANS_LEN_128, ++ DWAXIDMAC_BURST_TRANS_LEN_256, ++ DWAXIDMAC_BURST_TRANS_LEN_512, ++ DWAXIDMAC_BURST_TRANS_LEN_1024 ++}; ++ ++#define CH_CTL_L_DST_WIDTH_POS 11 ++#define CH_CTL_L_SRC_WIDTH_POS 8 ++ ++#define CH_CTL_L_DST_INC_POS 6 ++#define CH_CTL_L_SRC_INC_POS 4 ++enum { ++ DWAXIDMAC_CH_CTL_L_INC = 0, ++ DWAXIDMAC_CH_CTL_L_NOINC ++}; ++ ++#define CH_CTL_L_DST_MAST BIT(2) ++#define CH_CTL_L_SRC_MAST BIT(0) ++ ++/* CH_CFG_H */ ++#define CH_CFG_L_DST_PER_POS 11 ++#define CH_CFG_L_SRC_PER_POS 4 ++#define CH_CFG_H_PRIORITY_POS 15 ++#define CH_CFG_H_HS_SEL_DST_POS 4 ++#define CH_CFG_H_HS_SEL_SRC_POS 3 ++enum { ++ DWAXIDMAC_HS_SEL_HW = 0, ++ DWAXIDMAC_HS_SEL_SW ++}; ++ ++#define CH_CFG_H_TT_FC_POS 0 ++enum { ++ DWAXIDMAC_TT_FC_MEM_TO_MEM_DMAC = 0, ++ DWAXIDMAC_TT_FC_MEM_TO_PER_DMAC, ++ DWAXIDMAC_TT_FC_PER_TO_MEM_DMAC, ++ DWAXIDMAC_TT_FC_PER_TO_PER_DMAC, ++ DWAXIDMAC_TT_FC_PER_TO_MEM_SRC, ++ DWAXIDMAC_TT_FC_PER_TO_PER_SRC, ++ DWAXIDMAC_TT_FC_MEM_TO_PER_DST, ++ DWAXIDMAC_TT_FC_PER_TO_PER_DST ++}; ++ ++/* CH_CFG_L */ ++#define CH_CFG_L_DST_MULTBLK_TYPE_POS 2 ++#define CH_CFG_L_SRC_MULTBLK_TYPE_POS 0 ++enum { ++ DWAXIDMAC_MBLK_TYPE_CONTIGUOUS = 0, ++ DWAXIDMAC_MBLK_TYPE_RELOAD, ++ DWAXIDMAC_MBLK_TYPE_SHADOW_REG, ++ DWAXIDMAC_MBLK_TYPE_LL ++}; ++ ++/** ++ * DW AXI DMA channel interrupts ++ * ++ * @DWAXIDMAC_IRQ_NONE: Bitmask of no one interrupt ++ * @DWAXIDMAC_IRQ_BLOCK_TRF: Block transfer complete ++ * @DWAXIDMAC_IRQ_DMA_TRF: Dma transfer complete ++ * @DWAXIDMAC_IRQ_SRC_TRAN: Source transaction complete ++ * @DWAXIDMAC_IRQ_DST_TRAN: Destination transaction complete ++ * @DWAXIDMAC_IRQ_SRC_DEC_ERR: Source decode error ++ * @DWAXIDMAC_IRQ_DST_DEC_ERR: Destination decode error ++ * @DWAXIDMAC_IRQ_SRC_SLV_ERR: Source slave error ++ * @DWAXIDMAC_IRQ_DST_SLV_ERR: Destination slave error ++ * @DWAXIDMAC_IRQ_LLI_RD_DEC_ERR: LLI read decode error ++ * @DWAXIDMAC_IRQ_LLI_WR_DEC_ERR: LLI write decode error ++ * @DWAXIDMAC_IRQ_LLI_RD_SLV_ERR: LLI read slave error ++ * @DWAXIDMAC_IRQ_LLI_WR_SLV_ERR: LLI write slave error ++ * @DWAXIDMAC_IRQ_INVALID_ERR: LLI invalid error or Shadow register error ++ * @DWAXIDMAC_IRQ_MULTIBLKTYPE_ERR: Slave Interface Multiblock type error ++ * @DWAXIDMAC_IRQ_DEC_ERR: Slave Interface decode error ++ * @DWAXIDMAC_IRQ_WR2RO_ERR: Slave Interface write to read only error ++ * @DWAXIDMAC_IRQ_RD2RWO_ERR: Slave Interface read to write only error ++ * @DWAXIDMAC_IRQ_WRONCHEN_ERR: Slave Interface write to channel error ++ * @DWAXIDMAC_IRQ_SHADOWREG_ERR: Slave Interface shadow reg error ++ * @DWAXIDMAC_IRQ_WRONHOLD_ERR: Slave Interface hold error ++ * @DWAXIDMAC_IRQ_LOCK_CLEARED: Lock Cleared Status ++ * @DWAXIDMAC_IRQ_SRC_SUSPENDED: Source Suspended Status ++ * @DWAXIDMAC_IRQ_SUSPENDED: Channel Suspended Status ++ * @DWAXIDMAC_IRQ_DISABLED: Channel Disabled Status ++ * @DWAXIDMAC_IRQ_ABORTED: Channel Aborted Status ++ * @DWAXIDMAC_IRQ_ALL_ERR: Bitmask of all error interrupts ++ * @DWAXIDMAC_IRQ_ALL: Bitmask of all interrupts ++ */ ++enum { ++ DWAXIDMAC_IRQ_NONE = 0, ++ DWAXIDMAC_IRQ_BLOCK_TRF = BIT(0), ++ DWAXIDMAC_IRQ_DMA_TRF = BIT(1), ++ DWAXIDMAC_IRQ_SRC_TRAN = BIT(3), ++ DWAXIDMAC_IRQ_DST_TRAN = BIT(4), ++ DWAXIDMAC_IRQ_SRC_DEC_ERR = BIT(5), ++ DWAXIDMAC_IRQ_DST_DEC_ERR = BIT(6), ++ DWAXIDMAC_IRQ_SRC_SLV_ERR = BIT(7), ++ DWAXIDMAC_IRQ_DST_SLV_ERR = BIT(8), ++ DWAXIDMAC_IRQ_LLI_RD_DEC_ERR = BIT(9), ++ DWAXIDMAC_IRQ_LLI_WR_DEC_ERR = BIT(10), ++ DWAXIDMAC_IRQ_LLI_RD_SLV_ERR = BIT(11), ++ DWAXIDMAC_IRQ_LLI_WR_SLV_ERR = BIT(12), ++ DWAXIDMAC_IRQ_INVALID_ERR = BIT(13), ++ DWAXIDMAC_IRQ_MULTIBLKTYPE_ERR = BIT(14), ++ DWAXIDMAC_IRQ_DEC_ERR = BIT(16), ++ DWAXIDMAC_IRQ_WR2RO_ERR = BIT(17), ++ DWAXIDMAC_IRQ_RD2RWO_ERR = BIT(18), ++ DWAXIDMAC_IRQ_WRONCHEN_ERR = BIT(19), ++ DWAXIDMAC_IRQ_SHADOWREG_ERR = BIT(20), ++ DWAXIDMAC_IRQ_WRONHOLD_ERR = BIT(21), ++ DWAXIDMAC_IRQ_LOCK_CLEARED = BIT(27), ++ DWAXIDMAC_IRQ_SRC_SUSPENDED = BIT(28), ++ DWAXIDMAC_IRQ_SUSPENDED = BIT(29), ++ DWAXIDMAC_IRQ_DISABLED = BIT(30), ++ DWAXIDMAC_IRQ_ABORTED = BIT(31), ++ DWAXIDMAC_IRQ_ALL_ERR = (GENMASK(21, 16) | GENMASK(14, 5)), ++ DWAXIDMAC_IRQ_ALL = GENMASK(31, 0) ++}; ++ ++enum { ++ DWAXIDMAC_TRANS_WIDTH_8 = 0, ++ DWAXIDMAC_TRANS_WIDTH_16, ++ DWAXIDMAC_TRANS_WIDTH_32, ++ DWAXIDMAC_TRANS_WIDTH_64, ++ DWAXIDMAC_TRANS_WIDTH_128, ++ DWAXIDMAC_TRANS_WIDTH_256, ++ DWAXIDMAC_TRANS_WIDTH_512, ++ DWAXIDMAC_TRANS_WIDTH_MAX = DWAXIDMAC_TRANS_WIDTH_512 ++}; ++ ++#endif /* _AXI_DMA_PLATFORM_H */ +diff --git a/drivers/extcon/extcon-usb-gpio.c b/drivers/extcon/extcon-usb-gpio.c +index 53762864a..01c6643bf 100644 +--- a/drivers/extcon/extcon-usb-gpio.c ++++ b/drivers/extcon/extcon-usb-gpio.c +@@ -113,6 +113,8 @@ static int usb_extcon_probe(struct platform_device *pdev) + if (!np) + return -EINVAL; + ++ dev_info(dev, "usb extcon probe\n"); ++ + info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; +diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c +index 2a56efced..3e4b2d24e 100644 +--- a/drivers/gpio/gpio-dwapb.c ++++ b/drivers/gpio/gpio-dwapb.c +@@ -498,7 +498,10 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, + struct dwapb_gpio_port *port; + void __iomem *dat, *set, *dirout; + int err; +- ++ unsigned long flags = 0; ++#ifdef CONFIG_ARCH_AXERA ++ static int gpio_base; ++#endif + port = &gpio->ports[offs]; + port->gpio = gpio; + port->idx = pp->idx; +@@ -513,10 +516,10 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, + set = gpio->regs + GPIO_SWPORTA_DR + (pp->idx * GPIO_SWPORT_DR_STRIDE); + dirout = gpio->regs + GPIO_SWPORTA_DDR + + (pp->idx * GPIO_SWPORT_DDR_STRIDE); +- ++ flags |= BGPIOF_READ_OUTPUT_REG_SET; + /* This registers 32 GPIO lines per port */ + err = bgpio_init(&port->gc, gpio->dev, 4, dat, set, NULL, dirout, +- NULL, 0); ++ NULL, flags); + if (err) { + dev_err(gpio->dev, "failed to init gpio chip for port%d\n", + port->idx); +@@ -527,8 +530,12 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, + port->gc.of_node = to_of_node(pp->fwnode); + #endif + port->gc.ngpio = pp->ngpio; ++#ifdef CONFIG_ARCH_AXERA ++ port->gc.base = gpio_base; ++ gpio_base += pp->ngpio; ++#else + port->gc.base = pp->gpio_base; +- ++#endif + /* Only port A support debounce */ + if (pp->idx == 0) + port->gc.set_config = dwapb_gpio_set_config; +diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig +index e44e567bd..a278beae7 100644 +--- a/drivers/gpu/drm/Kconfig ++++ b/drivers/gpu/drm/Kconfig +@@ -335,6 +335,8 @@ source "drivers/gpu/drm/tve200/Kconfig" + + source "drivers/gpu/drm/xen/Kconfig" + ++source "drivers/gpu/drm/axera/Kconfig" ++ + # Keep legacy drivers last + + menuconfig DRM_LEGACY +diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile +index a6771cef8..630222b88 100644 +--- a/drivers/gpu/drm/Makefile ++++ b/drivers/gpu/drm/Makefile +@@ -107,3 +107,4 @@ obj-$(CONFIG_DRM_TINYDRM) += tinydrm/ + obj-$(CONFIG_DRM_PL111) += pl111/ + obj-$(CONFIG_DRM_TVE200) += tve200/ + obj-$(CONFIG_DRM_XEN) += xen/ ++obj-$(CONFIG_DRM_AXERA) += axera/ +diff --git a/drivers/gpu/drm/axera/Kconfig b/drivers/gpu/drm/axera/Kconfig +new file mode 100644 +index 000000000..34ad10db8 +--- /dev/null ++++ b/drivers/gpu/drm/axera/Kconfig +@@ -0,0 +1,9 @@ ++config DRM_AXERA ++ tristate "DRM Support for Axera Display Controller" ++ depends on DRM && OF && (ARM || ARM64) ++ select DRM_KMS_HELPER ++ select DRM_KMS_CMA_HELPER ++ select DRM_GEM_CMA_HELPER ++ select DRM_PANEL ++ select VIDEOMODE_HELPERS ++ +diff --git a/drivers/gpu/drm/axera/Makefile b/drivers/gpu/drm/axera/Makefile +new file mode 100644 +index 000000000..2e954ec67 +--- /dev/null ++++ b/drivers/gpu/drm/axera/Makefile +@@ -0,0 +1,5 @@ ++axera-drm-y := ax_drm_drv.o ax_drm_crtc.o ax_drm_gem.o ax_drm_plane.o ax_drm_fb.o ax_drm_vfb.o ++axera-drm-y += ax_drm_misc_connector.o ax_drm_mipi.o ax_cdns_dsi.o ax_dsi_dphy.o ax_display_hal.o ++axera-drm-y += ax_mipi_lt6911uxc.o ax_panel_ili9881c.o ++ ++obj-$(CONFIG_DRM_AXERA) += axera-drm.o +diff --git a/drivers/gpu/drm/axera/ax_cdns_dsi.c b/drivers/gpu/drm/axera/ax_cdns_dsi.c +new file mode 100644 +index 000000000..6af4edfb4 +--- /dev/null ++++ b/drivers/gpu/drm/axera/ax_cdns_dsi.c +@@ -0,0 +1,1642 @@ ++/********************************************************************************** ++ * ++ * Copyright (c) 2019-2020 Beijing AXera Technology Co., Ltd. All Rights Reserved. ++ * ++ * This source file is the property of Beijing AXera Technology Co., Ltd. and ++ * may not be copied or distributed in any isomorphic form without the prior ++ * written consent of Beijing AXera Technology Co., Ltd. ++ * ++ **********************************************************************************/ ++ ++#include ++#include ++#include ++#include ++#include ++#include