From 47e0fcf59a76b083f312b2681766143aabb034c6 Mon Sep 17 00:00:00 2001 From: yaowenrui Date: Mon, 21 Aug 2023 10:59:18 +0800 Subject: [PATCH] =?UTF-8?q?LTS=205.10=20=E8=A1=A5=E4=B8=81=E5=8D=87?= =?UTF-8?q?=E7=BA=A7=E9=80=82=E9=85=8D?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: yaowenrui --- linux-5.10/rk3568_patch/kernel.patch | 86 +++++++++++++++------------- 1 file changed, 45 insertions(+), 41 deletions(-) diff --git a/linux-5.10/rk3568_patch/kernel.patch b/linux-5.10/rk3568_patch/kernel.patch index f9e1650..e4cc0fd 100644 --- a/linux-5.10/rk3568_patch/kernel.patch +++ b/linux-5.10/rk3568_patch/kernel.patch @@ -1240304,7 +1240304,7 @@ index 46ebdb146..df337765f 100644 dev_err(rphy->dev, "failed to register extcon device\n"); return ret; } -+ ++ + rphy->edev_self = true; } @@ -1240563,7 +1240563,7 @@ index 46ebdb146..df337765f 100644 schedule_delayed_work(&rport->sm_work, SCHEDULE_DELAY); } -@@ -459,22 +762,56 @@ static int rockchip_usb2phy_power_on(struct phy *phy) +@@ -459,24 +762,56 @@ static int rockchip_usb2phy_power_on(struct phy *phy) dev_dbg(&rport->phy->dev, "port power on\n"); @@ -1240591,10 +1240591,12 @@ index 46ebdb146..df337765f 100644 + goto unlock; ret = property_enable(base, &rport->port_cfg->phy_sus, false); - if (ret) + if (ret) { + clk_disable_unprepare(rphy->clk480m); - return ret; +- } + goto unlock; -+ + + /* + * For rk3588, it needs to reset phy when exit from + * suspend mode with common_on_n 1'b1(aka REFCLK_LOGIC, @@ -1240606,7 +1240608,6 @@ index 46ebdb146..df337765f 100644 + ret = rockchip_usb2phy_reset(rphy); + if (ret) + goto unlock; - /* waiting for the utmi_clk to become stable */ usleep_range(1500, 2000); @@ -1240625,7 +1240626,7 @@ index 46ebdb146..df337765f 100644 } static int rockchip_usb2phy_power_off(struct phy *phy) -@@ -486,42 +823,258 @@ static int rockchip_usb2phy_power_off(struct phy *phy) +@@ -488,42 +823,258 @@ static int rockchip_usb2phy_power_off(struct phy *phy) dev_dbg(&rport->phy->dev, "port power off\n"); @@ -1240894,7 +1240895,7 @@ index 46ebdb146..df337765f 100644 static void rockchip_usb2phy_otg_sm_work(struct work_struct *work) { struct rockchip_usb2phy_port *rport = -@@ -530,59 +1083,80 @@ static void rockchip_usb2phy_otg_sm_work(struct work_struct *work) +@@ -532,59 +1083,80 @@ static void rockchip_usb2phy_otg_sm_work(struct work_struct *work) struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent); static unsigned int cable; unsigned long delay; @@ -1240989,7 +1240990,7 @@ index 46ebdb146..df337765f 100644 break; default: break; -@@ -592,32 +1166,34 @@ static void rockchip_usb2phy_otg_sm_work(struct work_struct *work) +@@ -594,32 +1166,34 @@ static void rockchip_usb2phy_otg_sm_work(struct work_struct *work) break; } } else { @@ -1241042,7 +1241043,7 @@ index 46ebdb146..df337765f 100644 } sch_work = true; break; -@@ -625,15 +1201,47 @@ static void rockchip_usb2phy_otg_sm_work(struct work_struct *work) +@@ -627,15 +1201,47 @@ static void rockchip_usb2phy_otg_sm_work(struct work_struct *work) if (extcon_get_state(rphy->edev, EXTCON_USB_HOST) == 0) { dev_dbg(&rport->phy->dev, "usb otg host disconnect\n"); rport->state = OTG_STATE_B_IDLE; @@ -1241075,8 +1241076,7 @@ index 46ebdb146..df337765f 100644 + */ + extcon_set_state_sync(rphy->edev, cable, false); + cable = EXTCON_NONE; - } - ++ } + if (rphy->edev_self && + (extcon_get_state(rphy->edev, EXTCON_USB) != + rport->perip_connected)) { @@ -1241084,7 +1241084,8 @@ index 46ebdb146..df337765f 100644 + EXTCON_USB, + rport->perip_connected); + extcon_sync(rphy->edev, EXTCON_USB_HOST); -+ } + } + if (sch_work) schedule_delayed_work(&rport->otg_sm_work, delay); + @@ -1241092,7 +1241093,7 @@ index 46ebdb146..df337765f 100644 } static const char *chg_to_string(enum power_supply_type chg_type) -@@ -687,21 +1295,45 @@ static void rockchip_chg_detect_work(struct work_struct *work) +@@ -689,21 +1295,45 @@ static void rockchip_chg_detect_work(struct work_struct *work) container_of(work, struct rockchip_usb2phy_port, chg_work.work); struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent); struct regmap *base = get_reg_base(rphy); @@ -1241142,7 +1241143,7 @@ index 46ebdb146..df337765f 100644 delay = CHG_DCD_POLL_TIME; break; case USB_CHG_STATE_WAIT_FOR_DCD: -@@ -739,6 +1371,19 @@ static void rockchip_chg_detect_work(struct work_struct *work) +@@ -741,6 +1371,19 @@ static void rockchip_chg_detect_work(struct work_struct *work) rphy->chg_state = USB_CHG_STATE_DETECTED; delay = 0; } else { @@ -1241162,7 +1241163,7 @@ index 46ebdb146..df337765f 100644 rphy->chg_type = POWER_SUPPLY_TYPE_USB; rphy->chg_state = USB_CHG_STATE_DETECTED; delay = 0; -@@ -757,19 +1402,36 @@ static void rockchip_chg_detect_work(struct work_struct *work) +@@ -759,19 +1402,36 @@ static void rockchip_chg_detect_work(struct work_struct *work) fallthrough; case USB_CHG_STATE_SECONDARY_DONE: rphy->chg_state = USB_CHG_STATE_DETECTED; @@ -1241202,7 +1241203,7 @@ index 46ebdb146..df337765f 100644 schedule_delayed_work(&rport->chg_work, delay); } -@@ -791,30 +1453,43 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work) +@@ -793,30 +1453,43 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work) struct rockchip_usb2phy_port *rport = container_of(work, struct rockchip_usb2phy_port, sm_work.work); struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent); @@ -1241258,7 +1241259,7 @@ index 46ebdb146..df337765f 100644 switch (state) { case PHY_STATE_HS_ONLINE: -@@ -839,7 +1514,9 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work) +@@ -841,7 +1514,9 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work) case PHY_STATE_CONNECT: if (rport->suspended) { dev_dbg(&rport->phy->dev, "Connected\n"); @@ -1241268,7 +1241269,7 @@ index 46ebdb146..df337765f 100644 rport->suspended = false; } else { /* D+ line pull-up, D- line pull-down */ -@@ -849,7 +1526,9 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work) +@@ -851,7 +1526,9 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work) case PHY_STATE_DISCONNECT: if (!rport->suspended) { dev_dbg(&rport->phy->dev, "Disconnected\n"); @@ -1241278,7 +1241279,7 @@ index 46ebdb146..df337765f 100644 rport->suspended = true; } -@@ -857,8 +1536,7 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work) +@@ -859,8 +1536,7 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work) * activate the linestate detection to get the next device * plug-in irq. */ @@ -1241288,7 +1241289,7 @@ index 46ebdb146..df337765f 100644 /* * we don't need to rearm the delayed work when the phy port -@@ -867,7 +1545,7 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work) +@@ -869,7 +1545,7 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work) mutex_unlock(&rport->mutex); return; default: @@ -1241297,7 +1241298,7 @@ index 46ebdb146..df337765f 100644 break; } -@@ -884,11 +1562,12 @@ static irqreturn_t rockchip_usb2phy_linestate_irq(int irq, void *data) +@@ -886,11 +1562,12 @@ static irqreturn_t rockchip_usb2phy_linestate_irq(int irq, void *data) if (!property_enabled(rphy->grf, &rport->port_cfg->ls_det_st)) return IRQ_NONE; @@ -1241312,7 +1241313,7 @@ index 46ebdb146..df337765f 100644 mutex_unlock(&rport->mutex); -@@ -918,99 +1597,157 @@ static irqreturn_t rockchip_usb2phy_bvalid_irq(int irq, void *data) +@@ -920,99 +1597,157 @@ static irqreturn_t rockchip_usb2phy_bvalid_irq(int irq, void *data) mutex_unlock(&rport->mutex); @@ -1241528,7 +1241529,7 @@ index 46ebdb146..df337765f 100644 */ rport->otg_mux_irq = of_irq_get_byname(child_np, "otg-mux"); if (rport->otg_mux_irq > 0) { -@@ -1020,20 +1757,50 @@ static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy, +@@ -1022,20 +1757,50 @@ static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy, IRQF_ONESHOT, "rockchip_usb2phy_otg", rport); @@ -1241589,7 +1241590,7 @@ index 46ebdb146..df337765f 100644 NULL, rockchip_usb2phy_bvalid_irq, IRQF_ONESHOT, -@@ -1042,187 +1809,1023 @@ static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy, +@@ -1044,187 +1809,1025 @@ static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy, if (ret) { dev_err(rphy->dev, "failed to request otg-bvalid irq handle\n"); @@ -1241695,14 +1241696,14 @@ index 46ebdb146..df337765f 100644 - rphy->chg_state = USB_CHG_STATE_UNDEFINED; - rphy->chg_type = POWER_SUPPLY_TYPE_UNKNOWN; - platform_set_drvdata(pdev, rphy); -- -- ret = rockchip_usb2phy_extcon_register(rphy); + /* + * Let us put phy-port into suspend mode here for saving power + * consumption, and usb controller will resume it during probe + * time if needed. + */ + ret = property_enable(base, &rport->port_cfg->phy_sus, true); + + ret = rockchip_usb2phy_extcon_register(rphy); if (ret) return ret; + rport->suspended = true; @@ -1241734,6 +1241735,9 @@ index 46ebdb146..df337765f 100644 - rphy->clk = of_clk_get_by_name(np, "phyclk"); - if (!IS_ERR(rphy->clk)) { +- clk_prepare_enable(rphy->clk); +- } else { +- dev_info(&pdev->dev, "no phyclk specified\n"); + return NOTIFY_DONE; +} + @@ -1241948,9 +1241952,9 @@ index 46ebdb146..df337765f 100644 + + rphy->clk = of_clk_get_by_name(np, "phyclk"); + if (!IS_ERR(rphy->clk)) { - clk_prepare_enable(rphy->clk); - } else { - dev_info(&pdev->dev, "no phyclk specified\n"); ++ clk_prepare_enable(rphy->clk); ++ } else { ++ dev_info(&pdev->dev, "no phyclk specified\n"); rphy->clk = NULL; } @@ -1242728,7 +1242732,7 @@ index 46ebdb146..df337765f 100644 .cp_det = { 0x0884, 4, 4, 0, 1 }, .dcp_det = { 0x0884, 3, 3, 0, 1 }, .dp_det = { 0x0884, 5, 5, 0, 1 }, -@@ -1240,18 +2843,72 @@ static const struct rockchip_usb2phy_cfg rk3228_phy_cfgs[] = { +@@ -1242,18 +2845,72 @@ static const struct rockchip_usb2phy_cfg rk3228_phy_cfgs[] = { .clkout_ctl = { 0x0808, 4, 4, 1, 0 }, .port_cfgs = { [USB2PHY_PORT_OTG] = { @@ -1242806,7 +1242810,7 @@ index 46ebdb146..df337765f 100644 }, { /* sentinel */ } }; -@@ -1260,22 +2917,36 @@ static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = { +@@ -1262,22 +2919,36 @@ static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = { { .reg = 0x100, .num_ports = 2, @@ -1242828,7 +1242832,7 @@ index 46ebdb146..df337765f 100644 + .idfall_det_clr = { 0x0118, 5, 5, 0, 1 }, + .idrise_det_en = { 0x0110, 4, 4, 0, 1 }, + .idrise_det_st = { 0x0114, 4, 4, 0, 1 }, -+ .idrise_det_clr = { 0x0118, 4, 4, 0, 1 }, ++ .idrise_det_clr = { 0x0118, 4, 4, 0, 1 }, .ls_det_en = { 0x0110, 0, 0, 0, 1 }, .ls_det_st = { 0x0114, 0, 0, 0, 1 }, .ls_det_clr = { 0x0118, 0, 0, 0, 1 }, @@ -1242845,7 +1242849,7 @@ index 46ebdb146..df337765f 100644 .ls_det_en = { 0x110, 1, 1, 0, 1 }, .ls_det_st = { 0x114, 1, 1, 0, 1 }, .ls_det_clr = { 0x118, 1, 1, 0, 1 }, -@@ -1284,7 +2955,7 @@ static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = { +@@ -1286,7 +2957,7 @@ static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = { } }, .chg_det = { @@ -1242854,7 +1242858,7 @@ index 46ebdb146..df337765f 100644 .cp_det = { 0x0120, 24, 24, 0, 1 }, .dcp_det = { 0x0120, 23, 23, 0, 1 }, .dp_det = { 0x0120, 25, 25, 0, 1 }, -@@ -1303,10 +2974,11 @@ static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs[] = { +@@ -1305,10 +2976,11 @@ static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs[] = { { .reg = 0x700, .num_ports = 2, @@ -1242867,7 +1242871,7 @@ index 46ebdb146..df337765f 100644 .ls_det_en = { 0x0680, 4, 4, 0, 1 }, .ls_det_st = { 0x0690, 4, 4, 0, 1 }, .ls_det_clr = { 0x06a0, 4, 4, 0, 1 }, -@@ -1318,19 +2990,86 @@ static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs[] = { +@@ -1320,19 +2992,86 @@ static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs[] = { { /* sentinel */ } }; @@ -1242955,7 +1242959,7 @@ index 46ebdb146..df337765f 100644 }, [USB2PHY_PORT_HOST] = { .phy_sus = { 0xe458, 1, 0, 0x2, 0x1 }, -@@ -1342,7 +3081,7 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = { +@@ -1344,7 +3083,7 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = { } }, .chg_det = { @@ -1242964,7 +1242968,7 @@ index 46ebdb146..df337765f 100644 .cp_det = { 0xe2ac, 2, 2, 0, 1 }, .dcp_det = { 0xe2ac, 1, 1, 0, 1 }, .dp_det = { 0xe2ac, 0, 0, 0, 1 }, -@@ -1357,15 +3096,30 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = { +@@ -1359,15 +3098,30 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = { { .reg = 0xe460, .num_ports = 2, @@ -1242996,7 +1243000,7 @@ index 46ebdb146..df337765f 100644 }, [USB2PHY_PORT_HOST] = { .phy_sus = { 0xe468, 1, 0, 0x2, 0x1 }, -@@ -1376,6 +3130,246 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = { +@@ -1378,6 +3132,246 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = { .utmi_hstdet = { 0xe2ac, 27, 27, 0, 1 } } }, @@ -1243243,7 +1243247,7 @@ index 46ebdb146..df337765f 100644 }, { /* sentinel */ } }; -@@ -1407,7 +3401,7 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = { +@@ -1409,7 +3403,7 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = { } }, .chg_det = { @@ -1243252,7 +1243256,7 @@ index 46ebdb146..df337765f 100644 .cp_det = { 0x0804, 1, 1, 0, 1 }, .dcp_det = { 0x0804, 0, 0, 0, 1 }, .dp_det = { 0x0804, 2, 2, 0, 1 }, -@@ -1424,10 +3418,16 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = { +@@ -1426,10 +3420,16 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = { static const struct of_device_id rockchip_usb2phy_dt_match[] = { { .compatible = "rockchip,px30-usb2phy", .data = &rk3328_phy_cfgs }, @@ -1243269,7 +1243273,7 @@ index 46ebdb146..df337765f 100644 { .compatible = "rockchip,rv1108-usb2phy", .data = &rv1108_phy_cfgs }, {} }; -@@ -1437,6 +3437,7 @@ static struct platform_driver rockchip_usb2phy_driver = { +@@ -1439,6 +3439,7 @@ static struct platform_driver rockchip_usb2phy_driver = { .probe = rockchip_usb2phy_probe, .driver = { .name = "rockchip-usb2phy", -- Gitee