diff --git a/linux-6.6/rk3568_patch/kernel.patch b/linux-6.6/rk3568_patch/kernel.patch index 62863532d9554d8addb5803b4d56da46400f78b2..526c7e906326830633a88c7d582a8279886fee96 100644 --- a/linux-6.6/rk3568_patch/kernel.patch +++ b/linux-6.6/rk3568_patch/kernel.patch @@ -10449,7 +10449,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 /* These power domains are grouped by VD_GPU */ power-domain@RK3568_PD_GPU { reg = ; -@@ -578,70 +1082,647 @@ power-domain@RK3568_PD_RKVENC { +@@ -578,71 +1082,647 @@ power-domain@RK3568_PD_RKVENC { }; }; @@ -10696,7 +10696,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 + compatible = "rockchip,vpu-decoder-v2"; + reg = <0x0 0xfdea0400 0x0 0x400>; interrupts = ; -+ interrupt-names = "irq_dec"; + interrupt-names = "vdpu"; clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; - clock-names = "aclk", "hclk"; + clock-names = "aclk_vcodec", "hclk_vcodec"; @@ -11119,7 +11119,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 }; sdmmc2: mmc@fe000000 { -@@ -658,6 +1739,13 @@ sdmmc2: mmc@fe000000 { +@@ -659,6 +1739,13 @@ sdmmc2: mmc@fe000000 { status = "disabled"; }; @@ -11133,7 +11133,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 gmac1: ethernet@fe010000 { compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a"; reg = <0x0 0xfe010000 0x0 0x10000>; -@@ -667,11 +1755,13 @@ gmac1: ethernet@fe010000 { +@@ -668,11 +1755,13 @@ gmac1: ethernet@fe010000 { clocks = <&cru SCLK_GMAC1>, <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RX_TX>, <&cru CLK_MAC1_REFOUT>, <&cru ACLK_GMAC1>, <&cru PCLK_GMAC1>, @@ -11149,7 +11149,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 resets = <&cru SRST_A_GMAC1>; reset-names = "stmmaceth"; rockchip,grf = <&grf>; -@@ -706,12 +1796,16 @@ gmac1_mtl_tx_setup: tx-queues-config { +@@ -707,12 +1796,16 @@ gmac1_mtl_tx_setup: tx-queues-config { }; vop: vop@fe040000 { @@ -11168,7 +11168,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 iommus = <&vop_mmu>; power-domains = <&power RK3568_PD_VO>; rockchip,grf = <&grf>; -@@ -725,44 +1819,132 @@ vp0: port@0 { +@@ -726,44 +1819,132 @@ vp0: port@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; @@ -11307,7 +11307,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 status = "disabled"; ports { -@@ -771,26 +1953,38 @@ ports { +@@ -772,26 +1953,38 @@ ports { dsi0_in: port@0 { reg = <0>; @@ -11353,7 +11353,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 status = "disabled"; ports { -@@ -799,10 +1993,20 @@ ports { +@@ -800,10 +1993,20 @@ ports { dsi1_in: port@0 { reg = <0>; @@ -11377,7 +11377,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 }; }; }; -@@ -814,9 +2018,9 @@ hdmi: hdmi@fe0a0000 { +@@ -815,9 +2018,9 @@ hdmi: hdmi@fe0a0000 { clocks = <&cru PCLK_HDMI_HOST>, <&cru CLK_HDMI_SFR>, <&cru CLK_HDMI_CEC>, @@ -11390,7 +11390,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 pinctrl-names = "default"; pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>; power-domains = <&power RK3568_PD_VO>; -@@ -829,16 +2033,89 @@ ports { +@@ -830,16 +2033,89 @@ ports { #address-cells = <1>; #size-cells = <0>; @@ -11483,7 +11483,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 qos_gpu: qos@fe128000 { compatible = "rockchip,rk3568-qos", "syscon"; reg = <0x0 0xfe128000 0x0 0x20>; -@@ -959,12 +2236,112 @@ qos_vop_m1: qos@fe1a8100 { +@@ -960,12 +2236,112 @@ qos_vop_m1: qos@fe1a8100 { reg = <0x0 0xfe1a8100 0x0 0x20>; }; @@ -11598,7 +11598,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 interrupts = , , , -@@ -980,29 +2357,30 @@ pcie2x1: pcie@fe260000 { +@@ -981,29 +2357,30 @@ pcie2x1: pcie@fe260000 { device_type = "pci"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; @@ -11639,7 +11639,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 #address-cells = <0>; #interrupt-cells = <1>; interrupt-controller; -@@ -1011,7 +2389,7 @@ pcie_intc: legacy-interrupt-controller { +@@ -1012,7 +2389,7 @@ pcie_intc: legacy-interrupt-controller { }; }; @@ -11648,7 +11648,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xfe2b0000 0x0 0x4000>; interrupts = ; -@@ -1025,7 +2403,7 @@ sdmmc0: mmc@fe2b0000 { +@@ -1026,7 +2403,7 @@ sdmmc0: mmc@fe2b0000 { status = "disabled"; }; @@ -11657,7 +11657,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xfe2c0000 0x0 0x4000>; interrupts = ; -@@ -1045,37 +2423,162 @@ sfc: spi@fe300000 { +@@ -1046,37 +2423,162 @@ sfc: spi@fe300000 { interrupts = ; clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; clock-names = "clk_sfc", "hclk_sfc"; @@ -11828,7 +11828,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 #sound-dai-cells = <0>; status = "disabled"; }; -@@ -1084,15 +2587,13 @@ i2s1_8ch: i2s@fe410000 { +@@ -1085,15 +2587,13 @@ i2s1_8ch: i2s@fe410000 { compatible = "rockchip,rk3568-i2s-tdm"; reg = <0x0 0xfe410000 0x0 0x1000>; interrupts = ; @@ -11848,7 +11848,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 rockchip,grf = <&grf>; pinctrl-names = "default"; pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_sclkrx -@@ -1109,20 +2610,18 @@ i2s2_2ch: i2s@fe420000 { +@@ -1110,20 +2610,18 @@ i2s2_2ch: i2s@fe420000 { compatible = "rockchip,rk3568-i2s-tdm"; reg = <0x0 0xfe420000 0x0 0x1000>; interrupts = ; @@ -11859,7 +11859,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 dmas = <&dmac1 4>, <&dmac1 5>; dma-names = "tx", "rx"; - resets = <&cru SRST_M_I2S2_2CH>; -- reset-names = "m"; +- reset-names = "tx-m"; + rockchip,cru = <&cru>; rockchip,grf = <&grf>; + rockchip,trcm-sync-tx-only; @@ -11874,7 +11874,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 #sound-dai-cells = <0>; status = "disabled"; }; -@@ -1138,13 +2637,20 @@ i2s3_2ch: i2s@fe430000 { +@@ -1139,13 +2637,20 @@ i2s3_2ch: i2s@fe430000 { dma-names = "tx", "rx"; resets = <&cru SRST_M_I2S3_2CH_TX>, <&cru SRST_M_I2S3_2CH_RX>; reset-names = "tx-m", "rx-m"; @@ -11896,7 +11896,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 reg = <0x0 0xfe440000 0x0 0x1000>; interrupts = ; clocks = <&cru MCLK_PDM>, <&cru HCLK_PDM>; -@@ -1164,7 +2670,21 @@ &pdmm0_sdi2 +@@ -1165,7 +2670,21 @@ &pdmm0_sdi2 status = "disabled"; }; @@ -11919,7 +11919,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 compatible = "rockchip,rk3568-spdif"; reg = <0x0 0xfe460000 0x0 0x1000>; interrupts = ; -@@ -1178,6 +2698,34 @@ spdif: spdif@fe460000 { +@@ -1179,6 +2698,34 @@ spdif: spdif@fe460000 { status = "disabled"; }; @@ -11954,7 +11954,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 dmac0: dma-controller@fe530000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x0 0xfe530000 0x0 0x4000>; -@@ -1200,6 +2748,56 @@ dmac1: dma-controller@fe550000 { +@@ -1201,6 +2748,56 @@ dmac1: dma-controller@fe550000 { #dma-cells = <1>; }; @@ -12011,7 +12011,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 i2c1: i2c@fe5a0000 { compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; reg = <0x0 0xfe5a0000 0x0 0x1000>; -@@ -1265,6 +2863,14 @@ i2c5: i2c@fe5e0000 { +@@ -1266,6 +2863,14 @@ i2c5: i2c@fe5e0000 { status = "disabled"; }; @@ -12026,7 +12026,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 wdt: watchdog@fe600000 { compatible = "rockchip,rk3568-wdt", "snps,dw-wdt"; reg = <0x0 0xfe600000 0x0 0x100>; -@@ -1281,10 +2887,12 @@ spi0: spi@fe610000 { +@@ -1282,10 +2887,12 @@ spi0: spi@fe610000 { clock-names = "spiclk", "apb_pclk"; dmas = <&dmac0 20>, <&dmac0 21>; dma-names = "tx", "rx"; @@ -12040,7 +12040,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 status = "disabled"; }; -@@ -1296,10 +2904,12 @@ spi1: spi@fe620000 { +@@ -1297,10 +2904,12 @@ spi1: spi@fe620000 { clock-names = "spiclk", "apb_pclk"; dmas = <&dmac0 22>, <&dmac0 23>; dma-names = "tx", "rx"; @@ -12054,7 +12054,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 status = "disabled"; }; -@@ -1311,10 +2921,12 @@ spi2: spi@fe630000 { +@@ -1312,10 +2921,12 @@ spi2: spi@fe630000 { clock-names = "spiclk", "apb_pclk"; dmas = <&dmac0 24>, <&dmac0 25>; dma-names = "tx", "rx"; @@ -12068,7 +12068,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 status = "disabled"; }; -@@ -1326,10 +2938,12 @@ spi3: spi@fe640000 { +@@ -1327,10 +2938,12 @@ spi3: spi@fe640000 { clock-names = "spiclk", "apb_pclk"; dmas = <&dmac0 26>, <&dmac0 27>; dma-names = "tx", "rx"; @@ -12082,7 +12082,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 status = "disabled"; }; -@@ -1459,116 +3073,14 @@ uart9: serial@fe6d0000 { +@@ -1460,116 +3073,14 @@ uart9: serial@fe6d0000 { status = "disabled"; }; @@ -12201,7 +12201,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 #pwm-cells = <3>; status = "disabled"; }; -@@ -1576,10 +3088,11 @@ pwm4: pwm@fe6e0000 { +@@ -1577,10 +3088,11 @@ pwm4: pwm@fe6e0000 { pwm5: pwm@fe6e0010 { compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xfe6e0010 0x0 0x10>; @@ -12214,7 +12214,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 #pwm-cells = <3>; status = "disabled"; }; -@@ -1587,10 +3100,11 @@ pwm5: pwm@fe6e0010 { +@@ -1588,10 +3100,11 @@ pwm5: pwm@fe6e0010 { pwm6: pwm@fe6e0020 { compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xfe6e0020 0x0 0x10>; @@ -12227,7 +12227,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 #pwm-cells = <3>; status = "disabled"; }; -@@ -1598,10 +3112,12 @@ pwm6: pwm@fe6e0020 { +@@ -1599,10 +3112,12 @@ pwm6: pwm@fe6e0020 { pwm7: pwm@fe6e0030 { compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xfe6e0030 0x0 0x10>; @@ -12241,7 +12241,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 #pwm-cells = <3>; status = "disabled"; }; -@@ -1609,10 +3125,11 @@ pwm7: pwm@fe6e0030 { +@@ -1610,10 +3125,11 @@ pwm7: pwm@fe6e0030 { pwm8: pwm@fe6f0000 { compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xfe6f0000 0x0 0x10>; @@ -12254,7 +12254,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 #pwm-cells = <3>; status = "disabled"; }; -@@ -1623,7 +3140,7 @@ pwm9: pwm@fe6f0010 { +@@ -1624,7 +3140,7 @@ pwm9: pwm@fe6f0010 { clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; clock-names = "pwm", "pclk"; pinctrl-0 = <&pwm9m0_pins>; @@ -12263,7 +12263,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 #pwm-cells = <3>; status = "disabled"; }; -@@ -1631,10 +3148,11 @@ pwm9: pwm@fe6f0010 { +@@ -1632,10 +3148,11 @@ pwm9: pwm@fe6f0010 { pwm10: pwm@fe6f0020 { compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xfe6f0020 0x0 0x10>; @@ -12276,7 +12276,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 #pwm-cells = <3>; status = "disabled"; }; -@@ -1642,10 +3160,12 @@ pwm10: pwm@fe6f0020 { +@@ -1643,10 +3160,12 @@ pwm10: pwm@fe6f0020 { pwm11: pwm@fe6f0030 { compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xfe6f0030 0x0 0x10>; @@ -12290,7 +12290,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 #pwm-cells = <3>; status = "disabled"; }; -@@ -1653,10 +3173,11 @@ pwm11: pwm@fe6f0030 { +@@ -1654,10 +3173,11 @@ pwm11: pwm@fe6f0030 { pwm12: pwm@fe700000 { compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xfe700000 0x0 0x10>; @@ -12303,7 +12303,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 #pwm-cells = <3>; status = "disabled"; }; -@@ -1664,10 +3185,11 @@ pwm12: pwm@fe700000 { +@@ -1665,10 +3185,11 @@ pwm12: pwm@fe700000 { pwm13: pwm@fe700010 { compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xfe700010 0x0 0x10>; @@ -12316,7 +12316,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 #pwm-cells = <3>; status = "disabled"; }; -@@ -1675,10 +3197,11 @@ pwm13: pwm@fe700010 { +@@ -1676,10 +3197,11 @@ pwm13: pwm@fe700010 { pwm14: pwm@fe700020 { compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xfe700020 0x0 0x10>; @@ -12329,7 +12329,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 #pwm-cells = <3>; status = "disabled"; }; -@@ -1686,121 +3209,283 @@ pwm14: pwm@fe700020 { +@@ -1687,121 +3209,283 @@ pwm14: pwm@fe700020 { pwm15: pwm@fe700030 { compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xfe700030 0x0 0x10>; @@ -12652,7 +12652,7 @@ index b7e2b475f07077880672cf9999e9f8bc23b66dd0..51ca0fd2ab9f28e97ca77840fbb38371 #phy-cells = <0>; status = "disabled"; }; -@@ -1814,61 +3499,56 @@ pinctrl: pinctrl { +@@ -1815,61 +3499,56 @@ pinctrl: pinctrl { #size-cells = <2>; ranges; @@ -25393,10 +25393,10 @@ index 4aa516ff156dff37b21914c68de135f94ae83d65..c154a3a03f0ae89fb3a27d1762eb2a66 clocks = <&cru MCLK_I2S2_2CH>, <&cru HCLK_I2S2_2CH>; clock-names = "i2s_clk", "i2s_hclk"; assigned-clocks = <&cru CLK_I2S2_2CH_SRC>; -@@ -1543,11 +5799,12 @@ i2s2_2ch: i2s@fe490000 { +@@ -1542,11 +5798,12 @@ i2s2_2ch: i2s@fe490000 { + dmas = <&dmac1 0>, <&dmac1 1>; dma-names = "tx", "rx"; power-domains = <&power RK3588_PD_AUDIO>; - rockchip,trcm-sync-tx-only; - pinctrl-names = "default"; - pinctrl-0 = <&i2s2m1_lrck - &i2s2m1_sclk @@ -25410,7 +25410,7 @@ index 4aa516ff156dff37b21914c68de135f94ae83d65..c154a3a03f0ae89fb3a27d1762eb2a66 #sound-dai-cells = <0>; status = "disabled"; }; -@@ -1555,7 +5812,7 @@ &i2s2m1_sdi +@@ -1554,7 +5811,7 @@ &i2s2m1_sdi i2s3_2ch: i2s@fe4a0000 { compatible = "rockchip,rk3588-i2s", "rockchip,rk3066-i2s"; reg = <0x0 0xfe4a0000 0x0 0x1000>; @@ -25419,10 +25419,10 @@ index 4aa516ff156dff37b21914c68de135f94ae83d65..c154a3a03f0ae89fb3a27d1762eb2a66 clocks = <&cru MCLK_I2S3_2CH>, <&cru HCLK_I2S3_2CH>; clock-names = "i2s_clk", "i2s_hclk"; assigned-clocks = <&cru CLK_I2S3_2CH_SRC>; -@@ -1564,74 +5821,228 @@ i2s3_2ch: i2s@fe4a0000 { +@@ -1562,74 +5819,227 @@ i2s3_2ch: i2s@fe4a0000 { + dmas = <&dmac1 2>, <&dmac1 3>; dma-names = "tx", "rx"; power-domains = <&power RK3588_PD_AUDIO>; - rockchip,trcm-sync-tx-only; - pinctrl-names = "default"; - pinctrl-0 = <&i2s3_lrck - &i2s3_sclk @@ -25541,13 +25541,12 @@ index 4aa516ff156dff37b21914c68de135f94ae83d65..c154a3a03f0ae89fb3a27d1762eb2a66 #sound-dai-cells = <0>; status = "disabled"; }; - + hwlock: hwspinlock@fe5a0000 { + compatible = "rockchip,hwspinlock"; + reg = <0 0xfe5a0000 0 0x100>; + #hwlock-cells = <1>; + }; -+ + gic: interrupt-controller@fe600000 { compatible = "arm,gic-v3"; - reg = <0x0 0xfe600000 0 0x10000>, /* GICD */ @@ -25680,7 +25679,7 @@ index 4aa516ff156dff37b21914c68de135f94ae83d65..c154a3a03f0ae89fb3a27d1762eb2a66 }; i2c1: i2c@fea90000 { -@@ -1639,9 +6050,11 @@ i2c1: i2c@fea90000 { +@@ -1637,9 +6047,11 @@ i2c1: i2c@fea90000 { reg = <0x0 0xfea90000 0x0 0x1000>; clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>; clock-names = "i2c", "pclk"; @@ -25694,7 +25693,7 @@ index 4aa516ff156dff37b21914c68de135f94ae83d65..c154a3a03f0ae89fb3a27d1762eb2a66 #address-cells = <1>; #size-cells = <0>; status = "disabled"; -@@ -1652,9 +6065,11 @@ i2c2: i2c@feaa0000 { +@@ -1650,9 +6062,11 @@ i2c2: i2c@feaa0000 { reg = <0x0 0xfeaa0000 0x0 0x1000>; clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>; clock-names = "i2c", "pclk"; @@ -25708,7 +25707,7 @@ index 4aa516ff156dff37b21914c68de135f94ae83d65..c154a3a03f0ae89fb3a27d1762eb2a66 #address-cells = <1>; #size-cells = <0>; status = "disabled"; -@@ -1665,9 +6080,11 @@ i2c3: i2c@feab0000 { +@@ -1663,9 +6077,11 @@ i2c3: i2c@feab0000 { reg = <0x0 0xfeab0000 0x0 0x1000>; clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>; clock-names = "i2c", "pclk"; @@ -25722,7 +25721,7 @@ index 4aa516ff156dff37b21914c68de135f94ae83d65..c154a3a03f0ae89fb3a27d1762eb2a66 #address-cells = <1>; #size-cells = <0>; status = "disabled"; -@@ -1678,9 +6095,11 @@ i2c4: i2c@feac0000 { +@@ -1676,9 +6092,11 @@ i2c4: i2c@feac0000 { reg = <0x0 0xfeac0000 0x0 0x1000>; clocks = <&cru CLK_I2C4>, <&cru PCLK_I2C4>; clock-names = "i2c", "pclk"; @@ -25736,7 +25735,7 @@ index 4aa516ff156dff37b21914c68de135f94ae83d65..c154a3a03f0ae89fb3a27d1762eb2a66 #address-cells = <1>; #size-cells = <0>; status = "disabled"; -@@ -1691,385 +6110,394 @@ i2c5: i2c@fead0000 { +@@ -1689,385 +6107,394 @@ i2c5: i2c@fead0000 { reg = <0x0 0xfead0000 0x0 0x1000>; clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>; clock-names = "i2c", "pclk"; @@ -26249,7 +26248,7 @@ index 4aa516ff156dff37b21914c68de135f94ae83d65..c154a3a03f0ae89fb3a27d1762eb2a66 #io-channel-cells = <1>; clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>; clock-names = "saradc", "apb_pclk"; -@@ -2078,14 +6506,44 @@ saradc: adc@fec10000 { +@@ -2076,14 +6503,44 @@ saradc: adc@fec10000 { status = "disabled"; }; @@ -26296,7 +26295,7 @@ index 4aa516ff156dff37b21914c68de135f94ae83d65..c154a3a03f0ae89fb3a27d1762eb2a66 #address-cells = <1>; #size-cells = <0>; status = "disabled"; -@@ -2096,9 +6554,11 @@ i2c7: i2c@fec90000 { +@@ -2094,9 +6551,11 @@ i2c7: i2c@fec90000 { reg = <0x0 0xfec90000 0x0 0x1000>; clocks = <&cru CLK_I2C7>, <&cru PCLK_I2C7>; clock-names = "i2c", "pclk"; @@ -26310,7 +26309,7 @@ index 4aa516ff156dff37b21914c68de135f94ae83d65..c154a3a03f0ae89fb3a27d1762eb2a66 #address-cells = <1>; #size-cells = <0>; status = "disabled"; -@@ -2109,106 +6569,271 @@ i2c8: i2c@feca0000 { +@@ -2107,106 +6566,271 @@ i2c8: i2c@feca0000 { reg = <0x0 0xfeca0000 0x0 0x1000>; clocks = <&cru CLK_I2C8>, <&cru PCLK_I2C8>; clock-names = "i2c", "pclk"; @@ -26619,7 +26618,7 @@ index 4aa516ff156dff37b21914c68de135f94ae83d65..c154a3a03f0ae89fb3a27d1762eb2a66 rockchip,pipe-grf = <&php_grf>; rockchip,pipe-phy-grf = <&pipe_phy0_grf>; status = "disabled"; -@@ -2217,91 +6842,105 @@ combphy0_ps: phy@fee00000 { +@@ -2215,91 +6839,105 @@ combphy0_ps: phy@fee00000 { combphy2_psu: phy@fee20000 { compatible = "rockchip,rk3588-naneng-combphy"; reg = <0x0 0xfee20000 0x0 0x100>;