diff --git a/arch/arm/cortex-m3/keil/los_timer.c b/arch/arm/cortex-m3/keil/los_timer.c
index 5725418604633b5496a15f5d7e5990262a7b8de1..22105e228bb5a232e0feb140157220d738a409b8 100644
--- a/arch/arm/cortex-m3/keil/los_timer.c
+++ b/arch/arm/cortex-m3/keil/los_timer.c
@@ -86,7 +86,7 @@ STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
-    NVIC_ClearPendingIRQ(SysTick_IRQn);
+    SCB->ICSR |= SCB_ICSR_PENDSTCLR_Msk;
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
 
     return nextResponseTime;
diff --git a/arch/arm/cortex-m33/gcc/NTZ/los_timer.c b/arch/arm/cortex-m33/gcc/NTZ/los_timer.c
index 229e7a51b24126a1a1af40ec78d566e74a545f38..701dfad578882f32aadd3d73b61b20907b3c87b5 100644
--- a/arch/arm/cortex-m33/gcc/NTZ/los_timer.c
+++ b/arch/arm/cortex-m33/gcc/NTZ/los_timer.c
@@ -85,7 +85,7 @@ STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
-    NVIC_ClearPendingIRQ(SysTick_IRQn);
+    SCB->ICSR |= SCB_ICSR_PENDSTCLR_Msk;
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
     return nextResponseTime;
 }
diff --git a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_timer.c b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_timer.c
index 6081ceb3592aba97c86d2aac68d81deb19f2a432..aa153d85574a50c81dd7303c0fc9621026b3e022 100644
--- a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_timer.c
+++ b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_timer.c
@@ -84,7 +84,7 @@ STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
-    NVIC_ClearPendingIRQ(SysTick_IRQn);
+    SCB->ICSR |= SCB_ICSR_PENDSTCLR_Msk;
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
     return nextResponseTime;
 }
diff --git a/arch/arm/cortex-m33/iar/NTZ/los_timer.c b/arch/arm/cortex-m33/iar/NTZ/los_timer.c
index d3eb9b212893a5ecffa157c7c451a5cad5b87ba1..b8448c2be7dd7889c71b9e6fb5f8a942dc1fbda7 100644
--- a/arch/arm/cortex-m33/iar/NTZ/los_timer.c
+++ b/arch/arm/cortex-m33/iar/NTZ/los_timer.c
@@ -84,7 +84,7 @@ STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
-    NVIC_ClearPendingIRQ(SysTick_IRQn);
+    SCB->ICSR |= SCB_ICSR_PENDSTCLR_Msk;
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
     return nextResponseTime;
 }
diff --git a/arch/arm/cortex-m33/iar/TZ/non_secure/los_timer.c b/arch/arm/cortex-m33/iar/TZ/non_secure/los_timer.c
index 361ac0869ec166110b938b602b0a8b76eb0d749d..ef108339cc5f6e51e706e3c0a54cb00650361a27 100644
--- a/arch/arm/cortex-m33/iar/TZ/non_secure/los_timer.c
+++ b/arch/arm/cortex-m33/iar/TZ/non_secure/los_timer.c
@@ -85,7 +85,7 @@ STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
-    NVIC_ClearPendingIRQ(SysTick_IRQn);
+    SCB->ICSR |= SCB_ICSR_PENDSTCLR_Msk;
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
     return nextResponseTime;
 }
diff --git a/arch/arm/cortex-m4/gcc/los_timer.c b/arch/arm/cortex-m4/gcc/los_timer.c
index 45ae62c5128c30ebc3fb335691ddad6f9c73ea65..f60ec28e81c969936a31de9a747ed35736ebc345 100644
--- a/arch/arm/cortex-m4/gcc/los_timer.c
+++ b/arch/arm/cortex-m4/gcc/los_timer.c
@@ -84,7 +84,7 @@ STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
-    NVIC_ClearPendingIRQ(SysTick_IRQn);
+    SCB->ICSR |= SCB_ICSR_PENDSTCLR_Msk;
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
     return nextResponseTime;
 }
diff --git a/arch/arm/cortex-m4/iar/los_timer.c b/arch/arm/cortex-m4/iar/los_timer.c
index 99721b87f43ccadee0d2986de15c7b5c8e3f7682..6e1a5598ae2714a1b66d69da55f3acb226c4991c 100644
--- a/arch/arm/cortex-m4/iar/los_timer.c
+++ b/arch/arm/cortex-m4/iar/los_timer.c
@@ -84,7 +84,7 @@ STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
-    NVIC_ClearPendingIRQ(SysTick_IRQn);
+    SCB->ICSR |= SCB_ICSR_PENDSTCLR_Msk;
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
     return nextResponseTime;
 }
diff --git a/arch/arm/cortex-m55/gcc/NTZ/los_timer.c b/arch/arm/cortex-m55/gcc/NTZ/los_timer.c
index b284544d7f34defdf8a63aab4bdbdb6606038b05..88abd259c10a0009e9e62f2b70ff49fb2bd35be2 100644
--- a/arch/arm/cortex-m55/gcc/NTZ/los_timer.c
+++ b/arch/arm/cortex-m55/gcc/NTZ/los_timer.c
@@ -84,7 +84,7 @@ STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
-    NVIC_ClearPendingIRQ(SysTick_IRQn);
+    SCB->ICSR |= SCB_ICSR_PENDSTCLR_Msk;
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
     return nextResponseTime;
 }
diff --git a/arch/arm/cortex-m55/gcc/TZ/non_secure/los_timer.c b/arch/arm/cortex-m55/gcc/TZ/non_secure/los_timer.c
index 6081ceb3592aba97c86d2aac68d81deb19f2a432..aa153d85574a50c81dd7303c0fc9621026b3e022 100644
--- a/arch/arm/cortex-m55/gcc/TZ/non_secure/los_timer.c
+++ b/arch/arm/cortex-m55/gcc/TZ/non_secure/los_timer.c
@@ -84,7 +84,7 @@ STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
-    NVIC_ClearPendingIRQ(SysTick_IRQn);
+    SCB->ICSR |= SCB_ICSR_PENDSTCLR_Msk;
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
     return nextResponseTime;
 }
diff --git a/arch/arm/cortex-m55/iar/NTZ/los_timer.c b/arch/arm/cortex-m55/iar/NTZ/los_timer.c
index d3eb9b212893a5ecffa157c7c451a5cad5b87ba1..b8448c2be7dd7889c71b9e6fb5f8a942dc1fbda7 100644
--- a/arch/arm/cortex-m55/iar/NTZ/los_timer.c
+++ b/arch/arm/cortex-m55/iar/NTZ/los_timer.c
@@ -84,7 +84,7 @@ STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
-    NVIC_ClearPendingIRQ(SysTick_IRQn);
+    SCB->ICSR |= SCB_ICSR_PENDSTCLR_Msk;
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
     return nextResponseTime;
 }
diff --git a/arch/arm/cortex-m55/iar/TZ/non_secure/los_timer.c b/arch/arm/cortex-m55/iar/TZ/non_secure/los_timer.c
index 361ac0869ec166110b938b602b0a8b76eb0d749d..ef108339cc5f6e51e706e3c0a54cb00650361a27 100644
--- a/arch/arm/cortex-m55/iar/TZ/non_secure/los_timer.c
+++ b/arch/arm/cortex-m55/iar/TZ/non_secure/los_timer.c
@@ -85,7 +85,7 @@ STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
-    NVIC_ClearPendingIRQ(SysTick_IRQn);
+    SCB->ICSR |= SCB_ICSR_PENDSTCLR_Msk;
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
     return nextResponseTime;
 }
diff --git a/arch/arm/cortex-m7/gcc/los_timer.c b/arch/arm/cortex-m7/gcc/los_timer.c
index 99721b87f43ccadee0d2986de15c7b5c8e3f7682..6e1a5598ae2714a1b66d69da55f3acb226c4991c 100644
--- a/arch/arm/cortex-m7/gcc/los_timer.c
+++ b/arch/arm/cortex-m7/gcc/los_timer.c
@@ -84,7 +84,7 @@ STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
-    NVIC_ClearPendingIRQ(SysTick_IRQn);
+    SCB->ICSR |= SCB_ICSR_PENDSTCLR_Msk;
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
     return nextResponseTime;
 }
diff --git a/arch/arm/cortex-m7/iar/los_timer.c b/arch/arm/cortex-m7/iar/los_timer.c
index 99721b87f43ccadee0d2986de15c7b5c8e3f7682..6e1a5598ae2714a1b66d69da55f3acb226c4991c 100644
--- a/arch/arm/cortex-m7/iar/los_timer.c
+++ b/arch/arm/cortex-m7/iar/los_timer.c
@@ -84,7 +84,7 @@ STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
-    NVIC_ClearPendingIRQ(SysTick_IRQn);
+    SCB->ICSR |= SCB_ICSR_PENDSTCLR_Msk;
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
     return nextResponseTime;
 }