# ddr4-ex

**Repository Path**: shanxizeng/ddr4-ex

## Basic Information

- **Project Name**: ddr4-ex
- **Description**: No description available
- **Primary Language**: Unknown
- **License**: Not specified
- **Default Branch**: master
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 1
- **Forks**: 1
- **Created**: 2024-12-02
- **Last Updated**: 2024-12-13

## Categories & Tags

**Categories**: Uncategorized

**Tags**: None

## README

## DDR4 IP EXAMPLE CODE FOR COMMANDLINE XSIM

### Struct

`./imports/example_top.sv` : Top module to be simulated. IO : ddr4 signals

`./imports/ddr4_v2_2_axi_tg_top.sv` : Test generator for ddr4_ex module. Handles ddr4_ex with AXI. 
Use IO from boot_mode_start to prbs_mode_seed to control.

`./imports/ddr4_v2_2_custom_mode_gen.sv` : Generate custom high level instructions.

### Env

use Vivado 24.01.

To enable 24.01 in the pku-dasys, use `source /opt/Xilinx/Vivado/2024.01/setting64.sh`

### Compile

run command: 

```
cd xsim
./compile.sh
```

### Elaborate

run command: 

```
cd xsim
./elaborate.sh
```

### Run Sim

run command: 

```
cd xsim
./simulate.sh
```