diff --git a/23e51ef7a8e8e4ba42208936e0a6a25901f58c65.patch b/23e51ef7a8e8e4ba42208936e0a6a25901f58c65.patch new file mode 100644 index 0000000000000000000000000000000000000000..cb782cada4696c50d19df0869ffe31e97ae3388a --- /dev/null +++ b/23e51ef7a8e8e4ba42208936e0a6a25901f58c65.patch @@ -0,0 +1,22 @@ +From 23e51ef7a8e8e4ba42208936e0a6a25901f58c65 Mon Sep 17 00:00:00 2001 +From: Martin Whitaker +Date: Sat, 31 Dec 2022 16:51:28 +0000 +Subject: [PATCH] Fix compilation with -Werror=format-security. + +--- + pform_package.cc | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/pform_package.cc b/pform_package.cc +index 856f8c103..3006ab58e 100644 +--- a/pform_package.cc ++++ b/pform_package.cc +@@ -62,7 +62,7 @@ void pform_end_package_declaration(const struct vlltype&loc) + ostringstream msg; + msg << "error: Package " << use_name << " was already declared here: " + << test->second->get_fileline() << ends; +- VLerror(loc, msg.str().c_str()); ++ VLerror(loc, "%s", msg.str().c_str()); + } + + diff --git a/iverilog-12_0.tar.gz b/iverilog-12_0.tar.gz new file mode 100644 index 0000000000000000000000000000000000000000..cd1eb584be35ff426cea8de0607bc0e8b48aabc2 Binary files /dev/null and b/iverilog-12_0.tar.gz differ diff --git a/iverilog.spec b/iverilog.spec new file mode 100644 index 0000000000000000000000000000000000000000..b0fcac4946d4fdaf1c1a0eb8cb4d067ddf2a178c --- /dev/null +++ b/iverilog.spec @@ -0,0 +1,78 @@ +Name: iverilog +Version: 12.0 +%define uver 12_0 +Release: 2%{?dist} +Summary: Icarus Verilog is a verilog compiler and simulator +License: GPLv2 +URL: https://github.com/steveicarus/iverilog +Source0: https://github.com/steveicarus/iverilog/archive/%{name}-%{uver}.tar.gz + +# [PATCH] Fix compilation with -Werror=format-security +Patch1: 23e51ef7a8e8e4ba42208936e0a6a25901f58c65.patch + +BuildRequires: autoconf +BuildRequires: bzip2-devel +BuildRequires: bison +BuildRequires: flex +BuildRequires: gperf +BuildRequires: gcc-c++ +BuildRequires: readline-devel +BuildRequires: zlib-devel +BuildRequires: make + + +%description +Icarus Verilog is a Verilog compiler that generates a variety of +engineering formats, including simulation. It strives to be true +to the IEEE-1364 standard. + +%prep +%autosetup -n %{name}-%{uver} +# Clean junks from tarball +find . -type f -name ".git" -exec rm '{}' \; +rm -rf `find . -type d -name "autom4te.cache" -exec echo '{}' \;` + +%build +chmod +x autoconf.sh +sh autoconf.sh +export CPPFLAGS="$CPPFLAGS -fcommon" +%configure + +# use make, avoid use V=1 due https://github.com/steveicarus/iverilog/issues/262 +make %{?_smp_mflags} + + +%install +%{__make} prefix=%{buildroot}%{_prefix} \ + bindir=%{buildroot}%{_bindir} \ + libdir=%{buildroot}%{_libdir} \ + libdir64=%{buildroot}%{_libdir} \ + includedir=%{buildroot}%{_includedir} \ + mandir=%{buildroot}%{_mandir} \ + vpidir=%{buildroot}%{_libdir}/ivl/ \ + INSTALL="install -p" \ +install + +%check +make check + + +%files +%doc BUGS.txt QUICK_START.txt +%doc ieee1364-notes.txt mingw.txt swift.txt netlist.txt +%doc t-dll.txt vpi.txt cadpli/cadpli.txt +%doc xilinx-hint.txt examples/ +%doc va_math.txt tgt-fpga/fpga.txt extensions.txt glossary.txt attributes.txt +%license COPYING +%{_bindir}/* +%{_libdir}/ivl +%{_mandir}/man1/* +# headers for PLI: This is intended to be used by the user. +%{_includedir}/*.h +# RHBZ 480531 +%{_libdir}/*.a + + +%changelog +* Thu Jun 20 2024 liping <1477412247@qq.com> - 12.0-2 +- Package init diff --git a/iverilog.yaml b/iverilog.yaml new file mode 100644 index 0000000000000000000000000000000000000000..51bd32b35b39fb5bb1619e8e7a42ff537d422fe0 --- /dev/null +++ b/iverilog.yaml @@ -0,0 +1,5 @@ +version_control: github +src_repo: +tag_prefix: +separator: +url: https://github.com/steveicarus/iverilog