diff --git a/pinentry-1.1.1-sw.patch b/pinentry-1.1.1-sw.patch
new file mode 100644
index 0000000000000000000000000000000000000000..8347a8fc69d1f420eb2d9b31a66f363f454193bd
--- /dev/null
+++ b/pinentry-1.1.1-sw.patch
@@ -0,0 +1,56 @@
+diff -Naur pinentry-1.1.1.org/aclocal.m4 pinentry-1.1.1.sw/aclocal.m4
+--- pinentry-1.1.1.org/aclocal.m4	2022-03-01 06:42:43.350000000 +0000
++++ pinentry-1.1.1.sw/aclocal.m4	2022-03-01 06:46:57.150000000 +0000
+@@ -118,6 +118,12 @@
+          gl_cv_host_cpu_c_abi=alpha
+          ;;
+ 
++changequote(,)dnl
++       sw_64* )
++changequote([,])dnl
++         gl_cv_host_cpu_c_abi=sw_64
++         ;;
++
+        arm* | aarch64 )
+          # Assume arm with EABI.
+          # On arm64 systems, the C compiler may be generating code in one of
+@@ -380,6 +386,9 @@
+ #ifndef __alpha__
+ #undef __alpha__
+ #endif
++#ifndef __sw_64__
++#undef __sw_64__
++#endif
+ #ifndef __arm__
+ #undef __arm__
+ #endif
+@@ -490,7 +499,7 @@
+        case "$gl_cv_host_cpu_c_abi" in
+          i386 | x86_64-x32 | arm | armhf | arm64-ilp32 | hppa | ia64-ilp32 | mips | mipsn32 | powerpc | riscv*-ilp32* | s390 | sparc)
+            gl_cv_host_cpu_c_abi_32bit=yes ;;
+-         x86_64 | alpha | arm64 | hppa64 | ia64 | mips64 | powerpc64 | powerpc64-elfv2 | riscv*-lp64* | s390x | sparc64 )
++         x86_64 | alpha | sw_64 | arm64 | hppa64 | ia64 | mips64 | powerpc64 | powerpc64-elfv2 | riscv*-lp64* | s390x | sparc64 )
+            gl_cv_host_cpu_c_abi_32bit=no ;;
+          *)
+            gl_cv_host_cpu_c_abi_32bit=unknown ;;
+diff -Naur pinentry-1.1.1.org/configure pinentry-1.1.1.sw/configure
+--- pinentry-1.1.1.org/configure	2022-03-01 06:42:43.360000000 +0000
++++ pinentry-1.1.1.sw/configure	2022-03-01 06:48:41.690000000 +0000
+@@ -8868,7 +8868,7 @@
+        case "$gl_cv_host_cpu_c_abi" in
+          i386 | x86_64-x32 | arm | armhf | arm64-ilp32 | hppa | ia64-ilp32 | mips | mipsn32 | powerpc | riscv*-ilp32* | s390 | sparc)
+            gl_cv_host_cpu_c_abi_32bit=yes ;;
+-         x86_64 | alpha | arm64 | hppa64 | ia64 | mips64 | powerpc64 | powerpc64-elfv2 | riscv*-lp64* | s390x | sparc64 )
++         x86_64 | alpha | sw_64 | arm64 | hppa64 | ia64 | mips64 | powerpc64 | powerpc64-elfv2 | riscv*-lp64* | s390x | sparc64 )
+            gl_cv_host_cpu_c_abi_32bit=no ;;
+          *)
+            gl_cv_host_cpu_c_abi_32bit=unknown ;;
+@@ -8897,7 +8897,7 @@
+            ;;
+ 
+          # CPUs that only support a 64-bit ABI.
+-         alpha | alphaev[4-8] | alphaev56 | alphapca5[67] | alphaev6[78] \
++         sw_64 | alpha | alphaev[4-8] | alphaev56 | alphapca5[67] | alphaev6[78] \
+          | mmix )
+            gl_cv_host_cpu_c_abi_32bit=no
+            ;;
diff --git a/pinentry.spec b/pinentry.spec
index c7a9f60c99f99764277dd763f035c797dd6f2608..4b57c00f1dcbdc17dc21c06a43327e1e7a959e0b 100644
--- a/pinentry.spec
+++ b/pinentry.spec
@@ -1,6 +1,6 @@
 Name:           pinentry
 Version:        1.1.1
-Release:        3
+Release:        4
 Summary:        A new module that contains various interfaces to enter a PIN/passphrase.
 
 License:        GPLv2+
@@ -12,6 +12,7 @@ Source1:        pinentry-wrapper
 Source2:        https://www.gnupg.org/ftp/gcrypt/pinentry/%{name}-%{version}.tar.bz2.sig
 
 Patch1:         Update-also-generated-configure-to-disable-rpath.patch
+Patch2:		pinentry-1.1.1-sw.patch
 
 BuildRequires:  pkgconfig(Qt5Widgets) libcap-devel ncurses-devel libassuan-devel
 BuildRequires:  libgpg-error-devel libsecret-devel pkgconfig(Qt5Core) gcc
@@ -92,6 +93,9 @@ fi
 %doc ChangeLog NEWS TODO
 
 %changelog
+* Fri Dec 23 2022 zhangzhixin <zhixin.zhang@i-soft.com.cn> - 1.1.1-4
+- Add sw arch patch
+
 * Sat Oct 22 zhangruifang <zhangruifang1@h-partners.com> - 1.1.1-3
 - add version number for Obsoletes