diff --git a/Add-LOONGARCH64-Linux-support.patch b/Add-LOONGARCH64-Linux-support.patch index 3b1ed0e3667b762f833392af7fcef87fd70aa8b9..9c30267b22c5e137c00e6ffb6c4e26e482d4f209 100644 --- a/Add-LOONGARCH64-Linux-support.patch +++ b/Add-LOONGARCH64-Linux-support.patch @@ -1,48 +1,44 @@ -From 47cc7deb0bd4e625791d2db9246152466595aabd Mon Sep 17 00:00:00 2001 -From: Feiyang Chen -Date: Fri, 16 Dec 2022 09:22:08 +0800 -Subject: [PATCH] Add LOONGARCH64/Linux support +From 957c59b751202c6235da4c00389dce67fd5730e8 Mon Sep 17 00:00:00 2001 +From: Binbin Zhou +Date: Thu, 19 May 2022 10:18:14 +0800 +Subject: [PATCH] Add LoongArch64 Linux support --- Makefile.all.am | 7 + - Makefile.in | 52 +- + Makefile.in | 9 +- Makefile.tool.am | 12 + Makefile.vex.am | 14 +- - Makefile.vex.in | 215 +- + Makefile.vex.in | 199 +- README | 1 + + README.loongarch64 | 51 + VEX/auxprogs/genoffsets.c | 36 + - VEX/priv/guest_loongarch64_defs.h | 130 + - VEX/priv/guest_loongarch64_helpers.c | 870 + - VEX/priv/guest_loongarch64_toIR.c | 9694 +++ - VEX/priv/host_loongarch64_defs.c | 3015 + - VEX/priv/host_loongarch64_defs.h | 685 + - VEX/priv/host_loongarch64_isel.c | 2782 + - VEX/priv/ir_defs.c | 35 +- + VEX/priv/guest_loongarch64_defs.h | 131 + + VEX/priv/guest_loongarch64_helpers.c | 905 + + VEX/priv/guest_loongarch64_toIR.c | 12086 ++++ + VEX/priv/host_loongarch64_defs.c | 3929 ++ + VEX/priv/host_loongarch64_defs.h | 919 + + VEX/priv/host_loongarch64_isel.c | 3748 ++ + VEX/priv/ir_defs.c | 55 +- VEX/priv/main_main.c | 109 + VEX/pub/libvex.h | 22 + VEX/pub/libvex_basictypes.h | 4 + - VEX/pub/libvex_guest_loongarch64.h | 171 + + VEX/pub/libvex_guest_loongarch64.h | 172 + VEX/pub/libvex_guest_offsets.h | 33 + - VEX/pub/libvex_ir.h | 28 +- + VEX/pub/libvex_ir.h | 36 +- VEX/pub/libvex_trc_values.h | 1 + - aclocal.m4 | 83 +- - auxprogs/Makefile.in | 18 +- - cachegrind/Makefile.in | 30 +- + auxprogs/Makefile.in | 7 + + cachegrind/Makefile.in | 19 + cachegrind/cg_arch.c | 7 + cachegrind/cg_branchpred.c | 2 +- - cachegrind/tests/Makefile.in | 18 +- - cachegrind/tests/x86/Makefile.in | 18 +- - callgrind/Makefile.in | 30 +- - callgrind/tests/Makefile.in | 18 +- - compile | 6 +- - config.guess | 1440 +- - config.h | 17 +- - config.h.in | 13 +- - config.sub | 708 +- - configure | 8828 +-- + cachegrind/tests/Makefile.in | 7 + + cachegrind/tests/x86/Makefile.in | 7 + + callgrind/Makefile.in | 19 + + callgrind/tests/Makefile.in | 7 + + config.h | 2 +- + configure | 56 +- configure.ac | 28 +- - coregrind/Makefile.am | 12 +- - coregrind/Makefile.in | 265 +- + coregrind/Makefile.am | 15 +- + coregrind/Makefile.in | 252 +- coregrind/launcher-linux.c | 11 +- coregrind/m_aspacemgr/aspacemgr-common.c | 9 +- coregrind/m_aspacemgr/aspacemgr-linux.c | 3 +- @@ -52,22 +48,25 @@ Subject: [PATCH] Add LOONGARCH64/Linux support coregrind/m_debuginfo/debuginfo.c | 30 +- coregrind/m_debuginfo/priv_storage.h | 19 +- coregrind/m_debuginfo/readdwarf.c | 47 +- - coregrind/m_debuginfo/readelf.c | 4 +- + coregrind/m_debuginfo/readelf.c | 6 +- coregrind/m_debuginfo/storage.c | 9 + coregrind/m_debuglog.c | 35 + .../m_dispatch/dispatch-loongarch64-linux.S | 314 + .../loongarch-base64-valgrind-s1.xml | 45 + .../loongarch-base64-valgrind-s2.xml | 45 + coregrind/m_gdbserver/loongarch-base64.xml | 45 + - .../loongarch64-linux-valgrind.xml | 15 + - coregrind/m_gdbserver/loongarch64-linux.xml | 13 + + .../loongarch-fpu64-valgrind-s1.xml | 57 + + .../loongarch-fpu64-valgrind-s2.xml | 57 + + coregrind/m_gdbserver/loongarch-fpu64.xml | 57 + + .../loongarch64-linux-valgrind.xml | 18 + + coregrind/m_gdbserver/loongarch64-linux.xml | 14 + coregrind/m_gdbserver/target.c | 2 + - .../m_gdbserver/valgrind-low-loongarch64.c | 195 + + .../m_gdbserver/valgrind-low-loongarch64.c | 272 + coregrind/m_gdbserver/valgrind_low.h | 1 + coregrind/m_initimg/initimg-linux.c | 17 +- coregrind/m_libcassert.c | 20 + - coregrind/m_libcfile.c | 48 +- - coregrind/m_libcproc.c | 12 +- + coregrind/m_libcfile.c | 63 +- + coregrind/m_libcproc.c | 11 +- coregrind/m_libcsetjmp.c | 66 + coregrind/m_machine.c | 194 +- coregrind/m_main.c | 37 +- @@ -75,7 +74,7 @@ Subject: [PATCH] Add LOONGARCH64/Linux support coregrind/m_redir.c | 17 + coregrind/m_scheduler/scheduler.c | 8 + .../m_sigframe/sigframe-loongarch64-linux.c | 285 + - coregrind/m_signals.c | 76 +- + coregrind/m_signals.c | 75 +- coregrind/m_stacktrace.c | 94 + coregrind/m_syscall.c | 32 + coregrind/m_syswrap/priv_syswrap-linux.h | 7 + @@ -84,7 +83,7 @@ Subject: [PATCH] Add LOONGARCH64/Linux support coregrind/m_syswrap/syswrap-generic.c | 2 +- coregrind/m_syswrap/syswrap-linux.c | 36 +- .../m_syswrap/syswrap-loongarch64-linux.c | 644 + - coregrind/m_syswrap/syswrap-main.c | 86 +- + coregrind/m_syswrap/syswrap-main.c | 93 +- coregrind/m_trampoline.S | 48 + coregrind/m_translate.c | 5 + coregrind/m_vki.c | 6 +- @@ -98,134 +97,108 @@ Subject: [PATCH] Add LOONGARCH64/Linux support coregrind/pub_core_trampoline.h | 6 + coregrind/pub_core_transtab.h | 3 +- coregrind/pub_core_transtab_asm.h | 2 +- - coregrind/vgdb-invoker-ptrace.c | 31 +- - depcomp | 2 +- - dhat/Makefile.in | 30 +- - dhat/tests/Makefile.in | 18 +- - docs/Makefile.in | 9 +- - docs/callgrind_annotate.1 | 4 +- - docs/callgrind_control.1 | 4 +- - docs/cg_annotate.1 | 4 +- - docs/cg_diff.1 | 4 +- - docs/cg_merge.1 | 4 +- - docs/html/FAQ.html | 2 +- - docs/html/QuickStart.html | 2 +- - docs/html/dh-manual.html | 28 +- - docs/html/dist.html | 2 +- - docs/html/dist.readme.html | 1 + - docs/html/faq.html | 4 +- - docs/html/index.html | 2 +- - docs/html/manual.html | 10 +- - docs/html/tech-docs.html | 2 +- - docs/ms_print.1 | 4 +- - docs/valgrind-di-server.1 | 4 +- - docs/valgrind-listener.1 | 4 +- - docs/valgrind.1 | 4 +- - docs/vgdb.1 | 4 +- - drd/Makefile.in | 30 +- + coregrind/vgdb-invoker-ptrace.c | 19 +- + dhat/Makefile.in | 19 + + dhat/tests/Makefile.in | 7 + + drd/Makefile.in | 19 + drd/drd_bitmap.h | 2 +- drd/drd_load_store.c | 4 + - drd/tests/Makefile.in | 18 +- + drd/tests/Makefile.in | 7 + drd/tests/pth_barrier_thr_cr.supp | 11 + - exp-bbv/Makefile.in | 30 +- - exp-bbv/tests/Makefile.in | 18 +- - exp-bbv/tests/amd64-linux/Makefile.in | 18 +- - exp-bbv/tests/arm-linux/Makefile.in | 18 +- - exp-bbv/tests/ppc32-linux/Makefile.in | 18 +- - exp-bbv/tests/x86-linux/Makefile.in | 18 +- - exp-bbv/tests/x86/Makefile.in | 18 +- + exp-bbv/Makefile.in | 19 + + exp-bbv/tests/Makefile.in | 7 + + exp-bbv/tests/amd64-linux/Makefile.in | 7 + + exp-bbv/tests/arm-linux/Makefile.in | 7 + + exp-bbv/tests/ppc32-linux/Makefile.in | 7 + + exp-bbv/tests/x86-linux/Makefile.in | 7 + + exp-bbv/tests/x86/Makefile.in | 7 + gdbserver_tests/Makefile.am | 1 + - gdbserver_tests/Makefile.in | 19 +- + gdbserver_tests/Makefile.in | 8 + gdbserver_tests/filter_helgrind_monitor | 2 + .../filter_helgrind_monitor_loongarch64 | 43 + - gdbserver_tests/solaris/Makefile.in | 16 +- - helgrind/Makefile.in | 30 +- + gdbserver_tests/solaris/Makefile.in | 7 + + helgrind/Makefile.in | 19 + helgrind/hg_main.c | 1 + - helgrind/tests/Makefile.am | 7 +- - helgrind/tests/Makefile.in | 25 +- + helgrind/tests/Makefile.in | 7 + helgrind/tests/annotate_hbefore.c | 30 + - helgrind/tests/supported_pthread_tunable | 17 + helgrind/tests/tc07_hbl1.c | 17 + helgrind/tests/tc08_hbl2.c | 17 + helgrind/tests/tc11_XCHG.c | 18 + - helgrind/tests/tls_threads.vgtest | 1 + - helgrind/tests/tls_threads_tunable.stderr.exp | 2 + - helgrind/tests/tls_threads_tunable.stdout.exp | 0 - helgrind/tests/tls_threads_tunable.vgtest | 4 + include/Makefile.am | 3 + - include/Makefile.in | 14 +- + include/Makefile.in | 3 + include/pub_tool_basics.h | 6 +- include/pub_tool_guest.h | 3 + include/pub_tool_libcsetjmp.h | 8 + include/pub_tool_machine.h | 6 + include/pub_tool_redir.h | 2 + include/pub_tool_vkiscnums_asm.h | 4 + - include/valgrind.h | 526 +- - include/vgversion_dist.h | 2 +- + include/valgrind.h | 525 +- + include/valgrind.h.in | 525 +- include/vki/vki-linux.h | 5 + - include/vki/vki-loongarch64-linux.h | 827 + + include/vki/vki-loongarch64-linux.h | 811 + .../vki/vki-posixtypes-loongarch64-linux.h | 76 + include/vki/vki-scnums-loongarch64-linux.h | 356 + - install-sh | 161 +- - lackey/Makefile.in | 30 +- - lackey/tests/Makefile.in | 9 +- - massif/Makefile.in | 30 +- + lackey/Makefile.in | 19 + + massif/Makefile.in | 19 + massif/tests/Makefile.am | 1 + - massif/tests/Makefile.in | 19 +- + massif/tests/Makefile.in | 8 + massif/tests/big-alloc.post.exp-loongarch64 | 54 + - memcheck/Makefile.in | 30 +- + memcheck/Makefile.in | 19 + memcheck/mc_machine.c | 119 + - memcheck/mc_translate.c | 13 + - memcheck/tests/Makefile.am | 4 + - memcheck/tests/Makefile.in | 53 +- - memcheck/tests/amd64-linux/Makefile.in | 18 +- - memcheck/tests/amd64-solaris/Makefile.in | 18 +- - memcheck/tests/amd64/Makefile.in | 18 +- - memcheck/tests/arm64-linux/Makefile.in | 18 +- + memcheck/mc_translate.c | 17 + + memcheck/tests/Makefile.am | 5 +- + memcheck/tests/Makefile.in | 65 +- + memcheck/tests/amd64-freebsd/Makefile.in | 7 + + memcheck/tests/amd64-linux/Makefile.in | 7 + + memcheck/tests/amd64-solaris/Makefile.in | 7 + + memcheck/tests/amd64/Makefile.in | 7 + + memcheck/tests/arm64-linux/Makefile.in | 7 + memcheck/tests/atomic_incs.c | 84 +- - memcheck/tests/common/Makefile.in | 16 +- - memcheck/tests/darwin/Makefile.in | 18 +- + memcheck/tests/common/Makefile.in | 7 + + memcheck/tests/darwin/Makefile.in | 7 + + memcheck/tests/freebsd/Makefile.in | 7 + memcheck/tests/leak-segv-jmp.c | 15 +- memcheck/tests/leak-segv-jmp.stderr.exp | 20 +- memcheck/tests/leak.h | 21 + - memcheck/tests/linux/Makefile.in | 18 +- + memcheck/tests/linux/Makefile.in | 7 + memcheck/tests/loongarch64-linux/Makefile.am | 17 + - memcheck/tests/loongarch64-linux/Makefile.in | 965 + .../tests/loongarch64-linux/filter_stderr | 3 + memcheck/tests/loongarch64-linux/scalar.c | 1296 + memcheck/tests/loongarch64-linux/scalar.h | 62 + .../tests/loongarch64-linux/scalar.stderr.exp | 2716 + - .../tests/loongarch64-linux/scalar.vgtest | 3 + - memcheck/tests/mips32/Makefile.in | 18 +- - memcheck/tests/mips64/Makefile.in | 18 +- - memcheck/tests/ppc32/Makefile.in | 18 +- - memcheck/tests/ppc64/Makefile.in | 18 +- - memcheck/tests/s390x/Makefile.in | 18 +- - memcheck/tests/solaris/Makefile.in | 18 +- + .../tests/loongarch64-linux/scalar.vgtest | 5 + + memcheck/tests/mips32/Makefile.in | 7 + + memcheck/tests/mips64/Makefile.in | 7 + + memcheck/tests/ppc32/Makefile.in | 7 + + memcheck/tests/ppc64/Makefile.in | 7 + + memcheck/tests/s390x/Makefile.in | 7 + + memcheck/tests/solaris/Makefile.in | 7 + memcheck/tests/unit_libcbase.c | 4 +- - memcheck/tests/vbit-test/Makefile.in | 18 +- - memcheck/tests/vbit-test/irops.c | 510 +- + memcheck/tests/vbit-test/Makefile.in | 7 + + memcheck/tests/vbit-test/irops.c | 526 +- memcheck/tests/vbit-test/vtest.h | 19 +- - memcheck/tests/x86-linux/Makefile.in | 18 +- - memcheck/tests/x86-solaris/Makefile.in | 18 +- - memcheck/tests/x86/Makefile.in | 18 +- - missing | 2 +- - mpi/Makefile.in | 16 +- - none/Makefile.in | 30 +- - none/tests/Makefile.am | 8 +- - none/tests/Makefile.in | 59 +- + memcheck/tests/x86-freebsd/Makefile.in | 7 + + memcheck/tests/x86-linux/Makefile.in | 7 + + memcheck/tests/x86-solaris/Makefile.in | 7 + + memcheck/tests/x86/Makefile.in | 7 + + mpi/Makefile.in | 7 + + nightly/conf/loongarch64.conf | 3 + + nightly/conf/loongarch64.sendemail | 7 + + none/Makefile.in | 19 + + none/tests/Makefile.am | 9 +- + none/tests/Makefile.in | 56 +- none/tests/allexec_prepare_prereq | 13 +- - none/tests/amd64-darwin/Makefile.in | 18 +- - none/tests/amd64-linux/Makefile.in | 18 +- - none/tests/amd64-solaris/Makefile.in | 18 +- - none/tests/amd64/Makefile.in | 18 +- - none/tests/arm/Makefile.in | 18 +- - none/tests/arm64/Makefile.in | 18 +- - none/tests/darwin/Makefile.in | 18 +- + none/tests/amd64-darwin/Makefile.in | 7 + + none/tests/amd64-linux/Makefile.in | 7 + + none/tests/amd64-solaris/Makefile.in | 7 + + none/tests/amd64/Makefile.in | 7 + + none/tests/arm/Makefile.in | 7 + + none/tests/arm64/Makefile.in | 7 + + none/tests/darwin/Makefile.in | 7 + + none/tests/freebsd/Makefile.in | 7 + none/tests/libvex_test.c | 7 +- - none/tests/linux/Makefile.in | 18 +- - none/tests/loongarch64/Makefile.am | 39 + - none/tests/loongarch64/Makefile.in | 1123 + + none/tests/linux/Makefile.in | 7 + + none/tests/loongarch64/Makefile.am | 43 + none/tests/loongarch64/allexec.c | 56 + none/tests/loongarch64/atomic.c | 75 + none/tests/loongarch64/atomic.stderr.exp | 0 @@ -276,27 +249,35 @@ Subject: [PATCH] Add LOONGARCH64/Linux support none/tests/loongarch64/special.stderr.exp | 0 none/tests/loongarch64/special.stdout.exp | 48 + none/tests/loongarch64/special.vgtest | 2 + - none/tests/mips32/Makefile.in | 18 +- - none/tests/mips64/Makefile.in | 18 +- - none/tests/nanomips/Makefile.in | 18 +- - none/tests/ppc32/Makefile.in | 18 +- - none/tests/ppc64/Makefile.in | 18 +- - none/tests/s390x/Makefile.in | 18 +- - none/tests/scripts/Makefile.in | 16 +- - none/tests/solaris/Makefile.in | 18 +- - none/tests/x86-darwin/Makefile.in | 18 +- - none/tests/x86-linux/Makefile.in | 18 +- - none/tests/x86-solaris/Makefile.in | 18 +- - none/tests/x86/Makefile.in | 18 +- - perf/Makefile.in | 18 +- - shared/Makefile.in | 9 +- - solaris/Makefile.in | 9 +- + none/tests/loongarch64/vector128.c | 12 + + none/tests/loongarch64/vector128.stderr.exp | 0 + none/tests/loongarch64/vector128.stdout.exp | 0 + none/tests/loongarch64/vector128.vgtest | 3 + + none/tests/loongarch64/vector256.c | 12 + + none/tests/loongarch64/vector256.stderr.exp | 0 + none/tests/loongarch64/vector256.stdout.exp | 0 + none/tests/loongarch64/vector256.vgtest | 3 + + none/tests/mips32/Makefile.in | 7 + + none/tests/mips64/Makefile.in | 7 + + none/tests/nanomips/Makefile.in | 7 + + none/tests/ppc32/Makefile.in | 7 + + none/tests/ppc64/Makefile.in | 7 + + none/tests/s390x/Makefile.in | 7 + + none/tests/scripts/Makefile.in | 7 + + none/tests/solaris/Makefile.in | 7 + + none/tests/x86-darwin/Makefile.in | 7 + + none/tests/x86-freebsd/Makefile.in | 7 + + none/tests/x86-linux/Makefile.in | 7 + + none/tests/x86-solaris/Makefile.in | 7 + + none/tests/x86/Makefile.in | 7 + + perf/Makefile.in | 7 + tests/Makefile.am | 3 +- - tests/Makefile.in | 45 +- + tests/Makefile.in | 30 +- tests/arch_test.c | 5 + tests/loongarch64_features.c | 81 + tests/platform_test | 1 + - 292 files changed, 99402 insertions(+), 5720 deletions(-) + 272 files changed, 95890 insertions(+), 475 deletions(-) + create mode 100644 README.loongarch64 create mode 100644 VEX/priv/guest_loongarch64_defs.h create mode 100644 VEX/priv/guest_loongarch64_helpers.c create mode 100644 VEX/priv/guest_loongarch64_toIR.c @@ -308,6 +289,9 @@ Subject: [PATCH] Add LOONGARCH64/Linux support create mode 100644 coregrind/m_gdbserver/loongarch-base64-valgrind-s1.xml create mode 100644 coregrind/m_gdbserver/loongarch-base64-valgrind-s2.xml create mode 100644 coregrind/m_gdbserver/loongarch-base64.xml + create mode 100644 coregrind/m_gdbserver/loongarch-fpu64-valgrind-s1.xml + create mode 100644 coregrind/m_gdbserver/loongarch-fpu64-valgrind-s2.xml + create mode 100644 coregrind/m_gdbserver/loongarch-fpu64.xml create mode 100644 coregrind/m_gdbserver/loongarch64-linux-valgrind.xml create mode 100644 coregrind/m_gdbserver/loongarch64-linux.xml create mode 100644 coregrind/m_gdbserver/valgrind-low-loongarch64.c @@ -315,23 +299,19 @@ Subject: [PATCH] Add LOONGARCH64/Linux support create mode 100644 coregrind/m_syswrap/syscall-loongarch64-linux.S create mode 100644 coregrind/m_syswrap/syswrap-loongarch64-linux.c create mode 100755 gdbserver_tests/filter_helgrind_monitor_loongarch64 - create mode 100755 helgrind/tests/supported_pthread_tunable - create mode 100644 helgrind/tests/tls_threads_tunable.stderr.exp - create mode 100644 helgrind/tests/tls_threads_tunable.stdout.exp - create mode 100644 helgrind/tests/tls_threads_tunable.vgtest create mode 100644 include/vki/vki-loongarch64-linux.h create mode 100644 include/vki/vki-posixtypes-loongarch64-linux.h create mode 100644 include/vki/vki-scnums-loongarch64-linux.h create mode 100644 massif/tests/big-alloc.post.exp-loongarch64 create mode 100644 memcheck/tests/loongarch64-linux/Makefile.am - create mode 100644 memcheck/tests/loongarch64-linux/Makefile.in create mode 100755 memcheck/tests/loongarch64-linux/filter_stderr create mode 100644 memcheck/tests/loongarch64-linux/scalar.c create mode 100644 memcheck/tests/loongarch64-linux/scalar.h create mode 100644 memcheck/tests/loongarch64-linux/scalar.stderr.exp create mode 100644 memcheck/tests/loongarch64-linux/scalar.vgtest + create mode 100644 nightly/conf/loongarch64.conf + create mode 100644 nightly/conf/loongarch64.sendemail create mode 100644 none/tests/loongarch64/Makefile.am - create mode 100644 none/tests/loongarch64/Makefile.in create mode 100644 none/tests/loongarch64/allexec.c create mode 100644 none/tests/loongarch64/atomic.c create mode 100644 none/tests/loongarch64/atomic.stderr.exp @@ -382,13 +362,21 @@ Subject: [PATCH] Add LOONGARCH64/Linux support create mode 100644 none/tests/loongarch64/special.stderr.exp create mode 100644 none/tests/loongarch64/special.stdout.exp create mode 100644 none/tests/loongarch64/special.vgtest + create mode 100644 none/tests/loongarch64/vector128.c + create mode 100644 none/tests/loongarch64/vector128.stderr.exp + create mode 100644 none/tests/loongarch64/vector128.stdout.exp + create mode 100644 none/tests/loongarch64/vector128.vgtest + create mode 100644 none/tests/loongarch64/vector256.c + create mode 100644 none/tests/loongarch64/vector256.stderr.exp + create mode 100644 none/tests/loongarch64/vector256.stdout.exp + create mode 100644 none/tests/loongarch64/vector256.vgtest create mode 100644 tests/loongarch64_features.c diff --git a/Makefile.all.am b/Makefile.all.am -index 6d88670..5234303 100644 +index 94d65f2..eca59dc 100755 --- a/Makefile.all.am +++ b/Makefile.all.am -@@ -257,6 +257,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ +@@ -290,6 +290,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ $(AM_CFLAGS_PSO_BASE) AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g @@ -400,8 +388,8 @@ index 6d88670..5234303 100644 + AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@ AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ - $(AM_CFLAGS_BASE) -fomit-frame-pointer \ -@@ -315,6 +321,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ + $(AM_CFLAGS_BASE) -fomit-frame-pointer @SOLARIS_UNDEF_LARGESOURCE@ +@@ -350,6 +356,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ @@ -410,75 +398,19 @@ index 6d88670..5234303 100644 PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ diff --git a/Makefile.in b/Makefile.in -index ec4875c..ff9a4f7 100644 +index 56751f4..81dcc71 100644 --- a/Makefile.in +++ b/Makefile.in -@@ -1,7 +1,7 @@ --# Makefile.in generated by automake 1.16.1 from Makefile.am. -+# Makefile.in generated by automake 1.16.5 from Makefile.am. - # @configure_input@ - --# Copyright (C) 1994-2018 Free Software Foundation, Inc. -+# Copyright (C) 1994-2021 Free Software Foundation, Inc. - - # This Makefile.in is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -190,8 +190,8 @@ am__recursive_targets = \ - $(am__extra_recursive_targets) - AM_RECURSIVE_TARGETS = $(am__recursive_targets:-recursive=) TAGS CTAGS \ - cscope distdir distdir-am dist dist-all distcheck --am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \ -- $(LISP)config.h.in -+am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) $(LISP) \ -+ config.h.in - # Read a list of newline-separated strings from the standard input, - # and print each of them once, without duplicates. Input order is - # *not* preserved. -@@ -208,9 +208,6 @@ am__define_uniq_tagged_files = \ - unique=`for i in $$list; do \ - if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \ - done | $(am__uniquify_input)` --ETAGS = etags --CTAGS = ctags --CSCOPE = cscope - am__DIST_COMMON = $(srcdir)/Makefile.in $(srcdir)/config.h.in \ - $(srcdir)/glibc-2.X.supp.in $(srcdir)/valgrind.pc.in \ - $(srcdir)/valgrind.spec.in $(top_srcdir)/Makefile.all.am \ -@@ -255,6 +252,8 @@ am__relativize = \ - DIST_ARCHIVES = $(distdir).tar.gz $(distdir).tar.bz2 - GZIP_ENV = --best - DIST_TARGETS = dist-bzip2 dist-gzip -+# Exists only to be overridden by the user if desired. -+AM_DISTCHECK_DVI_TARGET = dvi - distuninstallcheck_listfiles = find . -type f -print - am__distuninstallcheck_listfiles = $(distuninstallcheck_listfiles) \ - | sed 's|^\./|$(prefix)/|' | grep -v '$(infodir)/dir$$' -@@ -278,6 +277,8 @@ CFLAGS = @CFLAGS@ - CFLAGS_MPI = @CFLAGS_MPI@ - CPP = @CPP@ - CPPFLAGS = @CPPFLAGS@ -+CSCOPE = @CSCOPE@ -+CTAGS = @CTAGS@ - CXX = @CXX@ - CXXDEPMODE = @CXXDEPMODE@ - CXXFLAGS = @CXXFLAGS@ -@@ -291,6 +292,7 @@ ECHO_C = @ECHO_C@ - ECHO_N = @ECHO_N@ - ECHO_T = @ECHO_T@ - EGREP = @EGREP@ -+ETAGS = @ETAGS@ - EXEEXT = @EXEEXT@ - FLAG_FALIGNED_NEW = @FLAG_FALIGNED_NEW@ - FLAG_FINLINE_FUNCTIONS = @FLAG_FINLINE_FUNCTIONS@ -@@ -436,6 +438,7 @@ pdfdir = @pdfdir@ - prefix = @prefix@ - program_transform_name = @program_transform_name@ - psdir = @psdir@ -+runstatedir = @runstatedir@ - sbindir = @sbindir@ - sharedstatedir = @sharedstatedir@ - srcdir = @srcdir@ -@@ -576,6 +579,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ +@@ -219,7 +219,7 @@ am__DIST_COMMON = $(srcdir)/Makefile.in $(srcdir)/config.h.in \ + $(top_srcdir)/docs/xml/vg-entities.xml.in \ + $(top_srcdir)/drd/scripts/download-and-build-splash2.in \ + AUTHORS COPYING NEWS README compile config.guess config.sub \ +- install-sh missing ++ depcomp install-sh missing + DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) + distdir = $(PACKAGE)-$(VERSION) + top_distdir = $(distdir) +@@ -635,6 +635,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ $(AM_CFLAGS_PSO_BASE) AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g @@ -490,8 +422,8 @@ index ec4875c..ff9a4f7 100644 +AM_CCASFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ -g AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@ AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ - $(AM_CFLAGS_BASE) -fomit-frame-pointer \ -@@ -621,6 +630,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ + $(AM_CFLAGS_BASE) -fomit-frame-pointer @SOLARIS_UNDEF_LARGESOURCE@ +@@ -682,6 +688,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ @@ -499,86 +431,11 @@ index ec4875c..ff9a4f7 100644 PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ TOOLS = \ -@@ -943,7 +953,6 @@ cscopelist-am: $(am__tagged_files) - distclean-tags: - -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags - -rm -f cscope.out cscope.in.out cscope.po.out cscope.files -- - distdir: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) distdir-am - -@@ -1029,6 +1038,10 @@ dist-xz: distdir - tardir=$(distdir) && $(am__tar) | XZ_OPT=$${XZ_OPT--e} xz -c >$(distdir).tar.xz - $(am__post_remove_distdir) - -+dist-zstd: distdir -+ tardir=$(distdir) && $(am__tar) | zstd -c $${ZSTD_CLEVEL-$${ZSTD_OPT--19}} >$(distdir).tar.zst -+ $(am__post_remove_distdir) -+ - dist-tarZ: distdir - @echo WARNING: "Support for distribution archives compressed with" \ - "legacy program 'compress' is deprecated." >&2 -@@ -1071,6 +1084,8 @@ distcheck: dist - eval GZIP= gzip $(GZIP_ENV) -dc $(distdir).shar.gz | unshar ;;\ - *.zip*) \ - unzip $(distdir).zip ;;\ -+ *.tar.zst*) \ -+ zstd -dc $(distdir).tar.zst | $(am__untar) ;;\ - esac - chmod -R a-w $(distdir) - chmod u+w $(distdir) -@@ -1086,7 +1101,7 @@ distcheck: dist - $(DISTCHECK_CONFIGURE_FLAGS) \ - --srcdir=../.. --prefix="$$dc_install_base" \ - && $(MAKE) $(AM_MAKEFLAGS) \ -- && $(MAKE) $(AM_MAKEFLAGS) dvi \ -+ && $(MAKE) $(AM_MAKEFLAGS) $(AM_DISTCHECK_DVI_TARGET) \ - && $(MAKE) $(AM_MAKEFLAGS) check \ - && $(MAKE) $(AM_MAKEFLAGS) install \ - && $(MAKE) $(AM_MAKEFLAGS) installcheck \ -@@ -1148,7 +1163,8 @@ installdirs-am: - done - install: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) install-recursive --install-exec: install-exec-recursive -+install-exec: $(BUILT_SOURCES) -+ $(MAKE) $(AM_MAKEFLAGS) install-exec-recursive - install-data: install-data-recursive - uninstall: uninstall-recursive - -@@ -1251,19 +1267,19 @@ uninstall-am: uninstall-pkgconfigDATA uninstall-pkgincludeHEADERS \ - uninstall-vglibDATA - - .MAKE: $(am__recursive_targets) all check install install-am \ -- install-strip -+ install-exec install-strip - - .PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am all-local \ - am--refresh check check-am clean clean-cscope clean-generic \ - clean-local cscope cscopelist-am ctags ctags-am dist dist-all \ - dist-bzip2 dist-gzip dist-hook dist-lzip dist-shar dist-tarZ \ -- dist-xz dist-zip distcheck distclean distclean-generic \ -- distclean-hdr distclean-tags distcleancheck distdir \ -- distuninstallcheck dvi dvi-am html html-am info info-am \ -- install install-am install-data install-data-am install-dvi \ -- install-dvi-am install-exec install-exec-am install-html \ -- install-html-am install-info install-info-am install-man \ -- install-pdf install-pdf-am install-pkgconfigDATA \ -+ dist-xz dist-zip dist-zstd distcheck distclean \ -+ distclean-generic distclean-hdr distclean-tags distcleancheck \ -+ distdir distuninstallcheck dvi dvi-am html html-am info \ -+ info-am install install-am install-data install-data-am \ -+ install-dvi install-dvi-am install-exec install-exec-am \ -+ install-html install-html-am install-info install-info-am \ -+ install-man install-pdf install-pdf-am install-pkgconfigDATA \ - install-pkgincludeHEADERS install-ps install-ps-am \ - install-strip install-vglibDATA installcheck installcheck-am \ - installdirs installdirs-am maintainer-clean \ diff --git a/Makefile.tool.am b/Makefile.tool.am -index 2bf90de..833638f 100644 +index 4ce6d5a..7dbfbd8 100644 --- a/Makefile.tool.am +++ b/Makefile.tool.am -@@ -84,6 +84,10 @@ TOOL_LDFLAGS_MIPS64_LINUX = \ +@@ -99,6 +99,10 @@ TOOL_LDFLAGS_MIPS64_LINUX = \ -static -nodefaultlibs -nostartfiles -u __start @FLAG_NO_BUILD_ID@ \ @FLAG_M64@ @@ -589,7 +446,7 @@ index 2bf90de..833638f 100644 TOOL_LDFLAGS_X86_SOLARIS = \ $(TOOL_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ -@@ -146,6 +150,9 @@ LIBREPLACEMALLOC_MIPS32_LINUX = \ +@@ -167,6 +171,9 @@ LIBREPLACEMALLOC_MIPS32_LINUX = \ LIBREPLACEMALLOC_MIPS64_LINUX = \ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-mips64-linux.a @@ -599,7 +456,7 @@ index 2bf90de..833638f 100644 LIBREPLACEMALLOC_X86_SOLARIS = \ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-x86-solaris.a -@@ -208,6 +215,11 @@ LIBREPLACEMALLOC_LDFLAGS_MIPS64_LINUX = \ +@@ -239,6 +246,11 @@ LIBREPLACEMALLOC_LDFLAGS_MIPS64_LINUX = \ $(LIBREPLACEMALLOC_MIPS64_LINUX) \ -Wl,--no-whole-archive @@ -672,20 +529,10 @@ index 98d8483..009d93b 100644 LIBVEXMULTIARCH_SOURCES = priv/multiarch_main_main.c diff --git a/Makefile.vex.in b/Makefile.vex.in -index f32a5e9..5a91d57 100644 +index b0380a6..61f439b 100644 --- a/Makefile.vex.in +++ b/Makefile.vex.in -@@ -1,7 +1,7 @@ --# Makefile.vex.in generated by automake 1.16.1 from Makefile.vex.am. -+# Makefile.vex.in generated by automake 1.16.5 from Makefile.vex.am. - # @configure_input@ - --# Copyright (C) 1994-2018 Free Software Foundation, Inc. -+# Copyright (C) 1994-2021 Free Software Foundation, Inc. - - # This Makefile.in is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -187,6 +187,8 @@ am__objects_1 = priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-main_globals.$(OBJEX +@@ -188,6 +188,8 @@ am__objects_1 = priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-main_globals.$(OBJEX priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_mips_toIR.$(OBJEXT) \ priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_nanomips_helpers.$(OBJEXT) \ priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_nanomips_toIR.$(OBJEXT) \ @@ -694,7 +541,7 @@ index f32a5e9..5a91d57 100644 priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_regs.$(OBJEXT) \ priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_simd64.$(OBJEXT) \ priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_simd128.$(OBJEXT) \ -@@ -210,7 +212,9 @@ am__objects_1 = priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-main_globals.$(OBJEX +@@ -211,7 +213,9 @@ am__objects_1 = priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-main_globals.$(OBJEX priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_mips_defs.$(OBJEXT) \ priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_nanomips_defs.$(OBJEXT) \ priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_mips_isel.$(OBJEXT) \ @@ -705,7 +552,7 @@ index f32a5e9..5a91d57 100644 am_libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_OBJECTS = $(am__objects_1) libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_OBJECTS = \ $(am_libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_OBJECTS) -@@ -228,7 +232,8 @@ am__libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_SOURCES_DIST = \ +@@ -229,7 +233,8 @@ am__libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_SOURCES_DIST = \ priv/guest_s390_helpers.c priv/guest_s390_toIR.c \ priv/guest_mips_helpers.c priv/guest_mipsdsp_toIR.c \ priv/guest_mips_toIR.c priv/guest_nanomips_helpers.c \ @@ -715,7 +562,7 @@ index f32a5e9..5a91d57 100644 priv/host_generic_simd64.c priv/host_generic_simd128.c \ priv/host_generic_simd256.c priv/host_generic_maddf.c \ priv/host_generic_reg_alloc2.c priv/host_generic_reg_alloc3.c \ -@@ -239,7 +244,8 @@ am__libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_SOURCES_DIST = \ +@@ -240,7 +245,8 @@ am__libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_SOURCES_DIST = \ priv/host_arm64_isel.c priv/host_s390_defs.c \ priv/host_s390_isel.c priv/s390_disasm.c priv/host_mips_defs.c \ priv/host_nanomips_defs.c priv/host_mips_isel.c \ @@ -725,7 +572,7 @@ index f32a5e9..5a91d57 100644 am__objects_2 = priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-main_globals.$(OBJEXT) \ priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-main_main.$(OBJEXT) \ priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-main_util.$(OBJEXT) \ -@@ -266,6 +272,8 @@ am__objects_2 = priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-main_globals.$(OBJEX +@@ -267,6 +273,8 @@ am__objects_2 = priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-main_globals.$(OBJEX priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_mips_toIR.$(OBJEXT) \ priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_nanomips_helpers.$(OBJEXT) \ priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_nanomips_toIR.$(OBJEXT) \ @@ -734,7 +581,7 @@ index f32a5e9..5a91d57 100644 priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_regs.$(OBJEXT) \ priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_simd64.$(OBJEXT) \ priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_simd128.$(OBJEXT) \ -@@ -289,7 +297,9 @@ am__objects_2 = priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-main_globals.$(OBJEX +@@ -290,7 +298,9 @@ am__objects_2 = priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-main_globals.$(OBJEX priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_mips_defs.$(OBJEXT) \ priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_nanomips_defs.$(OBJEXT) \ priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_mips_isel.$(OBJEXT) \ @@ -745,7 +592,7 @@ index f32a5e9..5a91d57 100644 @VGCONF_HAVE_PLATFORM_SEC_TRUE@am_libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_OBJECTS = \ @VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(am__objects_2) libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_OBJECTS = \ -@@ -333,6 +343,8 @@ am__depfiles_remade = priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-gues +@@ -334,6 +344,8 @@ am__depfiles_remade = priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-gues priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_arm_toIR.Po \ priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_generic_bb_to_IR.Po \ priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_generic_x87.Po \ @@ -754,7 +601,7 @@ index f32a5e9..5a91d57 100644 priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_mips_helpers.Po \ priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_mips_toIR.Po \ priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_mipsdsp_toIR.Po \ -@@ -357,6 +369,8 @@ am__depfiles_remade = priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-gues +@@ -358,6 +370,8 @@ am__depfiles_remade = priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-gues priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_simd128.Po \ priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_simd256.Po \ priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_simd64.Po \ @@ -763,7 +610,7 @@ index f32a5e9..5a91d57 100644 priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_mips_defs.Po \ priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_mips_isel.Po \ priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_nanomips_defs.Po \ -@@ -383,6 +397,8 @@ am__depfiles_remade = priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-gues +@@ -384,6 +398,8 @@ am__depfiles_remade = priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-gues priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_arm_toIR.Po \ priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_generic_bb_to_IR.Po \ priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_generic_x87.Po \ @@ -772,7 +619,7 @@ index f32a5e9..5a91d57 100644 priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_mips_helpers.Po \ priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_mips_toIR.Po \ priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_mipsdsp_toIR.Po \ -@@ -407,6 +423,8 @@ am__depfiles_remade = priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-gues +@@ -408,6 +424,8 @@ am__depfiles_remade = priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-gues priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_simd128.Po \ priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_simd256.Po \ priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_simd64.Po \ @@ -781,41 +628,7 @@ index f32a5e9..5a91d57 100644 priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_mips_defs.Po \ priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_mips_isel.Po \ priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_nanomips_defs.Po \ -@@ -475,8 +493,6 @@ am__define_uniq_tagged_files = \ - unique=`for i in $$list; do \ - if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \ - done | $(am__uniquify_input)` --ETAGS = etags --CTAGS = ctags - am__DIST_COMMON = $(top_srcdir)/Makefile.all.am \ - $(top_srcdir)/Makefile.vex.in $(top_srcdir)/depcomp - DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) -@@ -501,6 +517,8 @@ CFLAGS = @CFLAGS@ - CFLAGS_MPI = @CFLAGS_MPI@ - CPP = @CPP@ - CPPFLAGS = @CPPFLAGS@ -+CSCOPE = @CSCOPE@ -+CTAGS = @CTAGS@ - CXX = @CXX@ - CXXDEPMODE = @CXXDEPMODE@ - CXXFLAGS = @CXXFLAGS@ -@@ -514,6 +532,7 @@ ECHO_C = @ECHO_C@ - ECHO_N = @ECHO_N@ - ECHO_T = @ECHO_T@ - EGREP = @EGREP@ -+ETAGS = @ETAGS@ - EXEEXT = @EXEEXT@ - FLAG_FALIGNED_NEW = @FLAG_FALIGNED_NEW@ - FLAG_FINLINE_FUNCTIONS = @FLAG_FINLINE_FUNCTIONS@ -@@ -659,6 +678,7 @@ pdfdir = @pdfdir@ - prefix = @prefix@ - program_transform_name = @program_transform_name@ - psdir = @psdir@ -+runstatedir = @runstatedir@ - sbindir = @sbindir@ - sharedstatedir = @sharedstatedir@ - srcdir = @srcdir@ -@@ -798,6 +818,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ +@@ -851,6 +869,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ $(AM_CFLAGS_PSO_BASE) AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g @@ -827,8 +640,8 @@ index f32a5e9..5a91d57 100644 +AM_CCASFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ -g AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@ AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ - $(AM_CFLAGS_BASE) -fomit-frame-pointer \ -@@ -843,6 +869,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ + $(AM_CFLAGS_BASE) -fomit-frame-pointer @SOLARIS_UNDEF_LARGESOURCE@ +@@ -898,6 +922,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ @@ -836,7 +649,7 @@ index f32a5e9..5a91d57 100644 PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ -@@ -869,6 +896,7 @@ pkginclude_HEADERS = \ +@@ -924,6 +949,7 @@ pkginclude_HEADERS = \ pub/libvex_guest_s390x.h \ pub/libvex_guest_mips32.h \ pub/libvex_guest_mips64.h \ @@ -844,7 +657,7 @@ index f32a5e9..5a91d57 100644 pub/libvex_s390x_common.h \ pub/libvex_ir.h \ pub/libvex_trc_values.h \ -@@ -892,6 +920,7 @@ noinst_HEADERS = \ +@@ -947,6 +973,7 @@ noinst_HEADERS = \ priv/guest_mips_defs.h \ priv/mips_defs.h \ priv/guest_nanomips_defs.h \ @@ -852,7 +665,7 @@ index f32a5e9..5a91d57 100644 priv/host_generic_regs.h \ priv/host_generic_simd64.h \ priv/host_generic_simd128.h \ -@@ -907,7 +936,8 @@ noinst_HEADERS = \ +@@ -962,7 +989,8 @@ noinst_HEADERS = \ priv/s390_defs.h \ priv/host_mips_defs.h \ priv/host_nanomips_defs.h \ @@ -862,7 +675,7 @@ index f32a5e9..5a91d57 100644 BUILT_SOURCES = pub/libvex_guest_offsets.h CLEANFILES = pub/libvex_guest_offsets.h -@@ -951,6 +981,8 @@ LIBVEX_SOURCES_COMMON = \ +@@ -1006,6 +1034,8 @@ LIBVEX_SOURCES_COMMON = \ priv/guest_mips_toIR.c \ priv/guest_nanomips_helpers.c \ priv/guest_nanomips_toIR.c \ @@ -871,7 +684,7 @@ index f32a5e9..5a91d57 100644 priv/host_generic_regs.c \ priv/host_generic_simd64.c \ priv/host_generic_simd128.c \ -@@ -974,7 +1006,9 @@ LIBVEX_SOURCES_COMMON = \ +@@ -1029,7 +1059,9 @@ LIBVEX_SOURCES_COMMON = \ priv/host_mips_defs.c \ priv/host_nanomips_defs.c \ priv/host_mips_isel.c \ @@ -882,7 +695,7 @@ index f32a5e9..5a91d57 100644 LIBVEXMULTIARCH_SOURCES = priv/multiarch_main_main.c LIBVEX_CFLAGS_NO_LTO = \ -@@ -1140,6 +1174,10 @@ priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_nanomips_helpers.$(OBJEXT): \ +@@ -1195,6 +1227,10 @@ priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_nanomips_helpers.$(OBJEXT): \ priv/$(am__dirstamp) priv/$(DEPDIR)/$(am__dirstamp) priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_nanomips_toIR.$(OBJEXT): \ priv/$(am__dirstamp) priv/$(DEPDIR)/$(am__dirstamp) @@ -893,7 +706,7 @@ index f32a5e9..5a91d57 100644 priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_regs.$(OBJEXT): \ priv/$(am__dirstamp) priv/$(DEPDIR)/$(am__dirstamp) priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_simd64.$(OBJEXT): \ -@@ -1188,6 +1226,10 @@ priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_mips_isel.$(OBJEXT): \ +@@ -1243,6 +1279,10 @@ priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_mips_isel.$(OBJEXT): \ priv/$(am__dirstamp) priv/$(DEPDIR)/$(am__dirstamp) priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_nanomips_isel.$(OBJEXT): \ priv/$(am__dirstamp) priv/$(DEPDIR)/$(am__dirstamp) @@ -904,7 +717,7 @@ index f32a5e9..5a91d57 100644 libvex-@VGCONF_ARCH_PRI@-@VGCONF_OS@.a: $(libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_OBJECTS) $(libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_DEPENDENCIES) $(EXTRA_libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_DEPENDENCIES) $(AM_V_at)-rm -f libvex-@VGCONF_ARCH_PRI@-@VGCONF_OS@.a -@@ -1245,6 +1287,10 @@ priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_nanomips_helpers.$(OBJEXT): \ +@@ -1300,6 +1340,10 @@ priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_nanomips_helpers.$(OBJEXT): \ priv/$(am__dirstamp) priv/$(DEPDIR)/$(am__dirstamp) priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_nanomips_toIR.$(OBJEXT): \ priv/$(am__dirstamp) priv/$(DEPDIR)/$(am__dirstamp) @@ -915,7 +728,7 @@ index f32a5e9..5a91d57 100644 priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_regs.$(OBJEXT): \ priv/$(am__dirstamp) priv/$(DEPDIR)/$(am__dirstamp) priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_simd64.$(OBJEXT): \ -@@ -1293,6 +1339,10 @@ priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_mips_isel.$(OBJEXT): \ +@@ -1348,6 +1392,10 @@ priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_mips_isel.$(OBJEXT): \ priv/$(am__dirstamp) priv/$(DEPDIR)/$(am__dirstamp) priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_nanomips_isel.$(OBJEXT): \ priv/$(am__dirstamp) priv/$(DEPDIR)/$(am__dirstamp) @@ -926,7 +739,7 @@ index f32a5e9..5a91d57 100644 libvex-@VGCONF_ARCH_SEC@-@VGCONF_OS@.a: $(libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_OBJECTS) $(libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_DEPENDENCIES) $(EXTRA_libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_DEPENDENCIES) $(AM_V_at)-rm -f libvex-@VGCONF_ARCH_SEC@-@VGCONF_OS@.a -@@ -1328,6 +1378,8 @@ distclean-compile: +@@ -1383,6 +1431,8 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_arm_toIR.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_generic_bb_to_IR.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_generic_x87.Po@am__quote@ # am--include-marker @@ -935,7 +748,7 @@ index f32a5e9..5a91d57 100644 @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_mips_helpers.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_mips_toIR.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_mipsdsp_toIR.Po@am__quote@ # am--include-marker -@@ -1352,6 +1404,8 @@ distclean-compile: +@@ -1407,6 +1457,8 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_simd128.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_simd256.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_simd64.Po@am__quote@ # am--include-marker @@ -944,7 +757,7 @@ index f32a5e9..5a91d57 100644 @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_mips_defs.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_mips_isel.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_nanomips_defs.Po@am__quote@ # am--include-marker -@@ -1378,6 +1432,8 @@ distclean-compile: +@@ -1433,6 +1485,8 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_arm_toIR.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_generic_bb_to_IR.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_generic_x87.Po@am__quote@ # am--include-marker @@ -953,7 +766,7 @@ index f32a5e9..5a91d57 100644 @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_mips_helpers.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_mips_toIR.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_mipsdsp_toIR.Po@am__quote@ # am--include-marker -@@ -1402,6 +1458,8 @@ distclean-compile: +@@ -1457,6 +1511,8 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_simd128.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_simd256.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_simd64.Po@am__quote@ # am--include-marker @@ -962,7 +775,7 @@ index f32a5e9..5a91d57 100644 @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_mips_defs.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_mips_isel.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_nanomips_defs.Po@am__quote@ # am--include-marker -@@ -1809,6 +1867,34 @@ priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_nanomips_toIR.obj: priv/guest_ +@@ -1864,6 +1920,34 @@ priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_nanomips_toIR.obj: priv/guest_ @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -c -o priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_nanomips_toIR.obj `if test -f 'priv/guest_nanomips_toIR.c'; then $(CYGPATH_W) 'priv/guest_nanomips_toIR.c'; else $(CYGPATH_W) '$(srcdir)/priv/guest_nanomips_toIR.c'; fi` @@ -997,7 +810,7 @@ index f32a5e9..5a91d57 100644 priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_regs.o: priv/host_generic_regs.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -MT priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_regs.o -MD -MP -MF priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_regs.Tpo -c -o priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_regs.o `test -f 'priv/host_generic_regs.c' || echo '$(srcdir)/'`priv/host_generic_regs.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_regs.Tpo priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_regs.Po -@@ -2145,6 +2231,34 @@ priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_nanomips_isel.obj: priv/host_na +@@ -2200,6 +2284,34 @@ priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_nanomips_isel.obj: priv/host_na @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -c -o priv/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_nanomips_isel.obj `if test -f 'priv/host_nanomips_isel.c'; then $(CYGPATH_W) 'priv/host_nanomips_isel.c'; else $(CYGPATH_W) '$(srcdir)/priv/host_nanomips_isel.c'; fi` @@ -1032,7 +845,7 @@ index f32a5e9..5a91d57 100644 priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-main_globals.o: priv/main_globals.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -MT priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-main_globals.o -MD -MP -MF priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-main_globals.Tpo -c -o priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-main_globals.o `test -f 'priv/main_globals.c' || echo '$(srcdir)/'`priv/main_globals.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-main_globals.Tpo priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-main_globals.Po -@@ -2509,6 +2623,34 @@ priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_nanomips_toIR.obj: priv/guest_ +@@ -2564,6 +2676,34 @@ priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_nanomips_toIR.obj: priv/guest_ @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -c -o priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_nanomips_toIR.obj `if test -f 'priv/guest_nanomips_toIR.c'; then $(CYGPATH_W) 'priv/guest_nanomips_toIR.c'; else $(CYGPATH_W) '$(srcdir)/priv/guest_nanomips_toIR.c'; fi` @@ -1067,7 +880,7 @@ index f32a5e9..5a91d57 100644 priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_regs.o: priv/host_generic_regs.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -MT priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_regs.o -MD -MP -MF priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_regs.Tpo -c -o priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_regs.o `test -f 'priv/host_generic_regs.c' || echo '$(srcdir)/'`priv/host_generic_regs.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_regs.Tpo priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_regs.Po -@@ -2845,6 +2987,34 @@ priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_nanomips_isel.obj: priv/host_na +@@ -2900,6 +3040,34 @@ priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_nanomips_isel.obj: priv/host_na @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -c -o priv/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_nanomips_isel.obj `if test -f 'priv/host_nanomips_isel.c'; then $(CYGPATH_W) 'priv/host_nanomips_isel.c'; else $(CYGPATH_W) '$(srcdir)/priv/host_nanomips_isel.c'; fi` @@ -1102,25 +915,7 @@ index f32a5e9..5a91d57 100644 priv/libvexmultiarch_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-multiarch_main_main.o: priv/multiarch_main_main.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libvexmultiarch_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libvexmultiarch_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -MT priv/libvexmultiarch_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-multiarch_main_main.o -MD -MP -MF priv/$(DEPDIR)/libvexmultiarch_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-multiarch_main_main.Tpo -c -o priv/libvexmultiarch_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-multiarch_main_main.o `test -f 'priv/multiarch_main_main.c' || echo '$(srcdir)/'`priv/multiarch_main_main.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) priv/$(DEPDIR)/libvexmultiarch_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-multiarch_main_main.Tpo priv/$(DEPDIR)/libvexmultiarch_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-multiarch_main_main.Po -@@ -2945,7 +3115,6 @@ cscopelist-am: $(am__tagged_files) - - distclean-tags: - -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags -- - distdir: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) distdir-am - -@@ -2989,7 +3158,8 @@ installdirs: - done - install: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) install-am --install-exec: install-exec-am -+install-exec: $(BUILT_SOURCES) -+ $(MAKE) $(AM_MAKEFLAGS) install-exec-am - install-data: install-data-am - uninstall: uninstall-am - -@@ -3035,6 +3205,8 @@ distclean: distclean-am +@@ -3090,6 +3258,8 @@ distclean: distclean-am -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_arm_toIR.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_generic_bb_to_IR.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_generic_x87.Po @@ -1129,7 +924,7 @@ index f32a5e9..5a91d57 100644 -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_mips_helpers.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_mips_toIR.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_mipsdsp_toIR.Po -@@ -3059,6 +3231,8 @@ distclean: distclean-am +@@ -3114,6 +3284,8 @@ distclean: distclean-am -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_simd128.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_simd256.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_simd64.Po @@ -1138,7 +933,7 @@ index f32a5e9..5a91d57 100644 -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_mips_defs.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_mips_isel.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_nanomips_defs.Po -@@ -3085,6 +3259,8 @@ distclean: distclean-am +@@ -3140,6 +3312,8 @@ distclean: distclean-am -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_arm_toIR.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_generic_bb_to_IR.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_generic_x87.Po @@ -1147,7 +942,7 @@ index f32a5e9..5a91d57 100644 -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_mips_helpers.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_mips_toIR.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_mipsdsp_toIR.Po -@@ -3109,6 +3285,8 @@ distclean: distclean-am +@@ -3164,6 +3338,8 @@ distclean: distclean-am -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_simd128.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_simd256.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_simd64.Po @@ -1156,7 +951,7 @@ index f32a5e9..5a91d57 100644 -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_mips_defs.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_mips_isel.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_nanomips_defs.Po -@@ -3182,6 +3360,8 @@ maintainer-clean: maintainer-clean-am +@@ -3237,6 +3413,8 @@ maintainer-clean: maintainer-clean-am -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_arm_toIR.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_generic_bb_to_IR.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_generic_x87.Po @@ -1165,7 +960,7 @@ index f32a5e9..5a91d57 100644 -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_mips_helpers.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_mips_toIR.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-guest_mipsdsp_toIR.Po -@@ -3206,6 +3386,8 @@ maintainer-clean: maintainer-clean-am +@@ -3261,6 +3439,8 @@ maintainer-clean: maintainer-clean-am -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_simd128.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_simd256.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_generic_simd64.Po @@ -1174,7 +969,7 @@ index f32a5e9..5a91d57 100644 -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_mips_defs.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_mips_isel.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-host_nanomips_defs.Po -@@ -3232,6 +3414,8 @@ maintainer-clean: maintainer-clean-am +@@ -3287,6 +3467,8 @@ maintainer-clean: maintainer-clean-am -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_arm_toIR.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_generic_bb_to_IR.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_generic_x87.Po @@ -1183,7 +978,7 @@ index f32a5e9..5a91d57 100644 -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_mips_helpers.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_mips_toIR.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-guest_mipsdsp_toIR.Po -@@ -3256,6 +3440,8 @@ maintainer-clean: maintainer-clean-am +@@ -3311,6 +3493,8 @@ maintainer-clean: maintainer-clean-am -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_simd128.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_simd256.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_generic_simd64.Po @@ -1192,16 +987,7 @@ index f32a5e9..5a91d57 100644 -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_mips_defs.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_mips_isel.Po -rm -f priv/$(DEPDIR)/libvex_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-host_nanomips_defs.Po -@@ -3293,7 +3479,7 @@ ps-am: - - uninstall-am: uninstall-pkgincludeHEADERS uninstall-pkglibLIBRARIES - --.MAKE: all check install install-am install-strip -+.MAKE: all check install install-am install-exec install-strip - - .PHONY: CTAGS GTAGS TAGS all all-am am--depfiles check check-am clean \ - clean-generic clean-pkglibLIBRARIES cscopelist-am ctags \ -@@ -3406,7 +3592,8 @@ pub/libvex_guest_offsets.h: auxprogs/genoffsets.c \ +@@ -3461,7 +3645,8 @@ pub/libvex_guest_offsets.h: auxprogs/genoffsets.c \ pub/libvex_guest_arm64.h \ pub/libvex_guest_s390x.h \ pub/libvex_guest_mips32.h \ @@ -1212,17 +998,74 @@ index f32a5e9..5a91d57 100644 $(mkdir_p) auxprogs pub $(CC) $(CFLAGS_FOR_GENOFFSETS) \ diff --git a/README b/README -index 511027a..64b5ecb 100644 +index 8423880..1a88d1d 100644 --- a/README +++ b/README -@@ -44,6 +44,7 @@ platforms: +@@ -41,6 +41,7 @@ platforms: - MIPS32/Linux - MIPS64/Linux - nanoMIPS/Linux +- LOONGARCH64/Linux - X86/Solaris - AMD64/Solaris - + - X86/FreeBSD +diff --git a/README.loongarch64 b/README.loongarch64 +new file mode 100644 +index 0000000..742bca0 +--- /dev/null ++++ b/README.loongarch64 +@@ -0,0 +1,51 @@ ++Status ++~~~~~~ ++ ++A port to LoongArch64 Linux platform. ++ ++Some new IROps: ++ ++* Iop_ScaleBF64 ++* Iop_ScaleBF32 ++* Iop_RSqrtF64 ++* Iop_RSqrtF32 ++* Iop_LogBF64 ++* Iop_LogBF32 ++* Iop_MaxNumAbsF64 ++* Iop_MinNumAbsF64 ++* Iop_MaxNumF32 ++* Iop_MinNumF32 ++* Iop_MaxNumAbsF32 ++* Iop_MinNumAbsF32 ++* Iop_Max64Sx4 ++* Iop_Max64Ux4 ++* Iop_Min64Sx4 ++* Iop_Min64Ux4 ++ ++A new IRMBusEvent: ++ ++* Imbe_InsnFence ++ ++A new IRJumpKind: ++ ++* Ijk_SigSYS ++ ++ ++Limitations ++~~~~~~~~~~~ ++ ++* Only the fallback LLSC implementation is supported. ++* Not all vector instructions are supported. ++* Tests need to be added for vector instructions. ++ ++ ++Reading Material ++~~~~~~~~~~~~~~~~ ++ ++* LoongArch Reference Manual ++ https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html ++* LoongArch ELF ABI specification: ++ https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html ++* LoongArch Toolchain Conventions: ++ https://loongson.github.io/LoongArch-Documentation/LoongArch-toolchain-conventions-EN.html ++ diff --git a/VEX/auxprogs/genoffsets.c b/VEX/auxprogs/genoffsets.c index 54376dc..89edf52 100644 --- a/VEX/auxprogs/genoffsets.c @@ -1279,10 +1122,10 @@ index 54376dc..89edf52 100644 /*--------------------------------------------------------------------*/ diff --git a/VEX/priv/guest_loongarch64_defs.h b/VEX/priv/guest_loongarch64_defs.h new file mode 100644 -index 0000000..867d859 +index 0000000..c3b572c --- /dev/null +++ b/VEX/priv/guest_loongarch64_defs.h -@@ -0,0 +1,130 @@ +@@ -0,0 +1,131 @@ + +/*---------------------------------------------------------------*/ +/*--- begin guest_loongarch64_defs.h ---*/ @@ -1389,23 +1232,24 @@ index 0000000..867d859 + FRINT_S, FRINT_D +}; + -+extern ULong loongarch64_calculate_cpucfg ( ULong src ); -+extern ULong loongarch64_calculate_revb_2h ( ULong src ); -+extern ULong loongarch64_calculate_revb_4h ( ULong src ); -+extern ULong loongarch64_calculate_revb_2w ( ULong src ); -+extern ULong loongarch64_calculate_revb_d ( ULong src ); -+extern ULong loongarch64_calculate_revh_2w ( ULong src ); -+extern ULong loongarch64_calculate_revh_d ( ULong src ); -+extern ULong loongarch64_calculate_bitrev_4b ( ULong src ); -+extern ULong loongarch64_calculate_bitrev_8b ( ULong src ); -+extern ULong loongarch64_calculate_bitrev_w ( ULong src ); -+extern ULong loongarch64_calculate_bitrev_d ( ULong src ); -+extern ULong loongarch64_calculate_crc ( ULong old, ULong msg, ULong len ); -+extern ULong loongarch64_calculate_crcc ( ULong old, ULong msg, ULong len ); -+extern ULong loongarch64_calculate_fclass_s ( ULong src ); -+extern ULong loongarch64_calculate_fclass_d ( ULong src ); -+extern ULong loongarch64_calculate_FCSR ( enum fpop op, ULong src1, -+ ULong src2, ULong src3 ); ++extern ULong loongarch64_calculate_cpucfg ( ULong src ); ++extern ULong loongarch64_calculate_revb_2h ( ULong src ); ++extern ULong loongarch64_calculate_revb_4h ( ULong src ); ++extern ULong loongarch64_calculate_revb_2w ( ULong src ); ++extern ULong loongarch64_calculate_revb_d ( ULong src ); ++extern ULong loongarch64_calculate_revh_2w ( ULong src ); ++extern ULong loongarch64_calculate_revh_d ( ULong src ); ++extern ULong loongarch64_calculate_bitrev_4b ( ULong src ); ++extern ULong loongarch64_calculate_bitrev_8b ( ULong src ); ++extern ULong loongarch64_calculate_bitrev_w ( ULong src ); ++extern ULong loongarch64_calculate_bitrev_d ( ULong src ); ++extern ULong loongarch64_calculate_crc ( ULong old, ULong msg, ULong len ); ++extern ULong loongarch64_calculate_crcc ( ULong old, ULong msg, ULong len ); ++extern ULong loongarch64_calculate_fclass_s ( ULong src ); ++extern ULong loongarch64_calculate_fclass_d ( ULong src ); ++extern ULong loongarch64_calculate_FCSR ( enum fpop op, ULong src1, ++ ULong src2, ULong src3 ); ++extern ULong loongarch64_calculate_negative_id ( ULong insSz, ULong sHi, ULong sLo ); + +#endif /* ndef __VEX_GUEST_LOONGARCH64_DEFS_H */ + @@ -1415,10 +1259,10 @@ index 0000000..867d859 +/*---------------------------------------------------------------*/ diff --git a/VEX/priv/guest_loongarch64_helpers.c b/VEX/priv/guest_loongarch64_helpers.c new file mode 100644 -index 0000000..d65cf70 +index 0000000..e761539 --- /dev/null +++ b/VEX/priv/guest_loongarch64_helpers.c -@@ -0,0 +1,870 @@ +@@ -0,0 +1,905 @@ + +/*---------------------------------------------------------------*/ +/*--- begin guest_loongarch64_helpers.c ---*/ @@ -1473,79 +1317,83 @@ index 0000000..d65cf70 +void LibVEX_GuestLOONGARCH64_initialise ( /*OUT*/ + VexGuestLOONGARCH64State* vex_state ) +{ ++ UInt i; ++ + /* Event check fail addr and counter. */ + vex_state->host_EvC_FAILADDR = 0; + vex_state->host_EvC_COUNTER = 0; + + /* CPU Registers */ -+ vex_state->guest_R0 = 0; /* Constant zero */ -+ vex_state->guest_R1 = 0; /* Return address */ -+ vex_state->guest_R2 = 0; /* Thread pointer */ -+ vex_state->guest_R3 = 0; /* Stack pointer */ -+ vex_state->guest_R4 = 0; /* Argument registers / Return value */ -+ vex_state->guest_R5 = 0; -+ vex_state->guest_R6 = 0; /* Argument registers */ -+ vex_state->guest_R7 = 0; -+ vex_state->guest_R8 = 0; -+ vex_state->guest_R9 = 0; -+ vex_state->guest_R10 = 0; -+ vex_state->guest_R11 = 0; -+ vex_state->guest_R12 = 0; /* Temporary registers */ -+ vex_state->guest_R13 = 0; -+ vex_state->guest_R14 = 0; -+ vex_state->guest_R15 = 0; -+ vex_state->guest_R16 = 0; -+ vex_state->guest_R17 = 0; -+ vex_state->guest_R18 = 0; -+ vex_state->guest_R19 = 0; -+ vex_state->guest_R20 = 0; -+ vex_state->guest_R21 = 0; /* Reserved */ -+ vex_state->guest_R22 = 0; /* Frame pointer / Static register */ -+ vex_state->guest_R23 = 0; /* Static registers */ -+ vex_state->guest_R24 = 0; -+ vex_state->guest_R25 = 0; -+ vex_state->guest_R26 = 0; -+ vex_state->guest_R27 = 0; -+ vex_state->guest_R28 = 0; -+ vex_state->guest_R29 = 0; -+ vex_state->guest_R30 = 0; -+ vex_state->guest_R31 = 0; -+ -+ vex_state->guest_PC = 0; /* Program counter */ -+ -+ /* FPU Registers */ -+ vex_state->guest_F0 = 0xffffffffffffffffUL; /* Argument registers / Return value */ -+ vex_state->guest_F1 = 0xffffffffffffffffUL; -+ vex_state->guest_F2 = 0xffffffffffffffffUL; /* Argument registers */ -+ vex_state->guest_F3 = 0xffffffffffffffffUL; -+ vex_state->guest_F4 = 0xffffffffffffffffUL; -+ vex_state->guest_F5 = 0xffffffffffffffffUL; -+ vex_state->guest_F6 = 0xffffffffffffffffUL; -+ vex_state->guest_F7 = 0xffffffffffffffffUL; -+ vex_state->guest_F8 = 0xffffffffffffffffUL; /* Temporary registers */ -+ vex_state->guest_F9 = 0xffffffffffffffffUL; -+ vex_state->guest_F10 = 0xffffffffffffffffUL; -+ vex_state->guest_F11 = 0xffffffffffffffffUL; -+ vex_state->guest_F12 = 0xffffffffffffffffUL; -+ vex_state->guest_F13 = 0xffffffffffffffffUL; -+ vex_state->guest_F14 = 0xffffffffffffffffUL; -+ vex_state->guest_F15 = 0xffffffffffffffffUL; -+ vex_state->guest_F16 = 0xffffffffffffffffUL; -+ vex_state->guest_F17 = 0xffffffffffffffffUL; -+ vex_state->guest_F18 = 0xffffffffffffffffUL; -+ vex_state->guest_F19 = 0xffffffffffffffffUL; -+ vex_state->guest_F20 = 0xffffffffffffffffUL; -+ vex_state->guest_F21 = 0xffffffffffffffffUL; -+ vex_state->guest_F22 = 0xffffffffffffffffUL; -+ vex_state->guest_F23 = 0xffffffffffffffffUL; -+ vex_state->guest_F24 = 0xffffffffffffffffUL; /* Static registers */ -+ vex_state->guest_F25 = 0xffffffffffffffffUL; -+ vex_state->guest_F26 = 0xffffffffffffffffUL; -+ vex_state->guest_F27 = 0xffffffffffffffffUL; -+ vex_state->guest_F28 = 0xffffffffffffffffUL; -+ vex_state->guest_F29 = 0xffffffffffffffffUL; -+ vex_state->guest_F30 = 0xffffffffffffffffUL; -+ vex_state->guest_F31 = 0xffffffffffffffffUL; ++ vex_state->guest_R0 = 0; /* Constant zero */ ++ vex_state->guest_R1 = 0; /* Return address */ ++ vex_state->guest_R2 = 0; /* Thread pointer */ ++ vex_state->guest_R3 = 0; /* Stack pointer */ ++ vex_state->guest_R4 = 0; /* Argument registers / Return value */ ++ vex_state->guest_R5 = 0; ++ vex_state->guest_R6 = 0; /* Argument registers */ ++ vex_state->guest_R7 = 0; ++ vex_state->guest_R8 = 0; ++ vex_state->guest_R9 = 0; ++ vex_state->guest_R10 = 0; ++ vex_state->guest_R11 = 0; ++ vex_state->guest_R12 = 0; /* Temporary registers */ ++ vex_state->guest_R13 = 0; ++ vex_state->guest_R14 = 0; ++ vex_state->guest_R15 = 0; ++ vex_state->guest_R16 = 0; ++ vex_state->guest_R17 = 0; ++ vex_state->guest_R18 = 0; ++ vex_state->guest_R19 = 0; ++ vex_state->guest_R20 = 0; ++ vex_state->guest_R21 = 0; /* Reserved */ ++ vex_state->guest_R22 = 0; /* Frame pointer / Static register */ ++ vex_state->guest_R23 = 0; /* Static registers */ ++ vex_state->guest_R24 = 0; ++ vex_state->guest_R25 = 0; ++ vex_state->guest_R26 = 0; ++ vex_state->guest_R27 = 0; ++ vex_state->guest_R28 = 0; ++ vex_state->guest_R29 = 0; ++ vex_state->guest_R30 = 0; ++ vex_state->guest_R31 = 0; ++ ++ vex_state->guest_PC = 0; /* Program counter */ ++ ++ /* FPU/SIMD Registers */ ++ for (i = 0; i < 8; i++) { ++ vex_state->guest_X0[i] = 0xffffffff; ++ vex_state->guest_X1[i] = 0xffffffff; ++ vex_state->guest_X2[i] = 0xffffffff; ++ vex_state->guest_X3[i] = 0xffffffff; ++ vex_state->guest_X4[i] = 0xffffffff; ++ vex_state->guest_X5[i] = 0xffffffff; ++ vex_state->guest_X6[i] = 0xffffffff; ++ vex_state->guest_X7[i] = 0xffffffff; ++ vex_state->guest_X8[i] = 0xffffffff; ++ vex_state->guest_X9[i] = 0xffffffff; ++ vex_state->guest_X10[i] = 0xffffffff; ++ vex_state->guest_X11[i] = 0xffffffff; ++ vex_state->guest_X12[i] = 0xffffffff; ++ vex_state->guest_X13[i] = 0xffffffff; ++ vex_state->guest_X14[i] = 0xffffffff; ++ vex_state->guest_X15[i] = 0xffffffff; ++ vex_state->guest_X16[i] = 0xffffffff; ++ vex_state->guest_X17[i] = 0xffffffff; ++ vex_state->guest_X18[i] = 0xffffffff; ++ vex_state->guest_X19[i] = 0xffffffff; ++ vex_state->guest_X20[i] = 0xffffffff; ++ vex_state->guest_X21[i] = 0xffffffff; ++ vex_state->guest_X22[i] = 0xffffffff; ++ vex_state->guest_X23[i] = 0xffffffff; ++ vex_state->guest_X24[i] = 0xffffffff; ++ vex_state->guest_X25[i] = 0xffffffff; ++ vex_state->guest_X26[i] = 0xffffffff; ++ vex_state->guest_X27[i] = 0xffffffff; ++ vex_state->guest_X28[i] = 0xffffffff; ++ vex_state->guest_X29[i] = 0xffffffff; ++ vex_state->guest_X30[i] = 0xffffffff; ++ vex_state->guest_X31[i] = 0xffffffff; ++ } + + vex_state->guest_FCC0 = 0; /* Condition Flag Registers */ + vex_state->guest_FCC1 = 0; @@ -1882,19 +1730,50 @@ index 0000000..d65cf70 +{ + ULong f = src; + Bool sign = toBool(f >> 63); -+ if ((f & 0x7fffffffffffffffUL) == 0x7ff0000000000000UL) { ++ if ((f & 0x7fffffffffffffffULL) == 0x7ff0000000000000ULL) { + return sign ? 1 << 2 : 1 << 6; -+ } else if ((f & 0x7fffffffffffffffUL) == 0) { ++ } else if ((f & 0x7fffffffffffffffULL) == 0) { + return sign ? 1 << 5 : 1 << 9; -+ } else if ((f & 0x7ff0000000000000UL) == 0) { ++ } else if ((f & 0x7ff0000000000000ULL) == 0) { + return sign ? 1 << 4 : 1 << 8; -+ } else if ((f & ~(1UL << 63)) > 0x7ff0000000000000UL) { -+ return ((f << 1) >= 0xfff0000000000000UL) ? 1 << 1 : 1 << 0; ++ } else if ((f & ~(1ULL << 63)) > 0x7ff0000000000000ULL) { ++ return ((f << 1) >= 0xfff0000000000000ULL) ? 1 << 1 : 1 << 0; + } else { + return sign ? 1 << 3 : 1 << 7; + } +} + ++ULong loongarch64_calculate_negative_id ( ULong insSz, ULong sHi, ULong sLo ) ++{ ++ V128 src; ++ UInt i; ++ ++ src.w64[1] = sHi; ++ src.w64[0] = sLo; ++ ++ switch (insSz) { ++ case 0b00: { ++ for (i = 0; i < 16; i++) { ++ if ((Char)src.w8[i] < 0) ++ break; ++ } ++ break; ++ } ++ case 0b01: { ++ for (i = 0; i < 8; i++) { ++ if ((Short)src.w16[i] < 0) ++ break; ++ } ++ break; ++ } ++ default: ++ vassert(0); ++ break; ++ } ++ ++ return (ULong)i; ++} ++ +#if defined(__loongarch__) +#define ASM_VOLATILE_UNARY(inst) \ + __asm__ volatile("movfcsr2gr $s0, $r0 \n\t" \ @@ -2291,10 +2170,10 @@ index 0000000..d65cf70 +/*---------------------------------------------------------------*/ diff --git a/VEX/priv/guest_loongarch64_toIR.c b/VEX/priv/guest_loongarch64_toIR.c new file mode 100644 -index 0000000..1a9a2c0 +index 0000000..50c24f1 --- /dev/null +++ b/VEX/priv/guest_loongarch64_toIR.c -@@ -0,0 +1,9694 @@ +@@ -0,0 +1,12086 @@ + +/*--------------------------------------------------------------------*/ +/*--- begin guest_loongarch64_toIR.c ---*/ @@ -2419,6 +2298,30 @@ index 0000000..1a9a2c0 + return reg_names[reg]; +} + ++static const HChar* nameVReg( UInt reg ) ++{ ++ vassert(reg < 32); ++ static const HChar* reg_names[32] = { ++ "$vr0", "$vr1", "$vr2", "$vr3", "$vr4", "$vr5", "$vr6", "$vr7", ++ "$vr8", "$vr9", "$vr10", "$vr11", "$vr12", "$vr13", "$vr14", "$vr15", ++ "$vr16", "$vr17", "$vr18", "$vr19", "$vr20", "$vr21", "$vr22", "$vr23", ++ "$vr24", "$vr25", "$vr26", "$vr27", "$vr28", "$vr29", "$vr30", "$vr31" ++ }; ++ return reg_names[reg]; ++} ++ ++static const HChar* nameXReg( UInt reg ) ++{ ++ vassert(reg < 32); ++ static const HChar* reg_names[32] = { ++ "$xr0", "$xr1", "$xr2", "$xr3", "$xr4", "$xr5", "$xr6", "$xr7", ++ "$xr8", "$xr9", "$xr10", "$xr11", "$xr12", "$xr13", "$xr14", "$xr15", ++ "$xr16", "$xr17", "$xr18", "$xr19", "$xr20", "$xr21", "$xr22", "$xr23", ++ "$xr24", "$xr25", "$xr26", "$xr27", "$xr28", "$xr29", "$xr30", "$xr31" ++ }; ++ return reg_names[reg]; ++} ++ +static const HChar* nameFCC( UInt reg ) +{ + vassert(reg < 8); @@ -2473,164 +2376,12 @@ index 0000000..1a9a2c0 + return (ULong)(((Long)imm << shift) >> shift); +} + -+static inline UInt get_rd ( UInt insn ) -+{ -+ return SLICE(insn, 4, 0); -+} -+ -+static inline UInt get_rj ( UInt insn ) -+{ -+ return SLICE(insn, 9, 5); -+} -+ -+static inline UInt get_rk ( UInt insn ) -+{ -+ return SLICE(insn, 14, 10); -+} -+ -+static inline UInt get_code ( UInt insn ) -+{ -+ return SLICE(insn, 14, 0); -+} -+ -+static inline UInt get_ui5 ( UInt insn ) -+{ -+ return SLICE(insn, 14, 10); -+} -+ -+static inline UInt get_ui6 ( UInt insn ) -+{ -+ return SLICE(insn, 15, 10); -+} -+ -+static inline UInt get_sa2 ( UInt insn ) -+{ -+ return SLICE(insn, 16, 15); -+} -+ -+static inline UInt get_sa3 ( UInt insn ) -+{ -+ return SLICE(insn, 17, 15); -+} -+ -+static inline UInt get_lsbw ( UInt insn ) -+{ -+ return SLICE(insn, 14, 10); -+} -+ -+static inline UInt get_msbw ( UInt insn ) -+{ -+ return SLICE(insn, 20, 16); -+} -+ -+static inline UInt get_lsbd ( UInt insn ) -+{ -+ return SLICE(insn, 15, 10); -+} -+ -+static inline UInt get_msbd ( UInt insn ) -+{ -+ return SLICE(insn, 21, 16); -+} -+ -+static inline UInt get_si12 ( UInt insn ) -+{ -+ return SLICE(insn, 21, 10); -+} -+ -+static inline UInt get_ui12 ( UInt insn ) -+{ -+ return SLICE(insn, 21, 10); -+} -+ -+static inline UInt get_si14 ( UInt insn ) -+{ -+ return SLICE(insn, 23, 10); -+} -+ -+static inline UInt get_si16 ( UInt insn ) -+{ -+ return SLICE(insn, 25, 10); -+} -+ -+static inline UInt get_si20 ( UInt insn ) -+{ -+ return SLICE(insn, 24, 5); -+} -+ -+static inline UInt get_hint5 ( UInt insn ) -+{ -+ return SLICE(insn, 4, 0); -+} -+ -+static inline UInt get_hint15 ( UInt insn ) -+{ -+ return SLICE(insn, 14, 0); -+} -+ -+static inline UInt get_offs16 ( UInt insn ) -+{ -+ return SLICE(insn, 25, 10); -+} -+ -+static inline UInt get_offs21 ( UInt insn ) -+{ -+ return (SLICE(insn, 4, 0) << 16) | SLICE(insn, 25, 10); -+} -+ -+static inline UInt get_offs26 ( UInt insn ) -+{ -+ return (SLICE(insn, 9, 0) << 16) | SLICE(insn, 25, 10); -+} -+ -+static inline UInt get_fd ( UInt insn ) -+{ -+ return SLICE(insn, 4, 0); -+} -+ -+static inline UInt get_fj ( UInt insn ) -+{ -+ return SLICE(insn, 9, 5); -+} -+ -+static inline UInt get_fk ( UInt insn ) -+{ -+ return SLICE(insn, 14, 10); -+} -+ -+static inline UInt get_fa ( UInt insn ) -+{ -+ return SLICE(insn, 19, 15); -+} -+ -+static inline UInt get_cond ( UInt insn ) -+{ -+ return SLICE(insn, 19, 15); -+} -+ -+static inline UInt get_fcsrl ( UInt insn ) -+{ -+ return SLICE(insn, 4, 0); -+} -+ -+static inline UInt get_fcsrh ( UInt insn ) -+{ -+ return SLICE(insn, 9, 5); -+} -+ -+static inline UInt get_cd ( UInt insn ) -+{ -+ return SLICE(insn, 2, 0); -+} -+ -+static inline UInt get_cj ( UInt insn ) -+{ -+ return SLICE(insn, 7, 5); -+} -+ -+static inline UInt get_ca ( UInt insn ) -+{ -+ return SLICE(insn, 17, 15); ++/* Get the suffix of the insn */ ++static const HChar *mkInsSize ( UInt size ) { ++ const HChar *insSize[8] ++ = { "b", "h", "w", "d", "bu", "hu", "wu", "du" }; ++ vassert(size < 8); ++ return insSize[size]; +} + + @@ -2648,22 +2399,19 @@ index 0000000..1a9a2c0 + return IRExpr_Const(IRConst_U32(i)); +} + -+static inline IRExpr* mkU16 ( UInt i ) ++static inline IRExpr* mkU16 ( UShort i ) +{ -+ vassert(i < 65536); + return IRExpr_Const(IRConst_U16(i)); +} + -+static inline IRExpr* mkU8 ( UInt i ) ++static inline IRExpr* mkU8 ( UChar i ) +{ -+ vassert(i < 256); -+ return IRExpr_Const(IRConst_U8((UChar)i)); ++ return IRExpr_Const(IRConst_U8(i)); +} + -+static inline IRExpr* mkU1 ( UInt i ) ++static inline IRExpr* mkU1 ( Bool i ) +{ -+ vassert(i == 0 || i == 1); -+ return IRExpr_Const(IRConst_U1((Bool)i)); ++ return IRExpr_Const(IRConst_U1(i)); +} + +static inline IRExpr* mkF64i ( ULong i ) @@ -2676,6 +2424,11 @@ index 0000000..1a9a2c0 + return IRExpr_Const(IRConst_F32i(i)); +} + ++static inline IRExpr* mkV128 ( UShort i ) ++{ ++ return IRExpr_Const(IRConst_V128(i)); ++} ++ +static inline IRExpr* mkexpr ( IRTemp tmp ) +{ + return IRExpr_RdTmp(tmp); @@ -2787,6 +2540,108 @@ index 0000000..1a9a2c0 + } +} + ++/* Break a V128-bit value up into four 32-bit ints. */ ++static void breakupV128to32s ( IRTemp t128, ++ IRTemp* t3, IRTemp* t2, ++ IRTemp* t1, IRTemp* t0 ) ++{ ++ IRTemp hi64 = newTemp(Ity_I64); ++ IRTemp lo64 = newTemp(Ity_I64); ++ assign(hi64, unop(Iop_V128HIto64, mkexpr(t128))); ++ assign(lo64, unop(Iop_V128to64, mkexpr(t128))); ++ ++ vassert(t0 && *t0 == IRTemp_INVALID); ++ vassert(t1 && *t1 == IRTemp_INVALID); ++ vassert(t2 && *t2 == IRTemp_INVALID); ++ vassert(t3 && *t3 == IRTemp_INVALID); ++ *t0 = newTemp(Ity_I32); ++ *t1 = newTemp(Ity_I32); ++ *t2 = newTemp(Ity_I32); ++ *t3 = newTemp(Ity_I32); ++ assign(*t0, unop(Iop_64to32, mkexpr(lo64))); ++ assign(*t1, unop(Iop_64HIto32, mkexpr(lo64))); ++ assign(*t2, unop(Iop_64to32, mkexpr(hi64))); ++ assign(*t3, unop(Iop_64HIto32, mkexpr(hi64))); ++} ++ ++/* Break a V256-bit value up into four 64-bit ints. */ ++static void breakupV256to64s ( IRTemp t256, ++ IRTemp* t3, IRTemp* t2, ++ IRTemp* t1, IRTemp* t0 ) ++{ ++ vassert(t0 && *t0 == IRTemp_INVALID); ++ vassert(t1 && *t1 == IRTemp_INVALID); ++ vassert(t2 && *t2 == IRTemp_INVALID); ++ vassert(t3 && *t3 == IRTemp_INVALID); ++ *t0 = newTemp(Ity_I64); ++ *t1 = newTemp(Ity_I64); ++ *t2 = newTemp(Ity_I64); ++ *t3 = newTemp(Ity_I64); ++ assign(*t0, unop(Iop_V256to64_0, mkexpr(t256))); ++ assign(*t1, unop(Iop_V256to64_1, mkexpr(t256))); ++ assign(*t2, unop(Iop_V256to64_2, mkexpr(t256))); ++ assign(*t3, unop(Iop_V256to64_3, mkexpr(t256))); ++} ++ ++/* Break a V256-bit value up into two V128s. */ ++static void breakupV256toV128s ( IRTemp t256, ++ IRTemp* hi, IRTemp* lo ) ++{ ++ vassert(hi && *hi == IRTemp_INVALID); ++ vassert(lo && *lo == IRTemp_INVALID); ++ *hi = newTemp(Ity_V128); ++ *lo = newTemp(Ity_V128); ++ assign(*hi, unop(Iop_V256toV128_1, mkexpr(t256))); ++ assign(*lo, unop(Iop_V256toV128_0, mkexpr(t256))); ++} ++ ++/* Break a V256-bit value up into eight 32-bit ints. */ ++static void breakupV256to32s ( IRTemp t256, ++ IRTemp* t7, IRTemp* t6, ++ IRTemp* t5, IRTemp* t4, ++ IRTemp* t3, IRTemp* t2, ++ IRTemp* t1, IRTemp* t0 ) ++{ ++ IRTemp t128_1 = IRTemp_INVALID; ++ IRTemp t128_0 = IRTemp_INVALID; ++ breakupV256toV128s(t256, &t128_1, &t128_0); ++ breakupV128to32s(t128_1, t7, t6, t5, t4); ++ breakupV128to32s(t128_0, t3, t2, t1, t0); ++} ++ ++/* Construct a V256-bit value from four 64-bit ints. */ ++static IRExpr* mkV256from64s ( IRTemp t3, IRTemp t2, ++ IRTemp t1, IRTemp t0 ) ++{ ++ return binop(Iop_V128HLtoV256, ++ binop(Iop_64HLtoV128, mkexpr(t3), mkexpr(t2)), ++ binop(Iop_64HLtoV128, mkexpr(t1), mkexpr(t0))); ++} ++ ++/* Construct a V256-bit value from eight 32-bit ints. */ ++static IRExpr* mkV256from32s ( IRTemp t7, IRTemp t6, ++ IRTemp t5, IRTemp t4, ++ IRTemp t3, IRTemp t2, ++ IRTemp t1, IRTemp t0 ) ++{ ++ return binop(Iop_V128HLtoV256, ++ binop(Iop_64HLtoV128, ++ binop(Iop_32HLto64, mkexpr(t7), mkexpr(t6)), ++ binop(Iop_32HLto64, mkexpr(t5), mkexpr(t4))), ++ binop(Iop_64HLtoV128, ++ binop(Iop_32HLto64, mkexpr(t3), mkexpr(t2)), ++ binop(Iop_32HLto64, mkexpr(t1), mkexpr(t0))) ++ ); ++} ++ ++static IROp mkVecGetElem ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_GetElem8x16, Iop_GetElem16x8, ++ Iop_GetElem32x4, Iop_GetElem64x2 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ + +/*------------------------------------------------------------*/ +/*--- Helpers for accessing guest registers. ---*/ @@ -2866,43 +2721,43 @@ index 0000000..1a9a2c0 + stmt(IRStmt_Put(offsetof(VexGuestLOONGARCH64State, guest_PC), e)); +} + -+/* ---------------- Floating point registers ---------------- */ ++/* ---------------- Floating point / vector registers ---------------- */ + -+static Int offsetFReg ( UInt iregNo ) ++static Int offsetXReg ( UInt iregNo ) +{ + switch (iregNo) { -+ case 0: return offsetof(VexGuestLOONGARCH64State, guest_F0); -+ case 1: return offsetof(VexGuestLOONGARCH64State, guest_F1); -+ case 2: return offsetof(VexGuestLOONGARCH64State, guest_F2); -+ case 3: return offsetof(VexGuestLOONGARCH64State, guest_F3); -+ case 4: return offsetof(VexGuestLOONGARCH64State, guest_F4); -+ case 5: return offsetof(VexGuestLOONGARCH64State, guest_F5); -+ case 6: return offsetof(VexGuestLOONGARCH64State, guest_F6); -+ case 7: return offsetof(VexGuestLOONGARCH64State, guest_F7); -+ case 8: return offsetof(VexGuestLOONGARCH64State, guest_F8); -+ case 9: return offsetof(VexGuestLOONGARCH64State, guest_F9); -+ case 10: return offsetof(VexGuestLOONGARCH64State, guest_F10); -+ case 11: return offsetof(VexGuestLOONGARCH64State, guest_F11); -+ case 12: return offsetof(VexGuestLOONGARCH64State, guest_F12); -+ case 13: return offsetof(VexGuestLOONGARCH64State, guest_F13); -+ case 14: return offsetof(VexGuestLOONGARCH64State, guest_F14); -+ case 15: return offsetof(VexGuestLOONGARCH64State, guest_F15); -+ case 16: return offsetof(VexGuestLOONGARCH64State, guest_F16); -+ case 17: return offsetof(VexGuestLOONGARCH64State, guest_F17); -+ case 18: return offsetof(VexGuestLOONGARCH64State, guest_F18); -+ case 19: return offsetof(VexGuestLOONGARCH64State, guest_F19); -+ case 20: return offsetof(VexGuestLOONGARCH64State, guest_F20); -+ case 21: return offsetof(VexGuestLOONGARCH64State, guest_F21); -+ case 22: return offsetof(VexGuestLOONGARCH64State, guest_F22); -+ case 23: return offsetof(VexGuestLOONGARCH64State, guest_F23); -+ case 24: return offsetof(VexGuestLOONGARCH64State, guest_F24); -+ case 25: return offsetof(VexGuestLOONGARCH64State, guest_F25); -+ case 26: return offsetof(VexGuestLOONGARCH64State, guest_F26); -+ case 27: return offsetof(VexGuestLOONGARCH64State, guest_F27); -+ case 28: return offsetof(VexGuestLOONGARCH64State, guest_F28); -+ case 29: return offsetof(VexGuestLOONGARCH64State, guest_F29); -+ case 30: return offsetof(VexGuestLOONGARCH64State, guest_F30); -+ case 31: return offsetof(VexGuestLOONGARCH64State, guest_F31); ++ case 0: return offsetof(VexGuestLOONGARCH64State, guest_X0); ++ case 1: return offsetof(VexGuestLOONGARCH64State, guest_X1); ++ case 2: return offsetof(VexGuestLOONGARCH64State, guest_X2); ++ case 3: return offsetof(VexGuestLOONGARCH64State, guest_X3); ++ case 4: return offsetof(VexGuestLOONGARCH64State, guest_X4); ++ case 5: return offsetof(VexGuestLOONGARCH64State, guest_X5); ++ case 6: return offsetof(VexGuestLOONGARCH64State, guest_X6); ++ case 7: return offsetof(VexGuestLOONGARCH64State, guest_X7); ++ case 8: return offsetof(VexGuestLOONGARCH64State, guest_X8); ++ case 9: return offsetof(VexGuestLOONGARCH64State, guest_X9); ++ case 10: return offsetof(VexGuestLOONGARCH64State, guest_X10); ++ case 11: return offsetof(VexGuestLOONGARCH64State, guest_X11); ++ case 12: return offsetof(VexGuestLOONGARCH64State, guest_X12); ++ case 13: return offsetof(VexGuestLOONGARCH64State, guest_X13); ++ case 14: return offsetof(VexGuestLOONGARCH64State, guest_X14); ++ case 15: return offsetof(VexGuestLOONGARCH64State, guest_X15); ++ case 16: return offsetof(VexGuestLOONGARCH64State, guest_X16); ++ case 17: return offsetof(VexGuestLOONGARCH64State, guest_X17); ++ case 18: return offsetof(VexGuestLOONGARCH64State, guest_X18); ++ case 19: return offsetof(VexGuestLOONGARCH64State, guest_X19); ++ case 20: return offsetof(VexGuestLOONGARCH64State, guest_X20); ++ case 21: return offsetof(VexGuestLOONGARCH64State, guest_X21); ++ case 22: return offsetof(VexGuestLOONGARCH64State, guest_X22); ++ case 23: return offsetof(VexGuestLOONGARCH64State, guest_X23); ++ case 24: return offsetof(VexGuestLOONGARCH64State, guest_X24); ++ case 25: return offsetof(VexGuestLOONGARCH64State, guest_X25); ++ case 26: return offsetof(VexGuestLOONGARCH64State, guest_X26); ++ case 27: return offsetof(VexGuestLOONGARCH64State, guest_X27); ++ case 28: return offsetof(VexGuestLOONGARCH64State, guest_X28); ++ case 29: return offsetof(VexGuestLOONGARCH64State, guest_X29); ++ case 30: return offsetof(VexGuestLOONGARCH64State, guest_X30); ++ case 31: return offsetof(VexGuestLOONGARCH64State, guest_X31); + default: vassert(0); + } +} @@ -2922,18 +2777,47 @@ index 0000000..1a9a2c0 + } +} + -+static IRExpr* getFReg64 ( UInt iregNo ) ++/* Find the offset of the laneNo'th lane of type laneTy in the given ++ Xreg. Since the host is little-endian, the least significant lane ++ has the lowest offset. */ ++static Int offsetXRegLane ( UInt xregNo, IRType laneTy, UInt laneNo ) ++{ ++ vassert(host_endness == VexEndnessLE); ++ Int laneSzB; ++ /* Since the host is little-endian, the least significant lane ++ will be at the lowest address. */ ++ switch (laneTy) { ++ case Ity_F32: laneSzB = 4; break; ++ case Ity_F64: laneSzB = 8; break; ++ case Ity_V128: laneSzB = 16; break; ++ case Ity_V256: laneSzB = 32; break; ++ default: vassert(0); break; ++ } ++ return offsetXReg(xregNo) + laneNo * laneSzB; ++} ++ ++static IRExpr* getXReg ( UInt xregNo ) ++{ ++ return IRExpr_Get(offsetXRegLane(xregNo, Ity_V256, 0), Ity_V256); ++} ++ ++static IRExpr* getVReg ( UInt vregNo ) +{ -+ return IRExpr_Get(offsetFReg(iregNo), Ity_F64); ++ return IRExpr_Get(offsetXRegLane(vregNo, Ity_V128, 0), Ity_V128); +} + -+static IRExpr* getFReg32 ( UInt iregNo ) ++static IRExpr* getFReg64 ( UInt fregNo ) ++{ ++ return IRExpr_Get(offsetXRegLane(fregNo, Ity_F64, 0), Ity_F64); ++} ++ ++static IRExpr* getFReg32 ( UInt fregNo ) +{ + /* Get FReg32 from FReg64. -+ We could probably use IRExpr_Get(offsetFReg(iregNo), Ity_F32), ++ We could probably use IRExpr_Get(offsetXRegLane(fregNo, Ity_F32, 0), Ity_F32), + but that would cause Memcheck to report some errors. + */ -+ IRExpr* i = unop(Iop_ReinterpF64asI64, getFReg64(iregNo)); ++ IRExpr* i = unop(Iop_ReinterpF64asI64, getFReg64(fregNo)); + return unop(Iop_ReinterpI32asF32, unop(Iop_64to32, i)); +} + @@ -2979,13 +2863,25 @@ index 0000000..1a9a2c0 +static void putFReg32 ( UInt iregNo, IRExpr* e ) +{ + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_F32); -+ stmt(IRStmt_Put(offsetFReg(iregNo), e)); ++ stmt(IRStmt_Put(offsetXReg(iregNo), e)); +} + +static void putFReg64 ( UInt iregNo, IRExpr* e ) +{ + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_F64); -+ stmt(IRStmt_Put(offsetFReg(iregNo), e)); ++ stmt(IRStmt_Put(offsetXReg(iregNo), e)); ++} ++ ++static void putVReg ( UInt iregNo, IRExpr* e ) ++{ ++ vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_V128); ++ stmt(IRStmt_Put(offsetXReg(iregNo), e)); ++} ++ ++static void putXReg ( UInt iregNo, IRExpr* e ) ++{ ++ vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_V256); ++ stmt(IRStmt_Put(offsetXReg(iregNo), e)); +} + +static void putFCC ( UInt iregNo, IRExpr* e ) @@ -3104,9 +3000,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("add.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3120,9 +3016,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("add.d %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3135,9 +3031,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("sub.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3151,9 +3047,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("sub.d %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3166,9 +3062,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("slt %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3182,9 +3078,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("sltu %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3198,9 +3094,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("slti %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -3216,9 +3112,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("sltui %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -3234,9 +3130,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("nor %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3250,9 +3146,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("and %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3265,9 +3161,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("or %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3280,9 +3176,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("xor %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3295,9 +3191,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("orn %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3311,9 +3207,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("andn %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3327,9 +3223,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("mul.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3343,9 +3239,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("mulh.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3359,9 +3255,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("mulh.wu %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3375,9 +3271,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("mul.d %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3391,9 +3287,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("mulh.d %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3407,9 +3303,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("mulh.du %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3423,9 +3319,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("mulw.d.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3438,9 +3334,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("mulw.d.wu %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3453,9 +3349,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("div.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3469,9 +3365,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("mod.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3485,9 +3381,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("div.wu %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3501,9 +3397,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("mod.wu %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3517,9 +3413,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("div.d %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3532,9 +3428,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("mod.d %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3548,9 +3444,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("div.du %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3563,9 +3459,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("mod.du %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3579,10 +3475,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt sa2 = get_sa2(insn); -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt sa2 = SLICE(insn, 16, 15); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("alsl.w %s, %s, %s, %u\n", nameIReg(rd), nameIReg(rj), + nameIReg(rk), sa2); @@ -3598,10 +3494,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt sa2 = get_sa2(insn); -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt sa2 = SLICE(insn, 16, 15); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("alsl.wu %s, %s, %s, %u\n", nameIReg(rd), nameIReg(rj), + nameIReg(rk), sa2); @@ -3617,10 +3513,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt sa2 = get_sa2(insn); -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt sa2 = SLICE(insn, 16, 15); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("alsl.d %s, %s, %s, %u\n", nameIReg(rd), nameIReg(rj), + nameIReg(rk), sa2); @@ -3635,8 +3531,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si20 = get_si20(insn); -+ UInt rd = get_rd(insn); ++ UInt si20 = SLICE(insn, 24, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("lu12i.w %s, %d\n", nameIReg(rd), (Int)extend32(si20, 20)); + @@ -3650,8 +3546,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si20 = get_si20(insn); -+ UInt rd = get_rd(insn); ++ UInt si20 = SLICE(insn, 24, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("lu32i.d %s, %d\n", nameIReg(rd), (Int)extend32(si20, 20)); + @@ -3667,9 +3563,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("lu52i.d %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -3686,8 +3582,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si20 = get_si20(insn); -+ UInt rd = get_rd(insn); ++ UInt si20 = SLICE(insn, 24, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("pcaddi %s, %d\n", nameIReg(rd), (Int)extend32(si20, 20)); + @@ -3700,8 +3596,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si20 = get_si20(insn); -+ UInt rd = get_rd(insn); ++ UInt si20 = SLICE(insn, 24, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("pcalau12i %s, %d\n", nameIReg(rd), (Int)extend32(si20, 20)); + @@ -3716,8 +3612,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si20 = get_si20(insn); -+ UInt rd = get_rd(insn); ++ UInt si20 = SLICE(insn, 24, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("pcaddu12i %s, %d\n", nameIReg(rd), (Int)extend32(si20, 20)); + @@ -3730,8 +3626,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si20 = get_si20(insn); -+ UInt rd = get_rd(insn); ++ UInt si20 = SLICE(insn, 24, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("pcaddu18i %s, %d\n", nameIReg(rd), (Int)extend32(si20, 20)); + @@ -3744,9 +3640,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("addi.w %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -3762,9 +3658,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("addi.d %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -3779,9 +3675,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si16 = get_si16(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si16 = SLICE(insn, 25, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("addu16i.d %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si16, 16)); @@ -3796,9 +3692,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt ui12 = get_ui12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt ui12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("andi %s, %s, %u\n", nameIReg(rd), nameIReg(rj), ui12); + @@ -3812,9 +3708,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt ui12 = get_ui12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt ui12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ori %s, %s, %u\n", nameIReg(rd), nameIReg(rj), ui12); + @@ -3828,9 +3724,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt ui12 = get_ui12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt ui12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("xori %s, %s, %u\n", nameIReg(rd), nameIReg(rj), ui12); + @@ -3849,9 +3745,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("sll.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3865,9 +3761,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("srl.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3881,9 +3777,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("sra.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3897,9 +3793,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("sll.d %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3912,9 +3808,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("srl.d %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3927,9 +3823,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("sra.d %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3942,9 +3838,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("rotr.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3967,9 +3863,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("rotr.d %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -3991,9 +3887,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt ui5 = get_ui5(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt ui5 = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("slli.w %s, %s, %u\n", nameIReg(rd), nameIReg(rj), ui5); + @@ -4007,9 +3903,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt ui6 = get_ui6(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt ui6 = SLICE(insn, 15, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("slli.d %s, %s, %u\n", nameIReg(rd), nameIReg(rj), ui6); + @@ -4022,9 +3918,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt ui5 = get_ui5(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt ui5 = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("srli.w %s, %s, %u\n", nameIReg(rd), nameIReg(rj), ui5); + @@ -4038,9 +3934,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt ui6 = get_ui6(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt ui6 = SLICE(insn, 15, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("srli.d %s, %s, %u\n", nameIReg(rd), nameIReg(rj), ui6); + @@ -4053,9 +3949,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt ui5 = get_ui5(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt ui5 = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("srai.w %s, %s, %u\n", nameIReg(rd), nameIReg(rj), ui5); + @@ -4069,9 +3965,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt ui6 = get_ui6(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt ui6 = SLICE(insn, 15, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("srai.d %s, %s, %u\n", nameIReg(rd), nameIReg(rj), ui6); + @@ -4084,9 +3980,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt ui5 = get_ui5(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt ui5 = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("rotri.w %s, %s, %u\n", nameIReg(rd), nameIReg(rj), ui5); + @@ -4106,9 +4002,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt ui6 = get_ui6(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt ui6 = SLICE(insn, 15, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("rotri.d %s, %s, %u\n", nameIReg(rd), nameIReg(rj), ui6); + @@ -4132,8 +4028,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ext.w.h %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4146,8 +4042,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ext.w.b %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4160,8 +4056,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("clo.w %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4176,8 +4072,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("clz.w %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4191,8 +4087,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("cto.w %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4207,8 +4103,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ctz.w %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4222,8 +4118,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("clo.d %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4237,8 +4133,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("clz.d %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4251,8 +4147,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("cto.d %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4266,8 +4162,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ctz.d %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4280,8 +4176,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("revb.2h %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4299,8 +4195,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("revb.4h %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4318,8 +4214,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("revb.2w %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4337,8 +4233,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("revb.d %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4356,8 +4252,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("revh.2w %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4375,8 +4271,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("revh.d %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4394,8 +4290,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("bitrev.4b %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4413,8 +4309,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("bitrev.8b %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4432,8 +4328,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("bitrev.w %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4451,8 +4347,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("bitrev.d %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -4470,10 +4366,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt sa2 = get_sa2(insn); -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt sa2 = SLICE(insn, 16, 15); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("bytepick.w %s, %s, %s, %u\n", nameIReg(rd), nameIReg(rj), + nameIReg(rk), sa2); @@ -4495,10 +4391,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt sa3 = get_sa3(insn); -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt sa3 = SLICE(insn, 17, 15); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("bytepick.d %s, %s, %s, %u\n", nameIReg(rd), nameIReg(rj), + nameIReg(rk), sa3); @@ -4519,9 +4415,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("maskeqz %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -4535,9 +4431,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("masknez %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -4551,10 +4447,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt msb = get_msbw(insn); -+ UInt lsb = get_lsbw(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt msb = SLICE(insn, 20, 16); ++ UInt lsb = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("bstrins.w %s, %s, %u, %u\n", nameIReg(rd), nameIReg(rj), msb, lsb); + @@ -4587,10 +4483,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt msb = get_msbw(insn); -+ UInt lsb = get_lsbw(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt msb = SLICE(insn, 20, 16); ++ UInt lsb = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("bstrpick.w %s, %s, %u, %u\n", nameIReg(rd), nameIReg(rj), msb, lsb); + @@ -4605,10 +4501,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt msb = get_msbd(insn); -+ UInt lsb = get_lsbd(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt msb = SLICE(insn, 21, 16); ++ UInt lsb = SLICE(insn, 15, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("bstrins.d %s, %s, %u, %u\n", nameIReg(rd), nameIReg(rj), msb, lsb); + @@ -4640,10 +4536,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt msb = get_msbd(insn); -+ UInt lsb = get_lsbd(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt msb = SLICE(insn, 21, 16); ++ UInt lsb = SLICE(insn, 15, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("bstrpick.d %s, %s, %u, %u\n", nameIReg(rd), nameIReg(rj), msb, lsb); + @@ -4662,9 +4558,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ld.b %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -4679,9 +4575,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ld.h %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -4698,9 +4594,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ld.w %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -4717,9 +4613,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ld.d %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -4736,9 +4632,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("st.b %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -4753,9 +4649,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("st.h %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -4772,9 +4668,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("st.w %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -4791,9 +4687,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("st.d %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -4810,9 +4706,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ld.bu %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -4827,9 +4723,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ld.hu %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -4846,9 +4742,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ld.wu %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -4865,9 +4761,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldx.b %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -4881,9 +4777,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldx.h %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -4899,9 +4795,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldx.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -4917,9 +4813,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldx.d %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -4935,9 +4831,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("stx.b %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -4951,9 +4847,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("stx.h %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -4969,9 +4865,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("stx.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -4987,9 +4883,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("stx.d %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5005,9 +4901,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldx.bu %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5021,9 +4917,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldx.hu %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5039,9 +4935,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldx.wu %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5057,9 +4953,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt hint = get_hint5(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt hint = SLICE(insn, 4, 0); + + DIP("preld %u, %s, %d\n", hint, nameIReg(rj), (Int)extend32(si12, 12)); + @@ -5070,9 +4966,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt hint = get_hint5(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt hint = SLICE(insn, 4, 0); + + DIP("preldx %u, %s, %d\n", hint, nameIReg(rj), (Int)extend32(si12, 12)); + @@ -5083,7 +4979,7 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt hint = get_hint15(insn); ++ UInt hint = SLICE(insn, 14, 0); + + DIP("dbar %u\n", hint); + @@ -5096,7 +4992,7 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt hint = get_hint15(insn); ++ UInt hint = SLICE(insn, 14, 0); + + DIP("ibar %u\n", hint); + @@ -5109,9 +5005,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si14 = get_si14(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si14 = SLICE(insn, 23, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldptr.w %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si14, 14)); @@ -5129,9 +5025,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si14 = get_si14(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si14 = SLICE(insn, 23, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("stptr.w %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si14, 14)); @@ -5149,9 +5045,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si14 = get_si14(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si14 = SLICE(insn, 23, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldptr.d %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si14, 14)); @@ -5169,9 +5065,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si14 = get_si14(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si14 = SLICE(insn, 23, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("stptr.d %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si14, 14)); @@ -5189,9 +5085,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldgt.b %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5207,9 +5103,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldgt.h %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5226,9 +5122,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldgt.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5245,9 +5141,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldgt.d %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5264,9 +5160,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldle.b %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5282,9 +5178,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldle.h %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5301,9 +5197,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldle.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5320,9 +5216,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ldle.d %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5339,9 +5235,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("stgt.b %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5357,9 +5253,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("stgt.h %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5376,9 +5272,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("stgt.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5395,9 +5291,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("stgt.d %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5414,9 +5310,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("stle.b %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5432,9 +5328,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("stle.h %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5451,9 +5347,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("stle.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5470,9 +5366,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("stle.d %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -5611,9 +5507,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si14 = get_si14(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si14 = SLICE(insn, 23, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ll.w %s, %s, %d%s\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si14, 14), @@ -5638,9 +5534,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si14 = get_si14(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si14 = SLICE(insn, 23, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("sc.w %s, %s, %d%s\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si14, 14), @@ -5664,9 +5560,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si14 = get_si14(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si14 = SLICE(insn, 23, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ll.d %s, %s, %d%s\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si14, 14), @@ -5691,9 +5587,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si14 = get_si14(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt si14 = SLICE(insn, 23, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("sc.d %s, %s, %d%s\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(si14, 14), @@ -5855,9 +5751,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amswap.w %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -5874,9 +5770,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amswap.d %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -5893,9 +5789,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amadd.w %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -5912,9 +5808,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amadd.d %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -5931,9 +5827,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amand.w %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -5950,9 +5846,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amand.d %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -5969,9 +5865,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amor.w %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -5988,9 +5884,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amor.d %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6007,9 +5903,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amxor.w %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6026,9 +5922,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amxor.d %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6045,9 +5941,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ammax.w %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6064,9 +5960,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ammax.d %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6083,9 +5979,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ammin.w %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6102,9 +5998,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ammin.d %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6121,9 +6017,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ammax.wu %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6140,9 +6036,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ammax.du %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6159,9 +6055,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ammin.wu %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6178,9 +6074,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ammin.du %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6197,9 +6093,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amswap_db.w %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6216,9 +6112,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amswap_db.d %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6235,9 +6131,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amadd_db.w %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6254,9 +6150,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amadd_db.d %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6273,9 +6169,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amand_db.w %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6292,9 +6188,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amand_db.d %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6311,9 +6207,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amor_db.w %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6330,9 +6226,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amor_db.d %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6349,9 +6245,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amxor_db.w %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6368,9 +6264,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("amxor_db.d %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6387,9 +6283,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ammax_db.w %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6406,9 +6302,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ammax_db.d %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6425,9 +6321,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ammin_db.w %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6444,9 +6340,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ammin_db.d %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6463,9 +6359,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ammax_db.wu %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6482,9 +6378,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ammax_db.du %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6501,9 +6397,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ammin_db.wu %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6520,9 +6416,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("ammin_db.du %s, %s, %s\n", nameIReg(rd), nameIReg(rk), nameIReg(rj)); + @@ -6544,9 +6440,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("crc.w.b.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -6564,9 +6460,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("crc.w.h.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -6584,9 +6480,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("crc.w.w.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -6604,9 +6500,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("crc.w.d.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -6624,9 +6520,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("crcc.w.b.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -6644,9 +6540,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("crcc.w.h.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -6664,9 +6560,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("crcc.w.w.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -6684,9 +6580,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("crcc.w.d.w %s, %s, %s\n", nameIReg(rd), nameIReg(rj), nameIReg(rk)); + @@ -6704,7 +6600,7 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt code = get_code(insn); ++ UInt code = SLICE(insn, 14, 0); + + DIP("break %u\n", code); + @@ -6735,7 +6631,7 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt hint = get_hint15(insn); ++ UInt hint = SLICE(insn, 14, 0); + + DIP("syscall %u\n", hint); + @@ -6751,8 +6647,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); + + DIP("asrtle.d %s, %s\n", nameIReg(rj), nameIReg(rk)); + @@ -6765,8 +6661,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); + + DIP("asrtgt.d %s, %s\n", nameIReg(rj), nameIReg(rk)); + @@ -6779,8 +6675,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("rdtimel.w %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -6793,8 +6689,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("rdtimeh.w %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -6807,8 +6703,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("rdtime.d %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -6821,8 +6717,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("cpucfg %s, %s\n", nameIReg(rd), nameIReg(rj)); + @@ -6851,9 +6747,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fadd.s %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -6874,9 +6770,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fadd.d %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -6897,9 +6793,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fsub.s %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -6920,9 +6816,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fsub.d %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -6943,9 +6839,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fmul.s %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -6966,9 +6862,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fmul.d %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -6989,9 +6885,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fdiv.s %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -7012,9 +6908,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fdiv.d %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -7035,10 +6931,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fa = get_fa(insn); -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fa = SLICE(insn, 19, 15); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fmadd.s %s, %s, %s, %s\n", nameFReg(fd), nameFReg(fj), + nameFReg(fk), nameFReg(fa)); @@ -7061,10 +6957,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fa = get_fa(insn); -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fa = SLICE(insn, 19, 15); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fmadd.d %s, %s, %s, %s\n", nameFReg(fd), nameFReg(fj), + nameFReg(fk), nameFReg(fa)); @@ -7087,10 +6983,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fa = get_fa(insn); -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fa = SLICE(insn, 19, 15); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fmsub.s %s, %s, %s, %s\n", nameFReg(fd), nameFReg(fj), + nameFReg(fk), nameFReg(fa)); @@ -7113,10 +7009,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fa = get_fa(insn); -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fa = SLICE(insn, 19, 15); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fmsub.d %s, %s, %s, %s\n", nameFReg(fd), nameFReg(fj), + nameFReg(fk), nameFReg(fa)); @@ -7139,10 +7035,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fa = get_fa(insn); -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fa = SLICE(insn, 19, 15); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fnmadd.s %s, %s, %s, %s\n", nameFReg(fd), nameFReg(fj), + nameFReg(fk), nameFReg(fa)); @@ -7166,10 +7062,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fa = get_fa(insn); -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fa = SLICE(insn, 19, 15); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fnmadd.d %s, %s, %s, %s\n", nameFReg(fd), nameFReg(fj), + nameFReg(fk), nameFReg(fa)); @@ -7193,10 +7089,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fa = get_fa(insn); -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fa = SLICE(insn, 19, 15); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fnmsub.s %s, %s, %s, %s\n", nameFReg(fd), nameFReg(fj), + nameFReg(fk), nameFReg(fa)); @@ -7220,10 +7116,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fa = get_fa(insn); -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fa = SLICE(insn, 19, 15); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fnmsub.d %s, %s, %s, %s\n", nameFReg(fd), nameFReg(fj), + nameFReg(fk), nameFReg(fa)); @@ -7247,9 +7143,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fmax.s %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -7269,9 +7165,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fmax.d %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -7291,9 +7187,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fmin.s %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -7313,9 +7209,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fmin.d %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -7335,9 +7231,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fmaxa.s %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -7357,9 +7253,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fmaxa.d %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -7379,9 +7275,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fmina.s %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -7401,9 +7297,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fmina.d %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -7423,8 +7319,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fabs.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -7444,8 +7340,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fabs.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -7465,8 +7361,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fneg.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -7486,8 +7382,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fneg.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -7507,8 +7403,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fsqrt.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -7529,8 +7425,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fsqrt.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -7551,8 +7447,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("frecip.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -7573,8 +7469,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("frecip.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -7595,8 +7491,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("frsqrt.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -7617,8 +7513,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("frsqrt.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -7639,9 +7535,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fscaleb.s %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -7662,9 +7558,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fscaleb.d %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -7685,8 +7581,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("flogb.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -7707,8 +7603,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("flogb.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -7729,9 +7625,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fcopysign.s %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -7757,9 +7653,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fcopysign.d %s, %s, %s\n", nameFReg(fd), nameFReg(fj), nameFReg(fk)); + @@ -7785,8 +7681,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fclass.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -7810,8 +7706,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fclass.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -7878,7 +7774,7 @@ index 0000000..1a9a2c0 + IRExpr* e; + switch (op) { + case FCMP_CAF_S: case FCMP_CAF_D: case FCMP_SAF_S: case FCMP_SAF_D: -+ e = mkU1(0); ++ e = mkU1(False); + break; + case FCMP_CLT_S: case FCMP_CLT_D: case FCMP_SLT_S: case FCMP_SLT_D: + e = is_LT(mkexpr(result)); @@ -7930,9 +7826,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.caf.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -7949,9 +7845,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.caf.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -7968,9 +7864,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.saf.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -7987,9 +7883,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.saf.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8006,9 +7902,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.clt.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8025,9 +7921,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.clt.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8044,9 +7940,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.slt.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8063,9 +7959,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.slt.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8082,9 +7978,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.ceq.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8101,9 +7997,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.ceq.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8120,9 +8016,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.seq.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8139,9 +8035,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.seq.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8158,9 +8054,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.cle.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8177,9 +8073,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.cle.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8196,9 +8092,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.sle.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8215,9 +8111,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.sle.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8234,9 +8130,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.cun.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8253,9 +8149,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.cun.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8272,9 +8168,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.sun.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8291,9 +8187,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.sun.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8310,9 +8206,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.cult.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8329,9 +8225,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.cult.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8348,9 +8244,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.sult.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8367,9 +8263,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.sult.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8386,9 +8282,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.cueq.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8405,9 +8301,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.cueq.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8424,9 +8320,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.sueq.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8443,9 +8339,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.sueq.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8462,9 +8358,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.cule.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8481,9 +8377,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.cule.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8500,9 +8396,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.sule.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8519,9 +8415,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.sule.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8538,9 +8434,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.cne.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8557,9 +8453,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.cne.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8576,9 +8472,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.sne.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8595,9 +8491,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.sne.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8614,9 +8510,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.cor.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8633,9 +8529,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.cor.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8652,9 +8548,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.sor.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8671,9 +8567,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.sor.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8690,9 +8586,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.cune.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8709,9 +8605,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.cune.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8728,9 +8624,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.sune.s %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8747,9 +8643,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("fcmp.sune.d %s, %s, %s\n", nameFCC(cd), nameFReg(fj), nameFReg(fk)); + @@ -8896,8 +8792,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fcvt.s.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -8918,8 +8814,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fcvt.d.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -8939,8 +8835,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftintrm.w.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -8957,8 +8853,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftintrm.w.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -8975,8 +8871,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftintrm.l.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -8993,8 +8889,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftintrm.l.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9011,8 +8907,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftintrp.w.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9029,8 +8925,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftintrp.w.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9047,8 +8943,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftintrp.l.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9065,8 +8961,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftintrp.l.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9083,8 +8979,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftintrz.w.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9101,8 +8997,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftintrz.w.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9119,8 +9015,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftintrz.l.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9137,8 +9033,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftintrz.l.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9155,8 +9051,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftintrne.w.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9173,8 +9069,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftintrne.w.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9191,8 +9087,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftintrne.l.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9209,8 +9105,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftintrne.l.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9227,8 +9123,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftint.w.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9245,8 +9141,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftint.w.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9263,8 +9159,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftint.l.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9281,8 +9177,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ftint.l.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9299,8 +9195,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ffint.s.w %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9322,8 +9218,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ffint.s.l %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9345,8 +9241,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ffint.d.w %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9367,8 +9263,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("ffint.d.l %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9390,8 +9286,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("frint.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9412,8 +9308,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("frint.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9439,8 +9335,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fmov.s %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9459,8 +9355,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fmov.d %s, %s\n", nameFReg(fd), nameFReg(fj)); + @@ -9479,10 +9375,10 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt ca = get_ca(insn); -+ UInt fk = get_fk(insn); -+ UInt fj = get_fj(insn); -+ UInt fd = get_fd(insn); ++ UInt ca = SLICE(insn, 17, 15); ++ UInt fk = SLICE(insn, 14, 10); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fsel %s, %s, %s, %s\n", nameFReg(fd), nameFReg(fj), + nameFReg(fk), nameFCC(ca)); @@ -9504,8 +9400,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("movgr2fr.w %s, %s\n", nameFReg(fd), nameIReg(rj)); + @@ -9526,8 +9422,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("movgr2fr.d %s, %s\n", nameFReg(fd), nameIReg(rj)); + @@ -9546,8 +9442,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("movgr2frh.w %s, %s\n", nameFReg(fd), nameIReg(rj)); + @@ -9571,8 +9467,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt rd = get_rd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("movfr2gr.s %s, %s\n", nameIReg(rd), nameFReg(fj)); + @@ -9592,8 +9488,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt rd = get_rd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("movfr2gr.d %s, %s\n", nameIReg(rd), nameFReg(fj)); + @@ -9612,8 +9508,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt rd = get_rd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("movfrh2gr.s %s, %s\n", nameIReg(rd), nameFReg(fj)); + @@ -9634,8 +9530,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt fcsr = get_fcsrl(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fcsr = SLICE(insn, 4, 0); + + DIP("movgr2fcsr %s, %s\n", nameFCSR(fcsr), nameIReg(rj)); + @@ -9654,8 +9550,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fcsr = get_fcsrh(insn); -+ UInt rd = get_rd(insn); ++ UInt fcsr = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("movfcsr2gr %s, %s\n", nameIReg(rd), nameFCSR(fcsr)); + @@ -9674,8 +9570,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt fj = get_fj(insn); -+ UInt cd = get_cd(insn); ++ UInt fj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("movfr2cf %s, %s\n", nameFCC(cd), nameFReg(fj)); + @@ -9696,8 +9592,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt cj = get_cj(insn); -+ UInt fd = get_fd(insn); ++ UInt cj = SLICE(insn, 7, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("movcf2fr %s, %s\n", nameFReg(fd), nameFCC(cj)); + @@ -9719,8 +9615,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rj = get_rj(insn); -+ UInt cd = get_cd(insn); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt cd = SLICE(insn, 2, 0); + + DIP("movgr2cf %s, %s\n", nameFCC(cd), nameIReg(rj)); + @@ -9740,8 +9636,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt cj = get_cj(insn); -+ UInt rd = get_rd(insn); ++ UInt cj = SLICE(insn, 7, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("movcf2gr %s, %s\n", nameIReg(rd), nameFCC(cj)); + @@ -9767,9 +9663,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fld.s %s, %s, %d\n", nameFReg(fd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -9792,9 +9688,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fst.s %s, %s, %d\n", nameFReg(fd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -9817,9 +9713,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fld.d %s, %s, %d\n", nameFReg(fd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -9842,9 +9738,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt si12 = get_si12(insn); -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fst.d %s, %s, %d\n", nameFReg(fd), nameIReg(rj), + (Int)extend32(si12, 12)); @@ -9867,9 +9763,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fldx.s %s, %s, %s\n", nameFReg(fd), nameIReg(rj), nameIReg(rk)); + @@ -9891,9 +9787,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fldx.d %s, %s, %s\n", nameFReg(fd), nameIReg(rj), nameIReg(rk)); + @@ -9915,9 +9811,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fstx.s %s, %s, %s\n", nameFReg(fd), nameIReg(rj), nameIReg(rk)); + @@ -9939,9 +9835,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fstx.d %s, %s, %s\n", nameFReg(fd), nameIReg(rj), nameIReg(rk)); + @@ -9963,9 +9859,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fldgt.s %s, %s, %s\n", nameFReg(fd), nameIReg(rj), nameIReg(rk)); + @@ -9988,9 +9884,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fldgt.d %s, %s, %s\n", nameFReg(fd), nameIReg(rj), nameIReg(rk)); + @@ -10013,9 +9909,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fldle.s %s, %s, %s\n", nameFReg(fd), nameIReg(rj), nameIReg(rk)); + @@ -10038,9 +9934,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fldle.d %s, %s, %s\n", nameFReg(fd), nameIReg(rj), nameIReg(rk)); + @@ -10063,9 +9959,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fstgt.s %s, %s, %s\n", nameFReg(fd), nameIReg(rj), nameIReg(rk)); + @@ -10088,9 +9984,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fstgt.d %s, %s, %s\n", nameFReg(fd), nameIReg(rj), nameIReg(rk)); + @@ -10113,9 +10009,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fstle.s %s, %s, %s\n", nameFReg(fd), nameIReg(rj), nameIReg(rk)); + @@ -10138,9 +10034,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt rk = get_rk(insn); -+ UInt rj = get_rj(insn); -+ UInt fd = get_fd(insn); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt fd = SLICE(insn, 4, 0); + + DIP("fstle.d %s, %s, %s\n", nameFReg(fd), nameIReg(rj), nameIReg(rk)); + @@ -10168,8 +10064,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt offs21 = get_offs21(insn); -+ UInt rj = get_rj(insn); ++ UInt offs21 = (SLICE(insn, 4, 0) << 16) | SLICE(insn, 25, 10); ++ UInt rj = SLICE(insn, 9, 5); + + DIP("beqz %s, %d\n", nameIReg(rj), (Int)extend32(offs21, 21)); + @@ -10183,8 +10079,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt offs21 = get_offs21(insn); -+ UInt rj = get_rj(insn); ++ UInt offs21 = (SLICE(insn, 4, 0) << 16) | SLICE(insn, 25, 10); ++ UInt rj = SLICE(insn, 9, 5); + + DIP("bnez %s, %d\n", nameIReg(rj), (Int)extend32(offs21, 21)); + @@ -10198,8 +10094,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt offs21 = get_offs21(insn); -+ UInt cj = get_cj(insn); ++ UInt offs21 = (SLICE(insn, 4, 0) << 16) | SLICE(insn, 25, 10); ++ UInt cj = SLICE(insn, 7, 5); + + DIP("bceqz %s, %d\n", nameFCC(cj), (Int)extend32(offs21, 21)); + @@ -10220,8 +10116,8 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt offs21 = get_offs21(insn); -+ UInt cj = get_cj(insn); ++ UInt offs21 = (SLICE(insn, 4, 0) << 16) | SLICE(insn, 25, 10); ++ UInt cj = SLICE(insn, 7, 5); + + DIP("bcnez %s, %d\n", nameFCC(cj), (Int)extend32(offs21, 21)); + @@ -10242,9 +10138,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt offs16 = get_offs16(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt offs16 = SLICE(insn, 25, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("jirl %s, %s, %d\n", nameIReg(rd), nameIReg(rj), + (Int)extend32(offs16, 16)); @@ -10265,7 +10161,7 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt offs26 = get_offs26(insn); ++ UInt offs26 = (SLICE(insn, 9, 0) << 16) | SLICE(insn, 25, 10); + + DIP("b %d\n", (Int)extend32(offs26, 26)); + @@ -10281,7 +10177,7 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt offs26 = get_offs26(insn); ++ UInt offs26 = (SLICE(insn, 9, 0) << 16) | SLICE(insn, 25, 10); + + DIP("bl %d\n", (Int)extend32(offs26, 26)); + @@ -10298,9 +10194,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt offs16 = get_offs16(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt offs16 = SLICE(insn, 25, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("beq %s, %s, %d\n", nameIReg(rj), nameIReg(rd), + (Int)extend32(offs16, 16)); @@ -10315,9 +10211,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt offs16 = get_offs16(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt offs16 = SLICE(insn, 25, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("bne %s, %s, %d\n", nameIReg(rj), nameIReg(rd), + (Int)extend32(offs16, 16)); @@ -10332,9 +10228,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt offs16 = get_offs16(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt offs16 = SLICE(insn, 25, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("blt %s, %s, %d\n", nameIReg(rj), nameIReg(rd), + (Int)extend32(offs16, 16)); @@ -10349,9 +10245,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt offs16 = get_offs16(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt offs16 = SLICE(insn, 25, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("bge %s, %s, %d\n", nameIReg(rj), nameIReg(rd), + (Int)extend32(offs16, 16)); @@ -10366,9 +10262,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt offs16 = get_offs16(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt offs16 = SLICE(insn, 25, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("bltu %s, %s, %d\n", nameIReg(rj), nameIReg(rd), + (Int)extend32(offs16, 16)); @@ -10383,9 +10279,9 @@ index 0000000..1a9a2c0 + const VexArchInfo* archinfo, + const VexAbiInfo* abiinfo ) +{ -+ UInt offs16 = get_offs16(insn); -+ UInt rj = get_rj(insn); -+ UInt rd = get_rd(insn); ++ UInt offs16 = SLICE(insn, 25, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt rd = SLICE(insn, 4, 0); + + DIP("bgeu %s, %s, %d\n", nameIReg(rj), nameIReg(rd), + (Int)extend32(offs16, 16)); @@ -10398,1316 +10294,2460 @@ index 0000000..1a9a2c0 + + +/*------------------------------------------------------------*/ -+/*--- Disassemble a single LOONGARCH64 instruction ---*/ ++/*--- Helpers for vector integer arithmetic insns ---*/ +/*------------------------------------------------------------*/ + -+/* Disassemble a single LOONGARCH64 instruction into IR. The instruction -+ has is located at |guest_instr| and has guest IP of |guest_PC_curr_instr|, -+ which will have been set before the call here. Returns True iff the -+ instruction was decoded, in which case *dres will be set accordingly, -+ or False, in which case *dres should be ignored by the caller. */ ++static IROp mkVecADD ( UInt size ) { ++ const IROp ops[5] ++ = { Iop_Add8x16, Iop_Add16x8, Iop_Add32x4, Iop_Add64x2, Iop_Add128x1 }; ++ vassert(size < 5); ++ return ops[size]; ++} + -+static Bool disInstr_LOONGARCH64_WRK_special ( DisResult* dres, -+ const UChar* guest_instr ) ++static IROp mkVecSUB ( UInt size ) { ++ const IROp ops[5] ++ = { Iop_Sub8x16, Iop_Sub16x8, Iop_Sub32x4, Iop_Sub64x2, Iop_Sub128x1 }; ++ vassert(size < 5); ++ return ops[size]; ++} ++ ++static IROp mkVecMAXU ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_Max8Ux16, Iop_Max16Ux8, Iop_Max32Ux4, Iop_Max64Ux2 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static IROp mkVecMAXS ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_Max8Sx16, Iop_Max16Sx8, Iop_Max32Sx4, Iop_Max64Sx2 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static IROp mkVecMINU ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_Min8Ux16, Iop_Min16Ux8, Iop_Min32Ux4, Iop_Min64Ux2 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static IROp mkVecMINS ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_Min8Sx16, Iop_Min16Sx8, Iop_Min32Sx4, Iop_Min64Sx2 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static IROp mkV256MAXU ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_Max8Ux32, Iop_Max16Ux16, Iop_Max32Ux8, Iop_Max64Ux4 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static IROp mkV256MAXS ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_Max8Sx32, Iop_Max16Sx16, Iop_Max32Sx8, Iop_Max64Sx4 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static IROp mkV256MINU ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_Min8Ux32, Iop_Min16Ux16, Iop_Min32Ux8, Iop_Min64Ux4 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static IROp mkV256MINS ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_Min8Sx32, Iop_Min16Sx16, Iop_Min32Sx8, Iop_Min64Sx4 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static IROp mkVecCMPGTS ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_CmpGT8Sx16, Iop_CmpGT16Sx8, Iop_CmpGT32Sx4, Iop_CmpGT64Sx2 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static IROp mkVecSHLN ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_ShlN8x16, Iop_ShlN16x8, Iop_ShlN32x4, Iop_ShlN64x2 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static IROp mkVecSHRN ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_ShrN8x16, Iop_ShrN16x8, Iop_ShrN32x4, Iop_ShrN64x2 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static Bool gen_vadd_vsub ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ const UChar* code = guest_instr; -+ /* Spot the 16-byte preamble: -+ 00450c00 srli.d $zero, $zero, 3 -+ 00453400 srli.d $zero, $zero, 13 -+ 00457400 srli.d $zero, $zero, 29 -+ 00454c00 srli.d $zero, $zero, 19 -+ */ -+ if (getUInt(code + 0) == 0x00450c00 && -+ getUInt(code + 4) == 0x00453400 && -+ getUInt(code + 8) == 0x00457400 && -+ getUInt(code + 12) == 0x00454c00) { -+ /* Got a "Special" instruction preamble. Which one is it? */ -+ if (getUInt(code + 16) == 0x001535ad) { /* or $t1, $t1, $t1 */ -+ DIP("$a7 = client_request ( $t0 )\n"); -+ putPC(mkU64(guest_PC_curr_instr + 20)); -+ dres->whatNext = Dis_StopHere; -+ dres->len = 20; -+ dres->jk_StopHere = Ijk_ClientReq; -+ return True; -+ } else if (getUInt(code + 16) == 0x001539ce) { /* or $t2, $t2, $t2 */ -+ DIP("$a7 = guest_NRADDR\n"); -+ putIReg(11, IRExpr_Get(offsetof(VexGuestLOONGARCH64State, guest_NRADDR), -+ Ity_I64)); -+ dres->len = 20; -+ return True; -+ } else if (getUInt(code + 16) == 0x00153def) { /* or $t3, $t3, $t3 */ -+ DIP("branch-and-link-to-noredir $t8\n"); -+ putIReg(1, mkU64(guest_PC_curr_instr + 20)); -+ putPC(getIReg64(20)); -+ dres->whatNext = Dis_StopHere; -+ dres->len = 20; -+ dres->jk_StopHere = Ijk_NoRedir; -+ return True; -+ } else if (getUInt(code + 16) == 0x00154210) { /* or $t4, $t4, $t4 */ -+ DIP("IR injection\n"); -+ vex_inject_ir(irsb, Iend_LE); -+ /* Invalidate the current insn. The reason is that the IRop we're -+ injecting here can change. In which case the translation has to -+ be redone. For ease of handling, we simply invalidate all the -+ time. -+ */ -+ stmt(IRStmt_Put(offsetof(VexGuestLOONGARCH64State, guest_CMSTART), -+ mkU64(guest_PC_curr_instr))); -+ stmt(IRStmt_Put(offsetof(VexGuestLOONGARCH64State, guest_CMLEN), -+ mkU64(20))); -+ putPC(mkU64(guest_PC_curr_instr + 20)); -+ dres->whatNext = Dis_StopHere; -+ dres->len = 20; -+ dres->jk_StopHere = Ijk_InvalICache; -+ return True; -+ } -+ /* We don't know what it is. */ -+ vassert(0); -+ /*NOTREACHED*/ ++ UInt vd = SLICE(insn, 4, 0); ++ UInt vj = SLICE(insn, 9, 5); ++ UInt vk = SLICE(insn, 14, 10); ++ UInt insSz = SLICE(insn, 16, 15); ++ UInt isAdd = SLICE(insn, 17, 17); ++ ++ const HChar *nm[2] = { "vsub", "vadd" }; ++ IROp mathOp = isAdd ? mkVecADD(insSz): mkVecSUB(insSz); ++ ++ DIP("%s.%s %s, %s, %s\n", nm[isAdd], mkInsSize(insSz), ++ nameVReg(vd), nameVReg(vj), nameVReg(vk)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; + } -+ return False; ++ ++ putVReg(vd, binop(mathOp, getVReg(vj), getVReg(vk))); ++ ++ return True; +} + -+static Bool disInstr_LOONGARCH64_WRK_00_0000_0000 ( DisResult* dres, UInt insn, -+ const VexArchInfo* archinfo, -+ const VexAbiInfo* abiinfo ) ++static Bool gen_vaddi_vsubi ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ Bool ok; -+ switch (SLICE(insn, 21, 15)) { -+ case 0b0000000: -+ switch (SLICE(insn, 14, 10)) { -+ case 0b00100: -+ ok = gen_clo_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b00101: -+ ok = gen_clz_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b00110: -+ ok = gen_cto_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b00111: -+ ok = gen_ctz_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01000: -+ ok = gen_clo_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01001: -+ ok = gen_clz_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01010: -+ ok = gen_cto_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01011: -+ ok = gen_ctz_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01100: -+ ok = gen_revb_2h(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01101: -+ ok = gen_revb_4h(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01110: -+ ok = gen_revb_2w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01111: -+ ok = gen_revb_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b10000: -+ ok = gen_revh_2w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b10001: -+ ok = gen_revh_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b10010: -+ ok = gen_bitrev_4b(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b10011: -+ ok = gen_bitrev_8b(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b10100: -+ ok = gen_bitrev_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b10101: -+ ok = gen_bitrev_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b10110: -+ ok = gen_ext_w_h(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b10111: -+ ok = gen_ext_w_b(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b11000: -+ ok = gen_rdtimel_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b11001: -+ ok = gen_rdtimeh_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b11010: -+ ok = gen_rdtime_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b11011: -+ ok = gen_cpucfg(dres, insn, archinfo, abiinfo); -+ break; -+ default: -+ ok = False; -+ break; ++ UInt vd = SLICE(insn, 4, 0); ++ UInt vj = SLICE(insn, 9, 5); ++ UInt ui5 = SLICE(insn, 14, 10); ++ UInt insSz = SLICE(insn, 16, 15); ++ UInt isAdd = SLICE(insn, 17, 17); ++ ++ IRTemp res = newTemp(Ity_V128); ++ IROp mathOp = isAdd ? mkVecADD(insSz) : mkVecSUB(insSz); ++ ++ switch (insSz) { ++ case 0b00: assign(res, unop(Iop_Dup8x16, mkU8(ui5))); break; ++ case 0b01: assign(res, unop(Iop_Dup16x8, mkU16(ui5))); break; ++ case 0b10: assign(res, unop(Iop_Dup32x4, mkU32(ui5))); break; ++ case 0b11: assign(res, binop(Iop_64HLtoV128, mkU64(ui5), mkU64(ui5))); break; ++ default: vassert(0); break; ++ } ++ ++ const HChar *nm[2] = { "vsubi", "vaddi" }; ++ ++ DIP("%s.%s %s, %s, %u\n", nm[isAdd], mkInsSize(insSz + 4), ++ nameVReg(vd), nameVReg(vj), ui5); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putVReg(vd, binop(mathOp, getVReg(vj), mkexpr(res))); ++ ++ return True; ++} ++ ++static Bool gen_vmax_vmin ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt vd = SLICE(insn, 4, 0); ++ UInt vj = SLICE(insn, 9, 5); ++ UInt vk = SLICE(insn, 14, 10); ++ UInt insSz = SLICE(insn, 16, 15); ++ UInt isMin = SLICE(insn, 17, 17); ++ UInt isU = SLICE(insn, 18, 18); ++ ++ IROp op = isMin ? isU ? mkVecMINU(insSz) : mkVecMINS(insSz) : ++ isU ? mkVecMAXU(insSz) : mkVecMAXS(insSz); ++ UInt id = isU ? (insSz + 4) : insSz; ++ const HChar *nm[2] = { "vmax", "vmin" }; ++ ++ DIP("%s.%s %s, %s, %s\n", nm[isMin], mkInsSize(id), ++ nameVReg(vd), nameVReg(vj), nameVReg(vk)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putVReg(vd, binop(op, getVReg(vj), getVReg(vk))); ++ ++ return True; ++} ++ ++static Bool gen_xvmax_xvmin ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt xd = SLICE(insn, 4, 0); ++ UInt xj = SLICE(insn, 9, 5); ++ UInt xk = SLICE(insn, 14, 10); ++ UInt insSz = SLICE(insn, 16, 15); ++ UInt isMin = SLICE(insn, 17, 17); ++ UInt isU = SLICE(insn, 18, 18); ++ ++ IROp op = isMin ? isU ? mkV256MINU(insSz) : mkV256MINS(insSz) : ++ isU ? mkV256MAXU(insSz) : mkV256MAXS(insSz); ++ UInt id = isU ? (insSz + 4) : insSz; ++ const HChar *nm[2] = { "xvmax", "xvmin" }; ++ ++ DIP("%s.%s %s, %s, %s\n", nm[isMin], mkInsSize(id), ++ nameXReg(xd), nameXReg(xj), nameXReg(xk)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LASX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putXReg(xd, binop(op, getXReg(xj), getXReg(xk))); ++ ++ return True; ++} ++ ++static IRTemp gen_vmsk_b ( IRTemp shr ) ++{ ++ UInt i; ++ IRTemp tmp[16]; ++ IRTemp tOr = newTemp(Ity_I32); ++ IRTemp res = newTemp(Ity_V128); ++ ++ for (i = 0; i < 16; i++) { ++ tmp[i] = newTemp(Ity_I32); ++ assign(tmp[i], binop(Iop_Shl32, ++ unop(Iop_8Uto32, ++ binop(Iop_GetElem8x16, ++ mkexpr(shr), mkU8(i))), ++ mkU8(i))); ++ } ++ ++ assign(tOr, binop(Iop_Or32, ++ binop(Iop_Or32, ++ binop(Iop_Or32, ++ binop(Iop_Or32, mkexpr(tmp[15]), mkexpr(tmp[14])), ++ binop(Iop_Or32, mkexpr(tmp[13]), mkexpr(tmp[12]))), ++ binop(Iop_Or32, ++ binop(Iop_Or32, mkexpr(tmp[11]), mkexpr(tmp[10])), ++ binop(Iop_Or32, mkexpr(tmp[9]), mkexpr(tmp[8])))), ++ binop(Iop_Or32, ++ binop(Iop_Or32, ++ binop(Iop_Or32, mkexpr(tmp[7]), mkexpr(tmp[6])), ++ binop(Iop_Or32, mkexpr(tmp[5]), mkexpr(tmp[4]))), ++ binop(Iop_Or32, ++ binop(Iop_Or32, mkexpr(tmp[3]), mkexpr(tmp[2])), ++ binop(Iop_Or32, mkexpr(tmp[1]), mkexpr(tmp[0])))))); ++ assign(res, unop(Iop_64UtoV128, extendU(Ity_I32, mkexpr(tOr)))); ++ ++ return res; ++} ++ ++static IRTemp gen_vmsk_h ( IRTemp shr ) ++{ ++ UInt i; ++ IRTemp tmp[8]; ++ IRTemp tOr = newTemp(Ity_I32); ++ IRTemp res = newTemp(Ity_V128); ++ ++ for (i = 0; i < 8; i++) { ++ tmp[i] = newTemp(Ity_I32); ++ assign(tmp[i], binop(Iop_Shl32, ++ unop(Iop_16Uto32, ++ binop(Iop_GetElem16x8, ++ mkexpr(shr), mkU8(i))), ++ mkU8(i))); ++ } ++ ++ assign(tOr, binop(Iop_Or32, ++ binop(Iop_Or32, ++ binop(Iop_Or32, mkexpr(tmp[7]), mkexpr(tmp[6])), ++ binop(Iop_Or32, mkexpr(tmp[5]), mkexpr(tmp[4]))), ++ binop(Iop_Or32, ++ binop(Iop_Or32, mkexpr(tmp[3]), mkexpr(tmp[2])), ++ binop(Iop_Or32, mkexpr(tmp[1]), mkexpr(tmp[0]))))); ++ assign(res, unop(Iop_64UtoV128, extendU(Ity_I32, mkexpr(tOr)))); ++ ++ return res; ++} ++ ++static IRTemp gen_vmsk_w ( IRTemp shr ) ++{ ++ UInt i; ++ IRTemp tmp[4]; ++ IRTemp tOr = newTemp(Ity_I32); ++ IRTemp res = newTemp(Ity_V128); ++ ++ for (i = 0; i < 4; i++) { ++ tmp[i] = newTemp(Ity_I32); ++ assign(tmp[i], binop(Iop_Shl32, ++ binop(Iop_GetElem32x4, ++ mkexpr(shr), mkU8(i)), ++ mkU8(i))); ++ } ++ assign(tOr, binop(Iop_Or32, ++ binop(Iop_Or32, mkexpr(tmp[3]), mkexpr(tmp[2])), ++ binop(Iop_Or32, mkexpr(tmp[1]), mkexpr(tmp[0])))); ++ ++ assign(res, unop(Iop_64UtoV128, extendU(Ity_I32, mkexpr(tOr)))); ++ ++ return res; ++} ++ ++static IRTemp gen_vmsk_d ( IRTemp shr ) ++{ ++ UInt i; ++ IRTemp tmp[2]; ++ IRTemp res = newTemp(Ity_V128); ++ ++ for (i = 0; i < 2; i++) { ++ tmp[i] = newTemp(Ity_I64); ++ assign(tmp[i], binop(Iop_Shl64, ++ binop(Iop_GetElem64x2, ++ mkexpr(shr), mkU8(i)), ++ mkU8(i))); ++ } ++ assign(res, unop(Iop_64UtoV128, ++ binop(Iop_Or64,mkexpr(tmp[1]), mkexpr(tmp[0])))); ++ ++ return res; ++} ++ ++static Bool gen_vmsk ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt vd = SLICE(insn, 4, 0); ++ UInt vj = SLICE(insn, 9, 5); ++ UInt insSz = SLICE(insn, 11, 10); ++ UInt insTy = SLICE(insn, 13, 12); ++ ++ IRTemp shr = newTemp(Ity_V128); ++ IRTemp cmp = newTemp(Ity_V128); ++ IRTemp res = newTemp(Ity_V128); ++ IRTemp src = newTemp(Ity_V128); ++ assign(src, getVReg(vj)); ++ ++ switch (insTy) { ++ case 0b00: { ++ UInt shrNum[4] = {7, 15, 31, 63}; ++ ++ DIP("vmskltz.%s %s, %s\n", mkInsSize(insSz), nameVReg(vd), nameVReg(vj)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ assign(cmp, binop(mkVecCMPGTS(insSz), mkV128(0x0000), mkexpr(src))); ++ assign(shr, binop(mkVecSHRN(insSz), mkexpr(cmp), mkU8(shrNum[insSz]))); ++ ++ switch(insSz) { ++ case 0b00: res = gen_vmsk_b(shr); break; ++ case 0b01: res = gen_vmsk_h(shr); break; ++ case 0b10: res = gen_vmsk_w(shr); break; ++ case 0b11: res = gen_vmsk_d(shr); break; ++ default: vassert(0); break; + } + break; -+ case 0b0000010: -+ ok = gen_asrtle_d(dres, insn, archinfo, abiinfo); ++ } ++ ++ case 0b01: { ++ DIP("vmskgez.b %s, %s\n", nameVReg(vd), nameVReg(vj)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ assign(cmp, binop(Iop_OrV128, ++ binop(Iop_CmpGT8Sx16, mkexpr(src), mkV128(0x0000)), ++ binop(Iop_CmpEQ8x16, mkV128(0x0000), mkexpr(src)))); ++ assign(shr, binop(Iop_ShrN8x16, mkexpr(cmp), mkU8(7))); ++ res = gen_vmsk_b(shr); + break; -+ case 0b0000011: -+ ok = gen_asrtgt_d(dres, insn, archinfo, abiinfo); ++ } ++ ++ case 0b10: { ++ DIP("vmsknz.b %s, %s\n", nameVReg(vd), nameVReg(vj)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ assign(cmp, unop(Iop_NotV128, ++ binop(Iop_CmpEQ8x16, mkV128(0x0000), mkexpr(src)))); ++ assign(shr, binop(Iop_ShrN8x16, mkexpr(cmp), mkU8(7))); ++ res = gen_vmsk_b(shr); + break; -+ case 0b0100000: -+ ok = gen_add_w(dres, insn, archinfo, abiinfo); ++ } ++ ++ default: ++ return False; ++ } ++ ++ putVReg(vd, mkexpr(res)); ++ ++ return True; ++} ++ ++static Bool gen_xvmsk ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt xd = SLICE(insn, 4, 0); ++ UInt xj = SLICE(insn, 9, 5); ++ UInt insTy = SLICE(insn, 13, 12); ++ ++ IRTemp shrHi = newTemp(Ity_V128); ++ IRTemp shrLo = newTemp(Ity_V128); ++ IRTemp cmpHi = newTemp(Ity_V128); ++ IRTemp cmpLo = newTemp(Ity_V128); ++ IRTemp res = newTemp(Ity_V256); ++ IRTemp src = newTemp(Ity_V256); ++ assign(src, getXReg(xj)); ++ ++ switch (insTy) { ++ case 0b10: { ++ DIP("xvmsknz.b %s, %s\n", nameXReg(xd), nameXReg(xj)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ IRTemp hi, lo; ++ hi = lo = IRTemp_INVALID; ++ breakupV256toV128s(src, &hi, &lo); ++ assign(cmpHi, unop(Iop_NotV128, ++ binop(Iop_CmpEQ8x16, mkV128(0x0000), mkexpr(hi)))); ++ assign(shrHi, binop(Iop_ShrN8x16, mkexpr(cmpHi), mkU8(7))); ++ assign(cmpLo, unop(Iop_NotV128, ++ binop(Iop_CmpEQ8x16, mkV128(0x0000), mkexpr(lo)))); ++ assign(shrLo, binop(Iop_ShrN8x16, mkexpr(cmpLo), mkU8(7))); ++ assign(res, binop(Iop_V128HLtoV256, mkexpr(gen_vmsk_b(shrHi)), mkexpr(gen_vmsk_b(shrLo)))); + break; -+ case 0b0100001: -+ ok = gen_add_d(dres, insn, archinfo, abiinfo); ++ } ++ ++ default: ++ return False; ++ } ++ ++ putXReg(xd, mkexpr(res)); ++ ++ return True; ++} ++ ++ ++/*------------------------------------------------------------*/ ++/*--- Helpers for vector bit operation insns ---*/ ++/*------------------------------------------------------------*/ ++ ++static Bool gen_logical_v ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt vd = SLICE(insn, 4, 0); ++ UInt vj = SLICE(insn, 9, 5); ++ UInt vk = SLICE(insn, 14, 10); ++ UInt insTy = SLICE(insn, 17, 15); ++ ++ IRTemp res = newTemp(Ity_V128); ++ IRTemp srcL = newTemp(Ity_V128); ++ IRTemp srcR = newTemp(Ity_V128); ++ assign(srcL, getVReg(vj)); ++ assign(srcR, getVReg(vk)); ++ ++ switch (insTy) { ++ case 0b100: ++ assign(res, binop(Iop_AndV128, mkexpr(srcL), mkexpr(srcR))); + break; -+ case 0b0100010: -+ ok = gen_sub_w(dres, insn, archinfo, abiinfo); ++ case 0b101: ++ assign(res, binop(Iop_OrV128, mkexpr(srcL), mkexpr(srcR))); + break; -+ case 0b0100011: -+ ok = gen_sub_d(dres, insn, archinfo, abiinfo); ++ case 0b110: ++ assign(res, binop(Iop_XorV128, mkexpr(srcL), mkexpr(srcR))); + break; -+ case 0b0100100: -+ ok = gen_slt(dres, insn, archinfo, abiinfo); ++ case 0b111: ++ assign(res, unop(Iop_NotV128, binop(Iop_OrV128, ++ mkexpr(srcL), mkexpr(srcR)))); + break; -+ case 0b0100101: -+ ok = gen_sltu(dres, insn, archinfo, abiinfo); ++ case 0b000: ++ assign(res, binop(Iop_AndV128, ++ unop(Iop_NotV128, mkexpr(srcL)), ++ mkexpr(srcR))); + break; -+ case 0b0100110: -+ ok = gen_maskeqz(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0100111: -+ ok = gen_masknez(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0101000: -+ ok = gen_nor(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0101001: -+ ok = gen_and(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0101010: -+ ok = gen_or(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0101011: -+ ok = gen_xor(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0101100: -+ ok = gen_orn(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0101101: -+ ok = gen_andn(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0101110: -+ ok = gen_sll_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0101111: -+ ok = gen_srl_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0110000: -+ ok = gen_sra_w(dres, insn, archinfo, abiinfo); ++ case 0b001: ++ assign(res, binop(Iop_OrV128, ++ mkexpr(srcL), ++ unop(Iop_NotV128, mkexpr(srcR)))); + break; -+ case 0b0110001: -+ ok = gen_sll_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0110010: -+ ok = gen_srl_d(dres, insn, archinfo, abiinfo); ++ default: ++ return False; ++ } ++ ++ const HChar *nm[8] = { "vandn.v", "vorn.v", "", "", ++ "vand.v", "vor.v", "vxor.v", "vnor.v" }; ++ ++ DIP("%s %s, %s, %s\n", nm[insTy], nameVReg(vd), nameVReg(vj), nameVReg(vk)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putVReg(vd, mkexpr(res)); ++ ++ return True; ++} ++ ++static Bool gen_logical_xv ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt xd = SLICE(insn, 4, 0); ++ UInt xj = SLICE(insn, 9, 5); ++ UInt xk = SLICE(insn, 14, 10); ++ UInt insTy = SLICE(insn, 17, 15); ++ ++ IRTemp res = newTemp(Ity_V256); ++ IRTemp sL = newTemp(Ity_V256); ++ IRTemp sR = newTemp(Ity_V256); ++ assign(sL, getXReg(xj)); ++ assign(sR, getXReg(xk)); ++ ++ switch (insTy) { ++ case 0b110: ++ assign(res, binop(Iop_XorV256, mkexpr(sL), mkexpr(sR))); + break; -+ case 0b0110011: -+ ok = gen_sra_d(dres, insn, archinfo, abiinfo); ++ default: ++ return False; ++ } ++ ++ const HChar *nm[8] = { "xvandn.v", "xvorn.v", "", "", ++ "xvand.v", "xvor.v", "xvxor.v", "xvnor.v" }; ++ ++ DIP("%s %s, %s, %s\n", nm[insTy], nameXReg(xd), nameXReg(xj), nameXReg(xk)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LASX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putXReg(xd, mkexpr(res)); ++ ++ return True; ++} ++ ++static Bool gen_vlogical_u8 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt vd = SLICE(insn, 4, 0); ++ UInt vj = SLICE(insn, 9, 5); ++ UInt ui8 = SLICE(insn, 17, 10); ++ UInt insTy = SLICE(insn, 19, 18); ++ ++ IRTemp res = newTemp(Ity_V128); ++ switch (insTy) { ++ case 0b00: ++ assign(res, binop(Iop_AndV128, ++ getVReg(vj), ++ unop(Iop_Dup8x16, mkU8(ui8)))); + break; -+ case 0b0110110: -+ ok = gen_rotr_w(dres, insn, archinfo, abiinfo); ++ case 0b01: ++ assign(res, binop(Iop_OrV128, ++ getVReg(vj), ++ unop(Iop_Dup8x16, mkU8(ui8)))); + break; -+ case 0b0110111: -+ ok = gen_rotr_d(dres, insn, archinfo, abiinfo); ++ case 0b10: ++ assign(res, binop(Iop_XorV128, ++ getVReg(vj), ++ unop(Iop_Dup8x16, mkU8(ui8)))); + break; -+ case 0b0111000: -+ ok = gen_mul_w(dres, insn, archinfo, abiinfo); ++ case 0b11: ++ assign(res, unop(Iop_NotV128, ++ binop(Iop_OrV128, ++ getVReg(vj), ++ unop(Iop_Dup8x16, mkU8(ui8))))); + break; -+ case 0b0111001: -+ ok = gen_mulh_w(dres, insn, archinfo, abiinfo); ++ default: ++ vassert(0); + break; -+ case 0b0111010: -+ ok = gen_mulh_wu(dres, insn, archinfo, abiinfo); ++ } ++ ++ const HChar *nm[4] = { "vandi.b", "vori.b", "vxori.b", "vnori.b" }; ++ ++ DIP("%s %s, %s, %u\n", nm[insTy], nameVReg(vd), nameVReg(vj), ui8); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putVReg(vd, mkexpr(res)); ++ ++ return True; ++} ++ ++static Bool gen_vbiti ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt vd = SLICE(insn, 4, 0); ++ UInt vj = SLICE(insn, 9, 5); ++ UInt insImm = SLICE(insn, 17, 10); ++ UInt insTy = SLICE(insn, 19, 18); ++ ++ IRTemp c1 = newTemp(Ity_V128); ++ IRTemp argR = newTemp(Ity_V128); ++ IRTemp res = newTemp(Ity_V128); ++ UInt insSz, uImm; ++ ++ if ((insImm & 0xf8) == 0x8) { // 00001mmm; b ++ uImm = insImm & 0x07; ++ insSz = 0; ++ } else if ((insImm & 0xf0) == 0x10) { // 0001mmmm; h ++ uImm = insImm & 0x0f; ++ insSz = 1; ++ } else if ((insImm & 0xe0) == 0x20) { // 001mmmmm; w ++ uImm = insImm & 0x1f; ++ insSz = 2; ++ } else if ((insImm & 0xc0) == 0x40) { // 01mmmmmm; d ++ uImm = insImm & 0x3f; ++ insSz = 3; ++ } else { ++ vassert(0); ++ } ++ ++ switch (insSz) { ++ case 0b00: ++ assign(c1, unop(Iop_Dup8x16, mkU8(1))); + break; -+ case 0b0111011: -+ ok = gen_mul_d(dres, insn, archinfo, abiinfo); ++ case 0b01: ++ assign(c1, unop(Iop_Dup16x8, mkU16(1))); + break; -+ case 0b0111100: -+ ok = gen_mulh_d(dres, insn, archinfo, abiinfo); ++ case 0b10: ++ assign(c1, unop(Iop_Dup32x4, mkU32(1))); + break; -+ case 0b0111101: -+ ok = gen_mulh_du(dres, insn, archinfo, abiinfo); ++ case 0b11: ++ assign(c1, binop(Iop_64HLtoV128, mkU64(1), mkU64(1))); + break; -+ case 0b0111110: -+ ok = gen_mulw_d_w(dres, insn, archinfo, abiinfo); ++ default: ++ vassert(0); + break; -+ case 0b0111111: -+ ok = gen_mulw_d_wu(dres, insn, archinfo, abiinfo); ++ } ++ ++ assign(argR, binop(mkVecSHLN(insSz), mkexpr(c1), mkU8(uImm))); ++ switch (insTy) { ++ case 0b00: ++ assign(res, binop(Iop_AndV128, ++ getVReg(vj), unop(Iop_NotV128, mkexpr(argR)))); + break; -+ case 0b1000000: -+ ok = gen_div_w(dres, insn, archinfo, abiinfo); ++ case 0b01: ++ assign(res, binop(Iop_OrV128, getVReg(vj), mkexpr(argR))); + break; -+ case 0b1000001: -+ ok = gen_mod_w(dres, insn, archinfo, abiinfo); ++ case 0b10: ++ assign(res, binop(Iop_XorV128, getVReg(vj), mkexpr(argR))); + break; -+ case 0b1000010: -+ ok = gen_div_wu(dres, insn, archinfo, abiinfo); ++ default: ++ vassert(0); + break; -+ case 0b1000011: -+ ok = gen_mod_wu(dres, insn, archinfo, abiinfo); ++ } ++ ++ const HChar *nm[3] = { "vbitrevi", "vbitclri", "vbitseti" }; ++ ++ DIP("%s.%s %s, %u\n", nm[insTy], mkInsSize(insSz), nameVReg(vd), uImm); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putVReg(vd, mkexpr(res)); ++ ++ return True; ++} ++ ++ ++/*------------------------------------------------------------*/ ++/*--- Helpers for vector string processing insns ---*/ ++/*------------------------------------------------------------*/ ++ ++static Bool gen_vfrstpi ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt vd = SLICE(insn, 4, 0); ++ UInt vj = SLICE(insn, 9, 5); ++ UInt ui5 = SLICE(insn, 14, 10); ++ UInt insSz = SLICE(insn, 16, 15); ++ ++ UInt i; ++ IRTemp data[2]; ++ IRTemp res = newTemp(Ity_V128); ++ ++ for (i = 0; i < 2; i++) { ++ data[i] = newTemp(Ity_I64); ++ assign(data[i], binop(Iop_GetElem64x2, getVReg(vj), mkU8(i))); ++ } ++ ++ IRExpr** arg = mkIRExprVec_3(mkU64(insSz), mkexpr(data[1]), mkexpr(data[0])); ++ IRExpr* call = mkIRExprCCall(Ity_I64, 0/*regparms*/, ++ "loongarch64_calculate_negative_id", ++ &loongarch64_calculate_negative_id, ++ arg); ++ ++ switch (insSz) { ++ case 0b00: ++ assign(res, triop(Iop_SetElem8x16, ++ getVReg(vd), ++ mkU8(ui5 % 16), ++ unop(Iop_64to8, call))); + break; -+ case 0b1000100: -+ ok = gen_div_d(dres, insn, archinfo, abiinfo); ++ case 0b01: ++ assign(res, triop(Iop_SetElem16x8, ++ getVReg(vd), ++ mkU8(ui5 % 8), ++ unop(Iop_64to16, call))); + break; -+ case 0b1000101: -+ ok = gen_mod_d(dres, insn, archinfo, abiinfo); ++ default: ++ return False; ++ } ++ ++ DIP("vfrstpi.%s %s, %s, %u\n", mkInsSize(insSz), nameVReg(vd), nameVReg(vj), ui5); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putVReg(vd, mkexpr(res)); ++ ++ return True; ++} ++ ++ ++/*------------------------------------------------------------*/ ++/*--- Helpers for vector comparison and selection insns ---*/ ++/*------------------------------------------------------------*/ ++ ++static IROp mkVecCMPEQ ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_CmpEQ8x16, Iop_CmpEQ16x8, Iop_CmpEQ32x4, Iop_CmpEQ64x2 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static IROp mkV256CMPEQ ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_CmpEQ8x32, Iop_CmpEQ16x16, Iop_CmpEQ32x8, Iop_CmpEQ64x4 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static IROp mkVecCMPGTU ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_CmpGT8Ux16, Iop_CmpGT16Ux8, Iop_CmpGT32Ux4, Iop_CmpGT64Ux2 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static Bool gen_vcmp_integer ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt vd = SLICE(insn, 4, 0); ++ UInt vj = SLICE(insn, 9, 5); ++ UInt vk = SLICE(insn, 14, 10); ++ UInt insSz = SLICE(insn, 16, 15); ++ UInt insTy = SLICE(insn, 19, 17); ++ ++ UInt szId = insSz; ++ IRTemp res = newTemp(Ity_V128); ++ IRTemp argL = newTemp(Ity_V128); ++ IRTemp argR = newTemp(Ity_V128); ++ assign(argL, getVReg(vj)); ++ assign(argR, getVReg(vk)); ++ ++ switch (insTy) { ++ case 0b000: ++ assign(res, binop(mkVecCMPEQ(insSz), mkexpr(argL), mkexpr(argR))); ++ break; ++ case 0b001: ++ assign(res, binop(Iop_OrV128, ++ binop(mkVecCMPGTS(insSz), mkexpr(argR), mkexpr(argL)), ++ binop(mkVecCMPEQ(insSz), mkexpr(argL), mkexpr(argR)))); ++ break; ++ case 0b010: ++ assign(res, binop(Iop_OrV128, ++ binop(mkVecCMPGTU(insSz), mkexpr(argR), mkexpr(argL)), ++ binop(mkVecCMPEQ(insSz), mkexpr(argL), mkexpr(argR)))); ++ szId = insSz + 4; ++ break; ++ case 0b011: ++ assign(res, binop(mkVecCMPGTS(insSz), mkexpr(argR), mkexpr(argL))); ++ break; ++ case 0b100: ++ assign(res, binop(mkVecCMPGTU(insSz), mkexpr(argR), mkexpr(argL))); ++ szId = insSz + 4; + break; -+ case 0b1000110: -+ ok = gen_div_du(dres, insn, archinfo, abiinfo); ++ default: ++ return False; ++ } ++ ++ const HChar *nm[5] = { "vseq", "vsle", "vsle", "vslt", "vslt" }; ++ ++ DIP("%s.%s %s, %s, %s\n", nm[insTy], mkInsSize(szId), ++ nameVReg(vd), nameVReg(vj), nameVReg(vk)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putVReg(vd, mkexpr(res)); ++ ++ return True; ++} ++ ++static Bool gen_vcmpi_integer ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt vd = SLICE(insn, 4, 0); ++ UInt vj = SLICE(insn, 9, 5); ++ UInt si5 = SLICE(insn, 14, 10); ++ UInt insSz = SLICE(insn, 16, 15); ++ UInt isS = SLICE(insn, 17, 17); ++ UInt insTy = SLICE(insn, 19, 17); ++ ++ UInt szId = insSz; ++ IRTemp res = newTemp(Ity_V128); ++ IRTemp argL = newTemp(Ity_V128); ++ IRTemp argR = newTemp(Ity_V128); ++ assign(argL, getVReg(vj)); ++ ++ IRExpr *si5Expr; ++ IRTemp s64 = newTemp(Ity_I64); ++ assign(s64, mkU64(extend64(si5, 5))); ++ ++ if (insTy == 0b000) ++ isS = 1; ++ ++ switch (insSz) { ++ case 0b00: ++ si5Expr = isS ? unop(Iop_64to8, mkexpr(s64)) : mkU8(si5); ++ assign(argR, unop(Iop_Dup8x16, si5Expr)); + break; -+ case 0b1000111: -+ ok = gen_mod_du(dres, insn, archinfo, abiinfo); ++ case 0b01: ++ si5Expr = isS ? unop(Iop_64to16, mkexpr(s64)) : mkU16(si5); ++ assign(argR, unop(Iop_Dup16x8, si5Expr)); + break; -+ case 0b1001000: -+ ok = gen_crc_w_b_w(dres, insn, archinfo, abiinfo); ++ case 0b10: ++ si5Expr = isS ? unop(Iop_64to32, mkexpr(s64)) : mkU32(si5); ++ assign(argR, unop(Iop_Dup32x4, si5Expr)); + break; -+ case 0b1001001: -+ ok = gen_crc_w_h_w(dres, insn, archinfo, abiinfo); ++ case 0b11: ++ si5Expr = isS ? mkexpr(s64) : mkU64(si5); ++ assign(argR, binop(Iop_64HLtoV128, si5Expr, si5Expr)); + break; -+ case 0b1001010: -+ ok = gen_crc_w_w_w(dres, insn, archinfo, abiinfo); ++ default: ++ vassert(0); + break; -+ case 0b1001011: -+ ok = gen_crc_w_d_w(dres, insn, archinfo, abiinfo); ++ } ++ ++ switch (insTy) { ++ case 0b000: ++ assign(res, binop(mkVecCMPEQ(insSz), mkexpr(argL), mkexpr(argR))); + break; -+ case 0b1001100: -+ ok = gen_crcc_w_b_w(dres, insn, archinfo, abiinfo); ++ case 0b001: ++ assign(res, binop(Iop_OrV128, ++ binop(mkVecCMPGTS(insSz), mkexpr(argR), mkexpr(argL)), ++ binop(mkVecCMPEQ(insSz), mkexpr(argL), mkexpr(argR)))); + break; -+ case 0b1001101: -+ ok = gen_crcc_w_h_w(dres, insn, archinfo, abiinfo); ++ case 0b010: ++ assign(res, binop(Iop_OrV128, ++ binop(mkVecCMPGTU(insSz), mkexpr(argR), mkexpr(argL)), ++ binop(mkVecCMPEQ(insSz), mkexpr(argL), mkexpr(argR)))); ++ szId = insSz + 4; + break; -+ case 0b1001110: -+ ok = gen_crcc_w_w_w(dres, insn, archinfo, abiinfo); ++ case 0b011: ++ assign(res, binop(mkVecCMPGTS(insSz), mkexpr(argR), mkexpr(argL))); + break; -+ case 0b1001111: -+ ok = gen_crcc_w_d_w(dres, insn, archinfo, abiinfo); ++ case 0b100: ++ assign(res, binop(mkVecCMPGTU(insSz), mkexpr(argR), mkexpr(argL))); ++ szId = insSz + 4; + break; -+ case 0b1010100: -+ ok = gen_break(dres, insn, archinfo, abiinfo); ++ default: ++ vassert(0); + break; -+ case 0b1010110: -+ ok = gen_syscall(dres, insn, archinfo, abiinfo); ++ } ++ ++ const HChar *nm[10] = { "vseqi", "vslei", "vslei", "vslti", "vslti" }; ++ ++ DIP("%s.%s %s, %s, %d\n", nm[insTy], mkInsSize(szId), nameVReg(vd), ++ nameVReg(vj), (Int)extend32(si5, 5)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putVReg(vd, mkexpr(res)); ++ ++ return True; ++} ++ ++static Bool gen_xvcmp_integer ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt xd = SLICE(insn, 4, 0); ++ UInt xj = SLICE(insn, 9, 5); ++ UInt xk = SLICE(insn, 14, 10); ++ UInt insSz = SLICE(insn, 16, 15); ++ UInt insTy = SLICE(insn, 19, 17); ++ ++ UInt szId = insSz; ++ IRTemp res = newTemp(Ity_V256); ++ IRTemp argL = newTemp(Ity_V256); ++ IRTemp argR = newTemp(Ity_V256); ++ assign(argL, getXReg(xj)); ++ assign(argR, getXReg(xk)); ++ ++ switch (insTy) { ++ case 0b000: ++ assign(res, binop(mkV256CMPEQ(insSz), mkexpr(argL), mkexpr(argR))); + break; + default: -+ ok = False; -+ break; ++ return False; + } + -+ if (ok) { -+ return ok; ++ const HChar *nm[5] = { "xvseq", "xvsle", "xvsle", "xvslt", "xvslt" }; ++ ++ DIP("%s.%s %s, %s, %s\n", nm[insTy], mkInsSize(szId), ++ nameXReg(xd), nameXReg(xj), nameXReg(xk)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LASX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; + } + -+ switch (SLICE(insn, 21, 18)) { -+ case 0b0001: -+ if (SLICE(insn, 17, 17) == 0) { -+ ok = gen_alsl_w(dres, insn, archinfo, abiinfo); ++ putXReg(xd, mkexpr(res)); ++ ++ return True; ++} ++ ++static Bool gen_vset ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt cd = SLICE(insn, 2, 0); ++ UInt vj = SLICE(insn, 9, 5); ++ UInt insSz = SLICE(insn, 11, 10); ++ UInt insTy = SLICE(insn, 13, 12); ++ ++ IROp ops64; ++ IRTemp resHi = newTemp(Ity_I64); ++ IRTemp resLo = newTemp(Ity_I64); ++ IRTemp res = newTemp(Ity_V128); ++ IRTemp eq = newTemp(Ity_V128); ++ IRTemp z128 = newTemp(Ity_V128); ++ assign(z128, mkV128(0x0000)); ++ ++ switch (insTy) { ++ case 0b01: { ++ if (SLICE(insn, 10, 10) == 0b0) { ++ DIP("vseteqz.v %u, %s", cd, nameVReg(vj)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ assign(res, binop(Iop_CmpEQ64x2, getVReg(vj), mkexpr(z128))); ++ ops64 = Iop_And64; + } else { -+ ok = gen_alsl_wu(dres, insn, archinfo, abiinfo); ++ DIP("vsetnez.v %u, %s", cd, nameVReg(vj)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ assign(res, unop(Iop_NotV128, ++ binop(Iop_CmpEQ64x2, getVReg(vj), mkexpr(z128)))); ++ ops64 = Iop_Or64; + } + break; -+ case 0b0010: -+ if (SLICE(insn, 17, 17) == 0) { -+ ok = gen_bytepick_w(dres, insn, archinfo, abiinfo); -+ } else { -+ ok = False; ++ } ++ ++ case 0b10: { ++ DIP("vsetanyeqz.%s %u, %s", mkInsSize(insSz), cd, nameVReg(vj)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; + } ++ ++ assign(eq, binop(mkVecCMPEQ(insSz), getVReg(vj), mkexpr(z128))); ++ assign(res, unop(Iop_NotV128, ++ binop(Iop_CmpEQ64x2, mkexpr(eq), mkexpr(z128)))); ++ ops64 = Iop_Or64; + break; -+ case 0b0011: -+ ok = gen_bytepick_d(dres, insn, archinfo, abiinfo); ++ } ++ ++ case 0b11: { ++ DIP("vsetqllnez.%s %u, %s", mkInsSize(insSz), cd, nameVReg(vj)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ assign(eq, binop(mkVecCMPEQ(insSz), getVReg(vj), mkexpr(z128))); ++ assign(res, binop(Iop_CmpEQ64x2, mkexpr(eq), mkexpr(z128))); ++ ops64 = Iop_And64; + break; -+ case 0b1011: -+ if (SLICE(insn, 17, 17) == 0) { -+ ok = gen_alsl_d(dres, insn, archinfo, abiinfo); ++ } ++ ++ default: ++ return False; ++ } ++ ++ assign(resHi, binop(Iop_GetElem64x2, mkexpr(res), mkU8(1))); ++ assign(resLo, binop(Iop_GetElem64x2, mkexpr(res), mkU8(0))); ++ putFCC(cd, unop(Iop_64to8, binop(ops64, mkexpr(resHi), mkexpr(resLo)))); ++ ++ return True; ++} ++ ++static Bool gen_xvset ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt cd = SLICE(insn, 2, 0); ++ UInt xj = SLICE(insn, 9, 5); ++ UInt insSz = SLICE(insn, 11, 10); ++ UInt insTy = SLICE(insn, 13, 12); ++ ++ IROp ops64 = Iop_INVALID; ++ IRTemp res = newTemp(Ity_V256); ++ IRTemp z128 = newTemp(Ity_V128); ++ IRTemp src = newTemp(Ity_V256); ++ assign(z128, mkV128(0x0000)); ++ assign(src, getXReg(xj)); ++ ++ switch (insTy) { ++ case 0b01: { ++ if (SLICE(insn, 10, 10) == 0b0) { ++ DIP("xvseteqz.v %u, %s", cd, nameXReg(xj)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LASX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ IRTemp hi, lo; ++ hi = lo = IRTemp_INVALID; ++ breakupV256toV128s(src, &hi, &lo); ++ assign(res, binop(Iop_V128HLtoV256, ++ binop(Iop_CmpEQ64x2, mkexpr(hi), mkexpr(z128)), ++ binop(Iop_CmpEQ64x2, mkexpr(hi), mkexpr(z128)))); ++ ops64 = Iop_And64; + } else { -+ ok = False; ++ return False; + } + break; -+ default: -+ ok = False; ++ } ++ ++ case 0b10: { ++ DIP("xvsetanyeqz.%s %u, %s", mkInsSize(insSz), cd, nameXReg(xj)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LASX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ IRTemp eqHi = newTemp(Ity_V128); ++ IRTemp eqLo = newTemp(Ity_V128); ++ IRTemp hi, lo; ++ hi = lo = IRTemp_INVALID; ++ breakupV256toV128s(src, &hi, &lo); ++ assign(eqHi, binop(mkVecCMPEQ(insSz), mkexpr(hi), mkexpr(z128))); ++ assign(eqLo, binop(mkVecCMPEQ(insSz), mkexpr(lo), mkexpr(z128))); ++ assign(res, binop(Iop_V128HLtoV256, ++ unop(Iop_NotV128, ++ binop(Iop_CmpEQ64x2, mkexpr(eqHi), mkexpr(z128))), ++ unop(Iop_NotV128, ++ binop(Iop_CmpEQ64x2, mkexpr(eqLo), mkexpr(z128))))); ++ ops64 = Iop_Or64; + break; ++ } ++ ++ default: ++ return False; + } -+ return ok; ++ ++ IRTemp r1, r2, r3, r4; ++ r1 = r2 = r3 = r4 = IRTemp_INVALID; ++ breakupV256to64s(res, &r1, &r2, &r3, &r4); ++ putFCC(cd, unop(Iop_64to8, binop(ops64, ++ binop(ops64, mkexpr(r1), mkexpr(r2)), ++ binop(ops64, mkexpr(r3), mkexpr(r4))))); ++ ++ return True; +} + -+static Bool disInstr_LOONGARCH64_WRK_00_0000_0001 ( DisResult* dres, UInt insn, -+ const VexArchInfo* archinfo, -+ const VexAbiInfo* abiinfo ) ++/*------------------------------------------------------------*/ ++/*--- Helpers for vector moving and shuffling insns ---*/ ++/*------------------------------------------------------------*/ ++ ++static IROp mkVecPACKOD ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_PackOddLanes8x16, Iop_PackOddLanes16x8, ++ Iop_PackOddLanes32x4, Iop_InterleaveHI64x2 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static IROp mkVecPACKEV ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_PackEvenLanes8x16, Iop_PackEvenLanes16x8, ++ Iop_PackEvenLanes32x4, Iop_InterleaveLO64x2 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static IROp mkVecINTERLEAVELO ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_InterleaveLO8x16, Iop_InterleaveLO16x8, ++ Iop_InterleaveLO32x4, Iop_InterleaveLO64x2 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static IROp mkVecINTERLEAVEHI ( UInt size ) { ++ const IROp ops[4] ++ = { Iop_InterleaveHI8x16, Iop_InterleaveHI16x8, ++ Iop_InterleaveHI32x4, Iop_InterleaveHI64x2 }; ++ vassert(size < 4); ++ return ops[size]; ++} ++ ++static Bool gen_vpickve2gr ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ Bool ok; -+ if (SLICE(insn, 21, 21) == 0) { -+ switch (SLICE(insn, 20, 16)) { -+ case 0b00000: -+ if (SLICE(insn, 15, 15) == 1) { -+ ok = gen_slli_w(dres, insn, archinfo, abiinfo); -+ } else { -+ ok = False; -+ } -+ break; -+ case 0b00001: -+ ok = gen_slli_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b00100: -+ if (SLICE(insn, 15, 15) == 1) { -+ ok = gen_srli_w(dres, insn, archinfo, abiinfo); -+ } else { -+ ok = False; -+ } -+ break; -+ case 0b00101: -+ ok = gen_srli_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01000: -+ if (SLICE(insn, 15, 15) == 1) { -+ ok = gen_srai_w(dres, insn, archinfo, abiinfo); -+ } else { -+ ok = False; -+ } -+ break; -+ case 0b01001: -+ ok = gen_srai_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01100: -+ if (SLICE(insn, 15, 15) == 1) { -+ ok = gen_rotri_w(dres, insn, archinfo, abiinfo); -+ } else { -+ ok = False; -+ } -+ break; -+ case 0b01101: -+ ok = gen_rotri_d(dres, insn, archinfo, abiinfo); -+ break; -+ default: -+ ok = False; -+ break; -+ } ++ UInt rd = SLICE(insn, 4, 0); ++ UInt vj = SLICE(insn, 9, 5); ++ UInt insImm = SLICE(insn, 15, 10); ++ UInt isS = SLICE(insn, 18, 18); ++ ++ UInt uImm, insSz; ++ IRExpr *immExpr; ++ IRType extTy = Ity_INVALID; ++ IRTemp res = newTemp(Ity_I64); ++ ++ if ((insImm & 0x30) == 0x20) { // 10mmmm; b ++ uImm = insImm & 0xf; ++ insSz = 0; ++ extTy = Ity_I8; ++ } else if ((insImm & 0x38) == 0x30) { // 110mmm; h ++ uImm = insImm & 0x7; ++ insSz = 1; ++ extTy = Ity_I16; ++ } else if ((insImm & 0x3c) == 0x38) { // 1110mm; w ++ uImm = insImm & 0x3; ++ insSz = 2; ++ extTy = Ity_I32; ++ } else if ((insImm & 0x3e) == 0x3c) { // 11110m; d ++ uImm = insImm & 0x1; ++ insSz = 3; + } else { -+ if (SLICE(insn, 15, 15) == 0) { -+ ok = gen_bstrins_w(dres, insn, archinfo, abiinfo); -+ } else { -+ ok = gen_bstrpick_w(dres, insn, archinfo, abiinfo); -+ } ++ vassert(0); + } -+ return ok; ++ ++ immExpr = binop(mkVecGetElem(insSz), getVReg(vj), mkU8(uImm)); ++ if (insSz != 3) ++ assign(res, isS ? extendS(extTy, immExpr) : ++ extendU(extTy, immExpr)); ++ else ++ assign(res, binop(Iop_Or64, mkU64(0), immExpr)); ++ ++ UInt nmId = isS ? insSz : (insSz + 4); ++ ++ DIP("vpickve2gr.%s %s, %s", mkInsSize(nmId), ++ nameIReg(rd), nameVReg(vj)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putIReg(rd, mkexpr(res)); ++ ++ return True; +} + -+static Bool disInstr_LOONGARCH64_WRK_00_0000_0100 ( DisResult* dres, UInt insn, -+ const VexArchInfo* archinfo, -+ const VexAbiInfo* abiinfo ) ++static Bool gen_vreplgr2vr ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ Bool ok; -+ switch (SLICE(insn, 21, 15)) { -+ case 0b0000001: -+ ok = gen_fadd_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0000010: -+ ok = gen_fadd_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0000101: -+ ok = gen_fsub_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0000110: -+ ok = gen_fsub_d(dres, insn, archinfo, abiinfo); ++ UInt vd = SLICE(insn, 4, 0); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt insSz = SLICE(insn, 11, 10); ++ ++ IRTemp res = newTemp(Ity_V128); ++ switch (insSz) { ++ case 0b00: ++ assign(res, unop(Iop_Dup8x16, getIReg8(rj))); + break; -+ case 0b0001001: -+ ok = gen_fmul_s(dres, insn, archinfo, abiinfo); ++ case 0b01: ++ assign(res, unop(Iop_Dup16x8, getIReg16(rj))); + break; -+ case 0b0001010: -+ ok = gen_fmul_d(dres, insn, archinfo, abiinfo); ++ case 0b10: ++ assign(res, unop(Iop_Dup32x4, getIReg32(rj))); + break; -+ case 0b0001101: -+ ok = gen_fdiv_s(dres, insn, archinfo, abiinfo); ++ case 0b11: ++ assign(res, binop(Iop_64HLtoV128, getIReg64(rj), getIReg64(rj))); + break; -+ case 0b0001110: -+ ok = gen_fdiv_d(dres, insn, archinfo, abiinfo); ++ default: ++ vassert(0); + break; -+ case 0b0010001: -+ ok = gen_fmax_s(dres, insn, archinfo, abiinfo); ++ } ++ ++ DIP("vreplgr2vr.%s %s, %s", mkInsSize(insSz), ++ nameVReg(vd), nameIReg(rj)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putVReg(vd, mkexpr(res)); ++ ++ return True; ++} ++ ++static Bool gen_xvreplgr2vr ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt xd = SLICE(insn, 4, 0); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt insSz = SLICE(insn, 11, 10); ++ ++ IRTemp res = newTemp(Ity_V128); ++ switch (insSz) { ++ case 0b00: ++ assign(res, unop(Iop_Dup8x16, getIReg8(rj))); + break; -+ case 0b0010010: -+ ok = gen_fmax_d(dres, insn, archinfo, abiinfo); ++ case 0b01: ++ assign(res, unop(Iop_Dup16x8, getIReg16(rj))); + break; -+ case 0b0010101: -+ ok = gen_fmin_s(dres, insn, archinfo, abiinfo); ++ case 0b10: ++ assign(res, unop(Iop_Dup32x4, getIReg32(rj))); + break; -+ case 0b0010110: -+ ok = gen_fmin_d(dres, insn, archinfo, abiinfo); ++ case 0b11: ++ assign(res, binop(Iop_64HLtoV128, getIReg64(rj), getIReg64(rj))); + break; -+ case 0b0011001: -+ ok = gen_fmaxa_s(dres, insn, archinfo, abiinfo); ++ default: ++ vassert(0); + break; -+ case 0b0011010: -+ ok = gen_fmaxa_d(dres, insn, archinfo, abiinfo); ++ } ++ ++ DIP("xvreplgr2vr.%s %s, %s", mkInsSize(insSz), ++ nameXReg(xd), nameIReg(rj)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LASX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putXReg(xd, binop(Iop_V128HLtoV256, mkexpr(res), mkexpr(res))); ++ ++ return True; ++} ++ ++static Bool gen_vreplve ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt vd = SLICE(insn, 4, 0); ++ UInt vj = SLICE(insn, 9, 5); ++ UInt rk = SLICE(insn, 14, 10); ++ UInt insSz = SLICE(insn, 16, 15); ++ ++ IRExpr *elem; ++ IRTemp mod = newTemp(Ity_I8); ++ IRTemp res = newTemp(Ity_V128); ++ UInt div[4] = { 0x10, 0x8, 0x4, 0x2 }; ++ ++ assign(mod, unop(Iop_64to8, ++ unop(Iop_128HIto64, ++ binop(Iop_DivModU64to64, ++ getIReg64(rk), ++ mkU64(div[insSz]))))); ++ ++ elem = binop(mkVecGetElem(insSz), getVReg(vj), mkexpr(mod)); ++ switch (insSz) { ++ case 0b00: ++ assign(res, unop(Iop_Dup8x16, elem)); + break; -+ case 0b0011101: -+ ok = gen_fmina_s(dres, insn, archinfo, abiinfo); ++ case 0b01: ++ assign(res, unop(Iop_Dup16x8, elem)); + break; -+ case 0b0011110: -+ ok = gen_fmina_d(dres, insn, archinfo, abiinfo); ++ case 0b10: ++ assign(res, unop(Iop_Dup32x4, elem)); + break; -+ case 0b0100001: -+ ok = gen_fscaleb_s(dres, insn, archinfo, abiinfo); ++ case 0b11: ++ assign(res, binop(Iop_64HLtoV128, elem, elem)); + break; -+ case 0b0100010: -+ ok = gen_fscaleb_d(dres, insn, archinfo, abiinfo); ++ default: ++ vassert(0); + break; -+ case 0b0100101: -+ ok = gen_fcopysign_s(dres, insn, archinfo, abiinfo); ++ } ++ ++ DIP("vreplve.%s %s, %s, %s", mkInsSize(insSz), ++ nameVReg(vd), nameVReg(vj), nameIReg(rk)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putVReg(vd, mkexpr(res)); ++ ++ return True; ++} ++ ++static Bool gen_xvpickve ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt xd = SLICE(insn, 4, 0); ++ UInt xj = SLICE(insn, 9, 5); ++ UInt insImm = SLICE(insn, 15, 10); ++ ++ UInt sImm, insSz; ++ IRTemp res = newTemp(Ity_I64); ++ IRTemp z64 = newTemp(Ity_I64); ++ IRTemp src = newTemp(Ity_V256); ++ assign(z64, mkU64(0)); ++ assign(src, getXReg(xj)); ++ ++ if ((insImm & 0x38) == 0x30) { // 110ui3; w ++ IRTemp s[8]; ++ s[7] = s[6] = s[5] = s[4] = s[3] = s[2] = s[1] = s[0] = IRTemp_INVALID; ++ breakupV256to32s(src, &s[7], &s[6], &s[5], &s[4], ++ &s[3], &s[2], &s[1], &s[0]); ++ sImm = insImm & 0x7; ++ insSz = 0; ++ assign(res, extendU(Ity_I32, mkexpr(s[sImm]))); ++ } else if ((insImm & 0x3c) == 0x38) { // 1110ui2; d ++ IRTemp s[4]; ++ s[3] = s[2] = s[1] = s[0] = IRTemp_INVALID; ++ breakupV256to64s(src, &s[3], &s[2], &s[1], &s[0]); ++ sImm = insImm & 0x3; ++ insSz = 1; ++ assign(res, mkexpr(s[sImm])); ++ } else { ++ vassert(0); ++ } ++ ++ const HChar arr = "wd"[insSz]; ++ DIP("xvpickve.%c %s, %s, %u", arr, nameXReg(xd), nameXReg(xj), sImm); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LASX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putXReg(xd, mkV256from64s(z64, z64, z64, res)); ++ ++ return True; ++} ++ ++static Bool gen_evod ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt vd = SLICE(insn, 4, 0); ++ UInt vj = SLICE(insn, 9, 5); ++ UInt vk = SLICE(insn, 14, 10); ++ UInt insSz = SLICE(insn, 16, 15); ++ ++ const HChar *nm; ++ IRTemp argL = newTemp(Ity_V128); ++ IRTemp argR = newTemp(Ity_V128); ++ IRTemp res = newTemp(Ity_V128); ++ ++ switch (SLICE(insn, 19, 17)) { ++ case 0b011: ++ nm = "vpackev"; ++ assign(argL, binop(mkVecPACKEV(insSz), ++ getVReg(vj), ++ mkV128(0x0000))); ++ assign(argR, binop(mkVecPACKEV(insSz), ++ getVReg(vk), ++ mkV128(0x0000))); ++ assign(res, binop(mkVecINTERLEAVEHI(insSz), ++ mkexpr(argL), ++ mkexpr(argR))); ++ break; ++ case 0b100: ++ nm = "vpackod"; ++ assign(argL, binop(mkVecPACKOD(insSz), ++ getVReg(vj), ++ mkV128(0x0000))); ++ assign(argR, binop(mkVecPACKOD(insSz), ++ getVReg(vk), ++ mkV128(0x0000))); ++ assign(res, binop(mkVecINTERLEAVEHI(insSz), ++ mkexpr(argL), ++ mkexpr(argR))); ++ break; ++ case 0b101: ++ nm = "vilvl"; ++ assign(res, binop(mkVecINTERLEAVELO(insSz), ++ getVReg(vj), ++ getVReg(vk))); ++ break; ++ case 0b110: ++ nm = "vilvh"; ++ assign(res, binop(mkVecINTERLEAVEHI(insSz), ++ getVReg(vj), ++ getVReg(vk))); ++ break; ++ case 0b111: ++ nm = "vpickev"; ++ assign(res, binop(mkVecPACKEV(insSz), ++ getVReg(vj), ++ getVReg(vk))); ++ break; ++ case 0b000: ++ nm = "vpickod"; ++ assign(res, binop(mkVecPACKOD(insSz), ++ getVReg(vj), ++ getVReg(vk))); + break; -+ case 0b0100110: -+ ok = gen_fcopysign_d(dres, insn, archinfo, abiinfo); ++ default: ++ return False; ++ } ++ ++ DIP("%s.%s %s, %s, %s\n", nm, mkInsSize(insSz), ++ nameVReg(vd), nameVReg(vj), nameVReg(vk)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putVReg(vd, mkexpr(res)); ++ return True; ++} ++ ++static Bool gen_vshuf_b ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt va = SLICE(insn, 19, 15); ++ UInt vk = SLICE(insn, 14, 10); ++ UInt vj = SLICE(insn, 9, 5); ++ UInt vd = SLICE(insn, 4, 0); ++ ++ DIP("vshuf.b %s, %s, %s, %s\n", nameVReg(vd), nameVReg(vj), nameVReg(vk), ++ nameVReg(va)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ IRTemp sHi = newTemp(Ity_V128); ++ IRTemp sLo = newTemp(Ity_V128); ++ IRTemp sId = newTemp(Ity_V128); ++ assign(sHi, getVReg(vj)); ++ assign(sLo, getVReg(vk)); ++ assign(sId, getVReg(va)); ++ UInt i; ++ IRTemp id[16], res[16]; ++ ++ for (i = 0; i < 16; i++) { ++ id[i] = newTemp(Ity_I8); ++ res[i] = newTemp(Ity_I8); ++ ++ assign(id[i], binop(Iop_GetElem8x16, mkexpr(sId), mkU8(i))); ++ ++ assign(res[i], IRExpr_ITE( ++ binop(Iop_CmpEQ64, ++ extendU(Ity_I8, binop(Iop_And8, ++ mkexpr(id[i]), ++ mkU8(0xC0))), ++ mkU64(0x0)), ++ IRExpr_ITE( ++ binop(Iop_CmpLT64U, ++ extendU(Ity_I8, binop(Iop_And8, ++ mkexpr(id[i]), ++ mkU8(0x1F))), ++ mkU64(0x10)), ++ binop(Iop_GetElem8x16, ++ mkexpr(sLo), ++ mkexpr(id[i])), ++ binop(Iop_GetElem8x16, ++ mkexpr(sHi), ++ unop(Iop_64to8, ++ binop(Iop_Sub64, ++ extendU(Ity_I8, mkexpr(id[i])), ++ mkU64(0x10))))), ++ mkU8(0x0))); ++ } ++ ++ putVReg(vd, ++ binop(Iop_64HLtoV128, ++ binop(Iop_32HLto64, ++ binop(Iop_16HLto32, ++ binop(Iop_8HLto16, mkexpr(res[15]), mkexpr(res[14])), ++ binop(Iop_8HLto16, mkexpr(res[13]), mkexpr(res[12]))), ++ binop(Iop_16HLto32, ++ binop(Iop_8HLto16, mkexpr(res[11]), mkexpr(res[10])), ++ binop(Iop_8HLto16, mkexpr(res[9]), mkexpr(res[8])))), ++ binop(Iop_32HLto64, ++ binop(Iop_16HLto32, ++ binop(Iop_8HLto16, mkexpr(res[7]), mkexpr(res[6])), ++ binop(Iop_8HLto16, mkexpr(res[5]), mkexpr(res[4]))), ++ binop(Iop_16HLto32, ++ binop(Iop_8HLto16, mkexpr(res[3]), mkexpr(res[2])), ++ binop(Iop_8HLto16, mkexpr(res[1]), mkexpr(res[0])))))); ++ ++ return True; ++} ++ ++static Bool gen_xvpermi ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt xd = SLICE(insn, 4, 0); ++ UInt xj = SLICE(insn, 9, 5); ++ UInt ui8 = SLICE(insn, 17, 10); ++ UInt InsSz = SLICE(insn, 19, 18); ++ ++ UInt id0 = ui8 & 0x03; ++ UInt id1 = (ui8 & 0x0c) >> 2; ++ UInt id2 = (ui8 & 0x30) >> 4; ++ UInt id3 = (ui8 & 0xc0) >> 6; ++ ++ IRTemp res = newTemp(Ity_V256); ++ IRTemp sJ = newTemp(Ity_V256); ++ assign(sJ, getXReg(xj)); ++ IRTemp sD = newTemp(Ity_V256); ++ assign(sD, getXReg(xd)); ++ ++ switch (InsSz) { ++ case 0b01: { ++ IRTemp s[16]; ++ s[7] = s[6] = s[5] = s[4] = s[3] = s[2] = s[1] = s[0] = IRTemp_INVALID; ++ s[15] = s[14] = s[13] = s[12] = s[11] = s[10] = s[9] = s[8] = IRTemp_INVALID; ++ breakupV256to32s(sJ, &s[7], &s[6], &s[5], &s[4], ++ &s[3], &s[2], &s[1], &s[0]); ++ breakupV256to32s(sD, &s[15], &s[14], &s[13], &s[12], ++ &s[11], &s[10], &s[9], &s[8]); ++ assign(res, mkV256from32s(s[id0], s[id1], s[id2], s[id3], ++ s[id0 + 4], s[id1 + 4], s[id2 + 4], s[id3 + 4])); + break; -+ case 0b0101000: ++ } ++ case 0b10: { ++ IRTemp s[4]; ++ s[3] = s[2] = s[1] = s[0] = IRTemp_INVALID; ++ breakupV256to64s(sJ, &s[3], &s[2], &s[1], &s[0]); ++ assign(res, mkV256from64s(s[id0], s[id1], s[id2], s[id3])); ++ break; ++ } ++ case 0b11: { ++ IRTemp s[4]; ++ s[3] = s[2] = s[1] = s[0] = IRTemp_INVALID; ++ breakupV256toV128s(sJ, &s[1], &s[0]); ++ breakupV256toV128s(sD, &s[3], &s[2]); ++ assign(res, binop(Iop_V128HLtoV256, mkexpr(s[id2]), mkexpr(s[id0]))); ++ break; ++ } ++ default: ++ vassert(0); ++ break; ++ } ++ ++ DIP("xvpermi.%s %s, %s, %u\n", mkInsSize(InsSz), nameXReg(xd), nameXReg(xj), ui8); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LASX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putXReg(xd, mkexpr(res)); ++ ++ return True; ++} ++ ++ ++/*------------------------------------------------------------*/ ++/*--- Helpers for vector load/store insns ---*/ ++/*------------------------------------------------------------*/ ++ ++static Bool gen_vld ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt vd = SLICE(insn, 4, 0); ++ ++ DIP("vld %s, %s, %d\n", nameVReg(vd), nameIReg(rj), ++ (Int)extend32(si12, 12)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ IRExpr* addr = binop(Iop_Add64, getIReg64(rj), mkU64(extend64(si12, 12))); ++ putVReg(vd, load(Ity_V128, addr)); ++ ++ return True; ++} ++ ++static Bool gen_vldrepl ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt vd = SLICE(insn, 4, 0); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt insImm = SLICE(insn, 23, 10); ++ ++ UInt sImm, insSz; ++ IRTemp res = newTemp(Ity_V128); ++ IRTemp addr = newTemp(Ity_I64); ++ ++ if ((insImm & 0x3000) == 0x2000) { // 10si12; b ++ sImm = insImm & 0xfff; ++ insSz = 0; ++ } else if ((insImm & 0x3800) == 0x1000) { // 010si11; h ++ sImm = insImm & 0x7ff; ++ insSz = 1; ++ } else if ((insImm & 0x3c00) == 0x800) { // 0010si10; w ++ sImm = insImm & 0x3ff; ++ insSz = 2; ++ } else if ((insImm & 0x3e00) == 0x400) { // 00010si9; d ++ sImm = insImm & 0x1ff; ++ insSz = 3; ++ } else { ++ return False; ++ } ++ ++ switch (insSz) { ++ case 0b00: { ++ assign(addr, binop(Iop_Add64, ++ getIReg64(rj), ++ mkU64(extend64(sImm, 12)))); ++ assign(res, unop(Iop_Dup8x16, load(Ity_I8, mkexpr(addr)))); ++ break; ++ } ++ case 0b01: { ++ assign(addr, binop(Iop_Add64, ++ getIReg64(rj), ++ mkU64(extend64(sImm << 1, 12)))); ++ assign(res, unop(Iop_Dup16x8, load(Ity_I16, mkexpr(addr)))); ++ break; ++ } ++ case 0b10: { ++ assign(addr, binop(Iop_Add64, ++ getIReg64(rj), ++ mkU64(extend64(sImm << 2, 12)))); ++ assign(res, unop(Iop_Dup32x4, load(Ity_I32, mkexpr(addr)))); ++ break; ++ } ++ case 0b11: { ++ assign(addr, binop(Iop_Add64, ++ getIReg64(rj), ++ mkU64(extend64(sImm << 3, 12)))); ++ assign(res, binop(Iop_64HLtoV128, ++ load(Ity_I64, mkexpr(addr)), ++ load(Ity_I64, mkexpr(addr)))); ++ break; ++ } ++ default: ++ vassert(0); ++ break; ++ } ++ ++ DIP("vldrepl.%s %s, %s, %u\n", mkInsSize(insSz), ++ nameVReg(vd), nameIReg(rj), sImm); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ putVReg(vd, mkexpr(res)); ++ ++ return True; ++} ++ ++static Bool gen_vst ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt vd = SLICE(insn, 4, 0); ++ ++ DIP("vst %s, %s, %d\n", nameVReg(vd), nameIReg(rj), ++ (Int)extend32(si12, 12)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ IRExpr* addr = binop(Iop_Add64, getIReg64(rj), mkU64(extend64(si12, 12))); ++ store(addr, getVReg(vd)); ++ ++ return True; ++} ++ ++static Bool gen_xvld ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt xd = SLICE(insn, 4, 0); ++ ++ DIP("xvld %s, %s, %d\n", nameXReg(xd), nameIReg(rj), ++ (Int)extend32(si12, 12)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LASX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ IRExpr* addr = binop(Iop_Add64, getIReg64(rj), mkU64(extend64(si12, 12))); ++ putXReg(xd, load(Ity_V256, addr)); ++ ++ return True; ++} ++ ++static Bool gen_xvst ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt si12 = SLICE(insn, 21, 10); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt xd = SLICE(insn, 4, 0); ++ ++ DIP("xvst %s, %s, %d\n", nameXReg(xd), nameIReg(rj), ++ (Int)extend32(si12, 12)); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LASX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ IRExpr* addr = binop(Iop_Add64, getIReg64(rj), mkU64(extend64(si12, 12))); ++ store(addr, getXReg(xd)); ++ ++ return True; ++} ++ ++static Bool gen_vstelm ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ UInt vd = SLICE(insn, 4, 0); ++ UInt rj = SLICE(insn, 9, 5); ++ UInt si8 = SLICE(insn, 17, 10); ++ UInt insImm = SLICE(insn, 23, 18); ++ ++ IRExpr* addr; ++ UInt idx, insSz; ++ ++ if ((insImm & 0x30) == 0x20) { // 10_idx; b ++ idx = insImm & 0xf; ++ insSz = 0; ++ } else if ((insImm & 0x38) == 0x10) { // 01_idx; h ++ idx = insImm & 0x7; ++ insSz = 1; ++ } else if ((insImm & 0x3c) == 0x8) { // 001_idx; w ++ idx = insImm & 0x3; ++ insSz = 2; ++ } else if ((insImm & 0x3e) == 0x4) { // 0001_idx; d ++ idx = insImm & 0x1; ++ insSz = 3; ++ } else { ++ return False; ++ } ++ ++ switch (insSz) { ++ case 0b00: ++ addr = binop(Iop_Add64, ++ getIReg64(rj), ++ mkU64(extend64(si8, 8))); ++ break; ++ case 0b01: ++ addr = binop(Iop_Add64, ++ getIReg64(rj), ++ mkU64(extend64(si8 << 1, 9))); ++ break; ++ case 0b10: ++ addr = binop(Iop_Add64, ++ getIReg64(rj), ++ mkU64(extend64(si8 << 2, 10))); ++ break; ++ case 0b11: ++ addr = binop(Iop_Add64, ++ getIReg64(rj), ++ mkU64(extend64(si8 << 3, 11))); ++ break; ++ default: ++ vassert(0); ++ break; ++ } ++ ++ DIP("vstelm.%s %s, %s, %d, %u\n", mkInsSize(insSz), nameVReg(vd), nameIReg(rj), ++ (Int)extend32(si8, 8), idx); ++ ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; ++ } ++ ++ store(addr, binop(mkVecGetElem(insSz), getVReg(vd), mkU8(idx))); ++ ++ return True; ++} ++ ++ ++/*------------------------------------------------------------*/ ++/*--- Disassemble a single LOONGARCH64 instruction ---*/ ++/*------------------------------------------------------------*/ ++ ++/* Disassemble a single LOONGARCH64 instruction into IR. The instruction ++ has is located at |guest_instr| and has guest IP of |guest_PC_curr_instr|, ++ which will have been set before the call here. Returns True iff the ++ instruction was decoded, in which case *dres will be set accordingly, ++ or False, in which case *dres should be ignored by the caller. */ ++ ++static Bool disInstr_LOONGARCH64_WRK_special ( DisResult* dres, ++ const UChar* guest_instr ) ++{ ++ const UChar* code = guest_instr; ++ /* Spot the 16-byte preamble: ++ 00450c00 srli.d $zero, $zero, 3 ++ 00453400 srli.d $zero, $zero, 13 ++ 00457400 srli.d $zero, $zero, 29 ++ 00454c00 srli.d $zero, $zero, 19 ++ */ ++ if (getUInt(code + 0) == 0x00450c00 && ++ getUInt(code + 4) == 0x00453400 && ++ getUInt(code + 8) == 0x00457400 && ++ getUInt(code + 12) == 0x00454c00) { ++ /* Got a "Special" instruction preamble. Which one is it? */ ++ if (getUInt(code + 16) == 0x001535ad) { /* or $t1, $t1, $t1 */ ++ DIP("$a7 = client_request ( $t0 )\n"); ++ putPC(mkU64(guest_PC_curr_instr + 20)); ++ dres->whatNext = Dis_StopHere; ++ dres->len = 20; ++ dres->jk_StopHere = Ijk_ClientReq; ++ return True; ++ } else if (getUInt(code + 16) == 0x001539ce) { /* or $t2, $t2, $t2 */ ++ DIP("$a7 = guest_NRADDR\n"); ++ putIReg(11, IRExpr_Get(offsetof(VexGuestLOONGARCH64State, guest_NRADDR), ++ Ity_I64)); ++ dres->len = 20; ++ return True; ++ } else if (getUInt(code + 16) == 0x00153def) { /* or $t3, $t3, $t3 */ ++ DIP("branch-and-link-to-noredir $t8\n"); ++ putIReg(1, mkU64(guest_PC_curr_instr + 20)); ++ putPC(getIReg64(20)); ++ dres->whatNext = Dis_StopHere; ++ dres->len = 20; ++ dres->jk_StopHere = Ijk_NoRedir; ++ return True; ++ } else if (getUInt(code + 16) == 0x00154210) { /* or $t4, $t4, $t4 */ ++ DIP("IR injection\n"); ++ vex_inject_ir(irsb, Iend_LE); ++ /* Invalidate the current insn. The reason is that the IRop we're ++ injecting here can change. In which case the translation has to ++ be redone. For ease of handling, we simply invalidate all the ++ time. ++ */ ++ stmt(IRStmt_Put(offsetof(VexGuestLOONGARCH64State, guest_CMSTART), ++ mkU64(guest_PC_curr_instr))); ++ stmt(IRStmt_Put(offsetof(VexGuestLOONGARCH64State, guest_CMLEN), ++ mkU64(20))); ++ putPC(mkU64(guest_PC_curr_instr + 20)); ++ dres->whatNext = Dis_StopHere; ++ dres->len = 20; ++ dres->jk_StopHere = Ijk_InvalICache; ++ return True; ++ } ++ /* We don't know what it is. */ ++ vassert(0); ++ /*NOTREACHED*/ ++ } ++ return False; ++} ++ ++static Bool disInstr_LOONGARCH64_WRK_00_0000_0000 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ Bool ok; ++ ++ switch (SLICE(insn, 21, 15)) { ++ case 0b0000000: + switch (SLICE(insn, 14, 10)) { -+ case 0b00001: -+ ok = gen_fabs_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b00010: -+ ok = gen_fabs_d(dres, insn, archinfo, abiinfo); ++ case 0b00100: ++ ok = gen_clo_w(dres, insn, archinfo, abiinfo); + break; + case 0b00101: -+ ok = gen_fneg_s(dres, insn, archinfo, abiinfo); ++ ok = gen_clz_w(dres, insn, archinfo, abiinfo); + break; + case 0b00110: -+ ok = gen_fneg_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01001: -+ ok = gen_flogb_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01010: -+ ok = gen_flogb_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01101: -+ ok = gen_fclass_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01110: -+ ok = gen_fclass_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b10001: -+ ok = gen_fsqrt_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b10010: -+ ok = gen_fsqrt_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b10101: -+ ok = gen_frecip_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b10110: -+ ok = gen_frecip_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b11001: -+ ok = gen_frsqrt_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b11010: -+ ok = gen_frsqrt_d(dres, insn, archinfo, abiinfo); -+ break; -+ default: -+ ok = False; ++ ok = gen_cto_w(dres, insn, archinfo, abiinfo); + break; -+ } -+ break; -+ case 0b0101001: -+ switch (SLICE(insn, 14, 10)) { -+ case 0b00101: -+ ok = gen_fmov_s(dres, insn, archinfo, abiinfo); ++ case 0b00111: ++ ok = gen_ctz_w(dres, insn, archinfo, abiinfo); + break; -+ case 0b00110: -+ ok = gen_fmov_d(dres, insn, archinfo, abiinfo); ++ case 0b01000: ++ ok = gen_clo_d(dres, insn, archinfo, abiinfo); + break; + case 0b01001: -+ ok = gen_movgr2fr_w(dres, insn, archinfo, abiinfo); ++ ok = gen_clz_d(dres, insn, archinfo, abiinfo); + break; + case 0b01010: -+ ok = gen_movgr2fr_d(dres, insn, archinfo, abiinfo); ++ ok = gen_cto_d(dres, insn, archinfo, abiinfo); + break; + case 0b01011: -+ ok = gen_movgr2frh_w(dres, insn, archinfo, abiinfo); ++ ok = gen_ctz_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01100: ++ ok = gen_revb_2h(dres, insn, archinfo, abiinfo); + break; + case 0b01101: -+ ok = gen_movfr2gr_s(dres, insn, archinfo, abiinfo); ++ ok = gen_revb_4h(dres, insn, archinfo, abiinfo); + break; + case 0b01110: -+ ok = gen_movfr2gr_d(dres, insn, archinfo, abiinfo); ++ ok = gen_revb_2w(dres, insn, archinfo, abiinfo); + break; + case 0b01111: -+ ok = gen_movfrh2gr_s(dres, insn, archinfo, abiinfo); ++ ok = gen_revb_d(dres, insn, archinfo, abiinfo); + break; + case 0b10000: -+ ok = gen_movgr2fcsr(dres, insn, archinfo, abiinfo); ++ ok = gen_revh_2w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10001: ++ ok = gen_revh_d(dres, insn, archinfo, abiinfo); + break; + case 0b10010: -+ ok = gen_movfcsr2gr(dres, insn, archinfo, abiinfo); ++ ok = gen_bitrev_4b(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10011: ++ ok = gen_bitrev_8b(dres, insn, archinfo, abiinfo); + break; + case 0b10100: -+ if (SLICE(insn, 4, 3) == 0b00) { -+ ok = gen_movfr2cf(dres, insn, archinfo, abiinfo); -+ } else { -+ ok = False; -+ } ++ ok = gen_bitrev_w(dres, insn, archinfo, abiinfo); + break; + case 0b10101: -+ if (SLICE(insn, 9, 8) == 0b00) { -+ ok = gen_movcf2fr(dres, insn, archinfo, abiinfo); -+ } else { -+ ok = False; -+ } ++ ok = gen_bitrev_d(dres, insn, archinfo, abiinfo); + break; + case 0b10110: -+ if (SLICE(insn, 4, 3) == 0b00) { -+ ok = gen_movgr2cf(dres, insn, archinfo, abiinfo); -+ } else { -+ ok = False; -+ } ++ ok = gen_ext_w_h(dres, insn, archinfo, abiinfo); + break; + case 0b10111: -+ if (SLICE(insn, 9, 8) == 0b00) { -+ ok = gen_movcf2gr(dres, insn, archinfo, abiinfo); -+ } else { -+ ok = False; -+ } -+ break; -+ default: -+ ok = False; -+ break; -+ } -+ break; -+ case 0b0110010: -+ switch (SLICE(insn, 14, 10)) { -+ case 0b00110: -+ ok = gen_fcvt_s_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01001: -+ ok = gen_fcvt_d_s(dres, insn, archinfo, abiinfo); -+ break; -+ default: -+ ok = False; -+ break; -+ } -+ break; -+ case 0b0110100: -+ switch (SLICE(insn, 14, 10)) { -+ case 0b00001: -+ ok = gen_ftintrm_w_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b00010: -+ ok = gen_ftintrm_w_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01001: -+ ok = gen_ftintrm_l_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01010: -+ ok = gen_ftintrm_l_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b10001: -+ ok = gen_ftintrp_w_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b10010: -+ ok = gen_ftintrp_w_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b11001: -+ ok = gen_ftintrp_l_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b11010: -+ ok = gen_ftintrp_l_d(dres, insn, archinfo, abiinfo); -+ break; -+ default: -+ ok = False; -+ break; -+ } -+ break; -+ case 0b0110101: -+ switch (SLICE(insn, 14, 10)) { -+ case 0b00001: -+ ok = gen_ftintrz_w_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b00010: -+ ok = gen_ftintrz_w_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01001: -+ ok = gen_ftintrz_l_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01010: -+ ok = gen_ftintrz_l_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b10001: -+ ok = gen_ftintrne_w_s(dres, insn, archinfo, abiinfo); ++ ok = gen_ext_w_b(dres, insn, archinfo, abiinfo); + break; -+ case 0b10010: -+ ok = gen_ftintrne_w_d(dres, insn, archinfo, abiinfo); ++ case 0b11000: ++ ok = gen_rdtimel_w(dres, insn, archinfo, abiinfo); + break; + case 0b11001: -+ ok = gen_ftintrne_l_s(dres, insn, archinfo, abiinfo); ++ ok = gen_rdtimeh_w(dres, insn, archinfo, abiinfo); + break; + case 0b11010: -+ ok = gen_ftintrne_l_d(dres, insn, archinfo, abiinfo); -+ break; -+ default: -+ ok = False; -+ break; -+ } -+ break; -+ case 0b0110110: -+ switch (SLICE(insn, 14, 10)) { -+ case 0b00001: -+ ok = gen_ftint_w_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b00010: -+ ok = gen_ftint_w_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01001: -+ ok = gen_ftint_l_s(dres, insn, archinfo, abiinfo); ++ ok = gen_rdtime_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b01010: -+ ok = gen_ftint_l_d(dres, insn, archinfo, abiinfo); ++ case 0b11011: ++ ok = gen_cpucfg(dres, insn, archinfo, abiinfo); + break; + default: + ok = False; + break; + } + break; -+ case 0b0111010: -+ switch (SLICE(insn, 14, 10)) { -+ case 0b00100: -+ ok = gen_ffint_s_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b00110: -+ ok = gen_ffint_s_l(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01000: -+ ok = gen_ffint_d_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01010: -+ ok = gen_ffint_d_l(dres, insn, archinfo, abiinfo); -+ break; -+ default: -+ ok = False; -+ break; -+ } ++ case 0b0000010: ++ ok = gen_asrtle_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b0111100: -+ switch (SLICE(insn, 14, 10)) { -+ case 0b10001: -+ ok = gen_frint_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b10010: -+ ok = gen_frint_d(dres, insn, archinfo, abiinfo); -+ break; -+ default: -+ ok = False; -+ break; -+ } -+ break; -+ default: -+ ok = False; -+ break; -+ } -+ return ok; -+} -+ -+static Bool disInstr_LOONGARCH64_WRK_00_0000 ( DisResult* dres, UInt insn, -+ const VexArchInfo* archinfo, -+ const VexAbiInfo* abiinfo ) -+{ -+ Bool ok; -+ switch (SLICE(insn, 25, 22)) { -+ case 0b0000: -+ ok = disInstr_LOONGARCH64_WRK_00_0000_0000(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0001: -+ ok = disInstr_LOONGARCH64_WRK_00_0000_0001(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0010: -+ ok = gen_bstrins_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0011: -+ ok = gen_bstrpick_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0100: -+ ok = disInstr_LOONGARCH64_WRK_00_0000_0100(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1000: -+ ok = gen_slti(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1001: -+ ok = gen_sltui(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1010: -+ ok = gen_addi_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1011: -+ ok = gen_addi_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1100: -+ ok = gen_lu52i_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1101: -+ ok = gen_andi(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1110: -+ ok = gen_ori(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1111: -+ ok = gen_xori(dres, insn, archinfo, abiinfo); -+ break; -+ default: -+ ok = False; -+ break; -+ } -+ return ok; -+} -+ -+static Bool disInstr_LOONGARCH64_WRK_00_1010 ( DisResult* dres, UInt insn, -+ const VexArchInfo* archinfo, -+ const VexAbiInfo* abiinfo ) -+{ -+ Bool ok; -+ switch (SLICE(insn, 25, 22)) { -+ case 0b0000: -+ ok = gen_ld_b(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0001: -+ ok = gen_ld_h(dres, insn, archinfo, abiinfo); ++ case 0b0000011: ++ ok = gen_asrtgt_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b0010: -+ ok = gen_ld_w(dres, insn, archinfo, abiinfo); ++ case 0b0100000: ++ ok = gen_add_w(dres, insn, archinfo, abiinfo); + break; -+ case 0b0011: -+ ok = gen_ld_d(dres, insn, archinfo, abiinfo); ++ case 0b0100001: ++ ok = gen_add_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b0100: -+ ok = gen_st_b(dres, insn, archinfo, abiinfo); ++ case 0b0100010: ++ ok = gen_sub_w(dres, insn, archinfo, abiinfo); + break; -+ case 0b0101: -+ ok = gen_st_h(dres, insn, archinfo, abiinfo); ++ case 0b0100011: ++ ok = gen_sub_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b0110: -+ ok = gen_st_w(dres, insn, archinfo, abiinfo); ++ case 0b0100100: ++ ok = gen_slt(dres, insn, archinfo, abiinfo); + break; -+ case 0b0111: -+ ok = gen_st_d(dres, insn, archinfo, abiinfo); ++ case 0b0100101: ++ ok = gen_sltu(dres, insn, archinfo, abiinfo); + break; -+ case 0b1000: -+ ok = gen_ld_bu(dres, insn, archinfo, abiinfo); ++ case 0b0100110: ++ ok = gen_maskeqz(dres, insn, archinfo, abiinfo); + break; -+ case 0b1001: -+ ok = gen_ld_hu(dres, insn, archinfo, abiinfo); ++ case 0b0100111: ++ ok = gen_masknez(dres, insn, archinfo, abiinfo); + break; -+ case 0b1010: -+ ok = gen_ld_wu(dres, insn, archinfo, abiinfo); ++ case 0b0101000: ++ ok = gen_nor(dres, insn, archinfo, abiinfo); + break; -+ case 0b1011: -+ ok = gen_preld(dres, insn, archinfo, abiinfo); ++ case 0b0101001: ++ ok = gen_and(dres, insn, archinfo, abiinfo); + break; -+ case 0b1100: -+ ok = gen_fld_s(dres, insn, archinfo, abiinfo); ++ case 0b0101010: ++ ok = gen_or(dres, insn, archinfo, abiinfo); + break; -+ case 0b1101: -+ ok = gen_fst_s(dres, insn, archinfo, abiinfo); ++ case 0b0101011: ++ ok = gen_xor(dres, insn, archinfo, abiinfo); + break; -+ case 0b1110: -+ ok = gen_fld_d(dres, insn, archinfo, abiinfo); ++ case 0b0101100: ++ ok = gen_orn(dres, insn, archinfo, abiinfo); + break; -+ case 0b1111: -+ ok = gen_fst_d(dres, insn, archinfo, abiinfo); ++ case 0b0101101: ++ ok = gen_andn(dres, insn, archinfo, abiinfo); + break; -+ default: -+ ok = False; ++ case 0b0101110: ++ ok = gen_sll_w(dres, insn, archinfo, abiinfo); + break; -+ } -+ return ok; -+} -+ -+static Bool disInstr_LOONGARCH64_WRK_00_1110_0000 ( DisResult* dres, UInt insn, -+ const VexArchInfo* archinfo, -+ const VexAbiInfo* abiinfo ) -+{ -+ Bool ok; -+ switch (SLICE(insn, 21, 15)) { -+ case 0b0000000: -+ ok = gen_ldx_b(dres, insn, archinfo, abiinfo); ++ case 0b0101111: ++ ok = gen_srl_w(dres, insn, archinfo, abiinfo); + break; -+ case 0b0001000: -+ ok = gen_ldx_h(dres, insn, archinfo, abiinfo); ++ case 0b0110000: ++ ok = gen_sra_w(dres, insn, archinfo, abiinfo); + break; -+ case 0b0010000: -+ ok = gen_ldx_w(dres, insn, archinfo, abiinfo); ++ case 0b0110001: ++ ok = gen_sll_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b0011000: -+ ok = gen_ldx_d(dres, insn, archinfo, abiinfo); ++ case 0b0110010: ++ ok = gen_srl_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b0100000: -+ ok = gen_stx_b(dres, insn, archinfo, abiinfo); ++ case 0b0110011: ++ ok = gen_sra_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b0101000: -+ ok = gen_stx_h(dres, insn, archinfo, abiinfo); ++ case 0b0110110: ++ ok = gen_rotr_w(dres, insn, archinfo, abiinfo); + break; -+ case 0b0110000: -+ ok = gen_stx_w(dres, insn, archinfo, abiinfo); ++ case 0b0110111: ++ ok = gen_rotr_d(dres, insn, archinfo, abiinfo); + break; + case 0b0111000: -+ ok = gen_stx_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1000000: -+ ok = gen_ldx_bu(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1001000: -+ ok = gen_ldx_hu(dres, insn, archinfo, abiinfo); ++ ok = gen_mul_w(dres, insn, archinfo, abiinfo); + break; -+ case 0b1010000: -+ ok = gen_ldx_wu(dres, insn, archinfo, abiinfo); ++ case 0b0111001: ++ ok = gen_mulh_w(dres, insn, archinfo, abiinfo); + break; -+ case 0b1011000: -+ ok = gen_preldx(dres, insn, archinfo, abiinfo); ++ case 0b0111010: ++ ok = gen_mulh_wu(dres, insn, archinfo, abiinfo); + break; -+ case 0b1100000: -+ ok = gen_fldx_s(dres, insn, archinfo, abiinfo); ++ case 0b0111011: ++ ok = gen_mul_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b1101000: -+ ok = gen_fldx_d(dres, insn, archinfo, abiinfo); ++ case 0b0111100: ++ ok = gen_mulh_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b1110000: -+ ok = gen_fstx_s(dres, insn, archinfo, abiinfo); ++ case 0b0111101: ++ ok = gen_mulh_du(dres, insn, archinfo, abiinfo); + break; -+ case 0b1111000: -+ ok = gen_fstx_d(dres, insn, archinfo, abiinfo); ++ case 0b0111110: ++ ok = gen_mulw_d_w(dres, insn, archinfo, abiinfo); + break; -+ default: -+ ok = False; ++ case 0b0111111: ++ ok = gen_mulw_d_wu(dres, insn, archinfo, abiinfo); + break; -+ } -+ return ok; -+} -+ -+static Bool disInstr_LOONGARCH64_WRK_00_1110_0001 ( DisResult* dres, UInt insn, -+ const VexArchInfo* archinfo, -+ const VexAbiInfo* abiinfo ) -+{ -+ Bool ok; -+ switch (SLICE(insn, 21, 15)) { + case 0b1000000: -+ ok = gen_amswap_w(dres, insn, archinfo, abiinfo); ++ ok = gen_div_w(dres, insn, archinfo, abiinfo); + break; + case 0b1000001: -+ ok = gen_amswap_d(dres, insn, archinfo, abiinfo); ++ ok = gen_mod_w(dres, insn, archinfo, abiinfo); + break; + case 0b1000010: -+ ok = gen_amadd_w(dres, insn, archinfo, abiinfo); ++ ok = gen_div_wu(dres, insn, archinfo, abiinfo); + break; + case 0b1000011: -+ ok = gen_amadd_d(dres, insn, archinfo, abiinfo); ++ ok = gen_mod_wu(dres, insn, archinfo, abiinfo); + break; + case 0b1000100: -+ ok = gen_amand_w(dres, insn, archinfo, abiinfo); ++ ok = gen_div_d(dres, insn, archinfo, abiinfo); + break; + case 0b1000101: -+ ok = gen_amand_d(dres, insn, archinfo, abiinfo); ++ ok = gen_mod_d(dres, insn, archinfo, abiinfo); + break; + case 0b1000110: -+ ok = gen_amor_w(dres, insn, archinfo, abiinfo); ++ ok = gen_div_du(dres, insn, archinfo, abiinfo); + break; + case 0b1000111: -+ ok = gen_amor_d(dres, insn, archinfo, abiinfo); ++ ok = gen_mod_du(dres, insn, archinfo, abiinfo); + break; + case 0b1001000: -+ ok = gen_amxor_w(dres, insn, archinfo, abiinfo); ++ ok = gen_crc_w_b_w(dres, insn, archinfo, abiinfo); + break; + case 0b1001001: -+ ok = gen_amxor_d(dres, insn, archinfo, abiinfo); ++ ok = gen_crc_w_h_w(dres, insn, archinfo, abiinfo); + break; + case 0b1001010: -+ ok = gen_ammax_w(dres, insn, archinfo, abiinfo); ++ ok = gen_crc_w_w_w(dres, insn, archinfo, abiinfo); + break; + case 0b1001011: -+ ok = gen_ammax_d(dres, insn, archinfo, abiinfo); ++ ok = gen_crc_w_d_w(dres, insn, archinfo, abiinfo); + break; + case 0b1001100: -+ ok = gen_ammin_w(dres, insn, archinfo, abiinfo); ++ ok = gen_crcc_w_b_w(dres, insn, archinfo, abiinfo); + break; + case 0b1001101: -+ ok = gen_ammin_d(dres, insn, archinfo, abiinfo); ++ ok = gen_crcc_w_h_w(dres, insn, archinfo, abiinfo); + break; + case 0b1001110: -+ ok = gen_ammax_wu(dres, insn, archinfo, abiinfo); ++ ok = gen_crcc_w_w_w(dres, insn, archinfo, abiinfo); + break; + case 0b1001111: -+ ok = gen_ammax_du(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1010000: -+ ok = gen_ammin_wu(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1010001: -+ ok = gen_ammin_du(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1010010: -+ ok = gen_amswap_db_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1010011: -+ ok = gen_amswap_db_d(dres, insn, archinfo, abiinfo); ++ ok = gen_crcc_w_d_w(dres, insn, archinfo, abiinfo); + break; + case 0b1010100: -+ ok = gen_amadd_db_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1010101: -+ ok = gen_amadd_db_d(dres, insn, archinfo, abiinfo); ++ ok = gen_break(dres, insn, archinfo, abiinfo); + break; + case 0b1010110: -+ ok = gen_amand_db_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1010111: -+ ok = gen_amand_db_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1011000: -+ ok = gen_amor_db_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1011001: -+ ok = gen_amor_db_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1011010: -+ ok = gen_amxor_db_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1011011: -+ ok = gen_amxor_db_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1011100: -+ ok = gen_ammax_db_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1011101: -+ ok = gen_ammax_db_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1011110: -+ ok = gen_ammin_db_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1011111: -+ ok = gen_ammin_db_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1100000: -+ ok = gen_ammax_db_wu(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1100001: -+ ok = gen_ammax_db_du(dres, insn, archinfo, abiinfo); ++ ok = gen_syscall(dres, insn, archinfo, abiinfo); + break; -+ case 0b1100010: -+ ok = gen_ammin_db_wu(dres, insn, archinfo, abiinfo); ++ default: ++ ok = False; + break; -+ case 0b1100011: -+ ok = gen_ammin_db_du(dres, insn, archinfo, abiinfo); ++ } ++ ++ if (ok) ++ return ok; ++ ++ switch (SLICE(insn, 21, 18)) { ++ case 0b0001: ++ if (SLICE(insn, 17, 17) == 0) { ++ ok = gen_alsl_w(dres, insn, archinfo, abiinfo); ++ } else { ++ ok = gen_alsl_wu(dres, insn, archinfo, abiinfo); ++ } + break; -+ case 0b1100100: -+ ok = gen_dbar(dres, insn, archinfo, abiinfo); ++ case 0b0010: ++ if (SLICE(insn, 17, 17) == 0) { ++ ok = gen_bytepick_w(dres, insn, archinfo, abiinfo); ++ } else { ++ ok = False; ++ } + break; -+ case 0b1100101: -+ ok = gen_ibar(dres, insn, archinfo, abiinfo); ++ case 0b0011: ++ ok = gen_bytepick_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b1101000: -+ ok = gen_fldgt_s(dres, insn, archinfo, abiinfo); ++ case 0b1011: ++ if (SLICE(insn, 17, 17) == 0) { ++ ok = gen_alsl_d(dres, insn, archinfo, abiinfo); ++ } else { ++ ok = False; ++ } + break; -+ case 0b1101001: -+ ok = gen_fldgt_d(dres, insn, archinfo, abiinfo); ++ default: ++ ok = False; + break; -+ case 0b1101010: -+ ok = gen_fldle_s(dres, insn, archinfo, abiinfo); ++ } ++ ++ return ok; ++} ++ ++static Bool disInstr_LOONGARCH64_WRK_00_0000_0001 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ Bool ok; ++ ++ if (SLICE(insn, 21, 21) == 0) { ++ switch (SLICE(insn, 20, 16)) { ++ case 0b00000: ++ if (SLICE(insn, 15, 15) == 1) { ++ ok = gen_slli_w(dres, insn, archinfo, abiinfo); ++ } else { ++ ok = False; ++ } ++ break; ++ case 0b00001: ++ ok = gen_slli_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b00100: ++ if (SLICE(insn, 15, 15) == 1) { ++ ok = gen_srli_w(dres, insn, archinfo, abiinfo); ++ } else { ++ ok = False; ++ } ++ break; ++ case 0b00101: ++ ok = gen_srli_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01000: ++ if (SLICE(insn, 15, 15) == 1) { ++ ok = gen_srai_w(dres, insn, archinfo, abiinfo); ++ } else { ++ ok = False; ++ } ++ break; ++ case 0b01001: ++ ok = gen_srai_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01100: ++ if (SLICE(insn, 15, 15) == 1) { ++ ok = gen_rotri_w(dres, insn, archinfo, abiinfo); ++ } else { ++ ok = False; ++ } ++ break; ++ case 0b01101: ++ ok = gen_rotri_d(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } ++ } else { ++ if (SLICE(insn, 15, 15) == 0) { ++ ok = gen_bstrins_w(dres, insn, archinfo, abiinfo); ++ } else { ++ ok = gen_bstrpick_w(dres, insn, archinfo, abiinfo); ++ } ++ } ++ ++ return ok; ++} ++ ++static Bool disInstr_LOONGARCH64_WRK_00_0000_0100 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ Bool ok; ++ ++ switch (SLICE(insn, 21, 15)) { ++ case 0b0000001: ++ ok = gen_fadd_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b1101011: -+ ok = gen_fldle_d(dres, insn, archinfo, abiinfo); ++ case 0b0000010: ++ ok = gen_fadd_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b1101100: -+ ok = gen_fstgt_s(dres, insn, archinfo, abiinfo); ++ case 0b0000101: ++ ok = gen_fsub_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b1101101: -+ ok = gen_fstgt_d(dres, insn, archinfo, abiinfo); ++ case 0b0000110: ++ ok = gen_fsub_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b1101110: -+ ok = gen_fstle_s(dres, insn, archinfo, abiinfo); ++ case 0b0001001: ++ ok = gen_fmul_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b1101111: -+ ok = gen_fstle_d(dres, insn, archinfo, abiinfo); ++ case 0b0001010: ++ ok = gen_fmul_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b1110000: -+ ok = gen_ldgt_b(dres, insn, archinfo, abiinfo); ++ case 0b0001101: ++ ok = gen_fdiv_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b1110001: -+ ok = gen_ldgt_h(dres, insn, archinfo, abiinfo); ++ case 0b0001110: ++ ok = gen_fdiv_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b1110010: -+ ok = gen_ldgt_w(dres, insn, archinfo, abiinfo); ++ case 0b0010001: ++ ok = gen_fmax_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b1110011: -+ ok = gen_ldgt_d(dres, insn, archinfo, abiinfo); ++ case 0b0010010: ++ ok = gen_fmax_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b1110100: -+ ok = gen_ldle_b(dres, insn, archinfo, abiinfo); ++ case 0b0010101: ++ ok = gen_fmin_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b1110101: -+ ok = gen_ldle_h(dres, insn, archinfo, abiinfo); ++ case 0b0010110: ++ ok = gen_fmin_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b1110110: -+ ok = gen_ldle_w(dres, insn, archinfo, abiinfo); ++ case 0b0011001: ++ ok = gen_fmaxa_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b1110111: -+ ok = gen_ldle_d(dres, insn, archinfo, abiinfo); ++ case 0b0011010: ++ ok = gen_fmaxa_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b1111000: -+ ok = gen_stgt_b(dres, insn, archinfo, abiinfo); ++ case 0b0011101: ++ ok = gen_fmina_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b1111001: -+ ok = gen_stgt_h(dres, insn, archinfo, abiinfo); ++ case 0b0011110: ++ ok = gen_fmina_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b1111010: -+ ok = gen_stgt_w(dres, insn, archinfo, abiinfo); ++ case 0b0100001: ++ ok = gen_fscaleb_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b1111011: -+ ok = gen_stgt_d(dres, insn, archinfo, abiinfo); ++ case 0b0100010: ++ ok = gen_fscaleb_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b1111100: -+ ok = gen_stle_b(dres, insn, archinfo, abiinfo); ++ case 0b0100101: ++ ok = gen_fcopysign_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b1111101: -+ ok = gen_stle_h(dres, insn, archinfo, abiinfo); ++ case 0b0100110: ++ ok = gen_fcopysign_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b1111110: -+ ok = gen_stle_w(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1111111: -+ ok = gen_stle_d(dres, insn, archinfo, abiinfo); -+ break; -+ default: -+ ok = False; -+ break; -+ } -+ return ok; -+} -+ -+static Bool disInstr_LOONGARCH64_WRK_FCMP_S ( DisResult* dres, UInt insn, -+ const VexArchInfo* archinfo, -+ const VexAbiInfo* abiinfo ) -+{ -+ Bool ok; -+ switch (get_cond(insn)) { -+ case 0x0: -+ ok = gen_fcmp_caf_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x1: -+ ok = gen_fcmp_saf_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x2: -+ ok = gen_fcmp_clt_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x3: -+ ok = gen_fcmp_slt_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x4: -+ ok = gen_fcmp_ceq_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x5: -+ ok = gen_fcmp_seq_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x6: -+ ok = gen_fcmp_cle_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x7: -+ ok = gen_fcmp_sle_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x8: -+ ok = gen_fcmp_cun_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x9: -+ ok = gen_fcmp_sun_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0xa: -+ ok = gen_fcmp_cult_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0xb: -+ ok = gen_fcmp_sult_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0xc: -+ ok = gen_fcmp_cueq_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0xd: -+ ok = gen_fcmp_sueq_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0xe: -+ ok = gen_fcmp_cule_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0xf: -+ ok = gen_fcmp_sule_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x10: -+ ok = gen_fcmp_cne_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x11: -+ ok = gen_fcmp_sne_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x14: -+ ok = gen_fcmp_cor_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x15: -+ ok = gen_fcmp_sor_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x18: -+ ok = gen_fcmp_cune_s(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x19: -+ ok = gen_fcmp_sune_s(dres, insn, archinfo, abiinfo); -+ break; -+ default: -+ ok = False; -+ break; -+ } -+ return ok; -+} -+ -+static Bool disInstr_LOONGARCH64_WRK_FCMP_D ( DisResult* dres, UInt insn, -+ const VexArchInfo* archinfo, -+ const VexAbiInfo* abiinfo ) -+{ -+ Bool ok; -+ switch (get_cond(insn)) { -+ case 0x0: -+ ok = gen_fcmp_caf_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x1: -+ ok = gen_fcmp_saf_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x2: -+ ok = gen_fcmp_clt_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x3: -+ ok = gen_fcmp_slt_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x4: -+ ok = gen_fcmp_ceq_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x5: -+ ok = gen_fcmp_seq_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x6: -+ ok = gen_fcmp_cle_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x7: -+ ok = gen_fcmp_sle_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x8: -+ ok = gen_fcmp_cun_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x9: -+ ok = gen_fcmp_sun_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0xa: -+ ok = gen_fcmp_cult_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0xb: -+ ok = gen_fcmp_sult_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0xc: -+ ok = gen_fcmp_cueq_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0xd: -+ ok = gen_fcmp_sueq_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0xe: -+ ok = gen_fcmp_cule_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0xf: -+ ok = gen_fcmp_sule_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x10: -+ ok = gen_fcmp_cne_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x11: -+ ok = gen_fcmp_sne_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x14: -+ ok = gen_fcmp_cor_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x15: -+ ok = gen_fcmp_sor_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x18: -+ ok = gen_fcmp_cune_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0x19: -+ ok = gen_fcmp_sune_d(dres, insn, archinfo, abiinfo); -+ break; -+ default: -+ ok = False; -+ break; -+ } -+ return ok; -+} -+ -+static Bool disInstr_LOONGARCH64_WRK_00 ( DisResult* dres, UInt insn, -+ const VexArchInfo* archinfo, -+ const VexAbiInfo* abiinfo ) -+{ -+ Bool ok; -+ switch (SLICE(insn, 29, 26)) { -+ case 0b0000: -+ ok = disInstr_LOONGARCH64_WRK_00_0000(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0010: -+ switch (SLICE(insn, 25, 20)) { -+ case 0b000001: -+ ok = gen_fmadd_s(dres, insn, archinfo, abiinfo); ++ case 0b0101000: ++ switch (SLICE(insn, 14, 10)) { ++ case 0b00001: ++ ok = gen_fabs_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b000010: -+ ok = gen_fmadd_d(dres, insn, archinfo, abiinfo); ++ case 0b00010: ++ ok = gen_fabs_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b000101: -+ ok = gen_fmsub_s(dres, insn, archinfo, abiinfo); ++ case 0b00101: ++ ok = gen_fneg_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b000110: -+ ok = gen_fmsub_d(dres, insn, archinfo, abiinfo); ++ case 0b00110: ++ ok = gen_fneg_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b001001: -+ ok = gen_fnmadd_s(dres, insn, archinfo, abiinfo); ++ case 0b01001: ++ ok = gen_flogb_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b001010: -+ ok = gen_fnmadd_d(dres, insn, archinfo, abiinfo); ++ case 0b01010: ++ ok = gen_flogb_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b001101: -+ ok = gen_fnmsub_s(dres, insn, archinfo, abiinfo); ++ case 0b01101: ++ ok = gen_fclass_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b001110: -+ ok = gen_fnmsub_d(dres, insn, archinfo, abiinfo); ++ case 0b01110: ++ ok = gen_fclass_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10001: ++ ok = gen_fsqrt_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10010: ++ ok = gen_fsqrt_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10101: ++ ok = gen_frecip_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10110: ++ ok = gen_frecip_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b11001: ++ ok = gen_frsqrt_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b11010: ++ ok = gen_frsqrt_d(dres, insn, archinfo, abiinfo); + break; + default: + ok = False; + break; + } + break; -+ case 0b0011: -+ switch (SLICE(insn, 25, 20)) { -+ case 0b000001: ++ case 0b0101001: ++ switch (SLICE(insn, 14, 10)) { ++ case 0b00101: ++ ok = gen_fmov_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b00110: ++ ok = gen_fmov_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01001: ++ ok = gen_movgr2fr_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01010: ++ ok = gen_movgr2fr_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01011: ++ ok = gen_movgr2frh_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01101: ++ ok = gen_movfr2gr_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01110: ++ ok = gen_movfr2gr_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01111: ++ ok = gen_movfrh2gr_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10000: ++ ok = gen_movgr2fcsr(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10010: ++ ok = gen_movfcsr2gr(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10100: + if (SLICE(insn, 4, 3) == 0b00) { -+ ok = disInstr_LOONGARCH64_WRK_FCMP_S(dres, insn, archinfo, abiinfo); ++ ok = gen_movfr2cf(dres, insn, archinfo, abiinfo); + } else { + ok = False; + } + break; -+ case 0b000010: ++ case 0b10101: ++ if (SLICE(insn, 9, 8) == 0b00) { ++ ok = gen_movcf2fr(dres, insn, archinfo, abiinfo); ++ } else { ++ ok = False; ++ } ++ break; ++ case 0b10110: + if (SLICE(insn, 4, 3) == 0b00) { -+ ok = disInstr_LOONGARCH64_WRK_FCMP_D(dres, insn, archinfo, abiinfo); ++ ok = gen_movgr2cf(dres, insn, archinfo, abiinfo); + } else { + ok = False; + } + break; -+ case 0b010000: -+ if (SLICE(insn, 19, 18) == 0b00) { -+ ok = gen_fsel(dres, insn, archinfo, abiinfo); ++ case 0b10111: ++ if (SLICE(insn, 9, 8) == 0b00) { ++ ok = gen_movcf2gr(dres, insn, archinfo, abiinfo); + } else { + ok = False; + } @@ -11717,78 +12757,126 @@ index 0000000..1a9a2c0 + break; + } + break; -+ case 0b0100: -+ ok = gen_addu16i_d(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0101: -+ if (SLICE(insn, 25, 25) == 0) { -+ ok = gen_lu12i_w(dres, insn, archinfo, abiinfo); -+ } else { -+ ok = gen_lu32i_d(dres, insn, archinfo, abiinfo); ++ case 0b0110010: ++ switch (SLICE(insn, 14, 10)) { ++ case 0b00110: ++ ok = gen_fcvt_s_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01001: ++ ok = gen_fcvt_d_s(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; + } + break; -+ case 0b0110: -+ if (SLICE(insn, 25, 25) == 0) { -+ ok = gen_pcaddi(dres, insn, archinfo, abiinfo); -+ } else { -+ ok = gen_pcalau12i(dres, insn, archinfo, abiinfo); ++ case 0b0110100: ++ switch (SLICE(insn, 14, 10)) { ++ case 0b00001: ++ ok = gen_ftintrm_w_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b00010: ++ ok = gen_ftintrm_w_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01001: ++ ok = gen_ftintrm_l_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01010: ++ ok = gen_ftintrm_l_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10001: ++ ok = gen_ftintrp_w_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10010: ++ ok = gen_ftintrp_w_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b11001: ++ ok = gen_ftintrp_l_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b11010: ++ ok = gen_ftintrp_l_d(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; + } + break; -+ case 0b0111: -+ if (SLICE(insn, 25, 25) == 0) { -+ ok = gen_pcaddu12i(dres, insn, archinfo, abiinfo); -+ } else { -+ ok = gen_pcaddu18i(dres, insn, archinfo, abiinfo); ++ case 0b0110101: ++ switch (SLICE(insn, 14, 10)) { ++ case 0b00001: ++ ok = gen_ftintrz_w_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b00010: ++ ok = gen_ftintrz_w_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01001: ++ ok = gen_ftintrz_l_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01010: ++ ok = gen_ftintrz_l_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10001: ++ ok = gen_ftintrne_w_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10010: ++ ok = gen_ftintrne_w_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b11001: ++ ok = gen_ftintrne_l_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b11010: ++ ok = gen_ftintrne_l_d(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; + } + break; -+ case 0b1000: -+ switch (SLICE(insn, 25, 24)) { -+ case 0b00: -+ ok = gen_ll_w(dres, insn, archinfo, abiinfo); ++ case 0b0110110: ++ switch (SLICE(insn, 14, 10)) { ++ case 0b00001: ++ ok = gen_ftint_w_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b01: -+ ok = gen_sc_w(dres, insn, archinfo, abiinfo); ++ case 0b00010: ++ ok = gen_ftint_w_d(dres, insn, archinfo, abiinfo); + break; -+ case 0b10: -+ ok = gen_ll_d(dres, insn, archinfo, abiinfo); ++ case 0b01001: ++ ok = gen_ftint_l_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b11: -+ ok = gen_sc_d(dres, insn, archinfo, abiinfo); ++ case 0b01010: ++ ok = gen_ftint_l_d(dres, insn, archinfo, abiinfo); + break; + default: + ok = False; + break; + } + break; -+ case 0b1001: -+ switch (SLICE(insn, 25, 24)) { -+ case 0b00: -+ ok = gen_ldptr_w(dres, insn, archinfo, abiinfo); ++ case 0b0111010: ++ switch (SLICE(insn, 14, 10)) { ++ case 0b00100: ++ ok = gen_ffint_s_w(dres, insn, archinfo, abiinfo); + break; -+ case 0b01: -+ ok = gen_stptr_w(dres, insn, archinfo, abiinfo); ++ case 0b00110: ++ ok = gen_ffint_s_l(dres, insn, archinfo, abiinfo); + break; -+ case 0b10: -+ ok = gen_ldptr_d(dres, insn, archinfo, abiinfo); ++ case 0b01000: ++ ok = gen_ffint_d_w(dres, insn, archinfo, abiinfo); + break; -+ case 0b11: -+ ok = gen_stptr_d(dres, insn, archinfo, abiinfo); ++ case 0b01010: ++ ok = gen_ffint_d_l(dres, insn, archinfo, abiinfo); + break; + default: + ok = False; + break; + } + break; -+ case 0b1010: -+ ok = disInstr_LOONGARCH64_WRK_00_1010(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b1110: -+ switch (SLICE(insn, 25, 22)) { -+ case 0b0000: -+ ok = disInstr_LOONGARCH64_WRK_00_1110_0000(dres, insn, archinfo, abiinfo); ++ case 0b0111100: ++ switch (SLICE(insn, 14, 10)) { ++ case 0b10001: ++ ok = gen_frint_s(dres, insn, archinfo, abiinfo); + break; -+ case 0b0001: -+ ok = disInstr_LOONGARCH64_WRK_00_1110_0001(dres, insn, archinfo, abiinfo); ++ case 0b10010: ++ ok = gen_frint_d(dres, insn, archinfo, abiinfo); + break; + default: + ok = False; @@ -11799,4751 +12887,7178 @@ index 0000000..1a9a2c0 + ok = False; + break; + } ++ + return ok; +} + -+static Bool disInstr_LOONGARCH64_WRK_01 ( DisResult* dres, UInt insn, -+ const VexArchInfo* archinfo, -+ const VexAbiInfo* abiinfo ) ++static Bool disInstr_LOONGARCH64_WRK_00_0000 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ + Bool ok; -+ switch (SLICE(insn, 29, 26)) { ++ ++ switch (SLICE(insn, 25, 22)) { + case 0b0000: -+ ok = gen_beqz(dres, insn, archinfo, abiinfo); ++ ok = disInstr_LOONGARCH64_WRK_00_0000_0000(dres, insn, archinfo, abiinfo); + break; + case 0b0001: -+ ok = gen_bnez(dres, insn, archinfo, abiinfo); ++ ok = disInstr_LOONGARCH64_WRK_00_0000_0001(dres, insn, archinfo, abiinfo); + break; + case 0b0010: -+ switch (SLICE(insn, 9, 8)) { -+ case 0b00: -+ ok = gen_bceqz(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b01: -+ ok = gen_bcnez(dres, insn, archinfo, abiinfo); -+ break; -+ default: -+ ok = False; -+ break; -+ } ++ ok = gen_bstrins_d(dres, insn, archinfo, abiinfo); + break; + case 0b0011: -+ ok = gen_jirl(dres, insn, archinfo, abiinfo); ++ ok = gen_bstrpick_d(dres, insn, archinfo, abiinfo); + break; + case 0b0100: -+ ok = gen_b(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0101: -+ ok = gen_bl(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0110: -+ ok = gen_beq(dres, insn, archinfo, abiinfo); -+ break; -+ case 0b0111: -+ ok = gen_bne(dres, insn, archinfo, abiinfo); ++ ok = disInstr_LOONGARCH64_WRK_00_0000_0100(dres, insn, archinfo, abiinfo); + break; + case 0b1000: -+ ok = gen_blt(dres, insn, archinfo, abiinfo); ++ ok = gen_slti(dres, insn, archinfo, abiinfo); + break; + case 0b1001: -+ ok = gen_bge(dres, insn, archinfo, abiinfo); ++ ok = gen_sltui(dres, insn, archinfo, abiinfo); + break; + case 0b1010: -+ ok = gen_bltu(dres, insn, archinfo, abiinfo); ++ ok = gen_addi_w(dres, insn, archinfo, abiinfo); + break; + case 0b1011: -+ ok = gen_bgeu(dres, insn, archinfo, abiinfo); ++ ok = gen_addi_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1100: ++ ok = gen_lu52i_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1101: ++ ok = gen_andi(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1110: ++ ok = gen_ori(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1111: ++ ok = gen_xori(dres, insn, archinfo, abiinfo); + break; + default: + ok = False; + break; + } ++ + return ok; +} + -+static Bool disInstr_LOONGARCH64_WRK ( /*MB_OUT*/DisResult* dres, -+ const UChar* guest_instr, -+ const VexArchInfo* archinfo, -+ const VexAbiInfo* abiinfo, -+ Bool sigill_diag ) ++static Bool disInstr_LOONGARCH64_WRK_00_1010 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ /* Set result defaults. */ -+ dres->whatNext = Dis_Continue; -+ dres->len = 4; -+ dres->jk_StopHere = Ijk_INVALID; -+ dres->hint = Dis_HintNone; -+ -+ /* At least this is simple on LOONGARCH64: insns are all 4 bytes long, -+ and 4-aligned. So just fish the whole thing out of memory right now -+ and have done. */ -+ UInt insn = getUInt(guest_instr); -+ DIP("\t0x%llx:\t0x%08x\t", (Addr64)guest_PC_curr_instr, insn); -+ vassert((guest_PC_curr_instr & 3ULL) == 0); ++ Bool ok; + -+ /* Spot "Special" instructions (see comment at top of file). */ -+ Bool ok = disInstr_LOONGARCH64_WRK_special(dres, guest_instr); -+ if (ok) -+ return ok; -+ -+ /* Main LOONGARCH64 instruction decoder starts here. */ -+ switch (SLICE(insn, 31, 30)) { -+ case 0b00: -+ ok = disInstr_LOONGARCH64_WRK_00(dres, insn, archinfo, abiinfo); ++ switch (SLICE(insn, 25, 22)) { ++ case 0b0000: ++ ok = gen_ld_b(dres, insn, archinfo, abiinfo); + break; -+ case 0b01: -+ ok = disInstr_LOONGARCH64_WRK_01(dres, insn, archinfo, abiinfo); ++ case 0b0001: ++ ok = gen_ld_h(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0010: ++ ok = gen_ld_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0011: ++ ok = gen_ld_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0100: ++ ok = gen_st_b(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0101: ++ ok = gen_st_h(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0110: ++ ok = gen_st_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0111: ++ ok = gen_st_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1000: ++ ok = gen_ld_bu(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1001: ++ ok = gen_ld_hu(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1010: ++ ok = gen_ld_wu(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1011: ++ ok = gen_preld(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1100: ++ ok = gen_fld_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1101: ++ ok = gen_fst_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1110: ++ ok = gen_fld_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1111: ++ ok = gen_fst_d(dres, insn, archinfo, abiinfo); + break; + default: + ok = False; + break; + } + -+ /* If the next-level down decoders failed, make sure |dres| didn't -+ get changed. */ -+ if (!ok) { -+ vassert(dres->whatNext == Dis_Continue); -+ vassert(dres->len == 4); -+ vassert(dres->jk_StopHere == Ijk_INVALID); -+ } + return ok; +} + -+ -+/*------------------------------------------------------------*/ -+/*--- Top-level fn ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Disassemble a single instruction into IR. The instruction -+ is located in host memory at &guest_code[delta]. */ -+ -+DisResult disInstr_LOONGARCH64 ( IRSB* irsb_IN, -+ const UChar* guest_code_IN, -+ Long delta_IN, -+ Addr guest_IP, -+ VexArch guest_arch, -+ const VexArchInfo* archinfo, -+ const VexAbiInfo* abiinfo, -+ VexEndness host_endness_IN, -+ Bool sigill_diag_IN ) ++static Bool disInstr_LOONGARCH64_WRK_00_1011 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ DisResult dres; -+ vex_bzero(&dres, sizeof(dres)); -+ -+ /* Set globals (see top of this file) */ -+ vassert(guest_arch == VexArchLOONGARCH64); -+ -+ irsb = irsb_IN; -+ host_endness = host_endness_IN; -+ guest_PC_curr_instr = (Addr64)guest_IP; -+ -+ /* Try to decode */ -+ Bool ok = disInstr_LOONGARCH64_WRK(&dres, -+ &guest_code_IN[delta_IN], -+ archinfo, abiinfo, sigill_diag_IN); -+ -+ if (ok) { -+ /* All decode successes end up here. */ -+ vassert(dres.len == 4 || dres.len == 20); -+ switch (dres.whatNext) { -+ case Dis_Continue: -+ putPC(mkU64(dres.len + guest_PC_curr_instr)); -+ break; -+ case Dis_StopHere: -+ break; -+ default: -+ vassert(0); -+ break; -+ } -+ DIP("\n"); -+ } else { -+ /* All decode failures end up here. */ -+ if (sigill_diag_IN) { -+ Int i, j; -+ UChar buf[64]; -+ UInt insn = getUInt(&guest_code_IN[delta_IN]); -+ vex_bzero(buf, sizeof(buf)); -+ for (i = j = 0; i < 32; i++) { -+ if (i > 0 && (i & 3) == 0) -+ buf[j++] = ' '; -+ buf[j++] = (insn & (1 << (31 - i))) ? '1' : '0'; -+ } -+ vex_printf("disInstr(loongarch64): unhandled instruction 0x%08x\n", insn); -+ vex_printf("disInstr(loongarch64): %s\n", buf); -+ } ++ Bool ok; + -+ /* Tell the dispatcher that this insn cannot be decoded, and so -+ has not been executed, and (is currently) the next to be -+ executed. PC should be up-to-date since it is made so at the -+ start of each insn, but nevertheless be paranoid and update -+ it again right now. */ -+ putPC(mkU64(guest_PC_curr_instr)); -+ dres.len = 0; -+ dres.whatNext = Dis_StopHere; -+ dres.jk_StopHere = Ijk_NoDecode; ++ switch (SLICE(insn, 23, 22)) { ++ case 0b00: ++ ok = gen_vld(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01: ++ ok = gen_vst(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10: ++ ok = gen_xvld(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b11: ++ ok = gen_xvst(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; + } + -+ return dres; -+} -+ -+ -+/*--------------------------------------------------------------------*/ -+/*--- end guest_loongarch64_toIR.c ---*/ -+/*--------------------------------------------------------------------*/ -diff --git a/VEX/priv/host_loongarch64_defs.c b/VEX/priv/host_loongarch64_defs.c -new file mode 100644 -index 0000000..1bc65f5 ---- /dev/null -+++ b/VEX/priv/host_loongarch64_defs.c -@@ -0,0 +1,3015 @@ -+ -+/*---------------------------------------------------------------*/ -+/*--- begin host_loongarch64_defs.c ---*/ -+/*---------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright (C) 2021-2022 Loongson Technology Corporation Limited -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, see . -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+#include "libvex_basictypes.h" -+#include "libvex.h" -+#include "libvex_trc_values.h" -+ -+#include "main_util.h" -+#include "host_generic_regs.h" -+#include "host_loongarch64_defs.h" -+ -+ -+/* --------- Local helpers. --------- */ -+ -+static inline void mapReg ( HRegRemap* m, HReg* r ) -+{ -+ *r = lookupHRegRemap(m, *r); -+} -+ -+static inline Int extend ( UInt imm, UInt size ) -+{ -+ UInt shift = 32 - size; -+ return (((Int)imm << shift) >> shift); -+} -+ -+ -+/* --------- Registers. --------- */ -+ -+const RRegUniverse* getRRegUniverse_LOONGARCH64 ( void ) -+{ -+ /* The real-register universe is a big constant, so we just want to -+ initialise it once. */ -+ static RRegUniverse rRegUniverse_LOONGARCH64; -+ static Bool rRegUniverse_LOONGARCH64_initted = False; -+ -+ /* Handy shorthand, nothing more */ -+ RRegUniverse* ru = &rRegUniverse_LOONGARCH64; -+ -+ /* This isn't thread-safe. Sigh. */ -+ if (LIKELY(rRegUniverse_LOONGARCH64_initted == True)) -+ return ru; -+ -+ RRegUniverse__init(ru); -+ -+ /* Add the registers. The initial segment of this array must be -+ those available for allocation by reg-alloc, and those that -+ follow are not available for allocation. */ -+ ru->allocable_start[HRcInt64] = ru->size; -+ ru->regs[ru->size++] = hregLOONGARCH64_R23(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R24(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R25(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R26(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R27(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R28(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R29(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R30(); -+ // $r31 is used as guest stack pointer, not available to regalloc. -+ -+ // $r12 is used as a chaining/spill/ProfInc temporary -+ // $r13 is used as a ProfInc temporary -+ ru->regs[ru->size++] = hregLOONGARCH64_R14(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R15(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R16(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R17(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R18(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R19(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R20(); -+ ru->allocable_end[HRcInt64] = ru->size - 1; -+ -+ ru->allocable_start[HRcFlt64] = ru->size; -+ ru->regs[ru->size++] = hregLOONGARCH64_F24(); -+ ru->regs[ru->size++] = hregLOONGARCH64_F25(); -+ ru->regs[ru->size++] = hregLOONGARCH64_F26(); -+ ru->regs[ru->size++] = hregLOONGARCH64_F27(); -+ ru->regs[ru->size++] = hregLOONGARCH64_F28(); -+ ru->regs[ru->size++] = hregLOONGARCH64_F29(); -+ ru->regs[ru->size++] = hregLOONGARCH64_F30(); -+ ru->regs[ru->size++] = hregLOONGARCH64_F31(); -+ ru->allocable_end[HRcFlt64] = ru->size - 1; -+ -+ ru->allocable = ru->size; -+ -+ /* And other regs, not available to the allocator. */ -+ ru->regs[ru->size++] = hregLOONGARCH64_R0(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R1(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R2(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R3(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R4(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R5(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R6(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R7(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R8(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R9(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R10(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R11(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R12(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R13(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R21(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R22(); -+ ru->regs[ru->size++] = hregLOONGARCH64_R31(); -+ ru->regs[ru->size++] = hregLOONGARCH64_FCSR3(); -+ -+ rRegUniverse_LOONGARCH64_initted = True; -+ -+ RRegUniverse__check_is_sane(ru); -+ return ru; ++ return ok; +} + -+UInt ppHRegLOONGARCH64 ( HReg reg ) ++static Bool disInstr_LOONGARCH64_WRK_00_1100 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ Int r; -+ Int ret = 0; -+ static const HChar* ireg_names[32] = { -+ "$zero", -+ "$ra", -+ "$tp", -+ "$sp", -+ "$a0", "$a1", "$a2", "$a3", "$a4", "$a5", "$a6", "$a7", -+ "$t0", "$t1", "$t2", "$t3", "$t4", "$t5", "$t6", "$t7", "$t8", -+ "$r21", /* Reserved */ -+ "$fp", -+ "$s0", "$s1", "$s2", "$s3", "$s4", "$s5", "$s6", "$s7", "$s8" -+ }; -+ static const HChar* freg_names[32] = { -+ "$fa0", "$fa1", "$fa2", "$fa3", "$fa4", "$fa5", "$fa6", "$fa7", -+ "$ft0", "$ft1", "$ft2", "$ft3", "$ft4", "$ft5", "$ft6", "$ft7", -+ "$ft8", "$ft9", "$ft10", "$ft11", "$ft12", "$ft13", "$ft14", "$ft15", -+ "$fs0", "$fs1", "$fs2", "$fs3", "$fs4", "$fs5", "$fs6", "$fs7" -+ }; ++ Bool ok; + -+ /* Be generic for all virtual regs. */ -+ if (hregIsVirtual(reg)) { -+ return ppHReg(reg); ++ if (!(archinfo->hwcaps & VEX_HWCAPS_LOONGARCH_LSX)) { ++ dres->jk_StopHere = Ijk_SigILL; ++ dres->whatNext = Dis_StopHere; ++ return True; + } + -+ /* But specific for real regs. */ -+ switch (hregClass(reg)) { -+ case HRcInt32: -+ r = hregEncoding(reg); -+ vassert(r >= 0 && r < 4); -+ ret = vex_printf("$fcsr%d", r); -+ break; -+ case HRcInt64: -+ r = hregEncoding(reg); -+ vassert(r >= 0 && r < 32); -+ ret = vex_printf("%s", ireg_names[r]); ++ switch (SLICE(insn, 25, 24)) { ++ case 0b00: ++ ok = gen_vldrepl(dres, insn, archinfo, abiinfo); + break; -+ case HRcFlt64: -+ r = hregEncoding(reg); -+ vassert(r >= 0 && r < 32); -+ ret = vex_printf("%s", freg_names[r]); ++ case 0b01: ++ ok = gen_vstelm(dres, insn, archinfo, abiinfo); + break; + default: -+ vpanic("ppHRegLOONGARCH64"); ++ ok = False; + break; + } + -+ return ret; ++ return ok; +} + -+ -+/* --------- Condition codes, LOONGARCH64 encoding. --------- */ -+ -+static inline const HChar* showLOONGARCH64CondCode ( LOONGARCH64CondCode cond ) ++static Bool disInstr_LOONGARCH64_WRK_00_1110_0000 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ const HChar* ret; -+ switch (cond) { -+ case LAcc_EQ: -+ ret = "eq"; /* equal */ ++ Bool ok; ++ ++ switch (SLICE(insn, 21, 15)) { ++ case 0b0000000: ++ ok = gen_ldx_b(dres, insn, archinfo, abiinfo); + break; -+ case LAcc_NE: -+ ret = "ne"; /* not equal */ ++ case 0b0001000: ++ ok = gen_ldx_h(dres, insn, archinfo, abiinfo); + break; -+ case LAcc_LT: -+ ret = "lt"; /* less than (signed) */ ++ case 0b0010000: ++ ok = gen_ldx_w(dres, insn, archinfo, abiinfo); + break; -+ case LAcc_GE: -+ ret = "ge"; /* great equal (signed) */ ++ case 0b0011000: ++ ok = gen_ldx_d(dres, insn, archinfo, abiinfo); + break; -+ case LAcc_LTU: -+ ret = "ltu"; /* less than (unsigned) */ ++ case 0b0100000: ++ ok = gen_stx_b(dres, insn, archinfo, abiinfo); + break; -+ case LAcc_GEU: -+ ret = "geu"; /* great equal (unsigned) */ ++ case 0b0101000: ++ ok = gen_stx_h(dres, insn, archinfo, abiinfo); + break; -+ case LAcc_AL: -+ ret = "al"; /* always (unconditional) */ ++ case 0b0110000: ++ ok = gen_stx_w(dres, insn, archinfo, abiinfo); + break; -+ default: -+ vpanic("showLOONGARCH64CondCode"); ++ case 0b0111000: ++ ok = gen_stx_d(dres, insn, archinfo, abiinfo); + break; -+ } -+ return ret; -+} -+ -+ -+/* --------- Memory address expressions (amodes). --------- */ -+ -+LOONGARCH64AMode* LOONGARCH64AMode_RI ( HReg reg, UShort imm ) -+{ -+ LOONGARCH64AMode* am = LibVEX_Alloc_inline(sizeof(LOONGARCH64AMode)); -+ am->tag = LAam_RI; -+ am->LAam.RI.base = reg; -+ am->LAam.RI.index = imm; -+ return am; -+} -+ -+LOONGARCH64AMode* LOONGARCH64AMode_RR ( HReg base, HReg index ) -+{ -+ LOONGARCH64AMode* am = LibVEX_Alloc_inline(sizeof(LOONGARCH64AMode)); -+ am->tag = LAam_RR; -+ am->LAam.RR.base = base; -+ am->LAam.RR.index = index; -+ return am; -+} -+ -+static inline void ppLOONGARCH64AMode ( LOONGARCH64AMode* am ) -+{ -+ switch (am->tag) { -+ case LAam_RI: -+ ppHRegLOONGARCH64(am->LAam.RI.base); -+ vex_printf(", "); -+ vex_printf("%d", extend((UInt)am->LAam.RI.index, 12)); ++ case 0b1000000: ++ ok = gen_ldx_bu(dres, insn, archinfo, abiinfo); + break; -+ case LAam_RR: -+ ppHRegLOONGARCH64(am->LAam.RR.base); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(am->LAam.RR.index); ++ case 0b1001000: ++ ok = gen_ldx_hu(dres, insn, archinfo, abiinfo); + break; -+ default: -+ vpanic("ppLOONGARCH64AMode"); ++ case 0b1010000: ++ ok = gen_ldx_wu(dres, insn, archinfo, abiinfo); + break; -+ } -+} -+ -+static inline void addRegUsage_LOONGARCH64AMode( HRegUsage* u, -+ LOONGARCH64AMode* am ) -+{ -+ switch (am->tag) { -+ case LAam_RI: -+ addHRegUse(u, HRmRead, am->LAam.RI.base); ++ case 0b1011000: ++ ok = gen_preldx(dres, insn, archinfo, abiinfo); + break; -+ case LAam_RR: -+ addHRegUse(u, HRmRead, am->LAam.RR.base); -+ addHRegUse(u, HRmRead, am->LAam.RR.index); ++ case 0b1100000: ++ ok = gen_fldx_s(dres, insn, archinfo, abiinfo); + break; -+ default: -+ vpanic("addRegUsage_LOONGARCH64AMode"); ++ case 0b1101000: ++ ok = gen_fldx_d(dres, insn, archinfo, abiinfo); + break; -+ } -+} -+ -+static inline void mapRegs_LOONGARCH64AMode( HRegRemap* m, -+ LOONGARCH64AMode* am ) -+{ -+ switch (am->tag) { -+ case LAam_RI: -+ mapReg(m, &am->LAam.RI.base); ++ case 0b1110000: ++ ok = gen_fstx_s(dres, insn, archinfo, abiinfo); + break; -+ case LAam_RR: -+ mapReg(m, &am->LAam.RR.base); -+ mapReg(m, &am->LAam.RR.index); ++ case 0b1111000: ++ ok = gen_fstx_d(dres, insn, archinfo, abiinfo); + break; + default: -+ vpanic("mapRegs_LOONGARCH64AMode"); ++ ok = False; + break; + } -+} -+ -+ -+/* --------- Operand, which can be reg or imm. --------- */ + -+LOONGARCH64RI* LOONGARCH64RI_R ( HReg reg ) -+{ -+ LOONGARCH64RI* op = LibVEX_Alloc_inline(sizeof(LOONGARCH64RI)); -+ op->tag = LAri_Reg; -+ op->LAri.R.reg = reg; -+ return op; ++ return ok; +} + -+LOONGARCH64RI* LOONGARCH64RI_I ( UShort imm, UChar size, Bool isSigned ) ++static Bool disInstr_LOONGARCH64_WRK_00_1110_0001 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ LOONGARCH64RI* op = LibVEX_Alloc_inline(sizeof(LOONGARCH64RI)); -+ op->tag = LAri_Imm; -+ op->LAri.I.imm = imm; -+ op->LAri.I.size = size; -+ op->LAri.I.isSigned = isSigned; -+ vassert(imm < (1 << size)); -+ vassert(size == 5 || size == 6 || size == 12); -+ return op; -+} ++ Bool ok; + -+static inline void ppLOONGARCH64RI ( LOONGARCH64RI* ri ) -+{ -+ switch (ri->tag) { -+ case LAri_Reg: -+ ppHRegLOONGARCH64(ri->LAri.R.reg); ++ switch (SLICE(insn, 21, 15)) { ++ case 0b1000000: ++ ok = gen_amswap_w(dres, insn, archinfo, abiinfo); + break; -+ case LAri_Imm: -+ if (ri->LAri.I.isSigned) { -+ vex_printf("%d", extend((UInt)ri->LAri.I.imm, ri->LAri.I.size)); -+ } else { -+ vex_printf("%u", (UInt)ri->LAri.I.imm); -+ } ++ case 0b1000001: ++ ok = gen_amswap_d(dres, insn, archinfo, abiinfo); + break; -+ default: -+ vpanic("ppLOONGARCH64RI"); ++ case 0b1000010: ++ ok = gen_amadd_w(dres, insn, archinfo, abiinfo); + break; -+ } -+} -+ -+static inline void addRegUsage_LOONGARCH64RI( HRegUsage* u, LOONGARCH64RI* ri ) -+{ -+ switch (ri->tag) { -+ case LAri_Reg: -+ addHRegUse(u, HRmRead, ri->LAri.R.reg); ++ case 0b1000011: ++ ok = gen_amadd_d(dres, insn, archinfo, abiinfo); + break; -+ case LAri_Imm: ++ case 0b1000100: ++ ok = gen_amand_w(dres, insn, archinfo, abiinfo); + break; -+ default: -+ vpanic("addRegUsage_LOONGARCH64RI"); ++ case 0b1000101: ++ ok = gen_amand_d(dres, insn, archinfo, abiinfo); + break; -+ } -+} -+ -+static inline void mapRegs_LOONGARCH64RI( HRegRemap* m, LOONGARCH64RI* ri ) -+{ -+ switch (ri->tag) { -+ case LAri_Reg: -+ mapReg(m, &ri->LAri.R.reg); ++ case 0b1000110: ++ ok = gen_amor_w(dres, insn, archinfo, abiinfo); + break; -+ case LAri_Imm: ++ case 0b1000111: ++ ok = gen_amor_d(dres, insn, archinfo, abiinfo); + break; -+ default: -+ vpanic("mapRegs_LOONGARCH64RI"); ++ case 0b1001000: ++ ok = gen_amxor_w(dres, insn, archinfo, abiinfo); + break; -+ } -+} -+ -+ -+/* --------- Instructions. --------- */ -+ -+static inline const HChar* showLOONGARCH64UnOp ( LOONGARCH64UnOp op ) -+{ -+ switch (op) { -+ case LAun_CLZ_W: -+ return "clz.w"; -+ case LAun_CTZ_W: -+ return "ctz.w"; -+ case LAun_CLZ_D: -+ return "clz.d"; -+ case LAun_CTZ_D: -+ return "ctz.w"; -+ case LAun_EXT_W_H: -+ return "ext.w.h"; -+ case LAun_EXT_W_B: -+ return "ext.w.b"; -+ default: -+ vpanic("showLOONGARCH64UnOp"); ++ case 0b1001001: ++ ok = gen_amxor_d(dres, insn, archinfo, abiinfo); + break; -+ } -+} -+ -+static inline const HChar* showLOONGARCH64BinOp ( LOONGARCH64BinOp op ) -+{ -+ switch (op) { -+ case LAbin_ADD_W: -+ return "add.w"; -+ case LAbin_ADD_D: -+ return "add.d"; -+ case LAbin_SUB_W: -+ return "sub.w"; -+ case LAbin_SUB_D: -+ return "sub.d"; -+ case LAbin_NOR: -+ return "nor"; -+ case LAbin_AND: -+ return "and"; -+ case LAbin_OR: -+ return "or"; -+ case LAbin_XOR: -+ return "xor"; -+ case LAbin_SLL_W: -+ return "sll.w"; -+ case LAbin_SRL_W: -+ return "srl.w"; -+ case LAbin_SRA_W: -+ return "sra.w"; -+ case LAbin_SLL_D: -+ return "sll.d"; -+ case LAbin_SRL_D: -+ return "srl.d"; -+ case LAbin_SRA_D: -+ return "sra.d"; -+ case LAbin_MUL_W: -+ return "mul.w"; -+ case LAbin_MUL_D: -+ return "mul.d"; -+ case LAbin_MULH_W: -+ return "mulh.w"; -+ case LAbin_MULH_WU: -+ return "mulh.wu"; -+ case LAbin_MULH_D: -+ return "mulh.d"; -+ case LAbin_MULH_DU: -+ return "mulh.du"; -+ case LAbin_MULW_D_W: -+ return "mulw.d.w"; -+ case LAbin_MULW_D_WU: -+ return "mulw.d.wu"; -+ case LAbin_DIV_W: -+ return "div.w"; -+ case LAbin_MOD_W: -+ return "mod.w"; -+ case LAbin_DIV_WU: -+ return "div.wu"; -+ case LAbin_MOD_WU: -+ return "mod.wu"; -+ case LAbin_DIV_D: -+ return "div.d"; -+ case LAbin_MOD_D: -+ return "mod.d"; -+ case LAbin_DIV_DU: -+ return "div.du"; -+ case LAbin_MOD_DU: -+ return "mod.du"; -+ case LAbin_SLLI_W: -+ return "slli.w"; -+ case LAbin_SLLI_D: -+ return "slli.d"; -+ case LAbin_SRLI_W: -+ return "srli.w"; -+ case LAbin_SRLI_D: -+ return "srli.d"; -+ case LAbin_SRAI_W: -+ return "srai.w"; -+ case LAbin_SRAI_D: -+ return "srai.d"; -+ case LAbin_ADDI_W: -+ return "addi.w"; -+ case LAbin_ADDI_D: -+ return "addi.d"; -+ case LAbin_ANDI: -+ return "andi"; -+ case LAbin_ORI: -+ return "ori"; -+ case LAbin_XORI: -+ return "xori"; -+ default: -+ vpanic("showLOONGARCH64BinOp"); ++ case 0b1001010: ++ ok = gen_ammax_w(dres, insn, archinfo, abiinfo); + break; -+ } -+} -+ -+static inline const HChar* showLOONGARCH64LoadOp ( LOONGARCH64LoadOp op ) -+{ -+ switch (op) { -+ case LAload_LD_D: -+ return "ld.d"; -+ case LAload_LD_BU: -+ return "ld.bu"; -+ case LAload_LD_HU: -+ return "ld.hu"; -+ case LAload_LD_WU: -+ return "ld.wu"; -+ case LAload_LDX_D: -+ return "ldx.d"; -+ case LAload_LDX_BU: -+ return "ldx.bu"; -+ case LAload_LDX_HU: -+ return "ldx.hu"; -+ case LAload_LDX_WU: -+ return "ldx.wu"; -+ default: -+ vpanic("LOONGARCH64LoadOp"); ++ case 0b1001011: ++ ok = gen_ammax_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1001100: ++ ok = gen_ammin_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1001101: ++ ok = gen_ammin_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1001110: ++ ok = gen_ammax_wu(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1001111: ++ ok = gen_ammax_du(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1010000: ++ ok = gen_ammin_wu(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1010001: ++ ok = gen_ammin_du(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1010010: ++ ok = gen_amswap_db_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1010011: ++ ok = gen_amswap_db_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1010100: ++ ok = gen_amadd_db_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1010101: ++ ok = gen_amadd_db_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1010110: ++ ok = gen_amand_db_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1010111: ++ ok = gen_amand_db_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1011000: ++ ok = gen_amor_db_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1011001: ++ ok = gen_amor_db_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1011010: ++ ok = gen_amxor_db_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1011011: ++ ok = gen_amxor_db_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1011100: ++ ok = gen_ammax_db_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1011101: ++ ok = gen_ammax_db_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1011110: ++ ok = gen_ammin_db_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1011111: ++ ok = gen_ammin_db_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1100000: ++ ok = gen_ammax_db_wu(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1100001: ++ ok = gen_ammax_db_du(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1100010: ++ ok = gen_ammin_db_wu(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1100011: ++ ok = gen_ammin_db_du(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1100100: ++ ok = gen_dbar(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1100101: ++ ok = gen_ibar(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1101000: ++ ok = gen_fldgt_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1101001: ++ ok = gen_fldgt_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1101010: ++ ok = gen_fldle_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1101011: ++ ok = gen_fldle_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1101100: ++ ok = gen_fstgt_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1101101: ++ ok = gen_fstgt_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1101110: ++ ok = gen_fstle_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1101111: ++ ok = gen_fstle_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1110000: ++ ok = gen_ldgt_b(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1110001: ++ ok = gen_ldgt_h(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1110010: ++ ok = gen_ldgt_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1110011: ++ ok = gen_ldgt_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1110100: ++ ok = gen_ldle_b(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1110101: ++ ok = gen_ldle_h(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1110110: ++ ok = gen_ldle_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1110111: ++ ok = gen_ldle_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1111000: ++ ok = gen_stgt_b(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1111001: ++ ok = gen_stgt_h(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1111010: ++ ok = gen_stgt_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1111011: ++ ok = gen_stgt_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1111100: ++ ok = gen_stle_b(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1111101: ++ ok = gen_stle_h(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1111110: ++ ok = gen_stle_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1111111: ++ ok = gen_stle_d(dres, insn, archinfo, abiinfo); + break; -+ } -+} -+ -+static inline const HChar* showLOONGARCH64StoreOp ( LOONGARCH64StoreOp op ) -+{ -+ switch (op) { -+ case LAstore_ST_B: -+ return "st.b"; -+ case LAstore_ST_H: -+ return "st.h"; -+ case LAstore_ST_W: -+ return "st.w"; -+ case LAstore_ST_D: -+ return "st.d"; -+ case LAstore_STX_B: -+ return "stx.b"; -+ case LAstore_STX_H: -+ return "stx.h"; -+ case LAstore_STX_W: -+ return "stx.w"; -+ case LAstore_STX_D: -+ return "stx.d"; + default: -+ vpanic("LOONGARCH64StoreOp"); ++ ok = False; + break; + } ++ ++ return ok; +} + -+static inline const HChar* showLOONGARCH64LLSCOp ( LOONGARCH64LLSCOp op ) ++static Bool disInstr_LOONGARCH64_WRK_FCMP_S ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ switch (op) { -+ case LAllsc_LL_W: -+ return "ll.w"; -+ case LAllsc_SC_W: -+ return "sc.w"; -+ case LAllsc_LL_D: -+ return "ll.d"; -+ case LAllsc_SC_D: -+ return "sc.d"; ++ Bool ok; ++ ++ switch (SLICE(insn, 19, 15)) { ++ case 0x0: ++ ok = gen_fcmp_caf_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x1: ++ ok = gen_fcmp_saf_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x2: ++ ok = gen_fcmp_clt_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x3: ++ ok = gen_fcmp_slt_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x4: ++ ok = gen_fcmp_ceq_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x5: ++ ok = gen_fcmp_seq_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x6: ++ ok = gen_fcmp_cle_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x7: ++ ok = gen_fcmp_sle_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x8: ++ ok = gen_fcmp_cun_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x9: ++ ok = gen_fcmp_sun_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0xa: ++ ok = gen_fcmp_cult_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0xb: ++ ok = gen_fcmp_sult_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0xc: ++ ok = gen_fcmp_cueq_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0xd: ++ ok = gen_fcmp_sueq_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0xe: ++ ok = gen_fcmp_cule_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0xf: ++ ok = gen_fcmp_sule_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x10: ++ ok = gen_fcmp_cne_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x11: ++ ok = gen_fcmp_sne_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x14: ++ ok = gen_fcmp_cor_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x15: ++ ok = gen_fcmp_sor_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x18: ++ ok = gen_fcmp_cune_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x19: ++ ok = gen_fcmp_sune_s(dres, insn, archinfo, abiinfo); ++ break; + default: -+ vpanic("LOONGARCH64LLSCOp"); ++ ok = False; + break; + } ++ ++ return ok; +} + -+static inline const HChar* showLOONGARCH64BarOp ( LOONGARCH64BarOp op ) ++static Bool disInstr_LOONGARCH64_WRK_FCMP_D ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ const HChar* ret; -+ switch (op) { -+ case LAbar_DBAR: -+ return "dbar"; -+ case LAbar_IBAR: -+ return "ibar"; ++ Bool ok; ++ ++ switch (SLICE(insn, 19, 15)) { ++ case 0x0: ++ ok = gen_fcmp_caf_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x1: ++ ok = gen_fcmp_saf_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x2: ++ ok = gen_fcmp_clt_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x3: ++ ok = gen_fcmp_slt_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x4: ++ ok = gen_fcmp_ceq_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x5: ++ ok = gen_fcmp_seq_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x6: ++ ok = gen_fcmp_cle_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x7: ++ ok = gen_fcmp_sle_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x8: ++ ok = gen_fcmp_cun_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x9: ++ ok = gen_fcmp_sun_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0xa: ++ ok = gen_fcmp_cult_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0xb: ++ ok = gen_fcmp_sult_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0xc: ++ ok = gen_fcmp_cueq_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0xd: ++ ok = gen_fcmp_sueq_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0xe: ++ ok = gen_fcmp_cule_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0xf: ++ ok = gen_fcmp_sule_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x10: ++ ok = gen_fcmp_cne_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x11: ++ ok = gen_fcmp_sne_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x14: ++ ok = gen_fcmp_cor_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x15: ++ ok = gen_fcmp_sor_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x18: ++ ok = gen_fcmp_cune_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0x19: ++ ok = gen_fcmp_sune_d(dres, insn, archinfo, abiinfo); ++ break; + default: -+ vpanic("showLOONGARCH64BarOp"); ++ ok = False; + break; + } -+ return ret; ++ ++ return ok; +} + -+static inline const HChar* showLOONGARCH64FpUnOp ( LOONGARCH64FpUnOp op ) -+{ -+ const HChar* ret; -+ switch (op) { -+ case LAfpun_FABS_S: -+ return "fabs.s"; -+ case LAfpun_FABS_D: -+ return "fabs.d"; -+ case LAfpun_FNEG_S: -+ return "fneg.s"; -+ case LAfpun_FNEG_D: -+ return "fneg.d"; -+ case LAfpun_FLOGB_S: -+ return "flogb.s"; -+ case LAfpun_FLOGB_D: -+ return "flogb.d"; -+ case LAfpun_FSQRT_S: -+ return "fsqrt.s"; -+ case LAfpun_FSQRT_D: -+ return "fsqrt.d"; -+ case LAfpun_FRSQRT_S: -+ return "frsqrt.s"; -+ case LAfpun_FRSQRT_D: -+ return "frsqrt.d"; -+ case LAfpun_FCVT_S_D: -+ return "fcvt.s.d"; -+ case LAfpun_FCVT_D_S: -+ return "fcvt.d.s"; -+ case LAfpun_FTINT_W_S: -+ return "ftint.w.s"; -+ case LAfpun_FTINT_W_D: -+ return "ftint.w.d"; -+ case LAfpun_FTINT_L_S: -+ return "ftint.l.s"; -+ case LAfpun_FTINT_L_D: -+ return "ftint.l.d"; -+ case LAfpun_FFINT_S_W: -+ return "ffint.s.w"; -+ case LAfpun_FFINT_S_L: -+ return "ffint.s.l"; -+ case LAfpun_FFINT_D_W: -+ return "ffint.d.w"; -+ case LAfpun_FFINT_D_L: -+ return "ffint.d.l"; -+ case LAfpun_FRINT_S: -+ return "frint.s"; -+ case LAfpun_FRINT_D: -+ return "frint.d"; ++static Bool disInstr_LOONGARCH64_WRK_00 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) ++{ ++ Bool ok; ++ ++ switch (SLICE(insn, 29, 26)) { ++ case 0b0000: ++ ok = disInstr_LOONGARCH64_WRK_00_0000(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0010: ++ switch (SLICE(insn, 25, 20)) { ++ case 0b000001: ++ ok = gen_fmadd_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b000010: ++ ok = gen_fmadd_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b000101: ++ ok = gen_fmsub_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b000110: ++ ok = gen_fmsub_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b001001: ++ ok = gen_fnmadd_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b001010: ++ ok = gen_fnmadd_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b001101: ++ ok = gen_fnmsub_s(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b001110: ++ ok = gen_fnmsub_d(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } ++ break; ++ case 0b0011: ++ switch (SLICE(insn, 25, 20)) { ++ case 0b000001: ++ if (SLICE(insn, 4, 3) == 0b00) { ++ ok = disInstr_LOONGARCH64_WRK_FCMP_S(dres, insn, archinfo, abiinfo); ++ } else { ++ ok = False; ++ } ++ break; ++ case 0b000010: ++ if (SLICE(insn, 4, 3) == 0b00) { ++ ok = disInstr_LOONGARCH64_WRK_FCMP_D(dres, insn, archinfo, abiinfo); ++ } else { ++ ok = False; ++ } ++ break; ++ case 0b010000: ++ if (SLICE(insn, 19, 18) == 0b00) { ++ ok = gen_fsel(dres, insn, archinfo, abiinfo); ++ } else { ++ ok = False; ++ } ++ break; ++ case 0b010101: ++ ok = gen_vshuf_b(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } ++ break; ++ case 0b0100: ++ ok = gen_addu16i_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0101: ++ if (SLICE(insn, 25, 25) == 0) { ++ ok = gen_lu12i_w(dres, insn, archinfo, abiinfo); ++ } else { ++ ok = gen_lu32i_d(dres, insn, archinfo, abiinfo); ++ } ++ break; ++ case 0b0110: ++ if (SLICE(insn, 25, 25) == 0) { ++ ok = gen_pcaddi(dres, insn, archinfo, abiinfo); ++ } else { ++ ok = gen_pcalau12i(dres, insn, archinfo, abiinfo); ++ } ++ break; ++ case 0b0111: ++ if (SLICE(insn, 25, 25) == 0) { ++ ok = gen_pcaddu12i(dres, insn, archinfo, abiinfo); ++ } else { ++ ok = gen_pcaddu18i(dres, insn, archinfo, abiinfo); ++ } ++ break; ++ case 0b1000: ++ switch (SLICE(insn, 25, 24)) { ++ case 0b00: ++ ok = gen_ll_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01: ++ ok = gen_sc_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10: ++ ok = gen_ll_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b11: ++ ok = gen_sc_d(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } ++ break; ++ case 0b1001: ++ switch (SLICE(insn, 25, 24)) { ++ case 0b00: ++ ok = gen_ldptr_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01: ++ ok = gen_stptr_w(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10: ++ ok = gen_ldptr_d(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b11: ++ ok = gen_stptr_d(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } ++ break; ++ case 0b1010: ++ ok = disInstr_LOONGARCH64_WRK_00_1010(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1011: ++ ok = disInstr_LOONGARCH64_WRK_00_1011(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1100: ++ ok = disInstr_LOONGARCH64_WRK_00_1100(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1110: ++ switch (SLICE(insn, 25, 22)) { ++ case 0b0000: ++ ok = disInstr_LOONGARCH64_WRK_00_1110_0000(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0001: ++ ok = disInstr_LOONGARCH64_WRK_00_1110_0001(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } ++ break; + default: -+ vpanic("showLOONGARCH64FpUnOp"); ++ ok = False; + break; + } -+ return ret; ++ ++ return ok; +} + -+static inline const HChar* showLOONGARCH64FpBinOp ( LOONGARCH64FpBinOp op ) ++static Bool disInstr_LOONGARCH64_WRK_01_1100_0000 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ const HChar* ret; -+ switch (op) { -+ case LAfpbin_FADD_S: -+ return "fadd.s"; -+ case LAfpbin_FADD_D: -+ return "fadd.d"; -+ case LAfpbin_FSUB_S: -+ return "fsub.s"; -+ case LAfpbin_FSUB_D: -+ return "fsub.d"; -+ case LAfpbin_FMUL_S: -+ return "fmul.s"; -+ case LAfpbin_FMUL_D: -+ return "fmul.d"; -+ case LAfpbin_FDIV_S: -+ return "fdiv.s"; -+ case LAfpbin_FDIV_D: -+ return "fdiv.d"; -+ case LAfpbin_FMAX_S: -+ return "fmax.s"; -+ case LAfpbin_FMAX_D: -+ return "fmax.d"; -+ case LAfpbin_FMIN_S: -+ return "fmin.s"; -+ case LAfpbin_FMIN_D: -+ return "fmin.d"; -+ case LAfpbin_FMAXA_S: -+ return "fmaxa.s"; -+ case LAfpbin_FMAXA_D: -+ return "fmaxa.d"; -+ case LAfpbin_FMINA_S: -+ return "fmina.s"; -+ case LAfpbin_FMINA_D: -+ return "fmina.d"; -+ case LAfpbin_FSCALEB_S: -+ return "fscaleb.s"; -+ case LAfpbin_FSCALEB_D: -+ return "fscaleb.d"; ++ Bool ok; ++ ++ switch (SLICE(insn, 21, 17)) { ++ case 0b00000: ++ case 0b00001: ++ case 0b00010: ++ case 0b00011: ++ case 0b00100: ++ ok = gen_vcmp_integer(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b00101: ++ case 0b00110: ++ ok = gen_vadd_vsub(dres, insn, archinfo, abiinfo); ++ break; + default: -+ vpanic("showLOONGARCH64FpBinOp"); ++ ok = False; + break; + } -+ return ret; ++ ++ return ok; +} + -+static inline const HChar* showLOONGARCH64FpTriOp ( LOONGARCH64FpTriOp op ) ++static Bool disInstr_LOONGARCH64_WRK_01_1100_0001 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ const HChar* ret; -+ switch (op) { -+ case LAfpbin_FMADD_S: -+ return "fmadd.s"; -+ case LAfpbin_FMADD_D: -+ return "fmadd.d"; -+ case LAfpbin_FMSUB_S: -+ return "fmsub.s"; -+ case LAfpbin_FMSUB_D: -+ return "fmsub.d"; ++ Bool ok; ++ ++ switch (SLICE(insn, 21, 18)) { ++ case 0b1100: ++ case 0b1101: ++ ok = gen_vmax_vmin(dres, insn, archinfo, abiinfo); ++ break; + default: -+ vpanic("showLOONGARCH64FpTriOp"); ++ ok = False; + break; + } -+ return ret; ++ ++ return ok; +} + -+static inline const HChar* showLOONGARCH64FpLoadOp ( LOONGARCH64FpLoadOp op ) ++static Bool disInstr_LOONGARCH64_WRK_01_1100_0100 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ switch (op) { -+ case LAfpload_FLD_S: -+ return "fld.s"; -+ case LAfpload_FLD_D: -+ return "fld.d"; -+ case LAfpload_FLDX_S: -+ return "fldx.s"; -+ case LAfpload_FLDX_D: -+ return "fldx.d"; ++ Bool ok; ++ ++ switch (SLICE(insn, 21, 17)) { ++ case 0b01011: ++ case 0b01100: ++ case 0b01101: ++ case 0b01110: ++ case 0b01111: ++ case 0b10000: ++ ok = gen_evod(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10001: ++ ok = gen_vreplve(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b10011: ++ case 0b10100: ++ ok = gen_logical_v(dres, insn, archinfo, abiinfo); ++ break; + default: -+ vpanic("LOONGARCH64FpLoadOp"); ++ ok = False; + break; + } ++ ++ return ok; +} + -+static inline const HChar* showLOONGARCH64FpStoreOp ( LOONGARCH64FpStoreOp op ) ++static Bool disInstr_LOONGARCH64_WRK_01_1100_1010_01110 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ switch (op) { -+ case LAfpstore_FST_S: -+ return "fst.s"; -+ case LAfpstore_FST_D: -+ return "fst.d"; -+ case LAfpstore_FSTX_S: -+ return "fstx.s"; -+ case LAfpstore_FSTX_D: -+ return "fstx.d"; ++ Bool ok; ++ ++ switch (SLICE(insn, 16, 14)) { ++ case 0b001: ++ ok = gen_vmsk(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b010: ++ ok = gen_vset(dres, insn, archinfo, abiinfo); ++ break; + default: -+ vpanic("LOONGARCH64FpStoreOp"); ++ ok = False; + break; + } ++ ++ return ok; +} + -+static inline const HChar* showLOONGARCH64FpMoveOp ( LOONGARCH64FpMoveOp op ) ++ ++static Bool disInstr_LOONGARCH64_WRK_01_1100_1010_01111 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ switch (op) { -+ case LAfpmove_FMOV_S: -+ return "fmov.s"; -+ case LAfpmove_FMOV_D: -+ return "fmov.d"; -+ case LAfpmove_MOVGR2FR_W: -+ return "movgr2fr.w"; -+ case LAfpmove_MOVGR2FR_D: -+ return "movgr2fr.d"; -+ case LAfpmove_MOVFR2GR_S: -+ return "movfr2gr.s"; -+ case LAfpmove_MOVFR2GR_D: -+ return "movfr2gr.d"; -+ case LAfpmove_MOVGR2FCSR: -+ return "movgr2fcsr"; -+ case LAfpmove_MOVFCSR2GR: -+ return "movfcsr2gr"; ++ Bool ok; ++ ++ switch (SLICE(insn, 16, 14)) { ++ case 0b100: ++ ok = gen_vreplgr2vr(dres, insn, archinfo, abiinfo); ++ break; + default: -+ vpanic("showLOONGARCH64FpMoveOp"); ++ ok = False; + break; + } ++ ++ return ok; +} + -+static inline const HChar* showLOONGARCH64FpCmpOp ( LOONGARCH64FpCmpOp op ) ++static Bool disInstr_LOONGARCH64_WRK_01_1100_1010 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ const HChar* ret; -+ switch (op) { -+ case LAfpcmp_FCMP_CLT_S: -+ return "fcmp.clt.s"; -+ case LAfpcmp_FCMP_CLT_D: -+ return "fcmp.clt.d"; -+ case LAfpcmp_FCMP_CEQ_S: -+ return "fcmp.ceq.s"; -+ case LAfpcmp_FCMP_CEQ_D: -+ return "fcmp.ceq.d"; -+ case LAfpcmp_FCMP_CUN_S: -+ return "fcmp.cun.s"; -+ case LAfpcmp_FCMP_CUN_D: -+ return "fcmp.cun.d"; ++ Bool ok; ++ ++ switch (SLICE(insn, 21, 17)) { ++ case 0b00000: ++ case 0b00001: ++ case 0b00010: ++ case 0b00011: ++ case 0b00100: ++ ok = gen_vcmpi_integer(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b00101: ++ case 0b00110: ++ ok = gen_vaddi_vsubi(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01101: ++ ok = gen_vfrstpi(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01110: ++ ok = disInstr_LOONGARCH64_WRK_01_1100_1010_01110(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01111: ++ ok = disInstr_LOONGARCH64_WRK_01_1100_1010_01111(dres, insn, archinfo, abiinfo); ++ break; + default: -+ vpanic("showLOONGARCH64FpCmpOp"); ++ ok = False; + break; + } -+ return ret; -+} + -+LOONGARCH64Instr* LOONGARCH64Instr_LI ( ULong imm, HReg dst ) -+{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_LI; -+ i->LAin.LI.imm = imm; -+ i->LAin.LI.dst = dst; -+ return i; ++ return ok; +} + -+LOONGARCH64Instr* LOONGARCH64Instr_Unary ( LOONGARCH64UnOp op, -+ HReg src, HReg dst ) ++static Bool disInstr_LOONGARCH64_WRK_01_1100_1011 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_Un; -+ i->LAin.Unary.op = op; -+ i->LAin.Unary.src = src; -+ i->LAin.Unary.dst = dst; -+ return i; -+} ++ Bool ok; + -+LOONGARCH64Instr* LOONGARCH64Instr_Binary ( LOONGARCH64BinOp op, -+ LOONGARCH64RI* src2, -+ HReg src1, HReg dst ) -+{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_Bin; -+ i->LAin.Binary.op = op; -+ i->LAin.Binary.src2 = src2; -+ i->LAin.Binary.src1 = src1; -+ i->LAin.Binary.dst = dst; -+ return i; ++ switch (SLICE(insn, 21, 16)) { ++ case 0b101111: ++ case 0b110011: ++ ok = gen_vpickve2gr(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } ++ ++ return ok; +} + -+LOONGARCH64Instr* LOONGARCH64Instr_Load ( LOONGARCH64LoadOp op, -+ LOONGARCH64AMode* src, HReg dst ) ++static Bool disInstr_LOONGARCH64_WRK_01_1100_1100 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_Load; -+ i->LAin.Load.op = op; -+ i->LAin.Load.src = src; -+ i->LAin.Load.dst = dst; -+ return i; ++ Bool ok; ++ ++ switch (SLICE(insn, 21, 18)) { ++ case 0b0100: ++ case 0b0101: ++ case 0b0110: ++ ok = gen_vbiti(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } ++ ++ return ok; +} + -+LOONGARCH64Instr* LOONGARCH64Instr_Store ( LOONGARCH64StoreOp op, -+ LOONGARCH64AMode* dst, HReg src ) ++static Bool disInstr_LOONGARCH64_WRK_01_1100_1111 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_Store; -+ i->LAin.Store.op = op; -+ i->LAin.Store.dst = dst; -+ i->LAin.Store.src = src; -+ return i; ++ Bool ok; ++ ++ switch (SLICE(insn, 21, 18)) { ++ case 0b0100: ++ case 0b0101: ++ case 0b0110: ++ case 0b0111: ++ ok = gen_vlogical_u8(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } ++ ++ return ok; +} + -+LOONGARCH64Instr* LOONGARCH64Instr_LLSC ( LOONGARCH64LLSCOp op, Bool isLoad, -+ LOONGARCH64AMode* addr, HReg val ) ++static Bool disInstr_LOONGARCH64_WRK_01_1100 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_LLSC; -+ i->LAin.LLSC.op = op; -+ i->LAin.LLSC.isLoad = isLoad; -+ i->LAin.LLSC.addr = addr; -+ i->LAin.LLSC.val = val; -+ return i; ++ Bool ok; ++ ++ switch (SLICE(insn, 25, 22)) { ++ case 0b0000: ++ ok = disInstr_LOONGARCH64_WRK_01_1100_0000(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0001: ++ ok = disInstr_LOONGARCH64_WRK_01_1100_0001(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0100: ++ ok = disInstr_LOONGARCH64_WRK_01_1100_0100(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1010: ++ ok = disInstr_LOONGARCH64_WRK_01_1100_1010(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1011: ++ ok = disInstr_LOONGARCH64_WRK_01_1100_1011(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1100: ++ ok = disInstr_LOONGARCH64_WRK_01_1100_1100(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1111: ++ ok = disInstr_LOONGARCH64_WRK_01_1100_1111(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } ++ ++ return ok; +} + -+LOONGARCH64Instr* LOONGARCH64Instr_Bar ( LOONGARCH64BarOp op, UShort hint ) ++static Bool disInstr_LOONGARCH64_WRK_01_1101_0000 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_Bar; -+ i->LAin.Bar.op = op; -+ i->LAin.Bar.hint = hint; -+ return i; ++ Bool ok; ++ ++ switch (SLICE(insn, 21, 18)) { ++ case 0b0000: ++ ok = gen_xvcmp_integer(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } ++ ++ return ok; +} + -+LOONGARCH64Instr* LOONGARCH64Instr_FpUnary ( LOONGARCH64FpUnOp op, -+ HReg src, HReg dst ) ++static Bool disInstr_LOONGARCH64_WRK_01_1101_0001 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_FpUn; -+ i->LAin.FpUnary.op = op; -+ i->LAin.FpUnary.src = src; -+ i->LAin.FpUnary.dst = dst; -+ return i; -+} ++ Bool ok; + -+LOONGARCH64Instr* LOONGARCH64Instr_FpBinary ( LOONGARCH64FpBinOp op, HReg src2, -+ HReg src1, HReg dst ) -+{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_FpBin; -+ i->LAin.FpBinary.op = op; -+ i->LAin.FpBinary.src2 = src2; -+ i->LAin.FpBinary.src1 = src1; -+ i->LAin.FpBinary.dst = dst; -+ return i; -+} ++ switch (SLICE(insn, 21, 18)) { ++ case 0b1101: ++ ok = gen_xvmax_xvmin(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } + -+LOONGARCH64Instr* LOONGARCH64Instr_FpTrinary ( LOONGARCH64FpTriOp op, -+ HReg src3, HReg src2, -+ HReg src1, HReg dst ) -+{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_FpTri; -+ i->LAin.FpTrinary.op = op; -+ i->LAin.FpTrinary.src3 = src3; -+ i->LAin.FpTrinary.src2 = src2; -+ i->LAin.FpTrinary.src1 = src1; -+ i->LAin.FpTrinary.dst = dst; -+ return i; ++ return ok; +} + -+LOONGARCH64Instr* LOONGARCH64Instr_FpLoad ( LOONGARCH64FpLoadOp op, -+ LOONGARCH64AMode* src, HReg dst ) ++static Bool disInstr_LOONGARCH64_WRK_01_1101_0100 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_FpLoad; -+ i->LAin.FpLoad.op = op; -+ i->LAin.FpLoad.src = src; -+ i->LAin.FpLoad.dst = dst; -+ return i; -+} ++ Bool ok; + -+LOONGARCH64Instr* LOONGARCH64Instr_FpStore ( LOONGARCH64FpStoreOp op, -+ LOONGARCH64AMode* dst, HReg src ) -+{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_FpStore; -+ i->LAin.FpStore.op = op; -+ i->LAin.FpStore.dst = dst; -+ i->LAin.FpStore.src = src; -+ return i; -+} ++ switch (SLICE(insn, 21, 18)) { ++ case 0b1001: ++ ok = gen_logical_xv(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } + -+LOONGARCH64Instr* LOONGARCH64Instr_FpMove ( LOONGARCH64FpMoveOp op, -+ HReg src, HReg dst ) -+{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_FpMove; -+ i->LAin.FpMove.op = op; -+ i->LAin.FpMove.src = src; -+ i->LAin.FpMove.dst = dst; -+ return i; ++ return ok; +} + -+LOONGARCH64Instr* LOONGARCH64Instr_FpCmp ( LOONGARCH64FpCmpOp op, HReg src2, -+ HReg src1, HReg dst ) ++static Bool disInstr_LOONGARCH64_WRK_01_1101_1010_0111 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_FpCmp; -+ i->LAin.FpCmp.op = op; -+ i->LAin.FpCmp.src2 = src2; -+ i->LAin.FpCmp.src1 = src1; -+ i->LAin.FpCmp.dst = dst; -+ return i; -+} ++ Bool ok; + -+LOONGARCH64Instr* LOONGARCH64Instr_Cas ( HReg old, HReg addr, HReg expd, -+ HReg data, Bool size64 ) -+{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_Cas; -+ i->LAin.Cas.old = old; -+ i->LAin.Cas.addr = addr; -+ i->LAin.Cas.expd = expd; -+ i->LAin.Cas.data = data; -+ i->LAin.Cas.size64 = size64; -+ return i; -+} ++ switch (SLICE(insn, 17, 14)) { ++ case 0b0001: ++ ok = gen_xvmsk(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0010: ++ ok = gen_xvset(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1100: ++ ok = gen_xvreplgr2vr(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } + -+LOONGARCH64Instr* LOONGARCH64Instr_Cmp ( LOONGARCH64CondCode cond, -+ HReg src2, HReg src1, HReg dst ) -+{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_Cmp; -+ i->LAin.Cmp.cond = cond; -+ i->LAin.Cmp.src2 = src2; -+ i->LAin.Cmp.src1 = src1; -+ i->LAin.Cmp.dst = dst; -+ return i; ++ return ok; +} + -+LOONGARCH64Instr* LOONGARCH64Instr_CMove ( HReg cond, HReg r0, HReg r1, -+ HReg dst, Bool isInt ) ++static Bool disInstr_LOONGARCH64_WRK_01_1101_1010 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_CMove; -+ i->LAin.CMove.cond = cond; -+ i->LAin.CMove.r0 = r0; -+ i->LAin.CMove.r1 = r1; -+ i->LAin.CMove.dst = dst; -+ i->LAin.CMove.isInt = isInt; -+ return i; -+} ++ Bool ok; + -+LOONGARCH64Instr* LOONGARCH64Instr_Call ( HReg cond, Addr64 target, -+ UInt nArgRegs, RetLoc rloc ) -+{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_Call; -+ i->LAin.Call.cond = cond; -+ i->LAin.Call.target = target; -+ i->LAin.Call.nArgRegs = nArgRegs; -+ i->LAin.Call.rloc = rloc; -+ return i; -+} ++ switch (SLICE(insn, 21, 18)) { ++ case 0b0111: ++ ok = disInstr_LOONGARCH64_WRK_01_1101_1010_0111(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } + -+LOONGARCH64Instr* LOONGARCH64Instr_XDirect ( Addr64 dstGA, -+ LOONGARCH64AMode* amPC, -+ HReg cond, Bool toFastEP ) -+{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_XDirect; -+ i->LAin.XDirect.dstGA = dstGA; -+ i->LAin.XDirect.amPC = amPC; -+ i->LAin.XDirect.cond = cond; -+ i->LAin.XDirect.toFastEP = toFastEP; -+ return i; ++ return ok; +} + -+LOONGARCH64Instr* LOONGARCH64Instr_XIndir ( HReg dstGA, LOONGARCH64AMode* amPC, -+ HReg cond ) ++static Bool disInstr_LOONGARCH64_WRK_01_1101_1100 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_XIndir; -+ i->LAin.XIndir.dstGA = dstGA; -+ i->LAin.XIndir.amPC = amPC; -+ i->LAin.XIndir.cond = cond; -+ return i; -+} ++ Bool ok; + -+LOONGARCH64Instr* LOONGARCH64Instr_XAssisted ( HReg dstGA, -+ LOONGARCH64AMode* amPC, -+ HReg cond, IRJumpKind jk ) -+{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_XAssisted; -+ i->LAin.XAssisted.dstGA = dstGA; -+ i->LAin.XAssisted.amPC = amPC; -+ i->LAin.XAssisted.cond = cond; -+ i->LAin.XAssisted.jk = jk; -+ return i; -+} ++ switch (SLICE(insn, 21, 18)) { ++ case 0b0000: ++ ok = gen_xvpickve(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } + -+LOONGARCH64Instr* LOONGARCH64Instr_EvCheck ( LOONGARCH64AMode* amCounter, -+ LOONGARCH64AMode* amFailAddr ) -+{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_EvCheck; -+ i->LAin.EvCheck.amCounter = amCounter; -+ i->LAin.EvCheck.amFailAddr = amFailAddr; -+ return i; ++ return ok; +} + -+LOONGARCH64Instr* LOONGARCH64Instr_ProfInc ( void ) ++static Bool disInstr_LOONGARCH64_WRK_01_1101_1111 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); -+ i->tag = LAin_ProfInc; -+ return i; -+} -+ ++ Bool ok; + -+/* -------- Pretty Print instructions ------------- */ ++ switch (SLICE(insn, 21, 18)) { ++ case 0b1001: ++ case 0b1010: ++ case 0b1011: ++ ok = gen_xvpermi(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } + -+static inline void ppLI ( ULong imm, HReg dst ) -+{ -+ vex_printf("li "); -+ ppHRegLOONGARCH64(dst); -+ vex_printf(", 0x%llx", imm); ++ return ok; +} + -+static inline void ppUnary ( LOONGARCH64UnOp op, HReg src, HReg dst ) ++static Bool disInstr_LOONGARCH64_WRK_01_1101 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ vex_printf("%s ", showLOONGARCH64UnOp(op)); -+ ppHRegLOONGARCH64(dst); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(src); -+} ++ Bool ok; + -+static inline void ppBinary ( LOONGARCH64BinOp op, LOONGARCH64RI* src2, -+ HReg src1, HReg dst ) -+{ -+ vex_printf("%s ", showLOONGARCH64BinOp(op)); -+ ppHRegLOONGARCH64(dst); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(src1); -+ vex_printf(", "); -+ ppLOONGARCH64RI(src2); -+} ++ switch (SLICE(insn, 25, 22)) { ++ case 0b0000: ++ ok = disInstr_LOONGARCH64_WRK_01_1101_0000(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0001: ++ ok = disInstr_LOONGARCH64_WRK_01_1101_0001(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0100: ++ ok = disInstr_LOONGARCH64_WRK_01_1101_0100(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1010: ++ ok = disInstr_LOONGARCH64_WRK_01_1101_1010(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1100: ++ ok = disInstr_LOONGARCH64_WRK_01_1101_1100(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1111: ++ ok = disInstr_LOONGARCH64_WRK_01_1101_1111(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } + -+static inline void ppLoad ( LOONGARCH64LoadOp op, LOONGARCH64AMode* src, -+ HReg dst ) -+{ -+ vex_printf("%s ", showLOONGARCH64LoadOp(op)); -+ ppHRegLOONGARCH64(dst); -+ vex_printf(", "); -+ ppLOONGARCH64AMode(src); ++ return ok; +} + -+static inline void ppStore ( LOONGARCH64StoreOp op, LOONGARCH64AMode* dst, -+ HReg src ) ++static Bool disInstr_LOONGARCH64_WRK_01 ( DisResult* dres, UInt insn, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo ) +{ -+ vex_printf("%s ", showLOONGARCH64StoreOp(op)); -+ ppHRegLOONGARCH64(src); -+ vex_printf(", "); -+ ppLOONGARCH64AMode(dst); -+} ++ Bool ok; + -+static inline void ppLLSC ( LOONGARCH64LLSCOp op, LOONGARCH64AMode* addr, -+ HReg val ) -+{ -+ vex_printf("%s ", showLOONGARCH64LLSCOp(op)); -+ ppHRegLOONGARCH64(val); -+ vex_printf(", "); -+ ppLOONGARCH64AMode(addr); -+} ++ switch (SLICE(insn, 29, 26)) { ++ case 0b0000: ++ ok = gen_beqz(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0001: ++ ok = gen_bnez(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0010: ++ switch (SLICE(insn, 9, 8)) { ++ case 0b00: ++ ok = gen_bceqz(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01: ++ ok = gen_bcnez(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } ++ break; ++ case 0b0011: ++ ok = gen_jirl(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0100: ++ ok = gen_b(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0101: ++ ok = gen_bl(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0110: ++ ok = gen_beq(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b0111: ++ ok = gen_bne(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1000: ++ ok = gen_blt(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1001: ++ ok = gen_bge(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1010: ++ ok = gen_bltu(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1011: ++ ok = gen_bgeu(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1100: ++ ok = disInstr_LOONGARCH64_WRK_01_1100(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b1101: ++ ok = disInstr_LOONGARCH64_WRK_01_1101(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } + -+static inline void ppBar ( LOONGARCH64BarOp op, UShort hint ) -+{ -+ vex_printf("%s %u", showLOONGARCH64BarOp(op), (UInt)hint); ++ return ok; +} + -+static inline void ppFpUnary ( LOONGARCH64FpUnOp op, HReg src, HReg dst ) ++static Bool disInstr_LOONGARCH64_WRK ( /*MB_OUT*/DisResult* dres, ++ const UChar* guest_instr, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo, ++ Bool sigill_diag ) +{ -+ vex_printf("%s ", showLOONGARCH64FpUnOp(op)); -+ ppHRegLOONGARCH64(dst); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(src); -+} ++ /* Set result defaults. */ ++ dres->whatNext = Dis_Continue; ++ dres->len = 4; ++ dres->jk_StopHere = Ijk_INVALID; ++ dres->hint = Dis_HintNone; + -+static inline void ppFpBinary ( LOONGARCH64FpBinOp op, HReg src2, -+ HReg src1, HReg dst ) -+{ -+ vex_printf("%s ", showLOONGARCH64FpBinOp(op)); -+ ppHRegLOONGARCH64(dst); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(src1); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(src2); -+} ++ /* At least this is simple on LOONGARCH64: insns are all 4 bytes long, ++ and 4-aligned. So just fish the whole thing out of memory right now ++ and have done. */ ++ UInt insn = getUInt(guest_instr); ++ DIP("\t0x%llx:\t0x%08x\t", (Addr64)guest_PC_curr_instr, insn); ++ vassert((guest_PC_curr_instr & 3ULL) == 0); + -+static inline void ppFpTrinary ( LOONGARCH64FpTriOp op, HReg src3, -+ HReg src2, HReg src1, HReg dst ) -+{ -+ vex_printf("%s ", showLOONGARCH64FpTriOp(op)); -+ ppHRegLOONGARCH64(dst); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(src1); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(src2); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(src3); -+} ++ /* Spot "Special" instructions (see comment at top of file). */ ++ Bool ok = disInstr_LOONGARCH64_WRK_special(dres, guest_instr); ++ if (ok) ++ return ok; + -+static inline void ppFpLoad ( LOONGARCH64FpLoadOp op, LOONGARCH64AMode* src, -+ HReg dst ) -+{ -+ vex_printf("%s ", showLOONGARCH64FpLoadOp(op)); -+ ppHRegLOONGARCH64(dst); -+ vex_printf(", "); -+ ppLOONGARCH64AMode(src); -+} ++ /* Main LOONGARCH64 instruction decoder starts here. */ ++ switch (SLICE(insn, 31, 30)) { ++ case 0b00: ++ ok = disInstr_LOONGARCH64_WRK_00(dres, insn, archinfo, abiinfo); ++ break; ++ case 0b01: ++ ok = disInstr_LOONGARCH64_WRK_01(dres, insn, archinfo, abiinfo); ++ break; ++ default: ++ ok = False; ++ break; ++ } + -+static inline void ppFpStore ( LOONGARCH64FpStoreOp op, LOONGARCH64AMode* dst, -+ HReg src ) -+{ -+ vex_printf("%s ", showLOONGARCH64FpStoreOp(op)); -+ ppHRegLOONGARCH64(src); -+ vex_printf(", "); -+ ppLOONGARCH64AMode(dst); ++ /* If the next-level down decoders failed, make sure |dres| didn't ++ get changed. */ ++ if (!ok) { ++ vassert(dres->whatNext == Dis_Continue); ++ vassert(dres->len == 4); ++ vassert(dres->jk_StopHere == Ijk_INVALID); ++ } ++ return ok; +} + -+static inline void ppFpMove ( LOONGARCH64FpMoveOp op, HReg src, HReg dst ) -+{ -+ vex_printf("%s ", showLOONGARCH64FpMoveOp(op)); -+ ppHRegLOONGARCH64(dst); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(src); -+} + -+static inline void ppFpCmp ( LOONGARCH64FpCmpOp op, HReg src2, -+ HReg src1, HReg dst ) -+{ -+ vex_printf("%s ", showLOONGARCH64FpCmpOp(op)); -+ vex_printf("$fcc0, "); -+ ppHRegLOONGARCH64(src1); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(src2); -+ vex_printf("; movcf2gr "); -+ ppHRegLOONGARCH64(dst); -+ vex_printf(", $fcc0"); -+} ++/*------------------------------------------------------------*/ ++/*--- Top-level fn ---*/ ++/*------------------------------------------------------------*/ + -+static inline void ppCas ( HReg old, HReg addr, HReg expd, -+ HReg data, Bool size64) -+{ -+ ppHRegLOONGARCH64(old); -+ vex_printf(" = cas(%dbit)(", size64 ? 64 : 32); -+ ppHRegLOONGARCH64(expd); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(data); -+ vex_printf(" -> "); -+ ppHRegLOONGARCH64(addr); -+ vex_printf(")"); -+} ++/* Disassemble a single instruction into IR. The instruction ++ is located in host memory at &guest_code[delta]. */ + -+static inline void ppCmp ( LOONGARCH64CondCode cond, HReg src2, -+ HReg src1, HReg dst ) ++DisResult disInstr_LOONGARCH64 ( IRSB* irsb_IN, ++ const UChar* guest_code_IN, ++ Long delta_IN, ++ Addr guest_IP, ++ VexArch guest_arch, ++ const VexArchInfo* archinfo, ++ const VexAbiInfo* abiinfo, ++ VexEndness host_endness_IN, ++ Bool sigill_diag_IN ) +{ -+ ppHRegLOONGARCH64(dst); -+ vex_printf(" = cmp%s(", showLOONGARCH64CondCode(cond)); -+ ppHRegLOONGARCH64(src1); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(src2); -+ vex_printf(")"); -+} ++ DisResult dres; ++ vex_bzero(&dres, sizeof(dres)); + -+static inline void ppCMove ( HReg cond, HReg r0, HReg r1, -+ HReg dst, Bool isInt ) -+{ -+ if (isInt) { -+ vex_printf("masknez $t0, "); -+ ppHRegLOONGARCH64(r0); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(cond); -+ vex_printf("; maskeqz "); -+ ppHRegLOONGARCH64(dst); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(r1); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(cond); -+ vex_printf("; or "); -+ ppHRegLOONGARCH64(dst); -+ vex_printf(", $t0, "); -+ ppHRegLOONGARCH64(dst); -+ } else { -+ vex_printf("movgr2cf "); -+ ppHRegLOONGARCH64(cond); -+ vex_printf(", $fcc0; fsel "); -+ ppHRegLOONGARCH64(dst); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(r0); -+ vex_printf(", "); -+ ppHRegLOONGARCH64(r1); -+ vex_printf(", $fcc0"); -+ } -+} ++ /* Set globals (see top of this file) */ ++ vassert(guest_arch == VexArchLOONGARCH64); + -+static inline void ppCall ( HReg cond, Addr64 target, -+ UInt nArgRegs, RetLoc rloc ) -+{ -+ if (!hregIsInvalid(cond)) { -+ vex_printf("if ("); -+ ppHRegLOONGARCH64(cond); -+ vex_printf(") { "); -+ } -+ vex_printf("call 0x%llx [nArgRegs=%u, ", target, nArgRegs); -+ ppRetLoc(rloc); -+ vex_printf("]"); -+ if (!hregIsInvalid(cond)) -+ vex_printf(" }"); -+} ++ irsb = irsb_IN; ++ host_endness = host_endness_IN; ++ guest_PC_curr_instr = (Addr64)guest_IP; + -+static inline void ppXDirect ( Addr64 dstGA, LOONGARCH64AMode* amPC, -+ HReg cond, Bool toFastEP ) -+{ -+ vex_printf("(xDirect) "); -+ if (!hregIsInvalid(cond)) { -+ vex_printf("if ("); -+ ppHRegLOONGARCH64(cond); -+ vex_printf(") { "); -+ } -+ vex_printf("li $t0, 0x%llx; ", (ULong)dstGA); -+ vex_printf("st.w $t0, "); -+ ppLOONGARCH64AMode(amPC); -+ vex_printf("; li $t0, $disp_cp_chain_me_to_%sEP; ", -+ toFastEP ? "fast" : "slow"); -+ vex_printf("jirl $ra, $t0, 0"); -+ if (!hregIsInvalid(cond)) -+ vex_printf(" }"); -+} ++ /* Try to decode */ ++ Bool ok = disInstr_LOONGARCH64_WRK(&dres, ++ &guest_code_IN[delta_IN], ++ archinfo, abiinfo, sigill_diag_IN); + -+static inline void ppXIndir ( HReg dstGA, LOONGARCH64AMode* amPC, -+ HReg cond ) -+{ -+ vex_printf("(xIndir) "); -+ if (!hregIsInvalid(cond)) { -+ vex_printf("if ("); -+ ppHRegLOONGARCH64(cond); -+ vex_printf(") { "); ++ if (ok) { ++ /* All decode successes end up here. */ ++ vassert(dres.len == 4 || dres.len == 20); ++ switch (dres.whatNext) { ++ case Dis_Continue: ++ putPC(mkU64(dres.len + guest_PC_curr_instr)); ++ break; ++ case Dis_StopHere: ++ break; ++ default: ++ vassert(0); ++ break; ++ } ++ DIP("\n"); ++ } else { ++ /* All decode failures end up here. */ ++ if (sigill_diag_IN) { ++ Int i, j; ++ UChar buf[64]; ++ UInt insn = getUInt(&guest_code_IN[delta_IN]); ++ vex_bzero(buf, sizeof(buf)); ++ for (i = j = 0; i < 32; i++) { ++ if (i > 0 && (i & 3) == 0) ++ buf[j++] = ' '; ++ buf[j++] = (insn & (1 << (31 - i))) ? '1' : '0'; ++ } ++ vex_printf("disInstr(loongarch64): unhandled instruction 0x%08x\n", insn); ++ vex_printf("disInstr(loongarch64): %s\n", buf); ++ } ++ ++ /* Tell the dispatcher that this insn cannot be decoded, and so ++ has not been executed, and (is currently) the next to be ++ executed. PC should be up-to-date since it is made so at the ++ start of each insn, but nevertheless be paranoid and update ++ it again right now. */ ++ putPC(mkU64(guest_PC_curr_instr)); ++ dres.len = 0; ++ dres.whatNext = Dis_StopHere; ++ dres.jk_StopHere = Ijk_NoDecode; + } -+ vex_printf("st.w "); -+ ppHRegLOONGARCH64(dstGA); -+ vex_printf(", "); -+ ppLOONGARCH64AMode(amPC); -+ vex_printf("; la $t0, disp_indir; "); -+ vex_printf("jirl $ra, $t0, 0"); -+ if (!hregIsInvalid(cond)) -+ vex_printf(" }"); ++ ++ return dres; +} + -+static inline void ppXAssisted ( HReg dstGA, LOONGARCH64AMode* amPC, -+ HReg cond, IRJumpKind jk) ++ ++/*--------------------------------------------------------------------*/ ++/*--- end guest_loongarch64_toIR.c ---*/ ++/*--------------------------------------------------------------------*/ +diff --git a/VEX/priv/host_loongarch64_defs.c b/VEX/priv/host_loongarch64_defs.c +new file mode 100644 +index 0000000..6b50970 +--- /dev/null ++++ b/VEX/priv/host_loongarch64_defs.c +@@ -0,0 +1,3929 @@ ++ ++/*---------------------------------------------------------------*/ ++/*--- begin host_loongarch64_defs.c ---*/ ++/*---------------------------------------------------------------*/ ++ ++/* ++ This file is part of Valgrind, a dynamic binary instrumentation ++ framework. ++ ++ Copyright (C) 2021-2022 Loongson Technology Corporation Limited ++ ++ This program is free software; you can redistribute it and/or ++ modify it under the terms of the GNU General Public License as ++ published by the Free Software Foundation; either version 2 of the ++ License, or (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, see . ++ ++ The GNU General Public License is contained in the file COPYING. ++*/ ++ ++#include "libvex_basictypes.h" ++#include "libvex.h" ++#include "libvex_trc_values.h" ++ ++#include "main_util.h" ++#include "host_generic_regs.h" ++#include "host_loongarch64_defs.h" ++ ++ ++/* --------- Local helpers. --------- */ ++ ++static inline void mapReg ( HRegRemap* m, HReg* r ) +{ -+ vex_printf("(xAssisted) "); -+ if (!hregIsInvalid(cond)) { -+ vex_printf("if ("); -+ ppHRegLOONGARCH64(cond); -+ vex_printf(") { "); -+ } -+ vex_printf("st.w "); -+ ppHRegLOONGARCH64(dstGA); -+ vex_printf(", "); -+ ppLOONGARCH64AMode(amPC); -+ vex_printf("; li.w $s8, IRJumpKind_to_TRCVAL(%d); ", (Int)jk); -+ vex_printf("la $t0, disp_assisted; "); -+ vex_printf("jirl $ra, $t0, 0"); -+ if (!hregIsInvalid(cond)) -+ vex_printf(" }"); ++ *r = lookupHRegRemap(m, *r); +} + -+static inline void ppEvCheck ( LOONGARCH64AMode* amCounter, -+ LOONGARCH64AMode* amFailAddr ) ++static inline Int extend ( UInt imm, UInt size ) +{ -+ vex_printf("(evCheck) "); -+ vex_printf("ld.w $t0, "); -+ ppLOONGARCH64AMode(amCounter); -+ vex_printf("; addi.d $t0, $t0, -1; "); -+ vex_printf("st.w $t0, "); -+ ppLOONGARCH64AMode(amCounter); -+ vex_printf("; bge $t0, $zero, nofail; "); -+ vex_printf("ld.d $t0, "); -+ ppLOONGARCH64AMode(amFailAddr); -+ vex_printf("; jirl $ra, $t0, 0"); -+ vex_printf("; nofail:"); ++ UInt shift = 32 - size; ++ return (((Int)imm << shift) >> shift); +} + -+static inline void ppProfInc ( void ) ++ ++/* --------- Registers. --------- */ ++ ++const RRegUniverse* getRRegUniverse_LOONGARCH64 ( void ) +{ -+ vex_printf("(profInc) "); -+ vex_printf("li $t0, NotKnownYet; "); -+ vex_printf("ld.d $t1, $t0, 0; "); -+ vex_printf("addi.d $t1, $t1, 1; "); -+ vex_printf("st.d $t1, $t0, 0;"); ++ /* The real-register universe is a big constant, so we just want to ++ initialise it once. */ ++ static RRegUniverse rRegUniverse_LOONGARCH64; ++ static Bool rRegUniverse_LOONGARCH64_initted = False; ++ ++ /* Handy shorthand, nothing more */ ++ RRegUniverse* ru = &rRegUniverse_LOONGARCH64; ++ ++ /* This isn't thread-safe. Sigh. */ ++ if (LIKELY(rRegUniverse_LOONGARCH64_initted == True)) ++ return ru; ++ ++ RRegUniverse__init(ru); ++ ++ /* Add the registers. The initial segment of this array must be ++ those available for allocation by reg-alloc, and those that ++ follow are not available for allocation. */ ++ ru->allocable_start[HRcInt64] = ru->size; ++ ru->regs[ru->size++] = hregLOONGARCH64_R23(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R24(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R25(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R26(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R27(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R28(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R29(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R30(); ++ // $r31 is used as guest stack pointer, not available to regalloc. ++ ++ // $r12 is used as a chaining/ProfInc/Cmove/genSpill/genReload temporary ++ // $r13 is used as a ProfInc temporary ++ ru->regs[ru->size++] = hregLOONGARCH64_R14(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R15(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R16(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R17(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R18(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R19(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R20(); ++ ru->allocable_end[HRcInt64] = ru->size - 1; ++ ++ ru->allocable_start[HRcFlt64] = ru->size; ++ ru->regs[ru->size++] = hregLOONGARCH64_F24(); ++ ru->regs[ru->size++] = hregLOONGARCH64_F25(); ++ ru->regs[ru->size++] = hregLOONGARCH64_F26(); ++ ru->regs[ru->size++] = hregLOONGARCH64_F27(); ++ ru->regs[ru->size++] = hregLOONGARCH64_F28(); ++ ru->regs[ru->size++] = hregLOONGARCH64_F29(); ++ ru->regs[ru->size++] = hregLOONGARCH64_F30(); ++ ru->regs[ru->size++] = hregLOONGARCH64_F31(); ++ ru->allocable_end[HRcFlt64] = ru->size - 1; ++ ++ ru->allocable_start[HRcVec128] = ru->size; ++ ru->regs[ru->size++] = hregLOONGARCH64_V24(); ++ ru->regs[ru->size++] = hregLOONGARCH64_V25(); ++ ru->regs[ru->size++] = hregLOONGARCH64_V26(); ++ ru->regs[ru->size++] = hregLOONGARCH64_V27(); ++ ru->regs[ru->size++] = hregLOONGARCH64_V28(); ++ ru->regs[ru->size++] = hregLOONGARCH64_V29(); ++ ru->regs[ru->size++] = hregLOONGARCH64_V30(); ++ ru->regs[ru->size++] = hregLOONGARCH64_V31(); ++ ru->allocable_end[HRcVec128] = ru->size - 1; ++ ++ ru->allocable = ru->size; ++ ++ /* And other regs, not available to the allocator. */ ++ ru->regs[ru->size++] = hregLOONGARCH64_R0(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R1(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R2(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R3(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R4(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R5(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R6(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R7(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R8(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R9(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R10(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R11(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R12(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R13(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R21(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R22(); ++ ru->regs[ru->size++] = hregLOONGARCH64_R31(); ++ ru->regs[ru->size++] = hregLOONGARCH64_FCSR3(); ++ ++ rRegUniverse_LOONGARCH64_initted = True; ++ ++ RRegUniverse__check_is_sane(ru); ++ return ru; +} + -+void ppLOONGARCH64Instr ( const LOONGARCH64Instr* i, Bool mode64 ) ++UInt ppHRegLOONGARCH64 ( HReg reg ) +{ -+ vassert(mode64 == True); -+ switch (i->tag) { -+ case LAin_LI: -+ ppLI(i->LAin.LI.imm, i->LAin.LI.dst); -+ break; -+ case LAin_Un: -+ ppUnary(i->LAin.Unary.op, i->LAin.Unary.src, i->LAin.Unary.dst); -+ break; -+ case LAin_Bin: -+ ppBinary(i->LAin.Binary.op, i->LAin.Binary.src2, -+ i->LAin.Binary.src1, i->LAin.Binary.dst); ++ Int r; ++ Int ret = 0; ++ static const HChar* ireg_names[32] = { ++ "$zero", ++ "$ra", ++ "$tp", ++ "$sp", ++ "$a0", "$a1", "$a2", "$a3", "$a4", "$a5", "$a6", "$a7", ++ "$t0", "$t1", "$t2", "$t3", "$t4", "$t5", "$t6", "$t7", "$t8", ++ "$r21", /* Reserved */ ++ "$fp", ++ "$s0", "$s1", "$s2", "$s3", "$s4", "$s5", "$s6", "$s7", "$s8" ++ }; ++ static const HChar* freg_names[32] = { ++ "$fa0", "$fa1", "$fa2", "$fa3", "$fa4", "$fa5", "$fa6", "$fa7", ++ "$ft0", "$ft1", "$ft2", "$ft3", "$ft4", "$ft5", "$ft6", "$ft7", ++ "$ft8", "$ft9", "$ft10", "$ft11", "$ft12", "$ft13", "$ft14", "$ft15", ++ "$fs0", "$fs1", "$fs2", "$fs3", "$fs4", "$fs5", "$fs6", "$fs7" ++ }; ++ static const HChar* vreg_names[32] = { ++ "$vr0", "$vr1", "$vr2", "$vr3", "$vr4", "$vr5", "$vr6", "$vr7", ++ "$vr8", "$vr9", "$vr10", "$vr11", "$vr12", "$vr13", "$vr14", "$vr15", ++ "$vr16", "$vr17", "$vr18", "$vr19", "$vr20", "$vr21", "$vr22", "$vr23", ++ "$vr24", "$vr25", "$vr26", "$vr27", "$vr28", "$vr29", "$vr30", "$vr31" ++ }; ++ ++ /* Be generic for all virtual regs. */ ++ if (hregIsVirtual(reg)) { ++ return ppHReg(reg); ++ } ++ ++ /* But specific for real regs. */ ++ switch (hregClass(reg)) { ++ case HRcInt32: ++ r = hregEncoding(reg); ++ vassert(r < 4); ++ ret = vex_printf("$fcsr%d", r); + break; -+ case LAin_Load: -+ ppLoad(i->LAin.Load.op, i->LAin.Load.src, i->LAin.Load.dst); ++ case HRcInt64: ++ r = hregEncoding(reg); ++ vassert(r < 32); ++ ret = vex_printf("%s", ireg_names[r]); + break; -+ case LAin_Store: -+ ppStore(i->LAin.Store.op, i->LAin.Store.dst, i->LAin.Store.src); ++ case HRcFlt64: ++ r = hregEncoding(reg); ++ vassert(r < 32); ++ ret = vex_printf("%s", freg_names[r]); + break; -+ case LAin_LLSC: -+ ppLLSC(i->LAin.LLSC.op, i->LAin.LLSC.addr, i->LAin.LLSC.val); ++ case HRcVec128: ++ r = hregEncoding(reg); ++ vassert(r < 32); ++ ret = vex_printf("%s", vreg_names[r]); + break; -+ case LAin_Bar: -+ ppBar(i->LAin.Bar.op, i->LAin.Bar.hint); ++ default: ++ vpanic("ppHRegLOONGARCH64"); + break; -+ case LAin_FpUn: -+ ppFpUnary(i->LAin.FpUnary.op, i->LAin.FpUnary.src, -+ i->LAin.FpUnary.dst); ++ } ++ ++ return ret; ++} ++ ++ ++/* --------- Condition codes, LOONGARCH64 encoding. --------- */ ++ ++static inline const HChar* showLOONGARCH64CondCode ( LOONGARCH64CondCode cond ) ++{ ++ const HChar* ret; ++ switch (cond) { ++ case LAcc_EQ: ++ ret = "eq"; /* equal */ + break; -+ case LAin_FpBin: -+ ppFpBinary(i->LAin.FpBinary.op, i->LAin.FpBinary.src2, -+ i->LAin.FpBinary.src1, i->LAin.FpBinary.dst); ++ case LAcc_NE: ++ ret = "ne"; /* not equal */ + break; -+ case LAin_FpTri: -+ ppFpTrinary(i->LAin.FpTrinary.op, i->LAin.FpTrinary.src3, -+ i->LAin.FpTrinary.src2, i->LAin.FpTrinary.src1, -+ i->LAin.FpTrinary.dst); ++ case LAcc_LT: ++ ret = "lt"; /* less than (signed) */ + break; -+ case LAin_FpLoad: -+ ppFpLoad(i->LAin.FpLoad.op, i->LAin.FpLoad.src, i->LAin.FpLoad.dst); ++ case LAcc_GE: ++ ret = "ge"; /* great equal (signed) */ + break; -+ case LAin_FpStore: -+ ppFpStore(i->LAin.FpStore.op, i->LAin.FpStore.dst, -+ i->LAin.FpStore.src); ++ case LAcc_LTU: ++ ret = "ltu"; /* less than (unsigned) */ + break; -+ case LAin_FpMove: -+ ppFpMove(i->LAin.FpMove.op, i->LAin.FpMove.src, -+ i->LAin.FpMove.dst); ++ case LAcc_GEU: ++ ret = "geu"; /* great equal (unsigned) */ + break; -+ case LAin_FpCmp: -+ ppFpCmp(i->LAin.FpCmp.op, i->LAin.FpCmp.src2, -+ i->LAin.FpCmp.src1, i->LAin.FpCmp.dst); ++ case LAcc_AL: ++ ret = "al"; /* always (unconditional) */ + break; -+ case LAin_Cas: -+ ppCas(i->LAin.Cas.old, i->LAin.Cas.addr, i->LAin.Cas.expd, -+ i->LAin.Cas.data, i->LAin.Cas.size64); ++ default: ++ vpanic("showLOONGARCH64CondCode"); + break; -+ case LAin_Cmp: -+ ppCmp(i->LAin.Cmp.cond, i->LAin.Cmp.src2, -+ i->LAin.Cmp.src1, i->LAin.Cmp.dst); ++ } ++ return ret; ++} ++ ++ ++/* --------- Memory address expressions (amodes). --------- */ ++ ++LOONGARCH64AMode* LOONGARCH64AMode_RI ( HReg reg, UShort imm ) ++{ ++ LOONGARCH64AMode* am = LibVEX_Alloc_inline(sizeof(LOONGARCH64AMode)); ++ am->tag = LAam_RI; ++ am->LAam.RI.base = reg; ++ am->LAam.RI.index = imm; ++ return am; ++} ++ ++LOONGARCH64AMode* LOONGARCH64AMode_RR ( HReg base, HReg index ) ++{ ++ LOONGARCH64AMode* am = LibVEX_Alloc_inline(sizeof(LOONGARCH64AMode)); ++ am->tag = LAam_RR; ++ am->LAam.RR.base = base; ++ am->LAam.RR.index = index; ++ return am; ++} ++ ++static inline void ppLOONGARCH64AMode ( LOONGARCH64AMode* am ) ++{ ++ switch (am->tag) { ++ case LAam_RI: ++ ppHRegLOONGARCH64(am->LAam.RI.base); ++ vex_printf(", "); ++ vex_printf("%d", extend((UInt)am->LAam.RI.index, 12)); + break; -+ case LAin_CMove: -+ ppCMove(i->LAin.CMove.cond, i->LAin.CMove.r0, -+ i->LAin.CMove.r1, i->LAin.CMove.dst, -+ i->LAin.CMove.isInt); ++ case LAam_RR: ++ ppHRegLOONGARCH64(am->LAam.RR.base); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(am->LAam.RR.index); + break; -+ case LAin_Call: -+ ppCall(i->LAin.Call.cond, i->LAin.Call.target, -+ i->LAin.Call.nArgRegs, i->LAin.Call.rloc); ++ default: ++ vpanic("ppLOONGARCH64AMode"); + break; -+ case LAin_XDirect: -+ ppXDirect(i->LAin.XDirect.dstGA, i->LAin.XDirect.amPC, -+ i->LAin.XDirect.cond, i->LAin.XDirect.toFastEP); ++ } ++} ++ ++static inline void addRegUsage_LOONGARCH64AMode( HRegUsage* u, ++ LOONGARCH64AMode* am ) ++{ ++ switch (am->tag) { ++ case LAam_RI: ++ addHRegUse(u, HRmRead, am->LAam.RI.base); + break; -+ case LAin_XIndir: -+ ppXIndir(i->LAin.XIndir.dstGA, i->LAin.XIndir.amPC, -+ i->LAin.XIndir.cond); ++ case LAam_RR: ++ addHRegUse(u, HRmRead, am->LAam.RR.base); ++ addHRegUse(u, HRmRead, am->LAam.RR.index); + break; -+ case LAin_XAssisted: -+ ppXAssisted(i->LAin.XAssisted.dstGA, i->LAin.XAssisted.amPC, -+ i->LAin.XAssisted.cond, i->LAin.XAssisted.jk); ++ default: ++ vpanic("addRegUsage_LOONGARCH64AMode"); + break; -+ case LAin_EvCheck: -+ ppEvCheck(i->LAin.EvCheck.amCounter, i->LAin.EvCheck.amFailAddr); ++ } ++} ++ ++static inline void mapRegs_LOONGARCH64AMode( HRegRemap* m, ++ LOONGARCH64AMode* am ) ++{ ++ switch (am->tag) { ++ case LAam_RI: ++ mapReg(m, &am->LAam.RI.base); + break; -+ case LAin_ProfInc: -+ ppProfInc(); ++ case LAam_RR: ++ mapReg(m, &am->LAam.RR.base); ++ mapReg(m, &am->LAam.RR.index); + break; + default: -+ vpanic("ppLOONGARCH64Instr"); ++ vpanic("mapRegs_LOONGARCH64AMode"); + break; + } +} + + -+/* --------- Helpers for register allocation. --------- */ ++/* --------- Operand, which can be reg or imm. --------- */ + -+void getRegUsage_LOONGARCH64Instr ( HRegUsage* u, const LOONGARCH64Instr* i, -+ Bool mode64 ) ++LOONGARCH64RI* LOONGARCH64RI_R ( HReg reg ) +{ -+ vassert(mode64 == True); -+ initHRegUsage(u); -+ switch (i->tag) { -+ case LAin_LI: -+ addHRegUse(u, HRmWrite, i->LAin.LI.dst); -+ break; -+ case LAin_Un: -+ addHRegUse(u, HRmRead, i->LAin.Unary.src); -+ addHRegUse(u, HRmWrite, i->LAin.Unary.dst); ++ LOONGARCH64RI* op = LibVEX_Alloc_inline(sizeof(LOONGARCH64RI)); ++ op->tag = LAri_Reg; ++ op->LAri.R.reg = reg; ++ return op; ++} ++ ++LOONGARCH64RI* LOONGARCH64RI_I ( UShort imm, UChar size, Bool isSigned ) ++{ ++ LOONGARCH64RI* op = LibVEX_Alloc_inline(sizeof(LOONGARCH64RI)); ++ op->tag = LAri_Imm; ++ op->LAri.I.imm = imm; ++ op->LAri.I.size = size; ++ op->LAri.I.isSigned = isSigned; ++ return op; ++} ++ ++static inline void ppLOONGARCH64RI ( LOONGARCH64RI* ri ) ++{ ++ switch (ri->tag) { ++ case LAri_Reg: ++ ppHRegLOONGARCH64(ri->LAri.R.reg); + break; -+ case LAin_Bin: -+ addRegUsage_LOONGARCH64RI(u, i->LAin.Binary.src2); -+ addHRegUse(u, HRmRead, i->LAin.Binary.src1); -+ addHRegUse(u, HRmWrite, i->LAin.Binary.dst); -+ break; -+ case LAin_Load: -+ addRegUsage_LOONGARCH64AMode(u, i->LAin.Load.src); -+ addHRegUse(u, HRmWrite, i->LAin.Load.dst); -+ break; -+ case LAin_Store: -+ addRegUsage_LOONGARCH64AMode(u, i->LAin.Store.dst); -+ addHRegUse(u, HRmRead, i->LAin.Store.src); -+ break; -+ case LAin_LLSC: -+ addRegUsage_LOONGARCH64AMode(u, i->LAin.LLSC.addr); -+ if (i->LAin.LLSC.isLoad) -+ addHRegUse(u, HRmWrite, i->LAin.LLSC.val); -+ else -+ addHRegUse(u, HRmRead, i->LAin.LLSC.val); -+ break; -+ case LAin_Bar: -+ /* No regs. */ -+ break; -+ case LAin_FpUn: -+ addHRegUse(u, HRmRead, i->LAin.FpUnary.src); -+ addHRegUse(u, HRmWrite, i->LAin.FpUnary.dst); -+ break; -+ case LAin_FpBin: -+ addHRegUse(u, HRmRead, i->LAin.FpBinary.src2); -+ addHRegUse(u, HRmRead, i->LAin.FpBinary.src1); -+ addHRegUse(u, HRmWrite, i->LAin.FpBinary.dst); -+ break; -+ case LAin_FpTri: -+ addHRegUse(u, HRmRead, i->LAin.FpTrinary.src3); -+ addHRegUse(u, HRmRead, i->LAin.FpTrinary.src2); -+ addHRegUse(u, HRmRead, i->LAin.FpTrinary.src1); -+ addHRegUse(u, HRmWrite, i->LAin.FpTrinary.dst); -+ break; -+ case LAin_FpLoad: -+ addRegUsage_LOONGARCH64AMode(u, i->LAin.FpLoad.src); -+ addHRegUse(u, HRmWrite, i->LAin.FpLoad.dst); -+ break; -+ case LAin_FpStore: -+ addRegUsage_LOONGARCH64AMode(u, i->LAin.FpStore.dst); -+ addHRegUse(u, HRmRead, i->LAin.FpStore.src); -+ break; -+ case LAin_FpMove: -+ addHRegUse(u, HRmRead, i->LAin.FpMove.src); -+ addHRegUse(u, HRmWrite, i->LAin.FpMove.dst); -+ break; -+ case LAin_FpCmp: -+ addHRegUse(u, HRmRead, i->LAin.FpCmp.src2); -+ addHRegUse(u, HRmRead, i->LAin.FpCmp.src1); -+ addHRegUse(u, HRmWrite, i->LAin.FpCmp.dst); -+ break; -+ case LAin_Cas: -+ addHRegUse(u, HRmWrite, i->LAin.Cas.old); -+ addHRegUse(u, HRmRead, i->LAin.Cas.addr); -+ addHRegUse(u, HRmRead, i->LAin.Cas.expd); -+ addHRegUse(u, HRmModify, i->LAin.Cas.data); -+ break; -+ case LAin_Cmp: -+ addHRegUse(u, HRmRead, i->LAin.Cmp.src2); -+ addHRegUse(u, HRmRead, i->LAin.Cmp.src1); -+ addHRegUse(u, HRmWrite, i->LAin.Cmp.dst); -+ break; -+ case LAin_CMove: -+ addHRegUse(u, HRmRead, i->LAin.CMove.cond); -+ addHRegUse(u, HRmRead, i->LAin.CMove.r0); -+ addHRegUse(u, HRmRead, i->LAin.CMove.r1); -+ addHRegUse(u, HRmWrite, i->LAin.CMove.dst); -+ break; -+ case LAin_Call: -+ /* logic and comments copied/modified from mips and arm64 back end */ -+ /* This is a bit subtle. */ -+ /* First off, we need to consider the cond register. */ -+ if (!hregIsInvalid(i->LAin.Call.cond)) -+ addHRegUse(u, HRmRead, i->LAin.Call.cond); -+ /* Then, claim it trashes all the caller-saved regs -+ which fall within the register allocator's jurisdiction. */ -+ addHRegUse(u, HRmWrite, hregLOONGARCH64_R14()); -+ addHRegUse(u, HRmWrite, hregLOONGARCH64_R15()); -+ addHRegUse(u, HRmWrite, hregLOONGARCH64_R16()); -+ addHRegUse(u, HRmWrite, hregLOONGARCH64_R17()); -+ addHRegUse(u, HRmWrite, hregLOONGARCH64_R18()); -+ addHRegUse(u, HRmWrite, hregLOONGARCH64_R19()); -+ addHRegUse(u, HRmWrite, hregLOONGARCH64_R20()); -+ /* Now we have to state any parameter-carrying registers -+ which might be read. This depends on nArgRegs. */ -+ switch (i->LAin.Call.nArgRegs) { -+ case 8: addHRegUse(u, HRmRead, hregLOONGARCH64_R11()); /* fallthrough */ -+ case 7: addHRegUse(u, HRmRead, hregLOONGARCH64_R10()); /* fallthrough */ -+ case 6: addHRegUse(u, HRmRead, hregLOONGARCH64_R9()); /* fallthrough */ -+ case 5: addHRegUse(u, HRmRead, hregLOONGARCH64_R8()); /* fallthrough */ -+ case 4: addHRegUse(u, HRmRead, hregLOONGARCH64_R7()); /* fallthrough */ -+ case 3: addHRegUse(u, HRmRead, hregLOONGARCH64_R6()); /* fallthrough */ -+ case 2: addHRegUse(u, HRmRead, hregLOONGARCH64_R5()); /* fallthrough */ -+ case 1: addHRegUse(u, HRmRead, hregLOONGARCH64_R4()); /* fallthrough */ -+ case 0: break; -+ default: vpanic("getRegUsage_LOONGARCH64:Call:regparms"); break; ++ case LAri_Imm: ++ if (ri->LAri.I.isSigned) { ++ vex_printf("%d", extend((UInt)ri->LAri.I.imm, ri->LAri.I.size)); ++ } else { ++ vex_printf("%u", (UInt)ri->LAri.I.imm); + } -+ /* Finally, there is the issue that the insn trashes a -+ register because the literal target address has to be -+ loaded into a register. However, we reserve $t0 for that -+ purpose so there's no further complexity here. Stating $t0 -+ as trashed is pointless since it's not under the control -+ of the allocator, but what the hell. */ -+ addHRegUse(u, HRmWrite, hregT0()); -+ break; -+ /* XDirect/XIndir/XAssisted are also a bit subtle. They -+ conditionally exit the block. Hence we only need to list (1) -+ the registers that they read, and (2) the registers that they -+ write in the case where the block is not exited. (2) is -+ empty, hence only (1) is relevant here. */ -+ case LAin_XDirect: -+ addRegUsage_LOONGARCH64AMode(u, i->LAin.XDirect.amPC); -+ if (!hregIsInvalid(i->LAin.XDirect.cond)) -+ addHRegUse(u, HRmRead, i->LAin.XDirect.cond); -+ addHRegUse(u, HRmWrite, hregT0()); /* unavail to RA */ -+ break; -+ case LAin_XIndir: -+ addHRegUse(u, HRmRead, i->LAin.XIndir.dstGA); -+ addRegUsage_LOONGARCH64AMode(u, i->LAin.XIndir.amPC); -+ if (!hregIsInvalid(i->LAin.XIndir.cond)) -+ addHRegUse(u, HRmRead, i->LAin.XIndir.cond); -+ addHRegUse(u, HRmWrite, hregT0()); /* unavail to RA */ -+ break; -+ case LAin_XAssisted: -+ addHRegUse(u, HRmRead, i->LAin.XAssisted.dstGA); -+ addRegUsage_LOONGARCH64AMode(u, i->LAin.XAssisted.amPC); -+ if (!hregIsInvalid(i->LAin.XAssisted.cond)) -+ addHRegUse(u, HRmRead, i->LAin.XAssisted.cond); -+ addHRegUse(u, HRmWrite, hregT0()); /* unavail to RA */ -+ break; -+ case LAin_EvCheck: -+ /* We expect both amodes only to mention $r31, so this is in -+ fact pointless, since $r31 isn't allocatable, but anyway.. */ -+ addRegUsage_LOONGARCH64AMode(u, i->LAin.EvCheck.amCounter); -+ addRegUsage_LOONGARCH64AMode(u, i->LAin.EvCheck.amFailAddr); -+ addHRegUse(u, HRmWrite, hregT0()); /* unavail to RA */ -+ break; -+ case LAin_ProfInc: -+ /* Again, pointless to actually state these since neither -+ is available to RA. */ -+ addHRegUse(u, HRmWrite, hregT0()); /* unavail to RA */ -+ addHRegUse(u, HRmWrite, hregT1()); /* unavail to RA */ + break; + default: -+ ppLOONGARCH64Instr(i, mode64); -+ vpanic("getRegUsage_LOONGARCH64Instr"); ++ vpanic("ppLOONGARCH64RI"); + break; + } +} + -+void mapRegs_LOONGARCH64Instr ( HRegRemap* m, LOONGARCH64Instr* i, -+ Bool mode64 ) ++static inline void addRegUsage_LOONGARCH64RI( HRegUsage* u, LOONGARCH64RI* ri ) +{ -+ vassert(mode64 == True); -+ switch (i->tag) { -+ case LAin_LI: -+ mapReg(m, &i->LAin.LI.dst); -+ break; -+ case LAin_Un: -+ mapReg(m, &i->LAin.Unary.src); -+ mapReg(m, &i->LAin.Unary.dst); -+ break; -+ case LAin_Bin: -+ mapRegs_LOONGARCH64RI(m, i->LAin.Binary.src2); -+ mapReg(m, &i->LAin.Binary.src1); -+ mapReg(m, &i->LAin.Binary.dst); -+ break; -+ case LAin_Load: -+ mapRegs_LOONGARCH64AMode(m, i->LAin.Load.src); -+ mapReg(m, &i->LAin.Load.dst); -+ break; -+ case LAin_Store: -+ mapRegs_LOONGARCH64AMode(m, i->LAin.Store.dst); -+ mapReg(m, &i->LAin.Store.src); -+ break; -+ case LAin_LLSC: -+ mapRegs_LOONGARCH64AMode(m, i->LAin.LLSC.addr); -+ mapReg(m, &i->LAin.LLSC.val); -+ break; -+ case LAin_Bar: -+ /* No regs. */ -+ break; -+ case LAin_FpUn: -+ mapReg(m, &i->LAin.FpUnary.src); -+ mapReg(m, &i->LAin.FpUnary.dst); -+ break; -+ case LAin_FpBin: -+ mapReg(m, &i->LAin.FpBinary.src2); -+ mapReg(m, &i->LAin.FpBinary.src1); -+ mapReg(m, &i->LAin.FpBinary.dst); -+ break; -+ case LAin_FpTri: -+ mapReg(m, &i->LAin.FpTrinary.src3); -+ mapReg(m, &i->LAin.FpTrinary.src2); -+ mapReg(m, &i->LAin.FpTrinary.src1); -+ mapReg(m, &i->LAin.FpTrinary.dst); -+ break; -+ case LAin_FpLoad: -+ mapRegs_LOONGARCH64AMode(m, i->LAin.FpLoad.src); -+ mapReg(m, &i->LAin.FpLoad.dst); -+ break; -+ case LAin_FpStore: -+ mapRegs_LOONGARCH64AMode(m, i->LAin.FpStore.dst); -+ mapReg(m, &i->LAin.FpStore.src); -+ break; -+ case LAin_FpMove: -+ mapReg(m, &i->LAin.FpMove.src); -+ mapReg(m, &i->LAin.FpMove.dst); -+ break; -+ case LAin_FpCmp: -+ mapReg(m, &i->LAin.FpCmp.src2); -+ mapReg(m, &i->LAin.FpCmp.src1); -+ mapReg(m, &i->LAin.FpCmp.dst); -+ break; -+ case LAin_Cas: -+ mapReg(m, &i->LAin.Cas.old); -+ mapReg(m, &i->LAin.Cas.addr); -+ mapReg(m, &i->LAin.Cas.expd); -+ mapReg(m, &i->LAin.Cas.data); -+ break; -+ case LAin_Cmp: -+ mapReg(m, &i->LAin.Cmp.src2); -+ mapReg(m, &i->LAin.Cmp.src1); -+ mapReg(m, &i->LAin.Cmp.dst); -+ break; -+ case LAin_CMove: -+ mapReg(m, &i->LAin.CMove.cond); -+ mapReg(m, &i->LAin.CMove.r0); -+ mapReg(m, &i->LAin.CMove.r1); -+ mapReg(m, &i->LAin.CMove.dst); -+ break; -+ case LAin_Call: -+ if (!hregIsInvalid(i->LAin.Call.cond)) -+ mapReg(m, &i->LAin.Call.cond); -+ /* Hardwires $r12. */ -+ break; -+ /* XDirect/XIndir/XAssisted are also a bit subtle. They -+ conditionally exit the block. Hence we only need to list (1) -+ the registers that they read, and (2) the registers that they -+ write in the case where the block is not exited. (2) is -+ empty, hence only (1) is relevant here. */ -+ case LAin_XDirect: -+ mapRegs_LOONGARCH64AMode(m, i->LAin.XDirect.amPC); -+ if (!hregIsInvalid(i->LAin.XDirect.cond)) -+ mapReg(m, &i->LAin.XDirect.cond); -+ break; -+ case LAin_XIndir: -+ mapReg(m, &i->LAin.XIndir.dstGA); -+ mapRegs_LOONGARCH64AMode(m, i->LAin.XIndir.amPC); -+ if (!hregIsInvalid(i->LAin.XIndir.cond)) -+ mapReg(m, &i->LAin.XIndir.cond); -+ break; -+ case LAin_XAssisted: -+ mapReg(m, &i->LAin.XAssisted.dstGA); -+ mapRegs_LOONGARCH64AMode(m, i->LAin.XAssisted.amPC); -+ if (!hregIsInvalid(i->LAin.XAssisted.cond)) -+ mapReg(m, &i->LAin.XAssisted.cond); -+ break; -+ case LAin_EvCheck: -+ /* We expect both amodes only to mention $r31, so this is in -+ fact pointless, since $r31 isn't allocatable, but anyway.. */ -+ mapRegs_LOONGARCH64AMode(m, i->LAin.EvCheck.amCounter); -+ mapRegs_LOONGARCH64AMode(m, i->LAin.EvCheck.amFailAddr); ++ switch (ri->tag) { ++ case LAri_Reg: ++ addHRegUse(u, HRmRead, ri->LAri.R.reg); + break; -+ case LAin_ProfInc: -+ /* Hardwires $r12 and $r13 -- nothing to modify. */ ++ case LAri_Imm: + break; + default: -+ ppLOONGARCH64Instr(i, mode64); -+ vpanic("mapRegs_LOONGARCH64Instr"); ++ vpanic("addRegUsage_LOONGARCH64RI"); + break; + } +} + -+/* Generate loongarch64 spill instructions under the direction of the -+ register allocator. */ -+void genSpill_LOONGARCH64 ( /*OUT*/ HInstr** i1, /*OUT*/ HInstr** i2, -+ HReg rreg, Int offsetB, Bool mode64 ) ++static inline void mapRegs_LOONGARCH64RI( HRegRemap* m, LOONGARCH64RI* ri ) +{ -+ vassert(mode64 == True); -+ vassert(offsetB >= 0); -+ vassert(!hregIsVirtual(rreg)); -+ -+ LOONGARCH64AMode* am; -+ *i1 = *i2 = NULL; -+ am = LOONGARCH64AMode_RI(hregGSP(), offsetB); -+ -+ switch (hregClass(rreg)) { -+ case HRcInt64: -+ *i1 = LOONGARCH64Instr_Store(LAstore_ST_D, am, rreg); ++ switch (ri->tag) { ++ case LAri_Reg: ++ mapReg(m, &ri->LAri.R.reg); + break; -+ case HRcFlt64: -+ *i1 = LOONGARCH64Instr_FpStore(LAfpstore_FST_D, am, rreg); ++ case LAri_Imm: + break; + default: -+ ppHRegClass(hregClass(rreg)); -+ vpanic("genSpill_LOONGARCH64: unimplemented regclass"); ++ vpanic("mapRegs_LOONGARCH64RI"); + break; + } +} + -+/* Generate loongarch64 reload instructions under the direction of the -+ register allocator. */ -+void genReload_LOONGARCH64 ( /*OUT*/ HInstr** i1, /*OUT*/ HInstr** i2, -+ HReg rreg, Int offsetB, Bool mode64 ) -+{ -+ vassert(mode64 == True); -+ vassert(offsetB >= 0); -+ vassert(!hregIsVirtual(rreg)); + -+ LOONGARCH64AMode* am; -+ *i1 = *i2 = NULL; -+ am = LOONGARCH64AMode_RI(hregGSP(), offsetB); ++/* --------- Instructions. --------- */ + -+ switch (hregClass(rreg)) { -+ case HRcInt64: -+ *i1 = LOONGARCH64Instr_Load(LAload_LD_D, am, rreg); -+ break; -+ case HRcFlt64: -+ *i1 = LOONGARCH64Instr_FpLoad(LAfpload_FLD_D, am, rreg); -+ break; ++static inline const HChar* showLOONGARCH64UnOp ( LOONGARCH64UnOp op ) ++{ ++ switch (op) { ++ case LAun_CLZ_W: ++ return "clz.w"; ++ case LAun_CTZ_W: ++ return "ctz.w"; ++ case LAun_CLZ_D: ++ return "clz.d"; ++ case LAun_CTZ_D: ++ return "ctz.w"; ++ case LAun_EXT_W_H: ++ return "ext.w.h"; ++ case LAun_EXT_W_B: ++ return "ext.w.b"; + default: -+ ppHRegClass(hregClass(rreg)); -+ vpanic("genReload_LOONGARCH64: unimplemented regclass"); ++ vpanic("showLOONGARCH64UnOp"); + break; + } +} + -+/* Generate loongarch64 move instructions under the direction of the -+ register allocator. */ -+LOONGARCH64Instr* genMove_LOONGARCH64 ( HReg from, HReg to, Bool mode64 ) ++static inline const HChar* showLOONGARCH64BinOp ( LOONGARCH64BinOp op ) +{ -+ vassert(mode64 == True); -+ switch (hregClass(from)) { -+ case HRcInt64: -+ return LOONGARCH64Instr_Binary(LAbin_OR, -+ LOONGARCH64RI_R(hregZERO()), -+ from, to); -+ case HRcFlt64: -+ return LOONGARCH64Instr_FpMove(LAfpmove_FMOV_D, from, to); ++ switch (op) { ++ case LAbin_ADD_W: ++ return "add.w"; ++ case LAbin_ADD_D: ++ return "add.d"; ++ case LAbin_SUB_W: ++ return "sub.w"; ++ case LAbin_SUB_D: ++ return "sub.d"; ++ case LAbin_NOR: ++ return "nor"; ++ case LAbin_AND: ++ return "and"; ++ case LAbin_OR: ++ return "or"; ++ case LAbin_XOR: ++ return "xor"; ++ case LAbin_SLL_W: ++ return "sll.w"; ++ case LAbin_SRL_W: ++ return "srl.w"; ++ case LAbin_SRA_W: ++ return "sra.w"; ++ case LAbin_SLL_D: ++ return "sll.d"; ++ case LAbin_SRL_D: ++ return "srl.d"; ++ case LAbin_SRA_D: ++ return "sra.d"; ++ case LAbin_MUL_W: ++ return "mul.w"; ++ case LAbin_MUL_D: ++ return "mul.d"; ++ case LAbin_MULH_W: ++ return "mulh.w"; ++ case LAbin_MULH_WU: ++ return "mulh.wu"; ++ case LAbin_MULH_D: ++ return "mulh.d"; ++ case LAbin_MULH_DU: ++ return "mulh.du"; ++ case LAbin_MULW_D_W: ++ return "mulw.d.w"; ++ case LAbin_MULW_D_WU: ++ return "mulw.d.wu"; ++ case LAbin_DIV_W: ++ return "div.w"; ++ case LAbin_MOD_W: ++ return "mod.w"; ++ case LAbin_DIV_WU: ++ return "div.wu"; ++ case LAbin_MOD_WU: ++ return "mod.wu"; ++ case LAbin_DIV_D: ++ return "div.d"; ++ case LAbin_MOD_D: ++ return "mod.d"; ++ case LAbin_DIV_DU: ++ return "div.du"; ++ case LAbin_MOD_DU: ++ return "mod.du"; ++ case LAbin_SLLI_W: ++ return "slli.w"; ++ case LAbin_SLLI_D: ++ return "slli.d"; ++ case LAbin_SRLI_W: ++ return "srli.w"; ++ case LAbin_SRLI_D: ++ return "srli.d"; ++ case LAbin_SRAI_W: ++ return "srai.w"; ++ case LAbin_SRAI_D: ++ return "srai.d"; ++ case LAbin_ADDI_W: ++ return "addi.w"; ++ case LAbin_ADDI_D: ++ return "addi.d"; ++ case LAbin_ANDI: ++ return "andi"; ++ case LAbin_ORI: ++ return "ori"; ++ case LAbin_XORI: ++ return "xori"; + default: -+ ppHRegClass(hregClass(from)); -+ vpanic("genMove_LOONGARCH64: unimplemented regclass"); ++ vpanic("showLOONGARCH64BinOp"); ++ break; + } +} + -+ -+/* --------- The loongarch64 assembler --------- */ -+ -+static inline UInt iregEnc ( HReg r ) ++static inline const HChar* showLOONGARCH64LoadOp ( LOONGARCH64LoadOp op ) +{ -+ vassert(hregClass(r) == HRcInt64); -+ vassert(!hregIsVirtual(r)); -+ UInt n = hregEncoding(r); -+ vassert(n < 32); -+ return n; ++ switch (op) { ++ case LAload_LD_D: ++ return "ld.d"; ++ case LAload_LD_BU: ++ return "ld.bu"; ++ case LAload_LD_HU: ++ return "ld.hu"; ++ case LAload_LD_WU: ++ return "ld.wu"; ++ case LAload_LDX_D: ++ return "ldx.d"; ++ case LAload_LDX_BU: ++ return "ldx.bu"; ++ case LAload_LDX_HU: ++ return "ldx.hu"; ++ case LAload_LDX_WU: ++ return "ldx.wu"; ++ default: ++ vpanic("LOONGARCH64LoadOp"); ++ break; ++ } +} + -+static inline UInt fregEnc ( HReg r ) ++static inline const HChar* showLOONGARCH64StoreOp ( LOONGARCH64StoreOp op ) +{ -+ vassert(hregClass(r) == HRcFlt64); -+ vassert(!hregIsVirtual(r)); -+ UInt n = hregEncoding(r); -+ vassert(n < 32); -+ return n; ++ switch (op) { ++ case LAstore_ST_B: ++ return "st.b"; ++ case LAstore_ST_H: ++ return "st.h"; ++ case LAstore_ST_W: ++ return "st.w"; ++ case LAstore_ST_D: ++ return "st.d"; ++ case LAstore_STX_B: ++ return "stx.b"; ++ case LAstore_STX_H: ++ return "stx.h"; ++ case LAstore_STX_W: ++ return "stx.w"; ++ case LAstore_STX_D: ++ return "stx.d"; ++ default: ++ vpanic("LOONGARCH64StoreOp"); ++ break; ++ } +} + -+static inline UInt fcsrEnc ( HReg r ) ++static inline const HChar* showLOONGARCH64LLSCOp ( LOONGARCH64LLSCOp op ) +{ -+ vassert(hregClass(r) == HRcInt32); -+ vassert(!hregIsVirtual(r)); -+ UInt n = hregEncoding(r); -+ vassert(n < 32); -+ return n; ++ switch (op) { ++ case LAllsc_LL_W: ++ return "ll.w"; ++ case LAllsc_SC_W: ++ return "sc.w"; ++ case LAllsc_LL_D: ++ return "ll.d"; ++ case LAllsc_SC_D: ++ return "sc.d"; ++ default: ++ vpanic("LOONGARCH64LLSCOp"); ++ break; ++ } +} + -+static inline UInt emit_op_rj_rd ( UInt op, UInt rj, UInt rd ) -+{ -+ vassert(rj < (1 << 5)); -+ vassert(rd < (1 << 5)); -+ return op | (rj << 5) | rd; -+} -+ -+static inline UInt emit_op_rk_rj_rd ( UInt op, UInt rk, UInt rj, UInt rd ) -+{ -+ vassert(rk < (1 << 5)); -+ vassert(rj < (1 << 5)); -+ vassert(rd < (1 << 5)); -+ return op | (rk << 10) | (rj << 5) | rd; -+} -+ -+static inline UInt emit_op_fj_fd ( UInt op, UInt fj, UInt fd ) -+{ -+ vassert(fj < (1 << 5)); -+ vassert(fd < (1 << 5)); -+ return op | (fj << 5) | fd; -+} -+ -+static inline UInt emit_op_fa_fk_fj_fd ( UInt op, UInt fa, UInt fk, UInt fj, UInt fd ) -+{ -+ vassert(fa < (1 << 5)); -+ vassert(fk < (1 << 5)); -+ vassert(fj < (1 << 5)); -+ vassert(fd < (1 << 5)); -+ return op | (fa << 15) | (fk << 10) | (fj << 5) | fd; -+} -+ -+static inline UInt emit_op_fk_fj_fd ( UInt op, UInt fk, UInt fj, UInt fd ) -+{ -+ vassert(fk < (1 << 5)); -+ vassert(fj < (1 << 5)); -+ vassert(fd < (1 << 5)); -+ return op | (fk << 10) | (fj << 5) | fd; -+} -+ -+static inline UInt emit_op_ca_fk_fj_fd ( UInt op, UInt ca, UInt fk, UInt fj, UInt fd ) -+{ -+ vassert(ca < (1 << 3)); -+ vassert(fk < (1 << 5)); -+ vassert(fj < (1 << 5)); -+ vassert(fd < (1 << 5)); -+ return op | (ca << 15) | (fk << 10) | (fj << 5) | fd; -+} -+ -+static inline UInt emit_op_fk_fj_cd ( UInt op, UInt fk, UInt fj, UInt cd ) -+{ -+ vassert(fk < (1 << 5)); -+ vassert(fj < (1 << 5)); -+ vassert(cd < (1 << 3)); -+ return op | (fk << 10) | (fj << 5) | cd; -+} -+ -+static inline UInt emit_op_cj_rd ( UInt op, UInt cj, UInt rd ) -+{ -+ vassert(cj < (1 << 3)); -+ vassert(rd < (1 << 5)); -+ return op | (cj << 5) | rd; -+} -+ -+static inline UInt emit_op_rj_cd ( UInt op, UInt rj, UInt cd ) -+{ -+ vassert(rj < (1 << 5)); -+ vassert(cd < (1 << 3)); -+ return op | (rj << 5) | cd; -+} -+ -+static inline UInt emit_op_rj_fd ( UInt op, UInt rj, UInt fd ) -+{ -+ vassert(rj < (1 << 5)); -+ vassert(fd < (1 << 5)); -+ return op | (rj << 5) | fd; -+} -+ -+static inline UInt emit_op_fj_rd ( UInt op, UInt fj, UInt rd ) -+{ -+ vassert(fj < (1 << 5)); -+ vassert(rd < (1 << 5)); -+ return op | (fj << 5) | rd; -+} -+ -+static inline UInt emit_op_rj_fcsr ( UInt op, UInt rj, UInt fcsr ) -+{ -+ vassert(rj < (1 << 5)); -+ vassert(fcsr < (1 << 5)); -+ return op | (rj << 5) | fcsr; -+} -+ -+static inline UInt emit_op_fcsr_rd ( UInt op, UInt fcsr, UInt rd ) -+{ -+ vassert(fcsr < (1 << 5)); -+ vassert(rd < (1 << 5)); -+ return op | (fcsr << 5) | rd; -+} -+ -+static inline UInt emit_op_ui5_rj_rd ( UInt op, UInt ui5, UInt rj, UInt rd ) -+{ -+ vassert(ui5 < (1 << 5)); -+ vassert(rj < (1 << 5)); -+ vassert(rd < (1 << 5)); -+ return op | (ui5 << 10) | (rj << 5) | rd; -+} -+ -+static inline UInt emit_op_ui6_rj_rd ( UInt op, UInt ui6, UInt rj, UInt rd ) -+{ -+ vassert(ui6 < (1 << 6)); -+ vassert(rj < (1 << 5)); -+ vassert(rd < (1 << 5)); -+ return op | (ui6 << 10) | (rj << 5) | rd; -+} -+ -+static inline UInt emit_op_ui12_rj_rd ( UInt op, UInt ui12, UInt rj, UInt rd ) -+{ -+ vassert(ui12 < (1 << 12)); -+ vassert(rj < (1 << 5)); -+ vassert(rd < (1 << 5)); -+ return op | (ui12 << 10) | (rj << 5) | rd; -+} -+ -+static inline UInt emit_op_si12_rj_rd ( UInt op, UInt si12, UInt rj, UInt rd ) -+{ -+ vassert(si12 < (1 << 12)); -+ vassert(rj < (1 << 5)); -+ vassert(rd < (1 << 5)); -+ return op | (si12 << 10) | (rj << 5) | rd; -+} -+ -+static inline UInt emit_op_si14_rj_rd ( UInt op, UInt si14, UInt rj, UInt rd ) -+{ -+ vassert(si14 < (1 << 14)); -+ vassert(rj < (1 << 5)); -+ vassert(rd < (1 << 5)); -+ return op | (si14 << 10) | (rj << 5) | rd; -+} -+ -+static inline UInt emit_op_si20_rd ( UInt op, UInt si20, UInt rd ) -+{ -+ vassert(si20 < (1 << 20)); -+ vassert(rd < (1 << 5)); -+ return op | (si20 << 5) | rd; -+} -+ -+static inline UInt emit_op_offs16_rj_rd ( UInt op, UInt offs16, UInt rj, UInt rd ) -+{ -+ vassert(offs16 < (1 << 16)); -+ vassert(rj < (1 << 5)); -+ vassert(rd < (1 << 5)); -+ return op | (offs16 << 10) | (rj << 5) | rd; -+} -+ -+static inline UInt emit_op_offs26 ( UInt op, UInt offs26 ) -+{ -+ vassert(offs26 < (1 << 26)); -+ return op | ((offs26 & 0xffff) << 10) | (offs26 >> 16); -+} -+ -+static inline UInt emit_op_hint15 ( UInt op, UInt hint ) -+{ -+ vassert(hint < (1 << 15)); -+ return op | hint; -+} -+ -+static UInt* mkLoadImm_EXACTLY4 ( UInt* p, HReg dst, ULong imm ) -+{ -+ /* -+ lu12i.w dst, imm[31:12] -+ ori dst, dst, imm[11:0] -+ lu32i.d dst, imm[51:32] -+ lu52i.d dst, dst, imm[63:52] -+ */ -+ UInt d = iregEnc(dst); -+ *p++ = emit_op_si20_rd(LAextra_LU12I_W, (imm >> 12) & 0xfffff, d); -+ *p++ = emit_op_si12_rj_rd(LAbin_ORI, imm & 0xfff, d, d); -+ *p++ = emit_op_si20_rd(LAextra_LU32I_D, (imm >> 32) & 0xfffff, d); -+ *p++ = emit_op_si12_rj_rd(LAextra_LU52I_D, (imm >> 52) & 0xfff, d, d); -+ return p; -+} -+ -+static inline UInt* mkLoadImm_EXACTLY2 ( UInt* p, HReg dst, ULong imm ) -+{ -+ /* -+ lu12i.w dst, imm[31:12] -+ ori dst, dst, imm[11:0] -+ */ -+ UInt d = iregEnc(dst); -+ *p++ = emit_op_si20_rd(LAextra_LU12I_W, (imm >> 12) & 0xfffff, d); -+ *p++ = emit_op_si12_rj_rd(LAbin_ORI, imm & 0xfff, d, d); -+ return p; -+} -+ -+static inline UInt* mkLoadImm_EXACTLY1 ( UInt* p, HReg dst, ULong imm ) -+{ -+ /* ori dst, $zero, imm[11:0] */ -+ *p++ = emit_op_si12_rj_rd(LAbin_ORI, imm, 0, iregEnc(dst)); -+ return p; -+} -+ -+static UInt* mkLoadImm ( UInt* p, HReg dst, ULong imm ) -+{ -+ if ((imm >> 12) == 0) -+ p = mkLoadImm_EXACTLY1(p, dst, imm); -+ else if (imm < 0x80000000 || (imm >> 31) == 0x1ffffffffUL) -+ p = mkLoadImm_EXACTLY2(p, dst, imm); -+ else -+ p = mkLoadImm_EXACTLY4(p, dst, imm); -+ return p; -+} -+ -+static Bool is_LoadImm_EXACTLY4 ( UInt* p, HReg dst, ULong imm ) -+{ -+ UInt expect[4]; -+ mkLoadImm_EXACTLY4(expect, dst, imm); -+ return toBool(p[0] == expect[0] && p[1] == expect[1] && -+ p[2] == expect[2] && p[3] == expect[3]); -+} -+ -+static inline UInt* mkUnary ( UInt* p, LOONGARCH64UnOp op, HReg src, HReg dst ) -+{ -+ switch (op) { -+ case LAun_CLZ_W: -+ case LAun_CTZ_W: -+ case LAun_CLZ_D: -+ case LAun_CTZ_D: -+ case LAun_EXT_W_H: -+ case LAun_EXT_W_B: -+ *p++ = emit_op_rj_rd(op, iregEnc(src), iregEnc(dst)); -+ return p; -+ default: -+ return NULL; -+ } -+} -+ -+static inline UInt* mkBinary ( UInt* p, LOONGARCH64BinOp op, -+ LOONGARCH64RI* src2, HReg src1, HReg dst ) -+{ -+ switch (op) { -+ case LAbin_ADD_W: -+ case LAbin_ADD_D: -+ case LAbin_SUB_W: -+ case LAbin_SUB_D: -+ case LAbin_NOR: -+ case LAbin_AND: -+ case LAbin_OR: -+ case LAbin_XOR: -+ case LAbin_SLL_W: -+ case LAbin_SRL_W: -+ case LAbin_SRA_W: -+ case LAbin_SLL_D: -+ case LAbin_SRL_D: -+ case LAbin_SRA_D: -+ case LAbin_MUL_W: -+ case LAbin_MUL_D: -+ case LAbin_MULH_W: -+ case LAbin_MULH_WU: -+ case LAbin_MULH_D: -+ case LAbin_MULH_DU: -+ case LAbin_MULW_D_W: -+ case LAbin_MULW_D_WU: -+ case LAbin_DIV_W: -+ case LAbin_MOD_W: -+ case LAbin_DIV_WU: -+ case LAbin_MOD_WU: -+ case LAbin_DIV_D: -+ case LAbin_MOD_D: -+ case LAbin_DIV_DU: -+ case LAbin_MOD_DU: -+ vassert(src2->tag == LAri_Reg); -+ *p++ = emit_op_rk_rj_rd(op, iregEnc(src2->LAri.R.reg), -+ iregEnc(src1), iregEnc(dst)); -+ return p; -+ case LAbin_SLLI_W: -+ case LAbin_SRLI_W: -+ case LAbin_SRAI_W: -+ vassert(src2->tag == LAri_Imm); -+ *p++ = emit_op_ui5_rj_rd(op, src2->LAri.I.imm, -+ iregEnc(src1), iregEnc(dst)); -+ return p; -+ case LAbin_SLLI_D: -+ case LAbin_SRLI_D: -+ case LAbin_SRAI_D: -+ vassert(src2->tag == LAri_Imm); -+ *p++ = emit_op_ui6_rj_rd(op, src2->LAri.I.imm, -+ iregEnc(src1), iregEnc(dst)); -+ return p; -+ case LAbin_ADDI_W: -+ case LAbin_ADDI_D: -+ vassert(src2->tag == LAri_Imm); -+ *p++ = emit_op_si12_rj_rd(op, src2->LAri.I.imm, -+ iregEnc(src1), iregEnc(dst)); -+ return p; -+ case LAbin_ANDI: -+ case LAbin_ORI: -+ case LAbin_XORI: -+ vassert(src2->tag == LAri_Imm); -+ *p++ = emit_op_ui12_rj_rd(op, src2->LAri.I.imm, -+ iregEnc(src1), iregEnc(dst)); -+ return p; -+ default: -+ return NULL; -+ } -+} -+ -+static UInt* mkLoad ( UInt* p, LOONGARCH64LoadOp op, -+ LOONGARCH64AMode* src, HReg dst ) -+{ -+ switch (op) { -+ case LAload_LD_W: -+ case LAload_LD_D: -+ case LAload_LD_BU: -+ case LAload_LD_HU: -+ case LAload_LD_WU: -+ vassert(src->tag == LAam_RI); -+ *p++ = emit_op_si12_rj_rd(op, src->LAam.RI.index, -+ iregEnc(src->LAam.RI.base), iregEnc(dst)); -+ return p; -+ case LAload_LDX_D: -+ case LAload_LDX_BU: -+ case LAload_LDX_HU: -+ case LAload_LDX_WU: -+ vassert(src->tag == LAam_RR); -+ *p++ = emit_op_rk_rj_rd(op, iregEnc(src->LAam.RR.index), -+ iregEnc(src->LAam.RR.base), iregEnc(dst)); -+ return p; -+ default: -+ return NULL; -+ } -+} -+ -+static UInt* mkStore ( UInt* p, LOONGARCH64StoreOp op, -+ LOONGARCH64AMode* dst, HReg src ) -+{ -+ switch (op) { -+ case LAstore_ST_B: -+ case LAstore_ST_H: -+ case LAstore_ST_W: -+ case LAstore_ST_D: -+ vassert(dst->tag == LAam_RI); -+ *p++ = emit_op_si12_rj_rd(op, dst->LAam.RI.index, -+ iregEnc(dst->LAam.RI.base), iregEnc(src)); -+ return p; -+ case LAstore_STX_B: -+ case LAstore_STX_H: -+ case LAstore_STX_W: -+ case LAstore_STX_D: -+ vassert(dst->tag == LAam_RR); -+ *p++ = emit_op_rk_rj_rd(op, iregEnc(dst->LAam.RR.index), -+ iregEnc(dst->LAam.RR.base), iregEnc(src)); -+ return p; -+ default: -+ return NULL; -+ } -+} -+ -+static inline UInt* mkLLSC ( UInt* p, LOONGARCH64LLSCOp op, -+ LOONGARCH64AMode* addr, HReg val ) -+{ -+ switch (op) { -+ case LAllsc_LL_W: -+ case LAllsc_SC_W: -+ case LAllsc_LL_D: -+ case LAllsc_SC_D: -+ vassert(addr->tag == LAam_RI); -+ *p++ = emit_op_si14_rj_rd(op, addr->LAam.RI.index, -+ iregEnc(addr->LAam.RI.base), iregEnc(val)); -+ return p; -+ default: -+ return NULL; -+ } -+} -+ -+static inline UInt* mkBar ( UInt* p, LOONGARCH64BarOp op, UShort hint ) ++static inline const HChar* showLOONGARCH64BarOp ( LOONGARCH64BarOp op ) +{ ++ const HChar* ret; + switch (op) { + case LAbar_DBAR: ++ return "dbar"; + case LAbar_IBAR: -+ *p++ = emit_op_hint15(op, hint); -+ return p; ++ return "ibar"; + default: -+ return NULL; ++ vpanic("showLOONGARCH64BarOp"); ++ break; + } ++ return ret; +} + -+static inline UInt* mkFpUnary ( UInt* p, LOONGARCH64FpUnOp op, HReg src, HReg dst ) ++static inline const HChar* showLOONGARCH64FpUnOp ( LOONGARCH64FpUnOp op ) +{ ++ const HChar* ret; + switch (op) { + case LAfpun_FABS_S: ++ return "fabs.s"; + case LAfpun_FABS_D: ++ return "fabs.d"; + case LAfpun_FNEG_S: ++ return "fneg.s"; + case LAfpun_FNEG_D: ++ return "fneg.d"; + case LAfpun_FLOGB_S: ++ return "flogb.s"; + case LAfpun_FLOGB_D: ++ return "flogb.d"; + case LAfpun_FSQRT_S: ++ return "fsqrt.s"; + case LAfpun_FSQRT_D: ++ return "fsqrt.d"; + case LAfpun_FRSQRT_S: ++ return "frsqrt.s"; + case LAfpun_FRSQRT_D: ++ return "frsqrt.d"; + case LAfpun_FCVT_S_D: ++ return "fcvt.s.d"; + case LAfpun_FCVT_D_S: ++ return "fcvt.d.s"; + case LAfpun_FTINT_W_S: ++ return "ftint.w.s"; + case LAfpun_FTINT_W_D: ++ return "ftint.w.d"; + case LAfpun_FTINT_L_S: ++ return "ftint.l.s"; + case LAfpun_FTINT_L_D: ++ return "ftint.l.d"; + case LAfpun_FFINT_S_W: ++ return "ffint.s.w"; + case LAfpun_FFINT_S_L: ++ return "ffint.s.l"; + case LAfpun_FFINT_D_W: ++ return "ffint.d.w"; + case LAfpun_FFINT_D_L: ++ return "ffint.d.l"; + case LAfpun_FRINT_S: ++ return "frint.s"; + case LAfpun_FRINT_D: -+ *p++ = emit_op_fj_fd(op, fregEnc(src), fregEnc(dst)); -+ return p; ++ return "frint.d"; + default: -+ return NULL; ++ vpanic("showLOONGARCH64FpUnOp"); ++ break; + } ++ return ret; +} + -+static inline UInt* mkFpBinary ( UInt* p, LOONGARCH64FpBinOp op, HReg src2, -+ HReg src1, HReg dst ) ++static inline const HChar* showLOONGARCH64FpBinOp ( LOONGARCH64FpBinOp op ) +{ ++ const HChar* ret; + switch (op) { + case LAfpbin_FADD_S: ++ return "fadd.s"; + case LAfpbin_FADD_D: ++ return "fadd.d"; + case LAfpbin_FSUB_S: ++ return "fsub.s"; + case LAfpbin_FSUB_D: ++ return "fsub.d"; + case LAfpbin_FMUL_S: ++ return "fmul.s"; + case LAfpbin_FMUL_D: ++ return "fmul.d"; + case LAfpbin_FDIV_S: ++ return "fdiv.s"; + case LAfpbin_FDIV_D: ++ return "fdiv.d"; + case LAfpbin_FMAX_S: ++ return "fmax.s"; + case LAfpbin_FMAX_D: ++ return "fmax.d"; + case LAfpbin_FMIN_S: ++ return "fmin.s"; + case LAfpbin_FMIN_D: ++ return "fmin.d"; + case LAfpbin_FMAXA_S: ++ return "fmaxa.s"; + case LAfpbin_FMAXA_D: ++ return "fmaxa.d"; + case LAfpbin_FMINA_S: ++ return "fmina.s"; + case LAfpbin_FMINA_D: ++ return "fmina.d"; + case LAfpbin_FSCALEB_S: ++ return "fscaleb.s"; + case LAfpbin_FSCALEB_D: -+ *p++ = emit_op_fk_fj_fd(op, fregEnc(src2), fregEnc(src1), fregEnc(dst)); -+ return p; ++ return "fscaleb.d"; + default: -+ return NULL; ++ vpanic("showLOONGARCH64FpBinOp"); ++ break; + } ++ return ret; +} + -+static inline UInt* mkFpTrinary ( UInt* p, LOONGARCH64FpTriOp op, HReg src3, -+ HReg src2, HReg src1, HReg dst ) ++static inline const HChar* showLOONGARCH64FpTriOp ( LOONGARCH64FpTriOp op ) +{ ++ const HChar* ret; + switch (op) { + case LAfpbin_FMADD_S: ++ return "fmadd.s"; + case LAfpbin_FMADD_D: ++ return "fmadd.d"; + case LAfpbin_FMSUB_S: ++ return "fmsub.s"; + case LAfpbin_FMSUB_D: -+ *p++ = emit_op_fa_fk_fj_fd(op, fregEnc(src3), fregEnc(src2), -+ fregEnc(src1), fregEnc(dst)); -+ return p; ++ return "fmsub.d"; + default: -+ return NULL; ++ vpanic("showLOONGARCH64FpTriOp"); ++ break; + } ++ return ret; +} + -+static inline UInt* mkFpLoad ( UInt* p, LOONGARCH64FpLoadOp op, -+ LOONGARCH64AMode* src, HReg dst ) ++static inline const HChar* showLOONGARCH64FpLoadOp ( LOONGARCH64FpLoadOp op ) +{ + switch (op) { + case LAfpload_FLD_S: ++ return "fld.s"; + case LAfpload_FLD_D: -+ vassert(src->tag == LAam_RI); -+ *p++ = emit_op_si12_rj_rd(op, src->LAam.RI.index, -+ iregEnc(src->LAam.RI.base), fregEnc(dst)); -+ return p; ++ return "fld.d"; + case LAfpload_FLDX_S: ++ return "fldx.s"; + case LAfpload_FLDX_D: -+ vassert(src->tag == LAam_RR); -+ *p++ = emit_op_rk_rj_rd(op, iregEnc(src->LAam.RR.index), -+ iregEnc(src->LAam.RR.base), fregEnc(dst)); -+ return p; ++ return "fldx.d"; + default: -+ return NULL; ++ vpanic("LOONGARCH64FpLoadOp"); ++ break; + } +} + -+static inline UInt* mkFpStore ( UInt* p, LOONGARCH64FpStoreOp op, -+ LOONGARCH64AMode* dst, HReg src ) ++static inline const HChar* showLOONGARCH64FpStoreOp ( LOONGARCH64FpStoreOp op ) +{ + switch (op) { + case LAfpstore_FST_S: ++ return "fst.s"; + case LAfpstore_FST_D: -+ vassert(dst->tag == LAam_RI); -+ *p++ = emit_op_si12_rj_rd(op, dst->LAam.RI.index, -+ iregEnc(dst->LAam.RI.base), fregEnc(src)); -+ return p; ++ return "fst.d"; + case LAfpstore_FSTX_S: ++ return "fstx.s"; + case LAfpstore_FSTX_D: -+ vassert(dst->tag == LAam_RR); -+ *p++ = emit_op_rk_rj_rd(op, iregEnc(dst->LAam.RR.index), -+ iregEnc(dst->LAam.RR.base), fregEnc(src)); -+ return p; ++ return "fstx.d"; + default: -+ return NULL; ++ vpanic("LOONGARCH64FpStoreOp"); ++ break; + } +} + -+static inline UInt* mkFpMove ( UInt* p, LOONGARCH64FpMoveOp op, HReg src, HReg dst ) ++static inline const HChar* showLOONGARCH64FpMoveOp ( LOONGARCH64FpMoveOp op ) +{ + switch (op) { + case LAfpmove_FMOV_S: ++ return "fmov.s"; + case LAfpmove_FMOV_D: -+ *p++ = emit_op_fj_fd(op, fregEnc(src), fregEnc(dst)); -+ return p; ++ return "fmov.d"; + case LAfpmove_MOVGR2FR_W: ++ return "movgr2fr.w"; + case LAfpmove_MOVGR2FR_D: -+ *p++ = emit_op_rj_fd(op, iregEnc(src), fregEnc(dst)); -+ return p; ++ return "movgr2fr.d"; + case LAfpmove_MOVFR2GR_S: ++ return "movfr2gr.s"; + case LAfpmove_MOVFR2GR_D: -+ *p++ = emit_op_fj_rd(op, fregEnc(src), iregEnc(dst)); -+ return p; ++ return "movfr2gr.d"; + case LAfpmove_MOVGR2FCSR: -+ *p++ = emit_op_rj_fcsr(op, iregEnc(src), fcsrEnc(dst)); -+ return p; ++ return "movgr2fcsr"; + case LAfpmove_MOVFCSR2GR: -+ *p++ = emit_op_fcsr_rd(op, fcsrEnc(src), iregEnc(dst)); -+ return p; ++ return "movfcsr2gr"; + default: -+ return NULL; ++ vpanic("showLOONGARCH64FpMoveOp"); ++ break; + } +} + -+static inline UInt* mkFpCmp ( UInt* p, LOONGARCH64FpCmpOp op, HReg src2, -+ HReg src1, HReg dst ) ++static inline const HChar* showLOONGARCH64FpCmpOp ( LOONGARCH64FpCmpOp op ) +{ -+ /* -+ fcmp.cond.[sd] $fcc0, src1, src2 -+ movcf2gr dst, $fcc0 -+ */ ++ const HChar* ret; + switch (op) { + case LAfpcmp_FCMP_CLT_S: ++ return "fcmp.clt.s"; + case LAfpcmp_FCMP_CLT_D: ++ return "fcmp.clt.d"; + case LAfpcmp_FCMP_CEQ_S: ++ return "fcmp.ceq.s"; + case LAfpcmp_FCMP_CEQ_D: ++ return "fcmp.ceq.d"; + case LAfpcmp_FCMP_CUN_S: ++ return "fcmp.cun.s"; + case LAfpcmp_FCMP_CUN_D: -+ *p++ = emit_op_fk_fj_cd(op, fregEnc(src2), fregEnc(src1), 0); -+ *p++ = emit_op_cj_rd(LAextra_MOVCF2GR, 0, iregEnc(dst)); -+ return p; ++ return "fcmp.cun.d"; + default: -+ return NULL; ++ vpanic("showLOONGARCH64FpCmpOp"); ++ break; + } ++ return ret; +} + -+static inline UInt* mkCas ( UInt* p, HReg old, HReg addr, HReg expd, -+ HReg data, Bool size64 ) ++static inline const HChar* showLOONGARCH64VecUnOp ( LOONGARCH64VecUnOp op ) +{ -+ /* -+ ll.[wd] old, addr, 0 -+ bne old, expd, barrier -+ or $t0, data, $zero -+ sc.[wd] $t0, addr, 0 -+ beq $t0, zero, fail -+ or old, expd, $zero -+ b end -+ barrier: -+ dbar 0 -+ fail: -+ or old, data, $zero -+ end: -+ */ -+ UInt o = iregEnc(old); -+ UInt a = iregEnc(addr); -+ UInt e = iregEnc(expd); -+ UInt d = iregEnc(data); -+ UInt t = 12; -+ UInt z = 0; -+ -+ if (size64) { -+ *p++ = emit_op_si14_rj_rd(LAllsc_LL_D, 0, a, o); -+ } else { -+ *p++ = emit_op_ui6_rj_rd(LAbin_SLLI_W, 0, e, e); // Sign-extend expd -+ *p++ = emit_op_si14_rj_rd(LAllsc_LL_W, 0, a, o); -+ } -+ *p++ = emit_op_offs16_rj_rd(LAextra_BNE, 6, o, e); -+ *p++ = emit_op_rk_rj_rd(LAbin_OR, z, d, t); -+ if (size64) { -+ *p++ = emit_op_si14_rj_rd(LAllsc_SC_D, 0, a, t); -+ } else { -+ *p++ = emit_op_si14_rj_rd(LAllsc_SC_W, 0, a, t); ++ switch (op) { ++ case LAvecun_VCLO_B: ++ return "vclo.b"; ++ case LAvecun_VCLO_H: ++ return "vclo.h"; ++ case LAvecun_VCLO_W: ++ return "vclo.w"; ++ case LAvecun_VCLZ_B: ++ return "vclz.b"; ++ case LAvecun_VCLZ_H: ++ return "vclz.h"; ++ case LAvecun_VCLZ_W: ++ return "vclz.w"; ++ case LAvecun_VCLZ_D: ++ return "vclz.d"; ++ case LAvecun_VPCNT_B: ++ return "vpcnt.b"; ++ case LAvecun_VEXTH_H_B: ++ return "vexth.h.b"; ++ case LAvecun_VEXTH_W_H: ++ return "vexth.w.h"; ++ case LAvecun_VEXTH_D_W: ++ return "vexth.d.w"; ++ case LAvecun_VEXTH_Q_D: ++ return "vexth.q.d"; ++ case LAvecun_VEXTH_HU_BU: ++ return "vexth.hu.bu"; ++ case LAvecun_VEXTH_WU_HU: ++ return "vexth.wu.hu"; ++ case LAvecun_VEXTH_DU_WU: ++ return "vexth.du.wu"; ++ case LAvecun_VEXTH_QU_DU: ++ return "vexth.qu.du"; ++ case LAvecun_VREPLGR2VR_B: ++ return "vreplgr2vr.b"; ++ case LAvecun_VREPLGR2VR_H: ++ return "vreplgr2vr.h"; ++ case LAvecun_VREPLGR2VR_W: ++ return "vreplgr2vr.w"; ++ case LAvecun_VREPLGR2VR_D: ++ return "vreplgr2vr.d"; ++ default: ++ vpanic("showLOONGARCH64VecUnOp"); ++ break; + } -+ *p++ = emit_op_offs16_rj_rd(LAextra_BEQ, 4, t, z); -+ *p++ = emit_op_rk_rj_rd(LAbin_OR, z, e, o); -+ *p++ = emit_op_offs26(LAextra_B, 3); -+ *p++ = emit_op_hint15(LAbar_DBAR, 0); -+ *p++ = emit_op_rk_rj_rd(LAbin_OR, z, d, o); -+ return p; +} + -+static inline UInt* mkCmp ( UInt* p, LOONGARCH64CondCode cond, -+ HReg src2, HReg src1, HReg dst ) ++static inline const HChar* showLOONGARCH64VecBinOp ( LOONGARCH64VecBinOp op ) +{ -+ UInt d = iregEnc(dst); -+ UInt s1 = iregEnc(src1); -+ UInt s2 = iregEnc(src2); -+ -+ switch (cond) { -+ case LAcc_EQ: -+ /* -+ xor dst, src1, src2 -+ sltui dst, dst, 1 -+ */ -+ *p++ = emit_op_rk_rj_rd(LAbin_XOR, s2, s1, d); -+ *p++ = emit_op_si12_rj_rd(LAextra_SLTUI, 1, d, d); -+ return p; -+ case LAcc_NE: -+ /* -+ xor dst, src1, src2 -+ sltu dst, $zero, dst -+ */ -+ *p++ = emit_op_rk_rj_rd(LAbin_XOR, s2, s1, d); -+ *p++ = emit_op_rk_rj_rd(LAextra_SLTU, d, 0, d); -+ return p; -+ case LAcc_LT: -+ /* slt dst, src1, src2 */ -+ *p++ = emit_op_rk_rj_rd(LAextra_SLT, s2, s1, d); -+ return p; -+ case LAcc_GE: -+ /* -+ slt dst, src1, src2 -+ sltui dst, dst, 1 -+ */ -+ *p++ = emit_op_rk_rj_rd(LAextra_SLT, s2, s1, d); -+ *p++ = emit_op_si12_rj_rd(LAextra_SLTUI, 1, d, d); -+ return p; -+ case LAcc_LTU: -+ /* sltu dst, src1, src2 */ -+ *p++ = emit_op_rk_rj_rd(LAextra_SLTU, s2, s1, d); -+ return p; -+ case LAcc_GEU: -+ /* -+ sltu dst, src1, src2 -+ sltui dst, dst, 1 -+ */ -+ *p++ = emit_op_rk_rj_rd(LAextra_SLTU, s2, s1, d); -+ *p++ = emit_op_si12_rj_rd(LAextra_SLTUI, 1, d, d); -+ return p; -+ /* No LAcc_AL here. -+ case LAcc_AL: -+ break; -+ */ ++ switch (op) { ++ case LAvecbin_VSEQ_B: ++ return "vseq.b"; ++ case LAvecbin_VSEQ_H: ++ return "vseq.h"; ++ case LAvecbin_VSEQ_W: ++ return "vseq.w"; ++ case LAvecbin_VSEQ_D: ++ return "vseq.d"; ++ case LAvecbin_VSLT_B: ++ return "vslt.b"; ++ case LAvecbin_VSLT_H: ++ return "vslt.h"; ++ case LAvecbin_VSLT_W: ++ return "vslt.w"; ++ case LAvecbin_VSLT_D: ++ return "vslt.d"; ++ case LAvecbin_VSLT_BU: ++ return "vslt.bu"; ++ case LAvecbin_VSLT_HU: ++ return "vslt.hu"; ++ case LAvecbin_VSLT_WU: ++ return "vslt.wu"; ++ case LAvecbin_VSLT_DU: ++ return "vslt.du"; ++ case LAvecbin_VADD_B: ++ return "vadd.b"; ++ case LAvecbin_VADD_H: ++ return "vadd.h"; ++ case LAvecbin_VADD_W: ++ return "vadd.w"; ++ case LAvecbin_VADD_D: ++ return "vadd.d"; ++ case LAvecbin_VSUB_B: ++ return "vsub.b"; ++ case LAvecbin_VSUB_H: ++ return "vsub.h"; ++ case LAvecbin_VSUB_W: ++ return "vsub.w"; ++ case LAvecbin_VSUB_D: ++ return "vsub.d"; ++ case LAvecbin_VSADD_B: ++ return "vsadd.b"; ++ case LAvecbin_VSADD_H: ++ return "vsadd.h"; ++ case LAvecbin_VSADD_W: ++ return "vsadd.w"; ++ case LAvecbin_VSADD_D: ++ return "vsadd.d"; ++ case LAvecbin_VSSUB_B: ++ return "vssub.b"; ++ case LAvecbin_VSSUB_H: ++ return "vssub.h"; ++ case LAvecbin_VSSUB_W: ++ return "vssub.w"; ++ case LAvecbin_VSSUB_D: ++ return "vssub.d"; ++ case LAvecbin_VSADD_BU: ++ return "vsadd.bu"; ++ case LAvecbin_VSADD_HU: ++ return "vsadd.hu"; ++ case LAvecbin_VSADD_WU: ++ return "vsadd.wu"; ++ case LAvecbin_VSADD_DU: ++ return "vsadd.du"; ++ case LAvecbin_VSSUB_BU: ++ return "vssub.bu"; ++ case LAvecbin_VSSUB_HU: ++ return "vssub.hu"; ++ case LAvecbin_VSSUB_WU: ++ return "vssub.wu"; ++ case LAvecbin_VSSUB_DU: ++ return "vssub.du"; ++ case LAvecbin_VADDA_B: ++ return "vadda.b"; ++ case LAvecbin_VADDA_H: ++ return "vadda.h"; ++ case LAvecbin_VADDA_W: ++ return "vadda.w"; ++ case LAvecbin_VADDA_D: ++ return "vadda.d"; ++ case LAvecbin_VAVGR_B: ++ return "vavgr.b"; ++ case LAvecbin_VAVGR_H: ++ return "vavgr.h"; ++ case LAvecbin_VAVGR_W: ++ return "vavgr.w"; ++ case LAvecbin_VAVGR_D: ++ return "vavgr.d"; ++ case LAvecbin_VAVGR_BU: ++ return "vavgr.bu"; ++ case LAvecbin_VAVGR_HU: ++ return "vavgr.hu"; ++ case LAvecbin_VAVGR_WU: ++ return "vavgr.wu"; ++ case LAvecbin_VAVGR_DU: ++ return "vavgr.du"; ++ case LAvecbin_VMAX_B: ++ return "vmax.b"; ++ case LAvecbin_VMAX_H: ++ return "vmax.h"; ++ case LAvecbin_VMAX_W: ++ return "vmax.w"; ++ case LAvecbin_VMAX_D: ++ return "vmax.d"; ++ case LAvecbin_VMIN_B: ++ return "vmin.b"; ++ case LAvecbin_VMIN_H: ++ return "vmin.h"; ++ case LAvecbin_VMIN_W: ++ return "vmin.w"; ++ case LAvecbin_VMIN_D: ++ return "vmin.d"; ++ case LAvecbin_VMAX_BU: ++ return "vmax.bu"; ++ case LAvecbin_VMAX_HU: ++ return "vmax.hu"; ++ case LAvecbin_VMAX_WU: ++ return "vmax.wu"; ++ case LAvecbin_VMAX_DU: ++ return "vmax.du"; ++ case LAvecbin_VMIN_BU: ++ return "vmin.bu"; ++ case LAvecbin_VMIN_HU: ++ return "vmin.hu"; ++ case LAvecbin_VMIN_WU: ++ return "vmin.wu"; ++ case LAvecbin_VMIN_DU: ++ return "vmin.du"; ++ case LAvecbin_VMUL_B: ++ return "vmul.b"; ++ case LAvecbin_VMUL_H: ++ return "vmul.h"; ++ case LAvecbin_VMUL_W: ++ return "vmul.w"; ++ case LAvecbin_VMUH_B: ++ return "vmuh.b"; ++ case LAvecbin_VMUH_H: ++ return "vmuh.h"; ++ case LAvecbin_VMUH_W: ++ return "vmuh.w"; ++ case LAvecbin_VMUH_BU: ++ return "vmuh.bu"; ++ case LAvecbin_VMUH_HU: ++ return "vmuh.hu"; ++ case LAvecbin_VMUH_WU: ++ return "vmuh.wu"; ++ case LAvecbin_VSLL_B: ++ return "vsll.b"; ++ case LAvecbin_VSLL_H: ++ return "vsll.h"; ++ case LAvecbin_VSLL_W: ++ return "vsll.w"; ++ case LAvecbin_VSLL_D: ++ return "vsll.d"; ++ case LAvecbin_VSRL_B: ++ return "vsrl.b"; ++ case LAvecbin_VSRL_H: ++ return "vsrl.h"; ++ case LAvecbin_VSRL_W: ++ return "vsrl.w"; ++ case LAvecbin_VSRL_D: ++ return "vsrl.d"; ++ case LAvecbin_VSRA_B: ++ return "vsra.b"; ++ case LAvecbin_VSRA_H: ++ return "vsra.h"; ++ case LAvecbin_VSRA_W: ++ return "vsra.w"; ++ case LAvecbin_VSRA_D: ++ return "vsra.d"; ++ case LAvecbin_VILVL_B: ++ return "vilvl.b"; ++ case LAvecbin_VILVL_H: ++ return "vilvl.h"; ++ case LAvecbin_VILVL_W: ++ return "vilvl.w"; ++ case LAvecbin_VILVL_D: ++ return "vilvl.d"; ++ case LAvecbin_VILVH_B: ++ return "vilvh.b"; ++ case LAvecbin_VILVH_H: ++ return "vilvh.h"; ++ case LAvecbin_VILVH_W: ++ return "vilvh.w"; ++ case LAvecbin_VILVH_D: ++ return "vilvh.d"; ++ case LAvecbin_VPICKEV_B: ++ return "vpickev.b"; ++ case LAvecbin_VPICKEV_H: ++ return "vpickev.h"; ++ case LAvecbin_VPICKEV_W: ++ return "vpickev.w"; ++ case LAvecbin_VPICKOD_B: ++ return "vpickod.b"; ++ case LAvecbin_VPICKOD_H: ++ return "vpickod.h"; ++ case LAvecbin_VPICKOD_W: ++ return "vpickod.w"; ++ case LAvecbin_VREPLVE_B: ++ return "vreplve.b"; ++ case LAvecbin_VREPLVE_H: ++ return "vreplve.h"; ++ case LAvecbin_VREPLVE_W: ++ return "vreplve.w"; ++ case LAvecbin_VREPLVE_D: ++ return "vreplve.d"; ++ case LAvecbin_VAND_V: ++ return "vand.v"; ++ case LAvecbin_VOR_V: ++ return "vor.v"; ++ case LAvecbin_VXOR_V: ++ return "vxor.v"; ++ case LAvecbin_VNOR_V: ++ return "vnor.v"; ++ case LAvecbin_VADD_Q: ++ return "vadd.q"; ++ case LAvecbin_VSUB_Q: ++ return "vsub.q"; ++ case LAvecbin_VFADD_S: ++ return "vfadd.s"; ++ case LAvecbin_VFADD_D: ++ return "vfadd.d"; ++ case LAvecbin_VFSUB_S: ++ return "vfsub.s"; ++ case LAvecbin_VFSUB_D: ++ return "vfsub.d"; ++ case LAvecbin_VFMUL_S: ++ return "vfmul.s"; ++ case LAvecbin_VFMUL_D: ++ return "vfmul.d"; ++ case LAvecbin_VFDIV_S: ++ return "vfdiv.s"; ++ case LAvecbin_VFDIV_D: ++ return "vfdiv.d"; ++ case LAvecbin_VFMAX_S: ++ return "vfmax.s"; ++ case LAvecbin_VFMAX_D: ++ return "vfmax.d"; ++ case LAvecbin_VFMIN_S: ++ return "vfmin.s"; ++ case LAvecbin_VFMIN_D: ++ return "vfmin.d"; ++ case LAvecbin_VBSLL_V: ++ return "vbsll.v"; ++ case LAvecbin_VBSRL_V: ++ return "vbsrl.v"; ++ case LAvecbin_VINSGR2VR_B: ++ return "vinsgr2vr.b"; ++ case LAvecbin_VINSGR2VR_H: ++ return "vinsgr2vr.h"; ++ case LAvecbin_VINSGR2VR_W: ++ return "vinsgr2vr.w"; ++ case LAvecbin_VINSGR2VR_D: ++ return "vinsgr2vr.d"; ++ case LAvecbin_VPICKVE2GR_W: ++ return "vpickve2gr.w"; ++ case LAvecbin_VPICKVE2GR_D: ++ return "vpickve2gr.d"; ++ case LAvecbin_VPICKVE2GR_BU: ++ return "vpickve2gr.bu"; ++ case LAvecbin_VPICKVE2GR_HU: ++ return "vpickve2gr.hu"; ++ case LAvecbin_VPICKVE2GR_WU: ++ return "vpickve2gr.wu"; ++ case LAvecbin_VPICKVE2GR_DU: ++ return "vpickve2gr.du"; ++ case LAvecbin_VSLLI_B: ++ return "vslli.b"; ++ case LAvecbin_VSLLI_H: ++ return "vslli.h"; ++ case LAvecbin_VSLLI_W: ++ return "vslli.w"; ++ case LAvecbin_VSLLI_D: ++ return "vslli.d"; ++ case LAvecbin_VSRLI_B: ++ return "vsrli.b"; ++ case LAvecbin_VSRLI_H: ++ return "vsrli.h"; ++ case LAvecbin_VSRLI_W: ++ return "vsrli.w"; ++ case LAvecbin_VSRLI_D: ++ return "vsrli.d"; ++ case LAvecbin_VSRAI_B: ++ return "vsrai.b"; ++ case LAvecbin_VSRAI_H: ++ return "vsrai.h"; ++ case LAvecbin_VSRAI_W: ++ return "vsrai.w"; ++ case LAvecbin_VSRAI_D: ++ return "vsrai.d"; ++ case LAvecbin_VORI_B: ++ return "vori.b"; + default: -+ return NULL; ++ vpanic("showLOONGARCH64VecBinOp"); ++ break; + } +} + -+static inline UInt* mkCMove ( UInt* p, HReg cond, HReg r0, -+ HReg r1, HReg dst, Bool isInt ) ++static inline const HChar* showLOONGARCH64VecLoadOp ( LOONGARCH64VecLoadOp op ) +{ -+ if (isInt) { -+ /* -+ masknez $t0, r0, cond -+ maskeqz dst, r1, cond -+ or dst, $t0, dst -+ */ -+ UInt c = iregEnc(cond); -+ UInt d = iregEnc(dst); -+ *p++ = emit_op_rk_rj_rd(LAextra_MASKNEZ, c, iregEnc(r0), 12); -+ *p++ = emit_op_rk_rj_rd(LAextra_MASKEQZ, c, iregEnc(r1), d); -+ *p++ = emit_op_rk_rj_rd(LAbin_OR, d, 12, d); -+ } else { -+ /* -+ movgr2cf $fcc0, cond -+ fsel dst, r0, r1, $fcc0 -+ */ -+ *p++ = emit_op_rj_cd(LAextra_MOVGR2CF, iregEnc(cond), 0); -+ *p++ = emit_op_ca_fk_fj_fd(LAextra_FSEL, 0, fregEnc(r1), -+ fregEnc(r0), fregEnc(dst)); ++ switch (op) { ++ case LAvecload_VLD: ++ return "vld"; ++ case LAvecload_VLDX: ++ return "vldx"; ++ default: ++ vpanic("showLOONGARCH64VecLoadOp"); ++ break; + } -+ return p; +} + -+static inline UInt* mkCall ( UInt* p, HReg cond, Addr64 target, RetLoc rloc ) ++static inline const HChar* showLOONGARCH64VecStoreOp ( LOONGARCH64VecStoreOp op ) +{ -+ if (!hregIsInvalid(cond) && rloc.pri != RLPri_None) { -+ /* The call might not happen (it isn't unconditional) and -+ it returns a result. In this case we will need to -+ generate a control flow diamond to put 0x555..555 in -+ the return register(s) in the case where the call -+ doesn't happen. If this ever becomes necessary, maybe -+ copy code from the 32-bit ARM equivalent. Until that -+ day, just give up. */ -+ return NULL; ++ switch (op) { ++ case LAvecstore_VST: ++ return "vst"; ++ case LAvecstore_VSTX: ++ return "vstx"; ++ default: ++ vpanic("showLOONGARCH64VecStoreOp"); ++ break; + } ++} + -+ UInt* ptmp = NULL; -+ if (!hregIsInvalid(cond)) { -+ /* Create a hole to put a conditional branch in. We'll -+ patch it once we know the branch length. */ -+ ptmp = p; -+ p++; -+ } ++LOONGARCH64Instr* LOONGARCH64Instr_LI ( ULong imm, HReg dst ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_LI; ++ i->LAin.LI.imm = imm; ++ i->LAin.LI.dst = dst; ++ return i; ++} + -+ /* -+ $t0 = target -+ jirl $ra, $t0, 0 -+ */ -+ p = mkLoadImm(p, hregT0(), target); -+ *p++ = emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1); ++LOONGARCH64Instr* LOONGARCH64Instr_Unary ( LOONGARCH64UnOp op, ++ HReg src, HReg dst ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_Un; ++ i->LAin.Unary.op = op; ++ i->LAin.Unary.src = src; ++ i->LAin.Unary.dst = dst; ++ return i; ++} + -+ /* Patch the hole if necessary */ -+ if (!hregIsInvalid(cond)) { -+ vassert(ptmp != NULL); -+ UInt offs = (UInt)(p - ptmp); -+ vassert(offs >= 3 && offs <= 6); -+ /* beq cond, $zero, offs */ -+ *ptmp++ = emit_op_offs16_rj_rd(LAextra_BEQ, offs, iregEnc(cond), 0); -+ } ++LOONGARCH64Instr* LOONGARCH64Instr_Binary ( LOONGARCH64BinOp op, ++ LOONGARCH64RI* src2, ++ HReg src1, HReg dst ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_Bin; ++ i->LAin.Binary.op = op; ++ i->LAin.Binary.src2 = src2; ++ i->LAin.Binary.src1 = src1; ++ i->LAin.Binary.dst = dst; ++ return i; ++} + -+ return p; ++LOONGARCH64Instr* LOONGARCH64Instr_Load ( LOONGARCH64LoadOp op, ++ LOONGARCH64AMode* src, HReg dst ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_Load; ++ i->LAin.Load.op = op; ++ i->LAin.Load.src = src; ++ i->LAin.Load.dst = dst; ++ return i; +} + -+static inline UInt* mkXDirect ( UInt* p, Addr64 dstGA, -+ LOONGARCH64AMode* amPC, -+ HReg cond, Bool toFastEP, -+ const void* disp_cp_chain_me_to_slowEP, -+ const void* disp_cp_chain_me_to_fastEP ) ++LOONGARCH64Instr* LOONGARCH64Instr_Store ( LOONGARCH64StoreOp op, ++ LOONGARCH64AMode* dst, HReg src ) +{ -+ /* NB: what goes on here has to be very closely coordinated -+ with chainXDirect_LOONGARCH64 and unchainXDirect_LOONGARCH64 below. */ -+ /* We're generating chain-me requests here, so we need to be -+ sure this is actually allowed -- no-redir translations -+ can't use chain-me's. Hence: */ -+ vassert(disp_cp_chain_me_to_slowEP != NULL); -+ vassert(disp_cp_chain_me_to_fastEP != NULL); ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_Store; ++ i->LAin.Store.op = op; ++ i->LAin.Store.dst = dst; ++ i->LAin.Store.src = src; ++ return i; ++} + -+ /* Use ptmp for backpatching conditional jumps. */ -+ UInt* ptmp = NULL; ++LOONGARCH64Instr* LOONGARCH64Instr_LLSC ( LOONGARCH64LLSCOp op, Bool isLoad, ++ LOONGARCH64AMode* addr, HReg val ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_LLSC; ++ i->LAin.LLSC.op = op; ++ i->LAin.LLSC.isLoad = isLoad; ++ i->LAin.LLSC.addr = addr; ++ i->LAin.LLSC.val = val; ++ return i; ++} + -+ /* First off, if this is conditional, create a conditional -+ jump over the rest of it. Or at least, leave a space for -+ it that we will shortly fill in. */ -+ if (!hregIsInvalid(cond)) { -+ ptmp = p; -+ p++; -+ } ++LOONGARCH64Instr* LOONGARCH64Instr_Bar ( LOONGARCH64BarOp op, UShort hint ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_Bar; ++ i->LAin.Bar.op = op; ++ i->LAin.Bar.hint = hint; ++ return i; ++} + -+ /* Update the guest PC. -+ $t0 = dstGA -+ st.d $t0, amPC -+ */ -+ p = mkLoadImm(p, hregT0(), (ULong)dstGA); -+ p = mkStore(p, LAstore_ST_D, amPC, hregT0()); ++LOONGARCH64Instr* LOONGARCH64Instr_FpUnary ( LOONGARCH64FpUnOp op, ++ HReg src, HReg dst ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_FpUn; ++ i->LAin.FpUnary.op = op; ++ i->LAin.FpUnary.src = src; ++ i->LAin.FpUnary.dst = dst; ++ return i; ++} + -+ /* --- FIRST PATCHABLE BYTE follows --- */ -+ /* VG_(disp_cp_chain_me_to_{slowEP,fastEP}) (where we're -+ calling to) backs up the return address, so as to find the -+ address of the first patchable byte. So: don't change the -+ number of instructions (5) below. */ -+ /* -+ la $t0, VG_(disp_cp_chain_me_to_{slowEP,fastEP}) -+ jirl $ra, $t0, 0 -+ */ -+ const void* disp_cp_chain_me = toFastEP ? disp_cp_chain_me_to_fastEP -+ : disp_cp_chain_me_to_slowEP; -+ p = mkLoadImm_EXACTLY4(p, hregT0(), (ULong)(Addr)disp_cp_chain_me); -+ *p++ = emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1); -+ /* --- END of PATCHABLE BYTES --- */ ++LOONGARCH64Instr* LOONGARCH64Instr_FpBinary ( LOONGARCH64FpBinOp op, HReg src2, ++ HReg src1, HReg dst ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_FpBin; ++ i->LAin.FpBinary.op = op; ++ i->LAin.FpBinary.src2 = src2; ++ i->LAin.FpBinary.src1 = src1; ++ i->LAin.FpBinary.dst = dst; ++ return i; ++} + -+ /* Fix up the conditional jump, if there was one. */ -+ if (!hregIsInvalid(cond)) { -+ vassert(ptmp != NULL); -+ UInt offs = (UInt)(p - ptmp); -+ vassert(offs >= 8 && offs <= 11); -+ /* beq cond, $zero, offs */ -+ *ptmp++ = emit_op_offs16_rj_rd(LAextra_BEQ, offs, iregEnc(cond), 0); -+ } ++LOONGARCH64Instr* LOONGARCH64Instr_FpTrinary ( LOONGARCH64FpTriOp op, ++ HReg src3, HReg src2, ++ HReg src1, HReg dst ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_FpTri; ++ i->LAin.FpTrinary.op = op; ++ i->LAin.FpTrinary.src3 = src3; ++ i->LAin.FpTrinary.src2 = src2; ++ i->LAin.FpTrinary.src1 = src1; ++ i->LAin.FpTrinary.dst = dst; ++ return i; ++} + -+ return p; ++LOONGARCH64Instr* LOONGARCH64Instr_FpLoad ( LOONGARCH64FpLoadOp op, ++ LOONGARCH64AMode* src, HReg dst ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_FpLoad; ++ i->LAin.FpLoad.op = op; ++ i->LAin.FpLoad.src = src; ++ i->LAin.FpLoad.dst = dst; ++ return i; +} + -+static inline UInt* mkXIndir ( UInt* p, HReg dstGA, LOONGARCH64AMode* amPC, -+ HReg cond, const void* disp_cp_xindir ) ++LOONGARCH64Instr* LOONGARCH64Instr_FpStore ( LOONGARCH64FpStoreOp op, ++ LOONGARCH64AMode* dst, HReg src ) +{ -+ /* We're generating transfers that could lead indirectly to a -+ chain-me, so we need to be sure this is actually allowed -- -+ no-redir translations are not allowed to reach normal -+ translations without going through the scheduler. That means -+ no XDirects or XIndirs out from no-redir translations. -+ Hence: */ -+ vassert(disp_cp_xindir != NULL); ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_FpStore; ++ i->LAin.FpStore.op = op; ++ i->LAin.FpStore.dst = dst; ++ i->LAin.FpStore.src = src; ++ return i; ++} + -+ /* Use ptmp for backpatching conditional jumps. */ -+ UInt* ptmp = NULL; ++LOONGARCH64Instr* LOONGARCH64Instr_FpMove ( LOONGARCH64FpMoveOp op, ++ HReg src, HReg dst ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_FpMove; ++ i->LAin.FpMove.op = op; ++ i->LAin.FpMove.src = src; ++ i->LAin.FpMove.dst = dst; ++ return i; ++} + -+ /* First off, if this is conditional, create a conditional -+ jump over the rest of it. */ -+ if (!hregIsInvalid(cond)) { -+ ptmp = p; -+ p++; -+ } ++LOONGARCH64Instr* LOONGARCH64Instr_FpCmp ( LOONGARCH64FpCmpOp op, HReg src2, ++ HReg src1, HReg dst ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_FpCmp; ++ i->LAin.FpCmp.op = op; ++ i->LAin.FpCmp.src2 = src2; ++ i->LAin.FpCmp.src1 = src1; ++ i->LAin.FpCmp.dst = dst; ++ return i; ++} + -+ /* Update the guest PC. -+ or $t0, dstGA, $zero -+ st.d $t0, amPC -+ */ -+ *p++ = emit_op_rk_rj_rd(LAbin_OR, 0, iregEnc(dstGA), 12); -+ p = mkStore(p, LAstore_ST_D, amPC, hregT0()); ++LOONGARCH64Instr* LOONGARCH64Instr_VecUnary ( LOONGARCH64VecUnOp op, ++ HReg src, HReg dst ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_VecUn; ++ i->LAin.VecUnary.op = op; ++ i->LAin.VecUnary.src = src; ++ i->LAin.VecUnary.dst = dst; ++ return i; ++} + -+ /* -+ la $t0, VG_(disp_cp_xindir) -+ jirl $ra, $t0, 0 -+ */ -+ p = mkLoadImm(p, hregT0(), (ULong)(Addr)disp_cp_xindir); -+ *p++ = emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1); ++LOONGARCH64Instr* LOONGARCH64Instr_VecBinary ( LOONGARCH64VecBinOp op, ++ LOONGARCH64RI* src2, ++ HReg src1, HReg dst ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_VecBin; ++ i->LAin.VecBinary.op = op; ++ i->LAin.VecBinary.src2 = src2; ++ i->LAin.VecBinary.src1 = src1; ++ i->LAin.VecBinary.dst = dst; ++ return i; ++} + -+ /* Fix up the conditional jump, if there was one. */ -+ if (!hregIsInvalid(cond)) { -+ vassert(ptmp != NULL); -+ UInt offs = (UInt)(p - ptmp); -+ vassert(offs >= 5 && offs <= 8); -+ /* beq cond, $zero, offs */ -+ *ptmp++ = emit_op_offs16_rj_rd(LAextra_BEQ, offs, iregEnc(cond), 0); -+ } ++LOONGARCH64Instr* LOONGARCH64Instr_VecLoad ( LOONGARCH64VecLoadOp op, ++ LOONGARCH64AMode* src, HReg dst ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_VecLoad; ++ i->LAin.VecLoad.op = op; ++ i->LAin.VecLoad.src = src; ++ i->LAin.VecLoad.dst = dst; ++ return i; ++} + -+ return p; ++LOONGARCH64Instr* LOONGARCH64Instr_VecStore ( LOONGARCH64VecStoreOp op, ++ LOONGARCH64AMode* dst, HReg src) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_VecStore; ++ i->LAin.VecStore.op = op; ++ i->LAin.VecStore.dst = dst; ++ i->LAin.VecStore.src = src; ++ return i; +} + -+static inline UInt* mkXAssisted ( UInt* p, HReg dstGA, LOONGARCH64AMode* amPC, -+ HReg cond, IRJumpKind jk, -+ const void* disp_cp_xassisted ) ++LOONGARCH64Instr* LOONGARCH64Instr_Cas ( HReg old, HReg addr, HReg expd, ++ HReg data, Bool size64 ) +{ -+ /* First off, if this is conditional, create a conditional jump -+ over the rest of it. Or at least, leave a space for it that -+ we will shortly fill in. */ -+ UInt* ptmp = NULL; -+ if (!hregIsInvalid(cond)) { -+ ptmp = p; -+ p++; -+ } ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_Cas; ++ i->LAin.Cas.old = old; ++ i->LAin.Cas.addr = addr; ++ i->LAin.Cas.expd = expd; ++ i->LAin.Cas.data = data; ++ i->LAin.Cas.size64 = size64; ++ return i; ++} + -+ /* Update the guest PC. -+ or $t0, dstGA, $zero -+ st.d $t0, amPC -+ */ -+ *p++ = emit_op_rk_rj_rd(LAbin_OR, 0, iregEnc(dstGA), 12); -+ p = mkStore(p, LAstore_ST_D, amPC, hregT0()); ++LOONGARCH64Instr* LOONGARCH64Instr_Cmp ( LOONGARCH64CondCode cond, ++ HReg src2, HReg src1, HReg dst ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_Cmp; ++ i->LAin.Cmp.cond = cond; ++ i->LAin.Cmp.src2 = src2; ++ i->LAin.Cmp.src1 = src1; ++ i->LAin.Cmp.dst = dst; ++ return i; ++} + -+ /* li.w $s8, magic_number */ -+ UInt trcval = 0; -+ switch (jk) { -+ case Ijk_Boring: -+ trcval = VEX_TRC_JMP_BORING; -+ break; -+ case Ijk_ClientReq: -+ trcval = VEX_TRC_JMP_CLIENTREQ; -+ break; -+ case Ijk_NoDecode: -+ trcval = VEX_TRC_JMP_NODECODE; -+ break; -+ case Ijk_InvalICache: -+ trcval = VEX_TRC_JMP_INVALICACHE; -+ break; -+ case Ijk_NoRedir: -+ trcval = VEX_TRC_JMP_NOREDIR; -+ break; -+ case Ijk_SigTRAP: -+ trcval = VEX_TRC_JMP_SIGTRAP; -+ break; -+ case Ijk_SigSEGV: -+ trcval = VEX_TRC_JMP_SIGSEGV; -+ break; -+ case Ijk_SigBUS: -+ trcval = VEX_TRC_JMP_SIGBUS; -+ break; -+ case Ijk_SigFPE_IntDiv: -+ trcval = VEX_TRC_JMP_SIGFPE_INTDIV; -+ break; -+ case Ijk_SigFPE_IntOvf: -+ trcval = VEX_TRC_JMP_SIGFPE_INTOVF; -+ break; -+ case Ijk_SigSYS: -+ trcval = VEX_TRC_JMP_SIGSYS; -+ break; -+ case Ijk_Sys_syscall: -+ trcval = VEX_TRC_JMP_SYS_SYSCALL; -+ break; -+ /* We don't expect to see the following being assisted. -+ case Ijk_Call: -+ case Ijk_Ret: -+ case Ijk_Yield: -+ case Ijk_EmWarn: -+ case Ijk_EmFail: -+ case Ijk_MapFail: -+ case Ijk_FlushDCache: -+ case Ijk_SigILL: -+ case Ijk_SigFPE: -+ case Ijk_Sys_int32: -+ case Ijk_Sys_int128: -+ case Ijk_Sys_int129: -+ case Ijk_Sys_int130: -+ case Ijk_Sys_int145: -+ case Ijk_Sys_int210: -+ case Ijk_Sys_sysenter: -+ */ -+ default: -+ ppIRJumpKind(jk); -+ vpanic("emit_LOONGARCH64Instr.LAin_XAssisted: unexpected jump kind"); -+ } -+ vassert(trcval != 0); -+ p = mkLoadImm(p, hregGSP(), trcval); ++LOONGARCH64Instr* LOONGARCH64Instr_CMove ( HReg cond, HReg r0, HReg r1, ++ HReg dst, Bool isInt ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_CMove; ++ i->LAin.CMove.cond = cond; ++ i->LAin.CMove.r0 = r0; ++ i->LAin.CMove.r1 = r1; ++ i->LAin.CMove.dst = dst; ++ i->LAin.CMove.isInt = isInt; ++ return i; ++} + -+ /* -+ la $t0, VG_(disp_cp_xassisted) -+ jirl $ra, $t0, 0 -+ */ -+ p = mkLoadImm(p, hregT0(), (ULong)(Addr)disp_cp_xassisted); -+ *p++ = emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1); ++LOONGARCH64Instr* LOONGARCH64Instr_Call ( HReg cond, Addr64 target, ++ UInt nArgRegs, RetLoc rloc ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_Call; ++ i->LAin.Call.cond = cond; ++ i->LAin.Call.target = target; ++ i->LAin.Call.nArgRegs = nArgRegs; ++ i->LAin.Call.rloc = rloc; ++ return i; ++} + -+ /* Fix up the conditional jump, if there was one. */ ++LOONGARCH64Instr* LOONGARCH64Instr_XDirect ( Addr64 dstGA, ++ LOONGARCH64AMode* amPC, ++ HReg cond, Bool toFastEP ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_XDirect; ++ i->LAin.XDirect.dstGA = dstGA; ++ i->LAin.XDirect.amPC = amPC; ++ i->LAin.XDirect.cond = cond; ++ i->LAin.XDirect.toFastEP = toFastEP; ++ return i; ++} ++ ++LOONGARCH64Instr* LOONGARCH64Instr_XIndir ( HReg dstGA, LOONGARCH64AMode* amPC, ++ HReg cond ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_XIndir; ++ i->LAin.XIndir.dstGA = dstGA; ++ i->LAin.XIndir.amPC = amPC; ++ i->LAin.XIndir.cond = cond; ++ return i; ++} ++ ++LOONGARCH64Instr* LOONGARCH64Instr_XAssisted ( HReg dstGA, ++ LOONGARCH64AMode* amPC, ++ HReg cond, IRJumpKind jk ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_XAssisted; ++ i->LAin.XAssisted.dstGA = dstGA; ++ i->LAin.XAssisted.amPC = amPC; ++ i->LAin.XAssisted.cond = cond; ++ i->LAin.XAssisted.jk = jk; ++ return i; ++} ++ ++LOONGARCH64Instr* LOONGARCH64Instr_EvCheck ( LOONGARCH64AMode* amCounter, ++ LOONGARCH64AMode* amFailAddr ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_EvCheck; ++ i->LAin.EvCheck.amCounter = amCounter; ++ i->LAin.EvCheck.amFailAddr = amFailAddr; ++ return i; ++} ++ ++LOONGARCH64Instr* LOONGARCH64Instr_ProfInc ( void ) ++{ ++ LOONGARCH64Instr* i = LibVEX_Alloc_inline(sizeof(LOONGARCH64Instr)); ++ i->tag = LAin_ProfInc; ++ return i; ++} ++ ++ ++/* -------- Pretty Print instructions ------------- */ ++ ++static inline void ppLI ( ULong imm, HReg dst ) ++{ ++ vex_printf("li "); ++ ppHRegLOONGARCH64(dst); ++ vex_printf(", 0x%llx", imm); ++} ++ ++static inline void ppUnary ( LOONGARCH64UnOp op, HReg src, HReg dst ) ++{ ++ vex_printf("%s ", showLOONGARCH64UnOp(op)); ++ ppHRegLOONGARCH64(dst); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(src); ++} ++ ++static inline void ppBinary ( LOONGARCH64BinOp op, LOONGARCH64RI* src2, ++ HReg src1, HReg dst ) ++{ ++ vex_printf("%s ", showLOONGARCH64BinOp(op)); ++ ppHRegLOONGARCH64(dst); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(src1); ++ vex_printf(", "); ++ ppLOONGARCH64RI(src2); ++} ++ ++static inline void ppLoad ( LOONGARCH64LoadOp op, LOONGARCH64AMode* src, ++ HReg dst ) ++{ ++ vex_printf("%s ", showLOONGARCH64LoadOp(op)); ++ ppHRegLOONGARCH64(dst); ++ vex_printf(", "); ++ ppLOONGARCH64AMode(src); ++} ++ ++static inline void ppStore ( LOONGARCH64StoreOp op, LOONGARCH64AMode* dst, ++ HReg src ) ++{ ++ vex_printf("%s ", showLOONGARCH64StoreOp(op)); ++ ppHRegLOONGARCH64(src); ++ vex_printf(", "); ++ ppLOONGARCH64AMode(dst); ++} ++ ++static inline void ppLLSC ( LOONGARCH64LLSCOp op, LOONGARCH64AMode* addr, ++ HReg val ) ++{ ++ vex_printf("%s ", showLOONGARCH64LLSCOp(op)); ++ ppHRegLOONGARCH64(val); ++ vex_printf(", "); ++ ppLOONGARCH64AMode(addr); ++} ++ ++static inline void ppBar ( LOONGARCH64BarOp op, UShort hint ) ++{ ++ vex_printf("%s %u", showLOONGARCH64BarOp(op), (UInt)hint); ++} ++ ++static inline void ppFpUnary ( LOONGARCH64FpUnOp op, HReg src, HReg dst ) ++{ ++ vex_printf("%s ", showLOONGARCH64FpUnOp(op)); ++ ppHRegLOONGARCH64(dst); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(src); ++} ++ ++static inline void ppFpBinary ( LOONGARCH64FpBinOp op, HReg src2, ++ HReg src1, HReg dst ) ++{ ++ vex_printf("%s ", showLOONGARCH64FpBinOp(op)); ++ ppHRegLOONGARCH64(dst); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(src1); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(src2); ++} ++ ++static inline void ppFpTrinary ( LOONGARCH64FpTriOp op, HReg src3, ++ HReg src2, HReg src1, HReg dst ) ++{ ++ vex_printf("%s ", showLOONGARCH64FpTriOp(op)); ++ ppHRegLOONGARCH64(dst); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(src1); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(src2); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(src3); ++} ++ ++static inline void ppFpLoad ( LOONGARCH64FpLoadOp op, LOONGARCH64AMode* src, ++ HReg dst ) ++{ ++ vex_printf("%s ", showLOONGARCH64FpLoadOp(op)); ++ ppHRegLOONGARCH64(dst); ++ vex_printf(", "); ++ ppLOONGARCH64AMode(src); ++} ++ ++static inline void ppFpStore ( LOONGARCH64FpStoreOp op, LOONGARCH64AMode* dst, ++ HReg src ) ++{ ++ vex_printf("%s ", showLOONGARCH64FpStoreOp(op)); ++ ppHRegLOONGARCH64(src); ++ vex_printf(", "); ++ ppLOONGARCH64AMode(dst); ++} ++ ++static inline void ppFpMove ( LOONGARCH64FpMoveOp op, HReg src, HReg dst ) ++{ ++ vex_printf("%s ", showLOONGARCH64FpMoveOp(op)); ++ ppHRegLOONGARCH64(dst); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(src); ++} ++ ++static inline void ppFpCmp ( LOONGARCH64FpCmpOp op, HReg src2, ++ HReg src1, HReg dst ) ++{ ++ vex_printf("%s ", showLOONGARCH64FpCmpOp(op)); ++ vex_printf("$fcc0, "); ++ ppHRegLOONGARCH64(src1); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(src2); ++ vex_printf("; movcf2gr "); ++ ppHRegLOONGARCH64(dst); ++ vex_printf(", $fcc0"); ++} ++ ++static inline void ppVecUnary ( LOONGARCH64VecUnOp op, HReg src, HReg dst ) ++{ ++ vex_printf("%s ", showLOONGARCH64VecUnOp(op)); ++ ppHRegLOONGARCH64(dst); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(src); ++} ++ ++static inline void ppVecBinary ( LOONGARCH64VecBinOp op, LOONGARCH64RI* src2, ++ HReg src1, HReg dst ) ++{ ++ vex_printf("%s ", showLOONGARCH64VecBinOp(op)); ++ ppHRegLOONGARCH64(dst); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(src1); ++ vex_printf(", "); ++ ppLOONGARCH64RI(src2); ++} ++ ++static inline void ppVecLoad ( LOONGARCH64VecLoadOp op, LOONGARCH64AMode* src, ++ HReg dst ) ++{ ++ vex_printf("%s ", showLOONGARCH64VecLoadOp(op)); ++ ppHRegLOONGARCH64(dst); ++ vex_printf(", "); ++ ppLOONGARCH64AMode(src); ++} ++ ++static inline void ppVecStore ( LOONGARCH64VecStoreOp op, LOONGARCH64AMode* dst, ++ HReg src ) ++{ ++ vex_printf("%s ", showLOONGARCH64VecStoreOp(op)); ++ ppHRegLOONGARCH64(src); ++ vex_printf(", "); ++ ppLOONGARCH64AMode(dst); ++} ++ ++static inline void ppCas ( HReg old, HReg addr, HReg expd, ++ HReg data, Bool size64) ++{ ++ ppHRegLOONGARCH64(old); ++ vex_printf(" = cas(%dbit)(", size64 ? 64 : 32); ++ ppHRegLOONGARCH64(expd); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(data); ++ vex_printf(" -> "); ++ ppHRegLOONGARCH64(addr); ++ vex_printf(")"); ++} ++ ++static inline void ppCmp ( LOONGARCH64CondCode cond, HReg src2, ++ HReg src1, HReg dst ) ++{ ++ ppHRegLOONGARCH64(dst); ++ vex_printf(" = cmp%s(", showLOONGARCH64CondCode(cond)); ++ ppHRegLOONGARCH64(src1); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(src2); ++ vex_printf(")"); ++} ++ ++static inline void ppCMove ( HReg cond, HReg r0, HReg r1, ++ HReg dst, Bool isInt ) ++{ ++ if (isInt) { ++ vex_printf("masknez $t0, "); ++ ppHRegLOONGARCH64(r0); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(cond); ++ vex_printf("; maskeqz "); ++ ppHRegLOONGARCH64(dst); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(r1); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(cond); ++ vex_printf("; or "); ++ ppHRegLOONGARCH64(dst); ++ vex_printf(", $t0, "); ++ ppHRegLOONGARCH64(dst); ++ } else { ++ vex_printf("movgr2cf "); ++ ppHRegLOONGARCH64(cond); ++ vex_printf(", $fcc0; fsel "); ++ ppHRegLOONGARCH64(dst); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(r0); ++ vex_printf(", "); ++ ppHRegLOONGARCH64(r1); ++ vex_printf(", $fcc0"); ++ } ++} ++ ++static inline void ppCall ( HReg cond, Addr64 target, ++ UInt nArgRegs, RetLoc rloc ) ++{ + if (!hregIsInvalid(cond)) { -+ vassert(ptmp != NULL); -+ UInt offs = (UInt)(p - ptmp); -+ vassert(offs >= 6 && offs <= 12); -+ /* beq cond, $zero, offs */ -+ *ptmp++ = emit_op_offs16_rj_rd(LAextra_BEQ, offs, iregEnc(cond), 0); ++ vex_printf("if ("); ++ ppHRegLOONGARCH64(cond); ++ vex_printf(") { "); + } ++ vex_printf("call 0x%llx [nArgRegs=%u, ", target, nArgRegs); ++ ppRetLoc(rloc); ++ vex_printf("]"); ++ if (!hregIsInvalid(cond)) ++ vex_printf(" }"); ++} + -+ return p; ++static inline void ppXDirect ( Addr64 dstGA, LOONGARCH64AMode* amPC, ++ HReg cond, Bool toFastEP ) ++{ ++ vex_printf("(xDirect) "); ++ if (!hregIsInvalid(cond)) { ++ vex_printf("if ("); ++ ppHRegLOONGARCH64(cond); ++ vex_printf(") { "); ++ } ++ vex_printf("li $t0, 0x%llx; ", (ULong)dstGA); ++ vex_printf("st.w $t0, "); ++ ppLOONGARCH64AMode(amPC); ++ vex_printf("; li $t0, $disp_cp_chain_me_to_%sEP; ", ++ toFastEP ? "fast" : "slow"); ++ vex_printf("jirl $ra, $t0, 0"); ++ if (!hregIsInvalid(cond)) ++ vex_printf(" }"); +} + -+static inline UInt* mkEvCheck ( UInt* p, LOONGARCH64AMode* amCounter, -+ LOONGARCH64AMode* amFailAddr ) ++static inline void ppXIndir ( HReg dstGA, LOONGARCH64AMode* amPC, ++ HReg cond ) +{ -+ UInt* p0 = p; ++ vex_printf("(xIndir) "); ++ if (!hregIsInvalid(cond)) { ++ vex_printf("if ("); ++ ppHRegLOONGARCH64(cond); ++ vex_printf(") { "); ++ } ++ vex_printf("st.w "); ++ ppHRegLOONGARCH64(dstGA); ++ vex_printf(", "); ++ ppLOONGARCH64AMode(amPC); ++ vex_printf("; la $t0, disp_indir; "); ++ vex_printf("jirl $ra, $t0, 0"); ++ if (!hregIsInvalid(cond)) ++ vex_printf(" }"); ++} + -+ /* -+ ld.w $t0, amCounter -+ addi.d $t0, $t0, -1 -+ st.w $t0, amCounter -+ bge $t0, $zero, nofail -+ ld.d $t0, amFailAddr -+ jirl $ra, $t0, 0 -+ nofail: -+ */ -+ p = mkLoad(p, LAload_LD_W, amCounter, hregT0()); -+ *p++ = emit_op_si12_rj_rd(LAbin_ADDI_D, -1 & 0xfff, 12, 12); -+ p = mkStore(p, LAstore_ST_W, amCounter, hregT0()); -+ *p++ = emit_op_offs16_rj_rd(LAextra_BGE, 3, 12, 0); -+ p = mkLoad(p, LAload_LD_W, amFailAddr, hregT0()); -+ *p++ = emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1); ++static inline void ppXAssisted ( HReg dstGA, LOONGARCH64AMode* amPC, ++ HReg cond, IRJumpKind jk) ++{ ++ vex_printf("(xAssisted) "); ++ if (!hregIsInvalid(cond)) { ++ vex_printf("if ("); ++ ppHRegLOONGARCH64(cond); ++ vex_printf(") { "); ++ } ++ vex_printf("st.w "); ++ ppHRegLOONGARCH64(dstGA); ++ vex_printf(", "); ++ ppLOONGARCH64AMode(amPC); ++ vex_printf("; li.w $s8, IRJumpKind_to_TRCVAL(%d); ", (Int)jk); ++ vex_printf("la $t0, disp_assisted; "); ++ vex_printf("jirl $ra, $t0, 0"); ++ if (!hregIsInvalid(cond)) ++ vex_printf(" }"); ++} + -+ /* Crosscheck */ -+ vassert(evCheckSzB_LOONGARCH64() == (UChar*)p - (UChar*)p0); -+ return p; ++static inline void ppEvCheck ( LOONGARCH64AMode* amCounter, ++ LOONGARCH64AMode* amFailAddr ) ++{ ++ vex_printf("(evCheck) "); ++ vex_printf("ld.w $t0, "); ++ ppLOONGARCH64AMode(amCounter); ++ vex_printf("; addi.d $t0, $t0, -1; "); ++ vex_printf("st.w $t0, "); ++ ppLOONGARCH64AMode(amCounter); ++ vex_printf("; bge $t0, $zero, nofail; "); ++ vex_printf("ld.d $t0, "); ++ ppLOONGARCH64AMode(amFailAddr); ++ vex_printf("; jirl $ra, $t0, 0"); ++ vex_printf("; nofail:"); +} + -+static inline UInt* mkProfInc ( UInt* p ) ++static inline void ppProfInc ( void ) +{ -+ /* -+ li $t0, 0x6555755585559555UL -+ ld.d $t1, $t0, 0 -+ addi.d $t1, $t1, 1 -+ st.d $t1, $t0, 0 -+ */ -+ p = mkLoadImm_EXACTLY4(p, hregT0(), 0x6555755585559555UL); -+ *p++ = emit_op_si12_rj_rd(LAload_LD_D, 0, 12, 13); -+ *p++ = emit_op_si12_rj_rd(LAbin_ADDI_D, 1, 13, 13); -+ *p++ = emit_op_si12_rj_rd(LAstore_ST_D, 0, 12, 13); -+ return p; ++ vex_printf("(profInc) "); ++ vex_printf("li $t0, NotKnownYet; "); ++ vex_printf("ld.d $t1, $t0, 0; "); ++ vex_printf("addi.d $t1, $t1, 1; "); ++ vex_printf("st.d $t1, $t0, 0;"); +} + -+/* Emit an instruction into buf and return the number of bytes used. -+ Note that buf is not the insn's final place, and therefore it is -+ imperative to emit position-independent code. If the emitted -+ instruction was a profiler inc, set *is_profInc to True, else -+ leave it unchanged. */ -+Int emit_LOONGARCH64Instr ( /*MB_MOD*/Bool* is_profInc, -+ UChar* buf, -+ Int nbuf, -+ const LOONGARCH64Instr* i, -+ Bool mode64, -+ VexEndness endness_host, -+ const void* disp_cp_chain_me_to_slowEP, -+ const void* disp_cp_chain_me_to_fastEP, -+ const void* disp_cp_xindir, -+ const void* disp_cp_xassisted ) ++void ppLOONGARCH64Instr ( const LOONGARCH64Instr* i, Bool mode64 ) +{ + vassert(mode64 == True); -+ -+ UInt* p = (UInt*)buf; -+ vassert(nbuf >= 32); -+ vassert((((HWord)buf) & 3) == 0); -+ + switch (i->tag) { + case LAin_LI: -+ p = mkLoadImm(p, i->LAin.LI.dst, i->LAin.LI.imm); ++ ppLI(i->LAin.LI.imm, i->LAin.LI.dst); + break; + case LAin_Un: -+ p = mkUnary(p, i->LAin.Unary.op, i->LAin.Unary.src, -+ i->LAin.Unary.dst); ++ ppUnary(i->LAin.Unary.op, i->LAin.Unary.src, i->LAin.Unary.dst); + break; + case LAin_Bin: -+ p = mkBinary(p, i->LAin.Binary.op, i->LAin.Binary.src2, -+ i->LAin.Binary.src1, i->LAin.Binary.dst); ++ ppBinary(i->LAin.Binary.op, i->LAin.Binary.src2, ++ i->LAin.Binary.src1, i->LAin.Binary.dst); + break; + case LAin_Load: -+ p = mkLoad(p, i->LAin.Load.op, i->LAin.Load.src, -+ i->LAin.Load.dst); ++ ppLoad(i->LAin.Load.op, i->LAin.Load.src, i->LAin.Load.dst); + break; + case LAin_Store: -+ p = mkStore(p, i->LAin.Store.op, i->LAin.Store.dst, -+ i->LAin.Store.src); ++ ppStore(i->LAin.Store.op, i->LAin.Store.dst, i->LAin.Store.src); + break; + case LAin_LLSC: -+ p = mkLLSC(p, i->LAin.LLSC.op, i->LAin.LLSC.addr, i->LAin.LLSC.val); ++ ppLLSC(i->LAin.LLSC.op, i->LAin.LLSC.addr, i->LAin.LLSC.val); + break; + case LAin_Bar: -+ p = mkBar(p, i->LAin.Bar.op, i->LAin.Bar.hint); ++ ppBar(i->LAin.Bar.op, i->LAin.Bar.hint); + break; + case LAin_FpUn: -+ p = mkFpUnary(p, i->LAin.FpUnary.op, i->LAin.FpUnary.src, -+ i->LAin.FpUnary.dst); ++ ppFpUnary(i->LAin.FpUnary.op, i->LAin.FpUnary.src, ++ i->LAin.FpUnary.dst); + break; + case LAin_FpBin: -+ p = mkFpBinary(p, i->LAin.FpBinary.op, i->LAin.FpBinary.src2, -+ i->LAin.FpBinary.src1, i->LAin.FpBinary.dst); ++ ppFpBinary(i->LAin.FpBinary.op, i->LAin.FpBinary.src2, ++ i->LAin.FpBinary.src1, i->LAin.FpBinary.dst); + break; + case LAin_FpTri: -+ p = mkFpTrinary(p, i->LAin.FpTrinary.op, i->LAin.FpTrinary.src3, -+ i->LAin.FpTrinary.src2, i->LAin.FpTrinary.src1, -+ i->LAin.FpTrinary.dst); ++ ppFpTrinary(i->LAin.FpTrinary.op, i->LAin.FpTrinary.src3, ++ i->LAin.FpTrinary.src2, i->LAin.FpTrinary.src1, ++ i->LAin.FpTrinary.dst); + break; + case LAin_FpLoad: -+ p = mkFpLoad(p, i->LAin.FpLoad.op, i->LAin.FpLoad.src, -+ i->LAin.FpLoad.dst); ++ ppFpLoad(i->LAin.FpLoad.op, i->LAin.FpLoad.src, i->LAin.FpLoad.dst); + break; + case LAin_FpStore: -+ p = mkFpStore(p, i->LAin.FpStore.op, i->LAin.FpStore.dst, -+ i->LAin.FpStore.src); ++ ppFpStore(i->LAin.FpStore.op, i->LAin.FpStore.dst, ++ i->LAin.FpStore.src); + break; + case LAin_FpMove: -+ p = mkFpMove(p, i->LAin.FpMove.op, i->LAin.FpMove.src, -+ i->LAin.FpMove.dst); ++ ppFpMove(i->LAin.FpMove.op, i->LAin.FpMove.src, ++ i->LAin.FpMove.dst); + break; + case LAin_FpCmp: -+ p = mkFpCmp(p, i->LAin.FpCmp.op, i->LAin.FpCmp.src2, -+ i->LAin.FpCmp.src1, i->LAin.FpCmp.dst); ++ ppFpCmp(i->LAin.FpCmp.op, i->LAin.FpCmp.src2, ++ i->LAin.FpCmp.src1, i->LAin.FpCmp.dst); + break; -+ case LAin_Cas: -+ p = mkCas(p, i->LAin.Cas.old, i->LAin.Cas.addr, i->LAin.Cas.expd, -+ i->LAin.Cas.data, i->LAin.Cas.size64); ++ case LAin_VecUn: ++ ppVecUnary(i->LAin.VecUnary.op, i->LAin.VecUnary.src, ++ i->LAin.VecUnary.dst); + break; -+ case LAin_Cmp: -+ p = mkCmp(p, i->LAin.Cmp.cond, i->LAin.Cmp.src2, -+ i->LAin.Cmp.src1, i->LAin.Cmp.dst); ++ case LAin_VecBin: ++ ppVecBinary(i->LAin.VecBinary.op, i->LAin.VecBinary.src2, ++ i->LAin.VecBinary.src1, i->LAin.VecBinary.dst); ++ break; ++ case LAin_VecLoad: ++ ppVecLoad(i->LAin.VecLoad.op, i->LAin.VecLoad.src, ++ i->LAin.VecLoad.dst); ++ break; ++ case LAin_VecStore: ++ ppVecStore(i->LAin.VecStore.op, i->LAin.VecStore.dst, ++ i->LAin.VecStore.src); ++ break; ++ case LAin_Cas: ++ ppCas(i->LAin.Cas.old, i->LAin.Cas.addr, i->LAin.Cas.expd, ++ i->LAin.Cas.data, i->LAin.Cas.size64); ++ break; ++ case LAin_Cmp: ++ ppCmp(i->LAin.Cmp.cond, i->LAin.Cmp.src2, ++ i->LAin.Cmp.src1, i->LAin.Cmp.dst); + break; + case LAin_CMove: -+ p = mkCMove(p, i->LAin.CMove.cond, i->LAin.CMove.r0, -+ i->LAin.CMove.r1, i->LAin.CMove.dst, -+ i->LAin.CMove.isInt); ++ ppCMove(i->LAin.CMove.cond, i->LAin.CMove.r0, ++ i->LAin.CMove.r1, i->LAin.CMove.dst, ++ i->LAin.CMove.isInt); + break; + case LAin_Call: -+ p = mkCall(p, i->LAin.Call.cond, i->LAin.Call.target, -+ i->LAin.Call.rloc); ++ ppCall(i->LAin.Call.cond, i->LAin.Call.target, ++ i->LAin.Call.nArgRegs, i->LAin.Call.rloc); + break; + case LAin_XDirect: -+ p = mkXDirect(p, i->LAin.XDirect.dstGA, i->LAin.XDirect.amPC, -+ i->LAin.XDirect.cond, i->LAin.XDirect.toFastEP, -+ disp_cp_chain_me_to_slowEP, -+ disp_cp_chain_me_to_fastEP); ++ ppXDirect(i->LAin.XDirect.dstGA, i->LAin.XDirect.amPC, ++ i->LAin.XDirect.cond, i->LAin.XDirect.toFastEP); + break; + case LAin_XIndir: -+ p = mkXIndir(p, i->LAin.XIndir.dstGA, i->LAin.XIndir.amPC, -+ i->LAin.XIndir.cond, disp_cp_xindir); ++ ppXIndir(i->LAin.XIndir.dstGA, i->LAin.XIndir.amPC, ++ i->LAin.XIndir.cond); + break; + case LAin_XAssisted: -+ p = mkXAssisted(p, i->LAin.XAssisted.dstGA, i->LAin.XAssisted.amPC, -+ i->LAin.XAssisted.cond, i->LAin.XAssisted.jk, -+ disp_cp_xassisted); ++ ppXAssisted(i->LAin.XAssisted.dstGA, i->LAin.XAssisted.amPC, ++ i->LAin.XAssisted.cond, i->LAin.XAssisted.jk); + break; + case LAin_EvCheck: -+ p = mkEvCheck(p, i->LAin.EvCheck.amCounter, -+ i->LAin.EvCheck.amFailAddr); ++ ppEvCheck(i->LAin.EvCheck.amCounter, i->LAin.EvCheck.amFailAddr); + break; + case LAin_ProfInc: -+ p = mkProfInc(p); ++ ppProfInc(); + break; + default: -+ p = NULL; ++ vpanic("ppLOONGARCH64Instr"); + break; + } ++} + -+ if (p == NULL) { -+ ppLOONGARCH64Instr(i, True); -+ vpanic("emit_LOONGARCH64Instr"); -+ /*NOTREACHED*/ -+ } + -+ vassert(((UChar*)p) - &buf[0] <= 48); -+ return ((UChar*)p) - &buf[0]; -+} ++/* --------- Helpers for register allocation. --------- */ + -+/* How big is an event check? See case for mkEvCheck just above. That -+ crosschecks what this returns, so we can tell if we're inconsistent. */ -+Int evCheckSzB_LOONGARCH64 ( void ) ++void getRegUsage_LOONGARCH64Instr ( HRegUsage* u, const LOONGARCH64Instr* i, ++ Bool mode64 ) +{ -+ return 6 * 4; // 6 insns ++ vassert(mode64 == True); ++ initHRegUsage(u); ++ switch (i->tag) { ++ case LAin_LI: ++ addHRegUse(u, HRmWrite, i->LAin.LI.dst); ++ break; ++ case LAin_Un: ++ addHRegUse(u, HRmRead, i->LAin.Unary.src); ++ addHRegUse(u, HRmWrite, i->LAin.Unary.dst); ++ break; ++ case LAin_Bin: ++ addRegUsage_LOONGARCH64RI(u, i->LAin.Binary.src2); ++ addHRegUse(u, HRmRead, i->LAin.Binary.src1); ++ addHRegUse(u, HRmWrite, i->LAin.Binary.dst); ++ break; ++ case LAin_Load: ++ addRegUsage_LOONGARCH64AMode(u, i->LAin.Load.src); ++ addHRegUse(u, HRmWrite, i->LAin.Load.dst); ++ break; ++ case LAin_Store: ++ addRegUsage_LOONGARCH64AMode(u, i->LAin.Store.dst); ++ addHRegUse(u, HRmRead, i->LAin.Store.src); ++ break; ++ case LAin_LLSC: ++ addRegUsage_LOONGARCH64AMode(u, i->LAin.LLSC.addr); ++ if (i->LAin.LLSC.isLoad) ++ addHRegUse(u, HRmWrite, i->LAin.LLSC.val); ++ else ++ addHRegUse(u, HRmRead, i->LAin.LLSC.val); ++ break; ++ case LAin_Bar: ++ /* No regs. */ ++ break; ++ case LAin_FpUn: ++ addHRegUse(u, HRmRead, i->LAin.FpUnary.src); ++ addHRegUse(u, HRmWrite, i->LAin.FpUnary.dst); ++ break; ++ case LAin_FpBin: ++ addHRegUse(u, HRmRead, i->LAin.FpBinary.src2); ++ addHRegUse(u, HRmRead, i->LAin.FpBinary.src1); ++ addHRegUse(u, HRmWrite, i->LAin.FpBinary.dst); ++ break; ++ case LAin_FpTri: ++ addHRegUse(u, HRmRead, i->LAin.FpTrinary.src3); ++ addHRegUse(u, HRmRead, i->LAin.FpTrinary.src2); ++ addHRegUse(u, HRmRead, i->LAin.FpTrinary.src1); ++ addHRegUse(u, HRmWrite, i->LAin.FpTrinary.dst); ++ break; ++ case LAin_FpLoad: ++ addRegUsage_LOONGARCH64AMode(u, i->LAin.FpLoad.src); ++ addHRegUse(u, HRmWrite, i->LAin.FpLoad.dst); ++ break; ++ case LAin_FpStore: ++ addRegUsage_LOONGARCH64AMode(u, i->LAin.FpStore.dst); ++ addHRegUse(u, HRmRead, i->LAin.FpStore.src); ++ break; ++ case LAin_FpMove: ++ addHRegUse(u, HRmRead, i->LAin.FpMove.src); ++ addHRegUse(u, HRmWrite, i->LAin.FpMove.dst); ++ break; ++ case LAin_FpCmp: ++ addHRegUse(u, HRmRead, i->LAin.FpCmp.src2); ++ addHRegUse(u, HRmRead, i->LAin.FpCmp.src1); ++ addHRegUse(u, HRmWrite, i->LAin.FpCmp.dst); ++ break; ++ case LAin_VecUn: ++ addHRegUse(u, HRmRead, i->LAin.VecUnary.src); ++ addHRegUse(u, HRmWrite, i->LAin.VecUnary.dst); ++ break; ++ case LAin_VecBin: ++ addRegUsage_LOONGARCH64RI(u, i->LAin.VecBinary.src2); ++ addHRegUse(u, HRmRead, i->LAin.VecBinary.src1); ++ addHRegUse(u, HRmWrite, i->LAin.VecBinary.dst); ++ break; ++ case LAin_VecLoad: ++ addRegUsage_LOONGARCH64AMode(u, i->LAin.VecLoad.src); ++ addHRegUse(u, HRmWrite, i->LAin.VecLoad.dst); ++ break; ++ case LAin_VecStore: ++ addRegUsage_LOONGARCH64AMode(u, i->LAin.VecStore.dst); ++ addHRegUse(u, HRmRead, i->LAin.VecStore.src); ++ break; ++ case LAin_Cas: ++ addHRegUse(u, HRmWrite, i->LAin.Cas.old); ++ addHRegUse(u, HRmRead, i->LAin.Cas.addr); ++ addHRegUse(u, HRmRead, i->LAin.Cas.expd); ++ addHRegUse(u, HRmModify, i->LAin.Cas.data); ++ break; ++ case LAin_Cmp: ++ addHRegUse(u, HRmRead, i->LAin.Cmp.src2); ++ addHRegUse(u, HRmRead, i->LAin.Cmp.src1); ++ addHRegUse(u, HRmWrite, i->LAin.Cmp.dst); ++ break; ++ case LAin_CMove: ++ addHRegUse(u, HRmRead, i->LAin.CMove.cond); ++ addHRegUse(u, HRmRead, i->LAin.CMove.r0); ++ addHRegUse(u, HRmRead, i->LAin.CMove.r1); ++ addHRegUse(u, HRmWrite, i->LAin.CMove.dst); ++ break; ++ case LAin_Call: ++ /* logic and comments copied/modified from mips and arm64 back end */ ++ /* This is a bit subtle. */ ++ /* First off, we need to consider the cond register. */ ++ if (!hregIsInvalid(i->LAin.Call.cond)) ++ addHRegUse(u, HRmRead, i->LAin.Call.cond); ++ /* Then, claim it trashes all the caller-saved regs ++ which fall within the register allocator's jurisdiction. */ ++ addHRegUse(u, HRmWrite, hregLOONGARCH64_R14()); ++ addHRegUse(u, HRmWrite, hregLOONGARCH64_R15()); ++ addHRegUse(u, HRmWrite, hregLOONGARCH64_R16()); ++ addHRegUse(u, HRmWrite, hregLOONGARCH64_R17()); ++ addHRegUse(u, HRmWrite, hregLOONGARCH64_R18()); ++ addHRegUse(u, HRmWrite, hregLOONGARCH64_R19()); ++ addHRegUse(u, HRmWrite, hregLOONGARCH64_R20()); ++ /* Now we have to state any parameter-carrying registers ++ which might be read. This depends on nArgRegs. */ ++ switch (i->LAin.Call.nArgRegs) { ++ case 8: addHRegUse(u, HRmRead, hregLOONGARCH64_R11()); /* fallthrough */ ++ case 7: addHRegUse(u, HRmRead, hregLOONGARCH64_R10()); /* fallthrough */ ++ case 6: addHRegUse(u, HRmRead, hregLOONGARCH64_R9()); /* fallthrough */ ++ case 5: addHRegUse(u, HRmRead, hregLOONGARCH64_R8()); /* fallthrough */ ++ case 4: addHRegUse(u, HRmRead, hregLOONGARCH64_R7()); /* fallthrough */ ++ case 3: addHRegUse(u, HRmRead, hregLOONGARCH64_R6()); /* fallthrough */ ++ case 2: addHRegUse(u, HRmRead, hregLOONGARCH64_R5()); /* fallthrough */ ++ case 1: addHRegUse(u, HRmRead, hregLOONGARCH64_R4()); /* fallthrough */ ++ case 0: break; ++ default: vpanic("getRegUsage_LOONGARCH64:Call:regparms"); break; ++ } ++ /* Finally, there is the issue that the insn trashes a ++ register because the literal target address has to be ++ loaded into a register. However, we reserve $t0 for that ++ purpose so there's no further complexity here. Stating $t0 ++ as trashed is pointless since it's not under the control ++ of the allocator, but what the hell. */ ++ addHRegUse(u, HRmWrite, hregT0()); ++ break; ++ /* XDirect/XIndir/XAssisted are also a bit subtle. They ++ conditionally exit the block. Hence we only need to list (1) ++ the registers that they read, and (2) the registers that they ++ write in the case where the block is not exited. (2) is ++ empty, hence only (1) is relevant here. */ ++ case LAin_XDirect: ++ addRegUsage_LOONGARCH64AMode(u, i->LAin.XDirect.amPC); ++ if (!hregIsInvalid(i->LAin.XDirect.cond)) ++ addHRegUse(u, HRmRead, i->LAin.XDirect.cond); ++ addHRegUse(u, HRmWrite, hregT0()); /* unavail to RA */ ++ break; ++ case LAin_XIndir: ++ addHRegUse(u, HRmRead, i->LAin.XIndir.dstGA); ++ addRegUsage_LOONGARCH64AMode(u, i->LAin.XIndir.amPC); ++ if (!hregIsInvalid(i->LAin.XIndir.cond)) ++ addHRegUse(u, HRmRead, i->LAin.XIndir.cond); ++ addHRegUse(u, HRmWrite, hregT0()); /* unavail to RA */ ++ break; ++ case LAin_XAssisted: ++ addHRegUse(u, HRmRead, i->LAin.XAssisted.dstGA); ++ addRegUsage_LOONGARCH64AMode(u, i->LAin.XAssisted.amPC); ++ if (!hregIsInvalid(i->LAin.XAssisted.cond)) ++ addHRegUse(u, HRmRead, i->LAin.XAssisted.cond); ++ addHRegUse(u, HRmWrite, hregT0()); /* unavail to RA */ ++ break; ++ case LAin_EvCheck: ++ /* We expect both amodes only to mention $r31, so this is in ++ fact pointless, since $r31 isn't allocatable, but anyway.. */ ++ addRegUsage_LOONGARCH64AMode(u, i->LAin.EvCheck.amCounter); ++ addRegUsage_LOONGARCH64AMode(u, i->LAin.EvCheck.amFailAddr); ++ addHRegUse(u, HRmWrite, hregT0()); /* unavail to RA */ ++ break; ++ case LAin_ProfInc: ++ /* Again, pointless to actually state these since neither ++ is available to RA. */ ++ addHRegUse(u, HRmWrite, hregT0()); /* unavail to RA */ ++ addHRegUse(u, HRmWrite, hregT1()); /* unavail to RA */ ++ break; ++ default: ++ ppLOONGARCH64Instr(i, mode64); ++ vpanic("getRegUsage_LOONGARCH64Instr"); ++ break; ++ } +} + -+/* NB: what goes on here has to be very closely coordinated with the -+ emitInstr case for XDirect, above. */ -+VexInvalRange chainXDirect_LOONGARCH64 ( VexEndness endness_host, -+ void* place_to_chain, -+ const void* disp_cp_chain_me_EXPECTED, -+ const void* place_to_jump_to ) ++void mapRegs_LOONGARCH64Instr ( HRegRemap* m, LOONGARCH64Instr* i, ++ Bool mode64 ) +{ -+ vassert(endness_host == VexEndnessLE); -+ -+ /* What we're expecting to see is: -+ * la $t0, disp_cp_chain_me_to_EXPECTED -+ * jirl $ra, $t0, 0 -+ * viz -+ * <16 bytes generated by mkLoadImm_EXACTLY4> -+ * jirl $ra, $t0, 0 -+ */ -+ UInt* p = (UInt*)place_to_chain; -+ vassert(((HWord)p & 3) == 0); -+ vassert(is_LoadImm_EXACTLY4(p, hregT0(), (ULong)(Addr)disp_cp_chain_me_EXPECTED)); -+ vassert(p[4] == emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1)); -+ -+ /* And what we want to change it to is: -+ * la $t0, place_to_jump_to -+ * jirl $ra, $t0, 0 -+ * viz -+ * <16 bytes generated by mkLoadImm_EXACTLY4> -+ * jirl $ra, $t0, 0 -+ * -+ * The replacement has the same length as the original. -+ */ -+ p = mkLoadImm_EXACTLY4(p, hregT0(), (ULong)(Addr)place_to_jump_to); -+ *p++ = emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1); -+ -+ VexInvalRange vir = { (HWord)place_to_chain, 4 * 4 + 4 }; -+ return vir; ++ vassert(mode64 == True); ++ switch (i->tag) { ++ case LAin_LI: ++ mapReg(m, &i->LAin.LI.dst); ++ break; ++ case LAin_Un: ++ mapReg(m, &i->LAin.Unary.src); ++ mapReg(m, &i->LAin.Unary.dst); ++ break; ++ case LAin_Bin: ++ mapRegs_LOONGARCH64RI(m, i->LAin.Binary.src2); ++ mapReg(m, &i->LAin.Binary.src1); ++ mapReg(m, &i->LAin.Binary.dst); ++ break; ++ case LAin_Load: ++ mapRegs_LOONGARCH64AMode(m, i->LAin.Load.src); ++ mapReg(m, &i->LAin.Load.dst); ++ break; ++ case LAin_Store: ++ mapRegs_LOONGARCH64AMode(m, i->LAin.Store.dst); ++ mapReg(m, &i->LAin.Store.src); ++ break; ++ case LAin_LLSC: ++ mapRegs_LOONGARCH64AMode(m, i->LAin.LLSC.addr); ++ mapReg(m, &i->LAin.LLSC.val); ++ break; ++ case LAin_Bar: ++ /* No regs. */ ++ break; ++ case LAin_FpUn: ++ mapReg(m, &i->LAin.FpUnary.src); ++ mapReg(m, &i->LAin.FpUnary.dst); ++ break; ++ case LAin_FpBin: ++ mapReg(m, &i->LAin.FpBinary.src2); ++ mapReg(m, &i->LAin.FpBinary.src1); ++ mapReg(m, &i->LAin.FpBinary.dst); ++ break; ++ case LAin_FpTri: ++ mapReg(m, &i->LAin.FpTrinary.src3); ++ mapReg(m, &i->LAin.FpTrinary.src2); ++ mapReg(m, &i->LAin.FpTrinary.src1); ++ mapReg(m, &i->LAin.FpTrinary.dst); ++ break; ++ case LAin_FpLoad: ++ mapRegs_LOONGARCH64AMode(m, i->LAin.FpLoad.src); ++ mapReg(m, &i->LAin.FpLoad.dst); ++ break; ++ case LAin_FpStore: ++ mapRegs_LOONGARCH64AMode(m, i->LAin.FpStore.dst); ++ mapReg(m, &i->LAin.FpStore.src); ++ break; ++ case LAin_FpMove: ++ mapReg(m, &i->LAin.FpMove.src); ++ mapReg(m, &i->LAin.FpMove.dst); ++ break; ++ case LAin_FpCmp: ++ mapReg(m, &i->LAin.FpCmp.src2); ++ mapReg(m, &i->LAin.FpCmp.src1); ++ mapReg(m, &i->LAin.FpCmp.dst); ++ break; ++ case LAin_VecUn: ++ mapReg(m, &i->LAin.VecUnary.src); ++ mapReg(m, &i->LAin.VecUnary.dst); ++ break; ++ case LAin_VecBin: ++ mapRegs_LOONGARCH64RI(m, i->LAin.VecBinary.src2); ++ mapReg(m, &i->LAin.VecBinary.src1); ++ mapReg(m, &i->LAin.VecBinary.dst); ++ break; ++ case LAin_VecLoad: ++ mapRegs_LOONGARCH64AMode(m, i->LAin.VecLoad.src); ++ mapReg(m, &i->LAin.VecLoad.dst); ++ break; ++ case LAin_VecStore: ++ mapRegs_LOONGARCH64AMode(m, i->LAin.VecStore.dst); ++ mapReg(m, &i->LAin.VecStore.src); ++ break; ++ case LAin_Cas: ++ mapReg(m, &i->LAin.Cas.old); ++ mapReg(m, &i->LAin.Cas.addr); ++ mapReg(m, &i->LAin.Cas.expd); ++ mapReg(m, &i->LAin.Cas.data); ++ break; ++ case LAin_Cmp: ++ mapReg(m, &i->LAin.Cmp.src2); ++ mapReg(m, &i->LAin.Cmp.src1); ++ mapReg(m, &i->LAin.Cmp.dst); ++ break; ++ case LAin_CMove: ++ mapReg(m, &i->LAin.CMove.cond); ++ mapReg(m, &i->LAin.CMove.r0); ++ mapReg(m, &i->LAin.CMove.r1); ++ mapReg(m, &i->LAin.CMove.dst); ++ break; ++ case LAin_Call: ++ if (!hregIsInvalid(i->LAin.Call.cond)) ++ mapReg(m, &i->LAin.Call.cond); ++ /* Hardwires $r12. */ ++ break; ++ /* XDirect/XIndir/XAssisted are also a bit subtle. They ++ conditionally exit the block. Hence we only need to list (1) ++ the registers that they read, and (2) the registers that they ++ write in the case where the block is not exited. (2) is ++ empty, hence only (1) is relevant here. */ ++ case LAin_XDirect: ++ mapRegs_LOONGARCH64AMode(m, i->LAin.XDirect.amPC); ++ if (!hregIsInvalid(i->LAin.XDirect.cond)) ++ mapReg(m, &i->LAin.XDirect.cond); ++ break; ++ case LAin_XIndir: ++ mapReg(m, &i->LAin.XIndir.dstGA); ++ mapRegs_LOONGARCH64AMode(m, i->LAin.XIndir.amPC); ++ if (!hregIsInvalid(i->LAin.XIndir.cond)) ++ mapReg(m, &i->LAin.XIndir.cond); ++ break; ++ case LAin_XAssisted: ++ mapReg(m, &i->LAin.XAssisted.dstGA); ++ mapRegs_LOONGARCH64AMode(m, i->LAin.XAssisted.amPC); ++ if (!hregIsInvalid(i->LAin.XAssisted.cond)) ++ mapReg(m, &i->LAin.XAssisted.cond); ++ break; ++ case LAin_EvCheck: ++ /* We expect both amodes only to mention $r31, so this is in ++ fact pointless, since $r31 isn't allocatable, but anyway.. */ ++ mapRegs_LOONGARCH64AMode(m, i->LAin.EvCheck.amCounter); ++ mapRegs_LOONGARCH64AMode(m, i->LAin.EvCheck.amFailAddr); ++ break; ++ case LAin_ProfInc: ++ /* Hardwires $r12 and $r13 -- nothing to modify. */ ++ break; ++ default: ++ ppLOONGARCH64Instr(i, mode64); ++ vpanic("mapRegs_LOONGARCH64Instr"); ++ break; ++ } +} + -+/* NB: what goes on here has to be very closely coordinated with the -+ emitInstr case for XDirect, above. */ -+VexInvalRange unchainXDirect_LOONGARCH64 ( VexEndness endness_host, -+ void* place_to_unchain, -+ const void* place_to_jump_to_EXPECTED, -+ const void* disp_cp_chain_me ) ++/* Generate loongarch64 spill instructions under the direction of the ++ register allocator. */ ++void genSpill_LOONGARCH64 ( /*OUT*/ HInstr** i1, /*OUT*/ HInstr** i2, ++ HReg rreg, Int offsetB, Bool mode64 ) +{ -+ vassert(endness_host == VexEndnessLE); -+ -+ /* What we're expecting to see is: -+ * la $t0, place_to_jump_to_EXPECTED -+ * jirl $ra, $t0, 0 -+ * viz -+ * <16 bytes generated by mkLoadImm_EXACTLY4> -+ * jirl $ra, $t0, 0 -+ */ -+ UInt* p = (UInt*)place_to_unchain; -+ vassert(((HWord)p & 3) == 0); -+ vassert(is_LoadImm_EXACTLY4(p, hregT0(), (ULong)(Addr)place_to_jump_to_EXPECTED)); -+ vassert(p[4] == emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1)); ++ vassert(mode64 == True); ++ vassert(offsetB >= 0); ++ vassert(!hregIsVirtual(rreg)); + -+ /* And what we want to change it to is: -+ * la $t0, disp_cp_chain_me -+ * jirl $ra, $t0, 0 -+ * viz -+ * <16 bytes generated by mkLoadImm_EXACTLY4> -+ * jirl $ra, $t0, 0 -+ * -+ * The replacement has the same length as the original. -+ */ -+ p = mkLoadImm_EXACTLY4(p, hregT0(), (ULong)(Addr)disp_cp_chain_me); -+ *p++ = emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1); ++ LOONGARCH64AMode* am; ++ *i1 = *i2 = NULL; + -+ VexInvalRange vir = { (HWord)place_to_unchain, 4 * 4 + 4 }; -+ return vir; ++ switch (hregClass(rreg)) { ++ case HRcInt64: ++ if (offsetB < 1024) { ++ am = LOONGARCH64AMode_RI(hregGSP(), offsetB); ++ *i1 = LOONGARCH64Instr_Store(LAstore_ST_D, am, rreg); ++ } else { ++ *i1 = LOONGARCH64Instr_LI(offsetB, hregT0()); ++ am = LOONGARCH64AMode_RR(hregGSP(), hregT0()); ++ *i2 = LOONGARCH64Instr_Store(LAstore_STX_D, am, rreg); ++ } ++ break; ++ case HRcFlt64: ++ if (offsetB < 1024) { ++ am = LOONGARCH64AMode_RI(hregGSP(), offsetB); ++ *i1 = LOONGARCH64Instr_FpStore(LAfpstore_FST_D, am, rreg); ++ } else { ++ *i1 = LOONGARCH64Instr_LI(offsetB, hregT0()); ++ am = LOONGARCH64AMode_RR(hregGSP(), hregT0()); ++ *i2 = LOONGARCH64Instr_FpStore(LAfpstore_FSTX_D, am, rreg); ++ } ++ break; ++ case HRcVec128: ++ if (offsetB < 1024) { ++ am = LOONGARCH64AMode_RI(hregGSP(), offsetB); ++ *i1 = LOONGARCH64Instr_VecStore(LAvecstore_VST, am, rreg); ++ } else { ++ am = LOONGARCH64AMode_RR(hregGSP(), hregT0()); ++ *i1 = LOONGARCH64Instr_LI(offsetB, hregT0()); ++ *i2 = LOONGARCH64Instr_VecStore(LAvecstore_VSTX, am, rreg); ++ } ++ break; ++ default: ++ ppHRegClass(hregClass(rreg)); ++ vpanic("genSpill_LOONGARCH64: unimplemented regclass"); ++ break; ++ } +} + -+/* Patch the counter address into a profile inc point, as previously -+ created by the mkProfInc. */ -+VexInvalRange patchProfInc_LOONGARCH64 ( VexEndness endness_host, -+ void* place_to_patch, -+ const ULong* location_of_counter ) ++/* Generate loongarch64 reload instructions under the direction of the ++ register allocator. */ ++void genReload_LOONGARCH64 ( /*OUT*/ HInstr** i1, /*OUT*/ HInstr** i2, ++ HReg rreg, Int offsetB, Bool mode64 ) +{ -+ vassert(endness_host == VexEndnessLE); -+ vassert(sizeof(ULong*) == 8); ++ vassert(mode64 == True); ++ vassert(offsetB >= 0); ++ vassert(!hregIsVirtual(rreg)); + -+ /* -+ $t0 = NotKnownYet -+ ld.d $t1, $t0, 0 -+ addi.d $t1, $t1, 1 -+ st.d $t1, $t0, 0 -+ */ -+ UInt* p = (UInt*)place_to_patch; -+ vassert(((HWord)p & 3) == 0); -+ vassert(is_LoadImm_EXACTLY4(p, hregT0(), 0x6555755585559555UL)); -+ vassert(p[4] == emit_op_si12_rj_rd(LAload_LD_D, 0, 12, 13)); -+ vassert(p[5] == emit_op_si12_rj_rd(LAbin_ADDI_D, 1, 13, 13)); -+ vassert(p[6] == emit_op_si12_rj_rd(LAstore_ST_D, 0, 12, 13)); ++ LOONGARCH64AMode* am; ++ *i1 = *i2 = NULL; + -+ p = mkLoadImm_EXACTLY4(p, hregT0(), (ULong)(Addr)location_of_counter); ++ switch (hregClass(rreg)) { ++ case HRcInt64: ++ if (offsetB < 1024) { ++ am = LOONGARCH64AMode_RI(hregGSP(), offsetB); ++ *i1 = LOONGARCH64Instr_Load(LAload_LD_D, am, rreg); ++ } else { ++ *i1 = LOONGARCH64Instr_LI(offsetB, hregT0()); ++ am = LOONGARCH64AMode_RR(hregGSP(), hregT0()); ++ *i2 = LOONGARCH64Instr_Load(LAload_LDX_D, am, rreg); ++ } ++ break; ++ case HRcFlt64: ++ if (offsetB < 1024) { ++ am = LOONGARCH64AMode_RI(hregGSP(), offsetB); ++ *i1 = LOONGARCH64Instr_FpLoad(LAfpload_FLD_D, am, rreg); ++ } else { ++ *i1 = LOONGARCH64Instr_LI(offsetB, hregT0()); ++ am = LOONGARCH64AMode_RR(hregGSP(), hregT0()); ++ *i2 = LOONGARCH64Instr_FpLoad(LAfpload_FLDX_D, am, rreg); ++ } ++ break; ++ case HRcVec128: ++ if (offsetB < 1024) { ++ am = LOONGARCH64AMode_RI(hregGSP(), offsetB); ++ *i1 = LOONGARCH64Instr_VecLoad(LAvecload_VLD, am, rreg); ++ } else { ++ am = LOONGARCH64AMode_RR(hregGSP(), hregT0()); ++ *i1 = LOONGARCH64Instr_LI(offsetB, hregT0()); ++ *i2 = LOONGARCH64Instr_VecLoad(LAvecload_VLDX, am, rreg); ++ } ++ break; ++ default: ++ ppHRegClass(hregClass(rreg)); ++ vpanic("genReload_LOONGARCH64: unimplemented regclass"); ++ break; ++ } ++} + -+ VexInvalRange vir = { (HWord)place_to_patch, 4 * 4 }; -+ return vir; ++/* Generate loongarch64 move instructions under the direction of the ++ register allocator. */ ++LOONGARCH64Instr* genMove_LOONGARCH64 ( HReg from, HReg to, Bool mode64 ) ++{ ++ vassert(mode64 == True); ++ switch (hregClass(from)) { ++ case HRcInt64: ++ return LOONGARCH64Instr_Binary(LAbin_OR, ++ LOONGARCH64RI_R(hregZERO()), ++ from, to); ++ case HRcFlt64: ++ return LOONGARCH64Instr_FpMove(LAfpmove_FMOV_D, from, to); ++ case HRcVec128: ++ return LOONGARCH64Instr_VecBinary(LAvecbin_VORI_B, ++ LOONGARCH64RI_I(0, 8, False), ++ from, to); ++ default: ++ ppHRegClass(hregClass(from)); ++ vpanic("genMove_LOONGARCH64: unimplemented regclass"); ++ } +} + + -+/*---------------------------------------------------------------*/ -+/*--- end host_loongarch64_defs.c ---*/ -+/*---------------------------------------------------------------*/ -diff --git a/VEX/priv/host_loongarch64_defs.h b/VEX/priv/host_loongarch64_defs.h -new file mode 100644 -index 0000000..56945f0 ---- /dev/null -+++ b/VEX/priv/host_loongarch64_defs.h -@@ -0,0 +1,685 @@ -+ -+/*---------------------------------------------------------------*/ -+/*--- begin host_loongarch64_defs.h ---*/ -+/*---------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. ++/* --------- The loongarch64 assembler --------- */ + -+ Copyright (C) 2021-2022 Loongson Technology Corporation Limited ++static inline UInt iregEnc ( HReg r ) ++{ ++ vassert(hregClass(r) == HRcInt64); ++ vassert(!hregIsVirtual(r)); ++ UInt n = hregEncoding(r); ++ vassert(n < 32); ++ return n; ++} + -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. ++static inline UInt fregEnc ( HReg r ) ++{ ++ vassert(hregClass(r) == HRcFlt64); ++ vassert(!hregIsVirtual(r)); ++ UInt n = hregEncoding(r); ++ vassert(n < 32); ++ return n; ++} + -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. ++static inline UInt vregEnc ( HReg r ) ++{ ++ vassert(hregClass(r) == HRcVec128); ++ vassert(!hregIsVirtual(r)); ++ UInt n = hregEncoding(r); ++ vassert(n < 32); ++ return n; ++} + -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, see . ++static inline UInt fcsrEnc ( HReg r ) ++{ ++ vassert(hregClass(r) == HRcInt32); ++ vassert(!hregIsVirtual(r)); ++ UInt n = hregEncoding(r); ++ vassert(n < 32); ++ return n; ++} + -+ The GNU General Public License is contained in the file COPYING. -+*/ ++static inline UInt emit_op_rj_rd ( UInt op, UInt rj, UInt rd ) ++{ ++ vassert(rj < (1 << 5)); ++ vassert(rd < (1 << 5)); ++ return op | (rj << 5) | rd; ++} + -+#ifndef __VEX_HOST_LOONGARCH64_DEFS_H -+#define __VEX_HOST_LOONGARCH64_DEFS_H ++static inline UInt emit_op_rk_rj_rd ( UInt op, UInt rk, UInt rj, UInt rd ) ++{ ++ vassert(rk < (1 << 5)); ++ vassert(rj < (1 << 5)); ++ vassert(rd < (1 << 5)); ++ return op | (rk << 10) | (rj << 5) | rd; ++} + -+#include "libvex_basictypes.h" -+#include "libvex.h" /* VexArch */ -+#include "host_generic_regs.h" /* HReg */ ++static inline UInt emit_op_fj_fd ( UInt op, UInt fj, UInt fd ) ++{ ++ vassert(fj < (1 << 5)); ++ vassert(fd < (1 << 5)); ++ return op | (fj << 5) | fd; ++} + ++static inline UInt emit_op_fa_fk_fj_fd ( UInt op, UInt fa, UInt fk, UInt fj, UInt fd ) ++{ ++ vassert(fa < (1 << 5)); ++ vassert(fk < (1 << 5)); ++ vassert(fj < (1 << 5)); ++ vassert(fd < (1 << 5)); ++ return op | (fa << 15) | (fk << 10) | (fj << 5) | fd; ++} + -+/* --------- Registers. --------- */ ++static inline UInt emit_op_fk_fj_fd ( UInt op, UInt fk, UInt fj, UInt fd ) ++{ ++ vassert(fk < (1 << 5)); ++ vassert(fj < (1 << 5)); ++ vassert(fd < (1 << 5)); ++ return op | (fk << 10) | (fj << 5) | fd; ++} + -+#define ST_IN static inline ++static inline UInt emit_op_ca_fk_fj_fd ( UInt op, UInt ca, UInt fk, UInt fj, UInt fd ) ++{ ++ vassert(ca < (1 << 3)); ++ vassert(fk < (1 << 5)); ++ vassert(fj < (1 << 5)); ++ vassert(fd < (1 << 5)); ++ return op | (ca << 15) | (fk << 10) | (fj << 5) | fd; ++} + -+/* Integer static registers */ -+ST_IN HReg hregLOONGARCH64_R23 ( void ) { return mkHReg(False, HRcInt64, 23, 0); } -+ST_IN HReg hregLOONGARCH64_R24 ( void ) { return mkHReg(False, HRcInt64, 24, 1); } -+ST_IN HReg hregLOONGARCH64_R25 ( void ) { return mkHReg(False, HRcInt64, 25, 2); } -+ST_IN HReg hregLOONGARCH64_R26 ( void ) { return mkHReg(False, HRcInt64, 26, 3); } -+ST_IN HReg hregLOONGARCH64_R27 ( void ) { return mkHReg(False, HRcInt64, 27, 4); } -+ST_IN HReg hregLOONGARCH64_R28 ( void ) { return mkHReg(False, HRcInt64, 28, 5); } -+ST_IN HReg hregLOONGARCH64_R29 ( void ) { return mkHReg(False, HRcInt64, 29, 6); } -+ST_IN HReg hregLOONGARCH64_R30 ( void ) { return mkHReg(False, HRcInt64, 30, 7); } -+/* $r31 is used as guest stack pointer */ ++static inline UInt emit_op_fk_fj_cd ( UInt op, UInt fk, UInt fj, UInt cd ) ++{ ++ vassert(fk < (1 << 5)); ++ vassert(fj < (1 << 5)); ++ vassert(cd < (1 << 3)); ++ return op | (fk << 10) | (fj << 5) | cd; ++} + -+/* Integer temporary registers */ -+/* $r12 is used as a chaining/ProfInc/Cmove temporary */ -+/* $r13 is used as a ProfInc temporary */ -+ST_IN HReg hregLOONGARCH64_R14 ( void ) { return mkHReg(False, HRcInt64, 14, 8); } -+ST_IN HReg hregLOONGARCH64_R15 ( void ) { return mkHReg(False, HRcInt64, 15, 9); } -+ST_IN HReg hregLOONGARCH64_R16 ( void ) { return mkHReg(False, HRcInt64, 16, 10); } -+ST_IN HReg hregLOONGARCH64_R17 ( void ) { return mkHReg(False, HRcInt64, 17, 11); } -+ST_IN HReg hregLOONGARCH64_R18 ( void ) { return mkHReg(False, HRcInt64, 18, 12); } -+ST_IN HReg hregLOONGARCH64_R19 ( void ) { return mkHReg(False, HRcInt64, 19, 13); } -+ST_IN HReg hregLOONGARCH64_R20 ( void ) { return mkHReg(False, HRcInt64, 20, 14); } ++static inline UInt emit_op_cj_rd ( UInt op, UInt cj, UInt rd ) ++{ ++ vassert(cj < (1 << 3)); ++ vassert(rd < (1 << 5)); ++ return op | (cj << 5) | rd; ++} + -+/* Floating point static registers */ -+ST_IN HReg hregLOONGARCH64_F24 ( void ) { return mkHReg(False, HRcFlt64, 24, 15); } -+ST_IN HReg hregLOONGARCH64_F25 ( void ) { return mkHReg(False, HRcFlt64, 25, 16); } -+ST_IN HReg hregLOONGARCH64_F26 ( void ) { return mkHReg(False, HRcFlt64, 26, 17); } -+ST_IN HReg hregLOONGARCH64_F27 ( void ) { return mkHReg(False, HRcFlt64, 27, 18); } -+ST_IN HReg hregLOONGARCH64_F28 ( void ) { return mkHReg(False, HRcFlt64, 28, 19); } -+ST_IN HReg hregLOONGARCH64_F29 ( void ) { return mkHReg(False, HRcFlt64, 29, 20); } -+ST_IN HReg hregLOONGARCH64_F30 ( void ) { return mkHReg(False, HRcFlt64, 30, 21); } -+ST_IN HReg hregLOONGARCH64_F31 ( void ) { return mkHReg(False, HRcFlt64, 31, 22); } ++static inline UInt emit_op_rj_cd ( UInt op, UInt rj, UInt cd ) ++{ ++ vassert(rj < (1 << 5)); ++ vassert(cd < (1 << 3)); ++ return op | (rj << 5) | cd; ++} + -+/* Other Integer registers */ -+ST_IN HReg hregLOONGARCH64_R0 ( void ) { return mkHReg(False, HRcInt64, 0, 23); } -+ST_IN HReg hregLOONGARCH64_R1 ( void ) { return mkHReg(False, HRcInt64, 1, 24); } -+ST_IN HReg hregLOONGARCH64_R2 ( void ) { return mkHReg(False, HRcInt64, 2, 25); } -+ST_IN HReg hregLOONGARCH64_R3 ( void ) { return mkHReg(False, HRcInt64, 3, 26); } -+ST_IN HReg hregLOONGARCH64_R4 ( void ) { return mkHReg(False, HRcInt64, 4, 27); } -+ST_IN HReg hregLOONGARCH64_R5 ( void ) { return mkHReg(False, HRcInt64, 5, 28); } -+ST_IN HReg hregLOONGARCH64_R6 ( void ) { return mkHReg(False, HRcInt64, 6, 29); } -+ST_IN HReg hregLOONGARCH64_R7 ( void ) { return mkHReg(False, HRcInt64, 7, 30); } -+ST_IN HReg hregLOONGARCH64_R8 ( void ) { return mkHReg(False, HRcInt64, 8, 31); } -+ST_IN HReg hregLOONGARCH64_R9 ( void ) { return mkHReg(False, HRcInt64, 9, 32); } -+ST_IN HReg hregLOONGARCH64_R10 ( void ) { return mkHReg(False, HRcInt64, 10, 33); } -+ST_IN HReg hregLOONGARCH64_R11 ( void ) { return mkHReg(False, HRcInt64, 11, 34); } -+ST_IN HReg hregLOONGARCH64_R12 ( void ) { return mkHReg(False, HRcInt64, 12, 35); } -+ST_IN HReg hregLOONGARCH64_R13 ( void ) { return mkHReg(False, HRcInt64, 13, 36); } -+ST_IN HReg hregLOONGARCH64_R21 ( void ) { return mkHReg(False, HRcInt64, 21, 37); } -+ST_IN HReg hregLOONGARCH64_R22 ( void ) { return mkHReg(False, HRcInt64, 22, 38); } -+ST_IN HReg hregLOONGARCH64_R31 ( void ) { return mkHReg(False, HRcInt64, 31, 39); } ++static inline UInt emit_op_rj_fd ( UInt op, UInt rj, UInt fd ) ++{ ++ vassert(rj < (1 << 5)); ++ vassert(fd < (1 << 5)); ++ return op | (rj << 5) | fd; ++} + -+/* Special registers */ -+ST_IN HReg hregLOONGARCH64_FCSR3 ( void ) { return mkHReg(False, HRcInt32, 3, 40); } ++static inline UInt emit_op_fj_rd ( UInt op, UInt fj, UInt rd ) ++{ ++ vassert(fj < (1 << 5)); ++ vassert(rd < (1 << 5)); ++ return op | (fj << 5) | rd; ++} + -+#undef ST_IN ++static inline UInt emit_op_rj_fcsr ( UInt op, UInt rj, UInt fcsr ) ++{ ++ vassert(rj < (1 << 5)); ++ vassert(fcsr < (1 << 5)); ++ return op | (rj << 5) | fcsr; ++} + -+#define hregZERO() hregLOONGARCH64_R0() -+#define hregSP() hregLOONGARCH64_R3() -+#define hregT0() hregLOONGARCH64_R12() -+#define hregT1() hregLOONGARCH64_R13() -+#define hregGSP() hregLOONGARCH64_R31() ++static inline UInt emit_op_fcsr_rd ( UInt op, UInt fcsr, UInt rd ) ++{ ++ vassert(fcsr < (1 << 5)); ++ vassert(rd < (1 << 5)); ++ return op | (fcsr << 5) | rd; ++} + -+extern UInt ppHRegLOONGARCH64 ( HReg reg ); ++static inline UInt emit_op_ui5_rj_rd ( UInt op, UInt ui5, UInt rj, UInt rd ) ++{ ++ vassert(ui5 < (1 << 5)); ++ vassert(rj < (1 << 5)); ++ vassert(rd < (1 << 5)); ++ return op | (ui5 << 10) | (rj << 5) | rd; ++} + -+/* Number of registers used arg passing in function calls */ -+#define LOONGARCH64_N_ARGREGS 8 /* a0 ... a7 */ ++static inline UInt emit_op_ui6_rj_rd ( UInt op, UInt ui6, UInt rj, UInt rd ) ++{ ++ vassert(ui6 < (1 << 6)); ++ vassert(rj < (1 << 5)); ++ vassert(rd < (1 << 5)); ++ return op | (ui6 << 10) | (rj << 5) | rd; ++} + ++static inline UInt emit_op_ui12_rj_rd ( UInt op, UInt ui12, UInt rj, UInt rd ) ++{ ++ vassert(ui12 < (1 << 12)); ++ vassert(rj < (1 << 5)); ++ vassert(rd < (1 << 5)); ++ return op | (ui12 << 10) | (rj << 5) | rd; ++} + -+/* --------- Condition codes, LOONGARCH64 encoding. --------- */ -+typedef enum { -+ LAcc_EQ = 0, /* equal */ -+ LAcc_NE = 1, /* not equal */ ++static inline UInt emit_op_si12_rj_rd ( UInt op, UInt si12, UInt rj, UInt rd ) ++{ ++ vassert(si12 < (1 << 12)); ++ vassert(rj < (1 << 5)); ++ vassert(rd < (1 << 5)); ++ return op | (si12 << 10) | (rj << 5) | rd; ++} + -+ LAcc_LT = 2, /* less than (signed) */ -+ LAcc_GE = 3, /* great equal (signed) */ ++static inline UInt emit_op_si14_rj_rd ( UInt op, UInt si14, UInt rj, UInt rd ) ++{ ++ vassert(si14 < (1 << 14)); ++ vassert(rj < (1 << 5)); ++ vassert(rd < (1 << 5)); ++ return op | (si14 << 10) | (rj << 5) | rd; ++} + -+ LAcc_LTU = 4, /* less than (unsigned) */ -+ LAcc_GEU = 5, /* great equal (unsigned) */ ++static inline UInt emit_op_si20_rd ( UInt op, UInt si20, UInt rd ) ++{ ++ vassert(si20 < (1 << 20)); ++ vassert(rd < (1 << 5)); ++ return op | (si20 << 5) | rd; ++} + -+ LAcc_AL = 6 /* always (unconditional) */ -+} LOONGARCH64CondCode; ++static inline UInt emit_op_offs16_rj_rd ( UInt op, UInt offs16, UInt rj, UInt rd ) ++{ ++ vassert(offs16 < (1 << 16)); ++ vassert(rj < (1 << 5)); ++ vassert(rd < (1 << 5)); ++ return op | (offs16 << 10) | (rj << 5) | rd; ++} + ++static inline UInt emit_op_offs26 ( UInt op, UInt offs26 ) ++{ ++ vassert(offs26 < (1 << 26)); ++ return op | ((offs26 & 0xffff) << 10) | (offs26 >> 16); ++} + -+/* --------- Memory address expressions (amodes). --------- */ ++static inline UInt emit_op_hint15 ( UInt op, UInt hint ) ++{ ++ vassert(hint < (1 << 15)); ++ return op | hint; ++} + -+typedef enum { -+ LAam_RI, /* Reg + Imm (signed 12-bit or signed 14-bit) */ -+ LAam_RR /* Reg1 + Reg2 */ -+} LOONGARCH64AModeTag; ++static inline UInt emit_op_si12_rj_vd ( UInt op, UInt si12, UInt rj, UInt vd ) ++{ ++ vassert(si12 < (1 << 12)); ++ vassert(rj < (1 << 5)); ++ vassert(vd < (1 << 5)); ++ return op | (si12 << 10) | (rj << 5) | vd; ++} + -+typedef struct { -+ LOONGARCH64AModeTag tag; -+ union { -+ struct { -+ HReg base; -+ UShort index; -+ } RI; -+ struct { -+ HReg base; -+ HReg index; -+ } RR; -+ } LAam; -+} LOONGARCH64AMode; ++static inline UInt emit_op_rk_rj_vd ( UInt op, UInt rk, UInt rj, UInt vd ) ++{ ++ vassert(rk < (1 << 5)); ++ vassert(rj < (1 << 5)); ++ vassert(vd < (1 << 5)); ++ return op | (rk << 10) | (rj << 5) | vd; ++} + -+extern LOONGARCH64AMode* LOONGARCH64AMode_RI ( HReg reg, UShort imm ); -+extern LOONGARCH64AMode* LOONGARCH64AMode_RR ( HReg base, HReg index ); ++static inline UInt emit_unop_r ( UInt op, Int src, UInt dst, UInt dst_size) ++{ ++ vassert(src < (1 << 5)); ++ vassert(dst < (1 << dst_size)); ++ return op | (src << 5) | dst; ++} + ++static inline UInt emit_binop_rr ( UInt op, UInt src2, UInt src1, UInt dst ) ++{ ++ vassert(src2 < (1 << 5)); ++ vassert(src1 < (1 << 5)); ++ vassert(dst < (1 << 5)); ++ return op | (src2 << 10) | (src1 << 5) | dst; ++} + -+/* --------- Operand, which can be reg or imm. --------- */ ++static inline UInt emit_binop_ri ( UInt op, UInt imm, UInt size, UInt src, UInt dst ) ++{ ++ vassert(imm < (1 << size)); ++ vassert(src < (1 << 5)); ++ vassert(dst < (1 << 5)); ++ return op | (imm << 10) | (src << 5) | dst; ++} + -+typedef enum { -+ LAri_Reg, -+ LAri_Imm -+} LOONGARCH64RITag; + -+typedef struct { -+ LOONGARCH64RITag tag; -+ union { -+ struct { -+ HReg reg; -+ } R; -+ struct { -+ UShort imm; -+ UChar size; // size == 5 || size == 6 || size == 12 -+ Bool isSigned; -+ } I; -+ } LAri; -+} LOONGARCH64RI; ++static UInt* mkLoadImm_EXACTLY4 ( UInt* p, HReg dst, ULong imm ) ++{ ++ /* ++ lu12i.w dst, imm[31:12] ++ ori dst, dst, imm[11:0] ++ lu32i.d dst, imm[51:32] ++ lu52i.d dst, dst, imm[63:52] ++ */ ++ UInt d = iregEnc(dst); ++ *p++ = emit_op_si20_rd(LAextra_LU12I_W, (imm >> 12) & 0xfffff, d); ++ *p++ = emit_op_si12_rj_rd(LAbin_ORI, imm & 0xfff, d, d); ++ *p++ = emit_op_si20_rd(LAextra_LU32I_D, (imm >> 32) & 0xfffff, d); ++ *p++ = emit_op_si12_rj_rd(LAextra_LU52I_D, (imm >> 52) & 0xfff, d, d); ++ return p; ++} + -+extern LOONGARCH64RI* LOONGARCH64RI_R ( HReg reg ); -+extern LOONGARCH64RI* LOONGARCH64RI_I ( UShort imm, UChar size, Bool isSigned ); ++static inline UInt* mkLoadImm_EXACTLY2 ( UInt* p, HReg dst, ULong imm ) ++{ ++ /* ++ lu12i.w dst, imm[31:12] ++ ori dst, dst, imm[11:0] ++ */ ++ UInt d = iregEnc(dst); ++ *p++ = emit_op_si20_rd(LAextra_LU12I_W, (imm >> 12) & 0xfffff, d); ++ *p++ = emit_op_si12_rj_rd(LAbin_ORI, imm & 0xfff, d, d); ++ return p; ++} + ++static inline UInt* mkLoadImm_EXACTLY1 ( UInt* p, HReg dst, ULong imm ) ++{ ++ /* ori dst, $zero, imm[11:0] */ ++ *p++ = emit_op_si12_rj_rd(LAbin_ORI, imm, 0, iregEnc(dst)); ++ return p; ++} + -+/* --------- Instructions. --------- */ ++static UInt* mkLoadImm ( UInt* p, HReg dst, ULong imm ) ++{ ++ if ((imm >> 12) == 0) ++ p = mkLoadImm_EXACTLY1(p, dst, imm); ++ else if (imm < 0x80000000 || (imm >> 31) == 0x1ffffffffUL) ++ p = mkLoadImm_EXACTLY2(p, dst, imm); ++ else ++ p = mkLoadImm_EXACTLY4(p, dst, imm); ++ return p; ++} + -+/* Tags for unary operations */ -+typedef enum { -+ LAun_CLZ_W = 0x00001400, -+ LAun_CTZ_W = 0x00001c00, -+ LAun_CLZ_D = 0x00002400, -+ LAun_CTZ_D = 0x00002c00, -+ LAun_EXT_W_H = 0x00005800, -+ LAun_EXT_W_B = 0x00005c00 -+} LOONGARCH64UnOp; ++static Bool is_LoadImm_EXACTLY4 ( UInt* p, HReg dst, ULong imm ) ++{ ++ UInt expect[4]; ++ mkLoadImm_EXACTLY4(expect, dst, imm); ++ return toBool(p[0] == expect[0] && p[1] == expect[1] && ++ p[2] == expect[2] && p[3] == expect[3]); ++} + -+/* Tags for binary operations */ -+typedef enum { -+ LAbin_ADD_W = 0x00100000, -+ LAbin_ADD_D = 0x00108000, -+ LAbin_SUB_W = 0x00110000, -+ LAbin_SUB_D = 0x00118000, -+ LAbin_NOR = 0x00140000, -+ LAbin_AND = 0x00148000, -+ LAbin_OR = 0x00150000, -+ LAbin_XOR = 0x00158000, -+ LAbin_SLL_W = 0x00170000, -+ LAbin_SRL_W = 0x00178000, -+ LAbin_SRA_W = 0x00180000, -+ LAbin_SLL_D = 0x00188000, -+ LAbin_SRL_D = 0x00190000, -+ LAbin_SRA_D = 0x00198000, -+ LAbin_MUL_W = 0x001c0000, -+ LAbin_MUL_D = 0x001d8000, -+ LAbin_MULH_W = 0x001c8000, -+ LAbin_MULH_WU = 0x001d0000, -+ LAbin_MULH_D = 0x001e0000, -+ LAbin_MULH_DU = 0x001e8000, -+ LAbin_MULW_D_W = 0x001f0000, -+ LAbin_MULW_D_WU = 0x001f8000, -+ LAbin_DIV_W = 0x00200000, -+ LAbin_MOD_W = 0x00208000, -+ LAbin_DIV_WU = 0x00210000, -+ LAbin_MOD_WU = 0x00218000, -+ LAbin_DIV_D = 0x00220000, -+ LAbin_MOD_D = 0x00228000, -+ LAbin_DIV_DU = 0x00230000, -+ LAbin_MOD_DU = 0x00238000, -+ LAbin_SLLI_W = 0x00408000, -+ LAbin_SLLI_D = 0x00410000, -+ LAbin_SRLI_W = 0x00448000, -+ LAbin_SRLI_D = 0x00450000, -+ LAbin_SRAI_W = 0x00488000, -+ LAbin_SRAI_D = 0x00490000, -+ LAbin_ADDI_W = 0x02800000, -+ LAbin_ADDI_D = 0x02c00000, -+ LAbin_ANDI = 0x03400000, -+ LAbin_ORI = 0x03800000, -+ LAbin_XORI = 0x03c00000 -+} LOONGARCH64BinOp; ++static inline UInt* mkUnary ( UInt* p, LOONGARCH64UnOp op, HReg src, HReg dst ) ++{ ++ switch (op) { ++ case LAun_CLZ_W: ++ case LAun_CTZ_W: ++ case LAun_CLZ_D: ++ case LAun_CTZ_D: ++ case LAun_EXT_W_H: ++ case LAun_EXT_W_B: ++ *p++ = emit_op_rj_rd(op, iregEnc(src), iregEnc(dst)); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+/* Tags for load operations */ -+typedef enum { -+ LAload_LD_W = 0x28800000, -+ LAload_LD_D = 0x28c00000, -+ LAload_LD_BU = 0x2a000000, -+ LAload_LD_HU = 0x2a400000, -+ LAload_LD_WU = 0x2a800000, -+ LAload_LDX_D = 0x380c0000, -+ LAload_LDX_BU = 0x38200000, -+ LAload_LDX_HU = 0x38240000, -+ LAload_LDX_WU = 0x38280000 -+} LOONGARCH64LoadOp; ++static inline UInt* mkBinary ( UInt* p, LOONGARCH64BinOp op, ++ LOONGARCH64RI* src2, HReg src1, HReg dst ) ++{ ++ switch (op) { ++ case LAbin_ADD_W: ++ case LAbin_ADD_D: ++ case LAbin_SUB_W: ++ case LAbin_SUB_D: ++ case LAbin_NOR: ++ case LAbin_AND: ++ case LAbin_OR: ++ case LAbin_XOR: ++ case LAbin_SLL_W: ++ case LAbin_SRL_W: ++ case LAbin_SRA_W: ++ case LAbin_SLL_D: ++ case LAbin_SRL_D: ++ case LAbin_SRA_D: ++ case LAbin_MUL_W: ++ case LAbin_MUL_D: ++ case LAbin_MULH_W: ++ case LAbin_MULH_WU: ++ case LAbin_MULH_D: ++ case LAbin_MULH_DU: ++ case LAbin_MULW_D_W: ++ case LAbin_MULW_D_WU: ++ case LAbin_DIV_W: ++ case LAbin_MOD_W: ++ case LAbin_DIV_WU: ++ case LAbin_MOD_WU: ++ case LAbin_DIV_D: ++ case LAbin_MOD_D: ++ case LAbin_DIV_DU: ++ case LAbin_MOD_DU: ++ vassert(src2->tag == LAri_Reg); ++ *p++ = emit_op_rk_rj_rd(op, iregEnc(src2->LAri.R.reg), ++ iregEnc(src1), iregEnc(dst)); ++ return p; ++ case LAbin_SLLI_W: ++ case LAbin_SRLI_W: ++ case LAbin_SRAI_W: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_op_ui5_rj_rd(op, src2->LAri.I.imm, ++ iregEnc(src1), iregEnc(dst)); ++ return p; ++ case LAbin_SLLI_D: ++ case LAbin_SRLI_D: ++ case LAbin_SRAI_D: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_op_ui6_rj_rd(op, src2->LAri.I.imm, ++ iregEnc(src1), iregEnc(dst)); ++ return p; ++ case LAbin_ADDI_W: ++ case LAbin_ADDI_D: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_op_si12_rj_rd(op, src2->LAri.I.imm, ++ iregEnc(src1), iregEnc(dst)); ++ return p; ++ case LAbin_ANDI: ++ case LAbin_ORI: ++ case LAbin_XORI: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_op_ui12_rj_rd(op, src2->LAri.I.imm, ++ iregEnc(src1), iregEnc(dst)); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+/* Tags for store operations */ -+typedef enum { -+ LAstore_ST_B = 0x29000000, -+ LAstore_ST_H = 0x29400000, -+ LAstore_ST_W = 0x29800000, -+ LAstore_ST_D = 0x29c00000, -+ LAstore_STX_B = 0x38100000, -+ LAstore_STX_H = 0x38140000, -+ LAstore_STX_W = 0x38180000, -+ LAstore_STX_D = 0x381c0000 -+} LOONGARCH64StoreOp; ++static UInt* mkLoad ( UInt* p, LOONGARCH64LoadOp op, ++ LOONGARCH64AMode* src, HReg dst ) ++{ ++ switch (op) { ++ case LAload_LD_W: ++ case LAload_LD_D: ++ case LAload_LD_BU: ++ case LAload_LD_HU: ++ case LAload_LD_WU: ++ vassert(src->tag == LAam_RI); ++ *p++ = emit_op_si12_rj_rd(op, src->LAam.RI.index, ++ iregEnc(src->LAam.RI.base), iregEnc(dst)); ++ return p; ++ case LAload_LDX_D: ++ case LAload_LDX_BU: ++ case LAload_LDX_HU: ++ case LAload_LDX_WU: ++ vassert(src->tag == LAam_RR); ++ *p++ = emit_op_rk_rj_rd(op, iregEnc(src->LAam.RR.index), ++ iregEnc(src->LAam.RR.base), iregEnc(dst)); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+/* Tags for ll/sc operations */ -+typedef enum { -+ LAllsc_LL_W = 0x20000000, -+ LAllsc_SC_W = 0x21000000, -+ LAllsc_LL_D = 0x22000000, -+ LAllsc_SC_D = 0x23000000 -+} LOONGARCH64LLSCOp; ++static UInt* mkStore ( UInt* p, LOONGARCH64StoreOp op, ++ LOONGARCH64AMode* dst, HReg src ) ++{ ++ switch (op) { ++ case LAstore_ST_B: ++ case LAstore_ST_H: ++ case LAstore_ST_W: ++ case LAstore_ST_D: ++ vassert(dst->tag == LAam_RI); ++ *p++ = emit_op_si12_rj_rd(op, dst->LAam.RI.index, ++ iregEnc(dst->LAam.RI.base), iregEnc(src)); ++ return p; ++ case LAstore_STX_B: ++ case LAstore_STX_H: ++ case LAstore_STX_W: ++ case LAstore_STX_D: ++ vassert(dst->tag == LAam_RR); ++ *p++ = emit_op_rk_rj_rd(op, iregEnc(dst->LAam.RR.index), ++ iregEnc(dst->LAam.RR.base), iregEnc(src)); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+/* Tags for barrier operations */ -+typedef enum { -+ LAbar_DBAR = 0x38720000, -+ LAbar_IBAR = 0x38728000 -+} LOONGARCH64BarOp; ++static inline UInt* mkLLSC ( UInt* p, LOONGARCH64LLSCOp op, ++ LOONGARCH64AMode* addr, HReg val ) ++{ ++ switch (op) { ++ case LAllsc_LL_W: ++ case LAllsc_SC_W: ++ case LAllsc_LL_D: ++ case LAllsc_SC_D: ++ vassert(addr->tag == LAam_RI); ++ *p++ = emit_op_si14_rj_rd(op, addr->LAam.RI.index, ++ iregEnc(addr->LAam.RI.base), iregEnc(val)); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+/* Tags for floating point unary operations */ -+typedef enum { -+ LAfpun_FABS_S = 0x01140400, -+ LAfpun_FABS_D = 0x01140800, -+ LAfpun_FNEG_S = 0x01141400, -+ LAfpun_FNEG_D = 0x01141800, -+ LAfpun_FLOGB_S = 0x01142400, -+ LAfpun_FLOGB_D = 0x01142800, -+ LAfpun_FSQRT_S = 0x01144400, -+ LAfpun_FSQRT_D = 0x01144800, -+ LAfpun_FRSQRT_S = 0x01146400, -+ LAfpun_FRSQRT_D = 0x01146800, -+ LAfpun_FCVT_S_D = 0x01191800, -+ LAfpun_FCVT_D_S = 0x01192400, -+ LAfpun_FTINT_W_S = 0x011b0400, -+ LAfpun_FTINT_W_D = 0x011b0800, -+ LAfpun_FTINT_L_S = 0x011b2400, -+ LAfpun_FTINT_L_D = 0x011b2800, -+ LAfpun_FFINT_S_W = 0x011d1000, -+ LAfpun_FFINT_S_L = 0x011d1800, -+ LAfpun_FFINT_D_W = 0x011d2000, -+ LAfpun_FFINT_D_L = 0x011d2800, -+ LAfpun_FRINT_S = 0x011e4400, -+ LAfpun_FRINT_D = 0x011e4800 -+} LOONGARCH64FpUnOp; ++static inline UInt* mkBar ( UInt* p, LOONGARCH64BarOp op, UShort hint ) ++{ ++ switch (op) { ++ case LAbar_DBAR: ++ case LAbar_IBAR: ++ *p++ = emit_op_hint15(op, hint); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+/* Tags for floating point binary operations */ -+typedef enum { -+ LAfpbin_FADD_S = 0x01008000, -+ LAfpbin_FADD_D = 0x01010000, -+ LAfpbin_FSUB_S = 0x01028000, -+ LAfpbin_FSUB_D = 0x01030000, -+ LAfpbin_FMUL_S = 0x01048000, -+ LAfpbin_FMUL_D = 0x01050000, -+ LAfpbin_FDIV_S = 0x01068000, -+ LAfpbin_FDIV_D = 0x01070000, -+ LAfpbin_FMAX_S = 0x01088000, -+ LAfpbin_FMAX_D = 0x01090000, -+ LAfpbin_FMIN_S = 0x010a8000, -+ LAfpbin_FMIN_D = 0x010b0000, -+ LAfpbin_FMAXA_S = 0x010c8000, -+ LAfpbin_FMAXA_D = 0x010d0000, -+ LAfpbin_FMINA_S = 0x010e8000, -+ LAfpbin_FMINA_D = 0x010f0000, -+ LAfpbin_FSCALEB_S = 0x01108000, -+ LAfpbin_FSCALEB_D = 0x01110000 -+} LOONGARCH64FpBinOp; ++static inline UInt* mkFpUnary ( UInt* p, LOONGARCH64FpUnOp op, HReg src, HReg dst ) ++{ ++ switch (op) { ++ case LAfpun_FABS_S: ++ case LAfpun_FABS_D: ++ case LAfpun_FNEG_S: ++ case LAfpun_FNEG_D: ++ case LAfpun_FLOGB_S: ++ case LAfpun_FLOGB_D: ++ case LAfpun_FSQRT_S: ++ case LAfpun_FSQRT_D: ++ case LAfpun_FRSQRT_S: ++ case LAfpun_FRSQRT_D: ++ case LAfpun_FCVT_S_D: ++ case LAfpun_FCVT_D_S: ++ case LAfpun_FTINT_W_S: ++ case LAfpun_FTINT_W_D: ++ case LAfpun_FTINT_L_S: ++ case LAfpun_FTINT_L_D: ++ case LAfpun_FFINT_S_W: ++ case LAfpun_FFINT_S_L: ++ case LAfpun_FFINT_D_W: ++ case LAfpun_FFINT_D_L: ++ case LAfpun_FRINT_S: ++ case LAfpun_FRINT_D: ++ *p++ = emit_op_fj_fd(op, fregEnc(src), fregEnc(dst)); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+/* Tags for floating point trinary operations */ -+typedef enum { -+ LAfpbin_FMADD_S = 0x08100000, -+ LAfpbin_FMADD_D = 0x08200000, -+ LAfpbin_FMSUB_S = 0x08500000, -+ LAfpbin_FMSUB_D = 0x08600000 -+} LOONGARCH64FpTriOp; ++static inline UInt* mkFpBinary ( UInt* p, LOONGARCH64FpBinOp op, HReg src2, ++ HReg src1, HReg dst ) ++{ ++ switch (op) { ++ case LAfpbin_FADD_S: ++ case LAfpbin_FADD_D: ++ case LAfpbin_FSUB_S: ++ case LAfpbin_FSUB_D: ++ case LAfpbin_FMUL_S: ++ case LAfpbin_FMUL_D: ++ case LAfpbin_FDIV_S: ++ case LAfpbin_FDIV_D: ++ case LAfpbin_FMAX_S: ++ case LAfpbin_FMAX_D: ++ case LAfpbin_FMIN_S: ++ case LAfpbin_FMIN_D: ++ case LAfpbin_FMAXA_S: ++ case LAfpbin_FMAXA_D: ++ case LAfpbin_FMINA_S: ++ case LAfpbin_FMINA_D: ++ case LAfpbin_FSCALEB_S: ++ case LAfpbin_FSCALEB_D: ++ *p++ = emit_op_fk_fj_fd(op, fregEnc(src2), fregEnc(src1), fregEnc(dst)); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+/* Tags for floating point load operations */ -+typedef enum { -+ LAfpload_FLD_S = 0x2b000000, -+ LAfpload_FLD_D = 0x2b800000, -+ LAfpload_FLDX_S = 0x38300000, -+ LAfpload_FLDX_D = 0x38340000 -+} LOONGARCH64FpLoadOp; ++static inline UInt* mkFpTrinary ( UInt* p, LOONGARCH64FpTriOp op, HReg src3, ++ HReg src2, HReg src1, HReg dst ) ++{ ++ switch (op) { ++ case LAfpbin_FMADD_S: ++ case LAfpbin_FMADD_D: ++ case LAfpbin_FMSUB_S: ++ case LAfpbin_FMSUB_D: ++ *p++ = emit_op_fa_fk_fj_fd(op, fregEnc(src3), fregEnc(src2), ++ fregEnc(src1), fregEnc(dst)); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+/* Tags for floating point store operations */ -+typedef enum { -+ LAfpstore_FST_S = 0x2b400000, -+ LAfpstore_FST_D = 0x2bc00000, -+ LAfpstore_FSTX_S = 0x38380000, -+ LAfpstore_FSTX_D = 0x383c0000 -+} LOONGARCH64FpStoreOp; ++static inline UInt* mkFpLoad ( UInt* p, LOONGARCH64FpLoadOp op, ++ LOONGARCH64AMode* src, HReg dst ) ++{ ++ switch (op) { ++ case LAfpload_FLD_S: ++ case LAfpload_FLD_D: ++ vassert(src->tag == LAam_RI); ++ *p++ = emit_op_si12_rj_rd(op, src->LAam.RI.index, ++ iregEnc(src->LAam.RI.base), fregEnc(dst)); ++ return p; ++ case LAfpload_FLDX_S: ++ case LAfpload_FLDX_D: ++ vassert(src->tag == LAam_RR); ++ *p++ = emit_op_rk_rj_rd(op, iregEnc(src->LAam.RR.index), ++ iregEnc(src->LAam.RR.base), fregEnc(dst)); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+/* Tags for floating point move operations */ -+typedef enum { -+ LAfpmove_FMOV_S = 0x01149400, -+ LAfpmove_FMOV_D = 0x01149800, -+ LAfpmove_MOVGR2FR_W = 0x0114a400, -+ LAfpmove_MOVGR2FR_D = 0x0114a800, -+ LAfpmove_MOVFR2GR_S = 0x0114b400, -+ LAfpmove_MOVFR2GR_D = 0x0114b800, -+ LAfpmove_MOVGR2FCSR = 0x0114c000, -+ LAfpmove_MOVFCSR2GR = 0x0114c800 -+} LOONGARCH64FpMoveOp; ++static inline UInt* mkFpStore ( UInt* p, LOONGARCH64FpStoreOp op, ++ LOONGARCH64AMode* dst, HReg src ) ++{ ++ switch (op) { ++ case LAfpstore_FST_S: ++ case LAfpstore_FST_D: ++ vassert(dst->tag == LAam_RI); ++ *p++ = emit_op_si12_rj_rd(op, dst->LAam.RI.index, ++ iregEnc(dst->LAam.RI.base), fregEnc(src)); ++ return p; ++ case LAfpstore_FSTX_S: ++ case LAfpstore_FSTX_D: ++ vassert(dst->tag == LAam_RR); ++ *p++ = emit_op_rk_rj_rd(op, iregEnc(dst->LAam.RR.index), ++ iregEnc(dst->LAam.RR.base), fregEnc(src)); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+/* Tags for floating point compare operations */ -+typedef enum { -+ LAfpcmp_FCMP_CLT_S = 0x0c110000, -+ LAfpcmp_FCMP_CLT_D = 0x0c210000, -+ LAfpcmp_FCMP_CEQ_S = 0x0c120000, -+ LAfpcmp_FCMP_CEQ_D = 0x0c220000, -+ LAfpcmp_FCMP_CUN_S = 0x0c140000, -+ LAfpcmp_FCMP_CUN_D = 0x0c240000 -+} LOONGARCH64FpCmpOp; ++static inline UInt* mkFpMove ( UInt* p, LOONGARCH64FpMoveOp op, HReg src, HReg dst ) ++{ ++ switch (op) { ++ case LAfpmove_FMOV_S: ++ case LAfpmove_FMOV_D: ++ *p++ = emit_op_fj_fd(op, fregEnc(src), fregEnc(dst)); ++ return p; ++ case LAfpmove_MOVGR2FR_W: ++ case LAfpmove_MOVGR2FR_D: ++ *p++ = emit_op_rj_fd(op, iregEnc(src), fregEnc(dst)); ++ return p; ++ case LAfpmove_MOVFR2GR_S: ++ case LAfpmove_MOVFR2GR_D: ++ *p++ = emit_op_fj_rd(op, fregEnc(src), iregEnc(dst)); ++ return p; ++ case LAfpmove_MOVGR2FCSR: ++ *p++ = emit_op_rj_fcsr(op, iregEnc(src), fcsrEnc(dst)); ++ return p; ++ case LAfpmove_MOVFCSR2GR: ++ *p++ = emit_op_fcsr_rd(op, fcsrEnc(src), iregEnc(dst)); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+/* Tags for extra operations, we only use them when emiting code directly */ -+typedef enum { -+ LAextra_MOVGR2CF = 0x0114d800, -+ LAextra_MOVCF2GR = 0x0114dc00, -+ LAextra_SLT = 0x00120000, -+ LAextra_SLTU = 0x00128000, -+ LAextra_MASKEQZ = 0x00130000, -+ LAextra_MASKNEZ = 0x00138000, -+ LAextra_SLTI = 0x02000000, -+ LAextra_SLTUI = 0x02400000, -+ LAextra_LU52I_D = 0x03000000, -+ LAextra_FSEL = 0x0d000000, -+ LAextra_LU12I_W = 0x14000000, -+ LAextra_LU32I_D = 0x16000000, -+ LAextra_JIRL = 0x4c000000, -+ LAextra_B = 0x50000000, -+ LAextra_BEQ = 0x58000000, -+ LAextra_BNE = 0x5c000000, -+ LAextra_BGE = 0x64000000 -+} LOONGARCH64ExtraOp; ++static inline UInt* mkFpCmp ( UInt* p, LOONGARCH64FpCmpOp op, HReg src2, ++ HReg src1, HReg dst ) ++{ ++ /* ++ fcmp.cond.[sd] $fcc0, src1, src2 ++ movcf2gr dst, $fcc0 ++ */ ++ switch (op) { ++ case LAfpcmp_FCMP_CLT_S: ++ case LAfpcmp_FCMP_CLT_D: ++ case LAfpcmp_FCMP_CEQ_S: ++ case LAfpcmp_FCMP_CEQ_D: ++ case LAfpcmp_FCMP_CUN_S: ++ case LAfpcmp_FCMP_CUN_D: ++ *p++ = emit_op_fk_fj_cd(op, fregEnc(src2), fregEnc(src1), 0); ++ *p++ = emit_op_cj_rd(LAextra_MOVCF2GR, 0, iregEnc(dst)); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+/* Tags for instructions */ -+typedef enum { -+ /* Pseudo-insn, used for generating a 64-bit -+ literal to register */ -+ LAin_LI, /* load imm */ ++static inline UInt* mkVecUnary ( UInt* p, LOONGARCH64VecUnOp op, HReg src, HReg dst ) ++{ ++ switch (op) { ++ case LAvecun_VCLO_B: ++ case LAvecun_VCLO_H: ++ case LAvecun_VCLO_W: ++ case LAvecun_VCLZ_B: ++ case LAvecun_VCLZ_H: ++ case LAvecun_VCLZ_W: ++ case LAvecun_VCLZ_D: ++ case LAvecun_VPCNT_B: ++ case LAvecun_VEXTH_H_B: ++ case LAvecun_VEXTH_W_H: ++ case LAvecun_VEXTH_D_W: ++ case LAvecun_VEXTH_Q_D: ++ case LAvecun_VEXTH_HU_BU: ++ case LAvecun_VEXTH_WU_HU: ++ case LAvecun_VEXTH_DU_WU: ++ case LAvecun_VEXTH_QU_DU: ++ *p++ = emit_unop_r(op, vregEnc(src), vregEnc(dst), 5); ++ return p; ++ case LAvecun_VREPLGR2VR_B: ++ case LAvecun_VREPLGR2VR_H: ++ case LAvecun_VREPLGR2VR_W: ++ case LAvecun_VREPLGR2VR_D: ++ *p++ = emit_unop_r(op, iregEnc(src), vregEnc(dst), 5); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+ /* Integer insns */ -+ LAin_Un, /* unary */ -+ LAin_Bin, /* binary */ -+ LAin_Load, /* load */ -+ LAin_Store, /* store */ -+ LAin_LLSC, /* ll/sc */ -+ LAin_Bar, /* barrier */ ++static inline UInt* mkVecBinary ( UInt* p, LOONGARCH64VecBinOp op, ++ LOONGARCH64RI* src2, HReg src1, HReg dst ) ++{ ++ switch (op) { ++ case LAvecbin_VSEQ_B: ++ case LAvecbin_VSEQ_H: ++ case LAvecbin_VSEQ_W: ++ case LAvecbin_VSEQ_D: ++ case LAvecbin_VSLT_B: ++ case LAvecbin_VSLT_H: ++ case LAvecbin_VSLT_W: ++ case LAvecbin_VSLT_D: ++ case LAvecbin_VSLT_BU: ++ case LAvecbin_VSLT_HU: ++ case LAvecbin_VSLT_WU: ++ case LAvecbin_VSLT_DU: ++ case LAvecbin_VADD_B: ++ case LAvecbin_VADD_H: ++ case LAvecbin_VADD_D: ++ case LAvecbin_VADD_W: ++ case LAvecbin_VSUB_B: ++ case LAvecbin_VSUB_H: ++ case LAvecbin_VSUB_W: ++ case LAvecbin_VSUB_D: ++ case LAvecbin_VSADD_B: ++ case LAvecbin_VSADD_H: ++ case LAvecbin_VSADD_W: ++ case LAvecbin_VSADD_D: ++ case LAvecbin_VSSUB_B: ++ case LAvecbin_VSSUB_H: ++ case LAvecbin_VSSUB_W: ++ case LAvecbin_VSSUB_D: ++ case LAvecbin_VSADD_BU: ++ case LAvecbin_VSADD_HU: ++ case LAvecbin_VSADD_WU: ++ case LAvecbin_VSADD_DU: ++ case LAvecbin_VSSUB_BU: ++ case LAvecbin_VSSUB_HU: ++ case LAvecbin_VSSUB_WU: ++ case LAvecbin_VSSUB_DU: ++ case LAvecbin_VADDA_B: ++ case LAvecbin_VADDA_H: ++ case LAvecbin_VADDA_W: ++ case LAvecbin_VADDA_D: ++ case LAvecbin_VAVGR_B: ++ case LAvecbin_VAVGR_H: ++ case LAvecbin_VAVGR_W: ++ case LAvecbin_VAVGR_D: ++ case LAvecbin_VAVGR_BU: ++ case LAvecbin_VAVGR_HU: ++ case LAvecbin_VAVGR_WU: ++ case LAvecbin_VAVGR_DU: ++ case LAvecbin_VMAX_B: ++ case LAvecbin_VMAX_H: ++ case LAvecbin_VMAX_W: ++ case LAvecbin_VMAX_D: ++ case LAvecbin_VMIN_B: ++ case LAvecbin_VMIN_H: ++ case LAvecbin_VMIN_W: ++ case LAvecbin_VMIN_D: ++ case LAvecbin_VMAX_BU: ++ case LAvecbin_VMAX_HU: ++ case LAvecbin_VMAX_WU: ++ case LAvecbin_VMAX_DU: ++ case LAvecbin_VMIN_BU: ++ case LAvecbin_VMIN_HU: ++ case LAvecbin_VMIN_WU: ++ case LAvecbin_VMIN_DU: ++ case LAvecbin_VMUL_B: ++ case LAvecbin_VMUL_H: ++ case LAvecbin_VMUL_W: ++ case LAvecbin_VMUH_B: ++ case LAvecbin_VMUH_H: ++ case LAvecbin_VMUH_W: ++ case LAvecbin_VMUH_BU: ++ case LAvecbin_VMUH_HU: ++ case LAvecbin_VMUH_WU: ++ case LAvecbin_VSLL_B: ++ case LAvecbin_VSLL_H: ++ case LAvecbin_VSLL_W: ++ case LAvecbin_VSLL_D: ++ case LAvecbin_VSRL_B: ++ case LAvecbin_VSRL_H: ++ case LAvecbin_VSRL_W: ++ case LAvecbin_VSRL_D: ++ case LAvecbin_VSRA_B: ++ case LAvecbin_VSRA_H: ++ case LAvecbin_VSRA_W: ++ case LAvecbin_VSRA_D: ++ case LAvecbin_VILVL_B: ++ case LAvecbin_VILVL_H: ++ case LAvecbin_VILVL_W: ++ case LAvecbin_VILVL_D: ++ case LAvecbin_VILVH_B: ++ case LAvecbin_VILVH_H: ++ case LAvecbin_VILVH_W: ++ case LAvecbin_VILVH_D: ++ case LAvecbin_VPICKEV_B: ++ case LAvecbin_VPICKEV_H: ++ case LAvecbin_VPICKEV_W: ++ case LAvecbin_VPICKOD_B: ++ case LAvecbin_VPICKOD_H: ++ case LAvecbin_VPICKOD_W: ++ case LAvecbin_VAND_V: ++ case LAvecbin_VOR_V: ++ case LAvecbin_VXOR_V: ++ case LAvecbin_VNOR_V: ++ case LAvecbin_VADD_Q: ++ case LAvecbin_VSUB_Q: ++ case LAvecbin_VFADD_S: ++ case LAvecbin_VFADD_D: ++ case LAvecbin_VFSUB_S: ++ case LAvecbin_VFSUB_D: ++ case LAvecbin_VFMUL_S: ++ case LAvecbin_VFMUL_D: ++ case LAvecbin_VFDIV_S: ++ case LAvecbin_VFDIV_D: ++ case LAvecbin_VFMAX_S: ++ case LAvecbin_VFMAX_D: ++ case LAvecbin_VFMIN_S: ++ case LAvecbin_VFMIN_D: ++ vassert(src2->tag == LAri_Reg); ++ *p++ = emit_binop_rr(op, vregEnc(src2->LAri.R.reg), vregEnc(src1), vregEnc(dst)); ++ return p; ++ case LAvecbin_VREPLVE_B: ++ case LAvecbin_VREPLVE_H: ++ case LAvecbin_VREPLVE_W: ++ case LAvecbin_VREPLVE_D: ++ vassert(src2->tag == LAri_Reg); ++ *p++ = emit_binop_rr(op, iregEnc(src2->LAri.R.reg), vregEnc(src1), vregEnc(dst)); ++ return p; ++ case LAvecbin_VINSGR2VR_D: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_binop_ri(op, src2->LAri.I.imm, 1, iregEnc(src1), vregEnc(dst)); ++ return p; ++ case LAvecbin_VPICKVE2GR_D: ++ case LAvecbin_VPICKVE2GR_DU: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_binop_ri(op, src2->LAri.I.imm, 1, vregEnc(src1), iregEnc(dst)); ++ return p; ++ case LAvecbin_VINSGR2VR_W: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_binop_ri(op, src2->LAri.I.imm, 2, iregEnc(src1), vregEnc(dst)); ++ return p; ++ case LAvecbin_VPICKVE2GR_W: ++ case LAvecbin_VPICKVE2GR_WU: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_binop_ri(op, src2->LAri.I.imm, 2, vregEnc(src1), iregEnc(dst)); ++ return p; ++ case LAvecbin_VSLLI_B: ++ case LAvecbin_VSRLI_B: ++ case LAvecbin_VSRAI_B: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_binop_ri(op, src2->LAri.I.imm, 3, vregEnc(src1), vregEnc(dst)); ++ return p; ++ case LAvecbin_VINSGR2VR_H: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_binop_ri(op, src2->LAri.I.imm, 3, iregEnc(src1), vregEnc(dst)); ++ return p; ++ case LAvecbin_VPICKVE2GR_HU: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_binop_ri(op, src2->LAri.I.imm, 3, vregEnc(src1), iregEnc(dst)); ++ return p; ++ case LAvecbin_VSLLI_H: ++ case LAvecbin_VSRLI_H: ++ case LAvecbin_VSRAI_H: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_binop_ri(op, src2->LAri.I.imm, 4, vregEnc(src1), vregEnc(dst)); ++ return p; ++ case LAvecbin_VINSGR2VR_B: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_binop_ri(op, src2->LAri.I.imm, 4, iregEnc(src1), vregEnc(dst)); ++ return p; ++ case LAvecbin_VPICKVE2GR_BU: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_binop_ri(op, src2->LAri.I.imm, 4, vregEnc(src1), iregEnc(dst)); ++ return p; ++ case LAvecbin_VBSLL_V: ++ case LAvecbin_VBSRL_V: ++ case LAvecbin_VSLLI_W: ++ case LAvecbin_VSRLI_W: ++ case LAvecbin_VSRAI_W: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_binop_ri(op, src2->LAri.I.imm, 5, vregEnc(src1), vregEnc(dst)); ++ return p; ++ case LAvecbin_VSLLI_D: ++ case LAvecbin_VSRLI_D: ++ case LAvecbin_VSRAI_D: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_binop_ri(op, src2->LAri.I.imm, 6, vregEnc(src1), vregEnc(dst)); ++ return p; ++ case LAvecbin_VORI_B: ++ vassert(src2->tag == LAri_Imm); ++ *p++ = emit_binop_ri(op, src2->LAri.I.imm, 8, vregEnc(src1), vregEnc(dst)); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+ /* Floating point insns */ -+ LAin_FpUn, /* floating point unary */ -+ LAin_FpBin, /* floating point binary */ -+ LAin_FpTri, /* floating point trinary */ -+ LAin_FpLoad, /* floating point load */ -+ LAin_FpStore, /* floating point store */ -+ LAin_FpMove, /* floating point move */ -+ LAin_FpCmp, /* floating point compare */ ++static inline UInt* mkVecLoad ( UInt* p, LOONGARCH64VecLoadOp op, ++ LOONGARCH64AMode* src, HReg dst ) ++{ ++ switch (op) { ++ case LAvecload_VLD: ++ vassert(src->tag == LAam_RI); ++ *p++ = emit_op_si12_rj_vd(op, src->LAam.RI.index, ++ iregEnc(src->LAam.RI.base), vregEnc(dst)); ++ return p; ++ case LAvecload_VLDX: ++ vassert(src->tag == LAam_RR); ++ *p++ = emit_op_rk_rj_rd(op, iregEnc(src->LAam.RR.index), ++ iregEnc(src->LAam.RR.base), vregEnc(dst)); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+ /* Pseudo-insn */ -+ LAin_Cas, /* compare and swap */ -+ LAin_Cmp, /* word compare */ -+ LAin_CMove, /* condition move */ ++static inline UInt* mkVecStore ( UInt* p, LOONGARCH64VecStoreOp op, ++ LOONGARCH64AMode* dst, HReg src ) ++{ ++ switch (op) { ++ case LAvecstore_VST: ++ vassert(dst->tag == LAam_RI); ++ *p++ = emit_op_si12_rj_vd(op, dst->LAam.RI.index, ++ iregEnc(dst->LAam.RI.base), vregEnc(src)); ++ return p; ++ case LAvecstore_VSTX: ++ vassert(dst->tag == LAam_RR); ++ *p++ = emit_op_rk_rj_vd(op, iregEnc(dst->LAam.RR.index), ++ iregEnc(dst->LAam.RR.base), vregEnc(src)); ++ return p; ++ default: ++ return NULL; ++ } ++} + -+ /* Call target (an absolute address), on given -+ condition (which could be LAcc_AL). */ -+ LAin_Call, /* call */ ++static inline UInt* mkCas ( UInt* p, HReg old, HReg addr, HReg expd, ++ HReg data, Bool size64 ) ++{ ++ /* ++ ll.[wd] old, addr, 0 ++ bne old, expd, barrier ++ or $t0, data, $zero ++ sc.[wd] $t0, addr, 0 ++ beq $t0, zero, fail ++ or old, expd, $zero ++ b end ++ barrier: ++ dbar 0 ++ fail: ++ or old, data, $zero ++ end: ++ */ ++ UInt o = iregEnc(old); ++ UInt a = iregEnc(addr); ++ UInt e = iregEnc(expd); ++ UInt d = iregEnc(data); ++ UInt t = 12; ++ UInt z = 0; + -+ /* The following 5 insns are mandated by translation chaining */ -+ LAin_XDirect, /* direct transfer to GA */ -+ LAin_XIndir, /* indirect transfer to GA */ -+ LAin_XAssisted, /* assisted transfer to GA */ -+ LAin_EvCheck, /* Event check */ -+ LAin_ProfInc /* 64-bit profile counter increment */ -+} LOONGARCH64InstrTag; ++ if (size64) { ++ *p++ = emit_op_si14_rj_rd(LAllsc_LL_D, 0, a, o); ++ } else { ++ *p++ = emit_op_ui6_rj_rd(LAbin_SLLI_W, 0, e, e); // Sign-extend expd ++ *p++ = emit_op_si14_rj_rd(LAllsc_LL_W, 0, a, o); ++ } ++ *p++ = emit_op_offs16_rj_rd(LAextra_BNE, 6, o, e); ++ *p++ = emit_op_rk_rj_rd(LAbin_OR, z, d, t); ++ if (size64) { ++ *p++ = emit_op_si14_rj_rd(LAllsc_SC_D, 0, a, t); ++ } else { ++ *p++ = emit_op_si14_rj_rd(LAllsc_SC_W, 0, a, t); ++ } ++ *p++ = emit_op_offs16_rj_rd(LAextra_BEQ, 4, t, z); ++ *p++ = emit_op_rk_rj_rd(LAbin_OR, z, e, o); ++ *p++ = emit_op_offs26(LAextra_B, 3); ++ *p++ = emit_op_hint15(LAbar_DBAR, 0); ++ *p++ = emit_op_rk_rj_rd(LAbin_OR, z, d, o); ++ return p; ++} + -+typedef struct { -+ LOONGARCH64InstrTag tag; -+ union { -+ struct { -+ ULong imm; -+ HReg dst; -+ } LI; -+ struct { -+ LOONGARCH64UnOp op; -+ HReg src; -+ HReg dst; -+ } Unary; -+ struct { -+ LOONGARCH64BinOp op; -+ LOONGARCH64RI* src2; -+ HReg src1; -+ HReg dst; -+ } Binary; -+ struct { -+ LOONGARCH64LoadOp op; -+ LOONGARCH64AMode* src; -+ HReg dst; -+ } Load; -+ struct { -+ LOONGARCH64StoreOp op; -+ LOONGARCH64AMode* dst; -+ HReg src; -+ } Store; -+ struct { -+ LOONGARCH64LLSCOp op; -+ Bool isLoad; -+ LOONGARCH64AMode* addr; -+ HReg val; -+ } LLSC; -+ struct { -+ LOONGARCH64BarOp op; -+ UShort hint; -+ } Bar; -+ struct { -+ LOONGARCH64FpUnOp op; -+ HReg src; -+ HReg dst; -+ } FpUnary; -+ struct { -+ LOONGARCH64FpBinOp op; -+ HReg src2; -+ HReg src1; -+ HReg dst; -+ } FpBinary; -+ struct { -+ LOONGARCH64FpTriOp op; -+ HReg src3; -+ HReg src2; -+ HReg src1; -+ HReg dst; -+ } FpTrinary; -+ struct { -+ LOONGARCH64FpLoadOp op; -+ LOONGARCH64AMode* src; -+ HReg dst; -+ } FpLoad; -+ struct { -+ LOONGARCH64FpStoreOp op; -+ LOONGARCH64AMode* dst; -+ HReg src; -+ } FpStore; -+ struct { -+ LOONGARCH64FpMoveOp op; -+ HReg src; -+ HReg dst; -+ } FpMove; -+ struct { -+ LOONGARCH64FpCmpOp op; -+ HReg src2; -+ HReg src1; -+ HReg dst; -+ } FpCmp; -+ struct { -+ HReg old; -+ HReg addr; -+ HReg expd; -+ HReg data; -+ Bool size64; -+ } Cas; -+ struct { -+ LOONGARCH64CondCode cond; -+ HReg dst; -+ HReg src1; -+ HReg src2; -+ } Cmp; -+ struct { -+ HReg cond; -+ HReg r0; -+ HReg r1; -+ HReg dst; -+ Bool isInt; -+ } CMove; -+ struct { -+ HReg cond; -+ Addr64 target; -+ UInt nArgRegs; -+ RetLoc rloc; -+ } Call; -+ struct { -+ Addr64 dstGA; -+ LOONGARCH64AMode* amPC; -+ HReg cond; -+ Bool toFastEP; -+ } XDirect; -+ struct { -+ HReg dstGA; -+ LOONGARCH64AMode* amPC; -+ HReg cond; -+ } XIndir; -+ struct { -+ HReg dstGA; -+ LOONGARCH64AMode* amPC; -+ HReg cond; -+ IRJumpKind jk; -+ } XAssisted; -+ struct { -+ LOONGARCH64AMode* amCounter; -+ LOONGARCH64AMode* amFailAddr; -+ } EvCheck; -+ struct { -+ /* No fields. The address of the counter to inc is -+ installed later, post-translation, by patching it in, -+ as it is not known at translation time. */ -+ } ProfInc; -+ } LAin; -+} LOONGARCH64Instr; -+ -+extern LOONGARCH64Instr* LOONGARCH64Instr_LI ( ULong imm, HReg dst ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_Unary ( LOONGARCH64UnOp op, -+ HReg src, HReg dst ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_Binary ( LOONGARCH64BinOp op, -+ LOONGARCH64RI* src2, -+ HReg src1, HReg dst ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_Load ( LOONGARCH64LoadOp op, -+ LOONGARCH64AMode* src, -+ HReg dst ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_Store ( LOONGARCH64StoreOp op, -+ LOONGARCH64AMode* dst, -+ HReg src ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_LLSC ( LOONGARCH64LLSCOp op, -+ Bool isLoad, -+ LOONGARCH64AMode* addr, -+ HReg val ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_Bar ( LOONGARCH64BarOp op, -+ UShort hint ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_FpUnary ( LOONGARCH64FpUnOp op, -+ HReg src, HReg dst ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_FpBinary ( LOONGARCH64FpBinOp op, -+ HReg src2, HReg src1, -+ HReg dst ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_FpTrinary ( LOONGARCH64FpTriOp op, -+ HReg src3, HReg src2, -+ HReg src1, HReg dst ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_FpLoad ( LOONGARCH64FpLoadOp op, -+ LOONGARCH64AMode* src, -+ HReg dst ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_FpStore ( LOONGARCH64FpStoreOp op, -+ LOONGARCH64AMode* dst, -+ HReg src ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_FpMove ( LOONGARCH64FpMoveOp op, -+ HReg src, HReg dst ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_FpCmp ( LOONGARCH64FpCmpOp op, -+ HReg src2, HReg src1, -+ HReg dst ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_Cas ( HReg old, HReg addr, -+ HReg expd, HReg data, -+ Bool size64 ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_Cmp ( LOONGARCH64CondCode cond, -+ HReg src2, HReg src1, -+ HReg dst ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_CMove ( HReg cond, HReg r0, HReg r1, -+ HReg dst, Bool isInt ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_Call ( HReg cond, Addr64 target, -+ UInt nArgRegs, RetLoc rloc ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_XDirect ( Addr64 dstGA, -+ LOONGARCH64AMode* amPC, -+ HReg cond, Bool toFastEP ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_XIndir ( HReg dstGA, -+ LOONGARCH64AMode* amPC, -+ HReg cond ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_XAssisted ( HReg dstGA, -+ LOONGARCH64AMode* amPC, -+ HReg cond, IRJumpKind jk ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_EvCheck ( LOONGARCH64AMode* amCounter, -+ LOONGARCH64AMode* amFailAddr ); -+extern LOONGARCH64Instr* LOONGARCH64Instr_ProfInc ( void ); -+ -+extern void ppLOONGARCH64Instr ( const LOONGARCH64Instr* i, Bool mode64 ); -+ -+/* Some functions that insulate the register allocator from details -+ of the underlying instruction set. */ -+extern void getRegUsage_LOONGARCH64Instr ( HRegUsage* u, -+ const LOONGARCH64Instr* i, -+ Bool mode64 ); -+extern void mapRegs_LOONGARCH64Instr ( HRegRemap* m, LOONGARCH64Instr* i, -+ Bool mode64 ); -+extern Int emit_LOONGARCH64Instr (/*MB_MOD*/Bool* is_profInc, -+ UChar* buf, -+ Int nbuf, -+ const LOONGARCH64Instr* i, -+ Bool mode64, -+ VexEndness endness_host, -+ const void* disp_cp_chain_me_to_slowEP, -+ const void* disp_cp_chain_me_to_fastEP, -+ const void* disp_cp_xindir, -+ const void* disp_cp_xassisted ); -+ -+extern void genSpill_LOONGARCH64 ( /*OUT*/ HInstr** i1, /*OUT*/ HInstr** i2, -+ HReg rreg, Int offsetB, Bool mode64); -+extern void genReload_LOONGARCH64 ( /*OUT*/ HInstr** i1, /*OUT*/ HInstr** i2, -+ HReg rreg, Int offsetB, Bool mode64); -+extern LOONGARCH64Instr* genMove_LOONGARCH64 ( HReg from, HReg to, -+ Bool mode64 ); ++static inline UInt* mkCmp ( UInt* p, LOONGARCH64CondCode cond, ++ HReg src2, HReg src1, HReg dst ) ++{ ++ UInt d = iregEnc(dst); ++ UInt s1 = iregEnc(src1); ++ UInt s2 = iregEnc(src2); + -+extern const RRegUniverse* getRRegUniverse_LOONGARCH64 ( void ); ++ switch (cond) { ++ case LAcc_EQ: ++ /* ++ xor dst, src1, src2 ++ sltui dst, dst, 1 ++ */ ++ *p++ = emit_op_rk_rj_rd(LAbin_XOR, s2, s1, d); ++ *p++ = emit_op_si12_rj_rd(LAextra_SLTUI, 1, d, d); ++ return p; ++ case LAcc_NE: ++ /* ++ xor dst, src1, src2 ++ sltu dst, $zero, dst ++ */ ++ *p++ = emit_op_rk_rj_rd(LAbin_XOR, s2, s1, d); ++ *p++ = emit_op_rk_rj_rd(LAextra_SLTU, d, 0, d); ++ return p; ++ case LAcc_LT: ++ /* slt dst, src1, src2 */ ++ *p++ = emit_op_rk_rj_rd(LAextra_SLT, s2, s1, d); ++ return p; ++ case LAcc_GE: ++ /* ++ slt dst, src1, src2 ++ sltui dst, dst, 1 ++ */ ++ *p++ = emit_op_rk_rj_rd(LAextra_SLT, s2, s1, d); ++ *p++ = emit_op_si12_rj_rd(LAextra_SLTUI, 1, d, d); ++ return p; ++ case LAcc_LTU: ++ /* sltu dst, src1, src2 */ ++ *p++ = emit_op_rk_rj_rd(LAextra_SLTU, s2, s1, d); ++ return p; ++ case LAcc_GEU: ++ /* ++ sltu dst, src1, src2 ++ sltui dst, dst, 1 ++ */ ++ *p++ = emit_op_rk_rj_rd(LAextra_SLTU, s2, s1, d); ++ *p++ = emit_op_si12_rj_rd(LAextra_SLTUI, 1, d, d); ++ return p; ++ /* No LAcc_AL here. ++ case LAcc_AL: ++ break; ++ */ ++ default: ++ return NULL; ++ } ++} + -+extern HInstrArray* iselSB_LOONGARCH64 ( const IRSB*, -+ VexArch, -+ const VexArchInfo*, -+ const VexAbiInfo*, -+ Int offs_Host_EvC_Counter, -+ Int offs_Host_EvC_FailAddr, -+ Bool chainingAllowed, -+ Bool addProfInc, -+ Addr max_ga ); ++static inline UInt* mkCMove ( UInt* p, HReg cond, HReg r0, ++ HReg r1, HReg dst, Bool isInt ) ++{ ++ if (isInt) { ++ /* ++ masknez $t0, r0, cond ++ maskeqz dst, r1, cond ++ or dst, $t0, dst ++ */ ++ UInt c = iregEnc(cond); ++ UInt d = iregEnc(dst); ++ *p++ = emit_op_rk_rj_rd(LAextra_MASKNEZ, c, iregEnc(r0), 12); ++ *p++ = emit_op_rk_rj_rd(LAextra_MASKEQZ, c, iregEnc(r1), d); ++ *p++ = emit_op_rk_rj_rd(LAbin_OR, d, 12, d); ++ } else { ++ /* ++ movgr2cf $fcc0, cond ++ fsel dst, r0, r1, $fcc0 ++ */ ++ *p++ = emit_op_rj_cd(LAextra_MOVGR2CF, iregEnc(cond), 0); ++ *p++ = emit_op_ca_fk_fj_fd(LAextra_FSEL, 0, fregEnc(r1), ++ fregEnc(r0), fregEnc(dst)); ++ } ++ return p; ++} + -+/* How big is an event check? See case for Min_EvCheck in -+ emit_LOONGARCH64Instr just above. That crosschecks what this returns, -+ so we can tell if we're inconsistent. */ -+extern Int evCheckSzB_LOONGARCH64 ( void ); ++static inline UInt* mkCall ( UInt* p, HReg cond, Addr64 target, RetLoc rloc ) ++{ ++ if (!hregIsInvalid(cond) && rloc.pri != RLPri_None) { ++ /* The call might not happen (it isn't unconditional) and ++ it returns a result. In this case we will need to ++ generate a control flow diamond to put 0x555..555 in ++ the return register(s) in the case where the call ++ doesn't happen. If this ever becomes necessary, maybe ++ copy code from the 32-bit ARM equivalent. Until that ++ day, just give up. */ ++ return NULL; ++ } + -+/* NB: what goes on here has to be very closely coordinated with the -+ emitInstr case for XDirect, above. */ -+extern VexInvalRange chainXDirect_LOONGARCH64 ( VexEndness endness_host, -+ void* place_to_chain, -+ const void* disp_cp_chain_me_EXPECTED, -+ const void* place_to_jump_to ); ++ UInt* ptmp = NULL; ++ if (!hregIsInvalid(cond)) { ++ /* Create a hole to put a conditional branch in. We'll ++ patch it once we know the branch length. */ ++ ptmp = p; ++ p++; ++ } + -+/* NB: what goes on here has to be very closely coordinated with the -+ emitInstr case for XDirect, above. */ -+extern VexInvalRange unchainXDirect_LOONGARCH64 ( VexEndness endness_host, -+ void* place_to_unchain, -+ const void* place_to_jump_to_EXPECTED, -+ const void* disp_cp_chain_me ); ++ /* ++ $t0 = target ++ jirl $ra, $t0, 0 ++ */ ++ p = mkLoadImm(p, hregT0(), target); ++ *p++ = emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1); + -+/* Patch the counter address into a profile inc point, as previously -+ created by the Min_ProfInc case for emit_LOONGARCH64Instr. */ -+extern VexInvalRange patchProfInc_LOONGARCH64 ( VexEndness endness_host, -+ void* place_to_patch, -+ const ULong* location_of_counter ); ++ /* Patch the hole if necessary */ ++ if (!hregIsInvalid(cond)) { ++ vassert(ptmp != NULL); ++ UInt offs = (UInt)(p - ptmp); ++ vassert(offs >= 3 && offs <= 6); ++ /* beq cond, $zero, offs */ ++ *ptmp++ = emit_op_offs16_rj_rd(LAextra_BEQ, offs, iregEnc(cond), 0); ++ } + -+#endif /* ndef __VEX_HOST_LOONGARCH64_DEFS_H */ ++ return p; ++} + ++static inline UInt* mkXDirect ( UInt* p, Addr64 dstGA, ++ LOONGARCH64AMode* amPC, ++ HReg cond, Bool toFastEP, ++ const void* disp_cp_chain_me_to_slowEP, ++ const void* disp_cp_chain_me_to_fastEP ) ++{ ++ /* NB: what goes on here has to be very closely coordinated ++ with chainXDirect_LOONGARCH64 and unchainXDirect_LOONGARCH64 below. */ ++ /* We're generating chain-me requests here, so we need to be ++ sure this is actually allowed -- no-redir translations ++ can't use chain-me's. Hence: */ ++ vassert(disp_cp_chain_me_to_slowEP != NULL); ++ vassert(disp_cp_chain_me_to_fastEP != NULL); + -+/*---------------------------------------------------------------*/ -+/*--- end host-loongarch64_defs.h ---*/ -+/*---------------------------------------------------------------*/ -diff --git a/VEX/priv/host_loongarch64_isel.c b/VEX/priv/host_loongarch64_isel.c -new file mode 100644 -index 0000000..0df4f85 ---- /dev/null -+++ b/VEX/priv/host_loongarch64_isel.c -@@ -0,0 +1,2782 @@ ++ /* Use ptmp for backpatching conditional jumps. */ ++ UInt* ptmp = NULL; + -+/*---------------------------------------------------------------*/ -+/*--- begin host_loongarch64_isel.c ---*/ -+/*---------------------------------------------------------------*/ ++ /* First off, if this is conditional, create a conditional ++ jump over the rest of it. Or at least, leave a space for ++ it that we will shortly fill in. */ ++ if (!hregIsInvalid(cond)) { ++ ptmp = p; ++ p++; ++ } + -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. ++ /* Update the guest PC. ++ $t0 = dstGA ++ st.d $t0, amPC ++ */ ++ p = mkLoadImm(p, hregT0(), (ULong)dstGA); ++ p = mkStore(p, LAstore_ST_D, amPC, hregT0()); + -+ Copyright (C) 2021-2022 Loongson Technology Corporation Limited ++ /* --- FIRST PATCHABLE BYTE follows --- */ ++ /* VG_(disp_cp_chain_me_to_{slowEP,fastEP}) (where we're ++ calling to) backs up the return address, so as to find the ++ address of the first patchable byte. So: don't change the ++ number of instructions (5) below. */ ++ /* ++ la $t0, VG_(disp_cp_chain_me_to_{slowEP,fastEP}) ++ jirl $ra, $t0, 0 ++ */ ++ const void* disp_cp_chain_me = toFastEP ? disp_cp_chain_me_to_fastEP ++ : disp_cp_chain_me_to_slowEP; ++ p = mkLoadImm_EXACTLY4(p, hregT0(), (ULong)(Addr)disp_cp_chain_me); ++ *p++ = emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1); ++ /* --- END of PATCHABLE BYTES --- */ + -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. ++ /* Fix up the conditional jump, if there was one. */ ++ if (!hregIsInvalid(cond)) { ++ vassert(ptmp != NULL); ++ UInt offs = (UInt)(p - ptmp); ++ vassert(offs >= 8 && offs <= 11); ++ /* beq cond, $zero, offs */ ++ *ptmp++ = emit_op_offs16_rj_rd(LAextra_BEQ, offs, iregEnc(cond), 0); ++ } + -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details-> ++ return p; ++} + -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, see . ++static inline UInt* mkXIndir ( UInt* p, HReg dstGA, LOONGARCH64AMode* amPC, ++ HReg cond, const void* disp_cp_xindir ) ++{ ++ /* We're generating transfers that could lead indirectly to a ++ chain-me, so we need to be sure this is actually allowed -- ++ no-redir translations are not allowed to reach normal ++ translations without going through the scheduler. That means ++ no XDirects or XIndirs out from no-redir translations. ++ Hence: */ ++ vassert(disp_cp_xindir != NULL); + -+ The GNU General Public License is contained in the file COPYING. -+*/ ++ /* Use ptmp for backpatching conditional jumps. */ ++ UInt* ptmp = NULL; + -+#include "libvex_basictypes.h" -+#include "libvex_ir.h" -+#include "libvex.h" ++ /* First off, if this is conditional, create a conditional ++ jump over the rest of it. */ ++ if (!hregIsInvalid(cond)) { ++ ptmp = p; ++ p++; ++ } + -+#include "main_util.h" -+#include "main_globals.h" -+#include "host_generic_regs.h" -+#include "host_loongarch64_defs.h" ++ /* Update the guest PC. ++ or $t0, dstGA, $zero ++ st.d $t0, amPC ++ */ ++ *p++ = emit_op_rk_rj_rd(LAbin_OR, 0, iregEnc(dstGA), 12); ++ p = mkStore(p, LAstore_ST_D, amPC, hregT0()); + ++ /* ++ la $t0, VG_(disp_cp_xindir) ++ jirl $ra, $t0, 0 ++ */ ++ p = mkLoadImm(p, hregT0(), (ULong)(Addr)disp_cp_xindir); ++ *p++ = emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1); + -+/*---------------------------------------------------------*/ -+/*--- ISelEnv ---*/ -+/*---------------------------------------------------------*/ ++ /* Fix up the conditional jump, if there was one. */ ++ if (!hregIsInvalid(cond)) { ++ vassert(ptmp != NULL); ++ UInt offs = (UInt)(p - ptmp); ++ vassert(offs >= 5 && offs <= 8); ++ /* beq cond, $zero, offs */ ++ *ptmp++ = emit_op_offs16_rj_rd(LAextra_BEQ, offs, iregEnc(cond), 0); ++ } + -+/* This carries around: ++ return p; ++} + -+ - A mapping from IRTemp to IRType, giving the type of any IRTemp we -+ might encounter. This is computed before insn selection starts, -+ and does not change. ++static inline UInt* mkXAssisted ( UInt* p, HReg dstGA, LOONGARCH64AMode* amPC, ++ HReg cond, IRJumpKind jk, ++ const void* disp_cp_xassisted ) ++{ ++ /* First off, if this is conditional, create a conditional jump ++ over the rest of it. Or at least, leave a space for it that ++ we will shortly fill in. */ ++ UInt* ptmp = NULL; ++ if (!hregIsInvalid(cond)) { ++ ptmp = p; ++ p++; ++ } + -+ - A mapping from IRTemp to HReg. This tells the insn selector -+ which virtual register is associated with each IRTemp temporary. -+ This is computed before insn selection starts, and does not -+ change. We expect this mapping to map precisely the same set of -+ IRTemps as the type mapping does. ++ /* Update the guest PC. ++ or $t0, dstGA, $zero ++ st.d $t0, amPC ++ */ ++ *p++ = emit_op_rk_rj_rd(LAbin_OR, 0, iregEnc(dstGA), 12); ++ p = mkStore(p, LAstore_ST_D, amPC, hregT0()); + -+ |vregmap| holds the primary register for the IRTemp. -+ |vregmapHI| is only used for 128-bit integer-typed -+ IRTemps. It holds the identity of a second -+ 64-bit virtual HReg, which holds the high half -+ of the value. -+ -+ - The code array, that is, the insns selected so far. -+ -+ - A counter, for generating new virtual registers. ++ /* li.w $s8, magic_number */ ++ UInt trcval = 0; ++ switch (jk) { ++ case Ijk_Boring: ++ trcval = VEX_TRC_JMP_BORING; ++ break; ++ case Ijk_ClientReq: ++ trcval = VEX_TRC_JMP_CLIENTREQ; ++ break; ++ case Ijk_NoDecode: ++ trcval = VEX_TRC_JMP_NODECODE; ++ break; ++ case Ijk_InvalICache: ++ trcval = VEX_TRC_JMP_INVALICACHE; ++ break; ++ case Ijk_NoRedir: ++ trcval = VEX_TRC_JMP_NOREDIR; ++ break; ++ case Ijk_SigTRAP: ++ trcval = VEX_TRC_JMP_SIGTRAP; ++ break; ++ case Ijk_SigSEGV: ++ trcval = VEX_TRC_JMP_SIGSEGV; ++ break; ++ case Ijk_SigBUS: ++ trcval = VEX_TRC_JMP_SIGBUS; ++ break; ++ case Ijk_SigFPE_IntDiv: ++ trcval = VEX_TRC_JMP_SIGFPE_INTDIV; ++ break; ++ case Ijk_SigFPE_IntOvf: ++ trcval = VEX_TRC_JMP_SIGFPE_INTOVF; ++ break; ++ case Ijk_SigSYS: ++ trcval = VEX_TRC_JMP_SIGSYS; ++ break; ++ case Ijk_Sys_syscall: ++ trcval = VEX_TRC_JMP_SYS_SYSCALL; ++ break; ++ /* We don't expect to see the following being assisted. ++ case Ijk_Call: ++ case Ijk_Ret: ++ case Ijk_Yield: ++ case Ijk_EmWarn: ++ case Ijk_EmFail: ++ case Ijk_MapFail: ++ case Ijk_FlushDCache: ++ case Ijk_SigILL: ++ case Ijk_SigFPE: ++ case Ijk_Sys_int32: ++ case Ijk_Sys_int128: ++ case Ijk_Sys_int129: ++ case Ijk_Sys_int130: ++ case Ijk_Sys_int145: ++ case Ijk_Sys_int210: ++ case Ijk_Sys_sysenter: ++ */ ++ default: ++ ppIRJumpKind(jk); ++ vpanic("emit_LOONGARCH64Instr.LAin_XAssisted: unexpected jump kind"); ++ } ++ vassert(trcval != 0); ++ p = mkLoadImm(p, hregGSP(), trcval); + -+ - The host hardware capabilities word. This is set at the start -+ and does not change. ++ /* ++ la $t0, VG_(disp_cp_xassisted) ++ jirl $ra, $t0, 0 ++ */ ++ p = mkLoadImm(p, hregT0(), (ULong)(Addr)disp_cp_xassisted); ++ *p++ = emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1); + -+ - A Bool for indicating whether we may generate chain-me -+ instructions for control flow transfers, or whether we must use -+ XAssisted. ++ /* Fix up the conditional jump, if there was one. */ ++ if (!hregIsInvalid(cond)) { ++ vassert(ptmp != NULL); ++ UInt offs = (UInt)(p - ptmp); ++ vassert(offs >= 6 && offs <= 12); ++ /* beq cond, $zero, offs */ ++ *ptmp++ = emit_op_offs16_rj_rd(LAextra_BEQ, offs, iregEnc(cond), 0); ++ } + -+ - The maximum guest address of any guest insn in this block. -+ Actually, the address of the highest-addressed byte from any insn -+ in this block. Is set at the start and does not change. This is -+ used for detecting jumps which are definitely forward-edges from -+ this block, and therefore can be made (chained) to the fast entry -+ point of the destination, thereby avoiding the destination's -+ event check. ++ return p; ++} + -+ - An IRExpr*, which may be NULL, holding the IR expression (an -+ IRRoundingMode-encoded value) to which the FPU's rounding mode -+ was most recently set. Setting to NULL is always safe. Used to -+ avoid redundant settings of the FPU's rounding mode, as -+ described in set_FPCR_rounding_mode below. ++static inline UInt* mkEvCheck ( UInt* p, LOONGARCH64AMode* amCounter, ++ LOONGARCH64AMode* amFailAddr ) ++{ ++ UInt* p0 = p; + -+ Note, this is all (well, mostly) host-independent. -+*/ ++ /* ++ ld.w $t0, amCounter ++ addi.d $t0, $t0, -1 ++ st.w $t0, amCounter ++ bge $t0, $zero, nofail ++ ld.d $t0, amFailAddr ++ jirl $ra, $t0, 0 ++ nofail: ++ */ ++ p = mkLoad(p, LAload_LD_W, amCounter, hregT0()); ++ *p++ = emit_op_si12_rj_rd(LAbin_ADDI_D, -1 & 0xfff, 12, 12); ++ p = mkStore(p, LAstore_ST_W, amCounter, hregT0()); ++ *p++ = emit_op_offs16_rj_rd(LAextra_BGE, 3, 12, 0); ++ p = mkLoad(p, LAload_LD_W, amFailAddr, hregT0()); ++ *p++ = emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1); + -+typedef -+ struct { -+ /* Constant -- are set at the start and do not change. */ -+ IRTypeEnv* type_env; ++ /* Crosscheck */ ++ vassert(evCheckSzB_LOONGARCH64() == (UChar*)p - (UChar*)p0); ++ return p; ++} + -+ HReg* vregmap; -+ HReg* vregmapHI; -+ Int n_vregmap; ++static inline UInt* mkProfInc ( UInt* p ) ++{ ++ /* ++ li $t0, 0x6555755585559555UL ++ ld.d $t1, $t0, 0 ++ addi.d $t1, $t1, 1 ++ st.d $t1, $t0, 0 ++ */ ++ p = mkLoadImm_EXACTLY4(p, hregT0(), 0x6555755585559555UL); ++ *p++ = emit_op_si12_rj_rd(LAload_LD_D, 0, 12, 13); ++ *p++ = emit_op_si12_rj_rd(LAbin_ADDI_D, 1, 13, 13); ++ *p++ = emit_op_si12_rj_rd(LAstore_ST_D, 0, 12, 13); ++ return p; ++} + -+ UInt hwcaps; ++/* Emit an instruction into buf and return the number of bytes used. ++ Note that buf is not the insn's final place, and therefore it is ++ imperative to emit position-independent code. If the emitted ++ instruction was a profiler inc, set *is_profInc to True, else ++ leave it unchanged. */ ++Int emit_LOONGARCH64Instr ( /*MB_MOD*/Bool* is_profInc, ++ UChar* buf, ++ Int nbuf, ++ const LOONGARCH64Instr* i, ++ Bool mode64, ++ VexEndness endness_host, ++ const void* disp_cp_chain_me_to_slowEP, ++ const void* disp_cp_chain_me_to_fastEP, ++ const void* disp_cp_xindir, ++ const void* disp_cp_xassisted ) ++{ ++ vassert(mode64 == True); + -+ Bool chainingAllowed; -+ Addr64 max_ga; ++ UInt* p = (UInt*)buf; ++ vassert(nbuf >= 32); ++ vassert((((HWord)buf) & 3) == 0); + -+ /* These are modified as we go along. */ -+ HInstrArray* code; -+ Int vreg_ctr; ++ switch (i->tag) { ++ case LAin_LI: ++ p = mkLoadImm(p, i->LAin.LI.dst, i->LAin.LI.imm); ++ break; ++ case LAin_Un: ++ p = mkUnary(p, i->LAin.Unary.op, i->LAin.Unary.src, ++ i->LAin.Unary.dst); ++ break; ++ case LAin_Bin: ++ p = mkBinary(p, i->LAin.Binary.op, i->LAin.Binary.src2, ++ i->LAin.Binary.src1, i->LAin.Binary.dst); ++ break; ++ case LAin_Load: ++ p = mkLoad(p, i->LAin.Load.op, i->LAin.Load.src, ++ i->LAin.Load.dst); ++ break; ++ case LAin_Store: ++ p = mkStore(p, i->LAin.Store.op, i->LAin.Store.dst, ++ i->LAin.Store.src); ++ break; ++ case LAin_LLSC: ++ p = mkLLSC(p, i->LAin.LLSC.op, i->LAin.LLSC.addr, i->LAin.LLSC.val); ++ break; ++ case LAin_Bar: ++ p = mkBar(p, i->LAin.Bar.op, i->LAin.Bar.hint); ++ break; ++ case LAin_FpUn: ++ p = mkFpUnary(p, i->LAin.FpUnary.op, i->LAin.FpUnary.src, ++ i->LAin.FpUnary.dst); ++ break; ++ case LAin_FpBin: ++ p = mkFpBinary(p, i->LAin.FpBinary.op, i->LAin.FpBinary.src2, ++ i->LAin.FpBinary.src1, i->LAin.FpBinary.dst); ++ break; ++ case LAin_FpTri: ++ p = mkFpTrinary(p, i->LAin.FpTrinary.op, i->LAin.FpTrinary.src3, ++ i->LAin.FpTrinary.src2, i->LAin.FpTrinary.src1, ++ i->LAin.FpTrinary.dst); ++ break; ++ case LAin_FpLoad: ++ p = mkFpLoad(p, i->LAin.FpLoad.op, i->LAin.FpLoad.src, ++ i->LAin.FpLoad.dst); ++ break; ++ case LAin_FpStore: ++ p = mkFpStore(p, i->LAin.FpStore.op, i->LAin.FpStore.dst, ++ i->LAin.FpStore.src); ++ break; ++ case LAin_FpMove: ++ p = mkFpMove(p, i->LAin.FpMove.op, i->LAin.FpMove.src, ++ i->LAin.FpMove.dst); ++ break; ++ case LAin_FpCmp: ++ p = mkFpCmp(p, i->LAin.FpCmp.op, i->LAin.FpCmp.src2, ++ i->LAin.FpCmp.src1, i->LAin.FpCmp.dst); ++ break; ++ case LAin_VecUn: ++ p = mkVecUnary(p, i->LAin.VecUnary.op, i->LAin.VecUnary.src, ++ i->LAin.VecUnary.dst); ++ break; ++ case LAin_VecBin: ++ p = mkVecBinary(p, i->LAin.VecBinary.op, i->LAin.VecBinary.src2, ++ i->LAin.VecBinary.src1, i->LAin.VecBinary.dst); ++ break; ++ case LAin_VecLoad: ++ p = mkVecLoad(p, i->LAin.VecLoad.op, i->LAin.VecLoad.src, ++ i->LAin.VecLoad.dst); ++ break; ++ case LAin_VecStore: ++ p = mkVecStore(p, i->LAin.VecStore.op, i->LAin.VecStore.dst, ++ i->LAin.VecStore.src); ++ break; ++ case LAin_Cas: ++ p = mkCas(p, i->LAin.Cas.old, i->LAin.Cas.addr, i->LAin.Cas.expd, ++ i->LAin.Cas.data, i->LAin.Cas.size64); ++ break; ++ case LAin_Cmp: ++ p = mkCmp(p, i->LAin.Cmp.cond, i->LAin.Cmp.src2, ++ i->LAin.Cmp.src1, i->LAin.Cmp.dst); ++ break; ++ case LAin_CMove: ++ p = mkCMove(p, i->LAin.CMove.cond, i->LAin.CMove.r0, ++ i->LAin.CMove.r1, i->LAin.CMove.dst, ++ i->LAin.CMove.isInt); ++ break; ++ case LAin_Call: ++ p = mkCall(p, i->LAin.Call.cond, i->LAin.Call.target, ++ i->LAin.Call.rloc); ++ break; ++ case LAin_XDirect: ++ p = mkXDirect(p, i->LAin.XDirect.dstGA, i->LAin.XDirect.amPC, ++ i->LAin.XDirect.cond, i->LAin.XDirect.toFastEP, ++ disp_cp_chain_me_to_slowEP, ++ disp_cp_chain_me_to_fastEP); ++ break; ++ case LAin_XIndir: ++ p = mkXIndir(p, i->LAin.XIndir.dstGA, i->LAin.XIndir.amPC, ++ i->LAin.XIndir.cond, disp_cp_xindir); ++ break; ++ case LAin_XAssisted: ++ p = mkXAssisted(p, i->LAin.XAssisted.dstGA, i->LAin.XAssisted.amPC, ++ i->LAin.XAssisted.cond, i->LAin.XAssisted.jk, ++ disp_cp_xassisted); ++ break; ++ case LAin_EvCheck: ++ p = mkEvCheck(p, i->LAin.EvCheck.amCounter, ++ i->LAin.EvCheck.amFailAddr); ++ break; ++ case LAin_ProfInc: ++ p = mkProfInc(p); ++ break; ++ default: ++ p = NULL; ++ break; + } -+ ISelEnv; + ++ if (p == NULL) { ++ ppLOONGARCH64Instr(i, True); ++ vpanic("emit_LOONGARCH64Instr"); ++ /*NOTREACHED*/ ++ } + -+static HReg lookupIRTemp ( ISelEnv* env, IRTemp tmp ) -+{ -+ vassert(tmp >= 0); -+ vassert(tmp < env->n_vregmap); -+ return env->vregmap[tmp]; ++ vassert(((UChar*)p) - &buf[0] <= 48); ++ return ((UChar*)p) - &buf[0]; +} + -+static void lookupIRTempPair ( HReg* vrHI, HReg* vrLO, -+ ISelEnv* env, IRTemp tmp ) ++/* How big is an event check? See case for mkEvCheck just above. That ++ crosschecks what this returns, so we can tell if we're inconsistent. */ ++Int evCheckSzB_LOONGARCH64 ( void ) +{ -+ vassert(tmp < env->n_vregmap); -+ vassert(!hregIsInvalid(env->vregmapHI[tmp])); -+ *vrLO = env->vregmap[tmp]; -+ *vrHI = env->vregmapHI[tmp]; ++ return 6 * 4; // 6 insns +} + -+static void addInstr ( ISelEnv* env, LOONGARCH64Instr* instr ) ++/* NB: what goes on here has to be very closely coordinated with the ++ emitInstr case for XDirect, above. */ ++VexInvalRange chainXDirect_LOONGARCH64 ( VexEndness endness_host, ++ void* place_to_chain, ++ const void* disp_cp_chain_me_EXPECTED, ++ const void* place_to_jump_to ) +{ -+ addHInstr(env->code, instr); -+ if (vex_traceflags & VEX_TRACE_VCODE) { -+ ppLOONGARCH64Instr(instr, True); -+ vex_printf("\n"); -+ } ++ vassert(endness_host == VexEndnessLE); ++ ++ /* What we're expecting to see is: ++ * la $t0, disp_cp_chain_me_to_EXPECTED ++ * jirl $ra, $t0, 0 ++ * viz ++ * <16 bytes generated by mkLoadImm_EXACTLY4> ++ * jirl $ra, $t0, 0 ++ */ ++ UInt* p = (UInt*)place_to_chain; ++ vassert(((HWord)p & 3) == 0); ++ vassert(is_LoadImm_EXACTLY4(p, hregT0(), (ULong)(Addr)disp_cp_chain_me_EXPECTED)); ++ vassert(p[4] == emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1)); ++ ++ /* And what we want to change it to is: ++ * la $t0, place_to_jump_to ++ * jirl $ra, $t0, 0 ++ * viz ++ * <16 bytes generated by mkLoadImm_EXACTLY4> ++ * jirl $ra, $t0, 0 ++ * ++ * The replacement has the same length as the original. ++ */ ++ p = mkLoadImm_EXACTLY4(p, hregT0(), (ULong)(Addr)place_to_jump_to); ++ *p++ = emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1); ++ ++ VexInvalRange vir = { (HWord)place_to_chain, 4 * 4 + 4 }; ++ return vir; +} + -+static HReg newVRegI ( ISelEnv* env ) ++/* NB: what goes on here has to be very closely coordinated with the ++ emitInstr case for XDirect, above. */ ++VexInvalRange unchainXDirect_LOONGARCH64 ( VexEndness endness_host, ++ void* place_to_unchain, ++ const void* place_to_jump_to_EXPECTED, ++ const void* disp_cp_chain_me ) +{ -+ HReg reg = mkHReg(True/*virtual reg*/, HRcInt64, 0, env->vreg_ctr); -+ env->vreg_ctr++; -+ return reg; ++ vassert(endness_host == VexEndnessLE); ++ ++ /* What we're expecting to see is: ++ * la $t0, place_to_jump_to_EXPECTED ++ * jirl $ra, $t0, 0 ++ * viz ++ * <16 bytes generated by mkLoadImm_EXACTLY4> ++ * jirl $ra, $t0, 0 ++ */ ++ UInt* p = (UInt*)place_to_unchain; ++ vassert(((HWord)p & 3) == 0); ++ vassert(is_LoadImm_EXACTLY4(p, hregT0(), (ULong)(Addr)place_to_jump_to_EXPECTED)); ++ vassert(p[4] == emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1)); ++ ++ /* And what we want to change it to is: ++ * la $t0, disp_cp_chain_me ++ * jirl $ra, $t0, 0 ++ * viz ++ * <16 bytes generated by mkLoadImm_EXACTLY4> ++ * jirl $ra, $t0, 0 ++ * ++ * The replacement has the same length as the original. ++ */ ++ p = mkLoadImm_EXACTLY4(p, hregT0(), (ULong)(Addr)disp_cp_chain_me); ++ *p++ = emit_op_offs16_rj_rd(LAextra_JIRL, 0, 12, 1); ++ ++ VexInvalRange vir = { (HWord)place_to_unchain, 4 * 4 + 4 }; ++ return vir; +} + -+static HReg newVRegF ( ISelEnv* env ) ++/* Patch the counter address into a profile inc point, as previously ++ created by the mkProfInc. */ ++VexInvalRange patchProfInc_LOONGARCH64 ( VexEndness endness_host, ++ void* place_to_patch, ++ const ULong* location_of_counter ) +{ -+ HReg reg = mkHReg(True/*virtual reg*/, HRcFlt64, 0, env->vreg_ctr); -+ env->vreg_ctr++; -+ return reg; -+} ++ vassert(endness_host == VexEndnessLE); ++ vassert(sizeof(ULong*) == 8); + ++ /* ++ $t0 = NotKnownYet ++ ld.d $t1, $t0, 0 ++ addi.d $t1, $t1, 1 ++ st.d $t1, $t0, 0 ++ */ ++ UInt* p = (UInt*)place_to_patch; ++ vassert(((HWord)p & 3) == 0); ++ vassert(is_LoadImm_EXACTLY4(p, hregT0(), 0x6555755585559555UL)); ++ vassert(p[4] == emit_op_si12_rj_rd(LAload_LD_D, 0, 12, 13)); ++ vassert(p[5] == emit_op_si12_rj_rd(LAbin_ADDI_D, 1, 13, 13)); ++ vassert(p[6] == emit_op_si12_rj_rd(LAstore_ST_D, 0, 12, 13)); + -+/*---------------------------------------------------------*/ -+/*--- ISEL: Forward declarations ---*/ -+/*---------------------------------------------------------*/ ++ p = mkLoadImm_EXACTLY4(p, hregT0(), (ULong)(Addr)location_of_counter); + -+/* These are organised as iselXXX and iselXXX_wrk pairs. The -+ iselXXX_wrk do the real work, but are not to be called directly. -+ For each XXX, iselXXX calls its iselXXX_wrk counterpart, then -+ checks that all returned registers are virtual. You should not -+ call the _wrk version directly. -+*/ ++ VexInvalRange vir = { (HWord)place_to_patch, 4 * 4 }; ++ return vir; ++} + -+static LOONGARCH64AMode* iselIntExpr_AMode_wrk ( ISelEnv* env, -+ IRExpr* e, IRType dty ); -+static LOONGARCH64AMode* iselIntExpr_AMode ( ISelEnv* env, -+ IRExpr* e, IRType dty ); + -+static LOONGARCH64RI* iselIntExpr_RI_wrk ( ISelEnv* env, IRExpr* e, -+ UChar size, Bool isSigned ); -+static LOONGARCH64RI* iselIntExpr_RI ( ISelEnv* env, IRExpr* e, -+ UChar size, Bool isSigned ); ++/*---------------------------------------------------------------*/ ++/*--- end host_loongarch64_defs.c ---*/ ++/*---------------------------------------------------------------*/ +diff --git a/VEX/priv/host_loongarch64_defs.h b/VEX/priv/host_loongarch64_defs.h +new file mode 100644 +index 0000000..acf38b1 +--- /dev/null ++++ b/VEX/priv/host_loongarch64_defs.h +@@ -0,0 +1,919 @@ + -+static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e ); -+static HReg iselIntExpr_R ( ISelEnv* env, IRExpr* e ); ++/*---------------------------------------------------------------*/ ++/*--- begin host_loongarch64_defs.h ---*/ ++/*---------------------------------------------------------------*/ + -+static HReg iselCondCode_R_wrk ( ISelEnv* env, IRExpr* e ); -+static HReg iselCondCode_R ( ISelEnv* env, IRExpr* e ); ++/* ++ This file is part of Valgrind, a dynamic binary instrumentation ++ framework. + -+static void iselInt128Expr_wrk ( HReg* hi, HReg* lo, -+ ISelEnv* env, IRExpr* e ); -+static void iselInt128Expr ( HReg* hi, HReg* lo, -+ ISelEnv* env, IRExpr* e ); ++ Copyright (C) 2021-2022 Loongson Technology Corporation Limited + -+static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e ); -+static HReg iselFltExpr ( ISelEnv* env, IRExpr* e ); ++ This program is free software; you can redistribute it and/or ++ modify it under the terms of the GNU General Public License as ++ published by the Free Software Foundation; either version 2 of the ++ License, or (at your option) any later version. + ++ This program is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. + -+/*---------------------------------------------------------*/ -+/*--- ISEL: Misc helpers ---*/ -+/*---------------------------------------------------------*/ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, see . + -+/* Generate move insn */ -+static LOONGARCH64Instr* LOONGARCH64Instr_Move ( HReg to, HReg from ) -+{ -+ LOONGARCH64RI *ri = LOONGARCH64RI_R(hregZERO()); -+ return LOONGARCH64Instr_Binary(LAbin_OR, ri, from, to); -+} ++ The GNU General Public License is contained in the file COPYING. ++*/ + -+/* Generate LOONGARCH64AMode from HReg and UInt */ -+static LOONGARCH64AMode* mkLOONGARCH64AMode_RI ( HReg reg, UInt imm ) -+{ -+ vassert(imm < (1 << 12)); -+ return LOONGARCH64AMode_RI(reg, (UShort)imm); -+} ++#ifndef __VEX_HOST_LOONGARCH64_DEFS_H ++#define __VEX_HOST_LOONGARCH64_DEFS_H + -+/* Set floating point rounding mode */ -+static void set_rounding_mode ( ISelEnv* env, IRExpr* mode ) -+{ -+ /* -+ rounding mode | LOONGARCH | IR -+ ------------------------------ -+ to nearest | 00 | 00 -+ to zero | 01 | 11 -+ to +infinity | 10 | 10 -+ to -infinity | 11 | 01 -+ */ ++#include "libvex_basictypes.h" ++#include "libvex.h" /* VexArch */ ++#include "host_generic_regs.h" /* HReg */ + -+ /* rm = XOR(rm, (rm << 1)) & 3 */ -+ HReg rm = iselIntExpr_R(env, mode); -+ HReg tmp = newVRegI(env); -+ LOONGARCH64RI* ri = LOONGARCH64RI_I(1, 5, False); -+ LOONGARCH64RI* ri2 = LOONGARCH64RI_R(rm); -+ LOONGARCH64RI* ri3 = LOONGARCH64RI_I(3, 12, False); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_W, ri, rm, tmp)); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_XOR, ri2, tmp, rm)); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ANDI, ri3, rm, rm)); + -+ /* Save old value of FCSR3 */ -+ HReg fcsr = newVRegI(env); -+ addInstr(env, LOONGARCH64Instr_FpMove(LAfpmove_MOVFCSR2GR, -+ hregLOONGARCH64_FCSR3(), fcsr)); ++/* --------- Registers. --------- */ + -+ /* Store old FCSR3 to stack */ -+ LOONGARCH64RI* ri4 = LOONGARCH64RI_I(-4 & 0xfff, 12, True); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ADDI_D, ri4, hregSP(), hregSP())); -+ LOONGARCH64AMode* am = LOONGARCH64AMode_RI(hregSP(), 0); -+ addInstr(env, LOONGARCH64Instr_Store(LAstore_ST_W, am, fcsr)); ++#define ST_IN static inline + -+ /* Set new value of FCSR3 */ -+ LOONGARCH64RI* ri5 = LOONGARCH64RI_I(8, 5, False); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_W, ri5, rm, rm)); -+ addInstr(env, LOONGARCH64Instr_FpMove(LAfpmove_MOVGR2FCSR, -+ rm, hregLOONGARCH64_FCSR3())); -+} -+ -+static void set_rounding_mode_default ( ISelEnv* env ) -+{ -+ /* Load old FCSR3 from stack */ -+ HReg fcsr = newVRegI(env); -+ LOONGARCH64AMode* am = LOONGARCH64AMode_RI(hregSP(), 0); -+ addInstr(env, LOONGARCH64Instr_Load(LAload_LD_WU, am, fcsr)); -+ -+ /* Restore SP */ -+ LOONGARCH64RI* ri = LOONGARCH64RI_I(4, 12, True); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ADDI_D, ri, hregSP(), hregSP())); -+ -+ /* Set new value of FCSR3 */ -+ addInstr(env, LOONGARCH64Instr_FpMove(LAfpmove_MOVGR2FCSR, -+ fcsr, hregLOONGARCH64_FCSR3())); -+} ++/* Integer static registers */ ++ST_IN HReg hregLOONGARCH64_R23 ( void ) { return mkHReg(False, HRcInt64, 23, 0); } ++ST_IN HReg hregLOONGARCH64_R24 ( void ) { return mkHReg(False, HRcInt64, 24, 1); } ++ST_IN HReg hregLOONGARCH64_R25 ( void ) { return mkHReg(False, HRcInt64, 25, 2); } ++ST_IN HReg hregLOONGARCH64_R26 ( void ) { return mkHReg(False, HRcInt64, 26, 3); } ++ST_IN HReg hregLOONGARCH64_R27 ( void ) { return mkHReg(False, HRcInt64, 27, 4); } ++ST_IN HReg hregLOONGARCH64_R28 ( void ) { return mkHReg(False, HRcInt64, 28, 5); } ++ST_IN HReg hregLOONGARCH64_R29 ( void ) { return mkHReg(False, HRcInt64, 29, 6); } ++ST_IN HReg hregLOONGARCH64_R30 ( void ) { return mkHReg(False, HRcInt64, 30, 7); } ++/* $r31 is used as guest stack pointer */ + -+/* Convert LOONGARCH FCMP cond to IR result */ -+static HReg convert_cond_to_IR ( ISelEnv* env, HReg src2, HReg src1, Bool size64 ) -+{ -+ HReg tmp = newVRegI(env); -+ HReg dst = newVRegI(env); ++/* Integer temporary registers */ ++/* $r12 is used as a chaining/ProfInc/Cmove/genSpill/genReload temporary */ ++/* $r13 is used as a ProfInc temporary */ ++ST_IN HReg hregLOONGARCH64_R14 ( void ) { return mkHReg(False, HRcInt64, 14, 8); } ++ST_IN HReg hregLOONGARCH64_R15 ( void ) { return mkHReg(False, HRcInt64, 15, 9); } ++ST_IN HReg hregLOONGARCH64_R16 ( void ) { return mkHReg(False, HRcInt64, 16, 10); } ++ST_IN HReg hregLOONGARCH64_R17 ( void ) { return mkHReg(False, HRcInt64, 17, 11); } ++ST_IN HReg hregLOONGARCH64_R18 ( void ) { return mkHReg(False, HRcInt64, 18, 12); } ++ST_IN HReg hregLOONGARCH64_R19 ( void ) { return mkHReg(False, HRcInt64, 19, 13); } ++ST_IN HReg hregLOONGARCH64_R20 ( void ) { return mkHReg(False, HRcInt64, 20, 14); } + -+ LOONGARCH64RI* ri1 = LOONGARCH64RI_I(63, 6, False); -+ LOONGARCH64RI* ri2 = LOONGARCH64RI_I(0x45, 12, False); -+ if (size64) -+ addInstr(env, LOONGARCH64Instr_FpCmp(LAfpcmp_FCMP_CUN_D, src2, src1, tmp)); -+ else -+ addInstr(env, LOONGARCH64Instr_FpCmp(LAfpcmp_FCMP_CUN_S, src2, src1, tmp)); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_D, ri1, tmp, tmp)); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SRAI_D, ri1, tmp, tmp)); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ANDI, ri2, tmp, dst)); ++/* Floating point static registers */ ++ST_IN HReg hregLOONGARCH64_F24 ( void ) { return mkHReg(False, HRcFlt64, 24, 15); } ++ST_IN HReg hregLOONGARCH64_F25 ( void ) { return mkHReg(False, HRcFlt64, 25, 16); } ++ST_IN HReg hregLOONGARCH64_F26 ( void ) { return mkHReg(False, HRcFlt64, 26, 17); } ++ST_IN HReg hregLOONGARCH64_F27 ( void ) { return mkHReg(False, HRcFlt64, 27, 18); } ++ST_IN HReg hregLOONGARCH64_F28 ( void ) { return mkHReg(False, HRcFlt64, 28, 19); } ++ST_IN HReg hregLOONGARCH64_F29 ( void ) { return mkHReg(False, HRcFlt64, 29, 20); } ++ST_IN HReg hregLOONGARCH64_F30 ( void ) { return mkHReg(False, HRcFlt64, 30, 21); } ++ST_IN HReg hregLOONGARCH64_F31 ( void ) { return mkHReg(False, HRcFlt64, 31, 22); } + -+ LOONGARCH64RI* ri3 = LOONGARCH64RI_I(0x1, 12, False); -+ LOONGARCH64RI* ri4 = LOONGARCH64RI_R(tmp); -+ if (size64) -+ addInstr(env, LOONGARCH64Instr_FpCmp(LAfpcmp_FCMP_CLT_D, src2, src1, tmp)); -+ else -+ addInstr(env, LOONGARCH64Instr_FpCmp(LAfpcmp_FCMP_CLT_S, src2, src1, tmp)); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_D, ri1, tmp, tmp)); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SRAI_D, ri1, tmp, tmp)); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ANDI, ri3, tmp, tmp)); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_OR, ri4, dst, dst)); ++/* Vector static registers */ ++ST_IN HReg hregLOONGARCH64_V24 ( void ) { return mkHReg(False, HRcVec128, 24, 23); } ++ST_IN HReg hregLOONGARCH64_V25 ( void ) { return mkHReg(False, HRcVec128, 25, 24); } ++ST_IN HReg hregLOONGARCH64_V26 ( void ) { return mkHReg(False, HRcVec128, 26, 25); } ++ST_IN HReg hregLOONGARCH64_V27 ( void ) { return mkHReg(False, HRcVec128, 27, 26); } ++ST_IN HReg hregLOONGARCH64_V28 ( void ) { return mkHReg(False, HRcVec128, 28, 27); } ++ST_IN HReg hregLOONGARCH64_V29 ( void ) { return mkHReg(False, HRcVec128, 29, 28); } ++ST_IN HReg hregLOONGARCH64_V30 ( void ) { return mkHReg(False, HRcVec128, 30, 29); } ++ST_IN HReg hregLOONGARCH64_V31 ( void ) { return mkHReg(False, HRcVec128, 31, 30); } + -+ LOONGARCH64RI* ri5 = LOONGARCH64RI_I(0x40, 12, False); -+ if (size64) -+ addInstr(env, LOONGARCH64Instr_FpCmp(LAfpcmp_FCMP_CEQ_D, src2, src1, tmp)); -+ else -+ addInstr(env, LOONGARCH64Instr_FpCmp(LAfpcmp_FCMP_CEQ_S, src2, src1, tmp)); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_D, ri1, tmp, tmp)); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SRAI_D, ri1, tmp, tmp)); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ANDI, ri5, tmp, tmp)); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_OR, ri4, dst, dst)); ++/* Other Integer registers */ ++ST_IN HReg hregLOONGARCH64_R0 ( void ) { return mkHReg(False, HRcInt64, 0, 31); } ++ST_IN HReg hregLOONGARCH64_R1 ( void ) { return mkHReg(False, HRcInt64, 1, 32); } ++ST_IN HReg hregLOONGARCH64_R2 ( void ) { return mkHReg(False, HRcInt64, 2, 33); } ++ST_IN HReg hregLOONGARCH64_R3 ( void ) { return mkHReg(False, HRcInt64, 3, 34); } ++ST_IN HReg hregLOONGARCH64_R4 ( void ) { return mkHReg(False, HRcInt64, 4, 35); } ++ST_IN HReg hregLOONGARCH64_R5 ( void ) { return mkHReg(False, HRcInt64, 5, 36); } ++ST_IN HReg hregLOONGARCH64_R6 ( void ) { return mkHReg(False, HRcInt64, 6, 37); } ++ST_IN HReg hregLOONGARCH64_R7 ( void ) { return mkHReg(False, HRcInt64, 7, 38); } ++ST_IN HReg hregLOONGARCH64_R8 ( void ) { return mkHReg(False, HRcInt64, 8, 39); } ++ST_IN HReg hregLOONGARCH64_R9 ( void ) { return mkHReg(False, HRcInt64, 9, 40); } ++ST_IN HReg hregLOONGARCH64_R10 ( void ) { return mkHReg(False, HRcInt64, 10, 41); } ++ST_IN HReg hregLOONGARCH64_R11 ( void ) { return mkHReg(False, HRcInt64, 11, 42); } ++ST_IN HReg hregLOONGARCH64_R12 ( void ) { return mkHReg(False, HRcInt64, 12, 43); } ++ST_IN HReg hregLOONGARCH64_R13 ( void ) { return mkHReg(False, HRcInt64, 13, 44); } ++ST_IN HReg hregLOONGARCH64_R21 ( void ) { return mkHReg(False, HRcInt64, 21, 45); } ++ST_IN HReg hregLOONGARCH64_R22 ( void ) { return mkHReg(False, HRcInt64, 22, 46); } ++ST_IN HReg hregLOONGARCH64_R31 ( void ) { return mkHReg(False, HRcInt64, 31, 47); } + -+ return dst; -+} ++/* Special registers */ ++ST_IN HReg hregLOONGARCH64_FCSR3 ( void ) { return mkHReg(False, HRcInt32, 3, 48); } + ++#undef ST_IN + -+/*---------------------------------------------------------*/ -+/*--- ISEL: Function call helpers ---*/ -+/*---------------------------------------------------------*/ ++#define hregZERO() hregLOONGARCH64_R0() ++#define hregSP() hregLOONGARCH64_R3() ++#define hregT0() hregLOONGARCH64_R12() ++#define hregT1() hregLOONGARCH64_R13() ++#define hregGSP() hregLOONGARCH64_R31() + -+/* Used only in doHelperCall. See big comment in doHelperCall re -+ handling of register-parameter args. This function figures out -+ whether evaluation of an expression might require use of a fixed -+ register. If in doubt return True (safe but suboptimal). -+*/ -+static Bool mightRequireFixedRegs ( IRExpr* e ) -+{ -+ if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(e))) { -+ // These are always "safe" -- either a copy of SP in some -+ // arbitrary vreg, or a copy of $r31, respectively. -+ return False; -+ } -+ /* Else it's a "normal" expression. */ -+ switch (e->tag) { -+ case Iex_RdTmp: case Iex_Const: case Iex_Get: -+ return False; -+ default: -+ return True; -+ } -+} ++extern UInt ppHRegLOONGARCH64 ( HReg reg ); + -+/* Do a complete function call. |guard| is a Ity_Bit expression -+ indicating whether or not the call happens. If guard==NULL, the -+ call is unconditional. |retloc| is set to indicate where the -+ return value is after the call. The caller (of this fn) must -+ generate code to add |stackAdjustAfterCall| to the stack pointer -+ after the call is done. Returns True iff it managed to handle this -+ combination of arg/return types, else returns False. */ -+static Bool doHelperCall( /*OUT*/UInt* stackAdjustAfterCall, -+ /*OUT*/RetLoc* retloc, -+ ISelEnv* env, -+ IRExpr* guard, -+ IRCallee* cee, IRType retTy, IRExpr** args ) -+{ -+ HReg cond; -+ HReg argregs[LOONGARCH64_N_ARGREGS]; -+ HReg tmpregs[LOONGARCH64_N_ARGREGS]; -+ Bool go_fast; -+ Int n_args, i, nextArgReg; -+ Addr64 target; ++/* Number of registers used arg passing in function calls */ ++#define LOONGARCH64_N_ARGREGS 8 /* a0 ... a7 */ + -+ vassert(LOONGARCH64_N_ARGREGS == 8); + -+ /* Set default returns. We'll update them later if needed. */ -+ *stackAdjustAfterCall = 0; -+ *retloc = mk_RetLoc_INVALID(); ++/* --------- Condition codes, LOONGARCH64 encoding. --------- */ ++typedef enum { ++ LAcc_EQ = 0, /* equal */ ++ LAcc_NE = 1, /* not equal */ + -+ /* These are used for cross-checking that IR-level constraints on -+ the use of IRExpr_VECRET() and IRExpr_GSPTR() are observed. */ -+ UInt nVECRETs = 0; -+ UInt nGSPTRs = 0; ++ LAcc_LT = 2, /* less than (signed) */ ++ LAcc_GE = 3, /* great equal (signed) */ + -+ /* Marshal args for a call and do the call. ++ LAcc_LTU = 4, /* less than (unsigned) */ ++ LAcc_GEU = 5, /* great equal (unsigned) */ + -+ This function only deals with a tiny set of possibilities, which -+ cover all helpers in practice. The restrictions are that only -+ arguments in registers are supported, hence only -+ LOONGARCH64_N_ARGREGS x 64 integer bits in total can be passed. -+ In fact the only supported arg type is I64. ++ LAcc_AL = 6 /* always (unconditional) */ ++} LOONGARCH64CondCode; + -+ The return type can be I{64,32}. We currently do not add vector -+ support. + -+ |args| may also contain IRExpr_GSPTR(), in which case the -+ value in $r31 is passed as the corresponding argument. ++/* --------- Memory address expressions (amodes). --------- */ + -+ Generating code which is both efficient and correct when -+ parameters are to be passed in registers is difficult, for the -+ reasons elaborated in detail in comments attached to -+ doHelperCall() in priv/host_x86_isel.c. Here, we use a variant -+ of the method described in those comments. ++typedef enum { ++ LAam_RI, /* Reg + Imm (signed 12-bit) */ ++ LAam_RR /* Reg1 + Reg2 */ ++} LOONGARCH64AModeTag; + -+ The problem is split into two cases: the fast scheme and the -+ slow scheme. In the fast scheme, arguments are computed -+ directly into the target (real) registers. This is only safe -+ when we can be sure that computation of each argument will not -+ trash any real registers set by computation of any other -+ argument. ++typedef struct { ++ LOONGARCH64AModeTag tag; ++ union { ++ struct { ++ HReg base; ++ UShort index; ++ } RI; ++ struct { ++ HReg base; ++ HReg index; ++ } RR; ++ } LAam; ++} LOONGARCH64AMode; + -+ In the slow scheme, all args are first computed into vregs, and -+ once they are all done, they are moved to the relevant real -+ regs. This always gives correct code, but it also gives a bunch -+ of vreg-to-rreg moves which are usually redundant but are hard -+ for the register allocator to get rid of. ++extern LOONGARCH64AMode* LOONGARCH64AMode_RI ( HReg reg, UShort imm ); ++extern LOONGARCH64AMode* LOONGARCH64AMode_RR ( HReg base, HReg index ); + -+ To decide which scheme to use, all argument expressions are -+ first examined. If they are all so simple that it is clear they -+ will be evaluated without use of any fixed registers, use the -+ fast scheme, else use the slow scheme. Note also that only -+ unconditional calls may use the fast scheme, since having to -+ compute a condition expression could itself trash real -+ registers. + -+ Note this requires being able to examine an expression and -+ determine whether or not evaluation of it might use a fixed -+ register. That requires knowledge of how the rest of this insn -+ selector works. Currently just the following 3 are regarded as -+ safe -- hopefully they cover the majority of arguments in -+ practice: IRExpr_Tmp IRExpr_Const IRExpr_Get. -+ */ ++/* --------- Operand, which can be reg or imm. --------- */ + -+ /* LOONGARCH64 calling convention: up to eight registers ($a0 ... $a7) -+ are allowed to be used for passing integer arguments. They correspond -+ to regs $r4 ... $r11. Note that the cee->regparms field is meaningless -+ on LOONGARCH64 host (since we only implement one calling convention) -+ and so we always ignore it. */ ++typedef enum { ++ LAri_Reg, ++ LAri_Imm ++} LOONGARCH64RITag; + -+ n_args = 0; -+ for (i = 0; args[i]; i++) { -+ IRExpr* arg = args[i]; -+ if (UNLIKELY(arg->tag == Iex_VECRET)) { -+ nVECRETs++; -+ } else if (UNLIKELY(arg->tag == Iex_GSPTR)) { -+ nGSPTRs++; -+ } -+ n_args++; -+ } ++typedef struct { ++ LOONGARCH64RITag tag; ++ union { ++ struct { ++ HReg reg; ++ } R; ++ struct { ++ UShort imm; ++ UChar size; // size == 5 || size == 6 || size == 12 ++ Bool isSigned; ++ } I; ++ } LAri; ++} LOONGARCH64RI; + -+ if (n_args > LOONGARCH64_N_ARGREGS) { -+ vpanic("doHelperCall(loongarch64): cannot currently handle > 8 args"); -+ } ++extern LOONGARCH64RI* LOONGARCH64RI_R ( HReg reg ); ++extern LOONGARCH64RI* LOONGARCH64RI_I ( UShort imm, UChar size, Bool isSigned ); + -+ argregs[0] = hregLOONGARCH64_R4(); -+ argregs[1] = hregLOONGARCH64_R5(); -+ argregs[2] = hregLOONGARCH64_R6(); -+ argregs[3] = hregLOONGARCH64_R7(); -+ argregs[4] = hregLOONGARCH64_R8(); -+ argregs[5] = hregLOONGARCH64_R9(); -+ argregs[6] = hregLOONGARCH64_R10(); -+ argregs[7] = hregLOONGARCH64_R11(); + -+ tmpregs[0] = tmpregs[1] = tmpregs[2] = tmpregs[3] = INVALID_HREG; -+ tmpregs[4] = tmpregs[5] = tmpregs[6] = tmpregs[7] = INVALID_HREG; ++/* --------- Instructions. --------- */ + -+ /* First decide which scheme (slow or fast) is to be used. First assume the -+ fast scheme, and select slow if any contraindications (wow) appear. */ ++/* Tags for unary operations */ ++typedef enum { ++ LAun_CLZ_W = 0x00001400, ++ LAun_CTZ_W = 0x00001c00, ++ LAun_CLZ_D = 0x00002400, ++ LAun_CTZ_D = 0x00002c00, ++ LAun_EXT_W_H = 0x00005800, ++ LAun_EXT_W_B = 0x00005c00 ++} LOONGARCH64UnOp; + -+ go_fast = True; ++/* Tags for binary operations */ ++typedef enum { ++ LAbin_ADD_W = 0x00100000, ++ LAbin_ADD_D = 0x00108000, ++ LAbin_SUB_W = 0x00110000, ++ LAbin_SUB_D = 0x00118000, ++ LAbin_NOR = 0x00140000, ++ LAbin_AND = 0x00148000, ++ LAbin_OR = 0x00150000, ++ LAbin_XOR = 0x00158000, ++ LAbin_SLL_W = 0x00170000, ++ LAbin_SRL_W = 0x00178000, ++ LAbin_SRA_W = 0x00180000, ++ LAbin_SLL_D = 0x00188000, ++ LAbin_SRL_D = 0x00190000, ++ LAbin_SRA_D = 0x00198000, ++ LAbin_MUL_W = 0x001c0000, ++ LAbin_MUL_D = 0x001d8000, ++ LAbin_MULH_W = 0x001c8000, ++ LAbin_MULH_WU = 0x001d0000, ++ LAbin_MULH_D = 0x001e0000, ++ LAbin_MULH_DU = 0x001e8000, ++ LAbin_MULW_D_W = 0x001f0000, ++ LAbin_MULW_D_WU = 0x001f8000, ++ LAbin_DIV_W = 0x00200000, ++ LAbin_MOD_W = 0x00208000, ++ LAbin_DIV_WU = 0x00210000, ++ LAbin_MOD_WU = 0x00218000, ++ LAbin_DIV_D = 0x00220000, ++ LAbin_MOD_D = 0x00228000, ++ LAbin_DIV_DU = 0x00230000, ++ LAbin_MOD_DU = 0x00238000, ++ LAbin_SLLI_W = 0x00408000, ++ LAbin_SLLI_D = 0x00410000, ++ LAbin_SRLI_W = 0x00448000, ++ LAbin_SRLI_D = 0x00450000, ++ LAbin_SRAI_W = 0x00488000, ++ LAbin_SRAI_D = 0x00490000, ++ LAbin_ADDI_W = 0x02800000, ++ LAbin_ADDI_D = 0x02c00000, ++ LAbin_ANDI = 0x03400000, ++ LAbin_ORI = 0x03800000, ++ LAbin_XORI = 0x03c00000 ++} LOONGARCH64BinOp; + -+ if (guard) { -+ if (guard->tag == Iex_Const -+ && guard->Iex.Const.con->tag == Ico_U1 -+ && guard->Iex.Const.con->Ico.U1 == True) { -+ /* unconditional */ -+ } else { -+ /* Not manifestly unconditional -- be conservative. */ -+ go_fast = False; -+ } -+ } ++/* Tags for load operations */ ++typedef enum { ++ LAload_LD_W = 0x28800000, ++ LAload_LD_D = 0x28c00000, ++ LAload_LD_BU = 0x2a000000, ++ LAload_LD_HU = 0x2a400000, ++ LAload_LD_WU = 0x2a800000, ++ LAload_LDX_D = 0x380c0000, ++ LAload_LDX_BU = 0x38200000, ++ LAload_LDX_HU = 0x38240000, ++ LAload_LDX_WU = 0x38280000 ++} LOONGARCH64LoadOp; + -+ if (go_fast) { -+ for (i = 0; i < n_args; i++) { -+ if (mightRequireFixedRegs(args[i])) { -+ go_fast = False; -+ break; -+ } -+ } -+ } ++/* Tags for store operations */ ++typedef enum { ++ LAstore_ST_B = 0x29000000, ++ LAstore_ST_H = 0x29400000, ++ LAstore_ST_W = 0x29800000, ++ LAstore_ST_D = 0x29c00000, ++ LAstore_STX_B = 0x38100000, ++ LAstore_STX_H = 0x38140000, ++ LAstore_STX_W = 0x38180000, ++ LAstore_STX_D = 0x381c0000 ++} LOONGARCH64StoreOp; + -+ if (go_fast) { -+ if (retTy == Ity_V128 || retTy == Ity_V256) { -+ go_fast = False; -+ vpanic("doHelperCall(loongarch64): currently do not support vector"); -+ } -+ } ++/* Tags for ll/sc operations */ ++typedef enum { ++ LAllsc_LL_W = 0x20000000, ++ LAllsc_SC_W = 0x21000000, ++ LAllsc_LL_D = 0x22000000, ++ LAllsc_SC_D = 0x23000000 ++} LOONGARCH64LLSCOp; + -+ /* At this point the scheme to use has been established. Generate -+ code to get the arg values into the argument rregs. If we run -+ out of arg regs, give up. */ ++/* Tags for barrier operations */ ++typedef enum { ++ LAbar_DBAR = 0x38720000, ++ LAbar_IBAR = 0x38728000 ++} LOONGARCH64BarOp; + -+ if (go_fast) { -+ /* FAST SCHEME */ -+ nextArgReg = 0; ++/* Tags for floating point unary operations */ ++typedef enum { ++ LAfpun_FABS_S = 0x01140400, ++ LAfpun_FABS_D = 0x01140800, ++ LAfpun_FNEG_S = 0x01141400, ++ LAfpun_FNEG_D = 0x01141800, ++ LAfpun_FLOGB_S = 0x01142400, ++ LAfpun_FLOGB_D = 0x01142800, ++ LAfpun_FSQRT_S = 0x01144400, ++ LAfpun_FSQRT_D = 0x01144800, ++ LAfpun_FRSQRT_S = 0x01146400, ++ LAfpun_FRSQRT_D = 0x01146800, ++ LAfpun_FCVT_S_D = 0x01191800, ++ LAfpun_FCVT_D_S = 0x01192400, ++ LAfpun_FTINT_W_S = 0x011b0400, ++ LAfpun_FTINT_W_D = 0x011b0800, ++ LAfpun_FTINT_L_S = 0x011b2400, ++ LAfpun_FTINT_L_D = 0x011b2800, ++ LAfpun_FFINT_S_W = 0x011d1000, ++ LAfpun_FFINT_S_L = 0x011d1800, ++ LAfpun_FFINT_D_W = 0x011d2000, ++ LAfpun_FFINT_D_L = 0x011d2800, ++ LAfpun_FRINT_S = 0x011e4400, ++ LAfpun_FRINT_D = 0x011e4800 ++} LOONGARCH64FpUnOp; + -+ for (i = 0; i < n_args; i++) { -+ IRExpr* arg = args[i]; ++/* Tags for floating point binary operations */ ++typedef enum { ++ LAfpbin_FADD_S = 0x01008000, ++ LAfpbin_FADD_D = 0x01010000, ++ LAfpbin_FSUB_S = 0x01028000, ++ LAfpbin_FSUB_D = 0x01030000, ++ LAfpbin_FMUL_S = 0x01048000, ++ LAfpbin_FMUL_D = 0x01050000, ++ LAfpbin_FDIV_S = 0x01068000, ++ LAfpbin_FDIV_D = 0x01070000, ++ LAfpbin_FMAX_S = 0x01088000, ++ LAfpbin_FMAX_D = 0x01090000, ++ LAfpbin_FMIN_S = 0x010a8000, ++ LAfpbin_FMIN_D = 0x010b0000, ++ LAfpbin_FMAXA_S = 0x010c8000, ++ LAfpbin_FMAXA_D = 0x010d0000, ++ LAfpbin_FMINA_S = 0x010e8000, ++ LAfpbin_FMINA_D = 0x010f0000, ++ LAfpbin_FSCALEB_S = 0x01108000, ++ LAfpbin_FSCALEB_D = 0x01110000 ++} LOONGARCH64FpBinOp; + -+ IRType aTy = Ity_INVALID; -+ if (LIKELY(!is_IRExpr_VECRET_or_GSPTR(arg))) -+ aTy = typeOfIRExpr(env->type_env, args[i]); ++/* Tags for floating point trinary operations */ ++typedef enum { ++ LAfpbin_FMADD_S = 0x08100000, ++ LAfpbin_FMADD_D = 0x08200000, ++ LAfpbin_FMSUB_S = 0x08500000, ++ LAfpbin_FMSUB_D = 0x08600000 ++} LOONGARCH64FpTriOp; + -+ if (nextArgReg >= LOONGARCH64_N_ARGREGS) -+ return False; /* out of argregs */ ++/* Tags for floating point load operations */ ++typedef enum { ++ LAfpload_FLD_S = 0x2b000000, ++ LAfpload_FLD_D = 0x2b800000, ++ LAfpload_FLDX_S = 0x38300000, ++ LAfpload_FLDX_D = 0x38340000 ++} LOONGARCH64FpLoadOp; + -+ if (aTy == Ity_I64) { -+ addInstr(env, LOONGARCH64Instr_Move(argregs[nextArgReg], -+ iselIntExpr_R(env, args[i]))); -+ nextArgReg++; -+ } else if (arg->tag == Iex_GSPTR) { -+ addInstr(env, LOONGARCH64Instr_Move(argregs[nextArgReg], hregGSP())); -+ nextArgReg++; -+ } else if (arg->tag == Iex_VECRET) { -+ // because of the go_fast logic above, we can't get here, -+ // since vector return values makes us use the slow path -+ // instead. -+ vassert(0); -+ } else -+ return False; /* unhandled arg type */ -+ } ++/* Tags for floating point store operations */ ++typedef enum { ++ LAfpstore_FST_S = 0x2b400000, ++ LAfpstore_FST_D = 0x2bc00000, ++ LAfpstore_FSTX_S = 0x38380000, ++ LAfpstore_FSTX_D = 0x383c0000 ++} LOONGARCH64FpStoreOp; + -+ /* Fast scheme only applies for unconditional calls. Hence: */ -+ cond = INVALID_HREG; -+ } else { -+ /* SLOW SCHEME; move via temporaries */ -+ nextArgReg = 0; ++/* Tags for floating point move operations */ ++typedef enum { ++ LAfpmove_FMOV_S = 0x01149400, ++ LAfpmove_FMOV_D = 0x01149800, ++ LAfpmove_MOVGR2FR_W = 0x0114a400, ++ LAfpmove_MOVGR2FR_D = 0x0114a800, ++ LAfpmove_MOVFR2GR_S = 0x0114b400, ++ LAfpmove_MOVFR2GR_D = 0x0114b800, ++ LAfpmove_MOVGR2FCSR = 0x0114c000, ++ LAfpmove_MOVFCSR2GR = 0x0114c800 ++} LOONGARCH64FpMoveOp; + -+ for (i = 0; i < n_args; i++) { -+ IRExpr* arg = args[i]; ++/* Tags for floating point compare operations */ ++typedef enum { ++ LAfpcmp_FCMP_CLT_S = 0x0c110000, ++ LAfpcmp_FCMP_CLT_D = 0x0c210000, ++ LAfpcmp_FCMP_CEQ_S = 0x0c120000, ++ LAfpcmp_FCMP_CEQ_D = 0x0c220000, ++ LAfpcmp_FCMP_CUN_S = 0x0c140000, ++ LAfpcmp_FCMP_CUN_D = 0x0c240000 ++} LOONGARCH64FpCmpOp; + -+ IRType aTy = Ity_INVALID; -+ if (LIKELY(!is_IRExpr_VECRET_or_GSPTR(arg))) -+ aTy = typeOfIRExpr(env->type_env, args[i]); ++/* Tags for vector unary operations */ ++typedef enum { ++ LAvecun_VCLO_B = 0x729c0000, ++ LAvecun_VCLO_H = 0x729c0400, ++ LAvecun_VCLO_W = 0x729c0800, ++ LAvecun_VCLZ_B = 0x729c1000, ++ LAvecun_VCLZ_H = 0x729c1400, ++ LAvecun_VCLZ_W = 0x729c1800, ++ LAvecun_VCLZ_D = 0x729c1c00, ++ LAvecun_VPCNT_B = 0x729c2000, ++ LAvecun_VEXTH_H_B = 0x729ee000, ++ LAvecun_VEXTH_W_H = 0x729ee400, ++ LAvecun_VEXTH_D_W = 0x729ee800, ++ LAvecun_VEXTH_Q_D = 0x729eec00, ++ LAvecun_VEXTH_HU_BU = 0x729ef000, ++ LAvecun_VEXTH_WU_HU = 0x729ef400, ++ LAvecun_VEXTH_DU_WU = 0x729ef800, ++ LAvecun_VEXTH_QU_DU = 0x729efc00, ++ LAvecun_VREPLGR2VR_B = 0x729f0000, ++ LAvecun_VREPLGR2VR_H = 0x729f0400, ++ LAvecun_VREPLGR2VR_W = 0x729f0800, ++ LAvecun_VREPLGR2VR_D = 0x729f0c00 ++} LOONGARCH64VecUnOp; ++ ++/* Tags for vector binary operations */ ++typedef enum { ++ LAvecbin_VSEQ_B = 0x70000000, ++ LAvecbin_VSEQ_H = 0x70008000, ++ LAvecbin_VSEQ_W = 0x70010000, ++ LAvecbin_VSEQ_D = 0x70018000, ++ LAvecbin_VSLT_B = 0x70060000, ++ LAvecbin_VSLT_H = 0x70068000, ++ LAvecbin_VSLT_W = 0x70070000, ++ LAvecbin_VSLT_D = 0x70078000, ++ LAvecbin_VSLT_BU = 0x70080000, ++ LAvecbin_VSLT_HU = 0x70088000, ++ LAvecbin_VSLT_WU = 0x70090000, ++ LAvecbin_VSLT_DU = 0x70098000, ++ LAvecbin_VADD_B = 0x700a0000, ++ LAvecbin_VADD_H = 0x700a8000, ++ LAvecbin_VADD_W = 0x700b0000, ++ LAvecbin_VADD_D = 0x700b8000, ++ LAvecbin_VSUB_B = 0x700c0000, ++ LAvecbin_VSUB_H = 0x700c8000, ++ LAvecbin_VSUB_W = 0x700d0000, ++ LAvecbin_VSUB_D = 0x700d8000, ++ LAvecbin_VSADD_B = 0x70460000, ++ LAvecbin_VSADD_H = 0x70468000, ++ LAvecbin_VSADD_W = 0x70470000, ++ LAvecbin_VSADD_D = 0x70478000, ++ LAvecbin_VSSUB_B = 0x70480000, ++ LAvecbin_VSSUB_H = 0x70488000, ++ LAvecbin_VSSUB_W = 0x70490000, ++ LAvecbin_VSSUB_D = 0x70498000, ++ LAvecbin_VSADD_BU = 0x704a0000, ++ LAvecbin_VSADD_HU = 0x704a8000, ++ LAvecbin_VSADD_WU = 0x704b0000, ++ LAvecbin_VSADD_DU = 0x704b8000, ++ LAvecbin_VSSUB_BU = 0x704c0000, ++ LAvecbin_VSSUB_HU = 0x704c8000, ++ LAvecbin_VSSUB_WU = 0x704d0000, ++ LAvecbin_VSSUB_DU = 0x704d8000, ++ LAvecbin_VADDA_B = 0x705c0000, ++ LAvecbin_VADDA_H = 0x705c8000, ++ LAvecbin_VADDA_W = 0x705d0000, ++ LAvecbin_VADDA_D = 0x705d8000, ++ LAvecbin_VAVGR_B = 0x70680000, ++ LAvecbin_VAVGR_H = 0x70688000, ++ LAvecbin_VAVGR_W = 0x70690000, ++ LAvecbin_VAVGR_D = 0x70698000, ++ LAvecbin_VAVGR_BU = 0x706a0000, ++ LAvecbin_VAVGR_HU = 0x706a8000, ++ LAvecbin_VAVGR_WU = 0x706b0000, ++ LAvecbin_VAVGR_DU = 0x706b8000, ++ LAvecbin_VMAX_B = 0x70700000, ++ LAvecbin_VMAX_H = 0x70708000, ++ LAvecbin_VMAX_W = 0x70710000, ++ LAvecbin_VMAX_D = 0x70718000, ++ LAvecbin_VMIN_B = 0x70720000, ++ LAvecbin_VMIN_H = 0x70728000, ++ LAvecbin_VMIN_W = 0x70730000, ++ LAvecbin_VMIN_D = 0x70738000, ++ LAvecbin_VMAX_BU = 0x70740000, ++ LAvecbin_VMAX_HU = 0x70748000, ++ LAvecbin_VMAX_WU = 0x70750000, ++ LAvecbin_VMAX_DU = 0x70758000, ++ LAvecbin_VMIN_BU = 0x70760000, ++ LAvecbin_VMIN_HU = 0x70768000, ++ LAvecbin_VMIN_WU = 0x70770000, ++ LAvecbin_VMIN_DU = 0x70778000, ++ LAvecbin_VMUL_B = 0x70840000, ++ LAvecbin_VMUL_H = 0x70848000, ++ LAvecbin_VMUL_W = 0x70850000, ++ LAvecbin_VMUH_B = 0x70860000, ++ LAvecbin_VMUH_H = 0x70868000, ++ LAvecbin_VMUH_W = 0x70870000, ++ LAvecbin_VMUH_BU = 0x70880000, ++ LAvecbin_VMUH_HU = 0x70888000, ++ LAvecbin_VMUH_WU = 0x70890000, ++ LAvecbin_VSLL_B = 0x70e80000, ++ LAvecbin_VSLL_H = 0x70e88000, ++ LAvecbin_VSLL_W = 0x70e90000, ++ LAvecbin_VSLL_D = 0x70e98000, ++ LAvecbin_VSRL_B = 0x70ea0000, ++ LAvecbin_VSRL_H = 0x70ea8000, ++ LAvecbin_VSRL_W = 0x70eb0000, ++ LAvecbin_VSRL_D = 0x70eb8000, ++ LAvecbin_VSRA_B = 0x70ec0000, ++ LAvecbin_VSRA_H = 0x70ec8000, ++ LAvecbin_VSRA_W = 0x70ed0000, ++ LAvecbin_VSRA_D = 0x70ed8000, ++ LAvecbin_VILVL_B = 0x711a0000, ++ LAvecbin_VILVL_H = 0x711a8000, ++ LAvecbin_VILVL_W = 0x711b0000, ++ LAvecbin_VILVL_D = 0x711b8000, ++ LAvecbin_VILVH_B = 0x711c0000, ++ LAvecbin_VILVH_H = 0x711c8000, ++ LAvecbin_VILVH_W = 0x711d0000, ++ LAvecbin_VILVH_D = 0x711d8000, ++ LAvecbin_VPICKEV_B = 0x711e0000, ++ LAvecbin_VPICKEV_H = 0x711e8000, ++ LAvecbin_VPICKEV_W = 0x711f0000, ++ LAvecbin_VPICKOD_B = 0x71200000, ++ LAvecbin_VPICKOD_H = 0x71208000, ++ LAvecbin_VPICKOD_W = 0x71210000, ++ LAvecbin_VREPLVE_B = 0x71220000, ++ LAvecbin_VREPLVE_H = 0x71228000, ++ LAvecbin_VREPLVE_W = 0x71230000, ++ LAvecbin_VREPLVE_D = 0x71238000, ++ LAvecbin_VAND_V = 0x71260000, ++ LAvecbin_VOR_V = 0x71268000, ++ LAvecbin_VXOR_V = 0x71270000, ++ LAvecbin_VNOR_V = 0x71278000, ++ LAvecbin_VADD_Q = 0x712d0000, ++ LAvecbin_VSUB_Q = 0x712d8000, ++ LAvecbin_VFADD_S = 0x71308000, ++ LAvecbin_VFADD_D = 0x71310000, ++ LAvecbin_VFSUB_S = 0x71328000, ++ LAvecbin_VFSUB_D = 0x71330000, ++ LAvecbin_VFMUL_S = 0x71388000, ++ LAvecbin_VFMUL_D = 0x71390000, ++ LAvecbin_VFDIV_S = 0x713a8000, ++ LAvecbin_VFDIV_D = 0x713b0000, ++ LAvecbin_VFMAX_S = 0x713c8000, ++ LAvecbin_VFMAX_D = 0x713d0000, ++ LAvecbin_VFMIN_S = 0x713e8000, ++ LAvecbin_VFMIN_D = 0x713f0000, ++ LAvecbin_VBSLL_V = 0x728e0000, ++ LAvecbin_VBSRL_V = 0x728e8000, ++ LAvecbin_VINSGR2VR_B = 0x72eb8000, ++ LAvecbin_VINSGR2VR_H = 0x72ebc000, ++ LAvecbin_VINSGR2VR_W = 0x72ebe000, ++ LAvecbin_VINSGR2VR_D = 0x72ebf000, ++ LAvecbin_VPICKVE2GR_W = 0x72efe000, ++ LAvecbin_VPICKVE2GR_D = 0x72eff000, ++ LAvecbin_VPICKVE2GR_BU = 0x72f38000, ++ LAvecbin_VPICKVE2GR_HU = 0x72f3c000, ++ LAvecbin_VPICKVE2GR_WU = 0x72f3e000, ++ LAvecbin_VPICKVE2GR_DU = 0x72f3f000, ++ LAvecbin_VSLLI_B = 0x732c2000, ++ LAvecbin_VSLLI_H = 0x732c4000, ++ LAvecbin_VSLLI_W = 0x732c8000, ++ LAvecbin_VSLLI_D = 0x732d0000, ++ LAvecbin_VSRLI_B = 0x73302000, ++ LAvecbin_VSRLI_H = 0x73304000, ++ LAvecbin_VSRLI_W = 0x73308000, ++ LAvecbin_VSRLI_D = 0x73310000, ++ LAvecbin_VSRAI_B = 0x73342000, ++ LAvecbin_VSRAI_H = 0x73344000, ++ LAvecbin_VSRAI_W = 0x73348000, ++ LAvecbin_VSRAI_D = 0x73350000, ++ LAvecbin_VORI_B = 0x73d40000 ++} LOONGARCH64VecBinOp; ++ ++/* Tags for vector load operations */ ++typedef enum { ++ LAvecload_VLD = 0x2c000000, ++ LAvecload_VLDX = 0x38400000 ++} LOONGARCH64VecLoadOp; + -+ if (nextArgReg >= LOONGARCH64_N_ARGREGS) -+ return False; /* out of argregs */ ++/* Tags for vector store operations */ ++typedef enum { ++ LAvecstore_VST = 0x2c400000, ++ LAvecstore_VSTX = 0x38440000 ++} LOONGARCH64VecStoreOp; + -+ if (aTy == Ity_I64) { -+ tmpregs[nextArgReg] = iselIntExpr_R(env, args[i]); -+ nextArgReg++; -+ } else if (arg->tag == Iex_GSPTR) { -+ tmpregs[nextArgReg] = hregGSP(); -+ nextArgReg++; -+ } else if (arg->tag == Iex_VECRET) { -+ vpanic("doHelperCall(loongarch64): currently do not support vector"); -+ nextArgReg++; -+ } else -+ return False; /* unhandled arg type */ -+ } -+ -+ /* Now we can compute the condition. We can't do it earlier -+ because the argument computations could trash the condition -+ codes. Be a bit clever to handle the common case where the -+ guard is 1:Bit. */ -+ cond = INVALID_HREG; -+ if (guard) { -+ if (guard->tag == Iex_Const -+ && guard->Iex.Const.con->tag == Ico_U1 -+ && guard->Iex.Const.con->Ico.U1 == True) { -+ /* unconditional -- do nothing */ -+ } else { -+ cond = iselCondCode_R(env, guard); -+ } -+ } ++/* Tags for extra operations, we only use them when emiting code directly */ ++typedef enum { ++ LAextra_MOVGR2CF = 0x0114d800, ++ LAextra_MOVCF2GR = 0x0114dc00, ++ LAextra_SLT = 0x00120000, ++ LAextra_SLTU = 0x00128000, ++ LAextra_MASKEQZ = 0x00130000, ++ LAextra_MASKNEZ = 0x00138000, ++ LAextra_SLTI = 0x02000000, ++ LAextra_SLTUI = 0x02400000, ++ LAextra_LU52I_D = 0x03000000, ++ LAextra_FSEL = 0x0d000000, ++ LAextra_LU12I_W = 0x14000000, ++ LAextra_LU32I_D = 0x16000000, ++ LAextra_JIRL = 0x4c000000, ++ LAextra_B = 0x50000000, ++ LAextra_BEQ = 0x58000000, ++ LAextra_BNE = 0x5c000000, ++ LAextra_BGE = 0x64000000 ++} LOONGARCH64ExtraOp; + -+ /* Move the args to their final destinations. */ -+ for (i = 0; i < nextArgReg; i++) { -+ vassert(!(hregIsInvalid(tmpregs[i]))); -+ /* None of these insns, including any spill code that might -+ be generated, may alter the condition codes. */ -+ addInstr(env, LOONGARCH64Instr_Move(argregs[i], tmpregs[i])); -+ } -+ } ++/* Tags for instructions */ ++typedef enum { ++ /* Pseudo-insn, used for generating a 64-bit ++ literal to register */ ++ LAin_LI, /* load imm */ + -+ /* Should be assured by checks above */ -+ vassert(nextArgReg <= LOONGARCH64_N_ARGREGS); ++ /* Integer insns */ ++ LAin_Un, /* unary */ ++ LAin_Bin, /* binary */ ++ LAin_Load, /* load */ ++ LAin_Store, /* store */ ++ LAin_LLSC, /* ll/sc */ ++ LAin_Bar, /* barrier */ + -+ /* Do final checks, set the return values, and generate the call -+ instruction proper. */ -+ vassert(nGSPTRs == 0 || nGSPTRs == 1); -+ vassert(nVECRETs == ((retTy == Ity_V128 || retTy == Ity_V256) ? 1 : 0)); -+ vassert(*stackAdjustAfterCall == 0); -+ vassert(is_RetLoc_INVALID(*retloc)); -+ switch (retTy) { -+ case Ity_INVALID: -+ /* Function doesn't return a value. */ -+ *retloc = mk_RetLoc_simple(RLPri_None); -+ break; -+ case Ity_I8: case Ity_I16: case Ity_I32: case Ity_I64: -+ *retloc = mk_RetLoc_simple(RLPri_Int); -+ break; -+ case Ity_V128: -+ case Ity_V256: -+ vpanic("doHelperCall(loongarch64): currently do not support vector"); -+ break; -+ default: -+ /* IR can denote other possible return types, but we don't -+ handle those here. */ -+ vassert(0); -+ } ++ /* Floating point insns */ ++ LAin_FpUn, /* floating point unary */ ++ LAin_FpBin, /* floating point binary */ ++ LAin_FpTri, /* floating point trinary */ ++ LAin_FpLoad, /* floating point load */ ++ LAin_FpStore, /* floating point store */ ++ LAin_FpMove, /* floating point move */ ++ LAin_FpCmp, /* floating point compare */ + -+ /* Finally, generate the call itself. This needs the *retloc value -+ set in the switch above, which is why it's at the end. */ ++ /* Vector insns */ ++ LAin_VecUn, /* vector unary */ ++ LAin_VecBin, /* vector binary */ ++ LAin_VecLoad, /* vector load */ ++ LAin_VecStore, /* vector store */ + -+ /* nextArgReg doles out argument registers. Since these are -+ assigned in the order $a0 .. $a7, its numeric value at this point, -+ which must be between 0 and 8 inclusive, is going to be equal to -+ the number of arg regs in use for the call. Hence bake that -+ number into the call (we'll need to know it when doing register -+ allocation, to know what regs the call reads.) */ ++ /* Pseudo-insn */ ++ LAin_Cas, /* compare and swap */ ++ LAin_Cmp, /* word compare */ ++ LAin_CMove, /* condition move */ + -+ target = (Addr)cee->addr; -+ addInstr(env, LOONGARCH64Instr_Call(cond, target, nextArgReg, *retloc)); ++ /* Call target (an absolute address), on given ++ condition (which could be LAcc_AL). */ ++ LAin_Call, /* call */ + -+ return True; /* success */ -+} ++ /* The following 5 insns are mandated by translation chaining */ ++ LAin_XDirect, /* direct transfer to GA */ ++ LAin_XIndir, /* indirect transfer to GA */ ++ LAin_XAssisted, /* assisted transfer to GA */ ++ LAin_EvCheck, /* Event check */ ++ LAin_ProfInc /* 64-bit profile counter increment */ ++} LOONGARCH64InstrTag; + ++typedef struct { ++ LOONGARCH64InstrTag tag; ++ union { ++ struct { ++ ULong imm; ++ HReg dst; ++ } LI; ++ struct { ++ LOONGARCH64UnOp op; ++ HReg src; ++ HReg dst; ++ } Unary; ++ struct { ++ LOONGARCH64BinOp op; ++ LOONGARCH64RI* src2; ++ HReg src1; ++ HReg dst; ++ } Binary; ++ struct { ++ LOONGARCH64LoadOp op; ++ LOONGARCH64AMode* src; ++ HReg dst; ++ } Load; ++ struct { ++ LOONGARCH64StoreOp op; ++ LOONGARCH64AMode* dst; ++ HReg src; ++ } Store; ++ struct { ++ LOONGARCH64LLSCOp op; ++ Bool isLoad; ++ LOONGARCH64AMode* addr; ++ HReg val; ++ } LLSC; ++ struct { ++ LOONGARCH64BarOp op; ++ UShort hint; ++ } Bar; ++ struct { ++ LOONGARCH64FpUnOp op; ++ HReg src; ++ HReg dst; ++ } FpUnary; ++ struct { ++ LOONGARCH64FpBinOp op; ++ HReg src2; ++ HReg src1; ++ HReg dst; ++ } FpBinary; ++ struct { ++ LOONGARCH64FpTriOp op; ++ HReg src3; ++ HReg src2; ++ HReg src1; ++ HReg dst; ++ } FpTrinary; ++ struct { ++ LOONGARCH64FpLoadOp op; ++ LOONGARCH64AMode* src; ++ HReg dst; ++ } FpLoad; ++ struct { ++ LOONGARCH64FpStoreOp op; ++ LOONGARCH64AMode* dst; ++ HReg src; ++ } FpStore; ++ struct { ++ LOONGARCH64FpMoveOp op; ++ HReg src; ++ HReg dst; ++ } FpMove; ++ struct { ++ LOONGARCH64FpCmpOp op; ++ HReg src2; ++ HReg src1; ++ HReg dst; ++ } FpCmp; ++ struct { ++ LOONGARCH64VecUnOp op; ++ HReg src; ++ HReg dst; ++ } VecUnary; ++ struct { ++ LOONGARCH64VecBinOp op; ++ LOONGARCH64RI* src2; ++ HReg src1; ++ HReg dst; ++ } VecBinary; ++ struct { ++ LOONGARCH64VecLoadOp op; ++ LOONGARCH64AMode* src; ++ HReg dst; ++ } VecLoad; ++ struct { ++ LOONGARCH64VecStoreOp op; ++ LOONGARCH64AMode* dst; ++ HReg src; ++ } VecStore; ++ struct { ++ HReg old; ++ HReg addr; ++ HReg expd; ++ HReg data; ++ Bool size64; ++ } Cas; ++ struct { ++ LOONGARCH64CondCode cond; ++ HReg dst; ++ HReg src1; ++ HReg src2; ++ } Cmp; ++ struct { ++ HReg cond; ++ HReg r0; ++ HReg r1; ++ HReg dst; ++ Bool isInt; ++ } CMove; ++ struct { ++ HReg cond; ++ Addr64 target; ++ UInt nArgRegs; ++ RetLoc rloc; ++ } Call; ++ struct { ++ Addr64 dstGA; ++ LOONGARCH64AMode* amPC; ++ HReg cond; ++ Bool toFastEP; ++ } XDirect; ++ struct { ++ HReg dstGA; ++ LOONGARCH64AMode* amPC; ++ HReg cond; ++ } XIndir; ++ struct { ++ HReg dstGA; ++ LOONGARCH64AMode* amPC; ++ HReg cond; ++ IRJumpKind jk; ++ } XAssisted; ++ struct { ++ LOONGARCH64AMode* amCounter; ++ LOONGARCH64AMode* amFailAddr; ++ } EvCheck; ++ struct { ++ /* No fields. The address of the counter to inc is ++ installed later, post-translation, by patching it in, ++ as it is not known at translation time. */ ++ } ProfInc; ++ } LAin; ++} LOONGARCH64Instr; + -+/*---------------------------------------------------------*/ -+/*--- ISEL: Integer expressions (64/32/16/8 bit) ---*/ -+/*---------------------------------------------------------*/ ++extern LOONGARCH64Instr* LOONGARCH64Instr_LI ( ULong imm, HReg dst ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_Unary ( LOONGARCH64UnOp op, ++ HReg src, HReg dst ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_Binary ( LOONGARCH64BinOp op, ++ LOONGARCH64RI* src2, ++ HReg src1, HReg dst ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_Load ( LOONGARCH64LoadOp op, ++ LOONGARCH64AMode* src, ++ HReg dst ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_Store ( LOONGARCH64StoreOp op, ++ LOONGARCH64AMode* dst, ++ HReg src ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_LLSC ( LOONGARCH64LLSCOp op, ++ Bool isLoad, ++ LOONGARCH64AMode* addr, ++ HReg val ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_Bar ( LOONGARCH64BarOp op, ++ UShort hint ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_FpUnary ( LOONGARCH64FpUnOp op, ++ HReg src, HReg dst ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_FpBinary ( LOONGARCH64FpBinOp op, ++ HReg src2, HReg src1, ++ HReg dst ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_FpTrinary ( LOONGARCH64FpTriOp op, ++ HReg src3, HReg src2, ++ HReg src1, HReg dst ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_FpLoad ( LOONGARCH64FpLoadOp op, ++ LOONGARCH64AMode* src, ++ HReg dst ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_FpStore ( LOONGARCH64FpStoreOp op, ++ LOONGARCH64AMode* dst, ++ HReg src ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_FpMove ( LOONGARCH64FpMoveOp op, ++ HReg src, HReg dst ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_FpCmp ( LOONGARCH64FpCmpOp op, ++ HReg src2, HReg src1, ++ HReg dst ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_VecUnary ( LOONGARCH64VecUnOp op, ++ HReg src, HReg dst ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_VecBinary ( LOONGARCH64VecBinOp op, ++ LOONGARCH64RI* src2, ++ HReg src1, HReg dst ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_VecLoad ( LOONGARCH64VecLoadOp op, ++ LOONGARCH64AMode* src, ++ HReg dst ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_VecStore ( LOONGARCH64VecStoreOp op, ++ LOONGARCH64AMode* dst, ++ HReg src ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_Cas ( HReg old, HReg addr, ++ HReg expd, HReg data, ++ Bool size64 ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_Cmp ( LOONGARCH64CondCode cond, ++ HReg src2, HReg src1, ++ HReg dst ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_CMove ( HReg cond, HReg r0, HReg r1, ++ HReg dst, Bool isInt ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_Call ( HReg cond, Addr64 target, ++ UInt nArgRegs, RetLoc rloc ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_XDirect ( Addr64 dstGA, ++ LOONGARCH64AMode* amPC, ++ HReg cond, Bool toFastEP ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_XIndir ( HReg dstGA, ++ LOONGARCH64AMode* amPC, ++ HReg cond ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_XAssisted ( HReg dstGA, ++ LOONGARCH64AMode* amPC, ++ HReg cond, IRJumpKind jk ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_EvCheck ( LOONGARCH64AMode* amCounter, ++ LOONGARCH64AMode* amFailAddr ); ++extern LOONGARCH64Instr* LOONGARCH64Instr_ProfInc ( void ); + -+/* Select insns for an integer-typed expression, and add them to the -+ code list. Return a reg holding the result. This reg will be a -+ virtual register. THE RETURNED REG MUST NOT BE MODIFIED. If you -+ want to modify it, ask for a new vreg, copy it in there, and modify -+ the copy. The register allocator will do its best to map both -+ vregs to the same real register, so the copies will often disappear -+ later in the game. ++extern void ppLOONGARCH64Instr ( const LOONGARCH64Instr* i, Bool mode64 ); + -+ This should handle expressions of 64, 32, 16 and 8-bit type. -+ All results are returned in a (mode64 ? 64bit : 32bit) register. -+ For 16- and 8-bit expressions, the upper (32/48/56 : 16/24) bits -+ are arbitrary, so you should mask or sign extend partial values -+ if necessary. -+*/ ++/* Some functions that insulate the register allocator from details ++ of the underlying instruction set. */ ++extern void getRegUsage_LOONGARCH64Instr ( HRegUsage* u, ++ const LOONGARCH64Instr* i, ++ Bool mode64 ); ++extern void mapRegs_LOONGARCH64Instr ( HRegRemap* m, LOONGARCH64Instr* i, ++ Bool mode64 ); ++extern Int emit_LOONGARCH64Instr (/*MB_MOD*/Bool* is_profInc, ++ UChar* buf, ++ Int nbuf, ++ const LOONGARCH64Instr* i, ++ Bool mode64, ++ VexEndness endness_host, ++ const void* disp_cp_chain_me_to_slowEP, ++ const void* disp_cp_chain_me_to_fastEP, ++ const void* disp_cp_xindir, ++ const void* disp_cp_xassisted ); + -+/* --------------------- AMode --------------------- */ ++extern void genSpill_LOONGARCH64 ( /*OUT*/ HInstr** i1, /*OUT*/ HInstr** i2, ++ HReg rreg, Int offsetB, Bool mode64); ++extern void genReload_LOONGARCH64 ( /*OUT*/ HInstr** i1, /*OUT*/ HInstr** i2, ++ HReg rreg, Int offsetB, Bool mode64); ++extern LOONGARCH64Instr* genMove_LOONGARCH64 ( HReg from, HReg to, ++ Bool mode64 ); + -+static LOONGARCH64AMode* iselIntExpr_AMode ( ISelEnv* env, -+ IRExpr* e, IRType dty ) -+{ -+ LOONGARCH64AMode* am = iselIntExpr_AMode_wrk(env, e, dty); ++extern const RRegUniverse* getRRegUniverse_LOONGARCH64 ( void ); + -+ /* sanity checks ... */ -+ switch (am->tag) { -+ case LAam_RI: -+ vassert(am->LAam.RI.index < (1 << 11)); /* The sign bit (bit 12) must be 0. */ -+ vassert(hregClass(am->LAam.RI.base) == HRcInt64); -+ vassert(hregIsVirtual(am->LAam.RI.base)); -+ break; -+ case LAam_RR: -+ vassert(hregClass(am->LAam.RR.base) == HRcInt64); -+ vassert(hregIsVirtual(am->LAam.RR.base)); -+ vassert(hregClass(am->LAam.RR.index) == HRcInt64); -+ vassert(hregIsVirtual(am->LAam.RR.index)); -+ break; -+ default: -+ vpanic("iselIntExpr_AMode: unknown LOONGARCH64 AMode tag"); -+ break; -+ } ++extern HInstrArray* iselSB_LOONGARCH64 ( const IRSB*, ++ VexArch, ++ const VexArchInfo*, ++ const VexAbiInfo*, ++ Int offs_Host_EvC_Counter, ++ Int offs_Host_EvC_FailAddr, ++ Bool chainingAllowed, ++ Bool addProfInc, ++ Addr max_ga ); + -+ return am; -+} ++/* How big is an event check? See case for Min_EvCheck in ++ emit_LOONGARCH64Instr just above. That crosschecks what this returns, ++ so we can tell if we're inconsistent. */ ++extern Int evCheckSzB_LOONGARCH64 ( void ); + -+/* DO NOT CALL THIS DIRECTLY ! */ -+static LOONGARCH64AMode* iselIntExpr_AMode_wrk ( ISelEnv* env, -+ IRExpr* e, IRType dty ) -+{ -+ IRType ty = typeOfIRExpr(env->type_env, e); -+ vassert(e); -+ vassert(ty == Ity_I64); ++/* NB: what goes on here has to be very closely coordinated with the ++ emitInstr case for XDirect, above. */ ++extern VexInvalRange chainXDirect_LOONGARCH64 ( VexEndness endness_host, ++ void* place_to_chain, ++ const void* disp_cp_chain_me_EXPECTED, ++ const void* place_to_jump_to ); + -+ /* Add64(expr, i), where i <= 0x7ff */ -+ if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_Add64 -+ && e->Iex.Binop.arg2->tag == Iex_Const -+ && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U64 -+ && e->Iex.Binop.arg2->Iex.Const.con->Ico.U64 <= 0x7ff) { -+ return LOONGARCH64AMode_RI(iselIntExpr_R(env, e->Iex.Binop.arg1), -+ (UShort)e->Iex.Binop.arg2->Iex.Const.con->Ico.U64); -+ } ++/* NB: what goes on here has to be very closely coordinated with the ++ emitInstr case for XDirect, above. */ ++extern VexInvalRange unchainXDirect_LOONGARCH64 ( VexEndness endness_host, ++ void* place_to_unchain, ++ const void* place_to_jump_to_EXPECTED, ++ const void* disp_cp_chain_me ); + -+ /* Add64(expr, expr) */ -+ if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_Add64) { -+ HReg base = iselIntExpr_R(env, e->Iex.Binop.arg1); -+ HReg index = iselIntExpr_R(env, e->Iex.Binop.arg2); -+ return LOONGARCH64AMode_RR(base, index); -+ } ++/* Patch the counter address into a profile inc point, as previously ++ created by the Min_ProfInc case for emit_LOONGARCH64Instr. */ ++extern VexInvalRange patchProfInc_LOONGARCH64 ( VexEndness endness_host, ++ void* place_to_patch, ++ const ULong* location_of_counter ); + -+ /* Doesn't match anything in particular. Generate it into -+ a register and use that. */ -+ return LOONGARCH64AMode_RI(iselIntExpr_R(env, e), 0); -+} ++#endif /* ndef __VEX_HOST_LOONGARCH64_DEFS_H */ + -+/* --------------------- RI --------------------- */ + -+static LOONGARCH64RI* iselIntExpr_RI ( ISelEnv* env, IRExpr* e, -+ UChar size, Bool isSigned ) -+{ -+ LOONGARCH64RI* ri = iselIntExpr_RI_wrk(env, e, size, isSigned); ++/*---------------------------------------------------------------*/ ++/*--- end host-loongarch64_defs.h ---*/ ++/*---------------------------------------------------------------*/ +diff --git a/VEX/priv/host_loongarch64_isel.c b/VEX/priv/host_loongarch64_isel.c +new file mode 100644 +index 0000000..d60a2b3 +--- /dev/null ++++ b/VEX/priv/host_loongarch64_isel.c +@@ -0,0 +1,3748 @@ + -+ /* sanity checks ... */ -+ switch (ri->tag) { -+ case LAri_Imm: -+ vassert(ri->LAri.I.size == 5 || ri->LAri.I.size == 6 -+ || ri->LAri.I.size == 12); -+ if (ri->LAri.I.size == 5) { -+ vassert(ri->LAri.I.isSigned == False); -+ vassert(ri->LAri.I.imm < (1 << 5)); -+ } else if (ri->LAri.I.size == 6) { -+ vassert(ri->LAri.I.isSigned == False); -+ vassert(ri->LAri.I.imm < (1 << 6)); -+ } else { -+ vassert(ri->LAri.I.imm < (1 << 12)); -+ } -+ break; -+ case LAri_Reg: -+ vassert(hregClass(ri->LAri.R.reg) == HRcInt64); -+ vassert(hregIsVirtual(ri->LAri.R.reg)); -+ break; -+ default: -+ vpanic("iselIntExpr_RI: unknown LOONGARCH64 RI tag"); -+ break; -+ } ++/*---------------------------------------------------------------*/ ++/*--- begin host_loongarch64_isel.c ---*/ ++/*---------------------------------------------------------------*/ + -+ return ri; -+} ++/* ++ This file is part of Valgrind, a dynamic binary instrumentation ++ framework. + -+/* DO NOT CALL THIS DIRECTLY ! */ -+static LOONGARCH64RI* iselIntExpr_RI_wrk ( ISelEnv* env, IRExpr* e, -+ UChar size, Bool isSigned ) -+{ -+ IRType ty = typeOfIRExpr(env->type_env, e); -+ vassert(e); -+ vassert(ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32 || ty == Ity_I64); ++ Copyright (C) 2021-2022 Loongson Technology Corporation Limited + -+ LOONGARCH64RI *ri = NULL; ++ This program is free software; you can redistribute it and/or ++ modify it under the terms of the GNU General Public License as ++ published by the Free Software Foundation; either version 2 of the ++ License, or (at your option) any later version. + -+ /* special case: immediate */ -+ if (e->tag == Iex_Const) { -+ switch (e->Iex.Const.con->tag) { -+ case Ico_U32: -+ if (!isSigned && e->Iex.Const.con->Ico.U32 < (1 << size)) { -+ UShort imm = e->Iex.Const.con->Ico.U32; -+ ri = LOONGARCH64RI_I(imm, size, isSigned); -+ } -+ break; -+ case Ico_U64: -+ if (!isSigned && e->Iex.Const.con->Ico.U64 < (1 << size)) { -+ UShort imm = e->Iex.Const.con->Ico.U64; -+ ri = LOONGARCH64RI_I(imm, size, isSigned); -+ } -+ break; -+ default: -+ break; -+ } -+ /* else fail, fall through to default case */ -+ } ++ This program is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details-> + -+ if (ri == NULL) { -+ /* default case: calculate into a register and return that */ -+ HReg reg = iselIntExpr_R(env, e); -+ ri = LOONGARCH64RI_R(reg); ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, see . ++ ++ The GNU General Public License is contained in the file COPYING. ++*/ ++ ++#include "libvex_basictypes.h" ++#include "libvex_ir.h" ++#include "libvex.h" ++ ++#include "main_util.h" ++#include "main_globals.h" ++#include "host_generic_regs.h" ++#include "host_loongarch64_defs.h" ++ ++ ++/*---------------------------------------------------------*/ ++/*--- ISelEnv ---*/ ++/*---------------------------------------------------------*/ ++ ++/* This carries around: ++ ++ - A mapping from IRTemp to IRType, giving the type of any IRTemp we ++ might encounter. This is computed before insn selection starts, ++ and does not change. ++ ++ - A mapping from IRTemp to HReg. This tells the insn selector ++ which virtual register is associated with each IRTemp temporary. ++ This is computed before insn selection starts, and does not ++ change. We expect this mapping to map precisely the same set of ++ IRTemps as the type mapping does. ++ ++ |vregmap| holds the primary register for the IRTemp. ++ |vregmapHI| is only used for 128-bit integer-typed ++ IRTemps. It holds the identity of a second ++ 64-bit virtual HReg, which holds the high half ++ of the value. ++ ++ - The code array, that is, the insns selected so far. ++ ++ - A counter, for generating new virtual registers. ++ ++ - The host hardware capabilities word. This is set at the start ++ and does not change. ++ ++ - A Bool for indicating whether we may generate chain-me ++ instructions for control flow transfers, or whether we must use ++ XAssisted. ++ ++ - The maximum guest address of any guest insn in this block. ++ Actually, the address of the highest-addressed byte from any insn ++ in this block. Is set at the start and does not change. This is ++ used for detecting jumps which are definitely forward-edges from ++ this block, and therefore can be made (chained) to the fast entry ++ point of the destination, thereby avoiding the destination's ++ event check. ++ ++ - An IRExpr*, which may be NULL, holding the IR expression (an ++ IRRoundingMode-encoded value) to which the FPU's rounding mode ++ was most recently set. Setting to NULL is always safe. Used to ++ avoid redundant settings of the FPU's rounding mode, as ++ described in set_FPCR_rounding_mode below. ++ ++ Note, this is all (well, mostly) host-independent. ++*/ ++ ++typedef ++ struct { ++ /* Constant -- are set at the start and do not change. */ ++ IRTypeEnv* type_env; ++ ++ HReg* vregmap; ++ HReg* vregmapHI; ++ Int n_vregmap; ++ ++ UInt hwcaps; ++ ++ Bool chainingAllowed; ++ Addr64 max_ga; ++ ++ /* These are modified as we go along. */ ++ HInstrArray* code; ++ Int vreg_ctr; + } ++ ISelEnv; + -+ return ri; ++ ++static HReg lookupIRTemp ( ISelEnv* env, IRTemp tmp ) ++{ ++ vassert(tmp < env->n_vregmap); ++ return env->vregmap[tmp]; +} + -+/* --------------------- Reg --------------------- */ ++static void lookupIRTempPair ( HReg* vrHI, HReg* vrLO, ++ ISelEnv* env, IRTemp tmp ) ++{ ++ vassert(tmp < env->n_vregmap); ++ vassert(!hregIsInvalid(env->vregmapHI[tmp])); ++ *vrLO = env->vregmap[tmp]; ++ *vrHI = env->vregmapHI[tmp]; ++} + -+static HReg iselIntExpr_R ( ISelEnv* env, IRExpr* e ) ++static void addInstr ( ISelEnv* env, LOONGARCH64Instr* instr ) +{ -+ HReg r = iselIntExpr_R_wrk(env, e); ++ addHInstr(env->code, instr); ++ if (vex_traceflags & VEX_TRACE_VCODE) { ++ ppLOONGARCH64Instr(instr, True); ++ vex_printf("\n"); ++ } ++} + -+ /* sanity checks ... */ -+ vassert(hregClass(r) == HRcInt64); -+ vassert(hregIsVirtual(r)); ++static HReg newVRegI ( ISelEnv* env ) ++{ ++ HReg reg = mkHReg(True/*virtual reg*/, HRcInt64, 0, env->vreg_ctr); ++ env->vreg_ctr++; ++ return reg; ++} + -+ return r; ++static HReg newVRegF ( ISelEnv* env ) ++{ ++ HReg reg = mkHReg(True/*virtual reg*/, HRcFlt64, 0, env->vreg_ctr); ++ env->vreg_ctr++; ++ return reg; +} + -+/* DO NOT CALL THIS DIRECTLY ! */ -+static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e ) ++static HReg newVRegV ( ISelEnv* env ) +{ -+ IRType ty = typeOfIRExpr(env->type_env, e); -+ vassert(e); -+ vassert(ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32 || ty == Ity_I64); ++ HReg reg = mkHReg(True/*virtual reg*/, HRcVec128, 0, env->vreg_ctr); ++ env->vreg_ctr++; ++ return reg; ++} ++ ++ ++/*---------------------------------------------------------*/ ++/*--- ISEL: Forward declarations ---*/ ++/*---------------------------------------------------------*/ ++ ++/* These are organised as iselXXX and iselXXX_wrk pairs. The ++ iselXXX_wrk do the real work, but are not to be called directly. ++ For each XXX, iselXXX calls its iselXXX_wrk counterpart, then ++ checks that all returned registers are virtual. You should not ++ call the _wrk version directly. ++*/ ++ ++static LOONGARCH64AMode* iselIntExpr_AMode_wrk ( ISelEnv* env, ++ IRExpr* e, IRType dty ); ++static LOONGARCH64AMode* iselIntExpr_AMode ( ISelEnv* env, ++ IRExpr* e, IRType dty ); ++ ++static LOONGARCH64RI* iselIntExpr_RI_wrk ( ISelEnv* env, IRExpr* e, ++ UChar size, Bool isSigned ); ++static LOONGARCH64RI* iselIntExpr_RI ( ISelEnv* env, IRExpr* e, ++ UChar size, Bool isSigned ); ++ ++static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e ); ++static HReg iselIntExpr_R ( ISelEnv* env, IRExpr* e ); ++ ++static HReg iselCondCode_R_wrk ( ISelEnv* env, IRExpr* e ); ++static HReg iselCondCode_R ( ISelEnv* env, IRExpr* e ); ++ ++static void iselInt128Expr_wrk ( HReg* hi, HReg* lo, ++ ISelEnv* env, IRExpr* e ); ++static void iselInt128Expr ( HReg* hi, HReg* lo, ++ ISelEnv* env, IRExpr* e ); ++ ++static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e ); ++static HReg iselFltExpr ( ISelEnv* env, IRExpr* e ); ++ ++static HReg iselV128Expr_wrk ( ISelEnv* env, IRExpr* e ); ++static HReg iselV128Expr ( ISelEnv* env, IRExpr* e ); ++ ++static void iselV256Expr_wrk ( HReg* hi, HReg* lo, ++ ISelEnv* env, IRExpr* e ); ++static void iselV256Expr ( HReg* hi, HReg* lo, ++ ISelEnv* env, IRExpr* e ); ++ ++ ++/*---------------------------------------------------------*/ ++/*--- ISEL: Misc helpers ---*/ ++/*---------------------------------------------------------*/ ++ ++/* Generate move insn */ ++static LOONGARCH64Instr* LOONGARCH64Instr_Move ( HReg to, HReg from ) ++{ ++ LOONGARCH64RI *ri = LOONGARCH64RI_R(hregZERO()); ++ return LOONGARCH64Instr_Binary(LAbin_OR, ri, from, to); ++} ++ ++/* Generate vector move insn */ ++static LOONGARCH64Instr* LOONGARCH64Instr_VecMove ( HReg to, HReg from ) ++{ ++ LOONGARCH64RI *ri = LOONGARCH64RI_I(0, 8, False); ++ return LOONGARCH64Instr_VecBinary(LAvecbin_VORI_B, ri, from, to); ++} ++ ++/* Generate LOONGARCH64AMode from HReg and UInt */ ++static LOONGARCH64AMode* mkLOONGARCH64AMode_RI ( HReg reg, UInt imm ) ++{ ++ vassert(imm < (1 << 12)); ++ return LOONGARCH64AMode_RI(reg, (UShort)imm); ++} ++ ++/* Set floating point rounding mode */ ++static void set_rounding_mode ( ISelEnv* env, IRExpr* mode ) ++{ ++ /* ++ rounding mode | LOONGARCH | IR ++ ------------------------------ ++ to nearest | 00 | 00 ++ to zero | 01 | 11 ++ to +infinity | 10 | 10 ++ to -infinity | 11 | 01 ++ */ ++ ++ /* rm = XOR(rm, (rm << 1)) & 3 */ ++ HReg rm = iselIntExpr_R(env, mode); ++ HReg tmp = newVRegI(env); ++ LOONGARCH64RI* ri = LOONGARCH64RI_I(1, 5, False); ++ LOONGARCH64RI* ri2 = LOONGARCH64RI_R(rm); ++ LOONGARCH64RI* ri3 = LOONGARCH64RI_I(3, 12, False); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_W, ri, rm, tmp)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_XOR, ri2, tmp, rm)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ANDI, ri3, rm, rm)); ++ ++ /* Save old value of FCSR3 */ ++ HReg fcsr = newVRegI(env); ++ addInstr(env, LOONGARCH64Instr_FpMove(LAfpmove_MOVFCSR2GR, ++ hregLOONGARCH64_FCSR3(), fcsr)); ++ ++ /* Store old FCSR3 to stack */ ++ LOONGARCH64RI* ri4 = LOONGARCH64RI_I(-4 & 0xfff, 12, True); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ADDI_D, ri4, hregSP(), hregSP())); ++ LOONGARCH64AMode* am = LOONGARCH64AMode_RI(hregSP(), 0); ++ addInstr(env, LOONGARCH64Instr_Store(LAstore_ST_W, am, fcsr)); ++ ++ /* Set new value of FCSR3 */ ++ LOONGARCH64RI* ri5 = LOONGARCH64RI_I(8, 5, False); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_W, ri5, rm, rm)); ++ addInstr(env, LOONGARCH64Instr_FpMove(LAfpmove_MOVGR2FCSR, ++ rm, hregLOONGARCH64_FCSR3())); ++} ++ ++static void set_rounding_mode_default ( ISelEnv* env ) ++{ ++ /* Load old FCSR3 from stack */ ++ HReg fcsr = newVRegI(env); ++ LOONGARCH64AMode* am = LOONGARCH64AMode_RI(hregSP(), 0); ++ addInstr(env, LOONGARCH64Instr_Load(LAload_LD_WU, am, fcsr)); ++ ++ /* Restore SP */ ++ LOONGARCH64RI* ri = LOONGARCH64RI_I(4, 12, True); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ADDI_D, ri, hregSP(), hregSP())); ++ ++ /* Set new value of FCSR3 */ ++ addInstr(env, LOONGARCH64Instr_FpMove(LAfpmove_MOVGR2FCSR, ++ fcsr, hregLOONGARCH64_FCSR3())); ++} ++ ++/* Convert LOONGARCH FCMP cond to IR result */ ++static HReg convert_cond_to_IR ( ISelEnv* env, HReg src2, HReg src1, Bool size64 ) ++{ ++ HReg tmp = newVRegI(env); ++ HReg dst = newVRegI(env); ++ ++ LOONGARCH64RI* ri1 = LOONGARCH64RI_I(63, 6, False); ++ LOONGARCH64RI* ri2 = LOONGARCH64RI_I(0x45, 12, False); ++ if (size64) ++ addInstr(env, LOONGARCH64Instr_FpCmp(LAfpcmp_FCMP_CUN_D, src2, src1, tmp)); ++ else ++ addInstr(env, LOONGARCH64Instr_FpCmp(LAfpcmp_FCMP_CUN_S, src2, src1, tmp)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_D, ri1, tmp, tmp)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SRAI_D, ri1, tmp, tmp)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ANDI, ri2, tmp, dst)); ++ ++ LOONGARCH64RI* ri3 = LOONGARCH64RI_I(0x1, 12, False); ++ LOONGARCH64RI* ri4 = LOONGARCH64RI_R(tmp); ++ if (size64) ++ addInstr(env, LOONGARCH64Instr_FpCmp(LAfpcmp_FCMP_CLT_D, src2, src1, tmp)); ++ else ++ addInstr(env, LOONGARCH64Instr_FpCmp(LAfpcmp_FCMP_CLT_S, src2, src1, tmp)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_D, ri1, tmp, tmp)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SRAI_D, ri1, tmp, tmp)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ANDI, ri3, tmp, tmp)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_OR, ri4, dst, dst)); ++ ++ LOONGARCH64RI* ri5 = LOONGARCH64RI_I(0x40, 12, False); ++ if (size64) ++ addInstr(env, LOONGARCH64Instr_FpCmp(LAfpcmp_FCMP_CEQ_D, src2, src1, tmp)); ++ else ++ addInstr(env, LOONGARCH64Instr_FpCmp(LAfpcmp_FCMP_CEQ_S, src2, src1, tmp)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_D, ri1, tmp, tmp)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SRAI_D, ri1, tmp, tmp)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ANDI, ri5, tmp, tmp)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_OR, ri4, dst, dst)); + ++ return dst; ++} ++ ++ ++/*---------------------------------------------------------*/ ++/*--- ISEL: Function call helpers ---*/ ++/*---------------------------------------------------------*/ ++ ++/* Used only in doHelperCall. See big comment in doHelperCall re ++ handling of register-parameter args. This function figures out ++ whether evaluation of an expression might require use of a fixed ++ register. If in doubt return True (safe but suboptimal). ++*/ ++static Bool mightRequireFixedRegs ( IRExpr* e ) ++{ ++ if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(e))) { ++ // These are always "safe" -- either a copy of SP in some ++ // arbitrary vreg, or a copy of $r31, respectively. ++ return False; ++ } ++ /* Else it's a "normal" expression. */ + switch (e->tag) { -+ /* --------- TEMP --------- */ -+ case Iex_RdTmp: -+ return lookupIRTemp(env, e->Iex.RdTmp.tmp); ++ case Iex_RdTmp: case Iex_Const: case Iex_Get: ++ return False; ++ default: ++ return True; ++ } ++} + -+ /* --------- LOAD --------- */ -+ case Iex_Load: { -+ if (e->Iex.Load.end != Iend_LE) -+ goto irreducible; ++/* Do a complete function call. |guard| is a Ity_Bit expression ++ indicating whether or not the call happens. If guard==NULL, the ++ call is unconditional. |retloc| is set to indicate where the ++ return value is after the call. The caller (of this fn) must ++ generate code to add |stackAdjustAfterCall| to the stack pointer ++ after the call is done. Returns True iff it managed to handle this ++ combination of arg/return types, else returns False. */ ++static Bool doHelperCall( /*OUT*/UInt* stackAdjustAfterCall, ++ /*OUT*/RetLoc* retloc, ++ ISelEnv* env, ++ IRExpr* guard, ++ IRCallee* cee, IRType retTy, IRExpr** args ) ++{ ++ HReg cond; ++ HReg argregs[LOONGARCH64_N_ARGREGS]; ++ HReg tmpregs[LOONGARCH64_N_ARGREGS]; ++ Bool go_fast; ++ Int n_args, i, nextArgReg; ++ Addr64 target; + -+ LOONGARCH64AMode* am = iselIntExpr_AMode(env, e->Iex.Load.addr, ty); -+ HReg dst = newVRegI(env); -+ LOONGARCH64LoadOp op; -+ switch(ty) { -+ case Ity_I8: -+ op = (am->tag == LAam_RI) ? LAload_LD_BU : LAload_LDX_BU; -+ break; -+ case Ity_I16: -+ op = (am->tag == LAam_RI) ? LAload_LD_HU : LAload_LDX_HU; -+ break; -+ case Ity_I32: -+ op = (am->tag == LAam_RI) ? LAload_LD_WU : LAload_LDX_WU; -+ break; -+ case Ity_I64: -+ op = (am->tag == LAam_RI) ? LAload_LD_D : LAload_LDX_D; -+ break; -+ default: -+ goto irreducible; ++ vassert(LOONGARCH64_N_ARGREGS == 8); ++ ++ /* Set default returns. We'll update them later if needed. */ ++ *stackAdjustAfterCall = 0; ++ *retloc = mk_RetLoc_INVALID(); ++ ++ /* These are used for cross-checking that IR-level constraints on ++ the use of IRExpr_VECRET() and IRExpr_GSPTR() are observed. */ ++ UInt nVECRETs = 0; ++ UInt nGSPTRs = 0; ++ ++ /* Marshal args for a call and do the call. ++ ++ This function only deals with a tiny set of possibilities, which ++ cover all helpers in practice. The restrictions are that only ++ arguments in registers are supported, hence only ++ LOONGARCH64_N_ARGREGS x 64 integer bits in total can be passed. ++ In fact the only supported arg type is I64. ++ ++ The return type can be I{64,32} or V{128,256}. In the latter two ++ cases, it is expected that |args| will contain the special node ++ IRExpr_VECRET(), in which case this routine generates code to ++ allocate space on the stack for the vector return value. Since ++ we are not passing any scalars on the stack, it is enough to ++ preallocate the return space before marshalling any arguments, ++ in this case. ++ ++ |args| may also contain IRExpr_GSPTR(), in which case the ++ value in $r31 is passed as the corresponding argument. ++ ++ Generating code which is both efficient and correct when ++ parameters are to be passed in registers is difficult, for the ++ reasons elaborated in detail in comments attached to ++ doHelperCall() in priv/host_x86_isel.c. Here, we use a variant ++ of the method described in those comments. ++ ++ The problem is split into two cases: the fast scheme and the ++ slow scheme. In the fast scheme, arguments are computed ++ directly into the target (real) registers. This is only safe ++ when we can be sure that computation of each argument will not ++ trash any real registers set by computation of any other ++ argument. ++ ++ In the slow scheme, all args are first computed into vregs, and ++ once they are all done, they are moved to the relevant real ++ regs. This always gives correct code, but it also gives a bunch ++ of vreg-to-rreg moves which are usually redundant but are hard ++ for the register allocator to get rid of. ++ ++ To decide which scheme to use, all argument expressions are ++ first examined. If they are all so simple that it is clear they ++ will be evaluated without use of any fixed registers, use the ++ fast scheme, else use the slow scheme. Note also that only ++ unconditional calls may use the fast scheme, since having to ++ compute a condition expression could itself trash real ++ registers. ++ ++ Note this requires being able to examine an expression and ++ determine whether or not evaluation of it might use a fixed ++ register. That requires knowledge of how the rest of this insn ++ selector works. Currently just the following 3 are regarded as ++ safe -- hopefully they cover the majority of arguments in ++ practice: IRExpr_Tmp IRExpr_Const IRExpr_Get. ++ */ ++ ++ /* LOONGARCH64 calling convention: up to eight registers ($a0 ... $a7) ++ are allowed to be used for passing integer arguments. They correspond ++ to regs $r4 ... $r11. Note that the cee->regparms field is meaningless ++ on LOONGARCH64 host (since we only implement one calling convention) ++ and so we always ignore it. */ ++ ++ n_args = 0; ++ for (i = 0; args[i]; i++) { ++ IRExpr* arg = args[i]; ++ if (UNLIKELY(arg->tag == Iex_VECRET)) { ++ nVECRETs++; ++ } else if (UNLIKELY(arg->tag == Iex_GSPTR)) { ++ nGSPTRs++; ++ } ++ n_args++; ++ } ++ ++ /* If this fails, the IR is ill-formed */ ++ vassert(nGSPTRs == 0 || nGSPTRs == 1); ++ ++ /* If we have a VECRET, allocate space on the stack for the return ++ value, and record the stack pointer after that. */ ++ HReg r_vecRetAddr = INVALID_HREG; ++ LOONGARCH64RI* ri; ++ if (nVECRETs == 1) { ++ vassert(retTy == Ity_V128 || retTy == Ity_V256); ++ r_vecRetAddr = newVRegI(env); ++ if (retTy == Ity_V128) ++ ri = LOONGARCH64RI_I(-16 & 0xfff, 12, True); ++ else // retTy == Ity_V256 ++ ri = LOONGARCH64RI_I(-32 & 0xfff, 12, True); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ADDI_D, ri, hregSP(), hregSP())); ++ addInstr(env, LOONGARCH64Instr_Move(r_vecRetAddr, hregSP())); ++ } else { ++ // If either of these fail, the IR is ill-formed ++ vassert(retTy != Ity_V128 && retTy != Ity_V256); ++ vassert(nVECRETs == 0); ++ } ++ ++ if (n_args > LOONGARCH64_N_ARGREGS) { ++ vpanic("doHelperCall(loongarch64): cannot currently handle > 8 args"); ++ } ++ ++ argregs[0] = hregLOONGARCH64_R4(); ++ argregs[1] = hregLOONGARCH64_R5(); ++ argregs[2] = hregLOONGARCH64_R6(); ++ argregs[3] = hregLOONGARCH64_R7(); ++ argregs[4] = hregLOONGARCH64_R8(); ++ argregs[5] = hregLOONGARCH64_R9(); ++ argregs[6] = hregLOONGARCH64_R10(); ++ argregs[7] = hregLOONGARCH64_R11(); ++ ++ tmpregs[0] = tmpregs[1] = tmpregs[2] = tmpregs[3] = INVALID_HREG; ++ tmpregs[4] = tmpregs[5] = tmpregs[6] = tmpregs[7] = INVALID_HREG; ++ ++ /* First decide which scheme (slow or fast) is to be used. First assume the ++ fast scheme, and select slow if any contraindications (wow) appear. */ ++ ++ go_fast = True; ++ ++ if (guard) { ++ if (guard->tag == Iex_Const ++ && guard->Iex.Const.con->tag == Ico_U1 ++ && guard->Iex.Const.con->Ico.U1 == True) { ++ /* unconditional */ ++ } else { ++ /* Not manifestly unconditional -- be conservative. */ ++ go_fast = False; ++ } ++ } ++ ++ if (go_fast) { ++ for (i = 0; i < n_args; i++) { ++ if (mightRequireFixedRegs(args[i])) { ++ go_fast = False; ++ break; + } -+ addInstr(env, LOONGARCH64Instr_Load(op, am, dst)); -+ return dst; + } ++ } + -+ /* --------- BINARY OP --------- */ -+ case Iex_Binop: { -+ switch (e->Iex.Binop.op) { -+ case Iop_32HLto64: { -+ HReg dst = newVRegI(env); -+ HReg hi = iselIntExpr_R(env, e->Iex.Binop.arg1); -+ LOONGARCH64RI* lo = iselIntExpr_RI(env, e->Iex.Binop.arg2, 0, False); -+ LOONGARCH64RI* ri = LOONGARCH64RI_I(32, 6, False); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_D, ri, hi, dst)); -+ addInstr(env, LOONGARCH64Instr_Binary(LAbin_OR, lo, dst, dst)); -+ return dst; -+ } -+ case Iop_Add32: { -+ HReg dst = newVRegI(env); -+ HReg src1 = iselIntExpr_R(env, e->Iex.Binop.arg1); -+ LOONGARCH64RI* src2 = iselIntExpr_RI(env, e->Iex.Binop.arg2, 12, True); -+ LOONGARCH64BinOp op = (src2->tag == LAri_Reg) ? LAbin_ADD_W : LAbin_ADDI_W; -+ addInstr(env, LOONGARCH64Instr_Binary(op, src2, src1, dst)); -+ return dst; -+ } -+ case Iop_Add64: { -+ HReg dst = newVRegI(env); -+ HReg src1 = iselIntExpr_R(env, e->Iex.Binop.arg1); -+ LOONGARCH64RI* src2 = iselIntExpr_RI(env, e->Iex.Binop.arg2, 12, True); -+ LOONGARCH64BinOp op = (src2->tag == LAri_Reg) ? LAbin_ADD_D : LAbin_ADDI_D; -+ addInstr(env, LOONGARCH64Instr_Binary(op, src2, src1, dst)); -+ return dst; -+ } -+ case Iop_And32: { -+ HReg dst = newVRegI(env); -+ HReg src1 = iselIntExpr_R(env, e->Iex.Binop.arg1); -+ LOONGARCH64RI* src2 = iselIntExpr_RI(env, e->Iex.Binop.arg2, 12, False); -+ LOONGARCH64BinOp op = (src2->tag == LAri_Reg) ? LAbin_AND : LAbin_ANDI; -+ addInstr(env, LOONGARCH64Instr_Binary(op, src2, src1, dst)); ++ if (go_fast) { ++ if (retTy == Ity_V128 || retTy == Ity_V256) ++ go_fast = False; ++ } ++ ++ /* At this point the scheme to use has been established. Generate ++ code to get the arg values into the argument rregs. If we run ++ out of arg regs, give up. */ ++ ++ if (go_fast) { ++ /* FAST SCHEME */ ++ nextArgReg = 0; ++ ++ for (i = 0; i < n_args; i++) { ++ IRExpr* arg = args[i]; ++ ++ IRType aTy = Ity_INVALID; ++ if (LIKELY(!is_IRExpr_VECRET_or_GSPTR(arg))) ++ aTy = typeOfIRExpr(env->type_env, args[i]); ++ ++ if (nextArgReg >= LOONGARCH64_N_ARGREGS) ++ return False; /* out of argregs */ ++ ++ if (aTy == Ity_I64) { ++ addInstr(env, LOONGARCH64Instr_Move(argregs[nextArgReg], ++ iselIntExpr_R(env, args[i]))); ++ nextArgReg++; ++ } else if (arg->tag == Iex_GSPTR) { ++ addInstr(env, LOONGARCH64Instr_Move(argregs[nextArgReg], hregGSP())); ++ nextArgReg++; ++ } else if (arg->tag == Iex_VECRET) { ++ // because of the go_fast logic above, we can't get here, ++ // since vector return values makes us use the slow path ++ // instead. ++ vassert(0); ++ } else ++ return False; /* unhandled arg type */ ++ } ++ ++ /* Fast scheme only applies for unconditional calls. Hence: */ ++ cond = INVALID_HREG; ++ } else { ++ /* SLOW SCHEME; move via temporaries */ ++ nextArgReg = 0; ++ ++ for (i = 0; i < n_args; i++) { ++ IRExpr* arg = args[i]; ++ ++ IRType aTy = Ity_INVALID; ++ if (LIKELY(!is_IRExpr_VECRET_or_GSPTR(arg))) ++ aTy = typeOfIRExpr(env->type_env, args[i]); ++ ++ if (nextArgReg >= LOONGARCH64_N_ARGREGS) ++ return False; /* out of argregs */ ++ ++ if (aTy == Ity_I64) { ++ tmpregs[nextArgReg] = iselIntExpr_R(env, args[i]); ++ nextArgReg++; ++ } else if (arg->tag == Iex_GSPTR) { ++ tmpregs[nextArgReg] = hregGSP(); ++ nextArgReg++; ++ } else if (arg->tag == Iex_VECRET) { ++ vassert(!hregIsInvalid(r_vecRetAddr)); ++ tmpregs[nextArgReg] = r_vecRetAddr; ++ nextArgReg++; ++ } else ++ return False; /* unhandled arg type */ ++ } ++ ++ /* Now we can compute the condition. We can't do it earlier ++ because the argument computations could trash the condition ++ codes. Be a bit clever to handle the common case where the ++ guard is 1:Bit. */ ++ cond = INVALID_HREG; ++ if (guard) { ++ if (guard->tag == Iex_Const ++ && guard->Iex.Const.con->tag == Ico_U1 ++ && guard->Iex.Const.con->Ico.U1 == True) { ++ /* unconditional -- do nothing */ ++ } else { ++ cond = iselCondCode_R(env, guard); ++ } ++ } ++ ++ /* Move the args to their final destinations. */ ++ for (i = 0; i < nextArgReg; i++) { ++ vassert(!(hregIsInvalid(tmpregs[i]))); ++ /* None of these insns, including any spill code that might ++ be generated, may alter the condition codes. */ ++ addInstr(env, LOONGARCH64Instr_Move(argregs[i], tmpregs[i])); ++ } ++ } ++ ++ /* Should be assured by checks above */ ++ vassert(nextArgReg <= LOONGARCH64_N_ARGREGS); ++ ++ /* Do final checks, set the return values, and generate the call ++ instruction proper. */ ++ vassert(nGSPTRs == 0 || nGSPTRs == 1); ++ vassert(nVECRETs == ((retTy == Ity_V128 || retTy == Ity_V256) ? 1 : 0)); ++ vassert(*stackAdjustAfterCall == 0); ++ vassert(is_RetLoc_INVALID(*retloc)); ++ switch (retTy) { ++ case Ity_INVALID: ++ /* Function doesn't return a value. */ ++ *retloc = mk_RetLoc_simple(RLPri_None); ++ break; ++ case Ity_I8: case Ity_I16: case Ity_I32: case Ity_I64: ++ *retloc = mk_RetLoc_simple(RLPri_Int); ++ break; ++ case Ity_V128: ++ *retloc = mk_RetLoc_spRel(RLPri_V128SpRel, 0); ++ *stackAdjustAfterCall = 16; ++ break; ++ case Ity_V256: ++ *retloc = mk_RetLoc_spRel(RLPri_V256SpRel, 0); ++ *stackAdjustAfterCall = 32; ++ break; ++ default: ++ /* IR can denote other possible return types, but we don't ++ handle those here. */ ++ vassert(0); ++ break; ++ } ++ ++ /* Finally, generate the call itself. This needs the *retloc value ++ set in the switch above, which is why it's at the end. */ ++ ++ /* nextArgReg doles out argument registers. Since these are ++ assigned in the order $a0 .. $a7, its numeric value at this point, ++ which must be between 0 and 8 inclusive, is going to be equal to ++ the number of arg regs in use for the call. Hence bake that ++ number into the call (we'll need to know it when doing register ++ allocation, to know what regs the call reads.) */ ++ ++ target = (Addr)cee->addr; ++ addInstr(env, LOONGARCH64Instr_Call(cond, target, nextArgReg, *retloc)); ++ ++ return True; /* success */ ++} ++ ++ ++/*---------------------------------------------------------*/ ++/*--- ISEL: Integer expressions (64/32/16/8 bit) ---*/ ++/*---------------------------------------------------------*/ ++ ++/* Select insns for an integer-typed expression, and add them to the ++ code list. Return a reg holding the result. This reg will be a ++ virtual register. THE RETURNED REG MUST NOT BE MODIFIED. If you ++ want to modify it, ask for a new vreg, copy it in there, and modify ++ the copy. The register allocator will do its best to map both ++ vregs to the same real register, so the copies will often disappear ++ later in the game. ++ ++ This should handle expressions of 64, 32, 16 and 8-bit type. ++ All results are returned in a (mode64 ? 64bit : 32bit) register. ++ For 16- and 8-bit expressions, the upper (32/48/56 : 16/24) bits ++ are arbitrary, so you should mask or sign extend partial values ++ if necessary. ++*/ ++ ++/* --------------------- AMode --------------------- */ ++ ++static LOONGARCH64AMode* iselIntExpr_AMode ( ISelEnv* env, ++ IRExpr* e, IRType dty ) ++{ ++ LOONGARCH64AMode* am = iselIntExpr_AMode_wrk(env, e, dty); ++ ++ /* sanity checks ... */ ++ switch (am->tag) { ++ case LAam_RI: ++ vassert(am->LAam.RI.index < (1 << 12)); ++ vassert(hregClass(am->LAam.RI.base) == HRcInt64); ++ vassert(hregIsVirtual(am->LAam.RI.base)); ++ break; ++ case LAam_RR: ++ vassert(hregClass(am->LAam.RR.base) == HRcInt64); ++ vassert(hregIsVirtual(am->LAam.RR.base)); ++ vassert(hregClass(am->LAam.RR.index) == HRcInt64); ++ vassert(hregIsVirtual(am->LAam.RR.index)); ++ break; ++ default: ++ vpanic("iselIntExpr_AMode: unknown LOONGARCH64 AMode tag"); ++ break; ++ } ++ ++ return am; ++} ++ ++/* DO NOT CALL THIS DIRECTLY ! */ ++static LOONGARCH64AMode* iselIntExpr_AMode_wrk ( ISelEnv* env, ++ IRExpr* e, IRType dty ) ++{ ++ IRType ty = typeOfIRExpr(env->type_env, e); ++ vassert(e); ++ vassert(ty == Ity_I64); ++ ++ /* Add64(expr, i), where i <= 0x7ff */ ++ if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_Add64 ++ && e->Iex.Binop.arg2->tag == Iex_Const ++ && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U64 ++ && e->Iex.Binop.arg2->Iex.Const.con->Ico.U64 <= 0x7ff) { ++ return LOONGARCH64AMode_RI(iselIntExpr_R(env, e->Iex.Binop.arg1), ++ (UShort)e->Iex.Binop.arg2->Iex.Const.con->Ico.U64); ++ } ++ ++ /* Add64(expr, expr) */ ++ if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_Add64) { ++ HReg base = iselIntExpr_R(env, e->Iex.Binop.arg1); ++ HReg index = iselIntExpr_R(env, e->Iex.Binop.arg2); ++ return LOONGARCH64AMode_RR(base, index); ++ } ++ ++ /* Doesn't match anything in particular. Generate it into ++ a register and use that. */ ++ return LOONGARCH64AMode_RI(iselIntExpr_R(env, e), 0); ++} ++ ++/* --------------------- RI --------------------- */ ++ ++static LOONGARCH64RI* iselIntExpr_RI ( ISelEnv* env, IRExpr* e, ++ UChar size, Bool isSigned ) ++{ ++ LOONGARCH64RI* ri = iselIntExpr_RI_wrk(env, e, size, isSigned); ++ ++ /* sanity checks ... */ ++ switch (ri->tag) { ++ case LAri_Imm: ++ switch (ri->LAri.I.size) { ++ case 0 ... 4: ++ case 6 ... 7: ++ vassert(ri->LAri.I.isSigned == False); ++ break; ++ case 9 ... 11: ++ vassert(ri->LAri.I.isSigned == True); ++ break; ++ case 5: case 8: case 12: ++ break; ++ default: ++ break; ++ vassert(0); ++ } ++ vassert(ri->LAri.I.imm < (1 << ri->LAri.I.size)); ++ break; ++ case LAri_Reg: ++ vassert(hregClass(ri->LAri.R.reg) == HRcInt64); ++ vassert(hregIsVirtual(ri->LAri.R.reg)); ++ break; ++ default: ++ vpanic("iselIntExpr_RI: unknown LOONGARCH64 RI tag"); ++ break; ++ } ++ ++ return ri; ++} ++ ++/* DO NOT CALL THIS DIRECTLY ! */ ++static LOONGARCH64RI* iselIntExpr_RI_wrk ( ISelEnv* env, IRExpr* e, ++ UChar size, Bool isSigned ) ++{ ++ IRType ty = typeOfIRExpr(env->type_env, e); ++ vassert(e); ++ vassert(ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32 || ty == Ity_I64); ++ ++ LOONGARCH64RI *ri = NULL; ++ ++ /* special case: immediate */ ++ if (e->tag == Iex_Const) { ++ switch (e->Iex.Const.con->tag) { ++ case Ico_U8: ++ if (!isSigned && e->Iex.Const.con->Ico.U8 < (1 << size)) { ++ UShort imm = e->Iex.Const.con->Ico.U8; ++ ri = LOONGARCH64RI_I(imm, size, isSigned); ++ } ++ break; ++ case Ico_U32: ++ if (!isSigned && e->Iex.Const.con->Ico.U32 < (1 << size)) { ++ UShort imm = e->Iex.Const.con->Ico.U32; ++ ri = LOONGARCH64RI_I(imm, size, isSigned); ++ } ++ break; ++ case Ico_U64: ++ if (!isSigned && e->Iex.Const.con->Ico.U64 < (1 << size)) { ++ UShort imm = e->Iex.Const.con->Ico.U64; ++ ri = LOONGARCH64RI_I(imm, size, isSigned); ++ } ++ break; ++ default: ++ break; ++ } ++ /* else fail, fall through to default case */ ++ } ++ ++ if (ri == NULL) { ++ /* default case: calculate into a register and return that */ ++ HReg reg = iselIntExpr_R(env, e); ++ ri = LOONGARCH64RI_R(reg); ++ } ++ ++ return ri; ++} ++ ++/* --------------------- Reg --------------------- */ ++ ++static HReg iselIntExpr_R ( ISelEnv* env, IRExpr* e ) ++{ ++ HReg r = iselIntExpr_R_wrk(env, e); ++ ++ /* sanity checks ... */ ++ vassert(hregClass(r) == HRcInt64); ++ vassert(hregIsVirtual(r)); ++ ++ return r; ++} ++ ++/* DO NOT CALL THIS DIRECTLY ! */ ++static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e ) ++{ ++ IRType ty = typeOfIRExpr(env->type_env, e); ++ vassert(e); ++ vassert(ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32 || ty == Ity_I64); ++ ++ switch (e->tag) { ++ /* --------- TEMP --------- */ ++ case Iex_RdTmp: ++ return lookupIRTemp(env, e->Iex.RdTmp.tmp); ++ ++ /* --------- LOAD --------- */ ++ case Iex_Load: { ++ if (e->Iex.Load.end != Iend_LE) ++ goto irreducible; ++ ++ LOONGARCH64AMode* am = iselIntExpr_AMode(env, e->Iex.Load.addr, ty); ++ HReg dst = newVRegI(env); ++ LOONGARCH64LoadOp op; ++ switch (ty) { ++ case Ity_I8: ++ op = (am->tag == LAam_RI) ? LAload_LD_BU : LAload_LDX_BU; ++ break; ++ case Ity_I16: ++ op = (am->tag == LAam_RI) ? LAload_LD_HU : LAload_LDX_HU; ++ break; ++ case Ity_I32: ++ op = (am->tag == LAam_RI) ? LAload_LD_WU : LAload_LDX_WU; ++ break; ++ case Ity_I64: ++ op = (am->tag == LAam_RI) ? LAload_LD_D : LAload_LDX_D; ++ break; ++ default: ++ goto irreducible; ++ } ++ addInstr(env, LOONGARCH64Instr_Load(op, am, dst)); ++ return dst; ++ } ++ ++ /* --------- BINARY OP --------- */ ++ case Iex_Binop: { ++ switch (e->Iex.Binop.op) { ++ case Iop_8HLto16: { ++ HReg dst = newVRegI(env); ++ HReg tHi = newVRegI(env); ++ HReg tLow = newVRegI(env); ++ HReg sHi = iselIntExpr_R(env, e->Iex.Binop.arg1); ++ HReg sLow = iselIntExpr_R(env, e->Iex.Binop.arg2); ++ LOONGARCH64RI* ui5 = LOONGARCH64RI_I(8, 5, False); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_W, ui5, sHi, tHi)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_W, ui5, sLow, tLow)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SRLI_W, ui5, tLow, tLow)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_OR, LOONGARCH64RI_R(tHi), tLow, dst)); ++ return dst; ++ } ++ case Iop_16HLto32: { ++ HReg dst = newVRegI(env); ++ HReg tHi = newVRegI(env); ++ HReg tLow = newVRegI(env); ++ HReg sHi = iselIntExpr_R(env, e->Iex.Binop.arg1); ++ HReg sLow = iselIntExpr_R(env, e->Iex.Binop.arg2); ++ LOONGARCH64RI* ui5 = LOONGARCH64RI_I(16, 5, False); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_W, ui5, sHi, tHi)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_W, ui5, sLow, tLow)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SRLI_W, ui5, tLow, tLow)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_OR, LOONGARCH64RI_R(tHi), tLow, dst)); ++ return dst; ++ } ++ case Iop_32HLto64: { ++ HReg dst = newVRegI(env); ++ HReg hi = iselIntExpr_R(env, e->Iex.Binop.arg1); ++ LOONGARCH64RI* lo = iselIntExpr_RI(env, e->Iex.Binop.arg2, 0, False); ++ LOONGARCH64RI* ri = LOONGARCH64RI_I(32, 6, False); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_D, ri, hi, dst)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_OR, lo, dst, dst)); ++ return dst; ++ } ++ case Iop_Add32: { ++ HReg dst = newVRegI(env); ++ HReg src1 = iselIntExpr_R(env, e->Iex.Binop.arg1); ++ LOONGARCH64RI* src2 = iselIntExpr_RI(env, e->Iex.Binop.arg2, 12, True); ++ LOONGARCH64BinOp op = (src2->tag == LAri_Reg) ? LAbin_ADD_W : LAbin_ADDI_W; ++ addInstr(env, LOONGARCH64Instr_Binary(op, src2, src1, dst)); ++ return dst; ++ } ++ case Iop_Add64: { ++ HReg dst = newVRegI(env); ++ HReg src1 = iselIntExpr_R(env, e->Iex.Binop.arg1); ++ LOONGARCH64RI* src2 = iselIntExpr_RI(env, e->Iex.Binop.arg2, 12, True); ++ LOONGARCH64BinOp op = (src2->tag == LAri_Reg) ? LAbin_ADD_D : LAbin_ADDI_D; ++ addInstr(env, LOONGARCH64Instr_Binary(op, src2, src1, dst)); ++ return dst; ++ } ++ case Iop_And8: { ++ HReg dst = newVRegI(env); ++ HReg src1 = iselIntExpr_R(env, e->Iex.Binop.arg1); ++ LOONGARCH64RI* src2 = iselIntExpr_RI(env, e->Iex.Binop.arg2, 12, False); ++ LOONGARCH64BinOp op = (src2->tag == LAri_Reg) ? LAbin_AND : LAbin_ANDI; ++ addInstr(env, LOONGARCH64Instr_Binary(op, src2, src1, dst)); ++ return dst; ++ } ++ case Iop_And32: { ++ HReg dst = newVRegI(env); ++ HReg src1 = iselIntExpr_R(env, e->Iex.Binop.arg1); ++ LOONGARCH64RI* src2 = iselIntExpr_RI(env, e->Iex.Binop.arg2, 12, False); ++ LOONGARCH64BinOp op = (src2->tag == LAri_Reg) ? LAbin_AND : LAbin_ANDI; ++ addInstr(env, LOONGARCH64Instr_Binary(op, src2, src1, dst)); + return dst; + } + case Iop_And64: { @@ -16678,6 +20193,50 @@ index 0000000..0df4f85 + addInstr(env, LOONGARCH64Instr_FpMove(LAfpmove_MOVFR2GR_D, tmp, dst)); + return dst; + } ++ case Iop_GetElem16x8: ++ case Iop_GetElem32x4: ++ case Iop_GetElem64x2: ++ case Iop_GetElem8x16: { ++ UChar size; ++ LOONGARCH64VecBinOp pickOp, veplOp; ++ switch (e->Iex.Binop.op) { ++ case Iop_GetElem8x16: ++ size = 4; ++ pickOp = LAvecbin_VPICKVE2GR_BU; ++ veplOp = LAvecbin_VREPLVE_B; ++ break; ++ case Iop_GetElem16x8: ++ size = 3; ++ pickOp = LAvecbin_VPICKVE2GR_HU; ++ veplOp = LAvecbin_VREPLVE_H; ++ break; ++ case Iop_GetElem32x4: ++ size = 2; ++ pickOp = LAvecbin_VPICKVE2GR_WU; ++ veplOp = LAvecbin_VREPLVE_W; ++ break; ++ case Iop_GetElem64x2: ++ size = 1; ++ pickOp = LAvecbin_VPICKVE2GR_DU; ++ veplOp = LAvecbin_VREPLVE_D; ++ break; ++ default: ++ vassert(0); ++ break; ++ } ++ HReg dst = newVRegI(env); ++ HReg src1 = iselV128Expr(env, e->Iex.Binop.arg1); ++ LOONGARCH64RI* src2 = iselIntExpr_RI(env, e->Iex.Binop.arg2, size, False); ++ if (src2->tag == LAri_Imm) { ++ addInstr(env, LOONGARCH64Instr_VecBinary(pickOp, src2, src1, dst)); ++ } else { ++ HReg v_tmp = newVRegV(env); ++ addInstr(env, LOONGARCH64Instr_VecBinary(veplOp, src2, src1, v_tmp)); ++ addInstr(env, LOONGARCH64Instr_VecBinary(pickOp, LOONGARCH64RI_I(0, size, False), v_tmp, dst)); ++ } ++ ++ return dst; ++ } + case Iop_Max32U: { + HReg cond = newVRegI(env); + HReg dst = newVRegI(env); @@ -16795,6 +20354,16 @@ index 0000000..0df4f85 + addInstr(env, LOONGARCH64Instr_Binary(op, src2, src1, dst)); + return dst; + } ++ case Iop_64HLtoV128: { ++ HReg dst = newVRegV(env); ++ HReg sHi = iselIntExpr_R(env, e->Iex.Binop.arg1); ++ HReg sLow = iselIntExpr_R(env, e->Iex.Binop.arg2); ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VINSGR2VR_D, ++ LOONGARCH64RI_I(0, 1, False), sLow, dst)); ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VINSGR2VR_D, ++ LOONGARCH64RI_I(1, 1, False), sHi, dst)); ++ return dst; ++ } + default: + goto irreducible; + } @@ -16819,6 +20388,14 @@ index 0000000..0df4f85 + addInstr(env, LOONGARCH64Instr_Unary(LAun_EXT_W_H, src, dst)); + return dst; + } ++ case Iop_16Uto32: { ++ HReg dst = newVRegI(env); ++ HReg src = iselIntExpr_R(env, e->Iex.Unop.arg); ++ LOONGARCH64RI* ri = LOONGARCH64RI_I(48, 6, False); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SLLI_D, ri, src, dst)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_SRLI_D, ri, dst, dst)); ++ return dst; ++ } + case Iop_16Uto64: { + HReg dst = newVRegI(env); + HReg src = iselIntExpr_R(env, e->Iex.Unop.arg); @@ -17025,6 +20602,44 @@ index 0000000..0df4f85 + addInstr(env, LOONGARCH64Instr_Binary(LAbin_NOR, ri, src, dst)); + return dst; + } ++ case Iop_V128to32: { ++ HReg dst = newVRegI(env); ++ HReg src = iselV128Expr(env, e->Iex.Unop.arg); ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VPICKVE2GR_W, ++ LOONGARCH64RI_I(0, 2, False), src, dst)); ++ return dst; ++ } ++ case Iop_V128to64: { ++ HReg dst = newVRegI(env); ++ HReg src = iselV128Expr(env, e->Iex.Unop.arg); ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VPICKVE2GR_D, ++ LOONGARCH64RI_I(0, 1, False), src, dst)); ++ return dst; ++ } ++ case Iop_V128HIto64: { ++ HReg dst = newVRegI(env); ++ HReg src = iselV128Expr(env, e->Iex.Unop.arg); ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VPICKVE2GR_D, ++ LOONGARCH64RI_I(1, 1, False), src, dst)); ++ return dst; ++ } ++ case Iop_V256to64_0: case Iop_V256to64_1: ++ case Iop_V256to64_2: case Iop_V256to64_3: { ++ UShort id; ++ HReg vHi, vLo, vec; ++ iselV256Expr(&vHi, &vLo, env, e->Iex.Unop.arg); ++ switch (e->Iex.Unop.op) { ++ case Iop_V256to64_0: vec = vLo; id = 0; break; ++ case Iop_V256to64_1: vec = vLo; id = 1; break; ++ case Iop_V256to64_2: vec = vHi; id = 0; break; ++ case Iop_V256to64_3: vec = vHi; id = 1; break; ++ default: vassert(0); break; ++ } ++ HReg dst = newVRegI(env); ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VPICKVE2GR_D, ++ LOONGARCH64RI_I(id, 1, False), vec, dst)); ++ return dst; ++ } + default: + goto irreducible; + } @@ -17032,25 +20647,34 @@ index 0000000..0df4f85 + + /* --------- GET --------- */ + case Iex_Get: { -+ LOONGARCH64AMode* am = mkLOONGARCH64AMode_RI(hregGSP(), e->Iex.Get.offset); -+ HReg dst = newVRegI(env); ++ Bool ri = e->Iex.Get.offset < 1024; ++ HReg dst = newVRegI(env); ++ HReg tmp; ++ LOONGARCH64AMode* am; + LOONGARCH64LoadOp op; -+ switch(ty) { ++ switch (ty) { + case Ity_I8: -+ op = LAload_LD_BU; ++ op = ri ? LAload_LD_BU : LAload_LDX_BU; + break; + case Ity_I16: -+ op = LAload_LD_HU; ++ op = ri ? LAload_LD_HU : LAload_LDX_HU; + break; + case Ity_I32: -+ op = LAload_LD_WU; ++ op = ri ? LAload_LD_WU : LAload_LDX_WU; + break; + case Ity_I64: -+ op = LAload_LD_D; ++ op = ri ? LAload_LD_D : LAload_LDX_D; + break; + default: + goto irreducible; + } ++ if (ri) { ++ am = LOONGARCH64AMode_RI(hregGSP(), e->Iex.Get.offset); ++ } else { ++ tmp = newVRegI(env); ++ addInstr(env, LOONGARCH64Instr_LI(e->Iex.Get.offset, tmp)); ++ am = LOONGARCH64AMode_RR(hregGSP(), tmp); ++ } + addInstr(env, LOONGARCH64Instr_Load(op, am, dst)); + return dst; + } @@ -17434,7 +21058,7 @@ index 0000000..0df4f85 + LOONGARCH64AMode* am = iselIntExpr_AMode(env, e->Iex.Load.addr, ty); + HReg dst = newVRegF(env); + LOONGARCH64FpLoadOp op; -+ switch(ty) { ++ switch (ty) { + case Ity_F32: + op = (am->tag == LAam_RI) ? LAfpload_FLD_S : LAfpload_FLDX_S; + break; @@ -17450,19 +21074,28 @@ index 0000000..0df4f85 + + /* --------- GET --------- */ + case Iex_Get: { -+ LOONGARCH64AMode* am = mkLOONGARCH64AMode_RI(hregGSP(), e->Iex.Get.offset); -+ HReg dst = newVRegF(env); ++ Bool ri = e->Iex.Get.offset < 1024; ++ HReg dst = newVRegF(env); ++ HReg tmp; ++ LOONGARCH64AMode* am; + LOONGARCH64FpLoadOp op; -+ switch(ty) { ++ switch (ty) { + case Ity_F32: -+ op = LAfpload_FLD_S; ++ op = ri ? LAfpload_FLD_S : LAfpload_FLDX_S; + break; + case Ity_F64: -+ op = LAfpload_FLD_D; ++ op = ri ? LAfpload_FLD_D : LAfpload_FLDX_D; + break; + default: + goto irreducible; + } ++ if (ri) { ++ am = LOONGARCH64AMode_RI(hregGSP(), e->Iex.Get.offset); ++ } else { ++ tmp = newVRegI(env); ++ addInstr(env, LOONGARCH64Instr_LI(e->Iex.Get.offset, tmp)); ++ am = LOONGARCH64AMode_RR(hregGSP(), tmp); ++ } + addInstr(env, LOONGARCH64Instr_FpLoad(op, am, dst)); + return dst; + } @@ -17881,6 +21514,603 @@ index 0000000..0df4f85 + vpanic("iselFltExpr(loongarch64): cannot reduce tree"); +} + ++/*---------------------------------------------------------*/ ++/*--- ISEL: Vector expressions (128 bit) ---*/ ++/*---------------------------------------------------------*/ ++ ++/* Compute a vector value into a register, the identity of ++ which is returned. As with iselIntExpr_R, the reg may be either ++ real or virtual; in any case it must not be changed by subsequent ++ code emitted by the caller. */ ++ ++static HReg iselV128Expr ( ISelEnv* env, IRExpr* e ) ++{ ++ HReg r = iselV128Expr_wrk(env, e); ++ ++ /* sanity checks ... */ ++ vassert(hregClass(r) == HRcVec128); ++ vassert(hregIsVirtual(r)); ++ ++ return r; ++} ++ ++/* DO NOT CALL THIS DIRECTLY */ ++static HReg iselV128Expr_wrk ( ISelEnv* env, IRExpr* e ) ++{ ++ IRType ty = typeOfIRExpr(env->type_env, e); ++ vassert(e); ++ vassert(ty == Ity_V128); ++ ++ switch (e->tag) { ++ /* --------- TEMP --------- */ ++ case Iex_RdTmp: ++ return lookupIRTemp(env, e->Iex.RdTmp.tmp); ++ ++ /* --------- LOAD --------- */ ++ case Iex_Load: { ++ if (e->Iex.Load.end != Iend_LE) ++ goto irreducible; ++ ++ HReg dst = newVRegV(env); ++ LOONGARCH64AMode* am = iselIntExpr_AMode(env, e->Iex.Load.addr, ty); ++ LOONGARCH64VecLoadOp op = (am->tag == LAam_RI) ? LAvecload_VLD : LAvecload_VLDX; ++ addInstr(env, LOONGARCH64Instr_VecLoad(op, am, dst)); ++ return dst; ++ } ++ ++ /* --------- GET --------- */ ++ case Iex_Get: { ++ Bool ri = e->Iex.Get.offset < 1024; ++ HReg dst = newVRegV(env); ++ HReg tmp; ++ LOONGARCH64AMode* am; ++ LOONGARCH64VecLoadOp op; ++ if (ri) { ++ op = LAvecload_VLD; ++ am = LOONGARCH64AMode_RI(hregGSP(), e->Iex.Get.offset); ++ } else { ++ op = LAvecload_VLDX; ++ tmp = newVRegI(env); ++ addInstr(env, LOONGARCH64Instr_LI(e->Iex.Get.offset, tmp)); ++ am = LOONGARCH64AMode_RR(hregGSP(), tmp); ++ } ++ addInstr(env, LOONGARCH64Instr_VecLoad(op, am, dst)); ++ return dst; ++ } ++ ++ /* --------- TERNARY OP --------- */ ++ case Iex_Triop: { ++ IRTriop *triop = e->Iex.Triop.details; ++ switch (triop->op) { ++ case Iop_SetElem8x16: case Iop_SetElem16x8: case Iop_SetElem32x4: { ++ LOONGARCH64VecBinOp op; ++ UChar size; ++ switch (triop->op) { ++ case Iop_SetElem8x16: op = LAvecbin_VINSGR2VR_B; size = 4; break; ++ case Iop_SetElem16x8: op = LAvecbin_VINSGR2VR_H; size = 3; break; ++ case Iop_SetElem32x4: op = LAvecbin_VINSGR2VR_W; size = 2; break; ++ default: vassert(0); break; ++ } ++ HReg dst = newVRegV(env); ++ HReg src1 = iselV128Expr(env, triop->arg1); ++ LOONGARCH64RI* src2 = iselIntExpr_RI(env, triop->arg2, size, False); ++ HReg src3 = iselIntExpr_R(env, triop->arg3); ++ addInstr(env, LOONGARCH64Instr_VecMove(dst, src1)); ++ addInstr(env, LOONGARCH64Instr_VecBinary(op, src2, src3, dst)); ++ return dst; ++ } ++ case Iop_Add32Fx4: case Iop_Add64Fx2: ++ case Iop_Sub32Fx4: case Iop_Sub64Fx2: ++ case Iop_Mul32Fx4: case Iop_Mul64Fx2: ++ case Iop_Div32Fx4: case Iop_Div64Fx2: { ++ LOONGARCH64VecBinOp op; ++ switch (triop->op) { ++ case Iop_Add32Fx4: op = LAvecbin_VFADD_S; break; ++ case Iop_Add64Fx2: op = LAvecbin_VFADD_D; break; ++ case Iop_Sub32Fx4: op = LAvecbin_VFSUB_S; break; ++ case Iop_Sub64Fx2: op = LAvecbin_VFSUB_D; break; ++ case Iop_Mul32Fx4: op = LAvecbin_VFMUL_S; break; ++ case Iop_Mul64Fx2: op = LAvecbin_VFMUL_D; break; ++ case Iop_Div32Fx4: op = LAvecbin_VFDIV_S; break; ++ case Iop_Div64Fx2: op = LAvecbin_VFDIV_D; break; ++ default: vassert(0); break; ++ } ++ HReg dst = newVRegV(env); ++ HReg src1 = iselV128Expr(env, triop->arg2); ++ HReg src2 = iselV128Expr(env, triop->arg3); ++ set_rounding_mode(env, triop->arg1); ++ addInstr(env, LOONGARCH64Instr_VecBinary(op, LOONGARCH64RI_R(src2), src1, dst)); ++ set_rounding_mode_default(env); ++ return dst; ++ } ++ default: goto irreducible; ++ } ++ } ++ ++ /* --------- BINARY OP --------- */ ++ case Iex_Binop: { ++ switch (e->Iex.Binop.op) { ++ case Iop_AndV128: case Iop_OrV128: case Iop_XorV128: ++ case Iop_Add8x16: case Iop_Add16x8: case Iop_Add32x4: case Iop_Add64x2: case Iop_Add128x1: ++ case Iop_Sub8x16: case Iop_Sub16x8: case Iop_Sub32x4: case Iop_Sub64x2: case Iop_Sub128x1: ++ case Iop_QAdd8Sx16: case Iop_QAdd16Sx8: case Iop_QAdd32Sx4: case Iop_QAdd64Sx2: ++ case Iop_QAdd8Ux16: case Iop_QAdd16Ux8: case Iop_QAdd32Ux4: case Iop_QAdd64Ux2: ++ case Iop_QSub8Sx16: case Iop_QSub16Sx8: case Iop_QSub32Sx4: case Iop_QSub64Sx2: ++ case Iop_QSub8Ux16: case Iop_QSub16Ux8: case Iop_QSub32Ux4: case Iop_QSub64Ux2: ++ case Iop_InterleaveHI8x16: case Iop_InterleaveHI16x8: case Iop_InterleaveHI32x4: case Iop_InterleaveHI64x2: ++ case Iop_InterleaveLO8x16: case Iop_InterleaveLO16x8: case Iop_InterleaveLO32x4: case Iop_InterleaveLO64x2: ++ case Iop_Max8Sx16: case Iop_Max16Sx8: case Iop_Max32Sx4: case Iop_Max64Sx2: ++ case Iop_Max8Ux16: case Iop_Max16Ux8: case Iop_Max32Ux4: case Iop_Max64Ux2: ++ case Iop_Min8Sx16: case Iop_Min16Sx8: case Iop_Min32Sx4: case Iop_Min64Sx2: ++ case Iop_Min8Ux16: case Iop_Min16Ux8: case Iop_Min32Ux4: case Iop_Min64Ux2: ++ case Iop_CmpEQ8x16: case Iop_CmpEQ16x8: case Iop_CmpEQ32x4: case Iop_CmpEQ64x2: ++ case Iop_PackOddLanes8x16: case Iop_PackOddLanes16x8: case Iop_PackOddLanes32x4: ++ case Iop_PackEvenLanes8x16: case Iop_PackEvenLanes16x8: case Iop_PackEvenLanes32x4: ++ case Iop_Avg8Ux16: case Iop_Avg16Ux8: case Iop_Avg32Ux4: case Iop_Avg64Ux2: ++ case Iop_Avg8Sx16: case Iop_Avg16Sx8: case Iop_Avg32Sx4: case Iop_Avg64Sx2: ++ case Iop_Mul8x16: case Iop_Mul16x8: case Iop_Mul32x4: ++ case Iop_MulHi8Ux16: case Iop_MulHi16Ux8: case Iop_MulHi32Ux4: ++ case Iop_MulHi8Sx16: case Iop_MulHi16Sx8: case Iop_MulHi32Sx4: ++ case Iop_Shl8x16: case Iop_Shl16x8: case Iop_Shl32x4: case Iop_Shl64x2: ++ case Iop_Shr8x16: case Iop_Shr16x8: case Iop_Shr32x4: case Iop_Shr64x2: ++ case Iop_Sar8x16: case Iop_Sar16x8: case Iop_Sar32x4: case Iop_Sar64x2: ++ case Iop_CmpGT8Sx16: case Iop_CmpGT16Sx8: case Iop_CmpGT32Sx4: case Iop_CmpGT64Sx2: ++ case Iop_CmpGT8Ux16: case Iop_CmpGT16Ux8: case Iop_CmpGT32Ux4: case Iop_CmpGT64Ux2: ++ case Iop_Max32Fx4: case Iop_Max64Fx2: ++ case Iop_Min32Fx4: case Iop_Min64Fx2: { ++ LOONGARCH64VecBinOp op; ++ Bool reverse = False; ++ switch (e->Iex.Binop.op) { ++ case Iop_AndV128: op = LAvecbin_VAND_V; break; ++ case Iop_OrV128: op = LAvecbin_VOR_V; break; ++ case Iop_XorV128: op = LAvecbin_VXOR_V; break; ++ case Iop_Add8x16: op = LAvecbin_VADD_B; break; ++ case Iop_Add16x8: op = LAvecbin_VADD_H; break; ++ case Iop_Add32x4: op = LAvecbin_VADD_W; break; ++ case Iop_Add64x2: op = LAvecbin_VADD_D; break; ++ case Iop_Add128x1: op = LAvecbin_VADD_Q; break; ++ case Iop_Sub8x16: op = LAvecbin_VSUB_B; break; ++ case Iop_Sub16x8: op = LAvecbin_VSUB_H; break; ++ case Iop_Sub32x4: op = LAvecbin_VSUB_W; break; ++ case Iop_Sub64x2: op = LAvecbin_VSUB_D; break; ++ case Iop_Sub128x1: op = LAvecbin_VSUB_Q; break; ++ case Iop_QAdd8Sx16: op = LAvecbin_VSADD_B; break; ++ case Iop_QAdd16Sx8: op = LAvecbin_VSADD_H; break; ++ case Iop_QAdd32Sx4: op = LAvecbin_VSADD_W; break; ++ case Iop_QAdd64Sx2: op = LAvecbin_VSADD_D; break; ++ case Iop_QAdd8Ux16: op = LAvecbin_VSADD_BU; break; ++ case Iop_QAdd16Ux8: op = LAvecbin_VSADD_HU; break; ++ case Iop_QAdd32Ux4: op = LAvecbin_VSADD_WU; break; ++ case Iop_QAdd64Ux2: op = LAvecbin_VSADD_DU; break; ++ case Iop_QSub8Sx16: op = LAvecbin_VSSUB_B; break; ++ case Iop_QSub16Sx8: op = LAvecbin_VSSUB_H; break; ++ case Iop_QSub32Sx4: op = LAvecbin_VSSUB_W; break; ++ case Iop_QSub64Sx2: op = LAvecbin_VSSUB_D; break; ++ case Iop_QSub8Ux16: op = LAvecbin_VSSUB_BU; break; ++ case Iop_QSub16Ux8: op = LAvecbin_VSSUB_HU; break; ++ case Iop_QSub32Ux4: op = LAvecbin_VSSUB_WU; break; ++ case Iop_QSub64Ux2: op = LAvecbin_VSSUB_DU; break; ++ case Iop_InterleaveHI8x16: op = LAvecbin_VILVH_B; break; ++ case Iop_InterleaveHI16x8: op = LAvecbin_VILVH_H; break; ++ case Iop_InterleaveHI32x4: op = LAvecbin_VILVH_W; break; ++ case Iop_InterleaveHI64x2: op = LAvecbin_VILVH_D; break; ++ case Iop_InterleaveLO8x16: op = LAvecbin_VILVL_B; break; ++ case Iop_InterleaveLO16x8: op = LAvecbin_VILVL_H; break; ++ case Iop_InterleaveLO32x4: op = LAvecbin_VILVL_W; break; ++ case Iop_InterleaveLO64x2: op = LAvecbin_VILVL_D; break; ++ case Iop_Max8Sx16: op = LAvecbin_VMAX_B; break; ++ case Iop_Max16Sx8: op = LAvecbin_VMAX_H; break; ++ case Iop_Max32Sx4: op = LAvecbin_VMAX_W; break; ++ case Iop_Max64Sx2: op = LAvecbin_VMAX_D; break; ++ case Iop_Max8Ux16: op = LAvecbin_VMAX_BU; break; ++ case Iop_Max16Ux8: op = LAvecbin_VMAX_HU; break; ++ case Iop_Max32Ux4: op = LAvecbin_VMAX_WU; break; ++ case Iop_Max64Ux2: op = LAvecbin_VMAX_DU; break; ++ case Iop_Min8Sx16: op = LAvecbin_VMIN_B; break; ++ case Iop_Min16Sx8: op = LAvecbin_VMIN_H; break; ++ case Iop_Min32Sx4: op = LAvecbin_VMIN_W; break; ++ case Iop_Min64Sx2: op = LAvecbin_VMIN_D; break; ++ case Iop_Min8Ux16: op = LAvecbin_VMIN_BU; break; ++ case Iop_Min16Ux8: op = LAvecbin_VMIN_HU; break; ++ case Iop_Min32Ux4: op = LAvecbin_VMIN_WU; break; ++ case Iop_Min64Ux2: op = LAvecbin_VMIN_DU; break; ++ case Iop_CmpEQ8x16: op = LAvecbin_VSEQ_B; break; ++ case Iop_CmpEQ16x8: op = LAvecbin_VSEQ_H; break; ++ case Iop_CmpEQ32x4: op = LAvecbin_VSEQ_W; break; ++ case Iop_CmpEQ64x2: op = LAvecbin_VSEQ_D; break; ++ case Iop_PackOddLanes8x16: op = LAvecbin_VPICKOD_B; break; ++ case Iop_PackOddLanes16x8: op = LAvecbin_VPICKOD_H; break; ++ case Iop_PackOddLanes32x4: op = LAvecbin_VPICKOD_W; break; ++ case Iop_PackEvenLanes8x16: op = LAvecbin_VPICKEV_B; break; ++ case Iop_PackEvenLanes16x8: op = LAvecbin_VPICKEV_H; break; ++ case Iop_PackEvenLanes32x4: op = LAvecbin_VPICKEV_W; break; ++ case Iop_Avg8Ux16: op = LAvecbin_VAVGR_BU; break; ++ case Iop_Avg16Ux8: op = LAvecbin_VAVGR_HU; break; ++ case Iop_Avg32Ux4: op = LAvecbin_VAVGR_WU; break; ++ case Iop_Avg64Ux2: op = LAvecbin_VAVGR_DU; break; ++ case Iop_Avg8Sx16: op = LAvecbin_VAVGR_B; break; ++ case Iop_Avg16Sx8: op = LAvecbin_VAVGR_H; break; ++ case Iop_Avg32Sx4: op = LAvecbin_VAVGR_W; break; ++ case Iop_Avg64Sx2: op = LAvecbin_VAVGR_D; break; ++ case Iop_Mul8x16: op = LAvecbin_VMUL_B; break; ++ case Iop_Mul16x8: op = LAvecbin_VMUL_H; break; ++ case Iop_Mul32x4: op = LAvecbin_VMUL_W; break; ++ case Iop_MulHi8Ux16: op = LAvecbin_VMUH_BU; break; ++ case Iop_MulHi16Ux8: op = LAvecbin_VMUH_HU; break; ++ case Iop_MulHi32Ux4: op = LAvecbin_VMUH_WU; break; ++ case Iop_MulHi8Sx16: op = LAvecbin_VMUH_B; break; ++ case Iop_MulHi16Sx8: op = LAvecbin_VMUH_H; break; ++ case Iop_MulHi32Sx4: op = LAvecbin_VMUH_W; break; ++ case Iop_Shl8x16: op = LAvecbin_VSLL_B; break; ++ case Iop_Shl16x8: op = LAvecbin_VSLL_H; break; ++ case Iop_Shl32x4: op = LAvecbin_VSLL_W; break; ++ case Iop_Shl64x2: op = LAvecbin_VSLL_D; break; ++ case Iop_Shr8x16: op = LAvecbin_VSRL_B; break; ++ case Iop_Shr16x8: op = LAvecbin_VSRL_H; break; ++ case Iop_Shr32x4: op = LAvecbin_VSRL_W; break; ++ case Iop_Shr64x2: op = LAvecbin_VSRL_D; break; ++ case Iop_Sar8x16: op = LAvecbin_VSRA_B; break; ++ case Iop_Sar16x8: op = LAvecbin_VSRA_H; break; ++ case Iop_Sar32x4: op = LAvecbin_VSRA_W; break; ++ case Iop_Sar64x2: op = LAvecbin_VSRA_D; break; ++ case Iop_CmpGT8Sx16: op = LAvecbin_VSLT_B; reverse = True; break; ++ case Iop_CmpGT16Sx8: op = LAvecbin_VSLT_H; reverse = True; break; ++ case Iop_CmpGT32Sx4: op = LAvecbin_VSLT_W; reverse = True; break; ++ case Iop_CmpGT64Sx2: op = LAvecbin_VSLT_D; reverse = True; break; ++ case Iop_CmpGT8Ux16: op = LAvecbin_VSLT_BU; reverse = True; break; ++ case Iop_CmpGT16Ux8: op = LAvecbin_VSLT_HU; reverse = True; break; ++ case Iop_CmpGT32Ux4: op = LAvecbin_VSLT_WU; reverse = True; break; ++ case Iop_CmpGT64Ux2: op = LAvecbin_VSLT_DU; reverse = True; break; ++ case Iop_Max32Fx4: op = LAvecbin_VFMAX_S; break; ++ case Iop_Max64Fx2: op = LAvecbin_VFMAX_D; break; ++ case Iop_Min32Fx4: op = LAvecbin_VFMIN_S; break; ++ case Iop_Min64Fx2: op = LAvecbin_VFMIN_D; break; ++ default: vassert(0); break; ++ } ++ HReg dst = newVRegV(env); ++ HReg src1 = iselV128Expr(env, e->Iex.Binop.arg1); ++ HReg src2 = iselV128Expr(env, e->Iex.Binop.arg2); ++ if (reverse) ++ addInstr(env, LOONGARCH64Instr_VecBinary(op, LOONGARCH64RI_R(src1), src2, dst)); ++ else ++ addInstr(env, LOONGARCH64Instr_VecBinary(op, LOONGARCH64RI_R(src2), src1, dst)); ++ return dst; ++ } ++ case Iop_ShlN8x16: case Iop_ShlN16x8: case Iop_ShlN32x4: case Iop_ShlN64x2: ++ case Iop_ShrN8x16: case Iop_ShrN16x8: case Iop_ShrN32x4: case Iop_ShrN64x2: ++ case Iop_SarN8x16: case Iop_SarN16x8: case Iop_SarN32x4: case Iop_SarN64x2: ++ case Iop_ShlV128: case Iop_ShrV128: { ++ UChar size; ++ LOONGARCH64VecBinOp op; ++ switch (e->Iex.Binop.op) { ++ case Iop_ShlN8x16: op = LAvecbin_VSLLI_B; size = 3; break; ++ case Iop_ShlN16x8: op = LAvecbin_VSLLI_H; size = 4; break; ++ case Iop_ShlN32x4: op = LAvecbin_VSLLI_W; size = 5; break; ++ case Iop_ShlN64x2: op = LAvecbin_VSLLI_D; size = 6; break; ++ case Iop_ShrN8x16: op = LAvecbin_VSRLI_B; size = 3; break; ++ case Iop_ShrN16x8: op = LAvecbin_VSRLI_H; size = 4; break; ++ case Iop_ShrN32x4: op = LAvecbin_VSRLI_W; size = 5; break; ++ case Iop_ShrN64x2: op = LAvecbin_VSRLI_D; size = 6; break; ++ case Iop_SarN8x16: op = LAvecbin_VSRAI_B; size = 3; break; ++ case Iop_SarN16x8: op = LAvecbin_VSRAI_H; size = 4; break; ++ case Iop_SarN32x4: op = LAvecbin_VSRAI_W; size = 5; break; ++ case Iop_SarN64x2: op = LAvecbin_VSRAI_D; size = 6; break; ++ case Iop_ShlV128: op = LAvecbin_VBSLL_V; size = 5; break; ++ case Iop_ShrV128: op = LAvecbin_VBSRL_V; size = 5; break; ++ default: vassert(0); break; ++ } ++ HReg dst = newVRegV(env); ++ HReg src1 = iselV128Expr(env, e->Iex.Binop.arg1); ++ LOONGARCH64RI* src2 = iselIntExpr_RI(env, e->Iex.Binop.arg2, size, False); ++ vassert(e->Iex.Binop.arg2->tag == Iex_Const); ++ vassert(e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U8); ++ vassert(e->Iex.Binop.arg2->Iex.Const.con->Ico.U8 <= 63); ++ addInstr(env, LOONGARCH64Instr_VecBinary(op, src2, src1, dst)); ++ return dst; ++ } ++ case Iop_64HLtoV128: { ++ HReg dst = newVRegV(env); ++ HReg sHi = iselIntExpr_R(env, e->Iex.Binop.arg1); ++ HReg sLow = iselIntExpr_R(env, e->Iex.Binop.arg2); ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VINSGR2VR_D, ++ LOONGARCH64RI_I(0, 1, False), sLow, dst)); ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VINSGR2VR_D, ++ LOONGARCH64RI_I(1, 1, False), sHi, dst)); ++ return dst; ++ } ++ default: goto irreducible; ++ } ++ } ++ ++ /* --------- UNARY OP --------- */ ++ case Iex_Unop: { ++ switch (e->Iex.Unop.op) { ++ case Iop_32UtoV128: { ++ HReg dst = newVRegV(env); ++ HReg src = iselIntExpr_R(env, e->Iex.Unop.arg); ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VINSGR2VR_W, ++ LOONGARCH64RI_I(0, 2, False), src, dst)); ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VINSGR2VR_W, ++ LOONGARCH64RI_I(1, 2, False), hregZERO(), dst)); ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VINSGR2VR_W, ++ LOONGARCH64RI_I(2, 2, False), hregZERO(), dst)); ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VINSGR2VR_W, ++ LOONGARCH64RI_I(3, 2, False), hregZERO(), dst)); ++ return dst; ++ } ++ case Iop_64UtoV128: { ++ HReg dst = newVRegV(env); ++ HReg src = iselIntExpr_R(env, e->Iex.Unop.arg); ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VINSGR2VR_D, ++ LOONGARCH64RI_I(0, 1, False), src, dst)); ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VINSGR2VR_D, ++ LOONGARCH64RI_I(1, 1, False), hregZERO(), dst)); ++ return dst; ++ } ++ case Iop_NotV128: { ++ HReg dst = newVRegV(env); ++ HReg src = iselV128Expr(env, e->Iex.Unop.arg); ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VNOR_V, ++ LOONGARCH64RI_R(src), src, dst)); ++ return dst; ++ } ++ case Iop_Abs8x16: case Iop_Abs16x8: ++ case Iop_Abs32x4: case Iop_Abs64x2: { ++ LOONGARCH64VecBinOp subOp, addOp; ++ switch (e->Iex.Unop.op) { ++ case Iop_Abs8x16: ++ subOp = LAvecbin_VSUB_B; ++ addOp = LAvecbin_VADDA_B; ++ break; ++ case Iop_Abs16x8: ++ subOp = LAvecbin_VSUB_H; ++ addOp = LAvecbin_VADDA_H; ++ break; ++ case Iop_Abs32x4: ++ subOp = LAvecbin_VSUB_W; ++ addOp = LAvecbin_VADDA_W; ++ break; ++ case Iop_Abs64x2: ++ subOp = LAvecbin_VSUB_D; ++ addOp = LAvecbin_VADDA_D; ++ break; ++ default: ++ vassert(0); ++ break; ++ }; ++ HReg dst = newVRegV(env); ++ HReg src = iselV128Expr(env, e->Iex.Unop.arg); ++ HReg sub = newVRegV(env); ++ addInstr(env, LOONGARCH64Instr_VecBinary(subOp, LOONGARCH64RI_R(src), src, sub)); ++ addInstr(env, LOONGARCH64Instr_VecBinary(addOp, LOONGARCH64RI_R(src), sub, dst)); ++ return dst; ++ } ++ case Iop_Dup8x16: case Iop_Dup16x8: case Iop_Dup32x4: { ++ HReg dst = newVRegV(env); ++ HReg src = iselIntExpr_R(env, e->Iex.Unop.arg); ++ LOONGARCH64VecUnOp op; ++ switch (e->Iex.Unop.op) { ++ case Iop_Dup8x16: op = LAvecun_VREPLGR2VR_B; break; ++ case Iop_Dup16x8: op = LAvecun_VREPLGR2VR_H; break; ++ case Iop_Dup32x4: op = LAvecun_VREPLGR2VR_W; break; ++ default: vassert(0); break; ++ } ++ addInstr(env, LOONGARCH64Instr_VecUnary(op, src, dst)); ++ return dst; ++ } ++ case Iop_V256toV128_0: ++ case Iop_V256toV128_1: { ++ HReg vHi, vLo; ++ iselV256Expr(&vHi, &vLo, env, e->Iex.Unop.arg); ++ return (e->Iex.Unop.op == Iop_V256toV128_1) ? vHi : vLo; ++ } ++ default: ++ goto irreducible; ++ } ++ } ++ ++ case Iex_Const: { ++ IRConst *con = e->Iex.Const.con; ++ ++ if (con->tag != Ico_V128) { ++ vpanic("iselV128Expr.const(LoongArch)"); ++ goto irreducible; ++ } ++ ++ HReg dst = newVRegV(env); ++ UShort val = con->Ico.V128; ++ ++ if (val == 0) { ++ addInstr(env, LOONGARCH64Instr_VecUnary(LAvecun_VREPLGR2VR_D, hregZERO(), dst)); ++ } else { ++ HReg r_tmp = newVRegI(env); ++ UInt i; ++ addInstr(env, LOONGARCH64Instr_LI(0xfful, r_tmp)); ++ if (val & 1) { ++ addInstr(env, LOONGARCH64Instr_VecUnary(LAvecun_VREPLGR2VR_B, r_tmp, dst)); ++ } else { ++ addInstr(env, LOONGARCH64Instr_VecUnary(LAvecun_VREPLGR2VR_B, hregZERO(), dst)); ++ } ++ for (i = 1; i < 16; i++) { ++ val >>= 1; ++ if (val & 1) { ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VINSGR2VR_B, ++ LOONGARCH64RI_I(i, 4, False), ++ r_tmp, dst)); ++ } else { ++ addInstr(env, LOONGARCH64Instr_VecBinary(LAvecbin_VINSGR2VR_B, ++ LOONGARCH64RI_I(i, 4, False), ++ hregZERO(), dst)); ++ } ++ } ++ } ++ ++ return dst; ++ } ++ ++ default: ++ break; ++ } ++ ++ /* We get here if no pattern matched. */ ++irreducible: ++ ppIRExpr(e); ++ vpanic("iselV128Expr(loongarch64): cannot reduce tree"); ++} ++ ++ ++/*---------------------------------------------------------*/ ++/*--- ISEL: Vector expressions (256 bit) ---*/ ++/*---------------------------------------------------------*/ ++ ++/* Compute a vector value into a register, the identity of ++ which is returned. As with iselIntExpr_R, the reg may be either ++ real or virtual; in any case it must not be changed by subsequent ++ code emitted by the caller. */ ++ ++static void iselV256Expr ( HReg* hi, HReg* lo, ++ ISelEnv* env, IRExpr* e ) ++{ ++ iselV256Expr_wrk( hi, lo, env, e ); ++ ++ /* sanity checks ... */ ++ vassert(hregClass(*hi) == HRcVec128); ++ vassert(hregIsVirtual(*hi)); ++ vassert(hregClass(*lo) == HRcVec128); ++ vassert(hregIsVirtual(*lo)); ++} ++ ++/* DO NOT CALL THIS DIRECTLY */ ++static void iselV256Expr_wrk ( HReg* hi, HReg* lo, ++ ISelEnv* env, IRExpr* e ) ++{ ++ IRType ty = typeOfIRExpr(env->type_env, e); ++ vassert(e); ++ vassert(ty == Ity_V256); ++ ++ switch (e->tag) { ++ /* --------- TEMP --------- */ ++ case Iex_RdTmp: { ++ lookupIRTempPair(hi, lo, env, e->Iex.RdTmp.tmp); ++ return; ++ } ++ ++ /* --------- LOAD --------- */ ++ case Iex_Load: { ++ if (e->Iex.Load.end != Iend_LE) ++ goto irreducible; ++ ++ HReg dstHi = newVRegV(env); ++ HReg dstLo = newVRegV(env); ++ LOONGARCH64AMode* am = iselIntExpr_AMode(env, e->Iex.Load.addr, ty); ++ LOONGARCH64VecLoadOp op = (am->tag == LAam_RI) ? LAvecload_VLD : LAvecload_VLDX; ++ HReg addr = iselIntExpr_R(env, e->Iex.Load.addr); ++ LOONGARCH64AMode* am16 = LOONGARCH64AMode_RI(addr, 16); ++ addInstr(env, LOONGARCH64Instr_VecLoad(op, am, dstLo)); ++ addInstr(env, LOONGARCH64Instr_VecLoad(LAvecload_VLD, am16, dstHi)); ++ *hi = dstHi; ++ *lo = dstLo; ++ return; ++ } ++ ++ /* --------- GET --------- */ ++ case Iex_Get: { ++ Bool ri = e->Iex.Get.offset < 1024; ++ HReg dstHi = newVRegV(env); ++ HReg dstLo = newVRegV(env); ++ LOONGARCH64VecLoadOp op, op2; ++ HReg tmp, tmp2; ++ LOONGARCH64AMode* am; ++ LOONGARCH64AMode* am2; ++ if (ri) { ++ op = LAvecload_VLD; ++ am = LOONGARCH64AMode_RI(hregGSP(), e->Iex.Get.offset); ++ } else { ++ op = LAvecload_VLDX; ++ tmp = newVRegI(env); ++ addInstr(env, LOONGARCH64Instr_LI(e->Iex.Get.offset, tmp)); ++ am = LOONGARCH64AMode_RR(hregGSP(), tmp); ++ } ++ if (e->Iex.Get.offset + 16 < 1024) { ++ op2 = LAvecload_VLD; ++ am2 = LOONGARCH64AMode_RI(hregGSP(), e->Iex.Get.offset + 16); ++ } else { ++ op2 = LAvecload_VLDX; ++ tmp2 = newVRegI(env); ++ addInstr(env, LOONGARCH64Instr_LI(e->Iex.Get.offset + 16, tmp2)); ++ am2 = LOONGARCH64AMode_RR(hregGSP(), tmp2); ++ } ++ addInstr(env, LOONGARCH64Instr_VecLoad(op, am, dstLo)); ++ addInstr(env, LOONGARCH64Instr_VecLoad(op2, am2, dstHi)); ++ *hi = dstHi; ++ *lo = dstLo; ++ return; ++ } ++ ++ /* --------- BINARY OP --------- */ ++ case Iex_Binop: { ++ switch (e->Iex.Binop.op) { ++ case Iop_V128HLtoV256: { ++ *hi = iselV128Expr(env, e->Iex.Binop.arg1); ++ *lo = iselV128Expr(env, e->Iex.Binop.arg2); ++ return; ++ } ++ case Iop_XorV256: ++ case Iop_CmpEQ8x32: case Iop_CmpEQ16x16: case Iop_CmpEQ32x8: case Iop_CmpEQ64x4: ++ case Iop_Max8Sx32: case Iop_Max16Sx16: case Iop_Max32Sx8: case Iop_Max64Sx4: ++ case Iop_Max8Ux32: case Iop_Max16Ux16: case Iop_Max32Ux8: case Iop_Max64Ux4: ++ case Iop_Min8Sx32: case Iop_Min16Sx16: case Iop_Min32Sx8: case Iop_Min64Sx4: ++ case Iop_Min8Ux32: case Iop_Min16Ux16: case Iop_Min32Ux8: case Iop_Min64Ux4: { ++ LOONGARCH64VecBinOp op; ++ switch (e->Iex.Binop.op) { ++ case Iop_XorV256: op = LAvecbin_VXOR_V; break; ++ case Iop_CmpEQ8x32: op = LAvecbin_VSEQ_B; break; ++ case Iop_CmpEQ16x16: op = LAvecbin_VSEQ_H; break; ++ case Iop_CmpEQ32x8: op = LAvecbin_VSEQ_W; break; ++ case Iop_CmpEQ64x4: op = LAvecbin_VSEQ_D; break; ++ case Iop_Max8Sx32: op = LAvecbin_VMAX_B; break; ++ case Iop_Max16Sx16: op = LAvecbin_VMAX_H; break; ++ case Iop_Max32Sx8: op = LAvecbin_VMAX_W; break; ++ case Iop_Max64Sx4: op = LAvecbin_VMAX_D; break; ++ case Iop_Max8Ux32: op = LAvecbin_VMAX_BU; break; ++ case Iop_Max16Ux16: op = LAvecbin_VMAX_HU; break; ++ case Iop_Max32Ux8: op = LAvecbin_VMAX_WU; break; ++ case Iop_Max64Ux4: op = LAvecbin_VMAX_DU; break; ++ case Iop_Min8Sx32: op = LAvecbin_VMIN_B; break; ++ case Iop_Min16Sx16: op = LAvecbin_VMIN_H; break; ++ case Iop_Min32Sx8: op = LAvecbin_VMIN_W; break; ++ case Iop_Min64Sx4: op = LAvecbin_VMIN_D; break; ++ case Iop_Min8Ux32: op = LAvecbin_VMIN_BU; break; ++ case Iop_Min16Ux16: op = LAvecbin_VMIN_HU; break; ++ case Iop_Min32Ux8: op = LAvecbin_VMIN_WU; break; ++ case Iop_Min64Ux4: op = LAvecbin_VMIN_DU; break; ++ default: vassert(0); break; ++ } ++ HReg src1Hi, src1Lo, src2Hi, src2Lo; ++ iselV256Expr(&src1Hi, &src1Lo, env, e->Iex.Binop.arg1); ++ iselV256Expr(&src2Hi, &src2Lo, env, e->Iex.Binop.arg2); ++ HReg dstHi = newVRegV(env); ++ HReg dstLo = newVRegV(env); ++ addInstr(env, LOONGARCH64Instr_VecBinary(op, LOONGARCH64RI_R(src2Hi), src1Hi, dstHi)); ++ addInstr(env, LOONGARCH64Instr_VecBinary(op, LOONGARCH64RI_R(src2Lo), src1Lo, dstLo)); ++ *hi = dstHi; ++ *lo = dstLo; ++ return; ++ } ++ default: goto irreducible; ++ } ++ } ++ ++ default: ++ break; ++ } ++ ++ /* We get here if no pattern matched. */ ++irreducible: ++ ppIRExpr(e); ++ vpanic("iselV256Expr(loongarch64): cannot reduce tree"); ++} ++ + +/*---------------------------------------------------------*/ +/*--- ISEL: Statements ---*/ @@ -17888,16 +22118,15 @@ index 0000000..0df4f85 + +static void iselStmtStore ( ISelEnv* env, IRStmt* stmt ) +{ -+ IRType tya = typeOfIRExpr(env->type_env, stmt->Ist.Store.addr); -+ IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.Store.data); ++ IRType tya = typeOfIRExpr(env->type_env, stmt->Ist.Store.addr); ++ IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.Store.data); + + if (tya != Ity_I64 || stmt->Ist.Store.end != Iend_LE) + vpanic("iselStmt(loongarch64): Ist_Store"); + -+ Bool fp = False; -+ LOONGARCH64AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr, tyd); -+ LOONGARCH64StoreOp op; -+ LOONGARCH64FpStoreOp fop; ++ LOONGARCH64AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr, tyd); ++ LOONGARCH64StoreOp op; ++ Bool ok = True; + switch (tyd) { + case Ity_I8: + op = (am->tag == LAam_RI) ? LAstore_ST_B : LAstore_STX_B; @@ -17911,25 +22140,49 @@ index 0000000..0df4f85 + case Ity_I64: + op = (am->tag == LAam_RI) ? LAstore_ST_D : LAstore_STX_D; + break; ++ default: ++ ok = False; ++ break; ++ } ++ if (ok) { ++ HReg src = iselIntExpr_R(env, stmt->Ist.Store.data); ++ addInstr(env, LOONGARCH64Instr_Store(op, am, src)); ++ return; ++ } ++ ++ LOONGARCH64FpStoreOp fop; ++ ok = True; ++ switch (tyd) { + case Ity_F32: + fop = (am->tag == LAam_RI) ? LAfpstore_FST_S : LAfpstore_FSTX_S; -+ fp = True; + break; + case Ity_F64: + fop = (am->tag == LAam_RI) ? LAfpstore_FST_D : LAfpstore_FSTX_D; -+ fp = True; + break; + default: -+ vpanic("iselStmt(loongarch64): Ist_Store"); ++ ok = False; + break; + } -+ -+ if (fp) { ++ if (ok) { + HReg src = iselFltExpr(env, stmt->Ist.Store.data); + addInstr(env, LOONGARCH64Instr_FpStore(fop, am, src)); ++ return; ++ } ++ ++ if (tyd == Ity_V128) { ++ LOONGARCH64VecStoreOp vop = (am->tag == LAam_RI) ? LAvecstore_VST : LAvecstore_VSTX; ++ HReg src = iselV128Expr(env, stmt->Ist.Store.data); ++ addInstr(env, LOONGARCH64Instr_VecStore(vop, am, src)); ++ } else if (tyd == Ity_V256) { ++ LOONGARCH64VecStoreOp vop = (am->tag == LAam_RI) ? LAvecstore_VST : LAvecstore_VSTX; ++ HReg addr = iselIntExpr_R(env, stmt->Ist.Store.addr); ++ LOONGARCH64AMode* am16 = LOONGARCH64AMode_RI(addr, 16); ++ HReg hi, lo; ++ iselV256Expr(&hi, &lo, env, stmt->Ist.Store.data); ++ addInstr(env, LOONGARCH64Instr_VecStore(vop, am, lo)); ++ addInstr(env, LOONGARCH64Instr_VecStore(LAvecstore_VST, am16, hi)); + } else { -+ HReg src = iselIntExpr_R(env, stmt->Ist.Store.data); -+ addInstr(env, LOONGARCH64Instr_Store(op, am, src)); ++ vpanic("iselStmt(loongarch64): Ist_Store"); + } +} + @@ -17937,42 +22190,86 @@ index 0000000..0df4f85 +{ + IRType ty = typeOfIRExpr(env->type_env, stmt->Ist.Put.data); + -+ Bool fp = False; -+ LOONGARCH64AMode* am = mkLOONGARCH64AMode_RI(hregGSP(), stmt->Ist.Put.offset); -+ LOONGARCH64StoreOp op; -+ LOONGARCH64FpStoreOp fop; ++ Bool ri = stmt->Ist.Put.offset < 1024; ++ HReg tmp; ++ LOONGARCH64AMode* am; ++ ++ if (ri) { ++ am = LOONGARCH64AMode_RI(hregGSP(), stmt->Ist.Put.offset); ++ } else { ++ tmp = newVRegI(env); ++ addInstr(env, LOONGARCH64Instr_LI(stmt->Ist.Put.offset, tmp)); ++ am = LOONGARCH64AMode_RR(hregGSP(), tmp); ++ } ++ ++ LOONGARCH64StoreOp op; ++ Bool ok = True; + switch (ty) { + case Ity_I8: -+ op = LAstore_ST_B; ++ op = ri ? LAstore_ST_B : LAstore_STX_B; + break; + case Ity_I16: -+ op = LAstore_ST_H; ++ op = ri ? LAstore_ST_H : LAstore_STX_H; + break; + case Ity_I32: -+ op = LAstore_ST_W; ++ op = ri ? LAstore_ST_W : LAstore_STX_W; + break; + case Ity_I64: -+ op = LAstore_ST_D; ++ op = ri ? LAstore_ST_D : LAstore_STX_D; ++ break; ++ default: ++ ok = False; + break; ++ } ++ if (ok) { ++ HReg src = iselIntExpr_R(env, stmt->Ist.Put.data); ++ addInstr(env, LOONGARCH64Instr_Store(op, am, src)); ++ return; ++ } ++ ++ LOONGARCH64FpStoreOp fop; ++ ok = True; ++ switch (ty) { + case Ity_F32: -+ fop = LAfpstore_FST_S; -+ fp = True; ++ fop = ri ? LAfpstore_FST_S : LAfpstore_FSTX_S; + break; + case Ity_F64: -+ fop = LAfpstore_FST_D; -+ fp = True; ++ fop = ri ? LAfpstore_FST_D : LAfpstore_FSTX_D; + break; + default: -+ vpanic("iselStmt(loongarch64): Ist_Put"); ++ ok = False; + break; + } -+ -+ if (fp) { ++ if (ok) { + HReg src = iselFltExpr(env, stmt->Ist.Put.data); + addInstr(env, LOONGARCH64Instr_FpStore(fop, am, src)); ++ return; ++ } ++ ++ if (ty == Ity_V128) { ++ LOONGARCH64VecStoreOp vop = ri ? LAvecstore_VST : LAvecstore_VSTX; ++ HReg src = iselV128Expr(env, stmt->Ist.Put.data); ++ addInstr(env, LOONGARCH64Instr_VecStore(vop, am, src)); ++ } else if (ty == Ity_V256) { ++ LOONGARCH64VecStoreOp vop = ri ? LAvecstore_VST : LAvecstore_VSTX; ++ LOONGARCH64VecStoreOp vop2; ++ HReg hi, lo; ++ HReg tmp2; ++ LOONGARCH64AMode* am2; ++ if (stmt->Ist.Put.offset + 16 < 1024) { ++ vop2 = LAvecstore_VST; ++ am2 = LOONGARCH64AMode_RI(hregGSP(), stmt->Ist.Put.offset + 16); ++ } else { ++ vop2 = LAvecstore_VSTX; ++ tmp2 = newVRegI(env); ++ addInstr(env, LOONGARCH64Instr_LI(stmt->Ist.Put.offset + 16, tmp2)); ++ am2 = LOONGARCH64AMode_RR(hregGSP(), tmp2); ++ } ++ iselV256Expr(&hi, &lo, env, stmt->Ist.Put.data); ++ addInstr(env, LOONGARCH64Instr_VecStore(vop, am, lo)); ++ addInstr(env, LOONGARCH64Instr_VecStore(vop2, am2, hi)); + } else { -+ HReg src = iselIntExpr_R(env, stmt->Ist.Put.data); -+ addInstr(env, LOONGARCH64Instr_Store(op, am, src)); ++ vpanic("iselStmt(loongarch64): Ist_Put"); + } +} + @@ -17981,24 +22278,51 @@ index 0000000..0df4f85 + IRTemp tmp = stmt->Ist.WrTmp.tmp; + IRType ty = typeOfIRTemp(env->type_env, tmp); + -+ if (ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32 || ty == Ity_I64) { -+ HReg dst = lookupIRTemp(env, tmp); -+ HReg src = iselIntExpr_R(env, stmt->Ist.WrTmp.data); -+ addInstr(env, LOONGARCH64Instr_Move(dst, src)); -+ } else if (ty == Ity_I1) { -+ HReg dst = lookupIRTemp(env, tmp); -+ HReg src = iselCondCode_R(env, stmt->Ist.WrTmp.data); -+ addInstr(env, LOONGARCH64Instr_Move(dst, src)); -+ } else if (ty == Ity_F32) { -+ HReg dst = lookupIRTemp(env, tmp); -+ HReg src = iselFltExpr(env, stmt->Ist.WrTmp.data); -+ addInstr(env, LOONGARCH64Instr_FpMove(LAfpmove_FMOV_S, src, dst)); -+ } else if (ty == Ity_F64) { -+ HReg dst = lookupIRTemp(env, tmp); -+ HReg src = iselFltExpr(env, stmt->Ist.WrTmp.data); -+ addInstr(env, LOONGARCH64Instr_FpMove(LAfpmove_FMOV_D, src, dst)); -+ } else { -+ vpanic("iselStmt(loongarch64): Ist_WrTmp"); ++ switch (ty) { ++ case Ity_I8: ++ case Ity_I16: ++ case Ity_I32: ++ case Ity_I64: { ++ HReg dst = lookupIRTemp(env, tmp); ++ HReg src = iselIntExpr_R(env, stmt->Ist.WrTmp.data); ++ addInstr(env, LOONGARCH64Instr_Move(dst, src)); ++ break; ++ } ++ case Ity_I1: { ++ HReg dst = lookupIRTemp(env, tmp); ++ HReg src = iselCondCode_R(env, stmt->Ist.WrTmp.data); ++ addInstr(env, LOONGARCH64Instr_Move(dst, src)); ++ break; ++ } ++ case Ity_F32: { ++ HReg dst = lookupIRTemp(env, tmp); ++ HReg src = iselFltExpr(env, stmt->Ist.WrTmp.data); ++ addInstr(env, LOONGARCH64Instr_FpMove(LAfpmove_FMOV_S, src, dst)); ++ break; ++ } ++ case Ity_F64: { ++ HReg dst = lookupIRTemp(env, tmp); ++ HReg src = iselFltExpr(env, stmt->Ist.WrTmp.data); ++ addInstr(env, LOONGARCH64Instr_FpMove(LAfpmove_FMOV_D, src, dst)); ++ break; ++ } ++ case Ity_V128: { ++ HReg dst = lookupIRTemp(env, tmp); ++ HReg src = iselV128Expr(env, stmt->Ist.WrTmp.data); ++ addInstr(env, LOONGARCH64Instr_VecMove(dst, src)); ++ break; ++ } ++ case Ity_V256: { ++ HReg hi, lo, dstHi, dstLo; ++ lookupIRTempPair(&dstHi, &dstLo, env, tmp); ++ iselV256Expr(&hi, &lo, env, stmt->Ist.WrTmp.data); ++ addInstr(env, LOONGARCH64Instr_VecMove(dstHi, hi)); ++ addInstr(env, LOONGARCH64Instr_VecMove(dstLo, lo)); ++ break; ++ } ++ default: ++ vpanic("iselStmt(loongarch64): Ist_WrTmp"); ++ break; + } +} + @@ -18015,6 +22339,7 @@ index 0000000..0df4f85 + switch (retty) { + case Ity_INVALID: /* function doesn't return anything */ + case Ity_I8: case Ity_I16: case Ity_I32: case Ity_I64: ++ case Ity_V128: case Ity_V256: + retty_ok = True; + break; + default: @@ -18049,6 +22374,54 @@ index 0000000..0df4f85 + addInstr(env, LOONGARCH64Instr_Move(dst, hregLOONGARCH64_R4())); + break; + } ++ case Ity_V128: { ++ /* The returned value is on the stack, and *retloc tells ++ us where. Fish it off the stack and then move the ++ stack pointer upwards to clear it, as directed by ++ doHelperCall. */ ++ vassert(rloc.pri == RLPri_V128SpRel); ++ vassert((rloc.spOff < 512) && (rloc.spOff > -512)); ++ vassert(addToSp >= 16); ++ HReg dst = lookupIRTemp(env, d->tmp); ++ HReg tmp = newVRegI(env); ++ addInstr(env, LOONGARCH64Instr_Move(tmp, hregSP())); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ADDI_D, ++ LOONGARCH64RI_I(rloc.spOff, 12, True), ++ tmp, tmp)); ++ addInstr(env, LOONGARCH64Instr_VecLoad(LAvecload_VLD, ++ LOONGARCH64AMode_RI(tmp, 0), ++ dst)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ADDI_D, ++ LOONGARCH64RI_I(addToSp, 12, True), ++ hregSP(), hregSP())); ++ break; ++ } ++ case Ity_V256: { ++ /* See comments for Ity_V128. */ ++ vassert(rloc.pri == RLPri_V256SpRel); ++ vassert((rloc.spOff + 16 < 512) && (rloc.spOff > -512)); ++ vassert(addToSp >= 32); ++ HReg dstLo, dstHi; ++ lookupIRTempPair(&dstHi, &dstLo, env, d->tmp); ++ HReg tmp = newVRegI(env); ++ addInstr(env, LOONGARCH64Instr_Move(tmp, hregSP())); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ADDI_D, ++ LOONGARCH64RI_I(rloc.spOff, 12, True), ++ tmp, tmp)); ++ addInstr(env, LOONGARCH64Instr_VecLoad(LAvecload_VLD, ++ LOONGARCH64AMode_RI(tmp, 0), ++ dstLo)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ADDI_D, ++ LOONGARCH64RI_I(16, 12, True), ++ tmp, tmp)); ++ addInstr(env, LOONGARCH64Instr_VecLoad(LAvecload_VLD, ++ LOONGARCH64AMode_RI(tmp, 0), ++ dstHi)); ++ addInstr(env, LOONGARCH64Instr_Binary(LAbin_ADDI_D, ++ LOONGARCH64RI_I(addToSp, 12, True), ++ hregSP(), hregSP())); ++ break; ++ } + default: + /*NOTREACHED*/ + vassert(0); @@ -18161,7 +22534,7 @@ index 0000000..0df4f85 + LOONGARCH64AMode* am = mkLOONGARCH64AMode_RI(hregGSP(), stmt->Ist.Exit.offsIP); + + /* Case: boring transfer to known address */ -+ if (stmt->Ist.Exit.jk == Ijk_Boring) { ++ if (stmt->Ist.Exit.jk == Ijk_Boring || stmt->Ist.Exit.jk == Ijk_Call) { + if (env->chainingAllowed) { + /* .. almost always true .. */ + /* Skip the event check at the dst if this is a forwards edge. */ @@ -18200,21390 +22573,1478 @@ index 0000000..0df4f85 + } + default: + /* Do we ever expect to see any other kind? */ -+ vpanic("iselStmt(loongarch64): Ist_Exit"); -+ break; -+ } -+} -+ -+static void iselStmt(ISelEnv* env, IRStmt* stmt) -+{ -+ if (vex_traceflags & VEX_TRACE_VCODE) { -+ vex_printf("\n-- "); -+ ppIRStmt(stmt); -+ vex_printf("\n"); -+ } -+ -+ switch (stmt->tag) { -+ /* --------- STORE --------- */ -+ /* little-endian write to memory */ -+ case Ist_Store: -+ iselStmtStore(env, stmt); -+ break; -+ -+ /* --------- PUT --------- */ -+ /* write guest state, fixed offset */ -+ case Ist_Put: -+ iselStmtPut(env, stmt); -+ break; -+ -+ /* --------- TMP --------- */ -+ /* assign value to temporary */ -+ case Ist_WrTmp: -+ iselStmtTmp(env, stmt); -+ break; -+ -+ /* --------- Call to DIRTY helper --------- */ -+ /* call complex ("dirty") helper function */ -+ case Ist_Dirty: -+ iselStmtDirty(env, stmt); -+ break; -+ -+ /* --------- Load Linked and Store Conditional --------- */ -+ case Ist_LLSC: -+ iselStmtLLSC(env, stmt); -+ break; -+ -+ /* --------- CAS --------- */ -+ case Ist_CAS: -+ iselStmtCas(env, stmt); -+ break; -+ -+ /* --------- MEM FENCE --------- */ -+ case Ist_MBE: -+ iselStmtMBE(env, stmt); -+ break; -+ -+ /* --------- INSTR MARK --------- */ -+ /* Doesn't generate any executable code ... */ -+ case Ist_IMark: -+ break; -+ -+ /* --------- ABI HINT --------- */ -+ /* These have no meaning (denotation in the IR) and so we ignore -+ them ... if any actually made it this far. */ -+ case Ist_AbiHint: -+ break; -+ -+ /* --------- NO-OP --------- */ -+ case Ist_NoOp: -+ break; -+ -+ /* --------- EXIT --------- */ -+ case Ist_Exit: -+ iselStmtExit(env, stmt); -+ break; -+ -+ default: -+ ppIRStmt(stmt); -+ vpanic("iselStmt(loongarch64)"); -+ break; -+ } -+} -+ -+ -+/*---------------------------------------------------------*/ -+/*--- ISEL: Basic block terminators (Nexts) ---*/ -+/*---------------------------------------------------------*/ -+ -+static void iselNext ( ISelEnv* env, IRExpr* next, IRJumpKind jk, Int offsIP ) -+{ -+ if (vex_traceflags & VEX_TRACE_VCODE) { -+ vex_printf("\n-- PUT(%d) = ", offsIP); -+ ppIRExpr(next); -+ vex_printf("; exit-"); -+ ppIRJumpKind(jk); -+ vex_printf("\n"); -+ } -+ -+ /* Case: boring transfer to known address */ -+ if (next->tag == Iex_Const) { -+ IRConst* cdst = next->Iex.Const.con; -+ vassert(cdst->tag == Ico_U64); -+ if (jk == Ijk_Boring) { -+ /* Boring transfer to known address */ -+ LOONGARCH64AMode* am = mkLOONGARCH64AMode_RI(hregGSP(), offsIP); -+ if (env->chainingAllowed) { -+ /* .. almost always true .. */ -+ /* Skip the event check at the dst if this is a forwards edge. */ -+ Bool toFastEP = ((Addr64)cdst->Ico.U64) > env->max_ga; -+ addInstr(env, LOONGARCH64Instr_XDirect(cdst->Ico.U64, am, -+ INVALID_HREG, toFastEP)); -+ } else { -+ /* .. very occasionally .. */ -+ /* We can't use chaining, so ask for an assisted transfer, -+ as that's the only alternative that is allowable. */ -+ HReg dst = iselIntExpr_R(env, next); -+ addInstr(env, LOONGARCH64Instr_XAssisted(dst, am, INVALID_HREG, Ijk_Boring)); -+ } -+ return; -+ } -+ } -+ -+ /* Case: boring transfer to any address */ -+ switch (jk) { -+ case Ijk_Boring: { -+ HReg dst = iselIntExpr_R(env, next); -+ LOONGARCH64AMode* am = mkLOONGARCH64AMode_RI(hregGSP(), offsIP); -+ if (env->chainingAllowed) { -+ addInstr(env, LOONGARCH64Instr_XIndir(dst, am, INVALID_HREG)); -+ } else { -+ addInstr(env, LOONGARCH64Instr_XAssisted(dst, am, -+ INVALID_HREG, Ijk_Boring)); -+ } -+ return; -+ } -+ default: -+ break; -+ } -+ -+ /* Case: assisted transfer to arbitrary address */ -+ switch (jk) { -+ /* Keep this list in sync with that for Ist_Exit above */ -+ case Ijk_ClientReq: -+ case Ijk_NoDecode: -+ case Ijk_InvalICache: -+ case Ijk_NoRedir: -+ case Ijk_SigILL: -+ case Ijk_SigTRAP: -+ case Ijk_SigSEGV: -+ case Ijk_SigBUS: -+ case Ijk_SigFPE_IntDiv: -+ case Ijk_SigFPE_IntOvf: -+ case Ijk_SigSYS: -+ case Ijk_Sys_syscall: { -+ HReg dst = iselIntExpr_R(env, next); -+ LOONGARCH64AMode* am = mkLOONGARCH64AMode_RI(hregGSP(), offsIP); -+ addInstr(env, LOONGARCH64Instr_XAssisted(dst, am, INVALID_HREG, jk)); -+ return; -+ } -+ default: ++ ppIRJumpKind(stmt->Ist.Exit.jk); ++ vpanic("iselStmt(loongarch64): Ist_Exit: unexpected jump kind"); + break; + } -+ -+ vex_printf("\n-- PUT(%d) = ", offsIP); -+ ppIRExpr(next); -+ vex_printf("; exit-"); -+ ppIRJumpKind(jk); -+ vex_printf("\n"); -+ vassert(0); // are we expecting any other kind? +} + ++static void iselStmt(ISelEnv* env, IRStmt* stmt) ++{ ++ if (vex_traceflags & VEX_TRACE_VCODE) { ++ vex_printf("\n-- "); ++ ppIRStmt(stmt); ++ vex_printf("\n"); ++ } + -+/*---------------------------------------------------------*/ -+/*--- Insn selector top-level ---*/ -+/*---------------------------------------------------------*/ -+ -+/* Translate an entire BB to LOONGARCH64 code. */ -+HInstrArray* iselSB_LOONGARCH64 ( const IRSB* bb, -+ VexArch arch_host, -+ const VexArchInfo* archinfo_host, -+ const VexAbiInfo* vbi, -+ Int offs_Host_EvC_Counter, -+ Int offs_Host_EvC_FailAddr, -+ Bool chainingAllowed, -+ Bool addProfInc, -+ Addr max_ga ) -+{ -+ Int i, j; -+ HReg hreg, hregHI; -+ ISelEnv* env; -+ UInt hwcaps_host = archinfo_host->hwcaps; -+ LOONGARCH64AMode *amCounter, *amFailAddr; -+ -+ /* sanity ... */ -+ vassert(arch_host == VexArchLOONGARCH64); -+ vassert((hwcaps_host & ~(VEX_HWCAPS_LOONGARCH_CPUCFG -+ | VEX_HWCAPS_LOONGARCH_LAM -+ | VEX_HWCAPS_LOONGARCH_UAL -+ | VEX_HWCAPS_LOONGARCH_FP -+ | VEX_HWCAPS_LOONGARCH_LSX -+ | VEX_HWCAPS_LOONGARCH_LASX -+ | VEX_HWCAPS_LOONGARCH_COMPLEX -+ | VEX_HWCAPS_LOONGARCH_CRYPTO -+ | VEX_HWCAPS_LOONGARCH_LVZP -+ | VEX_HWCAPS_LOONGARCH_X86BT -+ | VEX_HWCAPS_LOONGARCH_ARMBT -+ | VEX_HWCAPS_LOONGARCH_MIPSBT -+ | VEX_HWCAPS_LOONGARCH_ISA_32BIT -+ | VEX_HWCAPS_LOONGARCH_ISA_64BIT)) == 0); -+ -+ /* Check that the host's endianness is as expected. */ -+ vassert(archinfo_host->endness == VexEndnessLE); -+ -+ /* Make up an initial environment to use. */ -+ env = LibVEX_Alloc_inline(sizeof(ISelEnv)); -+ env->vreg_ctr = 0; -+ -+ /* Set up output code array. */ -+ env->code = newHInstrArray(); -+ -+ /* Copy BB's type env. */ -+ env->type_env = bb->tyenv; -+ -+ /* Make up an IRTemp -> virtual HReg mapping. This doesn't -+ change as we go along. */ -+ env->n_vregmap = bb->tyenv->types_used; -+ env->vregmap = LibVEX_Alloc_inline(env->n_vregmap * sizeof(HReg)); -+ env->vregmapHI = LibVEX_Alloc_inline(env->n_vregmap * sizeof(HReg)); -+ -+ /* and finally ... */ -+ env->chainingAllowed = chainingAllowed; -+ env->hwcaps = hwcaps_host; -+ env->max_ga = max_ga; -+ -+ /* For each IR temporary, allocate a suitably-kinded virtual register. */ -+ j = 0; -+ for (i = 0; i < env->n_vregmap; i++) { -+ hregHI = hreg = INVALID_HREG; -+ switch (bb->tyenv->types[i]) { -+ case Ity_I1: -+ case Ity_I8: -+ case Ity_I16: -+ case Ity_I32: -+ case Ity_I64: -+ hreg = mkHReg(True, HRcInt64, 0, j++); -+ break; -+ case Ity_I128: -+ hreg = mkHReg(True, HRcInt64, 0, j++); -+ hregHI = mkHReg(True, HRcInt64, 0, j++); -+ break; -+ case Ity_F16: // we'll use HRcFlt64 regs for F16 too -+ case Ity_F32: // we'll use HRcFlt64 regs for F32 too -+ case Ity_F64: -+ hreg = mkHReg(True, HRcFlt64, 0, j++); -+ break; -+ default: -+ ppIRType(bb->tyenv->types[i]); -+ vpanic("iselBB(loongarch64): IRTemp type"); -+ } -+ env->vregmap[i] = hreg; -+ env->vregmapHI[i] = hregHI; -+ } -+ env->vreg_ctr = j; -+ -+ /* The very first instruction must be an event check. */ -+ amCounter = mkLOONGARCH64AMode_RI(hregGSP(), offs_Host_EvC_Counter); -+ amFailAddr = mkLOONGARCH64AMode_RI(hregGSP(), offs_Host_EvC_FailAddr); -+ addInstr(env, LOONGARCH64Instr_EvCheck(amCounter, amFailAddr)); -+ -+ /* Possibly a block counter increment (for profiling). At this -+ point we don't know the address of the counter, so just pretend -+ it is zero. It will have to be patched later, but before this -+ translation is used, by a call to LibVEX_patchProfCtr. */ -+ if (addProfInc) { -+ addInstr(env, LOONGARCH64Instr_ProfInc()); -+ } -+ -+ /* Ok, finally we can iterate over the statements. */ -+ for (i = 0; i < bb->stmts_used; i++) -+ iselStmt(env, bb->stmts[i]); -+ -+ iselNext(env, bb->next, bb->jumpkind, bb->offsIP); -+ -+ /* record the number of vregs we used. */ -+ env->code->n_vregs = env->vreg_ctr; -+ return env->code; -+} -+ -+ -+/*---------------------------------------------------------------*/ -+/*--- end host_loongarch64_isel.c ---*/ -+/*---------------------------------------------------------------*/ -diff --git a/VEX/priv/ir_defs.c b/VEX/priv/ir_defs.c -index 176ca9b..0ebb235 100644 ---- a/VEX/priv/ir_defs.c -+++ b/VEX/priv/ir_defs.c -@@ -279,6 +279,8 @@ void ppIROp ( IROp op ) - case Iop_SubF64: vex_printf("SubF64"); return; - case Iop_MulF64: vex_printf("MulF64"); return; - case Iop_DivF64: vex_printf("DivF64"); return; -+ case Iop_ScaleBF64: vex_printf("ScaleBF64"); return; -+ case Iop_ScaleBF32: vex_printf("ScaleBF32"); return; - case Iop_AddF64r32: vex_printf("AddF64r32"); return; - case Iop_SubF64r32: vex_printf("SubF64r32"); return; - case Iop_MulF64r32: vex_printf("MulF64r32"); return; -@@ -345,6 +347,10 @@ void ppIROp ( IROp op ) - case Iop_AbsF32: vex_printf("AbsF32"); return; - case Iop_SqrtF64: vex_printf("SqrtF64"); return; - case Iop_SqrtF32: vex_printf("SqrtF32"); return; -+ case Iop_RSqrtF32: vex_printf("RSqrtF32"); return; -+ case Iop_RSqrtF64: vex_printf("RSqrtF64"); return; -+ case Iop_LogBF32: vex_printf("LogBF32"); return; -+ case Iop_LogBF64: vex_printf("LogBF64"); return; - case Iop_SinF64: vex_printf("SinF64"); return; - case Iop_CosF64: vex_printf("CosF64"); return; - case Iop_TanF64: vex_printf("TanF64"); return; -@@ -368,8 +374,12 @@ void ppIROp ( IROp op ) - - case Iop_MaxNumF64: vex_printf("MaxNumF64"); return; - case Iop_MinNumF64: vex_printf("MinNumF64"); return; -+ case Iop_MaxNumAbsF64: vex_printf("MaxNumAbsF64"); return; -+ case Iop_MinNumAbsF64: vex_printf("MinNumAbsF64"); return; - case Iop_MaxNumF32: vex_printf("MaxNumF32"); return; - case Iop_MinNumF32: vex_printf("MinNumF32"); return; -+ case Iop_MaxNumAbsF32: vex_printf("MaxNumAbsF32"); return; -+ case Iop_MinNumAbsF32: vex_printf("MinNumAbsF32"); return; - - case Iop_F16toF64: vex_printf("F16toF64"); return; - case Iop_F64toF16: vex_printf("F64toF16"); return; -@@ -1400,10 +1410,13 @@ Bool primopMightTrap ( IROp op ) - case Iop_1Uto8: case Iop_1Uto32: case Iop_1Uto64: case Iop_1Sto8: - case Iop_1Sto16: case Iop_1Sto32: case Iop_1Sto64: - case Iop_AddF64: case Iop_SubF64: case Iop_MulF64: case Iop_DivF64: -+ case Iop_ScaleBF64: case Iop_ScaleBF32: - case Iop_AddF32: case Iop_SubF32: case Iop_MulF32: case Iop_DivF32: - case Iop_AddF64r32: case Iop_SubF64r32: case Iop_MulF64r32: - case Iop_DivF64r32: case Iop_NegF64: case Iop_AbsF64: - case Iop_NegF32: case Iop_AbsF32: case Iop_SqrtF64: case Iop_SqrtF32: -+ case Iop_RSqrtF64: case Iop_RSqrtF32: -+ case Iop_LogBF64: case Iop_LogBF32: - case Iop_CmpF64: case Iop_CmpF32: case Iop_CmpF128: case Iop_F64toI16S: - case Iop_F64toI32S: case Iop_F64toI64S: case Iop_F64toI64U: - case Iop_F64toI32U: case Iop_I32StoF64: case Iop_I64StoF64: -@@ -1434,8 +1447,11 @@ Bool primopMightTrap ( IROp op ) - case Iop_RSqrtEst5GoodF64: case Iop_RoundF64toF64_NEAREST: - case Iop_RoundF64toF64_NegINF: case Iop_RoundF64toF64_PosINF: - case Iop_RoundF64toF64_ZERO: case Iop_TruncF64asF32: case Iop_RoundF64toF32: -- case Iop_RecpExpF64: case Iop_RecpExpF32: case Iop_MaxNumF64: -- case Iop_MinNumF64: case Iop_MaxNumF32: case Iop_MinNumF32: -+ case Iop_RecpExpF64: case Iop_RecpExpF32: -+ case Iop_MaxNumF64: case Iop_MinNumF64: -+ case Iop_MaxNumAbsF64: case Iop_MinNumAbsF64: -+ case Iop_MaxNumF32: case Iop_MinNumF32: -+ case Iop_MaxNumAbsF32: case Iop_MinNumAbsF32: - case Iop_F16toF64: case Iop_F64toF16: case Iop_F16toF32: - case Iop_F32toF16: case Iop_QAdd32S: case Iop_QSub32S: - case Iop_Add16x2: case Iop_Sub16x2: -@@ -2026,6 +2042,7 @@ void ppIRJumpKind ( IRJumpKind kind ) - case Ijk_SigFPE: vex_printf("SigFPE"); break; - case Ijk_SigFPE_IntDiv: vex_printf("SigFPE_IntDiv"); break; - case Ijk_SigFPE_IntOvf: vex_printf("SigFPE_IntOvf"); break; -+ case Ijk_SigSYS: vex_printf("SigSYS"); break; - case Ijk_Sys_syscall: vex_printf("Sys_syscall"); break; - case Ijk_Sys_int32: vex_printf("Sys_int32"); break; - case Ijk_Sys_int128: vex_printf("Sys_int128"); break; -@@ -2045,6 +2062,8 @@ void ppIRMBusEvent ( IRMBusEvent event ) - vex_printf("Fence"); break; - case Imbe_CancelReservation: - vex_printf("CancelReservation"); break; -+ case Imbe_InsnFence: -+ vex_printf("InsnFence"); break; - default: - vpanic("ppIRMBusEvent"); - } -@@ -3316,12 +3335,14 @@ void typeOfPrimop ( IROp op, - - case Iop_AddF64: case Iop_SubF64: - case Iop_MulF64: case Iop_DivF64: -+ case Iop_ScaleBF64: - case Iop_AddF64r32: case Iop_SubF64r32: - case Iop_MulF64r32: case Iop_DivF64r32: - TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64); - - case Iop_AddF32: case Iop_SubF32: - case Iop_MulF32: case Iop_DivF32: -+ case Iop_ScaleBF32: - TERNARY(ity_RMode,Ity_F32,Ity_F32, Ity_F32); - - case Iop_NegF64: case Iop_AbsF64: -@@ -3331,18 +3352,24 @@ void typeOfPrimop ( IROp op, - UNARY(Ity_F32, Ity_F32); - - case Iop_SqrtF64: -+ case Iop_RSqrtF64: -+ case Iop_LogBF64: - case Iop_RecpExpF64: - BINARY(ity_RMode,Ity_F64, Ity_F64); - - case Iop_SqrtF32: -+ case Iop_RSqrtF32: -+ case Iop_LogBF32: - case Iop_RoundF32toInt: - case Iop_RecpExpF32: - BINARY(ity_RMode,Ity_F32, Ity_F32); - - case Iop_MaxNumF64: case Iop_MinNumF64: -+ case Iop_MaxNumAbsF64: case Iop_MinNumAbsF64: - BINARY(Ity_F64,Ity_F64, Ity_F64); - - case Iop_MaxNumF32: case Iop_MinNumF32: -+ case Iop_MaxNumAbsF32: case Iop_MinNumAbsF32: - BINARY(Ity_F32,Ity_F32, Ity_F32); - - case Iop_CmpF32: -@@ -5159,7 +5186,9 @@ void tcStmt ( const IRSB* bb, const IRStmt* stmt, IRType gWordTy ) - break; - case Ist_MBE: - switch (stmt->Ist.MBE.event) { -- case Imbe_Fence: case Imbe_CancelReservation: -+ case Imbe_Fence: -+ case Imbe_CancelReservation: -+ case Imbe_InsnFence: - break; - default: sanityCheckFail(bb,stmt,"IRStmt.MBE.event: unknown"); - break; -diff --git a/VEX/priv/main_main.c b/VEX/priv/main_main.c -index 7a3cb75..7230656 100644 ---- a/VEX/priv/main_main.c -+++ b/VEX/priv/main_main.c -@@ -43,6 +43,7 @@ - #include "libvex_guest_s390x.h" - #include "libvex_guest_mips32.h" - #include "libvex_guest_mips64.h" -+#include "libvex_guest_loongarch64.h" - - #include "main_globals.h" - #include "main_util.h" -@@ -57,6 +58,7 @@ - #include "host_s390_defs.h" - #include "host_mips_defs.h" - #include "host_nanomips_defs.h" -+#include "host_loongarch64_defs.h" - - #include "guest_generic_bb_to_IR.h" - #include "guest_x86_defs.h" -@@ -67,6 +69,7 @@ - #include "guest_s390_defs.h" - #include "guest_mips_defs.h" - #include "guest_nanomips_defs.h" -+#include "guest_loongarch64_defs.h" - - #include "host_generic_simd128.h" - -@@ -163,6 +166,14 @@ - #define NANOMIPSST(f) vassert(0) - #endif - -+#if defined(VGA_loongarch64) || defined(VEXMULTIARCH) -+#define LOONGARCH64FN(f) f -+#define LOONGARCH64ST(f) f -+#else -+#define LOONGARCH64FN(f) NULL -+#define LOONGARCH64ST(f) vassert(0) -+#endif -+ - /* This file contains the top level interface to the library. */ - - /* --------- fwds ... --------- */ -@@ -541,6 +552,23 @@ IRSB* LibVEX_FrontEnd ( /*MOD*/ VexTranslateArgs* vta, - vassert(sizeof( ((VexGuestMIPS32State*)0)->guest_NRADDR ) == 4); - break; - -+ case VexArchLOONGARCH64: -+ preciseMemExnsFn -+ = LOONGARCH64FN(guest_loongarch64_state_requires_precise_mem_exns); -+ disInstrFn = LOONGARCH64FN(disInstr_LOONGARCH64); -+ specHelper = LOONGARCH64FN(guest_loongarch64_spechelper); -+ guest_layout = LOONGARCH64FN(&loongarch64Guest_layout); -+ offB_CMSTART = offsetof(VexGuestLOONGARCH64State, guest_CMSTART); -+ offB_CMLEN = offsetof(VexGuestLOONGARCH64State, guest_CMLEN); -+ offB_GUEST_IP = offsetof(VexGuestLOONGARCH64State, guest_PC); -+ szB_GUEST_IP = sizeof( ((VexGuestLOONGARCH64State*)0)->guest_PC ); -+ vassert(vta->archinfo_guest.endness == VexEndnessLE); -+ vassert(sizeof(VexGuestLOONGARCH64State) % LibVEX_GUEST_STATE_ALIGN == 0); -+ vassert(sizeof( ((VexGuestLOONGARCH64State*)0)->guest_CMSTART) == 8); -+ vassert(sizeof( ((VexGuestLOONGARCH64State*)0)->guest_CMLEN ) == 8); -+ vassert(sizeof( ((VexGuestLOONGARCH64State*)0)->guest_NRADDR ) == 8); -+ break; -+ - default: - vpanic("LibVEX_Translate: unsupported guest insn set"); - } -@@ -878,6 +906,14 @@ static void libvex_BackEnd ( const VexTranslateArgs *vta, - offB_HOST_EvC_FAILADDR = offsetof(VexGuestMIPS32State,host_EvC_FAILADDR); - break; - -+ case VexArchLOONGARCH64: -+ preciseMemExnsFn -+ = LOONGARCH64FN(guest_loongarch64_state_requires_precise_mem_exns); -+ guest_sizeB = sizeof(VexGuestLOONGARCH64State); -+ offB_HOST_EvC_COUNTER = offsetof(VexGuestLOONGARCH64State, host_EvC_COUNTER); -+ offB_HOST_EvC_FAILADDR = offsetof(VexGuestLOONGARCH64State, host_EvC_FAILADDR); -+ break; -+ - default: - vpanic("LibVEX_Codegen: unsupported guest insn set"); - } -@@ -1052,6 +1088,23 @@ static void libvex_BackEnd ( const VexTranslateArgs *vta, - || vta->archinfo_host.endness == VexEndnessBE); - break; - -+ case VexArchLOONGARCH64: -+ mode64 = True; -+ rRegUniv = LOONGARCH64FN(getRRegUniverse_LOONGARCH64()); -+ getRegUsage -+ = CAST_TO_TYPEOF(getRegUsage) LOONGARCH64FN(getRegUsage_LOONGARCH64Instr); -+ mapRegs = CAST_TO_TYPEOF(mapRegs) LOONGARCH64FN(mapRegs_LOONGARCH64Instr); -+ genSpill = CAST_TO_TYPEOF(genSpill) LOONGARCH64FN(genSpill_LOONGARCH64); -+ genReload = CAST_TO_TYPEOF(genReload) LOONGARCH64FN(genReload_LOONGARCH64); -+ genMove = CAST_TO_TYPEOF(genMove) LOONGARCH64FN(genMove_LOONGARCH64); -+ ppInstr = CAST_TO_TYPEOF(ppInstr) LOONGARCH64FN(ppLOONGARCH64Instr); -+ ppReg = CAST_TO_TYPEOF(ppReg) LOONGARCH64FN(ppHRegLOONGARCH64); -+ iselSB = LOONGARCH64FN(iselSB_LOONGARCH64); -+ emit = CAST_TO_TYPEOF(emit) LOONGARCH64FN(emit_LOONGARCH64Instr); -+ vassert(vta->archinfo_host.endness == VexEndnessLE -+ || vta->archinfo_host.endness == VexEndnessBE); -+ break; -+ - default: - vpanic("LibVEX_Translate: unsupported host insn set"); - } -@@ -1297,6 +1350,11 @@ VexInvalRange LibVEX_Chain ( VexArch arch_host, - place_to_chain, - disp_cp_chain_me_EXPECTED, - place_to_jump_to)); -+ case VexArchLOONGARCH64: -+ LOONGARCH64ST(return chainXDirect_LOONGARCH64(endness_host, -+ place_to_chain, -+ disp_cp_chain_me_EXPECTED, -+ place_to_jump_to)); - default: - vassert(0); - } -@@ -1359,6 +1417,11 @@ VexInvalRange LibVEX_UnChain ( VexArch arch_host, - place_to_unchain, - place_to_jump_to_EXPECTED, - disp_cp_chain_me)); -+ case VexArchLOONGARCH64: -+ LOONGARCH64ST(return unchainXDirect_LOONGARCH64(endness_host, -+ place_to_unchain, -+ place_to_jump_to_EXPECTED, -+ disp_cp_chain_me)); - default: - vassert(0); - } -@@ -1389,6 +1452,8 @@ Int LibVEX_evCheckSzB ( VexArch arch_host ) - MIPS64ST(cached = evCheckSzB_MIPS()); break; - case VexArchNANOMIPS: - NANOMIPSST(cached = evCheckSzB_NANOMIPS()); break; -+ case VexArchLOONGARCH64: -+ LOONGARCH64ST(cached = evCheckSzB_LOONGARCH64()); break; - default: - vassert(0); - } -@@ -1432,6 +1497,10 @@ VexInvalRange LibVEX_PatchProfInc ( VexArch arch_host, - case VexArchNANOMIPS: - NANOMIPSST(return patchProfInc_NANOMIPS(endness_host, place_to_patch, - location_of_counter)); -+ case VexArchLOONGARCH64: -+ LOONGARCH64ST(return patchProfInc_LOONGARCH64(endness_host, -+ place_to_patch, -+ location_of_counter)); - default: - vassert(0); - } -@@ -1515,6 +1584,7 @@ const HChar* LibVEX_ppVexArch ( VexArch arch ) - case VexArchMIPS32: return "MIPS32"; - case VexArchMIPS64: return "MIPS64"; - case VexArchNANOMIPS: return "NANOMIPS"; -+ case VexArchLOONGARCH64: return "LOONGARCH64"; - default: return "VexArch???"; - } - } -@@ -1584,6 +1654,7 @@ static IRType arch_word_size (VexArch arch) { - case VexArchMIPS64: - case VexArchPPC64: - case VexArchS390X: -+ case VexArchLOONGARCH64: - return Ity_I64; - - default: -@@ -1895,6 +1966,38 @@ static const HChar* show_hwcaps_mips64 ( UInt hwcaps ) - return "Unsupported baseline"; - } - -+static const HChar* show_hwcaps_loongarch64 ( UInt hwcaps ) -+{ -+ static const HChar prefix[] = "loongarch64"; -+ static const struct { -+ UInt hwcaps_bit; -+ HChar name[16]; -+ } hwcaps_list[] = { -+ { VEX_HWCAPS_LOONGARCH_CPUCFG, "cpucfg" }, -+ { VEX_HWCAPS_LOONGARCH_LAM, "lam" }, -+ { VEX_HWCAPS_LOONGARCH_UAL, "ual" }, -+ { VEX_HWCAPS_LOONGARCH_FP, "fpu" }, -+ { VEX_HWCAPS_LOONGARCH_LSX, "lsx" }, -+ { VEX_HWCAPS_LOONGARCH_LASX, "lasx" }, -+ { VEX_HWCAPS_LOONGARCH_COMPLEX, "complex" }, -+ { VEX_HWCAPS_LOONGARCH_CRYPTO, "crypto" }, -+ { VEX_HWCAPS_LOONGARCH_LVZP, "lvz" }, -+ { VEX_HWCAPS_LOONGARCH_X86BT, "lbt_x86" }, -+ { VEX_HWCAPS_LOONGARCH_ARMBT, "lbt_arm" }, -+ { VEX_HWCAPS_LOONGARCH_MIPSBT, "lbt_mips" } -+ }; -+ static HChar buf[sizeof(prefix) + -+ NUM_HWCAPS * (sizeof hwcaps_list[0].name + 1) + 1]; // '\0' -+ -+ HChar *p = buf + vex_sprintf(buf, "%s", prefix); -+ UInt i; -+ for (i = 0 ; i < NUM_HWCAPS; ++i) { -+ if (hwcaps & hwcaps_list[i].hwcaps_bit) -+ p = p + vex_sprintf(p, "-%s", hwcaps_list[i].name); -+ } -+ return buf; -+} -+ - #undef NUM_HWCAPS - - /* Thie function must not return NULL. */ -@@ -1911,6 +2014,7 @@ static const HChar* show_hwcaps ( VexArch arch, UInt hwcaps ) - case VexArchS390X: return show_hwcaps_s390x(hwcaps); - case VexArchMIPS32: return show_hwcaps_mips32(hwcaps); - case VexArchMIPS64: return show_hwcaps_mips64(hwcaps); -+ case VexArchLOONGARCH64: return show_hwcaps_loongarch64(hwcaps); - default: return NULL; - } - } -@@ -2148,6 +2252,11 @@ static void check_hwcaps ( VexArch arch, UInt hwcaps ) - return; - invalid_hwcaps(arch, hwcaps, "Unsupported baseline\n"); - -+ case VexArchLOONGARCH64: -+ if (!(hwcaps & VEX_HWCAPS_LOONGARCH_ISA_64BIT)) -+ invalid_hwcaps(arch, hwcaps, "Unsupported baseline\n"); -+ return; -+ - default: - vpanic("unknown architecture"); - } -diff --git a/VEX/pub/libvex.h b/VEX/pub/libvex.h -index 6da26dc..30a43a0 100644 ---- a/VEX/pub/libvex.h -+++ b/VEX/pub/libvex.h -@@ -60,6 +60,7 @@ typedef - VexArchMIPS32, - VexArchMIPS64, - VexArchNANOMIPS, -+ VexArchLOONGARCH64, - } - VexArch; - -@@ -281,6 +282,22 @@ typedef - (VEX_MIPS_PROC_ID(x) == VEX_PRID_IMP_P5600) && \ - (VEX_MIPS_HOST_FP_MODE(x))) - -+/* LoongArch baseline capability */ -+#define VEX_HWCAPS_LOONGARCH_CPUCFG (1 << 0) /* CPU has CPUCFG */ -+#define VEX_HWCAPS_LOONGARCH_LAM (1 << 1) /* CPU has Atomic instructions */ -+#define VEX_HWCAPS_LOONGARCH_UAL (1 << 2) /* CPU has Unaligned Access support */ -+#define VEX_HWCAPS_LOONGARCH_FP (1 << 3) /* CPU has FPU */ -+#define VEX_HWCAPS_LOONGARCH_LSX (1 << 4) /* CPU has 128-bit SIMD instructions */ -+#define VEX_HWCAPS_LOONGARCH_LASX (1 << 5) /* CPU has 256-bit SIMD instructions */ -+#define VEX_HWCAPS_LOONGARCH_COMPLEX (1 << 6) /* CPU has Complex instructions */ -+#define VEX_HWCAPS_LOONGARCH_CRYPTO (1 << 7) /* CPU has Crypto instructions */ -+#define VEX_HWCAPS_LOONGARCH_LVZP (1 << 8) /* CPU has Virtualization extension */ -+#define VEX_HWCAPS_LOONGARCH_X86BT (1 << 9) /* CPU has X86 Binary Translation */ -+#define VEX_HWCAPS_LOONGARCH_ARMBT (1 << 10) /* CPU has ARM Binary Translation */ -+#define VEX_HWCAPS_LOONGARCH_MIPSBT (1 << 11) /* CPU has MIPS Binary Translation */ -+#define VEX_HWCAPS_LOONGARCH_ISA_32BIT (1 << 30) /* 32-bit ISA */ -+#define VEX_HWCAPS_LOONGARCH_ISA_64BIT (1 << 31) /* 64-bit ISA */ -+ - /* These return statically allocated strings. */ - - extern const HChar* LibVEX_ppVexArch ( VexArch ); -@@ -399,6 +416,7 @@ void LibVEX_default_VexArchInfo ( /*OUT*/VexArchInfo* vai ); - guest is mips32 ==> applicable, default True - guest is mips64 ==> applicable, default True - guest is arm64 ==> applicable, default False -+ guest is loongarch64 ==> const True - - host_ppc_calls_use_fndescrs: - host is ppc32-linux ==> False -@@ -1000,6 +1018,10 @@ extern void LibVEX_InitIRI ( const IRICB * ); - ~~~~~ - r21 is GSP. - -+ loongarch64 -+ ~~~~~ -+ r31 is GSP. -+ - ALL GUEST ARCHITECTURES - ~~~~~~~~~~~~~~~~~~~~~~~ - The guest state must contain two pseudo-registers, guest_CMSTART -diff --git a/VEX/pub/libvex_basictypes.h b/VEX/pub/libvex_basictypes.h -index e3f1485..b4c81bf 100644 ---- a/VEX/pub/libvex_basictypes.h -+++ b/VEX/pub/libvex_basictypes.h -@@ -198,6 +198,10 @@ typedef unsigned long HWord; - # define VEX_HOST_WORDSIZE 4 - # define VEX_REGPARM(_n) /* */ - -+#elif defined(__loongarch__) && (__loongarch_grlen == 64) -+# define VEX_HOST_WORDSIZE 8 -+# define VEX_REGPARM(_n) /* */ -+ - #else - # error "Vex: Fatal: Can't establish the host architecture" - #endif -diff --git a/VEX/pub/libvex_guest_loongarch64.h b/VEX/pub/libvex_guest_loongarch64.h -new file mode 100644 -index 0000000..ff59828 ---- /dev/null -+++ b/VEX/pub/libvex_guest_loongarch64.h -@@ -0,0 +1,171 @@ -+ -+/*---------------------------------------------------------------*/ -+/*--- begin libvex_guest_loongarch64.h ---*/ -+/*---------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright (C) 2021-2022 Loongson Technology Corporation Limited -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, see . -+ -+ The GNU General Public License is contained in the file COPYING. -+ -+ Neither the names of the U.S. Department of Energy nor the -+ University of California nor the names of its contributors may be -+ used to endorse or promote products derived from this software -+ without prior written permission. -+*/ -+ -+#ifndef __LIBVEX_PUB_GUEST_LOONGARCH64_H -+#define __LIBVEX_PUB_GUEST_LOONGARCH64_H -+ -+#include "libvex_basictypes.h" -+ -+ -+/*---------------------------------------------------------------*/ -+/*--- Vex's representation of the LOONGARCH64 CPU state. ---*/ -+/*---------------------------------------------------------------*/ -+ -+typedef -+ struct { -+ /* Event check fail addr and counter. */ -+ /* 0 */ ULong host_EvC_FAILADDR; -+ /* 8 */ UInt host_EvC_COUNTER; -+ /* 12 */ UInt _padding0; -+ -+ /* CPU Registers */ -+ /* 16 */ ULong guest_R0; /* Constant zero */ -+ /* 24 */ ULong guest_R1; /* Return address */ -+ /* 32 */ ULong guest_R2; /* Thread pointer */ -+ /* 40 */ ULong guest_R3; /* Stack pointer */ -+ /* 48 */ ULong guest_R4; /* Argument registers / Return value */ -+ /* 56 */ ULong guest_R5; -+ /* 64 */ ULong guest_R6; /* Argument registers */ -+ /* 72 */ ULong guest_R7; -+ /* 80 */ ULong guest_R8; -+ /* 88 */ ULong guest_R9; -+ /* 96 */ ULong guest_R10; -+ /* 104 */ ULong guest_R11; -+ /* 112 */ ULong guest_R12; /* Temporary registers */ -+ /* 120 */ ULong guest_R13; -+ /* 128 */ ULong guest_R14; -+ /* 136 */ ULong guest_R15; -+ /* 144 */ ULong guest_R16; -+ /* 152 */ ULong guest_R17; -+ /* 160 */ ULong guest_R18; -+ /* 168 */ ULong guest_R19; -+ /* 176 */ ULong guest_R20; -+ /* 184 */ ULong guest_R21; /* Reserved */ -+ /* 192 */ ULong guest_R22; /* Frame pointer / Static register */ -+ /* 200 */ ULong guest_R23; /* Static registers */ -+ /* 208 */ ULong guest_R24; -+ /* 216 */ ULong guest_R25; -+ /* 224 */ ULong guest_R26; -+ /* 232 */ ULong guest_R27; -+ /* 240 */ ULong guest_R28; -+ /* 248 */ ULong guest_R29; -+ /* 256 */ ULong guest_R30; -+ /* 264 */ ULong guest_R31; -+ -+ /* 272 */ ULong guest_PC; /* Program counter */ -+ -+ /* FPU Registers */ -+ /* 280 */ ULong guest_F0; /* Argument registers / Return value */ -+ /* 288 */ ULong guest_F1; -+ /* 296 */ ULong guest_F2; /* Argument registers */ -+ /* 304 */ ULong guest_F3; -+ /* 312 */ ULong guest_F4; -+ /* 320 */ ULong guest_F5; -+ /* 328 */ ULong guest_F6; -+ /* 336 */ ULong guest_F7; -+ /* 344 */ ULong guest_F8; /* Temporary registers */ -+ /* 352 */ ULong guest_F9; -+ /* 360 */ ULong guest_F10; -+ /* 368 */ ULong guest_F11; -+ /* 376 */ ULong guest_F12; -+ /* 384 */ ULong guest_F13; -+ /* 392 */ ULong guest_F14; -+ /* 400 */ ULong guest_F15; -+ /* 408 */ ULong guest_F16; -+ /* 416 */ ULong guest_F17; -+ /* 424 */ ULong guest_F18; -+ /* 432 */ ULong guest_F19; -+ /* 440 */ ULong guest_F20; -+ /* 448 */ ULong guest_F21; -+ /* 456 */ ULong guest_F22; -+ /* 464 */ ULong guest_F23; -+ /* 472 */ ULong guest_F24; /* Static registers */ -+ /* 480 */ ULong guest_F25; -+ /* 488 */ ULong guest_F26; -+ /* 496 */ ULong guest_F27; -+ /* 504 */ ULong guest_F28; -+ /* 512 */ ULong guest_F29; -+ /* 520 */ ULong guest_F30; -+ /* 528 */ ULong guest_F31; -+ -+ /* 536 */ UChar guest_FCC0; /* Condition Flag Registers */ -+ /* 537 */ UChar guest_FCC1; -+ /* 538 */ UChar guest_FCC2; -+ /* 539 */ UChar guest_FCC3; -+ /* 540 */ UChar guest_FCC4; -+ /* 541 */ UChar guest_FCC5; -+ /* 542 */ UChar guest_FCC6; -+ /* 543 */ UChar guest_FCC7; -+ /* 544 */ UInt guest_FCSR; /* FP Control and Status Register */ -+ -+ /* Various pseudo-regs mandated by Vex or Valgrind. */ -+ /* Emulation notes */ -+ /* 548 */ UInt guest_EMNOTE; -+ -+ /* For clflush: record start and length of area to invalidate */ -+ /* 552 */ ULong guest_CMSTART; -+ /* 560 */ ULong guest_CMLEN; -+ -+ /* Used to record the unredirected guest address at the start of -+ a translation whose start has been redirected. By reading -+ this pseudo-register shortly afterwards, the translation can -+ find out what the corresponding no-redirection address was. -+ Note, this is only set for wrap-style redirects, not for -+ replace-style ones. */ -+ /* 568 */ ULong guest_NRADDR; -+ -+ /* Fallback LL/SC support. */ -+ /* 576 */ ULong guest_LLSC_SIZE; /* 0==no transaction, else 4 or 8. */ -+ /* 584 */ ULong guest_LLSC_ADDR; /* Address of the transaction. */ -+ /* 592 */ ULong guest_LLSC_DATA; /* Original value at ADDR. */ -+ -+ /* VexGuestLOONGARCH64State should have a 16-aligned size */ -+ /* 600 */ ULong _padding1; -+} VexGuestLOONGARCH64State; -+ -+/*---------------------------------------------------------------*/ -+/*--- Utility functions for LOONGARCH64 guest stuff. ---*/ -+/*---------------------------------------------------------------*/ -+ -+/* ALL THE FOLLOWING ARE VISIBLE TO LIBRARY CLIENT. */ -+ -+/* Initialise all guest LOONGARCH64 state. */ -+ -+extern -+void LibVEX_GuestLOONGARCH64_initialise ( /*OUT*/ -+ VexGuestLOONGARCH64State* vex_state ); -+ -+#endif /* ndef __LIBVEX_PUB_GUEST_LOONGARCH64_H */ -+ -+/*---------------------------------------------------------------*/ -+/*--- libvex_guest_loongarch64.h ---*/ -+/*---------------------------------------------------------------*/ -diff --git a/VEX/pub/libvex_guest_offsets.h b/VEX/pub/libvex_guest_offsets.h -index a456b6d..9faa0ce 100644 ---- a/VEX/pub/libvex_guest_offsets.h -+++ b/VEX/pub/libvex_guest_offsets.h -@@ -162,3 +162,36 @@ - #define OFFSET_mips64_PC 272 - #define OFFSET_mips64_HI 280 - #define OFFSET_mips64_LO 288 -+#define OFFSET_loongarch64_R0 16 -+#define OFFSET_loongarch64_R1 24 -+#define OFFSET_loongarch64_R2 32 -+#define OFFSET_loongarch64_R3 40 -+#define OFFSET_loongarch64_R4 48 -+#define OFFSET_loongarch64_R5 56 -+#define OFFSET_loongarch64_R6 64 -+#define OFFSET_loongarch64_R7 72 -+#define OFFSET_loongarch64_R8 80 -+#define OFFSET_loongarch64_R9 88 -+#define OFFSET_loongarch64_R10 96 -+#define OFFSET_loongarch64_R11 104 -+#define OFFSET_loongarch64_R12 112 -+#define OFFSET_loongarch64_R13 120 -+#define OFFSET_loongarch64_R14 128 -+#define OFFSET_loongarch64_R15 136 -+#define OFFSET_loongarch64_R16 144 -+#define OFFSET_loongarch64_R17 152 -+#define OFFSET_loongarch64_R18 160 -+#define OFFSET_loongarch64_R19 168 -+#define OFFSET_loongarch64_R20 176 -+#define OFFSET_loongarch64_R21 184 -+#define OFFSET_loongarch64_R22 192 -+#define OFFSET_loongarch64_R23 200 -+#define OFFSET_loongarch64_R24 208 -+#define OFFSET_loongarch64_R25 216 -+#define OFFSET_loongarch64_R26 224 -+#define OFFSET_loongarch64_R27 232 -+#define OFFSET_loongarch64_R28 240 -+#define OFFSET_loongarch64_R29 248 -+#define OFFSET_loongarch64_R30 256 -+#define OFFSET_loongarch64_R31 264 -+#define OFFSET_loongarch64_PC 272 -diff --git a/VEX/pub/libvex_ir.h b/VEX/pub/libvex_ir.h -index 6a854e4..d4ba8cd 100644 ---- a/VEX/pub/libvex_ir.h -+++ b/VEX/pub/libvex_ir.h -@@ -575,10 +575,10 @@ typedef - - /* Binary operations, with rounding. */ - /* :: IRRoundingMode(I32) x F64 x F64 -> F64 */ -- Iop_AddF64, Iop_SubF64, Iop_MulF64, Iop_DivF64, -+ Iop_AddF64, Iop_SubF64, Iop_MulF64, Iop_DivF64, Iop_ScaleBF64, - - /* :: IRRoundingMode(I32) x F32 x F32 -> F32 */ -- Iop_AddF32, Iop_SubF32, Iop_MulF32, Iop_DivF32, -+ Iop_AddF32, Iop_SubF32, Iop_MulF32, Iop_DivF32, Iop_ScaleBF32, - - /* Variants of the above which produce a 64-bit result but which - round their result to a IEEE float range first. */ -@@ -594,10 +594,10 @@ typedef - - /* Unary operations, with rounding. */ - /* :: IRRoundingMode(I32) x F64 -> F64 */ -- Iop_SqrtF64, -+ Iop_SqrtF64, Iop_RSqrtF64, Iop_LogBF64, - - /* :: IRRoundingMode(I32) x F32 -> F32 */ -- Iop_SqrtF32, -+ Iop_SqrtF32, Iop_RSqrtF32, Iop_LogBF32, - - /* Comparison, yielding GT/LT/EQ/UN(ordered), as per the following: - 0x45 Unordered -@@ -800,10 +800,14 @@ typedef - - /* --------- Possibly required by IEEE 754-2008. --------- */ - -- Iop_MaxNumF64, /* max, F64, numerical operand if other is a qNaN */ -- Iop_MinNumF64, /* min, F64, ditto */ -- Iop_MaxNumF32, /* max, F32, ditto */ -- Iop_MinNumF32, /* min, F32, ditto */ -+ Iop_MaxNumF64, /* max, F64, numerical operand if other is a qNaN */ -+ Iop_MinNumF64, /* min, F64, ditto */ -+ Iop_MaxNumAbsF64, /* max abs, F64, ditto */ -+ Iop_MinNumAbsF64, /* min abs, F64, ditto */ -+ Iop_MaxNumF32, /* max, F32, ditto */ -+ Iop_MinNumF32, /* min, F32, ditto */ -+ Iop_MaxNumAbsF32, /* max abs, F32, ditto */ -+ Iop_MinNumAbsF32, /* min abs, F32, ditto */ - - /* ------------------ 16-bit scalar FP ------------------ */ - -@@ -2450,6 +2454,7 @@ typedef - Ijk_SigFPE, /* current instruction synths generic SIGFPE */ - Ijk_SigFPE_IntDiv, /* current instruction synths SIGFPE - IntDiv */ - Ijk_SigFPE_IntOvf, /* current instruction synths SIGFPE - IntOvf */ -+ Ijk_SigSYS, /* current instruction synths SIGSYS */ - /* Unfortunately, various guest-dependent syscall kinds. They - all mean: do a syscall before continuing. */ - Ijk_Sys_syscall, /* amd64/x86 'syscall', ppc 'sc', arm 'svc #0' */ -@@ -2609,7 +2614,12 @@ typedef - /* Needed only on ARM. It cancels a reservation made by a - preceding Linked-Load, and needs to be handed through to the - back end, just as LL and SC themselves are. */ -- Imbe_CancelReservation -+ Imbe_CancelReservation, -+ /* Needed only on LOONGARCH64. It completes the synchronization -+ between the store operation and the instruction fetch operation -+ within a single processor core, and needs to be handed through -+ to the back end. */ -+ Imbe_InsnFence - } - IRMBusEvent; - -diff --git a/VEX/pub/libvex_trc_values.h b/VEX/pub/libvex_trc_values.h -index cfd54de..90e2b60 100644 ---- a/VEX/pub/libvex_trc_values.h -+++ b/VEX/pub/libvex_trc_values.h -@@ -57,6 +57,7 @@ - continuing */ - #define VEX_TRC_JMP_SIGBUS 93 /* deliver SIGBUS before continuing */ - #define VEX_TRC_JMP_SIGFPE 105 /* deliver SIGFPE before continuing */ -+#define VEX_TRC_JMP_SIGSYS 115 /* deliver SIGSYS before continuing */ - - #define VEX_TRC_JMP_SIGFPE_INTDIV 97 /* deliver SIGFPE (integer divide - by zero) before continuing */ -diff --git a/aclocal.m4 b/aclocal.m4 -index fa903ea..0fdbb06 100644 ---- a/aclocal.m4 -+++ b/aclocal.m4 -@@ -1,6 +1,6 @@ --# generated automatically by aclocal 1.16.1 -*- Autoconf -*- -+# generated automatically by aclocal 1.16.5 -*- Autoconf -*- - --# Copyright (C) 1996-2018 Free Software Foundation, Inc. -+# Copyright (C) 1996-2021 Free Software Foundation, Inc. - - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -14,13 +14,13 @@ - m4_ifndef([AC_CONFIG_MACRO_DIRS], [m4_defun([_AM_CONFIG_MACRO_DIRS], [])m4_defun([AC_CONFIG_MACRO_DIRS], [_AM_CONFIG_MACRO_DIRS($@)])]) - m4_ifndef([AC_AUTOCONF_VERSION], - [m4_copy([m4_PACKAGE_VERSION], [AC_AUTOCONF_VERSION])])dnl --m4_if(m4_defn([AC_AUTOCONF_VERSION]), [2.69],, --[m4_warning([this file was generated for autoconf 2.69. -+m4_if(m4_defn([AC_AUTOCONF_VERSION]), [2.71],, -+[m4_warning([this file was generated for autoconf 2.71. - You have another version of autoconf. It may work, but is not guaranteed to. - If you have problems, you may need to regenerate the build system entirely. - To do so, use the procedure documented by the package, typically 'autoreconf'.])]) - --# Copyright (C) 2002-2018 Free Software Foundation, Inc. -+# Copyright (C) 2002-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -35,7 +35,7 @@ AC_DEFUN([AM_AUTOMAKE_VERSION], - [am__api_version='1.16' - dnl Some users find AM_AUTOMAKE_VERSION and mistake it for a way to - dnl require some minimum version. Point them to the right macro. --m4_if([$1], [1.16.1], [], -+m4_if([$1], [1.16.5], [], - [AC_FATAL([Do not call $0, use AM_INIT_AUTOMAKE([$1]).])])dnl - ]) - -@@ -51,14 +51,14 @@ m4_define([_AM_AUTOCONF_VERSION], []) - # Call AM_AUTOMAKE_VERSION and AM_AUTOMAKE_VERSION so they can be traced. - # This function is AC_REQUIREd by AM_INIT_AUTOMAKE. - AC_DEFUN([AM_SET_CURRENT_AUTOMAKE_VERSION], --[AM_AUTOMAKE_VERSION([1.16.1])dnl -+[AM_AUTOMAKE_VERSION([1.16.5])dnl - m4_ifndef([AC_AUTOCONF_VERSION], - [m4_copy([m4_PACKAGE_VERSION], [AC_AUTOCONF_VERSION])])dnl - _AM_AUTOCONF_VERSION(m4_defn([AC_AUTOCONF_VERSION]))]) - - # Figure out how to run the assembler. -*- Autoconf -*- - --# Copyright (C) 2001-2018 Free Software Foundation, Inc. -+# Copyright (C) 2001-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -78,7 +78,7 @@ _AM_IF_OPTION([no-dependencies],, [_AM_DEPENDENCIES([CCAS])])dnl - - # AM_AUX_DIR_EXPAND -*- Autoconf -*- - --# Copyright (C) 2001-2018 Free Software Foundation, Inc. -+# Copyright (C) 2001-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -130,7 +130,7 @@ am_aux_dir=`cd "$ac_aux_dir" && pwd` - - # AM_CONDITIONAL -*- Autoconf -*- - --# Copyright (C) 1997-2018 Free Software Foundation, Inc. -+# Copyright (C) 1997-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -161,7 +161,7 @@ AC_CONFIG_COMMANDS_PRE( - Usually this means the macro was only invoked conditionally.]]) - fi])]) - --# Copyright (C) 1999-2018 Free Software Foundation, Inc. -+# Copyright (C) 1999-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -352,7 +352,7 @@ _AM_SUBST_NOTMAKE([am__nodep])dnl - - # Generate code to set up dependency tracking. -*- Autoconf -*- - --# Copyright (C) 1999-2018 Free Software Foundation, Inc. -+# Copyright (C) 1999-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -391,7 +391,9 @@ AC_DEFUN([_AM_OUTPUT_DEPENDENCY_COMMANDS], - done - if test $am_rc -ne 0; then - AC_MSG_FAILURE([Something went wrong bootstrapping makefile fragments -- for automatic dependency tracking. Try re-running configure with the -+ for automatic dependency tracking. If GNU make was not used, consider -+ re-running the configure script with MAKE="gmake" (or whatever is -+ necessary). You can also try re-running configure with the - '--disable-dependency-tracking' option to at least be able to build - the package (albeit without support for automatic dependency tracking).]) - fi -@@ -418,7 +420,7 @@ AC_DEFUN([AM_OUTPUT_DEPENDENCY_COMMANDS], - - # Do all the work for Automake. -*- Autoconf -*- - --# Copyright (C) 1996-2018 Free Software Foundation, Inc. -+# Copyright (C) 1996-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -446,6 +448,10 @@ m4_defn([AC_PROG_CC]) - # release and drop the old call support. - AC_DEFUN([AM_INIT_AUTOMAKE], - [AC_PREREQ([2.65])dnl -+m4_ifdef([_$0_ALREADY_INIT], -+ [m4_fatal([$0 expanded multiple times -+]m4_defn([_$0_ALREADY_INIT]))], -+ [m4_define([_$0_ALREADY_INIT], m4_expansion_stack)])dnl - dnl Autoconf wants to disallow AM_ names. We explicitly allow - dnl the ones we care about. - m4_pattern_allow([^AM_[A-Z]+FLAGS$])dnl -@@ -482,7 +488,7 @@ m4_ifval([$3], [_AM_SET_OPTION([no-define])])dnl - [_AM_SET_OPTIONS([$1])dnl - dnl Diagnose old-style AC_INIT with new-style AM_AUTOMAKE_INIT. - m4_if( -- m4_ifdef([AC_PACKAGE_NAME], [ok]):m4_ifdef([AC_PACKAGE_VERSION], [ok]), -+ m4_ifset([AC_PACKAGE_NAME], [ok]):m4_ifset([AC_PACKAGE_VERSION], [ok]), - [ok:ok],, - [m4_fatal([AC_INIT should be called with package and version arguments])])dnl - AC_SUBST([PACKAGE], ['AC_PACKAGE_TARNAME'])dnl -@@ -534,6 +540,20 @@ AC_PROVIDE_IFELSE([AC_PROG_OBJCXX], - [m4_define([AC_PROG_OBJCXX], - m4_defn([AC_PROG_OBJCXX])[_AM_DEPENDENCIES([OBJCXX])])])dnl - ]) -+# Variables for tags utilities; see am/tags.am -+if test -z "$CTAGS"; then -+ CTAGS=ctags -+fi -+AC_SUBST([CTAGS]) -+if test -z "$ETAGS"; then -+ ETAGS=etags -+fi -+AC_SUBST([ETAGS]) -+if test -z "$CSCOPE"; then -+ CSCOPE=cscope -+fi -+AC_SUBST([CSCOPE]) -+ - AC_REQUIRE([AM_SILENT_RULES])dnl - dnl The testsuite driver may need to know about EXEEXT, so add the - dnl 'am__EXEEXT' conditional if _AM_COMPILER_EXEEXT was seen. This -@@ -615,7 +635,7 @@ for _am_header in $config_headers :; do - done - echo "timestamp for $_am_arg" >`AS_DIRNAME(["$_am_arg"])`/stamp-h[]$_am_stamp_count]) - --# Copyright (C) 2001-2018 Free Software Foundation, Inc. -+# Copyright (C) 2001-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -636,7 +656,7 @@ if test x"${install_sh+set}" != xset; then - fi - AC_SUBST([install_sh])]) - --# Copyright (C) 2003-2018 Free Software Foundation, Inc. -+# Copyright (C) 2003-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -658,7 +678,7 @@ AC_SUBST([am__leading_dot])]) - # Add --enable-maintainer-mode option to configure. -*- Autoconf -*- - # From Jim Meyering - --# Copyright (C) 1996-2018 Free Software Foundation, Inc. -+# Copyright (C) 1996-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -693,7 +713,7 @@ AC_MSG_CHECKING([whether to enable maintainer-specific portions of Makefiles]) - - # Check to see how 'make' treats includes. -*- Autoconf -*- - --# Copyright (C) 2001-2018 Free Software Foundation, Inc. -+# Copyright (C) 2001-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -736,7 +756,7 @@ AC_SUBST([am__quote])]) - - # Fake the existence of programs that GNU maintainers use. -*- Autoconf -*- - --# Copyright (C) 1997-2018 Free Software Foundation, Inc. -+# Copyright (C) 1997-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -757,12 +777,7 @@ AC_DEFUN([AM_MISSING_HAS_RUN], - [AC_REQUIRE([AM_AUX_DIR_EXPAND])dnl - AC_REQUIRE_AUX_FILE([missing])dnl - if test x"${MISSING+set}" != xset; then -- case $am_aux_dir in -- *\ * | *\ *) -- MISSING="\${SHELL} \"$am_aux_dir/missing\"" ;; -- *) -- MISSING="\${SHELL} $am_aux_dir/missing" ;; -- esac -+ MISSING="\${SHELL} '$am_aux_dir/missing'" - fi - # Use eval to expand $SHELL - if eval "$MISSING --is-lightweight"; then -@@ -775,7 +790,7 @@ fi - - # Helper functions for option handling. -*- Autoconf -*- - --# Copyright (C) 2001-2018 Free Software Foundation, Inc. -+# Copyright (C) 2001-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -804,7 +819,7 @@ AC_DEFUN([_AM_SET_OPTIONS], - AC_DEFUN([_AM_IF_OPTION], - [m4_ifset(_AM_MANGLE_OPTION([$1]), [$2], [$3])]) - --# Copyright (C) 1999-2018 Free Software Foundation, Inc. -+# Copyright (C) 1999-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -851,7 +866,7 @@ AC_LANG_POP([C])]) - # For backward compatibility. - AC_DEFUN_ONCE([AM_PROG_CC_C_O], [AC_REQUIRE([AC_PROG_CC])]) - --# Copyright (C) 2001-2018 Free Software Foundation, Inc. -+# Copyright (C) 2001-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -870,7 +885,7 @@ AC_DEFUN([AM_RUN_LOG], - - # Check to make sure that the build environment is sane. -*- Autoconf -*- - --# Copyright (C) 1996-2018 Free Software Foundation, Inc. -+# Copyright (C) 1996-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -951,7 +966,7 @@ AC_CONFIG_COMMANDS_PRE( - rm -f conftest.file - ]) - --# Copyright (C) 2009-2018 Free Software Foundation, Inc. -+# Copyright (C) 2009-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -1011,7 +1026,7 @@ AC_SUBST([AM_BACKSLASH])dnl - _AM_SUBST_NOTMAKE([AM_BACKSLASH])dnl - ]) - --# Copyright (C) 2001-2018 Free Software Foundation, Inc. -+# Copyright (C) 2001-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -1039,7 +1054,7 @@ fi - INSTALL_STRIP_PROGRAM="\$(install_sh) -c -s" - AC_SUBST([INSTALL_STRIP_PROGRAM])]) - --# Copyright (C) 2006-2018 Free Software Foundation, Inc. -+# Copyright (C) 2006-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -1058,7 +1073,7 @@ AC_DEFUN([AM_SUBST_NOTMAKE], [_AM_SUBST_NOTMAKE($@)]) - - # Check how to create a tarball. -*- Autoconf -*- - --# Copyright (C) 2004-2018 Free Software Foundation, Inc. -+# Copyright (C) 2004-2021 Free Software Foundation, Inc. - # - # This file is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -diff --git a/auxprogs/Makefile.in b/auxprogs/Makefile.in -index ece0e6f..4fa5b83 100644 ---- a/auxprogs/Makefile.in -+++ b/auxprogs/Makefile.in -@@ -1,7 +1,7 @@ --# Makefile.in generated by automake 1.16.1 from Makefile.am. -+# Makefile.in generated by automake 1.16.5 from Makefile.am. - # @configure_input@ - --# Copyright (C) 1994-2018 Free Software Foundation, Inc. -+# Copyright (C) 1994-2021 Free Software Foundation, Inc. - - # This Makefile.in is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -236,8 +236,6 @@ am__define_uniq_tagged_files = \ - unique=`for i in $$list; do \ - if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \ - done | $(am__uniquify_input)` --ETAGS = etags --CTAGS = ctags - am__DIST_COMMON = $(srcdir)/Makefile.in $(top_srcdir)/Makefile.all.am \ - $(top_srcdir)/depcomp - DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) -@@ -260,6 +258,8 @@ CFLAGS = @CFLAGS@ - CFLAGS_MPI = @CFLAGS_MPI@ - CPP = @CPP@ - CPPFLAGS = @CPPFLAGS@ -+CSCOPE = @CSCOPE@ -+CTAGS = @CTAGS@ - CXX = @CXX@ - CXXDEPMODE = @CXXDEPMODE@ - CXXFLAGS = @CXXFLAGS@ -@@ -273,6 +273,7 @@ ECHO_C = @ECHO_C@ - ECHO_N = @ECHO_N@ - ECHO_T = @ECHO_T@ - EGREP = @EGREP@ -+ETAGS = @ETAGS@ - EXEEXT = @EXEEXT@ - FLAG_FALIGNED_NEW = @FLAG_FALIGNED_NEW@ - FLAG_FINLINE_FUNCTIONS = @FLAG_FINLINE_FUNCTIONS@ -@@ -418,6 +419,7 @@ pdfdir = @pdfdir@ - prefix = @prefix@ - program_transform_name = @program_transform_name@ - psdir = @psdir@ -+runstatedir = @runstatedir@ - sbindir = @sbindir@ - sharedstatedir = @sharedstatedir@ - srcdir = @srcdir@ -@@ -557,6 +559,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ - $(AM_CFLAGS_PSO_BASE) - - AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g -+AM_FLAG_M3264_LOONGARCH64_LINUX = @FLAG_M64@ -+AM_CFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) -+AM_CFLAGS_PSO_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ -+ $(AM_CFLAGS_PSO_BASE) -+ -+AM_CCASFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ -g - AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@ - AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ - $(AM_CFLAGS_BASE) -fomit-frame-pointer \ -@@ -602,6 +610,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ - PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ - PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ - PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ -+PRELOAD_LDFLAGS_LOONGARCH64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ - PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ - PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ - dist_noinst_SCRIPTS = \ -@@ -894,7 +903,6 @@ cscopelist-am: $(am__tagged_files) - - distclean-tags: - -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags -- - distdir: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) distdir-am - -diff --git a/cachegrind/Makefile.in b/cachegrind/Makefile.in -index 18bfcbc..b721763 100644 ---- a/cachegrind/Makefile.in -+++ b/cachegrind/Makefile.in -@@ -1,7 +1,7 @@ --# Makefile.in generated by automake 1.16.1 from Makefile.am. -+# Makefile.in generated by automake 1.16.5 from Makefile.am. - # @configure_input@ - --# Copyright (C) 1994-2018 Free Software Foundation, Inc. -+# Copyright (C) 1994-2021 Free Software Foundation, Inc. - - # This Makefile.in is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -264,8 +264,6 @@ am__define_uniq_tagged_files = \ - unique=`for i in $$list; do \ - if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \ - done | $(am__uniquify_input)` --ETAGS = etags --CTAGS = ctags - DIST_SUBDIRS = $(SUBDIRS) - am__DIST_COMMON = $(srcdir)/Makefile.in $(srcdir)/cg_annotate.in \ - $(srcdir)/cg_diff.in $(top_srcdir)/Makefile.all.am \ -@@ -315,6 +313,8 @@ CFLAGS = @CFLAGS@ - CFLAGS_MPI = @CFLAGS_MPI@ - CPP = @CPP@ - CPPFLAGS = @CPPFLAGS@ -+CSCOPE = @CSCOPE@ -+CTAGS = @CTAGS@ - CXX = @CXX@ - CXXDEPMODE = @CXXDEPMODE@ - CXXFLAGS = @CXXFLAGS@ -@@ -328,6 +328,7 @@ ECHO_C = @ECHO_C@ - ECHO_N = @ECHO_N@ - ECHO_T = @ECHO_T@ - EGREP = @EGREP@ -+ETAGS = @ETAGS@ - EXEEXT = @EXEEXT@ - FLAG_FALIGNED_NEW = @FLAG_FALIGNED_NEW@ - FLAG_FINLINE_FUNCTIONS = @FLAG_FINLINE_FUNCTIONS@ -@@ -473,6 +474,7 @@ pdfdir = @pdfdir@ - prefix = @prefix@ - program_transform_name = @program_transform_name@ - psdir = @psdir@ -+runstatedir = @runstatedir@ - sbindir = @sbindir@ - sharedstatedir = @sharedstatedir@ - srcdir = @srcdir@ -@@ -613,6 +615,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ - $(AM_CFLAGS_PSO_BASE) - - AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g -+AM_FLAG_M3264_LOONGARCH64_LINUX = @FLAG_M64@ -+AM_CFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) -+AM_CFLAGS_PSO_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ -+ $(AM_CFLAGS_PSO_BASE) -+ -+AM_CCASFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ -g - AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@ - AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ - $(AM_CFLAGS_BASE) -fomit-frame-pointer \ -@@ -658,6 +666,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ - PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ - PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ - PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ -+PRELOAD_LDFLAGS_LOONGARCH64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ - PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ - PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ - -@@ -741,6 +750,10 @@ TOOL_LDFLAGS_MIPS64_LINUX = \ - -static -nodefaultlibs -nostartfiles -u __start @FLAG_NO_BUILD_ID@ \ - @FLAG_M64@ - -+TOOL_LDFLAGS_LOONGARCH64_LINUX = \ -+ -static -nodefaultlibs -nostartfiles -u __start @FLAG_NO_BUILD_ID@ \ -+ @FLAG_M64@ -+ - TOOL_LDFLAGS_X86_SOLARIS = \ - $(TOOL_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ - -@@ -795,6 +808,9 @@ LIBREPLACEMALLOC_MIPS32_LINUX = \ - LIBREPLACEMALLOC_MIPS64_LINUX = \ - $(top_builddir)/coregrind/libreplacemalloc_toolpreload-mips64-linux.a - -+LIBREPLACEMALLOC_LOONGARCH64_LINUX = \ -+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-loongarch64-linux.a -+ - LIBREPLACEMALLOC_X86_SOLARIS = \ - $(top_builddir)/coregrind/libreplacemalloc_toolpreload-x86-solaris.a - -@@ -857,6 +873,11 @@ LIBREPLACEMALLOC_LDFLAGS_MIPS64_LINUX = \ - $(LIBREPLACEMALLOC_MIPS64_LINUX) \ - -Wl,--no-whole-archive - -+LIBREPLACEMALLOC_LDFLAGS_LOONGARCH64_LINUX = \ -+ -Wl,--whole-archive \ -+ $(LIBREPLACEMALLOC_LOONGARCH64_LINUX) \ -+ -Wl,--no-whole-archive -+ - LIBREPLACEMALLOC_LDFLAGS_X86_SOLARIS = \ - -Wl,--whole-archive \ - $(LIBREPLACEMALLOC_X86_SOLARIS) \ -@@ -1275,7 +1296,6 @@ cscopelist-am: $(am__tagged_files) - - distclean-tags: - -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags -- - distdir: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) distdir-am - -diff --git a/cachegrind/cg_arch.c b/cachegrind/cg_arch.c -index 57570dd..5442982 100644 ---- a/cachegrind/cg_arch.c -+++ b/cachegrind/cg_arch.c -@@ -475,6 +475,13 @@ configure_caches(cache_t *I1c, cache_t *D1c, cache_t *LLc, - *D1c = (cache_t) { 65536, 2, 64 }; - *LLc = (cache_t) { 262144, 8, 64 }; - -+#elif defined(VGA_loongarch64) -+ -+ // Set caches to default (for LOONGARCH64 - 3A5000) -+ *I1c = (cache_t) { 65536, 4, 64 }; -+ *D1c = (cache_t) { 65536, 4, 64 }; -+ *LLc = (cache_t) { 262144, 16, 64 }; -+ - #else - - #error "Unknown arch" -diff --git a/cachegrind/cg_branchpred.c b/cachegrind/cg_branchpred.c -index ba433ec..0d91b29 100644 ---- a/cachegrind/cg_branchpred.c -+++ b/cachegrind/cg_branchpred.c -@@ -44,7 +44,7 @@ - guaranteed to be zero? */ - #if defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le) \ - || defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_nanomips) \ -- || defined(VGA_arm64) -+ || defined(VGA_arm64) || defined(VGA_loongarch64) - # define N_IADDR_LO_ZERO_BITS 2 - #elif defined(VGA_x86) || defined(VGA_amd64) - # define N_IADDR_LO_ZERO_BITS 0 -diff --git a/cachegrind/tests/Makefile.in b/cachegrind/tests/Makefile.in -index b9f731c..5f272ad 100644 ---- a/cachegrind/tests/Makefile.in -+++ b/cachegrind/tests/Makefile.in -@@ -1,7 +1,7 @@ --# Makefile.in generated by automake 1.16.1 from Makefile.am. -+# Makefile.in generated by automake 1.16.5 from Makefile.am. - # @configure_input@ - --# Copyright (C) 1994-2018 Free Software Foundation, Inc. -+# Copyright (C) 1994-2021 Free Software Foundation, Inc. - - # This Makefile.in is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -226,8 +226,6 @@ am__define_uniq_tagged_files = \ - unique=`for i in $$list; do \ - if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \ - done | $(am__uniquify_input)` --ETAGS = etags --CTAGS = ctags - am__DIST_COMMON = $(srcdir)/Makefile.in $(top_srcdir)/Makefile.all.am \ - $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/depcomp - DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) -@@ -275,6 +273,8 @@ CFLAGS = @CFLAGS@ - CFLAGS_MPI = @CFLAGS_MPI@ - CPP = @CPP@ - CPPFLAGS = @CPPFLAGS@ -+CSCOPE = @CSCOPE@ -+CTAGS = @CTAGS@ - CXX = @CXX@ - CXXDEPMODE = @CXXDEPMODE@ - CXXFLAGS = @CXXFLAGS@ -@@ -288,6 +288,7 @@ ECHO_C = @ECHO_C@ - ECHO_N = @ECHO_N@ - ECHO_T = @ECHO_T@ - EGREP = @EGREP@ -+ETAGS = @ETAGS@ - EXEEXT = @EXEEXT@ - FLAG_FALIGNED_NEW = @FLAG_FALIGNED_NEW@ - FLAG_FINLINE_FUNCTIONS = @FLAG_FINLINE_FUNCTIONS@ -@@ -433,6 +434,7 @@ pdfdir = @pdfdir@ - prefix = @prefix@ - program_transform_name = @program_transform_name@ - psdir = @psdir@ -+runstatedir = @runstatedir@ - sbindir = @sbindir@ - sharedstatedir = @sharedstatedir@ - srcdir = @srcdir@ -@@ -572,6 +574,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ - $(AM_CFLAGS_PSO_BASE) - - AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g -+AM_FLAG_M3264_LOONGARCH64_LINUX = @FLAG_M64@ -+AM_CFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) -+AM_CFLAGS_PSO_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ -+ $(AM_CFLAGS_PSO_BASE) -+ -+AM_CCASFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ -g - AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@ - AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ - $(AM_CFLAGS_BASE) -fomit-frame-pointer \ -@@ -617,6 +625,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ - PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ - PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ - PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ -+PRELOAD_LDFLAGS_LOONGARCH64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ - PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ - PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ - AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \ -@@ -861,7 +870,6 @@ cscopelist-am: $(am__tagged_files) - - distclean-tags: - -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags -- - distdir: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) distdir-am - -diff --git a/cachegrind/tests/x86/Makefile.in b/cachegrind/tests/x86/Makefile.in -index 7197bb5..e6fb28e 100644 ---- a/cachegrind/tests/x86/Makefile.in -+++ b/cachegrind/tests/x86/Makefile.in -@@ -1,7 +1,7 @@ --# Makefile.in generated by automake 1.16.1 from Makefile.am. -+# Makefile.in generated by automake 1.16.5 from Makefile.am. - # @configure_input@ - --# Copyright (C) 1994-2018 Free Software Foundation, Inc. -+# Copyright (C) 1994-2021 Free Software Foundation, Inc. - - # This Makefile.in is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -198,8 +198,6 @@ am__define_uniq_tagged_files = \ - unique=`for i in $$list; do \ - if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \ - done | $(am__uniquify_input)` --ETAGS = etags --CTAGS = ctags - am__DIST_COMMON = $(srcdir)/Makefile.in $(top_srcdir)/Makefile.all.am \ - $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/depcomp - DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) -@@ -222,6 +220,8 @@ CFLAGS = @CFLAGS@ - CFLAGS_MPI = @CFLAGS_MPI@ - CPP = @CPP@ - CPPFLAGS = @CPPFLAGS@ -+CSCOPE = @CSCOPE@ -+CTAGS = @CTAGS@ - CXX = @CXX@ - CXXDEPMODE = @CXXDEPMODE@ - CXXFLAGS = @CXXFLAGS@ -@@ -235,6 +235,7 @@ ECHO_C = @ECHO_C@ - ECHO_N = @ECHO_N@ - ECHO_T = @ECHO_T@ - EGREP = @EGREP@ -+ETAGS = @ETAGS@ - EXEEXT = @EXEEXT@ - FLAG_FALIGNED_NEW = @FLAG_FALIGNED_NEW@ - FLAG_FINLINE_FUNCTIONS = @FLAG_FINLINE_FUNCTIONS@ -@@ -380,6 +381,7 @@ pdfdir = @pdfdir@ - prefix = @prefix@ - program_transform_name = @program_transform_name@ - psdir = @psdir@ -+runstatedir = @runstatedir@ - sbindir = @sbindir@ - sharedstatedir = @sharedstatedir@ - srcdir = @srcdir@ -@@ -519,6 +521,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ - $(AM_CFLAGS_PSO_BASE) - - AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g -+AM_FLAG_M3264_LOONGARCH64_LINUX = @FLAG_M64@ -+AM_CFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) -+AM_CFLAGS_PSO_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ -+ $(AM_CFLAGS_PSO_BASE) -+ -+AM_CCASFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ -g - AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@ - AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ - $(AM_CFLAGS_BASE) -fomit-frame-pointer \ -@@ -564,6 +572,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ - PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ - PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ - PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ -+PRELOAD_LDFLAGS_LOONGARCH64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ - PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ - PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ - AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \ -@@ -714,7 +723,6 @@ cscopelist-am: $(am__tagged_files) - - distclean-tags: - -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags -- - distdir: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) distdir-am - -diff --git a/callgrind/Makefile.in b/callgrind/Makefile.in -index 8cf9272..c3d3b7b 100644 ---- a/callgrind/Makefile.in -+++ b/callgrind/Makefile.in -@@ -1,7 +1,7 @@ --# Makefile.in generated by automake 1.16.1 from Makefile.am. -+# Makefile.in generated by automake 1.16.5 from Makefile.am. - # @configure_input@ - --# Copyright (C) 1994-2018 Free Software Foundation, Inc. -+# Copyright (C) 1994-2021 Free Software Foundation, Inc. - - # This Makefile.in is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -299,8 +299,6 @@ am__define_uniq_tagged_files = \ - unique=`for i in $$list; do \ - if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \ - done | $(am__uniquify_input)` --ETAGS = etags --CTAGS = ctags - DIST_SUBDIRS = $(SUBDIRS) - am__DIST_COMMON = $(srcdir)/Makefile.in \ - $(srcdir)/callgrind_annotate.in $(srcdir)/callgrind_control.in \ -@@ -351,6 +349,8 @@ CFLAGS = @CFLAGS@ - CFLAGS_MPI = @CFLAGS_MPI@ - CPP = @CPP@ - CPPFLAGS = @CPPFLAGS@ -+CSCOPE = @CSCOPE@ -+CTAGS = @CTAGS@ - CXX = @CXX@ - CXXDEPMODE = @CXXDEPMODE@ - CXXFLAGS = @CXXFLAGS@ -@@ -364,6 +364,7 @@ ECHO_C = @ECHO_C@ - ECHO_N = @ECHO_N@ - ECHO_T = @ECHO_T@ - EGREP = @EGREP@ -+ETAGS = @ETAGS@ - EXEEXT = @EXEEXT@ - FLAG_FALIGNED_NEW = @FLAG_FALIGNED_NEW@ - FLAG_FINLINE_FUNCTIONS = @FLAG_FINLINE_FUNCTIONS@ -@@ -509,6 +510,7 @@ pdfdir = @pdfdir@ - prefix = @prefix@ - program_transform_name = @program_transform_name@ - psdir = @psdir@ -+runstatedir = @runstatedir@ - sbindir = @sbindir@ - sharedstatedir = @sharedstatedir@ - srcdir = @srcdir@ -@@ -649,6 +651,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ - $(AM_CFLAGS_PSO_BASE) - - AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g -+AM_FLAG_M3264_LOONGARCH64_LINUX = @FLAG_M64@ -+AM_CFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) -+AM_CFLAGS_PSO_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ -+ $(AM_CFLAGS_PSO_BASE) -+ -+AM_CCASFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ -g - AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@ - AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ - $(AM_CFLAGS_BASE) -fomit-frame-pointer \ -@@ -694,6 +702,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ - PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ - PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ - PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ -+PRELOAD_LDFLAGS_LOONGARCH64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ - PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ - PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ - -@@ -777,6 +786,10 @@ TOOL_LDFLAGS_MIPS64_LINUX = \ - -static -nodefaultlibs -nostartfiles -u __start @FLAG_NO_BUILD_ID@ \ - @FLAG_M64@ - -+TOOL_LDFLAGS_LOONGARCH64_LINUX = \ -+ -static -nodefaultlibs -nostartfiles -u __start @FLAG_NO_BUILD_ID@ \ -+ @FLAG_M64@ -+ - TOOL_LDFLAGS_X86_SOLARIS = \ - $(TOOL_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ - -@@ -831,6 +844,9 @@ LIBREPLACEMALLOC_MIPS32_LINUX = \ - LIBREPLACEMALLOC_MIPS64_LINUX = \ - $(top_builddir)/coregrind/libreplacemalloc_toolpreload-mips64-linux.a - -+LIBREPLACEMALLOC_LOONGARCH64_LINUX = \ -+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-loongarch64-linux.a -+ - LIBREPLACEMALLOC_X86_SOLARIS = \ - $(top_builddir)/coregrind/libreplacemalloc_toolpreload-x86-solaris.a - -@@ -893,6 +909,11 @@ LIBREPLACEMALLOC_LDFLAGS_MIPS64_LINUX = \ - $(LIBREPLACEMALLOC_MIPS64_LINUX) \ - -Wl,--no-whole-archive - -+LIBREPLACEMALLOC_LDFLAGS_LOONGARCH64_LINUX = \ -+ -Wl,--whole-archive \ -+ $(LIBREPLACEMALLOC_LOONGARCH64_LINUX) \ -+ -Wl,--no-whole-archive -+ - LIBREPLACEMALLOC_LDFLAGS_X86_SOLARIS = \ - -Wl,--whole-archive \ - $(LIBREPLACEMALLOC_X86_SOLARIS) \ -@@ -1645,7 +1666,6 @@ cscopelist-am: $(am__tagged_files) - - distclean-tags: - -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags -- - distdir: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) distdir-am - -diff --git a/callgrind/tests/Makefile.in b/callgrind/tests/Makefile.in -index 578be1c..cc27fcf 100644 ---- a/callgrind/tests/Makefile.in -+++ b/callgrind/tests/Makefile.in -@@ -1,7 +1,7 @@ --# Makefile.in generated by automake 1.16.1 from Makefile.am. -+# Makefile.in generated by automake 1.16.5 from Makefile.am. - # @configure_input@ - --# Copyright (C) 1994-2018 Free Software Foundation, Inc. -+# Copyright (C) 1994-2021 Free Software Foundation, Inc. - - # This Makefile.in is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -215,8 +215,6 @@ am__define_uniq_tagged_files = \ - unique=`for i in $$list; do \ - if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \ - done | $(am__uniquify_input)` --ETAGS = etags --CTAGS = ctags - am__DIST_COMMON = $(srcdir)/Makefile.in $(top_srcdir)/Makefile.all.am \ - $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/depcomp - DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) -@@ -264,6 +262,8 @@ CFLAGS = @CFLAGS@ - CFLAGS_MPI = @CFLAGS_MPI@ - CPP = @CPP@ - CPPFLAGS = @CPPFLAGS@ -+CSCOPE = @CSCOPE@ -+CTAGS = @CTAGS@ - CXX = @CXX@ - CXXDEPMODE = @CXXDEPMODE@ - CXXFLAGS = @CXXFLAGS@ -@@ -277,6 +277,7 @@ ECHO_C = @ECHO_C@ - ECHO_N = @ECHO_N@ - ECHO_T = @ECHO_T@ - EGREP = @EGREP@ -+ETAGS = @ETAGS@ - EXEEXT = @EXEEXT@ - FLAG_FALIGNED_NEW = @FLAG_FALIGNED_NEW@ - FLAG_FINLINE_FUNCTIONS = @FLAG_FINLINE_FUNCTIONS@ -@@ -422,6 +423,7 @@ pdfdir = @pdfdir@ - prefix = @prefix@ - program_transform_name = @program_transform_name@ - psdir = @psdir@ -+runstatedir = @runstatedir@ - sbindir = @sbindir@ - sharedstatedir = @sharedstatedir@ - srcdir = @srcdir@ -@@ -561,6 +563,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ - $(AM_CFLAGS_PSO_BASE) - - AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g -+AM_FLAG_M3264_LOONGARCH64_LINUX = @FLAG_M64@ -+AM_CFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) -+AM_CFLAGS_PSO_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ -+ $(AM_CFLAGS_PSO_BASE) -+ -+AM_CCASFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ -g - AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@ - AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ - $(AM_CFLAGS_BASE) -fomit-frame-pointer \ -@@ -606,6 +614,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ - PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ - PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ - PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ -+PRELOAD_LDFLAGS_LOONGARCH64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ - PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ - PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ - AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \ -@@ -829,7 +838,6 @@ cscopelist-am: $(am__tagged_files) - - distclean-tags: - -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags -- - distdir: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) distdir-am - -diff --git a/compile b/compile -index 99e5052..df363c8 100755 ---- a/compile -+++ b/compile -@@ -3,7 +3,7 @@ - - scriptversion=2018-03-07.03; # UTC - --# Copyright (C) 1999-2018 Free Software Foundation, Inc. -+# Copyright (C) 1999-2021 Free Software Foundation, Inc. - # Written by Tom Tromey . - # - # This program is free software; you can redistribute it and/or modify -@@ -53,7 +53,7 @@ func_file_conv () - MINGW*) - file_conv=mingw - ;; -- CYGWIN*) -+ CYGWIN* | MSYS*) - file_conv=cygwin - ;; - *) -@@ -67,7 +67,7 @@ func_file_conv () - mingw/*) - file=`cmd //C echo "$file " | sed -e 's/"\(.*\) " *$/\1/'` - ;; -- cygwin/*) -+ cygwin/* | msys/*) - file=`cygpath -m "$file" || echo "$file"` - ;; - wine/*) -diff --git a/config.guess b/config.guess -index b33c9e8..7f76b62 100755 ---- a/config.guess -+++ b/config.guess -@@ -1,12 +1,14 @@ - #! /bin/sh - # Attempt to guess a canonical system name. --# Copyright 1992-2018 Free Software Foundation, Inc. -+# Copyright 1992-2022 Free Software Foundation, Inc. - --timestamp='2018-08-29' -+# shellcheck disable=SC2006,SC2268 # see below for rationale -+ -+timestamp='2022-01-09' - - # This file is free software; you can redistribute it and/or modify it - # under the terms of the GNU General Public License as published by --# the Free Software Foundation; either version 3 of the License, or -+# the Free Software Foundation, either version 3 of the License, or - # (at your option) any later version. - # - # This program is distributed in the hope that it will be useful, but -@@ -27,11 +29,19 @@ timestamp='2018-08-29' - # Originally written by Per Bothner; maintained since 2000 by Ben Elliston. - # - # You can get the latest version of this script from: --# https://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.guess -+# https://git.savannah.gnu.org/cgit/config.git/plain/config.guess - # - # Please send patches to . - - -+# The "shellcheck disable" line above the timestamp inhibits complaints -+# about features and limitations of the classic Bourne shell that were -+# superseded or lifted in POSIX. However, this script identifies a wide -+# variety of pre-POSIX systems that do not have POSIX shells at all, and -+# even some reasonably current systems (Solaris 10 as case-in-point) still -+# have a pre-POSIX /bin/sh. -+ -+ - me=`echo "$0" | sed -e 's,.*/,,'` - - usage="\ -@@ -50,7 +60,7 @@ version="\ - GNU config.guess ($timestamp) - - Originally written by Per Bothner. --Copyright 1992-2018 Free Software Foundation, Inc. -+Copyright 1992-2022 Free Software Foundation, Inc. - - This is free software; see the source for copying conditions. There is NO - warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." -@@ -84,6 +94,9 @@ if test $# != 0; then - exit 1 - fi - -+# Just in case it came from the environment. -+GUESS= -+ - # CC_FOR_BUILD -- compiler used by this script. Note that the use of a - # compiler to aid in system detection is discouraged as it requires - # temporary files to be created and, as you can see below, it is a -@@ -96,12 +109,13 @@ fi - - tmp= - # shellcheck disable=SC2172 --trap 'test -z "$tmp" || rm -fr "$tmp"' 1 2 13 15 --trap 'exitcode=$?; test -z "$tmp" || rm -fr "$tmp"; exit $exitcode' 0 -+trap 'test -z "$tmp" || rm -fr "$tmp"' 0 1 2 13 15 - - set_cc_for_build() { -+ # prevent multiple calls if $tmp is already set -+ test "$tmp" && return 0 - : "${TMPDIR=/tmp}" -- # shellcheck disable=SC2039 -+ # shellcheck disable=SC2039,SC3028 - { tmp=`(umask 077 && mktemp -d "$TMPDIR/cgXXXXXX") 2>/dev/null` && test -n "$tmp" && test -d "$tmp" ; } || - { test -n "$RANDOM" && tmp=$TMPDIR/cg$$-$RANDOM && (umask 077 && mkdir "$tmp" 2>/dev/null) ; } || - { tmp=$TMPDIR/cg-$$ && (umask 077 && mkdir "$tmp" 2>/dev/null) && echo "Warning: creating insecure temp directory" >&2 ; } || -@@ -111,7 +125,7 @@ set_cc_for_build() { - ,,) echo "int x;" > "$dummy.c" - for driver in cc gcc c89 c99 ; do - if ($driver -c -o "$dummy.o" "$dummy.c") >/dev/null 2>&1 ; then -- CC_FOR_BUILD="$driver" -+ CC_FOR_BUILD=$driver - break - fi - done -@@ -132,14 +146,12 @@ fi - - UNAME_MACHINE=`(uname -m) 2>/dev/null` || UNAME_MACHINE=unknown - UNAME_RELEASE=`(uname -r) 2>/dev/null` || UNAME_RELEASE=unknown --UNAME_SYSTEM=`(uname -s) 2>/dev/null` || UNAME_SYSTEM=unknown -+UNAME_SYSTEM=`(uname -s) 2>/dev/null` || UNAME_SYSTEM=unknown - UNAME_VERSION=`(uname -v) 2>/dev/null` || UNAME_VERSION=unknown - --case "$UNAME_SYSTEM" in -+case $UNAME_SYSTEM in - Linux|GNU|GNU/*) -- # If the system lacks a compiler, then just pick glibc. -- # We could probably try harder. -- LIBC=gnu -+ LIBC=unknown - - set_cc_for_build - cat <<-EOF > "$dummy.c" -@@ -148,24 +160,37 @@ Linux|GNU|GNU/*) - LIBC=uclibc - #elif defined(__dietlibc__) - LIBC=dietlibc -- #else -+ #elif defined(__GLIBC__) - LIBC=gnu -+ #else -+ #include -+ /* First heuristic to detect musl libc. */ -+ #ifdef __DEFINED_va_list -+ LIBC=musl -+ #endif - #endif - EOF -- eval "`$CC_FOR_BUILD -E "$dummy.c" 2>/dev/null | grep '^LIBC' | sed 's, ,,g'`" -+ cc_set_libc=`$CC_FOR_BUILD -E "$dummy.c" 2>/dev/null | grep '^LIBC' | sed 's, ,,g'` -+ eval "$cc_set_libc" - -- # If ldd exists, use it to detect musl libc. -- if command -v ldd >/dev/null && \ -- ldd --version 2>&1 | grep -q ^musl -- then -- LIBC=musl -+ # Second heuristic to detect musl libc. -+ if [ "$LIBC" = unknown ] && -+ command -v ldd >/dev/null && -+ ldd --version 2>&1 | grep -q ^musl; then -+ LIBC=musl -+ fi -+ -+ # If the system lacks a compiler, then just pick glibc. -+ # We could probably try harder. -+ if [ "$LIBC" = unknown ]; then -+ LIBC=gnu - fi - ;; - esac - - # Note: order is significant - the case branches are not exclusive. - --case "$UNAME_MACHINE:$UNAME_SYSTEM:$UNAME_RELEASE:$UNAME_VERSION" in -+case $UNAME_MACHINE:$UNAME_SYSTEM:$UNAME_RELEASE:$UNAME_VERSION in - *:NetBSD:*:*) - # NetBSD (nbsd) targets should (where applicable) match one or - # more of the tuples: *-*-netbsdelf*, *-*-netbsdaout*, -@@ -177,12 +202,12 @@ case "$UNAME_MACHINE:$UNAME_SYSTEM:$UNAME_RELEASE:$UNAME_VERSION" in - # - # Note: NetBSD doesn't particularly care about the vendor - # portion of the name. We always set it to "unknown". -- sysctl="sysctl -n hw.machine_arch" - UNAME_MACHINE_ARCH=`(uname -p 2>/dev/null || \ -- "/sbin/$sysctl" 2>/dev/null || \ -- "/usr/sbin/$sysctl" 2>/dev/null || \ -+ /sbin/sysctl -n hw.machine_arch 2>/dev/null || \ -+ /usr/sbin/sysctl -n hw.machine_arch 2>/dev/null || \ - echo unknown)` -- case "$UNAME_MACHINE_ARCH" in -+ case $UNAME_MACHINE_ARCH in -+ aarch64eb) machine=aarch64_be-unknown ;; - armeb) machine=armeb-unknown ;; - arm*) machine=arm-unknown ;; - sh3el) machine=shl-unknown ;; -@@ -191,13 +216,13 @@ case "$UNAME_MACHINE:$UNAME_SYSTEM:$UNAME_RELEASE:$UNAME_VERSION" in - earmv*) - arch=`echo "$UNAME_MACHINE_ARCH" | sed -e 's,^e\(armv[0-9]\).*$,\1,'` - endian=`echo "$UNAME_MACHINE_ARCH" | sed -ne 's,^.*\(eb\)$,\1,p'` -- machine="${arch}${endian}"-unknown -+ machine=${arch}${endian}-unknown - ;; -- *) machine="$UNAME_MACHINE_ARCH"-unknown ;; -+ *) machine=$UNAME_MACHINE_ARCH-unknown ;; - esac - # The Operating System including object format, if it has switched - # to ELF recently (or will in the future) and ABI. -- case "$UNAME_MACHINE_ARCH" in -+ case $UNAME_MACHINE_ARCH in - earm*) - os=netbsdelf - ;; -@@ -218,7 +243,7 @@ case "$UNAME_MACHINE:$UNAME_SYSTEM:$UNAME_RELEASE:$UNAME_VERSION" in - ;; - esac - # Determine ABI tags. -- case "$UNAME_MACHINE_ARCH" in -+ case $UNAME_MACHINE_ARCH in - earm*) - expr='s/^earmv[0-9]/-eabi/;s/eb$//' - abi=`echo "$UNAME_MACHINE_ARCH" | sed -e "$expr"` -@@ -229,7 +254,7 @@ case "$UNAME_MACHINE:$UNAME_SYSTEM:$UNAME_RELEASE:$UNAME_VERSION" in - # thus, need a distinct triplet. However, they do not need - # kernel version information, so it can be replaced with a - # suitable tag, in the style of linux-gnu. -- case "$UNAME_VERSION" in -+ case $UNAME_VERSION in - Debian*) - release='-gnu' - ;; -@@ -240,45 +265,57 @@ case "$UNAME_MACHINE:$UNAME_SYSTEM:$UNAME_RELEASE:$UNAME_VERSION" in - # Since CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM: - # contains redundant information, the shorter form: - # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM is used. -- echo "$machine-${os}${release}${abi-}" -- exit ;; -+ GUESS=$machine-${os}${release}${abi-} -+ ;; - *:Bitrig:*:*) - UNAME_MACHINE_ARCH=`arch | sed 's/Bitrig.//'` -- echo "$UNAME_MACHINE_ARCH"-unknown-bitrig"$UNAME_RELEASE" -- exit ;; -+ GUESS=$UNAME_MACHINE_ARCH-unknown-bitrig$UNAME_RELEASE -+ ;; - *:OpenBSD:*:*) - UNAME_MACHINE_ARCH=`arch | sed 's/OpenBSD.//'` -- echo "$UNAME_MACHINE_ARCH"-unknown-openbsd"$UNAME_RELEASE" -- exit ;; -+ GUESS=$UNAME_MACHINE_ARCH-unknown-openbsd$UNAME_RELEASE -+ ;; -+ *:SecBSD:*:*) -+ UNAME_MACHINE_ARCH=`arch | sed 's/SecBSD.//'` -+ GUESS=$UNAME_MACHINE_ARCH-unknown-secbsd$UNAME_RELEASE -+ ;; - *:LibertyBSD:*:*) - UNAME_MACHINE_ARCH=`arch | sed 's/^.*BSD\.//'` -- echo "$UNAME_MACHINE_ARCH"-unknown-libertybsd"$UNAME_RELEASE" -- exit ;; -+ GUESS=$UNAME_MACHINE_ARCH-unknown-libertybsd$UNAME_RELEASE -+ ;; - *:MidnightBSD:*:*) -- echo "$UNAME_MACHINE"-unknown-midnightbsd"$UNAME_RELEASE" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-midnightbsd$UNAME_RELEASE -+ ;; - *:ekkoBSD:*:*) -- echo "$UNAME_MACHINE"-unknown-ekkobsd"$UNAME_RELEASE" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-ekkobsd$UNAME_RELEASE -+ ;; - *:SolidBSD:*:*) -- echo "$UNAME_MACHINE"-unknown-solidbsd"$UNAME_RELEASE" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-solidbsd$UNAME_RELEASE -+ ;; -+ *:OS108:*:*) -+ GUESS=$UNAME_MACHINE-unknown-os108_$UNAME_RELEASE -+ ;; - macppc:MirBSD:*:*) -- echo powerpc-unknown-mirbsd"$UNAME_RELEASE" -- exit ;; -+ GUESS=powerpc-unknown-mirbsd$UNAME_RELEASE -+ ;; - *:MirBSD:*:*) -- echo "$UNAME_MACHINE"-unknown-mirbsd"$UNAME_RELEASE" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-mirbsd$UNAME_RELEASE -+ ;; - *:Sortix:*:*) -- echo "$UNAME_MACHINE"-unknown-sortix -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-sortix -+ ;; -+ *:Twizzler:*:*) -+ GUESS=$UNAME_MACHINE-unknown-twizzler -+ ;; - *:Redox:*:*) -- echo "$UNAME_MACHINE"-unknown-redox -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-redox -+ ;; - mips:OSF1:*.*) -- echo mips-dec-osf1 -- exit ;; -+ GUESS=mips-dec-osf1 -+ ;; - alpha:OSF1:*:*) -+ # Reset EXIT trap before exiting to avoid spurious non-zero exit code. -+ trap '' 0 - case $UNAME_RELEASE in - *4.0) - UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $3}'` -@@ -292,7 +329,7 @@ case "$UNAME_MACHINE:$UNAME_SYSTEM:$UNAME_RELEASE:$UNAME_VERSION" in - # covers most systems running today. This code pipes the CPU - # types through head -n 1, so we only detect the type of CPU 0. - ALPHA_CPU_TYPE=`/usr/sbin/psrinfo -v | sed -n -e 's/^ The alpha \(.*\) processor.*$/\1/p' | head -n 1` -- case "$ALPHA_CPU_TYPE" in -+ case $ALPHA_CPU_TYPE in - "EV4 (21064)") - UNAME_MACHINE=alpha ;; - "EV4.5 (21064)") -@@ -329,112 +366,121 @@ case "$UNAME_MACHINE:$UNAME_SYSTEM:$UNAME_RELEASE:$UNAME_VERSION" in - # A Tn.n version is a released field test version. - # A Xn.n version is an unreleased experimental baselevel. - # 1.2 uses "1.2" for uname -r. -- echo "$UNAME_MACHINE"-dec-osf"`echo "$UNAME_RELEASE" | sed -e 's/^[PVTX]//' | tr ABCDEFGHIJKLMNOPQRSTUVWXYZ abcdefghijklmnopqrstuvwxyz`" -- # Reset EXIT trap before exiting to avoid spurious non-zero exit code. -- exitcode=$? -- trap '' 0 -- exit $exitcode ;; -+ OSF_REL=`echo "$UNAME_RELEASE" | sed -e 's/^[PVTX]//' | tr ABCDEFGHIJKLMNOPQRSTUVWXYZ abcdefghijklmnopqrstuvwxyz` -+ GUESS=$UNAME_MACHINE-dec-osf$OSF_REL -+ ;; - Amiga*:UNIX_System_V:4.0:*) -- echo m68k-unknown-sysv4 -- exit ;; -+ GUESS=m68k-unknown-sysv4 -+ ;; - *:[Aa]miga[Oo][Ss]:*:*) -- echo "$UNAME_MACHINE"-unknown-amigaos -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-amigaos -+ ;; - *:[Mm]orph[Oo][Ss]:*:*) -- echo "$UNAME_MACHINE"-unknown-morphos -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-morphos -+ ;; - *:OS/390:*:*) -- echo i370-ibm-openedition -- exit ;; -+ GUESS=i370-ibm-openedition -+ ;; - *:z/VM:*:*) -- echo s390-ibm-zvmoe -- exit ;; -+ GUESS=s390-ibm-zvmoe -+ ;; - *:OS400:*:*) -- echo powerpc-ibm-os400 -- exit ;; -+ GUESS=powerpc-ibm-os400 -+ ;; - arm:RISC*:1.[012]*:*|arm:riscix:1.[012]*:*) -- echo arm-acorn-riscix"$UNAME_RELEASE" -- exit ;; -+ GUESS=arm-acorn-riscix$UNAME_RELEASE -+ ;; - arm*:riscos:*:*|arm*:RISCOS:*:*) -- echo arm-unknown-riscos -- exit ;; -+ GUESS=arm-unknown-riscos -+ ;; - SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*) -- echo hppa1.1-hitachi-hiuxmpp -- exit ;; -+ GUESS=hppa1.1-hitachi-hiuxmpp -+ ;; - Pyramid*:OSx*:*:* | MIS*:OSx*:*:* | MIS*:SMP_DC-OSx*:*:*) - # akee@wpdis03.wpafb.af.mil (Earle F. Ake) contributed MIS and NILE. -- if test "`(/bin/universe) 2>/dev/null`" = att ; then -- echo pyramid-pyramid-sysv3 -- else -- echo pyramid-pyramid-bsd -- fi -- exit ;; -+ case `(/bin/universe) 2>/dev/null` in -+ att) GUESS=pyramid-pyramid-sysv3 ;; -+ *) GUESS=pyramid-pyramid-bsd ;; -+ esac -+ ;; - NILE*:*:*:dcosx) -- echo pyramid-pyramid-svr4 -- exit ;; -+ GUESS=pyramid-pyramid-svr4 -+ ;; - DRS?6000:unix:4.0:6*) -- echo sparc-icl-nx6 -- exit ;; -+ GUESS=sparc-icl-nx6 -+ ;; - DRS?6000:UNIX_SV:4.2*:7* | DRS?6000:isis:4.2*:7*) - case `/usr/bin/uname -p` in -- sparc) echo sparc-icl-nx7; exit ;; -- esac ;; -+ sparc) GUESS=sparc-icl-nx7 ;; -+ esac -+ ;; - s390x:SunOS:*:*) -- echo "$UNAME_MACHINE"-ibm-solaris2"`echo "$UNAME_RELEASE" | sed -e 's/[^.]*//'`" -- exit ;; -+ SUN_REL=`echo "$UNAME_RELEASE" | sed -e 's/[^.]*//'` -+ GUESS=$UNAME_MACHINE-ibm-solaris2$SUN_REL -+ ;; - sun4H:SunOS:5.*:*) -- echo sparc-hal-solaris2"`echo "$UNAME_RELEASE"|sed -e 's/[^.]*//'`" -- exit ;; -+ SUN_REL=`echo "$UNAME_RELEASE" | sed -e 's/[^.]*//'` -+ GUESS=sparc-hal-solaris2$SUN_REL -+ ;; - sun4*:SunOS:5.*:* | tadpole*:SunOS:5.*:*) -- echo sparc-sun-solaris2"`echo "$UNAME_RELEASE" | sed -e 's/[^.]*//'`" -- exit ;; -+ SUN_REL=`echo "$UNAME_RELEASE" | sed -e 's/[^.]*//'` -+ GUESS=sparc-sun-solaris2$SUN_REL -+ ;; - i86pc:AuroraUX:5.*:* | i86xen:AuroraUX:5.*:*) -- echo i386-pc-auroraux"$UNAME_RELEASE" -- exit ;; -+ GUESS=i386-pc-auroraux$UNAME_RELEASE -+ ;; - i86pc:SunOS:5.*:* | i86xen:SunOS:5.*:*) -- UNAME_REL="`echo "$UNAME_RELEASE" | sed -e 's/[^.]*//'`" -- case `isainfo -b` in -- 32) -- echo i386-pc-solaris2"$UNAME_REL" -- ;; -- 64) -- echo x86_64-pc-solaris2"$UNAME_REL" -- ;; -- esac -- exit ;; -+ set_cc_for_build -+ SUN_ARCH=i386 -+ # If there is a compiler, see if it is configured for 64-bit objects. -+ # Note that the Sun cc does not turn __LP64__ into 1 like gcc does. -+ # This test works for both compilers. -+ if test "$CC_FOR_BUILD" != no_compiler_found; then -+ if (echo '#ifdef __amd64'; echo IS_64BIT_ARCH; echo '#endif') | \ -+ (CCOPTS="" $CC_FOR_BUILD -m64 -E - 2>/dev/null) | \ -+ grep IS_64BIT_ARCH >/dev/null -+ then -+ SUN_ARCH=x86_64 -+ fi -+ fi -+ SUN_REL=`echo "$UNAME_RELEASE" | sed -e 's/[^.]*//'` -+ GUESS=$SUN_ARCH-pc-solaris2$SUN_REL -+ ;; - sun4*:SunOS:6*:*) - # According to config.sub, this is the proper way to canonicalize - # SunOS6. Hard to guess exactly what SunOS6 will be like, but - # it's likely to be more like Solaris than SunOS4. -- echo sparc-sun-solaris3"`echo "$UNAME_RELEASE"|sed -e 's/[^.]*//'`" -- exit ;; -+ SUN_REL=`echo "$UNAME_RELEASE" | sed -e 's/[^.]*//'` -+ GUESS=sparc-sun-solaris3$SUN_REL -+ ;; - sun4*:SunOS:*:*) -- case "`/usr/bin/arch -k`" in -+ case `/usr/bin/arch -k` in - Series*|S4*) - UNAME_RELEASE=`uname -v` - ;; - esac - # Japanese Language versions have a version number like `4.1.3-JL'. -- echo sparc-sun-sunos"`echo "$UNAME_RELEASE"|sed -e 's/-/_/'`" -- exit ;; -+ SUN_REL=`echo "$UNAME_RELEASE" | sed -e 's/-/_/'` -+ GUESS=sparc-sun-sunos$SUN_REL -+ ;; - sun3*:SunOS:*:*) -- echo m68k-sun-sunos"$UNAME_RELEASE" -- exit ;; -+ GUESS=m68k-sun-sunos$UNAME_RELEASE -+ ;; - sun*:*:4.2BSD:*) - UNAME_RELEASE=`(sed 1q /etc/motd | awk '{print substr($5,1,3)}') 2>/dev/null` - test "x$UNAME_RELEASE" = x && UNAME_RELEASE=3 -- case "`/bin/arch`" in -+ case `/bin/arch` in - sun3) -- echo m68k-sun-sunos"$UNAME_RELEASE" -+ GUESS=m68k-sun-sunos$UNAME_RELEASE - ;; - sun4) -- echo sparc-sun-sunos"$UNAME_RELEASE" -+ GUESS=sparc-sun-sunos$UNAME_RELEASE - ;; - esac -- exit ;; -+ ;; - aushp:SunOS:*:*) -- echo sparc-auspex-sunos"$UNAME_RELEASE" -- exit ;; -+ GUESS=sparc-auspex-sunos$UNAME_RELEASE -+ ;; - # The situation for MiNT is a little confusing. The machine name - # can be virtually everything (everything which is not - # "atarist" or "atariste" at least should have a processor -@@ -444,41 +490,41 @@ case "$UNAME_MACHINE:$UNAME_SYSTEM:$UNAME_RELEASE:$UNAME_VERSION" in - # MiNT. But MiNT is downward compatible to TOS, so this should - # be no problem. - atarist[e]:*MiNT:*:* | atarist[e]:*mint:*:* | atarist[e]:*TOS:*:*) -- echo m68k-atari-mint"$UNAME_RELEASE" -- exit ;; -+ GUESS=m68k-atari-mint$UNAME_RELEASE -+ ;; - atari*:*MiNT:*:* | atari*:*mint:*:* | atarist[e]:*TOS:*:*) -- echo m68k-atari-mint"$UNAME_RELEASE" -- exit ;; -+ GUESS=m68k-atari-mint$UNAME_RELEASE -+ ;; - *falcon*:*MiNT:*:* | *falcon*:*mint:*:* | *falcon*:*TOS:*:*) -- echo m68k-atari-mint"$UNAME_RELEASE" -- exit ;; -+ GUESS=m68k-atari-mint$UNAME_RELEASE -+ ;; - milan*:*MiNT:*:* | milan*:*mint:*:* | *milan*:*TOS:*:*) -- echo m68k-milan-mint"$UNAME_RELEASE" -- exit ;; -+ GUESS=m68k-milan-mint$UNAME_RELEASE -+ ;; - hades*:*MiNT:*:* | hades*:*mint:*:* | *hades*:*TOS:*:*) -- echo m68k-hades-mint"$UNAME_RELEASE" -- exit ;; -+ GUESS=m68k-hades-mint$UNAME_RELEASE -+ ;; - *:*MiNT:*:* | *:*mint:*:* | *:*TOS:*:*) -- echo m68k-unknown-mint"$UNAME_RELEASE" -- exit ;; -+ GUESS=m68k-unknown-mint$UNAME_RELEASE -+ ;; - m68k:machten:*:*) -- echo m68k-apple-machten"$UNAME_RELEASE" -- exit ;; -+ GUESS=m68k-apple-machten$UNAME_RELEASE -+ ;; - powerpc:machten:*:*) -- echo powerpc-apple-machten"$UNAME_RELEASE" -- exit ;; -+ GUESS=powerpc-apple-machten$UNAME_RELEASE -+ ;; - RISC*:Mach:*:*) -- echo mips-dec-mach_bsd4.3 -- exit ;; -+ GUESS=mips-dec-mach_bsd4.3 -+ ;; - RISC*:ULTRIX:*:*) -- echo mips-dec-ultrix"$UNAME_RELEASE" -- exit ;; -+ GUESS=mips-dec-ultrix$UNAME_RELEASE -+ ;; - VAX*:ULTRIX*:*:*) -- echo vax-dec-ultrix"$UNAME_RELEASE" -- exit ;; -+ GUESS=vax-dec-ultrix$UNAME_RELEASE -+ ;; - 2020:CLIX:*:* | 2430:CLIX:*:*) -- echo clipper-intergraph-clix"$UNAME_RELEASE" -- exit ;; -+ GUESS=clipper-intergraph-clix$UNAME_RELEASE -+ ;; - mips:*:*:UMIPS | mips:*:*:RISCos) - set_cc_for_build - sed 's/^ //' << EOF > "$dummy.c" -@@ -506,75 +552,76 @@ EOF - dummyarg=`echo "$UNAME_RELEASE" | sed -n 's/\([0-9]*\).*/\1/p'` && - SYSTEM_NAME=`"$dummy" "$dummyarg"` && - { echo "$SYSTEM_NAME"; exit; } -- echo mips-mips-riscos"$UNAME_RELEASE" -- exit ;; -+ GUESS=mips-mips-riscos$UNAME_RELEASE -+ ;; - Motorola:PowerMAX_OS:*:*) -- echo powerpc-motorola-powermax -- exit ;; -+ GUESS=powerpc-motorola-powermax -+ ;; - Motorola:*:4.3:PL8-*) -- echo powerpc-harris-powermax -- exit ;; -+ GUESS=powerpc-harris-powermax -+ ;; - Night_Hawk:*:*:PowerMAX_OS | Synergy:PowerMAX_OS:*:*) -- echo powerpc-harris-powermax -- exit ;; -+ GUESS=powerpc-harris-powermax -+ ;; - Night_Hawk:Power_UNIX:*:*) -- echo powerpc-harris-powerunix -- exit ;; -+ GUESS=powerpc-harris-powerunix -+ ;; - m88k:CX/UX:7*:*) -- echo m88k-harris-cxux7 -- exit ;; -+ GUESS=m88k-harris-cxux7 -+ ;; - m88k:*:4*:R4*) -- echo m88k-motorola-sysv4 -- exit ;; -+ GUESS=m88k-motorola-sysv4 -+ ;; - m88k:*:3*:R3*) -- echo m88k-motorola-sysv3 -- exit ;; -+ GUESS=m88k-motorola-sysv3 -+ ;; - AViiON:dgux:*:*) - # DG/UX returns AViiON for all architectures - UNAME_PROCESSOR=`/usr/bin/uname -p` -- if [ "$UNAME_PROCESSOR" = mc88100 ] || [ "$UNAME_PROCESSOR" = mc88110 ] -+ if test "$UNAME_PROCESSOR" = mc88100 || test "$UNAME_PROCESSOR" = mc88110 - then -- if [ "$TARGET_BINARY_INTERFACE"x = m88kdguxelfx ] || \ -- [ "$TARGET_BINARY_INTERFACE"x = x ] -+ if test "$TARGET_BINARY_INTERFACE"x = m88kdguxelfx || \ -+ test "$TARGET_BINARY_INTERFACE"x = x - then -- echo m88k-dg-dgux"$UNAME_RELEASE" -+ GUESS=m88k-dg-dgux$UNAME_RELEASE - else -- echo m88k-dg-dguxbcs"$UNAME_RELEASE" -+ GUESS=m88k-dg-dguxbcs$UNAME_RELEASE - fi - else -- echo i586-dg-dgux"$UNAME_RELEASE" -+ GUESS=i586-dg-dgux$UNAME_RELEASE - fi -- exit ;; -+ ;; - M88*:DolphinOS:*:*) # DolphinOS (SVR3) -- echo m88k-dolphin-sysv3 -- exit ;; -+ GUESS=m88k-dolphin-sysv3 -+ ;; - M88*:*:R3*:*) - # Delta 88k system running SVR3 -- echo m88k-motorola-sysv3 -- exit ;; -+ GUESS=m88k-motorola-sysv3 -+ ;; - XD88*:*:*:*) # Tektronix XD88 system running UTekV (SVR3) -- echo m88k-tektronix-sysv3 -- exit ;; -+ GUESS=m88k-tektronix-sysv3 -+ ;; - Tek43[0-9][0-9]:UTek:*:*) # Tektronix 4300 system running UTek (BSD) -- echo m68k-tektronix-bsd -- exit ;; -+ GUESS=m68k-tektronix-bsd -+ ;; - *:IRIX*:*:*) -- echo mips-sgi-irix"`echo "$UNAME_RELEASE"|sed -e 's/-/_/g'`" -- exit ;; -+ IRIX_REL=`echo "$UNAME_RELEASE" | sed -e 's/-/_/g'` -+ GUESS=mips-sgi-irix$IRIX_REL -+ ;; - ????????:AIX?:[12].1:2) # AIX 2.2.1 or AIX 2.1.1 is RT/PC AIX. -- echo romp-ibm-aix # uname -m gives an 8 hex-code CPU id -- exit ;; # Note that: echo "'`uname -s`'" gives 'AIX ' -+ GUESS=romp-ibm-aix # uname -m gives an 8 hex-code CPU id -+ ;; # Note that: echo "'`uname -s`'" gives 'AIX ' - i*86:AIX:*:*) -- echo i386-ibm-aix -- exit ;; -+ GUESS=i386-ibm-aix -+ ;; - ia64:AIX:*:*) -- if [ -x /usr/bin/oslevel ] ; then -+ if test -x /usr/bin/oslevel ; then - IBM_REV=`/usr/bin/oslevel` - else -- IBM_REV="$UNAME_VERSION.$UNAME_RELEASE" -+ IBM_REV=$UNAME_VERSION.$UNAME_RELEASE - fi -- echo "$UNAME_MACHINE"-ibm-aix"$IBM_REV" -- exit ;; -+ GUESS=$UNAME_MACHINE-ibm-aix$IBM_REV -+ ;; - *:AIX:2:3) - if grep bos325 /usr/include/stdio.h >/dev/null 2>&1; then - set_cc_for_build -@@ -591,16 +638,16 @@ EOF - EOF - if $CC_FOR_BUILD -o "$dummy" "$dummy.c" && SYSTEM_NAME=`"$dummy"` - then -- echo "$SYSTEM_NAME" -+ GUESS=$SYSTEM_NAME - else -- echo rs6000-ibm-aix3.2.5 -+ GUESS=rs6000-ibm-aix3.2.5 - fi - elif grep bos324 /usr/include/stdio.h >/dev/null 2>&1; then -- echo rs6000-ibm-aix3.2.4 -+ GUESS=rs6000-ibm-aix3.2.4 - else -- echo rs6000-ibm-aix3.2 -+ GUESS=rs6000-ibm-aix3.2 - fi -- exit ;; -+ ;; - *:AIX:*:[4567]) - IBM_CPU_ID=`/usr/sbin/lsdev -C -c processor -S available | sed 1q | awk '{ print $1 }'` - if /usr/sbin/lsattr -El "$IBM_CPU_ID" | grep ' POWER' >/dev/null 2>&1; then -@@ -608,56 +655,56 @@ EOF - else - IBM_ARCH=powerpc - fi -- if [ -x /usr/bin/lslpp ] ; then -- IBM_REV=`/usr/bin/lslpp -Lqc bos.rte.libc | -+ if test -x /usr/bin/lslpp ; then -+ IBM_REV=`/usr/bin/lslpp -Lqc bos.rte.libc | \ - awk -F: '{ print $3 }' | sed s/[0-9]*$/0/` - else -- IBM_REV="$UNAME_VERSION.$UNAME_RELEASE" -+ IBM_REV=$UNAME_VERSION.$UNAME_RELEASE - fi -- echo "$IBM_ARCH"-ibm-aix"$IBM_REV" -- exit ;; -+ GUESS=$IBM_ARCH-ibm-aix$IBM_REV -+ ;; - *:AIX:*:*) -- echo rs6000-ibm-aix -- exit ;; -+ GUESS=rs6000-ibm-aix -+ ;; - ibmrt:4.4BSD:*|romp-ibm:4.4BSD:*) -- echo romp-ibm-bsd4.4 -- exit ;; -+ GUESS=romp-ibm-bsd4.4 -+ ;; - ibmrt:*BSD:*|romp-ibm:BSD:*) # covers RT/PC BSD and -- echo romp-ibm-bsd"$UNAME_RELEASE" # 4.3 with uname added to -- exit ;; # report: romp-ibm BSD 4.3 -+ GUESS=romp-ibm-bsd$UNAME_RELEASE # 4.3 with uname added to -+ ;; # report: romp-ibm BSD 4.3 - *:BOSX:*:*) -- echo rs6000-bull-bosx -- exit ;; -+ GUESS=rs6000-bull-bosx -+ ;; - DPX/2?00:B.O.S.:*:*) -- echo m68k-bull-sysv3 -- exit ;; -+ GUESS=m68k-bull-sysv3 -+ ;; - 9000/[34]??:4.3bsd:1.*:*) -- echo m68k-hp-bsd -- exit ;; -+ GUESS=m68k-hp-bsd -+ ;; - hp300:4.4BSD:*:* | 9000/[34]??:4.3bsd:2.*:*) -- echo m68k-hp-bsd4.4 -- exit ;; -+ GUESS=m68k-hp-bsd4.4 -+ ;; - 9000/[34678]??:HP-UX:*:*) -- HPUX_REV=`echo "$UNAME_RELEASE"|sed -e 's/[^.]*.[0B]*//'` -- case "$UNAME_MACHINE" in -+ HPUX_REV=`echo "$UNAME_RELEASE" | sed -e 's/[^.]*.[0B]*//'` -+ case $UNAME_MACHINE in - 9000/31?) HP_ARCH=m68000 ;; - 9000/[34]??) HP_ARCH=m68k ;; - 9000/[678][0-9][0-9]) -- if [ -x /usr/bin/getconf ]; then -+ if test -x /usr/bin/getconf; then - sc_cpu_version=`/usr/bin/getconf SC_CPU_VERSION 2>/dev/null` - sc_kernel_bits=`/usr/bin/getconf SC_KERNEL_BITS 2>/dev/null` -- case "$sc_cpu_version" in -+ case $sc_cpu_version in - 523) HP_ARCH=hppa1.0 ;; # CPU_PA_RISC1_0 - 528) HP_ARCH=hppa1.1 ;; # CPU_PA_RISC1_1 - 532) # CPU_PA_RISC2_0 -- case "$sc_kernel_bits" in -+ case $sc_kernel_bits in - 32) HP_ARCH=hppa2.0n ;; - 64) HP_ARCH=hppa2.0w ;; - '') HP_ARCH=hppa2.0 ;; # HP-UX 10.20 - esac ;; - esac - fi -- if [ "$HP_ARCH" = "" ]; then -+ if test "$HP_ARCH" = ""; then - set_cc_for_build - sed 's/^ //' << EOF > "$dummy.c" - -@@ -696,7 +743,7 @@ EOF - test -z "$HP_ARCH" && HP_ARCH=hppa - fi ;; - esac -- if [ "$HP_ARCH" = hppa2.0w ] -+ if test "$HP_ARCH" = hppa2.0w - then - set_cc_for_build - -@@ -717,12 +764,12 @@ EOF - HP_ARCH=hppa64 - fi - fi -- echo "$HP_ARCH"-hp-hpux"$HPUX_REV" -- exit ;; -+ GUESS=$HP_ARCH-hp-hpux$HPUX_REV -+ ;; - ia64:HP-UX:*:*) -- HPUX_REV=`echo "$UNAME_RELEASE"|sed -e 's/[^.]*.[0B]*//'` -- echo ia64-hp-hpux"$HPUX_REV" -- exit ;; -+ HPUX_REV=`echo "$UNAME_RELEASE" | sed -e 's/[^.]*.[0B]*//'` -+ GUESS=ia64-hp-hpux$HPUX_REV -+ ;; - 3050*:HI-UX:*:*) - set_cc_for_build - sed 's/^ //' << EOF > "$dummy.c" -@@ -752,36 +799,36 @@ EOF - EOF - $CC_FOR_BUILD -o "$dummy" "$dummy.c" && SYSTEM_NAME=`"$dummy"` && - { echo "$SYSTEM_NAME"; exit; } -- echo unknown-hitachi-hiuxwe2 -- exit ;; -+ GUESS=unknown-hitachi-hiuxwe2 -+ ;; - 9000/7??:4.3bsd:*:* | 9000/8?[79]:4.3bsd:*:*) -- echo hppa1.1-hp-bsd -- exit ;; -+ GUESS=hppa1.1-hp-bsd -+ ;; - 9000/8??:4.3bsd:*:*) -- echo hppa1.0-hp-bsd -- exit ;; -+ GUESS=hppa1.0-hp-bsd -+ ;; - *9??*:MPE/iX:*:* | *3000*:MPE/iX:*:*) -- echo hppa1.0-hp-mpeix -- exit ;; -+ GUESS=hppa1.0-hp-mpeix -+ ;; - hp7??:OSF1:*:* | hp8?[79]:OSF1:*:*) -- echo hppa1.1-hp-osf -- exit ;; -+ GUESS=hppa1.1-hp-osf -+ ;; - hp8??:OSF1:*:*) -- echo hppa1.0-hp-osf -- exit ;; -+ GUESS=hppa1.0-hp-osf -+ ;; - i*86:OSF1:*:*) -- if [ -x /usr/sbin/sysversion ] ; then -- echo "$UNAME_MACHINE"-unknown-osf1mk -+ if test -x /usr/sbin/sysversion ; then -+ GUESS=$UNAME_MACHINE-unknown-osf1mk - else -- echo "$UNAME_MACHINE"-unknown-osf1 -+ GUESS=$UNAME_MACHINE-unknown-osf1 - fi -- exit ;; -+ ;; - parisc*:Lites*:*:*) -- echo hppa1.1-hp-lites -- exit ;; -+ GUESS=hppa1.1-hp-lites -+ ;; - C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*) -- echo c1-convex-bsd -- exit ;; -+ GUESS=c1-convex-bsd -+ ;; - C2*:ConvexOS:*:* | convex:ConvexOS:C2*:*) - if getsysinfo -f scalar_acc - then echo c32-convex-bsd -@@ -789,17 +836,18 @@ EOF - fi - exit ;; - C34*:ConvexOS:*:* | convex:ConvexOS:C34*:*) -- echo c34-convex-bsd -- exit ;; -+ GUESS=c34-convex-bsd -+ ;; - C38*:ConvexOS:*:* | convex:ConvexOS:C38*:*) -- echo c38-convex-bsd -- exit ;; -+ GUESS=c38-convex-bsd -+ ;; - C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*) -- echo c4-convex-bsd -- exit ;; -+ GUESS=c4-convex-bsd -+ ;; - CRAY*Y-MP:*:*:*) -- echo ymp-cray-unicos"$UNAME_RELEASE" | sed -e 's/\.[^.]*$/.X/' -- exit ;; -+ CRAY_REL=`echo "$UNAME_RELEASE" | sed -e 's/\.[^.]*$/.X/'` -+ GUESS=ymp-cray-unicos$CRAY_REL -+ ;; - CRAY*[A-Z]90:*:*:*) - echo "$UNAME_MACHINE"-cray-unicos"$UNAME_RELEASE" \ - | sed -e 's/CRAY.*\([A-Z]90\)/\1/' \ -@@ -807,114 +855,129 @@ EOF - -e 's/\.[^.]*$/.X/' - exit ;; - CRAY*TS:*:*:*) -- echo t90-cray-unicos"$UNAME_RELEASE" | sed -e 's/\.[^.]*$/.X/' -- exit ;; -+ CRAY_REL=`echo "$UNAME_RELEASE" | sed -e 's/\.[^.]*$/.X/'` -+ GUESS=t90-cray-unicos$CRAY_REL -+ ;; - CRAY*T3E:*:*:*) -- echo alphaev5-cray-unicosmk"$UNAME_RELEASE" | sed -e 's/\.[^.]*$/.X/' -- exit ;; -+ CRAY_REL=`echo "$UNAME_RELEASE" | sed -e 's/\.[^.]*$/.X/'` -+ GUESS=alphaev5-cray-unicosmk$CRAY_REL -+ ;; - CRAY*SV1:*:*:*) -- echo sv1-cray-unicos"$UNAME_RELEASE" | sed -e 's/\.[^.]*$/.X/' -- exit ;; -+ CRAY_REL=`echo "$UNAME_RELEASE" | sed -e 's/\.[^.]*$/.X/'` -+ GUESS=sv1-cray-unicos$CRAY_REL -+ ;; - *:UNICOS/mp:*:*) -- echo craynv-cray-unicosmp"$UNAME_RELEASE" | sed -e 's/\.[^.]*$/.X/' -- exit ;; -+ CRAY_REL=`echo "$UNAME_RELEASE" | sed -e 's/\.[^.]*$/.X/'` -+ GUESS=craynv-cray-unicosmp$CRAY_REL -+ ;; - F30[01]:UNIX_System_V:*:* | F700:UNIX_System_V:*:*) - FUJITSU_PROC=`uname -m | tr ABCDEFGHIJKLMNOPQRSTUVWXYZ abcdefghijklmnopqrstuvwxyz` - FUJITSU_SYS=`uname -p | tr ABCDEFGHIJKLMNOPQRSTUVWXYZ abcdefghijklmnopqrstuvwxyz | sed -e 's/\///'` - FUJITSU_REL=`echo "$UNAME_RELEASE" | sed -e 's/ /_/'` -- echo "${FUJITSU_PROC}-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" -- exit ;; -+ GUESS=${FUJITSU_PROC}-fujitsu-${FUJITSU_SYS}${FUJITSU_REL} -+ ;; - 5000:UNIX_System_V:4.*:*) - FUJITSU_SYS=`uname -p | tr ABCDEFGHIJKLMNOPQRSTUVWXYZ abcdefghijklmnopqrstuvwxyz | sed -e 's/\///'` - FUJITSU_REL=`echo "$UNAME_RELEASE" | tr ABCDEFGHIJKLMNOPQRSTUVWXYZ abcdefghijklmnopqrstuvwxyz | sed -e 's/ /_/'` -- echo "sparc-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" -- exit ;; -+ GUESS=sparc-fujitsu-${FUJITSU_SYS}${FUJITSU_REL} -+ ;; - i*86:BSD/386:*:* | i*86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*) -- echo "$UNAME_MACHINE"-pc-bsdi"$UNAME_RELEASE" -- exit ;; -+ GUESS=$UNAME_MACHINE-pc-bsdi$UNAME_RELEASE -+ ;; - sparc*:BSD/OS:*:*) -- echo sparc-unknown-bsdi"$UNAME_RELEASE" -- exit ;; -+ GUESS=sparc-unknown-bsdi$UNAME_RELEASE -+ ;; - *:BSD/OS:*:*) -- echo "$UNAME_MACHINE"-unknown-bsdi"$UNAME_RELEASE" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-bsdi$UNAME_RELEASE -+ ;; - arm:FreeBSD:*:*) - UNAME_PROCESSOR=`uname -p` - set_cc_for_build - if echo __ARM_PCS_VFP | $CC_FOR_BUILD -E - 2>/dev/null \ - | grep -q __ARM_PCS_VFP - then -- echo "${UNAME_PROCESSOR}"-unknown-freebsd"`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`"-gnueabi -+ FREEBSD_REL=`echo "$UNAME_RELEASE" | sed -e 's/[-(].*//'` -+ GUESS=$UNAME_PROCESSOR-unknown-freebsd$FREEBSD_REL-gnueabi - else -- echo "${UNAME_PROCESSOR}"-unknown-freebsd"`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`"-gnueabihf -+ FREEBSD_REL=`echo "$UNAME_RELEASE" | sed -e 's/[-(].*//'` -+ GUESS=$UNAME_PROCESSOR-unknown-freebsd$FREEBSD_REL-gnueabihf - fi -- exit ;; -+ ;; - *:FreeBSD:*:*) - UNAME_PROCESSOR=`/usr/bin/uname -p` -- case "$UNAME_PROCESSOR" in -+ case $UNAME_PROCESSOR in - amd64) - UNAME_PROCESSOR=x86_64 ;; - i386) - UNAME_PROCESSOR=i586 ;; - esac -- echo "$UNAME_PROCESSOR"-unknown-freebsd"`echo "$UNAME_RELEASE"|sed -e 's/[-(].*//'`" -- exit ;; -+ FREEBSD_REL=`echo "$UNAME_RELEASE" | sed -e 's/[-(].*//'` -+ GUESS=$UNAME_PROCESSOR-unknown-freebsd$FREEBSD_REL -+ ;; - i*:CYGWIN*:*) -- echo "$UNAME_MACHINE"-pc-cygwin -- exit ;; -+ GUESS=$UNAME_MACHINE-pc-cygwin -+ ;; - *:MINGW64*:*) -- echo "$UNAME_MACHINE"-pc-mingw64 -- exit ;; -+ GUESS=$UNAME_MACHINE-pc-mingw64 -+ ;; - *:MINGW*:*) -- echo "$UNAME_MACHINE"-pc-mingw32 -- exit ;; -+ GUESS=$UNAME_MACHINE-pc-mingw32 -+ ;; - *:MSYS*:*) -- echo "$UNAME_MACHINE"-pc-msys -- exit ;; -+ GUESS=$UNAME_MACHINE-pc-msys -+ ;; - i*:PW*:*) -- echo "$UNAME_MACHINE"-pc-pw32 -- exit ;; -+ GUESS=$UNAME_MACHINE-pc-pw32 -+ ;; -+ *:SerenityOS:*:*) -+ GUESS=$UNAME_MACHINE-pc-serenity -+ ;; - *:Interix*:*) -- case "$UNAME_MACHINE" in -+ case $UNAME_MACHINE in - x86) -- echo i586-pc-interix"$UNAME_RELEASE" -- exit ;; -+ GUESS=i586-pc-interix$UNAME_RELEASE -+ ;; - authenticamd | genuineintel | EM64T) -- echo x86_64-unknown-interix"$UNAME_RELEASE" -- exit ;; -+ GUESS=x86_64-unknown-interix$UNAME_RELEASE -+ ;; - IA64) -- echo ia64-unknown-interix"$UNAME_RELEASE" -- exit ;; -+ GUESS=ia64-unknown-interix$UNAME_RELEASE -+ ;; - esac ;; - i*:UWIN*:*) -- echo "$UNAME_MACHINE"-pc-uwin -- exit ;; -+ GUESS=$UNAME_MACHINE-pc-uwin -+ ;; - amd64:CYGWIN*:*:* | x86_64:CYGWIN*:*:*) -- echo x86_64-unknown-cygwin -- exit ;; -+ GUESS=x86_64-pc-cygwin -+ ;; - prep*:SunOS:5.*:*) -- echo powerpcle-unknown-solaris2"`echo "$UNAME_RELEASE"|sed -e 's/[^.]*//'`" -- exit ;; -+ SUN_REL=`echo "$UNAME_RELEASE" | sed -e 's/[^.]*//'` -+ GUESS=powerpcle-unknown-solaris2$SUN_REL -+ ;; - *:GNU:*:*) - # the GNU system -- echo "`echo "$UNAME_MACHINE"|sed -e 's,[-/].*$,,'`-unknown-$LIBC`echo "$UNAME_RELEASE"|sed -e 's,/.*$,,'`" -- exit ;; -+ GNU_ARCH=`echo "$UNAME_MACHINE" | sed -e 's,[-/].*$,,'` -+ GNU_REL=`echo "$UNAME_RELEASE" | sed -e 's,/.*$,,'` -+ GUESS=$GNU_ARCH-unknown-$LIBC$GNU_REL -+ ;; - *:GNU/*:*:*) - # other systems with GNU libc and userland -- echo "$UNAME_MACHINE-unknown-`echo "$UNAME_SYSTEM" | sed 's,^[^/]*/,,' | tr "[:upper:]" "[:lower:]"``echo "$UNAME_RELEASE"|sed -e 's/[-(].*//'`-$LIBC" -- exit ;; -+ GNU_SYS=`echo "$UNAME_SYSTEM" | sed 's,^[^/]*/,,' | tr "[:upper:]" "[:lower:]"` -+ GNU_REL=`echo "$UNAME_RELEASE" | sed -e 's/[-(].*//'` -+ GUESS=$UNAME_MACHINE-unknown-$GNU_SYS$GNU_REL-$LIBC -+ ;; - *:Minix:*:*) -- echo "$UNAME_MACHINE"-unknown-minix -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-minix -+ ;; - aarch64:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - aarch64_be:Linux:*:*) - UNAME_MACHINE=aarch64_be -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - alpha:Linux:*:*) -- case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in -+ case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' /proc/cpuinfo 2>/dev/null` in - EV5) UNAME_MACHINE=alphaev5 ;; - EV56) UNAME_MACHINE=alphaev56 ;; - PCA56) UNAME_MACHINE=alphapca56 ;; -@@ -925,183 +988,225 @@ EOF - esac - objdump --private-headers /bin/sh | grep -q ld.so.1 - if test "$?" = 0 ; then LIBC=gnulibc1 ; fi -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -- arc:Linux:*:* | arceb:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; -+ arc:Linux:*:* | arceb:Linux:*:* | arc32:Linux:*:* | arc64:Linux:*:*) -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - arm*:Linux:*:*) - set_cc_for_build - if echo __ARM_EABI__ | $CC_FOR_BUILD -E - 2>/dev/null \ - | grep -q __ARM_EABI__ - then -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC - else - if echo __ARM_PCS_VFP | $CC_FOR_BUILD -E - 2>/dev/null \ - | grep -q __ARM_PCS_VFP - then -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC"eabi -+ GUESS=$UNAME_MACHINE-unknown-linux-${LIBC}eabi - else -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC"eabihf -+ GUESS=$UNAME_MACHINE-unknown-linux-${LIBC}eabihf - fi - fi -- exit ;; -+ ;; - avr32*:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - cris:Linux:*:*) -- echo "$UNAME_MACHINE"-axis-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-axis-linux-$LIBC -+ ;; - crisv32:Linux:*:*) -- echo "$UNAME_MACHINE"-axis-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-axis-linux-$LIBC -+ ;; - e2k:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - frv:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - hexagon:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - i*86:Linux:*:*) -- echo "$UNAME_MACHINE"-pc-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-pc-linux-$LIBC -+ ;; - ia64:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - k1om:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; -+ loongarch32:Linux:*:* | loongarch64:Linux:*:* | loongarchx32:Linux:*:*) -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - m32r*:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - m68*:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - mips:Linux:*:* | mips64:Linux:*:*) - set_cc_for_build -+ IS_GLIBC=0 -+ test x"${LIBC}" = xgnu && IS_GLIBC=1 - sed 's/^ //' << EOF > "$dummy.c" - #undef CPU -- #undef ${UNAME_MACHINE} -- #undef ${UNAME_MACHINE}el -+ #undef mips -+ #undef mipsel -+ #undef mips64 -+ #undef mips64el -+ #if ${IS_GLIBC} && defined(_ABI64) -+ LIBCABI=gnuabi64 -+ #else -+ #if ${IS_GLIBC} && defined(_ABIN32) -+ LIBCABI=gnuabin32 -+ #else -+ LIBCABI=${LIBC} -+ #endif -+ #endif -+ -+ #if ${IS_GLIBC} && defined(__mips64) && defined(__mips_isa_rev) && __mips_isa_rev>=6 -+ CPU=mipsisa64r6 -+ #else -+ #if ${IS_GLIBC} && !defined(__mips64) && defined(__mips_isa_rev) && __mips_isa_rev>=6 -+ CPU=mipsisa32r6 -+ #else -+ #if defined(__mips64) -+ CPU=mips64 -+ #else -+ CPU=mips -+ #endif -+ #endif -+ #endif -+ - #if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL) -- CPU=${UNAME_MACHINE}el -+ MIPS_ENDIAN=el - #else - #if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB) -- CPU=${UNAME_MACHINE} -+ MIPS_ENDIAN= - #else -- CPU= -+ MIPS_ENDIAN= - #endif - #endif - EOF -- eval "`$CC_FOR_BUILD -E "$dummy.c" 2>/dev/null | grep '^CPU'`" -- test "x$CPU" != x && { echo "$CPU-unknown-linux-$LIBC"; exit; } -+ cc_set_vars=`$CC_FOR_BUILD -E "$dummy.c" 2>/dev/null | grep '^CPU\|^MIPS_ENDIAN\|^LIBCABI'` -+ eval "$cc_set_vars" -+ test "x$CPU" != x && { echo "$CPU${MIPS_ENDIAN}-unknown-linux-$LIBCABI"; exit; } - ;; - mips64el:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - openrisc*:Linux:*:*) -- echo or1k-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=or1k-unknown-linux-$LIBC -+ ;; - or32:Linux:*:* | or1k*:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - padre:Linux:*:*) -- echo sparc-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=sparc-unknown-linux-$LIBC -+ ;; - parisc64:Linux:*:* | hppa64:Linux:*:*) -- echo hppa64-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=hppa64-unknown-linux-$LIBC -+ ;; - parisc:Linux:*:* | hppa:Linux:*:*) - # Look for CPU level - case `grep '^cpu[^a-z]*:' /proc/cpuinfo 2>/dev/null | cut -d' ' -f2` in -- PA7*) echo hppa1.1-unknown-linux-"$LIBC" ;; -- PA8*) echo hppa2.0-unknown-linux-"$LIBC" ;; -- *) echo hppa-unknown-linux-"$LIBC" ;; -+ PA7*) GUESS=hppa1.1-unknown-linux-$LIBC ;; -+ PA8*) GUESS=hppa2.0-unknown-linux-$LIBC ;; -+ *) GUESS=hppa-unknown-linux-$LIBC ;; - esac -- exit ;; -+ ;; - ppc64:Linux:*:*) -- echo powerpc64-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=powerpc64-unknown-linux-$LIBC -+ ;; - ppc:Linux:*:*) -- echo powerpc-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=powerpc-unknown-linux-$LIBC -+ ;; - ppc64le:Linux:*:*) -- echo powerpc64le-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=powerpc64le-unknown-linux-$LIBC -+ ;; - ppcle:Linux:*:*) -- echo powerpcle-unknown-linux-"$LIBC" -- exit ;; -- riscv32:Linux:*:* | riscv64:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=powerpcle-unknown-linux-$LIBC -+ ;; -+ riscv32:Linux:*:* | riscv32be:Linux:*:* | riscv64:Linux:*:* | riscv64be:Linux:*:*) -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - s390:Linux:*:* | s390x:Linux:*:*) -- echo "$UNAME_MACHINE"-ibm-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-ibm-linux-$LIBC -+ ;; - sh64*:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - sh*:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - sparc:Linux:*:* | sparc64:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - tile*:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - vax:Linux:*:*) -- echo "$UNAME_MACHINE"-dec-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-dec-linux-$LIBC -+ ;; - x86_64:Linux:*:*) -- echo "$UNAME_MACHINE"-pc-linux-"$LIBC" -- exit ;; -+ set_cc_for_build -+ LIBCABI=$LIBC -+ if test "$CC_FOR_BUILD" != no_compiler_found; then -+ if (echo '#ifdef __ILP32__'; echo IS_X32; echo '#endif') | \ -+ (CCOPTS="" $CC_FOR_BUILD -E - 2>/dev/null) | \ -+ grep IS_X32 >/dev/null -+ then -+ LIBCABI=${LIBC}x32 -+ fi -+ fi -+ GUESS=$UNAME_MACHINE-pc-linux-$LIBCABI -+ ;; - xtensa*:Linux:*:*) -- echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-linux-$LIBC -+ ;; - i*86:DYNIX/ptx:4*:*) - # ptx 4.0 does uname -s correctly, with DYNIX/ptx in there. - # earlier versions are messed up and put the nodename in both - # sysname and nodename. -- echo i386-sequent-sysv4 -- exit ;; -+ GUESS=i386-sequent-sysv4 -+ ;; - i*86:UNIX_SV:4.2MP:2.*) - # Unixware is an offshoot of SVR4, but it has its own version - # number series starting with 2... - # I am not positive that other SVR4 systems won't match this, - # I just have to hope. -- rms. - # Use sysv4.2uw... so that sysv4* matches it. -- echo "$UNAME_MACHINE"-pc-sysv4.2uw"$UNAME_VERSION" -- exit ;; -+ GUESS=$UNAME_MACHINE-pc-sysv4.2uw$UNAME_VERSION -+ ;; - i*86:OS/2:*:*) - # If we were able to find `uname', then EMX Unix compatibility - # is probably installed. -- echo "$UNAME_MACHINE"-pc-os2-emx -- exit ;; -+ GUESS=$UNAME_MACHINE-pc-os2-emx -+ ;; - i*86:XTS-300:*:STOP) -- echo "$UNAME_MACHINE"-unknown-stop -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-stop -+ ;; - i*86:atheos:*:*) -- echo "$UNAME_MACHINE"-unknown-atheos -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-atheos -+ ;; - i*86:syllable:*:*) -- echo "$UNAME_MACHINE"-pc-syllable -- exit ;; -+ GUESS=$UNAME_MACHINE-pc-syllable -+ ;; - i*86:LynxOS:2.*:* | i*86:LynxOS:3.[01]*:* | i*86:LynxOS:4.[02]*:*) -- echo i386-unknown-lynxos"$UNAME_RELEASE" -- exit ;; -+ GUESS=i386-unknown-lynxos$UNAME_RELEASE -+ ;; - i*86:*DOS:*:*) -- echo "$UNAME_MACHINE"-pc-msdosdjgpp -- exit ;; -+ GUESS=$UNAME_MACHINE-pc-msdosdjgpp -+ ;; - i*86:*:4.*:*) - UNAME_REL=`echo "$UNAME_RELEASE" | sed 's/\/MP$//'` - if grep Novell /usr/include/link.h >/dev/null 2>/dev/null; then -- echo "$UNAME_MACHINE"-univel-sysv"$UNAME_REL" -+ GUESS=$UNAME_MACHINE-univel-sysv$UNAME_REL - else -- echo "$UNAME_MACHINE"-pc-sysv"$UNAME_REL" -+ GUESS=$UNAME_MACHINE-pc-sysv$UNAME_REL - fi -- exit ;; -+ ;; - i*86:*:5:[678]*) - # UnixWare 7.x, OpenUNIX and OpenServer 6. - case `/bin/uname -X | grep "^Machine"` in -@@ -1109,12 +1214,12 @@ EOF - *Pentium) UNAME_MACHINE=i586 ;; - *Pent*|*Celeron) UNAME_MACHINE=i686 ;; - esac -- echo "$UNAME_MACHINE-unknown-sysv${UNAME_RELEASE}${UNAME_SYSTEM}{$UNAME_VERSION}" -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-sysv${UNAME_RELEASE}${UNAME_SYSTEM}${UNAME_VERSION} -+ ;; - i*86:*:3.2:*) - if test -f /usr/options/cb.name; then - UNAME_REL=`sed -n 's/.*Version //p' /dev/null >/dev/null ; then - UNAME_REL=`(/bin/uname -X|grep Release|sed -e 's/.*= //')` - (/bin/uname -X|grep i80486 >/dev/null) && UNAME_MACHINE=i486 -@@ -1124,11 +1229,11 @@ EOF - && UNAME_MACHINE=i686 - (/bin/uname -X|grep '^Machine.*Pentium Pro' >/dev/null) \ - && UNAME_MACHINE=i686 -- echo "$UNAME_MACHINE"-pc-sco"$UNAME_REL" -+ GUESS=$UNAME_MACHINE-pc-sco$UNAME_REL - else -- echo "$UNAME_MACHINE"-pc-sysv32 -+ GUESS=$UNAME_MACHINE-pc-sysv32 - fi -- exit ;; -+ ;; - pc:*:*:*) - # Left here for compatibility: - # uname -m prints for DJGPP always 'pc', but it prints nothing about -@@ -1136,31 +1241,31 @@ EOF - # Note: whatever this is, it MUST be the same as what config.sub - # prints for the "djgpp" host, or else GDB configure will decide that - # this is a cross-build. -- echo i586-pc-msdosdjgpp -- exit ;; -+ GUESS=i586-pc-msdosdjgpp -+ ;; - Intel:Mach:3*:*) -- echo i386-pc-mach3 -- exit ;; -+ GUESS=i386-pc-mach3 -+ ;; - paragon:*:*:*) -- echo i860-intel-osf1 -- exit ;; -+ GUESS=i860-intel-osf1 -+ ;; - i860:*:4.*:*) # i860-SVR4 - if grep Stardent /usr/include/sys/uadmin.h >/dev/null 2>&1 ; then -- echo i860-stardent-sysv"$UNAME_RELEASE" # Stardent Vistra i860-SVR4 -+ GUESS=i860-stardent-sysv$UNAME_RELEASE # Stardent Vistra i860-SVR4 - else # Add other i860-SVR4 vendors below as they are discovered. -- echo i860-unknown-sysv"$UNAME_RELEASE" # Unknown i860-SVR4 -+ GUESS=i860-unknown-sysv$UNAME_RELEASE # Unknown i860-SVR4 - fi -- exit ;; -+ ;; - mini*:CTIX:SYS*5:*) - # "miniframe" -- echo m68010-convergent-sysv -- exit ;; -+ GUESS=m68010-convergent-sysv -+ ;; - mc68k:UNIX:SYSTEM5:3.51m) -- echo m68k-convergent-sysv -- exit ;; -+ GUESS=m68k-convergent-sysv -+ ;; - M680?0:D-NIX:5.3:*) -- echo m68k-diab-dnix -- exit ;; -+ GUESS=m68k-diab-dnix -+ ;; - M68*:*:R3V[5678]*:*) - test -r /sysV68 && { echo 'm68k-motorola-sysv'; exit; } ;; - 3[345]??:*:4.0:3.0 | 3[34]??A:*:4.0:3.0 | 3[34]??,*:*:4.0:3.0 | 3[34]??/*:*:4.0:3.0 | 4400:*:4.0:3.0 | 4850:*:4.0:3.0 | SKA40:*:4.0:3.0 | SDS2:*:4.0:3.0 | SHG2:*:4.0:3.0 | S7501*:*:4.0:3.0) -@@ -1185,250 +1290,404 @@ EOF - /bin/uname -p 2>/dev/null | /bin/grep pteron >/dev/null \ - && { echo i586-ncr-sysv4.3"$OS_REL"; exit; } ;; - m68*:LynxOS:2.*:* | m68*:LynxOS:3.0*:*) -- echo m68k-unknown-lynxos"$UNAME_RELEASE" -- exit ;; -+ GUESS=m68k-unknown-lynxos$UNAME_RELEASE -+ ;; - mc68030:UNIX_System_V:4.*:*) -- echo m68k-atari-sysv4 -- exit ;; -+ GUESS=m68k-atari-sysv4 -+ ;; - TSUNAMI:LynxOS:2.*:*) -- echo sparc-unknown-lynxos"$UNAME_RELEASE" -- exit ;; -+ GUESS=sparc-unknown-lynxos$UNAME_RELEASE -+ ;; - rs6000:LynxOS:2.*:*) -- echo rs6000-unknown-lynxos"$UNAME_RELEASE" -- exit ;; -+ GUESS=rs6000-unknown-lynxos$UNAME_RELEASE -+ ;; - PowerPC:LynxOS:2.*:* | PowerPC:LynxOS:3.[01]*:* | PowerPC:LynxOS:4.[02]*:*) -- echo powerpc-unknown-lynxos"$UNAME_RELEASE" -- exit ;; -+ GUESS=powerpc-unknown-lynxos$UNAME_RELEASE -+ ;; - SM[BE]S:UNIX_SV:*:*) -- echo mips-dde-sysv"$UNAME_RELEASE" -- exit ;; -+ GUESS=mips-dde-sysv$UNAME_RELEASE -+ ;; - RM*:ReliantUNIX-*:*:*) -- echo mips-sni-sysv4 -- exit ;; -+ GUESS=mips-sni-sysv4 -+ ;; - RM*:SINIX-*:*:*) -- echo mips-sni-sysv4 -- exit ;; -+ GUESS=mips-sni-sysv4 -+ ;; - *:SINIX-*:*:*) - if uname -p 2>/dev/null >/dev/null ; then - UNAME_MACHINE=`(uname -p) 2>/dev/null` -- echo "$UNAME_MACHINE"-sni-sysv4 -+ GUESS=$UNAME_MACHINE-sni-sysv4 - else -- echo ns32k-sni-sysv -+ GUESS=ns32k-sni-sysv - fi -- exit ;; -+ ;; - PENTIUM:*:4.0*:*) # Unisys `ClearPath HMP IX 4000' SVR4/MP effort - # says -- echo i586-unisys-sysv4 -- exit ;; -+ GUESS=i586-unisys-sysv4 -+ ;; - *:UNIX_System_V:4*:FTX*) - # From Gerald Hewes . - # How about differentiating between stratus architectures? -djm -- echo hppa1.1-stratus-sysv4 -- exit ;; -+ GUESS=hppa1.1-stratus-sysv4 -+ ;; - *:*:*:FTX*) - # From seanf@swdc.stratus.com. -- echo i860-stratus-sysv4 -- exit ;; -+ GUESS=i860-stratus-sysv4 -+ ;; - i*86:VOS:*:*) - # From Paul.Green@stratus.com. -- echo "$UNAME_MACHINE"-stratus-vos -- exit ;; -+ GUESS=$UNAME_MACHINE-stratus-vos -+ ;; - *:VOS:*:*) - # From Paul.Green@stratus.com. -- echo hppa1.1-stratus-vos -- exit ;; -+ GUESS=hppa1.1-stratus-vos -+ ;; - mc68*:A/UX:*:*) -- echo m68k-apple-aux"$UNAME_RELEASE" -- exit ;; -+ GUESS=m68k-apple-aux$UNAME_RELEASE -+ ;; - news*:NEWS-OS:6*:*) -- echo mips-sony-newsos6 -- exit ;; -+ GUESS=mips-sony-newsos6 -+ ;; - R[34]000:*System_V*:*:* | R4000:UNIX_SYSV:*:* | R*000:UNIX_SV:*:*) -- if [ -d /usr/nec ]; then -- echo mips-nec-sysv"$UNAME_RELEASE" -+ if test -d /usr/nec; then -+ GUESS=mips-nec-sysv$UNAME_RELEASE - else -- echo mips-unknown-sysv"$UNAME_RELEASE" -+ GUESS=mips-unknown-sysv$UNAME_RELEASE - fi -- exit ;; -+ ;; - BeBox:BeOS:*:*) # BeOS running on hardware made by Be, PPC only. -- echo powerpc-be-beos -- exit ;; -+ GUESS=powerpc-be-beos -+ ;; - BeMac:BeOS:*:*) # BeOS running on Mac or Mac clone, PPC only. -- echo powerpc-apple-beos -- exit ;; -+ GUESS=powerpc-apple-beos -+ ;; - BePC:BeOS:*:*) # BeOS running on Intel PC compatible. -- echo i586-pc-beos -- exit ;; -+ GUESS=i586-pc-beos -+ ;; - BePC:Haiku:*:*) # Haiku running on Intel PC compatible. -- echo i586-pc-haiku -- exit ;; -+ GUESS=i586-pc-haiku -+ ;; - x86_64:Haiku:*:*) -- echo x86_64-unknown-haiku -- exit ;; -+ GUESS=x86_64-unknown-haiku -+ ;; - SX-4:SUPER-UX:*:*) -- echo sx4-nec-superux"$UNAME_RELEASE" -- exit ;; -+ GUESS=sx4-nec-superux$UNAME_RELEASE -+ ;; - SX-5:SUPER-UX:*:*) -- echo sx5-nec-superux"$UNAME_RELEASE" -- exit ;; -+ GUESS=sx5-nec-superux$UNAME_RELEASE -+ ;; - SX-6:SUPER-UX:*:*) -- echo sx6-nec-superux"$UNAME_RELEASE" -- exit ;; -+ GUESS=sx6-nec-superux$UNAME_RELEASE -+ ;; - SX-7:SUPER-UX:*:*) -- echo sx7-nec-superux"$UNAME_RELEASE" -- exit ;; -+ GUESS=sx7-nec-superux$UNAME_RELEASE -+ ;; - SX-8:SUPER-UX:*:*) -- echo sx8-nec-superux"$UNAME_RELEASE" -- exit ;; -+ GUESS=sx8-nec-superux$UNAME_RELEASE -+ ;; - SX-8R:SUPER-UX:*:*) -- echo sx8r-nec-superux"$UNAME_RELEASE" -- exit ;; -+ GUESS=sx8r-nec-superux$UNAME_RELEASE -+ ;; - SX-ACE:SUPER-UX:*:*) -- echo sxace-nec-superux"$UNAME_RELEASE" -- exit ;; -+ GUESS=sxace-nec-superux$UNAME_RELEASE -+ ;; - Power*:Rhapsody:*:*) -- echo powerpc-apple-rhapsody"$UNAME_RELEASE" -- exit ;; -+ GUESS=powerpc-apple-rhapsody$UNAME_RELEASE -+ ;; - *:Rhapsody:*:*) -- echo "$UNAME_MACHINE"-apple-rhapsody"$UNAME_RELEASE" -- exit ;; -+ GUESS=$UNAME_MACHINE-apple-rhapsody$UNAME_RELEASE -+ ;; -+ arm64:Darwin:*:*) -+ GUESS=aarch64-apple-darwin$UNAME_RELEASE -+ ;; - *:Darwin:*:*) -- UNAME_PROCESSOR=`uname -p` || UNAME_PROCESSOR=unknown -- set_cc_for_build -- if test "$UNAME_PROCESSOR" = unknown ; then -- UNAME_PROCESSOR=powerpc -+ UNAME_PROCESSOR=`uname -p` -+ case $UNAME_PROCESSOR in -+ unknown) UNAME_PROCESSOR=powerpc ;; -+ esac -+ if command -v xcode-select > /dev/null 2> /dev/null && \ -+ ! xcode-select --print-path > /dev/null 2> /dev/null ; then -+ # Avoid executing cc if there is no toolchain installed as -+ # cc will be a stub that puts up a graphical alert -+ # prompting the user to install developer tools. -+ CC_FOR_BUILD=no_compiler_found -+ else -+ set_cc_for_build - fi -- if test "`echo "$UNAME_RELEASE" | sed -e 's/\..*//'`" -le 10 ; then -- if [ "$CC_FOR_BUILD" != no_compiler_found ]; then -- if (echo '#ifdef __LP64__'; echo IS_64BIT_ARCH; echo '#endif') | \ -- (CCOPTS="" $CC_FOR_BUILD -E - 2>/dev/null) | \ -- grep IS_64BIT_ARCH >/dev/null -- then -- case $UNAME_PROCESSOR in -- i386) UNAME_PROCESSOR=x86_64 ;; -- powerpc) UNAME_PROCESSOR=powerpc64 ;; -- esac -- fi -- # On 10.4-10.6 one might compile for PowerPC via gcc -arch ppc -- if (echo '#ifdef __POWERPC__'; echo IS_PPC; echo '#endif') | \ -- (CCOPTS="" $CC_FOR_BUILD -E - 2>/dev/null) | \ -- grep IS_PPC >/dev/null -- then -- UNAME_PROCESSOR=powerpc -- fi -+ if test "$CC_FOR_BUILD" != no_compiler_found; then -+ if (echo '#ifdef __LP64__'; echo IS_64BIT_ARCH; echo '#endif') | \ -+ (CCOPTS="" $CC_FOR_BUILD -E - 2>/dev/null) | \ -+ grep IS_64BIT_ARCH >/dev/null -+ then -+ case $UNAME_PROCESSOR in -+ i386) UNAME_PROCESSOR=x86_64 ;; -+ powerpc) UNAME_PROCESSOR=powerpc64 ;; -+ esac -+ fi -+ # On 10.4-10.6 one might compile for PowerPC via gcc -arch ppc -+ if (echo '#ifdef __POWERPC__'; echo IS_PPC; echo '#endif') | \ -+ (CCOPTS="" $CC_FOR_BUILD -E - 2>/dev/null) | \ -+ grep IS_PPC >/dev/null -+ then -+ UNAME_PROCESSOR=powerpc - fi - elif test "$UNAME_PROCESSOR" = i386 ; then -- # Avoid executing cc on OS X 10.9, as it ships with a stub -- # that puts up a graphical alert prompting to install -- # developer tools. Any system running Mac OS X 10.7 or -- # later (Darwin 11 and later) is required to have a 64-bit -- # processor. This is not true of the ARM version of Darwin -- # that Apple uses in portable devices. -- UNAME_PROCESSOR=x86_64 -+ # uname -m returns i386 or x86_64 -+ UNAME_PROCESSOR=$UNAME_MACHINE - fi -- echo "$UNAME_PROCESSOR"-apple-darwin"$UNAME_RELEASE" -- exit ;; -+ GUESS=$UNAME_PROCESSOR-apple-darwin$UNAME_RELEASE -+ ;; - *:procnto*:*:* | *:QNX:[0123456789]*:*) - UNAME_PROCESSOR=`uname -p` - if test "$UNAME_PROCESSOR" = x86; then - UNAME_PROCESSOR=i386 - UNAME_MACHINE=pc - fi -- echo "$UNAME_PROCESSOR"-"$UNAME_MACHINE"-nto-qnx"$UNAME_RELEASE" -- exit ;; -+ GUESS=$UNAME_PROCESSOR-$UNAME_MACHINE-nto-qnx$UNAME_RELEASE -+ ;; - *:QNX:*:4*) -- echo i386-pc-qnx -- exit ;; -+ GUESS=i386-pc-qnx -+ ;; - NEO-*:NONSTOP_KERNEL:*:*) -- echo neo-tandem-nsk"$UNAME_RELEASE" -- exit ;; -+ GUESS=neo-tandem-nsk$UNAME_RELEASE -+ ;; - NSE-*:NONSTOP_KERNEL:*:*) -- echo nse-tandem-nsk"$UNAME_RELEASE" -- exit ;; -+ GUESS=nse-tandem-nsk$UNAME_RELEASE -+ ;; - NSR-*:NONSTOP_KERNEL:*:*) -- echo nsr-tandem-nsk"$UNAME_RELEASE" -- exit ;; -+ GUESS=nsr-tandem-nsk$UNAME_RELEASE -+ ;; - NSV-*:NONSTOP_KERNEL:*:*) -- echo nsv-tandem-nsk"$UNAME_RELEASE" -- exit ;; -+ GUESS=nsv-tandem-nsk$UNAME_RELEASE -+ ;; - NSX-*:NONSTOP_KERNEL:*:*) -- echo nsx-tandem-nsk"$UNAME_RELEASE" -- exit ;; -+ GUESS=nsx-tandem-nsk$UNAME_RELEASE -+ ;; - *:NonStop-UX:*:*) -- echo mips-compaq-nonstopux -- exit ;; -+ GUESS=mips-compaq-nonstopux -+ ;; - BS2000:POSIX*:*:*) -- echo bs2000-siemens-sysv -- exit ;; -+ GUESS=bs2000-siemens-sysv -+ ;; - DS/*:UNIX_System_V:*:*) -- echo "$UNAME_MACHINE"-"$UNAME_SYSTEM"-"$UNAME_RELEASE" -- exit ;; -+ GUESS=$UNAME_MACHINE-$UNAME_SYSTEM-$UNAME_RELEASE -+ ;; - *:Plan9:*:*) - # "uname -m" is not consistent, so use $cputype instead. 386 - # is converted to i386 for consistency with other x86 - # operating systems. -- # shellcheck disable=SC2154 -- if test "$cputype" = 386; then -+ if test "${cputype-}" = 386; then - UNAME_MACHINE=i386 -- else -- UNAME_MACHINE="$cputype" -+ elif test "x${cputype-}" != x; then -+ UNAME_MACHINE=$cputype - fi -- echo "$UNAME_MACHINE"-unknown-plan9 -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-plan9 -+ ;; - *:TOPS-10:*:*) -- echo pdp10-unknown-tops10 -- exit ;; -+ GUESS=pdp10-unknown-tops10 -+ ;; - *:TENEX:*:*) -- echo pdp10-unknown-tenex -- exit ;; -+ GUESS=pdp10-unknown-tenex -+ ;; - KS10:TOPS-20:*:* | KL10:TOPS-20:*:* | TYPE4:TOPS-20:*:*) -- echo pdp10-dec-tops20 -- exit ;; -+ GUESS=pdp10-dec-tops20 -+ ;; - XKL-1:TOPS-20:*:* | TYPE5:TOPS-20:*:*) -- echo pdp10-xkl-tops20 -- exit ;; -+ GUESS=pdp10-xkl-tops20 -+ ;; - *:TOPS-20:*:*) -- echo pdp10-unknown-tops20 -- exit ;; -+ GUESS=pdp10-unknown-tops20 -+ ;; - *:ITS:*:*) -- echo pdp10-unknown-its -- exit ;; -+ GUESS=pdp10-unknown-its -+ ;; - SEI:*:*:SEIUX) -- echo mips-sei-seiux"$UNAME_RELEASE" -- exit ;; -+ GUESS=mips-sei-seiux$UNAME_RELEASE -+ ;; - *:DragonFly:*:*) -- echo "$UNAME_MACHINE"-unknown-dragonfly"`echo "$UNAME_RELEASE"|sed -e 's/[-(].*//'`" -- exit ;; -+ DRAGONFLY_REL=`echo "$UNAME_RELEASE" | sed -e 's/[-(].*//'` -+ GUESS=$UNAME_MACHINE-unknown-dragonfly$DRAGONFLY_REL -+ ;; - *:*VMS:*:*) - UNAME_MACHINE=`(uname -p) 2>/dev/null` -- case "$UNAME_MACHINE" in -- A*) echo alpha-dec-vms ; exit ;; -- I*) echo ia64-dec-vms ; exit ;; -- V*) echo vax-dec-vms ; exit ;; -+ case $UNAME_MACHINE in -+ A*) GUESS=alpha-dec-vms ;; -+ I*) GUESS=ia64-dec-vms ;; -+ V*) GUESS=vax-dec-vms ;; - esac ;; - *:XENIX:*:SysV) -- echo i386-pc-xenix -- exit ;; -+ GUESS=i386-pc-xenix -+ ;; - i*86:skyos:*:*) -- echo "$UNAME_MACHINE"-pc-skyos"`echo "$UNAME_RELEASE" | sed -e 's/ .*$//'`" -- exit ;; -+ SKYOS_REL=`echo "$UNAME_RELEASE" | sed -e 's/ .*$//'` -+ GUESS=$UNAME_MACHINE-pc-skyos$SKYOS_REL -+ ;; - i*86:rdos:*:*) -- echo "$UNAME_MACHINE"-pc-rdos -- exit ;; -- i*86:AROS:*:*) -- echo "$UNAME_MACHINE"-pc-aros -- exit ;; -+ GUESS=$UNAME_MACHINE-pc-rdos -+ ;; -+ i*86:Fiwix:*:*) -+ GUESS=$UNAME_MACHINE-pc-fiwix -+ ;; -+ *:AROS:*:*) -+ GUESS=$UNAME_MACHINE-unknown-aros -+ ;; - x86_64:VMkernel:*:*) -- echo "$UNAME_MACHINE"-unknown-esx -- exit ;; -+ GUESS=$UNAME_MACHINE-unknown-esx -+ ;; - amd64:Isilon\ OneFS:*:*) -- echo x86_64-unknown-onefs -- exit ;; -+ GUESS=x86_64-unknown-onefs -+ ;; -+ *:Unleashed:*:*) -+ GUESS=$UNAME_MACHINE-unknown-unleashed$UNAME_RELEASE -+ ;; - esac - -+# Do we have a guess based on uname results? -+if test "x$GUESS" != x; then -+ echo "$GUESS" -+ exit -+fi -+ -+# No uname command or uname output not recognized. -+set_cc_for_build -+cat > "$dummy.c" < -+#include -+#endif -+#if defined(ultrix) || defined(_ultrix) || defined(__ultrix) || defined(__ultrix__) -+#if defined (vax) || defined (__vax) || defined (__vax__) || defined(mips) || defined(__mips) || defined(__mips__) || defined(MIPS) || defined(__MIPS__) -+#include -+#if defined(_SIZE_T_) || defined(SIGLOST) -+#include -+#endif -+#endif -+#endif -+main () -+{ -+#if defined (sony) -+#if defined (MIPSEB) -+ /* BFD wants "bsd" instead of "newsos". Perhaps BFD should be changed, -+ I don't know.... */ -+ printf ("mips-sony-bsd\n"); exit (0); -+#else -+#include -+ printf ("m68k-sony-newsos%s\n", -+#ifdef NEWSOS4 -+ "4" -+#else -+ "" -+#endif -+ ); exit (0); -+#endif -+#endif -+ -+#if defined (NeXT) -+#if !defined (__ARCHITECTURE__) -+#define __ARCHITECTURE__ "m68k" -+#endif -+ int version; -+ version=`(hostinfo | sed -n 's/.*NeXT Mach \([0-9]*\).*/\1/p') 2>/dev/null`; -+ if (version < 4) -+ printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version); -+ else -+ printf ("%s-next-openstep%d\n", __ARCHITECTURE__, version); -+ exit (0); -+#endif -+ -+#if defined (MULTIMAX) || defined (n16) -+#if defined (UMAXV) -+ printf ("ns32k-encore-sysv\n"); exit (0); -+#else -+#if defined (CMU) -+ printf ("ns32k-encore-mach\n"); exit (0); -+#else -+ printf ("ns32k-encore-bsd\n"); exit (0); -+#endif -+#endif -+#endif -+ -+#if defined (__386BSD__) -+ printf ("i386-pc-bsd\n"); exit (0); -+#endif -+ -+#if defined (sequent) -+#if defined (i386) -+ printf ("i386-sequent-dynix\n"); exit (0); -+#endif -+#if defined (ns32000) -+ printf ("ns32k-sequent-dynix\n"); exit (0); -+#endif -+#endif -+ -+#if defined (_SEQUENT_) -+ struct utsname un; -+ -+ uname(&un); -+ if (strncmp(un.version, "V2", 2) == 0) { -+ printf ("i386-sequent-ptx2\n"); exit (0); -+ } -+ if (strncmp(un.version, "V1", 2) == 0) { /* XXX is V1 correct? */ -+ printf ("i386-sequent-ptx1\n"); exit (0); -+ } -+ printf ("i386-sequent-ptx\n"); exit (0); -+#endif -+ -+#if defined (vax) -+#if !defined (ultrix) -+#include -+#if defined (BSD) -+#if BSD == 43 -+ printf ("vax-dec-bsd4.3\n"); exit (0); -+#else -+#if BSD == 199006 -+ printf ("vax-dec-bsd4.3reno\n"); exit (0); -+#else -+ printf ("vax-dec-bsd\n"); exit (0); -+#endif -+#endif -+#else -+ printf ("vax-dec-bsd\n"); exit (0); -+#endif -+#else -+#if defined(_SIZE_T_) || defined(SIGLOST) -+ struct utsname un; -+ uname (&un); -+ printf ("vax-dec-ultrix%s\n", un.release); exit (0); -+#else -+ printf ("vax-dec-ultrix\n"); exit (0); -+#endif -+#endif -+#endif -+#if defined(ultrix) || defined(_ultrix) || defined(__ultrix) || defined(__ultrix__) -+#if defined(mips) || defined(__mips) || defined(__mips__) || defined(MIPS) || defined(__MIPS__) -+#if defined(_SIZE_T_) || defined(SIGLOST) -+ struct utsname *un; -+ uname (&un); -+ printf ("mips-dec-ultrix%s\n", un.release); exit (0); -+#else -+ printf ("mips-dec-ultrix\n"); exit (0); -+#endif -+#endif -+#endif -+ -+#if defined (alliant) && defined (i860) -+ printf ("i860-alliant-bsd\n"); exit (0); -+#endif -+ -+ exit (1); -+} -+EOF -+ -+$CC_FOR_BUILD -o "$dummy" "$dummy.c" 2>/dev/null && SYSTEM_NAME=`"$dummy"` && -+ { echo "$SYSTEM_NAME"; exit; } -+ -+# Apollos put the system type in the environment. -+test -d /usr/apollo && { echo "$ISP-apollo-$SYSTYPE"; exit; } -+ - echo "$0: unable to guess system type" >&2 - --case "$UNAME_MACHINE:$UNAME_SYSTEM" in -+case $UNAME_MACHINE:$UNAME_SYSTEM in - mips:Linux | mips64:Linux) - # If we got here on MIPS GNU/Linux, output extra information. - cat >&2 <&2 < header file. */ --#define HAVE_MEMORY_H 1 -- - /* Define to 1 if you have the `memset' function. */ - #define HAVE_MEMSET 1 - -@@ -222,7 +219,7 @@ - #define HAVE_PTHREAD_SPIN_LOCK 1 - - /* Define to 1 if you have the `pthread_yield' function. */ --#define HAVE_PTHREAD_YIELD 1 -+/* #undef HAVE_PTHREAD_YIELD */ - - /* Define to 1 if you have the `PTRACE_GETREGS' ptrace request. */ - #define HAVE_PTRACE_GETREGS 1 -@@ -251,6 +248,9 @@ - /* Define to 1 if you have the header file. */ - #define HAVE_STDINT_H 1 - -+/* Define to 1 if you have the header file. */ -+#define HAVE_STDIO_H 1 -+ - /* Define to 1 if you have the header file. */ - #define HAVE_STDLIB_H 1 - -@@ -467,10 +467,13 @@ - constants. */ - /* #undef SOLARIS_ZONE_DEFUNCT */ - --/* Define to 1 if you have the ANSI C header files. */ -+/* Define to 1 if all of the C90 standard headers exist (not just the ones -+ required in a freestanding environment). This macro is provided for -+ backward compatibility; new code need not use it. */ - #define STDC_HEADERS 1 - --/* Define to 1 if you can safely include both and . */ -+/* Define to 1 if you can safely include both and . This -+ macro is obsolete. */ - #define TIME_WITH_SYS_TIME 1 - - /* Version number of package */ -diff --git a/config.h.in b/config.h.in -index 644d645..a189816 100644 ---- a/config.h.in -+++ b/config.h.in -@@ -141,9 +141,6 @@ - /* Define to 1 if you have the `memchr' function. */ - #undef HAVE_MEMCHR - --/* Define to 1 if you have the header file. */ --#undef HAVE_MEMORY_H -- - /* Define to 1 if you have the `memset' function. */ - #undef HAVE_MEMSET - -@@ -250,6 +247,9 @@ - /* Define to 1 if you have the header file. */ - #undef HAVE_STDINT_H - -+/* Define to 1 if you have the header file. */ -+#undef HAVE_STDIO_H -+ - /* Define to 1 if you have the header file. */ - #undef HAVE_STDLIB_H - -@@ -466,10 +466,13 @@ - constants. */ - #undef SOLARIS_ZONE_DEFUNCT - --/* Define to 1 if you have the ANSI C header files. */ -+/* Define to 1 if all of the C90 standard headers exist (not just the ones -+ required in a freestanding environment). This macro is provided for -+ backward compatibility; new code need not use it. */ - #undef STDC_HEADERS - --/* Define to 1 if you can safely include both and . */ -+/* Define to 1 if you can safely include both and . This -+ macro is obsolete. */ - #undef TIME_WITH_SYS_TIME - - /* Version number of package */ -diff --git a/config.sub b/config.sub -index b51fb8c..dba16e8 100755 ---- a/config.sub -+++ b/config.sub -@@ -1,12 +1,14 @@ - #! /bin/sh - # Configuration validation subroutine script. --# Copyright 1992-2018 Free Software Foundation, Inc. -+# Copyright 1992-2022 Free Software Foundation, Inc. - --timestamp='2018-08-29' -+# shellcheck disable=SC2006,SC2268 # see below for rationale -+ -+timestamp='2022-01-03' - - # This file is free software; you can redistribute it and/or modify it - # under the terms of the GNU General Public License as published by --# the Free Software Foundation; either version 3 of the License, or -+# the Free Software Foundation, either version 3 of the License, or - # (at your option) any later version. - # - # This program is distributed in the hope that it will be useful, but -@@ -33,7 +35,7 @@ timestamp='2018-08-29' - # Otherwise, we print the canonical config type on stdout and succeed. - - # You can get the latest version of this script from: --# https://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.sub -+# https://git.savannah.gnu.org/cgit/config.git/plain/config.sub - - # This file is supposed to be the same for all GNU packages - # and recognize all the CPU types, system types and aliases -@@ -50,6 +52,13 @@ timestamp='2018-08-29' - # CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM - # It is wrong to echo any other type of specification. - -+# The "shellcheck disable" line above the timestamp inhibits complaints -+# about features and limitations of the classic Bourne shell that were -+# superseded or lifted in POSIX. However, this script identifies a wide -+# variety of pre-POSIX systems that do not have POSIX shells at all, and -+# even some reasonably current systems (Solaris 10 as case-in-point) still -+# have a pre-POSIX /bin/sh. -+ - me=`echo "$0" | sed -e 's,.*/,,'` - - usage="\ -@@ -67,7 +76,7 @@ Report bugs and patches to ." - version="\ - GNU config.sub ($timestamp) - --Copyright 1992-2018 Free Software Foundation, Inc. -+Copyright 1992-2022 Free Software Foundation, Inc. - - This is free software; see the source for copying conditions. There is NO - warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." -@@ -89,7 +98,7 @@ while test $# -gt 0 ; do - - ) # Use stdin as input. - break ;; - -* ) -- echo "$me: invalid option $1$help" -+ echo "$me: invalid option $1$help" >&2 - exit 1 ;; - - *local*) -@@ -111,9 +120,12 @@ case $# in - esac - - # Split fields of configuration type --IFS="-" read -r field1 field2 field3 field4 <&2 -- exit 1 -+ # No normalization, but not necessarily accepted, that comes below. - ;; - esac -+ - else - - # Here we handle the default operating systems that come with various machines. -@@ -1525,6 +1527,7 @@ else - # will signal an error saying that MANUFACTURER isn't an operating - # system, and we'll never get to this point. - -+kernel= - case $cpu-$vendor in - score-*) - os=elf -@@ -1536,7 +1539,8 @@ case $cpu-$vendor in - os=riscix1.2 - ;; - arm*-rebel) -- os=linux -+ kernel=linux -+ os=gnu - ;; - arm*-semi) - os=aout -@@ -1702,84 +1706,180 @@ case $cpu-$vendor in - os=none - ;; - esac -+ - fi - -+# Now, validate our (potentially fixed-up) OS. -+case $os in -+ # Sometimes we do "kernel-libc", so those need to count as OSes. -+ musl* | newlib* | relibc* | uclibc*) -+ ;; -+ # Likewise for "kernel-abi" -+ eabi* | gnueabi*) -+ ;; -+ # VxWorks passes extra cpu info in the 4th filed. -+ simlinux | simwindows | spe) -+ ;; -+ # Now accept the basic system types. -+ # The portable systems comes first. -+ # Each alternative MUST end in a * to match a version number. -+ gnu* | android* | bsd* | mach* | minix* | genix* | ultrix* | irix* \ -+ | *vms* | esix* | aix* | cnk* | sunos | sunos[34]* \ -+ | hpux* | unos* | osf* | luna* | dgux* | auroraux* | solaris* \ -+ | sym* | plan9* | psp* | sim* | xray* | os68k* | v88r* \ -+ | hiux* | abug | nacl* | netware* | windows* \ -+ | os9* | macos* | osx* | ios* \ -+ | mpw* | magic* | mmixware* | mon960* | lnews* \ -+ | amigaos* | amigados* | msdos* | newsos* | unicos* | aof* \ -+ | aos* | aros* | cloudabi* | sortix* | twizzler* \ -+ | nindy* | vxsim* | vxworks* | ebmon* | hms* | mvs* \ -+ | clix* | riscos* | uniplus* | iris* | isc* | rtu* | xenix* \ -+ | mirbsd* | netbsd* | dicos* | openedition* | ose* \ -+ | bitrig* | openbsd* | secbsd* | solidbsd* | libertybsd* | os108* \ -+ | ekkobsd* | freebsd* | riscix* | lynxos* | os400* \ -+ | bosx* | nextstep* | cxux* | aout* | elf* | oabi* \ -+ | ptx* | coff* | ecoff* | winnt* | domain* | vsta* \ -+ | udi* | lites* | ieee* | go32* | aux* | hcos* \ -+ | chorusrdb* | cegcc* | glidix* | serenity* \ -+ | cygwin* | msys* | pe* | moss* | proelf* | rtems* \ -+ | midipix* | mingw32* | mingw64* | mint* \ -+ | uxpv* | beos* | mpeix* | udk* | moxiebox* \ -+ | interix* | uwin* | mks* | rhapsody* | darwin* \ -+ | openstep* | oskit* | conix* | pw32* | nonstopux* \ -+ | storm-chaos* | tops10* | tenex* | tops20* | its* \ -+ | os2* | vos* | palmos* | uclinux* | nucleus* | morphos* \ -+ | scout* | superux* | sysv* | rtmk* | tpf* | windiss* \ -+ | powermax* | dnix* | nx6 | nx7 | sei* | dragonfly* \ -+ | skyos* | haiku* | rdos* | toppers* | drops* | es* \ -+ | onefs* | tirtos* | phoenix* | fuchsia* | redox* | bme* \ -+ | midnightbsd* | amdhsa* | unleashed* | emscripten* | wasi* \ -+ | nsk* | powerunix* | genode* | zvmoe* | qnx* | emx* | zephyr* \ -+ | fiwix* ) -+ ;; -+ # This one is extra strict with allowed versions -+ sco3.2v2 | sco3.2v[4-9]* | sco5v6*) -+ # Don't forget version if it is 3.2v4 or newer. -+ ;; -+ none) -+ ;; -+ *) -+ echo Invalid configuration \`"$1"\': OS \`"$os"\' not recognized 1>&2 -+ exit 1 -+ ;; -+esac -+ -+# As a final step for OS-related things, validate the OS-kernel combination -+# (given a valid OS), if there is a kernel. -+case $kernel-$os in -+ linux-gnu* | linux-dietlibc* | linux-android* | linux-newlib* \ -+ | linux-musl* | linux-relibc* | linux-uclibc* ) -+ ;; -+ uclinux-uclibc* ) -+ ;; -+ -dietlibc* | -newlib* | -musl* | -relibc* | -uclibc* ) -+ # These are just libc implementations, not actual OSes, and thus -+ # require a kernel. -+ echo "Invalid configuration \`$1': libc \`$os' needs explicit kernel." 1>&2 -+ exit 1 -+ ;; -+ kfreebsd*-gnu* | kopensolaris*-gnu*) -+ ;; -+ vxworks-simlinux | vxworks-simwindows | vxworks-spe) -+ ;; -+ nto-qnx*) -+ ;; -+ os2-emx) -+ ;; -+ *-eabi* | *-gnueabi*) -+ ;; -+ -*) -+ # Blank kernel with real OS is always fine. -+ ;; -+ *-*) -+ echo "Invalid configuration \`$1': Kernel \`$kernel' not known to work with OS \`$os'." 1>&2 -+ exit 1 -+ ;; -+esac -+ - # Here we handle the case where we know the os, and the CPU type, but not the - # manufacturer. We pick the logical manufacturer. - case $vendor in - unknown) -- case $os in -- riscix*) -+ case $cpu-$os in -+ *-riscix*) - vendor=acorn - ;; -- sunos*) -+ *-sunos*) - vendor=sun - ;; -- cnk*|-aix*) -+ *-cnk* | *-aix*) - vendor=ibm - ;; -- beos*) -+ *-beos*) - vendor=be - ;; -- hpux*) -+ *-hpux*) - vendor=hp - ;; -- mpeix*) -+ *-mpeix*) - vendor=hp - ;; -- hiux*) -+ *-hiux*) - vendor=hitachi - ;; -- unos*) -+ *-unos*) - vendor=crds - ;; -- dgux*) -+ *-dgux*) - vendor=dg - ;; -- luna*) -+ *-luna*) - vendor=omron - ;; -- genix*) -+ *-genix*) - vendor=ns - ;; -- clix*) -+ *-clix*) - vendor=intergraph - ;; -- mvs* | opened*) -+ *-mvs* | *-opened*) -+ vendor=ibm -+ ;; -+ *-os400*) - vendor=ibm - ;; -- os400*) -+ s390-* | s390x-*) - vendor=ibm - ;; -- ptx*) -+ *-ptx*) - vendor=sequent - ;; -- tpf*) -+ *-tpf*) - vendor=ibm - ;; -- vxsim* | vxworks* | windiss*) -+ *-vxsim* | *-vxworks* | *-windiss*) - vendor=wrs - ;; -- aux*) -+ *-aux*) - vendor=apple - ;; -- hms*) -+ *-hms*) - vendor=hitachi - ;; -- mpw* | macos*) -+ *-mpw* | *-macos*) - vendor=apple - ;; -- *mint | mint[0-9]* | *MiNT | MiNT[0-9]*) -+ *-*mint | *-mint[0-9]* | *-*MiNT | *-MiNT[0-9]*) - vendor=atari - ;; -- vos*) -+ *-vos*) - vendor=stratus - ;; - esac - ;; - esac - --echo "$cpu-$vendor-$os" -+echo "$cpu-$vendor-${kernel:+$kernel-}$os" - exit - - # Local variables: -diff --git a/configure b/configure -index ce987b6..00a2719 100755 ---- a/configure -+++ b/configure -@@ -1,11 +1,12 @@ - #! /bin/sh - # Guess values for system-dependent variables and create Makefiles. --# Generated by GNU Autoconf 2.69 for Valgrind 3.16.0. -+# Generated by GNU Autoconf 2.71 for Valgrind 3.16.0. - # - # Report bugs to . - # - # --# Copyright (C) 1992-1996, 1998-2012 Free Software Foundation, Inc. -+# Copyright (C) 1992-1996, 1998-2017, 2020-2021 Free Software Foundation, -+# Inc. - # - # - # This configure script is free software; the Free Software Foundation -@@ -16,14 +17,16 @@ - - # Be more Bourne compatible - DUALCASE=1; export DUALCASE # for MKS sh --if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then : -+as_nop=: -+if test ${ZSH_VERSION+y} && (emulate sh) >/dev/null 2>&1 -+then : - emulate sh - NULLCMD=: - # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which - # is contrary to our usage. Disable this feature. - alias -g '${1+"$@"}'='"$@"' - setopt NO_GLOB_SUBST --else -+else $as_nop - case `(set -o) 2>/dev/null` in #( - *posix*) : - set -o posix ;; #( -@@ -33,46 +36,46 @@ esac - fi - - -+ -+# Reset variables that may have inherited troublesome values from -+# the environment. -+ -+# IFS needs to be set, to space, tab, and newline, in precisely that order. -+# (If _AS_PATH_WALK were called with IFS unset, it would have the -+# side effect of setting IFS to empty, thus disabling word splitting.) -+# Quoting is to prevent editors from complaining about space-tab. - as_nl=' - ' - export as_nl --# Printing a long string crashes Solaris 7 /usr/bin/printf. --as_echo='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\' --as_echo=$as_echo$as_echo$as_echo$as_echo$as_echo --as_echo=$as_echo$as_echo$as_echo$as_echo$as_echo$as_echo --# Prefer a ksh shell builtin over an external printf program on Solaris, --# but without wasting forks for bash or zsh. --if test -z "$BASH_VERSION$ZSH_VERSION" \ -- && (test "X`print -r -- $as_echo`" = "X$as_echo") 2>/dev/null; then -- as_echo='print -r --' -- as_echo_n='print -rn --' --elif (test "X`printf %s $as_echo`" = "X$as_echo") 2>/dev/null; then -- as_echo='printf %s\n' -- as_echo_n='printf %s' --else -- if test "X`(/usr/ucb/echo -n -n $as_echo) 2>/dev/null`" = "X-n $as_echo"; then -- as_echo_body='eval /usr/ucb/echo -n "$1$as_nl"' -- as_echo_n='/usr/ucb/echo -n' -- else -- as_echo_body='eval expr "X$1" : "X\\(.*\\)"' -- as_echo_n_body='eval -- arg=$1; -- case $arg in #( -- *"$as_nl"*) -- expr "X$arg" : "X\\(.*\\)$as_nl"; -- arg=`expr "X$arg" : ".*$as_nl\\(.*\\)"`;; -- esac; -- expr "X$arg" : "X\\(.*\\)" | tr -d "$as_nl" -- ' -- export as_echo_n_body -- as_echo_n='sh -c $as_echo_n_body as_echo' -- fi -- export as_echo_body -- as_echo='sh -c $as_echo_body as_echo' --fi -+IFS=" "" $as_nl" -+ -+PS1='$ ' -+PS2='> ' -+PS4='+ ' -+ -+# Ensure predictable behavior from utilities with locale-dependent output. -+LC_ALL=C -+export LC_ALL -+LANGUAGE=C -+export LANGUAGE -+ -+# We cannot yet rely on "unset" to work, but we need these variables -+# to be unset--not just set to an empty or harmless value--now, to -+# avoid bugs in old shells (e.g. pre-3.0 UWIN ksh). This construct -+# also avoids known problems related to "unset" and subshell syntax -+# in other old shells (e.g. bash 2.01 and pdksh 5.2.14). -+for as_var in BASH_ENV ENV MAIL MAILPATH CDPATH -+do eval test \${$as_var+y} \ -+ && ( (unset $as_var) || exit 1) >/dev/null 2>&1 && unset $as_var || : -+done -+ -+# Ensure that fds 0, 1, and 2 are open. -+if (exec 3>&0) 2>/dev/null; then :; else exec 0&1) 2>/dev/null; then :; else exec 1>/dev/null; fi -+if (exec 3>&2) ; then :; else exec 2>/dev/null; fi - - # The user is always right. --if test "${PATH_SEPARATOR+set}" != set; then -+if ${PATH_SEPARATOR+false} :; then - PATH_SEPARATOR=: - (PATH='/bin;/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 && { - (PATH='/bin:/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 || -@@ -81,13 +84,6 @@ if test "${PATH_SEPARATOR+set}" != set; then - fi - - --# IFS --# We need space, tab and new line, in precisely that order. Quoting is --# there to prevent editors from complaining about space-tab. --# (If _AS_PATH_WALK were called with IFS unset, it would disable word --# splitting by setting IFS to empty value.) --IFS=" "" $as_nl" -- - # Find who we are. Look in the path if we contain no directory separator. - as_myself= - case $0 in #(( -@@ -96,8 +92,12 @@ case $0 in #(( - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -- test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac -+ test -r "$as_dir$0" && as_myself=$as_dir$0 && break - done - IFS=$as_save_IFS - -@@ -109,30 +109,10 @@ if test "x$as_myself" = x; then - as_myself=$0 - fi - if test ! -f "$as_myself"; then -- $as_echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2 -+ printf "%s\n" "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2 - exit 1 - fi - --# Unset variables that we do not need and which cause bugs (e.g. in --# pre-3.0 UWIN ksh). But do not cause bugs in bash 2.01; the "|| exit 1" --# suppresses any "Segmentation fault" message there. '((' could --# trigger a bug in pdksh 5.2.14. --for as_var in BASH_ENV ENV MAIL MAILPATH --do eval test x\${$as_var+set} = xset \ -- && ( (unset $as_var) || exit 1) >/dev/null 2>&1 && unset $as_var || : --done --PS1='$ ' --PS2='> ' --PS4='+ ' -- --# NLS nuisances. --LC_ALL=C --export LC_ALL --LANGUAGE=C --export LANGUAGE -- --# CDPATH. --(unset CDPATH) >/dev/null 2>&1 && unset CDPATH - - # Use a proper internal environment variable to ensure we don't fall - # into an infinite loop, continuously re-executing ourselves. -@@ -154,20 +134,22 @@ esac - exec $CONFIG_SHELL $as_opts "$as_myself" ${1+"$@"} - # Admittedly, this is quite paranoid, since all the known shells bail - # out after a failed `exec'. --$as_echo "$0: could not re-execute with $CONFIG_SHELL" >&2 --as_fn_exit 255 -+printf "%s\n" "$0: could not re-execute with $CONFIG_SHELL" >&2 -+exit 255 - fi - # We don't want this to propagate to other subprocesses. - { _as_can_reexec=; unset _as_can_reexec;} - if test "x$CONFIG_SHELL" = x; then -- as_bourne_compatible="if test -n \"\${ZSH_VERSION+set}\" && (emulate sh) >/dev/null 2>&1; then : -+ as_bourne_compatible="as_nop=: -+if test \${ZSH_VERSION+y} && (emulate sh) >/dev/null 2>&1 -+then : - emulate sh - NULLCMD=: - # Pre-4.2 versions of Zsh do word splitting on \${1+\"\$@\"}, which - # is contrary to our usage. Disable this feature. - alias -g '\${1+\"\$@\"}'='\"\$@\"' - setopt NO_GLOB_SUBST --else -+else \$as_nop - case \`(set -o) 2>/dev/null\` in #( - *posix*) : - set -o posix ;; #( -@@ -187,42 +169,53 @@ as_fn_success || { exitcode=1; echo as_fn_success failed.; } - as_fn_failure && { exitcode=1; echo as_fn_failure succeeded.; } - as_fn_ret_success || { exitcode=1; echo as_fn_ret_success failed.; } - as_fn_ret_failure && { exitcode=1; echo as_fn_ret_failure succeeded.; } --if ( set x; as_fn_ret_success y && test x = \"\$1\" ); then : -+if ( set x; as_fn_ret_success y && test x = \"\$1\" ) -+then : - --else -+else \$as_nop - exitcode=1; echo positional parameters were not saved. - fi - test x\$exitcode = x0 || exit 1 -+blah=\$(echo \$(echo blah)) -+test x\"\$blah\" = xblah || exit 1 - test -x / || exit 1" - as_suggested=" as_lineno_1=";as_suggested=$as_suggested$LINENO;as_suggested=$as_suggested" as_lineno_1a=\$LINENO - as_lineno_2=";as_suggested=$as_suggested$LINENO;as_suggested=$as_suggested" as_lineno_2a=\$LINENO - eval 'test \"x\$as_lineno_1'\$as_run'\" != \"x\$as_lineno_2'\$as_run'\" && - test \"x\`expr \$as_lineno_1'\$as_run' + 1\`\" = \"x\$as_lineno_2'\$as_run'\"' || exit 1 - test \$(( 1 + 1 )) = 2 || exit 1" -- if (eval "$as_required") 2>/dev/null; then : -+ if (eval "$as_required") 2>/dev/null -+then : - as_have_required=yes --else -+else $as_nop - as_have_required=no - fi -- if test x$as_have_required = xyes && (eval "$as_suggested") 2>/dev/null; then : -+ if test x$as_have_required = xyes && (eval "$as_suggested") 2>/dev/null -+then : - --else -+else $as_nop - as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - as_found=false - for as_dir in /bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - as_found=: - case $as_dir in #( - /*) - for as_base in sh bash ksh sh5; do - # Try only shells that exist, to save several forks. -- as_shell=$as_dir/$as_base -+ as_shell=$as_dir$as_base - if { test -f "$as_shell" || test -f "$as_shell.exe"; } && -- { $as_echo "$as_bourne_compatible""$as_required" | as_run=a "$as_shell"; } 2>/dev/null; then : -+ as_run=a "$as_shell" -c "$as_bourne_compatible""$as_required" 2>/dev/null -+then : - CONFIG_SHELL=$as_shell as_have_required=yes -- if { $as_echo "$as_bourne_compatible""$as_suggested" | as_run=a "$as_shell"; } 2>/dev/null; then : -+ if as_run=a "$as_shell" -c "$as_bourne_compatible""$as_suggested" 2>/dev/null -+then : - break 2 - fi - fi -@@ -230,14 +223,21 @@ fi - esac - as_found=false - done --$as_found || { if { test -f "$SHELL" || test -f "$SHELL.exe"; } && -- { $as_echo "$as_bourne_compatible""$as_required" | as_run=a "$SHELL"; } 2>/dev/null; then : -- CONFIG_SHELL=$SHELL as_have_required=yes --fi; } - IFS=$as_save_IFS -+if $as_found -+then : -+ -+else $as_nop -+ if { test -f "$SHELL" || test -f "$SHELL.exe"; } && -+ as_run=a "$SHELL" -c "$as_bourne_compatible""$as_required" 2>/dev/null -+then : -+ CONFIG_SHELL=$SHELL as_have_required=yes -+fi -+fi - - -- if test "x$CONFIG_SHELL" != x; then : -+ if test "x$CONFIG_SHELL" != x -+then : - export CONFIG_SHELL - # We cannot yet assume a decent shell, so we have to provide a - # neutralization value for shells without unset; and this also -@@ -255,18 +255,19 @@ esac - exec $CONFIG_SHELL $as_opts "$as_myself" ${1+"$@"} - # Admittedly, this is quite paranoid, since all the known shells bail - # out after a failed `exec'. --$as_echo "$0: could not re-execute with $CONFIG_SHELL" >&2 -+printf "%s\n" "$0: could not re-execute with $CONFIG_SHELL" >&2 - exit 255 - fi - -- if test x$as_have_required = xno; then : -- $as_echo "$0: This script requires a shell more modern than all" -- $as_echo "$0: the shells that I found on your system." -- if test x${ZSH_VERSION+set} = xset ; then -- $as_echo "$0: In particular, zsh $ZSH_VERSION has bugs and should" -- $as_echo "$0: be upgraded to zsh 4.3.4 or later." -+ if test x$as_have_required = xno -+then : -+ printf "%s\n" "$0: This script requires a shell more modern than all" -+ printf "%s\n" "$0: the shells that I found on your system." -+ if test ${ZSH_VERSION+y} ; then -+ printf "%s\n" "$0: In particular, zsh $ZSH_VERSION has bugs and should" -+ printf "%s\n" "$0: be upgraded to zsh 4.3.4 or later." - else -- $as_echo "$0: Please tell bug-autoconf@gnu.org and -+ printf "%s\n" "$0: Please tell bug-autoconf@gnu.org and - $0: valgrind-users@lists.sourceforge.net about your system, - $0: including any error possibly output before this - $0: message. Then install a modern shell, or manually run -@@ -294,6 +295,7 @@ as_fn_unset () - } - as_unset=as_fn_unset - -+ - # as_fn_set_status STATUS - # ----------------------- - # Set $? to STATUS, without forking. -@@ -311,6 +313,14 @@ as_fn_exit () - as_fn_set_status $1 - exit $1 - } # as_fn_exit -+# as_fn_nop -+# --------- -+# Do nothing but, unlike ":", preserve the value of $?. -+as_fn_nop () -+{ -+ return $? -+} -+as_nop=as_fn_nop - - # as_fn_mkdir_p - # ------------- -@@ -325,7 +335,7 @@ as_fn_mkdir_p () - as_dirs= - while :; do - case $as_dir in #( -- *\'*) as_qdir=`$as_echo "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #'( -+ *\'*) as_qdir=`printf "%s\n" "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #'( - *) as_qdir=$as_dir;; - esac - as_dirs="'$as_qdir' $as_dirs" -@@ -334,7 +344,7 @@ $as_expr X"$as_dir" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ - X"$as_dir" : 'X\(//\)[^/]' \| \ - X"$as_dir" : 'X\(//\)$' \| \ - X"$as_dir" : 'X\(/\)' \| . 2>/dev/null || --$as_echo X"$as_dir" | -+printf "%s\n" X"$as_dir" | - sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ - s//\1/ - q -@@ -373,12 +383,13 @@ as_fn_executable_p () - # advantage of any shell optimizations that allow amortized linear growth over - # repeated appends, instead of the typical quadratic growth present in naive - # implementations. --if (eval "as_var=1; as_var+=2; test x\$as_var = x12") 2>/dev/null; then : -+if (eval "as_var=1; as_var+=2; test x\$as_var = x12") 2>/dev/null -+then : - eval 'as_fn_append () - { - eval $1+=\$2 - }' --else -+else $as_nop - as_fn_append () - { - eval $1=\$$1\$2 -@@ -390,18 +401,27 @@ fi # as_fn_append - # Perform arithmetic evaluation on the ARGs, and store the result in the - # global $as_val. Take advantage of shells that can avoid forks. The arguments - # must be portable across $(()) and expr. --if (eval "test \$(( 1 + 1 )) = 2") 2>/dev/null; then : -+if (eval "test \$(( 1 + 1 )) = 2") 2>/dev/null -+then : - eval 'as_fn_arith () - { - as_val=$(( $* )) - }' --else -+else $as_nop - as_fn_arith () - { - as_val=`expr "$@" || test $? -eq 1` - } - fi # as_fn_arith - -+# as_fn_nop -+# --------- -+# Do nothing but, unlike ":", preserve the value of $?. -+as_fn_nop () -+{ -+ return $? -+} -+as_nop=as_fn_nop - - # as_fn_error STATUS ERROR [LINENO LOG_FD] - # ---------------------------------------- -@@ -413,9 +433,9 @@ as_fn_error () - as_status=$1; test $as_status -eq 0 && as_status=1 - if test "$4"; then - as_lineno=${as_lineno-"$3"} as_lineno_stack=as_lineno_stack=$as_lineno_stack -- $as_echo "$as_me:${as_lineno-$LINENO}: error: $2" >&$4 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: $2" >&$4 - fi -- $as_echo "$as_me: error: $2" >&2 -+ printf "%s\n" "$as_me: error: $2" >&2 - as_fn_exit $as_status - } # as_fn_error - -@@ -442,7 +462,7 @@ as_me=`$as_basename -- "$0" || - $as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \ - X"$0" : 'X\(//\)$' \| \ - X"$0" : 'X\(/\)' \| . 2>/dev/null || --$as_echo X/"$0" | -+printf "%s\n" X/"$0" | - sed '/^.*\/\([^/][^/]*\)\/*$/{ - s//\1/ - q -@@ -486,7 +506,7 @@ as_cr_alnum=$as_cr_Letters$as_cr_digits - s/-\n.*// - ' >$as_me.lineno && - chmod +x "$as_me.lineno" || -- { $as_echo "$as_me: error: cannot create $as_me.lineno; rerun with a POSIX shell" >&2; as_fn_exit 1; } -+ { printf "%s\n" "$as_me: error: cannot create $as_me.lineno; rerun with a POSIX shell" >&2; as_fn_exit 1; } - - # If we had to re-execute with $CONFIG_SHELL, we're ensured to have - # already done that, so ensure we don't try to do so again and fall -@@ -500,6 +520,10 @@ as_cr_alnum=$as_cr_Letters$as_cr_digits - exit - } - -+ -+# Determine whether it's possible to make 'echo' print without a newline. -+# These variables are no longer used directly by Autoconf, but are AC_SUBSTed -+# for compatibility with existing Makefiles. - ECHO_C= ECHO_N= ECHO_T= - case `echo -n x` in #((((( - -n*) -@@ -513,6 +537,13 @@ case `echo -n x` in #((((( - ECHO_N='-n';; - esac - -+# For backward compatibility with old third-party macros, we provide -+# the shell variables $as_echo and $as_echo_n. New code should use -+# AS_ECHO(["message"]) and AS_ECHO_N(["message"]), respectively. -+as_echo='printf %s\n' -+as_echo_n='printf %s' -+ -+ - rm -f conf$$ conf$$.exe conf$$.file - if test -d conf$$.dir; then - rm -f conf$$.dir/conf$$.file -@@ -588,41 +619,37 @@ PACKAGE_URL='' - ac_unique_file="coregrind/m_main.c" - # Factoring default headers for most tests. - ac_includes_default="\ --#include --#ifdef HAVE_SYS_TYPES_H --# include --#endif --#ifdef HAVE_SYS_STAT_H --# include -+#include -+#ifdef HAVE_STDIO_H -+# include - #endif --#ifdef STDC_HEADERS -+#ifdef HAVE_STDLIB_H - # include --# include --#else --# ifdef HAVE_STDLIB_H --# include --# endif - #endif - #ifdef HAVE_STRING_H --# if !defined STDC_HEADERS && defined HAVE_MEMORY_H --# include --# endif - # include - #endif --#ifdef HAVE_STRINGS_H --# include --#endif - #ifdef HAVE_INTTYPES_H - # include - #endif - #ifdef HAVE_STDINT_H - # include - #endif -+#ifdef HAVE_STRINGS_H -+# include -+#endif -+#ifdef HAVE_SYS_TYPES_H -+# include -+#endif -+#ifdef HAVE_SYS_STAT_H -+# include -+#endif - #ifdef HAVE_UNISTD_H - # include - #endif" - --ac_header_list= -+ac_header_c_list= -+ac_func_c_list= - ac_subst_vars='am__EXEEXT_FALSE - am__EXEEXT_TRUE - LTLIBOBJS -@@ -897,6 +924,8 @@ VGCONF_PLATFORMS_INCLUDE_AMD64_DARWIN_FALSE - VGCONF_PLATFORMS_INCLUDE_AMD64_DARWIN_TRUE - VGCONF_PLATFORMS_INCLUDE_X86_DARWIN_FALSE - VGCONF_PLATFORMS_INCLUDE_X86_DARWIN_TRUE -+VGCONF_PLATFORMS_INCLUDE_LOONGARCH64_LINUX_FALSE -+VGCONF_PLATFORMS_INCLUDE_LOONGARCH64_LINUX_TRUE - VGCONF_PLATFORMS_INCLUDE_NANOMIPS_LINUX_FALSE - VGCONF_PLATFORMS_INCLUDE_NANOMIPS_LINUX_TRUE - VGCONF_PLATFORMS_INCLUDE_MIPS64_LINUX_FALSE -@@ -919,6 +948,8 @@ VGCONF_PLATFORMS_INCLUDE_AMD64_LINUX_FALSE - VGCONF_PLATFORMS_INCLUDE_AMD64_LINUX_TRUE - VGCONF_PLATFORMS_INCLUDE_X86_LINUX_FALSE - VGCONF_PLATFORMS_INCLUDE_X86_LINUX_TRUE -+VGCONF_ARCHS_INCLUDE_LOONGARCH64_FALSE -+VGCONF_ARCHS_INCLUDE_LOONGARCH64_TRUE - VGCONF_ARCHS_INCLUDE_NANOMIPS_FALSE - VGCONF_ARCHS_INCLUDE_NANOMIPS_TRUE - VGCONF_ARCHS_INCLUDE_MIPS64_FALSE -@@ -1000,6 +1031,9 @@ AM_BACKSLASH - AM_DEFAULT_VERBOSITY - AM_DEFAULT_V - AM_V -+CSCOPE -+ETAGS -+CTAGS - am__untar - am__tar - AMTAR -@@ -1042,6 +1076,7 @@ infodir - docdir - oldincludedir - includedir -+runstatedir - localstatedir - sharedstatedir - sysconfdir -@@ -1133,6 +1168,7 @@ datadir='${datarootdir}' - sysconfdir='${prefix}/etc' - sharedstatedir='${prefix}/com' - localstatedir='${prefix}/var' -+runstatedir='${localstatedir}/run' - includedir='${prefix}/include' - oldincludedir='/usr/include' - docdir='${datarootdir}/doc/${PACKAGE_TARNAME}' -@@ -1162,8 +1198,6 @@ do - *) ac_optarg=yes ;; - esac - -- # Accept the important Cygnus configure options, so we can diagnose typos. -- - case $ac_dashdash$ac_option in - --) - ac_dashdash=yes ;; -@@ -1204,9 +1238,9 @@ do - ac_useropt=`expr "x$ac_option" : 'x-*disable-\(.*\)'` - # Reject names that are not valid shell variable names. - expr "x$ac_useropt" : ".*[^-+._$as_cr_alnum]" >/dev/null && -- as_fn_error $? "invalid feature name: $ac_useropt" -+ as_fn_error $? "invalid feature name: \`$ac_useropt'" - ac_useropt_orig=$ac_useropt -- ac_useropt=`$as_echo "$ac_useropt" | sed 's/[-+.]/_/g'` -+ ac_useropt=`printf "%s\n" "$ac_useropt" | sed 's/[-+.]/_/g'` - case $ac_user_opts in - *" - "enable_$ac_useropt" -@@ -1230,9 +1264,9 @@ do - ac_useropt=`expr "x$ac_option" : 'x-*enable-\([^=]*\)'` - # Reject names that are not valid shell variable names. - expr "x$ac_useropt" : ".*[^-+._$as_cr_alnum]" >/dev/null && -- as_fn_error $? "invalid feature name: $ac_useropt" -+ as_fn_error $? "invalid feature name: \`$ac_useropt'" - ac_useropt_orig=$ac_useropt -- ac_useropt=`$as_echo "$ac_useropt" | sed 's/[-+.]/_/g'` -+ ac_useropt=`printf "%s\n" "$ac_useropt" | sed 's/[-+.]/_/g'` - case $ac_user_opts in - *" - "enable_$ac_useropt" -@@ -1385,6 +1419,15 @@ do - | -silent | --silent | --silen | --sile | --sil) - silent=yes ;; - -+ -runstatedir | --runstatedir | --runstatedi | --runstated \ -+ | --runstate | --runstat | --runsta | --runst | --runs \ -+ | --run | --ru | --r) -+ ac_prev=runstatedir ;; -+ -runstatedir=* | --runstatedir=* | --runstatedi=* | --runstated=* \ -+ | --runstate=* | --runstat=* | --runsta=* | --runst=* | --runs=* \ -+ | --run=* | --ru=* | --r=*) -+ runstatedir=$ac_optarg ;; -+ - -sbindir | --sbindir | --sbindi | --sbind | --sbin | --sbi | --sb) - ac_prev=sbindir ;; - -sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \ -@@ -1434,9 +1477,9 @@ do - ac_useropt=`expr "x$ac_option" : 'x-*with-\([^=]*\)'` - # Reject names that are not valid shell variable names. - expr "x$ac_useropt" : ".*[^-+._$as_cr_alnum]" >/dev/null && -- as_fn_error $? "invalid package name: $ac_useropt" -+ as_fn_error $? "invalid package name: \`$ac_useropt'" - ac_useropt_orig=$ac_useropt -- ac_useropt=`$as_echo "$ac_useropt" | sed 's/[-+.]/_/g'` -+ ac_useropt=`printf "%s\n" "$ac_useropt" | sed 's/[-+.]/_/g'` - case $ac_user_opts in - *" - "with_$ac_useropt" -@@ -1450,9 +1493,9 @@ do - ac_useropt=`expr "x$ac_option" : 'x-*without-\(.*\)'` - # Reject names that are not valid shell variable names. - expr "x$ac_useropt" : ".*[^-+._$as_cr_alnum]" >/dev/null && -- as_fn_error $? "invalid package name: $ac_useropt" -+ as_fn_error $? "invalid package name: \`$ac_useropt'" - ac_useropt_orig=$ac_useropt -- ac_useropt=`$as_echo "$ac_useropt" | sed 's/[-+.]/_/g'` -+ ac_useropt=`printf "%s\n" "$ac_useropt" | sed 's/[-+.]/_/g'` - case $ac_user_opts in - *" - "with_$ac_useropt" -@@ -1496,9 +1539,9 @@ Try \`$0 --help' for more information" - - *) - # FIXME: should be removed in autoconf 3.0. -- $as_echo "$as_me: WARNING: you should use --build, --host, --target" >&2 -+ printf "%s\n" "$as_me: WARNING: you should use --build, --host, --target" >&2 - expr "x$ac_option" : ".*[^-._$as_cr_alnum]" >/dev/null && -- $as_echo "$as_me: WARNING: invalid host type: $ac_option" >&2 -+ printf "%s\n" "$as_me: WARNING: invalid host type: $ac_option" >&2 - : "${build_alias=$ac_option} ${host_alias=$ac_option} ${target_alias=$ac_option}" - ;; - -@@ -1514,7 +1557,7 @@ if test -n "$ac_unrecognized_opts"; then - case $enable_option_checking in - no) ;; - fatal) as_fn_error $? "unrecognized options: $ac_unrecognized_opts" ;; -- *) $as_echo "$as_me: WARNING: unrecognized options: $ac_unrecognized_opts" >&2 ;; -+ *) printf "%s\n" "$as_me: WARNING: unrecognized options: $ac_unrecognized_opts" >&2 ;; - esac - fi - -@@ -1522,7 +1565,7 @@ fi - for ac_var in exec_prefix prefix bindir sbindir libexecdir datarootdir \ - datadir sysconfdir sharedstatedir localstatedir includedir \ - oldincludedir docdir infodir htmldir dvidir pdfdir psdir \ -- libdir localedir mandir -+ libdir localedir mandir runstatedir - do - eval ac_val=\$$ac_var - # Remove trailing slashes. -@@ -1578,7 +1621,7 @@ $as_expr X"$as_myself" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ - X"$as_myself" : 'X\(//\)[^/]' \| \ - X"$as_myself" : 'X\(//\)$' \| \ - X"$as_myself" : 'X\(/\)' \| . 2>/dev/null || --$as_echo X"$as_myself" | -+printf "%s\n" X"$as_myself" | - sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ - s//\1/ - q -@@ -1675,6 +1718,7 @@ Fine tuning of the installation directories: - --sysconfdir=DIR read-only single-machine data [PREFIX/etc] - --sharedstatedir=DIR modifiable architecture-independent data [PREFIX/com] - --localstatedir=DIR modifiable single-machine data [PREFIX/var] -+ --runstatedir=DIR modifiable per-process data [LOCALSTATEDIR/run] - --libdir=DIR object code libraries [EPREFIX/lib] - --includedir=DIR C header files [PREFIX/include] - --oldincludedir=DIR C header files for non-gcc [/usr/include] -@@ -1772,9 +1816,9 @@ if test "$ac_init_help" = "recursive"; then - case "$ac_dir" in - .) ac_dir_suffix= ac_top_builddir_sub=. ac_top_build_prefix= ;; - *) -- ac_dir_suffix=/`$as_echo "$ac_dir" | sed 's|^\.[\\/]||'` -+ ac_dir_suffix=/`printf "%s\n" "$ac_dir" | sed 's|^\.[\\/]||'` - # A ".." for each directory in $ac_dir_suffix. -- ac_top_builddir_sub=`$as_echo "$ac_dir_suffix" | sed 's|/[^\\/]*|/..|g;s|/||'` -+ ac_top_builddir_sub=`printf "%s\n" "$ac_dir_suffix" | sed 's|/[^\\/]*|/..|g;s|/||'` - case $ac_top_builddir_sub in - "") ac_top_builddir_sub=. ac_top_build_prefix= ;; - *) ac_top_build_prefix=$ac_top_builddir_sub/ ;; -@@ -1802,7 +1846,8 @@ esac - ac_abs_srcdir=$ac_abs_top_srcdir$ac_dir_suffix - - cd "$ac_dir" || { ac_status=$?; continue; } -- # Check for guested configure. -+ # Check for configure.gnu first; this name is used for a wrapper for -+ # Metaconfig's "Configure" on case-insensitive file systems. - if test -f "$ac_srcdir/configure.gnu"; then - echo && - $SHELL "$ac_srcdir/configure.gnu" --help=recursive -@@ -1810,7 +1855,7 @@ ac_abs_srcdir=$ac_abs_top_srcdir$ac_dir_suffix - echo && - $SHELL "$ac_srcdir/configure" --help=recursive - else -- $as_echo "$as_me: WARNING: no configuration information is in $ac_dir" >&2 -+ printf "%s\n" "$as_me: WARNING: no configuration information is in $ac_dir" >&2 - fi || ac_status=$? - cd "$ac_pwd" || { ac_status=$?; break; } - done -@@ -1820,9 +1865,9 @@ test -n "$ac_init_help" && exit $ac_status - if $ac_init_version; then - cat <<\_ACEOF - Valgrind configure 3.16.0 --generated by GNU Autoconf 2.69 -+generated by GNU Autoconf 2.71 - --Copyright (C) 2012 Free Software Foundation, Inc. -+Copyright (C) 2021 Free Software Foundation, Inc. - This configure script is free software; the Free Software Foundation - gives unlimited permission to copy, distribute and modify it. - _ACEOF -@@ -1839,14 +1884,14 @@ fi - ac_fn_c_try_compile () - { - as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack -- rm -f conftest.$ac_objext -+ rm -f conftest.$ac_objext conftest.beam - if { { ac_try="$ac_compile" - case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; - esac - eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" --$as_echo "$ac_try_echo"; } >&5 -+printf "%s\n" "$ac_try_echo"; } >&5 - (eval "$ac_compile") 2>conftest.err - ac_status=$? - if test -s conftest.err; then -@@ -1854,14 +1899,15 @@ $as_echo "$ac_try_echo"; } >&5 - cat conftest.er1 >&5 - mv -f conftest.er1 conftest.err - fi -- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 - test $ac_status = 0; } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err -- } && test -s conftest.$ac_objext; then : -+ } && test -s conftest.$ac_objext -+then : - ac_retval=0 --else -- $as_echo "$as_me: failed program was:" >&5 -+else $as_nop -+ printf "%s\n" "$as_me: failed program was:" >&5 - sed 's/^/| /' conftest.$ac_ext >&5 - - ac_retval=1 -@@ -1883,7 +1929,7 @@ case "(($ac_try" in - *) ac_try_echo=$ac_try;; - esac - eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" --$as_echo "$ac_try_echo"; } >&5 -+printf "%s\n" "$ac_try_echo"; } >&5 - (eval "$ac_cpp conftest.$ac_ext") 2>conftest.err - ac_status=$? - if test -s conftest.err; then -@@ -1891,14 +1937,15 @@ $as_echo "$ac_try_echo"; } >&5 - cat conftest.er1 >&5 - mv -f conftest.er1 conftest.err - fi -- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 - test $ac_status = 0; } > conftest.i && { - test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" || - test ! -s conftest.err -- }; then : -+ } -+then : - ac_retval=0 --else -- $as_echo "$as_me: failed program was:" >&5 -+else $as_nop -+ printf "%s\n" "$as_me: failed program was:" >&5 - sed 's/^/| /' conftest.$ac_ext >&5 - - ac_retval=1 -@@ -1914,14 +1961,14 @@ fi - ac_fn_cxx_try_compile () - { - as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack -- rm -f conftest.$ac_objext -+ rm -f conftest.$ac_objext conftest.beam - if { { ac_try="$ac_compile" - case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; - esac - eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" --$as_echo "$ac_try_echo"; } >&5 -+printf "%s\n" "$ac_try_echo"; } >&5 - (eval "$ac_compile") 2>conftest.err - ac_status=$? - if test -s conftest.err; then -@@ -1929,14 +1976,15 @@ $as_echo "$ac_try_echo"; } >&5 - cat conftest.er1 >&5 - mv -f conftest.er1 conftest.err - fi -- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 - test $ac_status = 0; } && { - test -z "$ac_cxx_werror_flag" || - test ! -s conftest.err -- } && test -s conftest.$ac_objext; then : -+ } && test -s conftest.$ac_objext -+then : - ac_retval=0 --else -- $as_echo "$as_me: failed program was:" >&5 -+else $as_nop -+ printf "%s\n" "$as_me: failed program was:" >&5 - sed 's/^/| /' conftest.$ac_ext >&5 - - ac_retval=1 -@@ -1952,14 +2000,14 @@ fi - ac_fn_c_try_link () - { - as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack -- rm -f conftest.$ac_objext conftest$ac_exeext -+ rm -f conftest.$ac_objext conftest.beam conftest$ac_exeext - if { { ac_try="$ac_link" - case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; - esac - eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" --$as_echo "$ac_try_echo"; } >&5 -+printf "%s\n" "$ac_try_echo"; } >&5 - (eval "$ac_link") 2>conftest.err - ac_status=$? - if test -s conftest.err; then -@@ -1967,17 +2015,18 @@ $as_echo "$ac_try_echo"; } >&5 - cat conftest.er1 >&5 - mv -f conftest.er1 conftest.err - fi -- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 - test $ac_status = 0; } && { - test -z "$ac_c_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && { - test "$cross_compiling" = yes || - test -x conftest$ac_exeext -- }; then : -+ } -+then : - ac_retval=0 --else -- $as_echo "$as_me: failed program was:" >&5 -+else $as_nop -+ printf "%s\n" "$as_me: failed program was:" >&5 - sed 's/^/| /' conftest.$ac_ext >&5 - - ac_retval=1 -@@ -1992,139 +2041,6 @@ fi - - } # ac_fn_c_try_link - --# ac_fn_c_check_header_mongrel LINENO HEADER VAR INCLUDES --# ------------------------------------------------------- --# Tests whether HEADER exists, giving a warning if it cannot be compiled using --# the include files in INCLUDES and setting the cache variable VAR --# accordingly. --ac_fn_c_check_header_mongrel () --{ -- as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack -- if eval \${$3+:} false; then : -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $2" >&5 --$as_echo_n "checking for $2... " >&6; } --if eval \${$3+:} false; then : -- $as_echo_n "(cached) " >&6 --fi --eval ac_res=\$$3 -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 --$as_echo "$ac_res" >&6; } --else -- # Is the header compilable? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking $2 usability" >&5 --$as_echo_n "checking $2 usability... " >&6; } --cat confdefs.h - <<_ACEOF >conftest.$ac_ext --/* end confdefs.h. */ --$4 --#include <$2> --_ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -- ac_header_compiler=yes --else -- ac_header_compiler=no --fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_header_compiler" >&5 --$as_echo "$ac_header_compiler" >&6; } -- --# Is the header present? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking $2 presence" >&5 --$as_echo_n "checking $2 presence... " >&6; } --cat confdefs.h - <<_ACEOF >conftest.$ac_ext --/* end confdefs.h. */ --#include <$2> --_ACEOF --if ac_fn_c_try_cpp "$LINENO"; then : -- ac_header_preproc=yes --else -- ac_header_preproc=no --fi --rm -f conftest.err conftest.i conftest.$ac_ext --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_header_preproc" >&5 --$as_echo "$ac_header_preproc" >&6; } -- --# So? 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Assumes --# that executables *can* be run. --ac_fn_c_try_run () --{ -- as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack -- if { { ac_try="$ac_link" --case "(($ac_try" in -- *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; -- *) ac_try_echo=$ac_try;; --esac --eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" --$as_echo "$ac_try_echo"; } >&5 -- (eval "$ac_link") 2>&5 -- ac_status=$? -- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -- test $ac_status = 0; } && { ac_try='./conftest$ac_exeext' -- { { case "(($ac_try" in -- *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; -- *) ac_try_echo=$ac_try;; --esac --eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" --$as_echo "$ac_try_echo"; } >&5 -- (eval "$ac_try") 2>&5 -- ac_status=$? -- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -- test $ac_status = 0; }; }; then : -- ac_retval=0 --else -- $as_echo "$as_me: program exited with status $ac_status" >&5 -- $as_echo "$as_me: failed program was:" >&5 --sed 's/^/| /' conftest.$ac_ext >&5 -- -- ac_retval=$ac_status --fi -- rm -rf conftest.dSYM conftest_ipa8_conftest.oo -- eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno -- as_fn_set_status $ac_retval -- --} # ac_fn_c_try_run -- - # ac_fn_c_check_header_compile LINENO HEADER VAR INCLUDES - # ------------------------------------------------------- - # Tests whether HEADER exists and can be compiled using the include files in -@@ -2132,26 +2048,28 @@ fi - ac_fn_c_check_header_compile () - { - as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $2" >&5 --$as_echo_n "checking for $2... " >&6; } --if eval \${$3+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $2" >&5 -+printf %s "checking for $2... " >&6; } -+if eval test \${$3+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - $4 - #include <$2> - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - eval "$3=yes" --else -+else $as_nop - eval "$3=no" - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - fi - eval ac_res=\$$3 -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 --$as_echo "$ac_res" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 -+printf "%s\n" "$ac_res" >&6; } - eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno - - } # ac_fn_c_check_header_compile -@@ -2163,17 +2081,18 @@ $as_echo "$ac_res" >&6; } - ac_fn_c_check_type () - { - as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $2" >&5 --$as_echo_n "checking for $2... " >&6; } --if eval \${$3+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $2" >&5 -+printf %s "checking for $2... " >&6; } -+if eval test \${$3+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - eval "$3=no" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - $4 - int --main () -+main (void) - { - if (sizeof ($2)) - return 0; -@@ -2181,12 +2100,13 @@ if (sizeof ($2)) - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - $4 - int --main () -+main (void) - { - if (sizeof (($2))) - return 0; -@@ -2194,18 +2114,19 @@ if (sizeof (($2))) - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - --else -+else $as_nop - eval "$3=yes" - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - fi - eval ac_res=\$$3 -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 --$as_echo "$ac_res" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 -+printf "%s\n" "$ac_res" >&6; } - eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno - - } # ac_fn_c_check_type -@@ -2217,16 +2138,17 @@ $as_echo "$ac_res" >&6; } - ac_fn_c_check_member () - { - as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $2.$3" >&5 --$as_echo_n "checking for $2.$3... " >&6; } --if eval \${$4+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $2.$3" >&5 -+printf %s "checking for $2.$3... " >&6; } -+if eval test \${$4+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - $5 - int --main () -+main (void) - { - static $2 ac_aggr; - if (ac_aggr.$3) -@@ -2235,14 +2157,15 @@ return 0; - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - eval "$4=yes" --else -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - $5 - int --main () -+main (void) - { - static $2 ac_aggr; - if (sizeof ac_aggr.$3) -@@ -2251,33 +2174,78 @@ return 0; - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - eval "$4=yes" --else -+else $as_nop - eval "$4=no" - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - fi - eval ac_res=\$$4 -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 --$as_echo "$ac_res" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 -+printf "%s\n" "$ac_res" >&6; } - eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno - - } # ac_fn_c_check_member - -+# ac_fn_c_try_run LINENO -+# ---------------------- -+# Try to run conftest.$ac_ext, and return whether this succeeded. Assumes that -+# executables *can* be run. -+ac_fn_c_try_run () -+{ -+ as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack -+ if { { ac_try="$ac_link" -+case "(($ac_try" in -+ *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; -+ *) ac_try_echo=$ac_try;; -+esac -+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" -+printf "%s\n" "$ac_try_echo"; } >&5 -+ (eval "$ac_link") 2>&5 -+ ac_status=$? -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -+ test $ac_status = 0; } && { ac_try='./conftest$ac_exeext' -+ { { case "(($ac_try" in -+ *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; -+ *) ac_try_echo=$ac_try;; -+esac -+eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" -+printf "%s\n" "$ac_try_echo"; } >&5 -+ (eval "$ac_try") 2>&5 -+ ac_status=$? -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -+ test $ac_status = 0; }; } -+then : -+ ac_retval=0 -+else $as_nop -+ printf "%s\n" "$as_me: program exited with status $ac_status" >&5 -+ printf "%s\n" "$as_me: failed program was:" >&5 -+sed 's/^/| /' conftest.$ac_ext >&5 -+ -+ ac_retval=$ac_status -+fi -+ rm -rf conftest.dSYM conftest_ipa8_conftest.oo -+ eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno -+ as_fn_set_status $ac_retval -+ -+} # ac_fn_c_try_run -+ - # ac_fn_c_check_func LINENO FUNC VAR - # ---------------------------------- - # Tests whether FUNC exists, setting the cache variable VAR accordingly - ac_fn_c_check_func () - { - as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $2" >&5 --$as_echo_n "checking for $2... " >&6; } --if eval \${$3+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $2" >&5 -+printf %s "checking for $2... " >&6; } -+if eval test \${$3+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - /* Define $2 to an innocuous variant, in case declares $2. -@@ -2285,16 +2253,9 @@ else - #define $2 innocuous_$2 - - /* System header to define __stub macros and hopefully few prototypes, -- which can conflict with char $2 (); below. -- Prefer to if __STDC__ is defined, since -- exists even on freestanding compilers. */ -- --#ifdef __STDC__ --# include --#else --# include --#endif -+ which can conflict with char $2 (); below. */ - -+#include - #undef $2 - - /* Override any GCC internal prototype to avoid an error. -@@ -2312,24 +2273,25 @@ choke me - #endif - - int --main () -+main (void) - { - return $2 (); - ; - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - eval "$3=yes" --else -+else $as_nop - eval "$3=no" - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - fi - eval ac_res=\$$3 -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 --$as_echo "$ac_res" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 -+printf "%s\n" "$ac_res" >&6; } - eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno - - } # ac_fn_c_check_func -@@ -2340,14 +2302,14 @@ $as_echo "$ac_res" >&6; } - ac_fn_cxx_try_link () - { - as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack -- rm -f conftest.$ac_objext conftest$ac_exeext -+ rm -f conftest.$ac_objext conftest.beam conftest$ac_exeext - if { { ac_try="$ac_link" - case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; - esac - eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" --$as_echo "$ac_try_echo"; } >&5 -+printf "%s\n" "$ac_try_echo"; } >&5 - (eval "$ac_link") 2>conftest.err - ac_status=$? - if test -s conftest.err; then -@@ -2355,17 +2317,18 @@ $as_echo "$ac_try_echo"; } >&5 - cat conftest.er1 >&5 - mv -f conftest.er1 conftest.err - fi -- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 - test $ac_status = 0; } && { - test -z "$ac_cxx_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && { - test "$cross_compiling" = yes || - test -x conftest$ac_exeext -- }; then : -+ } -+then : - ac_retval=0 --else -- $as_echo "$as_me: failed program was:" >&5 -+else $as_nop -+ printf "%s\n" "$as_me: failed program was:" >&5 - sed 's/^/| /' conftest.$ac_ext >&5 - - ac_retval=1 -@@ -2379,14 +2342,34 @@ fi - as_fn_set_status $ac_retval - - } # ac_fn_cxx_try_link -+ac_configure_args_raw= -+for ac_arg -+do -+ case $ac_arg in -+ *\'*) -+ ac_arg=`printf "%s\n" "$ac_arg" | sed "s/'/'\\\\\\\\''/g"` ;; -+ esac -+ as_fn_append ac_configure_args_raw " '$ac_arg'" -+done -+ -+case $ac_configure_args_raw in -+ *$as_nl*) -+ ac_safe_unquote= ;; -+ *) -+ ac_unsafe_z='|&;<>()$`\\"*?[ '' ' # This string ends in space, tab. -+ ac_unsafe_a="$ac_unsafe_z#~" -+ ac_safe_unquote="s/ '\\([^$ac_unsafe_a][^$ac_unsafe_z]*\\)'/ \\1/g" -+ ac_configure_args_raw=` printf "%s\n" "$ac_configure_args_raw" | sed "$ac_safe_unquote"`;; -+esac -+ - cat >config.log <<_ACEOF - This file contains any messages produced by compilers while - running configure, to aid debugging if configure makes a mistake. - - It was created by Valgrind $as_me 3.16.0, which was --generated by GNU Autoconf 2.69. Invocation command line was -+generated by GNU Autoconf 2.71. Invocation command line was - -- $ $0 $@ -+ $ $0$ac_configure_args_raw - - _ACEOF - exec 5>>config.log -@@ -2419,8 +2402,12 @@ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -- $as_echo "PATH: $as_dir" -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac -+ printf "%s\n" "PATH: $as_dir" - done - IFS=$as_save_IFS - -@@ -2455,7 +2442,7 @@ do - | -silent | --silent | --silen | --sile | --sil) - continue ;; - *\'*) -- ac_arg=`$as_echo "$ac_arg" | sed "s/'/'\\\\\\\\''/g"` ;; -+ ac_arg=`printf "%s\n" "$ac_arg" | sed "s/'/'\\\\\\\\''/g"` ;; - esac - case $ac_pass in - 1) as_fn_append ac_configure_args0 " '$ac_arg'" ;; -@@ -2490,11 +2477,13 @@ done - # WARNING: Use '\'' to represent an apostrophe within the trap. - # WARNING: Do not start the trap code with a newline, due to a FreeBSD 4.0 bug. - trap 'exit_status=$? -+ # Sanitize IFS. -+ IFS=" "" $as_nl" - # Save into config.log some information that might help in debugging. - { - echo - -- $as_echo "## ---------------- ## -+ printf "%s\n" "## ---------------- ## - ## Cache variables. ## - ## ---------------- ##" - echo -@@ -2505,8 +2494,8 @@ trap 'exit_status=$? - case $ac_val in #( - *${as_nl}*) - case $ac_var in #( -- *_cv_*) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: cache variable $ac_var contains a newline" >&5 --$as_echo "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;; -+ *_cv_*) { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: cache variable $ac_var contains a newline" >&5 -+printf "%s\n" "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;; - esac - case $ac_var in #( - _ | IFS | as_nl) ;; #( -@@ -2530,7 +2519,7 @@ $as_echo "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;; - ) - echo - -- $as_echo "## ----------------- ## -+ printf "%s\n" "## ----------------- ## - ## Output variables. ## - ## ----------------- ##" - echo -@@ -2538,14 +2527,14 @@ $as_echo "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;; - do - eval ac_val=\$$ac_var - case $ac_val in -- *\'\''*) ac_val=`$as_echo "$ac_val" | sed "s/'\''/'\''\\\\\\\\'\'''\''/g"`;; -+ *\'\''*) ac_val=`printf "%s\n" "$ac_val" | sed "s/'\''/'\''\\\\\\\\'\'''\''/g"`;; - esac -- $as_echo "$ac_var='\''$ac_val'\''" -+ printf "%s\n" "$ac_var='\''$ac_val'\''" - done | sort - echo - - if test -n "$ac_subst_files"; then -- $as_echo "## ------------------- ## -+ printf "%s\n" "## ------------------- ## - ## File substitutions. ## - ## ------------------- ##" - echo -@@ -2553,15 +2542,15 @@ $as_echo "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;; - do - eval ac_val=\$$ac_var - case $ac_val in -- *\'\''*) ac_val=`$as_echo "$ac_val" | sed "s/'\''/'\''\\\\\\\\'\'''\''/g"`;; -+ *\'\''*) ac_val=`printf "%s\n" "$ac_val" | sed "s/'\''/'\''\\\\\\\\'\'''\''/g"`;; - esac -- $as_echo "$ac_var='\''$ac_val'\''" -+ printf "%s\n" "$ac_var='\''$ac_val'\''" - done | sort - echo - fi - - if test -s confdefs.h; then -- $as_echo "## ----------- ## -+ printf "%s\n" "## ----------- ## - ## confdefs.h. ## - ## ----------- ##" - echo -@@ -2569,8 +2558,8 @@ $as_echo "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;; - echo - fi - test "$ac_signal" != 0 && -- $as_echo "$as_me: caught signal $ac_signal" -- $as_echo "$as_me: exit $exit_status" -+ printf "%s\n" "$as_me: caught signal $ac_signal" -+ printf "%s\n" "$as_me: exit $exit_status" - } >&5 - rm -f core *.core core.conftest.* && - rm -f -r conftest* confdefs* conf$$* $ac_clean_files && -@@ -2584,63 +2573,48 @@ ac_signal=0 - # confdefs.h avoids OS command line length limits that DEFS can exceed. - rm -f -r conftest* confdefs.h - --$as_echo "/* confdefs.h */" > confdefs.h -+printf "%s\n" "/* confdefs.h */" > confdefs.h - - # Predefined preprocessor variables. - --cat >>confdefs.h <<_ACEOF --#define PACKAGE_NAME "$PACKAGE_NAME" --_ACEOF -+printf "%s\n" "#define PACKAGE_NAME \"$PACKAGE_NAME\"" >>confdefs.h - --cat >>confdefs.h <<_ACEOF --#define PACKAGE_TARNAME "$PACKAGE_TARNAME" --_ACEOF -+printf "%s\n" "#define PACKAGE_TARNAME \"$PACKAGE_TARNAME\"" >>confdefs.h - --cat >>confdefs.h <<_ACEOF --#define PACKAGE_VERSION "$PACKAGE_VERSION" --_ACEOF -+printf "%s\n" "#define PACKAGE_VERSION \"$PACKAGE_VERSION\"" >>confdefs.h - --cat >>confdefs.h <<_ACEOF --#define PACKAGE_STRING "$PACKAGE_STRING" --_ACEOF -+printf "%s\n" "#define PACKAGE_STRING \"$PACKAGE_STRING\"" >>confdefs.h - --cat >>confdefs.h <<_ACEOF --#define PACKAGE_BUGREPORT "$PACKAGE_BUGREPORT" --_ACEOF -+printf "%s\n" "#define PACKAGE_BUGREPORT \"$PACKAGE_BUGREPORT\"" >>confdefs.h - --cat >>confdefs.h <<_ACEOF --#define PACKAGE_URL "$PACKAGE_URL" --_ACEOF -+printf "%s\n" "#define PACKAGE_URL \"$PACKAGE_URL\"" >>confdefs.h - - - # Let the site file select an alternate cache file if it wants to. - # Prefer an explicitly selected file to automatically selected ones. --ac_site_file1=NONE --ac_site_file2=NONE - if test -n "$CONFIG_SITE"; then -- # We do not want a PATH search for config.site. -- case $CONFIG_SITE in #(( -- -*) ac_site_file1=./$CONFIG_SITE;; -- */*) ac_site_file1=$CONFIG_SITE;; -- *) ac_site_file1=./$CONFIG_SITE;; -- esac -+ ac_site_files="$CONFIG_SITE" - elif test "x$prefix" != xNONE; then -- ac_site_file1=$prefix/share/config.site -- ac_site_file2=$prefix/etc/config.site -+ ac_site_files="$prefix/share/config.site $prefix/etc/config.site" - else -- ac_site_file1=$ac_default_prefix/share/config.site -- ac_site_file2=$ac_default_prefix/etc/config.site -+ ac_site_files="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site" - fi --for ac_site_file in "$ac_site_file1" "$ac_site_file2" -+ -+for ac_site_file in $ac_site_files - do -- test "x$ac_site_file" = xNONE && continue -- if test /dev/null != "$ac_site_file" && test -r "$ac_site_file"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: loading site script $ac_site_file" >&5 --$as_echo "$as_me: loading site script $ac_site_file" >&6;} -+ case $ac_site_file in #( -+ */*) : -+ ;; #( -+ *) : -+ ac_site_file=./$ac_site_file ;; -+esac -+ if test -f "$ac_site_file" && test -r "$ac_site_file"; then -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: loading site script $ac_site_file" >&5 -+printf "%s\n" "$as_me: loading site script $ac_site_file" >&6;} - sed 's/^/| /' "$ac_site_file" >&5 - . "$ac_site_file" \ -- || { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 --$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -+ || { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} - as_fn_error $? "failed to load site script $ac_site_file - See \`config.log' for more details" "$LINENO" 5; } - fi -@@ -2650,86 +2624,718 @@ if test -r "$cache_file"; then - # Some versions of bash will fail to source /dev/null (special files - # actually), so we avoid doing that. DJGPP emulates it as a regular file. - if test /dev/null != "$cache_file" && test -f "$cache_file"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: loading cache $cache_file" >&5 --$as_echo "$as_me: loading cache $cache_file" >&6;} -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: loading cache $cache_file" >&5 -+printf "%s\n" "$as_me: loading cache $cache_file" >&6;} - case $cache_file in - [\\/]* | ?:[\\/]* ) . "$cache_file";; - *) . "./$cache_file";; - esac - fi - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: creating cache $cache_file" >&5 --$as_echo "$as_me: creating cache $cache_file" >&6;} -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: creating cache $cache_file" >&5 -+printf "%s\n" "$as_me: creating cache $cache_file" >&6;} - >$cache_file - fi - --as_fn_append ac_header_list " stdlib.h" --as_fn_append ac_header_list " unistd.h" --as_fn_append ac_header_list " sys/param.h" --# Check that the precious variables saved in the cache have kept the same --# value. --ac_cache_corrupted=false --for ac_var in $ac_precious_vars; do -- eval ac_old_set=\$ac_cv_env_${ac_var}_set -- eval ac_new_set=\$ac_env_${ac_var}_set -- eval ac_old_val=\$ac_cv_env_${ac_var}_value -- eval ac_new_val=\$ac_env_${ac_var}_value -- case $ac_old_set,$ac_new_set in -- set,) -- { $as_echo "$as_me:${as_lineno-$LINENO}: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&5 --$as_echo "$as_me: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&2;} -- ac_cache_corrupted=: ;; -- ,set) -- { $as_echo "$as_me:${as_lineno-$LINENO}: error: \`$ac_var' was not set in the previous run" >&5 --$as_echo "$as_me: error: \`$ac_var' was not set in the previous run" >&2;} -- ac_cache_corrupted=: ;; -- ,);; -- *) -- if test "x$ac_old_val" != "x$ac_new_val"; then -- # differences in whitespace do not lead to failure. -- ac_old_val_w=`echo x $ac_old_val` -- ac_new_val_w=`echo x $ac_new_val` -- if test "$ac_old_val_w" != "$ac_new_val_w"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: error: \`$ac_var' has changed since the previous run:" >&5 --$as_echo "$as_me: error: \`$ac_var' has changed since the previous run:" >&2;} -- ac_cache_corrupted=: -- else -- { $as_echo "$as_me:${as_lineno-$LINENO}: warning: ignoring whitespace changes in \`$ac_var' since the previous run:" >&5 --$as_echo "$as_me: warning: ignoring whitespace changes in \`$ac_var' since the previous run:" >&2;} -- eval $ac_var=\$ac_old_val -- fi -- { $as_echo "$as_me:${as_lineno-$LINENO}: former value: \`$ac_old_val'" >&5 --$as_echo "$as_me: former value: \`$ac_old_val'" >&2;} -- { $as_echo "$as_me:${as_lineno-$LINENO}: current value: \`$ac_new_val'" >&5 --$as_echo "$as_me: current value: \`$ac_new_val'" >&2;} -- fi;; -- esac -- # Pass precious variables to config.status. -- if test "$ac_new_set" = set; then -- case $ac_new_val in -- *\'*) ac_arg=$ac_var=`$as_echo "$ac_new_val" | sed "s/'/'\\\\\\\\''/g"` ;; -- *) ac_arg=$ac_var=$ac_new_val ;; -- esac -- case " $ac_configure_args " in -- *" '$ac_arg' "*) ;; # Avoid dups. Use of quotes ensures accuracy. -- *) as_fn_append ac_configure_args " '$ac_arg'" ;; -- esac -- fi --done --if $ac_cache_corrupted; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 --$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -- { $as_echo "$as_me:${as_lineno-$LINENO}: error: changes in the environment can compromise the build" >&5 --$as_echo "$as_me: error: changes in the environment can compromise the build" >&2;} -- as_fn_error $? "run \`make distclean' and/or \`rm $cache_file' and start over" "$LINENO" 5 --fi --## -------------------- ## --## Main body of script. ## --## -------------------- ## -+# Test code for whether the C compiler supports C89 (global declarations) -+ac_c_conftest_c89_globals=' -+/* Does the compiler advertise C89 conformance? -+ Do not test the value of __STDC__, because some compilers set it to 0 -+ while being otherwise adequately conformant. */ -+#if !defined __STDC__ -+# error "Compiler does not advertise C89 conformance" -+#endif - --ac_ext=c --ac_cpp='$CPP $CPPFLAGS' --ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' -+#include -+#include -+struct stat; -+/* Most of the following tests are stolen from RCS 5.7 src/conf.sh. */ -+struct buf { int x; }; -+struct buf * (*rcsopen) (struct buf *, struct stat *, int); -+static char *e (p, i) -+ char **p; -+ int i; -+{ -+ return p[i]; -+} -+static char *f (char * (*g) (char **, int), char **p, ...) -+{ -+ char *s; -+ va_list v; -+ va_start (v,p); -+ s = g (p, va_arg (v,int)); -+ va_end (v); -+ return s; -+} -+ -+/* OSF 4.0 Compaq cc is some sort of almost-ANSI by default. It has -+ function prototypes and stuff, but not \xHH hex character constants. -+ These do not provoke an error unfortunately, instead are silently treated -+ as an "x". The following induces an error, until -std is added to get -+ proper ANSI mode. Curiously \x00 != x always comes out true, for an -+ array size at least. It is necessary to write \x00 == 0 to get something -+ that is true only with -std. */ -+int osf4_cc_array ['\''\x00'\'' == 0 ? 1 : -1]; -+ -+/* IBM C 6 for AIX is almost-ANSI by default, but it replaces macro parameters -+ inside strings and character constants. */ -+#define FOO(x) '\''x'\'' -+int xlc6_cc_array[FOO(a) == '\''x'\'' ? 1 : -1]; -+ -+int test (int i, double x); -+struct s1 {int (*f) (int a);}; -+struct s2 {int (*f) (double a);}; -+int pairnames (int, char **, int *(*)(struct buf *, struct stat *, int), -+ int, int);' -+ -+# Test code for whether the C compiler supports C89 (body of main). -+ac_c_conftest_c89_main=' -+ok |= (argc == 0 || f (e, argv, 0) != argv[0] || f (e, argv, 1) != argv[1]); -+' -+ -+# Test code for whether the C compiler supports C99 (global declarations) -+ac_c_conftest_c99_globals=' -+// Does the compiler advertise C99 conformance? -+#if !defined __STDC_VERSION__ || __STDC_VERSION__ < 199901L -+# error "Compiler does not advertise C99 conformance" -+#endif -+ -+#include -+extern int puts (const char *); -+extern int printf (const char *, ...); -+extern int dprintf (int, const char *, ...); -+extern void *malloc (size_t); -+ -+// Check varargs macros. These examples are taken from C99 6.10.3.5. -+// dprintf is used instead of fprintf to avoid needing to declare -+// FILE and stderr. -+#define debug(...) dprintf (2, __VA_ARGS__) -+#define showlist(...) puts (#__VA_ARGS__) -+#define report(test,...) ((test) ? puts (#test) : printf (__VA_ARGS__)) -+static void -+test_varargs_macros (void) -+{ -+ int x = 1234; -+ int y = 5678; -+ debug ("Flag"); -+ debug ("X = %d\n", x); -+ showlist (The first, second, and third items.); -+ report (x>y, "x is %d but y is %d", x, y); -+} -+ -+// Check long long types. -+#define BIG64 18446744073709551615ull -+#define BIG32 4294967295ul -+#define BIG_OK (BIG64 / BIG32 == 4294967297ull && BIG64 % BIG32 == 0) -+#if !BIG_OK -+ #error "your preprocessor is broken" -+#endif -+#if BIG_OK -+#else -+ #error "your preprocessor is broken" -+#endif -+static long long int bignum = -9223372036854775807LL; -+static unsigned long long int ubignum = BIG64; -+ -+struct incomplete_array -+{ -+ int datasize; -+ double data[]; -+}; -+ -+struct named_init { -+ int number; -+ const wchar_t *name; -+ double average; -+}; -+ -+typedef const char *ccp; -+ -+static inline int -+test_restrict (ccp restrict text) -+{ -+ // See if C++-style comments work. -+ // Iterate through items via the restricted pointer. -+ // Also check for declarations in for loops. -+ for (unsigned int i = 0; *(text+i) != '\''\0'\''; ++i) -+ continue; -+ return 0; -+} -+ -+// Check varargs and va_copy. -+static bool -+test_varargs (const char *format, ...) -+{ -+ va_list args; -+ va_start (args, format); -+ va_list args_copy; -+ va_copy (args_copy, args); -+ -+ const char *str = ""; -+ int number = 0; -+ float fnumber = 0; -+ -+ while (*format) -+ { -+ switch (*format++) -+ { -+ case '\''s'\'': // string -+ str = va_arg (args_copy, const char *); -+ break; -+ case '\''d'\'': // int -+ number = va_arg (args_copy, int); -+ break; -+ case '\''f'\'': // float -+ fnumber = va_arg (args_copy, double); -+ break; -+ default: -+ break; -+ } -+ } -+ va_end (args_copy); -+ va_end (args); -+ -+ return *str && number && fnumber; -+} -+' -+ -+# Test code for whether the C compiler supports C99 (body of main). -+ac_c_conftest_c99_main=' -+ // Check bool. -+ _Bool success = false; -+ success |= (argc != 0); -+ -+ // Check restrict. -+ if (test_restrict ("String literal") == 0) -+ success = true; -+ char *restrict newvar = "Another string"; -+ -+ // Check varargs. -+ success &= test_varargs ("s, d'\'' f .", "string", 65, 34.234); -+ test_varargs_macros (); -+ -+ // Check flexible array members. -+ struct incomplete_array *ia = -+ malloc (sizeof (struct incomplete_array) + (sizeof (double) * 10)); -+ ia->datasize = 10; -+ for (int i = 0; i < ia->datasize; ++i) -+ ia->data[i] = i * 1.234; -+ -+ // Check named initializers. -+ struct named_init ni = { -+ .number = 34, -+ .name = L"Test wide string", -+ .average = 543.34343, -+ }; -+ -+ ni.number = 58; -+ -+ int dynamic_array[ni.number]; -+ dynamic_array[0] = argv[0][0]; -+ dynamic_array[ni.number - 1] = 543; -+ -+ // work around unused variable warnings -+ ok |= (!success || bignum == 0LL || ubignum == 0uLL || newvar[0] == '\''x'\'' -+ || dynamic_array[ni.number - 1] != 543); -+' -+ -+# Test code for whether the C compiler supports C11 (global declarations) -+ac_c_conftest_c11_globals=' -+// Does the compiler advertise C11 conformance? -+#if !defined __STDC_VERSION__ || __STDC_VERSION__ < 201112L -+# error "Compiler does not advertise C11 conformance" -+#endif -+ -+// Check _Alignas. -+char _Alignas (double) aligned_as_double; -+char _Alignas (0) no_special_alignment; -+extern char aligned_as_int; -+char _Alignas (0) _Alignas (int) aligned_as_int; -+ -+// Check _Alignof. -+enum -+{ -+ int_alignment = _Alignof (int), -+ int_array_alignment = _Alignof (int[100]), -+ char_alignment = _Alignof (char) -+}; -+_Static_assert (0 < -_Alignof (int), "_Alignof is signed"); -+ -+// Check _Noreturn. -+int _Noreturn does_not_return (void) { for (;;) continue; } -+ -+// Check _Static_assert. -+struct test_static_assert -+{ -+ int x; -+ _Static_assert (sizeof (int) <= sizeof (long int), -+ "_Static_assert does not work in struct"); -+ long int y; -+}; -+ -+// Check UTF-8 literals. -+#define u8 syntax error! -+char const utf8_literal[] = u8"happens to be ASCII" "another string"; -+ -+// Check duplicate typedefs. -+typedef long *long_ptr; -+typedef long int *long_ptr; -+typedef long_ptr long_ptr; -+ -+// Anonymous structures and unions -- taken from C11 6.7.2.1 Example 1. -+struct anonymous -+{ -+ union { -+ struct { int i; int j; }; -+ struct { int k; long int l; } w; -+ }; -+ int m; -+} v1; -+' -+ -+# Test code for whether the C compiler supports C11 (body of main). -+ac_c_conftest_c11_main=' -+ _Static_assert ((offsetof (struct anonymous, i) -+ == offsetof (struct anonymous, w.k)), -+ "Anonymous union alignment botch"); -+ v1.i = 2; -+ v1.w.k = 5; -+ ok |= v1.i != 5; -+' -+ -+# Test code for whether the C compiler supports C11 (complete). -+ac_c_conftest_c11_program="${ac_c_conftest_c89_globals} -+${ac_c_conftest_c99_globals} -+${ac_c_conftest_c11_globals} -+ -+int -+main (int argc, char **argv) -+{ -+ int ok = 0; -+ ${ac_c_conftest_c89_main} -+ ${ac_c_conftest_c99_main} -+ ${ac_c_conftest_c11_main} -+ return ok; -+} -+" -+ -+# Test code for whether the C compiler supports C99 (complete). -+ac_c_conftest_c99_program="${ac_c_conftest_c89_globals} -+${ac_c_conftest_c99_globals} -+ -+int -+main (int argc, char **argv) -+{ -+ int ok = 0; -+ ${ac_c_conftest_c89_main} -+ ${ac_c_conftest_c99_main} -+ return ok; -+} -+" -+ -+# Test code for whether the C compiler supports C89 (complete). -+ac_c_conftest_c89_program="${ac_c_conftest_c89_globals} -+ -+int -+main (int argc, char **argv) -+{ -+ int ok = 0; -+ ${ac_c_conftest_c89_main} -+ return ok; -+} -+" -+ -+# Test code for whether the C++ compiler supports C++98 (global declarations) -+ac_cxx_conftest_cxx98_globals=' -+// Does the compiler advertise C++98 conformance? -+#if !defined __cplusplus || __cplusplus < 199711L -+# error "Compiler does not advertise C++98 conformance" -+#endif -+ -+// These inclusions are to reject old compilers that -+// lack the unsuffixed header files. -+#include -+#include -+ -+// and are *not* freestanding headers in C++98. -+extern void assert (int); -+namespace std { -+ extern int strcmp (const char *, const char *); -+} -+ -+// Namespaces, exceptions, and templates were all added after "C++ 2.0". -+using std::exception; -+using std::strcmp; -+ -+namespace { -+ -+void test_exception_syntax() -+{ -+ try { -+ throw "test"; -+ } catch (const char *s) { -+ // Extra parentheses suppress a warning when building autoconf itself, -+ // due to lint rules shared with more typical C programs. -+ assert (!(strcmp) (s, "test")); -+ } -+} -+ -+template struct test_template -+{ -+ T const val; -+ explicit test_template(T t) : val(t) {} -+ template T add(U u) { return static_cast(u) + val; } -+}; -+ -+} // anonymous namespace -+' -+ -+# Test code for whether the C++ compiler supports C++98 (body of main) -+ac_cxx_conftest_cxx98_main=' -+ assert (argc); -+ assert (! argv[0]); -+{ -+ test_exception_syntax (); -+ test_template tt (2.0); -+ assert (tt.add (4) == 6.0); -+ assert (true && !false); -+} -+' -+ -+# Test code for whether the C++ compiler supports C++11 (global declarations) -+ac_cxx_conftest_cxx11_globals=' -+// Does the compiler advertise C++ 2011 conformance? -+#if !defined __cplusplus || __cplusplus < 201103L -+# error "Compiler does not advertise C++11 conformance" -+#endif -+ -+namespace cxx11test -+{ -+ constexpr int get_val() { return 20; } -+ -+ struct testinit -+ { -+ int i; -+ double d; -+ }; -+ -+ class delegate -+ { -+ public: -+ delegate(int n) : n(n) {} -+ delegate(): delegate(2354) {} -+ -+ virtual int getval() { return this->n; }; -+ protected: -+ int n; -+ }; -+ -+ class overridden : public delegate -+ { -+ public: -+ overridden(int n): delegate(n) {} -+ virtual int getval() override final { return this->n * 2; } -+ }; -+ -+ class nocopy -+ { -+ public: -+ nocopy(int i): i(i) {} -+ nocopy() = default; -+ nocopy(const nocopy&) = delete; -+ nocopy & operator=(const nocopy&) = delete; -+ private: -+ int i; -+ }; -+ -+ // for testing lambda expressions -+ template Ret eval(Fn f, Ret v) -+ { -+ return f(v); -+ } -+ -+ // for testing variadic templates and trailing return types -+ template auto sum(V first) -> V -+ { -+ return first; -+ } -+ template auto sum(V first, Args... rest) -> V -+ { -+ return first + sum(rest...); -+ } -+} -+' -+ -+# Test code for whether the C++ compiler supports C++11 (body of main) -+ac_cxx_conftest_cxx11_main=' -+{ -+ // Test auto and decltype -+ auto a1 = 6538; -+ auto a2 = 48573953.4; -+ auto a3 = "String literal"; -+ -+ int total = 0; -+ for (auto i = a3; *i; ++i) { total += *i; } -+ -+ decltype(a2) a4 = 34895.034; -+} -+{ -+ // Test constexpr -+ short sa[cxx11test::get_val()] = { 0 }; -+} -+{ -+ // Test initializer lists -+ cxx11test::testinit il = { 4323, 435234.23544 }; -+} -+{ -+ // Test range-based for -+ int array[] = {9, 7, 13, 15, 4, 18, 12, 10, 5, 3, -+ 14, 19, 17, 8, 6, 20, 16, 2, 11, 1}; -+ for (auto &x : array) { x += 23; } -+} -+{ -+ // Test lambda expressions -+ using cxx11test::eval; -+ assert (eval ([](int x) { return x*2; }, 21) == 42); -+ double d = 2.0; -+ assert (eval ([&](double x) { return d += x; }, 3.0) == 5.0); -+ assert (d == 5.0); -+ assert (eval ([=](double x) mutable { return d += x; }, 4.0) == 9.0); -+ assert (d == 5.0); -+} -+{ -+ // Test use of variadic templates -+ using cxx11test::sum; -+ auto a = sum(1); -+ auto b = sum(1, 2); -+ auto c = sum(1.0, 2.0, 3.0); -+} -+{ -+ // Test constructor delegation -+ cxx11test::delegate d1; -+ cxx11test::delegate d2(); -+ cxx11test::delegate d3(45); -+} -+{ -+ // Test override and final -+ cxx11test::overridden o1(55464); -+} -+{ -+ // Test nullptr -+ char *c = nullptr; -+} -+{ -+ // Test template brackets -+ test_template<::test_template> v(test_template(12)); -+} -+{ -+ // Unicode literals -+ char const *utf8 = u8"UTF-8 string \u2500"; -+ char16_t const *utf16 = u"UTF-8 string \u2500"; -+ char32_t const *utf32 = U"UTF-32 string \u2500"; -+} -+' -+ -+# Test code for whether the C compiler supports C++11 (complete). -+ac_cxx_conftest_cxx11_program="${ac_cxx_conftest_cxx98_globals} -+${ac_cxx_conftest_cxx11_globals} -+ -+int -+main (int argc, char **argv) -+{ -+ int ok = 0; -+ ${ac_cxx_conftest_cxx98_main} -+ ${ac_cxx_conftest_cxx11_main} -+ return ok; -+} -+" -+ -+# Test code for whether the C compiler supports C++98 (complete). -+ac_cxx_conftest_cxx98_program="${ac_cxx_conftest_cxx98_globals} -+int -+main (int argc, char **argv) -+{ -+ int ok = 0; -+ ${ac_cxx_conftest_cxx98_main} -+ return ok; -+} -+" -+ -+as_fn_append ac_header_c_list " stdio.h stdio_h HAVE_STDIO_H" -+as_fn_append ac_header_c_list " stdlib.h stdlib_h HAVE_STDLIB_H" -+as_fn_append ac_header_c_list " string.h string_h HAVE_STRING_H" -+as_fn_append ac_header_c_list " inttypes.h inttypes_h HAVE_INTTYPES_H" -+as_fn_append ac_header_c_list " stdint.h stdint_h HAVE_STDINT_H" -+as_fn_append ac_header_c_list " strings.h strings_h HAVE_STRINGS_H" -+as_fn_append ac_header_c_list " sys/stat.h sys_stat_h HAVE_SYS_STAT_H" -+as_fn_append ac_header_c_list " sys/types.h sys_types_h HAVE_SYS_TYPES_H" -+as_fn_append ac_header_c_list " unistd.h unistd_h HAVE_UNISTD_H" -+as_fn_append ac_header_c_list " sys/time.h sys_time_h HAVE_SYS_TIME_H" -+as_fn_append ac_header_c_list " sys/param.h sys_param_h HAVE_SYS_PARAM_H" -+as_fn_append ac_func_c_list " getpagesize HAVE_GETPAGESIZE" -+ -+# Auxiliary files required by this configure script. -+ac_aux_files="config.guess config.sub compile missing install-sh" -+ -+# Locations in which to look for auxiliary files. -+ac_aux_dir_candidates="${srcdir}${PATH_SEPARATOR}${srcdir}/..${PATH_SEPARATOR}${srcdir}/../.." -+ -+# Search for a directory containing all of the required auxiliary files, -+# $ac_aux_files, from the $PATH-style list $ac_aux_dir_candidates. -+# If we don't find one directory that contains all the files we need, -+# we report the set of missing files from the *first* directory in -+# $ac_aux_dir_candidates and give up. -+ac_missing_aux_files="" -+ac_first_candidate=: -+printf "%s\n" "$as_me:${as_lineno-$LINENO}: looking for aux files: $ac_aux_files" >&5 -+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR -+as_found=false -+for as_dir in $ac_aux_dir_candidates -+do -+ IFS=$as_save_IFS -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac -+ as_found=: -+ -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: trying $as_dir" >&5 -+ ac_aux_dir_found=yes -+ ac_install_sh= -+ for ac_aux in $ac_aux_files -+ do -+ # As a special case, if "install-sh" is required, that requirement -+ # can be satisfied by any of "install-sh", "install.sh", or "shtool", -+ # and $ac_install_sh is set appropriately for whichever one is found. -+ if test x"$ac_aux" = x"install-sh" -+ then -+ if test -f "${as_dir}install-sh"; then -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: ${as_dir}install-sh found" >&5 -+ ac_install_sh="${as_dir}install-sh -c" -+ elif test -f "${as_dir}install.sh"; then -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: ${as_dir}install.sh found" >&5 -+ ac_install_sh="${as_dir}install.sh -c" -+ elif test -f "${as_dir}shtool"; then -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: ${as_dir}shtool found" >&5 -+ ac_install_sh="${as_dir}shtool install -c" -+ else -+ ac_aux_dir_found=no -+ if $ac_first_candidate; then -+ ac_missing_aux_files="${ac_missing_aux_files} install-sh" -+ else -+ break -+ fi -+ fi -+ else -+ if test -f "${as_dir}${ac_aux}"; then -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: ${as_dir}${ac_aux} found" >&5 -+ else -+ ac_aux_dir_found=no -+ if $ac_first_candidate; then -+ ac_missing_aux_files="${ac_missing_aux_files} ${ac_aux}" -+ else -+ break -+ fi -+ fi -+ fi -+ done -+ if test "$ac_aux_dir_found" = yes; then -+ ac_aux_dir="$as_dir" -+ break -+ fi -+ ac_first_candidate=false -+ -+ as_found=false -+done -+IFS=$as_save_IFS -+if $as_found -+then : -+ -+else $as_nop -+ as_fn_error $? "cannot find required auxiliary files:$ac_missing_aux_files" "$LINENO" 5 -+fi -+ -+ -+# These three variables are undocumented and unsupported, -+# and are intended to be withdrawn in a future Autoconf release. -+# They can cause serious problems if a builder's source tree is in a directory -+# whose full name contains unusual characters. -+if test -f "${ac_aux_dir}config.guess"; then -+ ac_config_guess="$SHELL ${ac_aux_dir}config.guess" -+fi -+if test -f "${ac_aux_dir}config.sub"; then -+ ac_config_sub="$SHELL ${ac_aux_dir}config.sub" -+fi -+if test -f "$ac_aux_dir/configure"; then -+ ac_configure="$SHELL ${ac_aux_dir}configure" -+fi -+ -+# Check that the precious variables saved in the cache have kept the same -+# value. -+ac_cache_corrupted=false -+for ac_var in $ac_precious_vars; do -+ eval ac_old_set=\$ac_cv_env_${ac_var}_set -+ eval ac_new_set=\$ac_env_${ac_var}_set -+ eval ac_old_val=\$ac_cv_env_${ac_var}_value -+ eval ac_new_val=\$ac_env_${ac_var}_value -+ case $ac_old_set,$ac_new_set in -+ set,) -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&5 -+printf "%s\n" "$as_me: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&2;} -+ ac_cache_corrupted=: ;; -+ ,set) -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: \`$ac_var' was not set in the previous run" >&5 -+printf "%s\n" "$as_me: error: \`$ac_var' was not set in the previous run" >&2;} -+ ac_cache_corrupted=: ;; -+ ,);; -+ *) -+ if test "x$ac_old_val" != "x$ac_new_val"; then -+ # differences in whitespace do not lead to failure. -+ ac_old_val_w=`echo x $ac_old_val` -+ ac_new_val_w=`echo x $ac_new_val` -+ if test "$ac_old_val_w" != "$ac_new_val_w"; then -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: \`$ac_var' has changed since the previous run:" >&5 -+printf "%s\n" "$as_me: error: \`$ac_var' has changed since the previous run:" >&2;} -+ ac_cache_corrupted=: -+ else -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: warning: ignoring whitespace changes in \`$ac_var' since the previous run:" >&5 -+printf "%s\n" "$as_me: warning: ignoring whitespace changes in \`$ac_var' since the previous run:" >&2;} -+ eval $ac_var=\$ac_old_val -+ fi -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: former value: \`$ac_old_val'" >&5 -+printf "%s\n" "$as_me: former value: \`$ac_old_val'" >&2;} -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: current value: \`$ac_new_val'" >&5 -+printf "%s\n" "$as_me: current value: \`$ac_new_val'" >&2;} -+ fi;; -+ esac -+ # Pass precious variables to config.status. -+ if test "$ac_new_set" = set; then -+ case $ac_new_val in -+ *\'*) ac_arg=$ac_var=`printf "%s\n" "$ac_new_val" | sed "s/'/'\\\\\\\\''/g"` ;; -+ *) ac_arg=$ac_var=$ac_new_val ;; -+ esac -+ case " $ac_configure_args " in -+ *" '$ac_arg' "*) ;; # Avoid dups. Use of quotes ensures accuracy. -+ *) as_fn_append ac_configure_args " '$ac_arg'" ;; -+ esac -+ fi -+done -+if $ac_cache_corrupted; then -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: changes in the environment can compromise the build" >&5 -+printf "%s\n" "$as_me: error: changes in the environment can compromise the build" >&2;} -+ as_fn_error $? "run \`${MAKE-make} distclean' and/or \`rm $cache_file' -+ and start over" "$LINENO" 5 -+fi -+## -------------------- ## -+## Main body of script. ## -+## -------------------- ## -+ -+ac_ext=c -+ac_cpp='$CPP $CPPFLAGS' -+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' - ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' - ac_compiler_gnu=$ac_cv_c_compiler_gnu - -@@ -2739,36 +3345,9 @@ ac_config_headers="$ac_config_headers config.h" - - am__api_version='1.16' - --ac_aux_dir= --for ac_dir in "$srcdir" "$srcdir/.." "$srcdir/../.."; do -- if test -f "$ac_dir/install-sh"; then -- ac_aux_dir=$ac_dir -- ac_install_sh="$ac_aux_dir/install-sh -c" -- break -- elif test -f "$ac_dir/install.sh"; then -- ac_aux_dir=$ac_dir -- ac_install_sh="$ac_aux_dir/install.sh -c" -- break -- elif test -f "$ac_dir/shtool"; then -- ac_aux_dir=$ac_dir -- ac_install_sh="$ac_aux_dir/shtool install -c" -- break -- fi --done --if test -z "$ac_aux_dir"; then -- as_fn_error $? "cannot find install-sh, install.sh, or shtool in \"$srcdir\" \"$srcdir/..\" \"$srcdir/../..\"" "$LINENO" 5 --fi -- --# These three variables are undocumented and unsupported, --# and are intended to be withdrawn in a future Autoconf release. --# They can cause serious problems if a builder's source tree is in a directory --# whose full name contains unusual characters. --ac_config_guess="$SHELL $ac_aux_dir/config.guess" # Please don't use this var. --ac_config_sub="$SHELL $ac_aux_dir/config.sub" # Please don't use this var. --ac_configure="$SHELL $ac_aux_dir/configure" # Please don't use this var. - - --# Find a good install program. We prefer a C program (faster), -+ # Find a good install program. We prefer a C program (faster), - # so one script is as good as another. But avoid the broken or - # incompatible versions: - # SysV /etc/install, /usr/sbin/install -@@ -2782,20 +3361,25 @@ ac_configure="$SHELL $ac_aux_dir/configure" # Please don't use this var. - # OS/2's system install, which has a completely different semantic - # ./install, which can be erroneously created by make from ./install.sh. - # Reject install programs that cannot install multiple files. --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for a BSD-compatible install" >&5 --$as_echo_n "checking for a BSD-compatible install... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for a BSD-compatible install" >&5 -+printf %s "checking for a BSD-compatible install... " >&6; } - if test -z "$INSTALL"; then --if ${ac_cv_path_install+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+if test ${ac_cv_path_install+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -- # Account for people who put trailing slashes in PATH elements. --case $as_dir/ in #(( -- ./ | .// | /[cC]/* | \ -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac -+ # Account for fact that we put trailing slashes in our PATH walk. -+case $as_dir in #(( -+ ./ | /[cC]/* | \ - /etc/* | /usr/sbin/* | /usr/etc/* | /sbin/* | /usr/afsws/bin/* | \ - ?:[\\/]os2[\\/]install[\\/]* | ?:[\\/]OS2[\\/]INSTALL[\\/]* | \ - /usr/ucb/* ) ;; -@@ -2805,13 +3389,13 @@ case $as_dir/ in #(( - # by default. - for ac_prog in ginstall scoinst install; do - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_prog$ac_exec_ext"; then -+ if as_fn_executable_p "$as_dir$ac_prog$ac_exec_ext"; then - if test $ac_prog = install && -- grep dspmsg "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then -+ grep dspmsg "$as_dir$ac_prog$ac_exec_ext" >/dev/null 2>&1; then - # AIX install. It has an incompatible calling convention. - : - elif test $ac_prog = install && -- grep pwplus "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then -+ grep pwplus "$as_dir$ac_prog$ac_exec_ext" >/dev/null 2>&1; then - # program-specific install script used by HP pwplus--don't use. - : - else -@@ -2819,12 +3403,12 @@ case $as_dir/ in #(( - echo one > conftest.one - echo two > conftest.two - mkdir conftest.dir -- if "$as_dir/$ac_prog$ac_exec_ext" -c conftest.one conftest.two "`pwd`/conftest.dir" && -+ if "$as_dir$ac_prog$ac_exec_ext" -c conftest.one conftest.two "`pwd`/conftest.dir/" && - test -s conftest.one && test -s conftest.two && - test -s conftest.dir/conftest.one && - test -s conftest.dir/conftest.two - then -- ac_cv_path_install="$as_dir/$ac_prog$ac_exec_ext -c" -+ ac_cv_path_install="$as_dir$ac_prog$ac_exec_ext -c" - break 3 - fi - fi -@@ -2840,7 +3424,7 @@ IFS=$as_save_IFS - rm -rf conftest.one conftest.two conftest.dir - - fi -- if test "${ac_cv_path_install+set}" = set; then -+ if test ${ac_cv_path_install+y}; then - INSTALL=$ac_cv_path_install - else - # As a last resort, use the slow shell script. Don't cache a -@@ -2850,8 +3434,8 @@ fi - INSTALL=$ac_install_sh - fi - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $INSTALL" >&5 --$as_echo "$INSTALL" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $INSTALL" >&5 -+printf "%s\n" "$INSTALL" >&6; } - - # Use test -z because SunOS4 sh mishandles braces in ${var-val}. - # It thinks the first close brace ends the variable substitution. -@@ -2861,8 +3445,8 @@ test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL}' - - test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether build environment is sane" >&5 --$as_echo_n "checking whether build environment is sane... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether build environment is sane" >&5 -+printf %s "checking whether build environment is sane... " >&6; } - # Reject unsafe characters in $srcdir or the absolute working directory - # name. Accept space and tab only in the latter. - am_lf=' -@@ -2916,8 +3500,8 @@ else - as_fn_error $? "newly created file is older than distributed files! - Check your system clock" "$LINENO" 5 - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - # If we didn't sleep, we still need to ensure time stamps of config.status and - # generated files are strictly newer. - am_sleep_pid= -@@ -2936,26 +3520,23 @@ test "$program_suffix" != NONE && - # Double any \ or $. - # By default was `s,x,x', remove it if useless. - ac_script='s/[\\$]/&&/g;s/;s,x,x,$//' --program_transform_name=`$as_echo "$program_transform_name" | sed "$ac_script"` -+program_transform_name=`printf "%s\n" "$program_transform_name" | sed "$ac_script"` -+ - - # Expand $ac_aux_dir to an absolute path. - am_aux_dir=`cd "$ac_aux_dir" && pwd` - --if test x"${MISSING+set}" != xset; then -- case $am_aux_dir in -- *\ * | *\ *) -- MISSING="\${SHELL} \"$am_aux_dir/missing\"" ;; -- *) -- MISSING="\${SHELL} $am_aux_dir/missing" ;; -- esac -+ -+ if test x"${MISSING+set}" != xset; then -+ MISSING="\${SHELL} '$am_aux_dir/missing'" - fi - # Use eval to expand $SHELL - if eval "$MISSING --is-lightweight"; then - am_missing_run="$MISSING " - else - am_missing_run= -- { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: 'missing' script is too old or missing" >&5 --$as_echo "$as_me: WARNING: 'missing' script is too old or missing" >&2;} -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: 'missing' script is too old or missing" >&5 -+printf "%s\n" "$as_me: WARNING: 'missing' script is too old or missing" >&2;} - fi - - if test x"${install_sh+set}" != xset; then -@@ -2975,11 +3556,12 @@ if test "$cross_compiling" != no; then - if test -n "$ac_tool_prefix"; then - # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args. - set dummy ${ac_tool_prefix}strip; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_prog_STRIP+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_prog_STRIP+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -n "$STRIP"; then - ac_cv_prog_STRIP="$STRIP" # Let the user override the test. - else -@@ -2987,11 +3569,15 @@ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then - ac_cv_prog_STRIP="${ac_tool_prefix}strip" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -3002,11 +3588,11 @@ fi - fi - STRIP=$ac_cv_prog_STRIP - if test -n "$STRIP"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5 --$as_echo "$STRIP" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5 -+printf "%s\n" "$STRIP" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - -@@ -3015,11 +3601,12 @@ if test -z "$ac_cv_prog_STRIP"; then - ac_ct_STRIP=$STRIP - # Extract the first word of "strip", so it can be a program name with args. - set dummy strip; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_prog_ac_ct_STRIP+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_prog_ac_ct_STRIP+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -n "$ac_ct_STRIP"; then - ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test. - else -@@ -3027,11 +3614,15 @@ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then - ac_cv_prog_ac_ct_STRIP="strip" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -3042,11 +3633,11 @@ fi - fi - ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP - if test -n "$ac_ct_STRIP"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5 --$as_echo "$ac_ct_STRIP" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5 -+printf "%s\n" "$ac_ct_STRIP" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - if test "x$ac_ct_STRIP" = x; then -@@ -3054,8 +3645,8 @@ fi - else - case $cross_compiling:$ac_tool_warned in - yes:) --{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 --$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 -+printf "%s\n" "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} - ac_tool_warned=yes ;; - esac - STRIP=$ac_ct_STRIP -@@ -3067,25 +3658,31 @@ fi - fi - INSTALL_STRIP_PROGRAM="\$(install_sh) -c -s" - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for a thread-safe mkdir -p" >&5 --$as_echo_n "checking for a thread-safe mkdir -p... " >&6; } -+ -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for a race-free mkdir -p" >&5 -+printf %s "checking for a race-free mkdir -p... " >&6; } - if test -z "$MKDIR_P"; then -- if ${ac_cv_path_mkdir+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+ if test ${ac_cv_path_mkdir+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH$PATH_SEPARATOR/opt/sfw/bin - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_prog in mkdir gmkdir; do - for ac_exec_ext in '' $ac_executable_extensions; do -- as_fn_executable_p "$as_dir/$ac_prog$ac_exec_ext" || continue -- case `"$as_dir/$ac_prog$ac_exec_ext" --version 2>&1` in #( -- 'mkdir (GNU coreutils) '* | \ -- 'mkdir (coreutils) '* | \ -+ as_fn_executable_p "$as_dir$ac_prog$ac_exec_ext" || continue -+ case `"$as_dir$ac_prog$ac_exec_ext" --version 2>&1` in #( -+ 'mkdir ('*'coreutils) '* | \ -+ 'BusyBox '* | \ - 'mkdir (fileutils) '4.1*) -- ac_cv_path_mkdir=$as_dir/$ac_prog$ac_exec_ext -+ ac_cv_path_mkdir=$as_dir$ac_prog$ac_exec_ext - break 3;; - esac - done -@@ -3096,7 +3693,7 @@ IFS=$as_save_IFS - fi - - test -d ./--version && rmdir ./--version -- if test "${ac_cv_path_mkdir+set}" = set; then -+ if test ${ac_cv_path_mkdir+y}; then - MKDIR_P="$ac_cv_path_mkdir -p" - else - # As a last resort, use the slow shell script. Don't cache a -@@ -3106,18 +3703,19 @@ fi - MKDIR_P="$ac_install_sh -d" - fi - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $MKDIR_P" >&5 --$as_echo "$MKDIR_P" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $MKDIR_P" >&5 -+printf "%s\n" "$MKDIR_P" >&6; } - - for ac_prog in gawk mawk nawk awk - do - # Extract the first word of "$ac_prog", so it can be a program name with args. - set dummy $ac_prog; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_prog_AWK+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_prog_AWK+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -n "$AWK"; then - ac_cv_prog_AWK="$AWK" # Let the user override the test. - else -@@ -3125,11 +3723,15 @@ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then - ac_cv_prog_AWK="$ac_prog" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -3140,24 +3742,25 @@ fi - fi - AWK=$ac_cv_prog_AWK - if test -n "$AWK"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AWK" >&5 --$as_echo "$AWK" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $AWK" >&5 -+printf "%s\n" "$AWK" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - - test -n "$AWK" && break - done - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether ${MAKE-make} sets \$(MAKE)" >&5 --$as_echo_n "checking whether ${MAKE-make} sets \$(MAKE)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether ${MAKE-make} sets \$(MAKE)" >&5 -+printf %s "checking whether ${MAKE-make} sets \$(MAKE)... " >&6; } - set x ${MAKE-make} --ac_make=`$as_echo "$2" | sed 's/+/p/g; s/[^a-zA-Z0-9_]/_/g'` --if eval \${ac_cv_prog_make_${ac_make}_set+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+ac_make=`printf "%s\n" "$2" | sed 's/+/p/g; s/[^a-zA-Z0-9_]/_/g'` -+if eval test \${ac_cv_prog_make_${ac_make}_set+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - cat >conftest.make <<\_ACEOF - SHELL = /bin/sh - all: -@@ -3173,12 +3776,12 @@ esac - rm -f conftest.make - fi - if eval test \$ac_cv_prog_make_${ac_make}_set = yes; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - SET_MAKE= - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - SET_MAKE="MAKE=${MAKE-make}" - fi - -@@ -3192,7 +3795,8 @@ fi - rmdir .tst 2>/dev/null - - # Check whether --enable-silent-rules was given. --if test "${enable_silent_rules+set}" = set; then : -+if test ${enable_silent_rules+y} -+then : - enableval=$enable_silent_rules; - fi - -@@ -3202,12 +3806,13 @@ case $enable_silent_rules in # ((( - *) AM_DEFAULT_VERBOSITY=1;; - esac - am_make=${MAKE-make} --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $am_make supports nested variables" >&5 --$as_echo_n "checking whether $am_make supports nested variables... " >&6; } --if ${am_cv_make_support_nested_variables+:} false; then : -- $as_echo_n "(cached) " >&6 --else -- if $as_echo 'TRUE=$(BAR$(V)) -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether $am_make supports nested variables" >&5 -+printf %s "checking whether $am_make supports nested variables... " >&6; } -+if test ${am_cv_make_support_nested_variables+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop -+ if printf "%s\n" 'TRUE=$(BAR$(V)) - BAR0=false - BAR1=true - V=1 -@@ -3219,8 +3824,8 @@ else - am_cv_make_support_nested_variables=no - fi - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $am_cv_make_support_nested_variables" >&5 --$as_echo "$am_cv_make_support_nested_variables" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $am_cv_make_support_nested_variables" >&5 -+printf "%s\n" "$am_cv_make_support_nested_variables" >&6; } - if test $am_cv_make_support_nested_variables = yes; then - AM_V='$(V)' - AM_DEFAULT_V='$(AM_DEFAULT_VERBOSITY)' -@@ -3255,14 +3860,10 @@ fi - VERSION='3.16.0' - - --cat >>confdefs.h <<_ACEOF --#define PACKAGE "$PACKAGE" --_ACEOF -+printf "%s\n" "#define PACKAGE \"$PACKAGE\"" >>confdefs.h - - --cat >>confdefs.h <<_ACEOF --#define VERSION "$VERSION" --_ACEOF -+printf "%s\n" "#define VERSION \"$VERSION\"" >>confdefs.h - - # Some tools Automake needs. - -@@ -3302,6 +3903,20 @@ am__tar='$${TAR-tar} chof - "$$tardir"' am__untar='$${TAR-tar} xf -' - - - -+# Variables for tags utilities; see am/tags.am -+if test -z "$CTAGS"; then -+ CTAGS=ctags -+fi -+ -+if test -z "$ETAGS"; then -+ ETAGS=etags -+fi -+ -+if test -z "$CSCOPE"; then -+ CSCOPE=cscope -+fi -+ -+ - - # POSIX will say in a future version that running "rm -f" with no argument - # is OK; and we want to be able to make that assumption in our Makefile -@@ -3347,17 +3962,18 @@ fi - - - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether to enable maintainer-specific portions of Makefiles" >&5 --$as_echo_n "checking whether to enable maintainer-specific portions of Makefiles... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether to enable maintainer-specific portions of Makefiles" >&5 -+printf %s "checking whether to enable maintainer-specific portions of Makefiles... " >&6; } - # Check whether --enable-maintainer-mode was given. --if test "${enable_maintainer_mode+set}" = set; then : -+if test ${enable_maintainer_mode+y} -+then : - enableval=$enable_maintainer_mode; USE_MAINTAINER_MODE=$enableval --else -+else $as_nop - USE_MAINTAINER_MODE=no - fi - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $USE_MAINTAINER_MODE" >&5 --$as_echo "$USE_MAINTAINER_MODE" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $USE_MAINTAINER_MODE" >&5 -+printf "%s\n" "$USE_MAINTAINER_MODE" >&6; } - if test $USE_MAINTAINER_MODE = yes; then - MAINTAINER_MODE_TRUE= - MAINTAINER_MODE_FALSE='#' -@@ -3381,17 +3997,26 @@ CXXFLAGS="$CXXFLAGS" - # Checks for various programs. - #---------------------------------------------------------------------------- - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether ln -s works" >&5 --$as_echo_n "checking whether ln -s works... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether ln -s works" >&5 -+printf %s "checking whether ln -s works... " >&6; } - LN_S=$as_ln_s - if test "$LN_S" = "ln -s"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no, using $LN_S" >&5 --$as_echo "no, using $LN_S" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no, using $LN_S" >&5 -+printf "%s\n" "no, using $LN_S" >&6; } - fi - -+ -+ -+ -+ -+ -+ -+ -+ -+ - ac_ext=c - ac_cpp='$CPP $CPPFLAGS' - ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' -@@ -3400,11 +4025,12 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu - if test -n "$ac_tool_prefix"; then - # Extract the first word of "${ac_tool_prefix}gcc", so it can be a program name with args. - set dummy ${ac_tool_prefix}gcc; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_prog_CC+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_prog_CC+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -n "$CC"; then - ac_cv_prog_CC="$CC" # Let the user override the test. - else -@@ -3412,11 +4038,15 @@ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then - ac_cv_prog_CC="${ac_tool_prefix}gcc" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -3427,11 +4057,11 @@ fi - fi - CC=$ac_cv_prog_CC - if test -n "$CC"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 --$as_echo "$CC" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 -+printf "%s\n" "$CC" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - -@@ -3440,11 +4070,12 @@ if test -z "$ac_cv_prog_CC"; then - ac_ct_CC=$CC - # Extract the first word of "gcc", so it can be a program name with args. - set dummy gcc; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_prog_ac_ct_CC+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_prog_ac_ct_CC+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -n "$ac_ct_CC"; then - ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. - else -@@ -3452,11 +4083,15 @@ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then - ac_cv_prog_ac_ct_CC="gcc" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -3467,11 +4102,11 @@ fi - fi - ac_ct_CC=$ac_cv_prog_ac_ct_CC - if test -n "$ac_ct_CC"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_CC" >&5 --$as_echo "$ac_ct_CC" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_ct_CC" >&5 -+printf "%s\n" "$ac_ct_CC" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - if test "x$ac_ct_CC" = x; then -@@ -3479,8 +4114,8 @@ fi - else - case $cross_compiling:$ac_tool_warned in - yes:) --{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 --$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 -+printf "%s\n" "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} - ac_tool_warned=yes ;; - esac - CC=$ac_ct_CC -@@ -3493,11 +4128,12 @@ if test -z "$CC"; then - if test -n "$ac_tool_prefix"; then - # Extract the first word of "${ac_tool_prefix}cc", so it can be a program name with args. - set dummy ${ac_tool_prefix}cc; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_prog_CC+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_prog_CC+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -n "$CC"; then - ac_cv_prog_CC="$CC" # Let the user override the test. - else -@@ -3505,11 +4141,15 @@ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then - ac_cv_prog_CC="${ac_tool_prefix}cc" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -3520,11 +4160,11 @@ fi - fi - CC=$ac_cv_prog_CC - if test -n "$CC"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 --$as_echo "$CC" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 -+printf "%s\n" "$CC" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - -@@ -3533,11 +4173,12 @@ fi - if test -z "$CC"; then - # Extract the first word of "cc", so it can be a program name with args. - set dummy cc; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_prog_CC+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_prog_CC+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -n "$CC"; then - ac_cv_prog_CC="$CC" # Let the user override the test. - else -@@ -3546,15 +4187,19 @@ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -- if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then -+ if test "$as_dir$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then - ac_prog_rejected=yes - continue - fi - ac_cv_prog_CC="cc" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -3570,18 +4215,18 @@ if test $ac_prog_rejected = yes; then - # However, it has the same basename, so the bogon will be chosen - # first if we set CC to just the basename; use the full file name. - shift -- ac_cv_prog_CC="$as_dir/$ac_word${1+' '}$@" -+ ac_cv_prog_CC="$as_dir$ac_word${1+' '}$@" - fi - fi - fi - fi - CC=$ac_cv_prog_CC - if test -n "$CC"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 --$as_echo "$CC" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 -+printf "%s\n" "$CC" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - -@@ -3592,11 +4237,12 @@ if test -z "$CC"; then - do - # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. - set dummy $ac_tool_prefix$ac_prog; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_prog_CC+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_prog_CC+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -n "$CC"; then - ac_cv_prog_CC="$CC" # Let the user override the test. - else -@@ -3604,11 +4250,15 @@ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then - ac_cv_prog_CC="$ac_tool_prefix$ac_prog" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -3619,11 +4269,11 @@ fi - fi - CC=$ac_cv_prog_CC - if test -n "$CC"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 --$as_echo "$CC" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 -+printf "%s\n" "$CC" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - -@@ -3636,11 +4286,12 @@ if test -z "$CC"; then - do - # Extract the first word of "$ac_prog", so it can be a program name with args. - set dummy $ac_prog; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_prog_ac_ct_CC+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_prog_ac_ct_CC+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -n "$ac_ct_CC"; then - ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. - else -@@ -3648,11 +4299,15 @@ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then - ac_cv_prog_ac_ct_CC="$ac_prog" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -3663,11 +4318,11 @@ fi - fi - ac_ct_CC=$ac_cv_prog_ac_ct_CC - if test -n "$ac_ct_CC"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_CC" >&5 --$as_echo "$ac_ct_CC" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_ct_CC" >&5 -+printf "%s\n" "$ac_ct_CC" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - -@@ -3679,34 +4334,138 @@ done - else - case $cross_compiling:$ac_tool_warned in - yes:) --{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 --$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 -+printf "%s\n" "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} -+ac_tool_warned=yes ;; -+esac -+ CC=$ac_ct_CC -+ fi -+fi -+ -+fi -+if test -z "$CC"; then -+ if test -n "$ac_tool_prefix"; then -+ # Extract the first word of "${ac_tool_prefix}clang", so it can be a program name with args. -+set dummy ${ac_tool_prefix}clang; ac_word=$2 -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_prog_CC+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop -+ if test -n "$CC"; then -+ ac_cv_prog_CC="$CC" # Let the user override the test. -+else -+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR -+for as_dir in $PATH -+do -+ IFS=$as_save_IFS -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac -+ for ac_exec_ext in '' $ac_executable_extensions; do -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then -+ ac_cv_prog_CC="${ac_tool_prefix}clang" -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 -+ break 2 -+ fi -+done -+ done -+IFS=$as_save_IFS -+ -+fi -+fi -+CC=$ac_cv_prog_CC -+if test -n "$CC"; then -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 -+printf "%s\n" "$CC" >&6; } -+else -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } -+fi -+ -+ -+fi -+if test -z "$ac_cv_prog_CC"; then -+ ac_ct_CC=$CC -+ # Extract the first word of "clang", so it can be a program name with args. -+set dummy clang; ac_word=$2 -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_prog_ac_ct_CC+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop -+ if test -n "$ac_ct_CC"; then -+ ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. -+else -+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR -+for as_dir in $PATH -+do -+ IFS=$as_save_IFS -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac -+ for ac_exec_ext in '' $ac_executable_extensions; do -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then -+ ac_cv_prog_ac_ct_CC="clang" -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 -+ break 2 -+ fi -+done -+ done -+IFS=$as_save_IFS -+ -+fi -+fi -+ac_ct_CC=$ac_cv_prog_ac_ct_CC -+if test -n "$ac_ct_CC"; then -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_ct_CC" >&5 -+printf "%s\n" "$ac_ct_CC" >&6; } -+else -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } -+fi -+ -+ if test "x$ac_ct_CC" = x; then -+ CC="" -+ else -+ case $cross_compiling:$ac_tool_warned in -+yes:) -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 -+printf "%s\n" "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} - ac_tool_warned=yes ;; - esac - CC=$ac_ct_CC - fi -+else -+ CC="$ac_cv_prog_CC" - fi - - fi - - --test -z "$CC" && { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 --$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -+test -z "$CC" && { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} - as_fn_error $? "no acceptable C compiler found in \$PATH - See \`config.log' for more details" "$LINENO" 5; } - - # Provide some information about the compiler. --$as_echo "$as_me:${as_lineno-$LINENO}: checking for C compiler version" >&5 -+printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for C compiler version" >&5 - set X $ac_compile - ac_compiler=$2 --for ac_option in --version -v -V -qversion; do -+for ac_option in --version -v -V -qversion -version; do - { { ac_try="$ac_compiler $ac_option >&5" - case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; - esac - eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" --$as_echo "$ac_try_echo"; } >&5 -+printf "%s\n" "$ac_try_echo"; } >&5 - (eval "$ac_compiler $ac_option >&5") 2>conftest.err - ac_status=$? - if test -s conftest.err; then -@@ -3716,7 +4475,7 @@ $as_echo "$ac_try_echo"; } >&5 - cat conftest.er1 >&5 - fi - rm -f conftest.er1 conftest.err -- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 - test $ac_status = 0; } - done - -@@ -3724,7 +4483,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - ; -@@ -3736,9 +4495,9 @@ ac_clean_files="$ac_clean_files a.out a.out.dSYM a.exe b.out" - # Try to create an executable without -o first, disregard a.out. - # It will help us diagnose broken compilers, and finding out an intuition - # of exeext. --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the C compiler works" >&5 --$as_echo_n "checking whether the C compiler works... " >&6; } --ac_link_default=`$as_echo "$ac_link" | sed 's/ -o *conftest[^ ]*//'` -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether the C compiler works" >&5 -+printf %s "checking whether the C compiler works... " >&6; } -+ac_link_default=`printf "%s\n" "$ac_link" | sed 's/ -o *conftest[^ ]*//'` - - # The possible output files: - ac_files="a.out conftest.exe conftest a.exe a_out.exe b.out conftest.*" -@@ -3759,11 +4518,12 @@ case "(($ac_try" in - *) ac_try_echo=$ac_try;; - esac - eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" --$as_echo "$ac_try_echo"; } >&5 -+printf "%s\n" "$ac_try_echo"; } >&5 - (eval "$ac_link_default") 2>&5 - ac_status=$? -- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -- test $ac_status = 0; }; then : -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -+ test $ac_status = 0; } -+then : - # Autoconf-2.13 could set the ac_cv_exeext variable to `no'. - # So ignore a value of `no', otherwise this would lead to `EXEEXT = no' - # in a Makefile. We should not override ac_cv_exeext if it was cached, -@@ -3780,7 +4540,7 @@ do - # certainly right. - break;; - *.* ) -- if test "${ac_cv_exeext+set}" = set && test "$ac_cv_exeext" != no; -+ if test ${ac_cv_exeext+y} && test "$ac_cv_exeext" != no; - then :; else - ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'` - fi -@@ -3796,44 +4556,46 @@ do - done - test "$ac_cv_exeext" = no && ac_cv_exeext= - --else -+else $as_nop - ac_file='' - fi --if test -z "$ac_file"; then : -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } --$as_echo "$as_me: failed program was:" >&5 -+if test -z "$ac_file" -+then : -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } -+printf "%s\n" "$as_me: failed program was:" >&5 - sed 's/^/| /' conftest.$ac_ext >&5 - --{ { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 --$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -+{ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} - as_fn_error 77 "C compiler cannot create executables - See \`config.log' for more details" "$LINENO" 5; } --else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } --fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for C compiler default output file name" >&5 --$as_echo_n "checking for C compiler default output file name... " >&6; } --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_file" >&5 --$as_echo "$ac_file" >&6; } -+else $as_nop -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } -+fi -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for C compiler default output file name" >&5 -+printf %s "checking for C compiler default output file name... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_file" >&5 -+printf "%s\n" "$ac_file" >&6; } - ac_exeext=$ac_cv_exeext - - rm -f -r a.out a.out.dSYM a.exe conftest$ac_cv_exeext b.out - ac_clean_files=$ac_clean_files_save --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for suffix of executables" >&5 --$as_echo_n "checking for suffix of executables... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for suffix of executables" >&5 -+printf %s "checking for suffix of executables... " >&6; } - if { { ac_try="$ac_link" - case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; - esac - eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" --$as_echo "$ac_try_echo"; } >&5 -+printf "%s\n" "$ac_try_echo"; } >&5 - (eval "$ac_link") 2>&5 - ac_status=$? -- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -- test $ac_status = 0; }; then : -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -+ test $ac_status = 0; } -+then : - # If both `conftest.exe' and `conftest' are `present' (well, observable) - # catch `conftest.exe'. For instance with Cygwin, `ls conftest' will - # work properly (i.e., refer to `conftest.exe'), while it won't with -@@ -3847,15 +4609,15 @@ for ac_file in conftest.exe conftest conftest.*; do - * ) break;; - esac - done --else -- { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 --$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -+else $as_nop -+ { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} - as_fn_error $? "cannot compute suffix of executables: cannot compile and link - See \`config.log' for more details" "$LINENO" 5; } - fi - rm -f conftest conftest$ac_cv_exeext --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_exeext" >&5 --$as_echo "$ac_cv_exeext" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_exeext" >&5 -+printf "%s\n" "$ac_cv_exeext" >&6; } - - rm -f conftest.$ac_ext - EXEEXT=$ac_cv_exeext -@@ -3864,7 +4626,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - #include - int --main () -+main (void) - { - FILE *f = fopen ("conftest.out", "w"); - return ferror (f) || fclose (f) != 0; -@@ -3876,8 +4638,8 @@ _ACEOF - ac_clean_files="$ac_clean_files conftest.out" - # Check that the compiler produces executables we can run. If not, either - # the compiler is broken, or we cross compile. --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether we are cross compiling" >&5 --$as_echo_n "checking whether we are cross compiling... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether we are cross compiling" >&5 -+printf %s "checking whether we are cross compiling... " >&6; } - if test "$cross_compiling" != yes; then - { { ac_try="$ac_link" - case "(($ac_try" in -@@ -3885,10 +4647,10 @@ case "(($ac_try" in - *) ac_try_echo=$ac_try;; - esac - eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" --$as_echo "$ac_try_echo"; } >&5 -+printf "%s\n" "$ac_try_echo"; } >&5 - (eval "$ac_link") 2>&5 - ac_status=$? -- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 - test $ac_status = 0; } - if { ac_try='./conftest$ac_cv_exeext' - { { case "(($ac_try" in -@@ -3896,39 +4658,40 @@ $as_echo "$ac_try_echo"; } >&5 - *) ac_try_echo=$ac_try;; - esac - eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" --$as_echo "$ac_try_echo"; } >&5 -+printf "%s\n" "$ac_try_echo"; } >&5 - (eval "$ac_try") 2>&5 - ac_status=$? -- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 - test $ac_status = 0; }; }; then - cross_compiling=no - else - if test "$cross_compiling" = maybe; then - cross_compiling=yes - else -- { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 --$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} --as_fn_error $? "cannot run C compiled programs. -+ { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} -+as_fn_error 77 "cannot run C compiled programs. - If you meant to cross compile, use \`--host'. - See \`config.log' for more details" "$LINENO" 5; } - fi - fi - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $cross_compiling" >&5 --$as_echo "$cross_compiling" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $cross_compiling" >&5 -+printf "%s\n" "$cross_compiling" >&6; } - - rm -f conftest.$ac_ext conftest$ac_cv_exeext conftest.out - ac_clean_files=$ac_clean_files_save --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for suffix of object files" >&5 --$as_echo_n "checking for suffix of object files... " >&6; } --if ${ac_cv_objext+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for suffix of object files" >&5 -+printf %s "checking for suffix of object files... " >&6; } -+if test ${ac_cv_objext+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - ; -@@ -3942,11 +4705,12 @@ case "(($ac_try" in - *) ac_try_echo=$ac_try;; - esac - eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" --$as_echo "$ac_try_echo"; } >&5 -+printf "%s\n" "$ac_try_echo"; } >&5 - (eval "$ac_compile") 2>&5 - ac_status=$? -- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -- test $ac_status = 0; }; then : -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -+ test $ac_status = 0; } -+then : - for ac_file in conftest.o conftest.obj conftest.*; do - test -f "$ac_file" || continue; - case $ac_file in -@@ -3955,31 +4719,32 @@ $as_echo "$ac_try_echo"; } >&5 - break;; - esac - done --else -- $as_echo "$as_me: failed program was:" >&5 -+else $as_nop -+ printf "%s\n" "$as_me: failed program was:" >&5 - sed 's/^/| /' conftest.$ac_ext >&5 - --{ { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 --$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -+{ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} - as_fn_error $? "cannot compute suffix of object files: cannot compile - See \`config.log' for more details" "$LINENO" 5; } - fi - rm -f conftest.$ac_cv_objext conftest.$ac_ext - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_objext" >&5 --$as_echo "$ac_cv_objext" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_objext" >&5 -+printf "%s\n" "$ac_cv_objext" >&6; } - OBJEXT=$ac_cv_objext - ac_objext=$OBJEXT --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether we are using the GNU C compiler" >&5 --$as_echo_n "checking whether we are using the GNU C compiler... " >&6; } --if ${ac_cv_c_compiler_gnu+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether the compiler supports GNU C" >&5 -+printf %s "checking whether the compiler supports GNU C... " >&6; } -+if test ${ac_cv_c_compiler_gnu+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - #ifndef __GNUC__ - choke me -@@ -3989,29 +4754,33 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - ac_compiler_gnu=yes --else -+else $as_nop - ac_compiler_gnu=no - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - ac_cv_c_compiler_gnu=$ac_compiler_gnu - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_c_compiler_gnu" >&5 --$as_echo "$ac_cv_c_compiler_gnu" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_c_compiler_gnu" >&5 -+printf "%s\n" "$ac_cv_c_compiler_gnu" >&6; } -+ac_compiler_gnu=$ac_cv_c_compiler_gnu -+ - if test $ac_compiler_gnu = yes; then - GCC=yes - else - GCC= - fi --ac_test_CFLAGS=${CFLAGS+set} -+ac_test_CFLAGS=${CFLAGS+y} - ac_save_CFLAGS=$CFLAGS --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $CC accepts -g" >&5 --$as_echo_n "checking whether $CC accepts -g... " >&6; } --if ${ac_cv_prog_cc_g+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether $CC accepts -g" >&5 -+printf %s "checking whether $CC accepts -g... " >&6; } -+if test ${ac_cv_prog_cc_g+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - ac_save_c_werror_flag=$ac_c_werror_flag - ac_c_werror_flag=yes - ac_cv_prog_cc_g=no -@@ -4020,57 +4789,60 @@ else - /* end confdefs.h. */ - - int --main () -+main (void) - { - - ; - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - ac_cv_prog_cc_g=yes --else -+else $as_nop - CFLAGS="" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - ; - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - --else -+else $as_nop - ac_c_werror_flag=$ac_save_c_werror_flag - CFLAGS="-g" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - ; - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - ac_cv_prog_cc_g=yes - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - ac_c_werror_flag=$ac_save_c_werror_flag - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_g" >&5 --$as_echo "$ac_cv_prog_cc_g" >&6; } --if test "$ac_test_CFLAGS" = set; then -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_g" >&5 -+printf "%s\n" "$ac_cv_prog_cc_g" >&6; } -+if test $ac_test_CFLAGS; then - CFLAGS=$ac_save_CFLAGS - elif test $ac_cv_prog_cc_g = yes; then - if test "$GCC" = yes; then -@@ -4085,94 +4857,144 @@ else - CFLAGS= - fi - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $CC option to accept ISO C89" >&5 --$as_echo_n "checking for $CC option to accept ISO C89... " >&6; } --if ${ac_cv_prog_cc_c89+:} false; then : -- $as_echo_n "(cached) " >&6 --else -- ac_cv_prog_cc_c89=no -+ac_prog_cc_stdc=no -+if test x$ac_prog_cc_stdc = xno -+then : -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $CC option to enable C11 features" >&5 -+printf %s "checking for $CC option to enable C11 features... " >&6; } -+if test ${ac_cv_prog_cc_c11+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop -+ ac_cv_prog_cc_c11=no - ac_save_CC=$CC - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ --#include --#include --struct stat; --/* Most of the following tests are stolen from RCS 5.7's src/conf.sh. */ --struct buf { int x; }; --FILE * (*rcsopen) (struct buf *, struct stat *, int); --static char *e (p, i) -- char **p; -- int i; --{ -- return p[i]; --} --static char *f (char * (*g) (char **, int), char **p, ...) --{ -- char *s; -- va_list v; -- va_start (v,p); -- s = g (p, va_arg (v,int)); -- va_end (v); -- return s; --} -- --/* OSF 4.0 Compaq cc is some sort of almost-ANSI by default. It has -- function prototypes and stuff, but not '\xHH' hex character constants. -- These don't provoke an error unfortunately, instead are silently treated -- as 'x'. The following induces an error, until -std is added to get -- proper ANSI mode. Curiously '\x00'!='x' always comes out true, for an -- array size at least. It's necessary to write '\x00'==0 to get something -- that's true only with -std. */ --int osf4_cc_array ['\x00' == 0 ? 1 : -1]; -+$ac_c_conftest_c11_program -+_ACEOF -+for ac_arg in '' -std=gnu11 -+do -+ CC="$ac_save_CC $ac_arg" -+ if ac_fn_c_try_compile "$LINENO" -+then : -+ ac_cv_prog_cc_c11=$ac_arg -+fi -+rm -f core conftest.err conftest.$ac_objext conftest.beam -+ test "x$ac_cv_prog_cc_c11" != "xno" && break -+done -+rm -f conftest.$ac_ext -+CC=$ac_save_CC -+fi - --/* IBM C 6 for AIX is almost-ANSI by default, but it replaces macro parameters -- inside strings and character constants. */ --#define FOO(x) 'x' --int xlc6_cc_array[FOO(a) == 'x' ? 1 : -1]; -+if test "x$ac_cv_prog_cc_c11" = xno -+then : -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5 -+printf "%s\n" "unsupported" >&6; } -+else $as_nop -+ if test "x$ac_cv_prog_cc_c11" = x -+then : -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: none needed" >&5 -+printf "%s\n" "none needed" >&6; } -+else $as_nop -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c11" >&5 -+printf "%s\n" "$ac_cv_prog_cc_c11" >&6; } -+ CC="$CC $ac_cv_prog_cc_c11" -+fi -+ ac_cv_prog_cc_stdc=$ac_cv_prog_cc_c11 -+ ac_prog_cc_stdc=c11 -+fi -+fi -+if test x$ac_prog_cc_stdc = xno -+then : -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $CC option to enable C99 features" >&5 -+printf %s "checking for $CC option to enable C99 features... " >&6; } -+if test ${ac_cv_prog_cc_c99+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop -+ ac_cv_prog_cc_c99=no -+ac_save_CC=$CC -+cat confdefs.h - <<_ACEOF >conftest.$ac_ext -+/* end confdefs.h. */ -+$ac_c_conftest_c99_program -+_ACEOF -+for ac_arg in '' -std=gnu99 -std=c99 -c99 -qlanglvl=extc1x -qlanglvl=extc99 -AC99 -D_STDC_C99= -+do -+ CC="$ac_save_CC $ac_arg" -+ if ac_fn_c_try_compile "$LINENO" -+then : -+ ac_cv_prog_cc_c99=$ac_arg -+fi -+rm -f core conftest.err conftest.$ac_objext conftest.beam -+ test "x$ac_cv_prog_cc_c99" != "xno" && break -+done -+rm -f conftest.$ac_ext -+CC=$ac_save_CC -+fi - --int test (int i, double x); --struct s1 {int (*f) (int a);}; --struct s2 {int (*f) (double a);}; --int pairnames (int, char **, FILE *(*)(struct buf *, struct stat *, int), int, int); --int argc; --char **argv; --int --main () --{ --return f (e, argv, 0) != argv[0] || f (e, argv, 1) != argv[1]; -- ; -- return 0; --} -+if test "x$ac_cv_prog_cc_c99" = xno -+then : -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5 -+printf "%s\n" "unsupported" >&6; } -+else $as_nop -+ if test "x$ac_cv_prog_cc_c99" = x -+then : -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: none needed" >&5 -+printf "%s\n" "none needed" >&6; } -+else $as_nop -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c99" >&5 -+printf "%s\n" "$ac_cv_prog_cc_c99" >&6; } -+ CC="$CC $ac_cv_prog_cc_c99" -+fi -+ ac_cv_prog_cc_stdc=$ac_cv_prog_cc_c99 -+ ac_prog_cc_stdc=c99 -+fi -+fi -+if test x$ac_prog_cc_stdc = xno -+then : -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $CC option to enable C89 features" >&5 -+printf %s "checking for $CC option to enable C89 features... " >&6; } -+if test ${ac_cv_prog_cc_c89+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop -+ ac_cv_prog_cc_c89=no -+ac_save_CC=$CC -+cat confdefs.h - <<_ACEOF >conftest.$ac_ext -+/* end confdefs.h. */ -+$ac_c_conftest_c89_program - _ACEOF --for ac_arg in '' -qlanglvl=extc89 -qlanglvl=ansi -std \ -- -Ae "-Aa -D_HPUX_SOURCE" "-Xc -D__EXTENSIONS__" -+for ac_arg in '' -qlanglvl=extc89 -qlanglvl=ansi -std -Ae "-Aa -D_HPUX_SOURCE" "-Xc -D__EXTENSIONS__" - do - CC="$ac_save_CC $ac_arg" -- if ac_fn_c_try_compile "$LINENO"; then : -+ if ac_fn_c_try_compile "$LINENO" -+then : - ac_cv_prog_cc_c89=$ac_arg - fi --rm -f core conftest.err conftest.$ac_objext -+rm -f core conftest.err conftest.$ac_objext conftest.beam - test "x$ac_cv_prog_cc_c89" != "xno" && break - done - rm -f conftest.$ac_ext - CC=$ac_save_CC -- - fi --# AC_CACHE_VAL --case "x$ac_cv_prog_cc_c89" in -- x) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: none needed" >&5 --$as_echo "none needed" >&6; } ;; -- xno) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5 --$as_echo "unsupported" >&6; } ;; -- *) -- CC="$CC $ac_cv_prog_cc_c89" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c89" >&5 --$as_echo "$ac_cv_prog_cc_c89" >&6; } ;; --esac --if test "x$ac_cv_prog_cc_c89" != xno; then : - -+if test "x$ac_cv_prog_cc_c89" = xno -+then : -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5 -+printf "%s\n" "unsupported" >&6; } -+else $as_nop -+ if test "x$ac_cv_prog_cc_c89" = x -+then : -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: none needed" >&5 -+printf "%s\n" "none needed" >&6; } -+else $as_nop -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c89" >&5 -+printf "%s\n" "$ac_cv_prog_cc_c89" >&6; } -+ CC="$CC $ac_cv_prog_cc_c89" -+fi -+ ac_cv_prog_cc_stdc=$ac_cv_prog_cc_c89 -+ ac_prog_cc_stdc=c89 -+fi - fi - - ac_ext=c -@@ -4181,21 +5003,23 @@ ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' - ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' - ac_compiler_gnu=$ac_cv_c_compiler_gnu - --ac_ext=c -+ -+ ac_ext=c - ac_cpp='$CPP $CPPFLAGS' - ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' - ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' - ac_compiler_gnu=$ac_cv_c_compiler_gnu --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $CC understands -c and -o together" >&5 --$as_echo_n "checking whether $CC understands -c and -o together... " >&6; } --if ${am_cv_prog_cc_c_o+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether $CC understands -c and -o together" >&5 -+printf %s "checking whether $CC understands -c and -o together... " >&6; } -+if test ${am_cv_prog_cc_c_o+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - ; -@@ -4223,8 +5047,8 @@ _ACEOF - rm -f core conftest* - unset am_i - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $am_cv_prog_cc_c_o" >&5 --$as_echo "$am_cv_prog_cc_c_o" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $am_cv_prog_cc_c_o" >&5 -+printf "%s\n" "$am_cv_prog_cc_c_o" >&6; } - if test "$am_cv_prog_cc_c_o" != yes; then - # Losing compiler, so override with the script. - # FIXME: It is wrong to rewrite CC. -@@ -4243,8 +5067,8 @@ DEPDIR="${am__leading_dot}deps" - - ac_config_commands="$ac_config_commands depfiles" - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether ${MAKE-make} supports the include directive" >&5 --$as_echo_n "checking whether ${MAKE-make} supports the include directive... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether ${MAKE-make} supports the include directive" >&5 -+printf %s "checking whether ${MAKE-make} supports the include directive... " >&6; } - cat > confinc.mk << 'END' - am__doit: - @echo this is the am__doit target >confinc.out -@@ -4280,11 +5104,12 @@ esac - fi - done - rm -f confinc.* confmf.* --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: ${_am_result}" >&5 --$as_echo "${_am_result}" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ${_am_result}" >&5 -+printf "%s\n" "${_am_result}" >&6; } - - # Check whether --enable-dependency-tracking was given. --if test "${enable_dependency_tracking+set}" = set; then : -+if test ${enable_dependency_tracking+y} -+then : - enableval=$enable_dependency_tracking; - fi - -@@ -4305,11 +5130,12 @@ fi - - depcc="$CC" am_compiler_list= - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking dependency style of $depcc" >&5 --$as_echo_n "checking dependency style of $depcc... " >&6; } --if ${am_cv_CC_dependencies_compiler_type+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking dependency style of $depcc" >&5 -+printf %s "checking dependency style of $depcc... " >&6; } -+if test ${am_cv_CC_dependencies_compiler_type+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -z "$AMDEP_TRUE" && test -f "$am_depcomp"; then - # We make a subdir and do the tests there. Otherwise we can end up - # making bogus files that we don't know about and never remove. For -@@ -4416,8 +5242,8 @@ else - fi - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $am_cv_CC_dependencies_compiler_type" >&5 --$as_echo "$am_cv_CC_dependencies_compiler_type" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $am_cv_CC_dependencies_compiler_type" >&5 -+printf "%s\n" "$am_cv_CC_dependencies_compiler_type" >&6; } - CCDEPMODE=depmode=$am_cv_CC_dependencies_compiler_type - - if -@@ -4437,40 +5263,36 @@ ac_cpp='$CPP $CPPFLAGS' - ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' - ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' - ac_compiler_gnu=$ac_cv_c_compiler_gnu --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to run the C preprocessor" >&5 --$as_echo_n "checking how to run the C preprocessor... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking how to run the C preprocessor" >&5 -+printf %s "checking how to run the C preprocessor... " >&6; } - # On Suns, sometimes $CPP names a directory. - if test -n "$CPP" && test -d "$CPP"; then - CPP= - fi - if test -z "$CPP"; then -- if ${ac_cv_prog_CPP+:} false; then : -- $as_echo_n "(cached) " >&6 --else -- # Double quotes because CPP needs to be expanded -- for CPP in "$CC -E" "$CC -E -traditional-cpp" "/lib/cpp" -+ if test ${ac_cv_prog_CPP+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop -+ # Double quotes because $CC needs to be expanded -+ for CPP in "$CC -E" "$CC -E -traditional-cpp" cpp /lib/cpp - do - ac_preproc_ok=false - for ac_c_preproc_warn_flag in '' yes - do - # Use a header file that comes with gcc, so configuring glibc - # with a fresh cross-compiler works. -- # Prefer to if __STDC__ is defined, since -- # exists even on freestanding compilers. - # On the NeXT, cc -E runs the code through the compiler's parser, - # not just through cpp. "Syntax error" is here to catch this case. - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ --#ifdef __STDC__ --# include --#else --# include --#endif -+#include - Syntax error - _ACEOF --if ac_fn_c_try_cpp "$LINENO"; then : -+if ac_fn_c_try_cpp "$LINENO" -+then : - --else -+else $as_nop - # Broken: fails on valid input. - continue - fi -@@ -4482,10 +5304,11 @@ rm -f conftest.err conftest.i conftest.$ac_ext - /* end confdefs.h. */ - #include - _ACEOF --if ac_fn_c_try_cpp "$LINENO"; then : -+if ac_fn_c_try_cpp "$LINENO" -+then : - # Broken: success on invalid input. - continue --else -+else $as_nop - # Passes both tests. - ac_preproc_ok=: - break -@@ -4495,7 +5318,8 @@ rm -f conftest.err conftest.i conftest.$ac_ext - done - # Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. - rm -f conftest.i conftest.err conftest.$ac_ext --if $ac_preproc_ok; then : -+if $ac_preproc_ok -+then : - break - fi - -@@ -4507,29 +5331,24 @@ fi - else - ac_cv_prog_CPP=$CPP - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $CPP" >&5 --$as_echo "$CPP" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $CPP" >&5 -+printf "%s\n" "$CPP" >&6; } - ac_preproc_ok=false - for ac_c_preproc_warn_flag in '' yes - do - # Use a header file that comes with gcc, so configuring glibc - # with a fresh cross-compiler works. -- # Prefer to if __STDC__ is defined, since -- # exists even on freestanding compilers. - # On the NeXT, cc -E runs the code through the compiler's parser, - # not just through cpp. "Syntax error" is here to catch this case. - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ --#ifdef __STDC__ --# include --#else --# include --#endif -+#include - Syntax error - _ACEOF --if ac_fn_c_try_cpp "$LINENO"; then : -+if ac_fn_c_try_cpp "$LINENO" -+then : - --else -+else $as_nop - # Broken: fails on valid input. - continue - fi -@@ -4541,10 +5360,11 @@ rm -f conftest.err conftest.i conftest.$ac_ext - /* end confdefs.h. */ - #include - _ACEOF --if ac_fn_c_try_cpp "$LINENO"; then : -+if ac_fn_c_try_cpp "$LINENO" -+then : - # Broken: success on invalid input. - continue --else -+else $as_nop - # Passes both tests. - ac_preproc_ok=: - break -@@ -4554,20 +5374,27 @@ rm -f conftest.err conftest.i conftest.$ac_ext - done - # Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. - rm -f conftest.i conftest.err conftest.$ac_ext --if $ac_preproc_ok; then : -+if $ac_preproc_ok -+then : - --else -- { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 --$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -+else $as_nop -+ { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} - as_fn_error $? "C preprocessor \"$CPP\" fails sanity check - See \`config.log' for more details" "$LINENO" 5; } - fi - --ac_ext=c --ac_cpp='$CPP $CPPFLAGS' --ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' --ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' --ac_compiler_gnu=$ac_cv_c_compiler_gnu -+ac_ext=c -+ac_cpp='$CPP $CPPFLAGS' -+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' -+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' -+ac_compiler_gnu=$ac_cv_c_compiler_gnu -+ -+ -+ -+ -+ -+ - - ac_ext=cpp - ac_cpp='$CXXCPP $CPPFLAGS' -@@ -4579,15 +5406,16 @@ if test -z "$CXX"; then - CXX=$CCC - else - if test -n "$ac_tool_prefix"; then -- for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC -+ for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC clang++ - do - # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. - set dummy $ac_tool_prefix$ac_prog; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_prog_CXX+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_prog_CXX+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -n "$CXX"; then - ac_cv_prog_CXX="$CXX" # Let the user override the test. - else -@@ -4595,11 +5423,15 @@ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then - ac_cv_prog_CXX="$ac_tool_prefix$ac_prog" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -4610,11 +5442,11 @@ fi - fi - CXX=$ac_cv_prog_CXX - if test -n "$CXX"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CXX" >&5 --$as_echo "$CXX" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $CXX" >&5 -+printf "%s\n" "$CXX" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - -@@ -4623,15 +5455,16 @@ fi - fi - if test -z "$CXX"; then - ac_ct_CXX=$CXX -- for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC -+ for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC clang++ - do - # Extract the first word of "$ac_prog", so it can be a program name with args. - set dummy $ac_prog; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_prog_ac_ct_CXX+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_prog_ac_ct_CXX+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -n "$ac_ct_CXX"; then - ac_cv_prog_ac_ct_CXX="$ac_ct_CXX" # Let the user override the test. - else -@@ -4639,11 +5472,15 @@ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then - ac_cv_prog_ac_ct_CXX="$ac_prog" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -4654,11 +5491,11 @@ fi - fi - ac_ct_CXX=$ac_cv_prog_ac_ct_CXX - if test -n "$ac_ct_CXX"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_CXX" >&5 --$as_echo "$ac_ct_CXX" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_ct_CXX" >&5 -+printf "%s\n" "$ac_ct_CXX" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - -@@ -4670,8 +5507,8 @@ done - else - case $cross_compiling:$ac_tool_warned in - yes:) --{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 --$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 -+printf "%s\n" "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} - ac_tool_warned=yes ;; - esac - CXX=$ac_ct_CXX -@@ -4681,7 +5518,7 @@ fi - fi - fi - # Provide some information about the compiler. --$as_echo "$as_me:${as_lineno-$LINENO}: checking for C++ compiler version" >&5 -+printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for C++ compiler version" >&5 - set X $ac_compile - ac_compiler=$2 - for ac_option in --version -v -V -qversion; do -@@ -4691,7 +5528,7 @@ case "(($ac_try" in - *) ac_try_echo=$ac_try;; - esac - eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" --$as_echo "$ac_try_echo"; } >&5 -+printf "%s\n" "$ac_try_echo"; } >&5 - (eval "$ac_compiler $ac_option >&5") 2>conftest.err - ac_status=$? - if test -s conftest.err; then -@@ -4701,20 +5538,21 @@ $as_echo "$ac_try_echo"; } >&5 - cat conftest.er1 >&5 - fi - rm -f conftest.er1 conftest.err -- $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 - test $ac_status = 0; } - done - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether we are using the GNU C++ compiler" >&5 --$as_echo_n "checking whether we are using the GNU C++ compiler... " >&6; } --if ${ac_cv_cxx_compiler_gnu+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether the compiler supports GNU C++" >&5 -+printf %s "checking whether the compiler supports GNU C++... " >&6; } -+if test ${ac_cv_cxx_compiler_gnu+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - #ifndef __GNUC__ - choke me -@@ -4724,29 +5562,33 @@ main () - return 0; - } - _ACEOF --if ac_fn_cxx_try_compile "$LINENO"; then : -+if ac_fn_cxx_try_compile "$LINENO" -+then : - ac_compiler_gnu=yes --else -+else $as_nop - ac_compiler_gnu=no - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - ac_cv_cxx_compiler_gnu=$ac_compiler_gnu - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_cxx_compiler_gnu" >&5 --$as_echo "$ac_cv_cxx_compiler_gnu" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_cxx_compiler_gnu" >&5 -+printf "%s\n" "$ac_cv_cxx_compiler_gnu" >&6; } -+ac_compiler_gnu=$ac_cv_cxx_compiler_gnu -+ - if test $ac_compiler_gnu = yes; then - GXX=yes - else - GXX= - fi --ac_test_CXXFLAGS=${CXXFLAGS+set} -+ac_test_CXXFLAGS=${CXXFLAGS+y} - ac_save_CXXFLAGS=$CXXFLAGS --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $CXX accepts -g" >&5 --$as_echo_n "checking whether $CXX accepts -g... " >&6; } --if ${ac_cv_prog_cxx_g+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether $CXX accepts -g" >&5 -+printf %s "checking whether $CXX accepts -g... " >&6; } -+if test ${ac_cv_prog_cxx_g+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - ac_save_cxx_werror_flag=$ac_cxx_werror_flag - ac_cxx_werror_flag=yes - ac_cv_prog_cxx_g=no -@@ -4755,57 +5597,60 @@ else - /* end confdefs.h. */ - - int --main () -+main (void) - { - - ; - return 0; - } - _ACEOF --if ac_fn_cxx_try_compile "$LINENO"; then : -+if ac_fn_cxx_try_compile "$LINENO" -+then : - ac_cv_prog_cxx_g=yes --else -+else $as_nop - CXXFLAGS="" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - ; - return 0; - } - _ACEOF --if ac_fn_cxx_try_compile "$LINENO"; then : -+if ac_fn_cxx_try_compile "$LINENO" -+then : - --else -+else $as_nop - ac_cxx_werror_flag=$ac_save_cxx_werror_flag - CXXFLAGS="-g" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - ; - return 0; - } - _ACEOF --if ac_fn_cxx_try_compile "$LINENO"; then : -+if ac_fn_cxx_try_compile "$LINENO" -+then : - ac_cv_prog_cxx_g=yes - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - ac_cxx_werror_flag=$ac_save_cxx_werror_flag - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cxx_g" >&5 --$as_echo "$ac_cv_prog_cxx_g" >&6; } --if test "$ac_test_CXXFLAGS" = set; then -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cxx_g" >&5 -+printf "%s\n" "$ac_cv_prog_cxx_g" >&6; } -+if test $ac_test_CXXFLAGS; then - CXXFLAGS=$ac_save_CXXFLAGS - elif test $ac_cv_prog_cxx_g = yes; then - if test "$GXX" = yes; then -@@ -4820,6 +5665,100 @@ else - CXXFLAGS= - fi - fi -+ac_prog_cxx_stdcxx=no -+if test x$ac_prog_cxx_stdcxx = xno -+then : -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $CXX option to enable C++11 features" >&5 -+printf %s "checking for $CXX option to enable C++11 features... " >&6; } -+if test ${ac_cv_prog_cxx_11+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop -+ ac_cv_prog_cxx_11=no -+ac_save_CXX=$CXX -+cat confdefs.h - <<_ACEOF >conftest.$ac_ext -+/* end confdefs.h. */ -+$ac_cxx_conftest_cxx11_program -+_ACEOF -+for ac_arg in '' -std=gnu++11 -std=gnu++0x -std=c++11 -std=c++0x -qlanglvl=extended0x -AA -+do -+ CXX="$ac_save_CXX $ac_arg" -+ if ac_fn_cxx_try_compile "$LINENO" -+then : -+ ac_cv_prog_cxx_cxx11=$ac_arg -+fi -+rm -f core conftest.err conftest.$ac_objext conftest.beam -+ test "x$ac_cv_prog_cxx_cxx11" != "xno" && break -+done -+rm -f conftest.$ac_ext -+CXX=$ac_save_CXX -+fi -+ -+if test "x$ac_cv_prog_cxx_cxx11" = xno -+then : -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5 -+printf "%s\n" "unsupported" >&6; } -+else $as_nop -+ if test "x$ac_cv_prog_cxx_cxx11" = x -+then : -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: none needed" >&5 -+printf "%s\n" "none needed" >&6; } -+else $as_nop -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cxx_cxx11" >&5 -+printf "%s\n" "$ac_cv_prog_cxx_cxx11" >&6; } -+ CXX="$CXX $ac_cv_prog_cxx_cxx11" -+fi -+ ac_cv_prog_cxx_stdcxx=$ac_cv_prog_cxx_cxx11 -+ ac_prog_cxx_stdcxx=cxx11 -+fi -+fi -+if test x$ac_prog_cxx_stdcxx = xno -+then : -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $CXX option to enable C++98 features" >&5 -+printf %s "checking for $CXX option to enable C++98 features... " >&6; } -+if test ${ac_cv_prog_cxx_98+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop -+ ac_cv_prog_cxx_98=no -+ac_save_CXX=$CXX -+cat confdefs.h - <<_ACEOF >conftest.$ac_ext -+/* end confdefs.h. */ -+$ac_cxx_conftest_cxx98_program -+_ACEOF -+for ac_arg in '' -std=gnu++98 -std=c++98 -qlanglvl=extended -AA -+do -+ CXX="$ac_save_CXX $ac_arg" -+ if ac_fn_cxx_try_compile "$LINENO" -+then : -+ ac_cv_prog_cxx_cxx98=$ac_arg -+fi -+rm -f core conftest.err conftest.$ac_objext conftest.beam -+ test "x$ac_cv_prog_cxx_cxx98" != "xno" && break -+done -+rm -f conftest.$ac_ext -+CXX=$ac_save_CXX -+fi -+ -+if test "x$ac_cv_prog_cxx_cxx98" = xno -+then : -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5 -+printf "%s\n" "unsupported" >&6; } -+else $as_nop -+ if test "x$ac_cv_prog_cxx_cxx98" = x -+then : -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: none needed" >&5 -+printf "%s\n" "none needed" >&6; } -+else $as_nop -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cxx_cxx98" >&5 -+printf "%s\n" "$ac_cv_prog_cxx_cxx98" >&6; } -+ CXX="$CXX $ac_cv_prog_cxx_cxx98" -+fi -+ ac_cv_prog_cxx_stdcxx=$ac_cv_prog_cxx_cxx98 -+ ac_prog_cxx_stdcxx=cxx98 -+fi -+fi -+ - ac_ext=c - ac_cpp='$CPP $CPPFLAGS' - ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' -@@ -4828,11 +5767,12 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu - - depcc="$CXX" am_compiler_list= - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking dependency style of $depcc" >&5 --$as_echo_n "checking dependency style of $depcc... " >&6; } --if ${am_cv_CXX_dependencies_compiler_type+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking dependency style of $depcc" >&5 -+printf %s "checking dependency style of $depcc... " >&6; } -+if test ${am_cv_CXX_dependencies_compiler_type+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -z "$AMDEP_TRUE" && test -f "$am_depcomp"; then - # We make a subdir and do the tests there. Otherwise we can end up - # making bogus files that we don't know about and never remove. For -@@ -4939,8 +5879,8 @@ else - fi - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $am_cv_CXX_dependencies_compiler_type" >&5 --$as_echo "$am_cv_CXX_dependencies_compiler_type" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $am_cv_CXX_dependencies_compiler_type" >&5 -+printf "%s\n" "$am_cv_CXX_dependencies_compiler_type" >&6; } - CXXDEPMODE=depmode=$am_cv_CXX_dependencies_compiler_type - - if -@@ -4970,11 +5910,12 @@ fi - if test -n "$ac_tool_prefix"; then - # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. - set dummy ${ac_tool_prefix}ranlib; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_prog_RANLIB+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_prog_RANLIB+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -n "$RANLIB"; then - ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. - else -@@ -4982,11 +5923,15 @@ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then - ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -4997,11 +5942,11 @@ fi - fi - RANLIB=$ac_cv_prog_RANLIB - if test -n "$RANLIB"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $RANLIB" >&5 --$as_echo "$RANLIB" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $RANLIB" >&5 -+printf "%s\n" "$RANLIB" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - -@@ -5010,11 +5955,12 @@ if test -z "$ac_cv_prog_RANLIB"; then - ac_ct_RANLIB=$RANLIB - # Extract the first word of "ranlib", so it can be a program name with args. - set dummy ranlib; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_prog_ac_ct_RANLIB+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_prog_ac_ct_RANLIB+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -n "$ac_ct_RANLIB"; then - ac_cv_prog_ac_ct_RANLIB="$ac_ct_RANLIB" # Let the user override the test. - else -@@ -5022,11 +5968,15 @@ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then - ac_cv_prog_ac_ct_RANLIB="ranlib" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -5037,11 +5987,11 @@ fi - fi - ac_ct_RANLIB=$ac_cv_prog_ac_ct_RANLIB - if test -n "$ac_ct_RANLIB"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_RANLIB" >&5 --$as_echo "$ac_ct_RANLIB" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_ct_RANLIB" >&5 -+printf "%s\n" "$ac_ct_RANLIB" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - if test "x$ac_ct_RANLIB" = x; then -@@ -5049,8 +5999,8 @@ fi - else - case $cross_compiling:$ac_tool_warned in - yes:) --{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 --$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 -+printf "%s\n" "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} - ac_tool_warned=yes ;; - esac - RANLIB=$ac_ct_RANLIB -@@ -5065,11 +6015,12 @@ if test "x$LTO_RANLIB" = "x"; then - do - # Extract the first word of "$ac_prog", so it can be a program name with args. - set dummy $ac_prog; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_path_LTO_RANLIB+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_path_LTO_RANLIB+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - case $LTO_RANLIB in - [\\/]* | ?:[\\/]*) - ac_cv_path_LTO_RANLIB="$LTO_RANLIB" # Let the user override the test with a path. -@@ -5079,11 +6030,15 @@ else - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -- ac_cv_path_LTO_RANLIB="$as_dir/$ac_word$ac_exec_ext" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then -+ ac_cv_path_LTO_RANLIB="$as_dir$ac_word$ac_exec_ext" -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -5095,11 +6050,11 @@ esac - fi - LTO_RANLIB=$ac_cv_path_LTO_RANLIB - if test -n "$LTO_RANLIB"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $LTO_RANLIB" >&5 --$as_echo "$LTO_RANLIB" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $LTO_RANLIB" >&5 -+printf "%s\n" "$LTO_RANLIB" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - -@@ -5112,11 +6067,12 @@ fi - # provide a very basic definition for AC_PROG_SED if it's not provided by - # autoconf (as e.g. in autoconf 2.59). - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for a sed that does not truncate output" >&5 --$as_echo_n "checking for a sed that does not truncate output... " >&6; } --if ${ac_cv_path_SED+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for a sed that does not truncate output" >&5 -+printf %s "checking for a sed that does not truncate output... " >&6; } -+if test ${ac_cv_path_SED+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - ac_script=s/aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa/bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb/ - for ac_i in 1 2 3 4 5 6 7; do - ac_script="$ac_script$as_nl$ac_script" -@@ -5130,10 +6086,15 @@ else - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -- for ac_prog in sed gsed; do -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac -+ for ac_prog in sed gsed -+ do - for ac_exec_ext in '' $ac_executable_extensions; do -- ac_path_SED="$as_dir/$ac_prog$ac_exec_ext" -+ ac_path_SED="$as_dir$ac_prog$ac_exec_ext" - as_fn_executable_p "$ac_path_SED" || continue - # Check for GNU ac_path_SED and select it if it is found. - # Check for GNU $ac_path_SED -@@ -5142,13 +6103,13 @@ case `"$ac_path_SED" --version 2>&1` in - ac_cv_path_SED="$ac_path_SED" ac_path_SED_found=:;; - *) - ac_count=0 -- $as_echo_n 0123456789 >"conftest.in" -+ printf %s 0123456789 >"conftest.in" - while : - do - cat "conftest.in" "conftest.in" >"conftest.tmp" - mv "conftest.tmp" "conftest.in" - cp "conftest.in" "conftest.nl" -- $as_echo '' >> "conftest.nl" -+ printf "%s\n" '' >> "conftest.nl" - "$ac_path_SED" -f conftest.sed < "conftest.nl" >"conftest.out" 2>/dev/null || break - diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break - as_fn_arith $ac_count + 1 && ac_count=$as_val -@@ -5176,8 +6137,8 @@ else - fi - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_SED" >&5 --$as_echo "$ac_cv_path_SED" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_SED" >&5 -+printf "%s\n" "$ac_cv_path_SED" >&6; } - SED="$ac_cv_path_SED" - rm -f conftest.sed - -@@ -5189,11 +6150,12 @@ if test "x$AR" = "x"; then - do - # Extract the first word of "$ac_prog", so it can be a program name with args. - set dummy $ac_prog; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_path_AR+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_path_AR+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - case $AR in - [\\/]* | ?:[\\/]*) - ac_cv_path_AR="$AR" # Let the user override the test with a path. -@@ -5203,11 +6165,15 @@ else - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -- ac_cv_path_AR="$as_dir/$ac_word$ac_exec_ext" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then -+ ac_cv_path_AR="$as_dir$ac_word$ac_exec_ext" -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -5219,11 +6185,11 @@ esac - fi - AR=$ac_cv_path_AR - if test -n "$AR"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5 --$as_echo "$AR" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $AR" >&5 -+printf "%s\n" "$AR" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - -@@ -5240,11 +6206,12 @@ if test "x$LTO_AR" = "x"; then - do - # Extract the first word of "$ac_prog", so it can be a program name with args. - set dummy $ac_prog; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_path_LTO_AR+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_path_LTO_AR+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - case $LTO_AR in - [\\/]* | ?:[\\/]*) - ac_cv_path_LTO_AR="$LTO_AR" # Let the user override the test with a path. -@@ -5254,11 +6221,15 @@ else - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -- ac_cv_path_LTO_AR="$as_dir/$ac_word$ac_exec_ext" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then -+ ac_cv_path_LTO_AR="$as_dir$ac_word$ac_exec_ext" -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -5270,11 +6241,11 @@ esac - fi - LTO_AR=$ac_cv_path_LTO_AR - if test -n "$LTO_AR"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $LTO_AR" >&5 --$as_echo "$LTO_AR" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $LTO_AR" >&5 -+printf "%s\n" "$LTO_AR" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - -@@ -5293,11 +6264,12 @@ fi - # figure out where perl lives - # Extract the first word of "perl", so it can be a program name with args. - set dummy perl; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_path_PERL+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_path_PERL+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - case $PERL in - [\\/]* | ?:[\\/]*) - ac_cv_path_PERL="$PERL" # Let the user override the test with a path. -@@ -5307,11 +6279,15 @@ else - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -- ac_cv_path_PERL="$as_dir/$ac_word$ac_exec_ext" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then -+ ac_cv_path_PERL="$as_dir$ac_word$ac_exec_ext" -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -5323,11 +6299,11 @@ esac - fi - PERL=$ac_cv_path_PERL - if test -n "$PERL"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $PERL" >&5 --$as_echo "$PERL" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $PERL" >&5 -+printf "%s\n" "$PERL" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - -@@ -5335,11 +6311,12 @@ fi - # figure out where gdb lives - # Extract the first word of "gdb", so it can be a program name with args. - set dummy gdb; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_path_GDB+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_path_GDB+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - case $GDB in - [\\/]* | ?:[\\/]*) - ac_cv_path_GDB="$GDB" # Let the user override the test with a path. -@@ -5349,11 +6326,15 @@ else - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -- ac_cv_path_GDB="$as_dir/$ac_word$ac_exec_ext" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then -+ ac_cv_path_GDB="$as_dir$ac_word$ac_exec_ext" -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -5366,18 +6347,16 @@ esac - fi - GDB=$ac_cv_path_GDB - if test -n "$GDB"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $GDB" >&5 --$as_echo "$GDB" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $GDB" >&5 -+printf "%s\n" "$GDB" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - - --cat >>confdefs.h <<_ACEOF --#define GDB_PATH "$GDB" --_ACEOF -+printf "%s\n" "#define GDB_PATH \"$GDB\"" >>confdefs.h - - - # some older automake's don't have it so try something on our own -@@ -5390,11 +6369,12 @@ test "${CCASFLAGS+set}" = set || CCASFLAGS=$CFLAGS - - depcc="$CCAS" am_compiler_list= - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking dependency style of $depcc" >&5 --$as_echo_n "checking dependency style of $depcc... " >&6; } --if ${am_cv_CCAS_dependencies_compiler_type+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking dependency style of $depcc" >&5 -+printf %s "checking dependency style of $depcc... " >&6; } -+if test ${am_cv_CCAS_dependencies_compiler_type+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -z "$AMDEP_TRUE" && test -f "$am_depcomp"; then - # We make a subdir and do the tests there. Otherwise we can end up - # making bogus files that we don't know about and never remove. For -@@ -5499,8 +6479,8 @@ else - fi - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $am_cv_CCAS_dependencies_compiler_type" >&5 --$as_echo "$am_cv_CCAS_dependencies_compiler_type" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $am_cv_CCAS_dependencies_compiler_type" >&5 -+printf "%s\n" "$am_cv_CCAS_dependencies_compiler_type" >&6; } - CCASDEPMODE=depmode=$am_cv_CCAS_dependencies_compiler_type - - if -@@ -5518,209 +6498,33 @@ fi - - # Check if 'diff' supports -u (universal diffs) and use it if possible. - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for diff -u" >&5 --$as_echo_n "checking for diff -u... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for diff -u" >&5 -+printf %s "checking for diff -u... " >&6; } - - - # Comparing two identical files results in 0. - tmpfile="tmp-xxx-yyy-zzz" - touch $tmpfile; - if diff -u $tmpfile $tmpfile ; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - DIFF="diff -u" - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - DIFF="diff" - fi - rm $tmpfile - - # Make sure we can compile in C99 mode. -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $CC option to accept ISO C99" >&5 --$as_echo_n "checking for $CC option to accept ISO C99... " >&6; } --if ${ac_cv_prog_cc_c99+:} false; then : -- $as_echo_n "(cached) " >&6 --else -- ac_cv_prog_cc_c99=no --ac_save_CC=$CC --cat confdefs.h - <<_ACEOF >conftest.$ac_ext --/* end confdefs.h. */ --#include --#include --#include --#include --#include -- --// Check varargs macros. These examples are taken from C99 6.10.3.5. --#define debug(...) fprintf (stderr, __VA_ARGS__) --#define showlist(...) puts (#__VA_ARGS__) --#define report(test,...) ((test) ? puts (#test) : printf (__VA_ARGS__)) --static void --test_varargs_macros (void) --{ -- int x = 1234; -- int y = 5678; -- debug ("Flag"); -- debug ("X = %d\n", x); -- showlist (The first, second, and third items.); -- report (x>y, "x is %d but y is %d", x, y); --} -- --// Check long long types. --#define BIG64 18446744073709551615ull --#define BIG32 4294967295ul --#define BIG_OK (BIG64 / BIG32 == 4294967297ull && BIG64 % BIG32 == 0) --#if !BIG_OK -- your preprocessor is broken; --#endif --#if BIG_OK --#else -- your preprocessor is broken; --#endif --static long long int bignum = -9223372036854775807LL; --static unsigned long long int ubignum = BIG64; -- --struct incomplete_array --{ -- int datasize; -- double data[]; --}; -- --struct named_init { -- int number; -- const wchar_t *name; -- double average; --}; -- --typedef const char *ccp; -- --static inline int --test_restrict (ccp restrict text) --{ -- // See if C++-style comments work. -- // Iterate through items via the restricted pointer. -- // Also check for declarations in for loops. -- for (unsigned int i = 0; *(text+i) != '\0'; ++i) -- continue; -- return 0; --} -- --// Check varargs and va_copy. --static void --test_varargs (const char *format, ...) --{ -- va_list args; -- va_start (args, format); -- va_list args_copy; -- va_copy (args_copy, args); -- -- const char *str; -- int number; -- float fnumber; -- -- while (*format) -- { -- switch (*format++) -- { -- case 's': // string -- str = va_arg (args_copy, const char *); -- break; -- case 'd': // int -- number = va_arg (args_copy, int); -- break; -- case 'f': // float -- fnumber = va_arg (args_copy, double); -- break; -- default: -- break; -- } -- } -- va_end (args_copy); -- va_end (args); --} -- --int --main () --{ -- -- // Check bool. -- _Bool success = false; -- -- // Check restrict. -- if (test_restrict ("String literal") == 0) -- success = true; -- char *restrict newvar = "Another string"; -- -- // Check varargs. -- test_varargs ("s, d' f .", "string", 65, 34.234); -- test_varargs_macros (); -- -- // Check flexible array members. -- struct incomplete_array *ia = -- malloc (sizeof (struct incomplete_array) + (sizeof (double) * 10)); -- ia->datasize = 10; -- for (int i = 0; i < ia->datasize; ++i) -- ia->data[i] = i * 1.234; -- -- // Check named initializers. -- struct named_init ni = { -- .number = 34, -- .name = L"Test wide string", -- .average = 543.34343, -- }; -- -- ni.number = 58; -- -- int dynamic_array[ni.number]; -- dynamic_array[ni.number - 1] = 543; -- -- // work around unused variable warnings -- return (!success || bignum == 0LL || ubignum == 0uLL || newvar[0] == 'x' -- || dynamic_array[ni.number - 1] != 543); -- -- ; -- return 0; --} --_ACEOF --for ac_arg in '' -std=gnu99 -std=c99 -c99 -AC99 -D_STDC_C99= -qlanglvl=extc99 --do -- CC="$ac_save_CC $ac_arg" -- if ac_fn_c_try_compile "$LINENO"; then : -- ac_cv_prog_cc_c99=$ac_arg --fi --rm -f core conftest.err conftest.$ac_objext -- test "x$ac_cv_prog_cc_c99" != "xno" && break --done --rm -f conftest.$ac_ext --CC=$ac_save_CC -- --fi --# AC_CACHE_VAL --case "x$ac_cv_prog_cc_c99" in -- x) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: none needed" >&5 --$as_echo "none needed" >&6; } ;; -- xno) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5 --$as_echo "unsupported" >&6; } ;; -- *) -- CC="$CC $ac_cv_prog_cc_c99" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c99" >&5 --$as_echo "$ac_cv_prog_cc_c99" >&6; } ;; --esac --if test "x$ac_cv_prog_cc_c99" != xno; then : -- --fi -- - - if test "$ac_cv_prog_cc_c99" == "no"; then - as_fn_error $? "Valgrind relies on a C compiler supporting C99" "$LINENO" 5 - fi - - # We don't want gcc < 3.0 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for a supported version of gcc" >&5 --$as_echo_n "checking for a supported version of gcc... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for a supported version of gcc" >&5 -+printf %s "checking for a supported version of gcc... " >&6; } - - # Obtain the compiler version. - # -@@ -5787,24 +6591,24 @@ fi - # statements have to be quoted. - case "${is_clang}-${gcc_version}" in - applellvm-5.1|applellvm-[6-9].*|applellvm-[1-9][0-9]*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (Apple LLVM version ${gcc_version})" >&5 --$as_echo "ok (Apple LLVM version ${gcc_version})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (Apple LLVM version ${gcc_version})" >&5 -+printf "%s\n" "ok (Apple LLVM version ${gcc_version})" >&6; } - ;; - icc-1[3-9].*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (ICC version ${gcc_version})" >&5 --$as_echo "ok (ICC version ${gcc_version})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (ICC version ${gcc_version})" >&5 -+printf "%s\n" "ok (ICC version ${gcc_version})" >&6; } - ;; - notclang-[3-9]|notclang-[3-9].*|notclang-[1-9][0-9]*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${gcc_version})" >&5 --$as_echo "ok (${gcc_version})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${gcc_version})" >&5 -+printf "%s\n" "ok (${gcc_version})" >&6; } - ;; - clang-2.9|clang-[3-9].*|clang-[1-9][0-9]*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (clang-${gcc_version})" >&5 --$as_echo "ok (clang-${gcc_version})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (clang-${gcc_version})" >&5 -+printf "%s\n" "ok (clang-${gcc_version})" >&6; } - ;; - *) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no (${is_clang}-${gcc_version})" >&5 --$as_echo "no (${is_clang}-${gcc_version})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no (${is_clang}-${gcc_version})" >&5 -+printf "%s\n" "no (${is_clang}-${gcc_version})" >&6; } - as_fn_error $? "please use gcc >= 3.0 or clang >= 2.9 or icc >= 13.0 or Apple LLVM >= 5.1" "$LINENO" 5 - ;; - esac -@@ -5817,26 +6621,29 @@ esac - # configure-time, and distinguishes them from the VGA_*/VGO_*/VGP_* - # variables used when compiling C files. - --# Make sure we can run config.sub. --$SHELL "$ac_aux_dir/config.sub" sun4 >/dev/null 2>&1 || -- as_fn_error $? "cannot run $SHELL $ac_aux_dir/config.sub" "$LINENO" 5 - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking build system type" >&5 --$as_echo_n "checking build system type... " >&6; } --if ${ac_cv_build+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+ -+ # Make sure we can run config.sub. -+$SHELL "${ac_aux_dir}config.sub" sun4 >/dev/null 2>&1 || -+ as_fn_error $? "cannot run $SHELL ${ac_aux_dir}config.sub" "$LINENO" 5 -+ -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking build system type" >&5 -+printf %s "checking build system type... " >&6; } -+if test ${ac_cv_build+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - ac_build_alias=$build_alias - test "x$ac_build_alias" = x && -- ac_build_alias=`$SHELL "$ac_aux_dir/config.guess"` -+ ac_build_alias=`$SHELL "${ac_aux_dir}config.guess"` - test "x$ac_build_alias" = x && - as_fn_error $? "cannot guess build type; you must specify one" "$LINENO" 5 --ac_cv_build=`$SHELL "$ac_aux_dir/config.sub" $ac_build_alias` || -- as_fn_error $? "$SHELL $ac_aux_dir/config.sub $ac_build_alias failed" "$LINENO" 5 -+ac_cv_build=`$SHELL "${ac_aux_dir}config.sub" $ac_build_alias` || -+ as_fn_error $? "$SHELL ${ac_aux_dir}config.sub $ac_build_alias failed" "$LINENO" 5 - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_build" >&5 --$as_echo "$ac_cv_build" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_build" >&5 -+printf "%s\n" "$ac_cv_build" >&6; } - case $ac_cv_build in - *-*-*) ;; - *) as_fn_error $? "invalid value of canonical build" "$LINENO" 5;; -@@ -5855,21 +6662,22 @@ IFS=$ac_save_IFS - case $build_os in *\ *) build_os=`echo "$build_os" | sed 's/ /-/g'`;; esac - - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking host system type" >&5 --$as_echo_n "checking host system type... " >&6; } --if ${ac_cv_host+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking host system type" >&5 -+printf %s "checking host system type... " >&6; } -+if test ${ac_cv_host+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test "x$host_alias" = x; then - ac_cv_host=$ac_cv_build - else -- ac_cv_host=`$SHELL "$ac_aux_dir/config.sub" $host_alias` || -- as_fn_error $? "$SHELL $ac_aux_dir/config.sub $host_alias failed" "$LINENO" 5 -+ ac_cv_host=`$SHELL "${ac_aux_dir}config.sub" $host_alias` || -+ as_fn_error $? "$SHELL ${ac_aux_dir}config.sub $host_alias failed" "$LINENO" 5 - fi - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_host" >&5 --$as_echo "$ac_cv_host" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_host" >&5 -+printf "%s\n" "$ac_cv_host" >&6; } - case $ac_cv_host in - *-*-*) ;; - *) as_fn_error $? "invalid value of canonical host" "$LINENO" 5;; -@@ -5889,8 +6697,8 @@ case $host_os in *\ *) host_os=`echo "$host_os" | sed 's/ /-/g'`;; esac - - - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for a supported CPU" >&5 --$as_echo_n "checking for a supported CPU... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for a supported CPU" >&5 -+printf %s "checking for a supported CPU... " >&6; } - - # ARCH_MAX reflects the most that this CPU can do: for example if it - # is a 64-bit capable PowerPC, then it must be set to ppc64 and not ppc32. -@@ -5910,94 +6718,100 @@ $as_echo_n "checking for a supported CPU... " >&6; } - - case "${host_cpu}" in - i?86) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 --$as_echo "ok (${host_cpu})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 -+printf "%s\n" "ok (${host_cpu})" >&6; } - ARCH_MAX="x86" - ;; - - x86_64) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 --$as_echo "ok (${host_cpu})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 -+printf "%s\n" "ok (${host_cpu})" >&6; } - ARCH_MAX="amd64" - ;; - - powerpc64) - # this only referrs to 64-bit Big Endian -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 --$as_echo "ok (${host_cpu})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 -+printf "%s\n" "ok (${host_cpu})" >&6; } - ARCH_MAX="ppc64be" - ;; - - powerpc64le) - # this only referrs to 64-bit Little Endian -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 --$as_echo "ok (${host_cpu})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 -+printf "%s\n" "ok (${host_cpu})" >&6; } - ARCH_MAX="ppc64le" - ;; - - powerpc) - # On Linux this means only a 32-bit capable CPU. -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 --$as_echo "ok (${host_cpu})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 -+printf "%s\n" "ok (${host_cpu})" >&6; } - ARCH_MAX="ppc32" - ;; - - s390x) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 --$as_echo "ok (${host_cpu})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 -+printf "%s\n" "ok (${host_cpu})" >&6; } - ARCH_MAX="s390x" - ;; - - armv7*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 --$as_echo "ok (${host_cpu})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 -+printf "%s\n" "ok (${host_cpu})" >&6; } - ARCH_MAX="arm" - ;; - - aarch64*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 --$as_echo "ok (${host_cpu})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 -+printf "%s\n" "ok (${host_cpu})" >&6; } - ARCH_MAX="arm64" - ;; - - mips) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 --$as_echo "ok (${host_cpu})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 -+printf "%s\n" "ok (${host_cpu})" >&6; } - ARCH_MAX="mips32" - ;; - - mipsel) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 --$as_echo "ok (${host_cpu})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 -+printf "%s\n" "ok (${host_cpu})" >&6; } - ARCH_MAX="mips32" - ;; - - mipsisa32r2) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 --$as_echo "ok (${host_cpu})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 -+printf "%s\n" "ok (${host_cpu})" >&6; } - ARCH_MAX="mips32" - ;; - - mips64*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 --$as_echo "ok (${host_cpu})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 -+printf "%s\n" "ok (${host_cpu})" >&6; } - ARCH_MAX="mips64" - ;; - - mipsisa64*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 --$as_echo "ok (${host_cpu})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 -+printf "%s\n" "ok (${host_cpu})" >&6; } - ARCH_MAX="mips64" - ;; - nanomips) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 --$as_echo "ok (${host_cpu})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 -+printf "%s\n" "ok (${host_cpu})" >&6; } - ARCH_MAX="nanomips" - ;; - -+ loongarch64*) -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 -+printf "%s\n" "ok (${host_cpu})" >&6; } -+ ARCH_MAX="loongarch64" -+ ;; -+ - *) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no (${host_cpu})" >&5 --$as_echo "no (${host_cpu})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no (${host_cpu})" >&5 -+printf "%s\n" "no (${host_cpu})" >&6; } - as_fn_error $? "Unsupported host architecture. Sorry" "$LINENO" 5 - ;; - esac -@@ -6013,38 +6827,42 @@ esac - # used. --njn] - - # Check if a 64-bit only build has been requested --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for a 64-bit only build" >&5 --$as_echo_n "checking for a 64-bit only build... " >&6; } --if ${vg_cv_only64bit+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for a 64-bit only build" >&5 -+printf %s "checking for a 64-bit only build... " >&6; } -+if test ${vg_cv_only64bit+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - # Check whether --enable-only64bit was given. --if test "${enable_only64bit+set}" = set; then : -+if test ${enable_only64bit+y} -+then : - enableval=$enable_only64bit; vg_cv_only64bit=$enableval --else -+else $as_nop - vg_cv_only64bit=no - fi - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $vg_cv_only64bit" >&5 --$as_echo "$vg_cv_only64bit" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $vg_cv_only64bit" >&5 -+printf "%s\n" "$vg_cv_only64bit" >&6; } - - # Check if a 32-bit only build has been requested --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for a 32-bit only build" >&5 --$as_echo_n "checking for a 32-bit only build... " >&6; } --if ${vg_cv_only32bit+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for a 32-bit only build" >&5 -+printf %s "checking for a 32-bit only build... " >&6; } -+if test ${vg_cv_only32bit+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - # Check whether --enable-only32bit was given. --if test "${enable_only32bit+set}" = set; then : -+if test ${enable_only32bit+y} -+then : - enableval=$enable_only32bit; vg_cv_only32bit=$enableval --else -+else $as_nop - vg_cv_only32bit=no - fi - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $vg_cv_only32bit" >&5 --$as_echo "$vg_cv_only32bit" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $vg_cv_only32bit" >&5 -+printf "%s\n" "$vg_cv_only32bit" >&6; } - - # Stay sane - if test x$vg_cv_only64bit = xyes -a x$vg_cv_only32bit = xyes; then -@@ -6056,73 +6874,73 @@ fi - # VGCONF_OS is the primary build OS, eg. "linux". It is passed in to - # compilation of many C files via -VGO_$(VGCONF_OS) and - # -VGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS). --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for a supported OS" >&5 --$as_echo_n "checking for a supported OS... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for a supported OS" >&5 -+printf %s "checking for a supported OS... " >&6; } - - - DEFAULT_SUPP="" - - case "${host_os}" in - *linux*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_os})" >&5 --$as_echo "ok (${host_os})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_os})" >&5 -+printf "%s\n" "ok (${host_os})" >&6; } - VGCONF_OS="linux" - - # Ok, this is linux. Check the kernel version -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking for the kernel version" >&5 --$as_echo_n "checking for the kernel version... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the kernel version" >&5 -+printf %s "checking for the kernel version... " >&6; } - - kernel=`uname -r` - - case "${kernel}" in - 0.*|1.*|2.0.*|2.1.*|2.2.*|2.3.*|2.4.*|2.5.*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: unsupported (${kernel})" >&5 --$as_echo "unsupported (${kernel})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: unsupported (${kernel})" >&5 -+printf "%s\n" "unsupported (${kernel})" >&6; } - as_fn_error $? "Valgrind needs a Linux kernel >= 2.6" "$LINENO" 5 - ;; - - *) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: 2.6 or later (${kernel})" >&5 --$as_echo "2.6 or later (${kernel})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: 2.6 or later (${kernel})" >&5 -+printf "%s\n" "2.6 or later (${kernel})" >&6; } - ;; - esac - - ;; - - *darwin*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_os})" >&5 --$as_echo "ok (${host_os})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_os})" >&5 -+printf "%s\n" "ok (${host_os})" >&6; } - VGCONF_OS="darwin" - --$as_echo "#define DARWIN_10_5 100500" >>confdefs.h -+printf "%s\n" "#define DARWIN_10_5 100500" >>confdefs.h - - --$as_echo "#define DARWIN_10_6 100600" >>confdefs.h -+printf "%s\n" "#define DARWIN_10_6 100600" >>confdefs.h - - --$as_echo "#define DARWIN_10_7 100700" >>confdefs.h -+printf "%s\n" "#define DARWIN_10_7 100700" >>confdefs.h - - --$as_echo "#define DARWIN_10_8 100800" >>confdefs.h -+printf "%s\n" "#define DARWIN_10_8 100800" >>confdefs.h - - --$as_echo "#define DARWIN_10_9 100900" >>confdefs.h -+printf "%s\n" "#define DARWIN_10_9 100900" >>confdefs.h - - --$as_echo "#define DARWIN_10_10 101000" >>confdefs.h -+printf "%s\n" "#define DARWIN_10_10 101000" >>confdefs.h - - --$as_echo "#define DARWIN_10_11 101100" >>confdefs.h -+printf "%s\n" "#define DARWIN_10_11 101100" >>confdefs.h - - --$as_echo "#define DARWIN_10_12 101200" >>confdefs.h -+printf "%s\n" "#define DARWIN_10_12 101200" >>confdefs.h - - --$as_echo "#define DARWIN_10_13 101300" >>confdefs.h -+printf "%s\n" "#define DARWIN_10_13 101300" >>confdefs.h - - -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking for the kernel version" >&5 --$as_echo_n "checking for the kernel version... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the kernel version" >&5 -+printf %s "checking for the kernel version... " >&6; } - kernel=`uname -r` - - # Nb: for Darwin we set DEFAULT_SUPP here. That's because Darwin -@@ -6143,97 +6961,97 @@ $as_echo_n "checking for the kernel version... " >&6; } - # assuming that 3.7.0 is a Snow Leopard and Lion-only release. - case "${kernel}" in - 9.*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: Darwin 9.x (${kernel}) / Mac OS X 10.5 Leopard" >&5 --$as_echo "Darwin 9.x (${kernel}) / Mac OS X 10.5 Leopard" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Darwin 9.x (${kernel}) / Mac OS X 10.5 Leopard" >&5 -+printf "%s\n" "Darwin 9.x (${kernel}) / Mac OS X 10.5 Leopard" >&6; } - --$as_echo "#define DARWIN_VERS DARWIN_10_5" >>confdefs.h -+printf "%s\n" "#define DARWIN_VERS DARWIN_10_5" >>confdefs.h - - DEFAULT_SUPP="darwin9.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="darwin9-drd.supp ${DEFAULT_SUPP}" - ;; - 10.*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: Darwin 10.x (${kernel}) / Mac OS X 10.6 Snow Leopard" >&5 --$as_echo "Darwin 10.x (${kernel}) / Mac OS X 10.6 Snow Leopard" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Darwin 10.x (${kernel}) / Mac OS X 10.6 Snow Leopard" >&5 -+printf "%s\n" "Darwin 10.x (${kernel}) / Mac OS X 10.6 Snow Leopard" >&6; } - --$as_echo "#define DARWIN_VERS DARWIN_10_6" >>confdefs.h -+printf "%s\n" "#define DARWIN_VERS DARWIN_10_6" >>confdefs.h - - DEFAULT_SUPP="darwin10.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="darwin10-drd.supp ${DEFAULT_SUPP}" - ;; - 11.*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: Darwin 11.x (${kernel}) / Mac OS X 10.7 Lion" >&5 --$as_echo "Darwin 11.x (${kernel}) / Mac OS X 10.7 Lion" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Darwin 11.x (${kernel}) / Mac OS X 10.7 Lion" >&5 -+printf "%s\n" "Darwin 11.x (${kernel}) / Mac OS X 10.7 Lion" >&6; } - --$as_echo "#define DARWIN_VERS DARWIN_10_7" >>confdefs.h -+printf "%s\n" "#define DARWIN_VERS DARWIN_10_7" >>confdefs.h - - DEFAULT_SUPP="darwin11.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="darwin10-drd.supp ${DEFAULT_SUPP}" - ;; - 12.*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: Darwin 12.x (${kernel}) / Mac OS X 10.8 Mountain Lion" >&5 --$as_echo "Darwin 12.x (${kernel}) / Mac OS X 10.8 Mountain Lion" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Darwin 12.x (${kernel}) / Mac OS X 10.8 Mountain Lion" >&5 -+printf "%s\n" "Darwin 12.x (${kernel}) / Mac OS X 10.8 Mountain Lion" >&6; } - --$as_echo "#define DARWIN_VERS DARWIN_10_8" >>confdefs.h -+printf "%s\n" "#define DARWIN_VERS DARWIN_10_8" >>confdefs.h - - DEFAULT_SUPP="darwin12.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="darwin10-drd.supp ${DEFAULT_SUPP}" - ;; - 13.*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: Darwin 13.x (${kernel}) / Mac OS X 10.9 Mavericks" >&5 --$as_echo "Darwin 13.x (${kernel}) / Mac OS X 10.9 Mavericks" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Darwin 13.x (${kernel}) / Mac OS X 10.9 Mavericks" >&5 -+printf "%s\n" "Darwin 13.x (${kernel}) / Mac OS X 10.9 Mavericks" >&6; } - --$as_echo "#define DARWIN_VERS DARWIN_10_9" >>confdefs.h -+printf "%s\n" "#define DARWIN_VERS DARWIN_10_9" >>confdefs.h - - DEFAULT_SUPP="darwin13.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="darwin10-drd.supp ${DEFAULT_SUPP}" - ;; - 14.*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: Darwin 14.x (${kernel}) / Mac OS X 10.10 Yosemite" >&5 --$as_echo "Darwin 14.x (${kernel}) / Mac OS X 10.10 Yosemite" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Darwin 14.x (${kernel}) / Mac OS X 10.10 Yosemite" >&5 -+printf "%s\n" "Darwin 14.x (${kernel}) / Mac OS X 10.10 Yosemite" >&6; } - --$as_echo "#define DARWIN_VERS DARWIN_10_10" >>confdefs.h -+printf "%s\n" "#define DARWIN_VERS DARWIN_10_10" >>confdefs.h - - DEFAULT_SUPP="darwin14.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="darwin10-drd.supp ${DEFAULT_SUPP}" - ;; - 15.*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: Darwin 15.x (${kernel}) / Mac OS X 10.11 El Capitan" >&5 --$as_echo "Darwin 15.x (${kernel}) / Mac OS X 10.11 El Capitan" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Darwin 15.x (${kernel}) / Mac OS X 10.11 El Capitan" >&5 -+printf "%s\n" "Darwin 15.x (${kernel}) / Mac OS X 10.11 El Capitan" >&6; } - --$as_echo "#define DARWIN_VERS DARWIN_10_11" >>confdefs.h -+printf "%s\n" "#define DARWIN_VERS DARWIN_10_11" >>confdefs.h - - DEFAULT_SUPP="darwin15.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="darwin10-drd.supp ${DEFAULT_SUPP}" - ;; - 16.*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: Darwin 16.x (${kernel}) / macOS 10.12 Sierra" >&5 --$as_echo "Darwin 16.x (${kernel}) / macOS 10.12 Sierra" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Darwin 16.x (${kernel}) / macOS 10.12 Sierra" >&5 -+printf "%s\n" "Darwin 16.x (${kernel}) / macOS 10.12 Sierra" >&6; } - --$as_echo "#define DARWIN_VERS DARWIN_10_12" >>confdefs.h -+printf "%s\n" "#define DARWIN_VERS DARWIN_10_12" >>confdefs.h - - DEFAULT_SUPP="darwin16.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="darwin10-drd.supp ${DEFAULT_SUPP}" - ;; - 17.*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: Darwin 17.x (${kernel}) / macOS 10.13 High Sierra" >&5 --$as_echo "Darwin 17.x (${kernel}) / macOS 10.13 High Sierra" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Darwin 17.x (${kernel}) / macOS 10.13 High Sierra" >&5 -+printf "%s\n" "Darwin 17.x (${kernel}) / macOS 10.13 High Sierra" >&6; } - --$as_echo "#define DARWIN_VERS DARWIN_10_13" >>confdefs.h -+printf "%s\n" "#define DARWIN_VERS DARWIN_10_13" >>confdefs.h - - DEFAULT_SUPP="darwin17.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="darwin10-drd.supp ${DEFAULT_SUPP}" - ;; - *) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: unsupported (${kernel})" >&5 --$as_echo "unsupported (${kernel})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: unsupported (${kernel})" >&5 -+printf "%s\n" "unsupported (${kernel})" >&6; } - as_fn_error $? "Valgrind works on Darwin 10.x, 11.x, 12.x, 13.x, 14.x, 15.x, 16.x and 17.x (Mac OS X 10.6/7/8/9/10/11 and macOS 10.12/13)" "$LINENO" 5 - ;; - esac - ;; - - solaris2.11*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_os})" >&5 --$as_echo "ok (${host_os})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_os})" >&5 -+printf "%s\n" "ok (${host_os})" >&6; } - VGCONF_OS="solaris" - - uname_v=$( uname -v ) -@@ -6248,15 +7066,15 @@ $as_echo "ok (${host_os})" >&6; } - ;; - - solaris2.12*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_os})" >&5 --$as_echo "ok (${host_os})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_os})" >&5 -+printf "%s\n" "ok (${host_os})" >&6; } - VGCONF_OS="solaris" - DEFAULT_SUPP="solaris12.supp ${DEFAULT_SUPP}" - ;; - - *) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no (${host_os})" >&5 --$as_echo "no (${host_os})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no (${host_os})" >&5 -+printf "%s\n" "no (${host_os})" >&6; } - as_fn_error $? "Valgrind is operating system specific. Sorry." "$LINENO" 5 - ;; - esac -@@ -6269,8 +7087,8 @@ esac - - case "$ARCH_MAX-$VGCONF_OS" in - amd64-linux|ppc64be-linux|arm64-linux|amd64-solaris) -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking for 32 bit build support" >&5 --$as_echo_n "checking for 32 bit build support... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for 32 bit build support" >&5 -+printf %s "checking for 32 bit build support... " >&6; } - safe_CFLAGS=$CFLAGS - CFLAGS="-m32" - -@@ -6278,7 +7096,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -6287,24 +7105,25 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - vg_cv_only64bit="yes" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - CFLAGS=$safe_CFLAGS;; - mips64-linux) -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking for 32 bit build support" >&5 --$as_echo_n "checking for 32 bit build support... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for 32 bit build support" >&5 -+printf %s "checking for 32 bit build support... " >&6; } - safe_CFLAGS=$CFLAGS - CFLAGS="$CFLAGS -mips32 -mabi=32" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -@@ -6313,26 +7132,27 @@ $as_echo_n "checking for 32 bit build support... " >&6; } - #include - - int --main () -+main (void) - { - - ; - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - vg_cv_only64bit="yes" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - CFLAGS=$safe_CFLAGS;; - esac -@@ -6378,8 +7198,8 @@ fi - # on a 64 bit machine but have been requested only to do a 32 bit build. - - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for a supported CPU/OS combination" >&5 --$as_echo_n "checking for a supported CPU/OS combination... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for a supported CPU/OS combination" >&5 -+printf %s "checking for a supported CPU/OS combination... " >&6; } - - # NB. The load address for a given platform may be specified in more - # than one place, in some cases, depending on whether we're doing a biarch, -@@ -6398,8 +7218,8 @@ case "$ARCH_MAX-$VGCONF_OS" in - valt_load_address_pri_inner="0x38000000" - valt_load_address_sec_norml="0xUNSET" - valt_load_address_sec_inner="0xUNSET" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 --$as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 -+printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - ;; - amd64-linux) - valt_load_address_sec_norml="0xUNSET" -@@ -6428,8 +7248,8 @@ $as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - valt_load_address_sec_norml="0x58000000" - valt_load_address_sec_inner="0x38000000" - fi -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 --$as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 -+printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - ;; - ppc32-linux) - VGCONF_ARCH_PRI="ppc32" -@@ -6440,8 +7260,8 @@ $as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - valt_load_address_pri_inner="0x38000000" - valt_load_address_sec_norml="0xUNSET" - valt_load_address_sec_inner="0xUNSET" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 --$as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 -+printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - ;; - ppc64be-linux) - valt_load_address_sec_norml="0xUNSET" -@@ -6470,8 +7290,8 @@ $as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - valt_load_address_sec_norml="0x58000000" - valt_load_address_sec_inner="0x38000000" - fi -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 --$as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 -+printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - ;; - ppc64le-linux) - # Little Endian is only supported on PPC64 -@@ -6483,8 +7303,8 @@ $as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - VGCONF_PLATFORM_SEC_CAPS="" - valt_load_address_pri_norml="0x58000000" - valt_load_address_pri_inner="0x38000000" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 --$as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 -+printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - ;; - # Darwin gets identified as 32-bit even when it supports 64-bit. - # (Not sure why, possibly because 'uname' returns "i386"?) Just about -@@ -6520,8 +7340,8 @@ $as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - valt_load_address_sec_norml="0x58000000" - valt_load_address_sec_inner="0x38000000" - fi -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 --$as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 -+printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - ;; - arm-linux) - VGCONF_ARCH_PRI="arm" -@@ -6531,8 +7351,8 @@ $as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - valt_load_address_pri_inner="0x38000000" - valt_load_address_sec_norml="0xUNSET" - valt_load_address_sec_inner="0xUNSET" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu}-${host_os})" >&5 --$as_echo "ok (${host_cpu}-${host_os})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu}-${host_os})" >&5 -+printf "%s\n" "ok (${host_cpu}-${host_os})" >&6; } - ;; - arm64-linux) - valt_load_address_sec_norml="0xUNSET" -@@ -6561,8 +7381,8 @@ $as_echo "ok (${host_cpu}-${host_os})" >&6; } - valt_load_address_sec_norml="0x58000000" - valt_load_address_sec_inner="0x38000000" - fi -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 --$as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 -+printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - ;; - s390x-linux) - VGCONF_ARCH_PRI="s390x" -@@ -6575,8 +7395,8 @@ $as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - valt_load_address_pri_inner="0x810000000" - valt_load_address_sec_norml="0xUNSET" - valt_load_address_sec_inner="0xUNSET" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 --$as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 -+printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - ;; - mips32-linux) - VGCONF_ARCH_PRI="mips32" -@@ -6587,8 +7407,8 @@ $as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - valt_load_address_pri_inner="0x38000000" - valt_load_address_sec_norml="0xUNSET" - valt_load_address_sec_inner="0xUNSET" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 --$as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 -+printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - ;; - mips64-linux) - valt_load_address_sec_norml="0xUNSET" -@@ -6617,8 +7437,8 @@ $as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - valt_load_address_sec_norml="0x58000000" - valt_load_address_sec_inner="0x38000000" - fi -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 --$as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 -+printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - ;; - nanomips-linux) - VGCONF_ARCH_PRI="nanomips" -@@ -6629,8 +7449,20 @@ $as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - valt_load_address_pri_inner="0x38000000" - valt_load_address_sec_norml="0xUNSET" - valt_load_address_sec_inner="0xUNSET" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 --$as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 -+printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } -+ ;; -+ loongarch64-linux) -+ VGCONF_ARCH_PRI="loongarch64" -+ VGCONF_ARCH_SEC="" -+ VGCONF_PLATFORM_PRI_CAPS="LOONGARCH64_LINUX" -+ VGCONF_PLATFORM_SEC_CAPS="" -+ valt_load_address_pri_norml="0x58000000" -+ valt_load_address_pri_inner="0x38000000" -+ valt_load_address_sec_norml="0xUNSET" -+ valt_load_address_sec_inner="0xUNSET" -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 -+printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - ;; - x86-solaris) - VGCONF_ARCH_PRI="x86" -@@ -6641,8 +7473,8 @@ $as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - valt_load_address_pri_inner="0x38000000" - valt_load_address_sec_norml="0xUNSET" - valt_load_address_sec_inner="0xUNSET" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 --$as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 -+printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - ;; - amd64-solaris) - valt_load_address_sec_norml="0xUNSET" -@@ -6671,8 +7503,8 @@ $as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - valt_load_address_sec_norml="0x58000000" - valt_load_address_sec_inner="0x38000000" - fi -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 --$as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 -+printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - ;; - *) - VGCONF_ARCH_PRI="unknown" -@@ -6683,8 +7515,8 @@ $as_echo "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } - valt_load_address_pri_inner="0xUNSET" - valt_load_address_sec_norml="0xUNSET" - valt_load_address_sec_inner="0xUNSET" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no (${ARCH_MAX}-${VGCONF_OS})" >&5 --$as_echo "no (${ARCH_MAX}-${VGCONF_OS})" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no (${ARCH_MAX}-${VGCONF_OS})" >&5 -+printf "%s\n" "no (${ARCH_MAX}-${VGCONF_OS})" >&6; } - as_fn_error $? "Valgrind is platform specific. Sorry. Please consider doing a port." "$LINENO" 5 - ;; - esac -@@ -6784,6 +7616,14 @@ else - VGCONF_ARCHS_INCLUDE_NANOMIPS_FALSE= - fi - -+ if test x$VGCONF_PLATFORM_PRI_CAPS = xLOONGARCH64_LINUX ; then -+ VGCONF_ARCHS_INCLUDE_LOONGARCH64_TRUE= -+ VGCONF_ARCHS_INCLUDE_LOONGARCH64_FALSE='#' -+else -+ VGCONF_ARCHS_INCLUDE_LOONGARCH64_TRUE='#' -+ VGCONF_ARCHS_INCLUDE_LOONGARCH64_FALSE= -+fi -+ - - # Set up VGCONF_PLATFORMS_INCLUDE_. Either one or two of these - # become defined. -@@ -6880,6 +7720,14 @@ else - VGCONF_PLATFORMS_INCLUDE_NANOMIPS_LINUX_FALSE= - fi - -+ if test x$VGCONF_PLATFORM_PRI_CAPS = xLOONGARCH64_LINUX; then -+ VGCONF_PLATFORMS_INCLUDE_LOONGARCH64_LINUX_TRUE= -+ VGCONF_PLATFORMS_INCLUDE_LOONGARCH64_LINUX_FALSE='#' -+else -+ VGCONF_PLATFORMS_INCLUDE_LOONGARCH64_LINUX_TRUE='#' -+ VGCONF_PLATFORMS_INCLUDE_LOONGARCH64_LINUX_FALSE= -+fi -+ - if test x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN \ - -o x$VGCONF_PLATFORM_SEC_CAPS = xX86_DARWIN; then - VGCONF_PLATFORMS_INCLUDE_X86_DARWIN_TRUE= -@@ -6929,7 +7777,8 @@ fi - -o x$VGCONF_PLATFORM_PRI_CAPS = xS390X_LINUX \ - -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS32_LINUX \ - -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX \ -- -o x$VGCONF_PLATFORM_PRI_CAPS = xNANOMIPS_LINUX; then -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xNANOMIPS_LINUX \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xLOONGARCH64_LINUX; then - VGCONF_OS_IS_LINUX_TRUE= - VGCONF_OS_IS_LINUX_FALSE='#' - else -@@ -6978,24 +7827,26 @@ fi - # another Valgrind. Choose the load address accordingly. - - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for use as an inner Valgrind" >&5 --$as_echo_n "checking for use as an inner Valgrind... " >&6; } --if ${vg_cv_inner+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for use as an inner Valgrind" >&5 -+printf %s "checking for use as an inner Valgrind... " >&6; } -+if test ${vg_cv_inner+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - # Check whether --enable-inner was given. --if test "${enable_inner+set}" = set; then : -+if test ${enable_inner+y} -+then : - enableval=$enable_inner; vg_cv_inner=$enableval --else -+else $as_nop - vg_cv_inner=no - fi - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $vg_cv_inner" >&5 --$as_echo "$vg_cv_inner" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $vg_cv_inner" >&5 -+printf "%s\n" "$vg_cv_inner" >&6; } - if test "$vg_cv_inner" = yes; then - --$as_echo "#define ENABLE_INNER 1" >>confdefs.h -+printf "%s\n" "#define ENABLE_INNER 1" >>confdefs.h - - VALT_LOAD_ADDRESS_PRI=$valt_load_address_pri_inner - VALT_LOAD_ADDRESS_SEC=$valt_load_address_sec_inner -@@ -7009,37 +7860,38 @@ fi - #---------------------------------------------------------------------------- - # Check whether we should build with the undefined beahviour sanitiser. - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for using the undefined behaviour sanitiser" >&5 --$as_echo_n "checking for using the undefined behaviour sanitiser... " >&6; } --if ${vg_cv_ubsan+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for using the undefined behaviour sanitiser" >&5 -+printf %s "checking for using the undefined behaviour sanitiser... " >&6; } -+if test ${vg_cv_ubsan+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - # Check whether --enable-ubsan was given. --if test "${enable_ubsan+set}" = set; then : -+if test ${enable_ubsan+y} -+then : - enableval=$enable_ubsan; vg_cv_ubsan=$enableval --else -+else $as_nop - vg_cv_ubsan=no - fi - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $vg_cv_ubsan" >&5 --$as_echo "$vg_cv_ubsan" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $vg_cv_ubsan" >&5 -+printf "%s\n" "$vg_cv_ubsan" >&6; } - - #---------------------------------------------------------------------------- - # Extra fine-tuning of installation directories - #---------------------------------------------------------------------------- - - # Check whether --with-tmpdir was given. --if test "${with_tmpdir+set}" = set; then : -+if test ${with_tmpdir+y} -+then : - withval=$with_tmpdir; tmpdir="$withval" --else -+else $as_nop - tmpdir="/tmp" - fi - - --cat >>confdefs.h <<_ACEOF --#define VG_TMPDIR "$tmpdir" --_ACEOF -+printf "%s\n" "#define VG_TMPDIR \"$tmpdir\"" >>confdefs.h - - VG_TMPDIR=$tmpdir - -@@ -7051,11 +7903,12 @@ VG_TMPDIR=$tmpdir - if test -z "$VGCONF_OS_IS_DARWIN_TRUE"; then : - # Extract the first word of "xcrun", so it can be a program name with args. - set dummy xcrun; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_prog_XCRUN+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_prog_XCRUN+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -n "$XCRUN"; then - ac_cv_prog_XCRUN="$XCRUN" # Let the user override the test. - else -@@ -7063,11 +7916,15 @@ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then - ac_cv_prog_XCRUN="yes" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -7079,21 +7936,22 @@ fi - fi - XCRUN=$ac_cv_prog_XCRUN - if test -n "$XCRUN"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $XCRUN" >&5 --$as_echo "$XCRUN" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $XCRUN" >&5 -+printf "%s\n" "$XCRUN" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for xcode sdk include path" >&5 --$as_echo_n "checking for xcode sdk include path... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for xcode sdk include path" >&5 -+printf %s "checking for xcode sdk include path... " >&6; } - - # Check whether --with-xcodedir was given. --if test "${with_xcodedir+set}" = set; then : -+if test ${with_xcodedir+y} -+then : - withval=$with_xcodedir; xcodedir="$withval" --else -+else $as_nop - - if test "x$XCRUN" != "xno" -a ! -d /usr/include; then - xcrundir=`xcrun --sdk macosx --show-sdk-path` -@@ -7106,31 +7964,78 @@ else - xcodedir="/usr/include" - fi - --fi -+fi -+ -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $xcodedir" >&5 -+printf "%s\n" "$xcodedir" >&6; } -+ -+printf "%s\n" "#define XCODE_DIR \"$xcodedir\"" >>confdefs.h -+ -+XCODE_DIR=$xcodedir -+ -+fi -+ -+#---------------------------------------------------------------------------- -+# Libc and suppressions -+#---------------------------------------------------------------------------- -+# This variable will collect the suppression files to be used. -+ -+ -+ac_header= ac_cache= -+for ac_item in $ac_header_c_list -+do -+ if test $ac_cache; then -+ ac_fn_c_check_header_compile "$LINENO" $ac_header ac_cv_header_$ac_cache "$ac_includes_default" -+ if eval test \"x\$ac_cv_header_$ac_cache\" = xyes; then -+ printf "%s\n" "#define $ac_item 1" >> confdefs.h -+ fi -+ ac_header= ac_cache= -+ elif test $ac_header; then -+ ac_cache=$ac_item -+ else -+ ac_header=$ac_item -+ fi -+done -+ -+ -+ -+ -+ - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $xcodedir" >&5 --$as_echo "$xcodedir" >&6; } - --cat >>confdefs.h <<_ACEOF --#define XCODE_DIR "$xcodedir" --_ACEOF - --XCODE_DIR=$xcodedir -+if test $ac_cv_header_stdlib_h = yes && test $ac_cv_header_string_h = yes -+then : -+ -+printf "%s\n" "#define STDC_HEADERS 1" >>confdefs.h -+ -+fi -+ac_fn_c_check_header_compile "$LINENO" "features.h" "ac_cv_header_features_h" "$ac_includes_default" -+if test "x$ac_cv_header_features_h" = xyes -+then : - - fi - --#---------------------------------------------------------------------------- --# Libc and suppressions --#---------------------------------------------------------------------------- --# This variable will collect the suppression files to be used. - -+if test x$ac_cv_header_features_h = xyes; then -+ rm -f conftest.$ac_ext -+ cat <<_ACEOF >conftest.$ac_ext -+#include -+#if defined(__GNU_LIBRARY__) && defined(__GLIBC__) && defined(__GLIBC_MINOR__) -+glibc version is: __GLIBC__ __GLIBC_MINOR__ -+#endif -+_ACEOF -+ GLIBC_VERSION="`$CPP -P conftest.$ac_ext | $SED -n 's/^glibc version is: //p' | $SED 's/ /./g'`" -+fi - -+# not really a version check - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for grep that handles long lines and -e" >&5 --$as_echo_n "checking for grep that handles long lines and -e... " >&6; } --if ${ac_cv_path_GREP+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for grep that handles long lines and -e" >&5 -+printf %s "checking for grep that handles long lines and -e... " >&6; } -+if test ${ac_cv_path_GREP+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if test -z "$GREP"; then - ac_path_GREP_found=false - # Loop through the user's path and test for each of PROGNAME-LIST -@@ -7138,10 +8043,15 @@ else - for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -- for ac_prog in grep ggrep; do -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac -+ for ac_prog in grep ggrep -+ do - for ac_exec_ext in '' $ac_executable_extensions; do -- ac_path_GREP="$as_dir/$ac_prog$ac_exec_ext" -+ ac_path_GREP="$as_dir$ac_prog$ac_exec_ext" - as_fn_executable_p "$ac_path_GREP" || continue - # Check for GNU ac_path_GREP and select it if it is found. - # Check for GNU $ac_path_GREP -@@ -7150,13 +8060,13 @@ case `"$ac_path_GREP" --version 2>&1` in - ac_cv_path_GREP="$ac_path_GREP" ac_path_GREP_found=:;; - *) - ac_count=0 -- $as_echo_n 0123456789 >"conftest.in" -+ printf %s 0123456789 >"conftest.in" - while : - do - cat "conftest.in" "conftest.in" >"conftest.tmp" - mv "conftest.tmp" "conftest.in" - cp "conftest.in" "conftest.nl" -- $as_echo 'GREP' >> "conftest.nl" -+ printf "%s\n" 'GREP' >> "conftest.nl" - "$ac_path_GREP" -e 'GREP$' -e '-(cannot match)-' < "conftest.nl" >"conftest.out" 2>/dev/null || break - diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break - as_fn_arith $ac_count + 1 && ac_count=$as_val -@@ -7184,16 +8094,17 @@ else - fi - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_GREP" >&5 --$as_echo "$ac_cv_path_GREP" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_GREP" >&5 -+printf "%s\n" "$ac_cv_path_GREP" >&6; } - GREP="$ac_cv_path_GREP" - - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for egrep" >&5 --$as_echo_n "checking for egrep... " >&6; } --if ${ac_cv_path_EGREP+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for egrep" >&5 -+printf %s "checking for egrep... " >&6; } -+if test ${ac_cv_path_EGREP+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - if echo a | $GREP -E '(a|b)' >/dev/null 2>&1 - then ac_cv_path_EGREP="$GREP -E" - else -@@ -7204,10 +8115,15 @@ else - for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -- for ac_prog in egrep; do -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac -+ for ac_prog in egrep -+ do - for ac_exec_ext in '' $ac_executable_extensions; do -- ac_path_EGREP="$as_dir/$ac_prog$ac_exec_ext" -+ ac_path_EGREP="$as_dir$ac_prog$ac_exec_ext" - as_fn_executable_p "$ac_path_EGREP" || continue - # Check for GNU ac_path_EGREP and select it if it is found. - # Check for GNU $ac_path_EGREP -@@ -7216,13 +8132,13 @@ case `"$ac_path_EGREP" --version 2>&1` in - ac_cv_path_EGREP="$ac_path_EGREP" ac_path_EGREP_found=:;; - *) - ac_count=0 -- $as_echo_n 0123456789 >"conftest.in" -+ printf %s 0123456789 >"conftest.in" - while : - do - cat "conftest.in" "conftest.in" >"conftest.tmp" - mv "conftest.tmp" "conftest.in" - cp "conftest.in" "conftest.nl" -- $as_echo 'EGREP' >> "conftest.nl" -+ printf "%s\n" 'EGREP' >> "conftest.nl" - "$ac_path_EGREP" 'EGREP$' < "conftest.nl" >"conftest.out" 2>/dev/null || break - diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break - as_fn_arith $ac_count + 1 && ac_count=$as_val -@@ -7251,159 +8167,11 @@ fi - - fi - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_EGREP" >&5 --$as_echo "$ac_cv_path_EGREP" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_EGREP" >&5 -+printf "%s\n" "$ac_cv_path_EGREP" >&6; } - EGREP="$ac_cv_path_EGREP" - - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for ANSI C header files" >&5 --$as_echo_n "checking for ANSI C header files... " >&6; } --if ${ac_cv_header_stdc+:} false; then : -- $as_echo_n "(cached) " >&6 --else -- cat confdefs.h - <<_ACEOF >conftest.$ac_ext --/* end confdefs.h. */ --#include --#include --#include --#include -- --int --main () --{ -- -- ; -- return 0; --} --_ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -- ac_cv_header_stdc=yes --else -- ac_cv_header_stdc=no --fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -- --if test $ac_cv_header_stdc = yes; then -- # SunOS 4.x string.h does not declare mem*, contrary to ANSI. -- cat confdefs.h - <<_ACEOF >conftest.$ac_ext --/* end confdefs.h. */ --#include -- --_ACEOF --if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | -- $EGREP "memchr" >/dev/null 2>&1; then : -- --else -- ac_cv_header_stdc=no --fi --rm -f conftest* -- --fi -- --if test $ac_cv_header_stdc = yes; then -- # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. -- cat confdefs.h - <<_ACEOF >conftest.$ac_ext --/* end confdefs.h. */ --#include -- --_ACEOF --if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | -- $EGREP "free" >/dev/null 2>&1; then : -- --else -- ac_cv_header_stdc=no --fi --rm -f conftest* -- --fi -- --if test $ac_cv_header_stdc = yes; then -- # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. -- if test "$cross_compiling" = yes; then : -- : --else -- cat confdefs.h - <<_ACEOF >conftest.$ac_ext --/* end confdefs.h. */ --#include --#include --#if ((' ' & 0x0FF) == 0x020) --# define ISLOWER(c) ('a' <= (c) && (c) <= 'z') --# define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c)) --#else --# define ISLOWER(c) \ -- (('a' <= (c) && (c) <= 'i') \ -- || ('j' <= (c) && (c) <= 'r') \ -- || ('s' <= (c) && (c) <= 'z')) --# define TOUPPER(c) (ISLOWER(c) ? ((c) | 0x40) : (c)) --#endif -- --#define XOR(e, f) (((e) && !(f)) || (!(e) && (f))) --int --main () --{ -- int i; -- for (i = 0; i < 256; i++) -- if (XOR (islower (i), ISLOWER (i)) -- || toupper (i) != TOUPPER (i)) -- return 2; -- return 0; --} --_ACEOF --if ac_fn_c_try_run "$LINENO"; then : -- --else -- ac_cv_header_stdc=no --fi --rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \ -- conftest.$ac_objext conftest.beam conftest.$ac_ext --fi -- --fi --fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_header_stdc" >&5 --$as_echo "$ac_cv_header_stdc" >&6; } --if test $ac_cv_header_stdc = yes; then -- --$as_echo "#define STDC_HEADERS 1" >>confdefs.h -- --fi -- --# On IRIX 5.3, sys/types and inttypes.h are conflicting. --for ac_header in sys/types.h sys/stat.h stdlib.h string.h memory.h strings.h \ -- inttypes.h stdint.h unistd.h --do : -- as_ac_Header=`$as_echo "ac_cv_header_$ac_header" | $as_tr_sh` --ac_fn_c_check_header_compile "$LINENO" "$ac_header" "$as_ac_Header" "$ac_includes_default --" --if eval test \"x\$"$as_ac_Header"\" = x"yes"; then : -- cat >>confdefs.h <<_ACEOF --#define `$as_echo "HAVE_$ac_header" | $as_tr_cpp` 1 --_ACEOF -- --fi -- --done -- -- --ac_fn_c_check_header_mongrel "$LINENO" "features.h" "ac_cv_header_features_h" "$ac_includes_default" --if test "x$ac_cv_header_features_h" = xyes; then : -- --fi -- -- -- --if test x$ac_cv_header_features_h = xyes; then -- rm -f conftest.$ac_ext -- cat <<_ACEOF >conftest.$ac_ext --#include --#if defined(__GNU_LIBRARY__) && defined(__GLIBC__) && defined(__GLIBC_MINOR__) --glibc version is: __GLIBC__ __GLIBC_MINOR__ --#endif --_ACEOF -- GLIBC_VERSION="`$CPP -P conftest.$ac_ext | $SED -n 's/^glibc version is: //p' | $SED 's/ /./g'`" --fi -- --# not really a version check - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - -@@ -7414,10 +8182,11 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - - _ACEOF - if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | -- $EGREP "DARWIN_LIBC" >/dev/null 2>&1; then : -+ $EGREP "DARWIN_LIBC" >/dev/null 2>&1 -+then : - GLIBC_VERSION="darwin" - fi --rm -f conftest* -+rm -rf conftest* - - - # not really a version check -@@ -7430,10 +8199,11 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - - _ACEOF - if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | -- $EGREP "BIONIC_LIBC" >/dev/null 2>&1; then : -+ $EGREP "BIONIC_LIBC" >/dev/null 2>&1 -+then : - GLIBC_VERSION="bionic" - fi --rm -f conftest* -+rm -rf conftest* - - - # there is only one version of libc on Solaris -@@ -7450,87 +8220,87 @@ if test x$GLIBC_VERSION = x; then - fi - fi - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking the glibc version" >&5 --$as_echo_n "checking the glibc version... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking the glibc version" >&5 -+printf %s "checking the glibc version... " >&6; } - - case "${GLIBC_VERSION}" in - 2.2) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${GLIBC_VERSION} family" >&5 --$as_echo "${GLIBC_VERSION} family" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ${GLIBC_VERSION} family" >&5 -+printf "%s\n" "${GLIBC_VERSION} family" >&6; } - DEFAULT_SUPP="glibc-2.2.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="glibc-2.2-LinuxThreads-helgrind.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" - ;; - 2.[3-6]) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${GLIBC_VERSION} family" >&5 --$as_echo "${GLIBC_VERSION} family" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ${GLIBC_VERSION} family" >&5 -+printf "%s\n" "${GLIBC_VERSION} family" >&6; } - DEFAULT_SUPP="glibc-${GLIBC_VERSION}.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" - ;; - 2.[7-9]) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${GLIBC_VERSION} family" >&5 --$as_echo "${GLIBC_VERSION} family" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ${GLIBC_VERSION} family" >&5 -+printf "%s\n" "${GLIBC_VERSION} family" >&6; } - DEFAULT_SUPP="glibc-2.X.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" - ;; - 2.10|2.11) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${GLIBC_VERSION} family" >&5 --$as_echo "${GLIBC_VERSION} family" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ${GLIBC_VERSION} family" >&5 -+printf "%s\n" "${GLIBC_VERSION} family" >&6; } - --$as_echo "#define GLIBC_MANDATORY_STRLEN_REDIRECT 1" >>confdefs.h -+printf "%s\n" "#define GLIBC_MANDATORY_STRLEN_REDIRECT 1" >>confdefs.h - - DEFAULT_SUPP="glibc-2.X.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" - ;; - 2.*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${GLIBC_VERSION} family" >&5 --$as_echo "${GLIBC_VERSION} family" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ${GLIBC_VERSION} family" >&5 -+printf "%s\n" "${GLIBC_VERSION} family" >&6; } - --$as_echo "#define GLIBC_MANDATORY_STRLEN_REDIRECT 1" >>confdefs.h -+printf "%s\n" "#define GLIBC_MANDATORY_STRLEN_REDIRECT 1" >>confdefs.h - - --$as_echo "#define GLIBC_MANDATORY_INDEX_AND_STRLEN_REDIRECT 1" >>confdefs.h -+printf "%s\n" "#define GLIBC_MANDATORY_INDEX_AND_STRLEN_REDIRECT 1" >>confdefs.h - - DEFAULT_SUPP="glibc-2.X.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" - ;; - darwin) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: Darwin" >&5 --$as_echo "Darwin" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Darwin" >&5 -+printf "%s\n" "Darwin" >&6; } - --$as_echo "#define DARWIN_LIBC 1" >>confdefs.h -+printf "%s\n" "#define DARWIN_LIBC 1" >>confdefs.h - - # DEFAULT_SUPP set by kernel version check above. - ;; - bionic) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: Bionic" >&5 --$as_echo "Bionic" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Bionic" >&5 -+printf "%s\n" "Bionic" >&6; } - --$as_echo "#define BIONIC_LIBC 1" >>confdefs.h -+printf "%s\n" "#define BIONIC_LIBC 1" >>confdefs.h - - DEFAULT_SUPP="bionic.supp ${DEFAULT_SUPP}" - ;; - solaris) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: Solaris" >&5 --$as_echo "Solaris" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Solaris" >&5 -+printf "%s\n" "Solaris" >&6; } - # DEFAULT_SUPP set in host_os switch-case above. - # No other suppression file is used. - ;; - musl) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: Musl" >&5 --$as_echo "Musl" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Musl" >&5 -+printf "%s\n" "Musl" >&6; } - --$as_echo "#define MUSL_LIBC 1" >>confdefs.h -+printf "%s\n" "#define MUSL_LIBC 1" >>confdefs.h - - # no DEFAULT_SUPP file yet for musl libc. - ;; - 2.0|2.1|*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: unsupported version ${GLIBC_VERSION}" >&5 --$as_echo "unsupported version ${GLIBC_VERSION}" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: unsupported version ${GLIBC_VERSION}" >&5 -+printf "%s\n" "unsupported version ${GLIBC_VERSION}" >&6; } - as_fn_error $? "Valgrind requires glibc version 2.2 or later, uClibc," "$LINENO" 5 - as_fn_error $? "musl libc, Darwin libc, Bionic libc or Solaris libc" "$LINENO" 5 - ;; -@@ -7622,8 +8392,8 @@ fi - - # Check for AT_FDCWD - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for AT_FDCWD" >&5 --$as_echo_n "checking for AT_FDCWD... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for AT_FDCWD" >&5 -+printf %s "checking for AT_FDCWD... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - -@@ -7632,7 +8402,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - int a = AT_FDCWD; -@@ -7641,20 +8411,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_at_fdcwd=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_at_fdcwd=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_at_fdcwd = xyes; then - HAVE_AT_FDCWD_TRUE= -@@ -7670,8 +8441,8 @@ fi - # used in the test case (some systems might define it without anyway - # since stpncpy is part of The Open Group Base Specifications Issue 7 - # IEEE Std 1003.1-2008. --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for stpncpy" >&5 --$as_echo_n "checking for stpncpy... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for stpncpy" >&5 -+printf %s "checking for stpncpy... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - -@@ -7679,7 +8450,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - char *d; -@@ -7691,20 +8462,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - - ac_have_gnu_stpncpy=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_gnu_stpncpy=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - - if test x$ac_have_gnu_stpncpy = xyes; then -@@ -7718,8 +8490,8 @@ fi - - # Check for PTRACE_GETREGS - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for PTRACE_GETREGS" >&5 --$as_echo_n "checking for PTRACE_GETREGS... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for PTRACE_GETREGS" >&5 -+printf %s "checking for PTRACE_GETREGS... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - -@@ -7729,7 +8501,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - void *p; -@@ -7739,27 +8511,28 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_PTRACE_GETREGS 1" >>confdefs.h -+printf "%s\n" "#define HAVE_PTRACE_GETREGS 1" >>confdefs.h - - --else -+else $as_nop - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - - # Check for CLOCK_MONOTONIC - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for CLOCK_MONOTONIC" >&5 --$as_echo_n "checking for CLOCK_MONOTONIC... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for CLOCK_MONOTONIC" >&5 -+printf %s "checking for CLOCK_MONOTONIC... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ -@@ -7767,7 +8540,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - struct timespec t; -@@ -7778,42 +8551,41 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_CLOCK_MONOTONIC 1" >>confdefs.h -+printf "%s\n" "#define HAVE_CLOCK_MONOTONIC 1" >>confdefs.h - - --else -+else $as_nop - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - - # Check for ELF32/64_CHDR - - ac_fn_c_check_type "$LINENO" "Elf32_Chdr" "ac_cv_type_Elf32_Chdr" "#include - " --if test "x$ac_cv_type_Elf32_Chdr" = xyes; then : -+if test "x$ac_cv_type_Elf32_Chdr" = xyes -+then : - --cat >>confdefs.h <<_ACEOF --#define HAVE_ELF32_CHDR 1 --_ACEOF -+printf "%s\n" "#define HAVE_ELF32_CHDR 1" >>confdefs.h - - - fi - ac_fn_c_check_type "$LINENO" "Elf64_Chdr" "ac_cv_type_Elf64_Chdr" "#include - " --if test "x$ac_cv_type_Elf64_Chdr" = xyes; then : -+if test "x$ac_cv_type_Elf64_Chdr" = xyes -+then : - --cat >>confdefs.h <<_ACEOF --#define HAVE_ELF64_CHDR 1 --_ACEOF -+printf "%s\n" "#define HAVE_ELF64_CHDR 1" >>confdefs.h - - - fi -@@ -7822,8 +8594,8 @@ fi - - # Check for PTHREAD_RWLOCK_T - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for pthread_rwlock_t" >&5 --$as_echo_n "checking for pthread_rwlock_t... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for pthread_rwlock_t" >&5 -+printf %s "checking for pthread_rwlock_t... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ -@@ -7832,7 +8604,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - pthread_rwlock_t rwl; -@@ -7841,27 +8613,28 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_PTHREAD_RWLOCK_T 1" >>confdefs.h -+printf "%s\n" "#define HAVE_PTHREAD_RWLOCK_T 1" >>confdefs.h - - --else -+else $as_nop - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - - # Check for PTHREAD_MUTEX_ADAPTIVE_NP - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for PTHREAD_MUTEX_ADAPTIVE_NP" >&5 --$as_echo_n "checking for PTHREAD_MUTEX_ADAPTIVE_NP... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for PTHREAD_MUTEX_ADAPTIVE_NP" >&5 -+printf %s "checking for PTHREAD_MUTEX_ADAPTIVE_NP... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ -@@ -7870,7 +8643,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - return (PTHREAD_MUTEX_ADAPTIVE_NP); -@@ -7879,27 +8652,28 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_PTHREAD_MUTEX_ADAPTIVE_NP 1" >>confdefs.h -+printf "%s\n" "#define HAVE_PTHREAD_MUTEX_ADAPTIVE_NP 1" >>confdefs.h - - --else -+else $as_nop - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - - # Check for PTHREAD_MUTEX_ERRORCHECK_NP - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for PTHREAD_MUTEX_ERRORCHECK_NP" >&5 --$as_echo_n "checking for PTHREAD_MUTEX_ERRORCHECK_NP... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for PTHREAD_MUTEX_ERRORCHECK_NP" >&5 -+printf %s "checking for PTHREAD_MUTEX_ERRORCHECK_NP... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ -@@ -7908,7 +8682,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - return (PTHREAD_MUTEX_ERRORCHECK_NP); -@@ -7917,27 +8691,28 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_PTHREAD_MUTEX_ERRORCHECK_NP 1" >>confdefs.h -+printf "%s\n" "#define HAVE_PTHREAD_MUTEX_ERRORCHECK_NP 1" >>confdefs.h - - --else -+else $as_nop - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - - # Check for PTHREAD_MUTEX_RECURSIVE_NP - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for PTHREAD_MUTEX_RECURSIVE_NP" >&5 --$as_echo_n "checking for PTHREAD_MUTEX_RECURSIVE_NP... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for PTHREAD_MUTEX_RECURSIVE_NP" >&5 -+printf %s "checking for PTHREAD_MUTEX_RECURSIVE_NP... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ -@@ -7946,7 +8721,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - return (PTHREAD_MUTEX_RECURSIVE_NP); -@@ -7955,27 +8730,28 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_PTHREAD_MUTEX_RECURSIVE_NP 1" >>confdefs.h -+printf "%s\n" "#define HAVE_PTHREAD_MUTEX_RECURSIVE_NP 1" >>confdefs.h - - --else -+else $as_nop - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - - # Check for PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP" >&5 --$as_echo_n "checking for PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP" >&5 -+printf %s "checking for PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ -@@ -7984,7 +8760,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - pthread_mutex_t m = PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP; -@@ -7994,30 +8770,32 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP 1" >>confdefs.h -+printf "%s\n" "#define HAVE_PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP 1" >>confdefs.h - - --else -+else $as_nop - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - - # Check whether pthread_mutex_t has a member called __m_kind. - - ac_fn_c_check_member "$LINENO" "pthread_mutex_t" "__m_kind" "ac_cv_member_pthread_mutex_t___m_kind" "#include - " --if test "x$ac_cv_member_pthread_mutex_t___m_kind" = xyes; then : -+if test "x$ac_cv_member_pthread_mutex_t___m_kind" = xyes -+then : - --$as_echo "#define HAVE_PTHREAD_MUTEX_T__M_KIND 1" >>confdefs.h -+printf "%s\n" "#define HAVE_PTHREAD_MUTEX_T__M_KIND 1" >>confdefs.h - - - fi -@@ -8028,9 +8806,10 @@ fi - - ac_fn_c_check_member "$LINENO" "pthread_mutex_t" "__data.__kind" "ac_cv_member_pthread_mutex_t___data___kind" "#include - " --if test "x$ac_cv_member_pthread_mutex_t___data___kind" = xyes; then : -+if test "x$ac_cv_member_pthread_mutex_t___data___kind" = xyes -+then : - --$as_echo "#define HAVE_PTHREAD_MUTEX_T__DATA__KIND 1" >>confdefs.h -+printf "%s\n" "#define HAVE_PTHREAD_MUTEX_T__DATA__KIND 1" >>confdefs.h - - - fi -@@ -8048,129 +8827,129 @@ fi - # gather hardware capabilities. (hardware/kernel/libc) - - AUXV_CHECK_FOR=altivec -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator" >&5 --$as_echo_n "checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator" >&5 -+printf %s "checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator... " >&6; } - if LD_SHOW_AUXV=1 `which true` | grep ^AT_HWCAP | grep -q -w ${AUXV_CHECK_FOR} - then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - HWCAP_HAS_ALTIVEC=yes - - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi - - - AUXV_CHECK_FOR=vsx -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator" >&5 --$as_echo_n "checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator" >&5 -+printf %s "checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator... " >&6; } - if LD_SHOW_AUXV=1 `which true` | grep ^AT_HWCAP | grep -q -w ${AUXV_CHECK_FOR} - then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - HWCAP_HAS_VSX=yes - - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi - - - AUXV_CHECK_FOR=dfp -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator" >&5 --$as_echo_n "checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator" >&5 -+printf %s "checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator... " >&6; } - if LD_SHOW_AUXV=1 `which true` | grep ^AT_HWCAP | grep -q -w ${AUXV_CHECK_FOR} - then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - HWCAP_HAS_DFP=yes - - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi - - - AUXV_CHECK_FOR=arch_2_05 -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator" >&5 --$as_echo_n "checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator" >&5 -+printf %s "checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator... " >&6; } - if LD_SHOW_AUXV=1 `which true` | grep ^AT_HWCAP | grep -q -w ${AUXV_CHECK_FOR} - then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - HWCAP_HAS_ISA_2_05=yes - - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi - - - AUXV_CHECK_FOR=arch_2_06 -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator" >&5 --$as_echo_n "checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator" >&5 -+printf %s "checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator... " >&6; } - if LD_SHOW_AUXV=1 `which true` | grep ^AT_HWCAP | grep -q -w ${AUXV_CHECK_FOR} - then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - HWCAP_HAS_ISA_2_06=yes - - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi - - - AUXV_CHECK_FOR=arch_2_07 -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator" >&5 --$as_echo_n "checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator" >&5 -+printf %s "checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator... " >&6; } - if LD_SHOW_AUXV=1 `which true` | grep ^AT_HWCAP | grep -q -w ${AUXV_CHECK_FOR} - then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - HWCAP_HAS_ISA_2_07=yes - - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi - - - AUXV_CHECK_FOR=arch_3_00 -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator" >&5 --$as_echo_n "checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator" >&5 -+printf %s "checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator... " >&6; } - if LD_SHOW_AUXV=1 `which true` | grep ^AT_HWCAP | grep -q -w ${AUXV_CHECK_FOR} - then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - HWCAP_HAS_ISA_3_00=yes - - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi - - - AUXV_CHECK_FOR=htm -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator" >&5 --$as_echo_n "checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator" >&5 -+printf %s "checking if AT_HWCAP contains the $AUXV_CHECK_FOR indicator... " >&6; } - if LD_SHOW_AUXV=1 `which true` | grep ^AT_HWCAP | grep -q -w ${AUXV_CHECK_FOR} - then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - HWCAP_HAS_HTM=yes - - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi - -@@ -8193,14 +8972,14 @@ else - fi - - # compiler support for isa 2.07 level instructions --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking that assembler knows ISA 2.07 instructions " >&5 --$as_echo_n "checking that assembler knows ISA 2.07 instructions ... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking that assembler knows ISA 2.07 instructions " >&5 -+printf %s "checking that assembler knows ISA 2.07 instructions ... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - - int --main () -+main (void) - { - - __asm__ __volatile__("mtvsrd 1,2 "); -@@ -8209,20 +8988,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_asm_have_isa_2_07=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_asm_have_isa_2_07=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$ac_asm_have_isa_2_07 = xyes \ - -a x$HWCAP_HAS_ISA_2_07 = xyes; then - HAS_ISA_2_07_TRUE= -@@ -8236,8 +9016,8 @@ fi - # altivec (vsx) support. - # does this compiler support -maltivec and does it have the include file - # ? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for Altivec support in the compiler " >&5 --$as_echo_n "checking for Altivec support in the compiler ... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for Altivec support in the compiler " >&5 -+printf %s "checking for Altivec support in the compiler ... " >&6; } - safe_CFLAGS=$CFLAGS - CFLAGS="-maltivec -Werror" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -@@ -8246,7 +9026,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - vector unsigned int v; -@@ -8255,20 +9035,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_altivec=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_altivec=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - if test x$ac_have_altivec = xyes \ - -a x$HWCAP_HAS_ALTIVEC = xyes; then -@@ -8283,8 +9064,8 @@ fi - # Check that both: the compiler supports -mvsx and that the assembler - # understands VSX instructions. If either of those doesn't work, - # conclude that we can't do VSX. --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for VSX compiler flag support" >&5 --$as_echo_n "checking for VSX compiler flag support... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for VSX compiler flag support" >&5 -+printf %s "checking for VSX compiler flag support... " >&6; } - safe_CFLAGS=$CFLAGS - CFLAGS="-mvsx -Werror" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -@@ -8292,7 +9073,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - - - int --main () -+main (void) - { - - -@@ -8300,24 +9081,25 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_compiler_supports_vsx_flag=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_compiler_supports_vsx_flag=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for VSX support in the assembler " >&5 --$as_echo_n "checking for VSX support in the assembler ... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for VSX support in the assembler " >&5 -+printf %s "checking for VSX support in the assembler ... " >&6; } - safe_CFLAGS=$CFLAGS - CFLAGS="-mvsx -Werror" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -@@ -8326,7 +9108,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - vector unsigned int v; -@@ -8336,20 +9118,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_compiler_supports_vsx=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_compiler_supports_vsx=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - if test x$ac_compiler_supports_vsx_flag = xyes \ - -a x$ac_compiler_supports_vsx = xyes \ -@@ -8363,14 +9146,14 @@ fi - - - # DFP (Decimal Float) --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking that assembler knows DFP" >&5 --$as_echo_n "checking that assembler knows DFP... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking that assembler knows DFP" >&5 -+printf %s "checking that assembler knows DFP... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - - int --main () -+main (void) - { - - #ifdef __s390__ -@@ -8384,22 +9167,23 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_asm_have_dfp=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_asm_have_dfp=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking that compiler knows -mhard-dfp switch" >&5 --$as_echo_n "checking that compiler knows -mhard-dfp switch... " >&6; } -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking that compiler knows -mhard-dfp switch" >&5 -+printf %s "checking that compiler knows -mhard-dfp switch... " >&6; } - safe_CFLAGS=$CFLAGS - CFLAGS="-mhard-dfp -Werror" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -@@ -8407,7 +9191,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - - - int --main () -+main (void) - { - - #ifdef __s390__ -@@ -8421,20 +9205,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_compiler_have_dfp=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_compiler_have_dfp=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - if test x$ac_asm_have_dfp = xyes \ - -a x$ac_compiler_have_dfp = xyes \ -@@ -8447,14 +9232,14 @@ else - fi - - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking that compiler knows DFP datatypes" >&5 --$as_echo_n "checking that compiler knows DFP datatypes... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking that compiler knows DFP datatypes" >&5 -+printf %s "checking that compiler knows DFP datatypes... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - - int --main () -+main (void) - { - - _Decimal64 x = 0.0DD; -@@ -8463,20 +9248,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_compiler_have_dfp_type=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_compiler_have_dfp_type=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$ac_compiler_have_dfp_type = xyes \ - -a x$HWCAP_HAS_DFP = xyes ; then - BUILD_DFP_TESTS_TRUE= -@@ -8489,8 +9275,8 @@ fi - - - # HTM (Hardware Transactional Memory) --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if compiler accepts the -mhtm flag" >&5 --$as_echo_n "checking if compiler accepts the -mhtm flag... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if compiler accepts the -mhtm flag" >&5 -+printf %s "checking if compiler accepts the -mhtm flag... " >&6; } - safe_CFLAGS=$CFLAGS - CFLAGS="-mhtm -Werror" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -@@ -8498,7 +9284,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - - - int --main () -+main (void) - { - - return 0; -@@ -8507,24 +9293,25 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - ac_compiler_supports_htm=yes - --else -+else $as_nop - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - ac_compiler_supports_htm=no - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if compiler can find the htm builtins" >&5 --$as_echo_n "checking if compiler can find the htm builtins... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if compiler can find the htm builtins" >&5 -+printf %s "checking if compiler can find the htm builtins... " >&6; } - safe_CFLAGS=$CFLAGS - CFLAGS="-mhtm -Werror" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -@@ -8532,7 +9319,7 @@ CFLAGS="-mhtm -Werror" - - - int --main () -+main (void) - { - - if (__builtin_tbegin (0)) -@@ -8542,20 +9329,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - ac_compiler_sees_htm_builtins=yes - --else -+else $as_nop - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - ac_compiler_sees_htm_builtins=no - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - if test x$ac_compiler_supports_htm = xyes \ -@@ -8570,15 +9358,15 @@ fi - - - # isa 3.0 checking --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking that assembler knows ISA 3.00 " >&5 --$as_echo_n "checking that assembler knows ISA 3.00 ... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking that assembler knows ISA 3.00 " >&5 -+printf %s "checking that assembler knows ISA 3.00 ... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - - int --main () -+main (void) - { - - __asm__ __volatile__("cnttzw 1,2 "); -@@ -8587,20 +9375,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_asm_have_isa_3_00=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_asm_have_isa_3_00=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_asm_have_isa_3_00 = xyes \ - -a x$HWCAP_HAS_ISA_3_00 = xyes; then -@@ -8613,8 +9402,8 @@ fi - - - # Check for pthread_create@GLIBC2.0 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for pthread_create@GLIBC2.0()" >&5 --$as_echo_n "checking for pthread_create@GLIBC2.0()... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for pthread_create@GLIBC2.0()" >&5 -+printf %s "checking for pthread_create@GLIBC2.0()... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-lpthread -Werror" -@@ -8626,7 +9415,7 @@ extern int pthread_create_glibc_2_0(void*, const void*, - __asm__(".symver pthread_create_glibc_2_0, pthread_create@GLIBC_2.0"); - - int --main () -+main (void) - { - - #ifdef __powerpc__ -@@ -8644,23 +9433,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - - ac_have_pthread_create_glibc_2_0=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_PTHREAD_CREATE_GLIBC_2_0 1" >>confdefs.h -+printf "%s\n" "#define HAVE_PTHREAD_CREATE_GLIBC_2_0 1" >>confdefs.h - - --else -+else $as_nop - - ac_have_pthread_create_glibc_2_0=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - CFLAGS=$safe_CFLAGS - -@@ -8675,8 +9465,8 @@ fi - - - # Check for dlinfo RTLD_DI_TLS_MODID --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for dlinfo RTLD_DI_TLS_MODID" >&5 --$as_echo_n "checking for dlinfo RTLD_DI_TLS_MODID... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for dlinfo RTLD_DI_TLS_MODID" >&5 -+printf %s "checking for dlinfo RTLD_DI_TLS_MODID... " >&6; } - - safe_LIBS="$LIBS" - LIBS="-ldl" -@@ -8690,7 +9480,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - size_t sizes[10000]; -@@ -8702,23 +9492,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - - ac_have_dlinfo_rtld_di_tls_modid=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_DLINFO_RTLD_DI_TLS_MODID 1" >>confdefs.h -+printf "%s\n" "#define HAVE_DLINFO_RTLD_DI_TLS_MODID 1" >>confdefs.h - - --else -+else $as_nop - - ac_have_dlinfo_rtld_di_tls_modid=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - LIBS=$safe_LIBS - -@@ -8733,8 +9524,8 @@ fi - - - # Check for eventfd_t, eventfd() and eventfd_read() --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for eventfd()" >&5 --$as_echo_n "checking for eventfd()... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for eventfd()" >&5 -+printf %s "checking for eventfd()... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ -@@ -8742,7 +9533,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - eventfd_t ev; -@@ -8756,32 +9547,33 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_EVENTFD 1" >>confdefs.h -+printf "%s\n" "#define HAVE_EVENTFD 1" >>confdefs.h - - --$as_echo "#define HAVE_EVENTFD_READ 1" >>confdefs.h -+printf "%s\n" "#define HAVE_EVENTFD_READ 1" >>confdefs.h - - --else -+else $as_nop - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - - # Check whether compiler can process #include without errors - # clang 3.3 cannot process from e.g. - # gcc (Ubuntu/Linaro 4.6.3-1ubuntu5) 4.6.3 - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking that C++ compiler can include header file" >&5 --$as_echo_n "checking that C++ compiler can include header file... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking that C++ compiler can include header file" >&5 -+printf %s "checking that C++ compiler can include header file... " >&6; } - ac_ext=cpp - ac_cpp='$CXXCPP $CPPFLAGS' - ac_compile='$CXX -c $CXXFLAGS $CPPFLAGS conftest.$ac_ext >&5' -@@ -8798,20 +9590,21 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - _ACEOF --if ac_fn_cxx_try_compile "$LINENO"; then : -+if ac_fn_cxx_try_compile "$LINENO" -+then : - - ac_cxx_can_include_thread_header=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_cxx_can_include_thread_header=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CXXFLAGS=$safe_CXXFLAGS - ac_ext=c - ac_cpp='$CPP $CPPFLAGS' -@@ -8838,27 +9631,28 @@ ac_fn_c_check_type "$LINENO" "struct user_regs_struct" "ac_cv_type_struct_user_r - #include - #include - " --if test "x$ac_cv_type_struct_user_regs_struct" = xyes; then : -+if test "x$ac_cv_type_struct_user_regs_struct" = xyes -+then : - sys_user_has_user_regs=yes --else -+else $as_nop - sys_user_has_user_regs=no - fi - - if test "$sys_user_has_user_regs" = "yes"; then - --$as_echo "#define HAVE_SYS_USER_REGS 1" >>confdefs.h -+printf "%s\n" "#define HAVE_SYS_USER_REGS 1" >>confdefs.h - - fi - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for __NR_membarrier" >&5 --$as_echo_n "checking for __NR_membarrier... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __NR_membarrier" >&5 -+printf %s "checking for __NR_membarrier... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return __NR_membarrier -@@ -8867,20 +9661,21 @@ return __NR_membarrier - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_nr_membarrier=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_nr_membarrier=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_nr_membarrier = xyes; then - HAVE_NR_MEMBARRIER_TRUE= -@@ -8900,8 +9695,8 @@ case "${host_cpu}" in - ARCH=$(echo "$CFLAGS" | grep -E -e '-march=[^ ]+' -e '\B-mips[^ +]') - if test -z "$ARCH"; then - # does this compiler support -march=mips32 (mips32 default) ? -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -march=mips32 -mabi=32" >&5 --$as_echo_n "checking if gcc accepts -march=mips32 -mabi=32... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -march=mips32 -mabi=32" >&5 -+printf %s "checking if gcc accepts -march=mips32 -mabi=32... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="$CFLAGS -mips32 -mabi=32 -Werror" -@@ -8910,7 +9705,7 @@ $as_echo_n "checking if gcc accepts -march=mips32 -mabi=32... " >&6; } - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -8919,28 +9714,29 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_M32="-mips32 -mabi=32" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - FLAG_M32="" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - - - - # does this compiler support -march=mips64r2 (mips64r2 default) ? -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -march=mips64r2 -mabi=64" >&5 --$as_echo_n "checking if gcc accepts -march=mips64r2 -mabi=64... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -march=mips64r2 -mabi=64" >&5 -+printf %s "checking if gcc accepts -march=mips64r2 -mabi=64... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="$CFLAGS -march=mips64r2 -mabi=64 -Werror" -@@ -8949,7 +9745,7 @@ $as_echo_n "checking if gcc accepts -march=mips64r2 -mabi=64... " >&6; } - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -8958,20 +9754,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_M64="-march=mips64r2 -mabi=64" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - FLAG_M64="" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - -@@ -8981,8 +9778,8 @@ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext - ;; - *) - # does this compiler support -m32 ? -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -m32" >&5 --$as_echo_n "checking if gcc accepts -m32... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -m32" >&5 -+printf %s "checking if gcc accepts -m32... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-m32 -Werror" -@@ -8991,7 +9788,7 @@ $as_echo_n "checking if gcc accepts -m32... " >&6; } - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -9000,28 +9797,29 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_M32="-m32" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - FLAG_M32="" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - - - - # does this compiler support -m64 ? -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -m64" >&5 --$as_echo_n "checking if gcc accepts -m64... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -m64" >&5 -+printf %s "checking if gcc accepts -m64... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-m64 -Werror" -@@ -9030,7 +9828,7 @@ $as_echo_n "checking if gcc accepts -m64... " >&6; } - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -9039,20 +9837,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_M64="-m64" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - FLAG_M64="" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - -@@ -9063,8 +9862,8 @@ esac - ARCH=$(echo "$CFLAGS" | grep -E -e '-march=[^ ]+' -e '\B-mips[^ +]') - if test -z "$ARCH"; then - # does this compiler support -march=octeon (Cavium OCTEON I Specific) ? -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -march=octeon" >&5 --$as_echo_n "checking if gcc accepts -march=octeon... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -march=octeon" >&5 -+printf %s "checking if gcc accepts -march=octeon... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="$CFLAGS $FLAG_M64 -march=octeon -Werror" -@@ -9073,7 +9872,7 @@ $as_echo_n "checking if gcc accepts -march=octeon... " >&6; } - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -9082,28 +9881,29 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_OCTEON="-march=octeon" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - FLAG_OCTEON="" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - - - - # does this compiler support -march=octeon2 (Cavium OCTEON II Specific) ? -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -march=octeon2" >&5 --$as_echo_n "checking if gcc accepts -march=octeon2... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -march=octeon2" >&5 -+printf %s "checking if gcc accepts -march=octeon2... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="$CFLAGS $FLAG_M64 -march=octeon2 -Werror" -@@ -9112,7 +9912,7 @@ $as_echo_n "checking if gcc accepts -march=octeon2... " >&6; } - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -9121,20 +9921,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_OCTEON2="-march=octeon2" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - FLAG_OCTEON2="" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - -@@ -9142,8 +9943,8 @@ fi - - - # does this compiler support -mmsa (MIPS MSA ASE) ? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -mmsa" >&5 --$as_echo_n "checking if gcc accepts -mmsa... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -mmsa" >&5 -+printf %s "checking if gcc accepts -mmsa... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="$CFLAGS -mmsa -Werror" -@@ -9152,7 +9953,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -9161,27 +9962,28 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_MSA="-mmsa" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - FLAG_MSA="" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - - - # Are we compiling for the MIPS64 n32 ABI? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc is producing mips n32 binaries" >&5 --$as_echo_n "checking if gcc is producing mips n32 binaries... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc is producing mips n32 binaries" >&5 -+printf %s "checking if gcc is producing mips n32 binaries... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - -@@ -9190,24 +9992,25 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #endif - - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - VGCONF_ABI=N32 - FLAG_M64="-march=mips64r2 -mabi=n32" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - # Are we compiling for the MIPS64 n64 ABI? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc is producing mips n64 binaries" >&5 --$as_echo_n "checking if gcc is producing mips n64 binaries... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc is producing mips n64 binaries" >&5 -+printf %s "checking if gcc is producing mips n64 binaries... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - -@@ -9216,19 +10019,20 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #endif - - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - VGCONF_ABI=64 --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - # We enter the code block below in the following case: - # Target architecture is set to mips64, the desired abi -@@ -9239,13 +10043,13 @@ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext - if test "$ARCH_MAX" = "mips64" -a "x$VGCONF_ABI" = "x"; then - safe_CFLAGS=$CFLAGS - CFLAGS="$CFLAGS -mabi=64 -Werror" -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc is n64 capable" >&5 --$as_echo_n "checking if gcc is n64 capable... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc is n64 capable" >&5 -+printf %s "checking if gcc is n64 capable... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -9254,32 +10058,33 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - - VGCONF_ABI=64 -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - if test "x$VGCONF_ABI" = "x"; then - safe_CFLAGS=$CFLAGS - CFLAGS="$CFLAGS -mabi=n32 -Werror" -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc is n32 capable" >&5 --$as_echo_n "checking if gcc is n32 capable... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc is n32 capable" >&5 -+printf %s "checking if gcc is n32 capable... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -9288,20 +10093,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - - VGCONF_ABI=N32 - FLAG_M64="-march=mips64r2 -mabi=n32" -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - CFLAGS=$safe_CFLAGS - fi -@@ -9319,8 +10125,8 @@ fi - - - # does this compiler support -mmmx ? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -mmmx" >&5 --$as_echo_n "checking if gcc accepts -mmmx... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -mmmx" >&5 -+printf %s "checking if gcc accepts -mmmx... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-mmmx -Werror" -@@ -9329,7 +10135,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -9338,28 +10144,29 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_MMMX="-mmmx" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - FLAG_MMMX="" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - - - - # does this compiler support -msse ? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -msse" >&5 --$as_echo_n "checking if gcc accepts -msse... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -msse" >&5 -+printf %s "checking if gcc accepts -msse... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-msse -Werror" -@@ -9368,7 +10175,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -9377,20 +10184,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_MSSE="-msse" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - FLAG_MSSE="" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - -@@ -9402,8 +10210,8 @@ CFLAGS=$safe_CFLAGS - # doesn't recognise -m32 it's no big deal. We'll just get code for - # the Memcheck and other helper functions, that is a bit slower than - # it could be, on x86; and no difference at all on any other platform. --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -mpreferred-stack-boundary=2 -m32" >&5 --$as_echo_n "checking if gcc accepts -mpreferred-stack-boundary=2 -m32... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -mpreferred-stack-boundary=2 -m32" >&5 -+printf %s "checking if gcc accepts -mpreferred-stack-boundary=2 -m32... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-mpreferred-stack-boundary=2 -m32 -Werror" -@@ -9412,7 +10220,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -9421,35 +10229,36 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - PREFERRED_STACK_BOUNDARY_2="-mpreferred-stack-boundary=2" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - PREFERRED_STACK_BOUNDARY_2="" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - - - - # does this compiler support -mlong-double-128 ? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -mlong-double-128" >&5 --$as_echo_n "checking if gcc accepts -mlong-double-128... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -mlong-double-128" >&5 -+printf %s "checking if gcc accepts -mlong-double-128... " >&6; } - safe_CFLAGS=$CFLAGS - CFLAGS="-mlong-double-128 -Werror" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -9458,20 +10267,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_compiler_supports_mlong_double_128=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_compiler_supports_mlong_double_128=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - if test x$ac_compiler_supports_mlong_double_128 = xyes; then - HAS_MLONG_DOUBLE_128_TRUE= -@@ -9490,25 +10300,27 @@ FLAG_MLONG_DOUBLE_128="-mlong-double-128" - # If not enable-lto=* arg is provided, default to no, as lto builds are - # a lot slower, and so not appropriate for Valgrind developments. - # --enable-lto=yes should be used by distro packagers. --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for using the link time optimisation" >&5 --$as_echo_n "checking for using the link time optimisation... " >&6; } --if ${vg_cv_lto+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for using the link time optimisation" >&5 -+printf %s "checking for using the link time optimisation... " >&6; } -+if test ${vg_cv_lto+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - # Check whether --enable-lto was given. --if test "${enable_lto+set}" = set; then : -+if test ${enable_lto+y} -+then : - enableval=$enable_lto; vg_cv_lto=$enableval --else -+else $as_nop - vg_cv_lto=no - fi - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $vg_cv_lto" >&5 --$as_echo "$vg_cv_lto" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $vg_cv_lto" >&5 -+printf "%s\n" "$vg_cv_lto" >&6; } - - if test "x${vg_cv_lto}" != "xno" -a "x${LTO_AR}" != "x" -a "x${LTO_RANLIB}" != "x"; then --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if toolchain accepts lto" >&5 --$as_echo_n "checking if toolchain accepts lto... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if toolchain accepts lto" >&5 -+printf %s "checking if toolchain accepts lto... " >&6; } - safe_CFLAGS=$CFLAGS - TEST_LTO_CFLAGS="-flto -flto-partition=one -fuse-linker-plugin" - # Note : using 'one' partition is giving a slightly smaller/faster memcheck -@@ -9519,7 +10331,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - extern void somefun(void); -@@ -9530,20 +10342,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - LTO_CFLAGS=$TEST_LTO_CFLAGS --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - LTO_CFLAGS="" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - fi - -@@ -9561,7 +10374,7 @@ if test "x${LTO_CFLAGS}" = "x"; then - else - vg_cv_lto=yes - --$as_echo "#define ENABLE_LTO 1" >>confdefs.h -+printf "%s\n" "#define ENABLE_LTO 1" >>confdefs.h - - fi - -@@ -9579,624 +10392,644 @@ fi - - - -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -Wmemset-transposed-args" >&5 --$as_echo_n "checking if gcc accepts -Wmemset-transposed-args... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -Wmemset-transposed-args" >&5 -+printf %s "checking if gcc accepts -Wmemset-transposed-args... " >&6; } - safe_CFLAGS=$CFLAGS - CFLAGS="-Wmemset-transposed-args -Werror" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - ; - ; - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_W_NO_MEMSET_TRANSPOSED_ARGS=-Wno-memset-transposed-args - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } --else -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } -+else $as_nop - - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -Wnonnull" >&5 --$as_echo_n "checking if gcc accepts -Wnonnull... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -Wnonnull" >&5 -+printf %s "checking if gcc accepts -Wnonnull... " >&6; } - safe_CFLAGS=$CFLAGS - CFLAGS="-Wnonnull -Werror" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - ; - ; - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_W_NO_NONNULL=-Wno-nonnull - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } --else -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } -+else $as_nop - - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -Woverflow" >&5 --$as_echo_n "checking if gcc accepts -Woverflow... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -Woverflow" >&5 -+printf %s "checking if gcc accepts -Woverflow... " >&6; } - safe_CFLAGS=$CFLAGS - CFLAGS="-Woverflow -Werror" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - ; - ; - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_W_NO_OVERFLOW=-Wno-overflow - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } --else -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } -+else $as_nop - - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -Wpointer-sign" >&5 --$as_echo_n "checking if gcc accepts -Wpointer-sign... " >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -Wpointer-sign" >&5 -+printf %s "checking if gcc accepts -Wpointer-sign... " >&6; } - safe_CFLAGS=$CFLAGS - CFLAGS="-Wpointer-sign -Werror" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - ; - ; - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_W_NO_POINTER_SIGN=-Wno-pointer-sign - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } --else -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } -+else $as_nop - - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -Wuninitialized" >&5 --$as_echo_n "checking if gcc accepts -Wuninitialized... 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" >&6; } - safe_CFLAGS=$CFLAGS - CFLAGS="-Wuninitialized -Werror" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - ; - ; - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_W_NO_UNINITIALIZED=-Wno-uninitialized - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } --else -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } -+else $as_nop - - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -Wunused-function" >&5 --$as_echo_n "checking if gcc accepts -Wunused-function... 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" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -Wformat-security" >&5 -+printf %s "checking if gcc accepts -Wformat-security... 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" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -Wextra or -W" >&5 -+printf %s "checking if gcc accepts -Wextra or -W... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-Wextra -Werror" -@@ -10248,7 +11082,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -10257,21 +11091,22 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_W_EXTRA=-Wextra - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: -Wextra" >&5 --$as_echo "-Wextra" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: -Wextra" >&5 -+printf "%s\n" "-Wextra" >&6; } - --else -+else $as_nop - - CFLAGS="-W -Werror" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -10280,24 +11115,25 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_W_EXTRA=-W - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: -W" >&5 --$as_echo "-W" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: -W" >&5 -+printf "%s\n" "-W" >&6; } - --else -+else $as_nop - - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: not supported" >&5 --$as_echo "not supported" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: not supported" >&5 -+printf "%s\n" "not supported" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - # On ARM we do not want to pass -Wcast-align as that produces loads -@@ -10312,8 +11148,8 @@ else - fi - - # does this compiler support -faligned-new ? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if g++ accepts -faligned-new" >&5 --$as_echo_n "checking if g++ accepts -faligned-new... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if g++ accepts -faligned-new" >&5 -+printf %s "checking if g++ accepts -faligned-new... " >&6; } - - safe_CXXFLAGS=$CXXFLAGS - CXXFLAGS="-faligned-new -Werror" -@@ -10328,7 +11164,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -10337,20 +11173,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_cxx_try_compile "$LINENO"; then : -+if ac_fn_cxx_try_compile "$LINENO" -+then : - - FLAG_FALIGNED_NEW="-faligned-new" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - FLAG_FALIGNED_NEW="" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CXXFLAGS=$safe_CXXFLAGS - ac_ext=c - ac_cpp='$CPP $CPPFLAGS' -@@ -10362,8 +11199,8 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu - - - # does this compiler support -fno-stack-protector ? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -fno-stack-protector" >&5 --$as_echo_n "checking if gcc accepts -fno-stack-protector... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -fno-stack-protector" >&5 -+printf %s "checking if gcc accepts -fno-stack-protector... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-fno-stack-protector -Werror" -@@ -10372,7 +11209,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -10381,29 +11218,30 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - no_stack_protector=yes - FLAG_FNO_STACK_PROTECTOR="-fno-stack-protector" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - no_stack_protector=no - FLAG_FNO_STACK_PROTECTOR="" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - - - # does this compiler support -finline-functions ? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -finline-functions" >&5 --$as_echo_n "checking if gcc accepts -finline-functions... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -finline-functions" >&5 -+printf %s "checking if gcc accepts -finline-functions... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-finline-functions -Werror" -@@ -10412,7 +11250,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -10421,22 +11259,23 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - inline_functions=yes - FLAG_FINLINE_FUNCTIONS="-finline-functions" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - inline_functions=no - FLAG_FINLINE_FUNCTIONS="" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - -@@ -10448,8 +11287,8 @@ CFLAGS=$safe_CFLAGS - # "The optimization reduces code size and may disturb - # unwind stacks by replacing a function by equivalent - # one with a different name." --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -fno-ipa-icf" >&5 --$as_echo_n "checking if gcc accepts -fno-ipa-icf... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -fno-ipa-icf" >&5 -+printf %s "checking if gcc accepts -fno-ipa-icf... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-fno-ipa-icf -Werror" -@@ -10458,7 +11297,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -10467,22 +11306,23 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - no_ipa_icf=yes - FLAG_FNO_IPA_ICF="-fno-ipa-icf" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - no_ipa_icf=no - FLAG_FNO_IPA_ICF="" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - -@@ -10498,15 +11338,15 @@ CFLAGS=$safe_CFLAGS - # - # Only checked for if --enable-ubsan was given. - if test "x${vg_cv_ubsan}" = "xyes"; then --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -fsanitize=undefined -fno-sanitize=alignment" >&5 --$as_echo_n "checking if gcc accepts -fsanitize=undefined -fno-sanitize=alignment... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -fsanitize=undefined -fno-sanitize=alignment" >&5 -+printf %s "checking if gcc accepts -fsanitize=undefined -fno-sanitize=alignment... " >&6; } - safe_CFLAGS=$CFLAGS - CFLAGS="-fsanitize=undefined -fno-sanitize=alignment -Werror" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -10515,21 +11355,22 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_FSANITIZE="-fsanitize=undefined -fno-sanitize=alignment" - LIB_UBSAN="-static-libubsan" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - CFLAGS="-fsanitize=undefined -Werror" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -10538,33 +11379,34 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_FSANITIZE="-fsanitize=undefined" - LIB_UBSAN="-static-libubsan" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - FLAG_FSANITIZE="" - LIB_UBSAN="" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - - fi - # does this compiler support --param inline-unit-growth=... ? - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts --param inline-unit-growth" >&5 --$as_echo_n "checking if gcc accepts --param inline-unit-growth... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts --param inline-unit-growth" >&5 -+printf %s "checking if gcc accepts --param inline-unit-growth... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="--param inline-unit-growth=900 -Werror" -@@ -10573,7 +11415,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -10582,29 +11424,30 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_UNLIMITED_INLINE_UNIT_GROWTH="--param inline-unit-growth=900" - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - FLAG_UNLIMITED_INLINE_UNIT_GROWTH="" - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - - # does this compiler support -gdwarf-4 -fdebug-types-section ? - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -gdwarf-4 -fdebug-types-section" >&5 --$as_echo_n "checking if gcc accepts -gdwarf-4 -fdebug-types-section... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -gdwarf-4 -fdebug-types-section" >&5 -+printf %s "checking if gcc accepts -gdwarf-4 -fdebug-types-section... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-gdwarf-4 -fdebug-types-section -Werror" -@@ -10613,7 +11456,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -10622,20 +11465,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_dwarf4=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_dwarf4=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$ac_have_dwarf4 = xyes; then - DWARF4_TRUE= - DWARF4_FALSE='#' -@@ -10649,8 +11493,8 @@ CFLAGS=$safe_CFLAGS - - # does this compiler support -g -gz=zlib ? - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -g -gz=zlib" >&5 --$as_echo_n "checking if gcc accepts -g -gz=zlib... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -g -gz=zlib" >&5 -+printf %s "checking if gcc accepts -g -gz=zlib... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-g -gz=zlib" -@@ -10659,7 +11503,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -10668,20 +11512,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - - ac_have_gz_zlib=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_gz_zlib=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - if test x$ac_have_gz_zlib = xyes; then - GZ_ZLIB_TRUE= -@@ -10696,8 +11541,8 @@ CFLAGS=$safe_CFLAGS - - # does this compiler support -g -gz=zlib-gnu ? - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -g -gz=zlib-gnu" >&5 --$as_echo_n "checking if gcc accepts -g -gz=zlib-gnu... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -g -gz=zlib-gnu" >&5 -+printf %s "checking if gcc accepts -g -gz=zlib-gnu... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-g -gz=zlib-gnu" -@@ -10706,7 +11551,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -10715,20 +11560,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - - ac_have_gz_zlib_gnu=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_gz_zlib_gnu=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - if test x$ac_have_gz_zlib_gnu = xyes; then - GZ_ZLIB_GNU_TRUE= -@@ -10743,14 +11589,14 @@ CFLAGS=$safe_CFLAGS - - # does this compiler support nested functions ? - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts nested functions" >&5 --$as_echo_n "checking if gcc accepts nested functions... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts nested functions" >&5 -+printf %s "checking if gcc accepts nested functions... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - int foo() { return 1; } -@@ -10760,20 +11606,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_nested_functions=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_nested_functions=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$ac_have_nested_functions = xyes; then - HAVE_NESTED_FUNCTIONS_TRUE= - HAVE_NESTED_FUNCTIONS_FALSE='#' -@@ -10786,14 +11633,14 @@ fi - - # does this compiler support the 'p' constraint in ASM statements ? - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts the 'p' constraint in asm statements" >&5 --$as_echo_n "checking if gcc accepts the 'p' constraint in asm statements... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts the 'p' constraint in asm statements" >&5 -+printf %s "checking if gcc accepts the 'p' constraint in asm statements... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - char *p; -@@ -10803,20 +11650,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_asm_constraint_p=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_asm_constraint_p=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$ac_have_asm_constraint_p = xyes; then - HAVE_ASM_CONSTRAINT_P_TRUE= - HAVE_ASM_CONSTRAINT_P_FALSE='#' -@@ -10831,8 +11679,8 @@ fi - # Some compilers actually do not support -pie and report its usage - # as an error. We need to check if it is safe to use it first. - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -pie" >&5 --$as_echo_n "checking if gcc accepts -pie... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -pie" >&5 -+printf %s "checking if gcc accepts -pie... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-pie" -@@ -10841,7 +11689,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -10850,22 +11698,23 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - - FLAG_PIE="-pie" - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - FLAG_PIE="" - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - CFLAGS=$safe_CFLAGS - -@@ -10875,8 +11724,8 @@ CFLAGS=$safe_CFLAGS - # default. However this gets in the way with some tests, we use -no-pie - # for these. - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -no-pie" >&5 --$as_echo_n "checking if gcc accepts -no-pie... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc accepts -no-pie" >&5 -+printf %s "checking if gcc accepts -no-pie... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-no-pie" -@@ -10885,7 +11734,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return 0; -@@ -10894,22 +11743,23 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - FLAG_NO_PIE="-no-pie" - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - FLAG_NO_PIE="" - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - -@@ -10927,8 +11777,8 @@ CFLAGS=$safe_CFLAGS - # version of gold and we can fall back to using -Ttext which has the - # right semantics. - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if the linker accepts -Wl,-Ttext-segment" >&5 --$as_echo_n "checking if the linker accepts -Wl,-Ttext-segment... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if the linker accepts -Wl,-Ttext-segment" >&5 -+printf %s "checking if the linker accepts -Wl,-Ttext-segment... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-static -nodefaultlibs -nostartfiles -Wl,-Ttext-segment=$valt_load_address_pri_norml -Werror" -@@ -10937,24 +11787,25 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - int _start () { return 0; } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - - linker_using_t_text="no" - FLAG_T_TEXT="-Ttext-segment" - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - linker_using_t_text="yes" - FLAG_T_TEXT="-Ttext" - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - CFLAGS=$safe_CFLAGS - -@@ -10965,14 +11816,14 @@ CFLAGS=$safe_CFLAGS - # gold versions also support -Ttext-segment. So just assume that unless - # we can use -Ttext-segment we need to strip the build-id NOTEs. - if test "x${linker_using_t_text}" = "xyes"; then --{ $as_echo "$as_me:${as_lineno-$LINENO}: ld -Ttext used, need to strip build-id NOTEs." >&5 --$as_echo "$as_me: ld -Ttext used, need to strip build-id NOTEs." >&6;} -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: ld -Ttext used, need to strip build-id NOTEs." >&5 -+printf "%s\n" "$as_me: ld -Ttext used, need to strip build-id NOTEs." >&6;} - # does the linker support -Wl,--build-id=none ? Note, it's - # important that we test indirectly via whichever C compiler - # is selected, rather than testing /usr/bin/ld or whatever - # directly. --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if the linker accepts -Wl,--build-id=none" >&5 --$as_echo_n "checking if the linker accepts -Wl,--build-id=none... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if the linker accepts -Wl,--build-id=none" >&5 -+printf %s "checking if the linker accepts -Wl,--build-id=none... " >&6; } - safe_CFLAGS=$CFLAGS - CFLAGS="-Wl,--build-id=none -Werror" - -@@ -10980,47 +11831,48 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - return 0; - ; - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - - FLAG_NO_BUILD_ID="-Wl,--build-id=none" - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - FLAG_NO_BUILD_ID="" - -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - else --{ $as_echo "$as_me:${as_lineno-$LINENO}: ld -Ttext-segment used, no need to strip build-id NOTEs." >&5 --$as_echo "$as_me: ld -Ttext-segment used, no need to strip build-id NOTEs." >&6;} -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: ld -Ttext-segment used, no need to strip build-id NOTEs." >&5 -+printf "%s\n" "$as_me: ld -Ttext-segment used, no need to strip build-id NOTEs." >&6;} - FLAG_NO_BUILD_ID="" - - fi - CFLAGS=$safe_CFLAGS - - # does the ppc assembler support "mtocrf" et al? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if ppc32/64 as supports mtocrf/mfocrf" >&5 --$as_echo_n "checking if ppc32/64 as supports mtocrf/mfocrf... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if ppc32/64 as supports mtocrf/mfocrf" >&5 -+printf %s "checking if ppc32/64 as supports mtocrf/mfocrf... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - __asm__ __volatile__("mtocrf 4,0"); -@@ -11030,36 +11882,37 @@ __asm__ __volatile__("mfocrf 0,4"); - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_ppc_mftocrf=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_ppc_mftocrf=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$ac_have_as_ppc_mftocrf = xyes ; then - --$as_echo "#define HAVE_AS_PPC_MFTOCRF 1" >>confdefs.h -+printf "%s\n" "#define HAVE_AS_PPC_MFTOCRF 1" >>confdefs.h - - fi - - - # does the ppc assembler support "lfdp" and other phased out floating point insns? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if ppc32/64 asm supports phased out floating point instructions" >&5 --$as_echo_n "checking if ppc32/64 asm supports phased out floating point instructions... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if ppc32/64 asm supports phased out floating point instructions" >&5 -+printf %s "checking if ppc32/64 asm supports phased out floating point instructions... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { typedef struct { -@@ -11074,36 +11927,37 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_ppc_fpPO=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_ppc_fpPO=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$ac_have_as_ppc_fpPO = xyes ; then - --$as_echo "#define HAVE_AS_PPC_FPPO 1" >>confdefs.h -+printf "%s\n" "#define HAVE_AS_PPC_FPPO 1" >>confdefs.h - - fi - - - # does the amd64 assembler understand "fxsave64" and "fxrstor64"? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if amd64 assembler supports fxsave64/fxrstor64" >&5 --$as_echo_n "checking if amd64 assembler supports fxsave64/fxrstor64... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if amd64 assembler supports fxsave64/fxrstor64" >&5 -+printf %s "checking if amd64 assembler supports fxsave64/fxrstor64... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - void* p; -@@ -11114,37 +11968,38 @@ asm __volatile__("fxrstor64 (%0)" : : "r" (p) : "memory" ); - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_amd64_fxsave64=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_amd64_fxsave64=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$ac_have_as_amd64_fxsave64 = xyes ; then - --$as_echo "#define HAVE_AS_AMD64_FXSAVE64 1" >>confdefs.h -+printf "%s\n" "#define HAVE_AS_AMD64_FXSAVE64 1" >>confdefs.h - - fi - - # does the x86/amd64 assembler understand SSE3 instructions? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_SSE3_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks SSE3" >&5 --$as_echo_n "checking if x86/amd64 assembler speaks SSE3... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks SSE3" >&5 -+printf %s "checking if x86/amd64 assembler speaks SSE3... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { long long int x; -@@ -11155,20 +12010,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_sse3=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_sse3=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_sse3 = xyes; then - BUILD_SSE3_TESTS_TRUE= -@@ -11183,8 +12039,8 @@ fi - # Ditto for SSSE3 instructions (note extra S) - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_SSSE3_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks SSSE3" >&5 --$as_echo_n "checking if x86/amd64 assembler speaks SSSE3... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks SSSE3" >&5 -+printf %s "checking if x86/amd64 assembler speaks SSSE3... " >&6; } - - save_CFLAGS="$CFLAGS" - CFLAGS="$CFLAGS -msse -Werror" -@@ -11192,7 +12048,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { long long int x; -@@ -11204,20 +12060,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_ssse3=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_ssse3=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS="$save_CFLAGS" - - if test x$ac_have_as_ssse3 = xyes; then -@@ -11233,13 +12090,13 @@ fi - # does the x86/amd64 assembler understand the PCLMULQDQ instruction? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_PCLMULQDQ_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler supports 'pclmulqdq'" >&5 --$as_echo_n "checking if x86/amd64 assembler supports 'pclmulqdq'... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler supports 'pclmulqdq'" >&5 -+printf %s "checking if x86/amd64 assembler supports 'pclmulqdq'... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { -@@ -11251,20 +12108,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_pclmulqdq=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_pclmulqdq=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_pclmulqdq = xyes; then - BUILD_PCLMULQDQ_TESTS_TRUE= -@@ -11279,13 +12137,13 @@ fi - # does the x86/amd64 assembler understand the VPCLMULQDQ instruction? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_VPCLMULQDQ_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler supports 'vpclmulqdq'" >&5 --$as_echo_n "checking if x86/amd64 assembler supports 'vpclmulqdq'... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler supports 'vpclmulqdq'" >&5 -+printf %s "checking if x86/amd64 assembler supports 'vpclmulqdq'... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { -@@ -11302,20 +12160,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_vpclmulqdq=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_vpclmulqdq=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_vpclmulqdq = xyes; then - BUILD_VPCLMULQDQ_TESTS_TRUE= -@@ -11330,13 +12189,13 @@ fi - # does the x86/amd64 assembler understand FMA4 instructions? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_AFM4_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler supports FMA4 'vfmaddpd'" >&5 --$as_echo_n "checking if x86/amd64 assembler supports FMA4 'vfmaddpd'... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler supports FMA4 'vfmaddpd'" >&5 -+printf %s "checking if x86/amd64 assembler supports FMA4 'vfmaddpd'... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { -@@ -11348,20 +12207,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_vfmaddpd=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_vfmaddpd=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_vfmaddpd = xyes; then - BUILD_FMA4_TESTS_TRUE= -@@ -11376,14 +12236,14 @@ fi - # does the x86/amd64 assembler understand the LZCNT instruction? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_LZCNT_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler supports 'lzcnt'" >&5 --$as_echo_n "checking if x86/amd64 assembler supports 'lzcnt'... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler supports 'lzcnt'" >&5 -+printf %s "checking if x86/amd64 assembler supports 'lzcnt'... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { -@@ -11394,20 +12254,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_lzcnt=yes -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_lzcnt=no -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_lzcnt = xyes; then - BUILD_LZCNT_TESTS_TRUE= -@@ -11422,14 +12283,14 @@ fi - # does the x86/amd64 assembler understand the LOOPNEL instruction? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_LOOPNEL_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler supports 'loopnel'" >&5 --$as_echo_n "checking if x86/amd64 assembler supports 'loopnel'... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler supports 'loopnel'" >&5 -+printf %s "checking if x86/amd64 assembler supports 'loopnel'... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { -@@ -11440,20 +12301,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_loopnel=yes -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_loopnel=no -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_loopnel = xyes; then - BUILD_LOOPNEL_TESTS_TRUE= -@@ -11468,14 +12330,14 @@ fi - # does the x86/amd64 assembler understand ADDR32 ? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_ADDR32_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler supports 'addr32'" >&5 --$as_echo_n "checking if x86/amd64 assembler supports 'addr32'... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler supports 'addr32'" >&5 -+printf %s "checking if x86/amd64 assembler supports 'addr32'... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { -@@ -11486,20 +12348,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_addr32=yes -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_addr32=no -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_addr32 = xyes; then - BUILD_ADDR32_TESTS_TRUE= -@@ -11514,14 +12377,14 @@ fi - # does the x86/amd64 assembler understand SSE 4.2 instructions? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_SSE42_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks SSE4.2" >&5 --$as_echo_n "checking if x86/amd64 assembler speaks SSE4.2... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks SSE4.2" >&5 -+printf %s "checking if x86/amd64 assembler speaks SSE4.2... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { long long int x; -@@ -11537,20 +12400,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_sse42=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_sse42=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_sse42 = xyes; then - BUILD_SSE42_TESTS_TRUE= -@@ -11565,14 +12429,14 @@ fi - # does the x86/amd64 assembler understand AVX instructions? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_AVX_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks AVX" >&5 --$as_echo_n "checking if x86/amd64 assembler speaks AVX... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks AVX" >&5 -+printf %s "checking if x86/amd64 assembler speaks AVX... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { long long int x; -@@ -11586,20 +12450,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_avx=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_avx=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_avx = xyes; then - BUILD_AVX_TESTS_TRUE= -@@ -11614,14 +12479,14 @@ fi - # does the x86/amd64 assembler understand AVX2 instructions? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_AVX2_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks AVX2" >&5 --$as_echo_n "checking if x86/amd64 assembler speaks AVX2... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks AVX2" >&5 -+printf %s "checking if x86/amd64 assembler speaks AVX2... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { long long int x; -@@ -11635,20 +12500,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_avx2=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_avx2=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_avx2 = xyes; then - BUILD_AVX2_TESTS_TRUE= -@@ -11664,14 +12530,14 @@ fi - # the XACQUIRE/XRELEASE prefixes? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_TSX_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks TSX" >&5 --$as_echo_n "checking if x86/amd64 assembler speaks TSX... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks TSX" >&5 -+printf %s "checking if x86/amd64 assembler speaks TSX... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { -@@ -11687,20 +12553,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_tsx=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_tsx=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_tsx = xyes; then - BUILD_TSX_TESTS_TRUE= -@@ -11715,14 +12582,14 @@ fi - # does the x86/amd64 assembler understand BMI1 and BMI2 instructions? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_BMI_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks BMI1 and BMI2" >&5 --$as_echo_n "checking if x86/amd64 assembler speaks BMI1 and BMI2... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks BMI1 and BMI2" >&5 -+printf %s "checking if x86/amd64 assembler speaks BMI1 and BMI2... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { unsigned int h, l; -@@ -11737,20 +12604,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_bmi=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_bmi=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_bmi = xyes; then - BUILD_BMI_TESTS_TRUE= -@@ -11765,14 +12633,14 @@ fi - # does the x86/amd64 assembler understand FMA instructions? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_FMA_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks FMA" >&5 --$as_echo_n "checking if x86/amd64 assembler speaks FMA... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks FMA" >&5 -+printf %s "checking if x86/amd64 assembler speaks FMA... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { unsigned int h, l; -@@ -11788,20 +12656,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_fma=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_fma=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_fma = xyes; then - BUILD_FMA_TESTS_TRUE= -@@ -11816,14 +12685,14 @@ fi - # does the amd64 assembler understand MPX instructions? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_MPX_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if amd64 assembler knows the MPX instructions" >&5 --$as_echo_n "checking if amd64 assembler knows the MPX instructions... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if amd64 assembler knows the MPX instructions" >&5 -+printf %s "checking if amd64 assembler knows the MPX instructions... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { -@@ -11839,20 +12708,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_mpx=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_mpx=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_mpx = xyes; then - BUILD_MPX_TESTS_TRUE= -@@ -11867,14 +12737,14 @@ fi - # does the amd64 assembler understand ADX instructions? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_ADX_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if amd64 assembler knows the ADX instructions" >&5 --$as_echo_n "checking if amd64 assembler knows the ADX instructions... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if amd64 assembler knows the ADX instructions" >&5 -+printf %s "checking if amd64 assembler knows the ADX instructions... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { -@@ -11885,20 +12755,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_adx=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_adx=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_adx = xyes; then - BUILD_ADX_TESTS_TRUE= -@@ -11913,14 +12784,14 @@ fi - # does the amd64 assembler understand the RDRAND instruction? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_RDRAND_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if amd64 assembler knows the RDRAND instruction" >&5 --$as_echo_n "checking if amd64 assembler knows the RDRAND instruction... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if amd64 assembler knows the RDRAND instruction" >&5 -+printf %s "checking if amd64 assembler knows the RDRAND instruction... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { -@@ -11933,20 +12804,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_rdrand=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_rdrand=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_rdrand = xyes; then - BUILD_RDRAND_TESTS_TRUE= -@@ -11962,14 +12834,14 @@ fi - # VCVTPS2PH) ? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_F16C_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if amd64 assembler knows the F16C instructions" >&5 --$as_echo_n "checking if amd64 assembler knows the F16C instructions... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if amd64 assembler knows the F16C instructions" >&5 -+printf %s "checking if amd64 assembler knows the F16C instructions... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { -@@ -11983,20 +12855,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_f16c=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_f16c=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_f16c = xyes; then - BUILD_F16C_TESTS_TRUE= -@@ -12011,14 +12884,14 @@ fi - # does the x86/amd64 assembler understand MOVBE? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_MOVBE_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler knows the MOVBE insn" >&5 --$as_echo_n "checking if x86/amd64 assembler knows the MOVBE insn... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler knows the MOVBE insn" >&5 -+printf %s "checking if x86/amd64 assembler knows the MOVBE insn... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - do { long long int x; -@@ -12030,20 +12903,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_as_movbe=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_as_movbe=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - - if test x$ac_have_as_movbe = xyes; then - BUILD_MOVBE_TESTS_TRUE= -@@ -12058,8 +12932,8 @@ fi - # Does the C compiler support the "ifunc" attribute - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_IFUNC_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc supports the ifunc attribute" >&5 --$as_echo_n "checking if gcc supports the ifunc attribute... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc supports the ifunc attribute" >&5 -+printf %s "checking if gcc supports the ifunc attribute... " >&6; } - - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ -@@ -12080,20 +12954,21 @@ int main() - } - - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - - ac_have_ifunc_attr=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_ifunc_attr=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - - if test x$ac_have_ifunc_attr = xyes; then -@@ -12108,8 +12983,8 @@ fi - # Does the C compiler support the armv8 crc feature flag - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_ARMV8_CRC_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc supports the armv8 crc feature flag" >&5 --$as_echo_n "checking if gcc supports the armv8 crc feature flag... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc supports the armv8 crc feature flag" >&5 -+printf %s "checking if gcc supports the armv8 crc feature flag... " >&6; } - - save_CFLAGS="$CFLAGS" - CFLAGS="$CFLAGS -march=armv8-a+crc -Werror" -@@ -12122,20 +12997,21 @@ int main() - } - - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_armv8_crc_feature=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_armv8_crc_feature=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS="$save_CFLAGS" - - if test x$ac_have_armv8_crc_feature = xyes; then -@@ -12151,8 +13027,8 @@ fi - # Does the C compiler support the armv81 flag and the assembler v8.1 instructions - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_ARMV81_TESTS), used in test Makefile.am's --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc supports the armv81 feature flag and assembler supports v8.1 instructions" >&5 --$as_echo_n "checking if gcc supports the armv81 feature flag and assembler supports v8.1 instructions... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc supports the armv81 feature flag and assembler supports v8.1 instructions" >&5 -+printf %s "checking if gcc supports the armv81 feature flag and assembler supports v8.1 instructions... " >&6; } - - save_CFLAGS="$CFLAGS" - CFLAGS="$CFLAGS -march=armv8.1-a -Werror" -@@ -12166,20 +13042,21 @@ int main() - } - - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_armv81_feature=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_armv81_feature=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS="$save_CFLAGS" - - if test x$ac_have_armv81_feature = xyes; then -@@ -12200,50 +13077,55 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - static __thread int foo; - int --main () -+main (void) - { - return foo; - ; - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - vg_cv_linktime_tls=yes --else -+else $as_nop - vg_cv_linktime_tls=no - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - # Native compilation: check whether running a program using TLS succeeds. - # Linking only is not sufficient -- e.g. on Red Hat 7.3 linking TLS programs - # succeeds but running programs using TLS fails. - # Cross-compiling: check whether linking a program using TLS succeeds. --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for TLS support" >&5 --$as_echo_n "checking for TLS support... " >&6; } --if ${vg_cv_tls+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for TLS support" >&5 -+printf %s "checking for TLS support... " >&6; } -+if test ${vg_cv_tls+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - # Check whether --enable-tls was given. --if test "${enable_tls+set}" = set; then : -+if test ${enable_tls+y} -+then : - enableval=$enable_tls; vg_cv_tls=$enableval --else -- if test "$cross_compiling" = yes; then : -+else $as_nop -+ if test "$cross_compiling" = yes -+then : - vg_cv_tls=$vg_cv_linktime_tls --else -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - static __thread int foo; - int --main () -+main (void) - { - return foo; - ; - return 0; - } - _ACEOF --if ac_fn_c_try_run "$LINENO"; then : -+if ac_fn_c_try_run "$LINENO" -+then : - vg_cv_tls=yes --else -+else $as_nop - vg_cv_tls=no - fi - rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \ -@@ -12253,12 +13135,12 @@ fi - fi - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $vg_cv_tls" >&5 --$as_echo "$vg_cv_tls" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $vg_cv_tls" >&5 -+printf "%s\n" "$vg_cv_tls" >&6; } - - if test "$vg_cv_tls" = yes -a $is_clang != applellvm; then - --$as_echo "#define HAVE_TLS 1" >>confdefs.h -+printf "%s\n" "#define HAVE_TLS 1" >>confdefs.h - - fi - -@@ -12268,18 +13150,13 @@ fi - #---------------------------------------------------------------------------- - - if test "$VGCONF_OS" = "solaris" ; then --for ac_header in sys/lgrp_user_impl.h --do : -- ac_fn_c_check_header_mongrel "$LINENO" "sys/lgrp_user_impl.h" "ac_cv_header_sys_lgrp_user_impl_h" "$ac_includes_default" --if test "x$ac_cv_header_sys_lgrp_user_impl_h" = xyes; then : -- cat >>confdefs.h <<_ACEOF --#define HAVE_SYS_LGRP_USER_IMPL_H 1 --_ACEOF -+ac_fn_c_check_header_compile "$LINENO" "sys/lgrp_user_impl.h" "ac_cv_header_sys_lgrp_user_impl_h" "$ac_includes_default" -+if test "x$ac_cv_header_sys_lgrp_user_impl_h" = xyes -+then : -+ printf "%s\n" "#define HAVE_SYS_LGRP_USER_IMPL_H 1" >>confdefs.h - - fi - --done -- - - # Solaris-specific check determining if the Sun Studio Assembler is used to - # build Valgrind. The test checks if the x86/amd64 assembler understands the -@@ -12288,14 +13165,14 @@ done - # C-level symbol: none - # Automake-level symbol: SOLARIS_SUN_STUDIO_AS - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks cmovl.l (Solaris-specific)" >&5 --$as_echo_n "checking if x86/amd64 assembler speaks cmovl.l (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if x86/amd64 assembler speaks cmovl.l (Solaris-specific)" >&5 -+printf %s "checking if x86/amd64 assembler speaks cmovl.l (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - - int --main () -+main (void) - { - - __asm__ __volatile__("cmovl.l %edx, %eax"); -@@ -12304,20 +13181,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_have_sun_studio_as=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - solaris_have_sun_studio_as=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_have_sun_studio_as = xyes; then - SOLARIS_SUN_STUDIO_AS_TRUE= - SOLARIS_SUN_STUDIO_AS_FALSE='#' -@@ -12338,8 +13216,8 @@ fi - # - save_CFLAGS="$CFLAGS" - CFLAGS="$CFLAGS -std=gnu99" --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if xpg symbols are present with -std=gnu99 (Solaris-specific)" >&5 --$as_echo_n "checking if xpg symbols are present with -std=gnu99 (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if xpg symbols are present with -std=gnu99 (Solaris-specific)" >&5 -+printf %s "checking if xpg symbols are present with -std=gnu99 (Solaris-specific)... " >&6; } - temp_dir=$( /usr/bin/mktemp -d ) - cat <<_ACEOF >${temp_dir}/mylib.c - #include -@@ -12349,12 +13227,12 @@ ${CC} ${CFLAGS} -fpic -shared -o ${temp_dir}/mylib.so ${temp_dir}/mylib.c - xpg_present=$( /usr/bin/nm ${temp_dir}/mylib.so | ${EGREP} '(__xpg4|__xpg6)' ) - if test "x${xpg_present}" = "x" ; then - solaris_xpg_symbols_present=no -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - else - solaris_xpg_symbols_present=yes -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - fi - rm -rf ${temp_dir} - if test x$solaris_xpg_symbols_present = xyes; then -@@ -12372,15 +13250,15 @@ CFLAGS="$save_CFLAGS" - # default for 32-bit executables. If it does, then set SOLARIS_UNDEF_LARGESOURCE - # variable with gcc flags which disable it. - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc enables largefile support for 32-bit apps (Solaris-specific)" >&5 --$as_echo_n "checking if gcc enables largefile support for 32-bit apps (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc enables largefile support for 32-bit apps (Solaris-specific)" >&5 -+printf %s "checking if gcc enables largefile support for 32-bit apps (Solaris-specific)... " >&6; } - save_CFLAGS="$CFLAGS" - CFLAGS="$CFLAGS -m32" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - return _LARGEFILE_SOURCE; -@@ -12389,20 +13267,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - SOLARIS_UNDEF_LARGESOURCE="-U_LARGEFILE_SOURCE -U_LARGEFILE64_SOURCE -U_FILE_OFFSET_BITS" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - SOLARIS_UNDEF_LARGESOURCE="" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS=$safe_CFLAGS - - -@@ -12413,11 +13292,12 @@ CFLAGS=$safe_CFLAGS - # C-level symbol: SOLARIS_PROC_CMDLINE - # Automake-level symbol: SOLARIS_PROC_CMDLINE - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for /proc/self/cmdline" >&5 --$as_echo_n "checking for /proc/self/cmdline... " >&6; } --if ${ac_cv_file__proc_self_cmdline+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for /proc/self/cmdline" >&5 -+printf %s "checking for /proc/self/cmdline... " >&6; } -+if test ${ac_cv_file__proc_self_cmdline+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - test "$cross_compiling" = yes && - as_fn_error $? "cannot check for file existence when cross compiling" "$LINENO" 5 - if test -r "/proc/self/cmdline"; then -@@ -12426,16 +13306,17 @@ else - ac_cv_file__proc_self_cmdline=no - fi - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_file__proc_self_cmdline" >&5 --$as_echo "$ac_cv_file__proc_self_cmdline" >&6; } --if test "x$ac_cv_file__proc_self_cmdline" = xyes; then : -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_file__proc_self_cmdline" >&5 -+printf "%s\n" "$ac_cv_file__proc_self_cmdline" >&6; } -+if test "x$ac_cv_file__proc_self_cmdline" = xyes -+then : - - solaris_proc_cmdline=yes - --$as_echo "#define SOLARIS_PROC_CMDLINE 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_PROC_CMDLINE 1" >>confdefs.h - - --else -+else $as_nop - - solaris_proc_cmdline=no - -@@ -12458,8 +13339,8 @@ fi - # C-level symbol: SOLARIS_LAUNCHER_DEFAULT_PLATFORM - # Automake-level symbol: none - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for default platform of Valgrind launcher (Solaris-specific)" >&5 --$as_echo_n "checking for default platform of Valgrind launcher (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for default platform of Valgrind launcher (Solaris-specific)" >&5 -+printf %s "checking for default platform of Valgrind launcher (Solaris-specific)... " >&6; } - # Get the ELF class of /bin/sh first. - if ! test -f /bin/sh; then - as_fn_error $? "Shell interpreter \`/bin/sh' not found." "$LINENO" 5 -@@ -12481,12 +13362,10 @@ case "$elf_class" in - ;; - esac - default_platform="$default_arch-$VGCONF_OS" --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $default_platform" >&5 --$as_echo "$default_platform" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $default_platform" >&5 -+printf "%s\n" "$default_platform" >&6; } - --cat >>confdefs.h <<_ACEOF --#define SOLARIS_LAUNCHER_DEFAULT_PLATFORM "$default_platform" --_ACEOF -+printf "%s\n" "#define SOLARIS_LAUNCHER_DEFAULT_PLATFORM \"$default_platform\"" >>confdefs.h - - - -@@ -12495,15 +13374,15 @@ _ACEOF - # C-level symbol: SOLARIS_OLD_SYSCALLS - # Automake-level symbol: SOLARIS_OLD_SYSCALLS - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the old Solaris syscalls (Solaris-specific)" >&5 --$as_echo_n "checking for the old Solaris syscalls (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the old Solaris syscalls (Solaris-specific)" >&5 -+printf %s "checking for the old Solaris syscalls (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !SYS_open; -@@ -12512,23 +13391,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_old_syscalls=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_OLD_SYSCALLS 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_OLD_SYSCALLS 1" >>confdefs.h - - --else -+else $as_nop - - solaris_old_syscalls=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_old_syscalls = xyes; then - SOLARIS_OLD_SYSCALLS_TRUE= - SOLARIS_OLD_SYSCALLS_FALSE='#' -@@ -12557,14 +13437,15 @@ fi - # C-level symbol: SOLARIS_NEW_ACCEPT_SYSCALL - # Automake-level symbol: none - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the new \`accept' syscall (Solaris-specific)" >&5 --$as_echo_n "checking for the new \`accept' syscall (Solaris-specific)... " >&6; } --if test "$cross_compiling" = yes; then : -- { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 --$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the new \`accept' syscall (Solaris-specific)" >&5 -+printf %s "checking for the new \`accept' syscall (Solaris-specific)... " >&6; } -+if test "$cross_compiling" = yes -+then : -+ { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} - as_fn_error $? "cannot run test program while cross compiling - See \`config.log' for more details" "$LINENO" 5; } --else -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - -@@ -12572,7 +13453,7 @@ else - #include - - int --main () -+main (void) - { - - errno = 0; -@@ -12583,18 +13464,19 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_run "$LINENO"; then : -+if ac_fn_c_try_run "$LINENO" -+then : - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_NEW_ACCEPT_SYSCALL 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_NEW_ACCEPT_SYSCALL 1" >>confdefs.h - - --else -+else $as_nop - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi - rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \ -@@ -12619,14 +13501,15 @@ fi - # C-level symbol: SOLARIS_NEW_PIPE_SYSCALL - # Automake-level symbol: none - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the new \`pipe' syscall (Solaris-specific)" >&5 --$as_echo_n "checking for the new \`pipe' syscall (Solaris-specific)... " >&6; } --if test "$cross_compiling" = yes; then : -- { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 --$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the new \`pipe' syscall (Solaris-specific)" >&5 -+printf %s "checking for the new \`pipe' syscall (Solaris-specific)... " >&6; } -+if test "$cross_compiling" = yes -+then : -+ { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} - as_fn_error $? "cannot run test program while cross compiling - See \`config.log' for more details" "$LINENO" 5; } --else -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - -@@ -12634,7 +13517,7 @@ else - #include - - int --main () -+main (void) - { - - errno = 0; -@@ -12645,18 +13528,19 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_run "$LINENO"; then : -+if ac_fn_c_try_run "$LINENO" -+then : - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_NEW_PIPE_SYSCALL 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_NEW_PIPE_SYSCALL 1" >>confdefs.h - - --else -+else $as_nop - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi - rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \ -@@ -12678,15 +13562,15 @@ fi - # C-level symbol: SOLARIS_LWP_SIGQUEUE_SYSCALL - # Automake-level symbol: SOLARIS_LWP_SIGQUEUE_SYSCALL - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the new \`lwp_sigqueue' syscall (Solaris-specific)" >&5 --$as_echo_n "checking for the new \`lwp_sigqueue' syscall (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the new \`lwp_sigqueue' syscall (Solaris-specific)" >&5 -+printf %s "checking for the new \`lwp_sigqueue' syscall (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !SYS_lwp_sigqueue; -@@ -12695,23 +13579,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_lwp_sigqueue_syscall=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_LWP_SIGQUEUE_SYSCALL 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_LWP_SIGQUEUE_SYSCALL 1" >>confdefs.h - - --else -+else $as_nop - - solaris_lwp_sigqueue_syscall=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_lwp_sigqueue_syscall = xyes; then - SOLARIS_LWP_SIGQUEUE_SYSCALL_TRUE= - SOLARIS_LWP_SIGQUEUE_SYSCALL_FALSE='#' -@@ -12743,14 +13628,15 @@ fi - # - - if test -z "$SOLARIS_LWP_SIGQUEUE_SYSCALL_TRUE"; then : -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking if the \`lwp_sigqueue' syscall accepts pid (Solaris-specific)" >&5 --$as_echo_n "checking if the \`lwp_sigqueue' syscall accepts pid (Solaris-specific)... " >&6; } --if test "$cross_compiling" = yes; then : -- { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 --$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if the \`lwp_sigqueue' syscall accepts pid (Solaris-specific)" >&5 -+printf %s "checking if the \`lwp_sigqueue' syscall accepts pid (Solaris-specific)... " >&6; } -+if test "$cross_compiling" = yes -+then : -+ { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} - as_fn_error $? "cannot run test program while cross compiling - See \`config.log' for more details" "$LINENO" 5; } --else -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - -@@ -12758,7 +13644,7 @@ else - #include - - int --main () -+main (void) - { - - errno = 0; -@@ -12769,20 +13655,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_run "$LINENO"; then : -+if ac_fn_c_try_run "$LINENO" -+then : - - solaris_lwp_sigqueue_syscall_takes_pid=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_LWP_SIGQUEUE_SYSCALL_TAKES_PID 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_LWP_SIGQUEUE_SYSCALL_TAKES_PID 1" >>confdefs.h - - --else -+else $as_nop - - solaris_lwp_sigqueue_syscall_takes_pid=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi - rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \ -@@ -12820,15 +13707,15 @@ fi - # C-level symbol: SOLARIS_LWP_NAME_SYSCALL - # Automake-level symbol: SOLARIS_LWP_NAME_SYSCALL - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the new \`lwp_name' syscall (Solaris-specific)" >&5 --$as_echo_n "checking for the new \`lwp_name' syscall (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the new \`lwp_name' syscall (Solaris-specific)" >&5 -+printf %s "checking for the new \`lwp_name' syscall (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !SYS_lwp_name; -@@ -12837,23 +13724,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_lwp_name_syscall=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_LWP_NAME_SYSCALL 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_LWP_NAME_SYSCALL 1" >>confdefs.h - - --else -+else $as_nop - - solaris_lwp_name_syscall=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_lwp_name_syscall = xyes; then - SOLARIS_LWP_NAME_SYSCALL_TRUE= - SOLARIS_LWP_NAME_SYSCALL_FALSE='#' -@@ -12873,15 +13761,15 @@ fi - # C-level symbol: SOLARIS_GETRANDOM_SYSCALL - # Automake-level symbol: SOLARIS_GETRANDOM_SYSCALL - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the new \`getrandom' syscall (Solaris-specific)" >&5 --$as_echo_n "checking for the new \`getrandom' syscall (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the new \`getrandom' syscall (Solaris-specific)" >&5 -+printf %s "checking for the new \`getrandom' syscall (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !SYS_getrandom; -@@ -12890,23 +13778,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_getrandom_syscall=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_GETRANDOM_SYSCALL 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_GETRANDOM_SYSCALL 1" >>confdefs.h - - --else -+else $as_nop - - solaris_getrandom_syscall=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_getrandom_syscall = xyes; then - SOLARIS_GETRANDOM_SYSCALL_TRUE= - SOLARIS_GETRANDOM_SYSCALL_FALSE='#' -@@ -12924,15 +13813,15 @@ fi - # C-level symbol: SOLARIS_ZONE_DEFUNCT - # Automake-level symbol: SOLARIS_ZONE_DEFUNCT - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for ZONE_LIST_DEFUNCT and ZONE_GETATTR_DEFUNCT (Solaris-specific)" >&5 --$as_echo_n "checking for ZONE_LIST_DEFUNCT and ZONE_GETATTR_DEFUNCT (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for ZONE_LIST_DEFUNCT and ZONE_GETATTR_DEFUNCT (Solaris-specific)" >&5 -+printf %s "checking for ZONE_LIST_DEFUNCT and ZONE_GETATTR_DEFUNCT (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !(ZONE_LIST_DEFUNCT && ZONE_GETATTR_DEFUNCT); -@@ -12941,23 +13830,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_zone_defunct=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_ZONE_DEFUNCT 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_ZONE_DEFUNCT 1" >>confdefs.h - - --else -+else $as_nop - - solaris_zone_defunct=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_zone_defunct = xyes; then - SOLARIS_ZONE_DEFUNCT_TRUE= - SOLARIS_ZONE_DEFUNCT_FALSE='#' -@@ -12976,15 +13866,15 @@ fi - # C-level symbol: SOLARIS_AUDITON_STAT - # Automake-level symbol: SOLARIS_AUDITON_STAT - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for A_GETSTAT and A_SETSTAT auditon(2) commands (Solaris-specific)" >&5 --$as_echo_n "checking for A_GETSTAT and A_SETSTAT auditon(2) commands (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for A_GETSTAT and A_SETSTAT auditon(2) commands (Solaris-specific)" >&5 -+printf %s "checking for A_GETSTAT and A_SETSTAT auditon(2) commands (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !(A_GETSTAT && A_SETSTAT); -@@ -12993,23 +13883,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_auditon_stat=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_AUDITON_STAT 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_AUDITON_STAT 1" >>confdefs.h - - --else -+else $as_nop - - solaris_auditon_stat=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_auditon_stat = xyes; then - SOLARIS_AUDITON_STAT_TRUE= - SOLARIS_AUDITON_STAT_FALSE='#' -@@ -13027,8 +13918,8 @@ fi - # C-level symbol: SOLARIS_SHM_NEW - # Automake-level symbol: SOLARIS_SHM_NEW - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for SHMADV, SHM_ADV_GET, SHM_ADV_SET and SHMGET_OSM (Solaris-specific)" >&5 --$as_echo_n "checking for SHMADV, SHM_ADV_GET, SHM_ADV_SET and SHMGET_OSM (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for SHMADV, SHM_ADV_GET, SHM_ADV_SET and SHMGET_OSM (Solaris-specific)" >&5 -+printf %s "checking for SHMADV, SHM_ADV_GET, SHM_ADV_SET and SHMGET_OSM (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - -@@ -13037,7 +13928,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - return !(IPC_XSTAT64 && SHMADV && SHM_ADV_GET && SHM_ADV_SET && SHMGET_OSM); -@@ -13046,23 +13937,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_shm_new=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_SHM_NEW 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_SHM_NEW 1" >>confdefs.h - - --else -+else $as_nop - - solaris_shm_new=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_shm_new = xyes; then - SOLARIS_SHM_NEW_TRUE= - SOLARIS_SHM_NEW_FALSE='#' -@@ -13079,15 +13971,15 @@ fi - # C-level symbol: SOLARIS_PRXREGSET_T - # Automake-level symbol: SOLARIS_PRXREGSET_T - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the \`prxregset_t' type (Solaris-specific)" >&5 --$as_echo_n "checking for the \`prxregset_t' type (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the \`prxregset_t' type (Solaris-specific)" >&5 -+printf %s "checking for the \`prxregset_t' type (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !sizeof(prxregset_t); -@@ -13096,23 +13988,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_prxregset_t=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_PRXREGSET_T 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_PRXREGSET_T 1" >>confdefs.h - - --else -+else $as_nop - - solaris_prxregset_t=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_prxregset_t = xyes; then - SOLARIS_PRXREGSET_T_TRUE= - SOLARIS_PRXREGSET_T_FALSE='#' -@@ -13132,15 +14025,15 @@ fi - # C-level symbol: SOLARIS_FREALPATHAT_SYSCALL - # Automake-level symbol: SOLARIS_FREALPATHAT_SYSCALL - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the new \`frealpathat' syscall (Solaris-specific)" >&5 --$as_echo_n "checking for the new \`frealpathat' syscall (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the new \`frealpathat' syscall (Solaris-specific)" >&5 -+printf %s "checking for the new \`frealpathat' syscall (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !SYS_frealpathat; -@@ -13149,23 +14042,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_frealpathat_syscall=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_FREALPATHAT_SYSCALL 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_FREALPATHAT_SYSCALL 1" >>confdefs.h - - --else -+else $as_nop - - solaris_frealpathat_syscall=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_frealpathat_syscall = xyes; then - SOLARIS_FREALPATHAT_SYSCALL_TRUE= - SOLARIS_FREALPATHAT_SYSCALL_FALSE='#' -@@ -13185,15 +14079,15 @@ fi - # C-level symbol: SOLARIS_UUIDSYS_SYSCALL - # Automake-level symbol: SOLARIS_UUIDSYS_SYSCALL - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the new \`uuidsys' syscall (Solaris-specific)" >&5 --$as_echo_n "checking for the new \`uuidsys' syscall (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the new \`uuidsys' syscall (Solaris-specific)" >&5 -+printf %s "checking for the new \`uuidsys' syscall (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !SYS_uuidsys; -@@ -13202,23 +14096,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_uuidsys_syscall=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_UUIDSYS_SYSCALL 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_UUIDSYS_SYSCALL 1" >>confdefs.h - - --else -+else $as_nop - - solaris_uuidsys_syscall=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_uuidsys_syscall = xyes; then - SOLARIS_UUIDSYS_SYSCALL_TRUE= - SOLARIS_UUIDSYS_SYSCALL_FALSE='#' -@@ -13236,15 +14131,15 @@ fi - # C-level symbol: SOLARIS_TNDB_GET_TNIP - # Automake-level symbol: SOLARIS_TNDB_GET_TNIP - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for TNDB_GET_TNIP (Solaris-specific)" >&5 --$as_echo_n "checking for TNDB_GET_TNIP (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for TNDB_GET_TNIP (Solaris-specific)" >&5 -+printf %s "checking for TNDB_GET_TNIP (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !TNDB_GET_TNIP; -@@ -13253,23 +14148,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_tndb_get_tnip=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_TNDB_GET_TNIP 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_TNDB_GET_TNIP 1" >>confdefs.h - - --else -+else $as_nop - - solaris_tndb_get_tnip=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_tndb_get_tnip = xyes; then - SOLARIS_TNDB_GET_TNIP_TRUE= - SOLARIS_TNDB_GET_TNIP_FALSE='#' -@@ -13287,15 +14183,15 @@ fi - # C-level symbol: SOLARIS_TSOL_CLEARANCE - # Automake-level symbol: SOLARIS_TSOL_CLEARANCE - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for TSOL_GETCLEARANCE and TSOL_SETCLEARANCE (Solaris-specific)" >&5 --$as_echo_n "checking for TSOL_GETCLEARANCE and TSOL_SETCLEARANCE (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for TSOL_GETCLEARANCE and TSOL_SETCLEARANCE (Solaris-specific)" >&5 -+printf %s "checking for TSOL_GETCLEARANCE and TSOL_SETCLEARANCE (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !(TSOL_GETCLEARANCE && TSOL_SETCLEARANCE); -@@ -13304,23 +14200,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_tsol_clearance=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_TSOL_CLEARANCE 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_TSOL_CLEARANCE 1" >>confdefs.h - - --else -+else $as_nop - - solaris_tsol_clearance=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_tsol_clearance = xyes; then - SOLARIS_TSOL_CLEARANCE_TRUE= - SOLARIS_TSOL_CLEARANCE_FALSE='#' -@@ -13338,15 +14235,15 @@ fi - # C-level symbol: SOLARIS_PSET_GET_NAME - # Automake-level symbol: SOLARIS_PSET_GET_NAME - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for PSET_GET_NAME (Solaris-specific)" >&5 --$as_echo_n "checking for PSET_GET_NAME (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for PSET_GET_NAME (Solaris-specific)" >&5 -+printf %s "checking for PSET_GET_NAME (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !(PSET_GET_NAME); -@@ -13355,23 +14252,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_pset_get_name=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_PSET_GET_NAME 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_PSET_GET_NAME 1" >>confdefs.h - - --else -+else $as_nop - - solaris_pset_get_name=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_pset_get_name = xyes; then - SOLARIS_PSET_GET_NAME_TRUE= - SOLARIS_PSET_GET_NAME_FALSE='#' -@@ -13388,15 +14286,15 @@ fi - # C-level symbol: SOLARIS_UTIMESYS_SYSCALL - # Automake-level symbol: SOLARIS_UTIMESYS_SYSCALL - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the \`utimesys' syscall (Solaris-specific)" >&5 --$as_echo_n "checking for the \`utimesys' syscall (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the \`utimesys' syscall (Solaris-specific)" >&5 -+printf %s "checking for the \`utimesys' syscall (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !SYS_utimesys; -@@ -13405,23 +14303,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_utimesys_syscall=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_UTIMESYS_SYSCALL 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_UTIMESYS_SYSCALL 1" >>confdefs.h - - --else -+else $as_nop - - solaris_utimesys_syscall=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_utimesys_syscall = xyes; then - SOLARIS_UTIMESYS_SYSCALL_TRUE= - SOLARIS_UTIMESYS_SYSCALL_FALSE='#' -@@ -13438,15 +14337,15 @@ fi - # C-level symbol: SOLARIS_UTIMENSAT_SYSCALL - # Automake-level symbol: SOLARIS_UTIMENSAT_SYSCALL - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the \`utimensat' syscall (Solaris-specific)" >&5 --$as_echo_n "checking for the \`utimensat' syscall (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the \`utimensat' syscall (Solaris-specific)" >&5 -+printf %s "checking for the \`utimensat' syscall (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !SYS_utimensat; -@@ -13455,23 +14354,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_utimensat_syscall=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_UTIMENSAT_SYSCALL 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_UTIMENSAT_SYSCALL 1" >>confdefs.h - - --else -+else $as_nop - - solaris_utimensat_syscall=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_utimensat_syscall = xyes; then - SOLARIS_UTIMENSAT_SYSCALL_TRUE= - SOLARIS_UTIMENSAT_SYSCALL_FALSE='#' -@@ -13488,15 +14388,15 @@ fi - # C-level symbol: SOLARIS_SPAWN_SYSCALL - # Automake-level symbol: SOLARIS_SPAWN_SYSCALL - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the \`spawn' syscall (Solaris-specific)" >&5 --$as_echo_n "checking for the \`spawn' syscall (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the \`spawn' syscall (Solaris-specific)" >&5 -+printf %s "checking for the \`spawn' syscall (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !SYS_spawn; -@@ -13505,23 +14405,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_spawn_syscall=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_SPAWN_SYSCALL 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_SPAWN_SYSCALL 1" >>confdefs.h - - --else -+else $as_nop - - solaris_spawn_syscall=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_spawn_syscall = xyes; then - SOLARIS_SPAWN_SYSCALL_TRUE= - SOLARIS_SPAWN_SYSCALL_FALSE='#' -@@ -13538,15 +14439,15 @@ fi - # C-level symbol: SOLARIS_MODCTL_MODNVL - # Automake-level symbol: SOLARIS_MODCTL_MODNVL - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for MODNVL_CTRLMAP through MODDEVINFO_CACHE_TS modctl(2) commands (Solaris-specific)" >&5 --$as_echo_n "checking for MODNVL_CTRLMAP through MODDEVINFO_CACHE_TS modctl(2) commands (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for MODNVL_CTRLMAP through MODDEVINFO_CACHE_TS modctl(2) commands (Solaris-specific)" >&5 -+printf %s "checking for MODNVL_CTRLMAP through MODDEVINFO_CACHE_TS modctl(2) commands (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !(MODNVL_CTRLMAP && MODDEVINFO_CACHE_TS); -@@ -13555,23 +14456,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_modctl_modnvl=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_MODCTL_MODNVL 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_MODCTL_MODNVL 1" >>confdefs.h - - --else -+else $as_nop - - solaris_modctl_modnvl=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_modctl_modnvl = xyes; then - SOLARIS_MODCTL_MODNVL_TRUE= - SOLARIS_MODCTL_MODNVL_FALSE='#' -@@ -13592,19 +14494,19 @@ fi - # C-level symbol: SOLARIS_NSCD_DOOR_SYSTEM_VOLATILE - # Automake-level symbol: SOLARIS_NSCD_DOOR_SYSTEM_VOLATILE - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for nscd door location (Solaris-specific)" >&5 --$as_echo_n "checking for nscd door location (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for nscd door location (Solaris-specific)" >&5 -+printf %s "checking for nscd door location (Solaris-specific)... " >&6; } - if test -e /system/volatile/name_service_door; then - solaris_nscd_door_system_volatile=yes -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: /system/volatile/name_service_door" >&5 --$as_echo "/system/volatile/name_service_door" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: /system/volatile/name_service_door" >&5 -+printf "%s\n" "/system/volatile/name_service_door" >&6; } - --$as_echo "#define SOLARIS_NSCD_DOOR_SYSTEM_VOLATILE 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_NSCD_DOOR_SYSTEM_VOLATILE 1" >>confdefs.h - - else - solaris_nscd_door_system_volatile=no -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: /var/run/name_service_door" >&5 --$as_echo "/var/run/name_service_door" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: /var/run/name_service_door" >&5 -+printf "%s\n" "/var/run/name_service_door" >&6; } - fi - if test x$solaris_nscd_door_system_volatile = xyes; then - SOLARIS_NSCD_DOOR_SYSTEM_VOLATILE_TRUE= -@@ -13624,15 +14526,15 @@ fi - # C-level symbol: SOLARIS_GETHRT_FASTTRAP - # Automake-level symbol: SOLARIS_GETHRT_FASTTRAP - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the new \`gethrt' fasttrap (Solaris-specific)" >&5 --$as_echo_n "checking for the new \`gethrt' fasttrap (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the new \`gethrt' fasttrap (Solaris-specific)" >&5 -+printf %s "checking for the new \`gethrt' fasttrap (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !T_GETHRT; -@@ -13641,23 +14543,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_gethrt_fasttrap=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_GETHRT_FASTTRAP 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_GETHRT_FASTTRAP 1" >>confdefs.h - - --else -+else $as_nop - - solaris_gethrt_fasttrap=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_gethrt_fasttrap = xyes; then - SOLARIS_GETHRT_FASTTRAP_TRUE= - SOLARIS_GETHRT_FASTTRAP_FALSE='#' -@@ -13677,15 +14580,15 @@ fi - # C-level symbol: SOLARIS_GETZONEOFFSET_FASTTRAP - # Automake-level symbol: SOLARIS_GETZONEOFFSET_FASTTRAP - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the new \`get_zone_offset' fasttrap (Solaris-specific)" >&5 --$as_echo_n "checking for the new \`get_zone_offset' fasttrap (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the new \`get_zone_offset' fasttrap (Solaris-specific)" >&5 -+printf %s "checking for the new \`get_zone_offset' fasttrap (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !T_GETZONEOFFSET; -@@ -13694,23 +14597,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_getzoneoffset_fasttrap=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_GETZONEOFFSET_FASTTRAP 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_GETZONEOFFSET_FASTTRAP 1" >>confdefs.h - - --else -+else $as_nop - - solaris_getzoneoffset_fasttrap=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_getzoneoffset_fasttrap = xyes; then - SOLARIS_GETZONEOFFSET_FASTTRAP_TRUE= - SOLARIS_GETZONEOFFSET_FASTTRAP_FALSE='#' -@@ -13737,14 +14641,15 @@ fi - # C-level symbol: SOLARIS_EXECVE_SYSCALL_TAKES_FLAGS - # Automake-level symbol: SOLARIS_EXECVE_SYSCALL_TAKES_FLAGS - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if the \`execve' syscall accepts flags (Solaris-specific)" >&5 --$as_echo_n "checking if the \`execve' syscall accepts flags (Solaris-specific)... " >&6; } --if test "$cross_compiling" = yes; then : -- { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 --$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if the \`execve' syscall accepts flags (Solaris-specific)" >&5 -+printf %s "checking if the \`execve' syscall accepts flags (Solaris-specific)... " >&6; } -+if test "$cross_compiling" = yes -+then : -+ { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} - as_fn_error $? "cannot run test program while cross compiling - See \`config.log' for more details" "$LINENO" 5; } --else -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - -@@ -13752,7 +14657,7 @@ else - #include - - int --main () -+main (void) - { - - errno = 0; -@@ -13763,20 +14668,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_run "$LINENO"; then : -+if ac_fn_c_try_run "$LINENO" -+then : - - solaris_execve_syscall_takes_flags=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_EXECVE_SYSCALL_TAKES_FLAGS 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_EXECVE_SYSCALL_TAKES_FLAGS 1" >>confdefs.h - - --else -+else $as_nop - - solaris_execve_syscall_takes_flags=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi - rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \ -@@ -13802,11 +14708,12 @@ fi - # - # Extract the first word of "dis", so it can be a program name with args. - set dummy dis; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_path_DIS_PATH+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_path_DIS_PATH+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - case $DIS_PATH in - [\\/]* | ?:[\\/]*) - ac_cv_path_DIS_PATH="$DIS_PATH" # Let the user override the test with a path. -@@ -13816,11 +14723,15 @@ else - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -- ac_cv_path_DIS_PATH="$as_dir/$ac_word$ac_exec_ext" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then -+ ac_cv_path_DIS_PATH="$as_dir$ac_word$ac_exec_ext" -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -13833,25 +14744,26 @@ esac - fi - DIS_PATH=$ac_cv_path_DIS_PATH - if test -n "$DIS_PATH"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DIS_PATH" >&5 --$as_echo "$DIS_PATH" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $DIS_PATH" >&5 -+printf "%s\n" "$DIS_PATH" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - - if test "x$DIS_PATH" = "xfalse"; then -- { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 --$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -+ { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} - as_fn_error $? "Object code disassembler (\`dis') not found. - See \`config.log' for more details" "$LINENO" 5; } - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for scf_handle_bind in -lscf" >&5 --$as_echo_n "checking for scf_handle_bind in -lscf... " >&6; } --if ${ac_cv_lib_scf_scf_handle_bind+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for scf_handle_bind in -lscf" >&5 -+printf %s "checking for scf_handle_bind in -lscf... " >&6; } -+if test ${ac_cv_lib_scf_scf_handle_bind+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - ac_check_lib_save_LIBS=$LIBS - LIBS="-lscf $LIBS" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -@@ -13860,70 +14772,65 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* Override any GCC internal prototype to avoid an error. - Use char because int might match the return type of a GCC - builtin and then its argument prototype would still apply. */ --#ifdef __cplusplus --extern "C" --#endif - char scf_handle_bind (); - int --main () -+main (void) - { - return scf_handle_bind (); - ; - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - ac_cv_lib_scf_scf_handle_bind=yes --else -+else $as_nop - ac_cv_lib_scf_scf_handle_bind=no - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - LIBS=$ac_check_lib_save_LIBS - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_scf_scf_handle_bind" >&5 --$as_echo "$ac_cv_lib_scf_scf_handle_bind" >&6; } --if test "x$ac_cv_lib_scf_scf_handle_bind" = xyes; then : -- cat >>confdefs.h <<_ACEOF --#define HAVE_LIBSCF 1 --_ACEOF -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_scf_scf_handle_bind" >&5 -+printf "%s\n" "$ac_cv_lib_scf_scf_handle_bind" >&6; } -+if test "x$ac_cv_lib_scf_scf_handle_bind" = xyes -+then : -+ printf "%s\n" "#define HAVE_LIBSCF 1" >>confdefs.h - - LIBS="-lscf $LIBS" - --else -+else $as_nop - -- { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: Function \`scf_handle_bind' was not found in \`libscf'." >&5 --$as_echo "$as_me: WARNING: Function \`scf_handle_bind' was not found in \`libscf'." >&2;} -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: Function \`scf_handle_bind' was not found in \`libscf'." >&5 -+printf "%s\n" "$as_me: WARNING: Function \`scf_handle_bind' was not found in \`libscf'." >&2;} - as_fn_error $? "Cannot determine version of the repository cache protocol." "$LINENO" 5 - - fi - - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for version of the repository cache protocol (Solaris-specific)" >&5 --$as_echo_n "checking for version of the repository cache protocol (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for version of the repository cache protocol (Solaris-specific)" >&5 -+printf %s "checking for version of the repository cache protocol (Solaris-specific)... " >&6; } - if test "X$VGCONF_ARCH_PRI" = "Xamd64"; then - libscf=/usr/lib/64/libscf.so.1 - else - libscf=/usr/lib/libscf.so.1 - fi - if ! $DIS_PATH -F scf_handle_bind $libscf | grep -q 0x526570; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: Function \`scf_handle_bind' does not contain repository cache protocol version." >&5 --$as_echo "$as_me: WARNING: Function \`scf_handle_bind' does not contain repository cache protocol version." >&2;} -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: Function \`scf_handle_bind' does not contain repository cache protocol version." >&5 -+printf "%s\n" "$as_me: WARNING: Function \`scf_handle_bind' does not contain repository cache protocol version." >&2;} - as_fn_error $? "Cannot determine version of the repository cache protocol." "$LINENO" 5 - fi - hex=$( $DIS_PATH -F scf_handle_bind $libscf | sed -n 's/.*0x526570\(..\).*/\1/p' ) - if test -z "$hex"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: Version of the repository cache protocol is empty?!" >&5 --$as_echo "$as_me: WARNING: Version of the repository cache protocol is empty?!" >&2;} -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: Version of the repository cache protocol is empty?!" >&5 -+printf "%s\n" "$as_me: WARNING: Version of the repository cache protocol is empty?!" >&2;} - as_fn_error $? "Cannot determine version of the repository cache protocol." "$LINENO" 5 - fi - version=$( printf "%d\n" 0x$hex ) --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $version" >&5 --$as_echo "$version" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $version" >&5 -+printf "%s\n" "$version" >&6; } - --cat >>confdefs.h <<_ACEOF --#define SOLARIS_REPCACHE_PROTOCOL_VERSION $version --_ACEOF -+printf "%s\n" "#define SOLARIS_REPCACHE_PROTOCOL_VERSION $version" >>confdefs.h - - - -@@ -13937,15 +14844,15 @@ _ACEOF - # C-level symbol: SOLARIS_RESERVE_SYSSTAT_ADDR - # Automake-level symbol: SOLARIS_RESERVE_SYSSTAT_ADDR - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the new \`sysstat' segment reservation (Solaris-specific)" >&5 --$as_echo_n "checking for the new \`sysstat' segment reservation (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the new \`sysstat' segment reservation (Solaris-specific)" >&5 -+printf %s "checking for the new \`sysstat' segment reservation (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !AT_SUN_SYSSTAT_ADDR; -@@ -13954,23 +14861,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_reserve_sysstat_addr=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_RESERVE_SYSSTAT_ADDR 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_RESERVE_SYSSTAT_ADDR 1" >>confdefs.h - - --else -+else $as_nop - - solaris_reserve_sysstat_addr=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_reserve_sysstat_addr = xyes; then - SOLARIS_RESERVE_SYSSTAT_ADDR_TRUE= - SOLARIS_RESERVE_SYSSTAT_ADDR_FALSE='#' -@@ -13991,15 +14899,15 @@ fi - # C-level symbol: SOLARIS_RESERVE_SYSSTAT_ZONE_ADDR - # Automake-level symbol: SOLARIS_RESERVE_SYSSTAT_ZONE_ADDR - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the new \`sysstat_zone' segment reservation (Solaris-specific)" >&5 --$as_echo_n "checking for the new \`sysstat_zone' segment reservation (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the new \`sysstat_zone' segment reservation (Solaris-specific)" >&5 -+printf %s "checking for the new \`sysstat_zone' segment reservation (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !AT_SUN_SYSSTAT_ZONE_ADDR; -@@ -14008,23 +14916,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_reserve_sysstat_zone_addr=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_RESERVE_SYSSTAT_ZONE_ADDR 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_RESERVE_SYSSTAT_ZONE_ADDR 1" >>confdefs.h - - --else -+else $as_nop - - solaris_reserve_sysstat_zone_addr=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_reserve_sysstat_zone_addr = xyes; then - SOLARIS_RESERVE_SYSSTAT_ZONE_ADDR_TRUE= - SOLARIS_RESERVE_SYSSTAT_ZONE_ADDR_FALSE='#' -@@ -14041,15 +14950,15 @@ fi - # C-level symbol: SOLARIS_SYSTEM_STATS_SYSCALL - # Automake-level symbol: SOLARIS_SYSTEM_STATS_SYSCALL - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for the \`system_stats' syscall (Solaris-specific)" >&5 --$as_echo_n "checking for the \`system_stats' syscall (Solaris-specific)... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for the \`system_stats' syscall (Solaris-specific)" >&5 -+printf %s "checking for the \`system_stats' syscall (Solaris-specific)... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !SYS_system_stats; -@@ -14058,23 +14967,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - solaris_system_stats_syscall=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_SYSTEM_STATS_SYSCALL 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_SYSTEM_STATS_SYSCALL 1" >>confdefs.h - - --else -+else $as_nop - - solaris_system_stats_syscall=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - if test x$solaris_system_stats_syscall = xyes; then - SOLARIS_SYSTEM_STATS_SYSCALL_TRUE= - SOLARIS_SYSTEM_STATS_SYSCALL_FALSE='#' -@@ -14093,15 +15003,16 @@ fi - # - ac_fn_c_check_type "$LINENO" "struct _fpchip_state" "ac_cv_type_struct__fpchip_state" "#include - " --if test "x$ac_cv_type_struct__fpchip_state" = xyes; then : -+if test "x$ac_cv_type_struct__fpchip_state" = xyes -+then : - solaris_fpchip_state_takes_underscore=yes --else -+else $as_nop - solaris_fpchip_state_takes_underscore=no - fi - - if test "$solaris_fpchip_state_takes_underscore" = "yes"; then - --$as_echo "#define SOLARIS_FPCHIP_STATE_TAKES_UNDERSCORE 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_FPCHIP_STATE_TAKES_UNDERSCORE 1" >>confdefs.h - - fi - -@@ -14113,14 +15024,15 @@ fi - # C-level symbol: SOLARIS_SCHEDCTL_PAGE_EXEC - # Automake-level symbol: none - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if schedctl page is executable (Solaris-specific)" >&5 --$as_echo_n "checking if schedctl page is executable (Solaris-specific)... " >&6; } --if test "$cross_compiling" = yes; then : -- { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 --$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if schedctl page is executable (Solaris-specific)" >&5 -+printf %s "checking if schedctl page is executable (Solaris-specific)... " >&6; } -+if test "$cross_compiling" = yes -+then : -+ { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} - as_fn_error $? "cannot run test program while cross compiling - See \`config.log' for more details" "$LINENO" 5; } --else -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - -@@ -14132,7 +15044,7 @@ else - #include - - int --main () -+main (void) - { - - schedctl_t *scp = schedctl_init(); -@@ -14158,19 +15070,20 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_run "$LINENO"; then : -+if ac_fn_c_try_run "$LINENO" -+then : - - solaris_schedctl_page_exec=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - --else -+else $as_nop - - solaris_schedctl_page_exec=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_SCHEDCTL_PAGE_EXEC 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_SCHEDCTL_PAGE_EXEC 1" >>confdefs.h - - - fi -@@ -14187,21 +15100,22 @@ fi - # C-level symbol: SOLARIS_PT_SUNDWTRACE_THRP - # Automake-level symbol: none - # --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if PT_SUNWDTRACE serves for initial thread pointer (Solaris-specific)" >&5 --$as_echo_n "checking if PT_SUNWDTRACE serves for initial thread pointer (Solaris-specific)... " >&6; } --if test "$cross_compiling" = yes; then : -- { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 --$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if PT_SUNWDTRACE serves for initial thread pointer (Solaris-specific)" >&5 -+printf %s "checking if PT_SUNWDTRACE serves for initial thread pointer (Solaris-specific)... " >&6; } -+if test "$cross_compiling" = yes -+then : -+ { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} - as_fn_error $? "cannot run test program while cross compiling - See \`config.log' for more details" "$LINENO" 5; } --else -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - #include - - int --main () -+main (void) - { - - return !FT_SCRATCHSIZE; -@@ -14210,20 +15124,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_run "$LINENO"; then : -+if ac_fn_c_try_run "$LINENO" -+then : - - solaris_pt_sunwdtrace_thrp=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define SOLARIS_PT_SUNDWTRACE_THRP 1" >>confdefs.h -+printf "%s\n" "#define SOLARIS_PT_SUNDWTRACE_THRP 1" >>confdefs.h - - --else -+else $as_nop - - solaris_pt_sunwdtrace_thrp=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi - rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \ -@@ -14463,39 +15378,101 @@ fi # test "$VGCONF_OS" = "solaris" - # Checks for C header files. - #---------------------------------------------------------------------------- - --for ac_header in \ -- asm/unistd.h \ -- endian.h \ -- mqueue.h \ -- sys/endian.h \ -- sys/epoll.h \ -- sys/eventfd.h \ -- sys/klog.h \ -- sys/poll.h \ -- sys/prctl.h \ -- sys/signal.h \ -- sys/signalfd.h \ -- sys/syscall.h \ -- sys/sysnvl.h \ -- sys/time.h \ -- sys/types.h \ -- --do : -- as_ac_Header=`$as_echo "ac_cv_header_$ac_header" | $as_tr_sh` --ac_fn_c_check_header_mongrel "$LINENO" "$ac_header" "$as_ac_Header" "$ac_includes_default" --if eval test \"x\$"$as_ac_Header"\" = x"yes"; then : -- cat >>confdefs.h <<_ACEOF --#define `$as_echo "HAVE_$ac_header" | $as_tr_cpp` 1 --_ACEOF -+ac_fn_c_check_header_compile "$LINENO" "asm/unistd.h" "ac_cv_header_asm_unistd_h" "$ac_includes_default" -+if test "x$ac_cv_header_asm_unistd_h" = xyes -+then : -+ printf "%s\n" "#define HAVE_ASM_UNISTD_H 1" >>confdefs.h - - fi -+ac_fn_c_check_header_compile "$LINENO" "endian.h" "ac_cv_header_endian_h" "$ac_includes_default" -+if test "x$ac_cv_header_endian_h" = xyes -+then : -+ printf "%s\n" "#define HAVE_ENDIAN_H 1" >>confdefs.h - --done -+fi -+ac_fn_c_check_header_compile "$LINENO" "mqueue.h" "ac_cv_header_mqueue_h" "$ac_includes_default" -+if test "x$ac_cv_header_mqueue_h" = xyes -+then : -+ printf "%s\n" "#define HAVE_MQUEUE_H 1" >>confdefs.h -+ -+fi -+ac_fn_c_check_header_compile "$LINENO" "sys/endian.h" "ac_cv_header_sys_endian_h" "$ac_includes_default" -+if test "x$ac_cv_header_sys_endian_h" = xyes -+then : -+ printf "%s\n" "#define HAVE_SYS_ENDIAN_H 1" >>confdefs.h -+ -+fi -+ac_fn_c_check_header_compile "$LINENO" "sys/epoll.h" "ac_cv_header_sys_epoll_h" "$ac_includes_default" -+if test "x$ac_cv_header_sys_epoll_h" = xyes -+then : -+ printf "%s\n" "#define HAVE_SYS_EPOLL_H 1" >>confdefs.h ++ switch (stmt->tag) { ++ /* --------- STORE --------- */ ++ /* little-endian write to memory */ ++ case Ist_Store: ++ iselStmtStore(env, stmt); ++ break; + -+fi -+ac_fn_c_check_header_compile "$LINENO" "sys/eventfd.h" "ac_cv_header_sys_eventfd_h" "$ac_includes_default" -+if test "x$ac_cv_header_sys_eventfd_h" = xyes -+then : -+ printf "%s\n" "#define HAVE_SYS_EVENTFD_H 1" >>confdefs.h ++ /* --------- PUT --------- */ ++ /* write guest state, fixed offset */ ++ case Ist_Put: ++ iselStmtPut(env, stmt); ++ break; + -+fi -+ac_fn_c_check_header_compile "$LINENO" "sys/klog.h" "ac_cv_header_sys_klog_h" "$ac_includes_default" -+if test "x$ac_cv_header_sys_klog_h" = xyes -+then : -+ printf "%s\n" "#define HAVE_SYS_KLOG_H 1" >>confdefs.h ++ /* --------- TMP --------- */ ++ /* assign value to temporary */ ++ case Ist_WrTmp: ++ iselStmtTmp(env, stmt); ++ break; + -+fi -+ac_fn_c_check_header_compile "$LINENO" "sys/poll.h" "ac_cv_header_sys_poll_h" "$ac_includes_default" -+if test "x$ac_cv_header_sys_poll_h" = xyes -+then : -+ printf "%s\n" "#define HAVE_SYS_POLL_H 1" >>confdefs.h ++ /* --------- Call to DIRTY helper --------- */ ++ /* call complex ("dirty") helper function */ ++ case Ist_Dirty: ++ iselStmtDirty(env, stmt); ++ break; + -+fi -+ac_fn_c_check_header_compile "$LINENO" "sys/prctl.h" "ac_cv_header_sys_prctl_h" "$ac_includes_default" -+if test "x$ac_cv_header_sys_prctl_h" = xyes -+then : -+ printf "%s\n" "#define HAVE_SYS_PRCTL_H 1" >>confdefs.h ++ /* --------- Load Linked and Store Conditional --------- */ ++ case Ist_LLSC: ++ iselStmtLLSC(env, stmt); ++ break; + -+fi -+ac_fn_c_check_header_compile "$LINENO" "sys/signal.h" "ac_cv_header_sys_signal_h" "$ac_includes_default" -+if test "x$ac_cv_header_sys_signal_h" = xyes -+then : -+ printf "%s\n" "#define HAVE_SYS_SIGNAL_H 1" >>confdefs.h ++ /* --------- CAS --------- */ ++ case Ist_CAS: ++ iselStmtCas(env, stmt); ++ break; + -+fi -+ac_fn_c_check_header_compile "$LINENO" "sys/signalfd.h" "ac_cv_header_sys_signalfd_h" "$ac_includes_default" -+if test "x$ac_cv_header_sys_signalfd_h" = xyes -+then : -+ printf "%s\n" "#define HAVE_SYS_SIGNALFD_H 1" >>confdefs.h ++ /* --------- MEM FENCE --------- */ ++ case Ist_MBE: ++ iselStmtMBE(env, stmt); ++ break; + -+fi -+ac_fn_c_check_header_compile "$LINENO" "sys/syscall.h" "ac_cv_header_sys_syscall_h" "$ac_includes_default" -+if test "x$ac_cv_header_sys_syscall_h" = xyes -+then : -+ printf "%s\n" "#define HAVE_SYS_SYSCALL_H 1" >>confdefs.h ++ /* --------- INSTR MARK --------- */ ++ /* Doesn't generate any executable code ... */ ++ case Ist_IMark: ++ break; + -+fi -+ac_fn_c_check_header_compile "$LINENO" "sys/sysnvl.h" "ac_cv_header_sys_sysnvl_h" "$ac_includes_default" -+if test "x$ac_cv_header_sys_sysnvl_h" = xyes -+then : -+ printf "%s\n" "#define HAVE_SYS_SYSNVL_H 1" >>confdefs.h ++ /* --------- ABI HINT --------- */ ++ /* These have no meaning (denotation in the IR) and so we ignore ++ them ... if any actually made it this far. */ ++ case Ist_AbiHint: ++ break; + -+fi -+ac_fn_c_check_header_compile "$LINENO" "sys/time.h" "ac_cv_header_sys_time_h" "$ac_includes_default" -+if test "x$ac_cv_header_sys_time_h" = xyes -+then : -+ printf "%s\n" "#define HAVE_SYS_TIME_H 1" >>confdefs.h ++ /* --------- NO-OP --------- */ ++ case Ist_NoOp: ++ break; + -+fi -+ac_fn_c_check_header_compile "$LINENO" "sys/types.h" "ac_cv_header_sys_types_h" "$ac_includes_default" -+if test "x$ac_cv_header_sys_types_h" = xyes -+then : -+ printf "%s\n" "#define HAVE_SYS_TYPES_H 1" >>confdefs.h ++ /* --------- EXIT --------- */ ++ case Ist_Exit: ++ iselStmtExit(env, stmt); ++ break; + -+fi - - - # Verify whether the header is usable. --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if is usable" >&5 --$as_echo_n "checking if is usable... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if is usable" >&5 -+printf %s "checking if is usable... " >&6; } - - save_CFLAGS="$CFLAGS" - CFLAGS="$CFLAGS -D__user=" -@@ -14505,7 +15482,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - return FUTEX_WAIT; -@@ -14514,134 +15491,112 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -+if ac_fn_c_try_compile "$LINENO" -+then : - - ac_have_usable_linux_futex_h=yes - --$as_echo "#define HAVE_USABLE_LINUX_FUTEX_H 1" >>confdefs.h -+printf "%s\n" "#define HAVE_USABLE_LINUX_FUTEX_H 1" >>confdefs.h - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_usable_linux_futex_h=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -+rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CFLAGS="$save_CFLAGS" - - - #---------------------------------------------------------------------------- - # Checks for typedefs, structures, and compiler characteristics. - #---------------------------------------------------------------------------- --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for uid_t in sys/types.h" >&5 --$as_echo_n "checking for uid_t in sys/types.h... " >&6; } --if ${ac_cv_type_uid_t+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for uid_t in sys/types.h" >&5 -+printf %s "checking for uid_t in sys/types.h... " >&6; } -+if test ${ac_cv_type_uid_t+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - #include - - _ACEOF - if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | -- $EGREP "uid_t" >/dev/null 2>&1; then : -+ $EGREP "uid_t" >/dev/null 2>&1 -+then : - ac_cv_type_uid_t=yes --else -+else $as_nop - ac_cv_type_uid_t=no - fi --rm -f conftest* -+rm -rf conftest* - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_type_uid_t" >&5 --$as_echo "$ac_cv_type_uid_t" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_type_uid_t" >&5 -+printf "%s\n" "$ac_cv_type_uid_t" >&6; } - if test $ac_cv_type_uid_t = no; then ++ default: ++ ppIRStmt(stmt); ++ vpanic("iselStmt(loongarch64)"); ++ break; ++ } ++} ++ ++ ++/*---------------------------------------------------------*/ ++/*--- ISEL: Basic block terminators (Nexts) ---*/ ++/*---------------------------------------------------------*/ ++ ++static void iselNext ( ISelEnv* env, IRExpr* next, IRJumpKind jk, Int offsIP ) ++{ ++ if (vex_traceflags & VEX_TRACE_VCODE) { ++ vex_printf("\n-- PUT(%d) = ", offsIP); ++ ppIRExpr(next); ++ vex_printf("; exit-"); ++ ppIRJumpKind(jk); ++ vex_printf("\n"); ++ } ++ ++ /* Case: boring transfer to known address */ ++ if (next->tag == Iex_Const) { ++ IRConst* cdst = next->Iex.Const.con; ++ vassert(cdst->tag == Ico_U64); ++ if (jk == Ijk_Boring || jk == Ijk_Call) { ++ /* Boring transfer to known address */ ++ LOONGARCH64AMode* am = mkLOONGARCH64AMode_RI(hregGSP(), offsIP); ++ if (env->chainingAllowed) { ++ /* .. almost always true .. */ ++ /* Skip the event check at the dst if this is a forwards edge. */ ++ Bool toFastEP = ((Addr64)cdst->Ico.U64) > env->max_ga; ++ addInstr(env, LOONGARCH64Instr_XDirect(cdst->Ico.U64, am, ++ INVALID_HREG, toFastEP)); ++ } else { ++ /* .. very occasionally .. */ ++ /* We can't use chaining, so ask for an assisted transfer, ++ as that's the only alternative that is allowable. */ ++ HReg dst = iselIntExpr_R(env, next); ++ addInstr(env, LOONGARCH64Instr_XAssisted(dst, am, INVALID_HREG, Ijk_Boring)); ++ } ++ return; ++ } ++ } ++ ++ /* Case: call/return (==boring) transfer to any address */ ++ switch (jk) { ++ case Ijk_Boring: ++ case Ijk_Ret: ++ case Ijk_Call: { ++ HReg dst = iselIntExpr_R(env, next); ++ LOONGARCH64AMode* am = mkLOONGARCH64AMode_RI(hregGSP(), offsIP); ++ if (env->chainingAllowed) { ++ addInstr(env, LOONGARCH64Instr_XIndir(dst, am, INVALID_HREG)); ++ } else { ++ addInstr(env, LOONGARCH64Instr_XAssisted(dst, am, ++ INVALID_HREG, Ijk_Boring)); ++ } ++ return; ++ } ++ default: ++ break; ++ } ++ ++ /* Case: assisted transfer to arbitrary address */ ++ switch (jk) { ++ /* Keep this list in sync with that for Ist_Exit above */ ++ case Ijk_ClientReq: ++ case Ijk_Yield: ++ case Ijk_NoDecode: ++ case Ijk_InvalICache: ++ case Ijk_NoRedir: ++ case Ijk_SigILL: ++ case Ijk_SigTRAP: ++ case Ijk_SigSEGV: ++ case Ijk_SigBUS: ++ case Ijk_SigFPE_IntDiv: ++ case Ijk_SigFPE_IntOvf: ++ case Ijk_SigSYS: ++ case Ijk_Sys_syscall: { ++ HReg dst = iselIntExpr_R(env, next); ++ LOONGARCH64AMode* am = mkLOONGARCH64AMode_RI(hregGSP(), offsIP); ++ addInstr(env, LOONGARCH64Instr_XAssisted(dst, am, INVALID_HREG, jk)); ++ return; ++ } ++ default: ++ break; ++ } ++ ++ vex_printf("\n-- PUT(%d) = ", offsIP); ++ ppIRExpr(next); ++ vex_printf("; exit-"); ++ ppIRJumpKind(jk); ++ vex_printf("\n"); ++ vassert(0); // are we expecting any other kind? ++} ++ ++ ++/*---------------------------------------------------------*/ ++/*--- Insn selector top-level ---*/ ++/*---------------------------------------------------------*/ ++ ++/* Translate an entire BB to LOONGARCH64 code. */ ++HInstrArray* iselSB_LOONGARCH64 ( const IRSB* bb, ++ VexArch arch_host, ++ const VexArchInfo* archinfo_host, ++ const VexAbiInfo* vbi, ++ Int offs_Host_EvC_Counter, ++ Int offs_Host_EvC_FailAddr, ++ Bool chainingAllowed, ++ Bool addProfInc, ++ Addr max_ga ) ++{ ++ Int i, j; ++ HReg hreg, hregHI; ++ ISelEnv* env; ++ UInt hwcaps_host = archinfo_host->hwcaps; ++ LOONGARCH64AMode *amCounter, *amFailAddr; ++ ++ /* sanity ... */ ++ vassert(arch_host == VexArchLOONGARCH64); ++ vassert((hwcaps_host & ~(VEX_HWCAPS_LOONGARCH_CPUCFG ++ | VEX_HWCAPS_LOONGARCH_LAM ++ | VEX_HWCAPS_LOONGARCH_UAL ++ | VEX_HWCAPS_LOONGARCH_FP ++ | VEX_HWCAPS_LOONGARCH_LSX ++ | VEX_HWCAPS_LOONGARCH_LASX ++ | VEX_HWCAPS_LOONGARCH_COMPLEX ++ | VEX_HWCAPS_LOONGARCH_CRYPTO ++ | VEX_HWCAPS_LOONGARCH_LVZP ++ | VEX_HWCAPS_LOONGARCH_X86BT ++ | VEX_HWCAPS_LOONGARCH_ARMBT ++ | VEX_HWCAPS_LOONGARCH_MIPSBT ++ | VEX_HWCAPS_LOONGARCH_ISA_32BIT ++ | VEX_HWCAPS_LOONGARCH_ISA_64BIT)) == 0); ++ ++ /* Check that the host's endianness is as expected. */ ++ vassert(archinfo_host->endness == VexEndnessLE); ++ ++ /* Make up an initial environment to use. */ ++ env = LibVEX_Alloc_inline(sizeof(ISelEnv)); ++ env->vreg_ctr = 0; ++ ++ /* Set up output code array. */ ++ env->code = newHInstrArray(); ++ ++ /* Copy BB's type env. */ ++ env->type_env = bb->tyenv; ++ ++ /* Make up an IRTemp -> virtual HReg mapping. This doesn't ++ change as we go along. */ ++ env->n_vregmap = bb->tyenv->types_used; ++ env->vregmap = LibVEX_Alloc_inline(env->n_vregmap * sizeof(HReg)); ++ env->vregmapHI = LibVEX_Alloc_inline(env->n_vregmap * sizeof(HReg)); ++ ++ /* and finally ... */ ++ env->chainingAllowed = chainingAllowed; ++ env->hwcaps = hwcaps_host; ++ env->max_ga = max_ga; ++ ++ /* For each IR temporary, allocate a suitably-kinded virtual register. */ ++ j = 0; ++ for (i = 0; i < env->n_vregmap; i++) { ++ hregHI = hreg = INVALID_HREG; ++ switch (bb->tyenv->types[i]) { ++ case Ity_I1: ++ case Ity_I8: ++ case Ity_I16: ++ case Ity_I32: ++ case Ity_I64: ++ hreg = mkHReg(True, HRcInt64, 0, j++); ++ break; ++ case Ity_I128: ++ hreg = mkHReg(True, HRcInt64, 0, j++); ++ hregHI = mkHReg(True, HRcInt64, 0, j++); ++ break; ++ case Ity_F16: // we'll use HRcFlt64 regs for F16 too ++ case Ity_F32: // we'll use HRcFlt64 regs for F32 too ++ case Ity_F64: ++ hreg = mkHReg(True, HRcFlt64, 0, j++); ++ break; ++ case Ity_V128: ++ hreg = mkHReg(True, HRcVec128, 0, j++); ++ break; ++ case Ity_V256: ++ hreg = mkHReg(True, HRcVec128, 0, j++); ++ hregHI = mkHReg(True, HRcVec128, 0, j++); ++ break; ++ default: ++ ppIRType(bb->tyenv->types[i]); ++ vpanic("iselBB(loongarch64): IRTemp type"); ++ break; ++ } ++ env->vregmap[i] = hreg; ++ env->vregmapHI[i] = hregHI; ++ } ++ env->vreg_ctr = j; ++ ++ /* The very first instruction must be an event check. */ ++ amCounter = mkLOONGARCH64AMode_RI(hregGSP(), offs_Host_EvC_Counter); ++ amFailAddr = mkLOONGARCH64AMode_RI(hregGSP(), offs_Host_EvC_FailAddr); ++ addInstr(env, LOONGARCH64Instr_EvCheck(amCounter, amFailAddr)); ++ ++ /* Possibly a block counter increment (for profiling). At this ++ point we don't know the address of the counter, so just pretend ++ it is zero. It will have to be patched later, but before this ++ translation is used, by a call to LibVEX_patchProfCtr. */ ++ if (addProfInc) { ++ addInstr(env, LOONGARCH64Instr_ProfInc()); ++ } ++ ++ /* Ok, finally we can iterate over the statements. */ ++ for (i = 0; i < bb->stmts_used; i++) ++ iselStmt(env, bb->stmts[i]); ++ ++ iselNext(env, bb->next, bb->jumpkind, bb->offsIP); ++ ++ /* record the number of vregs we used. */ ++ env->code->n_vregs = env->vreg_ctr; ++ return env->code; ++} ++ ++ ++/*---------------------------------------------------------------*/ ++/*--- end host_loongarch64_isel.c ---*/ ++/*---------------------------------------------------------------*/ +diff --git a/VEX/priv/ir_defs.c b/VEX/priv/ir_defs.c +index 31710eb..d6b245f 100644 +--- a/VEX/priv/ir_defs.c ++++ b/VEX/priv/ir_defs.c +@@ -280,6 +280,8 @@ void ppIROp ( IROp op ) + case Iop_SubF64: vex_printf("SubF64"); return; + case Iop_MulF64: vex_printf("MulF64"); return; + case Iop_DivF64: vex_printf("DivF64"); return; ++ case Iop_ScaleBF64: vex_printf("ScaleBF64"); return; ++ case Iop_ScaleBF32: vex_printf("ScaleBF32"); return; + case Iop_AddF64r32: vex_printf("AddF64r32"); return; + case Iop_SubF64r32: vex_printf("SubF64r32"); return; + case Iop_MulF64r32: vex_printf("MulF64r32"); return; +@@ -356,6 +358,10 @@ void ppIROp ( IROp op ) + case Iop_SqrtF64: vex_printf("SqrtF64"); return; + case Iop_SqrtF32: vex_printf("SqrtF32"); return; + case Iop_SqrtF16: vex_printf("SqrtF16"); return; ++ case Iop_RSqrtF32: vex_printf("RSqrtF32"); return; ++ case Iop_RSqrtF64: vex_printf("RSqrtF64"); return; ++ case Iop_LogBF32: vex_printf("LogBF32"); return; ++ case Iop_LogBF64: vex_printf("LogBF64"); return; + case Iop_SinF64: vex_printf("SinF64"); return; + case Iop_CosF64: vex_printf("CosF64"); return; + case Iop_TanF64: vex_printf("TanF64"); return; +@@ -379,8 +385,12 @@ void ppIROp ( IROp op ) --$as_echo "#define uid_t int" >>confdefs.h -+printf "%s\n" "#define uid_t int" >>confdefs.h + case Iop_MaxNumF64: vex_printf("MaxNumF64"); return; + case Iop_MinNumF64: vex_printf("MinNumF64"); return; ++ case Iop_MaxNumAbsF64: vex_printf("MaxNumAbsF64"); return; ++ case Iop_MinNumAbsF64: vex_printf("MinNumAbsF64"); return; + case Iop_MaxNumF32: vex_printf("MaxNumF32"); return; + case Iop_MinNumF32: vex_printf("MinNumF32"); return; ++ case Iop_MaxNumAbsF32: vex_printf("MaxNumAbsF32"); return; ++ case Iop_MinNumAbsF32: vex_printf("MinNumAbsF32"); return; + case Iop_F16toF64: vex_printf("F16toF64"); return; + case Iop_F64toF16: vex_printf("F64toF16"); return; +@@ -1307,16 +1317,20 @@ void ppIROp ( IROp op ) + case Iop_Max8Sx32: vex_printf("Max8Sx32"); return; + case Iop_Max16Sx16: vex_printf("Max16Sx16"); return; + case Iop_Max32Sx8: vex_printf("Max32Sx8"); return; ++ case Iop_Max64Sx4: vex_printf("Max64Sx4"); return; + case Iop_Max8Ux32: vex_printf("Max8Ux32"); return; + case Iop_Max16Ux16: vex_printf("Max16Ux16"); return; + case Iop_Max32Ux8: vex_printf("Max32Ux8"); return; ++ case Iop_Max64Ux4: vex_printf("Max64Ux4"); return; + + case Iop_Min8Sx32: vex_printf("Min8Sx32"); return; + case Iop_Min16Sx16: vex_printf("Min16Sx16"); return; + case Iop_Min32Sx8: vex_printf("Min32Sx8"); return; ++ case Iop_Min64Sx4: vex_printf("Min64Sx4"); return; + case Iop_Min8Ux32: vex_printf("Min8Ux32"); return; + case Iop_Min16Ux16: vex_printf("Min16Ux16"); return; + case Iop_Min32Ux8: vex_printf("Min32Ux8"); return; ++ case Iop_Min64Ux4: vex_printf("Min64Ux4"); return; + + case Iop_CmpEQ8x32: vex_printf("CmpEQ8x32"); return; + case Iop_CmpEQ16x16: vex_printf("CmpEQ16x16"); return; +@@ -1434,10 +1448,13 @@ Bool primopMightTrap ( IROp op ) + case Iop_1Uto8: case Iop_1Uto32: case Iop_1Uto64: case Iop_1Sto8: + case Iop_1Sto16: case Iop_1Sto32: case Iop_1Sto64: + case Iop_AddF64: case Iop_SubF64: case Iop_MulF64: case Iop_DivF64: ++ case Iop_ScaleBF64: case Iop_ScaleBF32: + case Iop_AddF32: case Iop_SubF32: case Iop_MulF32: case Iop_DivF32: + case Iop_AddF64r32: case Iop_SubF64r32: case Iop_MulF64r32: + case Iop_DivF64r32: case Iop_NegF64: case Iop_AbsF64: + case Iop_NegF32: case Iop_AbsF32: case Iop_SqrtF64: case Iop_SqrtF32: ++ case Iop_RSqrtF64: case Iop_RSqrtF32: ++ case Iop_LogBF64: case Iop_LogBF32: + case Iop_NegF16: case Iop_AbsF16: case Iop_SqrtF16: case Iop_SubF16: + case Iop_AddF16: + case Iop_CmpF64: case Iop_CmpF32: case Iop_CmpF16: case Iop_CmpF128: +@@ -1477,8 +1494,11 @@ Bool primopMightTrap ( IROp op ) + case Iop_RSqrtEst5GoodF64: case Iop_RoundF64toF64_NEAREST: + case Iop_RoundF64toF64_NegINF: case Iop_RoundF64toF64_PosINF: + case Iop_RoundF64toF64_ZERO: case Iop_TruncF64asF32: case Iop_RoundF64toF32: +- case Iop_RecpExpF64: case Iop_RecpExpF32: case Iop_MaxNumF64: +- case Iop_MinNumF64: case Iop_MaxNumF32: case Iop_MinNumF32: ++ case Iop_RecpExpF64: case Iop_RecpExpF32: ++ case Iop_MaxNumF64: case Iop_MinNumF64: ++ case Iop_MaxNumAbsF64: case Iop_MinNumAbsF64: ++ case Iop_MaxNumF32: case Iop_MinNumF32: ++ case Iop_MaxNumAbsF32: case Iop_MinNumAbsF32: + case Iop_F16toF64: case Iop_F64toF16: case Iop_F16toF32: + case Iop_F32toF16: case Iop_QAdd32S: case Iop_QSub32S: + case Iop_Add16x2: case Iop_Sub16x2: +@@ -1786,10 +1806,10 @@ Bool primopMightTrap ( IROp op ) + case Iop_ShlN16x16: case Iop_ShlN32x8: case Iop_ShlN64x4: + case Iop_ShrN16x16: case Iop_ShrN32x8: case Iop_ShrN64x4: + case Iop_SarN16x16: case Iop_SarN32x8: +- case Iop_Max8Sx32: case Iop_Max16Sx16: case Iop_Max32Sx8: +- case Iop_Max8Ux32: case Iop_Max16Ux16: case Iop_Max32Ux8: +- case Iop_Min8Sx32: case Iop_Min16Sx16: case Iop_Min32Sx8: +- case Iop_Min8Ux32: case Iop_Min16Ux16: case Iop_Min32Ux8: ++ case Iop_Max8Sx32: case Iop_Max16Sx16: case Iop_Max32Sx8: case Iop_Max64Sx4: ++ case Iop_Max8Ux32: case Iop_Max16Ux16: case Iop_Max32Ux8: case Iop_Max64Ux4: ++ case Iop_Min8Sx32: case Iop_Min16Sx16: case Iop_Min32Sx8: case Iop_Min64Sx4: ++ case Iop_Min8Ux32: case Iop_Min16Ux16: case Iop_Min32Ux8: case Iop_Min64Ux4: + case Iop_Mul16x16: case Iop_Mul32x8: + case Iop_MulHi16Ux16: case Iop_MulHi16Sx16: + case Iop_QAdd8Ux32: case Iop_QAdd16Ux16: +@@ -2075,6 +2095,7 @@ void ppIRJumpKind ( IRJumpKind kind ) + case Ijk_SigFPE: vex_printf("SigFPE"); break; + case Ijk_SigFPE_IntDiv: vex_printf("SigFPE_IntDiv"); break; + case Ijk_SigFPE_IntOvf: vex_printf("SigFPE_IntOvf"); break; ++ case Ijk_SigSYS: vex_printf("SigSYS"); break; + case Ijk_Sys_syscall: vex_printf("Sys_syscall"); break; + case Ijk_Sys_int32: vex_printf("Sys_int32"); break; + case Ijk_Sys_int128: vex_printf("Sys_int128"); break; +@@ -2094,6 +2115,8 @@ void ppIRMBusEvent ( IRMBusEvent event ) + vex_printf("Fence"); break; + case Imbe_CancelReservation: + vex_printf("CancelReservation"); break; ++ case Imbe_InsnFence: ++ vex_printf("InsnFence"); break; + default: + vpanic("ppIRMBusEvent"); + } +@@ -3372,12 +3395,14 @@ void typeOfPrimop ( IROp op, --$as_echo "#define gid_t int" >>confdefs.h -+printf "%s\n" "#define gid_t int" >>confdefs.h + case Iop_AddF64: case Iop_SubF64: + case Iop_MulF64: case Iop_DivF64: ++ case Iop_ScaleBF64: + case Iop_AddF64r32: case Iop_SubF64r32: + case Iop_MulF64r32: case Iop_DivF64r32: + TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64); - fi + case Iop_AddF32: case Iop_SubF32: + case Iop_MulF32: case Iop_DivF32: ++ case Iop_ScaleBF32: + TERNARY(ity_RMode,Ity_F32,Ity_F32, Ity_F32); - ac_fn_c_check_type "$LINENO" "off_t" "ac_cv_type_off_t" "$ac_includes_default" --if test "x$ac_cv_type_off_t" = xyes; then : -+if test "x$ac_cv_type_off_t" = xyes -+then : + case Iop_AddF16: +@@ -3394,10 +3419,14 @@ void typeOfPrimop ( IROp op, + UNARY(Ity_F16, Ity_F16); --else -+else $as_nop + case Iop_SqrtF64: ++ case Iop_RSqrtF64: ++ case Iop_LogBF64: + case Iop_RecpExpF64: + BINARY(ity_RMode,Ity_F64, Ity_F64); --cat >>confdefs.h <<_ACEOF --#define off_t long int --_ACEOF -+printf "%s\n" "#define off_t long int" >>confdefs.h + case Iop_SqrtF32: ++ case Iop_RSqrtF32: ++ case Iop_LogBF32: + case Iop_RoundF32toInt: + case Iop_RecpExpF32: + BINARY(ity_RMode,Ity_F32, Ity_F32); +@@ -3406,9 +3435,11 @@ void typeOfPrimop ( IROp op, + BINARY(ity_RMode, Ity_F16, Ity_F16); - fi + case Iop_MaxNumF64: case Iop_MinNumF64: ++ case Iop_MaxNumAbsF64: case Iop_MinNumAbsF64: + BINARY(Ity_F64,Ity_F64, Ity_F64); - ac_fn_c_check_type "$LINENO" "size_t" "ac_cv_type_size_t" "$ac_includes_default" --if test "x$ac_cv_type_size_t" = xyes; then : -+if test "x$ac_cv_type_size_t" = xyes -+then : + case Iop_MaxNumF32: case Iop_MinNumF32: ++ case Iop_MaxNumAbsF32: case Iop_MinNumAbsF32: + BINARY(Ity_F32,Ity_F32, Ity_F32); --else -+else $as_nop + case Iop_CmpF16: +@@ -4098,10 +4129,10 @@ void typeOfPrimop ( IROp op, + case Iop_Mul16x16: case Iop_Mul32x8: + case Iop_MulHi16Ux16: case Iop_MulHi16Sx16: + case Iop_Avg8Ux32: case Iop_Avg16Ux16: +- case Iop_Max8Sx32: case Iop_Max16Sx16: case Iop_Max32Sx8: +- case Iop_Max8Ux32: case Iop_Max16Ux16: case Iop_Max32Ux8: +- case Iop_Min8Sx32: case Iop_Min16Sx16: case Iop_Min32Sx8: +- case Iop_Min8Ux32: case Iop_Min16Ux16: case Iop_Min32Ux8: ++ case Iop_Max8Sx32: case Iop_Max16Sx16: case Iop_Max32Sx8: case Iop_Max64Sx4: ++ case Iop_Max8Ux32: case Iop_Max16Ux16: case Iop_Max32Ux8: case Iop_Max64Ux4: ++ case Iop_Min8Sx32: case Iop_Min16Sx16: case Iop_Min32Sx8: case Iop_Min64Sx4: ++ case Iop_Min8Ux32: case Iop_Min16Ux16: case Iop_Min32Ux8: case Iop_Min64Ux4: + case Iop_CmpEQ8x32: case Iop_CmpEQ16x16: + case Iop_CmpEQ32x8: case Iop_CmpEQ64x4: + case Iop_CmpGT8Sx32: case Iop_CmpGT16Sx16: +@@ -5245,7 +5276,9 @@ void tcStmt ( const IRSB* bb, const IRStmt* stmt, IRType gWordTy ) + break; + case Ist_MBE: + switch (stmt->Ist.MBE.event) { +- case Imbe_Fence: case Imbe_CancelReservation: ++ case Imbe_Fence: ++ case Imbe_CancelReservation: ++ case Imbe_InsnFence: + break; + default: sanityCheckFail(bb,stmt,"IRStmt.MBE.event: unknown"); + break; +diff --git a/VEX/priv/main_main.c b/VEX/priv/main_main.c +index 482047c..98d4a81 100644 +--- a/VEX/priv/main_main.c ++++ b/VEX/priv/main_main.c +@@ -43,6 +43,7 @@ + #include "libvex_guest_s390x.h" + #include "libvex_guest_mips32.h" + #include "libvex_guest_mips64.h" ++#include "libvex_guest_loongarch64.h" --cat >>confdefs.h <<_ACEOF --#define size_t unsigned int --_ACEOF -+printf "%s\n" "#define size_t unsigned int" >>confdefs.h + #include "main_globals.h" + #include "main_util.h" +@@ -57,6 +58,7 @@ + #include "host_s390_defs.h" + #include "host_mips_defs.h" + #include "host_nanomips_defs.h" ++#include "host_loongarch64_defs.h" - fi + #include "guest_generic_bb_to_IR.h" + #include "guest_x86_defs.h" +@@ -67,6 +69,7 @@ + #include "guest_s390_defs.h" + #include "guest_mips_defs.h" + #include "guest_nanomips_defs.h" ++#include "guest_loongarch64_defs.h" --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether time.h and sys/time.h may both be included" >&5 --$as_echo_n "checking whether time.h and sys/time.h may both be included... " >&6; } --if ${ac_cv_header_time+:} false; then : -- $as_echo_n "(cached) " >&6 --else -- cat confdefs.h - <<_ACEOF >conftest.$ac_ext --/* end confdefs.h. */ --#include --#include --#include + #include "host_generic_simd128.h" --int --main () --{ --if ((struct tm *) 0) --return 0; -- ; -- return 0; --} --_ACEOF --if ac_fn_c_try_compile "$LINENO"; then : -- ac_cv_header_time=yes --else -- ac_cv_header_time=no --fi --rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext --fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_header_time" >&5 --$as_echo "$ac_cv_header_time" >&6; } --if test $ac_cv_header_time = yes; then +@@ -163,6 +166,14 @@ + #define NANOMIPSST(f) vassert(0) + #endif --$as_echo "#define TIME_WITH_SYS_TIME 1" >>confdefs.h -+# Obsolete code to be removed. -+if test $ac_cv_header_sys_time_h = yes; then ++#if defined(VGA_loongarch64) || defined(VEXMULTIARCH) ++#define LOONGARCH64FN(f) f ++#define LOONGARCH64ST(f) f ++#else ++#define LOONGARCH64FN(f) NULL ++#define LOONGARCH64ST(f) vassert(0) ++#endif + -+printf "%s\n" "#define TIME_WITH_SYS_TIME 1" >>confdefs.h - - fi -+# End of obsolete code. - - - - #---------------------------------------------------------------------------- - # Checks for library functions. - #---------------------------------------------------------------------------- --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for working memcmp" >&5 --$as_echo_n "checking for working memcmp... " >&6; } --if ${ac_cv_func_memcmp_working+:} false; then : -- $as_echo_n "(cached) " >&6 --else -- if test "$cross_compiling" = yes; then : -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for working memcmp" >&5 -+printf %s "checking for working memcmp... " >&6; } -+if test ${ac_cv_func_memcmp_working+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop -+ if test "$cross_compiling" = yes -+then : - ac_cv_func_memcmp_working=no --else -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - $ac_includes_default - int --main () -+main (void) - { - - /* Some versions of memcmp are not 8-bit clean. */ -@@ -14672,9 +15627,10 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_run "$LINENO"; then : -+if ac_fn_c_try_run "$LINENO" -+then : - ac_cv_func_memcmp_working=yes --else -+else $as_nop - ac_cv_func_memcmp_working=no - fi - rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \ -@@ -14682,8 +15638,8 @@ rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \ - fi - - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_func_memcmp_working" >&5 --$as_echo "$ac_cv_func_memcmp_working" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_func_memcmp_working" >&5 -+printf "%s\n" "$ac_cv_func_memcmp_working" >&6; } - test $ac_cv_func_memcmp_working = no && case " $LIBOBJS " in - *" memcmp.$ac_objext "* ) ;; - *) LIBOBJS="$LIBOBJS memcmp.$ac_objext" -@@ -14692,48 +15648,36 @@ esac - - - -- -- -- for ac_header in $ac_header_list --do : -- as_ac_Header=`$as_echo "ac_cv_header_$ac_header" | $as_tr_sh` --ac_fn_c_check_header_compile "$LINENO" "$ac_header" "$as_ac_Header" "$ac_includes_default --" --if eval test \"x\$"$as_ac_Header"\" = x"yes"; then : -- cat >>confdefs.h <<_ACEOF --#define `$as_echo "HAVE_$ac_header" | $as_tr_cpp` 1 --_ACEOF -- --fi -- -+ac_func= -+for ac_item in $ac_func_c_list -+do -+ if test $ac_func; then -+ ac_fn_c_check_func "$LINENO" $ac_func ac_cv_func_$ac_func -+ if eval test \"x\$ac_cv_func_$ac_func\" = xyes; then -+ echo "#define $ac_item 1" >> confdefs.h -+ fi -+ ac_func= -+ else -+ ac_func=$ac_item -+ fi - done - - -- -- -- -- -- -- --for ac_func in getpagesize --do : -- ac_fn_c_check_func "$LINENO" "getpagesize" "ac_cv_func_getpagesize" --if test "x$ac_cv_func_getpagesize" = xyes; then : -- cat >>confdefs.h <<_ACEOF --#define HAVE_GETPAGESIZE 1 --_ACEOF -- --fi --done -- --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for working mmap" >&5 --$as_echo_n "checking for working mmap... " >&6; } --if ${ac_cv_func_mmap_fixed_mapped+:} false; then : -- $as_echo_n "(cached) " >&6 --else -- if test "$cross_compiling" = yes; then : -- ac_cv_func_mmap_fixed_mapped=no --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for working mmap" >&5 -+printf %s "checking for working mmap... " >&6; } -+if test ${ac_cv_func_mmap_fixed_mapped+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop -+ if test "$cross_compiling" = yes -+then : -+ case "$host_os" in # (( -+ # Guess yes on platforms where we know the result. -+ linux*) ac_cv_func_mmap_fixed_mapped=yes ;; -+ # If we don't know, assume the worst. -+ *) ac_cv_func_mmap_fixed_mapped=no ;; -+ esac -+else $as_nop - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - $ac_includes_default -@@ -14765,10 +15709,6 @@ $ac_includes_default - #include - #include + /* This file contains the top level interface to the library. */ --#if !defined STDC_HEADERS && !defined HAVE_STDLIB_H --char *malloc (); --#endif -- - /* This mess was copied from the GNU getpagesize.h. */ - #ifndef HAVE_GETPAGESIZE - # ifdef _SC_PAGESIZE -@@ -14802,7 +15742,7 @@ char *malloc (); - #endif /* no HAVE_GETPAGESIZE */ + /* --------- fwds ... --------- */ +@@ -541,6 +552,23 @@ IRSB* LibVEX_FrontEnd ( /*MOD*/ VexTranslateArgs* vta, + vassert(sizeof( ((VexGuestMIPS32State*)0)->guest_NRADDR ) == 4); + break; - int --main () -+main (void) - { - char *data, *data2, *data3; - const char *cdata2; -@@ -14870,12 +15810,15 @@ main () - if (*(data + i) != *(data3 + i)) - return 14; - close (fd); -+ free (data); -+ free (data3); - return 0; - } - _ACEOF --if ac_fn_c_try_run "$LINENO"; then : -+if ac_fn_c_try_run "$LINENO" -+then : - ac_cv_func_mmap_fixed_mapped=yes --else -+else $as_nop - ac_cv_func_mmap_fixed_mapped=no - fi - rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \ -@@ -14883,21 +15826,22 @@ rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \ - fi ++ case VexArchLOONGARCH64: ++ preciseMemExnsFn ++ = LOONGARCH64FN(guest_loongarch64_state_requires_precise_mem_exns); ++ disInstrFn = LOONGARCH64FN(disInstr_LOONGARCH64); ++ specHelper = LOONGARCH64FN(guest_loongarch64_spechelper); ++ guest_layout = LOONGARCH64FN(&loongarch64Guest_layout); ++ offB_CMSTART = offsetof(VexGuestLOONGARCH64State, guest_CMSTART); ++ offB_CMLEN = offsetof(VexGuestLOONGARCH64State, guest_CMLEN); ++ offB_GUEST_IP = offsetof(VexGuestLOONGARCH64State, guest_PC); ++ szB_GUEST_IP = sizeof( ((VexGuestLOONGARCH64State*)0)->guest_PC ); ++ vassert(vta->archinfo_guest.endness == VexEndnessLE); ++ vassert(sizeof(VexGuestLOONGARCH64State) % LibVEX_GUEST_STATE_ALIGN == 0); ++ vassert(sizeof( ((VexGuestLOONGARCH64State*)0)->guest_CMSTART) == 8); ++ vassert(sizeof( ((VexGuestLOONGARCH64State*)0)->guest_CMLEN ) == 8); ++ vassert(sizeof( ((VexGuestLOONGARCH64State*)0)->guest_NRADDR ) == 8); ++ break; ++ + default: + vpanic("LibVEX_Translate: unsupported guest insn set"); + } +@@ -878,6 +906,14 @@ static void libvex_BackEnd ( const VexTranslateArgs *vta, + offB_HOST_EvC_FAILADDR = offsetof(VexGuestMIPS32State,host_EvC_FAILADDR); + break; - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_func_mmap_fixed_mapped" >&5 --$as_echo "$ac_cv_func_mmap_fixed_mapped" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_func_mmap_fixed_mapped" >&5 -+printf "%s\n" "$ac_cv_func_mmap_fixed_mapped" >&6; } - if test $ac_cv_func_mmap_fixed_mapped = yes; then ++ case VexArchLOONGARCH64: ++ preciseMemExnsFn ++ = LOONGARCH64FN(guest_loongarch64_state_requires_precise_mem_exns); ++ guest_sizeB = sizeof(VexGuestLOONGARCH64State); ++ offB_HOST_EvC_COUNTER = offsetof(VexGuestLOONGARCH64State, host_EvC_COUNTER); ++ offB_HOST_EvC_FAILADDR = offsetof(VexGuestLOONGARCH64State, host_EvC_FAILADDR); ++ break; ++ + default: + vpanic("LibVEX_Codegen: unsupported guest insn set"); + } +@@ -1052,6 +1088,23 @@ static void libvex_BackEnd ( const VexTranslateArgs *vta, + || vta->archinfo_host.endness == VexEndnessBE); + break; --$as_echo "#define HAVE_MMAP 1" >>confdefs.h -+printf "%s\n" "#define HAVE_MMAP 1" >>confdefs.h ++ case VexArchLOONGARCH64: ++ mode64 = True; ++ rRegUniv = LOONGARCH64FN(getRRegUniverse_LOONGARCH64()); ++ getRegUsage ++ = CAST_TO_TYPEOF(getRegUsage) LOONGARCH64FN(getRegUsage_LOONGARCH64Instr); ++ mapRegs = CAST_TO_TYPEOF(mapRegs) LOONGARCH64FN(mapRegs_LOONGARCH64Instr); ++ genSpill = CAST_TO_TYPEOF(genSpill) LOONGARCH64FN(genSpill_LOONGARCH64); ++ genReload = CAST_TO_TYPEOF(genReload) LOONGARCH64FN(genReload_LOONGARCH64); ++ genMove = CAST_TO_TYPEOF(genMove) LOONGARCH64FN(genMove_LOONGARCH64); ++ ppInstr = CAST_TO_TYPEOF(ppInstr) LOONGARCH64FN(ppLOONGARCH64Instr); ++ ppReg = CAST_TO_TYPEOF(ppReg) LOONGARCH64FN(ppHRegLOONGARCH64); ++ iselSB = LOONGARCH64FN(iselSB_LOONGARCH64); ++ emit = CAST_TO_TYPEOF(emit) LOONGARCH64FN(emit_LOONGARCH64Instr); ++ vassert(vta->archinfo_host.endness == VexEndnessLE ++ || vta->archinfo_host.endness == VexEndnessBE); ++ break; ++ + default: + vpanic("LibVEX_Translate: unsupported host insn set"); + } +@@ -1297,6 +1350,11 @@ VexInvalRange LibVEX_Chain ( VexArch arch_host, + place_to_chain, + disp_cp_chain_me_EXPECTED, + place_to_jump_to)); ++ case VexArchLOONGARCH64: ++ LOONGARCH64ST(return chainXDirect_LOONGARCH64(endness_host, ++ place_to_chain, ++ disp_cp_chain_me_EXPECTED, ++ place_to_jump_to)); + default: + vassert(0); + } +@@ -1359,6 +1417,11 @@ VexInvalRange LibVEX_UnChain ( VexArch arch_host, + place_to_unchain, + place_to_jump_to_EXPECTED, + disp_cp_chain_me)); ++ case VexArchLOONGARCH64: ++ LOONGARCH64ST(return unchainXDirect_LOONGARCH64(endness_host, ++ place_to_unchain, ++ place_to_jump_to_EXPECTED, ++ disp_cp_chain_me)); + default: + vassert(0); + } +@@ -1389,6 +1452,8 @@ Int LibVEX_evCheckSzB ( VexArch arch_host ) + MIPS64ST(cached = evCheckSzB_MIPS()); break; + case VexArchNANOMIPS: + NANOMIPSST(cached = evCheckSzB_NANOMIPS()); break; ++ case VexArchLOONGARCH64: ++ LOONGARCH64ST(cached = evCheckSzB_LOONGARCH64()); break; + default: + vassert(0); + } +@@ -1432,6 +1497,10 @@ VexInvalRange LibVEX_PatchProfInc ( VexArch arch_host, + case VexArchNANOMIPS: + NANOMIPSST(return patchProfInc_NANOMIPS(endness_host, place_to_patch, + location_of_counter)); ++ case VexArchLOONGARCH64: ++ LOONGARCH64ST(return patchProfInc_LOONGARCH64(endness_host, ++ place_to_patch, ++ location_of_counter)); + default: + vassert(0); + } +@@ -1515,6 +1584,7 @@ const HChar* LibVEX_ppVexArch ( VexArch arch ) + case VexArchMIPS32: return "MIPS32"; + case VexArchMIPS64: return "MIPS64"; + case VexArchNANOMIPS: return "NANOMIPS"; ++ case VexArchLOONGARCH64: return "LOONGARCH64"; + default: return "VexArch???"; + } + } +@@ -1585,6 +1655,7 @@ static IRType arch_word_size (VexArch arch) { + case VexArchMIPS64: + case VexArchPPC64: + case VexArchS390X: ++ case VexArchLOONGARCH64: + return Ity_I64; - fi - rm -f conftest.mmap conftest.txt + default: +@@ -1925,6 +1996,38 @@ static const HChar* show_hwcaps_mips64 ( UInt hwcaps ) + return "Unsupported baseline"; + } ++static const HChar* show_hwcaps_loongarch64 ( UInt hwcaps ) ++{ ++ static const HChar prefix[] = "loongarch64"; ++ static const struct { ++ UInt hwcaps_bit; ++ HChar name[16]; ++ } hwcaps_list[] = { ++ { VEX_HWCAPS_LOONGARCH_CPUCFG, "cpucfg" }, ++ { VEX_HWCAPS_LOONGARCH_LAM, "lam" }, ++ { VEX_HWCAPS_LOONGARCH_UAL, "ual" }, ++ { VEX_HWCAPS_LOONGARCH_FP, "fpu" }, ++ { VEX_HWCAPS_LOONGARCH_LSX, "lsx" }, ++ { VEX_HWCAPS_LOONGARCH_LASX, "lasx" }, ++ { VEX_HWCAPS_LOONGARCH_COMPLEX, "complex" }, ++ { VEX_HWCAPS_LOONGARCH_CRYPTO, "crypto" }, ++ { VEX_HWCAPS_LOONGARCH_LVZP, "lvz" }, ++ { VEX_HWCAPS_LOONGARCH_X86BT, "lbt_x86" }, ++ { VEX_HWCAPS_LOONGARCH_ARMBT, "lbt_arm" }, ++ { VEX_HWCAPS_LOONGARCH_MIPSBT, "lbt_mips" } ++ }; ++ static HChar buf[sizeof(prefix) + ++ NUM_HWCAPS * (sizeof hwcaps_list[0].name + 1) + 1]; // '\0' ++ ++ HChar *p = buf + vex_sprintf(buf, "%s", prefix); ++ UInt i; ++ for (i = 0 ; i < NUM_HWCAPS; ++i) { ++ if (hwcaps & hwcaps_list[i].hwcaps_bit) ++ p = p + vex_sprintf(p, "-%s", hwcaps_list[i].name); ++ } ++ return buf; ++} ++ + #undef NUM_HWCAPS --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for pthread_create in -lpthread" >&5 --$as_echo_n "checking for pthread_create in -lpthread... " >&6; } --if ${ac_cv_lib_pthread_pthread_create+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for pthread_create in -lpthread" >&5 -+printf %s "checking for pthread_create in -lpthread... " >&6; } -+if test ${ac_cv_lib_pthread_pthread_create+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - ac_check_lib_save_LIBS=$LIBS - LIBS="-lpthread $LIBS" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -@@ -14906,43 +15850,41 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* Override any GCC internal prototype to avoid an error. - Use char because int might match the return type of a GCC - builtin and then its argument prototype would still apply. */ --#ifdef __cplusplus --extern "C" --#endif - char pthread_create (); - int --main () -+main (void) - { - return pthread_create (); - ; - return 0; + /* Thie function must not return NULL. */ +@@ -1941,6 +2044,7 @@ static const HChar* show_hwcaps ( VexArch arch, UInt hwcaps ) + case VexArchS390X: return show_hwcaps_s390x(hwcaps); + case VexArchMIPS32: return show_hwcaps_mips32(hwcaps); + case VexArchMIPS64: return show_hwcaps_mips64(hwcaps); ++ case VexArchLOONGARCH64: return show_hwcaps_loongarch64(hwcaps); + default: return NULL; + } } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - ac_cv_lib_pthread_pthread_create=yes --else -+else $as_nop - ac_cv_lib_pthread_pthread_create=no - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - LIBS=$ac_check_lib_save_LIBS - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_pthread_pthread_create" >&5 --$as_echo "$ac_cv_lib_pthread_pthread_create" >&6; } --if test "x$ac_cv_lib_pthread_pthread_create" = xyes; then : -- cat >>confdefs.h <<_ACEOF --#define HAVE_LIBPTHREAD 1 --_ACEOF -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_pthread_pthread_create" >&5 -+printf "%s\n" "$ac_cv_lib_pthread_pthread_create" >&6; } -+if test "x$ac_cv_lib_pthread_pthread_create" = xyes -+then : -+ printf "%s\n" "#define HAVE_LIBPTHREAD 1" >>confdefs.h - - LIBS="-lpthread $LIBS" +@@ -2203,6 +2307,11 @@ static void check_hwcaps ( VexArch arch, UInt hwcaps ) + return; + invalid_hwcaps(arch, hwcaps, "Unsupported baseline\n"); - fi ++ case VexArchLOONGARCH64: ++ if (!(hwcaps & VEX_HWCAPS_LOONGARCH_ISA_64BIT)) ++ invalid_hwcaps(arch, hwcaps, "Unsupported baseline\n"); ++ return; ++ + default: + vpanic("unknown architecture"); + } +diff --git a/VEX/pub/libvex.h b/VEX/pub/libvex.h +index 27bb6e0..5ed24bd 100644 +--- a/VEX/pub/libvex.h ++++ b/VEX/pub/libvex.h +@@ -60,6 +60,7 @@ typedef + VexArchMIPS32, + VexArchMIPS64, + VexArchNANOMIPS, ++ VexArchLOONGARCH64, + } + VexArch; --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for clock_gettime in -lrt" >&5 --$as_echo_n "checking for clock_gettime in -lrt... " >&6; } --if ${ac_cv_lib_rt_clock_gettime+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for clock_gettime in -lrt" >&5 -+printf %s "checking for clock_gettime in -lrt... " >&6; } -+if test ${ac_cv_lib_rt_clock_gettime+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - ac_check_lib_save_LIBS=$LIBS - LIBS="-lrt $LIBS" - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -@@ -14951,87 +15893,252 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* Override any GCC internal prototype to avoid an error. - Use char because int might match the return type of a GCC - builtin and then its argument prototype would still apply. */ --#ifdef __cplusplus --extern "C" --#endif - char clock_gettime (); - int --main () -+main (void) - { - return clock_gettime (); - ; - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - ac_cv_lib_rt_clock_gettime=yes --else -+else $as_nop - ac_cv_lib_rt_clock_gettime=no - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - LIBS=$ac_check_lib_save_LIBS - fi --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_rt_clock_gettime" >&5 --$as_echo "$ac_cv_lib_rt_clock_gettime" >&6; } --if test "x$ac_cv_lib_rt_clock_gettime" = xyes; then : -- cat >>confdefs.h <<_ACEOF --#define HAVE_LIBRT 1 --_ACEOF -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_rt_clock_gettime" >&5 -+printf "%s\n" "$ac_cv_lib_rt_clock_gettime" >&6; } -+if test "x$ac_cv_lib_rt_clock_gettime" = xyes -+then : -+ printf "%s\n" "#define HAVE_LIBRT 1" >>confdefs.h +@@ -300,6 +301,22 @@ typedef + (VEX_MIPS_PROC_ID(x) == VEX_PRID_IMP_P5600) && \ + (VEX_MIPS_HOST_FP_MODE(x))) - LIBS="-lrt $LIBS" ++/* LoongArch baseline capability */ ++#define VEX_HWCAPS_LOONGARCH_CPUCFG (1 << 0) /* CPU has CPUCFG */ ++#define VEX_HWCAPS_LOONGARCH_LAM (1 << 1) /* CPU has Atomic instructions */ ++#define VEX_HWCAPS_LOONGARCH_UAL (1 << 2) /* CPU has Unaligned Access support */ ++#define VEX_HWCAPS_LOONGARCH_FP (1 << 3) /* CPU has FPU */ ++#define VEX_HWCAPS_LOONGARCH_LSX (1 << 4) /* CPU has 128-bit SIMD instructions */ ++#define VEX_HWCAPS_LOONGARCH_LASX (1 << 5) /* CPU has 256-bit SIMD instructions */ ++#define VEX_HWCAPS_LOONGARCH_COMPLEX (1 << 6) /* CPU has Complex instructions */ ++#define VEX_HWCAPS_LOONGARCH_CRYPTO (1 << 7) /* CPU has Crypto instructions */ ++#define VEX_HWCAPS_LOONGARCH_LVZP (1 << 8) /* CPU has Virtualization extension */ ++#define VEX_HWCAPS_LOONGARCH_X86BT (1 << 9) /* CPU has X86 Binary Translation */ ++#define VEX_HWCAPS_LOONGARCH_ARMBT (1 << 10) /* CPU has ARM Binary Translation */ ++#define VEX_HWCAPS_LOONGARCH_MIPSBT (1 << 11) /* CPU has MIPS Binary Translation */ ++#define VEX_HWCAPS_LOONGARCH_ISA_32BIT (1 << 30) /* 32-bit ISA */ ++#define VEX_HWCAPS_LOONGARCH_ISA_64BIT (1 << 31) /* 64-bit ISA */ ++ + /* These return statically allocated strings. */ - fi + extern const HChar* LibVEX_ppVexArch ( VexArch ); +@@ -420,6 +437,7 @@ void LibVEX_default_VexArchInfo ( /*OUT*/VexArchInfo* vai ); + guest is mips32 ==> applicable, default True + guest is mips64 ==> applicable, default True + guest is arm64 ==> applicable, default False ++ guest is loongarch64 ==> const True + host_ppc_calls_use_fndescrs: + host is ppc32-linux ==> False +@@ -1026,6 +1044,10 @@ extern void LibVEX_InitIRI ( const IRICB * ); + ~~~~~ + r21 is GSP. --for ac_func in \ -- clock_gettime\ -- epoll_create \ -- epoll_pwait \ -- klogctl \ -- mallinfo \ -- memchr \ -- memset \ -- mkdir \ -- mremap \ -- ppoll \ -- pthread_barrier_init \ -- pthread_condattr_setclock \ -- pthread_mutex_timedlock \ -- pthread_rwlock_timedrdlock \ -- pthread_rwlock_timedwrlock \ -- pthread_spin_lock \ -- pthread_yield \ -- pthread_setname_np \ -- readlinkat \ -- semtimedop \ -- signalfd \ -- sigwaitinfo \ -- strchr \ -- strdup \ -- strpbrk \ -- strrchr \ -- strstr \ -- syscall \ -- utimensat \ -- process_vm_readv \ -- process_vm_writev \ -- copy_file_range \ -- preadv \ -- pwritev \ -- preadv2 \ -- pwritev2 \ -- --do : -- as_ac_var=`$as_echo "ac_cv_func_$ac_func" | $as_tr_sh` --ac_fn_c_check_func "$LINENO" "$ac_func" "$as_ac_var" --if eval test \"x\$"$as_ac_var"\" = x"yes"; then : -- cat >>confdefs.h <<_ACEOF --#define `$as_echo "HAVE_$ac_func" | $as_tr_cpp` 1 --_ACEOF -+ac_fn_c_check_func "$LINENO" "clock_gettime" "ac_cv_func_clock_gettime" -+if test "x$ac_cv_func_clock_gettime" = xyes -+then : -+ printf "%s\n" "#define HAVE_CLOCK_GETTIME 1" >>confdefs.h -+ -+fi -+ac_fn_c_check_func "$LINENO" "epoll_create" "ac_cv_func_epoll_create" -+if test "x$ac_cv_func_epoll_create" = xyes -+then : -+ printf "%s\n" "#define HAVE_EPOLL_CREATE 1" >>confdefs.h -+ -+fi -+ac_fn_c_check_func "$LINENO" "epoll_pwait" "ac_cv_func_epoll_pwait" -+if test "x$ac_cv_func_epoll_pwait" = xyes -+then : -+ printf "%s\n" "#define HAVE_EPOLL_PWAIT 1" >>confdefs.h -+ -+fi -+ac_fn_c_check_func "$LINENO" "klogctl" "ac_cv_func_klogctl" -+if test "x$ac_cv_func_klogctl" = xyes -+then : -+ printf "%s\n" "#define HAVE_KLOGCTL 1" >>confdefs.h -+ -+fi -+ac_fn_c_check_func "$LINENO" "mallinfo" "ac_cv_func_mallinfo" -+if test "x$ac_cv_func_mallinfo" = xyes -+then : -+ printf "%s\n" "#define HAVE_MALLINFO 1" >>confdefs.h -+ -+fi -+ac_fn_c_check_func "$LINENO" "memchr" "ac_cv_func_memchr" -+if test "x$ac_cv_func_memchr" = xyes -+then : -+ printf "%s\n" "#define HAVE_MEMCHR 1" >>confdefs.h -+ -+fi -+ac_fn_c_check_func "$LINENO" "memset" "ac_cv_func_memset" -+if test "x$ac_cv_func_memset" = xyes -+then : -+ printf "%s\n" "#define HAVE_MEMSET 1" >>confdefs.h -+ -+fi -+ac_fn_c_check_func "$LINENO" "mkdir" "ac_cv_func_mkdir" -+if test "x$ac_cv_func_mkdir" = xyes -+then : -+ printf "%s\n" "#define HAVE_MKDIR 1" >>confdefs.h ++ loongarch64 ++ ~~~~~ ++ r31 is GSP. + -+fi -+ac_fn_c_check_func "$LINENO" "mremap" "ac_cv_func_mremap" -+if test "x$ac_cv_func_mremap" = xyes -+then : -+ printf "%s\n" "#define HAVE_MREMAP 1" >>confdefs.h + ALL GUEST ARCHITECTURES + ~~~~~~~~~~~~~~~~~~~~~~~ + The guest state must contain two pseudo-registers, guest_CMSTART +diff --git a/VEX/pub/libvex_basictypes.h b/VEX/pub/libvex_basictypes.h +index e3f1485..b4c81bf 100644 +--- a/VEX/pub/libvex_basictypes.h ++++ b/VEX/pub/libvex_basictypes.h +@@ -198,6 +198,10 @@ typedef unsigned long HWord; + # define VEX_HOST_WORDSIZE 4 + # define VEX_REGPARM(_n) /* */ + ++#elif defined(__loongarch__) && (__loongarch_grlen == 64) ++# define VEX_HOST_WORDSIZE 8 ++# define VEX_REGPARM(_n) /* */ + -+fi -+ac_fn_c_check_func "$LINENO" "ppoll" "ac_cv_func_ppoll" -+if test "x$ac_cv_func_ppoll" = xyes -+then : -+ printf "%s\n" "#define HAVE_PPOLL 1" >>confdefs.h + #else + # error "Vex: Fatal: Can't establish the host architecture" + #endif +diff --git a/VEX/pub/libvex_guest_loongarch64.h b/VEX/pub/libvex_guest_loongarch64.h +new file mode 100644 +index 0000000..fde111f +--- /dev/null ++++ b/VEX/pub/libvex_guest_loongarch64.h +@@ -0,0 +1,172 @@ + -+fi -+ac_fn_c_check_func "$LINENO" "pthread_barrier_init" "ac_cv_func_pthread_barrier_init" -+if test "x$ac_cv_func_pthread_barrier_init" = xyes -+then : -+ printf "%s\n" "#define HAVE_PTHREAD_BARRIER_INIT 1" >>confdefs.h ++/*---------------------------------------------------------------*/ ++/*--- begin libvex_guest_loongarch64.h ---*/ ++/*---------------------------------------------------------------*/ + -+fi -+ac_fn_c_check_func "$LINENO" "pthread_condattr_setclock" "ac_cv_func_pthread_condattr_setclock" -+if test "x$ac_cv_func_pthread_condattr_setclock" = xyes -+then : -+ printf "%s\n" "#define HAVE_PTHREAD_CONDATTR_SETCLOCK 1" >>confdefs.h ++/* ++ This file is part of Valgrind, a dynamic binary instrumentation ++ framework. + -+fi -+ac_fn_c_check_func "$LINENO" "pthread_mutex_timedlock" "ac_cv_func_pthread_mutex_timedlock" -+if test "x$ac_cv_func_pthread_mutex_timedlock" = xyes -+then : -+ printf "%s\n" "#define HAVE_PTHREAD_MUTEX_TIMEDLOCK 1" >>confdefs.h ++ Copyright (C) 2021-2022 Loongson Technology Corporation Limited + -+fi -+ac_fn_c_check_func "$LINENO" "pthread_rwlock_timedrdlock" "ac_cv_func_pthread_rwlock_timedrdlock" -+if test "x$ac_cv_func_pthread_rwlock_timedrdlock" = xyes -+then : -+ printf "%s\n" "#define HAVE_PTHREAD_RWLOCK_TIMEDRDLOCK 1" >>confdefs.h ++ This program is free software; you can redistribute it and/or ++ modify it under the terms of the GNU General Public License as ++ published by the Free Software Foundation; either version 2 of the ++ License, or (at your option) any later version. + -+fi -+ac_fn_c_check_func "$LINENO" "pthread_rwlock_timedwrlock" "ac_cv_func_pthread_rwlock_timedwrlock" -+if test "x$ac_cv_func_pthread_rwlock_timedwrlock" = xyes -+then : -+ printf "%s\n" "#define HAVE_PTHREAD_RWLOCK_TIMEDWRLOCK 1" >>confdefs.h ++ This program is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. + -+fi -+ac_fn_c_check_func "$LINENO" "pthread_spin_lock" "ac_cv_func_pthread_spin_lock" -+if test "x$ac_cv_func_pthread_spin_lock" = xyes -+then : -+ printf "%s\n" "#define HAVE_PTHREAD_SPIN_LOCK 1" >>confdefs.h ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, see . + -+fi -+ac_fn_c_check_func "$LINENO" "pthread_yield" "ac_cv_func_pthread_yield" -+if test "x$ac_cv_func_pthread_yield" = xyes -+then : -+ printf "%s\n" "#define HAVE_PTHREAD_YIELD 1" >>confdefs.h ++ The GNU General Public License is contained in the file COPYING. + -+fi -+ac_fn_c_check_func "$LINENO" "pthread_setname_np" "ac_cv_func_pthread_setname_np" -+if test "x$ac_cv_func_pthread_setname_np" = xyes -+then : -+ printf "%s\n" "#define HAVE_PTHREAD_SETNAME_NP 1" >>confdefs.h ++ Neither the names of the U.S. Department of Energy nor the ++ University of California nor the names of its contributors may be ++ used to endorse or promote products derived from this software ++ without prior written permission. ++*/ + -+fi -+ac_fn_c_check_func "$LINENO" "readlinkat" "ac_cv_func_readlinkat" -+if test "x$ac_cv_func_readlinkat" = xyes -+then : -+ printf "%s\n" "#define HAVE_READLINKAT 1" >>confdefs.h ++#ifndef __LIBVEX_PUB_GUEST_LOONGARCH64_H ++#define __LIBVEX_PUB_GUEST_LOONGARCH64_H + -+fi -+ac_fn_c_check_func "$LINENO" "semtimedop" "ac_cv_func_semtimedop" -+if test "x$ac_cv_func_semtimedop" = xyes -+then : -+ printf "%s\n" "#define HAVE_SEMTIMEDOP 1" >>confdefs.h ++#include "libvex_basictypes.h" + -+fi -+ac_fn_c_check_func "$LINENO" "signalfd" "ac_cv_func_signalfd" -+if test "x$ac_cv_func_signalfd" = xyes -+then : -+ printf "%s\n" "#define HAVE_SIGNALFD 1" >>confdefs.h + -+fi -+ac_fn_c_check_func "$LINENO" "sigwaitinfo" "ac_cv_func_sigwaitinfo" -+if test "x$ac_cv_func_sigwaitinfo" = xyes -+then : -+ printf "%s\n" "#define HAVE_SIGWAITINFO 1" >>confdefs.h ++/*---------------------------------------------------------------*/ ++/*--- Vex's representation of the LOONGARCH64 CPU state. ---*/ ++/*---------------------------------------------------------------*/ + -+fi -+ac_fn_c_check_func "$LINENO" "strchr" "ac_cv_func_strchr" -+if test "x$ac_cv_func_strchr" = xyes -+then : -+ printf "%s\n" "#define HAVE_STRCHR 1" >>confdefs.h ++typedef ++ struct { ++ /* Event check fail addr and counter. */ ++ /* 0 */ ULong host_EvC_FAILADDR; ++ /* 8 */ UInt host_EvC_COUNTER; ++ /* 12 */ UInt _padding0; + -+fi -+ac_fn_c_check_func "$LINENO" "strdup" "ac_cv_func_strdup" -+if test "x$ac_cv_func_strdup" = xyes -+then : -+ printf "%s\n" "#define HAVE_STRDUP 1" >>confdefs.h ++ /* CPU Registers */ ++ /* 16 */ ULong guest_R0; /* Constant zero */ ++ /* 24 */ ULong guest_R1; /* Return address */ ++ /* 32 */ ULong guest_R2; /* Thread pointer */ ++ /* 40 */ ULong guest_R3; /* Stack pointer */ ++ /* 48 */ ULong guest_R4; /* Argument registers / Return value */ ++ /* 56 */ ULong guest_R5; ++ /* 64 */ ULong guest_R6; /* Argument registers */ ++ /* 72 */ ULong guest_R7; ++ /* 80 */ ULong guest_R8; ++ /* 88 */ ULong guest_R9; ++ /* 96 */ ULong guest_R10; ++ /* 104 */ ULong guest_R11; ++ /* 112 */ ULong guest_R12; /* Temporary registers */ ++ /* 120 */ ULong guest_R13; ++ /* 128 */ ULong guest_R14; ++ /* 136 */ ULong guest_R15; ++ /* 144 */ ULong guest_R16; ++ /* 152 */ ULong guest_R17; ++ /* 160 */ ULong guest_R18; ++ /* 168 */ ULong guest_R19; ++ /* 176 */ ULong guest_R20; ++ /* 184 */ ULong guest_R21; /* Reserved */ ++ /* 192 */ ULong guest_R22; /* Frame pointer / Static register */ ++ /* 200 */ ULong guest_R23; /* Static registers */ ++ /* 208 */ ULong guest_R24; ++ /* 216 */ ULong guest_R25; ++ /* 224 */ ULong guest_R26; ++ /* 232 */ ULong guest_R27; ++ /* 240 */ ULong guest_R28; ++ /* 248 */ ULong guest_R29; ++ /* 256 */ ULong guest_R30; ++ /* 264 */ ULong guest_R31; + -+fi -+ac_fn_c_check_func "$LINENO" "strpbrk" "ac_cv_func_strpbrk" -+if test "x$ac_cv_func_strpbrk" = xyes -+then : -+ printf "%s\n" "#define HAVE_STRPBRK 1" >>confdefs.h ++ /* 272 */ ULong guest_PC; /* Program counter */ + -+fi -+ac_fn_c_check_func "$LINENO" "strrchr" "ac_cv_func_strrchr" -+if test "x$ac_cv_func_strrchr" = xyes -+then : -+ printf "%s\n" "#define HAVE_STRRCHR 1" >>confdefs.h ++ /* 280 */ UChar guest_FCC0; /* Condition Flag Registers */ ++ /* 281 */ UChar guest_FCC1; ++ /* 282 */ UChar guest_FCC2; ++ /* 283 */ UChar guest_FCC3; ++ /* 284 */ UChar guest_FCC4; ++ /* 285 */ UChar guest_FCC5; ++ /* 286 */ UChar guest_FCC6; ++ /* 287 */ UChar guest_FCC7; ++ /* 288 */ UInt guest_FCSR; /* FP/SIMD Control and Status Register */ + -+fi -+ac_fn_c_check_func "$LINENO" "strstr" "ac_cv_func_strstr" -+if test "x$ac_cv_func_strstr" = xyes -+then : -+ printf "%s\n" "#define HAVE_STRSTR 1" >>confdefs.h ++ /* Various pseudo-regs mandated by Vex or Valgrind. */ ++ /* Emulation notes */ ++ /* 292 */ UInt guest_EMNOTE; + -+fi -+ac_fn_c_check_func "$LINENO" "syscall" "ac_cv_func_syscall" -+if test "x$ac_cv_func_syscall" = xyes -+then : -+ printf "%s\n" "#define HAVE_SYSCALL 1" >>confdefs.h ++ /* For clflush: record start and length of area to invalidate */ ++ /* 296 */ ULong guest_CMSTART; ++ /* 304 */ ULong guest_CMLEN; + -+fi -+ac_fn_c_check_func "$LINENO" "utimensat" "ac_cv_func_utimensat" -+if test "x$ac_cv_func_utimensat" = xyes -+then : -+ printf "%s\n" "#define HAVE_UTIMENSAT 1" >>confdefs.h ++ /* Used to record the unredirected guest address at the start of ++ a translation whose start has been redirected. By reading ++ this pseudo-register shortly afterwards, the translation can ++ find out what the corresponding no-redirection address was. ++ Note, this is only set for wrap-style redirects, not for ++ replace-style ones. */ ++ /* 312 */ ULong guest_NRADDR; + -+fi -+ac_fn_c_check_func "$LINENO" "process_vm_readv" "ac_cv_func_process_vm_readv" -+if test "x$ac_cv_func_process_vm_readv" = xyes -+then : -+ printf "%s\n" "#define HAVE_PROCESS_VM_READV 1" >>confdefs.h ++ /* Fallback LL/SC support. */ ++ /* 320 */ ULong guest_LLSC_SIZE; /* 0==no transaction, else 4 or 8. */ ++ /* 328 */ ULong guest_LLSC_ADDR; /* Address of the transaction. */ ++ /* 336 */ ULong guest_LLSC_DATA; /* Original value at ADDR. */ ++ ++ /* 344 */ ULong _padding1; ++ ++ /* FPU/SIMD Registers */ ++ /* 352 */ U256 guest_X0; ++ /* 384 */ U256 guest_X1; ++ /* 416 */ U256 guest_X2; ++ /* 448 */ U256 guest_X3; ++ /* 480 */ U256 guest_X4; ++ /* 512 */ U256 guest_X5; ++ /* 544 */ U256 guest_X6; ++ /* 576 */ U256 guest_X7; ++ /* 608 */ U256 guest_X8; ++ /* 640 */ U256 guest_X9; ++ /* 672 */ U256 guest_X10; ++ /* 704 */ U256 guest_X11; ++ /* 736 */ U256 guest_X12; ++ /* 768 */ U256 guest_X13; ++ /* 800 */ U256 guest_X14; ++ /* 832 */ U256 guest_X15; ++ /* 864 */ U256 guest_X16; ++ /* 896 */ U256 guest_X17; ++ /* 928 */ U256 guest_X18; ++ /* 960 */ U256 guest_X19; ++ /* 992 */ U256 guest_X20; ++ /* 1024 */ U256 guest_X21; ++ /* 1056 */ U256 guest_X22; ++ /* 1088 */ U256 guest_X23; ++ /* 1120 */ U256 guest_X24; ++ /* 1152 */ U256 guest_X25; ++ /* 1184 */ U256 guest_X26; ++ /* 1216 */ U256 guest_X27; ++ /* 1248 */ U256 guest_X28; ++ /* 1280 */ U256 guest_X29; ++ /* 1312 */ U256 guest_X30; ++ /* 1244 */ U256 guest_X31; ++ ++ /* 1376 */ /* VexGuestLOONGARCH64State should have a 16-aligned size */ ++} VexGuestLOONGARCH64State; + -+fi -+ac_fn_c_check_func "$LINENO" "process_vm_writev" "ac_cv_func_process_vm_writev" -+if test "x$ac_cv_func_process_vm_writev" = xyes -+then : -+ printf "%s\n" "#define HAVE_PROCESS_VM_WRITEV 1" >>confdefs.h ++/*---------------------------------------------------------------*/ ++/*--- Utility functions for LOONGARCH64 guest stuff. ---*/ ++/*---------------------------------------------------------------*/ + -+fi -+ac_fn_c_check_func "$LINENO" "copy_file_range" "ac_cv_func_copy_file_range" -+if test "x$ac_cv_func_copy_file_range" = xyes -+then : -+ printf "%s\n" "#define HAVE_COPY_FILE_RANGE 1" >>confdefs.h ++/* ALL THE FOLLOWING ARE VISIBLE TO LIBRARY CLIENT. */ + -+fi -+ac_fn_c_check_func "$LINENO" "preadv" "ac_cv_func_preadv" -+if test "x$ac_cv_func_preadv" = xyes -+then : -+ printf "%s\n" "#define HAVE_PREADV 1" >>confdefs.h ++/* Initialise all guest LOONGARCH64 state. */ + -+fi -+ac_fn_c_check_func "$LINENO" "pwritev" "ac_cv_func_pwritev" -+if test "x$ac_cv_func_pwritev" = xyes -+then : -+ printf "%s\n" "#define HAVE_PWRITEV 1" >>confdefs.h ++extern ++void LibVEX_GuestLOONGARCH64_initialise ( /*OUT*/ ++ VexGuestLOONGARCH64State* vex_state ); + -+fi -+ac_fn_c_check_func "$LINENO" "preadv2" "ac_cv_func_preadv2" -+if test "x$ac_cv_func_preadv2" = xyes -+then : -+ printf "%s\n" "#define HAVE_PREADV2 1" >>confdefs.h ++#endif /* ndef __LIBVEX_PUB_GUEST_LOONGARCH64_H */ + -+fi -+ac_fn_c_check_func "$LINENO" "pwritev2" "ac_cv_func_pwritev2" -+if test "x$ac_cv_func_pwritev2" = xyes -+then : -+ printf "%s\n" "#define HAVE_PWRITEV2 1" >>confdefs.h - - fi --done - - - # AC_CHECK_LIB adds any library found to the variable LIBS, and links these -@@ -15100,7 +16207,7 @@ if test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS32_LINUX \ - -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX \ - -o x$VGCONF_PLATFORM_PRI_CAPS = xNANOMIPS_LINUX; then - --$as_echo "#define DISABLE_PTHREAD_SPINLOCK_INTERCEPT 1" >>confdefs.h -+printf "%s\n" "#define DISABLE_PTHREAD_SPINLOCK_INTERCEPT 1" >>confdefs.h - - fi - -@@ -15114,11 +16221,12 @@ fi - # --with-mpicc=. - # Extract the first word of "mpicc", so it can be a program name with args. - set dummy mpicc; ac_word=$2 --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 --$as_echo_n "checking for $ac_word... " >&6; } --if ${ac_cv_path_MPI_CC+:} false; then : -- $as_echo_n "(cached) " >&6 --else -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -+printf %s "checking for $ac_word... " >&6; } -+if test ${ac_cv_path_MPI_CC+y} -+then : -+ printf %s "(cached) " >&6 -+else $as_nop - case $MPI_CC in - [\\/]* | ?:[\\/]*) - ac_cv_path_MPI_CC="$MPI_CC" # Let the user override the test with a path. -@@ -15129,11 +16237,15 @@ as_dummy="$PATH:/usr/lib/openmpi/bin:/usr/lib64/openmpi/bin" - for as_dir in $as_dummy - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac - for ac_exec_ext in '' $ac_executable_extensions; do -- if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then -- ac_cv_path_MPI_CC="$as_dir/$ac_word$ac_exec_ext" -- $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 -+ if as_fn_executable_p "$as_dir$ac_word$ac_exec_ext"; then -+ ac_cv_path_MPI_CC="$as_dir$ac_word$ac_exec_ext" -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: found $as_dir$ac_word$ac_exec_ext" >&5 - break 2 - fi - done -@@ -15146,11 +16258,11 @@ esac - fi - MPI_CC=$ac_cv_path_MPI_CC - if test -n "$MPI_CC"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $MPI_CC" >&5 --$as_echo "$MPI_CC" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $MPI_CC" >&5 -+printf "%s\n" "$MPI_CC" >&6; } - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - - -@@ -15167,7 +16279,8 @@ elif test x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_LINUX \ - -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_LINUX \ - -o x$VGCONF_PLATFORM_PRI_CAPS = xARM64_LINUX \ - -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX \ -- -o x$VGCONF_PLATFORM_PRI_CAPS = xS390X_LINUX ; then -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xS390X_LINUX \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xLOONGARCH64_LINUX; then - mflag_primary=$FLAG_M64 - elif test x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN ; then - mflag_primary="$FLAG_M32 -arch i386" -@@ -15188,7 +16301,8 @@ fi - - - # Check whether --with-mpicc was given. --if test "${with_mpicc+set}" = set; then : -+if test ${with_mpicc+y} -+then : - withval=$with_mpicc; MPI_CC=$withval - - fi -@@ -15222,8 +16336,8 @@ fi - - ## See if MPI_CC works for the primary target - ## --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking primary target for usable MPI2-compliant C compiler and mpi.h" >&5 --$as_echo_n "checking primary target for usable MPI2-compliant C compiler and mpi.h... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking primary target for usable MPI2-compliant C compiler and mpi.h" >&5 -+printf %s "checking primary target for usable MPI2-compliant C compiler and mpi.h... " >&6; } - saved_CC=$CC - saved_CFLAGS=$CFLAGS - CC=$MPI_CC -@@ -15237,7 +16351,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - int ni, na, nd, comb; -@@ -15250,20 +16364,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - - ac_have_mpi2_pri=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes, $MPI_CC" >&5 --$as_echo "yes, $MPI_CC" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes, $MPI_CC" >&5 -+printf "%s\n" "yes, $MPI_CC" >&6; } - --else -+else $as_nop - - ac_have_mpi2_pri=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - CC=$saved_CC - CFLAGS=$saved_CFLAGS -@@ -15282,8 +16397,8 @@ fi - ## Kludge this by making MPI_CC something which will surely fail in - ## such a case. - ## --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking secondary target for usable MPI2-compliant C compiler and mpi.h" >&5 --$as_echo_n "checking secondary target for usable MPI2-compliant C compiler and mpi.h... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking secondary target for usable MPI2-compliant C compiler and mpi.h" >&5 -+printf %s "checking secondary target for usable MPI2-compliant C compiler and mpi.h... " >&6; } - saved_CC=$CC - saved_CFLAGS=$CFLAGS - saved_LDFLAGS="$LDFLAGS" -@@ -15301,7 +16416,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - - int ni, na, nd, comb; -@@ -15314,20 +16429,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - - ac_have_mpi2_sec=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes, $MPI_CC" >&5 --$as_echo "yes, $MPI_CC" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes, $MPI_CC" >&5 -+printf "%s\n" "yes, $MPI_CC" >&6; } - --else -+else $as_nop - - ac_have_mpi2_sec=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - CC=$saved_CC - CFLAGS=$saved_CFLAGS -@@ -15364,8 +16480,8 @@ fi - # Check whether the boost library 1.35 or later has been installed. - # The Boost.Threads library has undergone a major rewrite in version 1.35.0. - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for boost" >&5 --$as_echo_n "checking for boost... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for boost" >&5 -+printf %s "checking for boost... " >&6; } - - ac_ext=cpp - ac_cpp='$CXXCPP $CPPFLAGS' -@@ -15391,23 +16507,24 @@ int main(int argc, char** argv) - } - - _ACEOF --if ac_fn_cxx_try_link "$LINENO"; then : -+if ac_fn_cxx_try_link "$LINENO" -+then : - - ac_have_boost_1_35=yes - - BOOST_LIBS="-lboost_thread-mt -lboost_system-mt" - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_boost_1_35=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - - LIBS="$safe_LIBS" -@@ -15432,8 +16549,8 @@ fi - # does this compiler support -fopenmp, does it have the include file - # and does it have libgomp ? - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for OpenMP" >&5 --$as_echo_n "checking for OpenMP... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for OpenMP" >&5 -+printf %s "checking for OpenMP... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="-fopenmp $mflag_primary -Werror" -@@ -15449,20 +16566,21 @@ int main(int argc, char** argv) - } - - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - - ac_have_openmp=yes --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --else -+else $as_nop - - ac_have_openmp=no --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - CFLAGS=$safe_CFLAGS - -@@ -15477,14 +16595,14 @@ fi - - - # Check for __builtin_popcount --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for __builtin_popcount()" >&5 --$as_echo_n "checking for __builtin_popcount()... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __builtin_popcount()" >&5 -+printf %s "checking for __builtin_popcount()... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - - int --main () -+main (void) - { - - __builtin_popcount(2); -@@ -15494,32 +16612,33 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_BUILTIN_POPCOUT 1" >>confdefs.h -+printf "%s\n" "#define HAVE_BUILTIN_POPCOUT 1" >>confdefs.h - - --else -+else $as_nop - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - - # Check for __builtin_clz --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for __builtin_clz()" >&5 --$as_echo_n "checking for __builtin_clz()... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __builtin_clz()" >&5 -+printf %s "checking for __builtin_clz()... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - - int --main () -+main (void) - { - - __builtin_clz(2); -@@ -15529,32 +16648,33 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_BUILTIN_CLZ 1" >>confdefs.h -+printf "%s\n" "#define HAVE_BUILTIN_CLZ 1" >>confdefs.h - - --else -+else $as_nop - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - - # Check for __builtin_ctz --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for __builtin_ctz()" >&5 --$as_echo_n "checking for __builtin_ctz()... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for __builtin_ctz()" >&5 -+printf %s "checking for __builtin_ctz()... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - - int --main () -+main (void) - { - - __builtin_ctz(2); -@@ -15564,27 +16684,28 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_BUILTIN_CTZ 1" >>confdefs.h -+printf "%s\n" "#define HAVE_BUILTIN_CTZ 1" >>confdefs.h - - --else -+else $as_nop - --{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - - # does this compiler have built-in functions for atomic memory access for the - # primary target ? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc supports __sync_add_and_fetch for the primary target" >&5 --$as_echo_n "checking if gcc supports __sync_add_and_fetch for the primary target... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc supports __sync_add_and_fetch for the primary target" >&5 -+printf %s "checking if gcc supports __sync_add_and_fetch for the primary target... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="$mflag_primary" -@@ -15593,7 +16714,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ - - int --main () -+main (void) - { - - int variable = 1; -@@ -15604,23 +16725,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : - - ac_have_builtin_atomic_primary=yes -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_BUILTIN_ATOMIC 1" >>confdefs.h -+printf "%s\n" "#define HAVE_BUILTIN_ATOMIC 1" >>confdefs.h - - --else -+else $as_nop - - ac_have_builtin_atomic_primary=no -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - - CFLAGS=$safe_CFLAGS -@@ -15640,8 +16762,8 @@ fi - - if test x$VGCONF_PLATFORM_SEC_CAPS != x; then - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc supports __sync_add_and_fetch for the secondary target" >&5 --$as_echo_n "checking if gcc supports __sync_add_and_fetch for the secondary target... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc supports __sync_add_and_fetch for the secondary target" >&5 -+printf %s "checking if gcc supports __sync_add_and_fetch for the secondary target... " >&6; } - - safe_CFLAGS=$CFLAGS - CFLAGS="$mflag_secondary" -@@ -15650,7 +16772,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ ++/*---------------------------------------------------------------*/ ++/*--- libvex_guest_loongarch64.h ---*/ ++/*---------------------------------------------------------------*/ +diff --git a/VEX/pub/libvex_guest_offsets.h b/VEX/pub/libvex_guest_offsets.h +index a456b6d..9faa0ce 100644 +--- a/VEX/pub/libvex_guest_offsets.h ++++ b/VEX/pub/libvex_guest_offsets.h +@@ -162,3 +162,36 @@ + #define OFFSET_mips64_PC 272 + #define OFFSET_mips64_HI 280 + #define OFFSET_mips64_LO 288 ++#define OFFSET_loongarch64_R0 16 ++#define OFFSET_loongarch64_R1 24 ++#define OFFSET_loongarch64_R2 32 ++#define OFFSET_loongarch64_R3 40 ++#define OFFSET_loongarch64_R4 48 ++#define OFFSET_loongarch64_R5 56 ++#define OFFSET_loongarch64_R6 64 ++#define OFFSET_loongarch64_R7 72 ++#define OFFSET_loongarch64_R8 80 ++#define OFFSET_loongarch64_R9 88 ++#define OFFSET_loongarch64_R10 96 ++#define OFFSET_loongarch64_R11 104 ++#define OFFSET_loongarch64_R12 112 ++#define OFFSET_loongarch64_R13 120 ++#define OFFSET_loongarch64_R14 128 ++#define OFFSET_loongarch64_R15 136 ++#define OFFSET_loongarch64_R16 144 ++#define OFFSET_loongarch64_R17 152 ++#define OFFSET_loongarch64_R18 160 ++#define OFFSET_loongarch64_R19 168 ++#define OFFSET_loongarch64_R20 176 ++#define OFFSET_loongarch64_R21 184 ++#define OFFSET_loongarch64_R22 192 ++#define OFFSET_loongarch64_R23 200 ++#define OFFSET_loongarch64_R24 208 ++#define OFFSET_loongarch64_R25 216 ++#define OFFSET_loongarch64_R26 224 ++#define OFFSET_loongarch64_R27 232 ++#define OFFSET_loongarch64_R28 240 ++#define OFFSET_loongarch64_R29 248 ++#define OFFSET_loongarch64_R30 256 ++#define OFFSET_loongarch64_R31 264 ++#define OFFSET_loongarch64_PC 272 +diff --git a/VEX/pub/libvex_ir.h b/VEX/pub/libvex_ir.h +index 85805bb..c8b2e8f 100644 +--- a/VEX/pub/libvex_ir.h ++++ b/VEX/pub/libvex_ir.h +@@ -588,10 +588,10 @@ typedef - int --main () -+main (void) - { + /* Binary operations, with rounding. */ + /* :: IRRoundingMode(I32) x F64 x F64 -> F64 */ +- Iop_AddF64, Iop_SubF64, Iop_MulF64, Iop_DivF64, ++ Iop_AddF64, Iop_SubF64, Iop_MulF64, Iop_DivF64, Iop_ScaleBF64, - int variable = 1; -@@ -15660,20 +16782,21 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : + /* :: IRRoundingMode(I32) x F32 x F32 -> F32 */ +- Iop_AddF32, Iop_SubF32, Iop_MulF32, Iop_DivF32, ++ Iop_AddF32, Iop_SubF32, Iop_MulF32, Iop_DivF32, Iop_ScaleBF32, - ac_have_builtin_atomic_secondary=yes -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } + /* Variants of the above which produce a 64-bit result but which + round their result to a IEEE float range first. */ +@@ -610,10 +610,10 @@ typedef --else -+else $as_nop + /* Unary operations, with rounding. */ + /* :: IRRoundingMode(I32) x F64 -> F64 */ +- Iop_SqrtF64, ++ Iop_SqrtF64, Iop_RSqrtF64, Iop_LogBF64, - ac_have_builtin_atomic_secondary=no -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } + /* :: IRRoundingMode(I32) x F32 -> F32 */ +- Iop_SqrtF32, ++ Iop_SqrtF32, Iop_RSqrtF32, Iop_LogBF32, - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext + /* :: IRRoundingMode(I32) x F16 -> F16 */ + Iop_SqrtF16, +@@ -829,10 +829,14 @@ typedef - CFLAGS=$safe_CFLAGS -@@ -15692,8 +16815,8 @@ fi - # does this compiler have built-in functions for atomic memory access on - # 64-bit integers for all targets ? + /* --------- Possibly required by IEEE 754-2008. --------- */ --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if gcc supports __sync_add_and_fetch on uint64_t for all targets" >&5 --$as_echo_n "checking if gcc supports __sync_add_and_fetch on uint64_t for all targets... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if gcc supports __sync_add_and_fetch on uint64_t for all targets" >&5 -+printf %s "checking if gcc supports __sync_add_and_fetch on uint64_t for all targets... " >&6; } +- Iop_MaxNumF64, /* max, F64, numerical operand if other is a qNaN */ +- Iop_MinNumF64, /* min, F64, ditto */ +- Iop_MaxNumF32, /* max, F32, ditto */ +- Iop_MinNumF32, /* min, F32, ditto */ ++ Iop_MaxNumF64, /* max, F64, numerical operand if other is a qNaN */ ++ Iop_MinNumF64, /* min, F64, ditto */ ++ Iop_MaxNumAbsF64, /* max abs, F64, ditto */ ++ Iop_MinNumAbsF64, /* min abs, F64, ditto */ ++ Iop_MaxNumF32, /* max, F32, ditto */ ++ Iop_MinNumF32, /* min, F32, ditto */ ++ Iop_MaxNumAbsF32, /* max abs, F32, ditto */ ++ Iop_MinNumAbsF32, /* min abs, F32, ditto */ - cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ -@@ -15701,7 +16824,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include + /* ------------------ 16-bit scalar FP ------------------ */ - int --main () -+main (void) - { +@@ -2006,10 +2010,10 @@ typedef + Iop_ShrN16x16, Iop_ShrN32x8, Iop_ShrN64x4, + Iop_SarN16x16, Iop_SarN32x8, + +- Iop_Max8Sx32, Iop_Max16Sx16, Iop_Max32Sx8, +- Iop_Max8Ux32, Iop_Max16Ux16, Iop_Max32Ux8, +- Iop_Min8Sx32, Iop_Min16Sx16, Iop_Min32Sx8, +- Iop_Min8Ux32, Iop_Min16Ux16, Iop_Min32Ux8, ++ Iop_Max8Sx32, Iop_Max16Sx16, Iop_Max32Sx8, Iop_Max64Sx4, ++ Iop_Max8Ux32, Iop_Max16Ux16, Iop_Max32Ux8, Iop_Max64Ux4, ++ Iop_Min8Sx32, Iop_Min16Sx16, Iop_Min32Sx8, Iop_Min64Sx4, ++ Iop_Min8Ux32, Iop_Min16Ux16, Iop_Min32Ux8, Iop_Min64Ux4, + + Iop_Mul16x16, Iop_Mul32x8, + Iop_MulHi16Ux16, Iop_MulHi16Sx16, +@@ -2503,6 +2507,7 @@ typedef + Ijk_SigFPE, /* current instruction synths generic SIGFPE */ + Ijk_SigFPE_IntDiv, /* current instruction synths SIGFPE - IntDiv */ + Ijk_SigFPE_IntOvf, /* current instruction synths SIGFPE - IntOvf */ ++ Ijk_SigSYS, /* current instruction synths SIGSYS */ + /* Unfortunately, various guest-dependent syscall kinds. They + all mean: do a syscall before continuing. */ + Ijk_Sys_syscall, /* amd64/x86 'syscall', ppc 'sc', arm 'svc #0' */ +@@ -2662,7 +2667,12 @@ typedef + /* Needed only on ARM. It cancels a reservation made by a + preceding Linked-Load, and needs to be handed through to the + back end, just as LL and SC themselves are. */ +- Imbe_CancelReservation ++ Imbe_CancelReservation, ++ /* Needed only on LOONGARCH64. It completes the synchronization ++ between the store operation and the instruction fetch operation ++ within a single processor core, and needs to be handed through ++ to the back end. */ ++ Imbe_InsnFence + } + IRMBusEvent; - uint64_t variable = 1; -@@ -15711,16 +16834,17 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : +diff --git a/VEX/pub/libvex_trc_values.h b/VEX/pub/libvex_trc_values.h +index cfd54de..90e2b60 100644 +--- a/VEX/pub/libvex_trc_values.h ++++ b/VEX/pub/libvex_trc_values.h +@@ -57,6 +57,7 @@ + continuing */ + #define VEX_TRC_JMP_SIGBUS 93 /* deliver SIGBUS before continuing */ + #define VEX_TRC_JMP_SIGFPE 105 /* deliver SIGFPE before continuing */ ++#define VEX_TRC_JMP_SIGSYS 115 /* deliver SIGSYS before continuing */ - ac_have_builtin_atomic64_primary=yes + #define VEX_TRC_JMP_SIGFPE_INTDIV 97 /* deliver SIGFPE (integer divide + by zero) before continuing */ +diff --git a/auxprogs/Makefile.in b/auxprogs/Makefile.in +index cabc2bf..d9481c3 100644 +--- a/auxprogs/Makefile.in ++++ b/auxprogs/Makefile.in +@@ -613,6 +613,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ + $(AM_CFLAGS_PSO_BASE) --else -+else $as_nop + AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g ++AM_FLAG_M3264_LOONGARCH64_LINUX = @FLAG_M64@ ++AM_CFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) ++AM_CFLAGS_PSO_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ ++ $(AM_CFLAGS_PSO_BASE) ++ ++AM_CCASFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ -g + AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@ + AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ + $(AM_CFLAGS_BASE) -fomit-frame-pointer @SOLARIS_UNDEF_LARGESOURCE@ +@@ -660,6 +666,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ + PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ + PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ + PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ ++PRELOAD_LDFLAGS_LOONGARCH64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ + PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ + PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ + dist_noinst_SCRIPTS = \ +diff --git a/cachegrind/Makefile.in b/cachegrind/Makefile.in +index 1363cc6..3fc4a88 100644 +--- a/cachegrind/Makefile.in ++++ b/cachegrind/Makefile.in +@@ -661,6 +661,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ + $(AM_CFLAGS_PSO_BASE) - ac_have_builtin_atomic64_primary=no + AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g ++AM_FLAG_M3264_LOONGARCH64_LINUX = @FLAG_M64@ ++AM_CFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) ++AM_CFLAGS_PSO_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ ++ $(AM_CFLAGS_PSO_BASE) ++ ++AM_CCASFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ -g + AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@ + AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ + $(AM_CFLAGS_BASE) -fomit-frame-pointer @SOLARIS_UNDEF_LARGESOURCE@ +@@ -708,6 +714,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ + PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ + PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ + PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ ++PRELOAD_LDFLAGS_LOONGARCH64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ + PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ + PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext +@@ -798,6 +805,10 @@ TOOL_LDFLAGS_MIPS64_LINUX = \ + -static -nodefaultlibs -nostartfiles -u __start @FLAG_NO_BUILD_ID@ \ + @FLAG_M64@ - if test x$VGCONF_PLATFORM_SEC_CAPS != x; then -@@ -15734,7 +16858,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include ++TOOL_LDFLAGS_LOONGARCH64_LINUX = \ ++ -static -nodefaultlibs -nostartfiles -u __start @FLAG_NO_BUILD_ID@ \ ++ @FLAG_M64@ ++ + TOOL_LDFLAGS_X86_SOLARIS = \ + $(TOOL_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ - int --main () -+main (void) - { +@@ -858,6 +869,9 @@ LIBREPLACEMALLOC_MIPS32_LINUX = \ + LIBREPLACEMALLOC_MIPS64_LINUX = \ + $(top_builddir)/coregrind/libreplacemalloc_toolpreload-mips64-linux.a - uint64_t variable = 1; -@@ -15744,16 +16868,17 @@ main () - return 0; - } - _ACEOF --if ac_fn_c_try_link "$LINENO"; then : -+if ac_fn_c_try_link "$LINENO" -+then : ++LIBREPLACEMALLOC_LOONGARCH64_LINUX = \ ++ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-loongarch64-linux.a ++ + LIBREPLACEMALLOC_X86_SOLARIS = \ + $(top_builddir)/coregrind/libreplacemalloc_toolpreload-x86-solaris.a - ac_have_builtin_atomic64_secondary=yes +@@ -930,6 +944,11 @@ LIBREPLACEMALLOC_LDFLAGS_MIPS64_LINUX = \ + $(LIBREPLACEMALLOC_MIPS64_LINUX) \ + -Wl,--no-whole-archive --else -+else $as_nop ++LIBREPLACEMALLOC_LDFLAGS_LOONGARCH64_LINUX = \ ++ -Wl,--whole-archive \ ++ $(LIBREPLACEMALLOC_LOONGARCH64_LINUX) \ ++ -Wl,--no-whole-archive ++ + LIBREPLACEMALLOC_LDFLAGS_X86_SOLARIS = \ + -Wl,--whole-archive \ + $(LIBREPLACEMALLOC_X86_SOLARIS) \ +diff --git a/cachegrind/cg_arch.c b/cachegrind/cg_arch.c +index 68314c9..55f7585 100644 +--- a/cachegrind/cg_arch.c ++++ b/cachegrind/cg_arch.c +@@ -484,6 +484,13 @@ configure_caches(cache_t *I1c, cache_t *D1c, cache_t *LLc, + *D1c = (cache_t) { 65536, 2, 64 }; + *LLc = (cache_t) { 262144, 8, 64 }; - ac_have_builtin_atomic64_secondary=no ++#elif defined(VGA_loongarch64) ++ ++ // Set caches to default (for LOONGARCH64 - 3A5000) ++ *I1c = (cache_t) { 65536, 4, 64 }; ++ *D1c = (cache_t) { 65536, 4, 64 }; ++ *LLc = (cache_t) { 262144, 16, 64 }; ++ + #else - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext + #error "Unknown arch" +diff --git a/cachegrind/cg_branchpred.c b/cachegrind/cg_branchpred.c +index 927b7bf..6a97209 100644 +--- a/cachegrind/cg_branchpred.c ++++ b/cachegrind/cg_branchpred.c +@@ -44,7 +44,7 @@ + guaranteed to be zero? */ + #if defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le) \ + || defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_nanomips) \ +- || defined(VGA_arm64) ++ || defined(VGA_arm64) || defined(VGA_loongarch64) + # define N_IADDR_LO_ZERO_BITS 2 + #elif defined(VGA_x86) || defined(VGA_amd64) + # define N_IADDR_LO_ZERO_BITS 0 +diff --git a/cachegrind/tests/Makefile.in b/cachegrind/tests/Makefile.in +index 722b1e7..7bb020e 100644 +--- a/cachegrind/tests/Makefile.in ++++ b/cachegrind/tests/Makefile.in +@@ -629,6 +629,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ + $(AM_CFLAGS_PSO_BASE) - CFLAGS=$safe_CFLAGS -@@ -15763,12 +16888,12 @@ fi - if test x$ac_have_builtin_atomic64_primary = xyes && \ - test x$VGCONF_PLATFORM_SEC_CAPS = x \ - -o x$ac_have_builtin_atomic64_secondary = xyes; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - ac_have_builtin_atomic64=yes - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - ac_have_builtin_atomic64=no - fi + AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g ++AM_FLAG_M3264_LOONGARCH64_LINUX = @FLAG_M64@ ++AM_CFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) ++AM_CFLAGS_PSO_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ ++ $(AM_CFLAGS_PSO_BASE) ++ ++AM_CCASFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ -g + AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@ + AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ + $(AM_CFLAGS_BASE) -fomit-frame-pointer @SOLARIS_UNDEF_LARGESOURCE@ +@@ -676,6 +682,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ + PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ + PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ + PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ ++PRELOAD_LDFLAGS_LOONGARCH64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ + PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ + PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ + AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \ +diff --git a/cachegrind/tests/x86/Makefile.in b/cachegrind/tests/x86/Makefile.in +index 1f7c820..6fcfd84 100644 +--- a/cachegrind/tests/x86/Makefile.in ++++ b/cachegrind/tests/x86/Makefile.in +@@ -572,6 +572,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ + $(AM_CFLAGS_PSO_BASE) -@@ -15783,8 +16908,8 @@ fi + AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g ++AM_FLAG_M3264_LOONGARCH64_LINUX = @FLAG_M64@ ++AM_CFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) ++AM_CFLAGS_PSO_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ ++ $(AM_CFLAGS_PSO_BASE) ++ ++AM_CCASFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ -g + AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@ + AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ + $(AM_CFLAGS_BASE) -fomit-frame-pointer @SOLARIS_UNDEF_LARGESOURCE@ +@@ -619,6 +625,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ + PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ + PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ + PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ ++PRELOAD_LDFLAGS_LOONGARCH64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ + PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ + PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ + AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \ +diff --git a/callgrind/Makefile.in b/callgrind/Makefile.in +index 0c33846..a74dfa5 100644 +--- a/callgrind/Makefile.in ++++ b/callgrind/Makefile.in +@@ -708,6 +708,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ + $(AM_CFLAGS_PSO_BASE) + AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g ++AM_FLAG_M3264_LOONGARCH64_LINUX = @FLAG_M64@ ++AM_CFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) ++AM_CFLAGS_PSO_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ ++ $(AM_CFLAGS_PSO_BASE) ++ ++AM_CCASFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ -g + AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@ + AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ + $(AM_CFLAGS_BASE) -fomit-frame-pointer @SOLARIS_UNDEF_LARGESOURCE@ +@@ -755,6 +761,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ + PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ + PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ + PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ ++PRELOAD_LDFLAGS_LOONGARCH64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ + PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ + PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ - # does g++ have built-in functions for atomic memory access ? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if g++ supports __sync_add_and_fetch" >&5 --$as_echo_n "checking if g++ supports __sync_add_and_fetch... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if g++ supports __sync_add_and_fetch" >&5 -+printf %s "checking if g++ supports __sync_add_and_fetch... " >&6; } +@@ -845,6 +852,10 @@ TOOL_LDFLAGS_MIPS64_LINUX = \ + -static -nodefaultlibs -nostartfiles -u __start @FLAG_NO_BUILD_ID@ \ + @FLAG_M64@ - safe_CXXFLAGS=$CXXFLAGS - CXXFLAGS="$mflag_primary" -@@ -15799,7 +16924,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - /* end confdefs.h. */ ++TOOL_LDFLAGS_LOONGARCH64_LINUX = \ ++ -static -nodefaultlibs -nostartfiles -u __start @FLAG_NO_BUILD_ID@ \ ++ @FLAG_M64@ ++ + TOOL_LDFLAGS_X86_SOLARIS = \ + $(TOOL_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ - int --main () -+main (void) - { +@@ -905,6 +916,9 @@ LIBREPLACEMALLOC_MIPS32_LINUX = \ + LIBREPLACEMALLOC_MIPS64_LINUX = \ + $(top_builddir)/coregrind/libreplacemalloc_toolpreload-mips64-linux.a - int variable = 1; -@@ -15810,23 +16935,24 @@ main () - return 0; - } - _ACEOF --if ac_fn_cxx_try_link "$LINENO"; then : -+if ac_fn_cxx_try_link "$LINENO" -+then : ++LIBREPLACEMALLOC_LOONGARCH64_LINUX = \ ++ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-loongarch64-linux.a ++ + LIBREPLACEMALLOC_X86_SOLARIS = \ + $(top_builddir)/coregrind/libreplacemalloc_toolpreload-x86-solaris.a - ac_have_builtin_atomic_cxx=yes -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } +@@ -977,6 +991,11 @@ LIBREPLACEMALLOC_LDFLAGS_MIPS64_LINUX = \ + $(LIBREPLACEMALLOC_MIPS64_LINUX) \ + -Wl,--no-whole-archive --$as_echo "#define HAVE_BUILTIN_ATOMIC_CXX 1" >>confdefs.h -+printf "%s\n" "#define HAVE_BUILTIN_ATOMIC_CXX 1" >>confdefs.h ++LIBREPLACEMALLOC_LDFLAGS_LOONGARCH64_LINUX = \ ++ -Wl,--whole-archive \ ++ $(LIBREPLACEMALLOC_LOONGARCH64_LINUX) \ ++ -Wl,--no-whole-archive ++ + LIBREPLACEMALLOC_LDFLAGS_X86_SOLARIS = \ + -Wl,--whole-archive \ + $(LIBREPLACEMALLOC_X86_SOLARIS) \ +diff --git a/callgrind/tests/Makefile.in b/callgrind/tests/Makefile.in +index 5268175..9a98624 100644 +--- a/callgrind/tests/Makefile.in ++++ b/callgrind/tests/Makefile.in +@@ -614,6 +614,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ + $(AM_CFLAGS_PSO_BASE) + AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g ++AM_FLAG_M3264_LOONGARCH64_LINUX = @FLAG_M64@ ++AM_CFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) ++AM_CFLAGS_PSO_LOONGARCH64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ ++ $(AM_CFLAGS_PSO_BASE) ++ ++AM_CCASFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ -g + AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@ + AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ + $(AM_CFLAGS_BASE) -fomit-frame-pointer @SOLARIS_UNDEF_LARGESOURCE@ +@@ -661,6 +667,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ + PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ + PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ + PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ ++PRELOAD_LDFLAGS_LOONGARCH64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ + PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ + PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ + AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \ +diff --git a/config.h b/config.h +index 34b8917..9bdf4ff 100644 +--- a/config.h ++++ b/config.h +@@ -96,7 +96,7 @@ + #define HAVE_ASM_UNISTD_H 1 --else -+else $as_nop + /* Define to 1 if as supports fxsave64/fxrstor64. */ +-#define HAVE_AS_AMD64_FXSAVE64 1 ++/* #undef HAVE_AS_AMD64_FXSAVE64 */ - ac_have_builtin_atomic_cxx=no -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } + /* Define to 1 if as supports floating point phased out category. */ + /* #undef HAVE_AS_PPC_FPPO */ +diff --git a/configure b/configure +index 26f7d89..9d6deb1 100755 +--- a/configure ++++ b/configure +@@ -1003,6 +1003,8 @@ VGCONF_PLATFORMS_INCLUDE_AMD64_FREEBSD_FALSE + VGCONF_PLATFORMS_INCLUDE_AMD64_FREEBSD_TRUE + VGCONF_PLATFORMS_INCLUDE_X86_FREEBSD_FALSE + VGCONF_PLATFORMS_INCLUDE_X86_FREEBSD_TRUE ++VGCONF_PLATFORMS_INCLUDE_LOONGARCH64_LINUX_FALSE ++VGCONF_PLATFORMS_INCLUDE_LOONGARCH64_LINUX_TRUE + VGCONF_PLATFORMS_INCLUDE_NANOMIPS_LINUX_FALSE + VGCONF_PLATFORMS_INCLUDE_NANOMIPS_LINUX_TRUE + VGCONF_PLATFORMS_INCLUDE_MIPS64_LINUX_FALSE +@@ -1025,6 +1027,8 @@ VGCONF_PLATFORMS_INCLUDE_AMD64_LINUX_FALSE + VGCONF_PLATFORMS_INCLUDE_AMD64_LINUX_TRUE + VGCONF_PLATFORMS_INCLUDE_X86_LINUX_FALSE + VGCONF_PLATFORMS_INCLUDE_X86_LINUX_TRUE ++VGCONF_ARCHS_INCLUDE_LOONGARCH64_FALSE ++VGCONF_ARCHS_INCLUDE_LOONGARCH64_TRUE + VGCONF_ARCHS_INCLUDE_NANOMIPS_FALSE + VGCONF_ARCHS_INCLUDE_NANOMIPS_TRUE + VGCONF_ARCHS_INCLUDE_MIPS64_FALSE +@@ -6938,6 +6942,12 @@ printf "%s\n" "ok (${host_cpu})" >&6; } + ARCH_MAX="nanomips" + ;; ++ loongarch64*) ++ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${host_cpu})" >&5 ++printf "%s\n" "ok (${host_cpu})" >&6; } ++ ARCH_MAX="loongarch64" ++ ;; ++ + *) + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no (${host_cpu})" >&5 + printf "%s\n" "no (${host_cpu})" >&6; } +@@ -7764,6 +7774,18 @@ printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } + valt_load_address_sec_norml="0xUNSET" + valt_load_address_sec_inner="0xUNSET" + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 ++printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } ++ ;; ++ loongarch64-linux) ++ VGCONF_ARCH_PRI="loongarch64" ++ VGCONF_ARCH_SEC="" ++ VGCONF_PLATFORM_PRI_CAPS="LOONGARCH64_LINUX" ++ VGCONF_PLATFORM_SEC_CAPS="" ++ valt_load_address_pri_norml="0x58000000" ++ valt_load_address_pri_inner="0x38000000" ++ valt_load_address_sec_norml="0xUNSET" ++ valt_load_address_sec_inner="0xUNSET" ++ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: ok (${ARCH_MAX}-${VGCONF_OS})" >&5 + printf "%s\n" "ok (${ARCH_MAX}-${VGCONF_OS})" >&6; } + ;; + x86-solaris) +@@ -7921,6 +7943,14 @@ else + VGCONF_ARCHS_INCLUDE_NANOMIPS_FALSE= fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - ac_ext=c - ac_cpp='$CPP $CPPFLAGS' -@@ -15876,8 +17002,8 @@ fi - - - # does libstdc++ support annotating shared pointers ? --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if libstdc++ supports annotating shared pointers" >&5 --$as_echo_n "checking if libstdc++ supports annotating shared pointers... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking if libstdc++ supports annotating shared pointers" >&5 -+printf %s "checking if libstdc++ supports annotating shared pointers... " >&6; } - - safe_CXXFLAGS=$CXXFLAGS - CXXFLAGS="-std=c++0x" -@@ -15894,7 +17020,7 @@ cat confdefs.h - <<_ACEOF >conftest.$ac_ext - #include - - int --main () -+main (void) - { - std::shared_ptr p -@@ -15903,16 +17029,17 @@ main () - return 0; - } - _ACEOF --if ac_fn_cxx_try_link "$LINENO"; then : -+if ac_fn_cxx_try_link "$LINENO" -+then : - - ac_have_shared_ptr=yes - --else -+else $as_nop - - ac_have_shared_ptr=no ++ if test x$VGCONF_PLATFORM_PRI_CAPS = xLOONGARCH64_LINUX ; then ++ VGCONF_ARCHS_INCLUDE_LOONGARCH64_TRUE= ++ VGCONF_ARCHS_INCLUDE_LOONGARCH64_FALSE='#' ++else ++ VGCONF_ARCHS_INCLUDE_LOONGARCH64_TRUE='#' ++ VGCONF_ARCHS_INCLUDE_LOONGARCH64_FALSE= ++fi ++ + # Set up VGCONF_PLATFORMS_INCLUDE_. Either one or two of these + # become defined. +@@ -8017,6 +8047,14 @@ else + VGCONF_PLATFORMS_INCLUDE_NANOMIPS_LINUX_FALSE= fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - if test x$ac_have_shared_ptr = xyes; then - # If compilation of the program below fails because of a syntax error -@@ -15926,7 +17053,7 @@ if test x$ac_have_shared_ptr = xyes; then - #include - - int --main () -+main (void) - { - - std::shared_ptr p -@@ -15935,28 +17062,29 @@ main () - return 0; - } - _ACEOF --if ac_fn_cxx_try_link "$LINENO"; then : -+if ac_fn_cxx_try_link "$LINENO" -+then : - - ac_have_shared_pointer_annotation=no -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - --else -+else $as_nop - - ac_have_shared_pointer_annotation=yes -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -+printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_SHARED_POINTER_ANNOTATION 1" >>confdefs.h -+printf "%s\n" "#define HAVE_SHARED_POINTER_ANNOTATION 1" >>confdefs.h - - fi --rm -f core conftest.err conftest.$ac_objext \ -+rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext ++ if test x$VGCONF_PLATFORM_PRI_CAPS = xLOONGARCH64_LINUX; then ++ VGCONF_PLATFORMS_INCLUDE_LOONGARCH64_LINUX_TRUE= ++ VGCONF_PLATFORMS_INCLUDE_LOONGARCH64_LINUX_FALSE='#' ++else ++ VGCONF_PLATFORMS_INCLUDE_LOONGARCH64_LINUX_TRUE='#' ++ VGCONF_PLATFORMS_INCLUDE_LOONGARCH64_LINUX_FALSE= ++fi ++ + if test x$VGCONF_PLATFORM_PRI_CAPS = xX86_FREEBSD \ + -o x$VGCONF_PLATFORM_SEC_CAPS = xX86_FREEBSD; then + VGCONF_PLATFORMS_INCLUDE_X86_FREEBSD_TRUE= +@@ -8083,7 +8121,8 @@ fi + -o x$VGCONF_PLATFORM_PRI_CAPS = xS390X_LINUX \ + -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS32_LINUX \ + -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX \ +- -o x$VGCONF_PLATFORM_PRI_CAPS = xNANOMIPS_LINUX; then ++ -o x$VGCONF_PLATFORM_PRI_CAPS = xNANOMIPS_LINUX \ ++ -o x$VGCONF_PLATFORM_PRI_CAPS = xLOONGARCH64_LINUX; then + VGCONF_OS_IS_LINUX_TRUE= + VGCONF_OS_IS_LINUX_FALSE='#' else - ac_have_shared_pointer_annotation=no -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -+printf "%s\n" "no" >&6; } - fi - ac_ext=c - ac_cpp='$CPP $CPPFLAGS' -@@ -15982,7 +17110,7 @@ fi +@@ -18254,7 +18293,8 @@ elif test x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_LINUX \ + -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_LINUX \ + -o x$VGCONF_PLATFORM_PRI_CAPS = xARM64_LINUX \ + -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX \ +- -o x$VGCONF_PLATFORM_PRI_CAPS = xS390X_LINUX ; then ++ -o x$VGCONF_PLATFORM_PRI_CAPS = xS390X_LINUX \ ++ -o x$VGCONF_PLATFORM_PRI_CAPS = xLOONGARCH64_LINUX; then + mflag_primary=$FLAG_M64 + elif test x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN ; then + mflag_primary="$FLAG_M32 -arch i386" +@@ -19213,7 +19253,7 @@ fi #---------------------------------------------------------------------------- # Nb: VEX/Makefile is generated from Makefile.vex.in. --ac_config_files="$ac_config_files Makefile VEX/Makefile:Makefile.vex.in valgrind.spec valgrind.pc glibc-2.X.supp docs/Makefile tests/Makefile tests/vg_regtest perf/Makefile perf/vg_perf gdbserver_tests/Makefile gdbserver_tests/solaris/Makefile include/Makefile auxprogs/Makefile mpi/Makefile coregrind/Makefile memcheck/Makefile memcheck/tests/Makefile memcheck/tests/common/Makefile memcheck/tests/amd64/Makefile memcheck/tests/x86/Makefile memcheck/tests/linux/Makefile memcheck/tests/darwin/Makefile memcheck/tests/solaris/Makefile memcheck/tests/amd64-linux/Makefile memcheck/tests/arm64-linux/Makefile memcheck/tests/x86-linux/Makefile memcheck/tests/amd64-solaris/Makefile memcheck/tests/x86-solaris/Makefile memcheck/tests/ppc32/Makefile memcheck/tests/ppc64/Makefile memcheck/tests/s390x/Makefile memcheck/tests/mips32/Makefile memcheck/tests/mips64/Makefile memcheck/tests/vbit-test/Makefile cachegrind/Makefile cachegrind/tests/Makefile cachegrind/tests/x86/Makefile cachegrind/cg_annotate cachegrind/cg_diff callgrind/Makefile callgrind/callgrind_annotate callgrind/callgrind_control callgrind/tests/Makefile helgrind/Makefile helgrind/tests/Makefile drd/Makefile drd/scripts/download-and-build-splash2 drd/tests/Makefile massif/Makefile massif/tests/Makefile massif/ms_print dhat/Makefile dhat/tests/Makefile lackey/Makefile lackey/tests/Makefile none/Makefile none/tests/Makefile none/tests/scripts/Makefile none/tests/amd64/Makefile none/tests/ppc32/Makefile none/tests/ppc64/Makefile none/tests/x86/Makefile none/tests/arm/Makefile none/tests/arm64/Makefile none/tests/s390x/Makefile none/tests/mips32/Makefile none/tests/mips64/Makefile none/tests/nanomips/Makefile none/tests/linux/Makefile none/tests/darwin/Makefile none/tests/solaris/Makefile none/tests/amd64-linux/Makefile none/tests/x86-linux/Makefile none/tests/amd64-darwin/Makefile none/tests/x86-darwin/Makefile none/tests/amd64-solaris/Makefile none/tests/x86-solaris/Makefile exp-bbv/Makefile exp-bbv/tests/Makefile exp-bbv/tests/x86/Makefile exp-bbv/tests/x86-linux/Makefile exp-bbv/tests/amd64-linux/Makefile exp-bbv/tests/ppc32-linux/Makefile exp-bbv/tests/arm-linux/Makefile shared/Makefile solaris/Makefile" -+ac_config_files="$ac_config_files Makefile VEX/Makefile:Makefile.vex.in valgrind.spec valgrind.pc glibc-2.X.supp docs/Makefile tests/Makefile tests/vg_regtest perf/Makefile perf/vg_perf gdbserver_tests/Makefile gdbserver_tests/solaris/Makefile include/Makefile auxprogs/Makefile mpi/Makefile coregrind/Makefile memcheck/Makefile memcheck/tests/Makefile memcheck/tests/common/Makefile memcheck/tests/amd64/Makefile memcheck/tests/x86/Makefile memcheck/tests/linux/Makefile memcheck/tests/darwin/Makefile memcheck/tests/solaris/Makefile memcheck/tests/amd64-linux/Makefile memcheck/tests/arm64-linux/Makefile memcheck/tests/x86-linux/Makefile memcheck/tests/loongarch64-linux/Makefile memcheck/tests/amd64-solaris/Makefile memcheck/tests/x86-solaris/Makefile memcheck/tests/ppc32/Makefile memcheck/tests/ppc64/Makefile memcheck/tests/s390x/Makefile memcheck/tests/mips32/Makefile memcheck/tests/mips64/Makefile memcheck/tests/vbit-test/Makefile cachegrind/Makefile cachegrind/tests/Makefile cachegrind/tests/x86/Makefile cachegrind/cg_annotate cachegrind/cg_diff callgrind/Makefile callgrind/callgrind_annotate callgrind/callgrind_control callgrind/tests/Makefile helgrind/Makefile helgrind/tests/Makefile drd/Makefile drd/scripts/download-and-build-splash2 drd/tests/Makefile massif/Makefile massif/tests/Makefile massif/ms_print dhat/Makefile dhat/tests/Makefile lackey/Makefile lackey/tests/Makefile none/Makefile none/tests/Makefile none/tests/scripts/Makefile none/tests/amd64/Makefile none/tests/ppc32/Makefile none/tests/ppc64/Makefile none/tests/x86/Makefile none/tests/arm/Makefile none/tests/arm64/Makefile none/tests/s390x/Makefile none/tests/mips32/Makefile none/tests/mips64/Makefile none/tests/nanomips/Makefile none/tests/loongarch64/Makefile none/tests/linux/Makefile none/tests/darwin/Makefile none/tests/solaris/Makefile none/tests/amd64-linux/Makefile none/tests/x86-linux/Makefile none/tests/amd64-darwin/Makefile none/tests/x86-darwin/Makefile none/tests/amd64-solaris/Makefile none/tests/x86-solaris/Makefile exp-bbv/Makefile exp-bbv/tests/Makefile exp-bbv/tests/x86/Makefile exp-bbv/tests/x86-linux/Makefile exp-bbv/tests/amd64-linux/Makefile exp-bbv/tests/ppc32-linux/Makefile exp-bbv/tests/arm-linux/Makefile shared/Makefile solaris/Makefile" +-ac_config_files="$ac_config_files Makefile VEX/Makefile:Makefile.vex.in valgrind.spec valgrind.pc glibc-2.X.supp glibc-2.X-helgrind.supp glibc-2.X-drd.supp include/valgrind.h docs/Makefile docs/xml/vg-entities.xml tests/Makefile tests/vg_regtest perf/Makefile perf/vg_perf gdbserver_tests/Makefile gdbserver_tests/solaris/Makefile include/Makefile auxprogs/Makefile mpi/Makefile coregrind/Makefile memcheck/Makefile memcheck/tests/Makefile memcheck/tests/common/Makefile memcheck/tests/amd64/Makefile memcheck/tests/x86/Makefile memcheck/tests/linux/Makefile memcheck/tests/linux/debuginfod-check.vgtest memcheck/tests/darwin/Makefile memcheck/tests/solaris/Makefile memcheck/tests/freebsd/Makefile memcheck/tests/amd64-linux/Makefile memcheck/tests/arm64-linux/Makefile memcheck/tests/x86-linux/Makefile memcheck/tests/amd64-solaris/Makefile memcheck/tests/x86-solaris/Makefile memcheck/tests/amd64-freebsd/Makefile memcheck/tests/x86-freebsd/Makefile memcheck/tests/ppc32/Makefile memcheck/tests/ppc64/Makefile memcheck/tests/s390x/Makefile memcheck/tests/mips32/Makefile memcheck/tests/mips64/Makefile memcheck/tests/vbit-test/Makefile cachegrind/Makefile cachegrind/tests/Makefile cachegrind/tests/x86/Makefile cachegrind/cg_annotate cachegrind/cg_diff cachegrind/cg_merge callgrind/Makefile callgrind/callgrind_annotate callgrind/callgrind_control callgrind/tests/Makefile helgrind/Makefile helgrind/tests/Makefile drd/Makefile drd/scripts/download-and-build-splash2 drd/tests/Makefile massif/Makefile massif/tests/Makefile massif/ms_print dhat/Makefile dhat/tests/Makefile lackey/Makefile lackey/tests/Makefile none/Makefile none/tests/Makefile none/tests/scripts/Makefile none/tests/amd64/Makefile none/tests/ppc32/Makefile none/tests/ppc64/Makefile none/tests/x86/Makefile none/tests/arm/Makefile none/tests/arm64/Makefile none/tests/s390x/Makefile none/tests/mips32/Makefile none/tests/mips64/Makefile none/tests/nanomips/Makefile none/tests/linux/Makefile none/tests/darwin/Makefile none/tests/solaris/Makefile none/tests/freebsd/Makefile none/tests/amd64-linux/Makefile none/tests/x86-linux/Makefile none/tests/amd64-darwin/Makefile none/tests/x86-darwin/Makefile none/tests/amd64-solaris/Makefile none/tests/x86-solaris/Makefile none/tests/x86-freebsd/Makefile exp-bbv/Makefile exp-bbv/tests/Makefile exp-bbv/tests/x86/Makefile exp-bbv/tests/x86-linux/Makefile exp-bbv/tests/amd64-linux/Makefile exp-bbv/tests/ppc32-linux/Makefile exp-bbv/tests/arm-linux/Makefile shared/Makefile solaris/Makefile" ++ac_config_files="$ac_config_files Makefile VEX/Makefile:Makefile.vex.in valgrind.spec valgrind.pc glibc-2.X.supp glibc-2.X-helgrind.supp glibc-2.X-drd.supp include/valgrind.h docs/Makefile docs/xml/vg-entities.xml tests/Makefile tests/vg_regtest perf/Makefile perf/vg_perf gdbserver_tests/Makefile gdbserver_tests/solaris/Makefile include/Makefile auxprogs/Makefile mpi/Makefile coregrind/Makefile memcheck/Makefile memcheck/tests/Makefile memcheck/tests/common/Makefile memcheck/tests/amd64/Makefile memcheck/tests/x86/Makefile memcheck/tests/linux/Makefile memcheck/tests/linux/debuginfod-check.vgtest memcheck/tests/darwin/Makefile memcheck/tests/solaris/Makefile memcheck/tests/freebsd/Makefile memcheck/tests/amd64-linux/Makefile memcheck/tests/arm64-linux/Makefile memcheck/tests/x86-linux/Makefile memcheck/tests/loongarch64-linux/Makefile memcheck/tests/amd64-solaris/Makefile memcheck/tests/x86-solaris/Makefile memcheck/tests/amd64-freebsd/Makefile memcheck/tests/x86-freebsd/Makefile memcheck/tests/ppc32/Makefile memcheck/tests/ppc64/Makefile memcheck/tests/s390x/Makefile memcheck/tests/mips32/Makefile memcheck/tests/mips64/Makefile memcheck/tests/vbit-test/Makefile cachegrind/Makefile cachegrind/tests/Makefile cachegrind/tests/x86/Makefile cachegrind/cg_annotate cachegrind/cg_diff cachegrind/cg_merge callgrind/Makefile callgrind/callgrind_annotate callgrind/callgrind_control callgrind/tests/Makefile helgrind/Makefile helgrind/tests/Makefile drd/Makefile drd/scripts/download-and-build-splash2 drd/tests/Makefile massif/Makefile massif/tests/Makefile massif/ms_print dhat/Makefile dhat/tests/Makefile lackey/Makefile lackey/tests/Makefile none/Makefile none/tests/Makefile none/tests/scripts/Makefile none/tests/amd64/Makefile none/tests/ppc32/Makefile none/tests/ppc64/Makefile none/tests/x86/Makefile none/tests/arm/Makefile none/tests/arm64/Makefile none/tests/s390x/Makefile none/tests/mips32/Makefile none/tests/mips64/Makefile none/tests/nanomips/Makefile none/tests/loongarch64/Makefile none/tests/linux/Makefile none/tests/darwin/Makefile none/tests/solaris/Makefile none/tests/freebsd/Makefile none/tests/amd64-linux/Makefile none/tests/x86-linux/Makefile none/tests/amd64-darwin/Makefile none/tests/x86-darwin/Makefile none/tests/amd64-solaris/Makefile none/tests/x86-solaris/Makefile none/tests/x86-freebsd/Makefile exp-bbv/Makefile exp-bbv/tests/Makefile exp-bbv/tests/x86/Makefile exp-bbv/tests/x86-linux/Makefile exp-bbv/tests/amd64-linux/Makefile exp-bbv/tests/ppc32-linux/Makefile exp-bbv/tests/arm-linux/Makefile shared/Makefile solaris/Makefile" ac_config_files="$ac_config_files coregrind/link_tool_exe_linux" -@@ -16017,8 +17145,8 @@ _ACEOF - case $ac_val in #( - *${as_nl}*) - case $ac_var in #( -- *_cv_*) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: cache variable $ac_var contains a newline" >&5 --$as_echo "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;; -+ *_cv_*) { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: cache variable $ac_var contains a newline" >&5 -+printf "%s\n" "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;; - esac - case $ac_var in #( - _ | IFS | as_nl) ;; #( -@@ -16048,15 +17176,15 @@ $as_echo "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;; - /^ac_cv_env_/b end - t clear - :clear -- s/^\([^=]*\)=\(.*[{}].*\)$/test "${\1+set}" = set || &/ -+ s/^\([^=]*\)=\(.*[{}].*\)$/test ${\1+y} || &/ - t end - s/^\([^=]*\)=\(.*\)$/\1=${\1=\2}/ - :end' >>confcache - if diff "$cache_file" confcache >/dev/null 2>&1; then :; else - if test -w "$cache_file"; then - if test "x$cache_file" != "x/dev/null"; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: updating cache $cache_file" >&5 --$as_echo "$as_me: updating cache $cache_file" >&6;} -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: updating cache $cache_file" >&5 -+printf "%s\n" "$as_me: updating cache $cache_file" >&6;} - if test ! -f "$cache_file" || test -h "$cache_file"; then - cat confcache >"$cache_file" - else -@@ -16070,8 +17198,8 @@ $as_echo "$as_me: updating cache $cache_file" >&6;} - fi - fi - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: not updating unwritable cache $cache_file" >&5 --$as_echo "$as_me: not updating unwritable cache $cache_file" >&6;} -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: not updating unwritable cache $cache_file" >&5 -+printf "%s\n" "$as_me: not updating unwritable cache $cache_file" >&6;} - fi - fi - rm -f confcache -@@ -16088,7 +17216,7 @@ U= - for ac_i in : $LIBOBJS; do test "x$ac_i" = x: && continue - # 1. Remove the extension, and $U if already installed. - ac_script='s/\$U\././;s/\.o$//;s/\.obj$//' -- ac_i=`$as_echo "$ac_i" | sed "$ac_script"` -+ ac_i=`printf "%s\n" "$ac_i" | sed "$ac_script"` - # 2. Prepend LIBOBJDIR. When used with automake>=1.10 LIBOBJDIR - # will be set to the directory where LIBOBJS objects are built. - as_fn_append ac_libobjs " \${LIBOBJDIR}$ac_i\$U.$ac_objext" -@@ -16099,14 +17227,14 @@ LIBOBJS=$ac_libobjs - LTLIBOBJS=$ac_ltlibobjs - - --{ $as_echo "$as_me:${as_lineno-$LINENO}: checking that generated files are newer than configure" >&5 --$as_echo_n "checking that generated files are newer than configure... " >&6; } -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking that generated files are newer than configure" >&5 -+printf %s "checking that generated files are newer than configure... " >&6; } - if test -n "$am_sleep_pid"; then - # Hide warnings about reused PIDs. - wait $am_sleep_pid 2>/dev/null - fi -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: done" >&5 --$as_echo "done" >&6; } -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: done" >&5 -+printf "%s\n" "done" >&6; } - if test -n "$EXEEXT"; then - am__EXEEXT_TRUE= - am__EXEEXT_FALSE='#' -@@ -16183,6 +17311,10 @@ if test -z "${VGCONF_ARCHS_INCLUDE_NANOMIPS_TRUE}" && test -z "${VGCONF_ARCHS_IN +@@ -19450,6 +19490,10 @@ if test -z "${VGCONF_ARCHS_INCLUDE_NANOMIPS_TRUE}" && test -z "${VGCONF_ARCHS_IN as_fn_error $? "conditional \"VGCONF_ARCHS_INCLUDE_NANOMIPS\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi @@ -39594,7 +24055,7 @@ index ce987b6..00a2719 100755 if test -z "${VGCONF_PLATFORMS_INCLUDE_X86_LINUX_TRUE}" && test -z "${VGCONF_PLATFORMS_INCLUDE_X86_LINUX_FALSE}"; then as_fn_error $? "conditional \"VGCONF_PLATFORMS_INCLUDE_X86_LINUX\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 -@@ -16227,6 +17359,10 @@ if test -z "${VGCONF_PLATFORMS_INCLUDE_NANOMIPS_LINUX_TRUE}" && test -z "${VGCON +@@ -19494,6 +19538,10 @@ if test -z "${VGCONF_PLATFORMS_INCLUDE_NANOMIPS_LINUX_TRUE}" && test -z "${VGCON as_fn_error $? "conditional \"VGCONF_PLATFORMS_INCLUDE_NANOMIPS_LINUX\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi @@ -39602,382 +24063,18 @@ index ce987b6..00a2719 100755 + as_fn_error $? "conditional \"VGCONF_PLATFORMS_INCLUDE_LOONGARCH64_LINUX\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi - if test -z "${VGCONF_PLATFORMS_INCLUDE_X86_DARWIN_TRUE}" && test -z "${VGCONF_PLATFORMS_INCLUDE_X86_DARWIN_FALSE}"; then - as_fn_error $? "conditional \"VGCONF_PLATFORMS_INCLUDE_X86_DARWIN\" was never defined. + if test -z "${VGCONF_PLATFORMS_INCLUDE_X86_FREEBSD_TRUE}" && test -z "${VGCONF_PLATFORMS_INCLUDE_X86_FREEBSD_FALSE}"; then + as_fn_error $? "conditional \"VGCONF_PLATFORMS_INCLUDE_X86_FREEBSD\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 -@@ -16748,8 +17884,8 @@ fi - ac_write_fail=0 - ac_clean_files_save=$ac_clean_files - ac_clean_files="$ac_clean_files $CONFIG_STATUS" --{ $as_echo "$as_me:${as_lineno-$LINENO}: creating $CONFIG_STATUS" >&5 --$as_echo "$as_me: creating $CONFIG_STATUS" >&6;} -+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: creating $CONFIG_STATUS" >&5 -+printf "%s\n" "$as_me: creating $CONFIG_STATUS" >&6;} - as_write_fail=0 - cat >$CONFIG_STATUS <<_ASEOF || as_write_fail=1 - #! $SHELL -@@ -16772,14 +17908,16 @@ cat >>$CONFIG_STATUS <<\_ASEOF || as_write_fail=1 - - # Be more Bourne compatible - DUALCASE=1; export DUALCASE # for MKS sh --if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then : -+as_nop=: -+if test ${ZSH_VERSION+y} && (emulate sh) >/dev/null 2>&1 -+then : - emulate sh - NULLCMD=: - # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which - # is contrary to our usage. Disable this feature. - alias -g '${1+"$@"}'='"$@"' - setopt NO_GLOB_SUBST --else -+else $as_nop - case `(set -o) 2>/dev/null` in #( - *posix*) : - set -o posix ;; #( -@@ -16789,46 +17927,46 @@ esac - fi - - -+ -+# Reset variables that may have inherited troublesome values from -+# the environment. -+ -+# IFS needs to be set, to space, tab, and newline, in precisely that order. -+# (If _AS_PATH_WALK were called with IFS unset, it would have the -+# side effect of setting IFS to empty, thus disabling word splitting.) -+# Quoting is to prevent editors from complaining about space-tab. - as_nl=' - ' - export as_nl --# Printing a long string crashes Solaris 7 /usr/bin/printf. --as_echo='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\' --as_echo=$as_echo$as_echo$as_echo$as_echo$as_echo --as_echo=$as_echo$as_echo$as_echo$as_echo$as_echo$as_echo --# Prefer a ksh shell builtin over an external printf program on Solaris, --# but without wasting forks for bash or zsh. --if test -z "$BASH_VERSION$ZSH_VERSION" \ -- && (test "X`print -r -- $as_echo`" = "X$as_echo") 2>/dev/null; then -- as_echo='print -r --' -- as_echo_n='print -rn --' --elif (test "X`printf %s $as_echo`" = "X$as_echo") 2>/dev/null; then -- as_echo='printf %s\n' -- as_echo_n='printf %s' --else -- if test "X`(/usr/ucb/echo -n -n $as_echo) 2>/dev/null`" = "X-n $as_echo"; then -- as_echo_body='eval /usr/ucb/echo -n "$1$as_nl"' -- as_echo_n='/usr/ucb/echo -n' -- else -- as_echo_body='eval expr "X$1" : "X\\(.*\\)"' -- as_echo_n_body='eval -- arg=$1; -- case $arg in #( -- *"$as_nl"*) -- expr "X$arg" : "X\\(.*\\)$as_nl"; -- arg=`expr "X$arg" : ".*$as_nl\\(.*\\)"`;; -- esac; -- expr "X$arg" : "X\\(.*\\)" | tr -d "$as_nl" -- ' -- export as_echo_n_body -- as_echo_n='sh -c $as_echo_n_body as_echo' -- fi -- export as_echo_body -- as_echo='sh -c $as_echo_body as_echo' --fi -+IFS=" "" $as_nl" -+ -+PS1='$ ' -+PS2='> ' -+PS4='+ ' -+ -+# Ensure predictable behavior from utilities with locale-dependent output. -+LC_ALL=C -+export LC_ALL -+LANGUAGE=C -+export LANGUAGE -+ -+# We cannot yet rely on "unset" to work, but we need these variables -+# to be unset--not just set to an empty or harmless value--now, to -+# avoid bugs in old shells (e.g. pre-3.0 UWIN ksh). This construct -+# also avoids known problems related to "unset" and subshell syntax -+# in other old shells (e.g. bash 2.01 and pdksh 5.2.14). -+for as_var in BASH_ENV ENV MAIL MAILPATH CDPATH -+do eval test \${$as_var+y} \ -+ && ( (unset $as_var) || exit 1) >/dev/null 2>&1 && unset $as_var || : -+done -+ -+# Ensure that fds 0, 1, and 2 are open. -+if (exec 3>&0) 2>/dev/null; then :; else exec 0&1) 2>/dev/null; then :; else exec 1>/dev/null; fi -+if (exec 3>&2) ; then :; else exec 2>/dev/null; fi - - # The user is always right. --if test "${PATH_SEPARATOR+set}" != set; then -+if ${PATH_SEPARATOR+false} :; then - PATH_SEPARATOR=: - (PATH='/bin;/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 && { - (PATH='/bin:/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 || -@@ -16837,13 +17975,6 @@ if test "${PATH_SEPARATOR+set}" != set; then - fi - - --# IFS --# We need space, tab and new line, in precisely that order. Quoting is --# there to prevent editors from complaining about space-tab. --# (If _AS_PATH_WALK were called with IFS unset, it would disable word --# splitting by setting IFS to empty value.) --IFS=" "" $as_nl" -- - # Find who we are. Look in the path if we contain no directory separator. - as_myself= - case $0 in #(( -@@ -16852,8 +17983,12 @@ case $0 in #(( - for as_dir in $PATH - do - IFS=$as_save_IFS -- test -z "$as_dir" && as_dir=. -- test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break -+ case $as_dir in #((( -+ '') as_dir=./ ;; -+ */) ;; -+ *) as_dir=$as_dir/ ;; -+ esac -+ test -r "$as_dir$0" && as_myself=$as_dir$0 && break - done - IFS=$as_save_IFS - -@@ -16865,30 +18000,10 @@ if test "x$as_myself" = x; then - as_myself=$0 - fi - if test ! -f "$as_myself"; then -- $as_echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2 -+ printf "%s\n" "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2 - exit 1 - fi - --# Unset variables that we do not need and which cause bugs (e.g. in --# pre-3.0 UWIN ksh). But do not cause bugs in bash 2.01; the "|| exit 1" --# suppresses any "Segmentation fault" message there. '((' could --# trigger a bug in pdksh 5.2.14. --for as_var in BASH_ENV ENV MAIL MAILPATH --do eval test x\${$as_var+set} = xset \ -- && ( (unset $as_var) || exit 1) >/dev/null 2>&1 && unset $as_var || : --done --PS1='$ ' --PS2='> ' --PS4='+ ' -- --# NLS nuisances. --LC_ALL=C --export LC_ALL --LANGUAGE=C --export LANGUAGE -- --# CDPATH. --(unset CDPATH) >/dev/null 2>&1 && unset CDPATH - - - # as_fn_error STATUS ERROR [LINENO LOG_FD] -@@ -16901,13 +18016,14 @@ as_fn_error () - as_status=$1; test $as_status -eq 0 && as_status=1 - if test "$4"; then - as_lineno=${as_lineno-"$3"} as_lineno_stack=as_lineno_stack=$as_lineno_stack -- $as_echo "$as_me:${as_lineno-$LINENO}: error: $2" >&$4 -+ printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: $2" >&$4 - fi -- $as_echo "$as_me: error: $2" >&2 -+ printf "%s\n" "$as_me: error: $2" >&2 - as_fn_exit $as_status - } # as_fn_error - - -+ - # as_fn_set_status STATUS - # ----------------------- - # Set $? to STATUS, without forking. -@@ -16934,18 +18050,20 @@ as_fn_unset () - { eval $1=; unset $1;} - } - as_unset=as_fn_unset -+ - # as_fn_append VAR VALUE - # ---------------------- - # Append the text in VALUE to the end of the definition contained in VAR. Take - # advantage of any shell optimizations that allow amortized linear growth over - # repeated appends, instead of the typical quadratic growth present in naive - # implementations. --if (eval "as_var=1; as_var+=2; test x\$as_var = x12") 2>/dev/null; then : -+if (eval "as_var=1; as_var+=2; test x\$as_var = x12") 2>/dev/null -+then : - eval 'as_fn_append () - { - eval $1+=\$2 - }' --else -+else $as_nop - as_fn_append () - { - eval $1=\$$1\$2 -@@ -16957,12 +18075,13 @@ fi # as_fn_append - # Perform arithmetic evaluation on the ARGs, and store the result in the - # global $as_val. Take advantage of shells that can avoid forks. The arguments - # must be portable across $(()) and expr. --if (eval "test \$(( 1 + 1 )) = 2") 2>/dev/null; then : -+if (eval "test \$(( 1 + 1 )) = 2") 2>/dev/null -+then : - eval 'as_fn_arith () - { - as_val=$(( $* )) - }' --else -+else $as_nop - as_fn_arith () - { - as_val=`expr "$@" || test $? -eq 1` -@@ -16993,7 +18112,7 @@ as_me=`$as_basename -- "$0" || - $as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \ - X"$0" : 'X\(//\)$' \| \ - X"$0" : 'X\(/\)' \| . 2>/dev/null || --$as_echo X/"$0" | -+printf "%s\n" X/"$0" | - sed '/^.*\/\([^/][^/]*\)\/*$/{ - s//\1/ - q -@@ -17015,6 +18134,10 @@ as_cr_Letters=$as_cr_letters$as_cr_LETTERS - as_cr_digits='0123456789' - as_cr_alnum=$as_cr_Letters$as_cr_digits - -+ -+# Determine whether it's possible to make 'echo' print without a newline. -+# These variables are no longer used directly by Autoconf, but are AC_SUBSTed -+# for compatibility with existing Makefiles. - ECHO_C= ECHO_N= ECHO_T= - case `echo -n x` in #((((( - -n*) -@@ -17028,6 +18151,12 @@ case `echo -n x` in #((((( - ECHO_N='-n';; - esac - -+# For backward compatibility with old third-party macros, we provide -+# the shell variables $as_echo and $as_echo_n. New code should use -+# AS_ECHO(["message"]) and AS_ECHO_N(["message"]), respectively. -+as_echo='printf %s\n' -+as_echo_n='printf %s' -+ - rm -f conf$$ conf$$.exe conf$$.file - if test -d conf$$.dir; then - rm -f conf$$.dir/conf$$.file -@@ -17069,7 +18198,7 @@ as_fn_mkdir_p () - as_dirs= - while :; do - case $as_dir in #( -- *\'*) as_qdir=`$as_echo "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #'( -+ *\'*) as_qdir=`printf "%s\n" "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #'( - *) as_qdir=$as_dir;; - esac - as_dirs="'$as_qdir' $as_dirs" -@@ -17078,7 +18207,7 @@ $as_expr X"$as_dir" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ - X"$as_dir" : 'X\(//\)[^/]' \| \ - X"$as_dir" : 'X\(//\)$' \| \ - X"$as_dir" : 'X\(/\)' \| . 2>/dev/null || --$as_echo X"$as_dir" | -+printf "%s\n" X"$as_dir" | - sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ - s//\1/ - q -@@ -17141,7 +18270,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 - # values after options handling. - ac_log=" - This file was extended by Valgrind $as_me 3.16.0, which was --generated by GNU Autoconf 2.69. Invocation command line was -+generated by GNU Autoconf 2.71. Invocation command line was - - CONFIG_FILES = $CONFIG_FILES - CONFIG_HEADERS = $CONFIG_HEADERS -@@ -17203,14 +18332,16 @@ $config_commands - Report bugs to ." - - _ACEOF -+ac_cs_config=`printf "%s\n" "$ac_configure_args" | sed "$ac_safe_unquote"` -+ac_cs_config_escaped=`printf "%s\n" "$ac_cs_config" | sed "s/^ //; s/'/'\\\\\\\\''/g"` - cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 --ac_cs_config="`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`" -+ac_cs_config='$ac_cs_config_escaped' - ac_cs_version="\\ - Valgrind config.status 3.16.0 --configured by $0, generated by GNU Autoconf 2.69, -+configured by $0, generated by GNU Autoconf 2.71, - with options \\"\$ac_cs_config\\" - --Copyright (C) 2012 Free Software Foundation, Inc. -+Copyright (C) 2021 Free Software Foundation, Inc. - This config.status script is free software; the Free Software Foundation - gives unlimited permission to copy, distribute and modify it." - -@@ -17250,15 +18381,15 @@ do - -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r) - ac_cs_recheck=: ;; - --version | --versio | --versi | --vers | --ver | --ve | --v | -V ) -- $as_echo "$ac_cs_version"; exit ;; -+ printf "%s\n" "$ac_cs_version"; exit ;; - --config | --confi | --conf | --con | --co | --c ) -- $as_echo "$ac_cs_config"; exit ;; -+ printf "%s\n" "$ac_cs_config"; exit ;; - --debug | --debu | --deb | --de | --d | -d ) - debug=: ;; - --file | --fil | --fi | --f ) - $ac_shift - case $ac_optarg in -- *\'*) ac_optarg=`$as_echo "$ac_optarg" | sed "s/'/'\\\\\\\\''/g"` ;; -+ *\'*) ac_optarg=`printf "%s\n" "$ac_optarg" | sed "s/'/'\\\\\\\\''/g"` ;; - '') as_fn_error $? "missing file argument" ;; - esac - as_fn_append CONFIG_FILES " '$ac_optarg'" -@@ -17266,7 +18397,7 @@ do - --header | --heade | --head | --hea ) - $ac_shift - case $ac_optarg in -- *\'*) ac_optarg=`$as_echo "$ac_optarg" | sed "s/'/'\\\\\\\\''/g"` ;; -+ *\'*) ac_optarg=`printf "%s\n" "$ac_optarg" | sed "s/'/'\\\\\\\\''/g"` ;; - esac - as_fn_append CONFIG_HEADERS " '$ac_optarg'" - ac_need_defaults=false;; -@@ -17275,7 +18406,7 @@ do - as_fn_error $? "ambiguous option: \`$1' - Try \`$0 --help' for more information.";; - --help | --hel | -h ) -- $as_echo "$ac_cs_usage"; exit ;; -+ printf "%s\n" "$ac_cs_usage"; exit ;; - -q | -quiet | --quiet | --quie | --qui | --qu | --q \ - | -silent | --silent | --silen | --sile | --sil | --si | --s) - ac_cs_silent=: ;; -@@ -17303,7 +18434,7 @@ cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 - if \$ac_cs_recheck; then - set X $SHELL '$0' $ac_configure_args \$ac_configure_extra_args --no-create --no-recursion - shift -- \$as_echo "running CONFIG_SHELL=$SHELL \$*" >&6 -+ \printf "%s\n" "running CONFIG_SHELL=$SHELL \$*" >&6 - CONFIG_SHELL='$SHELL' - export CONFIG_SHELL - exec "\$@" -@@ -17317,7 +18448,7 @@ exec 5>>config.log - sed 'h;s/./-/g;s/^.../## /;s/...$/ ##/;p;x;p;x' <<_ASBOX - ## Running $as_me. ## - _ASBOX -- $as_echo "$ac_log" -+ printf "%s\n" "$ac_log" - } >&5 - - _ACEOF -@@ -17364,6 +18495,7 @@ do +@@ -20752,6 +20800,7 @@ do "memcheck/tests/amd64-linux/Makefile") CONFIG_FILES="$CONFIG_FILES memcheck/tests/amd64-linux/Makefile" ;; "memcheck/tests/arm64-linux/Makefile") CONFIG_FILES="$CONFIG_FILES memcheck/tests/arm64-linux/Makefile" ;; "memcheck/tests/x86-linux/Makefile") CONFIG_FILES="$CONFIG_FILES memcheck/tests/x86-linux/Makefile" ;; + "memcheck/tests/loongarch64-linux/Makefile") CONFIG_FILES="$CONFIG_FILES memcheck/tests/loongarch64-linux/Makefile" ;; "memcheck/tests/amd64-solaris/Makefile") CONFIG_FILES="$CONFIG_FILES memcheck/tests/amd64-solaris/Makefile" ;; "memcheck/tests/x86-solaris/Makefile") CONFIG_FILES="$CONFIG_FILES memcheck/tests/x86-solaris/Makefile" ;; - "memcheck/tests/ppc32/Makefile") CONFIG_FILES="$CONFIG_FILES memcheck/tests/ppc32/Makefile" ;; -@@ -17406,6 +18538,7 @@ do + "memcheck/tests/amd64-freebsd/Makefile") CONFIG_FILES="$CONFIG_FILES memcheck/tests/amd64-freebsd/Makefile" ;; +@@ -20797,6 +20846,7 @@ do "none/tests/mips32/Makefile") CONFIG_FILES="$CONFIG_FILES none/tests/mips32/Makefile" ;; "none/tests/mips64/Makefile") CONFIG_FILES="$CONFIG_FILES none/tests/mips64/Makefile" ;; "none/tests/nanomips/Makefile") CONFIG_FILES="$CONFIG_FILES none/tests/nanomips/Makefile" ;; @@ -39985,203 +24082,11 @@ index ce987b6..00a2719 100755 "none/tests/linux/Makefile") CONFIG_FILES="$CONFIG_FILES none/tests/linux/Makefile" ;; "none/tests/darwin/Makefile") CONFIG_FILES="$CONFIG_FILES none/tests/darwin/Makefile" ;; "none/tests/solaris/Makefile") CONFIG_FILES="$CONFIG_FILES none/tests/solaris/Makefile" ;; -@@ -17438,9 +18571,9 @@ done - # We use the long form for the default assignment because of an extremely - # bizarre bug on SunOS 4.1.3. - if $ac_need_defaults; then -- test "${CONFIG_FILES+set}" = set || CONFIG_FILES=$config_files -- test "${CONFIG_HEADERS+set}" = set || CONFIG_HEADERS=$config_headers -- test "${CONFIG_COMMANDS+set}" = set || CONFIG_COMMANDS=$config_commands -+ test ${CONFIG_FILES+y} || CONFIG_FILES=$config_files -+ test ${CONFIG_HEADERS+y} || CONFIG_HEADERS=$config_headers -+ test ${CONFIG_COMMANDS+y} || CONFIG_COMMANDS=$config_commands - fi - - # Have a temporary directory for convenience. Make it in the build tree -@@ -17776,7 +18909,7 @@ do - esac || - as_fn_error 1 "cannot find input file: \`$ac_f'" "$LINENO" 5;; - esac -- case $ac_f in *\'*) ac_f=`$as_echo "$ac_f" | sed "s/'/'\\\\\\\\''/g"`;; esac -+ case $ac_f in *\'*) ac_f=`printf "%s\n" "$ac_f" | sed "s/'/'\\\\\\\\''/g"`;; esac - as_fn_append ac_file_inputs " '$ac_f'" - done - -@@ -17784,17 +18917,17 @@ do - # use $as_me), people would be surprised to read: - # /* config.h. Generated by config.status. */ - configure_input='Generated from '` -- $as_echo "$*" | sed 's|^[^:]*/||;s|:[^:]*/|, |g' -+ printf "%s\n" "$*" | sed 's|^[^:]*/||;s|:[^:]*/|, |g' - `' by configure.' - if test x"$ac_file" != x-; then - configure_input="$ac_file. $configure_input" -- { $as_echo "$as_me:${as_lineno-$LINENO}: creating $ac_file" >&5 --$as_echo "$as_me: creating $ac_file" >&6;} -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: creating $ac_file" >&5 -+printf "%s\n" "$as_me: creating $ac_file" >&6;} - fi - # Neutralize special characters interpreted by sed in replacement strings. - case $configure_input in #( - *\&* | *\|* | *\\* ) -- ac_sed_conf_input=`$as_echo "$configure_input" | -+ ac_sed_conf_input=`printf "%s\n" "$configure_input" | - sed 's/[\\\\&|]/\\\\&/g'`;; #( - *) ac_sed_conf_input=$configure_input;; - esac -@@ -17811,7 +18944,7 @@ $as_expr X"$ac_file" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ - X"$ac_file" : 'X\(//\)[^/]' \| \ - X"$ac_file" : 'X\(//\)$' \| \ - X"$ac_file" : 'X\(/\)' \| . 2>/dev/null || --$as_echo X"$ac_file" | -+printf "%s\n" X"$ac_file" | - sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ - s//\1/ - q -@@ -17835,9 +18968,9 @@ $as_echo X"$ac_file" | - case "$ac_dir" in - .) ac_dir_suffix= ac_top_builddir_sub=. ac_top_build_prefix= ;; - *) -- ac_dir_suffix=/`$as_echo "$ac_dir" | sed 's|^\.[\\/]||'` -+ ac_dir_suffix=/`printf "%s\n" "$ac_dir" | sed 's|^\.[\\/]||'` - # A ".." for each directory in $ac_dir_suffix. -- ac_top_builddir_sub=`$as_echo "$ac_dir_suffix" | sed 's|/[^\\/]*|/..|g;s|/||'` -+ ac_top_builddir_sub=`printf "%s\n" "$ac_dir_suffix" | sed 's|/[^\\/]*|/..|g;s|/||'` - case $ac_top_builddir_sub in - "") ac_top_builddir_sub=. ac_top_build_prefix= ;; - *) ac_top_build_prefix=$ac_top_builddir_sub/ ;; -@@ -17899,8 +19032,8 @@ ac_sed_dataroot=' - case `eval "sed -n \"\$ac_sed_dataroot\" $ac_file_inputs"` in - *datarootdir*) ac_datarootdir_seen=yes;; - *@datadir@*|*@docdir@*|*@infodir@*|*@localedir@*|*@mandir@*) -- { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&5 --$as_echo "$as_me: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&2;} -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&5 -+printf "%s\n" "$as_me: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&2;} - _ACEOF - cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 - ac_datarootdir_hack=' -@@ -17944,9 +19077,9 @@ test -z "$ac_datarootdir_hack$ac_datarootdir_seen" && - { ac_out=`sed -n '/\${datarootdir}/p' "$ac_tmp/out"`; test -n "$ac_out"; } && - { ac_out=`sed -n '/^[ ]*datarootdir[ ]*:*=/p' \ - "$ac_tmp/out"`; test -z "$ac_out"; } && -- { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: $ac_file contains a reference to the variable \`datarootdir' -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: $ac_file contains a reference to the variable \`datarootdir' - which seems to be undefined. Please make sure it is defined" >&5 --$as_echo "$as_me: WARNING: $ac_file contains a reference to the variable \`datarootdir' -+printf "%s\n" "$as_me: WARNING: $ac_file contains a reference to the variable \`datarootdir' - which seems to be undefined. Please make sure it is defined" >&2;} - - rm -f "$ac_tmp/stdin" -@@ -17962,20 +19095,20 @@ which seems to be undefined. Please make sure it is defined" >&2;} - # - if test x"$ac_file" != x-; then - { -- $as_echo "/* $configure_input */" \ -+ printf "%s\n" "/* $configure_input */" >&1 \ - && eval '$AWK -f "$ac_tmp/defines.awk"' "$ac_file_inputs" - } >"$ac_tmp/config.h" \ - || as_fn_error $? "could not create $ac_file" "$LINENO" 5 - if diff "$ac_file" "$ac_tmp/config.h" >/dev/null 2>&1; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: $ac_file is unchanged" >&5 --$as_echo "$as_me: $ac_file is unchanged" >&6;} -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: $ac_file is unchanged" >&5 -+printf "%s\n" "$as_me: $ac_file is unchanged" >&6;} - else - rm -f "$ac_file" - mv "$ac_tmp/config.h" "$ac_file" \ - || as_fn_error $? "could not create $ac_file" "$LINENO" 5 - fi - else -- $as_echo "/* $configure_input */" \ -+ printf "%s\n" "/* $configure_input */" >&1 \ - && eval '$AWK -f "$ac_tmp/defines.awk"' "$ac_file_inputs" \ - || as_fn_error $? "could not create -" "$LINENO" 5 - fi -@@ -17995,7 +19128,7 @@ $as_expr X"$_am_arg" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ - X"$_am_arg" : 'X\(//\)[^/]' \| \ - X"$_am_arg" : 'X\(//\)$' \| \ - X"$_am_arg" : 'X\(/\)' \| . 2>/dev/null || --$as_echo X"$_am_arg" | -+printf "%s\n" X"$_am_arg" | - sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ - s//\1/ - q -@@ -18015,8 +19148,8 @@ $as_echo X"$_am_arg" | - s/.*/./; q'`/stamp-h$_am_stamp_count - ;; - -- :C) { $as_echo "$as_me:${as_lineno-$LINENO}: executing $ac_file commands" >&5 --$as_echo "$as_me: executing $ac_file commands" >&6;} -+ :C) { printf "%s\n" "$as_me:${as_lineno-$LINENO}: executing $ac_file commands" >&5 -+printf "%s\n" "$as_me: executing $ac_file commands" >&6;} - ;; - esac - -@@ -18042,7 +19175,7 @@ esac - for am_mf - do - # Strip MF so we end up with the name of the file. -- am_mf=`$as_echo "$am_mf" | sed -e 's/:.*$//'` -+ am_mf=`printf "%s\n" "$am_mf" | sed -e 's/:.*$//'` - # Check whether this is an Automake generated Makefile which includes - # dependency-tracking related rules and includes. - # Grep'ing the whole file directly is not great: AIX grep has a line -@@ -18054,7 +19187,7 @@ $as_expr X"$am_mf" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ - X"$am_mf" : 'X\(//\)[^/]' \| \ - X"$am_mf" : 'X\(//\)$' \| \ - X"$am_mf" : 'X\(/\)' \| . 2>/dev/null || --$as_echo X"$am_mf" | -+printf "%s\n" X"$am_mf" | - sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ - s//\1/ - q -@@ -18076,7 +19209,7 @@ $as_echo X"$am_mf" | - $as_expr X/"$am_mf" : '.*/\([^/][^/]*\)/*$' \| \ - X"$am_mf" : 'X\(//\)$' \| \ - X"$am_mf" : 'X\(/\)' \| . 2>/dev/null || --$as_echo X/"$am_mf" | -+printf "%s\n" X/"$am_mf" | - sed '/^.*\/\([^/][^/]*\)\/*$/{ - s//\1/ - q -@@ -18101,10 +19234,12 @@ $as_echo X/"$am_mf" | - (exit $ac_status); } || am_rc=$? - done - if test $am_rc -ne 0; then -- { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 --$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -+ { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -+printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} - as_fn_error $? "Something went wrong bootstrapping makefile fragments -- for automatic dependency tracking. Try re-running configure with the -+ for automatic dependency tracking. If GNU make was not used, consider -+ re-running the configure script with MAKE=\"gmake\" (or whatever is -+ necessary). You can also try re-running configure with the - '--disable-dependency-tracking' option to at least be able to build - the package (albeit without support for automatic dependency tracking). - See \`config.log' for more details" "$LINENO" 5; } -@@ -18153,8 +19288,8 @@ if test "$no_create" != yes; then - $ac_cs_success || as_fn_exit 1 - fi - if test -n "$ac_unrecognized_opts" && test "$enable_option_checking" != no; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: unrecognized options: $ac_unrecognized_opts" >&5 --$as_echo "$as_me: WARNING: unrecognized options: $ac_unrecognized_opts" >&2;} -+ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: unrecognized options: $ac_unrecognized_opts" >&5 -+printf "%s\n" "$as_me: WARNING: unrecognized options: $ac_unrecognized_opts" >&2;} - fi - - -@@ -18172,3 +19307,4 @@ cat<. Either one or two of these # become defined. -@@ -918,6 +936,8 @@ AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_MIPS64_LINUX, +@@ -1074,6 +1092,8 @@ AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_MIPS64_LINUX, test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX) AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_NANOMIPS_LINUX, test x$VGCONF_PLATFORM_PRI_CAPS = xNANOMIPS_LINUX) +AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_LOONGARCH64_LINUX, + test x$VGCONF_PLATFORM_PRI_CAPS = xLOONGARCH64_LINUX) - AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_X86_DARWIN, - test x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN \ - -o x$VGCONF_PLATFORM_SEC_CAPS = xX86_DARWIN) -@@ -944,7 +964,8 @@ AM_CONDITIONAL(VGCONF_OS_IS_LINUX, + AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_X86_FREEBSD, + test x$VGCONF_PLATFORM_PRI_CAPS = xX86_FREEBSD \ + -o x$VGCONF_PLATFORM_SEC_CAPS = xX86_FREEBSD) +@@ -1105,7 +1125,8 @@ AM_CONDITIONAL(VGCONF_OS_IS_LINUX, -o x$VGCONF_PLATFORM_PRI_CAPS = xS390X_LINUX \ -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS32_LINUX \ -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX \ - -o x$VGCONF_PLATFORM_PRI_CAPS = xNANOMIPS_LINUX) + -o x$VGCONF_PLATFORM_PRI_CAPS = xNANOMIPS_LINUX \ + -o x$VGCONF_PLATFORM_PRI_CAPS = xLOONGARCH64_LINUX) - AM_CONDITIONAL(VGCONF_OS_IS_DARWIN, - test x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN \ - -o x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_DARWIN) -@@ -4334,7 +4355,8 @@ elif test x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_LINUX \ + AM_CONDITIONAL(VGCONF_OS_IS_FREEBSD, + test x$VGCONF_PLATFORM_PRI_CAPS = xX86_FREEBSD \ + -o x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_FREEBSD) +@@ -4979,7 +5000,8 @@ elif test x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_LINUX \ -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_LINUX \ -o x$VGCONF_PLATFORM_PRI_CAPS = xARM64_LINUX \ -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX \ @@ -40249,15 +24154,15 @@ index 524230d..bf9c544 100755 mflag_primary=$FLAG_M64 elif test x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN ; then mflag_primary="$FLAG_M32 -arch i386" -@@ -4799,6 +4821,7 @@ AC_CONFIG_FILES([ +@@ -5505,6 +5527,7 @@ AC_CONFIG_FILES([ memcheck/tests/amd64-linux/Makefile memcheck/tests/arm64-linux/Makefile memcheck/tests/x86-linux/Makefile + memcheck/tests/loongarch64-linux/Makefile memcheck/tests/amd64-solaris/Makefile memcheck/tests/x86-solaris/Makefile - memcheck/tests/ppc32/Makefile -@@ -4841,6 +4864,7 @@ AC_CONFIG_FILES([ + memcheck/tests/amd64-freebsd/Makefile +@@ -5550,6 +5573,7 @@ AC_CONFIG_FILES([ none/tests/mips32/Makefile none/tests/mips64/Makefile none/tests/nanomips/Makefile @@ -40266,26 +24171,26 @@ index 524230d..bf9c544 100755 none/tests/darwin/Makefile none/tests/solaris/Makefile diff --git a/coregrind/Makefile.am b/coregrind/Makefile.am -index 1753fb6..7c46c8b 100644 +index 8a7f753..54c4824 100644 --- a/coregrind/Makefile.am +++ b/coregrind/Makefile.am -@@ -377,6 +377,7 @@ COREGRIND_SOURCES_COMMON = \ +@@ -386,6 +386,7 @@ COREGRIND_SOURCES_COMMON = \ m_dispatch/dispatch-mips32-linux.S \ m_dispatch/dispatch-mips64-linux.S \ m_dispatch/dispatch-nanomips-linux.S \ + m_dispatch/dispatch-loongarch64-linux.S \ + m_dispatch/dispatch-x86-freebsd.S \ + m_dispatch/dispatch-amd64-freebsd.S \ m_dispatch/dispatch-x86-darwin.S \ - m_dispatch/dispatch-amd64-darwin.S \ - m_dispatch/dispatch-x86-solaris.S \ -@@ -399,6 +400,7 @@ COREGRIND_SOURCES_COMMON = \ +@@ -409,6 +410,7 @@ COREGRIND_SOURCES_COMMON = \ m_gdbserver/valgrind-low-mips32.c \ m_gdbserver/valgrind-low-mips64.c \ m_gdbserver/valgrind-low-nanomips.c \ + m_gdbserver/valgrind-low-loongarch64.c \ m_gdbserver/version.c \ m_initimg/initimg-linux.c \ - m_initimg/initimg-darwin.c \ -@@ -424,6 +426,7 @@ COREGRIND_SOURCES_COMMON = \ + m_initimg/initimg-freebsd.c \ +@@ -436,6 +438,7 @@ COREGRIND_SOURCES_COMMON = \ m_sigframe/sigframe-mips32-linux.c \ m_sigframe/sigframe-mips64-linux.c \ m_sigframe/sigframe-nanomips-linux.c \ @@ -40293,15 +24198,15 @@ index 1753fb6..7c46c8b 100644 m_sigframe/sigframe-x86-darwin.c \ m_sigframe/sigframe-amd64-darwin.c \ m_sigframe/sigframe-solaris.c \ -@@ -438,6 +441,7 @@ COREGRIND_SOURCES_COMMON = \ +@@ -450,6 +453,7 @@ COREGRIND_SOURCES_COMMON = \ m_syswrap/syscall-mips32-linux.S \ m_syswrap/syscall-mips64-linux.S \ m_syswrap/syscall-nanomips-linux.S \ + m_syswrap/syscall-loongarch64-linux.S \ + m_syswrap/syscall-x86-freebsd.S \ + m_syswrap/syscall-amd64-freebsd.S \ m_syswrap/syscall-x86-darwin.S \ - m_syswrap/syscall-amd64-darwin.S \ - m_syswrap/syscall-x86-solaris.S \ -@@ -458,6 +462,7 @@ COREGRIND_SOURCES_COMMON = \ +@@ -475,6 +479,7 @@ COREGRIND_SOURCES_COMMON = \ m_syswrap/syswrap-mips32-linux.c \ m_syswrap/syswrap-mips64-linux.c \ m_syswrap/syswrap-nanomips-linux.c \ @@ -40309,53 +24214,46 @@ index 1753fb6..7c46c8b 100644 m_syswrap/syswrap-x86-darwin.c \ m_syswrap/syswrap-amd64-darwin.c \ m_syswrap/syswrap-xen.c \ -@@ -742,7 +747,12 @@ GDBSERVER_XML_FILES = \ +@@ -767,7 +772,15 @@ GDBSERVER_XML_FILES = \ m_gdbserver/mips64-linux-valgrind.xml \ m_gdbserver/mips64-fpu-valgrind-s1.xml \ m_gdbserver/mips64-fpu-valgrind-s2.xml \ - m_gdbserver/mips64-fpu.xml + m_gdbserver/mips64-fpu.xml \ + m_gdbserver/loongarch-base64.xml \ ++ m_gdbserver/loongarch-fpu64.xml \ + m_gdbserver/loongarch64-linux.xml \ + m_gdbserver/loongarch-base64-valgrind-s1.xml \ + m_gdbserver/loongarch-base64-valgrind-s2.xml \ ++ m_gdbserver/loongarch-fpu64-valgrind-s1.xml \ ++ m_gdbserver/loongarch-fpu64-valgrind-s2.xml \ + m_gdbserver/loongarch64-linux-valgrind.xml # so as to make sure these get copied into the install tree - vglibdir = $(pkglibdir) + vglibdir = $(pkglibexecdir) diff --git a/coregrind/Makefile.in b/coregrind/Makefile.in -index 2145686..fb68dd4 100644 +index 554ee94..a14da8d 100644 --- a/coregrind/Makefile.in +++ b/coregrind/Makefile.in -@@ -1,7 +1,7 @@ --# Makefile.in generated by automake 1.16.1 from Makefile.am. -+# Makefile.in generated by automake 1.16.5 from Makefile.am. - # @configure_input@ - --# Copyright (C) 1994-2018 Free Software Foundation, Inc. -+# Copyright (C) 1994-2021 Free Software Foundation, Inc. - - # This Makefile.in is free software; the Free Software Foundation - # gives unlimited permission to copy and/or distribute it, -@@ -278,6 +278,7 @@ am__libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_SOURCES_DIST = \ +@@ -280,6 +280,7 @@ am__libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_SOURCES_DIST = \ m_dispatch/dispatch-mips32-linux.S \ m_dispatch/dispatch-mips64-linux.S \ m_dispatch/dispatch-nanomips-linux.S \ + m_dispatch/dispatch-loongarch64-linux.S \ + m_dispatch/dispatch-x86-freebsd.S \ + m_dispatch/dispatch-amd64-freebsd.S \ m_dispatch/dispatch-x86-darwin.S \ - m_dispatch/dispatch-amd64-darwin.S \ - m_dispatch/dispatch-x86-solaris.S \ -@@ -294,7 +295,8 @@ am__libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_SOURCES_DIST = \ +@@ -298,7 +299,8 @@ am__libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_SOURCES_DIST = \ m_gdbserver/valgrind-low-s390x.c \ m_gdbserver/valgrind-low-mips32.c \ m_gdbserver/valgrind-low-mips64.c \ - m_gdbserver/valgrind-low-nanomips.c m_gdbserver/version.c \ + m_gdbserver/valgrind-low-nanomips.c \ + m_gdbserver/valgrind-low-loongarch64.c m_gdbserver/version.c \ - m_initimg/initimg-linux.c m_initimg/initimg-darwin.c \ - m_initimg/initimg-solaris.c m_initimg/initimg-pathscan.c \ + m_initimg/initimg-linux.c m_initimg/initimg-freebsd.c \ + m_initimg/initimg-darwin.c m_initimg/initimg-solaris.c \ m_mach/mach_basics.c m_mach/mach_msg.c \ -@@ -313,6 +315,7 @@ am__libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_SOURCES_DIST = \ +@@ -319,6 +321,7 @@ am__libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_SOURCES_DIST = \ m_sigframe/sigframe-mips32-linux.c \ m_sigframe/sigframe-mips64-linux.c \ m_sigframe/sigframe-nanomips-linux.c \ @@ -40363,15 +24261,15 @@ index 2145686..fb68dd4 100644 m_sigframe/sigframe-x86-darwin.c \ m_sigframe/sigframe-amd64-darwin.c \ m_sigframe/sigframe-solaris.c m_syswrap/syscall-x86-linux.S \ -@@ -325,6 +328,7 @@ am__libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_SOURCES_DIST = \ +@@ -331,6 +334,7 @@ am__libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_SOURCES_DIST = \ m_syswrap/syscall-mips32-linux.S \ m_syswrap/syscall-mips64-linux.S \ m_syswrap/syscall-nanomips-linux.S \ + m_syswrap/syscall-loongarch64-linux.S \ + m_syswrap/syscall-x86-freebsd.S \ + m_syswrap/syscall-amd64-freebsd.S \ m_syswrap/syscall-x86-darwin.S \ - m_syswrap/syscall-amd64-darwin.S \ - m_syswrap/syscall-x86-solaris.S \ -@@ -340,6 +344,7 @@ am__libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_SOURCES_DIST = \ +@@ -350,6 +354,7 @@ am__libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_SOURCES_DIST = \ m_syswrap/syswrap-mips32-linux.c \ m_syswrap/syswrap-mips64-linux.c \ m_syswrap/syswrap-nanomips-linux.c \ @@ -40379,23 +24277,23 @@ index 2145686..fb68dd4 100644 m_syswrap/syswrap-x86-darwin.c \ m_syswrap/syswrap-amd64-darwin.c m_syswrap/syswrap-xen.c \ m_syswrap/syswrap-x86-solaris.c \ -@@ -427,6 +432,7 @@ am__objects_1 = libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT +@@ -437,6 +442,7 @@ am__objects_1 = libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-mips32-linux.$(OBJEXT) \ m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-mips64-linux.$(OBJEXT) \ m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-nanomips-linux.$(OBJEXT) \ + m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-loongarch64-linux.$(OBJEXT) \ + m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-freebsd.$(OBJEXT) \ + m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-amd64-freebsd.$(OBJEXT) \ m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-darwin.$(OBJEXT) \ - m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-amd64-darwin.$(OBJEXT) \ - m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-solaris.$(OBJEXT) \ -@@ -449,6 +455,7 @@ am__objects_1 = libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT +@@ -460,6 +466,7 @@ am__objects_1 = libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT m_gdbserver/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-mips32.$(OBJEXT) \ m_gdbserver/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-mips64.$(OBJEXT) \ m_gdbserver/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-nanomips.$(OBJEXT) \ + m_gdbserver/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-loongarch64.$(OBJEXT) \ m_gdbserver/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-version.$(OBJEXT) \ m_initimg/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-initimg-linux.$(OBJEXT) \ - m_initimg/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-initimg-darwin.$(OBJEXT) \ -@@ -474,6 +481,7 @@ am__objects_1 = libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT + m_initimg/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-initimg-freebsd.$(OBJEXT) \ +@@ -487,6 +494,7 @@ am__objects_1 = libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT m_sigframe/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-mips32-linux.$(OBJEXT) \ m_sigframe/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-mips64-linux.$(OBJEXT) \ m_sigframe/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-nanomips-linux.$(OBJEXT) \ @@ -40403,15 +24301,15 @@ index 2145686..fb68dd4 100644 m_sigframe/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-x86-darwin.$(OBJEXT) \ m_sigframe/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-amd64-darwin.$(OBJEXT) \ m_sigframe/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-solaris.$(OBJEXT) \ -@@ -488,6 +496,7 @@ am__objects_1 = libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT +@@ -501,6 +509,7 @@ am__objects_1 = libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-mips32-linux.$(OBJEXT) \ m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-mips64-linux.$(OBJEXT) \ m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-nanomips-linux.$(OBJEXT) \ + m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-loongarch64-linux.$(OBJEXT) \ + m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-freebsd.$(OBJEXT) \ + m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-amd64-freebsd.$(OBJEXT) \ m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-darwin.$(OBJEXT) \ - m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-amd64-darwin.$(OBJEXT) \ - m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-solaris.$(OBJEXT) \ -@@ -508,6 +517,7 @@ am__objects_1 = libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT +@@ -526,6 +535,7 @@ am__objects_1 = libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-mips32-linux.$(OBJEXT) \ m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-mips64-linux.$(OBJEXT) \ m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-nanomips-linux.$(OBJEXT) \ @@ -40419,25 +24317,25 @@ index 2145686..fb68dd4 100644 m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-x86-darwin.$(OBJEXT) \ m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-amd64-darwin.$(OBJEXT) \ m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-xen.$(OBJEXT) \ -@@ -569,6 +579,7 @@ am__libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_SOURCES_DIST = \ +@@ -587,6 +597,7 @@ am__libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_SOURCES_DIST = \ m_dispatch/dispatch-mips32-linux.S \ m_dispatch/dispatch-mips64-linux.S \ m_dispatch/dispatch-nanomips-linux.S \ + m_dispatch/dispatch-loongarch64-linux.S \ + m_dispatch/dispatch-x86-freebsd.S \ + m_dispatch/dispatch-amd64-freebsd.S \ m_dispatch/dispatch-x86-darwin.S \ - m_dispatch/dispatch-amd64-darwin.S \ - m_dispatch/dispatch-x86-solaris.S \ -@@ -585,7 +596,8 @@ am__libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_SOURCES_DIST = \ +@@ -605,7 +616,8 @@ am__libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_SOURCES_DIST = \ m_gdbserver/valgrind-low-s390x.c \ m_gdbserver/valgrind-low-mips32.c \ m_gdbserver/valgrind-low-mips64.c \ - m_gdbserver/valgrind-low-nanomips.c m_gdbserver/version.c \ + m_gdbserver/valgrind-low-nanomips.c \ + m_gdbserver/valgrind-low-loongarch64.c m_gdbserver/version.c \ - m_initimg/initimg-linux.c m_initimg/initimg-darwin.c \ - m_initimg/initimg-solaris.c m_initimg/initimg-pathscan.c \ + m_initimg/initimg-linux.c m_initimg/initimg-freebsd.c \ + m_initimg/initimg-darwin.c m_initimg/initimg-solaris.c \ m_mach/mach_basics.c m_mach/mach_msg.c \ -@@ -604,6 +616,7 @@ am__libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_SOURCES_DIST = \ +@@ -626,6 +638,7 @@ am__libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_SOURCES_DIST = \ m_sigframe/sigframe-mips32-linux.c \ m_sigframe/sigframe-mips64-linux.c \ m_sigframe/sigframe-nanomips-linux.c \ @@ -40445,15 +24343,15 @@ index 2145686..fb68dd4 100644 m_sigframe/sigframe-x86-darwin.c \ m_sigframe/sigframe-amd64-darwin.c \ m_sigframe/sigframe-solaris.c m_syswrap/syscall-x86-linux.S \ -@@ -616,6 +629,7 @@ am__libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_SOURCES_DIST = \ +@@ -638,6 +651,7 @@ am__libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_SOURCES_DIST = \ m_syswrap/syscall-mips32-linux.S \ m_syswrap/syscall-mips64-linux.S \ m_syswrap/syscall-nanomips-linux.S \ + m_syswrap/syscall-loongarch64-linux.S \ + m_syswrap/syscall-x86-freebsd.S \ + m_syswrap/syscall-amd64-freebsd.S \ m_syswrap/syscall-x86-darwin.S \ - m_syswrap/syscall-amd64-darwin.S \ - m_syswrap/syscall-x86-solaris.S \ -@@ -631,6 +645,7 @@ am__libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_SOURCES_DIST = \ +@@ -657,6 +671,7 @@ am__libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_SOURCES_DIST = \ m_syswrap/syswrap-mips32-linux.c \ m_syswrap/syswrap-mips64-linux.c \ m_syswrap/syswrap-nanomips-linux.c \ @@ -40461,23 +24359,23 @@ index 2145686..fb68dd4 100644 m_syswrap/syswrap-x86-darwin.c \ m_syswrap/syswrap-amd64-darwin.c m_syswrap/syswrap-xen.c \ m_syswrap/syswrap-x86-solaris.c \ -@@ -717,6 +732,7 @@ am__objects_7 = libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT +@@ -743,6 +758,7 @@ am__objects_7 = libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-mips32-linux.$(OBJEXT) \ m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-mips64-linux.$(OBJEXT) \ m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-nanomips-linux.$(OBJEXT) \ + m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-loongarch64-linux.$(OBJEXT) \ + m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-freebsd.$(OBJEXT) \ + m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-amd64-freebsd.$(OBJEXT) \ m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-darwin.$(OBJEXT) \ - m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-amd64-darwin.$(OBJEXT) \ - m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-solaris.$(OBJEXT) \ -@@ -739,6 +755,7 @@ am__objects_7 = libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT +@@ -766,6 +782,7 @@ am__objects_7 = libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT m_gdbserver/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-mips32.$(OBJEXT) \ m_gdbserver/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-mips64.$(OBJEXT) \ m_gdbserver/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-nanomips.$(OBJEXT) \ + m_gdbserver/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-loongarch64.$(OBJEXT) \ m_gdbserver/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-version.$(OBJEXT) \ m_initimg/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-initimg-linux.$(OBJEXT) \ - m_initimg/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-initimg-darwin.$(OBJEXT) \ -@@ -764,6 +781,7 @@ am__objects_7 = libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT + m_initimg/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-initimg-freebsd.$(OBJEXT) \ +@@ -793,6 +810,7 @@ am__objects_7 = libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT m_sigframe/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-mips32-linux.$(OBJEXT) \ m_sigframe/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-mips64-linux.$(OBJEXT) \ m_sigframe/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-nanomips-linux.$(OBJEXT) \ @@ -40485,15 +24383,15 @@ index 2145686..fb68dd4 100644 m_sigframe/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-x86-darwin.$(OBJEXT) \ m_sigframe/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-amd64-darwin.$(OBJEXT) \ m_sigframe/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-solaris.$(OBJEXT) \ -@@ -778,6 +796,7 @@ am__objects_7 = libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT +@@ -807,6 +825,7 @@ am__objects_7 = libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-mips32-linux.$(OBJEXT) \ m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-mips64-linux.$(OBJEXT) \ m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-nanomips-linux.$(OBJEXT) \ + m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-loongarch64-linux.$(OBJEXT) \ + m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-freebsd.$(OBJEXT) \ + m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-amd64-freebsd.$(OBJEXT) \ m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-darwin.$(OBJEXT) \ - m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-amd64-darwin.$(OBJEXT) \ - m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-solaris.$(OBJEXT) \ -@@ -798,6 +817,7 @@ am__objects_7 = libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT +@@ -832,6 +851,7 @@ am__objects_7 = libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-m_addrinfo.$(OBJEXT m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-mips32-linux.$(OBJEXT) \ m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-mips64-linux.$(OBJEXT) \ m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-nanomips-linux.$(OBJEXT) \ @@ -40501,7 +24399,7 @@ index 2145686..fb68dd4 100644 m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-x86-darwin.$(OBJEXT) \ m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-amd64-darwin.$(OBJEXT) \ m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-xen.$(OBJEXT) \ -@@ -1085,6 +1105,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m +@@ -1133,6 +1153,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-amd64-solaris.Po \ m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-arm-linux.Po \ m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-arm64-linux.Po \ @@ -40509,7 +24407,7 @@ index 2145686..fb68dd4 100644 m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-mips32-linux.Po \ m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-mips64-linux.Po \ m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-nanomips-linux.Po \ -@@ -1100,6 +1121,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m +@@ -1150,6 +1171,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-amd64-solaris.Po \ m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-arm-linux.Po \ m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-arm64-linux.Po \ @@ -40517,7 +24415,7 @@ index 2145686..fb68dd4 100644 m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-mips32-linux.Po \ m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-mips64-linux.Po \ m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-nanomips-linux.Po \ -@@ -1121,6 +1143,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m +@@ -1171,6 +1193,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-amd64.Po \ m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-arm.Po \ m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-arm64.Po \ @@ -40525,7 +24423,7 @@ index 2145686..fb68dd4 100644 m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-mips32.Po \ m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-mips64.Po \ m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-nanomips.Po \ -@@ -1140,6 +1163,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m +@@ -1189,6 +1212,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-amd64.Po \ m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-arm.Po \ m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-arm64.Po \ @@ -40533,7 +24431,7 @@ index 2145686..fb68dd4 100644 m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-mips32.Po \ m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-mips64.Po \ m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-nanomips.Po \ -@@ -1191,6 +1215,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m +@@ -1243,6 +1267,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-arm-linux.Po \ m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-arm64-linux.Po \ m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-common.Po \ @@ -40541,7 +24439,7 @@ index 2145686..fb68dd4 100644 m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-mips32-linux.Po \ m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-mips64-linux.Po \ m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-nanomips-linux.Po \ -@@ -1205,6 +1230,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m +@@ -1259,6 +1284,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-arm-linux.Po \ m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-arm64-linux.Po \ m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-common.Po \ @@ -40549,7 +24447,7 @@ index 2145686..fb68dd4 100644 m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-mips32-linux.Po \ m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-mips64-linux.Po \ m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-nanomips-linux.Po \ -@@ -1219,6 +1245,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m +@@ -1275,6 +1301,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-amd64-solaris.Po \ m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-arm-linux.Po \ m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-arm64-linux.Po \ @@ -40557,7 +24455,7 @@ index 2145686..fb68dd4 100644 m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-mips32-linux.Po \ m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-mips64-linux.Po \ m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-nanomips-linux.Po \ -@@ -1238,6 +1265,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m +@@ -1297,6 +1324,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-generic.Po \ m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-linux-variants.Po \ m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-linux.Po \ @@ -40565,7 +24463,7 @@ index 2145686..fb68dd4 100644 m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-main.Po \ m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-mips32-linux.Po \ m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-mips64-linux.Po \ -@@ -1255,6 +1283,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m +@@ -1316,6 +1344,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-amd64-solaris.Po \ m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-arm-linux.Po \ m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-arm64-linux.Po \ @@ -40573,7 +24471,7 @@ index 2145686..fb68dd4 100644 m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-mips32-linux.Po \ m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-mips64-linux.Po \ m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-nanomips-linux.Po \ -@@ -1274,6 +1303,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m +@@ -1338,6 +1367,7 @@ am__depfiles_remade = ./$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-m m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-generic.Po \ m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-linux-variants.Po \ m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-linux.Po \ @@ -40581,41 +24479,7 @@ index 2145686..fb68dd4 100644 m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-main.Po \ m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-mips32-linux.Po \ m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-mips64-linux.Po \ -@@ -1365,8 +1395,6 @@ am__define_uniq_tagged_files = \ - unique=`for i in $$list; do \ - if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \ - done | $(am__uniquify_input)` --ETAGS = etags --CTAGS = ctags - am__DIST_COMMON = $(srcdir)/Makefile.in \ - $(srcdir)/link_tool_exe_darwin.in \ - $(srcdir)/link_tool_exe_linux.in \ -@@ -1394,6 +1422,8 @@ CFLAGS = @CFLAGS@ - CFLAGS_MPI = @CFLAGS_MPI@ - CPP = @CPP@ - CPPFLAGS = @CPPFLAGS@ -+CSCOPE = @CSCOPE@ -+CTAGS = @CTAGS@ - CXX = @CXX@ - CXXDEPMODE = @CXXDEPMODE@ - CXXFLAGS = @CXXFLAGS@ -@@ -1407,6 +1437,7 @@ ECHO_C = @ECHO_C@ - ECHO_N = @ECHO_N@ - ECHO_T = @ECHO_T@ - EGREP = @EGREP@ -+ETAGS = @ETAGS@ - EXEEXT = @EXEEXT@ - FLAG_FALIGNED_NEW = @FLAG_FALIGNED_NEW@ - FLAG_FINLINE_FUNCTIONS = @FLAG_FINLINE_FUNCTIONS@ -@@ -1552,6 +1583,7 @@ pdfdir = @pdfdir@ - prefix = @prefix@ - program_transform_name = @program_transform_name@ - psdir = @psdir@ -+runstatedir = @runstatedir@ - sbindir = @sbindir@ - sharedstatedir = @sharedstatedir@ - srcdir = @srcdir@ -@@ -1700,6 +1732,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ +@@ -1818,6 +1848,12 @@ AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ $(AM_CFLAGS_PSO_BASE) AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g @@ -40627,8 +24491,8 @@ index 2145686..fb68dd4 100644 +AM_CCASFLAGS_LOONGARCH64_LINUX = @FLAG_M64@ -g AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@ AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ - $(AM_CFLAGS_BASE) -fomit-frame-pointer \ -@@ -1745,6 +1783,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ + $(AM_CFLAGS_BASE) -fomit-frame-pointer @SOLARIS_UNDEF_LARGESOURCE@ +@@ -1865,6 +1901,7 @@ PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ @@ -40636,23 +24500,23 @@ index 2145686..fb68dd4 100644 PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ -@@ -2018,6 +2057,7 @@ COREGRIND_SOURCES_COMMON = \ +@@ -2144,6 +2181,7 @@ COREGRIND_SOURCES_COMMON = \ m_dispatch/dispatch-mips32-linux.S \ m_dispatch/dispatch-mips64-linux.S \ m_dispatch/dispatch-nanomips-linux.S \ + m_dispatch/dispatch-loongarch64-linux.S \ + m_dispatch/dispatch-x86-freebsd.S \ + m_dispatch/dispatch-amd64-freebsd.S \ m_dispatch/dispatch-x86-darwin.S \ - m_dispatch/dispatch-amd64-darwin.S \ - m_dispatch/dispatch-x86-solaris.S \ -@@ -2040,6 +2080,7 @@ COREGRIND_SOURCES_COMMON = \ +@@ -2167,6 +2205,7 @@ COREGRIND_SOURCES_COMMON = \ m_gdbserver/valgrind-low-mips32.c \ m_gdbserver/valgrind-low-mips64.c \ m_gdbserver/valgrind-low-nanomips.c \ + m_gdbserver/valgrind-low-loongarch64.c \ m_gdbserver/version.c \ m_initimg/initimg-linux.c \ - m_initimg/initimg-darwin.c \ -@@ -2065,6 +2106,7 @@ COREGRIND_SOURCES_COMMON = \ + m_initimg/initimg-freebsd.c \ +@@ -2194,6 +2233,7 @@ COREGRIND_SOURCES_COMMON = \ m_sigframe/sigframe-mips32-linux.c \ m_sigframe/sigframe-mips64-linux.c \ m_sigframe/sigframe-nanomips-linux.c \ @@ -40660,15 +24524,15 @@ index 2145686..fb68dd4 100644 m_sigframe/sigframe-x86-darwin.c \ m_sigframe/sigframe-amd64-darwin.c \ m_sigframe/sigframe-solaris.c \ -@@ -2079,6 +2121,7 @@ COREGRIND_SOURCES_COMMON = \ +@@ -2208,6 +2248,7 @@ COREGRIND_SOURCES_COMMON = \ m_syswrap/syscall-mips32-linux.S \ m_syswrap/syscall-mips64-linux.S \ m_syswrap/syscall-nanomips-linux.S \ + m_syswrap/syscall-loongarch64-linux.S \ + m_syswrap/syscall-x86-freebsd.S \ + m_syswrap/syscall-amd64-freebsd.S \ m_syswrap/syscall-x86-darwin.S \ - m_syswrap/syscall-amd64-darwin.S \ - m_syswrap/syscall-x86-solaris.S \ -@@ -2099,6 +2142,7 @@ COREGRIND_SOURCES_COMMON = \ +@@ -2233,6 +2274,7 @@ COREGRIND_SOURCES_COMMON = \ m_syswrap/syswrap-mips32-linux.c \ m_syswrap/syswrap-mips64-linux.c \ m_syswrap/syswrap-nanomips-linux.c \ @@ -40676,31 +24540,34 @@ index 2145686..fb68dd4 100644 m_syswrap/syswrap-x86-darwin.c \ m_syswrap/syswrap-amd64-darwin.c \ m_syswrap/syswrap-xen.c \ -@@ -2349,7 +2393,12 @@ GDBSERVER_XML_FILES = \ +@@ -2487,7 +2529,15 @@ GDBSERVER_XML_FILES = \ m_gdbserver/mips64-linux-valgrind.xml \ m_gdbserver/mips64-fpu-valgrind-s1.xml \ m_gdbserver/mips64-fpu-valgrind-s2.xml \ - m_gdbserver/mips64-fpu.xml + m_gdbserver/mips64-fpu.xml \ + m_gdbserver/loongarch-base64.xml \ ++ m_gdbserver/loongarch-fpu64.xml \ + m_gdbserver/loongarch64-linux.xml \ + m_gdbserver/loongarch-base64-valgrind-s1.xml \ + m_gdbserver/loongarch-base64-valgrind-s2.xml \ ++ m_gdbserver/loongarch-fpu64-valgrind-s1.xml \ ++ m_gdbserver/loongarch-fpu64-valgrind-s2.xml \ + m_gdbserver/loongarch64-linux-valgrind.xml # so as to make sure these get copied into the install tree -@@ -2619,6 +2668,9 @@ m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-mips64-linux.$( +@@ -2762,6 +2812,9 @@ m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-mips64-linux.$( m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-nanomips-linux.$(OBJEXT): \ m_dispatch/$(am__dirstamp) \ m_dispatch/$(DEPDIR)/$(am__dirstamp) +m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-loongarch64-linux.$(OBJEXT): \ + m_dispatch/$(am__dirstamp) \ + m_dispatch/$(DEPDIR)/$(am__dirstamp) - m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-darwin.$(OBJEXT): \ + m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-freebsd.$(OBJEXT): \ m_dispatch/$(am__dirstamp) \ m_dispatch/$(DEPDIR)/$(am__dirstamp) -@@ -2691,6 +2743,9 @@ m_gdbserver/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-mips64.$(O +@@ -2837,6 +2890,9 @@ m_gdbserver/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-mips64.$(O m_gdbserver/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-nanomips.$(OBJEXT): \ m_gdbserver/$(am__dirstamp) \ m_gdbserver/$(DEPDIR)/$(am__dirstamp) @@ -40710,7 +24577,7 @@ index 2145686..fb68dd4 100644 m_gdbserver/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-version.$(OBJEXT): \ m_gdbserver/$(am__dirstamp) \ m_gdbserver/$(DEPDIR)/$(am__dirstamp) -@@ -2788,6 +2843,9 @@ m_sigframe/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-mips64-linux.$( +@@ -2940,6 +2996,9 @@ m_sigframe/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-mips64-linux.$( m_sigframe/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-nanomips-linux.$(OBJEXT): \ m_sigframe/$(am__dirstamp) \ m_sigframe/$(DEPDIR)/$(am__dirstamp) @@ -40720,16 +24587,16 @@ index 2145686..fb68dd4 100644 m_sigframe/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-x86-darwin.$(OBJEXT): \ m_sigframe/$(am__dirstamp) \ m_sigframe/$(DEPDIR)/$(am__dirstamp) -@@ -2825,6 +2883,8 @@ m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-mips64-linux.$(OB +@@ -2977,6 +3036,8 @@ m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-mips64-linux.$(OB m_syswrap/$(am__dirstamp) m_syswrap/$(DEPDIR)/$(am__dirstamp) m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-nanomips-linux.$(OBJEXT): \ m_syswrap/$(am__dirstamp) m_syswrap/$(DEPDIR)/$(am__dirstamp) +m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-loongarch64-linux.$(OBJEXT): \ + m_syswrap/$(am__dirstamp) m_syswrap/$(DEPDIR)/$(am__dirstamp) - m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-darwin.$(OBJEXT): \ + m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-freebsd.$(OBJEXT): \ m_syswrap/$(am__dirstamp) m_syswrap/$(DEPDIR)/$(am__dirstamp) - m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-amd64-darwin.$(OBJEXT): \ -@@ -2865,6 +2925,8 @@ m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-mips64-linux.$(OB + m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-amd64-freebsd.$(OBJEXT): \ +@@ -3027,6 +3088,8 @@ m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-mips64-linux.$(OB m_syswrap/$(am__dirstamp) m_syswrap/$(DEPDIR)/$(am__dirstamp) m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-nanomips-linux.$(OBJEXT): \ m_syswrap/$(am__dirstamp) m_syswrap/$(DEPDIR)/$(am__dirstamp) @@ -40738,17 +24605,17 @@ index 2145686..fb68dd4 100644 m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-x86-darwin.$(OBJEXT): \ m_syswrap/$(am__dirstamp) m_syswrap/$(DEPDIR)/$(am__dirstamp) m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-amd64-darwin.$(OBJEXT): \ -@@ -3019,6 +3081,9 @@ m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-mips64-linux.$( +@@ -3181,6 +3244,9 @@ m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-mips64-linux.$( m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-nanomips-linux.$(OBJEXT): \ m_dispatch/$(am__dirstamp) \ m_dispatch/$(DEPDIR)/$(am__dirstamp) +m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-loongarch64-linux.$(OBJEXT): \ + m_dispatch/$(am__dirstamp) \ + m_dispatch/$(DEPDIR)/$(am__dirstamp) - m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-darwin.$(OBJEXT): \ + m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-freebsd.$(OBJEXT): \ m_dispatch/$(am__dirstamp) \ m_dispatch/$(DEPDIR)/$(am__dirstamp) -@@ -3085,6 +3150,9 @@ m_gdbserver/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-mips64.$(O +@@ -3250,6 +3316,9 @@ m_gdbserver/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-mips64.$(O m_gdbserver/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-nanomips.$(OBJEXT): \ m_gdbserver/$(am__dirstamp) \ m_gdbserver/$(DEPDIR)/$(am__dirstamp) @@ -40758,7 +24625,7 @@ index 2145686..fb68dd4 100644 m_gdbserver/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-version.$(OBJEXT): \ m_gdbserver/$(am__dirstamp) \ m_gdbserver/$(DEPDIR)/$(am__dirstamp) -@@ -3152,6 +3220,9 @@ m_sigframe/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-mips64-linux.$( +@@ -3323,6 +3392,9 @@ m_sigframe/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-mips64-linux.$( m_sigframe/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-nanomips-linux.$(OBJEXT): \ m_sigframe/$(am__dirstamp) \ m_sigframe/$(DEPDIR)/$(am__dirstamp) @@ -40768,16 +24635,16 @@ index 2145686..fb68dd4 100644 m_sigframe/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-x86-darwin.$(OBJEXT): \ m_sigframe/$(am__dirstamp) \ m_sigframe/$(DEPDIR)/$(am__dirstamp) -@@ -3183,6 +3254,8 @@ m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-mips64-linux.$(OB +@@ -3354,6 +3426,8 @@ m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-mips64-linux.$(OB m_syswrap/$(am__dirstamp) m_syswrap/$(DEPDIR)/$(am__dirstamp) m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-nanomips-linux.$(OBJEXT): \ m_syswrap/$(am__dirstamp) m_syswrap/$(DEPDIR)/$(am__dirstamp) +m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-loongarch64-linux.$(OBJEXT): \ + m_syswrap/$(am__dirstamp) m_syswrap/$(DEPDIR)/$(am__dirstamp) - m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-darwin.$(OBJEXT): \ + m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-freebsd.$(OBJEXT): \ m_syswrap/$(am__dirstamp) m_syswrap/$(DEPDIR)/$(am__dirstamp) - m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-amd64-darwin.$(OBJEXT): \ -@@ -3223,6 +3296,8 @@ m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-mips64-linux.$(OB + m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-amd64-freebsd.$(OBJEXT): \ +@@ -3404,6 +3478,8 @@ m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-mips64-linux.$(OB m_syswrap/$(am__dirstamp) m_syswrap/$(DEPDIR)/$(am__dirstamp) m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-nanomips-linux.$(OBJEXT): \ m_syswrap/$(am__dirstamp) m_syswrap/$(DEPDIR)/$(am__dirstamp) @@ -40786,7 +24653,7 @@ index 2145686..fb68dd4 100644 m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-x86-darwin.$(OBJEXT): \ m_syswrap/$(am__dirstamp) m_syswrap/$(DEPDIR)/$(am__dirstamp) m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-amd64-darwin.$(OBJEXT): \ -@@ -3489,6 +3564,7 @@ distclean-compile: +@@ -3681,6 +3757,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-amd64-solaris.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-arm-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-arm64-linux.Po@am__quote@ # am--include-marker @@ -40794,7 +24661,7 @@ index 2145686..fb68dd4 100644 @AMDEP_TRUE@@am__include@ @am__quote@m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-mips32-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-mips64-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-nanomips-linux.Po@am__quote@ # am--include-marker -@@ -3504,6 +3580,7 @@ distclean-compile: +@@ -3698,6 +3775,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-amd64-solaris.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-arm-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-arm64-linux.Po@am__quote@ # am--include-marker @@ -40802,7 +24669,7 @@ index 2145686..fb68dd4 100644 @AMDEP_TRUE@@am__include@ @am__quote@m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-mips32-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-mips64-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-nanomips-linux.Po@am__quote@ # am--include-marker -@@ -3525,6 +3602,7 @@ distclean-compile: +@@ -3719,6 +3797,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-amd64.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-arm.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-arm64.Po@am__quote@ # am--include-marker @@ -40810,7 +24677,7 @@ index 2145686..fb68dd4 100644 @AMDEP_TRUE@@am__include@ @am__quote@m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-mips32.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-mips64.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-nanomips.Po@am__quote@ # am--include-marker -@@ -3544,6 +3622,7 @@ distclean-compile: +@@ -3737,6 +3816,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-amd64.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-arm.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-arm64.Po@am__quote@ # am--include-marker @@ -40818,7 +24685,7 @@ index 2145686..fb68dd4 100644 @AMDEP_TRUE@@am__include@ @am__quote@m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-mips32.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-mips64.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-nanomips.Po@am__quote@ # am--include-marker -@@ -3595,6 +3674,7 @@ distclean-compile: +@@ -3791,6 +3871,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-arm-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-arm64-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-common.Po@am__quote@ # am--include-marker @@ -40826,7 +24693,7 @@ index 2145686..fb68dd4 100644 @AMDEP_TRUE@@am__include@ @am__quote@m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-mips32-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-mips64-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-nanomips-linux.Po@am__quote@ # am--include-marker -@@ -3609,6 +3689,7 @@ distclean-compile: +@@ -3807,6 +3888,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-arm-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-arm64-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-common.Po@am__quote@ # am--include-marker @@ -40834,7 +24701,7 @@ index 2145686..fb68dd4 100644 @AMDEP_TRUE@@am__include@ @am__quote@m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-mips32-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-mips64-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-nanomips-linux.Po@am__quote@ # am--include-marker -@@ -3623,6 +3704,7 @@ distclean-compile: +@@ -3823,6 +3905,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-amd64-solaris.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-arm-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-arm64-linux.Po@am__quote@ # am--include-marker @@ -40842,7 +24709,7 @@ index 2145686..fb68dd4 100644 @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-mips32-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-mips64-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-nanomips-linux.Po@am__quote@ # am--include-marker -@@ -3642,6 +3724,7 @@ distclean-compile: +@@ -3845,6 +3928,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-generic.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-linux-variants.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-linux.Po@am__quote@ # am--include-marker @@ -40850,7 +24717,7 @@ index 2145686..fb68dd4 100644 @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-main.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-mips32-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-mips64-linux.Po@am__quote@ # am--include-marker -@@ -3659,6 +3742,7 @@ distclean-compile: +@@ -3864,6 +3948,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-amd64-solaris.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-arm-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-arm64-linux.Po@am__quote@ # am--include-marker @@ -40858,7 +24725,7 @@ index 2145686..fb68dd4 100644 @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-mips32-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-mips64-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-nanomips-linux.Po@am__quote@ # am--include-marker -@@ -3678,6 +3762,7 @@ distclean-compile: +@@ -3886,6 +3971,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-generic.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-linux-variants.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-linux.Po@am__quote@ # am--include-marker @@ -40866,7 +24733,7 @@ index 2145686..fb68dd4 100644 @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-main.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-mips32-linux.Po@am__quote@ # am--include-marker @AMDEP_TRUE@@am__include@ @am__quote@m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-mips64-linux.Po@am__quote@ # am--include-marker -@@ -3903,6 +3988,20 @@ m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-nanomips-linux. +@@ -4112,6 +4198,20 @@ m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-nanomips-linux. @AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCCAS_FALSE@ $(AM_V_CPPAS@am__nodep@)$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CCASFLAGS) $(CCASFLAGS) -c -o m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-nanomips-linux.obj `if test -f 'm_dispatch/dispatch-nanomips-linux.S'; then $(CYGPATH_W) 'm_dispatch/dispatch-nanomips-linux.S'; else $(CYGPATH_W) '$(srcdir)/m_dispatch/dispatch-nanomips-linux.S'; fi` @@ -40884,10 +24751,10 @@ index 2145686..fb68dd4 100644 +@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCCAS_FALSE@ $(AM_V_CPPAS@am__nodep@)$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CCASFLAGS) $(CCASFLAGS) -c -o m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-loongarch64-linux.obj `if test -f 'm_dispatch/dispatch-loongarch64-linux.S'; then $(CYGPATH_W) 'm_dispatch/dispatch-loongarch64-linux.S'; else $(CYGPATH_W) '$(srcdir)/m_dispatch/dispatch-loongarch64-linux.S'; fi` + - m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-darwin.o: m_dispatch/dispatch-x86-darwin.S - @am__fastdepCCAS_TRUE@ $(AM_V_CPPAS)$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CCASFLAGS) $(CCASFLAGS) -MT m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-darwin.o -MD -MP -MF m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-darwin.Tpo -c -o m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-darwin.o `test -f 'm_dispatch/dispatch-x86-darwin.S' || echo '$(srcdir)/'`m_dispatch/dispatch-x86-darwin.S - @am__fastdepCCAS_TRUE@ $(AM_V_at)$(am__mv) m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-darwin.Tpo m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-darwin.Po -@@ -4141,6 +4240,20 @@ m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-nanomips-linux.ob + m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-freebsd.o: m_dispatch/dispatch-x86-freebsd.S + @am__fastdepCCAS_TRUE@ $(AM_V_CPPAS)$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CCASFLAGS) $(CCASFLAGS) -MT m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-freebsd.o -MD -MP -MF m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-freebsd.Tpo -c -o m_dispatch/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-freebsd.o `test -f 'm_dispatch/dispatch-x86-freebsd.S' || echo '$(srcdir)/'`m_dispatch/dispatch-x86-freebsd.S + @am__fastdepCCAS_TRUE@ $(AM_V_at)$(am__mv) m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-freebsd.Tpo m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-x86-freebsd.Po +@@ -4378,6 +4478,20 @@ m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-nanomips-linux.ob @AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCCAS_FALSE@ $(AM_V_CPPAS@am__nodep@)$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CCASFLAGS) $(CCASFLAGS) -c -o m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-nanomips-linux.obj `if test -f 'm_syswrap/syscall-nanomips-linux.S'; then $(CYGPATH_W) 'm_syswrap/syscall-nanomips-linux.S'; else $(CYGPATH_W) '$(srcdir)/m_syswrap/syscall-nanomips-linux.S'; fi` @@ -40905,10 +24772,10 @@ index 2145686..fb68dd4 100644 +@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCCAS_FALSE@ $(AM_V_CPPAS@am__nodep@)$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CCASFLAGS) $(CCASFLAGS) -c -o m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-loongarch64-linux.obj `if test -f 'm_syswrap/syscall-loongarch64-linux.S'; then $(CYGPATH_W) 'm_syswrap/syscall-loongarch64-linux.S'; else $(CYGPATH_W) '$(srcdir)/m_syswrap/syscall-loongarch64-linux.S'; fi` + - m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-darwin.o: m_syswrap/syscall-x86-darwin.S - @am__fastdepCCAS_TRUE@ $(AM_V_CPPAS)$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CCASFLAGS) $(CCASFLAGS) -MT m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-darwin.o -MD -MP -MF m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-darwin.Tpo -c -o m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-darwin.o `test -f 'm_syswrap/syscall-x86-darwin.S' || echo '$(srcdir)/'`m_syswrap/syscall-x86-darwin.S - @am__fastdepCCAS_TRUE@ $(AM_V_at)$(am__mv) m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-darwin.Tpo m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-darwin.Po -@@ -4379,6 +4492,20 @@ m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-nanomips-linux. + m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-freebsd.o: m_syswrap/syscall-x86-freebsd.S + @am__fastdepCCAS_TRUE@ $(AM_V_CPPAS)$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CCASFLAGS) $(CCASFLAGS) -MT m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-freebsd.o -MD -MP -MF m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-freebsd.Tpo -c -o m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-freebsd.o `test -f 'm_syswrap/syscall-x86-freebsd.S' || echo '$(srcdir)/'`m_syswrap/syscall-x86-freebsd.S + @am__fastdepCCAS_TRUE@ $(AM_V_at)$(am__mv) m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-freebsd.Tpo m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-x86-freebsd.Po +@@ -4644,6 +4758,20 @@ m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-nanomips-linux. @AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCCAS_FALSE@ $(AM_V_CPPAS@am__nodep@)$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CCASFLAGS) $(CCASFLAGS) -c -o m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-nanomips-linux.obj `if test -f 'm_dispatch/dispatch-nanomips-linux.S'; then $(CYGPATH_W) 'm_dispatch/dispatch-nanomips-linux.S'; else $(CYGPATH_W) '$(srcdir)/m_dispatch/dispatch-nanomips-linux.S'; fi` @@ -40926,10 +24793,10 @@ index 2145686..fb68dd4 100644 +@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCCAS_FALSE@ $(AM_V_CPPAS@am__nodep@)$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CCASFLAGS) $(CCASFLAGS) -c -o m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-loongarch64-linux.obj `if test -f 'm_dispatch/dispatch-loongarch64-linux.S'; then $(CYGPATH_W) 'm_dispatch/dispatch-loongarch64-linux.S'; else $(CYGPATH_W) '$(srcdir)/m_dispatch/dispatch-loongarch64-linux.S'; fi` + - m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-darwin.o: m_dispatch/dispatch-x86-darwin.S - @am__fastdepCCAS_TRUE@ $(AM_V_CPPAS)$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CCASFLAGS) $(CCASFLAGS) -MT m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-darwin.o -MD -MP -MF m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-darwin.Tpo -c -o m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-darwin.o `test -f 'm_dispatch/dispatch-x86-darwin.S' || echo '$(srcdir)/'`m_dispatch/dispatch-x86-darwin.S - @am__fastdepCCAS_TRUE@ $(AM_V_at)$(am__mv) m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-darwin.Tpo m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-darwin.Po -@@ -4617,6 +4744,20 @@ m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-nanomips-linux.ob + m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-freebsd.o: m_dispatch/dispatch-x86-freebsd.S + @am__fastdepCCAS_TRUE@ $(AM_V_CPPAS)$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CCASFLAGS) $(CCASFLAGS) -MT m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-freebsd.o -MD -MP -MF m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-freebsd.Tpo -c -o m_dispatch/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-freebsd.o `test -f 'm_dispatch/dispatch-x86-freebsd.S' || echo '$(srcdir)/'`m_dispatch/dispatch-x86-freebsd.S + @am__fastdepCCAS_TRUE@ $(AM_V_at)$(am__mv) m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-freebsd.Tpo m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-x86-freebsd.Po +@@ -4910,6 +5038,20 @@ m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-nanomips-linux.ob @AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCCAS_FALSE@ $(AM_V_CPPAS@am__nodep@)$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CCASFLAGS) $(CCASFLAGS) -c -o m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-nanomips-linux.obj `if test -f 'm_syswrap/syscall-nanomips-linux.S'; then $(CYGPATH_W) 'm_syswrap/syscall-nanomips-linux.S'; else $(CYGPATH_W) '$(srcdir)/m_syswrap/syscall-nanomips-linux.S'; fi` @@ -40947,10 +24814,10 @@ index 2145686..fb68dd4 100644 +@AMDEP_TRUE@@am__fastdepCCAS_FALSE@ DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCCAS_FALSE@ $(AM_V_CPPAS@am__nodep@)$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CCASFLAGS) $(CCASFLAGS) -c -o m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-loongarch64-linux.obj `if test -f 'm_syswrap/syscall-loongarch64-linux.S'; then $(CYGPATH_W) 'm_syswrap/syscall-loongarch64-linux.S'; else $(CYGPATH_W) '$(srcdir)/m_syswrap/syscall-loongarch64-linux.S'; fi` + - m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-darwin.o: m_syswrap/syscall-x86-darwin.S - @am__fastdepCCAS_TRUE@ $(AM_V_CPPAS)$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CCASFLAGS) $(CCASFLAGS) -MT m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-darwin.o -MD -MP -MF m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-darwin.Tpo -c -o m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-darwin.o `test -f 'm_syswrap/syscall-x86-darwin.S' || echo '$(srcdir)/'`m_syswrap/syscall-x86-darwin.S - @am__fastdepCCAS_TRUE@ $(AM_V_at)$(am__mv) m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-darwin.Tpo m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-darwin.Po -@@ -5893,6 +6034,20 @@ m_gdbserver/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-nanomips.o + m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-freebsd.o: m_syswrap/syscall-x86-freebsd.S + @am__fastdepCCAS_TRUE@ $(AM_V_CPPAS)$(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CCASFLAGS) $(CCASFLAGS) -MT m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-freebsd.o -MD -MP -MF m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-freebsd.Tpo -c -o m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-freebsd.o `test -f 'm_syswrap/syscall-x86-freebsd.S' || echo '$(srcdir)/'`m_syswrap/syscall-x86-freebsd.S + @am__fastdepCCAS_TRUE@ $(AM_V_at)$(am__mv) m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-freebsd.Tpo m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-x86-freebsd.Po +@@ -6200,6 +6342,20 @@ m_gdbserver/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-nanomips.o @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -c -o m_gdbserver/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-nanomips.obj `if test -f 'm_gdbserver/valgrind-low-nanomips.c'; then $(CYGPATH_W) 'm_gdbserver/valgrind-low-nanomips.c'; else $(CYGPATH_W) '$(srcdir)/m_gdbserver/valgrind-low-nanomips.c'; fi` @@ -40971,7 +24838,7 @@ index 2145686..fb68dd4 100644 m_gdbserver/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-version.o: m_gdbserver/version.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -MT m_gdbserver/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-version.o -MD -MP -MF m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-version.Tpo -c -o m_gdbserver/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-version.o `test -f 'm_gdbserver/version.c' || echo '$(srcdir)/'`m_gdbserver/version.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-version.Tpo m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-version.Po -@@ -6215,6 +6370,20 @@ m_sigframe/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-nanomips-linux. +@@ -6550,6 +6706,20 @@ m_sigframe/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-nanomips-linux. @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -c -o m_sigframe/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-nanomips-linux.obj `if test -f 'm_sigframe/sigframe-nanomips-linux.c'; then $(CYGPATH_W) 'm_sigframe/sigframe-nanomips-linux.c'; else $(CYGPATH_W) '$(srcdir)/m_sigframe/sigframe-nanomips-linux.c'; fi` @@ -40992,7 +24859,7 @@ index 2145686..fb68dd4 100644 m_sigframe/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-x86-darwin.o: m_sigframe/sigframe-x86-darwin.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -MT m_sigframe/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-x86-darwin.o -MD -MP -MF m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-x86-darwin.Tpo -c -o m_sigframe/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-x86-darwin.o `test -f 'm_sigframe/sigframe-x86-darwin.c' || echo '$(srcdir)/'`m_sigframe/sigframe-x86-darwin.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-x86-darwin.Tpo m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-x86-darwin.Po -@@ -6481,6 +6650,20 @@ m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-nanomips-linux.ob +@@ -6858,6 +7028,20 @@ m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-nanomips-linux.ob @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -c -o m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-nanomips-linux.obj `if test -f 'm_syswrap/syswrap-nanomips-linux.c'; then $(CYGPATH_W) 'm_syswrap/syswrap-nanomips-linux.c'; else $(CYGPATH_W) '$(srcdir)/m_syswrap/syswrap-nanomips-linux.c'; fi` @@ -41013,7 +24880,7 @@ index 2145686..fb68dd4 100644 m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-x86-darwin.o: m_syswrap/syswrap-x86-darwin.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -MT m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-x86-darwin.o -MD -MP -MF m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-x86-darwin.Tpo -c -o m_syswrap/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-x86-darwin.o `test -f 'm_syswrap/syswrap-x86-darwin.c' || echo '$(srcdir)/'`m_syswrap/syswrap-x86-darwin.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-x86-darwin.Tpo m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-x86-darwin.Po -@@ -7881,6 +8064,20 @@ m_gdbserver/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-nanomips.o +@@ -8244,6 +8428,20 @@ m_gdbserver/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-nanomips.o @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -c -o m_gdbserver/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-nanomips.obj `if test -f 'm_gdbserver/valgrind-low-nanomips.c'; then $(CYGPATH_W) 'm_gdbserver/valgrind-low-nanomips.c'; else $(CYGPATH_W) '$(srcdir)/m_gdbserver/valgrind-low-nanomips.c'; fi` @@ -41034,7 +24901,7 @@ index 2145686..fb68dd4 100644 m_gdbserver/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-version.o: m_gdbserver/version.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -MT m_gdbserver/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-version.o -MD -MP -MF m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-version.Tpo -c -o m_gdbserver/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-version.o `test -f 'm_gdbserver/version.c' || echo '$(srcdir)/'`m_gdbserver/version.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-version.Tpo m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-version.Po -@@ -8203,6 +8400,20 @@ m_sigframe/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-nanomips-linux. +@@ -8594,6 +8792,20 @@ m_sigframe/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-nanomips-linux. @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -c -o m_sigframe/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-nanomips-linux.obj `if test -f 'm_sigframe/sigframe-nanomips-linux.c'; then $(CYGPATH_W) 'm_sigframe/sigframe-nanomips-linux.c'; else $(CYGPATH_W) '$(srcdir)/m_sigframe/sigframe-nanomips-linux.c'; fi` @@ -41055,7 +24922,7 @@ index 2145686..fb68dd4 100644 m_sigframe/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-x86-darwin.o: m_sigframe/sigframe-x86-darwin.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -MT m_sigframe/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-x86-darwin.o -MD -MP -MF m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-x86-darwin.Tpo -c -o m_sigframe/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-x86-darwin.o `test -f 'm_sigframe/sigframe-x86-darwin.c' || echo '$(srcdir)/'`m_sigframe/sigframe-x86-darwin.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-x86-darwin.Tpo m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-x86-darwin.Po -@@ -8469,6 +8680,20 @@ m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-nanomips-linux.ob +@@ -8902,6 +9114,20 @@ m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-nanomips-linux.ob @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -c -o m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-nanomips-linux.obj `if test -f 'm_syswrap/syswrap-nanomips-linux.c'; then $(CYGPATH_W) 'm_syswrap/syswrap-nanomips-linux.c'; else $(CYGPATH_W) '$(srcdir)/m_syswrap/syswrap-nanomips-linux.c'; fi` @@ -41076,25 +24943,7 @@ index 2145686..fb68dd4 100644 m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-x86-darwin.o: m_syswrap/syswrap-x86-darwin.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CPPFLAGS) $(CPPFLAGS) $(libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a_CFLAGS) $(CFLAGS) -MT m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-x86-darwin.o -MD -MP -MF m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-x86-darwin.Tpo -c -o m_syswrap/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-x86-darwin.o `test -f 'm_syswrap/syswrap-x86-darwin.c' || echo '$(srcdir)/'`m_syswrap/syswrap-x86-darwin.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-x86-darwin.Tpo m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-x86-darwin.Po -@@ -8975,7 +9200,6 @@ cscopelist-am: $(am__tagged_files) - - distclean-tags: - -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags -- - distdir: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) distdir-am - -@@ -9019,7 +9243,8 @@ installdirs: - done - install: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) install-am --install-exec: install-exec-am -+install-exec: $(BUILT_SOURCES) -+ $(MAKE) $(AM_MAKEFLAGS) install-exec-am - install-data: install-data-am - uninstall: uninstall-am - -@@ -9243,6 +9468,7 @@ distclean: distclean-am +@@ -9786,6 +10012,7 @@ distclean: distclean-am -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-amd64-solaris.Po -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-arm-linux.Po -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-arm64-linux.Po @@ -41102,7 +24951,7 @@ index 2145686..fb68dd4 100644 -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-mips32-linux.Po -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-mips64-linux.Po -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-nanomips-linux.Po -@@ -9258,6 +9484,7 @@ distclean: distclean-am +@@ -9803,6 +10030,7 @@ distclean: distclean-am -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-amd64-solaris.Po -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-arm-linux.Po -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-arm64-linux.Po @@ -41110,7 +24959,7 @@ index 2145686..fb68dd4 100644 -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-mips32-linux.Po -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-mips64-linux.Po -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-nanomips-linux.Po -@@ -9279,6 +9506,7 @@ distclean: distclean-am +@@ -9824,6 +10052,7 @@ distclean: distclean-am -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-amd64.Po -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-arm.Po -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-arm64.Po @@ -41118,7 +24967,7 @@ index 2145686..fb68dd4 100644 -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-mips32.Po -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-mips64.Po -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-nanomips.Po -@@ -9298,6 +9526,7 @@ distclean: distclean-am +@@ -9842,6 +10071,7 @@ distclean: distclean-am -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-amd64.Po -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-arm.Po -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-arm64.Po @@ -41126,7 +24975,7 @@ index 2145686..fb68dd4 100644 -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-mips32.Po -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-mips64.Po -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-nanomips.Po -@@ -9349,6 +9578,7 @@ distclean: distclean-am +@@ -9896,6 +10126,7 @@ distclean: distclean-am -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-arm-linux.Po -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-arm64-linux.Po -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-common.Po @@ -41134,7 +24983,7 @@ index 2145686..fb68dd4 100644 -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-mips32-linux.Po -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-mips64-linux.Po -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-nanomips-linux.Po -@@ -9363,6 +9593,7 @@ distclean: distclean-am +@@ -9912,6 +10143,7 @@ distclean: distclean-am -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-arm-linux.Po -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-arm64-linux.Po -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-common.Po @@ -41142,7 +24991,7 @@ index 2145686..fb68dd4 100644 -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-mips32-linux.Po -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-mips64-linux.Po -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-nanomips-linux.Po -@@ -9377,6 +9608,7 @@ distclean: distclean-am +@@ -9928,6 +10160,7 @@ distclean: distclean-am -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-amd64-solaris.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-arm-linux.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-arm64-linux.Po @@ -41150,7 +24999,7 @@ index 2145686..fb68dd4 100644 -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-mips32-linux.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-mips64-linux.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-nanomips-linux.Po -@@ -9396,6 +9628,7 @@ distclean: distclean-am +@@ -9950,6 +10183,7 @@ distclean: distclean-am -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-generic.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-linux-variants.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-linux.Po @@ -41158,7 +25007,7 @@ index 2145686..fb68dd4 100644 -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-main.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-mips32-linux.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-mips64-linux.Po -@@ -9413,6 +9646,7 @@ distclean: distclean-am +@@ -9969,6 +10203,7 @@ distclean: distclean-am -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-amd64-solaris.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-arm-linux.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-arm64-linux.Po @@ -41166,7 +25015,7 @@ index 2145686..fb68dd4 100644 -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-mips32-linux.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-mips64-linux.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-nanomips-linux.Po -@@ -9432,6 +9666,7 @@ distclean: distclean-am +@@ -9991,6 +10226,7 @@ distclean: distclean-am -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-generic.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-linux-variants.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-linux.Po @@ -41174,7 +25023,7 @@ index 2145686..fb68dd4 100644 -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-main.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-mips32-linux.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-mips64-linux.Po -@@ -9658,6 +9893,7 @@ maintainer-clean: maintainer-clean-am +@@ -10223,6 +10459,7 @@ maintainer-clean: maintainer-clean-am -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-amd64-solaris.Po -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-arm-linux.Po -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-arm64-linux.Po @@ -41182,7 +25031,7 @@ index 2145686..fb68dd4 100644 -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-mips32-linux.Po -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-mips64-linux.Po -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-dispatch-nanomips-linux.Po -@@ -9673,6 +9909,7 @@ maintainer-clean: maintainer-clean-am +@@ -10240,6 +10477,7 @@ maintainer-clean: maintainer-clean-am -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-amd64-solaris.Po -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-arm-linux.Po -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-arm64-linux.Po @@ -41190,7 +25039,7 @@ index 2145686..fb68dd4 100644 -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-mips32-linux.Po -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-mips64-linux.Po -rm -f m_dispatch/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-dispatch-nanomips-linux.Po -@@ -9694,6 +9931,7 @@ maintainer-clean: maintainer-clean-am +@@ -10261,6 +10499,7 @@ maintainer-clean: maintainer-clean-am -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-amd64.Po -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-arm.Po -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-arm64.Po @@ -41198,7 +25047,7 @@ index 2145686..fb68dd4 100644 -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-mips32.Po -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-mips64.Po -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-valgrind-low-nanomips.Po -@@ -9713,6 +9951,7 @@ maintainer-clean: maintainer-clean-am +@@ -10279,6 +10518,7 @@ maintainer-clean: maintainer-clean-am -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-amd64.Po -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-arm.Po -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-arm64.Po @@ -41206,7 +25055,7 @@ index 2145686..fb68dd4 100644 -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-mips32.Po -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-mips64.Po -rm -f m_gdbserver/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-valgrind-low-nanomips.Po -@@ -9764,6 +10003,7 @@ maintainer-clean: maintainer-clean-am +@@ -10333,6 +10573,7 @@ maintainer-clean: maintainer-clean-am -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-arm-linux.Po -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-arm64-linux.Po -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-common.Po @@ -41214,7 +25063,7 @@ index 2145686..fb68dd4 100644 -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-mips32-linux.Po -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-mips64-linux.Po -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-sigframe-nanomips-linux.Po -@@ -9778,6 +10018,7 @@ maintainer-clean: maintainer-clean-am +@@ -10349,6 +10590,7 @@ maintainer-clean: maintainer-clean-am -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-arm-linux.Po -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-arm64-linux.Po -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-common.Po @@ -41222,7 +25071,7 @@ index 2145686..fb68dd4 100644 -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-mips32-linux.Po -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-mips64-linux.Po -rm -f m_sigframe/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-sigframe-nanomips-linux.Po -@@ -9792,6 +10033,7 @@ maintainer-clean: maintainer-clean-am +@@ -10365,6 +10607,7 @@ maintainer-clean: maintainer-clean-am -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-amd64-solaris.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-arm-linux.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-arm64-linux.Po @@ -41230,7 +25079,7 @@ index 2145686..fb68dd4 100644 -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-mips32-linux.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-mips64-linux.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syscall-nanomips-linux.Po -@@ -9811,6 +10053,7 @@ maintainer-clean: maintainer-clean-am +@@ -10387,6 +10630,7 @@ maintainer-clean: maintainer-clean-am -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-generic.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-linux-variants.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-linux.Po @@ -41238,7 +25087,7 @@ index 2145686..fb68dd4 100644 -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-main.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-mips32-linux.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_a-syswrap-mips64-linux.Po -@@ -9828,6 +10071,7 @@ maintainer-clean: maintainer-clean-am +@@ -10406,6 +10650,7 @@ maintainer-clean: maintainer-clean-am -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-amd64-solaris.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-arm-linux.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-arm64-linux.Po @@ -41246,7 +25095,7 @@ index 2145686..fb68dd4 100644 -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-mips32-linux.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-mips64-linux.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syscall-nanomips-linux.Po -@@ -9847,6 +10091,7 @@ maintainer-clean: maintainer-clean-am +@@ -10428,6 +10673,7 @@ maintainer-clean: maintainer-clean-am -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-generic.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-linux-variants.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-linux.Po @@ -41254,17 +25103,8 @@ index 2145686..fb68dd4 100644 -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-main.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-mips32-linux.Po -rm -f m_syswrap/$(DEPDIR)/libcoregrind_@VGCONF_ARCH_SEC@_@VGCONF_OS@_a-syswrap-mips64-linux.Po -@@ -9885,7 +10130,7 @@ ps-am: - uninstall-am: uninstall-binPROGRAMS uninstall-local \ - uninstall-pkglibLIBRARIES uninstall-vglibDATA - --.MAKE: all check install install-am install-strip -+.MAKE: all check install install-am install-exec install-strip - - .PHONY: CTAGS GTAGS TAGS all all-am all-local am--depfiles check \ - check-am clean clean-binPROGRAMS clean-generic clean-local \ diff --git a/coregrind/launcher-linux.c b/coregrind/launcher-linux.c -index 7a12248..73fdb15 100644 +index bc95e3c..5307fd1 100644 --- a/coregrind/launcher-linux.c +++ b/coregrind/launcher-linux.c @@ -67,6 +67,10 @@ @@ -41300,10 +25140,10 @@ index 7a12248..73fdb15 100644 # elif defined(VGO_solaris) if ((0==strcmp(VG_PLATFORM,"x86-solaris")) || diff --git a/coregrind/m_aspacemgr/aspacemgr-common.c b/coregrind/m_aspacemgr/aspacemgr-common.c -index 214b54a..bcbbf2d 100644 +index 816d227..0e79d3f 100644 --- a/coregrind/m_aspacemgr/aspacemgr-common.c +++ b/coregrind/m_aspacemgr/aspacemgr-common.c -@@ -156,7 +156,8 @@ SysRes VG_(am_do_mmap_NO_NOTIFY)( Addr start, SizeT length, UInt prot, +@@ -157,7 +157,8 @@ SysRes VG_(am_do_mmap_NO_NOTIFY)( Addr start, SizeT length, UInt prot, # elif defined(VGP_amd64_linux) \ || defined(VGP_ppc64be_linux) || defined(VGP_ppc64le_linux) \ || defined(VGP_s390x_linux) || defined(VGP_mips32_linux) \ @@ -41313,7 +25153,7 @@ index 214b54a..bcbbf2d 100644 res = VG_(do_syscall6)(__NR_mmap, (UWord)start, length, prot, flags, fd, offset); # elif defined(VGP_x86_darwin) -@@ -251,7 +252,8 @@ SysRes ML_(am_do_relocate_nooverlap_mapping_NO_NOTIFY)( +@@ -262,7 +263,8 @@ SysRes ML_(am_do_relocate_nooverlap_mapping_NO_NOTIFY)( SysRes ML_(am_open) ( const HChar* pathname, Int flags, Int mode ) { @@ -41323,7 +25163,7 @@ index 214b54a..bcbbf2d 100644 /* ARM64 wants to use __NR_openat rather than __NR_open. */ SysRes res = VG_(do_syscall4)(__NR_openat, VKI_AT_FDCWD, (UWord)pathname, flags, mode); -@@ -280,7 +282,8 @@ void ML_(am_close) ( Int fd ) +@@ -291,7 +293,8 @@ void ML_(am_close) ( Int fd ) Int ML_(am_readlink)(const HChar* path, HChar* buf, UInt bufsiz) { SysRes res; @@ -41332,12 +25172,12 @@ index 214b54a..bcbbf2d 100644 + || defined(VGP_loongarch64_linux) res = VG_(do_syscall4)(__NR_readlinkat, VKI_AT_FDCWD, (UWord)path, (UWord)buf, bufsiz); - # elif defined(VGO_linux) || defined(VGO_darwin) + # elif defined(VGO_linux) || defined(VGO_darwin) || defined(VGO_freebsd) diff --git a/coregrind/m_aspacemgr/aspacemgr-linux.c b/coregrind/m_aspacemgr/aspacemgr-linux.c -index 0eb3143..fe21a44 100644 +index 232401e..a88412d 100644 --- a/coregrind/m_aspacemgr/aspacemgr-linux.c +++ b/coregrind/m_aspacemgr/aspacemgr-linux.c -@@ -2680,7 +2680,8 @@ static SysRes VG_(am_mmap_file_float_valgrind_flags) ( SizeT length, UInt prot, +@@ -2777,7 +2777,8 @@ static SysRes VG_(am_mmap_file_float_valgrind_flags) ( SizeT length, UInt prot, req.rkind = MAny; req.start = 0; #if defined(VGA_arm) || defined(VGA_arm64) \ @@ -41592,10 +25432,10 @@ index 428a4df..38fa44e 100644 #error "Unknown arch" diff --git a/coregrind/m_coredump/coredump-elf.c b/coregrind/m_coredump/coredump-elf.c -index daf85e6..b168bbb 100644 +index 4a8c29c..82b1b43 100644 --- a/coregrind/m_coredump/coredump-elf.c +++ b/coregrind/m_coredump/coredump-elf.c -@@ -461,6 +461,40 @@ static void fill_prstatus(const ThreadState *tst, +@@ -489,6 +489,40 @@ static void fill_prstatus(const ThreadState *tst, regs[VKI_MIPS32_EF_CP0_STATUS] = arch->vex.guest_CP0_status; regs[VKI_MIPS32_EF_CP0_EPC] = arch->vex.guest_PC; # undef DO @@ -41633,32 +25473,32 @@ index daf85e6..b168bbb 100644 + regs->regs[30] = arch->vex.guest_R30; + regs->regs[31] = arch->vex.guest_R31; + regs->csr_era = arch->vex.guest_PC; - #else - # error Unknown ELF platform - #endif -@@ -587,6 +621,14 @@ static void fill_fpu(const ThreadState *tst, vki_elf_fpregset_t *fpu) + #elif defined(VGP_amd64_freebsd) + regs->rflags = LibVEX_GuestAMD64_get_rflags( &arch->vex ); + regs->rsp = arch->vex.guest_RSP; +@@ -654,6 +688,14 @@ static void fill_fpu(const ThreadState *tst, vki_elf_fpregset_t *fpu) # undef DO #elif defined(VGP_nanomips_linux) +#elif defined(VGP_loongarch64_linux) -+# define DO(n) (*fpu)[n] = *(const double*)(&arch->vex.guest_F##n) ++# define DO(n) (*fpu)[n] = *(const double*)(&arch->vex.guest_X##n) + DO(0); DO(1); DO(2); DO(3); DO(4); DO(5); DO(6); DO(7); + DO(8); DO(9); DO(10); DO(11); DO(12); DO(13); DO(14); DO(15); + DO(16); DO(17); DO(18); DO(19); DO(20); DO(21); DO(22); DO(23); + DO(24); DO(25); DO(26); DO(27); DO(28); DO(29); DO(30); DO(31); +# undef DO + - #else - # error Unknown ELF platform - #endif + #elif defined(VGP_x86_freebsd) + + #elif defined(VGP_amd64_freebsd) diff --git a/coregrind/m_debuginfo/d3basics.c b/coregrind/m_debuginfo/d3basics.c -index b6d13c1..9faf90c 100644 +index bcfd456..222496e 100644 --- a/coregrind/m_debuginfo/d3basics.c +++ b/coregrind/m_debuginfo/d3basics.c -@@ -424,6 +424,9 @@ static Bool get_Dwarf_Reg( /*OUT*/Addr* a, Word regno, const RegSummary* regs ) - if (regno == 30) { *a = regs->fp; return True; } +@@ -555,6 +555,9 @@ static Bool get_Dwarf_Reg( /*OUT*/Addr* a, Word regno, const RegSummary* regs ) # elif defined(VGP_arm64_linux) if (regno == 31) { *a = regs->sp; return True; } + if (regno == 29) { *a = regs->fp; return True; } +# elif defined(VGP_loongarch64_linux) + if (regno == 3) { *a = regs->sp; return True; } + if (regno == 22) { *a = regs->fp; return True; } @@ -41666,10 +25506,10 @@ index b6d13c1..9faf90c 100644 # error "Unknown platform" # endif diff --git a/coregrind/m_debuginfo/debuginfo.c b/coregrind/m_debuginfo/debuginfo.c -index 13e528e..4557c27 100644 +index eed134b..32ac008 100644 --- a/coregrind/m_debuginfo/debuginfo.c +++ b/coregrind/m_debuginfo/debuginfo.c -@@ -1174,7 +1174,7 @@ ULong VG_(di_notify_mmap)( Addr a, Bool allow_SkFileV, Int use_fd ) +@@ -1300,7 +1300,7 @@ ULong VG_(di_notify_mmap)( Addr a, Bool allow_SkFileV, Int use_fd ) is_ro_map = False; # if defined(VGA_x86) || defined(VGA_ppc32) || defined(VGA_mips32) \ @@ -41678,10 +25518,10 @@ index 13e528e..4557c27 100644 is_rx_map = seg->hasR && seg->hasX; is_rw_map = seg->hasR && seg->hasW; # elif defined(VGA_amd64) || defined(VGA_ppc64be) || defined(VGA_ppc64le) \ -@@ -2876,6 +2876,11 @@ UWord evalCfiExpr ( const XArray* exprs, Int ix, - || defined(VGA_ppc64le) - # elif defined(VGP_arm64_linux) +@@ -3116,6 +3116,11 @@ UWord evalCfiExpr ( const XArray* exprs, Int ix, + case Creg_ARM64_SP: return eec->uregs->sp; case Creg_ARM64_X30: return eec->uregs->x30; + case Creg_ARM64_X29: return eec->uregs->x29; +# elif defined(VGA_loongarch64) + case Creg_LOONGARCH64_PC: return eec->uregs->pc; + case Creg_LOONGARCH64_RA: return eec->uregs->ra; @@ -41690,7 +25530,7 @@ index 13e528e..4557c27 100644 # else # error "Unsupported arch" # endif -@@ -3147,6 +3152,13 @@ static Addr compute_cfa ( const D3UnwindRegs* uregs, +@@ -3389,6 +3394,13 @@ static Addr compute_cfa ( const D3UnwindRegs* uregs, case CFIC_ARM64_X29REL: cfa = cfsi_m->cfa_off + uregs->x29; break; @@ -41704,7 +25544,7 @@ index 13e528e..4557c27 100644 # else # error "Unsupported arch" # endif -@@ -3218,6 +3230,14 @@ Addr ML_(get_CFA) ( Addr ip, Addr sp, Addr fp, +@@ -3460,6 +3472,14 @@ Addr ML_(get_CFA) ( Addr ip, Addr sp, Addr fp, return compute_cfa(&uregs, min_accessible, max_accessible, ce->di, ce->cfsi_m); } @@ -41719,7 +25559,7 @@ index 13e528e..4557c27 100644 # else return 0; /* indicates failure */ -@@ -3269,6 +3289,8 @@ void VG_(ppUnwindInfo) (Addr from, Addr to) +@@ -3511,6 +3531,8 @@ void VG_(ppUnwindInfo) (Addr from, Addr to) For arm64, the unwound registers are: X29(FP) X30(LR) SP PC. For s390, the unwound registers are: R11(FP) R14(LR) R15(SP) F0..F7 PC. @@ -41728,7 +25568,7 @@ index 13e528e..4557c27 100644 */ Bool VG_(use_CF_info) ( /*MOD*/D3UnwindRegs* uregsHere, Addr min_accessible, -@@ -3292,6 +3314,8 @@ Bool VG_(use_CF_info) ( /*MOD*/D3UnwindRegs* uregsHere, +@@ -3534,6 +3556,8 @@ Bool VG_(use_CF_info) ( /*MOD*/D3UnwindRegs* uregsHere, # elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le) # elif defined(VGP_arm64_linux) ipHere = uregsHere->pc; @@ -41737,7 +25577,7 @@ index 13e528e..4557c27 100644 # else # error "Unknown arch" # endif -@@ -3437,6 +3461,10 @@ Bool VG_(use_CF_info) ( /*MOD*/D3UnwindRegs* uregsHere, +@@ -3679,6 +3703,10 @@ Bool VG_(use_CF_info) ( /*MOD*/D3UnwindRegs* uregsHere, COMPUTE(uregsPrev.sp, uregsHere->sp, cfsi_m->sp_how, cfsi_m->sp_off); COMPUTE(uregsPrev.x30, uregsHere->x30, cfsi_m->x30_how, cfsi_m->x30_off); COMPUTE(uregsPrev.x29, uregsHere->x29, cfsi_m->x29_how, cfsi_m->x29_off); @@ -41749,7 +25589,7 @@ index 13e528e..4557c27 100644 # error "Unknown arch" # endif diff --git a/coregrind/m_debuginfo/priv_storage.h b/coregrind/m_debuginfo/priv_storage.h -index 39456ec..8eb764d 100644 +index 441b379..41224a8 100644 --- a/coregrind/m_debuginfo/priv_storage.h +++ b/coregrind/m_debuginfo/priv_storage.h @@ -367,6 +367,19 @@ typedef @@ -41772,7 +25612,7 @@ index 39456ec..8eb764d 100644 #else # error "Unknown arch" #endif -@@ -420,7 +433,11 @@ typedef +@@ -422,7 +435,11 @@ typedef Creg_S390_SP, Creg_S390_FP, Creg_S390_LR, @@ -41786,10 +25626,10 @@ index 39456ec..8eb764d 100644 CfiReg; diff --git a/coregrind/m_debuginfo/readdwarf.c b/coregrind/m_debuginfo/readdwarf.c -index 5701c50..a4fe217 100644 +index 7b8187e..13363ae 100644 --- a/coregrind/m_debuginfo/readdwarf.c +++ b/coregrind/m_debuginfo/readdwarf.c -@@ -1730,6 +1730,10 @@ void ML_(read_debuginfo_dwarf1) ( +@@ -2066,6 +2066,10 @@ void ML_(read_debuginfo_dwarf1) ( # define FP_REG 30 # define SP_REG 29 # define RA_REG_DEFAULT 31 @@ -41800,7 +25640,7 @@ index 5701c50..a4fe217 100644 #else # error "Unknown platform" #endif -@@ -1748,6 +1752,8 @@ void ML_(read_debuginfo_dwarf1) ( +@@ -2084,6 +2088,8 @@ void ML_(read_debuginfo_dwarf1) ( # define N_CFI_REGS 128 #elif defined(VGP_s390x_linux) # define N_CFI_REGS 66 @@ -41809,7 +25649,7 @@ index 5701c50..a4fe217 100644 #else # define N_CFI_REGS 20 #endif -@@ -1974,6 +1980,10 @@ static void initUnwindContext ( /*OUT*/UnwindContext* ctx ) +@@ -2310,6 +2316,10 @@ static void initUnwindContext ( /*OUT*/UnwindContext* ctx ) start out as RR_Same. */ ctx->state[j].reg[29/*FP*/].tag = RR_Same; ctx->state[j].reg[30/*LR*/].tag = RR_Same; @@ -41820,7 +25660,7 @@ index 5701c50..a4fe217 100644 # endif } } -@@ -2056,7 +2066,8 @@ static Bool summarise_context(/*OUT*/Addr* base, +@@ -2392,7 +2402,8 @@ static Bool summarise_context(/*OUT*/Addr* base, if (ctxs->cfa_is_regoff && ctxs->cfa_reg == SP_REG) { si_m->cfa_off = ctxs->cfa_off; # if defined(VGA_x86) || defined(VGA_amd64) || defined(VGA_s390x) \ @@ -41830,7 +25670,7 @@ index 5701c50..a4fe217 100644 si_m->cfa_how = CFIC_IA_SPREL; # elif defined(VGA_arm) si_m->cfa_how = CFIC_ARM_R13REL; -@@ -2070,7 +2081,8 @@ static Bool summarise_context(/*OUT*/Addr* base, +@@ -2406,7 +2417,8 @@ static Bool summarise_context(/*OUT*/Addr* base, if (ctxs->cfa_is_regoff && ctxs->cfa_reg == FP_REG) { si_m->cfa_off = ctxs->cfa_off; # if defined(VGA_x86) || defined(VGA_amd64) || defined(VGA_s390x) \ @@ -41840,7 +25680,7 @@ index 5701c50..a4fe217 100644 si_m->cfa_how = CFIC_IA_BPREL; # elif defined(VGA_arm) si_m->cfa_how = CFIC_ARM_R12REL; -@@ -2450,6 +2462,30 @@ static Bool summarise_context(/*OUT*/Addr* base, +@@ -2786,6 +2798,30 @@ static Bool summarise_context(/*OUT*/Addr* base, # elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le) /* These don't use CFI based unwinding (is that really true?) */ @@ -41871,8 +25711,8 @@ index 5701c50..a4fe217 100644 # else # error "Unknown arch" # endif -@@ -2544,6 +2580,13 @@ static Int copy_convert_CfiExpr_tree ( XArray* dstxa, - I_die_here; +@@ -2885,6 +2921,13 @@ static Int copy_convert_CfiExpr_tree ( XArray* dstxa, + return ML_(CfiExpr_CfiReg)( dstxa, Creg_ARM64_X30 ); # elif defined(VGA_ppc32) || defined(VGA_ppc64be) \ || defined(VGA_ppc64le) +# elif defined(VGA_loongarch64) @@ -41886,10 +25726,10 @@ index 5701c50..a4fe217 100644 # error "Unknown arch" # endif diff --git a/coregrind/m_debuginfo/readelf.c b/coregrind/m_debuginfo/readelf.c -index bc5a732..9ef75b6 100644 +index fb64ed9..5e77c79 100644 --- a/coregrind/m_debuginfo/readelf.c +++ b/coregrind/m_debuginfo/readelf.c -@@ -1561,7 +1561,8 @@ static HChar* readlink_path (const HChar *path) +@@ -1781,7 +1781,8 @@ static HChar* readlink_path (const HChar *path) while (tries > 0) { SysRes res; @@ -41898,17 +25738,20 @@ index bc5a732..9ef75b6 100644 + || defined(VGP_loongarch64_linux) res = VG_(do_syscall4)(__NR_readlinkat, VKI_AT_FDCWD, (UWord)path, (UWord)buf, bufsiz); - #elif defined(VGO_linux) || defined(VGO_darwin) -@@ -2403,6 +2404,7 @@ Bool ML_(read_elf_debug_info) ( struct _DebugInfo* di ) + #elif defined(VGO_linux) || defined(VGO_darwin) || defined(VGO_freebsd) +@@ -2702,8 +2703,9 @@ Bool ML_(read_elf_object) ( struct _DebugInfo* di ) || defined(VGP_arm_linux) || defined (VGP_s390x_linux) \ || defined(VGP_mips32_linux) || defined(VGP_mips64_linux) \ || defined(VGP_arm64_linux) || defined(VGP_nanomips_linux) \ + || defined(VGP_loongarch64_linux) \ - || defined(VGP_x86_solaris) || defined(VGP_amd64_solaris) + || defined(VGP_x86_solaris) || defined(VGP_amd64_solaris) \ +- || defined(VGP_x86_freebsd) || defined(VGP_amd64_freebsd) ++ || defined(VGP_x86_freebsd) || defined(VGP_amd64_freebsd) \ /* Accept .plt where mapped as rx (code) */ if (0 == VG_(strcmp)(name, ".plt")) { + if (inrx && !di->plt_present) { diff --git a/coregrind/m_debuginfo/storage.c b/coregrind/m_debuginfo/storage.c -index 2a975dc..9d5027b 100644 +index 961d767..fbfe027 100644 --- a/coregrind/m_debuginfo/storage.c +++ b/coregrind/m_debuginfo/storage.c @@ -260,6 +260,11 @@ void ML_(ppDiCfSI) ( const XArray* /* of CfiExpr */ exprs, @@ -41923,7 +25766,7 @@ index 2a975dc..9d5027b 100644 # else # error "Unknown arch" # endif -@@ -1008,6 +1013,10 @@ static void ppCfiReg ( CfiReg reg ) +@@ -1010,6 +1015,10 @@ static void ppCfiReg ( CfiReg reg ) case Creg_S390_SP: VG_(printf)("SP"); break; case Creg_S390_FP: VG_(printf)("FP"); break; case Creg_S390_LR: VG_(printf)("LR"); break; @@ -41935,10 +25778,10 @@ index 2a975dc..9d5027b 100644 } } diff --git a/coregrind/m_debuglog.c b/coregrind/m_debuglog.c -index ce4714d..4cf6323 100644 +index fd6db4b..eacc73b 100644 --- a/coregrind/m_debuglog.c +++ b/coregrind/m_debuglog.c -@@ -518,6 +518,41 @@ static UInt local_sys_getpid ( void ) +@@ -601,6 +601,41 @@ static UInt local_sys_getpid ( void ) return a0; } @@ -42453,12 +26296,201 @@ index 0000000..fadca8b + + + +diff --git a/coregrind/m_gdbserver/loongarch-fpu64-valgrind-s1.xml b/coregrind/m_gdbserver/loongarch-fpu64-valgrind-s1.xml +new file mode 100644 +index 0000000..b5c7cab +--- /dev/null ++++ b/coregrind/m_gdbserver/loongarch-fpu64-valgrind-s1.xml +@@ -0,0 +1,57 @@ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/coregrind/m_gdbserver/loongarch-fpu64-valgrind-s2.xml b/coregrind/m_gdbserver/loongarch-fpu64-valgrind-s2.xml +new file mode 100644 +index 0000000..501660e +--- /dev/null ++++ b/coregrind/m_gdbserver/loongarch-fpu64-valgrind-s2.xml +@@ -0,0 +1,57 @@ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/coregrind/m_gdbserver/loongarch-fpu64.xml b/coregrind/m_gdbserver/loongarch-fpu64.xml +new file mode 100644 +index 0000000..74ab55a +--- /dev/null ++++ b/coregrind/m_gdbserver/loongarch-fpu64.xml +@@ -0,0 +1,57 @@ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ diff --git a/coregrind/m_gdbserver/loongarch64-linux-valgrind.xml b/coregrind/m_gdbserver/loongarch64-linux-valgrind.xml new file mode 100644 -index 0000000..dc997f1 +index 0000000..8915a72 --- /dev/null +++ b/coregrind/m_gdbserver/loongarch64-linux-valgrind.xml -@@ -0,0 +1,15 @@ +@@ -0,0 +1,18 @@ + +