# aichip-lucholesky

**Repository Path**: ssslab/aichip-lucholesky

## Basic Information

- **Project Name**: aichip-lucholesky
- **Description**: Implementing LU and Cholesky Factorizations on Artificial Intelligence Accelerators
- **Primary Language**: Unknown
- **License**: Apache-2.0
- **Default Branch**: master
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 3
- **Forks**: 0
- **Created**: 2021-10-18
- **Last Updated**: 2022-12-05

## Categories & Tags

**Categories**: Uncategorized

**Tags**: None

## README

## Implementing LU and Cholesky Factorizations on Artifcial Intelligence Accelerators

We in this  work implement LU and Cholesky factorizations on novel massively parallel artifcial intelligence (AI) accelerators originally  developed for deep neural network applications. We explore data parallelism of the matrix factorizations, and exploit neural  compute units and on-chip scratchpad memories of modern AI chips for accelerating them. The experimental results show  that our various optimization methods bring performance improvements and can provide up to 41.54 and 19.77 GFlop/s  performance using single precision data type and 78.37 and 33.85 GFlop/s performance using half precision data type for  LU and Cholesky factorizations on a Cambricon AI accelerator, respectively.

- See the [LU Guide](https://gitee.com/ssslab/aichip-lucholesky/blob/master/LU) for a detailed introduction of the starting of LU factrization.

- See the [Cholesky Guide](https://gitee.com/ssslab/aichip-lucholesky/blob/master/Cholesky) for a detailed introduction of the starting of Cholesky factrization.