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Compact Universal Timing Endpoint Based on White Rabbit with Xilinx Artix7 The Cute-WR series are standalone White Rabbit Node implementations on FPGA Mezzanine Card form factor. The idea is to have a compact, low-cost and common WR NIC for synchronous DAQ front-ends and other applications! Cute-WR shows the feasibility of the idea; while the Cute-WR-DP expands the Cute-WR to two SFP ports that can support various operation modes. The Cute-WR-A7 is the enhanced version of the CUTE-WR-DP with an Xilinx Artix7 series FPGA. It inherits similar interfaces from Cute-WR-DP: two SFP ports, two SMA/LEMO connectors, FMC form factor with LPC connector, etc. The three operation modes of Cute-WR-DP are also supported by Cute-WR-A7: Normal mode (Cute-WR-A7-NM) In Normal mode, Cute-WR-A7 acts as a normal WR node with one SFP port (SFP0). Cascade mode (Cute-WR-A7-CM) In CM mode, two ports act as one down-link (SFP1) and one up-link (SFP0) to support cascade topology. Two ports also support a simple switch function for normal Ethernet packets. Parallel mode (Cute-WR-A7-PM) In PM mode both ports act as down-link port connect to different WRS, provide redundancy to improve the reliability for safety related applications. The current firmware doesn't support this function. More information: https://ohwr.org/project/cute-wr-a7/wikis/home Hardware Features: XC7A35T-2CSG325I (XC7A50T-2CSG325I compatible) Two SFP sockets that support WR 128Mb QSPI FLASH (N25Q128A13ESE40F) 512Kb I2C EEPROM (24FC512-I/SM) UART port (TTL level with 3-state buffer) VITA57 FMC mezzanine with LPC connector Ruggedized conduction cooled form factor AD9516 for the main PLL Mounting options for various VCXOs Two delay adjustable output channels (11ps increments, 6ns range) 1-Wire Temperature sensor Current sensor 2 LEMO/SMA for the delay adjustable output 4 front panel LEDs or two bi-color LEDs 3.3v power supply, 2.5A CUTE-WR-A7 V1.2 HW PIN HW Product - HW PCB - SDC - TOP Signal Name - Function 1. Frontend AUX0 - SYNC_DATA0 - B9/A9 - SYNC_CLK_10M_O_P/N - 10M Sync Clock Output 2. Frontend AUX1 - SYNC_DATA1 - D8/C8 - PPS_O_P/N - PPS Output 3. Status 0 GREEN - LED_0 - H14 - LED_GREEN_O[0] - Port 0 Link&Sync 4. Status 0 RED - LED_1 - G14 - LED_RED_O[0] - Port 0 Activity 5. Status 1 GREEN - LED_2 - H17 - LED_GREEN_O[1] - Port 1 Link&Sync 6. Status 1 RED - LED_3 - E18 - LED_RED_O[1] - Port 1 Activity 7. EXT_RX - EXT_RX - R16 - UART_RX_I - UART RX 8. EXT_TX - EXT_TX - R17 - UART_TX_O - UART TX 9. RESET - EXT_RESV_I - K15 - RESET_N - RESET Signal, low valid 10. LOCK - EXT_RESV_O - B17 - LOCK - LOCK Signal, high valid 11. FMC WRN_PLL_Clock - GBTCLK0_M2C_P(N) - AD9516 OUT9 - - 125MHz PLL Output 12. FMC TOD_IN - LA17_CC_P - P4 - GM_FMC_TOD_IN - TOD IN 13. FMC PPS_IN - LA17_CC_N - P3 - GM_FMC_PPS_IN - PPS IN 14. FMC TOD_TERM_EN - LA12_P - B16 - GM_FMC_TOD_TERM_EN - TOD TERM EN 15. FMC TOD_OUT - LA23_P - V8 - GM_FMC_TOD_OUT - TOD OUT 16. FMC PPS_TERM_EN - LA26_N - L2 - GM_FMC_PPS_TERM_EN - PPS TERM EN 17. FMC GM_PLL_RESET - LA28_N - V6 - GM_FMC_EXT_PLL_RESET - PLL RESET 18. FMC GM_PLL_CS - LA30_P - R3 - GM_FMC_EXT_PLL_CS - PLL_CS 19. FMC GM_PLL_SCLK - LA30_N - T2 - GM_FMC_EXT_PLL_SCLK - PLL_SCLK 20. FMC GM_PLL_SDI - LA31_P - U4 - GM_FMC_EXT_PLL_SDI - PLL_SDI 21. FMC GM_PLL_SDO - LA31_N - V4 - GM_FMC_EXT_PLL_SDO - PLL_SDO 22. FMC GM_PLL_REFSEL - LA32_P - L4 - GM_FMC_EXT_PLL_REFSEL - PLL_REFSEL 23. FMC GM_PLL_LOCK - LA32_N - L3 - GM_FMC_EXT_PLL_LOCK - PLL_LOCK 24. FMC GM_PLL_SYNC - LA33_P - R2 - GM_FMC_EXT_PLL_SYNC - PLL_SYNC 25. FMC GM_PLL_STAT - LA33_N - R1 - GM_FMC_EXT_PLL_STAT - PLL_STAT 26. FMC PLL_OUT6_P/N - CLK0_M2C_P/N - D13/C13 - GM_FMC_EXT_PLL_OUT6_P/N - 62.5M IN 27. FMC EXT_CLK_IN_P/N - CLK1_M2C_P/N - E13/D14 - GM_FMC_EXT_CLK_IN_P/N - 10M In 27. FMC SYS_CLK_OUT_P/N- LA18_CC_P/N - E16/D16 - GM_SYS_CLK_OUT_P/N - 62.5M OUT
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