# riscv-elf-psabi-doc

**Repository Path**: wang-chuange/riscv-elf-psabi-doc

## Basic Information

- **Project Name**: riscv-elf-psabi-doc
- **Description**: No description available
- **Primary Language**: Unknown
- **License**: CC-BY-4.0
- **Default Branch**: master
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 0
- **Forks**: 0
- **Created**: 2024-06-04
- **Last Updated**: 2024-06-04

## Categories & Tags

**Categories**: Uncategorized

**Tags**: None

## README

# RISC-V ELF psABI Document
Processor-specific application binary interface document for RISC-V.

This document includes the following items:
- Procedure Calling Convention
- ELF Object Files Format
- DWARF Debug Information Format
- Code Model
- Relocation
- Relaxation

The AsciiDoc sources can be rendered by GitHub, and pre-built PDFs can be downloaded from the repository's [releases](https://github.com/riscv/riscv-elf-psabi-doc/releases).

# Navigation
----------------------------------------------------------------------------------------------------------
Name                                | URL                                                   | Description
------------------------------------|-------------------------------------------------------|--------------
RISC-V ELF psABI                    | https://github.com/riscv-non-isa/riscv-elf-psabi-doc  | Processor-specific application binary interface document.
RISC-V Embedded ABI (Draft)         | https://github.com/riscv-non-isa/riscv-eabi-spec      | Proposal for new Embedded ABI (EABI) for use in embedded RISC-V systems.
RISC-V C API                        | https://github.com/riscv-non-isa/riscv-c-api-doc      | RISC-V-specific predefined macros, function attributes and language extensions.
RISC-V Assembly Programmer's Manual | https://github.com/riscv-non-isa/riscv-asm-manual     | Document for pseudoinstructions and assembly directives.
RISC-V Toolchain Conventions        | https://github.com/riscv-non-isa/riscv-toolchain-conventions  | RISC-V-specific toolchain behavior and command line option.
RISC-V Semihosting Spec             | https://github.com/riscv/riscv-semihosting-spec       | Spec for semihosting.
RISC-V Supervisor Binary Interface  | https://github.com/riscv-non-isa/riscv-sbi-doc        | Spec for SBI.

# Links
[Policy for Merging Pull Requests](policy.md)