# nbulsi-mockturtle
**Repository Path**: zfchu/nbulsi-mockturtle
## Basic Information
- **Project Name**: nbulsi-mockturtle
- **Description**: No description available
- **Primary Language**: Unknown
- **License**: MIT
- **Default Branch**: master
- **Homepage**: None
- **GVP Project**: No
## Statistics
- **Stars**: 1
- **Forks**: 4
- **Created**: 2021-03-20
- **Last Updated**: 2025-04-02
## Categories & Tags
**Categories**: Uncategorized
**Tags**: None
## README
[](https://github.com/lsils/mockturtle/actions)
[](https://github.com/lsils/mockturtle/actions)
[](https://github.com/lsils/mockturtle/actions)
[](https://codecov.io/gh/lsils/mockturtle)
[](http://mockturtle.readthedocs.io/en/latest/?badge=latest)
[](https://opensource.org/licenses/MIT)
# mockturtle
mockturtle is a C++-17 logic network library. It provides several logic
network implementations (such as And-inverter graphs, Majority-inverter graphs,
and k-LUT networks), and generic algorithms for logic synthesis and logic
optimization.
[Read the full documentation.](http://mockturtle.readthedocs.io/en/latest/?badge=latest)
## Example
The following code snippet reads an AIG from an Aiger file, enumerates all cuts
and prints them for each node.
```c++
#include
#include
mockturtle::aig_network aig;
auto const result = lorina::read_aiger( "file.aig", mockturtle::aiger_reader( aig ) );
assert( result == lorina::return_code::success );
auto const cuts = cut_enumeration( aig );
aig.foreach_node( [&]( auto node ) {
std::cout << cuts.cuts( aig.node_to_index( node ) ) << "\n";
} );
```
## Installation requirements
A modern compiler is required to build *mockturtle*. We are continously
testing with Clang 12.0.1, GCC 9.3.0, and GCC 10.2.0. More information can be
found in the [documentation](http://mockturtle.readthedocs.io/en/latest/installation.html).
## EPFL logic sythesis libraries
mockturtle is part of the [EPFL logic synthesis](https://lsi.epfl.ch/page-138455-en.html) libraries. The other libraries and several examples on how to use and integrate the libraries can be found in the [logic synthesis tool showcase](https://github.com/lsils/lstools-showcase).