The AX7Z035B board is suitable for PCIe, video image processing, fiber/Ethernet communication, etc.
RISC-V CPU with 5-stage pipeline, implemented in Verilog HDL.
采用RISC-V 32I指令集的五级流水线cpu,basys3实现
毕业设计:基于ZYNQ7020 的帧差法运动目标检测
chiplab项目致力于构建基于LoongArch32 Reduced的soc敏捷开发平台