@bertphang
CPU/GPUGPU/Interconnection
HuoYan 火眼金睛 Micro benchmark as the replacement of dhrystone and coremark with each program very short runtime duration. Therefore, enable agile evaluating performance of compiler and micro-architectur
收集开源的CPU/SOC，并搭建统一的Verilog Simulator和FPGA验证平台，能加载执行同一个ELF程序。 目前支持的CPU有OpenMSP430, UltraEmbedded RISC-V SoC, T-Head E902, E906; 支持的Simulator皆为开源的iverilog, verilator; 支持的FPGA综合工具是Xilinx的Vivado。
