//2024-1-13  
//8λת

module comp-conv (
                        a,
                        a_comp
                    );

input[7:0]              a;
output[7:0]             a_comp;

wire[6:0]               b:
wire[7:0]               y;

assign                  b=~a[6:0];
assign                  y[6:0]=b+1;
assign                  y[7]=a[7];

assign                  a_comp=a[7]?y:a;

    
endmodule