//2024-2-18 姜青羊
//日常练习

module fn_sw (
                    A,
                    B,
                    sel,
                    Y
                );

input               A,B,sel;
output              Y;
reg                 Y;

always @(A or B or sel) begin
    if(sel==1)
       Y=A^B;
    else
       Y=A&B;
end
    
endmodule


//------testbench--------

module tb_fn_sw ();

reg                 a,b,s;
wire                y;

fn_sw u_fn_sw (
                    .A(a),
                    .B(b),
                    .sel(s),
                    .Y(y)
                );

initial begin
                        s=0; a=0; b=0;
                #10     s=0; a=0; b=1;
                #10     s=0; a=1; b=0;
                #10     s=0; a=1; b=1;
                #10     s=1; a=0; b=0;
                #10     s=1; a=0; b=1;
                #10     s=1; a=1; b=0;
                #10     s=1; a=1; b=1;
                        $stop;
end

endmodule