Master Thesis "ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network"
Last updated: 5 years agoTraining Deep Neural Networks with Weights and Activations Constrained to +1 or -1
Last updated: 5 years agoThis repository is the backup of XJTU-Tripler project, participating dac19 system design contest
Last updated: 5 years agoA Neural Net Training Interface on TensorFlow, with focus on speed + flexibility
Last updated: 5 years agoThis is the first step to implement RNN on FPGAs. All modules are heavily commented. We will use High-Level Synthesis to turn these code into Hardware Description Languages (HDL).
Last updated: 5 years agoFPGA-based ZynqNet CNN accelerator developed by Vivado_HLS
Last updated: 5 years agoThe resnet20 cnn inference accelerator on cifar10 net about twn net with hls tool
Last updated: 5 years agoPyTorch implementation of DiracDeltaNet from paper Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs
Last updated: 5 years ago