Watch LTZJS/learn

Watch LTZJS/axi-uvm forked from justin371/axi-uvm

yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/

Watch LTZJS/ic_virtual_project forked from 尼德兰的喵/ic_virtual_project

芯片前端萌新培训虚拟项目

Watch LTZJS/riscv-core forked from StephenDai/riscv-core

本项目用verilog语言实现了一个具有五级流水线的简单RISCV处理器核，实现RV32I指令集并验证了每条指令实现的正确性。项目文件里面包含所有的设计和测试文件以及完整的makefile脚本，可以“开箱即用”。

Watch LTZJS/tinyriscv_vivado forked from liangkangnan/tinyriscv_vivado

tinyriscv移植到Vivado下的工程。

Watch LTZJS/ip_repo forked from 湛蓝/ip_repo

VIVADO自创IP核

Watch LTZJS/AMBA学习笔记 forked from Alexander Cheung/AMBA学习笔记

IC设计，先学习AMBA设计的规则，并利用arm开源的资料做一些仿真测试等

Watch LTZJS/Pipeline CPU based on FPGA and Verilog.（基于FPGA的流水线CPU） forked from QuanHaHQuan/Pipeline CPU based on FPGA and Verilog.（基于FPGA的流水线CPU）

This is a Verilog implementation of pipeline CPU on FPGA board.

Watch LTZJS/ROM_FIR_ILA forked from 李松平/ROM_FIR_ILA

通信专用IC的数字前端设计

Watch LTZJS/Verilog数字电路设计基础模块 forked from wataru不喜欢吃SASHIMI/Verilog数字电路设计基础模块

Verilog数字电路设计基础模块