Brevitas: neural network quantization in PyTorch
Build Customized FPGA Implementations for Vivado
Collection of Yocto Project layers to enable AMD Xilinx products
An MLIR-based toolchain for AMD AI Engine-enabled devices.
A research shell for Alveo V80
Test suite
AMD Trusted side of the TEE
An open source branch of AIE API
AIEBU
Dataflow compiler for QNN inference on FPGAs
Xilinx Tcl Store
Representation and Reference Lowering of ONNX Models in MLIR Compiler Infrastructure
