OpenSTA is an open source timing analysis tool
最近更新:
8个月前
OpenROAD is an open source eda tool for VLSI
最近更新:
8个月前
OpenLane is for vlsi
最近更新:
接近4年前
The Logic Synthesis oracle is a framework developed on the top of EPFL logic synthesis libraries to unlock efficient logic manipulation by using di...
最近更新:
接近4年前
yosys is for logic systhesis
最近更新:
接近4年前