[sync] PR-27: RISCV: Utilize GCC's Zicclsm macro to detect hardware support for unaligned memory access. · Pull Request !28 · src-openEuler/lz4

### 1. Origin pull request:
https://gitee.com/src-openeuler/lz4/pulls/27

### 2. Original pull request related issue(s):
https://gitee.com/src-openeuler/lz4/issues/ICWGKG

### 3. Original pull request related commit(s):
| Sha | Datetime | Message |
|---|---|---|
|[b4c80ff8](https://gitee.com/src-openeuler/lz4/commits/b4c80ff85bfe22e054caca5fc0d3f451eff32791)|2025-09-04 08:59:27 +0800 CST|The modification includes using direct unaligned memory access as the optimal approach on RISC-V, similar to ARMv6. We utilize GCC's Zicclsm macro to detect hardware support for unaligned memory access, which is mandatory per the RVA20U64 specification. Additionally, we ensure that this change does not affect original judgment criteria on servers without Zicclsm extension support. Supported versions: GCC14.1.0 and above. Testing: The verification involves testing performance with and without Zicclsm extension support on RISC-V platforms, comparing compression speed improvements. Results: Configuration Compression Speed (MB/s) Improvement Ratio Without Zicclsm extension 160 - (Baseline) With Zicclsm extension 218 +34.38% All tests show successful performance improvements when supported. Signed-off-by: liuqingtao <liu.qingtao2@zte.com.cn> |

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