组织介绍
来自中国科学院大学的龙芯杯参赛团队
开发进展
gantt
dateFormat YYYY-MM-DD
title workflow
section core dev
simple MIPS core without exception :done, des1, 2022-02-21,14d
handle exception :done, des2, after des1, 7d
add sram-like interface :done, des3, after des2, 5d
add TLB mmu :done, des4, 2022-03-20, 4d
section TLB dev
raw TLB module :done, dest1, 2022-03-07, 4d
address translate module :done, dest2, 2022-03-19, 1d
section cache dev
raw cache module :done, dest1, 2022-03-07, 3d
sram-like AXI bridge :done, dest2, after dest1, 9d
support AXI brust :done, dest3, after dest2, 1d
change SOC structure :done, dest4, after dest3, 4d
connet cache to core :active, dest5, after dest4, 4d
成员组成(按姓氏笔画排序)