7 henrik.wu/five-pipeline stage riscv cpu design and verification based on uvm

five-pipeline stage riscv cpu design and verification based on uvm

9 EasyRiscv/easy-riscv

easy-riscv

1 robbietoo/core-v-verif

Functional verification project for the CORE-V family of RISC-V cores.

1 franz/core_dvi_framebuffer

2 siriusdemon/Build-Your-Own-Face-Model

Build your own ArcFace, CenterFace

1 博远/riscv-gnu-toolchain

GNU toolchain for RISC-V, including GCC