@shi-chenxiang
烤面筋胡了 暂无简介
浙江大学计算机体系结构课程实验
上海理工大学本科毕业设计(论文) LaTeX 模板。
来自https://github.com/shengcaishizhan/kkndme_tianya
system verilog 学习,验证采用Verilator 3.916 2017-11-25 rev verilator_3_914-65-g0478dbd,操作系统linux mint
多种fifo的verilog实现
多种fifo的verilog实现的验证环境
Guide for ICSPA MOOC 镜像
使用vscode+iverilog+gtkwave搭建的verilog仿真环境。
five-pipeline stage riscv cpu design and verification based on uvm
RISC-V 五级流水线 CPU 实现
Digital FM Radio Receiver for FPGA
Simple mono FM Radio.
A GPS bicycle speedometer that supports offline maps and track recording
AnLinux allow you to run Linux on Android without root access.
:necktie: A collection of cv and resume templates written in LaTeX. Leave an issue if your language is not supported!
The official Vim repository
Icarus Verilog